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Sample records for active pixel cmos

  1. CMOS Active Pixel Sensor Technology and Reliability Characterization Methodology

    NASA Technical Reports Server (NTRS)

    Chen, Yuan; Guertin, Steven M.; Pain, Bedabrata; Kayaii, Sammy

    2006-01-01

    This paper describes the technology, design features and reliability characterization methodology of a CMOS Active Pixel Sensor. Both overall chip reliability and pixel reliability are projected for the imagers.

  2. CMOS Active Pixel Sensor (APS) Imager for Scientific Applications

    NASA Astrophysics Data System (ADS)

    Ay, Suat U.; Lesser, Michael P.; Fossum, Eric R.

    2002-12-01

    A 512×512 CMOS Active Pixel Sensor (APS) imager has been designed, fabricate, and tested for frontside illumination suitable for use in astronomy specifically in telescope guider systems as a replacement of CCD chips. The imager features a high-speed differential analog readout, 15 μm pixel pitch, 75 % fill factor (FF), 62 dB dynamic range, 315Ke- pixel capacity, less than 0.25% fixed pattern noise (FPN), 45 dB signal to noise ratio (SNR) and frame rate of up to 40 FPS. Design was implemented in a standard 0.5 μm CMOS process technology consuming less than 200mWatts on a single 5 Volt power supply. CMOS Active Pixel Sensor (APS) imager was developed with pixel structure suitable for both frontside and backside illumination holding large number of electron in relatively small pixel pitch of 15 μm. High-speed readout and signal processing circuits were designed to achieve low fixed pattern noise (FPN) and non-uniformity to provide CCD-like analog outputs. Target spectrum range of operation for the imager is in near ultraviolet (300-400 nm) with high quantum efficiency. This device is going to be used as a test vehicle to develop backside-thinning process.

  3. Monolithic active pixel sensors (MAPS) in a VLSI CMOS technology

    NASA Astrophysics Data System (ADS)

    Turchetta, R.; French, M.; Manolopoulos, S.; Tyndel, M.; Allport, P.; Bates, R.; O'Shea, V.; Hall, G.; Raymond, M.

    2003-03-01

    Monolithic Active Pixel Sensors (MAPS) designed in a standard VLSI CMOS technology have recently been proposed as a compact pixel detector for the detection of high-energy charged particle in vertex/tracking applications. MAPS, also named CMOS sensors, are already extensively used in visible light applications. With respect to other competing imaging technologies, CMOS sensors have several potential advantages in terms of low cost, low power, lower noise at higher speed, random access of pixels which allows windowing of region of interest, ability to integrate several functions on the same chip. This brings altogether to the concept of 'camera-on-a-chip'. In this paper, we review the use of CMOS sensors for particle physics and we analyse their performances in term of the efficiency (fill factor), signal generation, noise, readout speed and sensor area. In most of high-energy physics applications, data reduction is needed in the sensor at an early stage of the data processing before transfer of the data to tape. Because of the large number of pixels, data reduction is needed on the sensor itself or just outside. This brings in stringent requirements on the temporal noise as well as to the sensor uniformity, expressed as a Fixed Pattern Noise (FPN). A pixel architecture with an additional transistor is proposed. This architecture, coupled to correlated double sampling of the signal will allow cancellation of the two dominant noise sources, namely the reset or kTC noise and the FPN. A prototype has been designed in a standard 0.25 μm CMOS technology. It has also a structure for electrical calibration of the sensor. The prototype is functional and detailed tests are under way.

  4. CMOS VLSI Active-Pixel Sensor for Tracking

    NASA Technical Reports Server (NTRS)

    Pain, Bedabrata; Sun, Chao; Yang, Guang; Heynssens, Julie

    2004-01-01

    An architecture for a proposed active-pixel sensor (APS) and a design to implement the architecture in a complementary metal oxide semiconductor (CMOS) very-large-scale integrated (VLSI) circuit provide for some advanced features that are expected to be especially desirable for tracking pointlike features of stars. The architecture would also make this APS suitable for robotic- vision and general pointing and tracking applications. CMOS imagers in general are well suited for pointing and tracking because they can be configured for random access to selected pixels and to provide readout from windows of interest within their fields of view. However, until now, the architectures of CMOS imagers have not supported multiwindow operation or low-noise data collection. Moreover, smearing and motion artifacts in collected images have made prior CMOS imagers unsuitable for tracking applications. The proposed CMOS imager (see figure) would include an array of 1,024 by 1,024 pixels containing high-performance photodiode-based APS circuitry. The pixel pitch would be 9 m. The operations of the pixel circuits would be sequenced and otherwise controlled by an on-chip timing and control block, which would enable the collection of image data, during a single frame period, from either the full frame (that is, all 1,024 1,024 pixels) or from within as many as 8 different arbitrarily placed windows as large as 8 by 8 pixels each. A typical prior CMOS APS operates in a row-at-a-time ( grolling-shutter h) readout mode, which gives rise to exposure skew. In contrast, the proposed APS would operate in a sample-first/readlater mode, suppressing rolling-shutter effects. In this mode, the analog readout signals from the pixels corresponding to the windows of the interest (which windows, in the star-tracking application, would presumably contain guide stars) would be sampled rapidly by routing them through a programmable diagonal switch array to an on-chip parallel analog memory array. The

  5. Transversal-readout CMOS active pixel image sensor

    NASA Astrophysics Data System (ADS)

    Miyatake, Shigehiro; Ishida, Kouichi; Morimoto, Takashi; Masaki, Yasuo; Tanabe, Hideki

    2001-05-01

    This paper presents a CMOS active pixel image sensor (APS) with a transversal readout architecture that eliminates the vertically striped fixed pattern noise (FPN). There are two kinds of FPNs for CMOS APSs. One originates form the pixel- to-pixel variation in dark current and source-follower threshold voltage, and the other from the column-to-column variation in column readout structures. The former may become invisible in the future due to process improvements. However, the latter, which result sin a vertically striped FPN, is and will be conspicuous without some subtraction because of the correlation in the vertical direction. The pixel consists of a photodiode, a row- and a column-reset transistor, a source follower input transistor, and a column-select transistor instead of the row-select transistor in conventional CMOS APSs. The column-select transistor is connected to a signal line, which runs horizontally instead of vertically. Every horizontal signal line is merged into a single vertical signal line via a row- select transistor, which can be made large enough to make its on-resistence variation negligible because of its low driving frequency. Therefore, the sensor has neither a vertical nor horizontal stripe FPN.

  6. CMOS Monolithic Active Pixel Sensors (MAPS): Developments and future outlook

    NASA Astrophysics Data System (ADS)

    Turchetta, R.; Fant, A.; Gasiorek, P.; Esbrand, C.; Griffiths, J. A.; Metaxas, M. G.; Royle, G. J.; Speller, R.; Venanzi, C.; van der Stelt, P. F.; Verheij, H.; Li, G.; Theodoridis, S.; Georgiou, H.; Cavouras, D.; Hall, G.; Noy, M.; Jones, J.; Leaver, J.; Machin, D.; Greenwood, S.; Khaleeq, M.; Schulerud, H.; Østby, J. M.; Triantis, F.; Asimidis, A.; Bolanakis, D.; Manthos, N.; Longo, R.; Bergamaschi, A.

    2007-12-01

    Re-invented in the early 1990s, on both sides of the Atlantic, Monolithic Active Pixel Sensors (MAPS) in a CMOS technology are today the most sold solid-state imaging devices, overtaking the traditional technology of Charge-Coupled Devices (CCD). The slow uptake of CMOS MAPS started with low-end applications, for example web-cams, and is slowly pervading the high-end applications, for example in prosumer digital cameras. Higher specifications are required for scientific applications: very low noise, high speed, high dynamic range, large format and radiation hardness are some of these requirements. This paper will present a brief overview of the CMOS Image Sensor technology and of the requirements for scientific applications. As an example, a sensor for X-ray imaging will be presented. This sensor was developed within a European FP6 Consortium, intelligent imaging sensors (I-ImaS).

  7. Development of radiation hard CMOS active pixel sensors for HL-LHC

    NASA Astrophysics Data System (ADS)

    Pernegger, Heinz

    2016-07-01

    New pixel detectors, based on commercial high voltage and/or high resistivity full CMOS processes, hold promise as next-generation active pixel sensors for inner and intermediate layers of the upgraded ATLAS tracker. The use of commercial CMOS processes allow cost-effective detector construction and simpler hybridisation techniques. The paper gives an overview of the results obtained on AMS-produced CMOS sensors coupled to the ATLAS Pixel FE-I4 readout chips. The SOI (silicon-on-insulator) produced sensors by XFAB hold great promise as radiation hard SOI-CMOS sensors due to their combination of partially depleted SOI transistors reducing back-gate effects. The test results include pre-/post-irradiation comparison, measurements of charge collection regions as well as test beam results.

  8. A CMOS Active Pixel Sensor for Charged Particle Detection

    SciTech Connect

    Matis, Howard S.; Bieser, Fred; Kleinfelder, Stuart; Rai, Gulshan; Retiere, Fabrice; Ritter, Hans George; Singh, Kunal; Wurzel, Samuel E.; Wieman, Howard; Yamamoto, Eugene

    2002-12-02

    Active Pixel Sensor (APS) technology has shown promise for next-generation vertex detectors. This paper discusses the design and testing of two generations of APS chips. Both are arrays of 128 by 128 pixels, each 20 by 20 {micro}m. Each array is divided into sub-arrays in which different sensor structures (4 in the first version and 16 in the second) and/or readout circuits are employed. Measurements of several of these structures under Fe{sup 55} exposure are reported. The sensors have also been irradiated by 55 MeV protons to test for radiation damage. The radiation increased the noise and reduced the signal. The noise can be explained by shot noise from the increased leakage current and the reduction in signal is due to charge being trapped in the epi layer. Nevertheless, the radiation effect is small for the expected exposures at RHIC and RHIC II. Finally, we describe our concept for mechanically supporting a thin silicon wafer in an actual detector.

  9. 3D monolithically stacked CMOS Active Pixel Sensors for particle position and direction measurements

    NASA Astrophysics Data System (ADS)

    Servoli, L.; Passeri, D.; Morozzi, A.; Magalotti, D.; Piperku, L.

    2015-01-01

    In this work we propose a 3D monolithically stacked, multi-layer detectors based on CMOS Active Pixel Sensors (APS) layers which allows at the same time accurate estimation of the impact point and of the incidence angle an ionizing particle. The whole system features two fully-functional CMOS APS matrix detectors, including both sensing area and control/signal elaboration circuitry, stacked in a monolithic device by means of Through Silicon Via (TSV) connections thanks to the capabilities of the CMOS vertical scale integration (3D-IC) 130 nm Chartered/Tezzaron technology. In order to evaluate the suitability of the two layer monolithic active pixel sensor system to reconstruct particle tracks, tests with proton beams have been carried out at the INFN LABEC laboratories in Florence (Italy) with 3 MeV proton beam.

  10. Integrated imaging sensor systems with CMOS active pixel sensor technology

    NASA Technical Reports Server (NTRS)

    Yang, G.; Cunningham, T.; Ortiz, M.; Heynssens, J.; Sun, C.; Hancock, B.; Seshadri, S.; Wrigley, C.; McCarty, K.; Pain, B.

    2002-01-01

    This paper discusses common approaches to CMOS APS technology, as well as specific results on the five-wire programmable digital camera-on-a-chip developed at JPL. The paper also reports recent research in the design, operation, and performance of APS imagers for several imager applications.

  11. Performance of a novel wafer scale CMOS active pixel sensor for bio-medical imaging.

    PubMed

    Esposito, M; Anaxagoras, T; Konstantinidis, A C; Zheng, Y; Speller, R D; Evans, P M; Allinson, N M; Wells, K

    2014-07-01

    Recently CMOS active pixels sensors (APSs) have become a valuable alternative to amorphous silicon and selenium flat panel imagers (FPIs) in bio-medical imaging applications. CMOS APSs can now be scaled up to the standard 20 cm diameter wafer size by means of a reticle stitching block process. However, despite wafer scale CMOS APS being monolithic, sources of non-uniformity of response and regional variations can persist representing a significant challenge for wafer scale sensor response. Non-uniformity of stitched sensors can arise from a number of factors related to the manufacturing process, including variation of amplification, variation between readout components, wafer defects and process variations across the wafer due to manufacturing processes. This paper reports on an investigation into the spatial non-uniformity and regional variations of a wafer scale stitched CMOS APS. For the first time a per-pixel analysis of the electro-optical performance of a wafer CMOS APS is presented, to address inhomogeneity issues arising from the stitching techniques used to manufacture wafer scale sensors. A complete model of the signal generation in the pixel array has been provided and proved capable of accounting for noise and gain variations across the pixel array. This novel analysis leads to readout noise and conversion gain being evaluated at pixel level, stitching block level and in regions of interest, resulting in a coefficient of variation ⩽1.9%. The uniformity of the image quality performance has been further investigated in a typical x-ray application, i.e. mammography, showing a uniformity in terms of CNR among the highest when compared with mammography detectors commonly used in clinical practice. Finally, in order to compare the detection capability of this novel APS with the technology currently used (i.e. FPIs), theoretical evaluation of the detection quantum efficiency (DQE) at zero-frequency has been performed, resulting in a higher DQE for this

  12. Performance of a novel wafer scale CMOS active pixel sensor for bio-medical imaging

    NASA Astrophysics Data System (ADS)

    Esposito, M.; Anaxagoras, T.; Konstantinidis, A. C.; Zheng, Y.; Speller, R. D.; Evans, P. M.; Allinson, N. M.; Wells, K.

    2014-07-01

    Recently CMOS active pixels sensors (APSs) have become a valuable alternative to amorphous silicon and selenium flat panel imagers (FPIs) in bio-medical imaging applications. CMOS APSs can now be scaled up to the standard 20 cm diameter wafer size by means of a reticle stitching block process. However, despite wafer scale CMOS APS being monolithic, sources of non-uniformity of response and regional variations can persist representing a significant challenge for wafer scale sensor response. Non-uniformity of stitched sensors can arise from a number of factors related to the manufacturing process, including variation of amplification, variation between readout components, wafer defects and process variations across the wafer due to manufacturing processes. This paper reports on an investigation into the spatial non-uniformity and regional variations of a wafer scale stitched CMOS APS. For the first time a per-pixel analysis of the electro-optical performance of a wafer CMOS APS is presented, to address inhomogeneity issues arising from the stitching techniques used to manufacture wafer scale sensors. A complete model of the signal generation in the pixel array has been provided and proved capable of accounting for noise and gain variations across the pixel array. This novel analysis leads to readout noise and conversion gain being evaluated at pixel level, stitching block level and in regions of interest, resulting in a coefficient of variation ⩽1.9%. The uniformity of the image quality performance has been further investigated in a typical x-ray application, i.e. mammography, showing a uniformity in terms of CNR among the highest when compared with mammography detectors commonly used in clinical practice. Finally, in order to compare the detection capability of this novel APS with the technology currently used (i.e. FPIs), theoretical evaluation of the detection quantum efficiency (DQE) at zero-frequency has been performed, resulting in a higher DQE for this

  13. CMOS Active Pixel Sensors as energy-range detectors for proton Computed Tomography

    NASA Astrophysics Data System (ADS)

    Esposito, M.; Anaxagoras, T.; Evans, P. M.; Green, S.; Manolopoulos, S.; Nieto-Camero, J.; Parker, D. J.; Poludniowski, G.; Price, T.; Waltham, C.; Allinson, N. M.

    2015-06-01

    Since the first proof of concept in the early 70s, a number of technologies has been proposed to perform proton CT (pCT), as a means of mapping tissue stopping power for accurate treatment planning in proton therapy. Previous prototypes of energy-range detectors for pCT have been mainly based on the use of scintillator-based calorimeters, to measure proton residual energy after passing through the patient. However, such an approach is limited by the need for only a single proton passing through the energy-range detector in a read-out cycle. A novel approach to this problem could be the use of pixelated detectors, where the independent read-out of each pixel allows to measure simultaneously the residual energy of a number of protons in the same read-out cycle, facilitating a faster and more efficient pCT scan. This paper investigates the suitability of CMOS Active Pixel Sensors (APSs) to track individual protons as they go through a number of CMOS layers, forming an energy-range telescope. Measurements performed at the iThemba Laboratories will be presented and analysed in terms of correlation, to confirm capability of proton tracking for CMOS APSs.

  14. Depleted Monolithic Active Pixel Sensors (DMAPS) implemented in LF-150 nm CMOS technology

    NASA Astrophysics Data System (ADS)

    Kishishita, T.; Hemperek, T.; Krüger, H.; Wermes, N.

    2015-03-01

    We present the recent development of Depleted Monolithic Active Pixel Sensors (DMAPS), implemented with an LFoundry (LF) 150 nm CMOS process. MAPS detectors based on an epi-layer have been matured in recent years and have attractive features in terms of reducing material budget and handling cost compared to conventional hybrid pixel detectors. However, the obtained signal is relatively small (~1000 e-) due to the thin epi-layer, and charge collection time is relatively slow, e.g., in the order of 100 ns, because charges are mainly collected by diffusion. Modern commercial CMOS technology, however, offers advanced process options to overcome such difficulties and enable truly monolithic devices as an alternative to hybrid pixel sensors and charge coupled devices. Unlike in the case of the standard MAPS technologies with epi-layers, the LF process provides a high-resistivity substrate that enables large signal and fast charge collection by drift in a ~50 μm thick depleted layer. Since this process also enables the use of deep n- and p-wells to isolate the collection electrode from the thin active device layer, PMOS and NMOS transistors are available for the readout electronics in each pixel cell. In order to evaluate the sensor and transistor characteristics, several collection electrodes variants and readout architectures have been implemented. In this report, we focus on its design aspect of the LF-DMAPS prototype chip.

  15. Development of CMOS Active Pixel Image Sensors for Low Cost Commercial Applications

    NASA Technical Reports Server (NTRS)

    Fossum, E.; Gee, R.; Kemeny, S.; Kim, Q.; Mendis, S.; Nakamura, J.; Nixon, R.; Ortiz, M.; Pain, B.; Zhou, Z.; Ackland, B.; Dickinson, A.; Eid, E.; Inglis, D.

    1994-01-01

    This paper describes ongoing research and development of CMOS active pixel image sensors for low cost commercial applications. A number of sensor designs have been fabricated and tested in both p-well and n-well technologies. Major elements in the development of the sensor include on-chip analog signal processing circuits for the reduction of fixed pattern noise, on-chip timing and control circuits and on-chip analog-to-digital conversion (ADC). Recent results and continuing efforts in these areas will be presented.

  16. Towards real-time VMAT verification using a prototype, high-speed CMOS active pixel sensor

    NASA Astrophysics Data System (ADS)

    Zin, Hafiz M.; Harris, Emma J.; Osmond, John P. F.; Allinson, Nigel M.; Evans, Philip M.

    2013-05-01

    This work investigates the feasibility of using a prototype complementary metal oxide semiconductor active pixel sensor (CMOS APS) for real-time verification of volumetric modulated arc therapy (VMAT) treatment. The prototype CMOS APS used region of interest read out on the chip to allow fast imaging of up to 403.6 frames per second (f/s). The sensor was made larger (5.4 cm × 5.4 cm) using recent advances in photolithographic technique but retains fast imaging speed with the sensor's regional read out. There is a paradigm shift in radiotherapy treatment verification with the advent of advanced treatment techniques such as VMAT. This work has demonstrated that the APS can track multi leaf collimator (MLC) leaves moving at 18 mm s-1 with an automatic edge tracking algorithm at accuracy better than 1.0 mm even at the fastest imaging speed. Evaluation of the measured fluence distribution for an example VMAT delivery sampled at 50.4 f/s was shown to agree well with the planned fluence distribution, with an average gamma pass rate of 96% at 3%/3 mm. The MLC leaves motion and linac pulse rate variation delivered throughout the VMAT treatment can also be measured. The results demonstrate the potential of CMOS APS technology as a real-time radiotherapy dosimeter for delivery of complex treatments such as VMAT.

  17. Characterisation of a CMOS active pixel sensor for use in the TEAM microscope

    NASA Astrophysics Data System (ADS)

    Battaglia, Marco; Contarato, Devis; Denes, Peter; Doering, Dionisio; Duden, Thomas; Krieger, Brad; Giubilato, Piero; Gnani, Dario; Radmilovic, Velimir

    2010-10-01

    A 1M- and a 4M-pixel monolithic CMOS active pixel sensor with 9.5×9.5 μm2 pixels have been developed for direct imaging in transmission electron microscopy as part of the TEAM project. We present the design and a full characterisation of the detector. Data collected with electron beams at various energies of interest in electron microscopy are used to determine the detector response. Data are compared to predictions of simulation. The line spread function measured with 80 and 300 keV electrons is (12.1±0.7) and (7.4±0.6) μm, respectively, in good agreement with our simulation. We measure the detection quantum efficiency to be 0.78±0.04 at 80 keV and 0.74±0.03 at 300 keV. Using a new imaging technique, based on single electron reconstruction, the line spread function for 80 and 300 keV electrons becomes (6.7±0.3) and (2.4±0.2) μm, respectively. The radiation tolerance of the pixels has been tested up to 5 Mrad and the detector is still functional with a decrease of dynamic range by ≃30%, corresponding to a reduction in full-well depth from ˜39 to ˜27 primary 300 keV electrons, due to leakage current increase, but identical line spread function performance.

  18. CMOS digital pixel sensors: technology and applications

    NASA Astrophysics Data System (ADS)

    Skorka, Orit; Joseph, Dileepan

    2014-04-01

    CMOS active pixel sensor technology, which is widely used these days for digital imaging, is based on analog pixels. Transition to digital pixel sensors can boost signal-to-noise ratios and enhance image quality, but can increase pixel area to dimensions that are impractical for the high-volume market of consumer electronic devices. There are two main approaches to digital pixel design. The first uses digitization methods that largely rely on photodetector properties and so are unique to imaging. The second is based on adaptation of a classical analog-to-digital converter (ADC) for in-pixel data conversion. Imaging systems for medical, industrial, and security applications are emerging lower-volume markets that can benefit from these in-pixel ADCs. With these applications, larger pixels are typically acceptable, and imaging may be done in invisible spectral bands.

  19. Improved Design of Active Pixel CMOS Sensors for Charged Particle Detection

    SciTech Connect

    Deptuch, Grzegorz

    2007-11-12

    The Department of Energy (DOE) nuclear physics program requires developments in detector instrumentation electronics with improved energy, position and timing resolution, sensitivity, rate capability, stability, dynamic range, and background suppression. The current Phase-I project was focused on analysis of standard-CMOS photogate Active Pixel Sensors (APS) as an efficient solution to this challenge. The advantages of the CMOS APS over traditional hybrid approaches (i.e., separate detection regions bump-bonded to readout circuits) include greatly reduced cost, low power and the potential for vastly larger pixel counts and densities. However, challenges remain in terms of the signal-to-noise ratio (SNR) and readout speed (currently on the order of milliseconds), which is the major problem for this technology. Recent work has shown that the long readout time for photogate APS is due to the presence of (interface) traps at the semiconductor-oxide interface. This Phase-I work yielded useful results in two areas: (a) Advanced three-dimensional (3D) physics-based simulation models and simulation-based analysis of the impact of interface trap density on the transient charge collection characteristics of existing APS structures; and (b) Preliminary analysis of the feasibility of an improved photogate pixel structure (i.e., new APS design) with an induced electric field under the charge collecting electrode to enhance charge collection. Significant effort was dedicated in Phase-I to the critical task of implementing accurate interface trap models in CFDRC's NanoTCAD 3D semiconductor device-physics simulator. This resulted in validation of the new NanoTCAD models and simulation results against experimental (published) data, within the margin of uncertainty associated with obtaining device geometry, material properties, and experimentation details. Analyses of the new, proposed photogate APS design demonstrated several promising trends.

  20. Characterization of Depleted Monolithic Active Pixel detectors implemented with a high-resistive CMOS technology

    NASA Astrophysics Data System (ADS)

    Kishishita, T.; Hemperek, T.; Rymaszewski, P.; Hirono, T.; Krüger, H.; Wermes, N.

    2016-07-01

    We present the recent development of DMAPS (Depleted Monolithic Active Pixel Sensor), implemented with a Toshiba 130 nm CMOS process. Unlike in the case of standard MAPS technologies which are based on an epi-layer, this process provides a high-resistive substrate that enables larger signal and faster charge collection by drift in a 50 - 300 μm thick depleted layer. Since this process also enables the use of deep n-wells to isolate the collection electrodes from the thin active device layer, NMOS and PMOS transistors are available for the readout electronics in each pixel cell. In order to characterize the technology, we implemented a simple three transistor readout with a variety of pixel pitches and input FET sizes. This layout variety gives us a clue on sensor characteristics for future optimization, such as the input detector capacitance or leakage current. In the initial measurement, the radiation spectra were obtained from 55Fe with an energy resolution of 770 eV (FWHM) and 90Sr with the MVP of 4165 e-.

  1. A Real-time Auto-detection Method for Random Telegraph Signal (RTS) Noise Detection in CMOS Active pixel sensors

    NASA Astrophysics Data System (ADS)

    Zheng, R.; Zhao, R.; Ma, Y.; Li, B.; Wei, X.; Wang, J.; Gao, W.; Wei, T.; Gao, D.; Hu, Y.

    2015-07-01

    CMOS Active pixel sensors (CMOS APS) are attractive for use in the innermost layers of charged particle trackers, due to their good tradeoffs among the key performances. However, CMOS APS can be greatly influenced by random telegraph signal (RTS) noise, which can cause particle tracking or energy calculation failures. In-depth research of pixels' RTS behavior stimulates the interest of the methods for RTS noise detection, reconstruction and parameters extraction. In this paper, a real-time auto-detection method is proposed, using real-time Gaussian noise standard deviation as the detection threshold. Experimental results show that, compared with current methods using signal standard deviation as the thresholds, the proposed method is more sensitive in multi-level RTS detection and more effective in the case of RTS noise degradation.

  2. Active pixel sensors in AMS H18/H35 HV-CMOS technology for the ATLAS HL-LHC upgrade

    NASA Astrophysics Data System (ADS)

    Ristic, Branislav

    2016-09-01

    Deep sub micron HV-CMOS processes offer the opportunity for sensors built by industry standard techniques while being HV tolerant, making them good candidates for drift-based, fast collecting, thus radiation-hard pixel detectors. For the upgrade of the ATLAS Pixel Detector towards the HL-LHC requirements, active pixel sensors in HV-CMOS technology were investigated. These implement signal processing electronics in deep n-wells, which also act as collecting electrodes. The deep n-wells allow for bias voltages up to 150 V leading to a depletion depth of several 10 μm. Prototype sensors in the AMS H18 180 nm and H35 350 nm HV-CMOS processes were thoroughly tested in lab measurements as well as in testbeam experiments. Irradiations with X-rays and protons revealed a tolerance to ionizing doses of 1 Grad while Edge-TCT studies assessed the effects of radiation on the charge collection. The sensors showed high detection efficiencies after neutron irradiation to 1015neq cm-2 in testbeam experiments. A full reticle size demonstrator chip, implemented in the H35 process is being submitted to prove the large scale feasibility of the HV-CMOS concept.

  3. Next-generation CMOS active pixel sensors for satellite hybrid optical communications/imaging sensor systems

    NASA Astrophysics Data System (ADS)

    Stirbl, Robert C.; Pain, Bedabrata; Cunningham, Thomas J.; Hancock, Bruce R.; McCarty, Kenneth P.

    1998-12-01

    Given the current choices of (1) an ever increasing population of large numbers of satellites in low-earth orbit (LEO) constellations for commercial and military global coverage systems, or (2) the alternative of smaller count geosynchronous satellite system constellations in high-earth (HEO), of higher cost and complexity, a number of commercial communications and military operations satellite systems designers are investigating the potential advantages and issues of operating in the mid-earth orbit altitudes (MEO) (between LEO and HEO). At these MEO altitudes both total dose and displacement damage can be traded against the system advantages of fewer satellites required. With growing demand for higher bandwidth communication for real-time earth observing satellite sensor systems, and NASA's interplanetary and deep space virtual unmanned exploration missions in stressing radiation environments, JPL is developing the next generation of smart sensors to address these new requirements of: low-cost, high bandwidth, miniaturization, ultra low-power and mission environment ruggedness. Radiation hardened/tolerant Active Pixel Sensor CMOS imagers that can be adaptively windowed with low power, on-chip control, timing, digital output and provide data-channel efficient on-chip compression, high bandwidth optical communications links are being designed and investigated to reduce size, weight and cost for common optics/hybrid architectures.

  4. Integrated X-ray and charged particle active pixel CMOS sensor arrays using an epitaxial silicon sensitive region

    SciTech Connect

    Kleinfelder, Stuart; Bichsel, Hans; Bieser, Fred; Matis, Howard S.; Rai, Gulshan; Retiere, Fabrice; Weiman, Howard; Yamamoto, Eugene

    2002-07-01

    Integrated CMOS Active Pixel Sensor (APS) arrays have been fabricated and tested using X-ray and electron sources. The 128 by 128 pixel arrays, designed in a standard 0.25 micron process, use a {approx}10 micron epitaxial silicon layer as a deep detection region. The epitaxial layer has a much greater thickness than the surface features used by standard CMOS APS, leading to stronger signals and potentially better signal-to-noise ratio (SNR). On the other hand, minority carriers confined within the epitaxial region may diffuse to neighboring pixels, blur images and reduce peak signal intensity. But for low-rate, sparse-event images, centroid analysis of this diffusion may be used to increase position resolution. Careful trade-offs involving pixel size and sense-node area verses capacitance must be made to optimize overall performance. The prototype sensor arrays, therefore, include a range of different pixel designs, including different APS circuits and a range of different epitaxial layer contact structures. The fabricated arrays were tested with 1.5 GeV electrons and Fe-55 X-ray sources, yielding a measured noise of 13 electrons RMS and an SNR for single Fe-55 X-rays of greater than 38.

  5. 50 μm pixel pitch wafer-scale CMOS active pixel sensor x-ray detector for digital breast tomosynthesis

    NASA Astrophysics Data System (ADS)

    Zhao, C.; Konstantinidis, A. C.; Zheng, Y.; Anaxagoras, T.; Speller, R. D.; Kanicki, J.

    2015-12-01

    Wafer-scale CMOS active pixel sensors (APSs) have been developed recently for x-ray imaging applications. The small pixel pitch and low noise are very promising properties for medical imaging applications such as digital breast tomosynthesis (DBT). In this work, we evaluated experimentally and through modeling the imaging properties of a 50 μm pixel pitch CMOS APS x-ray detector named DynAMITe (Dynamic Range Adjustable for Medical Imaging Technology). A modified cascaded system model was developed for CMOS APS x-ray detectors by taking into account the device nonlinear signal and noise properties. The imaging properties such as modulation transfer function (MTF), noise power spectrum (NPS), and detective quantum efficiency (DQE) were extracted from both measurements and the nonlinear cascaded system analysis. The results show that the DynAMITe x-ray detector achieves a high spatial resolution of 10 mm-1 and a DQE of around 0.5 at spatial frequencies  <1 mm-1. In addition, the modeling results were used to calculate the image signal-to-noise ratio (SNRi) of microcalcifications at various mean glandular dose (MGD). For an average breast (5 cm thickness, 50% glandular fraction), 165 μm microcalcifications can be distinguished at a MGD of 27% lower than the clinical value (~1.3 mGy). To detect 100 μm microcalcifications, further optimizations of the CMOS APS x-ray detector, image aquisition geometry and image reconstruction techniques should be considered.

  6. 50 μm pixel pitch wafer-scale CMOS active pixel sensor x-ray detector for digital breast tomosynthesis.

    PubMed

    Zhao, C; Konstantinidis, A C; Zheng, Y; Anaxagoras, T; Speller, R D; Kanicki, J

    2015-12-01

    Wafer-scale CMOS active pixel sensors (APSs) have been developed recently for x-ray imaging applications. The small pixel pitch and low noise are very promising properties for medical imaging applications such as digital breast tomosynthesis (DBT). In this work, we evaluated experimentally and through modeling the imaging properties of a 50 μm pixel pitch CMOS APS x-ray detector named DynAMITe (Dynamic Range Adjustable for Medical Imaging Technology). A modified cascaded system model was developed for CMOS APS x-ray detectors by taking into account the device nonlinear signal and noise properties. The imaging properties such as modulation transfer function (MTF), noise power spectrum (NPS), and detective quantum efficiency (DQE) were extracted from both measurements and the nonlinear cascaded system analysis. The results show that the DynAMITe x-ray detector achieves a high spatial resolution of 10 mm(-1) and a DQE of around 0.5 at spatial frequencies  <1 mm(-1). In addition, the modeling results were used to calculate the image signal-to-noise ratio (SNRi) of microcalcifications at various mean glandular dose (MGD). For an average breast (5 cm thickness, 50% glandular fraction), 165 μm microcalcifications can be distinguished at a MGD of 27% lower than the clinical value (~1.3 mGy). To detect 100 μm microcalcifications, further optimizations of the CMOS APS x-ray detector, image aquisition geometry and image reconstruction techniques should be considered. PMID:26540090

  7. Non-linear responsivity characterisation of a CMOS Active Pixel Sensor for high resolution imaging of the Jovian system

    NASA Astrophysics Data System (ADS)

    Soman, M.; Stefanov, K.; Weatherill, D.; Holland, A.; Gow, J.; Leese, M.

    2015-02-01

    The Jovian system is the subject of study for the Jupiter Icy Moon Explorer (JUICE), an ESA mission which is planned to launch in 2022. The scientific payload is designed for both characterisation of the magnetosphere and radiation environment local to the spacecraft, as well as remote characterisation of Jupiter and its satellites. A key instrument on JUICE is the high resolution and wide angle camera, JANUS, whose main science goals include detailed characterisation and study phases of three of the Galilean satellites, Ganymede, Callisto and Europa, as well as studies of other moons, the ring system, and irregular satellites. The CIS115 is a CMOS Active Pixel Sensor from e2v technologies selected for the JANUS camera. It is fabricated using 0.18 μ m CMOS imaging sensor process, with an imaging area of 2000 × 1504 pixels, each 7 μ m square. A 4T pixel architecture allows for efficient correlated double sampling, improving the readout noise to better than 8 electrons rms, whilst the sensor is operated in a rolling shutter mode, sampling at up to 10 Mpixel/s at each of the four parallel outputs.A primary parameter to characterise for an imaging device is the relationship that converts the sensor's voltage output back to the corresponding number of electrons that were detected in a pixel, known as the Charge to Voltage Factor (CVF). In modern CMOS sensors with small feature sizes, the CVF is known to be non-linear with signal level, therefore a signal-dependent measurement of the CIS115's CVF has been undertaken and is presented here. The CVF is well modelled as a quadratic function leading to a measurement of the maximum charge handling capacity of the CIS115 to be 3.4 × 104 electrons. If the CIS115's response is assumed linear, its CVF is 21.1 electrons per mV (1/47.5 μ V per electron).

  8. High responsivity CMOS imager pixel implemented in SOI technology

    NASA Technical Reports Server (NTRS)

    Zheng, X.; Wrigley, C.; Yang, G.; Pain, B.

    2000-01-01

    Availability of mature sub-micron CMOS technology and the advent of the new low noise active pixel sensor (APS) concept have enabled the development of low power, miniature, single-chip, CMOS digital imagers in the decade of the 1990's.

  9. Large area CMOS active pixel sensor x-ray imager for digital breast tomosynthesis: Analysis, modeling, and characterization

    SciTech Connect

    Zhao, Chumin; Kanicki, Jerzy; Konstantinidis, Anastasios C.; Patel, Tushita

    2015-11-15

    Purpose: Large area x-ray imagers based on complementary metal-oxide-semiconductor (CMOS) active pixel sensor (APS) technology have been proposed for various medical imaging applications including digital breast tomosynthesis (DBT). The low electronic noise (50–300 e{sup −}) of CMOS APS x-ray imagers provides a possible route to shrink the pixel pitch to smaller than 75 μm for microcalcification detection and possible reduction of the DBT mean glandular dose (MGD). Methods: In this study, imaging performance of a large area (29 × 23 cm{sup 2}) CMOS APS x-ray imager [Dexela 2923 MAM (PerkinElmer, London)] with a pixel pitch of 75 μm was characterized and modeled. The authors developed a cascaded system model for CMOS APS x-ray imagers using both a broadband x-ray radiation and monochromatic synchrotron radiation. The experimental data including modulation transfer function, noise power spectrum, and detective quantum efficiency (DQE) were theoretically described using the proposed cascaded system model with satisfactory consistency to experimental results. Both high full well and low full well (LFW) modes of the Dexela 2923 MAM CMOS APS x-ray imager were characterized and modeled. The cascaded system analysis results were further used to extract the contrast-to-noise ratio (CNR) for microcalcifications with sizes of 165–400 μm at various MGDs. The impact of electronic noise on CNR was also evaluated. Results: The LFW mode shows better DQE at low air kerma (K{sub a} < 10 μGy) and should be used for DBT. At current DBT applications, air kerma (K{sub a} ∼ 10 μGy, broadband radiation of 28 kVp), DQE of more than 0.7 and ∼0.3 was achieved using the LFW mode at spatial frequency of 0.5 line pairs per millimeter (lp/mm) and Nyquist frequency ∼6.7 lp/mm, respectively. It is shown that microcalcifications of 165–400 μm in size can be resolved using a MGD range of 0.3–1 mGy, respectively. In comparison to a General Electric GEN2 prototype DBT system (at

  10. Performance of a-Si:H photodiode technology-based advanced CMOS active pixel sensor imagers

    NASA Astrophysics Data System (ADS)

    Theil, Jeremy A.; Haddad, Homayoon; Snyder, Rick D.; Zelman, Mike; Hula, David; Lindahl, Kirk A.

    2001-12-01

    Amorphous silicon photodiode technology is a very attractive option for image array integrated circuits because it enables large die-size reduction and higher light collection efficiency than c-Si arrays. The concept behind the technology is to place the photosensing element directly above the rest of the circuit, thus eliminating the need to make areal tradeoffs between photodiode and pixel circuit. We have developed an photodiode array technology that is fully compatible with a 0.35 um CMOS process to produce image sensors arrays with 10-bit dynamic range that are 30% smaller than comparable c-Si photodiode arrays. The work presented here will discuss performance issues and solutions to lend itself to cost-effective high-volume manufacturing. The various methods of interconnection of the diode to the array and their advantages will be presented. The effect of doped layer thickness and concentration on quantum efficiency, and the effect of a-Si:H defect concentration on diode performance will be discussed. The photodiode dark leakage current density is about 80 pA/cm2, and its absolute quantum efficiency peaks about 85% at 550 nm. These sensors have 50% higher sensitivity, and 2x lower dark current when compared to bulk silicon sensors of the same design. The cell utilizes a 3 FET design, but allows for 100% photodiode area due to the elevated nature of the design. The VGA (640 X 480), array demonstrated here uses common intrinsic and p-type contact layers, and makes reliable contact to those layers by use of a monolithic transparent conductor strap tied to vias in the interconnect.

  11. Development of CMOS Active Pixel Image Sensors for Low Cost Commercial Applications

    NASA Technical Reports Server (NTRS)

    Gee, R.; Kemeny, S.; Kim, Q.; Mendis, S.; Nakamura, J.; Nixon, R.; Ortiz, M.; Pain, B.; Staller, C.; Zhou, Z; Fossum, E.

    1994-01-01

    JPL, under sponsorship from the NASA Office of Advanced Concepts and Technology, has been developing a second-generation solid-state image sensor technology. Charge-coupled devices (CCD) are a well-established first generation image sensor technology. For both commercial and NASA applications, CCDs have numerous shortcomings. In response, the active pixel sensor (APS) technology has been under research. The major advantages of APS technology are the ability to integrate on-chip timing, control, signal-processing and analog-to-digital converter functions, reduced sensitivity to radiation effects, low power operation, and random access readout.

  12. Optical and electrical characterization of a back-thinned CMOS active pixel sensor

    NASA Astrophysics Data System (ADS)

    Blue, Andrew; Clark, A.; Houston, S.; Laing, A.; Maneuski, D.; Prydderch, M.; Turchetta, R.; O'Shea, V.

    2009-06-01

    This work will report on the first work on the characterization of a back-thinned Vanilla-a 512×512 (25 μm squared) active pixel sensor (APS). Characterization of the detectors was carried out through the analysis of photon transfer curves to yield a measurement of full well capacity, noise levels, gain constants and linearity. Spectral characterization of the sensors was also performed in the visible and UV regions. A full comparison against non-back-thinned front illuminated Vanilla sensors is included. Such measurements suggest that the Vanilla APS will be suitable for a wide range of applications, including particle physics and biomedical imaging.

  13. A data parallel digitizer for a time-based simulation of CMOS Monolithic Active Pixel Sensors with FairRoot

    NASA Astrophysics Data System (ADS)

    Sitzmann, P.; Amar-Youcef, S.; Doering, D.; Deveaux, M.; Fröhlich, I.; Koziel, M.; Krebs, E.; Linnik, B.; Michel, J.; Milanovic, B.; Müntz, C.; Li, Q.; Stroth, J.; Tischler, T.

    2014-06-01

    CMOS Monolithic Active Pixel Sensors (MAPS) demonstrated excellent performances in the field of charged particle tracking. They feature an excellent single point resolution of few μm, a light material budget of 0.05% Xo in combination with a good radiation tolerance and time resolution. This makes the sensors a valuable technology for micro vertex detectors (MVD) of various experiments in heavy ion and particle physics like STAR and CBM. State of the art MAPS are equipped with a rolling shutter readout. Therefore, the data of one individual event is typically found in more than one data train generated by the sensor. This paper presents a concept to introduce this feature in both simulation and data analysis, taking profit of the sensor topology of the MVD. This topology allows to use for massive parallel data streaming and handling strategies within the FairRoot framework.

  14. Synchrotron based planar imaging and digital tomosynthesis of breast and biopsy phantoms using a CMOS active pixel sensor.

    PubMed

    Szafraniec, Magdalena B; Konstantinidis, Anastasios C; Tromba, Giuliana; Dreossi, Diego; Vecchio, Sara; Rigon, Luigi; Sodini, Nicola; Naday, Steve; Gunn, Spencer; McArthur, Alan; Olivo, Alessandro

    2015-03-01

    The SYRMEP (SYnchrotron Radiation for MEdical Physics) beamline at Elettra is performing the first mammography study on human patients using free-space propagation phase contrast imaging. The stricter spatial resolution requirements of this method currently force the use of conventional films or specialized computed radiography (CR) systems. This also prevents the implementation of three-dimensional (3D) approaches. This paper explores the use of an X-ray detector based on complementary metal-oxide-semiconductor (CMOS) active pixel sensor (APS) technology as a possible alternative, for acquisitions both in planar and tomosynthesis geometry. Results indicate higher quality of the images acquired with the synchrotron set-up in both geometries. This improvement can be partly ascribed to the use of parallel, collimated and monochromatic synchrotron radiation (resulting in scatter rejection, no penumbra-induced blurring and optimized X-ray energy), and partly to phase contrast effects. Even though the pixel size of the used detector is still too large - and thus suboptimal - for free-space propagation phase contrast imaging, a degree of phase-induced edge enhancement can clearly be observed in the images. PMID:25498332

  15. A 70μm × 70μm CMOS digital active pixel sensor for digital mammography and X-ray imaging

    NASA Astrophysics Data System (ADS)

    Sabadell, J.; Figueras, R.; Margarit, J. M.; Martín, E.; Terès, L.; Serra-Graells, F.

    2011-03-01

    This work presents an architecture for CMOS active pixel sensors (APS) based on a novel lossless charge integration method, proposed for X-ray imagers in general but specifically optimized for full-field digital mammography. The objective is to provide all the required functionality inside the pixel, so to use full digital control and read-out signals only, therefore avoiding crosstalk between analog lines over large pixel arrays. It includes a novel lossless A/D conversion scheme besides a self-calibrating dark current cancellation circuit, a self-biasing circuitry, biphasic current sensing for the collection of electrons (e-) or holes (h+) and built-in test. Furthermore, FPN compensation is available by individually addressing the pixel's internal DAC controlling the gain. Implemented in a 0.18μm 1P6M CMOS technology with MiM capacitors, everything fits into a 70μm by 70μm due to the extensive reuse of available blocks and aggressive layout techniques. Also, thanks to the MOSFET subthreshold operation, the average power consumption is as low as 8μW/pixel.

  16. A novel CMOS sensor with in-pixel auto-zeroed discrimination for charged particle tracking

    NASA Astrophysics Data System (ADS)

    Degerli, Y.; Guilloux, F.; Orsini, F.

    2014-05-01

    With the aim of developing fast and granular Monolithic Active Pixels Sensors (MAPS) as new charged particle tracking detectors for high energy physics experiments, a new rolling shutter binary pixel architecture concept (RSBPix) with in-pixel correlated double sampling, amplification and discrimination is presented. The discriminator features auto-zeroing in order to compensate process-related transistor mismatches. In order to validate the pixel, a first monolithic CMOS sensor prototype, including a pixel array of 96 × 64 pixels, has been designed and fabricated in the Tower-Jazz 0.18 μm CMOS Image Sensor (CIS) process. Results of laboratory tests are presented.

  17. Novel integrated CMOS pixel structures for vertex detectors

    SciTech Connect

    Kleinfelder, Stuart; Bieser, Fred; Chen, Yandong; Gareus, Robin; Matis, Howard S.; Oldenburg, Markus; Retiere, Fabrice; Ritter, Hans Georg; Wieman, Howard H.; Yamamoto, Eugene

    2003-10-29

    Novel CMOS active pixel structures for vertex detector applications have been designed and tested. The overriding goal of this work is to increase the signal to noise ratio of the sensors and readout circuits. A large-area native epitaxial silicon photogate was designed with the aim of increasing the charge collected per struck pixel and to reduce charge diffusion to neighboring pixels. The photogate then transfers the charge to a low capacitance readout node to maintain a high charge to voltage conversion gain. Two techniques for noise reduction are also presented. The first is a per-pixel kT/C noise reduction circuit that produces results similar to traditional correlated double sampling (CDS). It has the advantage of requiring only one read, as compared to two for CDS, and no external storage or subtraction is needed. The technique reduced input-referred temporal noise by a factor of 2.5, to 12.8 e{sup -}. Finally, a column-level active reset technique is explored that suppresses kT/C noise during pixel reset. In tests, noise was reduced by a factor of 7.6 times, to an estimated 5.1 e{sup -} input-referred noise. The technique also dramatically reduces fixed pattern (pedestal) noise, by up to a factor of 21 in our tests. The latter feature may possibly reduce pixel-by-pixel pedestal differences to levels low enough to permit sparse data scan without per-pixel offset corrections.

  18. Analysis and Enhancement of Low-Light-Level Performance of Photodiode-Type CMOS Active Pixel Images Operated with Sub-Threshold Reset

    NASA Technical Reports Server (NTRS)

    Pain, Bedabrata; Yang, Guang; Ortiz, Monico; Wrigley, Christopher; Hancock, Bruce; Cunningham, Thomas

    2000-01-01

    Noise in photodiode-type CMOS active pixel sensors (APS) is primarily due to the reset (kTC) noise at the sense node, since it is difficult to implement in-pixel correlated double sampling for a 2-D array. Signal integrated on the photodiode sense node (SENSE) is calculated by measuring difference between the voltage on the column bus (COL) - before and after the reset (RST) is pulsed. Lower than kTC noise can be achieved with photodiode-type pixels by employing "softreset" technique. Soft-reset refers to resetting with both drain and gate of the n-channel reset transistor kept at the same potential, causing the sense node to be reset using sub-threshold MOSFET current. However, lowering of noise is achieved only at the expense higher image lag and low-light-level non-linearity. In this paper, we present an analysis to explain the noise behavior, show evidence of degraded performance under low-light levels, and describe new pixels that eliminate non-linearity and lag without compromising noise.

  19. From hybrid to CMOS pixels ... a possibility for LHC's pixel future?

    NASA Astrophysics Data System (ADS)

    Wermes, N.

    2015-12-01

    Hybrid pixel detectors have been invented for the LHC to make tracking and vertexing possible at all in LHC's radiation intense environment. The LHC pixel detectors have meanwhile very successfully fulfilled their promises and R&D for the planned HL-LHC upgrade is in full swing, targeting even higher ionising doses and non-ionising fluences. In terms of rate and radiation tolerance hybrid pixels are unrivaled. But they have disadvantages as well, most notably material thickness, production complexity, and cost. Meanwhile also active pixel sensors (DEPFET, MAPS) have become real pixel detectors but they would by far not stand the rates and radiation faced from HL-LHC. New MAPS developments, so-called DMAPS (depleted MAPS) which are full CMOS-pixel structures with charge collection in a depleted region have come in the R&D focus for pixels at high rate/radiation levels. This goal can perhaps be realised exploiting HV technologies, high ohmic substrates and/or SOI based technologies. The paper covers the main ideas and some encouraging results from prototyping R&D, not hiding the difficulties.

  20. Depleted CMOS pixels for LHC proton-proton experiments

    NASA Astrophysics Data System (ADS)

    Wermes, N.

    2016-07-01

    While so far monolithic pixel detectors have remained in the realm of comparatively low rate and radiation applications outside LHC, new developments exploiting high resistivity substrates with three or four well CMOS process options allow reasonably large depletion depths and full CMOS circuitry in a monolithic structure. This opens up the possibility to target CMOS pixel detectors also for high radiation pp-experiments at the LHC upgrade, either in a hybrid-type fashion or even fully monolithic. Several pixel matrices have been prototyped with high ohmic substrates, high voltage options, and full CMOS electronics. They were characterized in the lab and in test beams. An overview of the necessary development steps and different approaches as well as prototype results are presented in this paper.

  1. Design and characterization of high precision in-pixel discriminators for rolling shutter CMOS pixel sensors with full CMOS capability

    NASA Astrophysics Data System (ADS)

    Fu, Y.; Hu-Guo, C.; Dorokhov, A.; Pham, H.; Hu, Y.

    2013-07-01

    In order to exploit the ability to integrate a charge collecting electrode with analog and digital processing circuitry down to the pixel level, a new type of CMOS pixel sensors with full CMOS capability is presented in this paper. The pixel array is read out based on a column-parallel read-out architecture, where each pixel incorporates a diode, a preamplifier with a double sampling circuitry and a discriminator to completely eliminate analog read-out bottlenecks. The sensor featuring a pixel array of 8 rows and 32 columns with a pixel pitch of 80 μm×16 μm was fabricated in a 0.18 μm CMOS process. The behavior of each pixel-level discriminator isolated from the diode and the preamplifier was studied. The experimental results indicate that all in-pixel discriminators which are fully operational can provide significant improvements in the read-out speed and the power consumption of CMOS pixel sensors.

  2. Fully depleted, thick, monolithic CMOS pixels with high quantum efficiency

    NASA Astrophysics Data System (ADS)

    Clarke, A.; Stefanov, K.; Johnston, N.; Holland, A.

    2015-04-01

    The Centre for Electronic Imaging (CEI) has an active programme of evaluating and designing Complementary Metal-Oxide Semiconductor (CMOS) image sensors with high quantum efficiency, for applications in near-infrared and X-ray photon detection. This paper describes the performance characterisation of CMOS devices made on a high resistivity 50 μ m thick p-type substrate with a particular focus on determining the depletion depth and the quantum efficiency. The test devices contain 8 × 8 pixel arrays using CCD-style charge collection, which are manufactured in a low voltage CMOS process by ESPROS Photonics Corporation (EPC). Measurements include determining under which operating conditions the devices become fully depleted. By projecting a spot using a microscope optic and a LED and biasing the devices over a range of voltages, the depletion depth will change, causing the amount of charge collected in the projected spot to change. We determine if the device is fully depleted by measuring the signal collected from the projected spot. The analysis of spot size and shape is still under development.

  3. Performance of capacitively coupled active pixel sensors in 180 nm HV-CMOS technology after irradiation to HL-LHC fluences

    NASA Astrophysics Data System (ADS)

    Feigl, S.

    2014-03-01

    In this ATLAS upgrade R&D project, we explore the concept of using a deep-submicron HV-CMOS process to produce a drop-in replacement for traditional radiation-hard silicon sensors. Such active sensors contain simple circuits, e.g. amplifiers and discriminators, but still require a traditional (pixel or strip) readout chip. This approach yields most advantages of MAPS (improved resolution, reduced cost and material budget, etc.), without the complication of full integration on a single chip. After outlining the basic design of the HV2FEI4 test ASIC, results after irradiation with X-rays to 862 Mrad and neutrons up to 1016(1 MeV neq)/cm2 will be presented. Finally, a brief outlook on further development plans is given.

  4. Development of a CMOS SOI Pixel Detector

    SciTech Connect

    Arai, Y.; Hazumi, M.; Ikegami, Y.; Kohriki, T.; Tajima, O.; Terada, S.; Tsuboyama, T.; Unno, Y.; Ushiroda, Y.; Ikeda, H.; Hara, K.; Ishino, H.; Kawasaki, T.; Miyake, H.; Martin, E.; Varner, G.; Tajima, H.; Ohno, M.; Fukuda, K.; Komatsubara, H.; Ida, J.; /NONE - OKI ELECTR INDUST TOKYO

    2008-08-19

    We have developed a monolithic radiation pixel detector using silicon on insulator (SOI) with a commercial 0.15 {micro}m fully-depleted-SOI technology and a Czochralski high resistivity silicon substrate in place of a handle wafer. The SOI TEG (Test Element Group) chips with a size of 2.5 x 2.5 mm{sup 2} consisting of 20 x 20 {micro}m{sup 2} pixels have been designed and manufactured. Performance tests with a laser light illumination and a {beta} ray radioactive source indicate successful operation of the detector. We also briefly discuss the back gate effect as well as the simulation study.

  5. Development of CMOS Pixel Sensors with digital pixel dedicated to future particle physics experiments

    NASA Astrophysics Data System (ADS)

    Zhao, W.; Wang, T.; Pham, H.; Hu-Guo, C.; Dorokhov, A.; Hu, Y.

    2014-02-01

    Two prototypes of CMOS pixel sensor with in-pixel analog to digital conversion have been developed in a 0.18 μm CIS process. The first design integrates a discriminator into each pixel within an area of 22 × 33 μm2 in order to meet the requirements of the ALICE inner tracking system (ALICE-ITS) upgrade. The second design features 3-bit charge encoding inside a 35 × 35 μm2 pixel which is motivated by the specifications of the outer layers of the ILD vertex detector (ILD-VXD). This work aims to validate the concept of in-pixel digitization which offers higher readout speed, lower power consumption and less dead zone compared with the column-level charge encoding.

  6. A CMOS In-Pixel CTIA High Sensitivity Fluorescence Imager

    PubMed Central

    Murari, Kartikeya; Etienne-Cummings, Ralph; Thakor, Nitish; Cauwenberghs, Gert

    2012-01-01

    Traditionally, charge coupled device (CCD) based image sensors have held sway over the field of biomedical imaging. Complementary metal oxide semiconductor (CMOS) based imagers so far lack sensitivity leading to poor low-light imaging. Certain applications including our work on animal-mountable systems for imaging in awake and unrestrained rodents require the high sensitivity and image quality of CCDs and the low power consumption, flexibility and compactness of CMOS imagers. We present a 132×124 high sensitivity imager array with a 20.1 μm pixel pitch fabricated in a standard 0.5 μ CMOS process. The chip incorporates n-well/p-sub photodiodes, capacitive transimpedance amplifier (CTIA) based in-pixel amplification, pixel scanners and delta differencing circuits. The 5-transistor all-nMOS pixel interfaces with peripheral pMOS transistors for column-parallel CTIA. At 70 fps, the array has a minimum detectable signal of 4 nW/cm2 at a wavelength of 450 nm while consuming 718 μA from a 3.3 V supply. Peak signal to noise ratio (SNR) was 44 dB at an incident intensity of 1 μW/cm2. Implementing 4×4 binning allowed the frame rate to be increased to 675 fps. Alternately, sensitivity could be increased to detect about 0.8 nW/cm2 while maintaining 70 fps. The chip was used to image single cell fluorescence at 28 fps with an average SNR of 32 dB. For comparison, a cooled CCD camera imaged the same cell at 20 fps with an average SNR of 33.2 dB under the same illumination while consuming over a watt. PMID:23136624

  7. Design of an ultra low power CMOS pixel sensor for a future neutron personal dosimeter

    SciTech Connect

    Zhang, Y.; Hu-Guo, C.; Husson, D.; Hu, Y.

    2011-07-01

    Despite a continuously increasing demand, neutron electronic personal dosimeters (EPDs) are still far from being completely established because their development is a very difficult task. A low-noise, ultra low power consumption CMOS pixel sensor for a future neutron personal dosimeter has been implemented in a 0.35 {mu}m CMOS technology. The prototype is composed of a pixel array for detection of charged particles, and the readout electronics is integrated on the same substrate for signal processing. The excess electrons generated by an impinging particle are collected by the pixel array. The charge collection time and the efficiency are the crucial points of a CMOS detector. The 3-D device simulations using the commercially available Synopsys-SENTAURUS package address the detailed charge collection process. Within a time of 1.9 {mu}s, about 59% electrons created by the impact particle are collected in a cluster of 4 x 4 pixels with the pixel pitch of 80 {mu}m. A charge sensitive preamplifier (CSA) and a shaper are employed in the frond-end readout. The tests with electrical signals indicate that our prototype with a total active area of 2.56 x 2.56 mm{sup 2} performs an equivalent noise charge (ENC) of less than 400 e - and 314 {mu}W power consumption, leading to a promising prototype. (authors)

  8. CMOS pixel sensors on high resistive substrate for high-rate, high-radiation environments

    NASA Astrophysics Data System (ADS)

    Hirono, Toko; Barbero, Marlon; Breugnon, Patrick; Godiot, Stephanie; Gonella, Laura; Hemperek, Tomasz; Hügging, Fabian; Krüger, Hans; Liu, Jian; Pangaud, Patrick; Peric, Ivan; Pohl, David-Leon; Rozanov, Alexandre; Rymaszewski, Piotr; Wang, Anqing; Wermes, Norbert

    2016-09-01

    A depleted CMOS active pixel sensor (DMAPS) has been developed on a substrate with high resistivity in a high voltage process. High radiation tolerance and high time resolution can be expected because of the charge collection by drift. A prototype of DMAPS was fabricated in a 150 nm process by LFoundry. Two variants of the pixel layout were tested, and the measured depletion depths of the variants are 166 μm and 80 μm. We report the results obtained with the prototype fabricated in this technology.

  9. Active pixel sensors with substantially planarized color filtering elements

    NASA Technical Reports Server (NTRS)

    Fossum, Eric R. (Inventor); Kemeny, Sabrina E. (Inventor)

    1999-01-01

    A semiconductor imaging system preferably having an active pixel sensor array compatible with a CMOS fabrication process. Color-filtering elements such as polymer filters and wavelength-converting phosphors can be integrated with the image sensor.

  10. Improvement to the signaling interface for CMOS pixel sensors

    NASA Astrophysics Data System (ADS)

    Shi, Zhan; Tang, Zhenan; Feng, Chong; Cai, Hong

    2016-10-01

    The development of the readout speed of CMOS pixel sensors (CPS) is motivated by the demanding requirements of future high energy physics (HEP) experiments. As the interface between CPS and the data acquisition (DAQ) system, which inputs clock from the DAQ system and outputs data from CPS, the signaling interface should also be improved in terms of data rates. Meanwhile, the power consumption of the signaling interface should be maintained as low as possible. Consequently, a reduced swing differential signaling (RSDS) driver was adopted instead of a low-voltage differential signaling (LVDS) driver to transmit data from CPS to the DAQ system. In order to increase the capability of data rates, a serial source termination technique was employed. A LVDS/RSDS receiver was employed for transmitting clock from the DAQ system to CPS. A new method of generating hysteresis and a special current comparator were used to achieve a higher speed with lower power consumption. The signaling interface was designed and submitted for fabrication in a 0.18 μm CMOS image sensor (CIS) process. Measurement results indicate that the RSDS driver and the LVDS receiver can operate correctly at a data rate of 2 Gb/s with a power consumption of 19.1 mW.

  11. Low-noise CMOS SPAD arrays with in-pixel time-to-digital converters

    NASA Astrophysics Data System (ADS)

    Tosi, Alberto; Villa, Federica; Bronzi, Danilo; Zou, Yu; Lussana, Rudi; Tamborini, Davide; Tisa, Simone; Durini, Daniel; Weyers, Sascha; Pashen, Uwe; Brockherde, Werner; Zappa, Franco

    2014-05-01

    We present our latest results concerning CMOS Single-Photon Avalanche Diode (SPAD) arrays for high-throughput parallel single-photon counting. We exploited a high-voltage 0.35 μm CMOS technology in order to develop low-noise CMOS SPADs. The Dark Count Rate is 30 cps at room temperature for 30 μm devices, increases to 2 kcps for 100 μm SPADs and just to 100 kcps for 500 μm ones. Afterpulsing is less than 1% for hold-off time longer than 50 ns, thus allowing to reach high count rates. Photon Detection Efficiency is > 50% at 420 nm, > 40% below 500 nm and is still 5% at 850 nm. Timing jitter is less than 100 ps (FWHM) in SPADs with active area diameter up to 50 μm. We developed CMOS SPAD imagers with 150 μm pixel pitch and 30 μm SPADs. A 64×32 SPAD array is based on pixels including three 9-bit counters for smart phase-resolved photon counting up to 100 kfps. A 32x32 SPAD array includes 1024 10-bit Time-to-Digital Converters (TDC) with 300 ps resolution and 450 ps single-shot precision, for 3D ranging and FLIM. We developed also linear arrays with up to 60 pixels (with 100 μm SPAD, 150 μm pitch and in-pixel 250 ps TDC) for time-resolved parallel spectroscopy with high fill factor.

  12. CMOS Hybrid Pixel Detectors for Scientific, Industrial and Medical Applications

    NASA Astrophysics Data System (ADS)

    Broennimann, Christian

    2009-03-01

    Crystallography is the principal technique for determining macromolecular structures at atomic resolution and uses advantageously the high intensity of 3rd generation synchrotron X-ray sources . Macromolecular crystallography experiments benefit from excellent beamline equipment, recent software advances and modern X-ray detectors. However, the latter do not take full advantage of the brightness of modern synchrotron sources. CMOS Hybrid pixel array detectors, originally developed for high energy physics experiments, meet these requirements. X-rays are recorded in single photon counting mode and data thus are stored digitally at the earliest possible stage. This architecture leads to several advantages over current detectors: No detector noise is added to the signal. Readout time is reduced to a few milliseconds. The counting rates are matched to beam intensities at protein crystallography beamlines at 3rd generation synchrotrons. The detector is not sensitive to X-rays during readout; therefore no mechanical shutter is required. The detector has a very sharp point spread function (PSF) of one pixel, which allows better resolution of adjacent reflections. Low energy X-rays can be suppressed by the comparator At the Paul Scherrer Institute (PSI) in Switzerland the first and largest array based on this technology was constructed: The Pilatus 6M detector. The detector covers an area of 43.1 x 44.8 cm2 , has 6 million pixels and is read out noise free in 3.7 ms. Since June 2007 the detector is in routine operation at the beamline 6S of the Swiss Light Source (SLS). The company DETCRIS Ltd, has licensed the technology from PSI and is commercially offering the PILATUS detectors. Examples of the wide application range of the detectors will be shown.

  13. Development of a novel pixel-level signal processing chain for fast readout 3D integrated CMOS pixel sensors

    NASA Astrophysics Data System (ADS)

    Fu, Y.; Torheim, O.; Hu-Guo, C.; Degerli, Y.; Hu, Y.

    2013-03-01

    In order to resolve the inherent readout speed limitation of traditional 2D CMOS pixel sensors, operated in rolling shutter readout, a parallel readout architecture has been developed by taking advantage of 3D integration technologies. Since the rows of the pixel array are zero-suppressed simultaneously instead of sequentially, a frame readout time of a few microseconds is expected for coping with high hit rates foreseen in future collider experiments. In order to demonstrate the pixel readout functionality of such a pixel sensor, a 2D proof-of-concept chip including a novel pixel-level signal processing chain was designed and fabricated in a 0.13 μm CMOS technology. The functionalities of this chip have been verified through experimental characterization.

  14. Compact all-CMOS spatiotemporal compressive sensing video camera with pixel-wise coded exposure.

    PubMed

    Zhang, Jie; Xiong, Tao; Tran, Trac; Chin, Sang; Etienne-Cummings, Ralph

    2016-04-18

    We present a low power all-CMOS implementation of temporal compressive sensing with pixel-wise coded exposure. This image sensor can increase video pixel resolution and frame rate simultaneously while reducing data readout speed. Compared to previous architectures, this system modulates pixel exposure at the individual photo-diode electronically without external optical components. Thus, the system provides reduction in size and power compare to previous optics based implementations. The prototype image sensor (127 × 90 pixels) can reconstruct 100 fps videos from coded images sampled at 5 fps. With 20× reduction in readout speed, our CMOS image sensor only consumes 14μW to provide 100 fps videos.

  15. Characterization of a three side abuttable CMOS pixel sensor with digital pixel and data compression for charged particle tracking

    NASA Astrophysics Data System (ADS)

    Guilloux, F.; Değerli, Y.; Flouzat, C.; Lachkar, M.; Monmarthe, E.; Orsini, F.; Venault, P.

    2016-02-01

    CMOS monolithic pixel sensor technology has been chosen to equip the new ALICE trackers for HL-LHC . PIXAM is the final prototype from an R&D program specific to the Muon Forward Tracker which intends to push significantly forward the performances of the mature rolling shutter architecture. By implementing a digital pixel allowing to readout of a group of rows in parallel, the PIXAM sensor increases the rolling shutter readout speed while keeping the same power consumption as that of analogue pixel sensors. This paper will describe shortly the ASIC architecture and will focus on the analogue and digital performances of the sensor, obtained from laboratory measurements.

  16. Using an Active Pixel Sensor In A Vertex Detector

    SciTech Connect

    Matis, Howard S.; Bieser, Fred; Chen, Yandong; Gareus, Robin; Kleinfelder, Stuart; Oldenburg, Markus; Retiere, Fabrice; Ritter, HansGeorg; Wieman, Howard H.; Wurzel, Samuel E.; Yamamoto, Eugene

    2004-04-22

    Research has shown that Active Pixel CMOS sensors can detect charged particles. We have been studying whether this process can be used in a collider environment. In particular, we studied the effect of radiation with 55 MeV protons. These results show that a fluence of about 2 x 10{sup 12} protons/cm{sup 2} reduces the signal by a factor of two while the noise increases by 25%. A measurement 6 months after exposure shows that the silicon lattice naturally repairs itself. Heating the silicon to 100 C reduced the shot noise and increased the collected charge. CMOS sensors have a reduced signal to noise ratio per pixel because charge diffuses to neighboring pixels. We have constructed a photogate to see if this structure can collect more charge per pixel. Results show that a photogate does collect charge in fewer pixels, but it takes about 15 ms to collect all of the electrons produced by a pulse of light.

  17. Power and area efficient 4-bit column-level ADC in a CMOS pixel sensor for the ILD vertex detector

    NASA Astrophysics Data System (ADS)

    Zhang, L.; Morel, F.; Hu-Guo, Ch; Hu, Y.

    2013-01-01

    A 48 × 64 pixels prototype CMOS pixel sensor (CPS) integrated with 4-bit column-level, self triggered ADCs for the outer layers of the ILD vertex detector (VTX) was developed and fabricated in a 0.35 μm CMOS process with a pixel pitch of 35 μm. The pixel concept combines in-pixel amplification with a correlated double sampling (CDS) operation. The ADCs accommodating the pixel read out in a rolling shutter mode complete the conversion by performing a multi-bit/step approximation. The design was optimised for power saving at sampling frequency. The prototype sensor is currently at the stage of being started testing and evaluation. So what is described is based on post simulation results rather than test data. This 4-bit ADC dissipates, at a 3-V supply and 6.25-MS/s sampling rate, 486 μW in its inactive mode, which is by far the most frequent. This value rises to 714 μW in case of the active mode. Its footprint amounts to 35 × 545 μm2.

  18. 1T Pixel Using Floating-Body MOSFET for CMOS Image Sensors

    PubMed Central

    Lu, Guo-Neng; Tournier, Arnaud; Roy, François; Deschamps, Benoît

    2009-01-01

    We present a single-transistor pixel for CMOS image sensors (CIS). It is a floating-body MOSFET structure, which is used as photo-sensing device and source-follower transistor, and can be controlled to store and evacuate charges. Our investigation into this 1T pixel structure includes modeling to obtain analytical description of conversion gain. Model validation has been done by comparing theoretical predictions and experimental results. On the other hand, the 1T pixel structure has been implemented in different configurations, including rectangular-gate and ring-gate designs, and variations of oxidation parameters for the fabrication process. The pixel characteristics are presented and discussed. PMID:22389592

  19. Large area CMOS bio-pixel array for compact high sensitive multiplex biosensing.

    PubMed

    Sandeau, Laure; Vuillaume, Cassandre; Contié, Sylvain; Grinenval, Eva; Belloni, Federico; Rigneault, Hervé; Owens, Roisin M; Fournet, Margaret Brennan

    2015-02-01

    A novel CMOS bio-pixel array which integrates assay substrate and assay readout is demonstrated for multiplex and multireplicate detection of a triplicate of cytokines with single digit pg ml(-1) sensitivities. Uniquely designed large area bio-pixels enable individual assays to be dedicated to and addressed by single pixels. A capability to simultaneously measure a large number of targets is provided by the 128 available pixels. Chemiluminescent assays are carried out directly on the pixel surface which also detects the emitted chemiluminescent photons, facilitating a highly compact sensor and reader format. The high sensitivity of the bio-pixel array is enabled by the high refractive index of silicon based pixels. This in turn generates a strong supercritical angle luminescence response significantly increasing the efficiency of the photon collection over conventional farfield modalities. PMID:25490928

  20. Compact all-CMOS spatiotemporal compressive sensing video camera with pixel-wise coded exposure.

    PubMed

    Zhang, Jie; Xiong, Tao; Tran, Trac; Chin, Sang; Etienne-Cummings, Ralph

    2016-04-18

    We present a low power all-CMOS implementation of temporal compressive sensing with pixel-wise coded exposure. This image sensor can increase video pixel resolution and frame rate simultaneously while reducing data readout speed. Compared to previous architectures, this system modulates pixel exposure at the individual photo-diode electronically without external optical components. Thus, the system provides reduction in size and power compare to previous optics based implementations. The prototype image sensor (127 × 90 pixels) can reconstruct 100 fps videos from coded images sampled at 5 fps. With 20× reduction in readout speed, our CMOS image sensor only consumes 14μW to provide 100 fps videos. PMID:27137331

  1. A low-power and small-area column-level ADC for high frame-rate CMOS pixel sensor

    NASA Astrophysics Data System (ADS)

    Zhang, L.; Morel, F.; Hu-Guo, C.; Hu, Y.

    2014-07-01

    CMOS pixel sensors (CPS) have demonstrated performances meeting the specifications of the International Linear Collider (ILC) vertex detector (VTX). This paper presents a low-power and small-area 4-bit column-level analog-to-digital converter (ADC) for CMOS pixel sensors. The ADC employs a self-timed trigger and completes the conversion by performing a multi-bit/step approximation. As in the outer layers of the ILC vertex detector hit density is of the order of a few per thousand, in order to reduce power consumption, the ADC is designed to work in two modes: active mode and idle mode. The ADC is fabricated in a 0.35 μm CMOS process with a pixel pitch of 35 μm. It is implemented with 48 columns in a sensor prototype. Each column ADC covers an area of 35 ×545 μm2. The measured temporal noise and Fixed Pattern Noise (FPN) are 0.96 mV and 0.40 mV, respectively. The power consumption, for a 3 V supply and 6.25 MS/s sampling rate, is 486 μW during idle time, which is by far the most frequently employed one. This value rises to 714 μW in the case of the active mode. The measured differential nonlinearity (DNL) and integral nonlinearity (INL) are 0.49/-0.28 LSB and 0.29/-0.20 LSB, respectively.

  2. Demonstration of a low-voltage three-transistor-per-pixel CMOS imager based on a pulse-width-modulation readout scheme employed with a one-transistor in-pixel comparator

    NASA Astrophysics Data System (ADS)

    Shishido, S.; Nagahata, I.; Sasaki, T.; Kagawa, K.; Nunoshita, M.; Ohta, J.

    2007-02-01

    To realize a low-voltage CMOS imager with a small pixel size, we have proposed a new pixel structure composed of only three transistors without any circuit sharing technique. The pixel has a gate-common transistor that compares a photodiode voltage on the gate node with a ramp signal on the source node to perform a single-slope A/D conversion based on a pulse-width-modulation pixel-reading scheme. The large gain of the in-pixel comparator contribute to the small input-referred noise and surpress column-to-column fixed-pattern-noise (FPN). Pixel-to-pixel FPN is suppressed by a feedback reset. Our CMOS imager can lower the operating voltage with less degradation of the dynamic range than that of ordinary active pixel sensors. We have fabricated a 128×96-pixel prototype sensor with an on-chip ramp generator and bootstrap circuits in a 0.35-μm CMOS technology, and successfully demonstrated its operations with a 1.5-V single power-supply voltage.

  3. Geometrical modulation transfer function for different pixel active area shapes

    NASA Astrophysics Data System (ADS)

    Yadid-Pecht, Orly

    2000-04-01

    In this work we consider the effect of the pixel active area geometrical shape on the modulation transfer function (MTF) of an image sensor. When designing a CMOS Active Pixel Sensor, or a CCD or CID sensor for this matter, the active area of the pixel would have a certain geometrical shape which might not cover the whole pixel area. To improve the device performance, it is important to understand the effect this has on the pixel sensitivity and on the resulting MTF. We perform a theoretical analysis of the MTF for the active area shape and derive explicit formulas for the transfer function for pixel arrays with a square, a rectangular and an L shaped active area (most commonly used), and generalize for any connected active area shape. Preliminary experimental results of subpixel scanning sensitivity maps and the corresponding MTFs have also bee obtained, which confirm the theoretical derivations. Both the simulation results and the MTF calculated from the point spread function measurements of the actual pixel arrays show that the active area shape contributes significantly to the behavior of the overall MTF. The results also indicate that for any potential pixel active area shape, the effect of its diversion from the square pixel could be calculated, so that tradeoff between the conflicting requirements, such as SNR and MTF, could be compared per each pixel design for better overall sensor performance.

  4. A novel CMOS digital pixel sensor for 1D barcode scanning

    NASA Astrophysics Data System (ADS)

    Yan, Mei; DeGeronimo, Gianluigi; O'Connor, Paul; Carlson, Bradley S.

    2004-06-01

    A 1-D CMOS digital pixel image sensor system architecture is presented. Each pixel contains a photodiode, a low-power charge-sensitive amplifier, low noise sample/hold circuit, an 8-bit single-slope ADC, a 12-bit shift register and timing & control logic. The pixel is laid out on a 4μm pitch to enable a cost efficient implementation of high-resolution pixel arrays. Fixed pattern noise (FPN) is reduced by a charge-sensitive feedback amplifier, and the reset noise is cancelled by correlated double sampling read out. A prototype chip containing 512 pixels has been fabricated in the TSMC .25um logic process. A 40μV/e- conversion gain is measured with 100 e- rms read noise.

  5. High Speed, Radiation Hard CMOS Pixel Sensors for Transmission Electron Microscopy

    NASA Astrophysics Data System (ADS)

    Contarato, Devis; Denes, Peter; Doering, Dionisio; Joseph, John; Krieger, Brad

    CMOS monolithic active pixel sensors are currently being established as the technology of choice for new generation digital imaging systems in Transmission Electron Microscopy (TEM). A careful sensor design that couples μm-level pixel pitches with high frame rate readout and radiation hardness to very high electron doses enables the fabrication of direct electron detectors that are quickly revolutionizing high-resolution TEM imaging in material science and molecular biology. This paper will review the principal characteristics of this novel technology and its advantages over conventional, optically-coupled cameras, and retrace the sensor development driven by the Transmission Electron Aberration corrected Microscope (TEAM) project at the LBNL National Center for Electron Microscopy (NCEM), illustrating in particular the imaging capabilities enabled by single electron detection at high frame rate. Further, the presentation will report on the translation of the TEAM technology to a finer feature size process, resulting in a sensor with higher spatial resolution and superior radiation tolerance currently serving as the baseline for a commercial camera system.

  6. Detection of thermal neutrons with a CMOS pixel sensor for a future dosemeter

    SciTech Connect

    Vanstalle, M.; Husson, D.; Higueret, S.; Le, T. D.; Nourreddine, A. M.

    2011-07-01

    The RaMsEs group (Radioprotection et Mesures Environnementales) is developing a new compact device for operational neutron dosimetry. The electronic part of the detector is made of an integrated active pixel sensor, originally designed for tracking in particle physics. This device has useful features for neutrons, such as high detection efficiency for charged particles, good radiation resistance, high readout speed, low power consumption and high rejection of photon background. A good response of the device to fast neutrons has already been demonstrated [1]. In order to test the sensibility of the detector to thermal neutrons, experiments have been carried out with a 512 x 512 pixel CMOS sensor on a californium source moderated with heavy water (Cf.D{sub 2}O) on the Van Gogh irradiator at the LMDN, IRSN, Cadarache (France)). A thin boron converter is used to benefit from the significant cross section of the {sup 10}B (n,{alpha}) {sup 7}Li reaction. Results show a high detection efficiency (around 10{sup -3}) of the device to thermal neutrons. Our measurements are in good agreement with GEANT4 Monte Carlo simulations. (authors)

  7. Characterization of CMOS image sensors with Nyquist rate pixel-level ADC

    NASA Astrophysics Data System (ADS)

    Yang, David X. D.; Tian, Hui; Fowler, Boyd A.; Liu, Xinqiao; El Gamal, Abbas

    1999-03-01

    Techniques for characterizing CCD imagers have been developed over many years. These techniques have been recently modified and extended to CMOS PPS and APS imagers. With the scaling of CMOS technology, an increasing number of transistors can be added to each pixel. A promising direction to utilize these transistors is to perform pixel level ADC. The authors have designed and prototyped two imagers with pixel level Nyquist rate ADC. The ADCs operate in parallel and output data one bit at a time. The data is read out of the imager array one bit plane at a time in a manner similar to a digital memory. Existing characterization techniques could not be directly used for these imagers, however, since there is no facility to read out the analog pixel values before ADC, and the ADC resolution is limited to only 8 bits. Fortunately, the ADCs are fully testable electrically without the need for any light or optics. This makes it possible obtain the ADC transfer curve, which greatly simplifies characterization. In this paper we describe how we characterize our pixel level ADC imagers. To estimate QE, we measure the imager photon to DN transfer curve and the ADC transfer curve. We find that both curves are quite linear.Using an estimate of the sense node capacitance we then estimate sensitivity, and QE. To estimate FPN we model it as an outcome of the sum of two uncorrelated random processes, one representing the ADC FPN, and the other representing the photodetector FPN, and develop estimators for the model parameters form imager data under uniform illumination. We report characterization result for a 640 by 512 imager, which was fabricated in a 0.35 micrometers standard digital CMOS process.

  8. Pixel response function experimental techniques and analysis of active pixel sensor star cameras

    NASA Astrophysics Data System (ADS)

    Fumo, Patrick; Waldron, Erik; Laine, Juha-Pekka; Evans, Gary

    2015-04-01

    The pixel response function (PRF) of a pixel within a focal plane is defined as the pixel intensity with respect to the position of a point source within the pixel. One of its main applications is in the field of astrometry, which is a branch of astronomy that deals with positioning data of a celestial body for tracking movement or adjusting the attitude of a spacecraft. Complementary metal oxide semiconductor (CMOS) image sensors generally offer better radiation tolerance to protons and heavy ions than CCDs making them ideal candidates for space applications aboard satellites, but like all image sensors they are limited by their spatial frequency response, better known as the modulation transfer function. Having a well-calibrated PRF allows us to eliminate some of the uncertainty in the spatial response of the system providing better resolution and a more accurate centroid estimation. This paper describes the experimental setup for determining the PRF of a CMOS image sensor and analyzes the effect on the oversampled point spread function (PSF) of an image intensifier, as well as the effects due to the wavelength of light used as a point source. It was found that using electron bombarded active pixel sensor (EBAPS) intensification technology had a significant impact on the PRF of the camera being tested as a result of an increase in the amount of carrier diffusion between collection sites generated by the intensification process. Taking the full width at half maximum (FWHM) of the resulting data, it was found that the intensified version of a CMOS camera exhibited a PSF roughly 16.42% larger than its nonintensified counterpart.

  9. A CMOS pixel sensor prototype for the outer layers of linear collider vertex detector

    NASA Astrophysics Data System (ADS)

    Zhang, L.; Morel, F.; Hu-Guo, C.; Himmi, A.; Dorokhov, A.; Hu, Y.

    2015-01-01

    The International Linear Collider (ILC) expresses a stringent requirement for high precision vertex detectors (VXD). CMOS pixel sensors (CPS) have been considered as an option for the VXD of the International Large Detector (ILD), one of the detector concepts proposed for the ILC. MIMOSA-31 developed at IPHC-Strasbourg is the first CPS integrated with 4-bit column-level ADC for the outer layers of the VXD, adapted to an original concept minimizing the power consumption. It is composed of a matrix of 64 rows and 48 columns. The pixel concept combines in-pixel amplification with a correlated double sampling (CDS) operation in order to reduce the temporal noise and fixed pattern noise (FPN). At the bottom of the pixel array, each column is terminated with a self-triggered analog-to-digital converter (ADC). The ADC design was optimized for power saving at a sampling frequency of 6.25 MS/s. The prototype chip is fabricated in a 0.35 μm CMOS technology. This paper presents the details of the prototype chip and its test results.

  10. Preliminary investigations of active pixel sensors in Nuclear Medicine imaging

    NASA Astrophysics Data System (ADS)

    Ott, Robert; Evans, Noel; Evans, Phil; Osmond, J.; Clark, A.; Turchetta, R.

    2009-06-01

    Three CMOS active pixel sensors have been investigated for their application to Nuclear Medicine imaging. Startracker with 525×525 25 μm square pixels has been coupled via a fibre optic stud to a 2 mm thick segmented CsI(Tl) crystal. Imaging tests were performed using 99mTc sources, which emit 140 keV gamma rays. The system was interfaced to a PC via FPGA-based DAQ and optical link enabling imaging rates of 10 f/s. System noise was measured to be >100e and it was shown that the majority of this noise was fixed pattern in nature. The intrinsic spatial resolution was measured to be ˜80 μm and the system spatial resolution measured with a slit was ˜450 μm. The second sensor, On Pixel Intelligent CMOS (OPIC), had 64×72 40 μm pixels and was used to evaluate noise characteristics and to develop a method of differentiation between fixed pattern and statistical noise. The third sensor, Vanilla, had 520×520 25 μm pixels and a measured system noise of ˜25e. This sensor was coupled directly to the segmented phosphor. Imaging results show that even at this lower level of noise the signal from 140 keV gamma rays is small as the light from the phosphor is spread over a large number of pixels. Suggestions for the 'ideal' sensor are made.

  11. Development of a 750×750 pixels CMOS imager sensor for tracking applications

    NASA Astrophysics Data System (ADS)

    Larnaudie, Franck; Guardiola, Nicolas; Saint-Pé, Olivier; Vignon, Bruno; Tulet, Michel; Davancens, Robert; Magnan, Pierre; Corbière, Franck; Martin-Gonthier, Philippe; Estribeau, Magali

    2004-06-01

    Solid-state optical sensors are now commonly used in space applications (navigation cameras, astronomy imagers, tracking sensors...). Although the charge-coupled devices are still widely used, the CMOS image sensor (CIS), which performances are continuously improving, is a strong challenger for Guidance, Navigation and Control (GNC) systems. This paper describes a 750×750 pixels CMOS image sensor that has been specially designed and developed for star tracker and tracking sensor applications. Such detector, that is featuring smart architecture enabling very simple and powerful operations, is built using the AMIS 0.5μm CMOS technology. It contains 750×750 rectangular pixels with 20μm pitch. The geometry of the pixel sensitive zone is optimized for applications based on centroiding measurements. The main feature of this device is the on-chip control and timing function that makes the device operation easier by drastically reducing the number of clocks to be applied. This powerful function allows the user to operate the sensor with high flexibility: measurement of dark level from masked lines, direct access to the windows of interest... A temperature probe is also integrated within the CMOS chip allowing a very precise measurement through the video stream. A complete electro-optical characterization of the sensor has been performed. The major parameters have been evaluated: dark current and its uniformity, read-out noise, conversion gain, Fixed Pattern Noise, Photo Response Non Uniformity, quantum efficiency, Modulation Transfer Function, intra-pixel scanning. The characterization tests are detailed in the paper. Co60 and protons irradiation tests have been also carried out on the image sensor and the results are presented. The specific features of the 750×750 image sensor such as low power CMOS design (3.3V, power consumption <100mW), natural windowing (that allows efficient and robust tracking algorithms), simple proximity electronics (because of the on

  12. A CMOS image sensor with programmable pixel-level analog processing.

    PubMed

    Massari, Nicola; Gottardi, Massimo; Gonzo, Lorenzo; Stoppa, David; Simoni, Andrea

    2005-11-01

    A prototype of a 34 x 34 pixel image sensor, implementing real-time analog image processing, is presented. Edge detection, motion detection, image amplification, and dynamic-range boosting are executed at pixel level by means of a highly interconnected pixel architecture based on the absolute value of the difference among neighbor pixels. The analog operations are performed over a kernel of 3 x 3 pixels. The square pixel, consisting of 30 transistors, has a pitch of 35 microm with a fill-factor of 20%. The chip was fabricated in a 0.35 microm CMOS technology, and its power consumption is 6 mW with 3.3 V power supply. The device was fully characterized and achieves a dynamic range of 50 dB with a light power density of 150 nW/mm2 and a frame rate of 30 frame/s. The measured fixed pattern noise corresponds to 1.1% of the saturation level. The sensor's dynamic range can be extended up to 96 dB using the double-sampling technique. PMID:16342506

  13. The optimization of zero-spaced microlenses for 2.2um pixel CMOS image sensor

    NASA Astrophysics Data System (ADS)

    Nam, Hyun hee; Park, Jeong Lyeol; Choi, Jea Sung; Lee, Jeong Gun

    2007-03-01

    In CMOS image sensor, microlens arrays are generally used as light propagation carrier onto photo diode to increase collection efficiency and reduce optical cross-talk. Today, the scaling trend of CMOS technology drives reduction of the pixel size for higher integration density and resolution improvement. Microlenses are typically formed by photo resist patterning and thermal reflowing, and the space between photo resist is necessary to avoid merging of microlenses during thermal reflow process. With the shrinking sizes, microlenses become more and more difficult to manufacture without their merging. Hence, the key of light loss free microlens fabrication is still zero-space between microlenses. In this paper, we report the selection of the optimum shape of microlens by the dead space and the curvature of radius. The improvements of critical dimension and thickness uniformities of microlens are also reported.

  14. Fourier transform acousto-optic imaging with a custom-designed CMOS smart-pixels array.

    PubMed

    Barjean, Kinia; Contreras, Kevin; Laudereau, Jean-Baptiste; Tinet, Éric; Ettori, Dominique; Ramaz, François; Tualle, Jean-Michel

    2015-03-01

    We report acousto-optic imaging (AOI) into a scattering medium using a Fourier Transform (FT) analysis to achieve axial resolution. The measurement system was implemented using a CMOS smart-pixels sensor dedicated to the real-time analysis of speckle patterns. This first proof-of-principle of FT-AOI demonstrates some of its potential advantages, with a signal-to-noise ratio comparable to the one obtained without axial resolution, and with an acquisition rate compatible with a use on living biological tissue.

  15. Optimization of CMOS pixel sensors for high performance vertexing and tracking

    NASA Astrophysics Data System (ADS)

    Baudot, Jérôme; Besson, Auguste; Claus, Gilles; Dulinski, Wojciech; Dorokhov, Andrei; Goffe, Mathieu; Hu-Guo, Christine; Molnar, Levente; Sanchez-Castro, Xitzel; Senyukov, Serhiy; Winter, Marc

    2013-12-01

    CMOS Pixel Sensors tend to become relevant for a growing spectrum of charged particle detection instruments. This comes mainly from their high granularity and low material budget. However, several potential applications require a higher read-out speed and radiation tolerance than those achieved with the available devices based on a 0.35 μm feature size technology. This paper shows preliminary test results of new prototype sensors manufactured in a 0.18 μm process based on a high resistivity epitaxial layer of sizeable thickness. Grounded on these observed performances, we discuss a development strategy over the coming years to reach a full scale sensor matching the specifications of the upgraded version of the Inner Tracking System (ITS) of the ALICE experiment at CERN, for which a sensitive area of up to ∼10 m2 may be equipped with pixel sensors.

  16. A high speed, low power consumption LVDS interface for CMOS pixel sensors

    NASA Astrophysics Data System (ADS)

    Shi, Zhan; Tang, Zhenan; Tian, Yong; Pham, Hung; Valin, Isabelle; Jaaskelainen, Kimmo

    2015-01-01

    The use of CMOS Pixel Sensors (CPSs) offers a promising approach to the design of vertex detectors in High Energy Physics (HEP) experiments. As the CPS equipping the upgraded Solenoidal Tracker at RHIC (STAR) pixel detector, ULTIMATE perfectly illustrates the potential of CPSs for HEP applications. However, further development of CPSs with respect to readout speed is required to fulfill the readout time requirement of the next generation HEP detectors, such as the upgrade of A Large Ion Collider Experiment (ALICE) Inner Tracking System (ITS), the International Linear Collider (ILC), and the Compressed Baryonic Matter (CBM) vertex detectors. One actual limitation of CPSs is related to the speed of the Low-Voltage Differential Signaling (LVDS) circuitry implementing the interface between the sensor and the Data Acquisition (DAQ) system. To improve the transmission rate while keeping the power consumption at a low level, a source termination technique and a special current comparator were adopted for the LVDS driver and receiver, respectively. Moreover, hardening techniques are used. The circuitry was designed and submitted for fabrication in a 0.18-μm CMOS Image Sensor (CIS) process at the end of 2011. The test results indicated that the LVDS driver and receiver can operate properly at the data rate of 1.2 Gb/s with power consumption of 19.6 mW.

  17. CMOS image sensor with lateral electric field modulation pixels for fluorescence lifetime imaging with sub-nanosecond time response

    NASA Astrophysics Data System (ADS)

    Li, Zhuo; Seo, Min-Woong; Kagawa, Keiichiro; Yasutomi, Keita; Kawahito, Shoji

    2016-04-01

    This paper presents the design and implementation of a time-resolved CMOS image sensor with a high-speed lateral electric field modulation (LEFM) gating structure for time domain fluorescence lifetime measurement. Time-windowed signal charge can be transferred from a pinned photodiode (PPD) to a pinned storage diode (PSD) by turning on a pair of transfer gates, which are situated beside the channel. Unwanted signal charge can be drained from the PPD to the drain by turning on another pair of gates. The pixel array contains 512 (V) × 310 (H) pixels with 5.6 × 5.6 µm2 pixel size. The imager chip was fabricated using 0.11 µm CMOS image sensor process technology. The prototype sensor has a time response of 150 ps at 374 nm. The fill factor of the pixels is 5.6%. The usefulness of the prototype sensor is demonstrated for fluorescence lifetime imaging through simulation and measurement results.

  18. CLARO-CMOS, a very low power ASIC for fast photon counting with pixellated photodetectors

    NASA Astrophysics Data System (ADS)

    Carniti, P.; De Matteis, M.; Giachero, A.; Gotti, C.; Maino, M.; Pessina, G.

    2012-11-01

    The CLARO-CMOS is an application specific integrated circuit (ASIC) designed for fast photon counting with pixellated photodetectors such as multi-anode photomultiplier tubes (Ma-PMT), micro-channel plates (MCP), and silicon photomultipliers (SiPM). The first prototype has four channels, each with a charge sensitive amplifier with settable gain and a discriminator with settable threshold, providing fast hit information for each channel independently. The design was realized in a long-established, stable and inexpensive 0.35 μm CMOS technology, and provides outstanding performance in terms of speed and power dissipation. The prototype consumes less than 1 mW per channel at low rate, and less than 2 mW at an event rate of 10 MHz per channel. The recovery time after each pulse is less than 25 ns for input signals within a factor of 10 above threshold. Input referred RMS noise is about 7.7 ke- (1.2 fC) with an input capacitance of 3.3 pF. With this value of input capacitance a timing resolution down to 10 ps RMS was measured for pulser signals of a few million electrons, corresponding to the single photon response for these detectors.

  19. Reset noise suppression in two-dimensional CMOS photodiode pixels through column-based feedback-reset

    NASA Technical Reports Server (NTRS)

    Pain, B.; Cunningham, T. J.; Hancock, B.; Yang, G.; Seshadri, S.; Ortiz, M.

    2002-01-01

    We present new CMOS photodiode imager pixel with ultra-low read noise through on-chip suppression of reset noise via column-based feedback circuitry. The noise reduction is achieved without introducing any image lag, and with insignificant reduction in quantum efficiency and full well.

  20. Comparison of CCD, CMOS and Hybrid Pixel x-ray detectors: detection principle and data quality

    NASA Astrophysics Data System (ADS)

    Allé, P.; Wenger, E.; Dahaoui, S.; Schaniel, D.; Lecomte, C.

    2016-06-01

    We compare, from a crystallographic point of view, the data quality obtained using laboratory x-ray diffractometers equipped with a Molybdenum micro-source using different detector types: CCD, CMOS and XPAD hybrid pixel. First we give an overview of the working principle of these different detector types with a focus on their principal differences and their impact on the data quality. Then, using the example of an organic crystal, a comparison between the detector systems concerning the raw data statistics, the refinement agreement factors, the deformation electron density maps, and the residual density after multipolar refinement is presented. It is found that the data quality obtained with the XPAD detector is the best, even though the detection efficiency at the Mo energy (17.5 keV) is only 37% due to the Si-sensor layer thickness of 300 μm. Finally, we discuss the latest x-ray detector developments with an emphasis on the sensor material, where replacing Si by another material such as GaAs would yield detection efficiencies close to 100%, up to energies of 40 keV for hybrid pixel detectors.

  1. Design of the low area monotonic trim DAC in 40 nm CMOS technology for pixel readout chips

    NASA Astrophysics Data System (ADS)

    Drozd, A.; Szczygiel, R.; Maj, P.; Satlawa, T.; Grybos, P.

    2014-12-01

    The recent research in hybrid pixel detectors working in single photon counting mode focuses on nanometer or 3D technologies which allow making pixels smaller and implementing more complex solutions in each of the pixels. Usually single pixel in readout electronics for X-ray detection comprises of charge amplifier, shaper and discriminator that allow classification of events occurring at the detector as true or false hits by comparing amplitude of the signal obtained with threshold voltage, which minimizes the influence of noise effects. However, making the pixel size smaller often causes problems with pixel to pixel uniformity and additional effects like charge sharing become more visible. To improve channel-to-channel uniformity or implement an algorithm for charge sharing effect minimization, small area trimming DACs working in each pixel independently are necessary. However, meeting the requirement of small area often results in poor linearity and even non-monotonicity. In this paper we present a novel low-area thermometer coded 6-bit DAC implemented in 40 nm CMOS technology. Monte Carlo simulations were performed on the described design proving that under all conditions designed DAC is inherently monotonic. Presented DAC was implemented in the prototype readout chip with 432 pixels working in single photon counting mode, with two trimming DACs in each pixel. Each DAC occupies the area of 8 μm × 18.5 μm. Measurements and chips' tests were performed to obtain reliable statistical results.

  2. Front end optimization for the monolithic active pixel sensor of the ALICE Inner Tracking System upgrade

    NASA Astrophysics Data System (ADS)

    Kim, D.; Aglieri Rinella, G.; Cavicchioli, C.; Chanlek, N.; Collu, A.; Degerli, Y.; Dorokhov, A.; Flouzat, C.; Gajanana, D.; Gao, C.; Guilloux, F.; Hillemanns, H.; Hristozkov, S.; Junique, A.; Keil, M.; Kofarago, M.; Kugathasan, T.; Kwon, Y.; Lattuca, A.; Mager, M.; Sielewicz, K. M.; Marin Tobon, C. A.; Marras, D.; Martinengo, P.; Mazza, G.; Mugnier, H.; Musa, L.; Pham, T. H.; Puggioni, C.; Reidt, F.; Riedler, P.; Rousset, J.; Siddhanta, S.; Snoeys, W.; Song, M.; Usai, G.; Van Hoorne, J. W.; Yang, P.

    2016-02-01

    ALICE plans to replace its Inner Tracking System during the second long shut down of the LHC in 2019 with a new 10 m2 tracker constructed entirely with monolithic active pixel sensors. The TowerJazz 180 nm CMOS imaging Sensor process has been selected to produce the sensor as it offers a deep pwell allowing full CMOS in-pixel circuitry and different starting materials. First full-scale prototypes have been fabricated and tested. Radiation tolerance has also been verified. In this paper the development of the charge sensitive front end and in particular its optimization for uniformity of charge threshold and time response will be presented.

  3. A Low-Noise CMOS THz Imager Based on Source Modulation and an In-Pixel High-Q Passive Switched-Capacitor N-Path Filter.

    PubMed

    Boukhayma, Assim; Dupret, Antoine; Rostaing, Jean-Pierre; Enz, Christian

    2016-01-01

    This paper presents the first low noise complementary metal oxide semiconductor (CMOS) deletedCMOS terahertz (THz) imager based on source modulation and in-pixel high-Q filtering. The 31 × 31 focal plane array has been fully integrated in a 0 . 13 μ m standard CMOS process. The sensitivity has been improved significantly by modulating the active THz source that lights the scene and performing on-chip high-Q filtering. Each pixel encompass a broadband bow tie antenna coupled to an N-type metal-oxide-semiconductor (NMOS) detector that shifts the THz radiation, a low noise adjustable gain amplifier and a high-Q filter centered at the modulation frequency. The filter is based on a passive switched-capacitor (SC) N-path filter combined with a continuous-time broad-band Gm-C filter. A simplified analysis that helps in designing and tuning the passive SC N-path filter is provided. The characterization of the readout chain shows that a Q factor of 100 has been achieved for the filter with a good matching between the analytical calculation and the measurement results. An input-referred noise of 0 . 2 μ V RMS has been measured. Characterization of the chip with different THz wavelengths confirms the broadband feature of the antenna and shows that this THz imager reaches a total noise equivalent power of 0 . 6 nW at 270 GHz and 0 . 8 nW at 600 GHz. PMID:26950131

  4. SEMICONDUCTOR DEVICES: Two-dimensional pixel image lag simulation and optimization in a 4-T CMOS image sensor

    NASA Astrophysics Data System (ADS)

    Junting, Yu; Binqiao, Li; Pingping, Yu; Jiangtao, Xu; Cun, Mou

    2010-09-01

    Pixel image lag in a 4-T CMOS image sensor is analyzed and simulated in a two-dimensional model. Strategies of reducing image lag are discussed from transfer gate channel threshold voltage doping adjustment, PPD N-type doping dose/implant tilt adjustment and transfer gate operation voltage adjustment for signal electron transfer. With the computer analysis tool ISE-TCAD, simulation results show that minimum image lag can be obtained at a pinned photodiode n-type doping dose of 7.0 × 1012 cm-2, an implant tilt of -2°, a transfer gate channel doping dose of 3.0 × 1012 cm-2 and an operation voltage of 3.4 V. The conclusions of this theoretical analysis can be a guideline for pixel design to improve the performance of 4-T CMOS image sensors.

  5. MISTRAL & ASTRAL: two CMOS Pixel Sensor architectures suited to the Inner Tracking System of the ALICE experiment

    NASA Astrophysics Data System (ADS)

    Morel, F.; Hu-Guo, C.; Bertolone, G.; Claus, G.; Colledani, C.; Dorokhov, A.; Dozière, G.; Dulinski, W.; Fang, X.; Goffe, M.; Himmi, A.; Jaaskelainen, K.; Senyukov, S.; Specht, M.; Szelezniak, M.; Pham, H.; Valin, I.; Wang, T.; Winter, M.

    2014-01-01

    A detector, equipped with 50 μm thin CMOS Pixel Sensors (CPS), is being designed for the upgrade of the Inner Tracking System (ITS) of the ALICE experiment at LHC. Two CPS flavours, MISTRAL and ASTRAL, are being developed at IPHC aiming to meet the requirements of the ITS upgrade. The first is derived from the MIMOSA28 sensor designed for the STAR-PXL detector. The second integrates a discriminator in each pixel to improve the readout speed and power consumption. This paper will describe in details the sensor development and show some preliminary test results.

  6. The detection of single electrons using a Micromegas gas amplification and a MediPix2 CMOS pixel readout

    NASA Astrophysics Data System (ADS)

    Fornaini, A.; Campbell, M.; Chefdeville, M.; Colas, P.; Colijn, A. P.; van der Graaf, H.; Giomataris, Y.; Heijne, E. H. M.; Kluit, P.; Llopart, X.; Schmitz, J.; Timmermans, J.; Visschers, J. L.

    2005-07-01

    By placing a Micromegas gas gain grid on top of a CMOS pixel readout circuit (MediPix2), we developed a device which acts as a pixel-segmented direct anode in gas-filled detectors. With a He/Isobutane 80/20 mixture (capable of achieving gas gain factors up to 20×103) and employing a drift length of 15 mm, signals from radioactive sources and cosmic radiation were measured. Single primary electrons originating from the passage of cosmic muons through the gas volume were detected with an efficiency higher than 90%.

  7. First measurement of the in-pixel electron multiplying with a standard imaging CMOS technology: Study of the EMCMOS concept

    NASA Astrophysics Data System (ADS)

    Brugière, Timothée; Mayer, Fréderic; Fereyre, Pierre; Guérin, Cyrille; Dominjon, Agnés; Barbier, Rémi

    2015-07-01

    Scientific low light imaging devices benefit today from designs for pushing the mean noise to the single electron level. When readout noise reduction reaches its limit, signal-to-noise ratio improvement can be driven by an electron multiplication process, driven by impact ionization, before adding the readout noises. This concept already implemented in CCD structures using extra-pixel shift registers can today be integrated inside each pixel in CMOS technology. The EBCMOS group at IPNL is in charge of the characterization of new prototypes developed by E2V using this concept: the electron multiplying CMOS (EMCMOS). The CMOS technology enables electron multiplication inside the photodiode itself, and thus, an overlap of the charge integration and multiplication. A new modeling has been developed to describe the output signal mean and variance after the impact ionization process in such a case. In this paper the feasibility of impact ionization process inside a 8 μm-pitch pixel is demonstrated. The new modeling is also validated by data and a value of 0.32% is obtained for the impact ionization parameter α with an electric field intensity of 24 V / μm.

  8. Experimental characterization of a 10 μW 55 μm-pitch FPN-compensated CMOS digital pixel sensor for X-ray imagers

    NASA Astrophysics Data System (ADS)

    Figueras, Roger; Martínez, Ricardo; Terés, Lluís; Serra-Graells, Francisco

    2014-10-01

    This paper presents experimental results obtained from both electrical and radiation tests of a new room-temperature digital pixel sensor (DPS) circuit specifically optimized for digital direct X-ray imaging. The 10 μW 55 μm-pitch CMOS active pixel circuit under test includes self-bias capability, built-in test, selectable e-/h+ collection, 10-bit charge-integration A/D conversion, individual gain tuning for fixed pattern noise (FPN) cancellation, and digital-only I/O interface, which make it suitable for 2D modular chip assemblies in large and seamless sensing areas. Experimental results for this DPS architecture in 0.18 μm 1P6M CMOS technology are reported, returning good performance in terms of linearity, 2 kerms- of ENC, inter-pixel crosstalk below 0.5 LSB, 50 Mbps of I/O speed, and good radiation response for its use in digital X-ray imaging.

  9. Charge collection and non-ionizing radiation tolerance of CMOS pixel sensors using a 0.18 μm CMOS process

    NASA Astrophysics Data System (ADS)

    Zhang, Ying; Zhu, Hongbo; Zhang, Liang; Fu, Min

    2016-09-01

    The proposed Circular Electron Positron Collider (CEPC) will be primarily aimed for precision measurements of the discovered Higgs boson. Its innermost vertex detector, which will play a critical role in heavy-flavor tagging, must be constructed with fine-pitched silicon pixel sensors with low power consumption and fast readout. CMOS pixel sensor (CPS), as one of the most promising candidate technologies, has already demonstrated its excellent performance in several high energy physics experiments. Therefore it has been considered for R&D for the CEPC vertex detector. In this paper, we present the preliminary studies to improve the collected signal charge over the equivalent input capacitance ratio (Q / C), which will be crucial to reduce the analog power consumption. We have performed detailed 3D device simulation and evaluated potential impacts from diode geometry, epitaxial layer properties and non-ionizing radiation damage. We have proposed a new approach to improve the treatment of the boundary conditions in simulation. Along with the TCAD simulation, we have designed the exploratory prototype utilizing the TowerJazz 0.18 μm CMOS imaging sensor process and we will verify the simulation results with future measurements.

  10. A Stimulated Raman Scattering CMOS Pixel Using a High-Speed Charge Modulator and Lock-in Amplifier

    PubMed Central

    Lioe, De Xing; Mars, Kamel; Kawahito, Shoji; Yasutomi, Keita; Kagawa, Keiichiro; Yamada, Takahiro; Hashimoto, Mamoru

    2016-01-01

    A complementary metal-oxide semiconductor (CMOS) lock-in pixel to observe stimulated Raman scattering (SRS) using a high speed lateral electric field modulator (LEFM) for photo-generated charges and in-pixel readout circuits is presented. An effective SRS signal generated after the SRS process is very small and needs to be extracted from an extremely large offset due to a probing laser signal. In order to suppress the offset components while amplifying high-frequency modulated small SRS signal components, the lock-in pixel uses a high-speed LEFM for demodulating the SRS signal, resistor-capacitor low-pass filter (RC-LPF) and switched-capacitor (SC) integrator with a fully CMOS differential amplifier. AC (modulated) components remained in the RC-LPF outputs are eliminated by the phase-adjusted sampling with the SC integrator and the demodulated DC (unmodulated) components due to the SRS signal are integrated over many samples in the SC integrator. In order to suppress further the residual offset and the low frequency noise (1/f noise) components, a double modulation technique is introduced in the SRS signal measurements, where the phase of high-frequency modulated laser beam before irradiation of a specimen is modulated at an intermediate frequency and the demodulation is done at the lock-in pixel output. A prototype chip for characterizing the SRS lock-in pixel is implemented and a successful operation is demonstrated. The reduction effects of residual offset and 1/f noise components are confirmed by the measurements. A ratio of the detected small SRS to offset a signal of less than 10−5 is experimentally demonstrated, and the SRS spectrum of a Benzonitrile sample is successfully observed. PMID:27089339

  11. A Stimulated Raman Scattering CMOS Pixel Using a High-Speed Charge Modulator and Lock-in Amplifier.

    PubMed

    Lioe, De Xing; Mars, Kamel; Kawahito, Shoji; Yasutomi, Keita; Kagawa, Keiichiro; Yamada, Takahiro; Hashimoto, Mamoru

    2016-01-01

    A complementary metal-oxide semiconductor (CMOS) lock-in pixel to observe stimulated Raman scattering (SRS) using a high speed lateral electric field modulator (LEFM) for photo-generated charges and in-pixel readout circuits is presented. An effective SRS signal generated after the SRS process is very small and needs to be extracted from an extremely large offset due to a probing laser signal. In order to suppress the offset components while amplifying high-frequency modulated small SRS signal components, the lock-in pixel uses a high-speed LEFM for demodulating the SRS signal, resistor-capacitor low-pass filter (RC-LPF) and switched-capacitor (SC) integrator with a fully CMOS differential amplifier. AC (modulated) components remained in the RC-LPF outputs are eliminated by the phase-adjusted sampling with the SC integrator and the demodulated DC (unmodulated) components due to the SRS signal are integrated over many samples in the SC integrator. In order to suppress further the residual offset and the low frequency noise (1/f noise) components, a double modulation technique is introduced in the SRS signal measurements, where the phase of high-frequency modulated laser beam before irradiation of a specimen is modulated at an intermediate frequency and the demodulation is done at the lock-in pixel output. A prototype chip for characterizing the SRS lock-in pixel is implemented and a successful operation is demonstrated. The reduction effects of residual offset and 1/f noise components are confirmed by the measurements. A ratio of the detected small SRS to offset a signal of less than 10(-)⁵ is experimentally demonstrated, and the SRS spectrum of a Benzonitrile sample is successfully observed. PMID:27089339

  12. Active Pixel Sensors: Are CCD's Dinosaurs?

    NASA Technical Reports Server (NTRS)

    Fossum, Eric R.

    1993-01-01

    Charge-coupled devices (CCD's) are presently the technology of choice for most imaging applications. In the 23 years since their invention in 1970, they have evolved to a sophisticated level of performance. However, as with all technologies, we can be certain that they will be supplanted someday. In this paper, the Active Pixel Sensor (APS) technology is explored as a possible successor to the CCD. An active pixel is defined as a detector array technology that has at least one active transistor within the pixel unit cell. The APS eliminates the need for nearly perfect charge transfer -- the Achilles' heel of CCDs. This perfect charge transfer makes CCD's radiation 'soft,' difficult to use under low light conditions, difficult to manufacture in large array sizes, difficult to integrate with on-chip electronics, difficult to use at low temperatures, difficult to use at high frame rates, and difficult to manufacture in non-silicon materials that extend wavelength response.

  13. MONOLITHIC ACTIVE PIXEL MATRIX WITH BINARY COUNTERS IN AN SOI PROCESS.

    SciTech Connect

    DUPTUCH,G.; YAREMA, R.

    2007-06-07

    The design of a Prototype monolithic active pixel matrix, designed in a 0.15 {micro}m CMOS SOI Process, is presented. The process allowed connection between the electronics and the silicon volume under the layer of buried oxide (BOX). The small size vias traversing through the BOX and implantation of small p-type islands in the n-type bulk result in a monolithic imager. During the acquisition time, all pixels register individual radiation events incrementing the counters. The counting rate is up to 1 MHz per pixel. The contents of counters are shifted out during the readout phase. The designed prototype is an array of 64 x 64 pixels and the pixel size is 26 x 26 {micro}m{sup 2}.

  14. A Dynamic Range Expansion Technique for CMOS Image Sensors with Dual Charge Storage in a Pixel and Multiple Sampling

    PubMed Central

    Shafie, Suhaidi; Kawahito, Shoji; Itoh, Shinya

    2008-01-01

    A dynamic range expansion technique for CMOS image sensors with dual charge storage in a pixel and multiple sampling technique is presented. Each pixel contains a photodiode and a storage diode which is connected to the photodiode via a separation gate. The sensitivity of the signal charge in the storage diode can be controlled either by a separation gate which limits the charge to flow into the storage diode or by controlling the accumulation time in the storage diode. The operation of the sensitivity control with separation gate techniques is simulated and it is found that a blocking layer to the storage diode plays an important role for high controllability of sensitivity of the storage diode. A prototype chip for testing multiple short time accumulations is fabricated and measured.

  15. A built-in SRAM for radiation hard CMOS pixel sensors dedicated to high energy physics experiments

    NASA Astrophysics Data System (ADS)

    Wei, Xiaomin; Gao, Deyuan; Doziere, Guy; Hu, Yann

    2013-02-01

    CMOS pixel sensors (CPS) are attractive candidates for charged particle tracking in high energy physics experiments. However, CPS chips fabricated with standard CMOS processes, especially the built-in SRAM IP cores, are not radiation hard enough for this application. This paper presents a radiation hard SRAM for improving the CPS radiation tolerance. The SRAM cell is hardened by increasing the static noise margin (SNM) and adding P+ guard rings in layout. The peripheral circuitry is designed by building a radiation-hardened logic library. The SRAM internal timing control is hardened by a self-adaptive timing design. Finally, the SRAM design was implemented and tested in the Austriamicrosystems (AMS) 0.35 μm standard CMOS process. The prototype chips are adapted to work with frequencies up to 80 MHz, power supply voltages from 2.9 V to 3.3 V and temperatures from 0 °C to 60 °C. The single event latchup (SEL) tolerance is improved from 5.2 MeV cm2/mg to above 56 MeV cm2/mg. The total ionizing dose (TID) tolerance is enhanced by the P+ guard rings and the self-adaptive timing design. The single event upset (SEU) effects are also alleviated due to the high SNM SRAM cell and the P+ guard rings. In the near future, the presented SRAM will be integrated in the CPS chips for the STAR experiments.

  16. Automatic laser alignment for multifocal microscopy using a LCOS SLM and a 32×32 pixel CMOS SPAD array

    NASA Astrophysics Data System (ADS)

    Tyndall, David; Walker, Richard; Nguyen, Krzysztof; Galland, Rémi; Gao, Jie; Wang, Irène; Kloster, Meike; Delon, Antoine; Henderson, Robert

    2011-07-01

    Alignment of a laser to a point source detector for confocal microscopy can be a time-consuming task. The problem is further exacerbated when multiple laser excitation spots are used in conjunction with a multiple pixel single photon detector; in addition to X, Y and Z positioning, pixels in a 2D array detector can also be misaligned in roll, pitch and yaw with respect to each other, causing magnification, rotation and focus variation across the array. We present a technique for automated multiple point laser alignment to overcome these issues using closed-loop feedback between a laser illuminated computer controlled Liquid Crystal on Silicon Spatial Light Modulator (LCOS-SLM) acting as the excitation source and a 32×32 pixel CMOS Single Photon Avalanche Diode (SPAD) array as the multiple pixel detection element. The alignment procedure is discussed and simulated to prove its feasibility before being implemented and tested in a practical optical system. We show that it is possible to align each independent laser point in a sub-second time scale, significantly simplifying and speeding up experimental set-up times. The approach provides a solution to the difficulties associated with multiple point confocal laser alignment to multiple point detector arrays, paving the way for further advances in applications such as Fluorescence Correlation Spectroscopy (FCS) and Fluorescence Lifetime Imaging Microscopy (FLIM).

  17. Electrical characterization of CMOS 1T charge-modulation pixel in two design configurations

    NASA Astrophysics Data System (ADS)

    Tournier, Arnaud; Roy, François; Lu, Guo-Neng; Deschamps, Benoît

    2008-02-01

    To evaluate electrical characteristics of the 1T charge-modulation pixel, we propose two design configurations: one is a 2.2μm-pitch, rectangular-gate pixel, and the other is a 1.4μm-pitch, ring-gate pixel. The former allows the transistor size to be minimized, but requires surrounding STI (Shallow Trench Isolation) to reduce electrical crosstalk. The latter is advantageous in terms of pixel size and fill factor, mainly thanks to STI suppression. The two design configurations are respectively integrated in test chips. Our measured results confirm the scaling law: reducing pixel size improves conversion gain, but degrades full well capacity (FWC). They also show that dark current of the 1.4μm-pitch ring-gate pixel is much lower than the 2.2μm-pitch rectangular-gate counterpart. This low dark current achievement may be explained by: i) suppression of STI-induced surface leakage current component, ii) smooth-shape layout to minimize band-to-band tunneling effect, and iii) smaller pixel size with smaller depletion areas which has, accordingly, lower thermally-generated dark current components. The 1.4μm-pitch ring-gate pixel also has lower noise, especially much lower dark FPN. This seems to confirm that dark FPN may have a large contribution from dark current generation. The dynamic range for the 1.4μm-pitch pixel is larger, meaning that signal-to-noise ratio outweighs FWC degradation. However, the sensitivity, like FWC, is also degraded in the same proportion. There are possibilities of improvements especially by process optimization.

  18. Efficiency enhancement in a backside illuminated 1.12 μm pixel CMOS image sensor via parabolic color filters.

    PubMed

    Lee, Jong-Kwon; Kim, Ahreum; Kang, Dong-Wan; Lee, Byung Yang

    2016-07-11

    The shrinkage of pixel size down to sub-2 μm in high-resolution CMOS image sensors (CISs) results in degraded efficiency and increased crosstalk. The backside illumination technology can increase the efficiency, but the crosstalk still remains an critical issue to improve the image quality of the CIS devices. In this paper, by adopting a parabolic color filter (P-CF), we demonstrate efficiency enhancement without any noticeable change in optical crosstalk of a backside illuminated 1.12 μm pixel CIS with deep-trench-isolation structure. To identify the observed results, we have investigated the effect of radius of curvature (r) of the P-CF on the efficiency and optical crosstalk of the CIS by performing an electromagnetic analysis. As the r of P-CF becomes equal to (or half) that of the microlens, the efficiencies of the B-, G-, and R-pixels increase by a factor of 14.1% (20.3%), 9.8% (15.3%), and 15.0% (15.7%) with respect to the flat CF cases without any noticeable crosstalk change. Also, as the incident angle increases up to 30°, the angular dependence of the efficiency and crosstalk significantly decreases by utilizing the P-CF in the CIS. Meanwhile, further reduction of r severely increases the optical crosstalk due to the increased diffraction effect, which has been confirmed with the simulated electric-field intensity distribution inside the devices.

  19. Efficiency enhancement in a backside illuminated 1.12 μm pixel CMOS image sensor via parabolic color filters.

    PubMed

    Lee, Jong-Kwon; Kim, Ahreum; Kang, Dong-Wan; Lee, Byung Yang

    2016-07-11

    The shrinkage of pixel size down to sub-2 μm in high-resolution CMOS image sensors (CISs) results in degraded efficiency and increased crosstalk. The backside illumination technology can increase the efficiency, but the crosstalk still remains an critical issue to improve the image quality of the CIS devices. In this paper, by adopting a parabolic color filter (P-CF), we demonstrate efficiency enhancement without any noticeable change in optical crosstalk of a backside illuminated 1.12 μm pixel CIS with deep-trench-isolation structure. To identify the observed results, we have investigated the effect of radius of curvature (r) of the P-CF on the efficiency and optical crosstalk of the CIS by performing an electromagnetic analysis. As the r of P-CF becomes equal to (or half) that of the microlens, the efficiencies of the B-, G-, and R-pixels increase by a factor of 14.1% (20.3%), 9.8% (15.3%), and 15.0% (15.7%) with respect to the flat CF cases without any noticeable crosstalk change. Also, as the incident angle increases up to 30°, the angular dependence of the efficiency and crosstalk significantly decreases by utilizing the P-CF in the CIS. Meanwhile, further reduction of r severely increases the optical crosstalk due to the increased diffraction effect, which has been confirmed with the simulated electric-field intensity distribution inside the devices. PMID:27410872

  20. Active pixel sensor with intra-pixel charge transfer

    NASA Technical Reports Server (NTRS)

    Fossum, Eric R. (Inventor); Mendis, Sunetra (Inventor); Kemeny, Sabrina E. (Inventor)

    2004-01-01

    An imaging device formed as a monolithic complementary metal oxide semiconductor integrated circuit in an industry standard complementary metal oxide semiconductor process, the integrated circuit including a focal plane array of pixel cells, each one of the cells including a photogate overlying the substrate for accumulating photo-generated charge in an underlying portion of the substrate, a readout circuit including at least an output field effect transistor formed in the substrate, and a charge coupled device section formed on the substrate adjacent the photogate having a sensing node connected to the output transistor and at least one charge coupled device stage for transferring charge from the underlying portion of the substrate to the sensing node.

  1. Active pixel sensor with intra-pixel charge transfer

    NASA Technical Reports Server (NTRS)

    Fossum, Eric R. (Inventor); Mendis, Sunetra (Inventor); Kemeny, Sabrina E. (Inventor)

    2003-01-01

    An imaging device formed as a monolithic complementary metal oxide semiconductor integrated circuit in an industry standard complementary metal oxide semiconductor process, the integrated circuit including a focal plane array of pixel cells, each one of the cells including a photogate overlying the substrate for accumulating photo-generated charge in an underlying portion of the substrate, a readout circuit including at least an output field effect transistor formed in the substrate, and a charge coupled device section formed on the substrate adjacent the photogate having a sensing node connected to the output transistor and at least one charge coupled device stage for transferring charge from the underlying portion of the substrate to the sensing node.

  2. Active pixel sensor with intra-pixel charge transfer

    NASA Technical Reports Server (NTRS)

    Fossum, Eric R. (Inventor); Mendis, Sunetra (Inventor); Kemeny, Sabrina E. (Inventor)

    1995-01-01

    An imaging device formed as a monolithic complementary metal oxide semiconductor integrated circuit in an industry standard complementary metal oxide semiconductor process, the integrated circuit including a focal plane array of pixel cells, each one of the cells including a photogate overlying the substrate for accumulating photo-generated charge in an underlying portion of the substrate, a readout circuit including at least an output field effect transistor formed in the substrate, and a charge coupled device section formed on the substrate adjacent the photogate having a sensing node connected to the output transistor and at least one charge coupled device stage for transferring charge from the underlying portion of the substrate to the sensing node.

  3. CCD and APS/CMOS technology for smart pixels and image sensors

    NASA Astrophysics Data System (ADS)

    Seitz, Peter; Blanc, Nicolas

    2004-02-01

    The relentless progress of semiconductor technology makes it possible to provide image sensors and pixels with additional analog and digital functionality. Growing experience with such photosensor functionality leads to the development of modular building blocks that can be employed for smart pixels, single-chip digital cameras and functional image sensors. Examples given include a non-linear pixel response circuit for high-dynamic range imaging offering a dynamic range of more than 180 dB, low-noise amplifiers and avalanche-effect pixels for high-sensitivity detection performance that approaches single-photoelectron resolution, lock-in pixels for optical time-of-flight range cameras with sub-centimeter distance resolution and in-pixel demodulation circuits for optical coherence tomography imaging. The future is seen in even higher levels of integration, such as system-on-a-chip machine vision cameras ("seeing chips"), post-processing with non-silicon materials for the extension of the detection range to the X-ray, ultraviolet and infrared spectrum, the exploitation of all properties of the incident light and imaging of fields other than electromagnetic radiation

  4. A Low-Noise CMOS THz Imager Based on Source Modulation and an In-Pixel High-Q Passive Switched-Capacitor N-Path Filter

    PubMed Central

    Boukhayma, Assim; Dupret, Antoine; Rostaing, Jean-Pierre; Enz, Christian

    2016-01-01

    This paper presents the first low noise complementary metal oxide semiconductor (CMOS) terahertz (THz) imager based on source modulation and in-pixel high-Q filtering. The 31×31 focal plane array has been fully integrated in a 0.13μm standard CMOS process. The sensitivity has been improved significantly by modulating the active THz source that lights the scene and performing on-chip high-Q filtering. Each pixel encompass a broadband bow tie antenna coupled to an N-type metal-oxide-semiconductor (NMOS) detector that shifts the THz radiation, a low noise adjustable gain amplifier and a high-Q filter centered at the modulation frequency. The filter is based on a passive switched-capacitor (SC) N-path filter combined with a continuous-time broad-band Gm-C filter. A simplified analysis that helps in designing and tuning the passive SC N-path filter is provided. The characterization of the readout chain shows that a Q factor of 100 has been achieved for the filter with a good matching between the analytical calculation and the measurement results. An input-referred noise of 0.2μV RMS has been measured. Characterization of the chip with different THz wavelengths confirms the broadband feature of the antenna and shows that this THz imager reaches a total noise equivalent power of 0.6 nW at 270 GHz and 0.8 nW at 600 GHz. PMID:26950131

  5. ALPIDE, the Monolithic Active Pixel Sensor for the ALICE ITS upgrade

    NASA Astrophysics Data System (ADS)

    Mager, M.

    2016-07-01

    A new 10 m2 inner tracking system based on seven concentric layers of Monolithic Active Pixel Sensors will be installed in the ALICE experiment during the second long shutdown of LHC in 2019-2020. The monolithic pixel sensors will be fabricated in the 180 nm CMOS Imaging Sensor process of TowerJazz. The ALPIDE design takes full advantage of a particular process feature, the deep p-well, which allows for full CMOS circuitry within the pixel matrix, while at the same time retaining the full charge collection efficiency. Together with the small feature size and the availability of six metal layers, this allowed a continuously active low-power front-end to be placed into each pixel and an in-matrix sparsification circuit to be used that sends only the addresses of hit pixels to the periphery. This approach led to a power consumption of less than 40 mWcm-2, a spatial resolution of around 5 μm, a peaking time of around 2 μs, while being radiation hard to some 1013 1 MeVneq /cm2, fulfilling or exceeding the ALICE requirements. Over the last years of R & D, several prototype circuits have been used to verify radiation hardness, and to optimize pixel geometry and in-pixel front-end circuitry. The positive results led to a submission of full-scale (3 cm×1.5 cm) sensor prototypes in 2014. They are being characterized in a comprehensive campaign that also involves several irradiation and beam tests. A summary of the results obtained and prospects towards the final sensor to instrument the ALICE Inner Tracking System are given.

  6. Heavy Ion Transient Characterization of a Photobit Hardened-by-Design Active Pixel Sensor Array

    NASA Technical Reports Server (NTRS)

    Marshall, Paul W.; Byers, Wheaton B.; Conger, Christopher; Eid, El-Sayed; Gee, George; Jones, Michael R.; Marshall, Cheryl J.; Reed, Robert; Pickel, Jim; Kniffin, Scott

    2002-01-01

    This paper presents heavy ion data on the single event transient (SET) response of a Photobit active pixel sensor (APS) four quadrant test chip with different radiation tolerant designs in a standard 0.35 micron CMOS process. The physical design techniques of enclosed geometry and P-channel guard rings are used to design the four N-type active photodiode pixels as described in a previous paper. Argon transient measurements on the 256 x 256 chip array as a function of incident angle show a significant variation in the amount of charge collected as well as the charge spreading dependent on the pixel type. The results are correlated with processing and design information provided by Photobit. In addition, there is a large degree of statistical variability between individual ion strikes. No latch-up is observed up to an LET of 106 MeV/mg/sq cm.

  7. Active pixel sensor array with electronic shuttering

    NASA Technical Reports Server (NTRS)

    Fossum, Eric R. (Inventor)

    2002-01-01

    An active pixel cell includes electronic shuttering capability. The cell can be shuttered to prevent additional charge accumulation. One mode transfers the current charge to a storage node that is blocked against accumulation of optical radiation. The charge is sampled from a floating node. Since the charge is stored, the node can be sampled at the beginning and the end of every cycle. Another aspect allows charge to spill out of the well whenever the charge amount gets higher than some amount, thereby providing anti blooming.

  8. CMOS active pixel sensor type imaging system on a chip

    NASA Technical Reports Server (NTRS)

    Fossum, Eric R. (Inventor); Nixon, Robert (Inventor)

    2011-01-01

    A single chip camera which includes an .[.intergrated.]. .Iadd.integrated .Iaddend.image acquisition portion and control portion and which has double sampling/noise reduction capabilities thereon. Part of the .[.intergrated.]. .Iadd.integrated .Iaddend.structure reduces the noise that is picked up during imaging.

  9. Characterisation of a PERCIVAL monolithic active pixel prototype using synchrotron radiation

    NASA Astrophysics Data System (ADS)

    Correa, J.; Bayer, M.; Göttlicher, P.; Lange, S.; Marras, A.; Niemann, M.; Reza, S.; Shevyakov, I.; Smoljanin, S.; Tennert, M.; Xia, Q.; Viti, M.; Wunderer, C. B.; Zimmer, M.; Dipayan, D.; Guerrini, N.; Marsh, B.; Sedgwick, I.; Turchetta, R.; Cautero, G.; Giuressi, D.; Khromova, A.; Pinaroli, G.; Menk, R.; Stebel, L.; Fan, R.; Marchal, J.; Pedersen, U.; Rees, N.; Steadman, P.; Sussmuth, M.; Tartoni, N.; Yousef, H.; Hyun, H. J.; Kim, K.; Rah, S.; Graafsma, H.

    2016-02-01

    PERCIVAL ("Pixelated Energy Resolving CMOS Imager, Versatile And Large") is a monolithic active pixel sensor (MAPS) based on CMOS technology. Is being developed by DESY, RAL/STFC, Elettra, DLS, and PAL to address the various requirements of detectors at synchrotron radiation sources and Free Electron Lasers (FELs) in the soft X-ray regime. These requirements include high frame rates and FELs base-rate compatibility, large dynamic range, single-photon counting capability with low probability of false positives, high quantum efficiency (QE), and (multi-)megapixel arrangements with good spatial resolution. Small-scale back-side-illuminated (BSI) prototype systems are undergoing detailed testing with X-rays and optical photons, in preparation of submission of a larger sensor. A first BSI processed prototype was tested in 2014 and a preliminary result—first detection of 350eV photons with some pixel types of PERCIVAL—reported at this meeting a year ago. Subsequent more detailed analysis revealed a very low QE and pointed to contamination as a possible cause. In the past year, BSI-processed chips on two more wafers were tested and their response to soft X-ray evaluated. We report here the improved charge collection efficiency (CCE) of different PERCIVAL pixel types for 400eV soft X-rays together with Airy patterns, response to a flat field, and noise performance for such a newly BSI-processed prototype sensor.

  10. A 256 pixel magnetoresistive biosensor microarray in 0.18μm CMOS.

    PubMed

    Hall, Drew A; Gaster, Richard S; Makinwa, Kofi; Wang, Shan X; Murmann, Boris

    2013-05-01

    Magnetic nanotechnologies have shown significant potential in several areas of nanomedicine such as imaging, therapeutics, and early disease detection. Giant magnetoresistive spin-valve (GMR SV) sensors coupled with magnetic nanotags (MNTs) possess great promise as ultra-sensitive biosensors for diagnostics. We report an integrated sensor interface for an array of 256 GMR SV biosensors designed in 0.18 μm CMOS. Arranged like an imager, each of the 16 column level readout channels contains an analog front- end and a compact ΣΔ modulator (0.054 mm(2)) with 84 dB of dynamic range and an input referred noise of 49 nT/√Hz. Performance is demonstrated through detection of an ovarian cancer biomarker, secretory leukocyte peptidase inhibitor (SLPI), spiked at concentrations as low as 10 fM. This system is designed as a replacement for optical protein microarrays while also providing real-time kinetics monitoring.

  11. A 256 pixel magnetoresistive biosensor microarray in 0.18μm CMOS

    PubMed Central

    Hall, Drew A.; Gaster, Richard S.; Makinwa, Kofi; Wang, Shan X.; Murmann, Boris

    2014-01-01

    Magnetic nanotechnologies have shown significant potential in several areas of nanomedicine such as imaging, therapeutics, and early disease detection. Giant magnetoresistive spin-valve (GMR SV) sensors coupled with magnetic nanotags (MNTs) possess great promise as ultra-sensitive biosensors for diagnostics. We report an integrated sensor interface for an array of 256 GMR SV biosensors designed in 0.18 μm CMOS. Arranged like an imager, each of the 16 column level readout channels contains an analog front- end and a compact ΣΔ modulator (0.054 mm2) with 84 dB of dynamic range and an input referred noise of 49 nT/√Hz. Performance is demonstrated through detection of an ovarian cancer biomarker, secretory leukocyte peptidase inhibitor (SLPI), spiked at concentrations as low as 10 fM. This system is designed as a replacement for optical protein microarrays while also providing real-time kinetics monitoring. PMID:24761029

  12. Recent progress in the development of a B-factory monolithic active pixel detector

    NASA Astrophysics Data System (ADS)

    Stanič, S.; Aihara, H.; Barbero, M.; Bozek, A.; Browder, T.; Hazumi, M.; Kennedy, J.; Kent, N.; Olsen, S.; Palka, H.; Rosen, M.; Ruckman, L.; Trabelsi, K.; Tsuboyama, T.; Uchida, K.; Varner, G.; Yang, Q.

    2006-11-01

    Due to the need for precise vertexing at future higher luminosity B-factories with the expectedly increasing track densities and radiation exposures, upgrade of present silicon strip detectors with thin, radiation resistant pixel detectors is highly desired. Considerable progress in the technological development of thin CMOS based Monolithic Active Pixel Sensors (MAPS) in the last years makes them a realistic upgrade option and the feasibility studies of their application in Belle are actively pursued. The most serious concerns are their radiation hardness and their read-out speed. To address them, several prototypes denoted as Continuous Acquisition Pixel (CAP) sensors have been developed and tested. The latest of the CAP sensor prototypes is CAP3, designed in the TSMC 0.25 μm process with a 5-deep sample pair pipeline in each pixel. A setup with several CAP3 sensors will be used to assess the performance of a full scale pixel read-out system running at realistic read-out speed. The results and plans for the next stages of R&D towards a full Pixel Vertex Detector (PVD) are presented.

  13. 4K×4K format 10μm pixel pitch H4RG-10 hybrid CMOS silicon visible focal plane array for space astronomy

    NASA Astrophysics Data System (ADS)

    Bai, Yibin; Tennant, William; Anglin, Selmer; Wong, Andre; Farris, Mark; Xu, Min; Holland, Eric; Cooper, Donald; Hosack, Joseph; Ho, Kenneth; Sprafke, Thomas; Kopp, Robert; Starr, Brian; Blank, Richard; Beletic, James W.; Luppino, Gerard A.

    2012-07-01

    Teledyne’s silicon hybrid CMOS focal plane array technology has matured into a viable, high performance and high- TRL alternative to scientific CCD sensors for space-based applications in the UV-visible-NIR wavelengths. This paper presents the latest results from Teledyne’s low noise silicon hybrid CMOS visible focal place array produced in 4K×4K format with 10 μm pixel pitch. The H4RG-10 readout circuit retains all of the CMOS functionality (windowing, guide mode, reference pixels) and heritage of its highly successful predecessor (H2RG) developed for JWST, with additional features for improved performance. Combined with a silicon PIN detector layer, this technology is termed HyViSI™ (Hybrid Visible Silicon Imager). H4RG-10 HyViSI™ arrays achieve high pixel interconnectivity (<99.99%), low readout noise (<10 e- rms single CDS), low dark current (<0.5 e-/pixel/s at 193K), high quantum efficiency (<90% broadband), and large dynamic range (<13 bits). Pixel crosstalk and interpixel capacitance (IPC) have been predicted using detailed models of the hybrid structure and these predictions have been confirmed by measurements with Fe-55 Xray events and the single pixel reset technique. For a 100-micron thick detector, IPC of less than 3% and total pixel crosstalk of less than 7% have been achieved for the HyViSI™ H4RG-10. The H4RG-10 array is mounted on a lightweight silicon carbide (SiC) package and has been qualified to Technology Readiness Level 6 (TRL-6). As part of space qualification, the HyViSI™ H4RG-10 array passed radiation testing for low earth orbit (LEO) environment.

  14. 65 nm CMOS analog front-end for pixel detectors at the HL-LHC

    NASA Astrophysics Data System (ADS)

    Gaioni, L.; De Canio, F.; Manghisoni, M.; Ratti, L.; Re, V.; Traversi, G.

    2016-02-01

    This work is concerned with the design and the experimental characterization of analog front-end electronics conceived for experiments with unprecedented particle rates and radiation levels at future high-energy physics colliders. A prototype chip integrating different test structures has been submitted in the framework of the CHIPIX65 project. These structures are standalone channels for the readout of hybrid pixels, featuring a charge sensitive preamplifier as the first stage of the readout chain, a high-speed comparator and a circuit for fine threshold tuning. The paper thoroughly discusses the results, mainly focused on the charge sensitive amplifier, coming from the characterization of the submitted test structures.

  15. Active pixel image sensor with a winner-take-all mode of operation

    NASA Technical Reports Server (NTRS)

    Yadid-Pecht, Orly (Inventor); Fossum, Eric R. (Inventor); Mead, Carver (Inventor)

    2003-01-01

    An integrated CMOS semiconductor imaging device having two modes of operation that can be performed simultaneously to produce an output image and provide information of a brightest or darkest pixel in the image.

  16. A Pixel Readout Chip in 40 nm CMOS Process for High Count Rate Imaging Systems with Minimization of Charge Sharing Effects

    SciTech Connect

    Maj, Piotr; Grybos, P.; Szczgiel, R.; Kmon, P.; Drozd, A.; Deptuch, G.

    2013-11-07

    We present a prototype chip in 40 nm CMOS technology for readout of hybrid pixel detector. The prototype chip has a matrix of 18x24 pixels with a pixel pitch of 100 m. It can operate both in single photon counting (SPC) mode and in C8P1 mode. In SPC the measured ENC is 84 e rms (for the peaking time of 48 ns), while the effective offset spread is below 2 mV rms. In the C8P1 mode the chip reconstructs full charge deposited in the detector, even in the case of charge sharing, and it identifies a pixel with the largest charge deposition. The chip architecture and preliminary measurements are reported.

  17. Development of a radiation-hardened SRAM with EDAC algorithm for fast readout CMOS pixel sensors for charged particle tracking

    NASA Astrophysics Data System (ADS)

    Wei, X.; Li, B.; Chen, N.; Wang, J.; Zheng, R.; Gao, W.; Wei, T.; Gao, D.; Hu, Y.

    2014-08-01

    CMOS pixel sensors (CPS) are attractive for use in the innermost particle detectors for charged particle tracking due to their good trade-off between spatial resolution, material budget, radiation hardness, and readout speed. With the requirements of high readout speed and high radiation hardness to total ionizing dose (TID) for particle tracking, fast readout CPS are composed by integrating a data compression block and two SRAM IP cores. However, the radiation hardness of the SRAM IP cores is not as high as that of the other parts in CPS, and thus the radiation hardness of the whole CPS chip is lowered. Especially, when CPS are migrated into 0.18-μm processes, the single event upset (SEU) effects should be also considered besides TID and single event latchup (SEL) effects. This paper presents a radiation-hardened SRAM with enhanced radiation hardness to SEU. An error detection and correction (EDAC) algorithm and a bit-interleaving storage strategy are adopted in the design. The prototype design has been fabricated in a 0.18-μm process. The area of the new SRAM is increased 1.6 times as compared with a non-radiation-hardened SRAM due to the integration of EDAC algorithm and the adoption of radiation hardened layout. The access time is increased from 5 ns to 8 ns due to the integration of EDAC algorithm. The test results indicate that the design satisfy requirements of CPS for charged particle tracking.

  18. A 10 MS/s 8-bit charge-redistribution ADC for hybrid pixel applications in 65 m CMOS

    NASA Astrophysics Data System (ADS)

    Kishishita, Tetsuichi; Hemperek, Tomasz; Krüger, Hans; Koch, Manuel; Germic, Leonard; Wermes, Norbert

    2013-12-01

    The design and measurement results of an 8-bit SAR ADC, based on a charge-redistribution DAC, are presented. This ADC is characterized by superior power efficiency and small area, realized by employing a lateral metal-metal capacitor array and a dynamic two-stage comparator. To avoid the need for a high-speed clock and its associated power consumption, an asynchronous logic was implemented in a logic control cell. A test chip has been developed in a 65 nm CMOS technology, including eight ADC channels with different layout flavors of the capacitor array, a transimpedance amplifier as a signal input structure, a serializer, and a custom-made LVDS driver for data transmission. The integral (INL) and differential (DNL) nonlinearities are measured below 0.5 LSB and 0.8 LSB, respectively, for the best channel operating at a sampling frequency of 10 MS/s. The area occupies 40 μm×70 μm for one ADC channel. The power consumption is estimated as 4 μW at 1 MS/s and 38 μW at 10 MS/s with a supply rail of 1.2 V. These excellent performance features and the natural radiation hardness of the design, due to the thin gate oxide thickness of transistors, are very interesting for front-end electronics ICs of future hybrid-pixel detector systems.

  19. Pixel pitch and particle energy influence on the dark current distribution of neutron irradiated CMOS image sensors.

    PubMed

    Belloir, Jean-Marc; Goiffon, Vincent; Virmontois, Cédric; Raine, Mélanie; Paillet, Philippe; Duhamel, Olivier; Gaillardin, Marc; Molina, Romain; Magnan, Pierre; Gilard, Olivier

    2016-02-22

    The dark current produced by neutron irradiation in CMOS Image Sensors (CIS) is investigated. Several CIS with different photodiode types and pixel pitches are irradiated with various neutron energies and fluences to study the influence of each of these optical detector and irradiation parameters on the dark current distribution. An empirical model is tested on the experimental data and validated on all the irradiated optical imagers. This model is able to describe all the presented dark current distributions with no parameter variation for neutron energies of 14 MeV or higher, regardless of the optical detector and irradiation characteristics. For energies below 1 MeV, it is shown that a single parameter has to be adjusted because of the lower mean damage energy per nuclear interaction. This model and these conclusions can be transposed to any silicon based solid-state optical imagers such as CIS or Charged Coupled Devices (CCD). This work can also be used when designing an optical imager instrument, to anticipate the dark current increase or to choose a mitigation technique.

  20. Prototype of a gigabit data transmitter in 65 nm CMOS for DEPFET pixel detectors at Belle-II

    NASA Astrophysics Data System (ADS)

    Kishishita, T.; Krüger, H.; Hemperek, T.; Lemarenko, M.; Koch, M.; Gronewald, M.; Wermes, N.

    2013-08-01

    This paper describes the recent development of a gigabit data transmitter for the Belle-II pixel detector (PXD). The PXD is an innermost detector currently under development for the upgraded KEK-B factory in Japan. The PXD consists of two layers of DEPFET sensor modules located at 1.8 and 2.2 cm radii. Each module is equipped with three different ASIC types mounted on the detector substrate with a flip-chip technique: (a) SWITCHER for generating steering signals for the DEPFET sensors, (b) DCD for digitizing the signal currents, and (c) DHP for performing data processing and sending the data off the module to the back-end data handling hybrid via ∼ 40 cm Kapton flex and 12-15 m twisted pair (TWP) cables. To meet the requirements of the PXD data transmission, a prototype of the DHP data transmitter has been developed in a 65-nm standard CMOS technology. The transmitter test chip consists of current-mode logic (CML) drivers and a phase-locked loop (PLL) which generates a clock signal for a 1.6 Gbit/s output data stream from an 80 cm reference clock. A programmable pre-emphasis circuit is also implemented in the CML driver to compensate signal losses in the long cable by shaping the transmitted pulse response. The jitter performance was measured as 25 ps (1 σ distribution) by connecting the chip with 38 cm flex and 10 m TWP cables.

  1. CMOS foveal image sensor chip

    NASA Technical Reports Server (NTRS)

    Bandera, Cesar (Inventor); Scott, Peter (Inventor); Sridhar, Ramalingam (Inventor); Xia, Shu (Inventor)

    2002-01-01

    A foveal image sensor integrated circuit comprising a plurality of CMOS active pixel sensors arranged both within and about a central fovea region of the chip. The pixels in the central fovea region have a smaller size than the pixels arranged in peripheral rings about the central region. A new photocharge normalization scheme and associated circuitry normalizes the output signals from the different size pixels in the array. The pixels are assembled into a multi-resolution rectilinear foveal image sensor chip using a novel access scheme to reduce the number of analog RAM cells needed. Localized spatial resolution declines monotonically with offset from the imager's optical axis, analogous to biological foveal vision.

  2. Monolithic active pixel sensor development for the upgrade of the ALICE inner tracking system

    NASA Astrophysics Data System (ADS)

    Aglieri, G.; Cavicchioli, C.; Chalmet, P. L.; Chanlek, N.; Collu, A.; Giubilato, P.; Hillemanns, H.; Junique, A.; Keil, M.; Kim, D.; Kim, J.; Kugathasan, T.; Lattuca, A.; Mager, M.; Marin Tobon, C. A.; Marras, D.; Martinengo, P.; Mattiazzo, S.; Mazza, G.; Mugnier, H.; Musa, L.; Pantano, D.; Puggioni, C.; Rousset, J.; Reidt, F.; Riedler, P.; Siddhanta, S.; Snoeys, W.; Usai, G.; van Hoorne, J. W.; Yang, P.; Yi, J.

    2013-12-01

    ALICE plans an upgrade of its Inner Tracking System for 2018. The development of a monolithic active pixel sensor for this upgrade is described. The TowerJazz 180 nm CMOS imaging sensor process has been chosen as it is possible to use full CMOS in the pixel due to the offering of a deep pwell and also to use different starting materials. The ALPIDE development is an alternative to approaches based on a rolling shutter architecture, and aims to reduce power consumption and integration time by an order of magnitude below the ALICE specifications, which would be quite beneficial in terms of material budget and background. The approach is based on an in-pixel binary front-end combined with a hit-driven architecture. Several prototypes have already been designed, submitted for fabrication and some of them tested with X-ray sources and particles in a beam. Analog power consumption has been limited by optimizing the Q/C of the sensor using Explorer chips. Promising but preliminary first results have also been obtained with a prototype ALPIDE. Radiation tolerance up to the ALICE requirements has also been verified.

  3. Active Pixel Sensors for electron microscopy

    NASA Astrophysics Data System (ADS)

    Denes, P.; Bussat, J.-M.; Lee, Z.; Radmillovic, V.

    2007-09-01

    The technology used for monolithic CMOS imagers, popular for cell phone cameras and other photographic applications, has been explored for charged particle tracking by the high-energy physics community for several years. This technology also lends itself to certain imaging detector applications in electron microscopy. We have been developing such detectors for several years at Lawrence Berkeley National Laboratory, and we and others have shown that this technology can offer excellent point-spread function, direct detection and high readout speed. In this paper, we describe some of the design constraints peculiar to electron microscopy and summarize where such detectors could play a useful role.

  4. Active-Pixel Cosmic-Ray Sensor

    NASA Technical Reports Server (NTRS)

    Fossum, Eric R.; Cunningham, Thomas J.; Holtzman, Melinda J.

    1994-01-01

    Cosmic-ray sensor comprises planar rectangular array of lateral bipolar npn floating-base transistors each of which defines pixel. Collector contacts of all transistors in each row connected to same X (column) line conductor; emitter contacts of all transistors in each column connected to same Y (row) line conductor; and current in each row and column line sensed by amplifier, output of which fed to signal-processing circuits.

  5. Large area CMOS image sensors

    NASA Astrophysics Data System (ADS)

    Turchetta, R.; Guerrini, N.; Sedgwick, I.

    2011-01-01

    CMOS image sensors, also known as CMOS Active Pixel Sensors (APS) or Monolithic Active Pixel Sensors (MAPS), are today the dominant imaging devices. They are omnipresent in our daily life, as image sensors in cellular phones, web cams, digital cameras, ... In these applications, the pixels can be very small, in the micron range, and the sensors themselves tend to be limited in size. However, many scientific applications, like particle or X-ray detection, require large format, often with large pixels, as well as other specific performance, like low noise, radiation hardness or very fast readout. The sensors are also required to be sensitive to a broad spectrum of radiation: photons from the silicon cut-off in the IR down to UV and X- and gamma-rays through the visible spectrum as well as charged particles. This requirement calls for modifications to the substrate to be introduced to provide optimized sensitivity. This paper will review existing CMOS image sensors, whose size can be as large as a single CMOS wafer, and analyse the technical requirements and specific challenges of large format CMOS image sensors.

  6. Active pixel sensor array with multiresolution readout

    NASA Technical Reports Server (NTRS)

    Fossum, Eric R. (Inventor); Kemeny, Sabrina E. (Inventor); Pain, Bedabrata (Inventor)

    1999-01-01

    An imaging device formed as a monolithic complementary metal oxide semiconductor integrated circuit in an industry standard complementary metal oxide semiconductor process, the integrated circuit including a focal plane array of pixel cells, each one of the cells including a photogate overlying the substrate for accumulating photo-generated charge in an underlying portion of the substrate and a charge coupled device section formed on the substrate adjacent the photogate having a sensing node and at least one charge coupled device stage for transferring charge from the underlying portion of the substrate to the sensing node. There is also a readout circuit, part of which can be disposed at the bottom of each column of cells and be common to all the cells in the column. The imaging device can also include an electronic shutter formed on the substrate adjacent the photogate, and/or a storage section to allow for simultaneous integration. In addition, the imaging device can include a multiresolution imaging circuit to provide images of varying resolution. The multiresolution circuit could also be employed in an array where the photosensitive portion of each pixel cell is a photodiode. This latter embodiment could further be modified to facilitate low light imaging.

  7. CMOS Imaging Device for Optical Imaging of Biological Activities

    NASA Astrophysics Data System (ADS)

    Shishido, Sanshiro; Oguro, Yasuhiro; Noda, Toshihiko; Sasagawa, Kiyotaka; Tokuda, Takashi; Ohta, Jun

    In this paper, we propose a CMOS image sensor device placed on the brain surface or cerebral sulcus (Fig. 1). The device has a photo detector array where a single optical detector is usually used. The proposed imaging device enables the analysis which reflects a surface blood pattern in the observed area. It is also possible to improve effective sensitivity by image processing and to simplify the measurement system by the CMOS sensor device with on-chip light source. We describe the design details and characterization of proposed device. We also demonstrate detection of hemoglobin oxygenation level with external light source, imaging capability of biological activities, and image processing for sensitivity improvement is also realized.

  8. Direct electron imaging in electron microscopy with monolithic active pixel sensors.

    PubMed

    Deptuch, G; Besson, A; Rehak, P; Szelezniak, M; Wall, J; Winter, M; Zhu, Y

    2007-08-01

    A new imaging device for dynamic electron microscopy is in great demand. The detector should provide the experimenter with images having sufficient spatial resolution at high speed. Immunity to radiation damage, accumulated during exposures, is critical. Photographic film, a traditional medium, is not adequate for studies that require large volumes of data or rapid recording and charge coupled device (CCD) cameras have limited resolution, due to phosphor screen coupling. CCD chips are not suitable for direct recording due to their extreme sensitivity to radiation damage. This paper discusses characterization of monolithic active pixel sensors (MAPS) in a scanning electron microscope (SEM) as well as in a transmission electron microscope (TEM). The tested devices were two versions of the MIMOSA V (MV) chip. This 1M pixel device features pixel size of 17 x 17 microm(2) and was designed in a 0.6 microm CMOS process. The active layer for detection is a thin (less than 20 microm) epitaxial layer, limiting the broadening of the electron beam. The first version of the detector was a standard imager with electronics, passivation and interconnection layers on top of the active region; the second one was bottom-thinned, reaching the epitaxial layer from the bottom. The electron energies used range from a few keV to 30 keV for SEM and from 40 to 400 keV for TEM. Deterioration of the image resolution due to backscattering was quantified for different energies and both detector versions. PMID:17346890

  9. Time-resolved Förster-resonance-energy-transfer DNA assay on an active CMOS microarray

    PubMed Central

    Schwartz, David Eric; Gong, Ping; Shepard, Kenneth L.

    2008-01-01

    We present an active oligonucleotide microarray platform for time-resolved Förster resonance energy transfer (TR-FRET) assays. In these assays, immobilized probe is labeled with a donor fluorophore and analyte target is labeled with a fluorescence quencher. Changes in the fluorescence decay lifetime of the donor are measured to determine the extent of hybridization. In this work, we demonstrate that TR-FRET assays have reduced sensitivity to variances in probe surface density compared with standard fluorescence-based microarray assays. Use of an active array substrate, fabricated in a standard complementary metal-oxide-semiconductor (CMOS) process, provides the additional benefits of reduced system complexity and cost. The array consists of 4096 independent single-photon avalanche diode (SPAD) pixel sites and features on-chip time-to-digital conversion. We demonstrate the functionality of our system by measuring a DNA target concentration series using TR-FRET with semiconductor quantum dot donors. PMID:18515059

  10. Charged particle detection performances of CMOS pixel sensors produced in a 0.18 μm process with a high resistivity epitaxial layer

    NASA Astrophysics Data System (ADS)

    Senyukov, S.; Baudot, J.; Besson, A.; Claus, G.; Cousin, L.; Dorokhov, A.; Dulinski, W.; Goffe, M.; Hu-Guo, C.; Winter, M.

    2013-12-01

    The apparatus of the ALICE experiment at CERN will be upgraded in 2017/18 during the second long shutdown of the LHC (LS2). A major motivation for this upgrade is to extend the physics reach for charmed and beauty particles down to low transverse momenta. This requires a substantial improvement of the spatial resolution and the data rate capability of the ALICE Inner Tracking System (ITS). To achieve this goal, the new ITS will be equipped with 50 μm thin CMOS Pixel Sensors (CPS) covering either the three innermost layers or all the 7 layers of the detector. The CPS being developed for the ITS upgrade at IPHC (Strasbourg) is derived from the MIMOSA 28 sensor realised for the STAR-PXL at RHIC in a 0.35 μm CMOS process. In order to satisfy the ITS upgrade requirements in terms of readout speed and radiation tolerance, a CMOS process with a reduced feature size and a high resistivity epitaxial layer should be exploited. In this respect, the charged particle detection performance and radiation hardness of the TowerJazz 0.18 μm CMOS process were studied with the help of the first prototype chip MIMOSA 32. The beam tests performed with negative pions of 120 GeV/c at the CERN-SPS allowed to measure a signal-to-noise ratio (SNR) for the non-irradiated chip in the range between 22 and 32 depending on the pixel design. The chip irradiated with the combined dose of 1 MRad and 1013neq /cm2 was observed to yield an SNR ranging between 11 and 23 for coolant temperatures varying from 15 °C to 30 °C. These SNR values were measured to result in particle detection efficiencies above 99.5% and 98% before and after irradiation, respectively. These satisfactory results allow to validate the TowerJazz 0.18 μm CMOS process for the ALICE ITS upgrade.

  11. Towards monolithically integrated CMOS cameras for active imaging with 600 GHz radiation

    NASA Astrophysics Data System (ADS)

    Boppel, Sebastian; Lisauskas, Alvydas; Krozer, Viktor; Roskos, Hartmut G.

    2012-02-01

    We explore terahertz imaging with CMOS field-effect transistors exploiting their plasmonic detection capability and the advantages of CMOS technology for the fabrication of THz cameras with respect to process stability, array uniformity, ease of integration of additional functionality, scalability and cost-effectiveness. A 100×100-pixel camera with an active area of 20×20 mm² is physically simulated by scanning single detectors and groups of a few detectors in the image plane. Using detectors with a noise-equivalent power of 43 pW/√Hz, a distributed illumination of 432 μW at 591.4 GHz, and an integration time of 20 ms (for a possible frame rate of 17 fps), this virtual camera allows to obtain images with a dynamic range of at least 20 dB and a resolution approaching the diffraction limit. Imaging examples acquired in direct and heterodyne detection mode, and in transmission and reflection geometry, show the potential for real-time operation. It is demonstrated that heterodyning (i) improves the dynamic range substantially even if the radiation from the local oscillator is distributed over the camera area, and (ii) allows sensitive determination of object-induced phase changes, which promises the realization of coherent imaging systems.

  12. Low-power priority Address-Encoder and Reset-Decoder data-driven readout for Monolithic Active Pixel Sensors for tracker system

    NASA Astrophysics Data System (ADS)

    Yang, P.; Aglieri, G.; Cavicchioli, C.; Chalmet, P. L.; Chanlek, N.; Collu, A.; Gao, C.; Hillemanns, H.; Junique, A.; Kofarago, M.; Keil, M.; Kugathasan, T.; Kim, D.; Kim, J.; Lattuca, A.; Marin Tobon, C. A.; Marras, D.; Mager, M.; Martinengo, P.; Mazza, G.; Mugnier, H.; Musa, L.; Puggioni, C.; Rousset, J.; Reidt, F.; Riedler, P.; Snoeys, W.; Siddhanta, S.; Usai, G.; van Hoorne, J. W.; Yi, J.

    2015-06-01

    Active Pixel Sensors used in High Energy Particle Physics require low power consumption to reduce the detector material budget, low integration time to reduce the possibilities of pile-up and fast readout to improve the detector data capability. To satisfy these requirements, a novel Address-Encoder and Reset-Decoder (AERD) asynchronous circuit for a fast readout of a pixel matrix has been developed. The AERD data-driven readout architecture operates the address encoding and reset decoding based on an arbitration tree, and allows us to readout only the hit pixels. Compared to the traditional readout structure of the rolling shutter scheme in Monolithic Active Pixel Sensors (MAPS), AERD can achieve a low readout time and a low power consumption especially for low hit occupancies. The readout is controlled at the chip periphery with a signal synchronous with the clock, allows a good digital and analogue signal separation in the matrix and a reduction of the power consumption. The AERD circuit has been implemented in the TowerJazz 180 nm CMOS Imaging Sensor (CIS) process with full complementary CMOS logic in the pixel. It works at 10 MHz with a matrix height of 15 mm. The energy consumed to read out one pixel is around 72 pJ. A scheme to boost the readout speed to 40 MHz is also discussed. The sensor chip equipped with AERD has been produced and characterised. Test results including electrical beam measurement are presented.

  13. Towards a 10 μs, thin and high resolution pixelated CMOS sensor system for future vertex detectors

    NASA Astrophysics Data System (ADS)

    De Masi, R.; Amar-Youcef, S.; Baudot, J.; Bertolone, G.; Brogna, A.; Chon-Sen, N.; Claus, G.; Colledani, C.; Degerli, Y.; Deveaux, M.; Dorokhov, A.; Doziére, G.; Dulinski, W.; Gelin, M.; Goffe, M.; Fontaine, J. C.; Hu-Guo, Ch.; Himmi, A.; Jaaskelainen, K.; Koziel, M.; Morel, F.; Müntz, C.; Orsini, F.; Santos, C.; Schrader, C.; Specht, M.; Stroth, J.; Valin, I.; Voutsinas, G.; Wagner, F. M.; Winter, M.

    2011-02-01

    The physics goals of many high energy experiments require a precise determination of decay vertices, imposing severe constraints on vertex detectors (readout speed, granularity, material budget,…). The IPHC-IRFU collaboration developed a sensor architecture to comply with these requirements. The first full scale CMOS sensor was realised and equips the reference planes of the EUDET beam telescope. Its architecture is being adapted to the needs of the STAR (RHIC) and CBM (FAIR) experiments. It is a promising candidate for the ILC experiments and the ALICE detector upgrade (LHC). A substantial improvement to the CMOS sensor performances, especially in terms of radiation hardness, should come from a new fabrication technology with depleted sensitive volume. A prototype sensor was fabricated to explore the benefits of the technology. The crucial system integration issue is also currently being addressed. In 2009 the PLUME collaboration was set up to investigate the feasibility and performances of a light double sided ladder equipped with CMOS sensors, aimed primarily for the ILC vertex detector but also of interest for other applications such as the CBM vertex detector.

  14. Studies for a 10 μs, thin, high resolution CMOS pixel sensor for future vertex detectors

    NASA Astrophysics Data System (ADS)

    Voutsinas, G.; Amar-Youcef, S.; Baudot, J.; Bertolone, G.; Brogna, A.; Chon-Sen, N.; Claus, G.; Colledani, C.; Dorokhov, A.; Dozière, G.; Dulinski, W.; Degerli, Y.; De Masi, R.; Deveaux, M.; Gelin, M.; Goffe, M.; Hu-Guo, Ch.; Himmi, A.; Jaaskelainen, K.; Koziel, M.; Morel, F.; Müntz, C.; Orsini, F.; Santos, C.; Schrader, C.; Specht, M.; Stroth, J.; Valin, I.; Wagner, F. M.; Winter, M.

    2011-06-01

    Future high energy physics (HEP) experiments require detectors with unprecedented performances for track and vertex reconstruction. These requirements call for high precision sensors, with low material budget and short integration time. The development of CMOS sensors for HEP applications was initiated at IPHC Strasbourg more than 10 years ago, motivated by the needs for vertex detectors at the International Linear Collider (ILC) [R. Turchetta et al, NIM A 458 (2001) 677]. Since then several other applications emerged. The first real scale digital CMOS sensor MIMOSA26 equips Flavour Tracker at RHIC, as well as for the microvertex detector of the CBM experiment at FAIR. MIMOSA sensors may also offer attractive performances for the ALICE upgrade at LHC. This paper will demonstrate the substantial performance improvement of CMOS sensors based on a high resistivity epitaxial layer. First studies for integrating the sensors into a detector system will be addressed and finally the way to go to a 10 μs readout sensor will be discussed.

  15. Low area 4-bit 5 MS/s flash-type digitizer for hybrid-pixel detectors - Design study in 180 nm and 40 nm CMOS

    NASA Astrophysics Data System (ADS)

    Otfinowski, Piotr; Grybos, Pawel

    2015-11-01

    We report on the design of a 4-bit flash ADC with dynamic offset correction dedicated to measurement systems based on a pixel architecture. The presented converter was manufactured in two CMOS technologies: widespread and economical 180 nm and modern 40 nm process. The designs are optimized for the lowest area occupancy resulting in chip areas of 160×55 μm2 and 35×25 μm2. The experimental results indicate integral nonlinearity of +0.35/-0.21 LSB and +0.28/-0.25 LSB and power consumption of 52 μW and 17 μW at 5 MS/s for the prototypes in 180 nm and 40 nm technologies respectively.

  16. High-voltage CMOS detectors

    NASA Astrophysics Data System (ADS)

    Ehrler, F.; Blanco, R.; Leys, R.; Perić, I.

    2016-07-01

    High-voltage CMOS (HVCMOS) pixel sensors are depleted active pixel sensors implemented in standard commercial CMOS processes. The sensor element is the n-well/p-substrate diode. The sensor electronics are entirely placed inside the n-well which is at the same time used as the charge collection electrode. High voltage is used to deplete the part of the substrate around the n-well. HVCMOS sensors allow implementation of complex in-pixel electronics. This, together with fast signal collection, allows a good time resolution, which is required for particle tracking in high energy physics. HVCMOS sensors will be used in Mu3e experiment at PSI and are considered as an option for both ATLAS and CLIC (CERN). Radiation tolerance and time walk compensation have been tested and results are presented.

  17. Hybrid Pixel Detectors for gamma/X-ray imaging

    NASA Astrophysics Data System (ADS)

    Hatzistratis, D.; Theodoratos, G.; Zografos, V.; Kazas, I.; Loukas, D.; Lambropoulos, C. P.

    2015-09-01

    Hybrid pixel detectors are made by direct converting high-Z semi-insulating single crystalline material coupled to complementary-metal-oxide semiconductor (CMOS) readout electronics. They are attractive because direct conversion exterminates all the problems of spatial localization related to light diffusion, energy resolution, is far superior from the combination of scintillation crystals and photomultipliers and lithography can be used to pattern electrodes with very fine pitch. We are developing 2-D pixel CMOS ASICs, connect them to pixilated CdTe crystals with the flip chip and bump bonding method and characterize the hybrids. We have designed a series of circuits, whose latest member consists of a 50×25 pixel array with 400um pitch and an embedded controller. In every pixel a full spectroscopic channel with time tagging information has been implemented. The detectors are targeting Compton scatter imaging and they can be used for coded aperture imaging too. Hybridization using CMOS can overcome the limit put on pixel circuit complexity by the use of thin film transistors (TFT) in large flat panels. Hybrid active pixel sensors are used in dental imaging and other applications (e.g. industrial CT etc.). Thus X-ray imaging can benefit from the work done on dynamic range enhancement methods developed initially for visible and infrared CMOS pixel sensors. A 2-D CMOS ASIC with 100um pixel pitch to demonstrate the feasibility of such methods in the context of X-ray imaging has been designed.

  18. Development and characterization of CMOS avalanche photodiode arrays

    NASA Astrophysics Data System (ADS)

    Lawrence, William G.; Christian, James F.; Augustine, Frank L.; Squillante, Michael R.; Entine, Gerald

    2005-04-01

    Avalanche photodiode (APD) arrays fabricated by using complementary metal-oxide-semiconductor (CMOS) fabrication technology offer the possibility of combining these high sensitivity detectors with cost effective, on-board, complementary circuitry. Using CMOS techniques, Radiation Monitoring Devices has developed prototype pixels with active diameters ranging from 5 to 60 microns and with measured quantum efficiencies of up to 65%. The prototype CMOS APD pixel designs support both proportional and Geiger modes of photo-detection. When operating in Geiger mode, these APD"s act as single-optical-photon-counting detectors that can be used for time-resolved measurements under signal-starved conditions. We have also designed and fabricated CMOS chips that contain not only the APD pixels, but also associated circuitry for both actively and passively quenching the self-propagating Geiger avalanche. This report presents the noise and timing performance for the prototype CMOS APD pixels in both the proportional and Geiger modes of operation. It compares the quantum efficiency and dark-count rate of different pixel designs as a function of the applied bias and presents a discussion of the maximum count rates that is obtained with each of the two types of quenching circuits for operating the pixel in Geiger mode. Preliminary data on the application of the APD pixels to laser ranging and fluorescent lifetime measurement is also presented.

  19. Low-noise low-jitter 32-pixels CMOS single-photon avalanche diodes array for single-photon counting from 300 nm to 900 nm

    SciTech Connect

    Scarcella, Carmelo; Tosi, Alberto Villa, Federica; Tisa, Simone; Zappa, Franco

    2013-12-15

    We developed a single-photon counting multichannel detection system, based on a monolithic linear array of 32 CMOS SPADs (Complementary Metal-Oxide-Semiconductor Single-Photon Avalanche Diodes). All channels achieve a timing resolution of 100 ps (full-width at half maximum) and a photon detection efficiency of 50% at 400 nm. Dark count rate is very low even at room temperature, being about 125 counts/s for 50 μm active area diameter SPADs. Detection performance and microelectronic compactness of this CMOS SPAD array make it the best candidate for ultra-compact time-resolved spectrometers with single-photon sensitivity from 300 nm to 900 nm.

  20. Bonding techniques for hybrid active pixel sensors (HAPS)

    NASA Astrophysics Data System (ADS)

    Bigas, M.; Cabruja, E.; Lozano, M.

    2007-05-01

    A hybrid active pixel sensor (HAPS) consists of an array of sensing elements which is connected to an electronic read-out unit. The most used way to connect these two different devices is bump bonding. This interconnection technique is very suitable for these systems because it allows a very fine pitch and a high number of I/Os. However, there are other interconnection techniques available such as direct bonding. This paper, as a continuation of a review [M. Lozano, E. Cabruja, A. Collado, J. Santander, M. Ullan, Nucl. Instr. and Meth. A 473 (1-2) (2001) 95-101] published in 2001, presents an update of the different advanced bonding techniques available for manufacturing a hybrid active pixel detector.

  1. Active pixel sensor pixel having a photodetector whose output is coupled to an output transistor gate

    NASA Technical Reports Server (NTRS)

    Fossum, Eric R. (Inventor); Nakamura, Junichi (Inventor); Kemeny, Sabrina E. (Inventor)

    2005-01-01

    An imaging device formed as a monolithic complementary metal oxide semiconductor integrated circuit in an industry standard complementary metal oxide semiconductor process, the integrated circuit including a focal plane array of pixel cells, each one of the cells including a photogate overlying the substrate for accumulating photo-generated charge in an underlying portion of the substrate and a charge coupled device section formed on the substrate adjacent the photogate having a sensing node and at least one charge coupled device stage for transferring charge from the underlying portion of the substrate to the sensing node. There is also a readout circuit, part of which can be disposed at the bottom of each column of cells and be common to all the cells in the column. A Simple Floating Gate (SFG) pixel structure could also be employed in the imager to provide a non-destructive readout and smaller pixel sizes.

  2. Low-Power CMOS Laser Doppler Imaging Using Non-CDS Pixel Readout and 13.6-bit SAR ADC.

    PubMed

    Chen, Denis Guangyin; Law, Man-Kay; Lian, Yong; Bermak, Amine

    2016-02-01

    Laser Doppler imaging (LDI) measures particle flows such as blood perfusion by sensing their Doppler shift. This paper is the first of its kind in analyzing the effect of circuit noise on LDI precision which is distinctively different from conventional imaging. Based on this result, it presents a non-correlated-double-sampling (non-CDS) pixel readout scheme along with a high-resolution successive-approximation-register (SAR) analog-to-digital-converter (ADC) with 13.6b effective resolution (ER). Measurement results from the prototype chip in 0.18 μm technology confirm the theoretical analysis and show that the two techniques improve LDI sensing precision by 6.9 dB and 4.4 dB (compared to a 10b ADC) respectively without analog pre-amplification. The sensor's ADC occupies 518 μm×84 μm and is suitable for fast column parallel readout. Its differential non-linearity (DNL), integral non-linearity (INL), and input referred noise are +3.0/-2.8 LSB, +24/-17 LSB, and 110 μVrms respectively, leading to a Figure-of-Merit (FoM) of 23 fJ/state which makes it one of the most energy efficient image sensor ADCs and an order of magnitude better than the best reported LDI system using commercial high-speed image sensors.

  3. Low-Power CMOS Laser Doppler Imaging Using Non-CDS Pixel Readout and 13.6-bit SAR ADC.

    PubMed

    Chen, Denis Guangyin; Law, Man-Kay; Lian, Yong; Bermak, Amine

    2016-02-01

    Laser Doppler imaging (LDI) measures particle flows such as blood perfusion by sensing their Doppler shift. This paper is the first of its kind in analyzing the effect of circuit noise on LDI precision which is distinctively different from conventional imaging. Based on this result, it presents a non-correlated-double-sampling (non-CDS) pixel readout scheme along with a high-resolution successive-approximation-register (SAR) analog-to-digital-converter (ADC) with 13.6b effective resolution (ER). Measurement results from the prototype chip in 0.18 μm technology confirm the theoretical analysis and show that the two techniques improve LDI sensing precision by 6.9 dB and 4.4 dB (compared to a 10b ADC) respectively without analog pre-amplification. The sensor's ADC occupies 518 μm×84 μm and is suitable for fast column parallel readout. Its differential non-linearity (DNL), integral non-linearity (INL), and input referred noise are +3.0/-2.8 LSB, +24/-17 LSB, and 110 μVrms respectively, leading to a Figure-of-Merit (FoM) of 23 fJ/state which makes it one of the most energy efficient image sensor ADCs and an order of magnitude better than the best reported LDI system using commercial high-speed image sensors. PMID:25532189

  4. A Monolithic Active Pixel Sensor for ionizing radiation using a 180 nm HV-SOI process

    NASA Astrophysics Data System (ADS)

    Hemperek, Tomasz; Kishishita, Tetsuichi; Krüger, Hans; Wermes, Norbert

    2015-10-01

    An improved SOI-MAPS (Silicon On Insulator Monolithic Active Pixel Sensor) for ionizing radiation based on thick-film High Voltage SOI technology (HV-SOI) has been developed. Similar to existing Fully Depleted SOI-based (FD-SOI) MAPS, a buried silicon oxide inter-dielectric (BOX) layer is used to separate the CMOS electronics from the handle wafer which is used as a depleted charge collection layer. FD-SOI MAPS suffers from radiation damage such as transistor threshold voltage shifts due to charge traps in the oxide layers and charge states created at the silicon oxide boundaries (back gate effect). The X-FAB 180-nm HV-SOI technology offers an additional isolation by deep non-depleted implant between the BOX layer and the active circuitry which mitigates this problem. Therefore we see in this technology a high potential to implement radiation-tolerant MAPS with fast charge collection property. The design and measurement results from a first prototype are presented including charge collection in neutron irradiated samples.

  5. A High-Speed, Event-Driven, Active Pixel Sensor Readout for Photon-Counting Microchannel Plate Detectors

    NASA Technical Reports Server (NTRS)

    Kimble, Randy A.; Pain, Bedabrata; Norton, Timothy J.; Haas, J. Patrick; Oegerle, William R. (Technical Monitor)

    2002-01-01

    Silicon array readouts for microchannel plate intensifiers offer several attractive features. In this class of detector, the electron cloud output of the MCP intensifier is converted to visible light by a phosphor; that light is then fiber-optically coupled to the silicon array. In photon-counting mode, the resulting light splashes on the silicon array are recognized and centroided to fractional pixel accuracy by off-chip electronics. This process can result in very high (MCP-limited) spatial resolution while operating at a modest MCP gain (desirable for dynamic range and long term stability). The principal limitation of intensified CCD systems of this type is their severely limited local dynamic range, as accurate photon counting is achieved only if there are not overlapping event splashes within the frame time of the device. This problem can be ameliorated somewhat by processing events only in pre-selected windows of interest of by using an addressable charge injection device (CID) for the readout array. We are currently pursuing the development of an intriguing alternative readout concept based on using an event-driven CMOS Active Pixel Sensor. APS technology permits the incorporation of discriminator circuitry within each pixel. When coupled with suitable CMOS logic outside the array area, the discriminator circuitry can be used to trigger the readout of small sub-array windows only when and where an event splash has been detected, completely eliminating the local dynamic range problem, while achieving a high global count rate capability and maintaining high spatial resolution. We elaborate on this concept and present our progress toward implementing an event-driven APS readout.

  6. A High-Speed, Event-Driven, Active Pixel Sensor Readout for Photon-Counting Microchannel Plate Detectors

    NASA Technical Reports Server (NTRS)

    Kimble, Randy A.; Pain, B.; Norton, T. J.; Haas, P.; Fisher, Richard R. (Technical Monitor)

    2001-01-01

    Silicon array readouts for microchannel plate intensifiers offer several attractive features. In this class of detector, the electron cloud output of the MCP intensifier is converted to visible light by a phosphor; that light is then fiber-optically coupled to the silicon array. In photon-counting mode, the resulting light splashes on the silicon array are recognized and centroided to fractional pixel accuracy by off-chip electronics. This process can result in very high (MCP-limited) spatial resolution for the readout while operating at a modest MCP gain (desirable for dynamic range and long term stability). The principal limitation of intensified CCD systems of this type is their severely limited local dynamic range, as accurate photon counting is achieved only if there are not overlapping event splashes within the frame time of the device. This problem can be ameliorated somewhat by processing events only in pre-selected windows of interest or by using an addressable charge injection device (CID) for the readout array. We are currently pursuing the development of an intriguing alternative readout concept based on using an event-driven CMOS Active Pixel Sensor. APS technology permits the incorporation of discriminator circuitry within each pixel. When coupled with suitable CMOS logic outside the array area, the discriminator circuitry can be used to trigger the readout of small sub-array windows only when and where an event splash has been detected, completely eliminating the local dynamic range problem, while achieving a high global count rate capability and maintaining high spatial resolution. We elaborate on this concept and present our progress toward implementing an event-driven APS readout.

  7. Results of the 2015 testbeam of a 180 nm AMS High-Voltage CMOS sensor prototype

    NASA Astrophysics Data System (ADS)

    Benoit, M.; Bilbao de Mendizabal, J.; Casse, G.; Chen, H.; Chen, K.; Di Bello, F. A.; Ferrere, D.; Golling, T.; Gonzalez-Sevilla, S.; Iacobucci, G.; Lanni, F.; Liu, H.; Meloni, F.; Meng, L.; Miucci, A.; Muenstermann, D.; Nessi, M.; Perić, I.; Rimoldi, M.; Ristic, B.; Barrero Pinto, M. Vicente; Vossebeld, J.; Weber, M.; Wu, W.; Xu, L.

    2016-07-01

    Active pixel sensors based on the High-Voltage CMOS technology are being investigated as a viable option for the future pixel tracker of the ATLAS experiment at the High-Luminosity LHC. This paper reports on the testbeam measurements performed at the H8 beamline of the CERN Super Proton Synchrotron on a High-Voltage CMOS sensor prototype produced in 180 nm AMS technology. Results in terms of tracking efficiency and timing performance, for different threshold and bias conditions, are shown.

  8. Monolithic Active Pixel Matrix with Binary Counters (MAMBO) ASIC

    SciTech Connect

    Khalid, Farah F.; Deptuch, Grzegorz; Shenai, Alpana; Yarema, Raymond J.; /Fermilab

    2010-11-01

    Monolithic Active Matrix with Binary Counters (MAMBO) is a counting ASIC designed for detecting and measuring low energy X-rays from 6-12 keV. Each pixel contains analogue functionality implemented with a charge preamplifier, CR-RC{sup 2} shaper and a baseline restorer. It also contains a window comparator which can be trimmed by 4 bit DACs to remove systematic offsets. The hits are registered by a 12 bit ripple counter which is reconfigured as a shift register to serially output the data from the entire ASIC. Each pixel can be tested individually. Two diverse approaches have been used to prevent coupling between the detector and electronics in MAMBO III and MAMBO IV. MAMBO III is a 3D ASIC, the bottom ASIC consists of diodes which are connected to the top ASIC using {mu}-bump bonds. The detector is decoupled from the electronics by physically separating them on two tiers and using several metal layers as a shield. MAMBO IV is a monolithic structure which uses a nested well approach to isolate the detector from the electronics. The ASICs are being fabricated using the SOI 0.2 {micro}m OKI process, MAMBO III is 3D bonded at T-Micro and MAMBO IV nested well structure was developed in collaboration between OKI and Fermilab.

  9. Characterization study of an intensified complementary metal-oxide-semiconductor active pixel sensor

    NASA Astrophysics Data System (ADS)

    Griffiths, J. A.; Chen, D.; Turchetta, R.; Royle, G. J.

    2011-03-01

    An intensified CMOS active pixel sensor (APS) has been constructed for operation in low-light-level applications: a high-gain, fast-light decay image intensifier has been coupled via a fiber optic stud to a prototype "VANILLA" APS, developed by the UK based MI3 consortium. The sensor is capable of high frame rates and sparse readout. This paper presents a study of the performance parameters of the intensified VANILLA APS system over a range of image intensifier gain levels when uniformly illuminated with 520 nm green light. Mean-variance analysis shows the APS saturating around 3050 Digital Units (DU), with the maximum variance increasing with increasing image intensifier gain. The system's quantum efficiency varies in an exponential manner from 260 at an intensifier gain of 7.45 × 103 to 1.6 at a gain of 3.93 × 101. The usable dynamic range of the system is 60 dB for intensifier gains below 1.8 × 103, dropping to around 40 dB at high gains. The conclusion is that the system shows suitability for the desired application.

  10. First evidence of phase-contrast imaging with laboratory sources and active pixel sensors

    NASA Astrophysics Data System (ADS)

    Olivo, A.; Arvanitis, C. D.; Bohndiek, S. E.; Clark, A. T.; Prydderch, M.; Turchetta, R.; Speller, R. D.

    2007-11-01

    The aim of the present work is to achieve a first step towards combining the advantages of an innovative X-ray imaging technique—phase-contrast imaging (XPCi)—with those of a new class of sensors, i.e. CMOS-based active pixel sensors (APSs). The advantages of XPCi are well known and include increased image quality and detection of details invisible to conventional techniques, with potential application fields encompassing the medical, biological, industrial and security areas. Vanilla, one of the APSs developed by the MI-3 collaboration (see http://mi3.shef.ac.uk), was thoroughly characterised and an appropriate scintillator was selected to provide X-ray sensitivity. During this process, a set of phase-contrast images of different biological samples was acquired by means of the well-established free-space propagation XPCi technique. The obtained results are very encouraging and are in optimum agreement with the predictions of a simulation recently developed by some of the authors thus further supporting its reliability. This paper presents these preliminary results in detail and discusses in brief both the background to this work and its future developments.

  11. Evaluation of a single-pixel one-transistor active pixel sensor for fingerprint imaging

    NASA Astrophysics Data System (ADS)

    Xu, Man; Ou, Hai; Chen, Jun; Wang, Kai

    2015-08-01

    Since it first appeared in iPhone 5S in 2013, fingerprint identification (ID) has rapidly gained popularity among consumers. Current fingerprint-enabled smartphones unanimously consists of a discrete sensor to perform fingerprint ID. This architecture not only incurs higher material and manufacturing cost, but also provides only static identification and limited authentication. Hence as the demand for a thinner, lighter, and more secure handset grows, we propose a novel pixel architecture that is a photosensitive device embedded in a display pixel and detects the reflected light from the finger touch for high resolution, high fidelity and dynamic biometrics. To this purpose, an amorphous silicon (a-Si:H) dual-gate photo TFT working in both fingerprint-imaging mode and display-driving mode will be developed.

  12. Monolithic active pixel radiation detector with shielding techniques

    DOEpatents

    Deptuch, Grzegorz W.

    2016-09-06

    A monolithic active pixel radiation detector including a method of fabricating thereof. The disclosed radiation detector can include a substrate comprising a silicon layer upon which electronics are configured. A plurality of channels can be formed on the silicon layer, wherein the plurality of channels are connected to sources of signals located in a bulk part of the substrate, and wherein the signals flow through electrically conducting vias established in an isolation oxide on the substrate. One or more nested wells can be configured from the substrate, wherein the nested wells assist in collecting charge carriers released in interaction with radiation and wherein the nested wells further separate the electronics from the sensing portion of the detector substrate. The detector can also be configured according to a thick SOA method of fabrication.

  13. First use of a high-sensitivity active pixel sensor array as a detector for electron microscopy

    NASA Astrophysics Data System (ADS)

    Xuong, Nguyen-Huu; Milazzo, Anna-Clare; LeBlanc, Philippe; Duttweiler, Fred; Bouwer, James; Peltier, Steve; Ellisman, Mark; Denes, Peter; Bieser, Fred; Matis, Howard S.; Wieman, Howard; Kleinfelder, Stuart

    2004-06-01

    There is an urgent need to replace film and CCD cameras as recording instruments for transmission electron microscopy (TEM). Film is too cumbersome to process and CCD cameras have low resolution, marginal to poor signal-to-noise ratio for single electron detection and high spatial distortion. To find a replacement device, we have tested a high sensitivity active pixel sensor (APS) array currently being developed for nuclear physics. The tests were done at 120 keV in a JEOL 1200 electron microscope. At this energy, each electron produced on average a signal-tonoise ratio about 20/1. The spatial resolution was also excellent with the full width at half maximum (FWHM) about 20 microns. Since it is very radiation tolerant and has almost no spatial distortion, the above tests showed that a high sensitivity CMOS APS array holds great promise as a direct detection device for electron microscopy.

  14. Active pixel sensor having intra-pixel charge transfer with analog-to-digital converter

    NASA Technical Reports Server (NTRS)

    Fossum, Eric R. (Inventor); Mendis, Sunetra K. (Inventor); Pain, Bedabrata (Inventor); Nixon, Robert H. (Inventor); Zhou, Zhimin (Inventor)

    2003-01-01

    An imaging device formed as a monolithic complementary metal oxide semiconductor integrated circuit in an industry standard complementary metal oxide semiconductor process, the integrated circuit including a focal plane array of pixel cells, each one of the cells including a photogate overlying the substrate for accumulating photo-generated charge in an underlying portion of the substrate, a readout circuit including at least an output field effect transistor formed in the substrate, and a charge coupled device section formed on the substrate adjacent the photogate having a sensing node connected to the output transistor and at least one charge coupled device stage for transferring charge from the underlying portion of the substrate to the sensing node and an analog-to-digital converter formed in the substrate connected to the output of the readout circuit.

  15. Active pixel sensor having intra-pixel charge transfer with analog-to-digital converter

    NASA Technical Reports Server (NTRS)

    Fossum, Eric R. (Inventor); Mendis, Sunetra K. (Inventor); Pain, Bedabrata (Inventor); Nixon, Robert H. (Inventor); Zhou, Zhimin (Inventor)

    2000-01-01

    An imaging device formed as a monolithic complementary metal oxide semiconductor Integrated circuit in an industry standard complementary metal oxide semiconductor process, the integrated circuit including a focal plane array of pixel cells, each one of the cells including a photogate overlying the substrate for accumulating photo-generated charge in an underlying portion of the substrate, a readout circuit including at least an output field effect transistor formed in the substrate, and a charge coupled device section formed on the substrate adjacent the photogate having a sensing node connected to the output transistor and at least one charge coupled device stage for transferring charge from the underlying portion of the substrate to the sensing node and an analog-to-digital converter formed in the substrate connected to the output of the readout circuit.

  16. CAOS-CMOS camera.

    PubMed

    Riza, Nabeel A; La Torre, Juan Pablo; Amin, M Junaid

    2016-06-13

    Proposed and experimentally demonstrated is the CAOS-CMOS camera design that combines the coded access optical sensor (CAOS) imager platform with the CMOS multi-pixel optical sensor. The unique CAOS-CMOS camera engages the classic CMOS sensor light staring mode with the time-frequency-space agile pixel CAOS imager mode within one programmable optical unit to realize a high dynamic range imager for extreme light contrast conditions. The experimentally demonstrated CAOS-CMOS camera is built using a digital micromirror device, a silicon point-photo-detector with a variable gain amplifier, and a silicon CMOS sensor with a maximum rated 51.3 dB dynamic range. White light imaging of three different brightness simultaneously viewed targets, that is not possible by the CMOS sensor, is achieved by the CAOS-CMOS camera demonstrating an 82.06 dB dynamic range. Applications for the camera include industrial machine vision, welding, laser analysis, automotive, night vision, surveillance and multispectral military systems.

  17. CAOS-CMOS camera.

    PubMed

    Riza, Nabeel A; La Torre, Juan Pablo; Amin, M Junaid

    2016-06-13

    Proposed and experimentally demonstrated is the CAOS-CMOS camera design that combines the coded access optical sensor (CAOS) imager platform with the CMOS multi-pixel optical sensor. The unique CAOS-CMOS camera engages the classic CMOS sensor light staring mode with the time-frequency-space agile pixel CAOS imager mode within one programmable optical unit to realize a high dynamic range imager for extreme light contrast conditions. The experimentally demonstrated CAOS-CMOS camera is built using a digital micromirror device, a silicon point-photo-detector with a variable gain amplifier, and a silicon CMOS sensor with a maximum rated 51.3 dB dynamic range. White light imaging of three different brightness simultaneously viewed targets, that is not possible by the CMOS sensor, is achieved by the CAOS-CMOS camera demonstrating an 82.06 dB dynamic range. Applications for the camera include industrial machine vision, welding, laser analysis, automotive, night vision, surveillance and multispectral military systems. PMID:27410361

  18. All-CMOS night vision viewer with integrated microdisplay

    NASA Astrophysics Data System (ADS)

    Goosen, Marius E.; Venter, Petrus J.; du Plessis, Monuko; Faure, Nicolaas M.; Janse van Rensburg, Christo; Rademeyer, Pieter

    2014-02-01

    The unrivalled integration potential of CMOS has made it the dominant technology for digital integrated circuits. With the advent of visible light emission from silicon through hot carrier electroluminescence, several applications arose, all of which rely upon the advantages of mature CMOS technologies for a competitive edge in a very active and attractive market. In this paper we present a low-cost night vision viewer which employs only standard CMOS technologies. A commercial CMOS imager is utilized for near infrared image capturing with a 128x96 pixel all-CMOS microdisplay implemented to convey the image to the user. The display is implemented in a standard 0.35 μm CMOS process, with no process alterations or post processing. The display features a 25 μm pixel pitch and a 3.2 mm x 2.4 mm active area, which through magnification presents the virtual image to the user equivalent of a 19-inch display viewed from a distance of 3 meters. This work represents the first application of a CMOS microdisplay in a low-cost consumer product.

  19. Active pixel imagers incorporating pixel-level amplifiers based on polycrystalline-silicon thin-film transistors.

    PubMed

    El-Mohri, Youcef; Antonuk, Larry E; Koniczek, Martin; Zhao, Qihua; Li, Yixin; Street, Robert A; Lu, Jeng-Ping

    2009-07-01

    Active matrix, flat-panel imagers (AMFPIs) employing a 2D matrix of a-Si addressing TFTs have become ubiquitous in many x-ray imaging applications due to their numerous advantages. However, under conditions of low exposures and/or high spatial resolution, their signal-to-noise performance is constrained by the modest system gain relative to the electronic additive noise. In this article, a strategy for overcoming this limitation through the incorporation of in-pixel amplification circuits, referred to as active pixel (AP) architectures, using polycrystalline-silicon (poly-Si) TFTs is reported. Compared to a-Si, poly-Si offers substantially higher mobilities, enabling higher TFT currents and the possibility of sophisticated AP designs based on both n- and p-channel TFTs. Three prototype indirect detection arrays employing poly-Si TFTs and a continuous a-Si photodiode structure were characterized. The prototypes consist of an array (PSI-1) that employs a pixel architecture with a single TFT, as well as two arrays (PSI-2 and PSI-3) that employ AP architectures based on three and five TFTs, respectively. While PSI-1 serves as a reference with a design similar to that of conventional AMFPI arrays, PSI-2 and PSI-3 incorporate additional in-pixel amplification circuitry. Compared to PSI-1, results of x-ray sensitivity demonstrate signal gains of approximately 10.7 and 20.9 for PSI-2 and PSI-3, respectively. These values are in reasonable agreement with design expectations, demonstrating that poly-Si AP circuits can be tailored to provide a desired level of signal gain. PSI-2 exhibits the same high levels of charge trapping as those observed for PSI-1 and other conventional arrays employing a continuous photodiode structure. For PSI-3, charge trapping was found to be significantly lower and largely independent of the bias voltage applied across the photodiode. MTF results indicate that the use of a continuous photodiode structure in PSI-1, PSI-2, and PSI-3 results in

  20. Active pixel imagers incorporating pixel-level amplifiers based on polycrystalline-silicon thin-film transistors

    SciTech Connect

    El-Mohri, Youcef; Antonuk, Larry E.; Koniczek, Martin; Zhao Qihua; Li Yixin; Street, Robert A.; Lu Jengping

    2009-07-15

    Active matrix, flat-panel imagers (AMFPIs) employing a 2D matrix of a-Si addressing TFTs have become ubiquitous in many x-ray imaging applications due to their numerous advantages. However, under conditions of low exposures and/or high spatial resolution, their signal-to-noise performance is constrained by the modest system gain relative to the electronic additive noise. In this article, a strategy for overcoming this limitation through the incorporation of in-pixel amplification circuits, referred to as active pixel (AP) architectures, using polycrystalline-silicon (poly-Si) TFTs is reported. Compared to a-Si, poly-Si offers substantially higher mobilities, enabling higher TFT currents and the possibility of sophisticated AP designs based on both n- and p-channel TFTs. Three prototype indirect detection arrays employing poly-Si TFTs and a continuous a-Si photodiode structure were characterized. The prototypes consist of an array (PSI-1) that employs a pixel architecture with a single TFT, as well as two arrays (PSI-2 and PSI-3) that employ AP architectures based on three and five TFTs, respectively. While PSI-1 serves as a reference with a design similar to that of conventional AMFPI arrays, PSI-2 and PSI-3 incorporate additional in-pixel amplification circuitry. Compared to PSI-1, results of x-ray sensitivity demonstrate signal gains of {approx}10.7 and 20.9 for PSI-2 and PSI-3, respectively. These values are in reasonable agreement with design expectations, demonstrating that poly-Si AP circuits can be tailored to provide a desired level of signal gain. PSI-2 exhibits the same high levels of charge trapping as those observed for PSI-1 and other conventional arrays employing a continuous photodiode structure. For PSI-3, charge trapping was found to be significantly lower and largely independent of the bias voltage applied across the photodiode. MTF results indicate that the use of a continuous photodiode structure in PSI-1, PSI-2, and PSI-3 results in optical

  1. Active pixel imagers incorporating pixel-level amplifiers based on polycrystalline-silicon thin-film transistors

    PubMed Central

    El-Mohri, Youcef; Antonuk, Larry E.; Koniczek, Martin; Zhao, Qihua; Li, Yixin; Street, Robert A.; Lu, Jeng-Ping

    2009-01-01

    Active matrix, flat-panel imagers (AMFPIs) employing a 2D matrix of a-Si addressing TFTs have become ubiquitous in many x-ray imaging applications due to their numerous advantages. However, under conditions of low exposures and∕or high spatial resolution, their signal-to-noise performance is constrained by the modest system gain relative to the electronic additive noise. In this article, a strategy for overcoming this limitation through the incorporation of in-pixel amplification circuits, referred to as active pixel (AP) architectures, using polycrystalline-silicon (poly-Si) TFTs is reported. Compared to a-Si, poly-Si offers substantially higher mobilities, enabling higher TFT currents and the possibility of sophisticated AP designs based on both n- and p-channel TFTs. Three prototype indirect detection arrays employing poly-Si TFTs and a continuous a-Si photodiode structure were characterized. The prototypes consist of an array (PSI-1) that employs a pixel architecture with a single TFT, as well as two arrays (PSI-2 and PSI-3) that employ AP architectures based on three and five TFTs, respectively. While PSI-1 serves as a reference with a design similar to that of conventional AMFPI arrays, PSI-2 and PSI-3 incorporate additional in-pixel amplification circuitry. Compared to PSI-1, results of x-ray sensitivity demonstrate signal gains of ∼10.7 and 20.9 for PSI-2 and PSI-3, respectively. These values are in reasonable agreement with design expectations, demonstrating that poly-Si AP circuits can be tailored to provide a desired level of signal gain. PSI-2 exhibits the same high levels of charge trapping as those observed for PSI-1 and other conventional arrays employing a continuous photodiode structure. For PSI-3, charge trapping was found to be significantly lower and largely independent of the bias voltage applied across the photodiode. MTF results indicate that the use of a continuous photodiode structure in PSI-1, PSI-2, and PSI-3 results in optical fill

  2. A novel source-drain follower for monolithic active pixel sensors

    NASA Astrophysics Data System (ADS)

    Gao, C.; Aglieri, G.; Hillemanns, H.; Huang, G.; Junique, A.; Keil, M.; Kim, D.; Kofarago, M.; Kugathasan, T.; Mager, M.; Marin Tobon, C. A.; Martinengo, P.; Mugnier, H.; Musa, L.; Lee, S.; Reidt, F.; Riedler, P.; Rousset, J.; Sielewicz, K. M.; Snoeys, W.; Sun, X.; Van Hoorne, J. W.; Yang, P.

    2016-09-01

    Monolithic active pixel sensors (MAPS) receive interest in tracking applications in high energy physics as they integrate sensor and readout electronics in one silicon die with potential for lower material budget and cost, and better performance. Source followers (SFs) are widely used for MAPS readout: they increase charge conversion gain 1/Ceff or decrease the effective sensing node capacitance Ceff because the follower action compensates part of the input capacitance. Charge conversion gain is critical for analog power consumption and therefore for material budget in tracking applications, and also has direct system impact. This paper presents a novel source-drain follower (SDF), where both source and drain follow the gate potential improving charge conversion gain. For the inner tracking system (ITS) upgrade of the ALICE experiment at CERN, low material budget is a primary requirement. The SDF circuit was studied as part of the effort to optimize the effective capacitance of the sensing node. The collection electrode, input transistor and routing metal all contribute to Ceff. Reverse sensor bias reduces the collection electrode capacitance. The novel SDF circuit eliminates the contribution of the input transistor to Ceff, reduces the routing contribution if additional shielding is introduced, provides a way to estimate the capacitance of the sensor itself, and has a voltage gain closer to unity than the standard SF. The SDF circuit has a somewhat larger area with a somewhat smaller bandwidth, but this is acceptable in most cases. A test chip, manufactured in a 180 nm CMOS image sensor process, implements small prototype pixel matrices in different flavors to compare the standard SF to the novel SF and to the novel SF with additional shielding. The effective sensing node capacitance was measured using a 55Fe source. Increasing reverse substrate bias from -1 V to -6 V reduces Ceff by 38% and the equivalent noise charge (ENC) by 22% for the standard SF. The SDF

  3. Passive radiation detection using optically active CMOS sensors

    NASA Astrophysics Data System (ADS)

    Dosiek, Luke; Schalk, Patrick D.

    2013-05-01

    Recently, there have been a number of small-scale and hobbyist successes in employing commodity CMOS-based camera sensors for radiation detection. For example, several smartphone applications initially developed for use in areas near the Fukushima nuclear disaster are capable of detecting radiation using a cell phone camera, provided opaque tape is placed over the lens. In all current useful implementations, it is required that the sensor not be exposed to visible light. We seek to build a system that does not have this restriction. While building such a system would require sophisticated signal processing, it would nevertheless provide great benefits. In addition to fulfilling their primary function of image capture, cameras would also be able to detect unknown radiation sources even when the danger is considered to be low or non-existent. By experimentally profiling the image artifacts generated by gamma ray and β particle impacts, algorithms are developed to identify the unique features of radiation exposure, while discarding optical interaction and thermal noise effects. Preliminary results focus on achieving this goal in a laboratory setting, without regard to integration time or computational complexity. However, future work will seek to address these additional issues.

  4. Energy-recycling pixel for active-matrix organic light-emitting diode display

    NASA Astrophysics Data System (ADS)

    Yang, Che-Yu; Cho, Ting-Yi; Chen, Yen-Yu; Yang, Chih-Jen; Meng, Chao-Yu; Yang, Chieh-Hung; Yang, Po-Chuan; Chang, Hsu-Yu; Hsueh, Chun-Yuan; Wu, Chung-Chih; Lee, Si-Chen

    2007-06-01

    The authors report a pixel structure for active-matrix organic light-emitting diode (OLED) displays that has a hydrogenated amorphous silicon solar cell inserted between the driving polycrystalline Si thin-film transistor and the pixel OLED. Such an active-matrix OLED pixel structure not only exhibits a reduced reflection (and thus improved contrast) compared to conventional OLEDs but also is capable of recycling both incident photon energies and internally generated OLED radiation. Such a feature of energy recycling may be of use for portable/mobile electronics, which are particularly power aware.

  5. Characteristics of Monolithically Integrated InGaAs Active Pixel Image Array

    NASA Technical Reports Server (NTRS)

    Kim, Q.; Cunningham, T. J.; Pain, B.; Lange, M. J.; Olsen, G. H.

    1999-01-01

    Switching and amplifying characteristics of a newly developed monolithic InGaAs Active Pixel Imager Array are presented. The sensor array is fabricated from InGaAs material epitaxially deposited on an InP substrate.

  6. High-sensitivity chemiluminescence detection of cytokines using an antibody-immobilized CMOS image sensor

    NASA Astrophysics Data System (ADS)

    Hong, Dong-Gu; Joung, Hyou-Arm; Kim, Sang-Hyo; Kim, Min-Gon

    2013-05-01

    In this study, we used a Complementary Metal Oxide Semiconductor (CMOS) image sensor with immobilizing antibodies on its surface to detect human cytokines, which are activators that mediate intercellular communication including expression and control of immune responses. The CMOS image sensor has many advantages over the Charge Couple Device, including lower power consumption, operation voltage, and cost. The photodiode, a unit pixel component in the CMOS image sensor, receives light from the detection area and generates digital image data. About a million pixels are embedded, and size of each pixel is 3 x 3 μm. The chemiluminescence reaction produces light from the chemical reaction of luminol and hydrogen peroxide. To detect cytokines, antibodies were immobilized on the surface of the CMOS image sensor, and a sandwich immunoassay using an HRP-labeled antibody was performed. An HRP-catalyzed chemiluminescence reaction was measured by each pixel of the CMOS image sensor. Pixels with stronger signals indicated higher cytokine concentrations; thus, we were able to measure human interleukin-5 (IL-5) at femtomolar concentrations.

  7. The RD50 activity in the context of future pixel detector systems

    NASA Astrophysics Data System (ADS)

    Casse, G.

    2015-05-01

    The CERN/RD50 collaboration is dedicated to the radiation hardening of semiconductor sensors for future super-collider needs. The findings of this collaboration are therefore especially relevant to the pixel devices for the LHC experiment upgrades. A considerable amount of results on the enhancement of the radiation tolerance of silicon sensors has been found within RD50. The research towards radiation hardening has highlighted, and increased the knowledge on properties of sensors that are relevant to other applications. For example radiation hardening relies on the speed of signal collection in irradiated devices. As a consequence, the methods envisaged for increasing this collection speed turn out to be promising for significantly improving the performance of time resolved, high spatial resolution systems. A new type of device processing strongly emerging for production of future pixel sensor systems is the HV-CMOS technology. The RD50 research methodology provides the tools for characterising the behaviour of the deep collecting electrode (deep n-well) for this type of device after irradiation and the optimal framework for comparing the performance of the new devices with the current state of the art.

  8. Small-Scale Readout Systems Prototype for the STAR PIXEL Detector

    SciTech Connect

    Szelezniak, Michal A.; Besson, Auguste; Colledani, Claude; Dorokhov, Andrei; Dulinski, Wojciech; Greiner, Leo C.; Himmi, Abdelkader; Hu, Christine; Matis, Howard S.; Ritter, Hans Georg; Rose, Andrew; Shabetai, Alexandre; Stezelberger, Thorsten; Sun, Xiangming; Thomas, Jim H.; Valin, Isabelle; Vu, Chinh Q.; Wieman, Howard H.; Winter, Marc

    2008-10-01

    A prototype readout system for the STAR PIXEL detector in the Heavy Flavor Tracker (HFT) vertex detector upgrade is presented. The PIXEL detector is a Monolithic Active Pixel Sensor (MAPS) based silicon pixel vertex detector fabricated in a commercial CMOS process that integrates the detector and front-end electronics layers in one silicon die. Two generations ofMAPS prototypes designed specifically for the PIXEL are discussed. We have constructed a prototype telescope system consisting of three small MAPS sensors arranged in three parallel and coaxial planes with a readout system based on the readout architecture for PIXEL. This proposed readout architecture is simple and scales to the size required to readout the final detector. The real-time hit finding algorithm necessary for data rate reduction in the 400 million pixel detector is described, and aspects of the PIXEL system integration into the existing STAR framework are addressed. The complete system has been recently tested and shown to be fully functional.

  9. High gain CMOS image sensor design and fabrication on SOI and bulk technology

    NASA Astrophysics Data System (ADS)

    Zhang, Weiquan

    2000-12-01

    The CMOS imager is now competing with the CCD imager, which still dominates the electronic imaging market. By taking advantage of the mature CMOS technology, the CMOS imager can integrate AID converters, digital signal processing (DSP) and timing control circuits on the same chip. This low cost and high-density integration solution to the image capture is the strong driving force in industry. Silicon on insulator (SOI) is considered as the coming mainstream technology. It challenges the current bulk CMOS technology because of its reduced power consumption, high speed, radiation hardness etc. Moving the CMOS imager from the bulk to the SOI substrate will benefit from these intrinsic advantages. In addition, the blooming and the cross-talk between the pixels of the sensor array can be ideally eliminated, unlike those on the bulk technology. Though there are many advantages to integrate CMOS imager on SOI, the problem is that the top silicon film is very thin, such as 2000Å. Many photons can just pass through this layer without being absorbed. A good photo-detector on SOI is critical to integrate SOI CMOS imagers. In this thesis, several methods to make photo-detectors on SOI substrate are investigated. A floating gate MOSFET on SOI substrate, operating in its lateral bipolar mode, is photon sensitive. One step further, the SOI MOSFET gate and body can be tied together. The positive feedback between the body and gate enables this device have a high responsivity. A similar device can be found on the bulk CMOS technology: the gate-well tied PMOSFET. A 32 x 32 CMOS imager is designed and characterized using such a device as the light-sensing element. I also proposed the idea of building hybrid active pixels on SOI substrate. Such devices are fabricated and characterized. The work here represents my contribution on the CMOS imager, especially moving the CMOS imager onto the SOI substrate.

  10. Design and Fabrication of Vertically-Integrated CMOS Image Sensors

    PubMed Central

    Skorka, Orit; Joseph, Dileepan

    2011-01-01

    Technologies to fabricate integrated circuits (IC) with 3D structures are an emerging trend in IC design. They are based on vertical stacking of active components to form heterogeneous microsystems. Electronic image sensors will benefit from these technologies because they allow increased pixel-level data processing and device optimization. This paper covers general principles in the design of vertically-integrated (VI) CMOS image sensors that are fabricated by flip-chip bonding. These sensors are composed of a CMOS die and a photodetector die. As a specific example, the paper presents a VI-CMOS image sensor that was designed at the University of Alberta, and fabricated with the help of CMC Microsystems and Micralyne Inc. To realize prototypes, CMOS dies with logarithmic active pixels were prepared in a commercial process, and photodetector dies with metal-semiconductor-metal devices were prepared in a custom process using hydrogenated amorphous silicon. The paper also describes a digital camera that was developed to test the prototype. In this camera, scenes captured by the image sensor are read using an FPGA board, and sent in real time to a PC over USB for data processing and display. Experimental results show that the VI-CMOS prototype has a higher dynamic range and a lower dark limit than conventional electronic image sensors. PMID:22163860

  11. Assessing design activity in complex CMOS circuit design

    NASA Astrophysics Data System (ADS)

    Biswas, Gautam; Goldman, Susan R.; Fisher, Doug; Bhuva, Bharat; Glewwe, Grant

    1994-03-01

    This chapter characterizes human problem solving in digital circuit design. We analyze protocols of designers with varying degrees of training, identifying problem solving strategies used by these designers, discuss activity patterns that differentiate designers, and propose these as a tentative basis for assessing expertise in digital design. Throughout, we argue that a comprehensive model of human design should integrate a variety of strategies, which heretofore have been proposed as individually sufficient models of human design problem solving. We close by describing an automated tool for design and its assessment.

  12. Improved Space Object Observation Techniques Using CMOS Detectors

    NASA Astrophysics Data System (ADS)

    Schildknecht, T.; Hinze, A.; Schlatter, P.; Silha, J.; Peltonen, J.; Santti, T.; Flohrer, T.

    2013-08-01

    CMOS-sensors, or in general Active Pixel Sensors (APS), are rapidly replacing CCDs in the consumer camera market. Due to significant technological advances during the past years these devices start to compete with CCDs also for demanding scientific imaging applications, in particular in the astronomy community. CMOS detectors offer a series of inherent advantages compared to CCDs, due to the structure of their basic pixel cells, which each contain their own amplifier and readout electronics. The most prominent advantages for space object observations are the extremely fast and flexible readout capabilities, feasibility for electronic shuttering and precise epoch registration, and the potential to perform image processing operations on-chip and in real-time. Presently applied and proposed optical observation strategies for space debris surveys and space surveillance applications had to be analyzed. The major design drivers were identified and potential benefits from using available and future CMOS sensors were assessed. The major challenges and design drivers for ground-based and space-based optical observation strategies have been analyzed. CMOS detector characteristics were critically evaluated and compared with the established CCD technology, especially with respect to the above mentioned observations. Similarly, the desirable on-chip processing functionalities which would further enhance the object detection and image segmentation were identified. Finally, the characteristics of a particular CMOS sensor available at the Zimmerwald observatory were analyzed by performing laboratory test measurements.

  13. Imaging of moving fiducial markers during radiotherapy using a fast, efficient active pixel sensor based EPID

    SciTech Connect

    Osmond, John P. F.; Zin, Hafiz M.; Harris, Emma J.; Lupica, Giovanni; Allinson, Nigel M.; Evans, Philip M.

    2011-11-15

    Purpose: The purpose of this work was to investigate the use of an experimental complementary metal-oxide-semiconductor (CMOS) active pixel sensor (APS) for tracking of moving fiducial markers during radiotherapy. Methods: The APS has an active area of 5.4 x 5.4 cm and maximum full frame read-out rate of 20 frame s{sup -1}, with the option to read out a region-of-interest (ROI) at an increased rate. It was coupled to a 4 mm thick ZnWO4 scintillator which provided a quantum efficiency (QE) of 8% for a 6 MV x-ray treatment beam. The APS was compared with a standard iViewGT flat panel amorphous Silicon (a-Si) electronic portal imaging device (EPID), with a QE of 0.34% and a frame-rate of 2.5 frame s{sup -1}. To investigate the ability of the two systems to image markers, four gold cylinders of length 8 mm and diameter 0.8, 1.2, 1.6, and 2 mm were placed on a motion-platform. Images of the stationary markers were acquired using the APS at a frame-rate of 20 frame s{sup -1}, and a dose-rate of 143 MU min{sup -1} to avoid saturation. EPID images were acquired at the maximum frame-rate of 2.5 frame s{sup -1}, and a reduced dose-rate of 19 MU min{sup -1} to provide a similar dose per frame to the APS. Signal-to-noise ratio (SNR) of the background signal and contrast-to-noise ratio (CNR) of the marker signal relative to the background were evaluated for both imagers at doses of 0.125 to 2 MU. Results: Image quality and marker visibility was found to be greater in the APS with SNR {approx}5 times greater than in the EPID and CNR up to an order of magnitude greater for all four markers. To investigate the ability to image and track moving markers the motion-platform was moved to simulate a breathing cycle with period 6 s, amplitude 20 mm and maximum speed 13.2 mm s{sup -1}. At the minimum integration time of 50 ms a tracking algorithm applied to the APS data found all four markers with a success rate of {>=}92% and positional error {<=}90 {mu}m. At an integration time of 400

  14. Characterisation of Vanilla—A novel active pixel sensor for radiation detection

    NASA Astrophysics Data System (ADS)

    Blue, A.; Bates, R.; Laing, A.; Maneuski, D.; O'Shea, V.; Clark, A.; Prydderch, M.; Turchetta, R.; Arvanitis, C.; Bohndiek, S.

    2007-10-01

    Novel features of a new monolithic active pixel sensor, Vanilla, with 520×520 pixels ( 25 μm square) has been characterised for the first time. Optimisation of the sensor operation was made through variation of frame rates, integration times and on-chip biases and voltages. Features such as flushed reset operation, ROI capturing and readout modes have been fully tested. Stability measurements were performed to test its suitablility for long-term applications. These results suggest the Vanilla sensor—along with bio-medical and space applications—is suitable for use in particle physics experiments.

  15. Interpixel crosstalk in a 3D-integrated active pixel sensor for x-ray detection

    NASA Astrophysics Data System (ADS)

    LaMarr, Beverly; Bautz, Mark; Foster, Rick; Kissel, Steve; Prigozhin, Gregory; Suntharalingam, Vyshnavi

    2010-07-01

    MIT Lincoln Laboratories and MIT Kavli Institute for Astrophysics and Space Research have developed an active pixel sensor for use as a photon counting device for imaging spectroscopy in the soft X-ray band. A silicon-on-insulator (SOI) readout circuit was integrated with a high-resistivity silicon diode detector array using a per-pixel 3D integration technique developed at Lincoln Laboratory. We have tested these devices at 5.9 keV and 1.5 keV. Here we examine the interpixel cross-talk measured with 5.9 keV X-rays.

  16. Autonomous star tracker based on active pixel sensors (APS)

    NASA Astrophysics Data System (ADS)

    Schmidt, U.

    2004-06-01

    Star trackers are opto-electronic sensors used onboard of satellites for the autonomous inertial attitude determination. During the last years, star trackers became more and more important in the field of the attitude and orbit control system (AOCS) sensors. High performance star trackers are based up today on charge coupled device (CCD) optical camera heads. The Jena-Optronik GmbH is active in the field of opto-electronic sensors like star trackers since the early 80-ties. Today, with the product family ASTRO5, ASTRO10 and ASTRO15, all marked segments like earth observation, scientific applications and geo-telecom are supplied to European and Overseas customers. A new generation of star trackers can be designed based on the APS detector technical features. The measurement performance of the current CCD based star trackers can be maintained, the star tracker functionality, reliability and robustness can be increased while the unit costs are saved.

  17. Contact CMOS imaging of gaseous oxygen sensor array.

    PubMed

    Daivasagaya, Daisy S; Yao, Lei; Yi Yung, Ka; Hajj-Hassan, Mohamad; Cheung, Maurice C; Chodavarapu, Vamsy P; Bright, Frank V

    2011-10-01

    We describe a compact luminescent gaseous oxygen (O2) sensor microsystem based on the direct integration of sensor elements with a polymeric optical filter and placed on a low power complementary metal-oxide semiconductor (CMOS) imager integrated circuit (IC). The sensor operates on the measurement of excited-state emission intensity of O2-sensitive luminophore molecules tris(4,7-diphenyl-1,10-phenanthroline) ruthenium(II) ([Ru(dpp)3](2+)) encapsulated within sol-gel derived xerogel thin films. The polymeric optical filter is made with polydimethylsiloxane (PDMS) that is mixed with a dye (Sudan-II). The PDMS membrane surface is molded to incorporate arrays of trapezoidal microstructures that serve to focus the optical sensor signals on to the imager pixels. The molded PDMS membrane is then attached with the PDMS color filter. The xerogel sensor arrays are contact printed on top of the PDMS trapezoidal lens-like microstructures. The CMOS imager uses a 32 × 32 (1024 elements) array of active pixel sensors and each pixel includes a high-gain phototransistor to convert the detected optical signals into electrical currents. Correlated double sampling circuit, pixel address, digital control and signal integration circuits are also implemented on-chip. The CMOS imager data is read out as a serial coded signal. The CMOS imager consumes a static power of 320 µW and an average dynamic power of 625 µW when operating at 100 Hz sampling frequency and 1.8 V DC. This CMOS sensor system provides a useful platform for the development of miniaturized optical chemical gas sensors.

  18. Contact CMOS imaging of gaseous oxygen sensor array

    PubMed Central

    Daivasagaya, Daisy S.; Yao, Lei; Yi Yung, Ka; Hajj-Hassan, Mohamad; Cheung, Maurice C.; Chodavarapu, Vamsy P.; Bright, Frank V.

    2014-01-01

    We describe a compact luminescent gaseous oxygen (O2) sensor microsystem based on the direct integration of sensor elements with a polymeric optical filter and placed on a low power complementary metal-oxide semiconductor (CMOS) imager integrated circuit (IC). The sensor operates on the measurement of excited-state emission intensity of O2-sensitive luminophore molecules tris(4,7-diphenyl-1,10-phenanthroline) ruthenium(II) ([Ru(dpp)3]2+) encapsulated within sol–gel derived xerogel thin films. The polymeric optical filter is made with polydimethylsiloxane (PDMS) that is mixed with a dye (Sudan-II). The PDMS membrane surface is molded to incorporate arrays of trapezoidal microstructures that serve to focus the optical sensor signals on to the imager pixels. The molded PDMS membrane is then attached with the PDMS color filter. The xerogel sensor arrays are contact printed on top of the PDMS trapezoidal lens-like microstructures. The CMOS imager uses a 32 × 32 (1024 elements) array of active pixel sensors and each pixel includes a high-gain phototransistor to convert the detected optical signals into electrical currents. Correlated double sampling circuit, pixel address, digital control and signal integration circuits are also implemented on-chip. The CMOS imager data is read out as a serial coded signal. The CMOS imager consumes a static power of 320 µW and an average dynamic power of 625 µW when operating at 100 Hz sampling frequency and 1.8 V DC. This CMOS sensor system provides a useful platform for the development of miniaturized optical chemical gas sensors. PMID:24493909

  19. Low Temperature Polycrystalline Silicon Thin Film Transistor Pixel Circuits for Active Matrix Organic Light Emitting Diodes

    NASA Astrophysics Data System (ADS)

    Fan, Ching-Lin; Lin, Yu-Sheng; Liu, Yan-Wei

    A new pixel design and driving method for active matrix organic light emitting diode (AMOLED) displays that use low-temperature polycrystalline silicon thin-film transistors (LTPS-TFTs) with a voltage programming method are proposed and verified using the SPICE simulator. We had employed an appropriate TFT model in SPICE simulation to demonstrate the performance of the pixel circuit. The OLED anode voltage variation error rates are below 0.35% under driving TFT threshold voltage deviation (Δ Vth =± 0.33V). The OLED current non-uniformity caused by the OLED threshold voltage degradation (Δ VTO =+0.33V) is significantly reduced (below 6%). The simulation results show that the pixel design can improve the display image non-uniformity by compensating for the threshold voltage deviation in the driving TFT and the OLED threshold voltage degradation at the same time.

  20. [High-Performance Active Pixel X-Ray Sensors for X-Ray Astronomy

    NASA Technical Reports Server (NTRS)

    Bautz, Mark; Suntharalingam, Vyshnavi

    2005-01-01

    The subject grants support development of High-Performance Active Pixel Sensors for X-ray Astronomy at the Massachusetts Institute of Technology (MIT) Center for Space Research and at MIT's Lincoln Laboratory. This memo reports our progress in the second year of the project, from April, 2004 through the present.

  1. Using CMOS image sensors to detect photons

    NASA Astrophysics Data System (ADS)

    Xu, Chenzhi; Tong, Xiaobo; Zhou, Xiang; Zheng, Xiaodong; Xu, Yunfei

    2010-05-01

    A research is carried out on the characteristics of CMOS (Complementary Metal-Oxide Semiconductor) image sensors. A CMOS image sensor is used to probe the fluorescence intensity of atoms or absorbed photons in order to measure the shape and atomicity density of Rb (Rubidium) cold-atom-cloud. A series of RGB data of images is obtained and the spectrum response curve of CMOS image sensor is deduced. After filtering out the noise of the pixel signals of CMOS image sensor, the number of photons received by every pixel of the CMOS image sensor is obtained. Compared with CCD camera, the CMOS image sensor has some advantages in measuring the properties of cold-atom-cloud,such as quick response, large sensory area, low cost, and so on.

  2. Heavily irradiated N-in-p thin planar pixel sensors with and without active edges

    NASA Astrophysics Data System (ADS)

    Terzo, S.; Andricek, L.; Macchiolo, A.; Moser, H. G.; Nisius, R.; Richter, R. H.; Weigell, P.

    2014-05-01

    We present the results of the characterization of silicon pixel modules employing n-in-p planar sensors with an active thickness of 150 μm, produced at MPP/HLL, and 100-200 μm thin active edge sensor devices, produced at VTT in Finland. These thin sensors are designed as candidates for the ATLAS pixel detector upgrade to be operated at the HL-LHC, as they ensure radiation hardness at high fluences. They are interconnected to the ATLAS FE-I3 and FE-I4 read-out chips. Moreover, the n-in-p technology only requires a single side processing and thereby it is a cost-effective alternative to the n-in-n pixel technology presently employed in the LHC experiments. High precision beam test measurements of the hit efficiency have been performed on these devices both at the CERN SpS and at DESY, Hamburg. We studied the behavior of these sensors at different bias voltages and different beam incident angles up to the maximum one expected for the new Insertable B-Layer of ATLAS and for HL-LHC detectors. Results obtained with 150 μm thin sensors, assembled with the new ATLAS FE-I4 chip and irradiated up to a fluence of 4 × 1015 neq/cm2, show that they are excellent candidates for larger radii of the silicon pixel tracker in the upgrade of the ATLAS detector at HL-LHC. In addition, the active edge technology of the VTT devices maximizes the active area of the sensor and reduces the material budget to suit the requirements for the innermost layers. The edge pixel performance of VTT modules has been investigated at beam test experiments and the analysis after irradiation up to a fluence of 5 × 1015 neq/cm2 has been performed using radioactive sources in the laboratory.

  3. Spectral characterisation and noise performance of Vanilla—an active pixel sensor

    NASA Astrophysics Data System (ADS)

    Blue, Andrew; Bates, R.; Bohndiek, S. E.; Clark, A.; Arvanitis, Costas D.; Greenshaw, T.; Laing, A.; Maneuski, D.; Turchetta, R.; O'Shea, V.

    2008-06-01

    This work will report on the characterisation of a new active pixel sensor, Vanilla. The Vanilla comprises of 512×512 (25μm 2) pixels. The sensor has a 12 bit digital output for full-frame mode, although it can also be readout in analogue mode, whereby it can also be read in a fully programmable region-of-interest (ROI) mode. In full frame, the sensor can operate at a readout rate of more than 100 frames per second (fps), while in ROI mode, the speed depends on the size, shape and number of ROIs. For example, an ROI of 6×6 pixels can be read at 20,000 fps in analogue mode. Using photon transfer curve (PTC) measurements allowed for the calculation of the read noise, shot noise, full-well capacity and camera gain constant of the sensor. Spectral response measurements detailed the quantum efficiency (QE) of the detector through the UV and visible region. Analysis of the ROI readout mode was also performed. Such measurements suggest that the Vanilla APS (active pixel sensor) will be suitable for a wide range of applications including particle physics and medical imaging.

  4. ACTIVE-EYES: an adaptive pixel-by-pixel image-segmentation sensor architecture for high-dynamic-range hyperspectral imaging.

    PubMed

    Christensen, Marc P; Euliss, Gary W; McFadden, Michael J; Coyle, Kevin M; Milojkovic, Predrag; Haney, Michael W; van der Gracht, Joeseph; Athale, Ravindra A

    2002-10-10

    The ACTIVE-EYES (adaptive control for thermal imagers via electro-optic elements to yield an enhanced sensor) architecture, an adaptive image-segmentation and processing architecture, based on digital micromirror (DMD) array technology, is described. The concept provides efficient front-end processing of multispectral image data by adaptively segmenting and routing portions of the scene data concurrently to an imager and a spectrometer. The goal is to provide a large reduction in the amount of data required to be sensed in a multispectral imager by means of preprocessing the data to extract the most useful spatial and spectral information during detection. The DMD array provides the flexibility to perform a wide range of spatial and spectral analyses on the scene data. The spatial and spectral processing for different portions of the input scene can be tailored in real time to achieve a variety of preprocessing functions. Since the detected intensity of individual pixels may be controlled, the spatial image can be analyzed with gain varied on a pixel-by-pixel basis to enhance dynamic range. Coarse or fine spectral resolution can be achieved in the spectrometer by use of dynamically controllable or addressable dispersion elements. An experimental prototype, which demonstrated the segmentation between an imager and a grating spectrometer, was demonstrated and shown to achieve programmable pixelated intensity control. An information theoretic analysis of the dynamic-range control aspect was conducted to predict the performance enhancements that might be achieved with this architecture. The results indicate that, with a properly configured algorithm, the concept achieves the greatest relative information recovery from a detected image when the scene is made up of a relatively large area of moderate-dynamic-range pixels and a relatively smaller area of strong pixels that would tend to saturate a conventional sensor. PMID:12389978

  5. CMOS imager for pointing and tracking applications

    NASA Technical Reports Server (NTRS)

    Pain, Bedabrata (Inventor); Sun, Chao (Inventor); Yang, Guang (Inventor); Heynssens, Julie B. (Inventor)

    2006-01-01

    Systems and techniques to realize pointing and tracking applications with CMOS imaging devices. In general, in one implementation, the technique includes: sampling multiple rows and multiple columns of an active pixel sensor array into a memory array (e.g., an on-chip memory array), and reading out the multiple rows and multiple columns sampled in the memory array to provide image data with reduced motion artifact. Various operation modes may be provided, including TDS, CDS, CQS, a tracking mode to read out multiple windows, and/or a mode employing a sample-first-read-later readout scheme. The tracking mode can take advantage of a diagonal switch array. The diagonal switch array, the active pixel sensor array and the memory array can be integrated onto a single imager chip with a controller. This imager device can be part of a larger imaging system for both space-based applications and terrestrial applications.

  6. Characteristics of Monolithically Integrated InGaAs Active Pixel Imager Array

    NASA Technical Reports Server (NTRS)

    Kim, Q.; Cunningham, T. J.; Pain, B.; Lange, M. J.; Olsen, G. H.

    2000-01-01

    Switching and amplifying characteristics of a newly developed monolithic InGaAs Active Pixel Imager Array are presented. The sensor array is fabricated from InGaAs material epitaxially deposited on an InP substrate. It consists of an InGaAs photodiode connected to InP depletion-mode junction field effect transistors (JFETs) for low leakage, low power, and fast control of circuit signal amplifying, buffering, selection, and reset. This monolithically integrated active pixel sensor configuration eliminates the need for hybridization with silicon multiplexer. In addition, the configuration allows the sensor to be front illuminated, making it sensitive to visible as well as near infrared signal radiation. Adapting the existing 1.55 micrometer fiber optical communication technology, this integration will be an ideal system of optoelectronic integration for dual band (Visible/IR) applications near room temperature, for use in atmospheric gas sensing in space, and for target identification on earth. In this paper, two different types of small 4 x 1 test arrays will be described. The effectiveness of switching and amplifying circuits will be discussed in terms of circuit effectiveness (leakage, operating frequency, and temperature) in preparation for the second phase demonstration of integrated, two-dimensional monolithic InGaAs active pixel sensor arrays for applications in transportable shipboard surveillance, night vision, and emission spectroscopy.

  7. Development of active edge pixel sensors and four-side buttable modules using vertical integration technologies

    NASA Astrophysics Data System (ADS)

    Macchiolo, A.; Andricek, L.; Moser, H.-G.; Nisius, R.; Richter, R. H.; Terzo, S.; Weigell, P.

    2014-11-01

    We present an R&D activity focused on the development of novel modules for the upgrade of the ATLAS pixel system at the High Luminosity LHC (HL-LHC). The modules consist of n-in-p pixel sensors, 100 or 200 μm thick, produced at VTT (Finland) with an active edge technology, which considerably reduces the dead area at the periphery of the device. The sensors are interconnected with solder bump-bonding to the ATLAS FE-I3 and FE-I4 read-out chips, and characterised with radioactive sources and beam tests at the CERN-SPS and DESY. The results of these measurements will be discussed for devices before and after irradiation up to a fluence of 5 ×1015neq /cm2. We will also report on the R&D activity to obtain Inter Chip Vias (ICVs) on the ATLAS read-out chip in collaboration with the Fraunhofer Institute EMFT. This step is meant to prove the feasibility of the signal transport to the newly created readout pads on the backside of the chips allowing for four side buttable devices without the presently used cantilever for wire bonding. The read-out chips with ICVs will be interconnected to thin pixel sensors, 75 μm and 150 μm thick, with the Solid Liquid Interdiffusion (SLID) technology, which is an alternative to the standard solder bump-bonding.

  8. Dynamically re-configurable CMOS imagers for an active vision system

    NASA Technical Reports Server (NTRS)

    Yang, Guang (Inventor); Pain, Bedabrata (Inventor)

    2005-01-01

    A vision system is disclosed. The system includes a pixel array, at least one multi-resolution window operation circuit, and a pixel averaging circuit. The pixel array has an array of pixels configured to receive light signals from an image having at least one tracking target. The multi-resolution window operation circuits are configured to process the image. Each of the multi-resolution window operation circuits processes each tracking target within a particular multi-resolution window. The pixel averaging circuit is configured to sample and average pixels within the particular multi-resolution window.

  9. Principle and modelling of Transient Current Technique for interface traps characterization in monolithic pixel detectors obtained by CMOS-compatible wafer bonding

    NASA Astrophysics Data System (ADS)

    Bronuzzi, J.; Mapelli, A.; Moll, M.; Sallese, J. M.

    2016-08-01

    In the framework of monolithic silicon radiation detectors, a fabrication process based on a recently developed silicon wafer bonding technique at low temperature was proposed. Ideally, this new process would enable direct bonding of a read-out electronic chip wafer on a highly resistive silicon substrate wafer, which is expected to present many advantages since it would combine high performance IC's with high sensitive ultra-low doped bulk silicon detectors. But electrical properties of the bonded interface are critical for this kind of application since the mobile charges generated by radiation inside the bonded bulk are expected to transit through the interface in order to be collected by the read-out electronics. In this work, we propose to explore and develop a model for the so-called Transient Current Technique (TCT) to identify the presence of deep traps at the bonded interface. For this purpose, we consider a simple PIN diode reversely biased where the ultra-low doped active region of interest is set in full depletion. In a first step, Synopsys Sentaurus TCAD is used to evaluate the soundness of this technique for interface traps characterization such as it may happen in bonded interfaces. Next, an analytical model is developed in details to give a better insight into the physics behind the TCT for interface layers. Further, this can be used as a simple tool to evidence what are the relevant parameters influencing the TCT signal and to set the basis for preliminary characterizations.

  10. Smart-Pixel Array Processors Based on Optimal Cellular Neural Networks for Space Sensor Applications

    NASA Technical Reports Server (NTRS)

    Fang, Wai-Chi; Sheu, Bing J.; Venus, Holger; Sandau, Rainer

    1997-01-01

    A smart-pixel cellular neural network (CNN) with hardware annealing capability, digitally programmable synaptic weights, and multisensor parallel interface has been under development for advanced space sensor applications. The smart-pixel CNN architecture is a programmable multi-dimensional array of optoelectronic neurons which are locally connected with their local neurons and associated active-pixel sensors. Integration of the neuroprocessor in each processor node of a scalable multiprocessor system offers orders-of-magnitude computing performance enhancements for on-board real-time intelligent multisensor processing and control tasks of advanced small satellites. The smart-pixel CNN operation theory, architecture, design and implementation, and system applications are investigated in detail. The VLSI (Very Large Scale Integration) implementation feasibility was illustrated by a prototype smart-pixel 5x5 neuroprocessor array chip of active dimensions 1380 micron x 746 micron in a 2-micron CMOS technology.

  11. Self-testable CMOS thermopile-based infrared imager

    NASA Astrophysics Data System (ADS)

    Charlot, Benoit; Parrain, F.; Mir, Salvador; Courtois, Bernard

    2001-04-01

    This paper describes a CMOS-compatible self-testable uncooled InfraRed (IR) imager that can be used in multiple applications such as overheating detection, night vision, and earth tracking for satellite positioning. The imager consists of an array of thermal pixels that sense an infrared radiation. Each pixel is implemented as a front-side bulk micromachined membrane suspended by four arms, each arm containing a thermopile made of Poly/Al thermocouples. The imager has a pixel self-test function that can be activated off-line in the field for validation and maintenance purposes, with an on-chip test signal generation that requires only slight modifications in the pixel design. The self-test of a pixel takes about 15 ms. The area overhead required by the test electronics does not imply any reduction of the pixel fill factor, since the electronics fits in the pixel silicon boundary. However, the additional self-test circuitry contributes to a small increase in the thermal conductance of a pixel due to the wiring of a heating resistor over the suspended arms. The self-test capability of the imager allows for a production test with a standard test equipment, without the need of special infrared sources and the associated optical equipment. A prototype with 8 X 8 pixels is currently in fabrication for validation of the self-test approach. In this prototype, each pixel occupies an area of 200 X 200 micrometer2, with a membrane size of 90 X 90 micrometer2 (fill factor of 0.2). Simulation results indicate a pixel thermal conductance of 22.6 (mu) W/K, giving a responsivity of 138 V/W, with a thermocouple Seebeck coefficient that has been measured at 248 (mu) V/K for the 0.6 micrometer CMOS technology used. The noise equivalent power (considering only Johnson noise in the thermopile) is calculated as 0.18 nW.H-1/2 with a detectivity of 5.03 X 107 cm.Hz1/2.W-1, in line with current state-of-the-art. Since the imager may need to measure irradiation intensities below 1(mu) W

  12. Enhanced Pixel-Driving Circuits for Active-Matrix Organic-Light-Emitting Diode Displays with Large Sizes

    NASA Astrophysics Data System (ADS)

    Yu, Sang Ho; Choi, Sung Wook; Shin, Hong Jae; Kwack, Kae Dal; Kim, Tae Whan

    2005-03-01

    Enhanced pixel-driving circuits for active-matrix organic-light-emitting diode (AM-OLED) displays with large sizes and highly uniform brightnesses were designed for system on panel. The driving method used the pre-charge functions of the data for a highly uniform brightness during a short time to program the current. The currents of the designed pixel-driving circuits were not significantly affected by variations in the threshold voltages, or by the mobilities of the driving thin-film transistors. These results indicate that the proposed pixel-driving circuits hold promise for potential applications in AM-OLED displays with large sizes and highly uniform brightnesses.

  13. TFT-Based Active Pixel Sensors for Large Area Thermal Neutron Detection

    NASA Astrophysics Data System (ADS)

    Kunnen, George

    Due to diminishing availability of 3He, which is the critical component of neutron detecting proportional counters, large area flexible arrays are being considered as a potential replacement for neutron detection. A large area flexible array, utilizing semiconductors for both charged particle detection and pixel readout, ensures a large detection surface area in a light weight rugged form. Such a neutron detector could be suitable for deployment at ports of entry. The specific approach used in this research, uses a neutron converter layer which captures incident thermal neutrons, and then emits ionizing charged particles. These ionizing particles cause electron-hole pair generation within a single pixel's integrated sensing diode. The resulting charge is then amplified via a low-noise amplifier. This document begins by discussing the current state of the art in neutron detection and the associated challenges. Then, for the purpose of resolving some of these issues, recent design and modeling efforts towards developing an improved neutron detection system are described. Also presented is a low-noise active pixel sensor (APS) design capable of being implemented in low temperature indium gallium zinc oxide (InGaZnO) or amorphous silicon (a-Si:H) thin film transistor process compatible with plastic substrates. The low gain and limited scalability of this design are improved upon by implementing a new multi-stage self-resetting APS. For each APS design, successful radiation measurements are also presented using PiN diodes for charged particle detection. Next, detection array readout methodologies are modeled and analyzed, and use of a matched filter readout circuit is described as well. Finally, this document discusses detection diode integration with the designed TFT-based APSs.

  14. Monolithic Active Pixel Matrix with Binary Counters ASIC with nested wells

    NASA Astrophysics Data System (ADS)

    Fahim, F.; Deptuch, G.; Holm, S.; Shenai, A.; Lipton, R.

    2013-04-01

    Monolithic Active Matrix with Binary Counters (MAMBO) V ASIC has been designed for detecting and measuring low energy X-rays. A nested well structure with a buried n-well (BNW) and a deeper buried p-well (BPW) is used to electrically isolate the detector from the electronics. BNW acts as an AC ground to electrical signals and behaves as a shield. BPW allows for a homogenous electric field in the entire detector volume. The ASIC consists of a matrix of 50 × 52 pixels, each of 105x105μm2. Each pixel contains analog functionality accomplished by a charge preamplifier, CR-RC2 shaper and a baseline restorer. It also contains a window comparator with Upper and Lower thresholds which can be individually trimmed by 4 bit DACs to remove systematic offsets. The hits are registered by a 12 bit counter which is reconfigured as a shift register to serially output the data from the entire ASIC.

  15. Silicon-on-insulator (SOI) active pixel sensors with the photosite implemented in the substrate

    NASA Technical Reports Server (NTRS)

    Pain, Bedabrata (Inventor); Zheng, Xinyu (Inventor)

    2002-01-01

    Active pixel sensors for a high quality imager are fabricated using a silicon-on-insulator (SOI) process by integrating the photodetectors on the SOI substrate and forming pixel readout transistors on the SOI thin-film. The technique can include forming silicon islands on a buried insulator layer disposed on a silicon substrate and selectively etching away the buried insulator layer over a region of the substrate to define a photodetector area. Dopants of a first conductivity type are implanted to form a signal node in the photodetector area and to form simultaneously drain/source regions for a first transistor in at least a first one of the silicon islands. Dopants of a second conductivity type are implanted to form drain/source regions for a second transistor in at least a second one of the silicon islands. Isolation rings around the photodetector also can be formed when dopants of the second conductivity type are implanted. Interconnections among the transistors and the photodetector are provided to allow signals sensed by the photodetector to be read out via the transistors formed on the silicon islands.

  16. Silicon-on-insulator (SOI) active pixel sensors with the photosite implemented in the substrate

    NASA Technical Reports Server (NTRS)

    Zheng, Xinyu (Inventor); Pain, Bedabrata (Inventor)

    2005-01-01

    Active pixel sensors for a high quality imager are fabricated using a silicon-on-insulator (SOI) process by integrating the photodetectors on the SOI substrate and forming pixel readout transistors on the SOI thin-film. The technique can include forming silicon islands on a buried insulator layer disposed on a silicon substrate and selectively etching away the buried insulator layer over a region of the substrate to define a photodetector area. Dopants of a first conductivity type are implanted to form a signal node in the photodetector area and to form simultaneously drain/source regions for a first transistor in at least a first one of the silicon islands. Dopants of a second conductivity type are implanted to form drain/source regions for a second transistor in at least a second one of the silicon islands. Isolation rings around the photodetector also can be formed when dopants of the second conductivity type are implanted. Interconnections among the transistors and the photodetector are provided to allow signals sensed by the photodetector to be read out via the transistors formed on the silicon islands.

  17. Direct tests of a pixelated microchannel plate as the active element of a shower maximum detector

    NASA Astrophysics Data System (ADS)

    Apresyan, A.; Los, S.; Pena, C.; Presutti, F.; Ronzhin, A.; Spiropulu, M.; Xie, S.

    2016-08-01

    One possibility to make a fast and radiation resistant shower maximum detector is to use a secondary emitter as an active element. We report our studies of microchannel plate photomultipliers (MCPs) as the active element of a shower-maximum detector. We present test beam results obtained using Photonis XP85011 to detect secondary particles of an electromagnetic shower. We focus on the use of the multiple pixels on the Photonis MCP in order to find a transverse two-dimensional shower distribution. A spatial resolution of 0.8 mm was obtained with an 8 GeV electron beam. A method for measuring the arrival time resolution for electromagnetic showers is presented, and we show that time resolution better than 40 ps can be achieved.

  18. Direct tests of a pixelated microchannel plate as the active element of a shower maximum detector

    DOE PAGES

    Apresyan, A.; Los, S.; Pena, C.; Presutti, F.; Ronzhin, A.; Spiropulu, M.; Xie, S.

    2016-05-07

    One possibility to make a fast and radiation resistant shower maximum detector is to use a secondary emitter as an active element. We report our studies of microchannel plate photomultipliers (MCPs) as the active element of a shower-maximum detector. We present test beam results obtained using Photonis XP85011 to detect secondary particles of an electromagnetic shower. We focus on the use of the multiple pixels on the Photonis MCP in order to find a transverse two-dimensional shower distribution. A spatial resolution of 0.8 mm was obtained with an 8 GeV electron beam. As a result, a method for measuring themore » arrival time resolution for electromagnetic showers is presented, and we show that time resolution better than 40 ps can be achieved.« less

  19. CMOS Imaging of Temperature Effects on Pin-Printed Xerogel Sensor Microarrays.

    PubMed

    Lei Yao; Ka Yi Yung; Chodavarapu, Vamsy P; Bright, Frank V

    2011-04-01

    In this paper, we study the effect of temperature on the operation and performance of a xerogel-based sensor microarrays coupled to a complementary metal-oxide semiconductor (CMOS) imager integrated circuit (IC) that images the photoluminescence response from the sensor microarray. The CMOS imager uses a 32 × 32 (1024 elements) array of active pixel sensors and each pixel includes a high-gain phototransistor to convert the detected optical signals into electrical currents. A correlated double sampling circuit and pixel address/digital control/signal integration circuit are also implemented on-chip. The CMOS imager data are read out as a serial coded signal. The sensor system uses a light-emitting diode to excite target analyte responsive organometallic luminophores doped within discrete xerogel-based sensor elements. As a proto type, we developed a 3 × 3 (9 elements) array of oxygen (O2) sensors. Each group of three sensor elements in the array (arranged in a column) is designed to provide a different and specific sensitivity to the target gaseous O2 concentration. This property of multiple sensitivities is achieved by using a mix of two O2 sensitive luminophores in each pin-printed xerogel sensor element. The CMOS imager is designed to be low noise and consumes a static power of 320.4 μW and an average dynamic power of 624.6 μW when operating at 100-Hz sampling frequency and 1.8-V dc power supply.

  20. CMOS Imaging of Temperature Effects on Pin-Printed Xerogel Sensor Microarrays.

    PubMed

    Lei Yao; Ka Yi Yung; Chodavarapu, Vamsy P; Bright, Frank V

    2011-04-01

    In this paper, we study the effect of temperature on the operation and performance of a xerogel-based sensor microarrays coupled to a complementary metal-oxide semiconductor (CMOS) imager integrated circuit (IC) that images the photoluminescence response from the sensor microarray. The CMOS imager uses a 32 × 32 (1024 elements) array of active pixel sensors and each pixel includes a high-gain phototransistor to convert the detected optical signals into electrical currents. A correlated double sampling circuit and pixel address/digital control/signal integration circuit are also implemented on-chip. The CMOS imager data are read out as a serial coded signal. The sensor system uses a light-emitting diode to excite target analyte responsive organometallic luminophores doped within discrete xerogel-based sensor elements. As a proto type, we developed a 3 × 3 (9 elements) array of oxygen (O2) sensors. Each group of three sensor elements in the array (arranged in a column) is designed to provide a different and specific sensitivity to the target gaseous O2 concentration. This property of multiple sensitivities is achieved by using a mix of two O2 sensitive luminophores in each pin-printed xerogel sensor element. The CMOS imager is designed to be low noise and consumes a static power of 320.4 μW and an average dynamic power of 624.6 μW when operating at 100-Hz sampling frequency and 1.8-V dc power supply. PMID:23851206

  1. Planar CMOS analog SiPMs: design, modeling, and characterization

    NASA Astrophysics Data System (ADS)

    Zou, Yu; Villa, Federica; Bronzi, Danilo; Tisa, Simone; Tosi, Alberto; Zappa, Franco

    2015-11-01

    Silicon photomultipliers (SiPMs) are large area detectors consisting of an array of single-photon-sensitive microcells, which make SiPMs extremely attractive to substitute the photomultiplier tubes in many applications. We present the design, fabrication, and characterization of analog SiPMs in standard planar 0.35 μm CMOS technology, with about 1 mm × 1 mm total area and different kinds of microcells, based on single-photon avalanche diodes with 30 μm diameter reaching 21.0% fill-factor (FF), 50 μm diameter (FF = 58.3%) or 50 μm square active area with rounded corner of 5 μm radius (FF = 73.7%). We also developed the electrical SPICE model for CMOS SiPMs. Our CMOS SiPMs have 25 V breakdown voltage, in line with most commercial SiPMs and higher gain (8.8 × 106, 13.2 × 106, and 15.0 × 106, respectively). Although dark count rate density is slightly higher than state-of-the-art analog SiPMs, the proposed standard CMOS processing opens the feasibility of integration with active electronics, for switching hot pixels off, drastically reducing the overall dark count rate, or for further on-chip processing.

  2. Impact of Substrate Bias on Fixed-Pattern-Noise in Active Pixel Sensor Cells

    NASA Astrophysics Data System (ADS)

    Terauchi, Mamoru

    2007-11-01

    The effect of substrate (body) bias on fixed-pattern-noise (FPN) in active pixel sensor (APS) cells is studied. Through measuring test devices consisting of two metal-oxide-semiconductor field-effect transistors (MOSFETs) connected in series with each of the transistors located in the same well region, it has been revealed that substrate bias, which is inevitably applied in a normal circuit configuration in conventional APS cells, worsens the characteristics fluctuation in source-follower amplifiers in APS cells, leading to FPN that cannot be mitigated by conventional correction methods such as correlated double sampling. In addition it has been confirmed that the current-voltage characteristics of logarithmic converters, each of which is realized using a MOSFET with gate and drain terminals connected together, are also affected by substrate bias, resulting in increased characteristics fluctuation as compared with the case with no substrate bias.

  3. Characterization of a photon-counting intensified active pixel sensor (PC-IAPS): preliminary results

    NASA Astrophysics Data System (ADS)

    Uslenghi, Michela C.; Bonanno, Giovanni; Belluso, Massimiliano; Modica, Angelo; Bergamini, Paolo

    2001-12-01

    We report about preliminary results of the characterization of a new kind of MCP-based detector: a Photon Counting Intensified Active Pixel Sensor (APS). PC-IAPS appears as the natural evolution of the Intensified CCD, maintaining the basic characteristics, but with improved performance in terms of dynamic range, along with some other appealing properties: higher radiation hardness, more compact design, lower requirements on the external electronics, low power consumption. The prototype we realized is currently in an early stage of development. Nevertheless, it allows us to demonstrate the feasibility of the photon counter and to measure some of the basic parameters. Some of the characteristics of the APS, relevant to the use in intensified systems, are analyzed and compared with the CCD ones, demonstrating the potentiality of the new device and allowing us to set the basis of future development.

  4. SOI CMOS Imager with Suppression of Cross-Talk

    NASA Technical Reports Server (NTRS)

    Pain, Bedabrata; Zheng, Xingyu; Cunningham, Thomas J.; Seshadri, Suresh; Sun, Chao

    2009-01-01

    A monolithic silicon-on-insulator (SOI) complementary metal oxide/semiconductor (CMOS) image-detecting integrated circuit of the active-pixel-sensor type, now undergoing development, is designed to operate at visible and near-infrared wavelengths and to offer a combination of high quantum efficiency and low diffusion and capacitive cross-talk among pixels. The imager is designed to be especially suitable for astronomical and astrophysical applications. The imager design could also readily be adapted to general scientific, biological, medical, and spectroscopic applications. One of the conditions needed to ensure both high quantum efficiency and low diffusion cross-talk is a relatively high reverse bias potential (between about 20 and about 50 V) on the photodiode in each pixel. Heretofore, a major obstacle to realization of this condition in a monolithic integrated circuit has been posed by the fact that the required high reverse bias on the photodiode is incompatible with metal oxide/semiconductor field-effect transistors (MOSFETs) in the CMOS pixel readout circuitry. In the imager now being developed, the SOI structure is utilized to overcome this obstacle: The handle wafer is retained and the photodiode is formed in the handle wafer. The MOSFETs are formed on the SOI layer, which is separated from the handle wafer by a buried oxide layer. The electrical isolation provided by the buried oxide layer makes it possible to bias the MOSFETs at CMOS-compatible potentials (between 0 and 3 V), while biasing the photodiode at the required higher potential, and enables independent optimization of the sensory and readout portions of the imager.

  5. Intelligent error correction method applied on an active pixel sensor based star tracker

    NASA Astrophysics Data System (ADS)

    Schmidt, Uwe

    2005-10-01

    Star trackers are opto-electronic sensors used on-board of satellites for the autonomous inertial attitude determination. During the last years star trackers became more and more important in the field of the attitude and orbit control system (AOCS) sensors. High performance star trackers are based up today on charge coupled device (CCD) optical camera heads. The active pixel sensor (APS) technology, introduced in the early 90-ties, allows now the beneficial replacement of CCD detectors by APS detectors with respect to performance, reliability, power, mass and cost. The company's heritage in star tracker design started in the early 80-ties with the launch of the worldwide first fully autonomous star tracker system ASTRO1 to the Russian MIR space station. Jena-Optronik recently developed an active pixel sensor based autonomous star tracker "ASTRO APS" as successor of the CCD based star tracker product series ASTRO1, ASTRO5, ASTRO10 and ASTRO15. Key features of the APS detector technology are, a true xy-address random access, the multiple windowing read out and the on-chip signal processing including the analogue to digital conversion. These features can be used for robust star tracking at high slew rates and under worse conditions like stray light and solar flare induced single event upsets. A special algorithm have been developed to manage the typical APS detector error contributors like fixed pattern noise (FPN), dark signal non-uniformity (DSNU) and white spots. The algorithm works fully autonomous and adapts to e.g. increasing DSNU and up-coming white spots automatically without ground maintenance or re-calibration. In contrast to conventional correction methods the described algorithm does not need calibration data memory like full image sized calibration data sets. The application of the presented algorithm managing the typical APS detector error contributors is a key element for the design of star trackers for long term satellite applications like

  6. Design of a silicon avalanche photodiode pixel with integrated laser diode using back-illuminated crystallographically etched silicon-on-sapphire with monolithically integrated microlens for dual-mode passive and active imaging arrays

    NASA Astrophysics Data System (ADS)

    Stern, Alvin G.

    2010-08-01

    There is a growing need in scientific research applications for dual-mode, passive and active 2D and 3D LADAR imaging methods. To fill this need, an advanced back-illuminated silicon avalanche photodiode (APD) design is presented using a novel silicon-on-sapphire substrate incorporating a crystalline aluminum nitride (AlN) antireflective layer between the silicon and R-plane sapphire. This allows integration of a high quantum efficiency silicon APD with a gallium nitride (GaN) laser diode in each pixel. The pixel design enables single photon sensitive, solid-state focal plane arrays (FPAs) with wide dynamic range, supporting passive and active imaging capability in a single FPA. When (100) silicon is properly etched with TMAH solution, square based pyramidal frustum or mesa arrays result with the four mesa sidewalls of the APD formed by (111) silicon planes that intersect the (100) planes at a crystallographic angle, φ c = 54.7°. The APD device is fabricated in the mesa using conventional silicon processing technology. The GaN laser diode is fabricated by epitaxial growth inside of an inverted, etched cavity in the silicon mesa. Microlenses are fabricated in the thinned, and AR-coated sapphire substrate. The APDs share a common, front-side anode contact, and laser diodes share a common cathode. A low resistance (Al) or (Cu) metal anode grid fills the space between pixels and also inhibits optical crosstalk. SOS-APD arrays are flip-chip bump-bonded to CMOS readout ICs to produce hybrid FPAs. The square 27 μm emitter-detector pixel achieves SNR > 1 in active detection mode for Lambert surfaces at 1,000 meters.

  7. Nanosecond monolithic CMOS readout cell

    DOEpatents

    Souchkov, Vitali V.

    2004-08-24

    A pulse shaper is implemented in monolithic CMOS with a delay unit formed of a unity gain buffer. The shaper is formed of a difference amplifier having one input connected directly to an input signal and a second input connected to a delayed input signal through the buffer. An elementary cell is based on the pulse shaper and a timing circuit which gates the output of an integrator connected to the pulse shaper output. A detector readout system is formed of a plurality of elementary cells, each connected to a pixel of a pixel array, or to a microstrip of a plurality of microstrips, or to a detector segment.

  8. High-voltage pixel sensors for ATLAS upgrade

    NASA Astrophysics Data System (ADS)

    Perić, I.; Kreidl, C.; Fischer, P.; Bompard, F.; Breugnon, P.; Clemens, J.-C.; Fougeron, D.; Liu, J.; Pangaud, P.; Rozanov, A.; Barbero, M.; Feigl, S.; Capeans, M.; Ferrere, D.; Pernegger, H.; Ristic, B.; Muenstermann, D.; Gonzalez Sevilla, S.; La Rosa, A.; Miucci, A.; Nessi, M.; Iacobucci, G.; Backhaus, M.; Hügging, Fabian; Krüger, H.; Hemperek, T.; Obermann, T.; Wermes, N.; Garcia-Sciveres, M.; Quadt, A.; Weingarten, J.; George, M.; Grosse-Knetter, J.; Rieger, J.; Bates, R.; Blue, A.; Buttar, C.; Hynds, D.

    2014-11-01

    The high-voltage (HV-) CMOS pixel sensors offer several good properties: a fast charge collection by drift, the possibility to implement relatively complex CMOS in-pixel electronics and the compatibility with commercial processes. The sensor element is a deep n-well diode in a p-type substrate. The n-well contains CMOS pixel electronics. The main charge collection mechanism is drift in a shallow, high field region, which leads to a fast charge collection and a high radiation tolerance. We are currently evaluating the use of the high-voltage detectors implemented in 180 nm HV-CMOS technology for the high-luminosity ATLAS upgrade. Our approach is replacing the existing pixel and strip sensors with the CMOS sensors while keeping the presently used readout ASICs. By intelligence we mean the ability of the sensor to recognize a particle hit and generate the address information. In this way we could benefit from the advantages of the HV sensor technology such as lower cost, lower mass, lower operating voltage, smaller pitch, smaller clusters at high incidence angles. Additionally we expect to achieve a radiation hardness necessary for ATLAS upgrade. In order to test the concept, we have designed two HV-CMOS prototypes that can be readout in two ways: using pixel and strip readout chips. In the case of the pixel readout, the connection between HV-CMOS sensor and the readout ASIC can be established capacitively.

  9. Improved Space Object Orbit Determination Using CMOS Detectors

    NASA Astrophysics Data System (ADS)

    Schildknecht, T.; Peltonen, J.; Sännti, T.; Silha, J.; Flohrer, T.

    2014-09-01

    CMOS-sensors, or in general Active Pixel Sensors (APS), are rapidly replacing CCDs in the consumer camera market. Due to significant technological advances during the past years these devices start to compete with CCDs also for demanding scientific imaging applications, in particular in the astronomy community. CMOS detectors offer a series of inherent advantages compared to CCDs, due to the structure of their basic pixel cells, which each contains their own amplifier and readout electronics. The most prominent advantages for space object observations are the extremely fast and flexible readout capabilities, feasibility for electronic shuttering and precise epoch registration, and the potential to perform image processing operations on-chip and in real-time. The major challenges and design drivers for ground-based and space-based optical observation strategies have been analyzed. CMOS detector characteristics were critically evaluated and compared with the established CCD technology, especially with respect to the above mentioned observations. Similarly, the desirable on-chip processing functionalities which would further enhance the object detection and image segmentation were identified. Finally, we simulated several observation scenarios for ground- and space-based sensor by assuming different observation and sensor properties. We will introduce the analyzed end-to-end simulations of the ground- and space-based strategies in order to investigate the orbit determination accuracy and its sensitivity which may result from different values for the frame-rate, pixel scale, astrometric and epoch registration accuracies. Two cases were simulated, a survey using a ground-based sensor to observe objects in LEO for surveillance applications, and a statistical survey with a space-based sensor orbiting in LEO observing small-size debris in LEO. The ground-based LEO survey uses a dynamical fence close to the Earth shadow a few hours after sunset. For the space-based scenario

  10. Characterization of Si Hybrid CMOS Detectors for use in the Soft X-ray Band

    NASA Astrophysics Data System (ADS)

    Prieskorn, Zachary; Griffith, C.; Bongiorno, S.; Falcone, A.; Burrows, D. N.

    2014-01-01

    In a joint program between Penn State University and Teledyne Imaging Sensors a soft X-ray detector based on the HAWAII Hybrid Si CMOS detector (HCD) has been developed. HCDs could potentially be the optimum detectors for the next generation of X-ray missions, especially those with focused optics and/or large effective area. These innovative detectors are active pixel sensors (APS) which allow a pixel to be read through individual in-pixel electronics, without the need to transfer charge across many pixels, in contrast to a CCD. They are made by bonding a Si absorbing layer to a pixelated CMOS readout, allowing the two layers to be optimized independently. The advantages of this design compared to CCDs are high speed timing 100 μs in full imaging mode), a flexible windowed readout to reduce pile-up, dramatically improved radiation hardness and resistance to micrometeoroid damage, and reduced power requirements. We present recent measurements of energy resolution, read noise, inter-pixel crosstalk, quantum efficiency, and dark current for four of these devices.

  11. A High Frequency Active Voltage Doubler in Standard CMOS Using Offset-Controlled Comparators for Inductive Power Transmission

    PubMed Central

    Lee, Hyung-Min; Ghovanloo, Maysam

    2014-01-01

    In this paper, we present a fully integrated active voltage doubler in CMOS technology using offset-controlled high speed comparators for extending the range of inductive power transmission to implantable microelectronic devices (IMD) and radio-frequency identification (RFID) tags. This active voltage doubler provides considerably higher power conversion efficiency (PCE) and lower dropout voltage compared to its passive counterpart and requires lower input voltage than active rectifiers, leading to reliable and efficient operation with weakly coupled inductive links. The offset-controlled functions in the comparators compensate for turn-on and turn-off delays to not only maximize the forward charging current to the load but also minimize the back current, optimizing PCE in the high frequency (HF) band. We fabricated the active voltage doubler in a 0.5-μm 3M2P std. CMOS process, occupying 0.144 mm2 of chip area. With 1.46 V peak AC input at 13.56 MHz, the active voltage doubler provides 2.4 V DC output across a 1 kΩ load, achieving the highest PCE = 79% ever reported at this frequency. In addition, the built-in start-up circuit ensures a reliable operation at lower voltages. PMID:23853321

  12. Accelerated life testing effects on CMOS microcircuit characteristics

    NASA Technical Reports Server (NTRS)

    1977-01-01

    Accelerated life tests were performed on CMOS microcircuits to predict their long term reliability. The consistency of the CMOS microcircuit activation energy between the range of 125 C to 200 C and the range 200 C to 250 C was determined. Results indicate CMOS complexity and the amount of moisture detected inside the devices after testing influences time to failure of tested CMOS devices.

  13. Fundamental study on identification of CMOS cameras

    NASA Astrophysics Data System (ADS)

    Kurosawa, Kenji; Saitoh, Naoki

    2003-08-01

    In this study, we discussed individual camera identification of CMOS cameras, because CMOS (complementary-metal-oxide-semiconductor) imaging detectors have begun to make their move into the CCD (charge-coupled-device) fields for recent years. It can be identified whether or not the given images have been taken with the given CMOS camera by detecting the imager's intrinsic unique fixed pattern noise (FPN) just like the individual CCD camera identification method proposed by the authors. Both dark and bright pictures taken with the CMOS cameras can be identified by the method, because not only dark current in the photo detectors but also MOS-FET amplifiers incorporated in each pixel may produce pixel-to-pixel nonuniformity in sensitivity. Each pixel in CMOS detectors has the amplifier, which degrades image quality of bright images due to the nonuniformity of the amplifier gain. Two CMOS cameras were evaluated in our experiments. They were WebCamGoPlus (Creative), and EOS D30 (Canon). WebCamGoPlus is a low-priced web camera, whereas EOS D30 is for professional use. Image of a white plate were recorded with the cameras under the plate's luminance condition of 0cd/m2 and 150cd/m2. The recorded images were multiply integrated to reduce the random noise component. From the images of both cameras, characteristic dots patterns were observed. Some bright dots were observed in the dark images, whereas some dark dots were in the bright images. The results show that the camera identification method is also effective for CMOS cameras.

  14. STIS CCD Hot Pixel Annealing

    NASA Astrophysics Data System (ADS)

    Hernandez, Svea

    2013-10-01

    This purpose of this activity is to repair radiation induced hot pixel damage to theSTIS CCD by warming the CCD to the ambient instrument temperature and annealing radiation damaged pixels. Radiation damage creates hot pixels in the STIS CCD Detector. Many of these hot pixels can be repaired by warming the CCD from its normal operating temperature near-83 C to the ambient instrument temperature { +5 C} for several hours. The number of hot pixels repaired is a function of annealing temperature. The effectiveness of the CCD hot pixel annealing process is assessed by measuring the dark current behavior before and after annealing and by searching for any window contamination effects.

  15. Simulation of active-edge pixelated CdTe radiation detectors

    NASA Astrophysics Data System (ADS)

    Duarte, D. D.; Lipp, J. D.; Schneider, A.; Seller, P.; Veale, M. C.; Wilson, M. D.; Baker, M. A.; Sellin, P. J.

    2016-01-01

    The edge surfaces of single crystal CdTe play an important role in the electronic properties and performance of this material as an X-ray and γ-ray radiation detector. Edge effects have previously been reported to reduce the spectroscopic performance of the edge pixels in pixelated CdTe radiation detectors without guard bands. A novel Technology Computer Aided Design (TCAD) model based on experimental data has been developed to investigate these effects. The results presented in this paper show how localized low resistivity surfaces modify the internal electric field of CdTe creating potential wells. These result in a reduction of charge collection efficiency of the edge pixels, which compares well with experimental data.

  16. Simulation on the Charged Particle Response of the STAR Heavy Flavor Tracker Pixel Detector

    NASA Astrophysics Data System (ADS)

    Cimaroli, Alex; Li, Xin

    2009-10-01

    The main task of the STAR experiment, located at the Relativistic Heavy Ion Collider at Brookhaven National Laboratory, is to study the quark-gluon plasma (QGP), which is believed to have been created a few microseconds after the ``Big Bang.'' Heavy quarks are ideal tools for studying the properties of QGP. The Heavy Flavor Tracker (HFT) is the central part of the STAR future heavy flavor physics program and will enable STAR to directly measure heavy flavor mesons. The core of HFT is a pixel detector (PIXEL) using CMOS Active PIXEL Sensor. This poster will describe the development of a detailed simulation of the pixel detector response to charged particles and the corresponding fast simulation that dramatically enhances the simulation speed with little sacrifice in accuracy. The full simulation randomly generates ionized electrons along an incoming track and diffuses the electrons inside the pixel array until they are collected by the electronics or recombined inside a pixel. With the same result, the fast simulation, which quickens processing time from one hour to 5 seconds, generates a grid inside a single pixel and create a map of probability distribution functions for a single ionized electron generated from a grid point. We will also discuss the study of pixel detector position resolution using a simple clustering algorithm.

  17. Optical and noise performance of CMOS solid-state photomultipliers

    NASA Astrophysics Data System (ADS)

    Chen, Xiao Jie; Johnson, Erik B.; Staples, Christopher J.; Chapman, Eric; Alberghini, Guy; Christian, James F.

    2010-08-01

    Solid-state photomultipliers (SSPM) are photodetectors composed of avalanche photodiode pixel arrays operating in Geiger mode (biased above diode breakdown voltage). They are built using CMOS technology and can be used in a variety of applications in high energy and nuclear physics, medical imaging and homeland security related areas. The high gain and low cost associated with the SSPM makes it an attractive alternative to existing photodetectors such as the photomultiplier tube (PMT). The capability of integrating CMOS on-chip readout circuitry on the same substrate as the SSPM also provides a compact and low-power-consumption solution to photodetector applications with stringent area and power requirements. The optical performance of the SSPM, specifically the detection and quantum efficiencies, can depend on the geometry and the doping profile associated with each photodiode pixel. The noise associated with the SSPM not only includes dark noise from each pixel, but also consists of excess noise terms due to after pulsing and inter-pixel cross talk. The magnitude of the excess noise terms can depend on biasing conditions, temperature, as well as pixel and inter-pixel dimensions. We present the optical and noise performance of SSPMs fabricated in a conventional CMOS process, and demonstrate the dependence of the SSPM performance on pixel/inter-pixel geometry, doping profile, temperature, as well as bias conditions. The continuing development of CMOS SSPM technology demonstrated here shows that low cost and high performance solid state photodetectors are viable solutions for many existing and future optical detection applications.

  18. Smart pixels

    NASA Astrophysics Data System (ADS)

    Seitz, Peter

    2004-09-01

    Semiconductor technology progresses at a relentless pace, making it possible to provide image sensors and each pixel with an increasing amount of custom analog and digital functionality. As experience with such photosensor functionality grows, an increasing variety of modular building blocks become available for smart pixels, single-chip digital cameras and functional image sensors. Examples include a non-linear pixel response circuit for high-dynamic range imaging with a dynamic range exceeding 180 dB, low-noise amplifiers and avalanche-effect pixels for high-sensitivity detection performance approaching single-photoelectron resolution, lock-in pixels for optical time-of-flight range cameras with sub-centimeter distance resolution and in-pixel demodulation circuits for optical coherence tomography imaging. The future is seen in system-on-a-chip machine vision cameras ("seeing chips"), post-processing with non-silicon materials for the extension of the detection range to the X-ray, ultraviolet and infrared spectrum, the use of organic semiconductors for low-cost large-area photonic microsystems, as well as imaging of fields other than electromagnetic radiation.

  19. Penrose Pixels for Super-Resolution.

    PubMed

    Ben-Ezra, M; Lin, Zhouchen; Wilburn, Bennett; Zhang, Wei

    2011-07-01

    We present a novel approach to reconstruction-based super-resolution that uses aperiodic pixel tilings, such as a Penrose tiling or a biological retina, for improved performance. To this aim, we develop a new variant of the well-known error back projection super-resolution algorithm that makes use of the exact detector model in its back projection operator for better accuracy. Pixels in our model can vary in shape and size, and there may be gaps between adjacent pixels. The algorithm applies equally well to periodic or aperiodic pixel tilings. We present analysis and extensive tests using synthetic and real images to show that our approach using aperiodic layouts substantially outperforms existing reconstruction-based algorithms for regular pixel arrays. We close with a discussion of the feasibility of manufacturing CMOS or CCD chips with pixels arranged in Penrose tilings.

  20. Measurement results of DIPIX pixel sensor developed in SOI technology

    NASA Astrophysics Data System (ADS)

    Ahmed, Mohammed Imran; Arai, Yasuo; Idzik, Marek; Kapusta, Piotr; Miyoshi, Toshinobu; Turala, Michal

    2013-08-01

    The development of integration type pixel detectors presents interest for physics communities because it brings optimization of design, simplicity of production-which means smaller cost, and reduction of detector material budget. During the last decade a lot of research and development activities took place in the field of CMOS Silicon-On-Insulator (SOI) technology resulting in improvement in wafer size, wafer resistivity and MIM capacitance. Several ideas have been tested successfully and are gradually entering into the application phase. Some of the novel concepts exploring SOI technology are pursued at KEK; several prototypes of dual mode integration type pixel (DIPIX) have been recently produced and described. This report presents initial test results of some of the prototypes including tests obtained with the infrared laser beams and Americium (Am-241) source. The Equivalent Noise Charge (ENC) of 86 e - has been measured. The measured performance demonstrates that SOI technology is a feasible choice for future applications.

  1. Thin n-in-p planar pixel sensors and active edge sensors for the ATLAS upgrade at HL-LHC

    NASA Astrophysics Data System (ADS)

    Terzo, S.; Macchiolo, A.; Nisius, R.; Paschen, B.

    2014-12-01

    Silicon pixel modules employing n-in-p planar sensors with an active thickness of 200 μm, produced at CiS, and 100-200 μm thin active/slim edge sensor devices, produced at VTT in Finland have been interconnected to ATLAS FE-I3 and FE-I4 read-out chips. The thin sensors are designed for high energy physics collider experiments to ensure radiation hardness at high fluences. Moreover, the active edge technology of the VTT production maximizes the sensitive region of the assembly, allowing for a reduced overlap of the modules in the pixel layer close to the beam pipe. The CiS production includes also four chip sensors according to the module geometry planned for the outer layers of the upgraded ATLAS pixel detector to be operated at the HL-LHC. The modules have been characterized using radioactive sources in the laboratory and with high precision measurements at beam tests to investigate the hit efficiency and charge collection properties at different bias voltages and particle incidence angles. The performance of the different sensor thicknesses and edge designs are compared before and after irradiation up to a fluence of 1.4 × 1016 neq/cm2.

  2. Implementation of TDI based digital pixel ROIC with 15μm pixel pitch

    NASA Astrophysics Data System (ADS)

    Ceylan, Omer; Shafique, Atia; Burak, A.; Caliskan, Can; Abbasi, Shahbaz; Yazici, Melik; Gurbuz, Yasar

    2016-05-01

    A 15um pixel pitch digital pixel for LWIR time delay integration (TDI) applications is implemented which occupies one fourth of pixel area compared to previous digital TDI implementation. TDI is implemented on 8 pixels with oversampling rate of 2. ROIC provides 16 bits output with 8 bits of MSB and 8 bits of LSB. Pixel can store 75 M electrons with a quantization noise of 500 electrons. Digital pixel TDI implementation is advantageous over analog counterparts considering power consumption, chip area and signal-to-noise ratio. Digital pixel TDI ROIC is fabricated with 0.18um CMOS process. In digital pixel TDI implementation photocurrent is integrated on a capacitor in pixel and converted to digital data in pixel. This digital data triggers the summation counters which implements TDI addition. After all pixels in a row contribute, the summed data is divided to the number of TDI pixels(N) to have the actual output which is square root of N improved version of a single pixel output in terms of signal-to-noise-ratio (SNR).

  3. Linear dynamic range enhancement in a CMOS imager

    NASA Technical Reports Server (NTRS)

    Pain, Bedabrata (Inventor)

    2008-01-01

    A CMOS imager with increased linear dynamic range but without degradation in noise, responsivity, linearity, fixed-pattern noise, or photometric calibration comprises a linear calibrated dual gain pixel in which the gain is reduced after a pre-defined threshold level by switching in an additional capacitance. The pixel may include a novel on-pixel latch circuit that is used to switch in the additional capacitance.

  4. PIXEL PUSHER

    NASA Technical Reports Server (NTRS)

    Stanfill, D. F.

    1994-01-01

    Pixel Pusher is a Macintosh application used for viewing and performing minor enhancements on imagery. It will read image files in JPL's two primary image formats- VICAR and PDS - as well as the Macintosh PICT format. VICAR (NPO-18076) handles an array of image processing capabilities which may be used for a variety of applications including biomedical image processing, cartography, earth resources, and geological exploration. Pixel Pusher can also import VICAR format color lookup tables for viewing images in pseudocolor (256 colors). This program currently supports only eight bit images but will work on monitors with any number of colors. Arbitrarily large image files may be viewed in a normal Macintosh window. Color and contrast enhancement can be performed with a graphical "stretch" editor (as in contrast stretch). In addition, VICAR images may be saved as Macintosh PICT files for exporting into other Macintosh programs, and individual pixels can be queried to determine their locations and actual data values. Pixel Pusher is written in Symantec's Think C and was developed for use on a Macintosh SE30, LC, or II series computer running System Software 6.0.3 or later and 32 bit QuickDraw. Pixel Pusher will only run on a Macintosh which supports color (whether a color monitor is being used or not). The standard distribution medium for this program is a set of three 3.5 inch Macintosh format diskettes. The program price includes documentation. Pixel Pusher was developed in 1991 and is a copyrighted work with all copyright vested in NASA. Think C is a trademark of Symantec Corporation. Macintosh is a registered trademark of Apple Computer, Inc.

  5. High-Sensitivity X-ray Polarimetry with Amorphous Silicon Active-Matrix Pixel Proportional Counters

    NASA Technical Reports Server (NTRS)

    Black, J. K.; Deines-Jones, P.; Jahoda, K.; Ready, S. E.; Street, R. A.

    2003-01-01

    Photoelectric X-ray polarimeters based on pixel micropattern gas detectors (MPGDs) offer order-of-magnitude improvement in sensitivity over more traditional techniques based on X-ray scattering. This new technique places some of the most interesting astronomical observations within reach of even a small, dedicated mission. The most sensitive instrument would be a photoelectric polarimeter at the focus of 2 a very large mirror, such as the planned XEUS. Our efforts are focused on a smaller pathfinder mission, which would achieve its greatest sensitivity with large-area, low-background, collimated polarimeters. We have recently demonstrated a MPGD polarimeter using amorphous silicon thin-film transistor (TFT) readout suitable for the focal plane of an X-ray telescope. All the technologies used in the demonstration polarimeter are scalable to the areas required for a high-sensitivity collimated polarimeter. Leywords: X-ray polarimetry, particle tracking, proportional counter, GEM, pixel readout

  6. Log polar image sensor in CMOS technology

    NASA Astrophysics Data System (ADS)

    Scheffer, Danny; Dierickx, Bart; Pardo, Fernando; Vlummens, Jan; Meynants, Guy; Hermans, Lou

    1996-08-01

    We report on the design, design issues, fabrication and performance of a log-polar CMOS image sensor. The sensor is developed for the use in a videophone system for deaf and hearing impaired people, who are not capable of communicating through a 'normal' telephone. The system allows 15 detailed images per second to be transmitted over existing telephone lines. This framerate is sufficient for conversations by means of sign language or lip reading. The pixel array of the sensor consists of 76 concentric circles with (up to) 128 pixels per circle, in total 8013 pixels. The interior pixels have a pitch of 14 micrometers, up to 250 micrometers at the border. The 8013-pixels image is mapped (log-polar transformation) in a X-Y addressable 76 by 128 array.

  7. A New Low Temperature Polycrystalline Silicon Thin Film Transistor Pixel Circuit for Active Matrix Organic Light Emitting Diode

    NASA Astrophysics Data System (ADS)

    Ching-Lin Fan,; Yi-Yan Lin,; Jyu-Yu Chang,; Bo-Jhang Sun,; Yan-Wei Liu,

    2010-06-01

    This study presents one novel compensation pixel design and driving method for active matrix organic light-emitting diode (AMOLED) displays that use low-temperature polycrystalline silicon thin-film transistors (LTPS-TFTs) with a voltage feed-back method and the simulation results are proposed and verified by SPICE simulator. The measurement and simulation of LTPS TFT characteristics demonstrate the good fitting result. The proposed circuit consists of four TFTs and two capacitors with an additional signal line. The error rates of OLED anode voltage variation are below 0.3% under the threshold voltage deviation of driving TFT (Δ VTH = ± 0.33 V). The simulation results show that the pixel design can improve the display image non-uniformity by compensating the threshold voltage deviation of driving TFT and the degradation of OLED threshold voltage at the same time.

  8. A New Low Temperature Polycrystalline Silicon Thin Film Transistor Pixel Circuit for Active Matrix Organic Light Emitting Diode

    NASA Astrophysics Data System (ADS)

    Fan, Ching-Lin; Lin, Yi-Yan; Chang, Jyu-Yu; Sun, Bo-Jhang; Liu, Yan-Wei

    2010-06-01

    This study presents one novel compensation pixel design and driving method for active matrix organic light-emitting diode (AMOLED) displays that use low-temperature polycrystalline silicon thin-film transistors (LTPS-TFTs) with a voltage feed-back method and the simulation results are proposed and verified by SPICE simulator. The measurement and simulation of LTPS TFT characteristics demonstrate the good fitting result. The proposed circuit consists of four TFTs and two capacitors with an additional signal line. The error rates of OLED anode voltage variation are below 0.3% under the threshold voltage deviation of driving TFT (ΔVTH = ±0.33 V). The simulation results show that the pixel design can improve the display image non-uniformity by compensating the threshold voltage deviation of driving TFT and the degradation of OLED threshold voltage at the same time.

  9. Thin active region, type II superlattice photodiode arrays: Single-pixel and focal plane array characterization

    NASA Astrophysics Data System (ADS)

    Little, J. W.; Svensson, S. P.; Beck, W. A.; Goldberg, A. C.; Kennerly, S. W.; Hongsmatip, T.; Winn, M.; Uppal, P.

    2007-02-01

    We have measured the radiometric properties of two midwave infrared photodiode arrays (320×256pixel2 format) fabricated from the same wafer comprising a thin (0.24μm), not intentionally doped InAs /GaSb superlattice between a p-doped GaSb layer and a n-doped InAs layer. One of the arrays was indium bump bonded to a silicon fanout chip to allow for the measurement of properties of individual pixels, and one was bonded to a readout integrated circuit to enable array-scale measurements and infrared imaging. The superlattice layer is thin enough that it is fully depleted at zero bias, and the collection efficiency of photogenerated carriers in the intrinsic region is close to unity. This simplifies the interpretation of photocurrent data as compared with previous measurements made on thick superlattices with complex doping profiles. Superlattice absorption coefficient curves, obtained from measurements of the external quantum efficiency using two different assumptions for optical coupling into the chip, bracket values calculated using an eight-band k •p model. Measurements of the quantum efficiency map of the focal plane array were in good agreement with the single-pixel measurements. Imagery obtained with this focal plane array demonstrates the high uniformity and crystal quality of the type II superlattice material.

  10. Pixel Paradise

    NASA Technical Reports Server (NTRS)

    1998-01-01

    PixelVision, Inc., has developed a series of integrated imaging engines capable of high-resolution image capture at dynamic speeds. This technology was used originally at Jet Propulsion Laboratory in a series of imaging engines for a NASA mission to Pluto. By producing this integrated package, Charge-Coupled Device (CCD) technology has been made accessible to a wide range of users.

  11. Design and image-quality performance of high resolution CMOS-based X-ray imaging detectors for digital mammography

    NASA Astrophysics Data System (ADS)

    Cha, B. K.; Kim, J. Y.; Kim, Y. J.; Yun, S.; Cho, G.; Kim, H. K.; Seo, C.-W.; Jeon, S.; Huh, Y.

    2012-04-01

    In digital X-ray imaging systems, X-ray imaging detectors based on scintillating screens with electronic devices such as charge-coupled devices (CCDs), thin-film transistors (TFT), complementary metal oxide semiconductor (CMOS) flat panel imagers have been introduced for general radiography, dental, mammography and non-destructive testing (NDT) applications. Recently, a large-area CMOS active-pixel sensor (APS) in combination with scintillation films has been widely used in a variety of digital X-ray imaging applications. We employed a scintillator-based CMOS APS image sensor for high-resolution mammography. In this work, both powder-type Gd2O2S:Tb and a columnar structured CsI:Tl scintillation screens with various thicknesses were fabricated and used as materials to convert X-ray into visible light. These scintillating screens were directly coupled to a CMOS flat panel imager with a 25 × 50 mm2 active area and a 48 μm pixel pitch for high spatial resolution acquisition. We used a W/Al mammographic X-ray source with a 30 kVp energy condition. The imaging characterization of the X-ray detector was measured and analyzed in terms of linearity in incident X-ray dose, modulation transfer function (MTF), noise-power spectrum (NPS) and detective quantum efficiency (DQE).

  12. Pixel Perfect

    SciTech Connect

    Perrine, Kenneth A.; Hopkins, Derek F.; Lamarche, Brian L.; Sowa, Marianne B.

    2005-09-01

    Biologists and computer engineers at Pacific Northwest National Laboratory have specified, designed, and implemented a hardware/software system for performing real-time, multispectral image processing on a confocal microscope. This solution is intended to extend the capabilities of the microscope, enabling scientists to conduct advanced experiments on cell signaling and other kinds of protein interactions. FRET (fluorescence resonance energy transfer) techniques are used to locate and monitor protein activity. In FRET, it is critical that spectral images be precisely aligned with each other despite disturbances in the physical imaging path caused by imperfections in lenses and cameras, and expansion and contraction of materials due to temperature changes. The central importance of this work is therefore automatic image registration. This runs in a framework that guarantees real-time performance (processing pairs of 1024x1024, 8-bit images at 15 frames per second) and enables the addition of other types of advanced image processing algorithms such as image feature characterization. The supporting system architecture consists of a Visual Basic front-end containing a series of on-screen interfaces for controlling various aspects of the microscope and a script engine for automation. One of the controls is an ActiveX component written in C++ for handling the control and transfer of images. This component interfaces with a pair of LVDS image capture boards and a PCI board containing a 6-million gate Xilinx Virtex-II FPGA. Several types of image processing are performed on the FPGA in a pipelined fashion, including the image registration. The FPGA offloads work that would otherwise need to be performed by the main CPU and has a guaranteed real-time throughput. Image registration is performed in the FPGA by applying a cubic warp on one image to precisely align it with the other image. Before each experiment, an automated calibration procedure is run in order to set up the

  13. Fabrication of CMOS image sensors

    NASA Astrophysics Data System (ADS)

    Malinovich, Yacov; Koltin, Ephie; Choen, David; Shkuri, Moshe; Ben-Simon, Meir

    1999-04-01

    In order to provide its customers with sub-micron CMOS fabrication solutions for imaging applications, Tower Semiconductor initiated a project to characterize the optical parameters of Tower's 0.5-micron process. A special characterization test chip was processed using the TS50 process. The results confirmed a high quality process for optical applications. Perhaps the most important result is the process' very low dark current, of 30-50 pA/cm2, using the entire window of process. This very low dark current characteristic was confirmed for a variety of pixel architectures. Additionally, we have succeeded to reduce and virtually eliminate the white spots on large sensor arrays. As a foundry Tower needs to support fabrication of many different imaging products. Therefore we have developed a fabrication methodology that is adjusted to the special needs of optical applications. In order to establish in-line process monitoring of the optical parameters, Tower places a scribe line optical test chip that enables wafer level measurements of the most important parameters, ensuring the optical quality and repeatability of the process. We have developed complementary capabilities like in house deposition of color filter and fabrication of very large are dice using sub-micron CMOS technologies. Shellcase and Tower are currently developing a new CMOS image sensor optical package.

  14. Reading a GEM with a VLSI pixel ASIC used as a direct charge collecting anode

    NASA Astrophysics Data System (ADS)

    Bellazzini, R.; Angelini, F.; Baldini, L.; Bitti, F.; Brez, A.; Ceccanti, M.; Latronico, L.; Massai, M. M.; Minuti, M.; Omodei, N.; Razzano, M.; Sgro, C.; Spandre, G.; Costa, E.; Soffitta, P.

    2004-12-01

    In MicroPattern Gas Detectors (MPGD) when the pixel size is below 100 micron and the number of pixels is large (above 1000) it is virtually impossible to use the conventional PCB read-out approach to bring the signal charge from the individual pixel to the external electronics chain. For this reason a custom CMOS array of 2101 active pixels with 80 micron pitch, directly used as the charge collecting anode of a GEM amplifying structure, has been developed and built. Each charge collecting pad, hexagonally shaped, realized using the top metal layer of a deep submicron VLSI technology is individually connected to a full electronics chain (pre-amplifier, shaping-amplifier, sample and hold, multiplexer) which is built immediately below it by using the remaining five active layers. The GEM and the drift electrode window are assembled directly over the chip so the ASIC itself becomes the pixelized anode of a MicroPattern Gas Detector. With this approach, for the first time, gas detectors have reached the level of integration and resolution typical of solid state pixel detectors. Results from the first tests of this new read-out concept are presented. An Astronomical X-Ray Polarimetry application is also discussed.

  15. A 2D imager for X-ray FELs with a 65 nm CMOS readout based on per-pixel signal compression and 10 bit A/D conversion

    NASA Astrophysics Data System (ADS)

    Ratti, L.; Comotti, D.; Fabris, L.; Grassi, M.; Lodola, L.; Malcovati, P.; Manghisoni, M.; Re, V.; Traversi, G.; Vacchi, C.; Rizzo, G.; Batignani, G.; Bettarini, S.; Casarosa, G.; Forti, F.; Giorgi, M.; Morsani, F.; Paladino, A.; Paoloni, E.; Pancheri, L.; Dalla Betta, G.-F.; Mendicino, R.; Verzellesi, G.; Xu, H.; Benkechkache, M. A.

    2016-09-01

    A readout channel for applications to X-ray diffraction imaging at free electron lasers has been developed in a 65 nm CMOS technology. The analog front-end circuit can achieve an input dynamic range of 100 dB by leveraging a novel signal compression technique based on the non-linear features of MOS capacitors. Trapezoidal shaping is accomplished through a transconductor and a switched capacitor circuit, performing gated integration and correlated double sampling. A small area, low power 10 bit successive approximation register (SAR) ADC, operated in a time-interleaved fashion, is used for numerical conversion of the amplitude measurement. Operation at 5 MHz of the analog channel including the shaper was demonstrated. Also, the channel was found to be compliant with single 1 keV photon resolution at 1.25 MHz. The ADC provides a signal-to-noise ratio (SNR) of 56 dB, corresponding to an equivalent number of bits (ENOB) of 9 bits, and a differential non linearity DNL < 1 LSB at a sampling rate slightly larger than 1.8 MHz.

  16. Low-dose performance of wafer-scale CMOS-based X-ray detectors

    NASA Astrophysics Data System (ADS)

    Maes, Willem H.; Peters, Inge M.; Smit, Chiel; Kessener, Yves; Bosiers, Jan

    2015-03-01

    Compared to published amorphous-silicon (TFT) based X-ray detectors, crystalline silicon CMOS-based active-pixel detectors exploit the benefits of low noise, high speed, on-chip integration and featuring offered by CMOS technology. This presentation focuses on the specific advantage of high image quality at very low dose levels. The measurement of very low dose performance parameters like Detective Quantum Efficiency (DQE) and Noise Equivalent Dose (NED) is a challenge by itself. Second-order effects like defect pixel behavior, temporal and quantization noise effects, dose measurement accuracy and limitation of the x-ray source settings will influence the measurements at very low dose conditions. Using an analytical model to predict the low dose behavior of a detector from parameters extracted from shot-noise limited dose levels is presented. These models can also provide input for a simulation environment for optimizing the performance of future detectors. In this paper, models for predicting NED and the DQE at very low dose are compared to measurements on different CMOS detectors. Their validity for different sensor and optical stack combinations as well as for different x-ray beam conditions was validated.

  17. Vertical Isolation for Photodiodes in CMOS Imagers

    NASA Technical Reports Server (NTRS)

    Pain, Bedabrata

    2008-01-01

    In a proposed improvement in complementary metal oxide/semi conduct - or (CMOS) image detectors, two additional implants in each pixel would effect vertical isolation between the metal oxide/semiconductor field-effect transistors (MOSFETs) and the photodiode of the pixel. This improvement is expected to enable separate optimization of the designs of the photodiode and the MOSFETs so as to optimize their performances independently of each other. The purpose to be served by enabling this separate optimization is to eliminate or vastly reduce diffusion cross-talk, thereby increasing sensitivity, effective spatial resolution, and color fidelity while reducing noise.

  18. A 0.18-µm CMOS Array Sensor for Integrated Time-Resolved Fluorescence Detection

    PubMed Central

    Huang, Ta-chien D.; Sorgenfrei, Sebastian; Gong, Ping; Levicky, Rastislav; Shepard, Kenneth L.

    2010-01-01

    This paper describes the design of an active, integrated CMOS sensor array for fluorescence applications which enables time-gated, time-resolved fluorescence spectroscopy. The 64-by-64 array is sensitive to photon densities as low as 8.8 × 106 photons/cm2 with 64-point averaging and, through a differential pixel design, has a measured impulse response of better than 800 ps. Applications include both active microarrays and high-frame-rate imagers for fluorescence lifetime imaging microscopy. PMID:20436922

  19. A new architecture of current-mode CMOS TDI Sensor

    NASA Astrophysics Data System (ADS)

    Ji, Cheng; Chen, Yongping

    2015-10-01

    Nowadays, CMOS sensors still suffer from the problem of low SNR, especially in the stage of low illumination and high relative scanning velocity. Lots of methods have been develop to overcome this problem. Among these researches, TDI (Time Delay Integration) architecture is a more natural choice, which is natively supported by CCD sensors. In this paper a new kind of proposed current-mode sensor is used to achieve TDI operation in analog domain. The circuit is composed of three main parts. At first, a current-type pixel is proposed, in which the active MOSFET is operated in the triode region to ensure the output current is linearly dependent on the gate voltage and avoid the reduction of threshold voltage in the traditional voltage mode pixels, such as 3T, 4T which use the source followers as its active part. Then a discrete double sampling (DDS) unit, which is operated in the form of currents is used to efficiently reduce the fixed pattern noise (FPN) and make the output is independent of reset voltage of pixels. For accumulation, an improved current mirror adder under controlled of timing circuits is proposed to overcome the problem of saturation suffered in voltage domain. Some main noise sources, especially come from analog sample and holds capacitors and switches is analyzed. Finally, simulation results with CSMC 0.5um technology and Cadence IC show that the proposed method is reasonable and efficient to improve the SNR.

  20. High-speed binary CMOS image sensor using a high-responsivity MOSFET-type photodetector

    NASA Astrophysics Data System (ADS)

    Choi, Byoung-Soo; Jo, Sung-Hyun; Bae, Myunghan; Choi, Pyung; Shin, Jang-Kyoo

    2015-03-01

    In this paper, a complementary metal oxide semiconductor (CMOS) binary image sensor based on a gate/body-tied (GBT) MOSFET-type photodetector is proposed. The proposed CMOS binary image sensor was simulated and measured using a standard CMOS 0.18-μm process. The GBT MOSFET-type photodetector is composed of a floating gate (n+- polysilicon) tied to the body (n-well) of the p-type MOSFET. The size of the active pixel sensor (APS) using GBT photodetector is smaller than that of APS using the photodiode. This means that the resolution of the image can be increased. The high-gain GBT photodetector has a higher photosensitivity compared to the p-n junction photodiode that is used in a conventional APS. Because GBT has a high sensitivity, fast operation of the binary processing is possible. A CMOS image sensor with the binary processing can be designed with simple circuits composed of a comparator and a Dflip- flop while a complex analog to digital converter (ADC) is not required. In addition, the binary image sensor has low power consumption and high speed operation with the ability to switch back and forth between a binary mode and an analog mode.

  1. CMOS Compatible Integrated Thermoelectric Sensors Using Novel Frontside Micromachining

    NASA Astrophysics Data System (ADS)

    Socher, E.; Bochobza-Degani, O.; Nemirovsky, Y.

    2000-12-01

    CMOS compatible integrated thermoelectric sensors were designed and realized using a standard CMOS process and frontside RIE micromachining. The suspended structures were designed to have a spiral structure that enhances the thermal resistance and isolation of the sensor. Using dry RIE frontside micromachining for the release of the sensors allows better yield in realization of sensitive and smaller sensor pixels. Measured results of sensors used for IR detection show NEP's down to 0.4 nW/√Hz and response times down to 3 msec in 70*70 μm2 pixels.

  2. Photon counting system based on intensified CMOS-APS: PC-IAPS

    NASA Astrophysics Data System (ADS)

    Bonanno, Giovanni; Belluso, Massimiliano; Cali, Antonio; Timpanaro, Maria C.; Uslenghi, Michela C.; Fiorini, Mauro; Modica, Angelo

    2001-12-01

    A progress report on the work, started ten months ago, aimed to evaluate the use of a new type of position sensor (Complementary Metal Oxide Semiconductor Active Pixel Sensor or CMOS-APS) as readout system in MCP-based intensified photon counting systems, is presented in this paper. The main differences respect to the more classical Photon Counting Intensified CCDs (PC-ICCD), the advantages and the disadvantages of their use as image photon counters, the adopted solutions to acquire the images and compute the photon event center, are described. The adopted optics and the designed mechanical assembly are also shown. The selected CMOS-APS, heart of the system, is treated in detail, as well as the electronics designed to drive the detector, to compute the center of the luminous spot on the MCP phosphor screen, and to send and receive data from a host computer. Finally we present preliminary results and achieved performances.

  3. Imaging properties of pixellated scintillators with deep pixels

    NASA Astrophysics Data System (ADS)

    Barber, H. Bradford; Fastje, David; Lemieux, Daniel; Grim, Gary P.; Furenlid, Lars R.; Miller, Brian W.; Parkhurst, Philip; Nagarkar, Vivek V.

    2014-09-01

    We have investigated the light-transport properties of scintillator arrays with long, thin pixels (deep pixels) for use in high-energy gamma-ray imaging. We compared 10x10 pixel arrays of YSO:Ce, LYSO:Ce and BGO (1mm x 1mm x 20 mm pixels) made by Proteus, Inc. with similar 10x10 arrays of LSO:Ce and BGO (1mm x 1mm x 15mm pixels) loaned to us by Saint-Gobain. The imaging and spectroscopic behaviors of these scintillator arrays are strongly affected by the choice of a reflector used as an inter-pixel spacer (3M ESR in the case of the Proteus arrays and white, diffuse-reflector for the Saint-Gobain arrays). We have constructed a 3700-pixel LYSO:Ce Prototype NIF Gamma-Ray Imager for use in diagnosing target compression in inertial confinement fusion. This system was tested at the OMEGA Laser and exhibited significant optical, inter-pixel cross-talk that was traced to the use of a single-layer of ESR film as an inter-pixel spacer. We show how the optical cross-talk can be mapped, and discuss correction procedures. We demonstrate a 10x10 YSO:Ce array as part of an iQID (formerly BazookaSPECT) imager and discuss issues related to the internal activity of 176Lu in LSO:Ce and LYSO:Ce detectors.

  4. Active hyperspectral imaging using a quantum cascade laser (QCL) array and digital-pixel focal plane array (DFPA) camera.

    PubMed

    Goyal, Anish; Myers, Travis; Wang, Christine A; Kelly, Michael; Tyrrell, Brian; Gokden, B; Sanchez, Antonio; Turner, George; Capasso, Federico

    2014-06-16

    We demonstrate active hyperspectral imaging using a quantum-cascade laser (QCL) array as the illumination source and a digital-pixel focal-plane-array (DFPA) camera as the receiver. The multi-wavelength QCL array used in this work comprises 15 individually addressable QCLs in which the beams from all lasers are spatially overlapped using wavelength beam combining (WBC). The DFPA camera was configured to integrate the laser light reflected from the sample and to perform on-chip subtraction of the passive thermal background. A 27-frame hyperspectral image was acquired of a liquid contaminant on a diffuse gold surface at a range of 5 meters. The measured spectral reflectance closely matches the calculated reflectance. Furthermore, the high-speed capabilities of the system were demonstrated by capturing differential reflectance images of sand and KClO3 particles that were moving at speeds of up to 10 m/s.

  5. Measurements and simulations of MAPS (Monolithic Active Pixel Sensors) response to charged particles - a study towards a vertex detector at the ILC

    NASA Astrophysics Data System (ADS)

    Maczewski, Lukasz

    2010-05-01

    The International Linear Collider (ILC) is a project of an electron-positron (e+e-) linear collider with the centre-of-mass energy of 200-500 GeV. Monolithic Active Pixel Sensors (MAPS) are one of the proposed silicon pixel detector concepts for the ILC vertex detector (VTX). Basic characteristics of two MAPS pixel matrices MIMOSA-5 (17 μm pixel pitch) and MIMOSA-18 (10 μm pixel pitch) are studied and compared (pedestals, noises, calibration of the ADC-to-electron conversion gain, detector efficiency and charge collection properties). The e+e- collisions at the ILC will be accompanied by intense beamsstrahlung background of electrons and positrons hitting inner planes of the vertex detector. Tracks of this origin leave elongated clusters contrary to those of secondary hadrons. Cluster characteristics and orientation with respect to the pixels netting are studied for perpendicular and inclined tracks. Elongation and precision of determining the cluster orientation as a function of the angle of incidence were measured. A simple model of signal formation (based on charge diffusion) is proposed and tested using the collected data.

  6. An investigation of signal performance enhancements achieved through innovative pixel design across several generations of indirect detection, active matrix, flat-panel arrays

    SciTech Connect

    Antonuk, Larry E.; Zhao Qihua; El-Mohri, Youcef; Du Hong; Wang Yi; Street, Robert A.; Ho, Jackson; Weisfield, Richard; Yao, William

    2009-07-15

    Active matrix flat-panel imager (AMFPI) technology is being employed for an increasing variety of imaging applications. An important element in the adoption of this technology has been significant ongoing improvements in optical signal collection achieved through innovations in indirect detection array pixel design. Such improvements have a particularly beneficial effect on performance in applications involving low exposures and/or high spatial frequencies, where detective quantum efficiency is strongly reduced due to the relatively high level of additive electronic noise compared to signal levels of AMFPI devices. In this article, an examination of various signal properties, as determined through measurements and calculations related to novel array designs, is reported in the context of the evolution of AMFPI pixel design. For these studies, dark, optical, and radiation signal measurements were performed on prototype imagers incorporating a variety of increasingly sophisticated array designs, with pixel pitches ranging from 75 to 127 {mu}m. For each design, detailed measurements of fundamental pixel-level properties conducted under radiographic and fluoroscopic operating conditions are reported and the results are compared. A series of 127 {mu}m pitch arrays employing discrete photodiodes culminated in a novel design providing an optical fill factor of {approx}80% (thereby assuring improved x-ray sensitivity), and demonstrating low dark current, very low charge trapping and charge release, and a large range of linear signal response. In two of the designs having 75 and 90 {mu}m pitches, a novel continuous photodiode structure was found to provide fill factors that approach the theoretical maximum of 100%. Both sets of novel designs achieved large fill factors by employing architectures in which some, or all of the photodiode structure was elevated above the plane of the pixel addressing transistor. Generally, enhancement of the fill factor in either discrete or

  7. An investigation of signal performance enhancements achieved through innovative pixel design across several generations of indirect detection, active matrix, flat-panel arrays

    PubMed Central

    Antonuk, Larry E.; Zhao, Qihua; El-Mohri, Youcef; Du, Hong; Wang, Yi; Street, Robert A.; Ho, Jackson; Weisfield, Richard; Yao, William

    2009-01-01

    Active matrix flat-panel imager (AMFPI) technology is being employed for an increasing variety of imaging applications. An important element in the adoption of this technology has been significant ongoing improvements in optical signal collection achieved through innovations in indirect detection array pixel design. Such improvements have a particularly beneficial effect on performance in applications involving low exposures and∕or high spatial frequencies, where detective quantum efficiency is strongly reduced due to the relatively high level of additive electronic noise compared to signal levels of AMFPI devices. In this article, an examination of various signal properties, as determined through measurements and calculations related to novel array designs, is reported in the context of the evolution of AMFPI pixel design. For these studies, dark, optical, and radiation signal measurements were performed on prototype imagers incorporating a variety of increasingly sophisticated array designs, with pixel pitches ranging from 75 to 127 μm. For each design, detailed measurements of fundamental pixel-level properties conducted under radiographic and fluoroscopic operating conditions are reported and the results are compared. A series of 127 μm pitch arrays employing discrete photodiodes culminated in a novel design providing an optical fill factor of ∼80% (thereby assuring improved x-ray sensitivity), and demonstrating low dark current, very low charge trapping and charge release, and a large range of linear signal response. In two of the designs having 75 and 90 μm pitches, a novel continuous photodiode structure was found to provide fill factors that approach the theoretical maximum of 100%. Both sets of novel designs achieved large fill factors by employing architectures in which some, or all of the photodiode structure was elevated above the plane of the pixel addressing transistor. Generally, enhancement of the fill factor in either discrete or continuous

  8. High-performance VGA-resolution digital color CMOS imager

    NASA Astrophysics Data System (ADS)

    Agwani, Suhail; Domer, Steve; Rubacha, Ray; Stanley, Scott

    1999-04-01

    This paper discusses the performance of a new VGA resolution color CMOS imager developed by Motorola on a 0.5micrometers /3.3V CMOS process. This fully integrated, high performance imager has on chip timing, control, and analog signal processing chain for digital imaging applications. The picture elements are based on 7.8micrometers active CMOS pixels that use pinned photodiodes for higher quantum efficiency and low noise performance. The image processing engine includes a bank of programmable gain amplifiers, line rate clamping for dark offset removal, real time auto white balancing, per column gain and offset calibration, and a 10 bit pipelined RSD analog to digital converter with a programmable input range. Post ADC signal processing includes features such as bad pixel replacement based on user defined thresholds levels, 10 to 8 bit companding and 5 tap FIR filtering. The sensor can be programmed via a standard I2C interface that runs on 3.3V clocks. Programmable features include variable frame rates using a constant frequency master clock, electronic exposure control, continuous or single frame capture, progressive or interlace scanning modes. Each pixel is individually addressable allowing region of interest imaging and image subsampling. The sensor operates with master clock frequencies of up to 13.5MHz resulting in 30FPS. A total programmable gain of 27dB is available. The sensor power dissipation is 400mW at full speed of operation. The low noise design yields a measured 'system on a chip' dynamic range of 50dB thus giving over 8 true bits of resolution. Extremely high conversion gain result in an excellent peak sensitivity of 22V/(mu) J/cm2 or 3.3V/lux-sec. This monolithic image capture and processing engine represent a compete imaging solution making it a true 'camera on a chip'. Yet in its operation it remains extremely easy to use requiring only one clock and a 3.3V power supply. Given the available features and performance levels, this sensor will be

  9. CMOS Detector Technology

    NASA Astrophysics Data System (ADS)

    Hoffman, Alan; Loose, Markus; Suntharalingam, Vyshnavi

    2005-01-01

    An entry level overview of state-of-the-art CMOS detector technology is presented. Operating principles and system architecture are explained in comparison to the well-established CCD technology, followed by a discussion of important benefits of modern CMOS-based detector arrays. A number of unique CMOS features including different shutter modes and scanning concepts are described. In addition, sub-field stitching is presented as a technique for producing very large imagers. After a brief introduction to the concept of monolithic CMOS sensors, hybrid detectors technology is introduced. A comparison of noise reduction methods for CMOS hybrids is presented. The final sections review CMOS fabrication processes for monolithic and vertically integrated image sensors.

  10. Modulated CMOS camera for fluorescence lifetime microscopy.

    PubMed

    Chen, Hongtao; Holst, Gerhard; Gratton, Enrico

    2015-12-01

    Widefield frequency-domain fluorescence lifetime imaging microscopy (FD-FLIM) is a fast and accurate method to measure the fluorescence lifetime of entire images. However, the complexity and high costs involved in construction of such a system limit the extensive use of this technique. PCO AG recently released the first luminescence lifetime imaging camera based on a high frequency modulated CMOS image sensor, QMFLIM2. Here we tested and provide operational procedures to calibrate the camera and to improve the accuracy using corrections necessary for image analysis. With its flexible input/output options, we are able to use a modulated laser diode or a 20 MHz pulsed white supercontinuum laser as the light source. The output of the camera consists of a stack of modulated images that can be analyzed by the SimFCS software using the phasor approach. The nonuniform system response across the image sensor must be calibrated at the pixel level. This pixel calibration is crucial and needed for every camera settings, e.g. modulation frequency and exposure time. A significant dependency of the modulation signal on the intensity was also observed and hence an additional calibration is needed for each pixel depending on the pixel intensity level. These corrections are important not only for the fundamental frequency, but also for the higher harmonics when using the pulsed supercontinuum laser. With these post data acquisition corrections, the PCO CMOS-FLIM camera can be used for various biomedical applications requiring a large frame and high speed acquisition. PMID:26500051

  11. Modulated CMOS camera for fluorescence lifetime microscopy.

    PubMed

    Chen, Hongtao; Holst, Gerhard; Gratton, Enrico

    2015-12-01

    Widefield frequency-domain fluorescence lifetime imaging microscopy (FD-FLIM) is a fast and accurate method to measure the fluorescence lifetime of entire images. However, the complexity and high costs involved in construction of such a system limit the extensive use of this technique. PCO AG recently released the first luminescence lifetime imaging camera based on a high frequency modulated CMOS image sensor, QMFLIM2. Here we tested and provide operational procedures to calibrate the camera and to improve the accuracy using corrections necessary for image analysis. With its flexible input/output options, we are able to use a modulated laser diode or a 20 MHz pulsed white supercontinuum laser as the light source. The output of the camera consists of a stack of modulated images that can be analyzed by the SimFCS software using the phasor approach. The nonuniform system response across the image sensor must be calibrated at the pixel level. This pixel calibration is crucial and needed for every camera settings, e.g. modulation frequency and exposure time. A significant dependency of the modulation signal on the intensity was also observed and hence an additional calibration is needed for each pixel depending on the pixel intensity level. These corrections are important not only for the fundamental frequency, but also for the higher harmonics when using the pulsed supercontinuum laser. With these post data acquisition corrections, the PCO CMOS-FLIM camera can be used for various biomedical applications requiring a large frame and high speed acquisition.

  12. A PFM based digital pixel with off-pixel residue measurement for 15μm pitch MWIR FPAs

    NASA Astrophysics Data System (ADS)

    Abbasi, Shahbaz; Shafique, Atia; Galioglu, Arman; Ceylan, Omer; Yazici, Melik; Gurbuz, Yasar

    2016-05-01

    Digital pixels based on pulse frequency modulation (PFM) employ counting techniques to achieve very high charge handling capability compared to their analog counterparts. Moreover, extended counting methods making use of leftover charge (residue) on the integration capacitor help improve the noise performance of these pixels. However, medium wave infrared (MWIR) focal plane arrays (FPAs) having smaller pixel pitch are constrained in terms of pixel area which makes it difficult to add extended counting circuitry to the pixel. Thus, this paper investigates the performance of digital pixels employing off-pixel residue measurement. A circuit prototype of such a pixel has been designed for 15μm pixel pitch and fabricated in 90nm CMOS. The prototype is composed of a pixel front-end based on a PFM loop. The frontend is a modified version of conventional design providing a means for buffering the signal that needs to be converted to a digital value by an off-pixel ADC. The pixel has an integration phase and a residue measurement phase. Measured integration performance of the pixel has been reported in this paper for various detector currents and integration times.

  13. Direct readout of gaseous detectors with tiled CMOS circuits

    NASA Astrophysics Data System (ADS)

    Visschers, J. L.; Blanco Carballo, V.; Chefdeville, M.; Colas, P.; van der Graaf, H.; Schmitz, J.; Smits, S.; Timmermans, J.

    2007-03-01

    A coordinated design effort is underway, exploring the three-dimensional direct readout of gaseous detectors by an anode plate equipped with a tiled array of many CMOS pixel readout ASICs, having amplification grids integrated on their topsides and being contacted on their backside.

  14. CMOS cassette for digital upgrade of film-based mammography systems

    NASA Astrophysics Data System (ADS)

    Baysal, Mehmet A.; Toker, Emre

    2006-03-01

    While full-field digital mammography (FFDM) technology is gaining clinical acceptance, the overwhelming majority (96%) of the installed base of mammography systems are conventional film-screen (FSM) systems. A high performance, and economical digital cassette based product to conveniently upgrade FSM systems to FFDM would accelerate the adoption of FFDM, and make the clinical and technical advantages of FFDM available to a larger population of women. The planned FFDM cassette is based on our commercial Digital Radiography (DR) cassette for 10 cm x 10 cm field-of-view spot imaging and specimen radiography, utilizing a 150 micron columnar CsI(Tl) scintillator and 48 micron active-pixel CMOS sensor modules. Unlike a Computer Radiography (CR) cassette, which requires an external digitizer, our DR cassette transfers acquired images to a display workstation within approximately 5 seconds of exposure, greatly enhancing patient flow. We will present the physical performance of our prototype system against other FFDM systems in clinical use today, using established objective criteria such as the Modulation Transfer Function (MTF), Detective Quantum Efficiency (DQE), and subjective criteria, such as a contrast-detail (CD-MAM) observer performance study. Driven by the strong demand from the computer industry, CMOS technology is one of the lowest cost, and the most readily accessible technologies available for FFDM today. Recent popular use of CMOS imagers in high-end consumer cameras have also resulted in significant advances in the imaging performance of CMOS sensors against rivaling CCD sensors. This study promises to take advantage of these unique features to develop the first CMOS based FFDM upgrade cassette.

  15. Current-mode CMOS hybrid image sensor

    NASA Astrophysics Data System (ADS)

    Benyhesan, Mohammad Kassim

    Digital imaging is growing rapidly making Complimentary Metal-Oxide-Semi conductor (CMOS) image sensor-based cameras indispensable in many modern life devices like cell phones, surveillance devices, personal computers, and tablets. For various purposes wireless portable image systems are widely deployed in many indoor and outdoor places such as hospitals, urban areas, streets, highways, forests, mountains, and towers. However, the increased demand on high-resolution image sensors and improved processing features is expected to increase the power consumption of the CMOS sensor-based camera systems. Increased power consumption translates into a reduced battery life-time. The increased power consumption might not be a problem if there is access to a nearby charging station. On the other hand, the problem arises if the image sensor is located in widely spread areas, unfavorable to human intervention, and difficult to reach. Given the limitation of energy sources available for wireless CMOS image sensor, an energy harvesting technique presents a viable solution to extend the sensor life-time. Energy can be harvested from the sun light or the artificial light surrounding the sensor itself. In this thesis, we propose a current-mode CMOS hybrid image sensor capable of energy harvesting and image capture. The proposed sensor is based on a hybrid pixel that can be programmed to perform the task of an image sensor and the task of a solar cell to harvest energy. The basic idea is to design a pixel that can be configured to exploit its internal photodiode to perform two functions: image sensing and energy harvesting. As a proof of concept a 40 x 40 array of hybrid pixels has been designed and fabricated in a standard 0.5 microm CMOS process. Measurement results show that up to 39 microW of power can be harvested from the array under 130 Klux condition with an energy efficiency of 220 nJ /pixel /frame. The proposed image sensor is a current-mode image sensor which has several

  16. A safety monitoring system for taxi based on CMOS imager

    NASA Astrophysics Data System (ADS)

    Liu, Zhi

    2005-01-01

    CMOS image sensors now become increasingly competitive with respect to their CCD counterparts, while adding advantages such as no blooming, simpler driving requirements and the potential of on-chip integration of sensor, analogue circuitry, and digital processing functions. A safety monitoring system for taxi based on cmos imager that can record field situation when unusual circumstance happened is described in this paper. The monitoring system is based on a CMOS imager (OV7120), which can output digital image data through parallel pixel data port. The system consists of a CMOS image sensor, a large capacity NAND FLASH ROM, a USB interface chip and a micro controller (AT90S8515). The structure of whole system and the test data is discussed and analyzed in detail.

  17. Active-Matrix Organic Light Emission Diode Pixel Circuit for Suppressing and Compensating for the Threshold Voltage Degradation of Hydrogenated Amorphous Silicon Thin Film Transistors

    NASA Astrophysics Data System (ADS)

    Shin, Hee-Sun; Lee, Won-Kyu; Park, Sang-Guen; Kuk, Seung-Hee; Han, Min-Koo

    2009-03-01

    A new hydrogenated amorphous silicon (a-Si:H) thin film transistor (TFT) pixel circuit for active-matrix organic light emission diodes (AM-OLEDs), which significantly compensates the OLED current degradation by memorizing the threshold voltage of driving TFT and suppresses the threshold voltage shift of a-Si:H TFTs by negative bias annealing, is proposed and fabricated. During the first half of each frame, the driving TFT of the proposed pixel circuit supplies current to the OLED, which is determined by modified data voltage in the compensation scheme. The proposed pixel circuit was able to compensate the threshold voltage shift of the driving TFT as well as the OLED. During the remaining half of each frame, the proposed pixel circuit induces the recovery of the threshold voltage degradation of a-Si:H TFTs owing to the negative bias annealing. The experimental results show that the proposed pixel circuit was able to successfully compensate for the OLED current degradation and suppress the threshold voltage degradation of the driving TFT.

  18. Proton-induced Random Telegraph Signal in the CMOS imaging sensor for JANUS, the visible imaging telescope on JUICE

    NASA Astrophysics Data System (ADS)

    Winstone, G. P.; Soman, M. R.; Allanwood, E. A. H.; Holland, A. D.; Gow, J. P. D.; Stefanov, K.; Leese, M.

    2015-09-01

    JUpiter ICy moons Explorer (JUICE) is an ESA L class mission due for launch in 2022 as part of the agency's Cosmic Vision program [1][2]. The primary science goal is to explore and characterise Jupiter and several of its potentially habitable icy moons, particularly Ganymede, Europa and Callisto. The JANUS instrument is designated to be the scientific imager on-board the spacecraft with a wavelength range between 400 nm and 1000 nm and consists of a catoptric telescope coupled to a CMOS detector [3], specifically the CIS115 monolithic active pixel sensor supplied by e2v technologies[3]. A CMOS sensor has been chosen due to a combination of the high radiation tolerance required for all systems aboard the spacecraft and its capability of operating with integration times as low as 1 ms, which is required to prevent blur when imaging the moons at fast ground velocities since the camera has no mechanical shutter. However, an important consideration of using CMOS in high radiation environments is the generation of defects or defect clusters that result in pixels exhibiting Random Telegraph Signal (RTS)[5]. A study of RTS effects in the CIS115 has been undertaken, and the method applied to identify pixels in the array that display RTS behaviour is discussed and individual RTS-exhibiting pixels are characterised. The changes observed in RTS behaviour following irradiation of the CIS115 with protons is presented and the temperature dependence of the RTS behaviour is studied. The implications on the camera design and imaging requirements of the mission are examined.

  19. Silicon nanowires integrated with CMOS circuits for biosensing application

    NASA Astrophysics Data System (ADS)

    Jayakumar, G.; Asadollahi, A.; Hellström, P.-E.; Garidis, K.; Östling, M.

    2014-08-01

    We describe a silicon nanowire (SiNW) biosensor fabricated in a fully depleted SOI CMOS process. The sensor array consists of N by N pixel matrix (N2 pixels or test sites) and 8 input-output (I/O) pins. In each pixel a single crystalline SiNW with 75 by 20 nm cross-section area is defined using sidewall transfer lithography in the SOI layer. The key advantage of the design is that each individual SiNWs can be read-out sequentially and used for real-time charge based detection of molecules in liquids or gases.

  20. Design and characterization of novel monolithic pixel sensors for the ALICE ITS upgrade

    NASA Astrophysics Data System (ADS)

    Cavicchioli, C.; Chalmet, P. L.; Giubilato, P.; Hillemanns, H.; Junique, A.; Kugathasan, T.; Mager, M.; Marin Tobon, C. A.; Martinengo, P.; Mattiazzo, S.; Mugnier, H.; Musa, L.; Pantano, D.; Rousset, J.; Reidt, F.; Riedler, P.; Snoeys, W.; Van Hoorne, J. W.; Yang, P.

    2014-11-01

    Within the R&D activities for the upgrade of the ALICE Inner Tracking System (ITS), Monolithic Active Pixel Sensors (MAPS) are being developed and studied, due to their lower material budget (~ 0.3 %X0 in total for each inner layer) and higher granularity (~ 20 μm × 20 μm pixels) with respect to the present pixel detector. This paper presents the design and characterization results of the Explorer0 chip, manufactured in the TowerJazz 180 nm CMOS Imaging Sensor process, based on a wafer with high-resistivity (ρ > 1 kΩ cm) and 18 μm thick epitaxial layer. The chip is organized in two sub-matrices with different pixel pitches (20 μm and 30 μm), each of them containing several pixel designs. The collection electrode size and shape, as well as the distance between the electrode and the surrounding electronics, are varied; the chip also offers the possibility to decouple the charge integration time from the readout time, and to change the sensor bias. The charge collection properties of the different pixel variants implemented in Explorer0 have been studied using a 55Fe X-ray source and 1-5 GeV/c electrons and positrons. The sensor capacitance has been estimated, and the effect of the sensor bias has also been examined in detail. A second version of the Explorer0 chip (called Explorer1) has been submitted for production in March 2013, together with a novel circuit with in-pixel discrimination and a sparsified readout. Results from these submissions are also presented.

  1. Binary CMOS image sensor with a gate/body-tied MOSFET-type photodetector for high-speed operation

    NASA Astrophysics Data System (ADS)

    Choi, Byoung-Soo; Jo, Sung-Hyun; Bae, Myunghan; Kim, Sang-Hwan; Shin, Jang-Kyoo

    2016-05-01

    In this paper, a binary complementary metal oxide semiconductor (CMOS) image sensor with a gate/body-tied (GBT) metal oxide semiconductor field effect transistor (MOSFET)-type photodetector is presented. The sensitivity of the GBT MOSFET-type photodetector, which was fabricated using the standard CMOS 0.35-μm process, is higher than the sensitivity of the p-n junction photodiode, because the output signal of the photodetector is amplified by the MOSFET. A binary image sensor becomes more efficient when using this photodetector. Lower power consumptions and higher speeds of operation are possible, compared to the conventional image sensors using multi-bit analog to digital converters (ADCs). The frame rate of the proposed image sensor is over 2000 frames per second, which is higher than those of the conventional CMOS image sensors. The output signal of an active pixel sensor is applied to a comparator and compared with a reference level. The 1-bit output data of the binary process is determined by this level. To obtain a video signal, the 1-bit output data is stored in the memory and is read out by horizontal scanning. The proposed chip is composed of a GBT pixel array (144 × 100), binary-process circuit, vertical scanner, horizontal scanner, and readout circuit. The operation mode can be selected from between binary mode and multi-bit mode.

  2. Integrated CMOS amplifier for ENG signal recording.

    PubMed

    Uranga, A; Navarro, X; Barniol, N

    2004-12-01

    The development and in vivo test of a fully integrated differential CMOS amplifier, implemented with standard 0.7-microm CMOS technology (one poly, two metals, self aligned twin-well CMOS process) intended to record extracellular neural signals is described. In order to minimize the flicker noise generated by the CMOS circuitry, a chopper technique has been chosen. The fabricated amplifier has a gain of 74 dB, a bandwidth of 3 kHz, an input noise of 6.6 nV/(Hz)0.5, a power dissipation of 1.3 mW, and the active area is 2.7 mm2. An ac coupling has been used to adapt the electrode to the amplifier circuitry for the in vivo testing. Compound muscle action potentials, motor unit action potentials, and compound nerve action potentials have been recorded in acute experiments with rats, in order to validate the amplifier. PMID:15605867

  3. Capacitively coupled hybrid pixel assemblies for the CLIC vertex detector

    NASA Astrophysics Data System (ADS)

    Tehrani, N. Alipour; Arfaoui, S.; Benoit, M.; Dannheim, D.; Dette, K.; Hynds, D.; Kulis, S.; Perić, I.; Petrič, M.; Redford, S.; Sicking, E.; Valerio, P.

    2016-07-01

    The vertex detector at the proposed CLIC multi-TeV linear e+e- collider must have minimal material content and high spatial resolution, combined with accurate time-stamping to cope with the expected high rate of beam-induced backgrounds. One of the options being considered is the use of active sensors implemented in a commercial high-voltage CMOS process, capacitively coupled to hybrid pixel ASICs. A prototype of such an assembly, using two custom designed chips (CCPDv3 as active sensor glued to a CLICpix readout chip), has been characterised both in the lab and in beam tests at the CERN SPS using 120 GeV/c positively charged hadrons. Results of these characterisation studies are presented both for single and dual amplification stages in the active sensor, where efficiencies of greater than 99% have been achieved at -60 V substrate bias, with a single hit resolution of 6.1 μm . Pixel cross-coupling results are also presented, showing the sensitivity to placement precision and planarity of the glue layer.

  4. CCD or CMOS camera calibration using point spread function

    NASA Astrophysics Data System (ADS)

    Abdelsalam, D. G.; Stanislas, M.; Coudert, S.

    2014-06-01

    We present a simple method based on the acquisition of a back-illuminated pinhole to estimate the point spread function (PSF) for CCD (or CMOS) sensor characterization. This method is used to measure the variations in sensitivity of the 2D-sensor array systems. The experimental results show that there is a variation in sensitivity for each position on the CCD of the calibrated camera and the pixel optical center error with respect to the geometrical center is in the range of 1/10th of a pixel. We claim that the pixel error comes most probably from the coherence of the laser light used, or eventually from possible defects in shape, surface quality, optical performance of micro-lenses, and the uniformity of the parameters across the wafer. This may have significant consequences for coherent light imaging using CCD (or CMOS) such as Particle Image Velocimetry.

  5. Smart CMOS image sensor for lightning detection and imaging.

    PubMed

    Rolando, Sébastien; Goiffon, Vincent; Magnan, Pierre; Corbière, Franck; Molina, Romain; Tulet, Michel; Bréart-de-Boisanger, Michel; Saint-Pé, Olivier; Guiry, Saïprasad; Larnaudie, Franck; Leone, Bruno; Perez-Cuevas, Leticia; Zayer, Igor

    2013-03-01

    We present a CMOS image sensor dedicated to lightning detection and imaging. The detector has been designed to evaluate the potentiality of an on-chip lightning detection solution based on a smart sensor. This evaluation is performed in the frame of the predevelopment phase of the lightning detector that will be implemented in the Meteosat Third Generation Imager satellite for the European Space Agency. The lightning detection process is performed by a smart detector combining an in-pixel frame-to-frame difference comparison with an adjustable threshold and on-chip digital processing allowing an efficient localization of a faint lightning pulse on the entire large format array at a frequency of 1 kHz. A CMOS prototype sensor with a 256×256 pixel array and a 60 μm pixel pitch has been fabricated using a 0.35 μm 2P 5M technology and tested to validate the selected detection approach.

  6. The PixFEL project: development of advanced X-ray pixel detectors for application at future FEL facilities

    NASA Astrophysics Data System (ADS)

    Rizzo, G.; Comotti, D.; Fabris, L.; Grassi, M.; Lodola, L.; Malcovati, P.; Manghisoni, M.; Ratti, L.; Re, V.; Traversi, G.; Vacchi, C.; Batignani, G.; Bettarini, S.; Casarosa, G.; Forti, F.; Morsani, F.; Paladino, A.; Paoloni, E.; Dalla Betta, G.-F.; Pancheri, L.; Verzellesi, G.; Xu, H.; Mendicino, R.; Benkechkache, M. A.

    2015-02-01

    The PixFEL project aims to develop an advanced X-ray camera for imaging suited for the demanding requirements of next generation free electron laser (FEL) facilities. New technologies can be deployed to boost the performance of imaging detectors as well as future pixel devices for tracking. In the first phase of the PixFEL project, approved by the INFN, the focus will be on the development of the microelectronic building blocks, carried out with a 65 nm CMOS technology, implementing a low noise analog front-end channel with high dynamic range and compression features, a low power ADC and high density memory. At the same time PixFEL will investigate and implement some of the enabling technologies to assembly a seamless large area X-ray camera composed by a matrix of multilayer four-side buttable tiles. A pixel matrix with active edge will be developed to minimize the dead area of the sensor layer. Vertical interconnection of two CMOS tiers will be explored to build a four-side buttable readout chip with small pixel pitch and all the on-board required functionalities. The ambitious target requirements of the new pixel device are: single photon resolution, 1 to 104 photons @ 1 keV to 10 keV input dynamic range, 10-bit analog to digital conversion up to 5 MHz, 1 kevent in-pixel memory and 100 μm pixel pitch. The long term goal of PixFEL will be the development of a versatile X-ray camera to be operated either in burst mode (European XFEL), or in continuous mode to cope with the high frame rates foreseen for the upgrade phase of the LCLS-II at SLAC.

  7. Development of a large-area CMOS-based detector for real-time x-ray imaging

    NASA Astrophysics Data System (ADS)

    Heo, Sung Kyn; Park, Sung Kyu; Hwang, Sung Ha; Im, Dong Ak; Kosonen, Jari; Kim, Tae Woo; Yun, Seungman; Kim, Ho Kyung

    2010-04-01

    Complementary metal-oxide-semiconductor (CMOS) active pixel sensors (APSs) with high electrical and optical performances are now being attractive for digital radiography (DR) and dental cone-beam computed tomography (CBCT). In this study, we report our prototype CMOS-based detectors capable of real-time imaging. The field-of-view of the detector is 12 × 14.4 cm. The detector employs a CsI:Tl scintillator as an x-ray-to-light converter. The electrical performance of the CMOS APS, such as readout noise and full-well capacity, was evaluated. The x-ray imaging characteristics of the detector were evaluated in terms of characteristic curve, pre-sampling modulation transfer function, noise power spectrum, detective quantum efficiency, and image lag. The overall performance of the detector is demonstrated with phantom images obtained for DR and CBCT applications. The detailed development description and measurement results are addressed. With the results, we suggest that the prototype CMOS-based detector has the potential for CBCT and real-time x-ray imaging applications.

  8. A new 9T global shutter pixel with CDS technique

    NASA Astrophysics Data System (ADS)

    Liu, Yang; Ma, Cheng; Zhou, Quan; Wang, Xinyang

    2015-04-01

    Benefiting from motion blur free, Global shutter pixel is very widely used in the design of CMOS image sensors for high speed applications such as motion vision, scientifically inspection, etc. In global shutter sensors, all pixel signal information needs to be stored in the pixel first and then waiting for readout. For higher frame rate, we need very fast operation of the pixel array. There are basically two ways for the in pixel signal storage, one is in charge domain, such as the one shown in [1], this needs complicated process during the pixel fabrication. The other one is in voltage domain, one example is the one in [2], this pixel is based on the 4T PPD technology and normally the driving of the high capacitive transfer gate limits the speed of the array operation. In this paper we report a new 9T global shutter pixel based on 3-T partially pinned photodiode (PPPD) technology. It incorporates three in-pixel storage capacitors allowing for correlated double sampling (CDS) and pipeline operation of the array (pixel exposure during the readout of the array). Only two control pulses are needed for all the pixels at the end of exposure which allows high speed exposure control.

  9. Prototyping of an HV-CMOS demonstrator for the High Luminosity-LHC upgrade

    NASA Astrophysics Data System (ADS)

    Vilella, E.; Benoit, M.; Casanova, R.; Casse, G.; Ferrere, D.; Iacobucci, G.; Peric, I.; Vossebeld, J.

    2016-01-01

    HV-CMOS sensors can offer important advantages in terms of material budget, granularity and cost for large area tracking systems in high energy physics experiments. This article presents the design and simulated results of an HV-CMOS pixel demonstrator for the High Luminosity-LHC. The pixel demonstrator has been designed in the 0.35 μm HV-CMOS process from ams AG and submitted for fabrication through an engineering run. To improve the response of the sensor, different wafers with moderate to high substrate resistivities are used to fabricate the design. The prototype consists of four large analog and standalone matrices with several pixel flavours, which are all compatible for readout with the FE-I4 ASIC. Details about the matrices and the pixel flavours are provided in this article.

  10. Development of low read noise high conversion gain CMOS image sensor for photon counting level imaging

    NASA Astrophysics Data System (ADS)

    Seo, Min-Woong; Kawahito, Shoji; Kagawa, Keiichiro; Yasutomi, Keita

    2016-05-01

    A CMOS image sensor with deep sub-electron read noise and high pixel conversion gain has been developed. Its performance is recognized through image outputs from an area image sensor, confirming the capability of photoelectroncounting- level imaging. To achieve high conversion gain, the proposed pixel has special structures to reduce the parasitic capacitances around FD node. As a result, the pixel conversion gain is increased due to the optimized FD node capacitance, and the noise performance is also improved by removing two noise sources from power supply. For the first time, high contrast images from the reset-gate-less CMOS image sensor, with less than 0.3e- rms noise level, have been generated at an extremely low light level of a few electrons per pixel. In addition, the photon-counting capability of the developed CMOS imager is demonstrated by a measurement, photoelectron-counting histogram (PCH).

  11. Low-power clock distribution circuits for the Macro Pixel ASIC

    NASA Astrophysics Data System (ADS)

    Gaioni, L.; De Canio, F.; Manghisoni, M.; Ratti, L.; Re, V.; Traversi, G.; Marchioro, A.; Kloukinas, K.

    2015-01-01

    Clock distribution circuits account for a significant fraction of the power dissipation of the Macro Pixel ASIC (MPA), designed for the pixel layer readout of the so-called Pixel-Strip module in the innermost part of the CMS tracker at the HL-LHC. This work reviews different CMOS circuit architectures envisioned for low power clock distribution in the MPA. Two main topologies will be discussed, based on standard supply voltage and on auxiliary, reduced supply. Circuit performance, in terms of power consumption and speed, is evaluated for each of the proposed solutions and compared with that relevant to standard CMOS drivers.

  12. Single photon detection and localization accuracy with an ebCMOS camera

    NASA Astrophysics Data System (ADS)

    Cajgfinger, T.; Dominjon, A.; Barbier, R.

    2015-07-01

    The CMOS sensor technologies evolve very fast and offer today very promising solutions to existing issues facing by imaging camera systems. CMOS sensors are very attractive for fast and sensitive imaging thanks to their low pixel noise (1e-) and their possibility of backside illumination. The ebCMOS group of IPNL has produced a camera system dedicated to Low Light Level detection and based on a 640 kPixels ebCMOS with its acquisition system. After reminding the principle of detection of an ebCMOS and the characteristics of our prototype, we confront our camera to other imaging systems. We compare the identification efficiency and the localization accuracy of a point source by four different photo-detection devices: the scientific CMOS (sCMOS), the Charge Coupled Device (CDD), the Electron Multiplying CCD (emCCD) and the Electron Bombarded CMOS (ebCMOS). Our ebCMOS camera is able to identify a single photon source in less than 10 ms with a localization accuracy better than 1 μm. We report as well efficiency measurement and the false positive identification of the ebCMOS camera by identifying more than hundreds of single photon sources in parallel. About 700 spots are identified with a detection efficiency higher than 90% and a false positive percentage lower than 5. With these measurements, we show that our target tracking algorithm can be implemented in real time at 500 frames per second under a photon flux of the order of 8000 photons per frame. These results demonstrate that the ebCMOS camera concept with its single photon detection and target tracking algorithm is one of the best devices for low light and fast applications such as bioluminescence imaging, quantum dots tracking or adaptive optics.

  13. The ALICE Pixel Detector

    NASA Astrophysics Data System (ADS)

    Mercado-Perez, Jorge

    2002-07-01

    The present document is a brief summary of the performed activities during the 2001 Summer Student Programme at CERN under the Scientific Summer at Foreign Laboratories Program organized by the Particles and Fields Division of the Mexican Physical Society (Sociedad Mexicana de Fisica). In this case, the activities were related with the ALICE Pixel Group of the EP-AIT Division, under the supervision of Jeroen van Hunen, research fellow in this group. First, I give an introduction and overview to the ALICE experiment; followed by a description of wafer probing. A brief summary of the test beam that we had from July 13th to July 25th is given as well.

  14. Back-side-illuminated 1.4μm pixel with a vertically pinned photodiode based on hole collection, PMOS readout chain and active side-wall passivation

    NASA Astrophysics Data System (ADS)

    Mamdy, Bastien; Roy, François; Ahmed, Nayera; Lu, Guo-Neng

    2015-10-01

    To further improve the characteristics of CMOS image sensors (CIS), we propose a back-side illuminated pixel integrating a vertically pinned and P-type photodiode (which collects holes) and PMOS readout circuitry. It has been designed in a 1.4μm-pitch, a two-transistor (2T) shared readout architecture and fabricated in a combined 65nm and 90nm technology. The vertically pinned photodiode takes up almost the entire volume of the pixel, allowing a full well capacity (FWC) exceeding 7000h+. With a conversion factor around 120μV/h+, the output swing approaching 1V is achieved on the column voltage. The pixel also integrates capacitive deep trench isolation (CDTI) to tackle electrical and optical crosstalk issues. The effective passivation of trench interface by CDTI bias control is demonstrated for a hole-based pixel. As expected, PMOS transistors have much lower trapping noise compared to NMOS counterparts. The PMOS source follower has an average temporal noise of 195μV, mainly dominated by thermal noise contribution.

  15. An investigation of medical radiation detection using CMOS image sensors in smartphones

    NASA Astrophysics Data System (ADS)

    Kang, Han Gyu; Song, Jae-Jun; Lee, Kwonhee; Nam, Ki Chang; Hong, Seong Jong; Kim, Ho Chul

    2016-07-01

    Medical radiation exposure to patients has increased with the development of diagnostic X-ray devices and multi-channel computed tomography (CT). Despite the fact that the low-dose CT technique can significantly reduce medical radiation exposure to patients, the increasing number of CT examinations has increased the total medical radiation exposure to patients. Therefore, medical radiation exposure to patients should be monitored to prevent cancers caused by diagnostic radiation. However, without using thermoluminescence or glass dosimeters, it is hardly measure doses received by patients during medical examinations accurately. Hence, it is necessary to develop radiation monitoring devices and algorithms that are reasonably priced and have superior radiation detection efficiencies. The aim of this study is to investigate the feasibility of medical dose measurement using complementary metal oxide semiconductor (CMOS) sensors in smartphone cameras with an algorithm to extract the X-ray interacted pixels. We characterized the responses of the CMOS sensors in a smartphone with respect to the X-rays generated by a general diagnostic X-ray system. The characteristics of the CMOS sensors in a smartphone camera, such as dose response linearity, dose rate dependence, energy dependence, angular dependence, and minimum detectable activity were evaluated. The high energy gamma-ray of 662 keV from Cs-137 can be detected using the smartphone camera. The smartphone cameras which employ the developed algorithm can detect medical radiations.

  16. Monolithic pixels on moderate resistivity substrate and sparsifying readout architecture

    NASA Astrophysics Data System (ADS)

    Giubilato, P.; Battaglia, M.; Bisello, D.; Caselle, M.; Chalmet, P.; Demaria, L.; Ikemoto, Y.; Kloukinas, K.; Mansuy, S. C.; Mattiazzo, S.; Marchioro, A.; Mugnier, H.; Pantano, D.; Potenza, A.; Rivetti, A.; Rousset, J.; Silvestrin, L.; Snoeys, W.

    2013-12-01

    The LePix projects aim realizing a new generation monolithic pixel detectors with improved performances at lesser cost with respect to both current state of the art monolithic and hybrid pixel sensors. The detector is built in a 90 nm CMOS process on a substrate of moderate resistivity. This allows charge collection by drift while maintaining the other advantages usually offered by MAPS, like having a single piece detector and using a standard CMOS production line. The collection by drift mechanism, coupled to the low capacitance design of the collecting node made possible by the monolithic approach, provides an excellent signal to noise ratio straight at the pixel cell together with a radiation tolerance far superior to conventional un-depleted MAPS. The excellent signal-to-noise performance is demonstrated by the device ability to separate the 6 keV 55Fe double peak at room temperature. To achieve high granularity (10-20 μm pitch pixels) over large detector areas maintaining high readout speed, a completely new compressing architecture has been devised. This architecture departs from the mainstream hybrid pixel sparsification approach, which uses in-pixel logic to reduce data, by using topological compression to minimize pixel area and power consumption.

  17. Use and imaging performance of CMOS flat panel imager with LiF/ZnS(Ag) and Gadox scintillation screens for neutron radiography

    NASA Astrophysics Data System (ADS)

    Cha, B. K.; kim, J. Y.; Kim, T. J.; Sim, C.; Cho, G.; Lee, D. H.; Seo, C.-W.; Jeon, S.; Huh, Y.

    2011-01-01

    In digital neutron radiography system, a thermal neutron imaging detector based on neutron-sensitive scintillating screens with CMOS(complementary metal oxide semiconductor) flat panel imager is introduced for non-destructive testing (NDT) application. Recently, large area CMOS APS (active-pixel sensor) in conjunction with scintillation films has been widely used in many digital X-ray imaging applications. Instead of typical imaging detectors such as image plates, cooled-CCD cameras and amorphous silicon flat panel detectors in combination with scintillation screens, we tried to apply a scintillator-based CMOS APS to neutron imaging detection systems for high resolution neutron radiography. In this work, two major Gd2O2S:Tb and 6LiF/ZnS:Ag scintillation screens with various thickness were fabricated by a screen printing method. These neutron converter screens consist of a dispersion of Gd2O2S:Tb and 6LiF/ZnS:Ag scintillating particles in acrylic binder. These scintillating screens coupled-CMOS flat panel imager with 25x50mm2 active area and 48μm pixel pitch was used for neutron radiography. Thermal neutron flux with 6x106n/cm2/s was utilized at the NRF facility of HANARO in KAERI. The neutron imaging characterization of the used detector was investigated in terms of relative light output, linearity and spatial resolution in detail. The experimental results of scintillating screen-based CMOS flat panel detectors demonstrate possibility of high sensitive and high spatial resolution imaging in neutron radiography system.

  18. Spark protection layers for CMOS pixel anode chips in MPGDs

    NASA Astrophysics Data System (ADS)

    Bilevych, Y.; Blanco Carballo, V. M.; Chefdeville, M.; Colas, P.; Delagnes, E.; Fransen, M.; van der Graaf, H.; Koppert, W. J. C.; Melai, J.; Salm, C.; Schmitz, J.; Timmermans, J.; Wyrsch, N.

    2011-02-01

    In this work we have investigated the functioning of high resistivity amorphous silicon and silicon-rich nitride layers as a protection against discharges in Micro-Patterned Gaseous Detectors (MPGDs). When the anode is protected by a high resistivity layer, discharge signals are limited in charge. A signal reduction is expected when the layers are too thick; simulations presented in this paper indicate that layers up to 10 μm thick can be applied without significantly degrading the detector performance. Layers of amorphous silicon and silicon-rich nitride have been deposited on top of Timepix and Medipix2 chips in GridPix detectors; with this, chips survive naturally occurring as well as intentionally produced discharges.

  19. Using a large area CMOS APS for direct chemiluminescence detection in Western blotting electrophoresis

    NASA Astrophysics Data System (ADS)

    Esposito, Michela; Newcombe, Jane; Anaxagoras, Thalis; Allinson, Nigel M.; Wells, Kevin

    2012-03-01

    Western blotting electrophoretic sequencing is an analytical technique widely used in Functional Proteomics to detect, recognize and quantify specific labelled proteins in biological samples. A commonly used label for western blotting is Enhanced ChemiLuminescence (ECL) reagents based on fluorescent light emission of Luminol at 425nm. Film emulsion is the conventional detection medium, but is characterized by non-linear response and limited dynamic range. Several western blotting digital imaging systems have being developed, mainly based on the use of cooled Charge Coupled Devices (CCDs) and single avalanche diodes that address these issues. Even so these systems present key drawbacks, such as a low frame rate and require operation at low temperature. Direct optical detection using Complementary Metal Oxide Semiconductor (CMOS) Active Pixel Sensors (APS)could represent a suitable digital alternative for this application. In this paper the authors demonstrate the viability of direct chemiluminescent light detection in western blotting electrophoresis using a CMOS APS at room temperature. Furthermore, in recent years, improvements in fabrication techniques have made available reliable processes for very large imagers, which can be now scaled up to wafer size, allowing direct contact imaging of full size western blotting samples. We propose using a novel wafer scale APS (12.8 cm×13.2 cm), with an array architecture using two different pixel geometries that can deliver an inherently low noise and high dynamic range image at the same time representing a dramatic improvement with respect to the current western blotting imaging systems.

  20. Proton-counting radiography for proton therapy: a proof of principle using CMOS APS technology.

    PubMed

    Poludniowski, G; Allinson, N M; Anaxagoras, T; Esposito, M; Green, S; Manolopoulos, S; Nieto-Camero, J; Parker, D J; Price, T; Evans, P M

    2014-06-01

    Despite the early recognition of the potential of proton imaging to assist proton therapy (Cormack 1963 J. Appl. Phys. 34 2722), the modality is still removed from clinical practice, with various approaches in development. For proton-counting radiography applications such as computed tomography (CT), the water-equivalent-path-length that each proton has travelled through an imaged object must be inferred. Typically, scintillator-based technology has been used in various energy/range telescope designs. Here we propose a very different alternative of using radiation-hard CMOS active pixel sensor technology. The ability of such a sensor to resolve the passage of individual protons in a therapy beam has not been previously shown. Here, such capability is demonstrated using a 36 MeV cyclotron beam (University of Birmingham Cyclotron, Birmingham, UK) and a 200 MeV clinical radiotherapy beam (iThemba LABS, Cape Town, SA). The feasibility of tracking individual protons through multiple CMOS layers is also demonstrated using a two-layer stack of sensors. The chief advantages of this solution are the spatial discrimination of events intrinsic to pixelated sensors, combined with the potential provision of information on both the range and residual energy of a proton. The challenges in developing a practical system are discussed.

  1. Low-FPN high-gain capacitive transimpedance amplifier for low-noise CMOS image sensors

    NASA Astrophysics Data System (ADS)

    Fowler, Boyd A.; Balicki, Janusz; How, Dana; Godfrey, Michael

    2001-05-01

    In this paper we introduce a low fixed pattern noise (LFPN) capacitive transimpedance amplifier (CTIA) for active pixel CMOS image sensors (APS) with high switchable gain and low read noise. The LFPN CTIA APS uses a switched capacitor voltage divider feedback circuit to achieve high sensitivity, low gain FPN, and low read noise. This paper discusses the operation of the LFPN CTIA APS, and presents a theoretical analysis of its gain FPN and read noise. We do not analyze the effect of 1/f noise, since it is typically much smaller than the thermal and shot noise effects. Monte Carlo simulation of gain FPN and SPICE simulation of read noise are also presented. For a 0.35 micrometers CMOS LFPN CTIA at room temperature and an output data rate of 16Mpixel/sec, we show that the pixel amplifier gain FPN is less than 0.0064, where FPN is defined as the ratio of standard deviation to mean. The read noise and dynamic range are less than 3 electrons RMS and greater than 90dB respectively. We find that theory and simulated results match closely.

  2. Proton-counting radiography for proton therapy: a proof of principle using CMOS APS technology

    PubMed Central

    Poludniowski, G; Allinson, N M; Anaxagoras, T; Esposito, M; Green, S; Manolopoulos, S; Nieto-Camero, J; Parker, D J; Price, T; Evans, P M

    2014-01-01

    Despite the early recognition of the potential of proton imaging to assist proton therapy the modality is still removed from clinical practice, with various approaches in development. For proton-counting radiography applications such as Computed Tomography (CT), the Water-Equivalent-Path-Length (WEPL) that each proton has travelled through an imaged object must be inferred. Typically, scintillator-based technology has been used in various energy/range telescope designs. Here we propose a very different alternative of using radiation-hard CMOS Active Pixel Sensor (APS) technology. The ability of such a sensor to resolve the passage of individual protons in a therapy beam has not been previously shown. Here, such capability is demonstrated using a 36 MeV cyclotron beam (University of Birmingham Cyclotron, Birmingham, UK) and a 200 MeV clinical radiotherapy beam (iThemba LABS, Cape Town, SA). The feasibility of tracking individual protons through multiple CMOS layers is also demonstrated using a two-layer stack of sensors. The chief advantages of this solution are the spatial discrimination of events intrinsic to pixelated sensors, combined with the potential provision of information on both the range and residual energy of a proton. The challenges in developing a practical system are discussed. PMID:24785680

  3. Single photon counting pixel detectors for synchrotron radiation experiments

    NASA Astrophysics Data System (ADS)

    Toyokawa, H.; Broennimann, Ch.; Eikenberry, E. F.; Henrich, B.; Kawase, M.; Kobas, M.; Kraft, P.; Sato, M.; Schmitt, B.; Suzuki, M.; Tanida, H.; Uruga, T.

    2010-11-01

    At the Paul Scherrer Institute PSI an X-ray single photon counting pixel detector (PILATUS) based on the hybrid-pixel detector technology was developed in collaboration with SPring-8. The detection element is a 320 or 450 μm thick silicon sensor forming pixelated pn-diodes with a pitch of 172 μm×172 μm. An array of 2×8 custom CMOS readout chips are indium bump-bonded to the sensor, which leads to 33.5 mm×83.8 mm detective area. Each pixel contains a charge-sensitive amplifier, a single level discriminator and a 20 bit counter. This design realizes a high dynamic range, short readout time of less than 3 ms, a high framing rate of over 200 images per second and an excellent point-spread function. The maximum counting rate achieves more than 2×10 6 X-rays/s/pixel.

  4. Mapping Electrical Crosstalk in Pixelated Sensor Arrays

    NASA Technical Reports Server (NTRS)

    Seshadri, S.; Cole, D. M.; Hancock, B. R.; Smith, R. M.

    2008-01-01

    Electronic coupling effects such as Inter-Pixel Capacitance (IPC) affect the quantitative interpretation of image data from CMOS, hybrid visible and infrared imagers alike. Existing methods of characterizing IPC do not provide a map of the spatial variation of IPC over all pixels. We demonstrate a deterministic method that provides a direct quantitative map of the crosstalk across an imager. The approach requires only the ability to reset single pixels to an arbitrary voltage, different from the rest of the imager. No illumination source is required. Mapping IPC independently for each pixel is also made practical by the greater S/N ratio achievable for an electrical stimulus than for an optical stimulus, which is subject to both Poisson statistics and diffusion effects of photo-generated charge. The data we present illustrates a more complex picture of IPC in Teledyne HgCdTe and HyViSi focal plane arrays than is presently understood, including the presence of a newly discovered, long range IPC in the HyViSi FPA that extends tens of pixels in distance, likely stemming from extended field effects in the fully depleted substrate. The sensitivity of the measurement approach has been shown to be good enough to distinguish spatial structure in IPC of the order of 0.1%.

  5. CMOS prototype for retinal prosthesis applications with analog processing

    NASA Astrophysics Data System (ADS)

    Castillo-Cabrera, G.; García-Lamont, J.; Reyes-Barranca, M. A.; Matsumoto-Kuwabara, Y.; Moreno-Cadenas, J. A.; Flores-Nava, L. M.

    2014-12-01

    A core architecture for analog processing, which emulates a retina's receptive field, is presented in this work. A model was partially implemented and built on CMOS standard technology through MOSIS. It considers that the receptive field is the basic unit for image processing in the visual system. That is why the design is concerned on a partial solution of receptive field properties in order to be adapted in the future as an aid to people with retinal diseases. A receptive field is represented by an array of 3×3 pixels. Each pixel carries out a process based on four main operations. This means that image processing is developed at pixel level. Operations involved are: (1) photo-transduction by photocurrent integration, (2) signal averaging from eight neighbouring pixels executed by a neu-NMOS (ν-NMOS) neuron, (3) signal average gradient between central pixel and the average value from the eight neighbouring pixels (this gradient is performed by a comparator) and finally (4) a pulse generator. Each one of these operations gives place to circuital blocks which were built on 0.5 μm CMOS technology.

  6. Fluence measurement of fast neutron fields with a highly efficient recoil proton telescope using active pixel sensors.

    PubMed

    Taforeau, J; Higueret, S; Husson, D; Kachel, M; Lebreton, L

    2014-10-01

    The spectrometer ATHENA (Accurate Telescope for High-Energy Neutron metrology Applications) is being developed at the LNE-IRSN and aims at characterising energy and fluence of fast neutron fields. The detector is a recoil proton telescope and measures neutron fields in the range of 5-20 MeV. This telescope is intended to become a primary standard for both energy and fluence measurements. The neutron detection is achieved by a polyethylene radiator for n-p conversion, three 50-µm-thick silicon sensors that use CMOS technology for proton tracking and a 3-mm-thick silicon diode to measure the residual proton energy. The use of CMOS sensors and silicon diode, owing to a large detection solid angle, increases the intrinsic efficiency of the detector by a factor of 10 compared with conventional designs. The ability of the spectrometer to determine the neutron energy was demonstrated and reported elsewhere. This paper focuses on the fluence measurement of monoenergetic neutron fields in the range of 5-20 MeV. Experimental investigations, performed at the AMANDE facility, indicate a good estimation of neutron fluence at various energies. In addition, a complete description of uncertainties budget is presented in this paper and a Monte Carlo propagation of uncertainty sources leads to a fluence measurement with a precision ∼3-5 % depending on the neutron energy.

  7. Pixel-Level Digital-to-Analog Conversion Scheme with Compensation of Thin-Film-Transistor Variations for Compact Integrated Data Drivers of Active Matrix Organic Light Emitting Diodes

    NASA Astrophysics Data System (ADS)

    Kim, Tae-Wook; Park, Sang-Gyu; Choi, Byong-Deok

    2011-03-01

    The previous pixel-level digital-to-analog-conversion (DAC) scheme that implements a part of a DAC in a pixel circuit turned out to be very efficient for reducing the peripheral area of an integrated data driver fabricated with low-temperature polycrystalline silicon thin-film transistors (LTPS TFTs). However, how the pixel-level DAC can be compatible with the existing pixel circuits including compensation schemes of TFT variations and IR drops on supply rails, which is of primary importance for active matrix organic light emitting diodes (AMOLEDs) is an issue in this scheme, because LTPS TFTs suffer from random variations in their characteristics. In this paper, we show that the pixel-level DAC scheme can be successfully used with the previous compensation schemes by giving two examples of voltage- and current-programming pixels. The previous pixel-level DAC schemes require additional two TFTs and one capacitor, but for these newly proposed pixel circuits, the overhead is no more than two TFTs by utilizing the already existing capacitor. In addition, through a detailed analysis, it has been shown that the pixel-level DAC can be expanded to a 4-bit resolution, or be applied together with 1:2 demultiplexing driving for 6- to 8-in. diagonal XGA AMOLED display panels.

  8. Empirical formula for rates of hot pixel defects based on pixel size, sensor area, and ISO

    NASA Astrophysics Data System (ADS)

    Chapman, Glenn H.; Thomas, Rohit; Koren, Zahava; Koren, Israel

    2013-02-01

    Experimentally, image sensors measurements show a continuous development of in-field permanent hot pixel defects increasing in numbers over time. In our tests we accumulated data on defects in cameras ranging from large area (<300 sq mm) DSLR's, medium sized (~40 sq mm) point and shoot, and small (20 sq mm) cell phone cameras. The results show that the rate of defects depends on the technology (APS or CCD), and on design parameters like imager area, pixel size (from 1.5 to 7 um), and gain (from ISO100 to 1600). Comparing different sensor sizes with similar pixel sizes has shown that defect rates scale linearly with sensor area, suggesting the metric of defects/year/sq mm, which we call defect density. A search was made to model this defect density as a function of the two parameters pixel size and ISO. The best empirical fit was obtained by a power law curve. For CCD imagers, the defect densities are proportional to the pixel size to the power of -2.25 times the ISO to the power of 0.69. For APS (CMOS) sensors the power law had the defect densities proportional to the pixel size to the power of -3.07 times the ISO raised to the power of 0.5. Extending our empirical formula to include ISO allows us to predict the expected defect development rate for a wide set of sensor parameters.

  9. CMOS Imaging of Pin-Printed Xerogel-Based Luminescent Sensor Microarrays.

    PubMed

    Yao, Lei; Yung, Ka Yi; Khan, Rifat; Chodavarapu, Vamsy P; Bright, Frank V

    2010-12-01

    We present the design and implementation of a luminescence-based miniaturized multisensor system using pin-printed xerogel materials which act as host media for chemical recognition elements. We developed a CMOS imager integrated circuit (IC) to image the luminescence response of the xerogel-based sensor array. The imager IC uses a 26 × 20 (520 elements) array of active pixel sensors and each active pixel includes a high-gain phototransistor to convert the detected optical signals into electrical currents. The imager includes a correlated double sampling circuit and pixel address/digital control circuit; the image data is read-out as coded serial signal. The sensor system uses a light-emitting diode (LED) to excite the target analyte responsive luminophores doped within discrete xerogel-based sensor elements. As a prototype, we developed a 4 × 4 (16 elements) array of oxygen (O2) sensors. Each group of 4 sensor elements in the array (arranged in a row) is designed to provide a different and specific sensitivity to the target gaseous O2 concentration. This property of multiple sensitivities is achieved by using a strategic mix of two oxygen sensitive luminophores ([Ru(dpp)3](2+) and ([Ru(bpy)3](2+)) in each pin-printed xerogel sensor element. The CMOS imager consumes an average power of 8 mW operating at 1 kHz sampling frequency driven at 5 V. The developed prototype system demonstrates a low cost and miniaturized luminescence multisensor system. PMID:24489484

  10. Monolithic CMOS imaging x-ray spectrometers

    NASA Astrophysics Data System (ADS)

    Kenter, Almus; Kraft, Ralph; Gauron, Thomas; Murray, Stephen S.

    2014-07-01

    The Smithsonian Astrophysical Observatory (SAO) in collaboration with SRI/Sarnoff is developing monolithic CMOS detectors optimized for x-ray astronomy. The goal of this multi-year program is to produce CMOS x-ray imaging spectrometers that are Fano noise limited over the 0.1-10keV energy band while incorporating the many benefits of CMOS technology. These benefits include: low power consumption, radiation "hardness", high levels of integration, and very high read rates. Small format test devices from a previous wafer fabrication run (2011-2012) have recently been back-thinned and tested for response below 1keV. These devices perform as expected in regards to dark current, read noise, spectral response and Quantum Efficiency (QE). We demonstrate that running these devices at rates ~> 1Mpix/second eliminates the need for cooling as shot noise from any dark current is greatly mitigated. The test devices were fabricated on 15μm, high resistivity custom (~30kΩ-cm) epitaxial silicon and have a 16 by 192 pixel format. They incorporate 16μm pitch, 6 Transistor Pinned Photo Diode (6TPPD) pixels which have ~40μV/electron sensitivity and a highly parallel analog CDS signal chain. Newer, improved, lower noise detectors have just been fabricated (October 2013). These new detectors are fabricated on 9μm epitaxial silicon and have a 1k by 1k format. They incorporate similar 16μm pitch, 6TPPD pixels but have ~ 50% higher sensitivity and much (3×) lower read noise. These new detectors have undergone preliminary testing for functionality in Front Illuminated (FI) form and are presently being prepared for back thinning and packaging. Monolithic CMOS devices such as these, would be ideal candidate detectors for the focal planes of Solar, planetary and other space-borne x-ray astronomy missions. The high through-put, low noise and excellent low energy response, provide high dynamic range and good time resolution; bright, time varying x-ray features could be temporally and

  11. Amorphous In-Ga-Zn-O Thin Film Transistor Current-Scaling Pixel Electrode Circuit for Active-Matrix Organic Light-Emitting Displays

    NASA Astrophysics Data System (ADS)

    Chen, Charlene; Abe, Katsumi; Fung, Tze-Ching; Kumomi, Hideya; Kanicki, Jerzy

    2009-03-01

    In this paper, we analyze application of amorphous In-Ga-Zn-O thin film transistors (a-InGaZnO TFTs) to current-scaling pixel electrode circuit that could be used for 3-in. quarter video graphics array (QVGA) full color active-matrix organic light-emitting displays (AM-OLEDs). Simulation results, based on a-InGaZnO TFT and OLED experimental data, show that both device sizes and operational voltages can be reduced when compare to the same circuit using hydrogenated amorphous silicon (a-Si:H) TFTs. Moreover, the a-InGaZnO TFT pixel circuit can compensate for the drive TFT threshold voltage variation (ΔVT) within acceptable operating error range.

  12. Source Driver Channel Reduction Schemes Employing Corresponding Pixel Alignments for Current Programming Active-Matrix Organic Light-Emitting Diode Displays

    NASA Astrophysics Data System (ADS)

    Hong, Soon-Kwang; Oh, Du-Hwan; Jeong, Seok-Hee; Park, Young-Ju; Kim, Byeong-Koo; Ha, Yong-Min; Jang, Jin

    2008-03-01

    We propose two types of novel scheme for reducing the number of output channels of driver-integrated circuit (D-IC) for the current programming compensation pixel structures of active-matrix organic light-emitting diodes (AMOLEDs). One is a 2:1 data demultiplexing technique that can reduce the number of output channels of D-IC by half. The proposed second scheme is a vertically aligned red (R), green (G), and blue (B) subpixel scheme instead of a horizontally aligned R-G-B subpixel one, which is regarded as the conventional pixel alignment scheme. We have also successfully implemented these schemes in a 2.4-in.-sized QCIF + (176 × RGB × 220) AMOLED using p-type excimer laser annealing (ELA) low-temperature polycrystalline silicon (LTPS) technology and evaluated key performance characteristics.

  13. Transparent Pixel Circuit with Threshold Voltage Compensation Using ZnO Thin-Film Transistors for Active-Matrix Organic Light Emitting Diode Displays

    NASA Astrophysics Data System (ADS)

    Yang, Ik-Seok; Kwon, Oh-Kyong

    2009-03-01

    A transparent pixel circuit with a threshold voltage compensating scheme using ZnO thin-film transistors (TFTs) for active-matrix organic light emitting diode (AMOLED) displays is proposed. This circuit consists of five n-type ZnO TFTs and two capacitors and can compensate for the threshold voltage variation of ZnO TFTs in real time. From simulation results, the maximum deviation of the emission current of the pixel circuit with a threshold voltage variation of ±1 V is determined to be less than 10 nA. From measurement results, it is verified that the maximum deviation of measured emission currents with measurement position in a glass substrate is less than 15 nA in a higher current range, and the deviation of emission current with time is less than 3%.

  14. Noise Characterization of Polycrystalline Silicon Thin Film Transistors for X-ray Imagers Based on Active Pixel Architectures.

    PubMed

    Antonuk, L E; Koniczek, M; McDonald, J; El-Mohri, Y; Zhao, Q; Behravan, M

    2008-01-01

    An examination of the noise of polycrystalline silicon thin film transistors, in the context of flat panel x-ray imager development, is reported. The study was conducted in the spirit of exploring how the 1/f, shot and thermal noise components of poly-Si TFTs, determined from current noise power spectral density measurements, as well as through calculation, can be used to assist in the development of imagers incorporating pixel amplification circuits based on such transistors. PMID:20862269

  15. Fundamental performance differences between CMOS and CCD imagers: Part II

    NASA Astrophysics Data System (ADS)

    Janesick, James; Andrews, James; Tower, John; Grygon, Mark; Elliott, Tom; Cheng, John; Lesser, Michael; Pinter, Jeff

    2007-09-01

    A new class of CMOS imagers that compete with scientific CCDs is presented. The sensors are based on deep depletion backside illuminated technology to achieve high near infrared quantum efficiency and low pixel cross-talk. The imagers deliver very low read noise suitable for single photon counting - Fano-noise limited soft x-ray applications. Digital correlated double sampling signal processing necessary to achieve low read noise performance is analyzed and demonstrated for CMOS use. Detailed experimental data products generated by different pixel architectures (notably 3TPPD, 5TPPD and 6TPG designs) are presented including read noise, charge capacity, dynamic range, quantum efficiency, charge collection and transfer efficiency and dark current generation. Radiation damage data taken for the imagers is also reported.

  16. A back-illuminated megapixel CMOS image sensor

    NASA Technical Reports Server (NTRS)

    Pain, Bedabrata; Cunningham, Thomas; Nikzad, Shouleh; Hoenk, Michael; Jones, Todd; Wrigley, Chris; Hancock, Bruce

    2005-01-01

    In this paper, we present the test and characterization results for a back-illuminated megapixel CMOS imager. The imager pixel consists of a standard junction photodiode coupled to a three transistor-per-pixel switched source-follower readout [1]. The imager also consists of integrated timing and control and bias generation circuits, and provides analog output. The analog column-scan circuits were implemented in such a way that the imager could be configured to run in off-chip correlated double-sampling (CDS) mode. The imager was originally designed for normal front-illuminated operation, and was fabricated in a commercially available 0.5 pn triple-metal CMOS-imager compatible process. For backside illumination, the imager was thinned by etching away the substrate was etched away in a post-fabrication processing step.

  17. A CMOS image sensor dedicated to medical gamma camera application

    NASA Astrophysics Data System (ADS)

    Salahuddin, Nur S.; Paindavoine, Michel; Ginhac, Dominique; Parmentier, Michel; Tamda, Najia

    2005-03-01

    Generally, medical Gamma Camera are based on the Anger principle. These cameras use a scintillator block coupled to a bulky array of photomultiplier tube (PMT). To simplify this, we designed a new integrated CMOS image sensor in order to replace bulky PMT photodetetors. We studied several photodiodes sensors including current mirror amplifiers. These photodiodes have been fabricated using a CMOS 0.6 micrometers process from Austria Mikro Systeme (AMS). Each sensor pixel in the array occupies respectively, 1mm x 1mm area, 0.5mm x 0.5mm area and 0.2mm 0.2mm area with fill factor 98 % and total chip area is 2 square millimeters. The sensor pixels show a logarithmic response in illumination and are capable of detecting very low green light emitting diode (less than 0.5 lux) . These results allow to use our sensor in new Gamma Camera solid-state concept.

  18. A functional hybrid memristor crossbar-array/CMOS system for data storage and neuromorphic applications.

    PubMed

    Kim, Kuk-Hwan; Gaba, Siddharth; Wheeler, Dana; Cruz-Albrecht, Jose M; Hussain, Tahir; Srinivasa, Narayan; Lu, Wei

    2012-01-11

    Crossbar arrays based on two-terminal resistive switches have been proposed as a leading candidate for future memory and logic applications. Here we demonstrate a high-density, fully operational hybrid crossbar/CMOS system composed of a transistor- and diode-less memristor crossbar array vertically integrated on top of a CMOS chip by taking advantage of the intrinsic nonlinear characteristics of the memristor element. The hybrid crossbar/CMOS system can reliably store complex binary and multilevel 1600 pixel bitmap images using a new programming scheme.

  19. Ion traps fabricated in a CMOS foundry

    SciTech Connect

    Mehta, K. K.; Ram, R. J.; Eltony, A. M.; Chuang, I. L.; Bruzewicz, C. D.; Sage, J. M. Chiaverini, J.

    2014-07-28

    We demonstrate trapping in a surface-electrode ion trap fabricated in a 90-nm CMOS (complementary metal-oxide-semiconductor) foundry process utilizing the top metal layer of the process for the trap electrodes. The process includes doped active regions and metal interconnect layers, allowing for co-fabrication of standard CMOS circuitry as well as devices for optical control and measurement. With one of the interconnect layers defining a ground plane between the trap electrode layer and the p-type doped silicon substrate, ion loading is robust and trapping is stable. We measure a motional heating rate comparable to those seen in surface-electrode traps of similar size. This demonstration of scalable quantum computing hardware utilizing a commercial CMOS process opens the door to integration and co-fabrication of electronics and photonics for large-scale quantum processing in trapped-ion arrays.

  20. Investigation of HV/HR-CMOS technology for the ATLAS Phase-II Strip Tracker Upgrade

    NASA Astrophysics Data System (ADS)

    Fadeyev, V.; Galloway, Z.; Grabas, H.; Grillo, A. A.; Liang, Z.; Martinez-Mckinney, F.; Seiden, A.; Volk, J.; Affolder, A.; Buckland, M.; Meng, L.; Arndt, K.; Bortoletto, D.; Huffman, T.; John, J.; McMahon, S.; Nickerson, R.; Phillips, P.; Plackett, R.; Shipsey, I.; Vigani, L.; Bates, R.; Blue, A.; Buttar, C.; Kanisauskas, K.; Maneuski, D.; Benoit, M.; Di Bello, F.; Caragiulo, P.; Dragone, A.; Grenier, P.; Kenney, C.; Rubbo, F.; Segal, J.; Su, D.; Tamma, C.; Das, D.; Dopke, J.; Turchetta, R.; Wilson, F.; Worm, S.; Ehrler, F.; Peric, I.; Gregor, I. M.; Stanitzki, M.; Hoeferkamp, M.; Seidel, S.; Hommels, L. B. A.; Kramberger, G.; Mandić, I.; Mikuž, M.; Muenstermann, D.; Wang, R.; Zhang, J.; Warren, M.; Song, W.; Xiu, Q.; Zhu, H.

    2016-09-01

    ATLAS has formed strip CMOS project to study the use of CMOS MAPS devices as silicon strip sensors for the Phase-II Strip Tracker Upgrade. This choice of sensors promises several advantages over the conventional baseline design, such as better resolution, less material in the tracking volume, and faster construction speed. At the same time, many design features of the sensors are driven by the requirement of minimizing the impact on the rest of the detector. Hence the target devices feature long pixels which are grouped to form a virtual strip with binary-encoded z position. The key performance aspects are radiation hardness compatibility with HL-LHC environment, as well as extraction of the full hit position with full-reticle readout architecture. To date, several test chips have been submitted using two different CMOS technologies. The AMS 350 nm is a high voltage CMOS process (HV-CMOS), that features the sensor bias of up to 120 V. The TowerJazz 180 nm high resistivity CMOS process (HR-CMOS) uses a high resistivity epitaxial layer to provide the depletion region on top of the substrate. We have evaluated passive pixel performance, and charge collection projections. The results strongly support the radiation tolerance of these devices to radiation dose of the HL-LHC in the strip tracker region. We also describe design features for the next chip submission that are motivated by our technology evaluation.

  1. Digital-pixel focal plane array development

    NASA Astrophysics Data System (ADS)

    Brown, Matthew G.; Baker, Justin; Colonero, Curtis; Costa, Joe; Gardner, Tom; Kelly, Mike; Schultz, Ken; Tyrrell, Brian; Wey, Jim

    2010-01-01

    Since 2006, MIT Lincoln Laboratory has been developing Digital-pixel Focal Plane Array (DFPA) readout integrated circuits (ROICs). To date, four 256 × 256 30 μm pitch DFPA designs with in-pixel analog to digital conversion have been fabricated using IBM 90 nm CMOS processes. The DFPA ROICs are compatible with a wide range of detector materials and cutoff wavelengths; HgCdTe, QWIP, and InGaAs photo-detectors with cutoff wavelengths ranging from 1.6 to 14.5 μm have been hybridized to the same digital-pixel readout. The digital-pixel readout architecture offers high dynamic range, A/C or D/C coupled integration, and on-chip image processing with low power orthogonal transfer operations. The newest ROIC designs support two-color operation with a single Indium bump connection. Development and characterization of the two-color DFPA designs is presented along with applications for this new digital readout technology.

  2. Damage effect on CMOS detector irradiated by single-pulse laser

    NASA Astrophysics Data System (ADS)

    Guo, Feng; Zhu, Rongzhen; Wang, Ang; Cheng, Xiang'ai

    2013-09-01

    Imaging systems are widespread observation tools used to fulfill various functions such as recognition, detection and identification. These devices such as CMOS and CCD can be damaged by laser. It is very important to study the damage mechanism of CMOS and CCD. Previous studies focused on the interference and damage of CCD. There were only a few researches on the interaction of CMOS and the laser. In this paper, using a 60ns, 1064 nm single-pulse laser to radiate the front illuminated CMOS detector, the typical experiment phenomena were observed and the corresponding energy density thresholds were measured. According to the experiment phenomena, hard damage process of CMOS can be divided into 3 stages. Based on the structure and working principle of CMOS, studying the damage mechanism of 3 stages by theoretical analysis, point damage was caused by the increase in leakage current due to structural defects resulting from thermal effects, half black line damage and black lines cross damage were caused by signal interruption due to that the device circuit fuses were cut. Enhancing the laser energy density, the damaged area expanded. Even if the laser energy density reached 1.95 J/cm2, black lines has covered most of the detector pixels, the detector still not completely lapsed, the undamaged area can imaging due to that pixels of CMOS were separated with each other. Experiments on CMOS by laser pulses at the wavelength of 1064 nm and the pulse duration in 25ps was carried out, then the thresholds with different pulse durations were measured and compared. Experiments on CMOS by fs pulsed laser at the frequency of 1 Hz, 10 Hz and 1000 Hz were carried out, respectively, the results showed that a high-repetition-rate laser was easier to damage CMOS compared to single-shot laser.

  3. Amorphous In–Ga–Zn–O thin-film transistor active pixel sensor x-ray imager for digital breast tomosynthesis

    SciTech Connect

    Zhao, Chumin; Kanicki, Jerzy

    2014-09-15

    Purpose: The breast cancer detection rate for digital breast tomosynthesis (DBT) is limited by the x-ray image quality. The limiting Nyquist frequency for current DBT systems is around 5 lp/mm, while the fine image details contained in the high spatial frequency region (>5 lp/mm) are lost. Also today the tomosynthesis patient dose is high (0.67–3.52 mGy). To address current issues, in this paper, for the first time, a high-resolution low-dose organic photodetector/amorphous In–Ga–Zn–O thin-film transistor (a-IGZO TFT) active pixel sensor (APS) x-ray imager is proposed for next generation DBT systems. Methods: The indirect x-ray detector is based on a combination of a novel low-cost organic photodiode (OPD) and a cesium iodide-based (CsI:Tl) scintillator. The proposed APS x-ray imager overcomes the difficulty of weak signal detection, when small pixel size and low exposure conditions are used, by an on-pixel signal amplification with a significant charge gain. The electrical performance of a-IGZO TFT APS pixel circuit is investigated by SPICE simulation using modified Rensselaer Polytechnic Institute amorphous silicon (a-Si:H) TFT model. Finally, the noise, detective quantum efficiency (DQE), and resolvability of the complete system are modeled using the cascaded system formalism. Results: The result demonstrates that a large charge gain of 31–122 is achieved for the proposed high-mobility (5–20 cm{sup 2}/V s) amorphous metal-oxide TFT APS. The charge gain is sufficient to eliminate the TFT thermal noise, flicker noise as well as the external readout circuit noise. Moreover, the low TFT (<10{sup −13} A) and OPD (<10{sup −8} A/cm{sup 2}) leakage currents can further reduce the APS noise. Cascaded system analysis shows that the proposed APS imager with a 75 μm pixel pitch can effectively resolve the Nyquist frequency of 6.67 lp/mm, which can be further improved to ∼10 lp/mm if the pixel pitch is reduced to 50 μm. Moreover, the

  4. Characterization of an x-ray hybrid CMOS detector with low interpixel capacitive crosstalk

    NASA Astrophysics Data System (ADS)

    Griffith, Christopher V.; Bongiorno, Stephen D.; Burrows, David N.; Falcone, Abraham D.; Prieskorn, Zachary R.

    2012-07-01

    We present the results of x-ray measurements on a hybrid CMOS detector that uses a H2RG ROIC and a unique bonding structure. The silicon absorber array has a 36μm pixel size, and the readout array has a pitch of 18μm but only one readout circuit line is bonded to each 36x36μm absorber pixel. This unique bonding structure gives the readout an effective pitch of 36μm. We find the increased pitch between readout bonds significantly reduces the interpixel capacitance of the CMOS detector reported by Bongiorno et al. 20101 and Kenter et al. 2005.2

  5. Current progress on pixel level packaging for uncooled IRFPA

    NASA Astrophysics Data System (ADS)

    Dumont, G.; Rabaud, W.; Yon, J.-J.; Carle, L.; Goudon, V.; Vialle, C.; Becker, Sébastien; Hamelin, Antoine; Arnaud, A.

    2012-06-01

    Vacuum packaging is definitely a major cost driver for uncooled IRFPA and a technological breakthrough is still expected to comply with the very low cost infrared camera market. To address this key issue, CEA-LETI is developing a Pixel Level Packaging (PLP) technology which basically consists in capping each pixel under vacuum in the direct continuation of the wafer level bolometer process. Previous CEA-LETI works have yet shown the feasibility of PLP based microbolometers that exhibit the required thermal insulation and vacuum achievement. CEA-LETI is still pushing the technology which has been now applied for the first time on a CMOS readout circuit. The paper will report on the recent progress obtained on PLP technology with particular emphasis on the optical efficiency of the PLP arrangement compared to the traditional microbolometer packaging. Results including optical performances, aging studies and compatibility with CMOS readout circuit are extensively presented.

  6. FPIX2: A radiation-hard pixel readout chip for BTeV

    SciTech Connect

    David C. Christian et al.

    2000-12-11

    A radiation-hard pixel readout chip, FPIX2, is being developed at Fermilab for the recently approved BTeV experiment. Although designed for BTeV, this chip should also be appropriate for use by CDF and DZero. A short review of this development effort is presented. Particular attention is given to the circuit redesign which was made necessary by the decision to implement FPIX2 using a standard deep-submicron CMOS process rather than an explicitly radiation-hard CMOS technology, as originally planned. The results of initial tests of prototype 0.25{micro} CMOS devices are presented, as are plans for the balance of the development effort.

  7. On noise in time-delay integration CMOS image sensors

    NASA Astrophysics Data System (ADS)

    Levski, Deyan; Choubey, Bhaskar

    2016-05-01

    Time delay integration sensors are of increasing interest in CMOS processes owing to their low cost, power and ability to integrate with other circuit readout blocks. This paper presents an analysis of the noise contributors in current day CMOS Time-Delay-Integration image sensors with various readout architectures. An analysis of charge versus voltage domain readout modes is presented, followed by a noise classification of the existing Analog Accumulator Readout (AAR) and Digital Accumulator Readout (DAR) schemes for TDI imaging. The analysis and classification of existing readout schemes include, pipelined charge transfer, buffered direct injection, voltage as well as current-mode analog accumulators and all-digital accumulator techniques. Time-Delay-Integration imaging modes in CMOS processes typically use an N-number of readout steps, equivalent to the number of TDI pixel stages. In CMOS TDI sensors, where voltage domain readout is used, the requirements over speed and noise of the ADC readout chain are increased due to accumulation of the dominant voltage readout and ADC noise with every stage N. Until this day, the latter is the primary reason for a leap-back of CMOS TDI sensors as compared to their CCD counterparts. Moreover, most commercial CMOS TDI implementations are still based on a charge-domain readout, mimicking a CCD-like operation mode. Thus, having a good understanding of each noise contributor in the signal chain, as well as its magnitude in different readout architectures, is vital for the design of future generation low-noise CMOS TDI image sensors based on a voltage domain readout. This paper gives a quantitative classification of all major noise sources for all popular implementations in the literature.

  8. On noise in time-delay integration CMOS image sensors

    NASA Astrophysics Data System (ADS)

    Levski, Deyan; Choubey, Bhaskar

    2016-05-01

    Time delay integration sensors are of increasing interest in CMOS processes owing to their low cost, power and ability to integrate with other circuit readout blocks. This paper presents an analysis of the noise contributors in current day CMOS Time-Delay-Integration image sensors with various readout architectures. An analysis of charge versus voltage domain readout modes is presented, followed by a noise classification of the existing Analog Accumulator Readout (AAR) and Digital Accumulator Readout (DAR) schemes for TDI imaging. The analysis and classification of existing readout schemes include, pipelined charge transfer, buffered direct injection, voltage as well as current-mode analog accumulators and all-digital accumulator techniques. Time-Delay-Integration imaging modes in CMOS processes typically use an N-number of readout steps, equivalent to the number of TDI pixel stages. In CMOS TDI sensors, where voltage domain readout is used, the requirements over speed and noise of the ADC readout chain are increased due to accumulation of the dominant voltage readout and ADC noise with every stage N. Until this day, the latter is the primary reason for a leap-back of CMOS TDI sensors as compared to their CCD counterparts. Moreover, most commercial CMOS TDI implementations are still based on a charge-domain readout, mimicking a CCD-like operation mode. Thus, having a good understanding of each noise contributor in the signal chain, as well as its magnitude in different readout architectures, is vital for the design of future generation low-noise CMOS TDI image sensors based on a voltage domain readout. This paper gives a quantitative classification of all major noise sources for all popular implementations in the literature.

  9. PixelLearn

    NASA Technical Reports Server (NTRS)

    Mazzoni, Dominic; Wagstaff, Kiri; Bornstein, Benjamin; Tang, Nghia; Roden, Joseph

    2006-01-01

    PixelLearn is an integrated user-interface computer program for classifying pixels in scientific images. Heretofore, training a machine-learning algorithm to classify pixels in images has been tedious and difficult. PixelLearn provides a graphical user interface that makes it faster and more intuitive, leading to more interactive exploration of image data sets. PixelLearn also provides image-enhancement controls to make it easier to see subtle details in images. PixelLearn opens images or sets of images in a variety of common scientific file formats and enables the user to interact with several supervised or unsupervised machine-learning pixel-classifying algorithms while the user continues to browse through the images. The machinelearning algorithms in PixelLearn use advanced clustering and classification methods that enable accuracy much higher than is achievable by most other software previously available for this purpose. PixelLearn is written in portable C++ and runs natively on computers running Linux, Windows, or Mac OS X.

  10. Design of a 3D-IC multi-resolution digital pixel sensor

    NASA Astrophysics Data System (ADS)

    Brochard, N.; Nebhen, J.; Dubois, J.; Ginhac, D.

    2016-04-01

    This paper presents a digital pixel sensor (DPS) integrating a sigma-delta analog-to-digital converter (ADC) at pixel level. The digital pixel includes a photodiode, a delta-sigma modulation and a digital decimation filter. It features adaptive dynamic range and multiple resolutions (up to 10-bit) with a high linearity. A specific row decoder and column decoder are also designed to permit to read a specific pixel chosen in the matrix and its neighborhood of 4 x 4. Finally, a complete design with the CMOS 130 nm 3D-IC FaStack Tezzaron technology is also described, revealing a high fill-factor of about 80%.

  11. Combined reactor neutron beam and {sup 60}Co γ-ray radiation effects on CMOS APS image sensors

    SciTech Connect

    Wang, Zujun Chen, Wei; Sheng, Jiangkun; Liu, Yan; Xiao, Zhigang; Huang, Shaoyan; Liu, Minbo

    2015-02-15

    The combined reactor neutron beam and {sup 60}Co γ-ray radiation effects on complementary metal-oxide semiconductor (CMOS) active pixel sensors (APS) have been discussed and some new experimental phenomena are presented. The samples are manufactured in the standard 0.35-μm CMOS technology. Two samples were first exposed to {sup 60}Co γ-rays up to the total ionizing dose (TID) level of 200 krad(Si) at the dose rates of 50.0 and 0.2 rad(Si)/s, and then exposed to neutron fluence up to 1 × 10{sup 11} n/cm{sup 2} (1-MeV equivalent neutron fluence). One sample was first exposed to neutron fluence up to 1 × 10{sup 11} n/cm{sup 2} (1-MeV equivalent neutron fluence), and then exposed to {sup 60}Co γ-rays up to the TID level of 200 krad(Si) at the dose rate of 0.2 rad(Si)/s. The mean dark signal (K{sub D}), the dark signal non-uniformity (DSNU), and the noise (V{sub N}) versus the total dose and neutron fluence has been investigated. The degradation mechanisms of CMOS APS image sensors have been analyzed, especially for the interaction induced by neutron displacement damage and TID damage.

  12. Digital pixel readout integrated circuit architectures for LWIR

    NASA Astrophysics Data System (ADS)

    Shafique, Atia; Yazici, Melik; Kayahan, Huseyin; Ceylan, Omer; Gurbuz, Yasar

    2015-06-01

    This paper presents and discusses digital pixel readout integrated circuit architectures for long wavelength infrared (LWIR) in CMOS technology. Presented architectures are designed for scanning and staring arrays type detectors respectively. For scanning arrays, digital time delay integration (TDI) is implemented on 8 pixels with sampling rate up to 3 using CMOS 180nm technology. Input referred noise of ROIC is below 750 rms electron meanwhile power dissipation is appreciably under 30mW. ROIC design is optimized to perform at room as well as cryogenic temperatures. For staring type arrays, a digital pixel architecture relying on coarse quantization with pulse frequency modulation (PFM) and novel approach of extended integration is presented. It can achieve extreme charge handling capacity of 2.04Ge- with 20 bit output resolution and power dissipation below 350 nW in CMOS 90nm technology. Efficient mechanism of measuring the time to estimate the remaining charge on integration capacitor in order to achieve low SNR has employed.

  13. Pixel structures to compensate nonuniform threshold voltage and mobility of polycrystalline silicon thin-film transistors using subthreshold current for large-size active matrix organic light-emitting diode displays

    NASA Astrophysics Data System (ADS)

    Na, Jun-Seok; Kwon, Oh-Kyong

    2014-01-01

    We propose pixel structures for large-size and high-resolution active matrix organic light-emitting diode (AMOLED) displays using a polycrystalline silicon (poly-Si) thin-film transistor (TFT) backplane. The proposed pixel structures compensate the variations of the threshold voltage and mobility of the driving TFT using the subthreshold current. The simulated results show that the emission current error of the proposed pixel structure B ranges from -2.25 to 2.02 least significant bit (LSB) when the variations of the threshold voltage and mobility of the driving TFT are ±0.5 V and ±10%, respectively.

  14. A high-speed CMOS image sensor with column-parallel single capacitor CDSs and single-slope ADCs

    NASA Astrophysics Data System (ADS)

    Li, Quanliang; Shi, Cong; Wu, Nanjian

    2011-08-01

    This paper presents a high speed CMOS image sensor (CIS) with column-parallel single capacitor correlated double samplings (CDSs), programmable gain amplifiers (PGAs) and single-slope analog-to-digital converters (ADCs). The single capacitor CDS circuit has only one capacitor so that the area CDS circuit is small. In order to attain appropriate image contrast under different light conditions, the signal range can be adjusted by PGA. Single-slope ADC has smaller chip area than others ADCs and is suitable for column-parallel CIS architectures. A prototype sensor of 256x256 pixels was realized in a 0.13μm 1P3M CIS process. Its pixel circuit is 4T active pixel sensor (APS) and pixel size is 10x10μm2. Total chip area is 4x4mm2. The prototype achieves the full frame rate in excess of 250 frames per second, the sensitivity of 10.7V/lx•s, the conversion gain of 55.6μV/e and the column-to- column fixed-pattern noise (FPN) 0.41%.

  15. SNR improvement for hyperspectral application using frame and pixel binning

    NASA Astrophysics Data System (ADS)

    Rehman, Sami Ur; Kumar, Ankush; Banerjee, Arup

    2016-05-01

    Hyperspectral imaging spectrometer systems are increasingly being used in the field of remote sensing for variety of civilian and military applications. The ability of such instruments in discriminating finer spectral features along with improved spatial and radiometric performance have made such instruments a powerful tool in the field of remote sensing. Design and development of spaceborne hyper spectral imaging spectrometers poses lot of technological challenges in terms of optics, dispersion element, detectors, electronics and mechanical systems. The main factors that define the type of detectors are the spectral region, SNR, dynamic range, pixel size, number of pixels, frame rate, operating temperature etc. Detectors with higher quantum efficiency and higher well depth are the preferred choice for such applications. CCD based Si detectors serves the requirement of high well depth for VNIR band spectrometers but suffers from smear. Smear can be controlled by using CMOS detectors. Si CMOS detectors with large format arrays are available. These detectors generally have smaller pitch and low well depth. Binning technique can be used with available CMOS detectors to meet the large swath, higher resolution and high SNR requirements. Availability of larger dwell time of satellite can be used to bin multiple frames to increase the signal collection even with lesser well depth detectors and ultimately increase the SNR. Lab measurements reveal that SNR improvement by frame binning is more in comparison to pixel binning. Effect of pixel binning as compared to the frame binning will be discussed and degradation of SNR as compared to theoretical value for pixel binning will be analyzed.

  16. Fibre-optic coupling to high-resolution CCD and CMOS image sensors

    NASA Astrophysics Data System (ADS)

    van Silfhout, R. G.; Kachatkou, A. S.

    2008-12-01

    We describe a simple method of gluing fibre-optic faceplates to complementary metal oxide semiconductor (CMOS) active pixel and charge coupled device (CCD) image sensors and report on their performance. Cross-sectional cuts reveal that the bonding layer has a thickness close to the diameter of the individual fibres and is uniform over the whole sensor area. Our method requires no special tools or alignment equipment and gives reproducible and high-quality results. The method maintains a uniform bond layer thickness even if sensor dies are mounted at slight angles with their package. These fibre-coupled sensors are of particular interest to X-ray imaging applications but also provide a solution for compact optical imaging systems.

  17. A 75-ps Gated CMOS Image Sensor with Low Parasitic Light Sensitivity

    PubMed Central

    Zhang, Fan; Niu, Hanben

    2016-01-01

    In this study, a 40 × 48 pixel global shutter complementary metal-oxide-semiconductor (CMOS) image sensor with an adjustable shutter time as low as 75 ps was implemented using a 0.5-μm mixed-signal CMOS process. The implementation consisted of a continuous contact ring around each p+/n-well photodiode in the pixel array in order to apply sufficient light shielding. The parasitic light sensitivity of the in-pixel storage node was measured to be 1/8.5 × 107 when illuminated by a 405-nm diode laser and 1/1.4 × 104 when illuminated by a 650-nm diode laser. The pixel pitch was 24 μm, the size of the square p+/n-well photodiode in each pixel was 7 μm per side, the measured random readout noise was 217 e− rms, and the measured dynamic range of the pixel of the designed chip was 5500:1. The type of gated CMOS image sensor (CIS) that is proposed here can be used in ultra-fast framing cameras to observe non-repeatable fast-evolving phenomena. PMID:27367699

  18. A 75-ps Gated CMOS Image Sensor with Low Parasitic Light Sensitivity.

    PubMed

    Zhang, Fan; Niu, Hanben

    2016-06-29

    In this study, a 40 × 48 pixel global shutter complementary metal-oxide-semiconductor (CMOS) image sensor with an adjustable shutter time as low as 75 ps was implemented using a 0.5-μm mixed-signal CMOS process. The implementation consisted of a continuous contact ring around each p+/n-well photodiode in the pixel array in order to apply sufficient light shielding. The parasitic light sensitivity of the in-pixel storage node was measured to be 1/8.5 × 10⁷ when illuminated by a 405-nm diode laser and 1/1.4 × 10⁴ when illuminated by a 650-nm diode laser. The pixel pitch was 24 μm, the size of the square p+/n-well photodiode in each pixel was 7 μm per side, the measured random readout noise was 217 e(-) rms, and the measured dynamic range of the pixel of the designed chip was 5500:1. The type of gated CMOS image sensor (CIS) that is proposed here can be used in ultra-fast framing cameras to observe non-repeatable fast-evolving phenomena.

  19. A 75-ps Gated CMOS Image Sensor with Low Parasitic Light Sensitivity.

    PubMed

    Zhang, Fan; Niu, Hanben

    2016-01-01

    In this study, a 40 × 48 pixel global shutter complementary metal-oxide-semiconductor (CMOS) image sensor with an adjustable shutter time as low as 75 ps was implemented using a 0.5-μm mixed-signal CMOS process. The implementation consisted of a continuous contact ring around each p+/n-well photodiode in the pixel array in order to apply sufficient light shielding. The parasitic light sensitivity of the in-pixel storage node was measured to be 1/8.5 × 10⁷ when illuminated by a 405-nm diode laser and 1/1.4 × 10⁴ when illuminated by a 650-nm diode laser. The pixel pitch was 24 μm, the size of the square p+/n-well photodiode in each pixel was 7 μm per side, the measured random readout noise was 217 e(-) rms, and the measured dynamic range of the pixel of the designed chip was 5500:1. The type of gated CMOS image sensor (CIS) that is proposed here can be used in ultra-fast framing cameras to observe non-repeatable fast-evolving phenomena. PMID:27367699

  20. Sub-pixel mapping of water boundaries using pixel swapping algorithm (case study: Tagliamento River, Italy)

    NASA Astrophysics Data System (ADS)

    Niroumand-Jadidi, Milad; Vitti, Alfonso

    2015-10-01

    Taking the advantages of remotely sensed data for mapping and monitoring of water boundaries is of particular importance in many different management and conservation activities. Imagery data are classified using automatic techniques to produce maps entering the water bodies' analysis chain in several and different points. Very commonly, medium or coarse spatial resolution imagery is used in studies of large water bodies. Data of this kind is affected by the presence of mixed pixels leading to very outstanding problems, in particular when dealing with boundary pixels. A considerable amount of uncertainty inescapably occurs when conventional hard classifiers (e.g., maximum likelihood) are applied on mixed pixels. In this study, Linear Spectral Mixture Model (LSMM) is used to estimate the proportion of water in boundary pixels. Firstly by applying an unsupervised clustering, the water body is identified approximately and a buffer area considered ensuring the selection of entire boundary pixels. Then LSMM is applied on this buffer region to estimate the fractional maps. However, resultant output of LSMM does not provide a sub-pixel map corresponding to water abundances. To tackle with this problem, Pixel Swapping (PS) algorithm is used to allocate sub-pixels within mixed pixels in such a way to maximize the spatial proximity of sub-pixels and pixels in the neighborhood. The water area of two segments of Tagliamento River (Italy) are mapped in sub-pixel resolution (10m) using a 30m Landsat image. To evaluate the proficiency of the proposed approach for sub-pixel boundary mapping, the image is also classified using a conventional hard classifier. A high resolution image of the same area is also classified and used as a reference for accuracy assessment. According to the results, sub-pixel map shows in average about 8 percent higher overall accuracy than hard classification and fits very well in the boundaries with the reference map.

  1. Monolithic pixel detectors with 0.2 μm FD-SOI pixel process technology

    NASA Astrophysics Data System (ADS)

    Miyoshi, Toshinobu; Arai, Yasuo; Chiba, Tadashi; Fujita, Yowichi; Hara, Kazuhiko; Honda, Shunsuke; Igarashi, Yasushi; Ikegami, Yoichi; Ikemoto, Yukiko; Kohriki, Takashi; Ohno, Morifumi; Ono, Yoshimasa; Shinoda, Naoyuki; Takeda, Ayaki; Tauchi, Kazuya; Tsuboyama, Toru; Tadokoro, Hirofumi; Unno, Yoshinobu; Yanagihara, Masashi

    2013-12-01

    Truly monolithic pixel detectors were fabricated with 0.2 μm SOI pixel process technology by collaborating with LAPIS Semiconductor Co., Ltd. for particle tracking experiment, X-ray imaging and medical applications. CMOS circuits were fabricated on a thin SOI layer and connected to diodes formed in the silicon handle wafer through the buried oxide layer. We can choose the handle wafer and therefore high-resistivity silicon is also available. Double SOI (D-SOI) wafers fabricated from Czochralski (CZ)-SOI wafers were newly obtained and successfully processed in 2012. The top SOI layers are used as electric circuits and the middle SOI layers used as a shield layer against the back-gate effect and cross-talk between sensors and CMOS circuits, and as an electrode to compensate for the total ionizing dose (TID) effect. In 2012, we developed two SOI detectors, INTPIX5 and INTPIX3g. A spatial resolution study was done with INTPIX5 and it showed excellent performance. The TID effect study with D-SOI INTPIX3g detectors was done and we confirmed improvement of TID tolerance in D-SOI sensors.

  2. A CMOS Time-Resolved Fluorescence Lifetime Analysis Micro-System

    PubMed Central

    Rae, Bruce R.; Muir, Keith R.; Gong, Zheng; McKendry, Jonathan; Girkin, John M.; Gu, Erdan; Renshaw, David; Dawson, Martin D.; Henderson, Robert K.

    2009-01-01

    We describe a CMOS-based micro-system for time-resolved fluorescence lifetime analysis. It comprises a 16 × 4 array of single-photon avalanche diodes (SPADs) fabricated in 0.35 μm high-voltage CMOS technology with in-pixel time-gated photon counting circuitry and a second device incorporating an 8 × 8 AlInGaN blue micro-pixellated light-emitting diode (micro-LED) array bump-bonded to an equivalent array of LED drivers realized in a standard low-voltage 0.35 μm CMOS technology, capable of producing excitation pulses with a width of 777 ps (FWHM). This system replaces instrumentation based on lasers, photomultiplier tubes, bulk optics and discrete electronics with a PC-based micro-system. Demonstrator lifetime measurements of colloidal quantum dot and Rhodamine samples are presented. PMID:22291564

  3. A 128 × 128 Pixel Complementary Metal Oxide Semiconductor Image Sensor with an Improved Pixel Architecture for Detecting Modulated Light Signals

    NASA Astrophysics Data System (ADS)

    Yamamoto, Koji; Oya, Yu; Kagawa, Keiichiro; Nunoshita, Masahiro; Ohta, Jun; Watanabe, Kunihiro

    A complementary metal oxide semiconductor (CMOS) image sensor for the detection of modulated light under background illumination has been developed. When an object is illuminated by a modulated light source under background illumination the sensor enables the object alone to be captured. This paper describes improvements in pixel architecture for reducing fixed pattern noise (FPN) and improving the sensitivity of the image sensor. The improved 128 × 128 pixel CMOS image sensor with a column parallel analog-to-digital converter (ADC) circuit was fabricated using 0.35-mm CMOS technology. The resulting captured images are shown and the properties of improved pixel architecture are described. The image sensor has FPN of 1/28 that of the previous image sensor and an improved pixel architecture comprising a common in-pixel amp and a correlated double sampling (CDS) circuit. The use of a split photogate increases the sensitivity of the image sensor to 1.3 times that of the previous image sensor.

  4. CMOS Amperometric ADC With High Sensitivity, Dynamic Range and Power Efficiency for Air Quality Monitoring.

    PubMed

    Li, Haitao; Boling, C Sam; Mason, Andrew J

    2016-08-01

    Airborne pollutants are a leading cause of illness and mortality globally. Electrochemical gas sensors show great promise for personal air quality monitoring to address this worldwide health crisis. However, implementing miniaturized arrays of such sensors demands high performance instrumentation circuits that simultaneously meet challenging power, area, sensitivity, noise and dynamic range goals. This paper presents a new multi-channel CMOS amperometric ADC featuring pixel-level architecture for gas sensor arrays. The circuit combines digital modulation of input currents and an incremental Σ∆ ADC to achieve wide dynamic range and high sensitivity with very high power efficiency and compact size. Fabricated in 0.5 [Formula: see text] CMOS, the circuit was measured to have 164 dB cross-scale dynamic range, 100 fA sensitivity while consuming only 241 [Formula: see text] and 0.157 [Formula: see text] active area per channel. Electrochemical experiments with liquid and gas targets demonstrate the circuit's real-time response to a wide range of analyte concentrations. PMID:27352395

  5. High density pixel array

    NASA Technical Reports Server (NTRS)

    Wiener-Avnear, Eliezer (Inventor); McFall, James Earl (Inventor)

    2004-01-01

    A pixel array device is fabricated by a laser micro-milling method under strict process control conditions. The device has an array of pixels bonded together with an adhesive filling the grooves between adjacent pixels. The array is fabricated by moving a substrate relative to a laser beam of predetermined intensity at a controlled, constant velocity along a predetermined path defining a set of grooves between adjacent pixels so that a predetermined laser flux per unit area is applied to the material, and repeating the movement for a plurality of passes of the laser beam until the grooves are ablated to a desired depth. The substrate is of an ultrasonic transducer material in one example for fabrication of a 2D ultrasonic phase array transducer. A substrate of phosphor material is used to fabricate an X-ray focal plane array detector.

  6. Hybrid CMOS SiPIN detectors as astronomical imagers

    NASA Astrophysics Data System (ADS)

    Simms, Lance Michael

    Charge Coupled Devices (CCDs) have dominated optical and x-ray astronomy since their inception in 1969. Only recently, through improvements in design and fabrication methods, have imagers that use Complimentary Metal Oxide Semiconductor (CMOS) technology gained ground on CCDs in scientific imaging. We are now in the midst of an era where astronomers might begin to design optical telescope cameras that employ CMOS imagers. The first three chapters of this dissertation are primarily composed of introductory material. In them, we discuss the potential advantages that CMOS imagers offer over CCDs in astronomical applications. We compare the two technologies in terms of the standard metrics used to evaluate and compare scientific imagers: dark current, read noise, linearity, etc. We also discuss novel features of CMOS devices and the benefits they offer to astronomy. In particular, we focus on a specific kind of hybrid CMOS sensor that uses Silicon PIN photodiodes to detect optical light in order to overcome deficiencies of commercial CMOS sensors. The remaining four chapters focus on a specific type of hybrid CMOS Silicon PIN sensor: the Teledyne Hybrid Visible Silicon PIN Imager (HyViSI). In chapters four and five, results from testing HyViSI detectors in the laboratory and at the Kitt Peak 2.1m telescope are presented. We present our laboratory measurements of the standard detector metrics for a number of HyViSI devices, ranging from 1k×1k to 4k×4k format. We also include a description of the SIDECAR readout circuit that was used to control the detectors. We then show how they performed at the telescope in terms of photometry, astrometry, variability measurement, and telescope focusing and guiding. Lastly, in the final two chapters we present results on detector artifacts such as pixel crosstalk, electronic crosstalk, and image persistence. One form of pixel crosstalk that has not been discussed elsewhere in the literature, which we refer to as Interpixel Charge

  7. Noise sources and noise suppression in CMOS imagers

    NASA Astrophysics Data System (ADS)

    Pain, Bedabrata; Cunningham, Thomas J.; Hancock, Bruce R.

    2004-01-01

    Mechanisms for noise coupling in CMOS imagers are complex, since unlike a CCD, a CMOS imager has to be considered as a full digital-system-on-a-chip, with a highly sensitive front-end. In this paper, we analyze the noise sources in a photodiode CMOS imager, and model their propagation through the signal chain to determine the nature and magnitude of noise coupling. We present methods for reduction of noise, and present measured data to show their viability. For temporal read noise reduction, we present pixel signal chain design techniques to achieve near 2 electrons read noise. We model the front-end reset noise both for conventional photodiode and CTIA type of pixels. For the suppression of reset noise, we present a column feedback-reset method to reduce reset noise below 6 electrons. For spatial noise reduction, we present the design of column signal chain that suppresses both spatial noise and power supply coupling noise. We conclude by identifying problems in low-noise design caused by dark current spatial distribution.

  8. Fast signal transfer in a large-area X-ray CMOS image sensor

    NASA Astrophysics Data System (ADS)

    Kim, M. S.; Kang, D. U.; Lee, D. H.; Kim, H.; Cho, G.; Jae, M.

    2014-08-01

    For 2-d X-ray imaging, such as mammography and non-destructive test, a sensor should have a large-area because the sensor for typical X-ray beams cannot use optical lens system. To make a large-area 2-d X-ray image sensor using crystal Si, a technique of tiling unit CMOS image sensors into 2 × 2 or 2 × 3 array can be used. In a unit CMOS image sensor made of most common 8-inch Si wafers, the signal line can be up to ~ 180 mm long. Then its parasitic capacitance is up to ~ 25 pF and its resistance is up to ~ 51 kΩ (0.18 μm, 1P3M process). This long signal line may enlarge the row time up to ~ 50 μsec in case of the signal from the top row pixels to the readout amplifiers located at the bottom of the sensor chip. The output signal pulse is typically characterized by three components in sequence; a charging time (a rising part), a reading time and a discharging time (a falling part). Among these, the discharging time is the longest, and it limits the speed or the frame rate of the X-ray imager. We proposed a forced discharging method which uses a bypass transistor in parallel with the current source of the column signal line. A chip for testing the idea was fabricated by a 0.18 μm process. A active pixel sensor with three transistors and a 3-π RC model of the long line were simulated together. The test results showed that the turning on-and-off of the proposed bypass transistor only during the discharging time could dramatically reduce the discharging time from ~ 50 μsec to ~ 2 μsec, which is the physically minimum time determined by the long metal line capacitance.

  9. TIME-RESOLVED EMISSION FROM BRIGHT HOT PIXELS OF AN ACTIVE REGION OBSERVED IN THE EUV BAND WITH SDO/AIA AND MULTI-STRANDED LOOP MODELING

    SciTech Connect

    Tajfirouze, E.; Reale, F.; Petralia, A.; Testa, P.

    2016-01-01

    Evidence of small amounts of very hot plasma has been found in active regions and might be an indication of impulsive heating released at spatial scales smaller than the cross-section of a single loop. We investigate the heating and substructure of coronal loops in the core of one such active region by analyzing the light curves in the smallest resolution elements of solar observations in two EUV channels (94 and 335 Å) from the Atmospheric Imaging Assembly on board the Solar Dynamics Observatory. We model the evolution of a bundle of strands heated by a storm of nanoflares by means of a hydrodynamic 0D loop model (EBTEL). The light curves obtained from a random combination of those of single strands are compared to the observed light curves either in a single pixel or in a row of pixels, simultaneously in the two channels, and using two independent methods: an artificial intelligent system (Probabilistic Neural Network) and a simple cross-correlation technique. We explore the space of the parameters to constrain the distribution of the heat pulses, their duration, their spatial size, and, as a feedback on the data, their signatures on the light curves. From both methods the best agreement is obtained for a relatively large population of events (1000) with a short duration (less than 1 minute) and a relatively shallow distribution (power law with index 1.5) in a limited energy range (1.5 decades). The feedback on the data indicates that bumps in the light curves, especially in the 94 Å channel, are signatures of a heating excess that occurred a few minutes before.

  10. Time-resolved Emission from Bright Hot Pixels of an Active Region Observed in the EUV Band with SDO/AIA and Multi-stranded Loop Modeling

    NASA Astrophysics Data System (ADS)

    Tajfirouze, E.; Reale, F.; Petralia, A.; Testa, P.

    2016-01-01

    Evidence of small amounts of very hot plasma has been found in active regions and might be an indication of impulsive heating released at spatial scales smaller than the cross-section of a single loop. We investigate the heating and substructure of coronal loops in the core of one such active region by analyzing the light curves in the smallest resolution elements of solar observations in two EUV channels (94 and 335 Å) from the Atmospheric Imaging Assembly on board the Solar Dynamics Observatory. We model the evolution of a bundle of strands heated by a storm of nanoflares by means of a hydrodynamic 0D loop model (EBTEL). The light curves obtained from a random combination of those of single strands are compared to the observed light curves either in a single pixel or in a row of pixels, simultaneously in the two channels, and using two independent methods: an artificial intelligent system (Probabilistic Neural Network) and a simple cross-correlation technique. We explore the space of the parameters to constrain the distribution of the heat pulses, their duration, their spatial size, and, as a feedback on the data, their signatures on the light curves. From both methods the best agreement is obtained for a relatively large population of events (1000) with a short duration (less than 1 minute) and a relatively shallow distribution (power law with index 1.5) in a limited energy range (1.5 decades). The feedback on the data indicates that bumps in the light curves, especially in the 94 Å channel, are signatures of a heating excess that occurred a few minutes before.

  11. Regenerative switching CMOS system

    DOEpatents

    Welch, James D.

    1998-01-01

    Complementary Metal Oxide Semiconductor (CMOS) Schottky barrier Field Effect Transistor systems, which are a seriesed combination of N and P-Channel MOSFETS, in which Source Schottky barrier junctions of the N and P-Channel Schottky barrier MOSFETS are electically interconnected, (rather than the Drains as in conventional diffused junction CMOS), which Schottky barrier MOSFET system demonstrates Regenerative Inverting Switching Characteristics in use are disclosed. Both the N and P-Channel Schottky barrier MOSFET devices are unique in that they provide operational Drain Current vs. Drain to Source voltage as a function of Gate voltage only where the polarities of the Drain voltage and Gate voltage are opposite, referenced to the Source as a common terminal, and where the polarity of the voltage applied to the Gate is appropriate to cause Channel inversion. Experimentally derived results which demonstrate and verify the operation of N and P-Channel Schottky barrier MOSFETS actually fabricated on P and N-type Silicon respectively, by a common procedure using vacuum deposited Chromium as a Schottky barrier forming metal, are also provided.

  12. Regenerative switching CMOS system

    DOEpatents

    Welch, J.D.

    1998-06-02

    Complementary Metal Oxide Semiconductor (CMOS) Schottky barrier Field Effect Transistor systems, which are a series combination of N and P-Channel MOSFETS, in which Source Schottky barrier junctions of the N and P-Channel Schottky barrier MOSFETS are electrically interconnected, (rather than the Drains as in conventional diffused junction CMOS), which Schottky barrier MOSFET system demonstrates Regenerative Inverting Switching Characteristics in use are disclosed. Both the N and P-Channel Schottky barrier MOSFET devices are unique in that they provide operational Drain Current vs. Drain to Source voltage as a function of Gate voltage only where the polarities of the Drain voltage and Gate voltage are opposite, referenced to the Source as a common terminal, and where the polarity of the voltage applied to the Gate is appropriate to cause Channel inversion. Experimentally derived results which demonstrate and verify the operation of N and P-Channel Schottky barrier MOSFETS actually fabricated on P and N-type Silicon respectively, by a common procedure using vacuum deposited Chromium as a Schottky barrier forming metal, are also provided. 14 figs.

  13. High frame rate measurements of semiconductor pixel detector readout IC

    NASA Astrophysics Data System (ADS)

    Szczygiel, R.; Grybos, P.; Maj, P.

    2012-07-01

    We report on high count rate and high frame rate measurements of a prototype IC named FPDR90, designed for readouts of hybrid pixel semiconductor detectors used for X-ray imaging applications. The FPDR90 is constructed in 90 nm CMOS technology and has dimensions of 4 mm×4 mm. Its main part is a matrix of 40×32 pixels with 100 μm×100 μm pixel size. The chip works in the single photon counting mode with two discriminators and two 16-bit ripple counters per pixel. The count rate per pixel depends on the effective CSA feedback resistance and can be set up to 6 Mcps. The FPDR90 can operate in the continuous readout mode, with zero dead time. Due to the architecture of digital blocks in pixel, one can select the number of bits read out from each counter from 1 to 16. Because in the FPDR90 prototype only one data output is available, the frame rate is 9 kfps and 72 kfps for 16 bits and 1 bit readout, respectively (with nominal clock frequency of 200 MHz).

  14. Enhancing the fill-factor of CMOS SPAD arrays using microlens integration

    NASA Astrophysics Data System (ADS)

    Intermite, G.; Warburton, R. E.; McCarthy, A.; Ren, X.; Villa, F.; Waddie, A. J.; Taghizadeh, M. R.; Zou, Y.; Zappa, F.; Tosi, A.; Buller, G. S.

    2015-05-01

    Arrays of single-photon avalanche diode (SPAD) detectors were fabricated, using a 0.35 μm CMOS technology process, for use in applications such as time-of-flight 3D ranging and microscopy. Each 150 x 150 μm pixel comprises a 30 μm active area diameter SPAD and its associated circuitry for counting, timing and quenching, resulting in a fill-factor of 3.14%. This paper reports how a higher effective fill-factor was achieved as a result of integrating microlens arrays on top of the 32 x 32 SPAD arrays. Diffractive and refractive microlens arrays were designed to concentrate the incoming light onto the active area of each pixel. A telecentric imaging system was used to measure the improvement factor (IF) resulting from microlens integration, whilst varying the f-number of incident light from f/2 to f/22 in one-stop increments across a spectral range of 500-900 nm. These measurements have demonstrated an increasing IF with fnumber, and a maximum of ~16 at the peak wavelength, showing a good agreement with theoretical values. An IF of 16 represents the highest value reported in the literature for microlenses integrated onto a SPAD detector array. The results from statistical analysis indicated the variation of detector efficiency was between 3-10% across the whole f-number range, demonstrating excellent uniformity across the detector plane with and without microlenses.

  15. The Speedster-EXD - A New Event-Triggered Hybrid CMOS X-ray Detector

    NASA Astrophysics Data System (ADS)

    Griffith, Christopher; Falcone, Abe; Prieskorn, Zach; Burrows, David

    2015-04-01

    We present the characterization of a new event driven x-ray hybrid CMOS detector developed by Penn State University in collaboration with Teledyne Imaging Sensors. Hybrid CMOS detectors currently have many advantages over CCDs including lower susceptibility to radiation damage, lower power consumption, and faster read-out time to avoid pile-up. The Speedster-EXD hybrid CMOS detector has many new features that improve upon the previous generation of detectors including two new in-pixel features that reduce noise from known noise sources: (1) a low-noise, high-gain CTIA amplifier to eliminate interpixel capacitance crosstalk and (2) in-pixel CDS subtraction to reduce kTC noise. The most exciting new feature of the Speedster-EXD is an in-pixel comparator that enables read out of only the pixels which contain signal from an x-ray event. The comparator threshold can be set by the user so that only pixels with signal above the set threshold are read out. This comparator feature can increase effective frame rate by orders of magnitude. We present the read noise, dark current, interpixel capacitance, energy resolution, and gain variation measurements of two Speedster-EXD detectors.

  16. IR CMOS: near infrared enhanced digital imaging (Presentation Recording)

    NASA Astrophysics Data System (ADS)

    Pralle, Martin U.; Carey, James E.; Joy, Thomas; Vineis, Chris J.; Palsule, Chintamani

    2015-08-01

    SiOnyx has demonstrated imaging at light levels below 1 mLux (moonless starlight) at video frame rates with a 720P CMOS image sensor in a compact, low latency camera. Low light imaging is enabled by the combination of enhanced quantum efficiency in the near infrared together with state of the art low noise image sensor design. The quantum efficiency enhancements are achieved by applying Black Silicon, SiOnyx's proprietary ultrafast laser semiconductor processing technology. In the near infrared, silicon's native indirect bandgap results in low absorption coefficients and long absorption lengths. The Black Silicon nanostructured layer fundamentally disrupts this paradigm by enhancing the absorption of light within a thin pixel layer making 5 microns of silicon equivalent to over 300 microns of standard silicon. This results in a demonstrate 10 fold improvements in near infrared sensitivity over incumbent imaging technology while maintaining complete compatibility with standard CMOS image sensor process flows. Applications include surveillance, nightvision, and 1064nm laser see spot. Imaging performance metrics will be discussed. Demonstrated performance characteristics: Pixel size : 5.6 and 10 um Array size: 720P/1.3Mpix Frame rate: 60 Hz Read noise: 2 ele/pixel Spectral sensitivity: 400 to 1200 nm (with 10x QE at 1064nm) Daytime imaging: color (Bayer pattern) Nighttime imaging: moonless starlight conditions 1064nm laser imaging: daytime imaging out to 2Km

  17. A robust color signal processing with wide dynamic range WRGB CMOS image sensor

    NASA Astrophysics Data System (ADS)

    Kawada, Shun; Kuroda, Rihito; Sugawa, Shigetoshi

    2011-01-01

    We have developed a robust color reproduction methodology by a simple calculation with a new color matrix using the formerly developed wide dynamic range WRGB lateral overflow integration capacitor (LOFIC) CMOS image sensor. The image sensor was fabricated through a 0.18 μm CMOS technology and has a 45 degrees oblique pixel array, the 4.2 μm effective pixel pitch and the W pixels. A W pixel was formed by replacing one of the two G pixels in the Bayer RGB color filter. The W pixel has a high sensitivity through the visible light waveband. An emerald green and yellow (EGY) signal is generated from the difference between the W signal and the sum of RGB signals. This EGY signal mainly includes emerald green and yellow lights. These colors are difficult to be reproduced accurately by the conventional simple linear matrix because their wave lengths are in the valleys of the spectral sensitivity characteristics of the RGB pixels. A new linear matrix based on the EGY-RGB signal was developed. Using this simple matrix, a highly accurate color processing with a large margin to the sensitivity fluctuation and noise has been achieved.

  18. Design and test of clock distribution circuits for the Macro Pixel ASIC

    NASA Astrophysics Data System (ADS)

    Gaioni, L.; De Canio, F.; Manghisoni, M.; Ratti, L.; Re, V.; Traversi, G.

    2016-07-01

    Clock distribution circuits account for a significant fraction of the power dissipation of the Macro Pixel ASIC (MPA), designed for the pixel layer readout of the so-called Pixel-Strip module in the innermost part of the CMS tracker at the High Luminosity LHC. A test chip including low power clock distribution circuits of the MPA has been designed in a 65 nm CMOS technology and thoroughly tested. This work summarizes the experimental results relevant to the prototype chip, focusing particularly on the power and speed performance and compares such results with those coming from circuit simulations.

  19. Selecting Pixels for Kepler Downlink

    NASA Technical Reports Server (NTRS)

    Bryson, Stephen T.; Jenkins, Jon M.; Klaus, Todd C.; Cote, Miles T.; Quintana, Elisa V.; Hall, Jennifer R.; Ibrahim, Khadeejah; Chandrasekaran, Hema; Caldwell, Douglas A.; Van Cleve, Jeffrey E.; Haas, Michael R.

    2010-01-01

    The Kepler mission monitors > 100,000 stellar targets using 42 2200 1024 pixel CCDs. Bandwidth constraints prevent the downlink of all 96 million pixels per 30-minute cadence, so the Kepler spacecraft downlinks a specified collection of pixels for each target. These pixels are selected by considering the object brightness, background and the signal-to-noise of each pixel, and are optimized to maximize the signal-to-noise ratio of the target. This paper describes pixel selection, creation of spacecraft apertures that efficiently capture selected pixels, and aperture assignment to a target. Diagnostic apertures, short-cadence targets and custom specified shapes are discussed.

  20. Novel Hybrid CMOS X-ray Detector Developments for Future Large Area and High Resolution X-ray Astronomy Missions

    NASA Astrophysics Data System (ADS)

    Falcone, Abe

    In the coming years, X-ray astronomy will require new soft X-ray detectors that can be read very quickly with low noise and can achieve small pixel sizes over a moderately large focal plane area. These requirements will be present for a variety of X-ray missions that will attempt to address science that was highly ranked by the Decadal Review, including missions with science that over-laps with that of IXO and ATHENA, as well as other missions addressing science topics beyond those of IXO and ATHENA. An X-ray Surveyor mission was recently endorsed by the NASA long term planning document entitled "Enduring Quests, Daring Visions," and a detailed description of one possible realization of such a mission has been referred to as SMART-X, which was described in a recent NASA RFI response. This provides an example of a future mission concept with these requirements since it has high X-ray throughput and excellent spatial resolution. We propose to continue to modify current active pixel sensor designs, in particular the hybrid CMOS detectors that we have been working with for several years, and implement new in-pixel technologies that will allow us to achieve these ambitious and realistic requirements on a timeline that will make them available to upcoming X-ray missions. This proposal is a continuation of our program that has been working on these developments for the past several years.

  1. Further applications for mosaic pixel FPA technology

    NASA Astrophysics Data System (ADS)

    Liddiard, Kevin C.

    2011-06-01

    In previous papers to this SPIE forum the development of novel technology for next generation PIR security sensors has been described. This technology combines the mosaic pixel FPA concept with low cost optics and purpose-designed readout electronics to provide a higher performance and affordable alternative to current PIR sensor technology, including an imaging capability. Progressive development has resulted in increased performance and transition from conventional microbolometer fabrication to manufacture on 8 or 12 inch CMOS/MEMS fabrication lines. A number of spin-off applications have been identified. In this paper two specific applications are highlighted: high performance imaging IRFPA design and forest fire detection. The former involves optional design for small pixel high performance imaging. The latter involves cheap expendable sensors which can detect approaching fire fronts and send alarms with positional data via mobile phone or satellite link. We also introduce to this SPIE forum the application of microbolometer IR sensor technology to IoT, the Internet of Things.

  2. Recent developments on CMOS MAPS for the SuperB Silicon Vertex Tracker

    NASA Astrophysics Data System (ADS)

    Rizzo, G.; Comott, D.; Manghisoni, M.; Re, V.; Traversi, G.; Fabbri, L.; Gabrielli, A.; Giorgi, F.; Pellegrini, G.; Sbarra, C.; Semprini-Cesari, N.; Valentinetti, S.; Villa, M.; Zoccoli, A.; Berra, A.; Lietti, D.; Prest, M.; Bevan, A.; Wilson, F.; Beck, G.; Morris, J.; Gannaway, F.; Cenci, R.; Bombelli, L.; Citterio, M.; Coelli, S.; Fiorini, C.; Liberali, V.; Monti, M.; Nasri, B.; Neri, N.; Palombo, F.; Stabile, A.; Balestri, G.; Batignani, G.; Bernardelli, A.; Bettarini, S.; Bosi, F.; Casarosa, G.; Ceccanti, M.; Forti, F.; Giorgi, M. A.; Lusiani, A.; Mammini, P.; Morsani, F.; Oberhof, B.; Paoloni, E.; Perez, A.; Petragnani, G.; Profeti, A.; Soldani, A.; Walsh, J.; Chrzaszcz, M.; Gaioni, L.; Manazza, A.; Quartieri, E.; Ratti, L.; Zucca, S.; Alampi, G.; Cotto, G.; Gamba, D.; Zambito, S.; Dalla Betta, G.-F.; Fontana, G.; Pancheri, L.; Povoli, M.; Verzellesi, G.; Bomben, M.; Bosisio, L.; Cristaudo, P.; Lanceri, L.; Liberti, B.; Rashevskaya, I.; Stella, C.; Vitale, L.

    2013-08-01

    In the design of the Silicon Vertex Tracker for the high luminosity SuperB collider, very challenging requirements are set by physics and background conditions on its innermost Layer0: small radius (about 1.5 cm), resolution of 10 - 15 μm in both coordinates, low material budget < 1 %X0, and the ability to withstand a background hit rate of several tens of MHz /cm2. Thanks to an intense R&D program the development of Deep NWell CMOS MAPS (with the ST Microelectronics 130 nm process) has reached a good level of maturity and allowed for the first time the implementation of thin CMOS sensors with similar functionalities as in hybrid pixels, such as pixel-level sparsification and fast time stamping. Further MAPS performance improvements are currently under investigation with two different approaches: the INMAPS CMOS process, featuring a quadruple well and a high resistivity substrate, and 3D CMOS MAPS, realized with vertical integration technology. In both cases specific features of the processes chosen can improve charge collection efficiency, with respect to a standard DNW MAPS design, and allow to implement a more complex in-pixel logic in order to develop a faster readout architecture. Prototypes of MAPS matrix, suitable for application in the SuperB Layer0, have been realized with the INMAPS 180 nm process and the 130 nm Chartered/Tezzaron 3D process and results of their characterization will be presented in this paper.

  3. CMOS detector arrays in a virtual 10-kilopixel camera for coherent terahertz real-time imaging.

    PubMed

    Boppel, Sebastian; Lisauskas, Alvydas; Max, Alexander; Krozer, Viktor; Roskos, Hartmut G

    2012-02-15

    We demonstrate the principle applicability of antenna-coupled complementary metal oxide semiconductor (CMOS) field-effect transistor arrays as cameras for real-time coherent imaging at 591.4 GHz. By scanning a few detectors across the image plane, we synthesize a focal-plane array of 100×100 pixels with an active area of 20×20 mm2, which is applied to imaging in transmission and reflection geometries. Individual detector pixels exhibit a voltage conversion loss of 24 dB and a noise figure of 41 dB for 16 μW of the local oscillator (LO) drive. For object illumination, we use a radio-frequency (RF) source with 432 μW at 590 GHz. Coherent detection is realized by quasioptical superposition of the image and the LO beam with 247 μW. At an effective frame rate of 17 Hz, we achieve a maximum dynamic range of 30 dB in the center of the image and more than 20 dB within a disk of 18 mm diameter. The system has been used for surface reconstruction resolving a height difference in the μm range.

  4. Beam test results of a monolithic pixel sensor in the 0.18 μm tower-jazz technology with high resistivity epitaxial layer

    NASA Astrophysics Data System (ADS)

    Mattiazzo, S.; Aimo, I.; Baudot, J.; Bedda, C.; La Rocca, P.; Perez, A.; Riggi, F.; Spiriti, E.

    2015-10-01

    The ALICE experiment at CERN will undergo a major upgrade in the second Long LHC Shutdown in the years 2018-2019; this upgrade includes the full replacement of the Inner Tracking System (ITS), deploying seven layers of Monolithic Active Pixel Sensors (MAPS). For the development of the new ALICE ITS, the Tower-Jazz 0.18 μm CMOS imaging sensor process has been chosen as it is possible to use full CMOS in the pixel and different silicon wafers (including high resistivity epitaxial layers). A large test campaign has been carried out on several small prototype chips, designed to optimize the pixel sensor layout and the front-end electronics. Results match the target requirements both in terms of performance and of radiation hardness. Following this development, the first full scale chips have been designed, submitted and are currently under test, with promising results. A telescope composed of 4 planes of Mimosa-28 and 2 planes of Mimosa-18 chips is under development at the DAFNE Beam Test Facility (BTF) at the INFN Laboratori Nazionali di Frascati (LNF) in Italy with the final goal to perform a comparative test of the full scale prototypes. The telescope has been recently used to test a Mimosa-22THRb chip (a monolithic pixel sensor built in the 0.18 μm Tower-Jazz process) and we foresee to perform tests on the full scale chips for the ALICE ITS upgrade at the beginning of 2015. In this contribution we will describe some first measurements of spatial resolution, fake hit rate and detection efficiency of the Mimosa-22THRb chip obtained at the BTF facility in June 2014 with an electron beam of 500 MeV.

  5. Pixel-Level Digital-to-Analog Conversion Scheme for Compact Data Drivers of Active Matrix Organic Light-Emitting Diodes with Low-Temperature Polycrystalline Silicon Thin-Film Transistors

    NASA Astrophysics Data System (ADS)

    Kim, Tae-Wook; Choi, Byong-Deok

    2010-03-01

    This paper shows that a part of a digital-to-analog conversion (DAC) function can be included in a pixel circuit to save the circuit area of an integrated data driver fabricated with low-temperature polycrystalline silicon thin-film transistors (LTPS-TFTs). Because the pixel-level DAC can be constructed by two TFTs and one small capacitor, the pixel circuit does not become markedly complex. The design of an 8-bit DAC, which combines a 6-bit resistor-string-based DAC and a 2-bit pixel-level DAC for a 4-in. diagonal VGA format active matrix organic light-emitting diode (AMOLED), is shown in detail. In addition, analysis results are presented, revealing that the 8-bit DAC scheme including a 2-bit pixel-level DAC with 1:3 demultiplexing can be applied to very high video formats, such as XGA, for a 3 to 4-in. diagonal AMOLED. Even for a 9- to 12-in. diagonal AMOLED, the proposed scheme can still be applied to the XGA format, even though no demultiplexing is allowed. The total height of the proposed 8-bit DAC is approximately 960 µm, which is almost one-half of that of the previous 6-bit resistor-string-based DAC.

  6. Pixel-Level Digital-to-Analog Conversion Scheme for Compact Data Drivers of Active Matrix Organic Light-Emitting Diodes with Low-Temperature Polycrystalline Silicon Thin-Film Transistors

    NASA Astrophysics Data System (ADS)

    Tae-Wook Kim,; Byong-Deok Choi,

    2010-03-01

    This paper shows that a part of a digital-to-analog conversion (DAC) function can be included in a pixel circuit to save the circuit area of an integrated data driver fabricated with low-temperature polycrystalline silicon thin-film transistors (LTPS-TFTs). Because the pixel-level DAC can be constructed by two TFTs and one small capacitor, the pixel circuit does not become markedly complex. The design of an 8-bit DAC, which combines a 6-bit resistor-string-based DAC and a 2-bit pixel-level DAC for a 4-in. diagonal VGA format active matrix organic light-emitting diode (AMOLED), is shown in detail. In addition, analysis results are presented, revealing that the 8-bit DAC scheme including a 2-bit pixel-level DAC with 1:3 demultiplexing can be applied to very high video formats, such as XGA, for a 3 to 4-in. diagonal AMOLED. Even for a 9- to 12-in. diagonal AMOLED, the proposed scheme can still be applied to the XGA format, even though no demultiplexing is allowed. The total height of the proposed 8-bit DAC is approximately 960 μm, which is almost one-half of that of the previous 6-bit resistor-string-based DAC.

  7. Development for Germanium Blocked Impurity Band Far-Infrared Image Sensors with Fully-Depleted Silicon-On-Insulator CMOS Readout Integrated Circuit

    NASA Astrophysics Data System (ADS)

    Wada, T.; Arai, Y.; Baba, S.; Hanaoka, M.; Hattori, Y.; Ikeda, H.; Kaneda, H.; Kochi, C.; Miyachi, A.; Nagase, K.; Nakaya, H.; Ohno, M.; Oyabu, S.; Suzuki, T.; Ukai, S.; Watanabe, K.; Yamamoto, K.

    2016-07-01

    We are developing far-infrared (FIR) imaging sensors for low-background and high-sensitivity applications such as infrared astronomy. Previous FIR monolithic imaging sensors, such as an extrinsic germanium photo-conductor (Ge PC) with a PMOS readout integrated circuit (ROIC) hybridized by indium pixel-to-pixel interconnection, had three difficulties: (1) short cut-off wavelength (120 \\upmu m), (2) large power consumption (10 \\upmu W/pixel), and (3) large mismatch in thermal expansion between the Ge PC and the Si ROIC. In order to overcome these difficulties, we developed (1) a blocked impurity band detector fabricated by a surface- activated bond technology, whose cut-off wavelength is longer than 160 \\upmu m, (2) a fully-depleted silicon-on-insulator CMOS ROIC which works below 4 K with 1 \\upmu W/pixel operating power, and (3) a new concept, Si-supported Ge detector, which shows tolerance to thermal cycling down to 3 K. With these new techniques, we are now developing a 32 × 32 FIR imaging sensor.

  8. High throughput optoelectronic smart pixel systems using diffractive optics

    NASA Astrophysics Data System (ADS)

    Chen, Chih-Hao

    1999-12-01

    Recent developments in digital video, multimedia technology and data networks have greatly increased the demand for high bandwidth communication channels and high throughput data processing. Electronics is particularly suited for switching, amplification and logic functions, while optics is more suitable for interconnections and communications with lower energy and crosstalk. In this research, we present the design, testing, integration and demonstration of several optoelectronic smart pixel devices and system architectures. These systems integrate electronic switching/processing capability with parallel optical interconnections to provide high throughput network communication and pipeline data processing. The Smart Pixel Array Cellular Logic processor (SPARCL) is designed in 0.8 m m CMOS and hybrid integrated with Multiple-Quantum-Well (MQW) devices for pipeline image processing. The Smart Pixel Network Interface (SAPIENT) is designed in 0.6 m m GaAs and monolithically integrated with LEDs to implement a highly parallel optical interconnection network. The Translucent Smart Pixel Array (TRANSPAR) design is implemented in two different versions. The first version, TRANSPAR-MQW, is designed in 0.5 m m CMOS and flip-chip integrated with MQW devices to provide 2-D pipeline processing and translucent networking using the Carrier- Sense-MultipleAccess/Collision-Detection (CSMA/CD) protocol. The other version, TRANSPAR-VM, is designed in 1.2 m m CMOS and discretely integrated with VCSEL-MSM (Vertical-Cavity-Surface- Emitting-Laser and Metal-Semiconductor-Metal detectors) chips and driver/receiver chips on a printed circuit board. The TRANSPAR-VM provides an option of using the token ring network protocol in addition to the embedded functions of TRANSPAR-MQW. These optoelectronic smart pixel systems also require micro-optics devices to provide high resolution, high quality optical interconnections and external source arrays. In this research, we describe an innovative

  9. Use of CMOS imagers to measure high fluxes of charged particles

    NASA Astrophysics Data System (ADS)

    Servoli, L.; Tucceri, P.

    2016-03-01

    The measurement of high flux charged particle beams, specifically at medical accelerators and with small fields, poses several challenges. In this work we propose a single particle counting method based on CMOS imagers optimized for visible light collection, exploiting their very high spatial segmentation (> 3 106 pixels/cm2) and almost full efficiency detection capability. An algorithm to measure the charged particle flux with a precision of ~ 1% for fluxes up to 40 MHz/cm2 has been developed, using a non-linear calibration algorithm, and several CMOS imagers with different characteristics have been compared to find their limits on flux measurement.

  10. Development and performance of Kyoto's x-ray astronomical SOI pixel (SOIPIX) sensor

    NASA Astrophysics Data System (ADS)

    Tsuru, Takeshi G.; Matsumura, Hideaki; Takeda, Ayaki; Tanaka, Takaaki; Nakashima, Shinya; Arai, Yasuo; Mori, Koji; Takenaka, Ryota; Nishioka, Yusuke; Kohmura, Takayoshi; Hatsui, Takaki; Kameshima, Takashi; Ozaki, Kyosuke; Kohmura, Yoshiki; Wagai, Tatsuya; Takei, Dai; Kawahito, Shoji; Kagawa, Keiichiro; Yasutomi, Keita; Kamehama, Hiroki

    2014-08-01

    We have been developing monolithic active pixel sensors, known as Kyoto's X-ray SOIPIXs, based on the CMOS SOI (silicon-on-insulator) technology for next-generation X-ray astronomy satellites. The event trigger output function implemented in each pixel offers microsecond time resolution and enables reduction of the non-X-ray background that dominates the high X-ray energy band above 5-10 keV. A fully depleted SOI with a thick depletion layer and back illumination offers wide band coverage of 0.3-40 keV. Here, we report recent progress in the X-ray SOIPIX development. In this study, we achieved an energy resolution of 300 eV (FWHM) at 6 keV and a read-out noise of 33 e- (rms) in the frame readout mode, which allows us to clearly resolve Mn-Kα and Kβ. Moreover, we produced a fully depleted layer with a thickness of 500 μm. The event-driven readout mode has already been successfully demonstrated.

  11. Micro-lens maker equation of a CMOS image sensor

    NASA Astrophysics Data System (ADS)

    Wu, Yang

    2007-09-01

    The demand of a large resolution CMOS image sensor (CIS) in a small package drives the pixel pitch size down to the neighborhood of 2 μm. Double-micro-lens (ML) structure is a promising technology to obtain the high focusing capability required by such a small pixel. In this work, an optical model of a double-ML is derived from the well-known lens maker equation. This model predicts the critical back focal length (BFL) and the effective focal length (EFL) of the double-ML embedded in the Back-End-Of-The-Line (BEOL) stack. Explained by this model, a design guideline is provided to optimize the amount of light collected by the photo diode area for a good quantum efficiency (QE), which is crucial to the sensitivity of the sensor.

  12. Superior performance with sCMOS over EMCCD in super-resolution optical fluctuation imaging

    NASA Astrophysics Data System (ADS)

    Chen, Xuanze; Zeng, Zhiping; Li, Rongqin; Xue, Boxin; Xi, Peng; Sun, Yujie

    2016-06-01

    Super-resolution optical fluctuation imaging (SOFI) is a fast and low-cost live-cell optical nanoscopy for extracting subdiffraction information from the statistics of fluorescence intensity fluctuation. As SOFI is based on the fluctuation statistics, rather than the detection of single molecules, it poses unique requirements for imaging detectors, which still lack a systematic evaluation. Here, we analyze the influences of pixel sizes, frame rates, noise levels, and different gains in SOFI with simulations and experimental tests. Our analysis shows that the smaller pixel size and faster readout speed of scientific-grade complementary metal oxide semiconductor (sCMOS) enables SOFI to achieve high spatiotemporal resolution with a large field-of-view, which is especially beneficial for live-cell super-resolution imaging. Overall, as the performance of SOFI is relatively insensitive to the signal-to-noise ratio (SNR), the gain in pixel size and readout speed exceeds the loss in SNR, indicating sCMOS is superior to electron multiplying charge coupled device in context to SOFI in many cases. Super-resolution imaging of cellular microtubule structures with high-order SOFI is experimentally demonstrated at large field-of-view, taking advantage of the large pixel number and fast frame rate of sCMOS cameras.

  13. The Speedster-EXD - A New Event-Triggered Hybrid CMOS X-ray Detector

    NASA Astrophysics Data System (ADS)

    Griffith, Christopher; Falcone, A.; Prieskorn, Z.; Burrows, D. N.

    2014-01-01

    We report on the development of a new Teledyne Imaging Systems hybrid CMOS x-ray detector called the Speedster-EXD which is capable of event-triggered read-out. Hybrid CMOS detectors currently have many advantages over CCDs including lower susceptibility to radiation damage, lower power consumption, and faster read out time to avoid pile-up. In addition to these advantages, the Speedster-EXD has new in-pixel circuitry which includes CDS subtraction to reduce read noise and a CTIA amplifier to eliminate interpixel capacitance crosstalk. The new circuitry also includes an in-pixel comparator that triggers on x-ray events. The comparator feature allows the detector to only read pixels in which an x-ray is detected. This feature increases the detector array effective frame rate by orders of magnitude. The current advantages of hybrid CMOS x-ray detectors combined with the new in-pixel circuitry makes the Speedster-EXD an ideal candidate for future high throughput x-ray missions requiring large-format silicon imagers.

  14. The Speedster-EXD - A New Event-Triggered Hybrid CMOS X-ray Detector

    NASA Astrophysics Data System (ADS)

    Griffith, Christopher; Falcone, Abraham; Prieskorn, Zachary; Burrows, David N.

    2014-08-01

    We present the characterization of a new event driven x-ray hybrid CMOS detector developed by Teledyne imaging Sensors in collaboration with Penn State University. Hybrid CMOS detectors currently have many advantages over CCD’s including lower susceptibility to radiation damage, lower power consumption, and faster read-out time to avoid pile-up. The Speedster-EXD includes an in-pixel comparator that enables read out of only the pixels with signal from an x-ray event. The comparator threshold can be set by the user and only pixels with signal above this threshold are read out. This event-driven readout feature can increase effective frame rates by orders of magnitude, enabling future x-ray missions. The Speedster-EXD hybrid CMOS detector also has additional features that improve upon our previous generation of detectors including: (1) a low-noise, high-gain CTIA amplifier to eliminate interpixel capacitance crosstalk, (2) four different gain modes to optimize either full well capacity or energy resolution, and (3) in-pixel CDS subtraction to reduce read noise. We present the read noise, dark current, interpixel capacitance, energy resolution, and gain variation measurements of the Speedster-EXD detector.

  15. Monolithic pixel detectors in a deep submicron SOI process

    SciTech Connect

    Deptuch, Grzegorz; /Fermilab

    2009-10-01

    A compact charge-signal processing chain, composed of a two-stage semi-gaussian preamplifier-signal shaping filter, a discriminator and a binary counter, implemented in a prototype pixel detector using 0.20 {micro}m CMOS Silicon on Insulator process, is presented. The gain of the analog chain was measured 0.76 V/fC at the signal peaking time about 300 ns and the equivalent noise charge referred to the input of 80 e{sup -1}.

  16. Reconfigurable RF CMOS Circuit for Cognitive Radio

    NASA Astrophysics Data System (ADS)

    Masu, Kazuya; Okada, Kenichi

    Cognitive radio and/or SDR (Software Defined Radio) inherently requires multi-band and multi standard wireless circuit. The circuit is implemented based on Si CMOS technology. In this article, the recent progress of Si RF CMOS is described and the reconfigurable RF CMOS circuit which was proposed by the authors is introduced. At the present and in the future, several kind of Si CMOS technology can be used for RF CMOS circuit implementation. The realistic RF CMOS circuit implementation toward cognitive and/or SDR is discussed.

  17. The Speedster-EXD- A New Event-Driven Hybrid CMOS X-ray Detector

    NASA Astrophysics Data System (ADS)

    Griffith, Christopher V.; Falcone, Abraham D.; Prieskorn, Zachary R.; Burrows, David N.

    2016-01-01

    The Speedster-EXD is a new 64×64 pixel, 40-μm pixel pitch, 100-μm depletion depth hybrid CMOS x-ray detector with the capability of reading out only those pixels containing event charge, thus enabling fast effective frame rates. A global charge threshold can be specified, and pixels containing charge above this threshold are flagged and read out. The Speedster detector has also been designed with other advanced in-pixel features to improve performance, including a low-noise, high-gain capacitive transimpedance amplifier that eliminates interpixel capacitance crosstalk (IPC), and in-pixel correlated double sampling subtraction to reduce reset noise. We measure the best energy resolution on the Speedster-EXD detector to be 206 eV (3.5%) at 5.89 keV and 172 eV (10.0%) at 1.49 keV. The average IPC to the four adjacent pixels is measured to be 0.25%±0.2% (i.e., consistent with zero). The pixel-to-pixel gain variation is measured to be 0.80%±0.03%, and a Monte Carlo simulation is applied to better characterize the contributions to the energy resolution.

  18. Ultra high-throughput single molecule spectroscopy with a 1024 pixel SPAD

    PubMed Central

    Colyer, Ryan A.; Scalia, Giuseppe; Villa, Federica A.; Guerrieri, Fabrizio; Tisa, Simone; Zappa, Franco; Cova, Sergio; Weiss, Shimon; Michalet, Xavier

    2013-01-01

    Single-molecule spectroscopy is a powerful approach to measuring molecular properties such as size, brightness, conformation, and binding constants. Due to the low concentrations in the single-molecule regime, measurements with good statistical accuracy require long acquisition times. Previously we showed a factor of 8 improvement in acquisition speed using a custom-CMOS 8x1 SPAD array. Here we present preliminary results with a 64X improvement in throughput obtained using a liquid crystal on silicon spatial light modulator (LCOS-SLM) and a novel standard CMOS 1024 pixel SPAD array, opening the way to truly high-throughput single-molecule spectroscopy. PMID:24386535

  19. VeloPix: the pixel ASIC for the LHCb upgrade

    NASA Astrophysics Data System (ADS)

    Poikela, T.; De Gaspari, M.; Plosila, J.; Westerlund, T.; Ballabriga, R.; Buytaert, J.; Campbell, M.; Llopart, X.; Wyllie, K.; Gromov, V.; van Beuzekom, M.; Zivkovic, V.

    2015-01-01

    The LHCb Vertex Detector (VELO) will be upgraded in 2018 along with the other subsystems of LHCb in order to enable full readout at 40 MHz, with the data fed directly to the software triggering algorithms. The upgraded VELO is a lightweight hybrid pixel detector operating in vacuum in close proximity to the LHC beams. The readout will be provided by a dedicated front-end ASIC, dubbed VeloPix, matched to the LHCb readout requirements and the 55 × 55 μm VELO pixel dimensions. The chip is closely related to the Timepix3, from the Medipix family of ASICs. The principal challenge that the chip has to meet is a hit rate of up to 900 Mhits/s, resulting in a required output bandwidth of more than 16 Gbit/s. The occupancy across the chip is also very non-uniform, and the radiation levels reach an integrated 400 Mrad over the lifetime of the detector.VeloPix is a binary pixel readout chip with a data driven readout, designed in 130 nm CMOS technology. The pixels are combined into groups of 2 × 4 super pixels, enabling a shared logic and a reduction of bandwidth due to combined address and time stamp information. The pixel hits are combined with other simultaneous hits in the same super pixel, time stamped, and immediately driven off-chip. The analog front-end must be sufficiently fast to accurately time stamp the data, with a small enough dead time to minimize data loss in the most occupied regions of the chip. The data is driven off chip with a custom designed high speed serialiser. The current status of the ASIC design, the chip architecture and the simulations will be described.

  20. Pixel array detector for time-resolved x-ray scattering (invited)

    NASA Astrophysics Data System (ADS)

    Rodricks, Brian G.; Barna, Sandor L.; Gruner, Sol M.; Shepherd, John A.; Tate, Mark W.; Wixted, Robert L.

    1996-09-01

    This paper describes the development of a large area hybrid pixel detector designed for time-resolved synchrotron x-ray scattering experiments in which limited frames, with a high framing rate, are required. The final design parameters call for a 1024×1024 pixel array device with 150-micron pixels that is 100% quantum efficient for x-rays with energy up to 20 keV, with a framing rate in the microsecond range. The device will consist of a fully depleted diode array bump bonded to a CMOS electronic storage capacitor array with eight frames per pixel. The two devices may be separated by a x-ray blocking layer that protects the radiation-sensitive electronics layer from damage. The signal is integrated in the electronics layer and stored in one of eight CMOS capacitors. After eight frames are taken, the data are then read out, using clocking electronics external to the detector, and stored in a RAM disk. Results will be presented on the development of a prototype 4×4 pixel electronics layer that is capable of storing at least 10,000 12-keV x-ray photons for a capacity of over 50 million electrons with a noise corresponding to 2 x-ray photons per pixel. The diode detective layer and electronics storage layer along with the radiation damage and blocking layers will be discussed.

  1. Optimizing quantum efficiency in a stacked CMOS sensor

    NASA Astrophysics Data System (ADS)

    Hannebauer, Rob; Yoo, Sang Keun; Gilblom, David L.; Gilblom, Alexander D.

    2011-03-01

    Optimizing quantum efficiency of image sensors, whether CCD or CMOS, has usually required backside thinning to bring the photon receiving surface close to the charge generation elements. A new CMOS sensor architecture has been developed that permits high-fill-factor photodiodes to be placed at the silicon surface without the need for backside thinning. The photodiode access provided by this architecture permits application of highly-effective anti-reflection coatings on the input surface and construction of a mirror inside the silicon below the photodiodes to effectively double the optical thickness of the silicon charge generation volume. Secondary benefits of this architecture include prevention of light from reaching the CMOS circuitry under the photodiodes, improvement of near-infrared quantum efficiency, and reduction in optical artifacts caused by reflections from the sensor surface. Utilizing these techniques, a sensor is being constructed with 4096 x 4096 pixels 4.8 μm square with 95% fill factor backed by a mirror tuned to the 400-700 nm visible band and a front-surface anti-reflectance coating. The quantum efficiency is expected to exceed 80% through the visible and the global shutter extinction ratio should exceed 106:1. The sensors have been fabricated and first test data is due in February 2011.

  2. Digital Pixel Sensor Array with Logarithmic Delta-Sigma Architecture

    PubMed Central

    Mahmoodi, Alireza; Li, Jing; Joseph, Dileepan

    2013-01-01

    Like the human eye, logarithmic image sensors achieve wide dynamic range easily at video rates, but, unlike the human eye, they suffer from low peak signal-to-noise-and-distortion ratios (PSNDRs). To improve the PSNDR, we propose integrating a delta-sigma analog-to-digital converter (ADC) in each pixel. An image sensor employing this architecture is designed, built and tested in 0.18 micron complementary metal-oxide-semiconductor (CMOS) technology. It achieves a PSNDR better than state-of-the-art logarithmic sensors and comparable to the human eye. As the approach concerns an array of many ADCs, we use a small-area low-power delta-sigma design. For scalability, each pixel has its own decimator. The prototype is compared to a variety of other image sensors, linear and nonlinear, from industry and academia. PMID:23959239

  3. Method and apparatus of high dynamic range image sensor with individual pixel reset

    NASA Technical Reports Server (NTRS)

    Yadid-Pecht, Orly (Inventor); Pain, Bedabrata (Inventor); Fossum, Eric R. (Inventor)

    2001-01-01

    A wide dynamic range image sensor provides individual pixel reset to vary the integration time of individual pixels. The integration time of each pixel is controlled by column and row reset control signals which activate a logical reset transistor only when both signals coincide for a given pixel.

  4. Predicted image quality of a CMOS APS X-ray detector across a range of mammographic beam qualities

    NASA Astrophysics Data System (ADS)

    Konstantinidis, A.

    2015-09-01

    Digital X-ray detectors based on Complementary Metal-Oxide- Semiconductor (CMOS) Active Pixel Sensor (APS) technology have been introduced in the early 2000s in medical imaging applications. In a previous study the X-ray performance (i.e. presampling Modulation Transfer Function (pMTF), Normalized Noise Power Spectrum (NNPS), Signal-to-Noise Ratio (SNR) and Detective Quantum Efficiency (DQE)) of the Dexela 2923MAM CMOS APS X-ray detector was evaluated within the mammographic energy range using monochromatic synchrotron radiation (i.e. 17-35 keV). In this study image simulation was used to predict how the mammographic beam quality affects image quality. In particular, the experimentally measured monochromatic pMTF, NNPS and SNR parameters were combined with various mammographic spectral shapes (i.e. Molybdenum/Molybdenum (Mo/Mo), Rhodium/Rhodium (Rh/Rh), Tungsten/Aluminium (W/Al) and Tungsten/Rhodium (W/Rh) anode/filtration combinations at 28 kV). The image quality was measured in terms of Contrast-to-Noise Ratio (CNR) using a synthetic breast phantom (4 cm thick with 50% glandularity). The results can be used to optimize the imaging conditions in order to minimize patient's Mean Glandular Dose (MGD).

  5. A global shutter CMOS image sensor for hyperspectral imaging

    NASA Astrophysics Data System (ADS)

    Stefanov, Konstantin D.; Dryer, Ben J.; Hall, David J.; Holland, Andrew D.; Pratlong, Jérôme; Fryer, Martin; Pike, Andrew

    2015-09-01

    Hyperspectral imaging has been providing vital information on the Earth landscape in response to the changing environment, land use and natural phenomena. While conventional hyperspectral imaging instruments have typically used rows of linescan CCDs, CMOS image sensors (CIS) have been slowly penetrating space instrumentation for the past decade, and Earth observation (EO) is no exception. CIS provide distinct advantages over CCDs that are relevant to EO hyperspectral imaging. The lack of charge transfer through the array allows the reduction of cross talk usually present in CCDs due to imperfect charge transfer efficiency, and random pixel addressing makes variable integration time possible, and thus improves the camera sensitivity and dynamic range. We have developed a 10T pixel design that integrates a pinned photodiode with global shutter and in-pixel correlated double sampling (CDS) to increase the signal to noise ratio in less intense spectral regimes, allowing for both high resolution and low noise hyperspectral imaging for EO. This paper details the characterization of a test device, providing baseline performance measurements of the array such as noise, responsivity, dark current and global shutter efficiency, and also discussing benchmark hyperspectral imaging requirements such as dynamic range, pixel crosstalk, and image lag.

  6. Precision of FLEET Velocimetry Using High-Speed CMOS Camera Systems

    NASA Technical Reports Server (NTRS)

    Peters, Christopher J.; Danehy, Paul M.; Bathel, Brett F.; Jiang, Naibo; Calvert, Nathan D.; Miles, Richard B.

    2015-01-01

    Femtosecond laser electronic excitation tagging (FLEET) is an optical measurement technique that permits quantitative velocimetry of unseeded air or nitrogen using a single laser and a single camera. In this paper, we seek to determine the fundamental precision of the FLEET technique using high-speed complementary metal-oxide semiconductor (CMOS) cameras. Also, we compare the performance of several different high-speed CMOS camera systems for acquiring FLEET velocimetry data in air and nitrogen free-jet flows. The precision was defined as the standard deviation of a set of several hundred single-shot velocity measurements. Methods of enhancing the precision of the measurement were explored such as digital binning (similar in concept to on-sensor binning, but done in post-processing), row-wise digital binning of the signal in adjacent pixels and increasing the time delay between successive exposures. These techniques generally improved precision; however, binning provided the greatest improvement to the un-intensified camera systems which had low signal-to-noise ratio. When binning row-wise by 8 pixels (about the thickness of the tagged region) and using an inter-frame delay of 65 microseconds, precisions of 0.5 meters per second in air and 0.2 meters per second in nitrogen were achieved. The camera comparison included a pco.dimax HD, a LaVision Imager scientific CMOS (sCMOS) and a Photron FASTCAM SA-X2, along with a two-stage LaVision HighSpeed IRO intensifier. Excluding the LaVision Imager sCMOS, the cameras were tested with and without intensification and with both short and long inter-frame delays. Use of intensification and longer inter-frame delay generally improved precision. Overall, the Photron FASTCAM SA-X2 exhibited the best performance in terms of greatest precision and highest signal-to-noise ratio primarily because it had the largest pixels.

  7. Precision of FLEET Velocimetry Using High-speed CMOS Camera Systems

    NASA Technical Reports Server (NTRS)

    Peters, Christopher J.; Danehy, Paul M.; Bathel, Brett F.; Jiang, Naibo; Calvert, Nathan D.; Miles, Richard B.

    2015-01-01

    Femtosecond laser electronic excitation tagging (FLEET) is an optical measurement technique that permits quantitative velocimetry of unseeded air or nitrogen using a single laser and a single camera. In this paper, we seek to determine the fundamental precision of the FLEET technique using high-speed complementary metal-oxide semiconductor (CMOS) cameras. Also, we compare the performance of several different high-speed CMOS camera systems for acquiring FLEET velocimetry data in air and nitrogen free-jet flows. The precision was defined as the standard deviation of a set of several hundred single-shot velocity measurements. Methods of enhancing the precision of the measurement were explored such as digital binning (similar in concept to on-sensor binning, but done in post-processing), row-wise digital binning of the signal in adjacent pixels and increasing the time delay between successive exposures. These techniques generally improved precision; however, binning provided the greatest improvement to the un-intensified camera systems which had low signal-to-noise ratio. When binning row-wise by 8 pixels (about the thickness of the tagged region) and using an inter-frame delay of 65 micro sec, precisions of 0.5 m/s in air and 0.2 m/s in nitrogen were achieved. The camera comparison included a pco.dimax HD, a LaVision Imager scientific CMOS (sCMOS) and a Photron FASTCAM SA-X2, along with a two-stage LaVision High Speed IRO intensifier. Excluding the LaVision Imager sCMOS, the cameras were tested with and without intensification and with both short and long inter-frame delays. Use of intensification and longer inter-frame delay generally improved precision. Overall, the Photron FASTCAM SA-X2 exhibited the best performance in terms of greatest precision and highest signal-to-noise ratio primarily because it had the largest pixels.

  8. Detection of pointing errors with CMOS-based camera in intersatellite optical communications

    NASA Astrophysics Data System (ADS)

    Yu, Si-yuan; Ma, Jing; Tan, Li-ying

    2005-01-01

    For very high data rates, intersatellite optical communications hold a potential performance edge over microwave communications. Acquisition and Tracking problem is critical because of the narrow transmit beam. A single array detector in some systems performs both spatial acquisition and tracking functions to detect pointing errors, so both wide field of view and high update rate is required. The past systems tend to employ CCD-based camera with complex readout arrangements, but the additional complexity reduces the applicability of the array based tracking concept. With the development of CMOS array, CMOS-based cameras can employ the single array detector concept. The area of interest feature of the CMOS-based camera allows a PAT system to specify portion of the array. The maximum allowed frame rate increases as the size of the area of interest decreases under certain conditions. A commercially available CMOS camera with 105 fps @ 640×480 is employed in our PAT simulation system, in which only part pixels are used in fact. Beams angle varying in the field of view can be detected after getting across a Cassegrain telescope and an optical focus system. Spot pixel values (8 bits per pixel) reading out from CMOS are transmitted to a DSP subsystem via IEEE 1394 bus, and pointing errors can be computed by the centroid equation. It was shown in test that: (1) 500 fps @ 100×100 is available in acquisition when the field of view is 1mrad; (2)3k fps @ 10×10 is available in tracking when the field of view is 0.1mrad.

  9. CMOS Integrated Carbon Nanotube Sensor

    SciTech Connect

    Perez, M. S.; Lerner, B.; Boselli, A.; Lamagna, A.; Obregon, P. D. Pareja; Julian, P. M.; Mandolesi, P. S.; Buffa, F. A.

    2009-05-23

    Recently carbon nanotubes (CNTs) have been gaining their importance as sensors for gases, temperature and chemicals. Advances in fabrication processes simplify the formation of CNT sensor on silicon substrate. We have integrated single wall carbon nanotubes (SWCNTs) with complementary metal oxide semiconductor process (CMOS) to produce a chip sensor system. The sensor prototype was designed and fabricated using a 0.30 um CMOS process. The main advantage is that the device has a voltage amplifier so the electrical measure can be taken and amplified inside the sensor. When the conductance of the SWCNTs varies in response to media changes, this is observed as a variation in the output tension accordingly.

  10. Pixel Dynamics Analysis of Photospheric Spectral Data

    NASA Astrophysics Data System (ADS)

    Rasca, Anthony P.; Chen, James; Pevtsov, Alexei A.

    2015-04-01

    Recent advances in solar observations have led to higher-resolution surface (photosphere) images that reveal bipolar magnetic features operating near the resolution limit during emerging flux events. Further improvements in resolution are expected to reveal even smaller dynamic features. Such photospheric features provide observable indications of what is happening before, during, and after flux emergence, eruptions in the corona, and other phenomena. Visible changes in photospheric active regions also play a major role in predicting eruptions that are responsible for geomagnetic plasma disturbances. A new method has been developed to extract physical information from photospheric data (e.g., SOLIS Stokes parameters) based on the statistics of pixel-by-pixel variations in spectral (absorption or emission) line quantities such as line profile Doppler shift, width, asymmetry, and flatness. Such properties are determined by the last interaction between detected photons and optically thick photospheric plasmas, and may contain extractable information on local plasma properties at sub-pixel scales. Applying the method to photospheric data with high spectral resolution, our pixel-by-pixel analysis is performed for various regions on the solar disk, ranging from quiet-Sun regions to active regions exhibiting eruptions, characterizing photospheric dynamics using spectral profiles. In particular, the method quantitatively characterizes the time profile of changes in spectral properties in photospheric features and provides improved physical constraints on observed quantities.

  11. Optical readout of a triple-GEM detector by means of a CMOS sensor

    NASA Astrophysics Data System (ADS)

    Marafini, M.; Patera, V.; Pinci, D.; Sarti, A.; Sciubba, A.; Spiriti, E.

    2016-07-01

    In last years, the development of optical sensors has produced objects able to provide very interesting performance. Large granularity is offered along with a very high sensitivity. CMOS sensors with millions of pixels able to detect as few as two or three photons per pixel are commercially available and can be used to read-out the optical signals provided by tracking particle detectors. In this work the results obtained by optically reading-out a triple-GEM detector by a commercial CMOS sensor will be presented. A standard detector was assembled with a transparent window below the third GEM allowing the light to get out. The detector is supplied with an Ar/CF4 based gas mixture producing 650 nm wavelength photons matching the maximum quantum efficiency of the sensor.

  12. Self-amplified CMOS image sensor using a current-mode readout circuit

    NASA Astrophysics Data System (ADS)

    Santos, Patrick M.; de Lima Monteiro, Davies W.; Pittet, Patrick

    2014-05-01

    The feature size of the CMOS processes decreased during the past few years and problems such as reduced dynamic range have become more significant in voltage-mode pixels, even though the integration of more functionality inside the pixel has become easier. This work makes a contribution on both sides: the possibility of a high signal excursion range using current-mode circuits together with functionality addition by making signal amplification inside the pixel. The classic 3T pixel architecture was rebuild with small modifications to integrate a transconductance amplifier providing a current as an output. The matrix with these new pixels will operate as a whole large transistor outsourcing an amplified current that will be used for signal processing. This current is controlled by the intensity of the light received by the matrix, modulated pixel by pixel. The output current can be controlled by the biasing circuits to achieve a very large range of output signal levels. It can also be controlled with the matrix size and this permits a very high degree of freedom on the signal level, observing the current densities inside the integrated circuit. In addition, the matrix can operate at very small integration times. Its applications would be those in which fast imaging processing, high signal amplification are required and low resolution is not a major problem, such as UV image sensors. Simulation results will be presented to support: operation, control, design, signal excursion levels and linearity for a matrix of pixels that was conceived using this new concept of sensor.

  13. The NUC and blind pixel eliminating in the DTDI application

    NASA Astrophysics Data System (ADS)

    Su, Xiao Feng; Chen, Fan Sheng; Pan, Sheng Da; Gong, Xue Yi; Dong, Yu Cui

    2013-12-01

    AS infrared CMOS Digital TDI (Time Delay and integrate) has a simple structure, excellent performance and flexible operation, it has been used in more and more applications. Because of the limitation of the Production process level, the plane array of the infrared detector has a large NU (non-uniformity) and a certain blind pixel rate. Both of the two will raise the noise and lead to the TDI works not very well. In this paper, for the impact of the system performance, the most important elements are analyzed, which are the NU of the optical system, the NU of the Plane array and the blind pixel in the Plane array. Here a reasonable algorithm which considers the background removal and the linear response model of the infrared detector is used to do the NUC (Non-uniformity correction) process, when the infrared detector array is used as a Digital TDI. In order to eliminate the impact of the blind pixel, the concept of surplus pixel method is introduced in, through the method, the SNR (signal to noise ratio) can be improved and the spatial and temporal resolution will not be changed. Finally we use a MWIR (Medium Ware Infrared) detector to do the experiment and the result proves the effectiveness of the method.

  14. Precision tracking with a single gaseous pixel detector

    NASA Astrophysics Data System (ADS)

    Tsigaridas, S.; van Bakel, N.; Bilevych, Y.; Gromov, V.; Hartjes, F.; Hessey, N. P.; de Jong, P.; Kluit, R.

    2015-09-01

    The importance of micro-pattern gaseous detectors has grown over the past few years after successful usage in a large number of applications in physics experiments and medicine. We develop gaseous pixel detectors using micromegas-based amplification structures on top of CMOS pixel readout chips. Using wafer post-processing we add a spark-protection layer and a grid to create an amplification region above the chip, allowing individual electrons released above the grid by the passage of ionising radiation to be recorded. The electron creation point is measured in 3D, using the pixel position for (x, y) and the drift time for z. The track can be reconstructed by fitting a straight line to these points. In this work we have used a pixel-readout-chip which is a small-scale prototype of Timepix3 chip (designed for both silicon and gaseous detection media). This prototype chip has several advantages over the existing Timepix chip, including a faster front-end (pre-amplifier and discriminator) and a faster TDC which reduce timewalk's contribution to the z position error. Although the chip is very small (sensitive area of 0.88 × 0.88mm2), we have built it into a detector with a short drift gap (1.3 mm), and measured its tracking performance in an electron beam at DESY. We present the results obtained, which lead to a significant improvement for the resolutions with respect to Timepix-based detectors.

  15. Silicon avalanche pixel sensor for high precision tracking

    NASA Astrophysics Data System (ADS)

    D'Ascenzo, N.; Marrocchesi, P. S.; Moon, C. S.; Morsani, F.; Ratti, L.; Saveliev, V.; Savoy Navarro, A.; Xie, Q.

    2014-03-01

    The development of an innovative position sensitive pixelated sensor to detect and measure with high precision the coordinates of the ionizing particles is proposed. The silicon avalanche pixel sensors (APiX) is based on the vertical integration of avalanche pixels connected in pairs and operated in coincidence in fully digital mode and with the processing electronics embedded on the chip. The APiX sensor addresses the need to minimize the material budget and related multiple scattering effects in tracking systems requiring a high spatial resolution in the presence of the large track occupancy. The expected operation of the new sensor features: low noise, low power consumption and suitable radiation tolerance. The APiX device provides on-chip digital information on the position of the coordinate of the impinging charged particle and can be seen as the building block of a modular system of pixelated arrays, implementing a sparsified readout. The technological challenges are the 3D integration of the device under CMOS processes and integration of processing electronics.

  16. The speedster-EXD: a new event-triggered hybrid CMOS x-ray detector

    NASA Astrophysics Data System (ADS)

    Griffith, Christopher V.; Falcone, Abraham D.; Prieskorn, Zachary R.; Burrows, David N.

    2014-07-01

    We present preliminary characterization of the Speedster-EXD, a new event driven hybrid CMOS detector (HCD) developed in collaboration with Penn State University and Teledyne Imaging Systems. HCDs have advantages over CCDs including lower susceptibility to radiation damage, lower power consumption, and faster read-out time to avoid pile-up. They are deeply depleted and able to detect x-rays down to approximately 0.1 keV. The Speedster-EXD has additional in-pixel features compared to previously published HCDs including: (1) an in-pixel comparator that enables read out of only the pixels with signal from an x-ray event, (2) four different gain modes to optimize either full well capacity or energy resolution, (3) in-pixel CDS subtraction to reduce read noise, and (4) a low-noise, high-gain CTIA amplifier to eliminate interpixel capacitance crosstalk. When using the comparator feature, the user can set a comparator threshold and only pixels above the threshold will be read out. This feature can be run in two modes including single pixel readout in which only pixels above the threshold are read out and 3x3 readout where a 3×3 region centered on the central pixel of the X-ray event is read out. The comparator feature of the Speedster-EXD increases the detector array effective frame rate by orders of magnitude. The new features of the Speedster-EXD hybrid CMOS x-ray detector are particularly relevant to future high throughput x-ray missions requiring large-format silicon imagers.

  17. An ultra-low power CMOS image sensor with on-chip energy harvesting and power management capability.

    PubMed

    Cevik, Ismail; Huang, Xiwei; Yu, Hao; Yan, Mei; Ay, Suat U

    2015-01-01

    An ultra-low power CMOS image sensor with on-chip energy harvesting and power management capability is introduced in this paper. The photodiode pixel array can not only capture images but also harvest solar energy. As such, the CMOS image sensor chip is able to switch between imaging and harvesting modes towards self-power operation. Moreover, an on-chip maximum power point tracking (MPPT)-based power management system (PMS) is designed for the dual-mode image sensor to further improve the energy efficiency. A new isolated P-well energy harvesting and imaging (EHI) pixel with very high fill factor is introduced. Several ultra-low power design techniques such as reset and select boosting techniques have been utilized to maintain a wide pixel dynamic range. The chip was designed and fabricated in a 1.8 V, 1P6M 0.18 µm CMOS process. Total power consumption of the imager is 6.53 µW for a 96 × 96 pixel array with 1 V supply and 5 fps frame rate. Up to 30 μW of power could be generated by the new EHI pixels. The PMS is capable of providing 3× the power required during imaging mode with 50% efficiency allowing energy autonomous operation with a 72.5% duty cycle. PMID:25756863

  18. An Ultra-Low Power CMOS Image Sensor with On-Chip Energy Harvesting and Power Management Capability

    PubMed Central

    Cevik, Ismail; Huang, Xiwei; Yu, Hao; Yan, Mei; Ay, Suat U.

    2015-01-01

    An ultra-low power CMOS image sensor with on-chip energy harvesting and power management capability is introduced in this paper. The photodiode pixel array can not only capture images but also harvest solar energy. As such, the CMOS image sensor chip is able to switch between imaging and harvesting modes towards self-power operation. Moreover, an on-chip maximum power point tracking (MPPT)-based power management system (PMS) is designed for the dual-mode image sensor to further improve the energy efficiency. A new isolated P-well energy harvesting and imaging (EHI) pixel with very high fill factor is introduced. Several ultra-low power design techniques such as reset and select boosting techniques have been utilized to maintain a wide pixel dynamic range. The chip was designed and fabricated in a 1.8 V, 1P6M 0.18 µm CMOS process. Total power consumption of the imager is 6.53 µW for a 96 × 96 pixel array with 1 V supply and 5 fps frame rate. Up to 30 μW of power could be generated by the new EHI pixels. The PMS is capable of providing 3× the power required during imaging mode with 50% efficiency allowing energy autonomous operation with a 72.5% duty cycle. PMID:25756863

  19. An ultra-low power CMOS image sensor with on-chip energy harvesting and power management capability.

    PubMed

    Cevik, Ismail; Huang, Xiwei; Yu, Hao; Yan, Mei; Ay, Suat U

    2015-03-06

    An ultra-low power CMOS image sensor with on-chip energy harvesting and power management capability is introduced in this paper. The photodiode pixel array can not only capture images but also harvest solar energy. As such, the CMOS image sensor chip is able to switch between imaging and harvesting modes towards self-power operation. Moreover, an on-chip maximum power point tracking (MPPT)-based power management system (PMS) is designed for the dual-mode image sensor to further improve the energy efficiency. A new isolated P-well energy harvesting and imaging (EHI) pixel with very high fill factor is introduced. Several ultra-low power design techniques such as reset and select boosting techniques have been utilized to maintain a wide pixel dynamic range. The chip was designed and fabricated in a 1.8 V, 1P6M 0.18 µm CMOS process. Total power consumption of the imager is 6.53 µW for a 96 × 96 pixel array with 1 V supply and 5 fps frame rate. Up to 30 μW of power could be generated by the new EHI pixels. The PMS is capable of providing 3× the power required during imaging mode with 50% efficiency allowing energy autonomous operation with a 72.5% duty cycle.

  20. Imaging by photon counting with 256x256 pixel matrix

    NASA Astrophysics Data System (ADS)

    Tlustos, Lukas; Campbell, Michael; Heijne, Erik H. M.; Llopart, Xavier

    2004-09-01

    Using 0.25µm standard CMOS we have developed 2-D semiconductor matrix detectors with sophisticated functionality integrated inside each pixel of a hybrid sensor module. One of these sensor modules is a matrix of 256x256 square 55µm pixels intended for X-ray imaging. This device is called 'Medipix2' and features a fast amplifier and two-level discrimination for signals between 1000 and 100000 equivalent electrons, with overall signal noise ~150 e- rms. Signal polarity and comparator thresholds are programmable. A maximum count rate of nearly 1 MHz per pixel can be achieved, which corresponds to an average flux of 3x10exp10 photons per cm2. The selected signals can be accumulated in each pixel in a 13-bit register. The serial readout takes 5-10 ms. A parallel readout of ~300 µs could also be used. Housekeeping functions such as local dark current compensation, test pulse generation, silencing of noisy pixels and threshold tuning in each pixel contribute to the homogeneous response over a large sensor area. The sensor material can be adapted to the energy of the X-rays. Best results have been obtained with high-resistivity silicon detectors, but also CdTe and GaAs detectors have been used. The lowest detectable X-ray energy was about 4 keV. Background measurements have been made, as well as measurements of the uniformity of imaging by photon counting. Very low photon count rates are feasible and noise-free at room temperature. The readout matrix can be used also with visible photons if an energy or charge intensifier structure is interposed such as a gaseous amplification layer or a microchannel plate or acceleration field in vacuum.

  1. The FE-I4 Pixel Readout Chip and the IBL Module

    SciTech Connect

    Barbero, Marlon; Arutinov, David; Backhaus, Malte; Fang, Xiao-Chao; Gonella, Laura; Hemperek, Tomasz; Karagounis, Michael; Hans, Kruger; Kruth, Andre; Wermes, Norbert; Breugnon, Patrick; Fougeron, Denis; Gensolen, Fabrice; Menouni, Mohsine; Rozanov, Alexander; Beccherle, Roberto; Darbo, Giovanni; Caminada, Lea; Dube, Sourabh; Fleury, Julien; Gnani, Dario; /LBL, Berkeley /NIKHEF, Amsterdam /Gottingen U. /SLAC

    2012-05-01

    FE-I4 is the new ATLAS pixel readout chip for the upgraded ATLAS pixel detector. Designed in a CMOS 130 nm feature size process, the IC is able to withstand higher radiation levels compared to the present generation of ATLAS pixel Front-End FE-I3, and can also cope with higher hit rate. It is thus suitable for intermediate radii pixel detector layers in the High Luminosity LHC environment, but also for the inserted layer at 3.3 cm known as the 'Insertable B-Layer' project (IBL), at a shorter timescale. In this paper, an introduction to the FE-I4 will be given, focusing on test results from the first full size FE-I4A prototype which has been available since fall 2010. The IBL project will be introduced, with particular emphasis on the FE-I4-based module concept.

  2. Development of CMOS integrated circuits

    NASA Technical Reports Server (NTRS)

    Bertino, F.; Feller, A.; Greenhouse, J.; Lombardi, T.; Merriam, A.; Noto, R.; Ozga, S.; Pryor, R.; Ramondetta, P.; Smith, A.

    1979-01-01

    Report documents life cycles of two custom CMOS integrated circuits: (1) 4-bit multiplexed register with shift left and shift right capabilities, and (2) dual 4-bit registers. Cycles described include conception as logic diagrams through design, fabrication, testing, and delivery.

  3. Pixel-level A/D conversion using voltage reset technique

    NASA Astrophysics Data System (ADS)

    Minzeng, Li; Fule, Li; Chun, Zhang; Zhihua, Wang

    2014-11-01

    This paper presents a 50 Hz 15-bit analog-to-digital converter (ADC) for pixel-level implementation in CMOS image sensors. The ADC is based on charge packets counting and adopts a voltage reset technique to inject charge packets. The core circuit for charge/pulse conversion is specially optimized for low power, low noise and small area. An experimental chip with ten pixel-level ADCs has been fabricated and tested for verification. The measurement result shows a standard deviation of 1.8 LSB for full-scale output. The ADC has an area of 45 × 45 μm2 and consumes less than 2 μW in a standard 1P-6M 0.18 μm CMOS process.

  4. Commissioning of the ATLAS pixel detector

    SciTech Connect

    ATLAS Collaboration; Golling, Tobias

    2008-09-01

    The ATLAS pixel detector is a high precision silicon tracking device located closest to the LHC interaction point. It belongs to the first generation of its kind in a hadron collider experiment. It will provide crucial pattern recognition information and will largely determine the ability of ATLAS to precisely track particle trajectories and find secondary vertices. It was the last detector to be installed in ATLAS in June 2007, has been fully connected and tested in-situ during spring and summer 2008, and is ready for the imminent LHC turn-on. The highlights of the past and future commissioning activities of the ATLAS pixel system are presented.

  5. Radiation Tolerance Studies of BTeV Pixel Readout Chip Prototypes

    SciTech Connect

    Gabriele Chiodini et al.

    2001-09-11

    We report on several irradiation studies performed on BTeV preFPIX2 pixel readout chip prototypes exposed to a 200 MeV proton beam at the Indiana University Cyclotron Facility. The preFPIX2 pixel readout chip has been implemented in standard 0.25 micron CMOS technology following radiation tolerant design rules. The tests confirmed the radiation tolerance of the chip design to proton total dose of 26 MRad. In addition, non destructive radiation-induced single event upsets have been observed in on-chip static registers and the single bit upset cross section has been measured.

  6. Pixelation Effects in Weak Lensing

    NASA Astrophysics Data System (ADS)

    High, F. William; Rhodes, Jason; Massey, Richard; Ellis, Richard

    2007-11-01

    Weak gravitational lensing can be used to investigate both dark matter and dark energy but requires accurate measurements of the shapes of faint, distant galaxies. Such measurements are hindered by the finite resolution and pixel scale of digital cameras. We investigate the optimum choice of pixel scale for a space-based mission, using the engineering model and survey strategy of the proposed Supernova Acceleration Probe as a baseline. We do this by simulating realistic astronomical images containing a known input shear signal and then attempting to recover the signal using the Rhodes, Refregier, & Groth algorithm. We find that the quality of shear measurement is always improved by smaller pixels. However, in practice, telescopes are usually limited to a finite number of pixels and operational life span, so the total area of a survey increases with pixel size. We therefore fix the survey lifetime and the number of pixels in the focal plane while varying the pixel scale, thereby effectively varying the survey size. In a pure trade-off for image resolution versus survey area, we find that measurements of the matter power spectrum would have minimum statistical error with a pixel scale of 0.09" for a 0.14" FWHM point-spread function (PSF). The pixel scale could be increased to ~0.16" if images dithered by exactly half-pixel offsets were always available. Some of our results do depend on our adopted shape measurement method and should be regarded as an upper limit: future pipelines may require smaller pixels to overcome systematic floors not yet accessible, and, in certain circumstances, measuring the shape of the PSF might be more difficult than those of galaxies. However, the relative trends in our analysis are robust, especially those of the surface density of resolved galaxies. Our approach thus provides a snapshot of potential in available technology, and a practical counterpart to analytic studies of pixelation, which necessarily assume an idealized shape

  7. Latest results of the R&D on CMOS MAPS for the Layer0 of the SuperB SVT

    NASA Astrophysics Data System (ADS)

    Balestri, G.; Batignani, G.; Beck, G.; Bernardelli, A.; Berra, A.; Bettarini, S.; Bevan, |A.; Bombelli, L.; Bosi, F.; Bosisio, L.; Casarosa, G.; Ceccanti, M.; Cenci, R.; Citterio, M.; Coelli, S.; Comotti, D.; Dalla Betta, G.-F.; Fabbri, L.; Fiorini, C.; Fontana, G.; Forti, F.; Gabrielli, A.; Gaioni, L.; Gannaway, F.; Giorgi, F.; Giorgi, M. A.; Lanceri, L.; Liberali, V.; Lietti, D.; Lusiani, A.; Mammini, P.; Manazza, A.; Manghisoni, M.; Monti, M.; Morris, J.; Morsani, F.; Nasri, B.; Neri, N.; Oberhof, B.; Palombo, F.; Pancheri, L.; Paoloni, E.; Pellegrini, G.; Perez, A.; Petragnani, G.; Prest, M.; Povoli, M.; Profeti, A.; Quartieri, E.; Rashevskaya, I.; Ratti, L.; Re, V.; Rizzo, G.; Sbarra, C.; Semprini-Cesari, N.; Soldani, A.; Stabile, A.; Stella, C.; Traversi, G.; Valentinetti, S.; Verzellesi, G.; Villa, M.; Vitale, L.; Walsh, J.; Wilson, F.; Zoccoli, A.; Zucca, S.

    2013-12-01

    Physics and high background conditions set very challenging requirements on readout speed, material budget and resolution for the innermost layer of the SuperB Silicon Vertex Tracker operated at the full luminosity. Monolithic Active Pixel Sensors (MAPS) are very appealing in this application since the thin sensitive region allows grinding the substrate to tens of microns. Deep N-Well MAPS, developed in the ST 130 nm CMOS technology, achieved in-pixel sparsification and fast time stamping. Further improvements are being explored with an intense R&D program, including both vertical integration and 2D MAPS with the INMAPS quadruple well. We present the results of the characterization with IR laser, radioactive sources and beam of several chips produced with the 3D (Chartered/Tezzaron) process. We have also studied prototypes exploiting the features of the quadruple well and the high resistivity epitaxial layer of the INMAPS 180 nm process. Promising results from an irradiation campaign with neutrons on small matrices and other test-structures, as well as the response of the sensors to high energy charged tracks are presented.

  8. A two-step A/D conversion and column self-calibration technique for low noise CMOS image sensors.

    PubMed

    Bae, Jaeyoung; Kim, Daeyun; Ham, Seokheon; Chae, Youngcheol; Song, Minkyu

    2014-01-01

    In this paper, a 120 frames per second (fps) low noise CMOS Image Sensor (CIS) based on a Two-Step Single Slope ADC (TS SS ADC) and column self-calibration technique is proposed. The TS SS ADC is suitable for high speed video systems because its conversion speed is much faster (by more than 10 times) than that of the Single Slope ADC (SS ADC). However, there exist some mismatching errors between the coarse block and the fine block due to the 2-step operation of the TS SS ADC. In general, this makes it difficult to implement the TS SS ADC beyond a 10-bit resolution. In order to improve such errors, a new 4-input comparator is discussed and a high resolution TS SS ADC is proposed. Further, a feedback circuit that enables column self-calibration to reduce the Fixed Pattern Noise (FPN) is also described. The proposed chip has been fabricated with 0.13 μm Samsung CIS technology and the chip satisfies the VGA resolution. The pixel is based on the 4-TR Active Pixel Sensor (APS). The high frame rate of 120 fps is achieved at the VGA resolution. The measured FPN is 0.38 LSB, and measured dynamic range is about 64.6 dB.

  9. A two-step A/D conversion and column self-calibration technique for low noise CMOS image sensors.

    PubMed

    Bae, Jaeyoung; Kim, Daeyun; Ham, Seokheon; Chae, Youngcheol; Song, Minkyu

    2014-01-01

    In this paper, a 120 frames per second (fps) low noise CMOS Image Sensor (CIS) based on a Two-Step Single Slope ADC (TS SS ADC) and column self-calibration technique is proposed. The TS SS ADC is suitable for high speed video systems because its conversion speed is much faster (by more than 10 times) than that of the Single Slope ADC (SS ADC). However, there exist some mismatching errors between the coarse block and the fine block due to the 2-step operation of the TS SS ADC. In general, this makes it difficult to implement the TS SS ADC beyond a 10-bit resolution. In order to improve such errors, a new 4-input comparator is discussed and a high resolution TS SS ADC is proposed. Further, a feedback circuit that enables column self-calibration to reduce the Fixed Pattern Noise (FPN) is also described. The proposed chip has been fabricated with 0.13 μm Samsung CIS technology and the chip satisfies the VGA resolution. The pixel is based on the 4-TR Active Pixel Sensor (APS). The high frame rate of 120 fps is achieved at the VGA resolution. The measured FPN is 0.38 LSB, and measured dynamic range is about 64.6 dB. PMID:24999716

  10. Design methodology: edgeless 3D ASICs with complex in-pixel processing for pixel detectors

    SciTech Connect

    Fahim Farah, Fahim Farah; Deptuch, Grzegorz W.; Hoff, James R.; Mohseni, Hooman

    2015-08-28

    The design methodology for the development of 3D integrated edgeless pixel detectors with in-pixel processing using Electronic Design Automation (EDA) tools is presented. A large area 3 tier 3D detector with one sensor layer and two ASIC layers containing one analog and one digital tier, is built for x-ray photon time of arrival measurement and imaging. A full custom analog pixel is 65μm x 65μm. It is connected to a sensor pixel of the same size on one side, and on the other side it has approximately 40 connections to the digital pixel. A 32 x 32 edgeless array without any peripheral functional blocks constitutes a sub-chip. The sub-chip is an indivisible unit, which is further arranged in a 6 x 6 array to create the entire 1.248cm x 1.248cm ASIC. Each chip has 720 bump-bond I/O connections, on the back of the digital tier to the ceramic PCB. All the analog tier power and biasing is conveyed through the digital tier from the PCB. The assembly has no peripheral functional blocks, and hence the active area extends to the edge of the detector. This was achieved by using a few flavors of almost identical analog pixels (minimal variation in layout) to allow for peripheral biasing blocks to be placed within pixels. The 1024 pixels within a digital sub-chip array have a variety of full custom, semi-custom and automated timing driven functional blocks placed together. The methodology uses a modified mixed-mode on-top digital implementation flow to not only harness the tool efficiency for timing and floor-planning but also to maintain designer control over compact parasitically aware layout. The methodology uses the Cadence design platform, however it is not limited to this tool.

  11. Improved Signal Chains for Readout of CMOS Imagers

    NASA Technical Reports Server (NTRS)

    Pain, Bedabrata; Hancock, Bruce; Cunningham, Thomas

    2009-01-01

    An improved generic design has been devised for implementing signal chains involved in readout from complementary metal oxide/semiconductor (CMOS) image sensors and for other readout integrated circuits (ICs) that perform equivalent functions. The design applies to any such IC in which output signal charges from the pixels in a given row are transferred simultaneously into sampling capacitors at the bottoms of the columns, then voltages representing individual pixel charges are read out in sequence by sequentially turning on column-selecting field-effect transistors (FETs) in synchronism with source-follower- or operational-amplifier-based amplifier circuits. The improved design affords the best features of prior source-follower-and operational- amplifier-based designs while overcoming the major limitations of those designs. The limitations can be summarized as follows: a) For a source-follower-based signal chain, the ohmic voltage drop associated with DC bias current flowing through the column-selection FET causes unacceptable voltage offset, nonlinearity, and reduced small-signal gain. b) For an operational-amplifier-based signal chain, the required bias current and the output noise increase superlinearly with size of the pixel array because of a corresponding increase in the effective capacitance of the row bus used to couple the sampled column charges to the operational amplifier. The effect of the bus capacitance is to simultaneously slow down the readout circuit and increase noise through the Miller effect.

  12. Solid-state image sensor with focal-plane digital photon-counting pixel array

    NASA Technical Reports Server (NTRS)

    Fossum, Eric R. (Inventor); Pain, Bedabrata (Inventor)

    1995-01-01

    A photosensitive layer such as a-Si for a UV/visible wavelength band is provided for low light level imaging with at least a separate CMOS amplifier directly connected to each PIN photodetector diode to provide a focal-plane array of NxN pixels, and preferably a separate photon-counting CMOS circuit directly connected to each CMOS amplifier, although one row of counters may be time shared for reading out the photon flux rate of each diode in the array, together with a buffer memory for storing all rows of the NxN image frame before transfer to suitable storage. All CMOS circuitry is preferably fabricated in the same silicon layer as the PIN photodetector diode for a monolithic structure, but when the wavelength band of interest requires photosensitive material different from silicon, the focal-plane array may be fabricated separately on a different semiconductor layer bump-bonded or otherwise bonded for a virtually monolithic structure with one free terminal of each diode directly connected to the input terminal of its CMOS amplifier and digital counter for integration of the photon flux rate at each photodetector of the array.

  13. THE KEPLER PIXEL RESPONSE FUNCTION

    SciTech Connect

    Bryson, Stephen T.; Haas, Michael R.; Dotson, Jessie L.; Koch, David G.; Borucki, William J.; Tenenbaum, Peter; Jenkins, Jon M.; Chandrasekaran, Hema; Caldwell, Douglas A.; Klaus, Todd; Gilliland, Ronald L.

    2010-04-20

    Kepler seeks to detect sequences of transits of Earth-size exoplanets orbiting solar-like stars. Such transit signals are on the order of 100 ppm. The high photometric precision demanded by Kepler requires detailed knowledge of how the Kepler pixels respond to starlight during a nominal observation. This information is provided by the Kepler pixel response function (PRF), defined as the composite of Kepler's optical point-spread function, integrated spacecraft pointing jitter during a nominal cadence and other systematic effects. To provide sub-pixel resolution, the PRF is represented as a piecewise-continuous polynomial on a sub-pixel mesh. This continuous representation allows the prediction of a star's flux value on any pixel given the star's pixel position. The advantages and difficulties of this polynomial representation are discussed, including characterization of spatial variation in the PRF and the smoothing of discontinuities between sub-pixel polynomial patches. On-orbit super-resolution measurements of the PRF across the Kepler field of view are described. Two uses of the PRF are presented: the selection of pixels for each star that maximizes the photometric signal-to-noise ratio for that star, and PRF-fitted centroids which provide robust and accurate stellar positions on the CCD, primarily used for attitude and plate scale tracking. Good knowledge of the PRF has been a critical component for the successful collection of high-precision photometry by Kepler.

  14. Distribution fitting-based pixel labeling for histology image segmentation

    NASA Astrophysics Data System (ADS)

    He, Lei; Long, L. Rodney; Antani, Sameer; Thoma, George

    2011-03-01

    This paper presents a new pixel labeling algorithm for complex histology image segmentation. For each image pixel, a Gaussian mixture model is applied to estimate its neighborhood intensity distributions. With this local distribution fitting, a set of pixels having a full set of source classes (e.g. nuclei, stroma, connective tissue, and background) in their neighborhoods are identified as the seeds for pixel labeling. A seed pixel is labeled by measuring its intensity distance to each of its neighborhood distributions, and the one with the shortest distance is selected to label the seed. For non-seed pixels, we propose two different labeling schemes: global voting and local clustering. In global voting each seed classifies a non-seed pixel into one of the seed's local distributions, i.e., it casts one vote; the final label for the non-seed pixel is the class which gets the most votes, across all the seeds. In local clustering, each non-seed pixel is labeled by one of its own neighborhood distributions. Because the local distributions in a non-seed pixel neighborhood do not necessarily correspond to distinct source classes (i.e., two or more local distributions may be produced by the same source class), we first identify the "true" source class of each local distribution by using the source classes of the seed pixels and a minimum distance criterion to determine the closest source class. The pixel can then be labeled as belonging to this class. With both labeling schemes, experiments on a set of uterine cervix histology images show encouraging performance of our algorithm when compared with traditional multithresholding and K-means clustering, as well as state-of-the-art mean shift clustering, multiphase active contours, and Markov random field-based algorithms.

  15. CMOS output buffer wave shaper

    NASA Technical Reports Server (NTRS)

    Albertson, L.; Whitaker, S.; Merrell, R.

    1990-01-01

    As the switching speeds and densities of Digital CMOS integrated circuits continue to increase, output switching noise becomes more of a problem. A design technique which aids in the reduction of switching noise is reported. The output driver stage is analyzed through the use of an equivalent RLC circuit. The results of the analysis are used in the design of an output driver stage. A test circuit based on these techniques is being submitted to MOSIS for fabrication.

  16. PIXELS: Using field-based learning to investigate students' concepts of pixels and sense of scale

    NASA Astrophysics Data System (ADS)

    Pope, A.; Tinigin, L.; Petcovic, H. L.; Ormand, C. J.; LaDue, N.

    2015-12-01

    Empirical work over the past decade supports the notion that a high level of spatial thinking skill is critical to success in the geosciences. Spatial thinking incorporates a host of sub-skills such as mentally rotating an object, imagining the inside of a 3D object based on outside patterns, unfolding a landscape, and disembedding critical patterns from background noise. In this study, we focus on sense of scale, which refers to how an individual quantified space, and is thought to develop through kinesthetic experiences. Remote sensing data are increasingly being used for wide-reaching and high impact research. A sense of scale is critical to many areas of the geosciences, including understanding and interpreting remotely sensed imagery. In this exploratory study, students (N=17) attending the Juneau Icefield Research Program participated in a 3-hour exercise designed to study how a field-based activity might impact their sense of scale and their conceptions of pixels in remotely sensed imagery. Prior to the activity, students had an introductory remote sensing lecture and completed the Sense of Scale inventory. Students walked and/or skied the perimeter of several pixel types, including a 1 m square (representing a WorldView sensor's pixel), a 30 m square (a Landsat pixel) and a 500 m square (a MODIS pixel). The group took reflectance measurements using a field radiometer as they physically traced out the pixel. The exercise was repeated in two different areas, one with homogenous reflectance, and another with heterogeneous reflectance. After the exercise, students again completed the Sense of Scale instrument and a demographic survey. This presentation will share the effects and efficacy of the field-based intervention to teach remote sensing concepts and to investigate potential relationships between students' concepts of pixels and sense of scale.

  17. Using polynomials to simplify fixed pattern noise and photometric correction of logarithmic CMOS image sensors.

    PubMed

    Li, Jing; Mahmoodi, Alireza; Joseph, Dileepan

    2015-01-01

    An important class of complementary metal-oxide-semiconductor (CMOS) image sensors are those where pixel responses are monotonic nonlinear functions of light stimuli. This class includes various logarithmic architectures, which are easily capable of wide dynamic range imaging, at video rates, but which are vulnerable to image quality issues. To minimize fixed pattern noise (FPN) and maximize photometric accuracy, pixel responses must be calibrated and corrected due to mismatch and process variation during fabrication. Unlike literature approaches, which employ circuit-based models of varying complexity, this paper introduces a novel approach based on low-degree polynomials. Although each pixel may have a highly nonlinear response, an approximately-linear FPN calibration is possible by exploiting the monotonic nature of imaging. Moreover, FPN correction requires only arithmetic, and an optimal fixed-point implementation is readily derived, subject to a user-specified number of bits per pixel. Using a monotonic spline, involving cubic polynomials, photometric calibration is also possible without a circuit-based model, and fixed-point photometric correction requires only a look-up table. The approach is experimentally validated with a logarithmic CMOS image sensor and is compared to a leading approach from the literature. The novel approach proves effective and efficient.

  18. Region-of-interest cone beam computed tomography (ROI CBCT) with a high resolution CMOS detector

    NASA Astrophysics Data System (ADS)

    Jain, A.; Takemoto, H.; Silver, M. D.; Nagesh, S. V. S.; Ionita, C. N.; Bednarek, D. R.; Rudin, S.

    2015-03-01

    Cone beam computed tomography (CBCT) systems with rotational gantries that have standard flat panel detectors (FPD) are widely used for the 3D rendering of vascular structures using Feldkamp cone beam reconstruction algorithms. One of the inherent limitations of these systems is limited resolution (<3 lp/mm). There are systems available with higher resolution but their small FOV limits them to small animal imaging only. In this work, we report on region-of-interest (ROI) CBCT with a high resolution CMOS detector (75 μm pixels, 600 μm HR-CsI) mounted with motorized detector changer on a commercial FPD-based C-arm angiography gantry (194 μm pixels, 600 μm HL-CsI). A cylindrical CT phantom and neuro stents were imaged with both detectors. For each detector a total of 209 images were acquired in a rotational protocol. The technique parameters chosen for the FPD by the imaging system were used for the CMOS detector. The anti-scatter grid was removed and the incident scatter was kept the same for both detectors with identical collimator settings. The FPD images were reconstructed for the 10 cm x10 cm FOV and the CMOS images were reconstructed for a 3.84 cm x 3.84 cm FOV. Although the reconstructed images from the CMOS detector demonstrated comparable contrast to the FPD images, the reconstructed 3D images of the neuro stent clearly showed that the CMOS detector improved delineation of smaller objects such as the stent struts (~70 μm) compared to the FPD. Further development and the potential for substantial clinical impact are suggested.

  19. Implementation of pixel level digital TDI for scanning type LWIR FPAs

    NASA Astrophysics Data System (ADS)

    Ceylan, Omer; Kayahan, Huseyin; Yazici, Melik; Afridi, Sohaib; Shafique, Atia; Gurbuz, Yasar

    2014-07-01

    Implementation of a CMOS digital readout integrated circuit (DROIC) based on pixel level digital time delay integration (TDI) for scanning type LWIR focal plane arrays (FPAs) is presented. TDI is implemented on 8 pixels with over sampling rate of 3. Analog signal integrated on integration capacitor is converted to digital domain in pixel, and digital data is transferred to TDI summation counters, where contributions of 8 pixels are added. Output data is 16 bit, where 8 bits are allocated for most significant bits and 8 bits for least significant bits. Control block of the ROIC, which is responsible of generating timing diagram for switches controlling the pixels and summation counters, is realized with VerilogHDL. Summation counters and parallel-to-serial converter to convert 16 bit parallel output data to single bit output are also realized with Verilog HDL. Synthesized verilog netlists are placed&routed and combined with analog under-pixel part of the design. Quantization noise of analog-to-digital conversion is less than 500e-. Since analog signal is converted to digital domain in-pixel, inaccuracies due to analog signal routing over large chip area is eliminated. ROIC is fabricated with 0.18μm CMOS process and chip area is 10mm2. Post-layout simulation results of the implemented design are presented. ROIC is programmable through serial or parallel interface. Input referred noise of ROIC is less than 750 rms electron, while power consumption is less than 30mW. ROIC is designed to perform in cryogenic temperatures.

  20. PImMS, a fast event-triggered monolithic pixel detector with storage of multiple timestamps

    NASA Astrophysics Data System (ADS)

    John, J. J.; Brouard, M.; Clark, A.; Crooks, J.; Halford, E.; Hill, L.; Lee, J. W. L.; Nomerotski, A.; Pisarczyk, R.; Sedgwick, I.; Slater, C. S.; Turchetta, R.; Vallance, C.; Wilman, E.; Winter, B.; Yuen, W. H.

    2012-08-01

    PImMS, or Pixel Imaging Mass Spectrometry, is a novel high-speed monolithic CMOS imaging sensor tailored to mass spectrometry requirements, also suitable for other dark-field applications. In its application to time-of-flight mass spectrometry, the sensor permits ion arrival time distributions to be combined with 2D imaging, providing additional information about the initial position or velocity of ions under study. PImMS1, the first generation sensor in this family, comprises an array of 72 by 72 pixels on a 70 μm by 70 μm pitch. Pixels independently record digital timestamps when events occur over an adjustable threshold. Each pixel contains 4 memories to record timestamps at a resolution of 25 ns. The sensor was designed and manufactured in the INMAPS 0.18 μm process. This allows the inclusion of significant amounts of circuitry (over 600 transistors) within each pixel while maintaining good detection efficiency. We present an overview of the pixel and sensor architecture, explain its functioning and present test results, ranging from characterisation of the analogue front end of the pixel, to verification of its digital functions, to some first images captured on mass spectrometers. We conclude with an overview of the upcoming second generation of PImMS sensors.

  1. Increasing Linear Dynamic Range of a CMOS Image Sensor

    NASA Technical Reports Server (NTRS)

    Pain, Bedabrata

    2007-01-01

    A generic design and a corresponding operating sequence have been developed for increasing the linear-response dynamic range of a complementary metal oxide/semiconductor (CMOS) image sensor. The design provides for linear calibrated dual-gain pixels that operate at high gain at a low signal level and at low gain at a signal level above a preset threshold. Unlike most prior designs for increasing dynamic range of an image sensor, this design does not entail any increase in noise (including fixed-pattern noise), decrease in responsivity or linearity, or degradation of photometric calibration. The figure is a simplified schematic diagram showing the circuit of one pixel and pertinent parts of its column readout circuitry. The conventional part of the pixel circuit includes a photodiode having a small capacitance, CD. The unconventional part includes an additional larger capacitance, CL, that can be connected to the photodiode via a transfer gate controlled in part by a latch. In the high-gain mode, the signal labeled TSR in the figure is held low through the latch, which also helps to adapt the gain on a pixel-by-pixel basis. Light must be coupled to the pixel through a microlens or by back illumination in order to obtain a high effective fill factor; this is necessary to ensure high quantum efficiency, a loss of which would minimize the efficacy of the dynamic- range-enhancement scheme. Once the level of illumination of the pixel exceeds the threshold, TSR is turned on, causing the transfer gate to conduct, thereby adding CL to the pixel capacitance. The added capacitance reduces the conversion gain, and increases the pixel electron-handling capacity, thereby providing an extension of the dynamic range. By use of an array of comparators also at the bottom of the column, photocharge voltages on sampling capacitors in each column are compared with a reference voltage to determine whether it is necessary to switch from the high-gain to the low-gain mode. Depending upon

  2. From Pixels to Planets

    NASA Technical Reports Server (NTRS)

    Brownston, Lee; Jenkins, Jon M.

    2015-01-01

    The Kepler Mission was launched in 2009 as NASAs first mission capable of finding Earth-size planets in the habitable zone of Sun-like stars. Its telescope consists of a 1.5-m primary mirror and a 0.95-m aperture. The 42 charge-coupled devices in its focal plane are read out every half hour, compressed, and then downlinked monthly. After four years, the second of four reaction wheels failed, ending the original mission. Back on earth, the Science Operations Center developed the Science Pipeline to analyze about 200,000 target stars in Keplers field of view, looking for evidence of periodic dimming suggesting that one or more planets had crossed the face of its host star. The Pipeline comprises several steps, from pixel-level calibration, through noise and artifact removal, to detection of transit-like signals and the construction of a suite of diagnostic tests to guard against false positives. The Kepler Science Pipeline consists of a pipeline infrastructure written in the Java programming language, which marshals data input to and output from MATLAB applications that are executed as external processes. The pipeline modules, which underwent continuous development and refinement even after data started arriving, employ several analytic techniques, many developed for the Kepler Project. Because of the large number of targets, the large amount of data per target and the complexity of the pipeline algorithms, the processing demands are daunting. Some pipeline modules require days to weeks to process all of their targets, even when run on NASA's 128-node Pleiades supercomputer. The software developers are still seeking ways to increase the throughput. To date, the Kepler project has discovered more than 4000 planetary candidates, of which more than 1000 have been independently confirmed or validated to be exoplanets. Funding for this mission is provided by NASAs Science Mission Directorate.

  3. NV-CMOS HD camera for day/night imaging

    NASA Astrophysics Data System (ADS)

    Vogelsong, T.; Tower, J.; Sudol, Thomas; Senko, T.; Chodelka, D.

    2014-06-01

    SRI International (SRI) has developed a new multi-purpose day/night video camera with low-light imaging performance comparable to an image intensifier, while offering the size, weight, ruggedness, and cost advantages enabled by the use of SRI's NV-CMOS HD digital image sensor chip. The digital video output is ideal for image enhancement, sharing with others through networking, video capture for data analysis, or fusion with thermal cameras. The camera provides Camera Link output with HD/WUXGA resolution of 1920 x 1200 pixels operating at 60 Hz. Windowing to smaller sizes enables operation at higher frame rates. High sensitivity is achieved through use of backside illumination, providing high Quantum Efficiency (QE) across the visible and near infrared (NIR) bands (peak QE <90%), as well as projected low noise (<2h+) readout. Power consumption is minimized in the camera, which operates from a single 5V supply. The NVCMOS HD camera provides a substantial reduction in size, weight, and power (SWaP) , ideal for SWaP-constrained day/night imaging platforms such as UAVs, ground vehicles, fixed mount surveillance, and may be reconfigured for mobile soldier operations such as night vision goggles and weapon sights. In addition the camera with the NV-CMOS HD imager is suitable for high performance digital cinematography/broadcast systems, biofluorescence/microscopy imaging, day/night security and surveillance, and other high-end applications which require HD video imaging with high sensitivity and wide dynamic range. The camera comes with an array of lens mounts including C-mount and F-mount. The latest test data from the NV-CMOS HD camera will be presented.

  4. X-ray imaging and spectroscopy using low cost COTS CMOS sensors

    NASA Astrophysics Data System (ADS)

    Lane, David W.

    2012-08-01

    Whilst commercial X-ray sensor arrays are capable of both imaging and spectroscopy they are currently expensive and this can limit their widespread use. This study examines the use of very low cost CMOS sensors for X-ray imaging and spectroscopy based on the commercial off the shelf (COTS) technology used in cellular telephones, PC multimedia and children's toys. Some examples of imaging using a 'webcam' and a modified OmniVision OV7411 sensor are presented, as well as a simple energy dispersive X-ray detector based on an OmniVision OV7221 sensor. In each case X-ray sensitivity was enabled by replacing the sensor's front glass window with a 5 μm thick aluminium foil, with X-rays detected as an increase in a pixel's dark current due to the generation of additional electron-hole pairs within its active region. The exposure control and data processing requirements for imaging and spectroscopy are discussed. The modified OV7221 sensor was found to have a linear X-ray energy calibration and a resolution of approximately 510 eV.

  5. Electronic radon monitoring with the CMOS System-on-Chip AlphaRad

    NASA Astrophysics Data System (ADS)

    Higueret, S.; Husson, D.; Le, T. D.; Nourreddine, A.; Michielsen, N.

    2008-01-01

    The development of the integrated circuit AlphaRad as a new System-on-Chip for detection of α-particles has already been reported. This paper deals with electronic monitoring of atmospheric radon, which is one of the promising applications of the chip. The future electronic radon monitor (ERM) is designed to be compact, inexpensive, operating at low voltage and fully stand-alone. We present here the complete electronic board of the future ERM: it is made of three independent AlphaRad chips running in parallel, mounted on a small printed-circuit board which includes a numeric block for data treatment based on a Xilinx programmable gate array. The maximal counting rate of the AlphaRad chip has been pushed to at least 3×10 6 α-particles cm -2. The complete system for detection of the solid aerosols will be published separately, and this paper will focus on the electronic board alone. Already 20 times faster than our first measurement with a CMOS pixel sensor, the system was tested at low and high activities, showing an excellent linearity for 222Rn levels up to 80 kBq m -3.

  6. Illumination robust change detection with CMOS imaging sensors

    NASA Astrophysics Data System (ADS)

    Rengarajan, Vijay; Gupta, Sheetal B.; Rajagopalan, A. N.; Seetharaman, Guna

    2015-05-01

    Change detection between two images in the presence of degradations is an important problem in the computer vision community, more so for the aerial scenario which is particularly challenging. Cameras mounted on moving platforms such as aircrafts or drones are subject to general six-dimensional motion as the motion is not restricted to a single plane. With CMOS cameras increasingly in vogue due to their low power consumption, the inevitability of rolling-shutter (RS) effect adds to the challenge. This is caused by sequential exposure of rows in CMOS cameras unlike conventional global shutter cameras where all pixels are exposed simultaneously. The RS effect is particularly pronounced in aerial imaging since each row of the imaging sensor is likely to experience a different motion. For fast-moving platforms, the problem is further compounded since the rows are also affected by motion blur. Moreover, since the two images are shot at different times, illumination differences are common. In this paper, we propose a unified computational framework that elegantly exploits the scarcity constraint to deal with the problem of change detection in images degraded by RS effect, motion blur as well as non-global illumination differences. We formulate an optimization problem where each row of the distorted image is approximated as a weighted sum of the corresponding rows in warped versions of the reference image due to camera motion within the exposure period to account for geometric as well as photometric differences. The method has been validated on both synthetic and real data.

  7. Photocurrent estimation from multiple nondestructive samples in CMOS image sensor

    NASA Astrophysics Data System (ADS)

    Liu, Xinqiao; El Gamal, Abbas

    2001-05-01

    CMOS image sensors generally suffer form lower dynamic range than CCDs due to their higher readout noise. Their high speed readout capability and the potential of integrating memory and signal processing with the sensor on the same chip, open up many possibilities for enhancing their dynamic range. Earlier work have demonstrated the use of multiple non-destructive samples to enhance dynamic range, while achieving higher SNR than using other dynamic range enhancement schemes. The high dynamic range image is constructed by appropriately scaling each pixel's last sample before saturation. Conventional CDS is used to reduce offset FPN and reset noise. This simple high dynamic range image construction scheme, however, does not take full advantage of the multiple samples. Readout noise power, which doubles as a result of performing CDS, remain as high as in conventional sensor operation. As a result dynamic range is only extended at the high illumination end. The paper explores the use of linear mean-square-error estimation to more fully exploit the multiple pixel samples to reduce readout noise and thus extend dynamic range at the low illumination end. We present three estimation algorithms: (1) a recursive estimator when reset noise and offset FPN are ignored, (2) a non-recursive algorithm when reset noise and FPN are considered, and (3) a recursive estimation algorithm for case (2), which achieves mean square error close to the non-recursive algorithm without the need to store all the samples. The later recursive algorithm is attractive since it requires the storage of only a few pixel values per pixel, which makes its implementation in a single chip digital imaging system feasible.

  8. CMS Pixel Data Quality Monitoring

    NASA Astrophysics Data System (ADS)

    Merkel, Petra

    2010-05-01

    We present the CMS Pixel Data Quality Monitoring (DQM) system. The concept and architecture are discussed. The monitored quantities are introduced, and the methods on how to ensure that the detector takes high-quality data with large efficiency are explained. Finally we describe the automated data certification scheme, which is used to certify and classify the data from the Pixel detector for physics analyses.

  9. A Multi-Modality CMOS Sensor Array for Cell-Based Assay and Drug Screening.

    PubMed

    Chi, Taiyun; Park, Jong Seok; Butts, Jessica C; Hookway, Tracy A; Su, Amy; Zhu, Chengjie; Styczynski, Mark P; McDevitt, Todd C; Wang, Hua

    2015-12-01

    In this paper, we present a fully integrated multi-modality CMOS cellular sensor array with four sensing modalities to characterize different cell physiological responses, including extracellular voltage recording, cellular impedance mapping, optical detection with shadow imaging and bioluminescence sensing, and thermal monitoring. The sensor array consists of nine parallel pixel groups and nine corresponding signal conditioning blocks. Each pixel group comprises one temperature sensor and 16 tri-modality sensor pixels, while each tri-modality sensor pixel can be independently configured for extracellular voltage recording, cellular impedance measurement (voltage excitation/current sensing), and optical detection. This sensor array supports multi-modality cellular sensing at the pixel level, which enables holistic cell characterization and joint-modality physiological monitoring on the same cellular sample with a pixel resolution of 80 μm × 100 μm. Comprehensive biological experiments with different living cell samples demonstrate the functionality and benefit of the proposed multi-modality sensing in cell-based assay and drug screening.

  10. Local Pixel Bundles: Bringing the Pixels to the People

    NASA Astrophysics Data System (ADS)

    Anderson, Jay

    2014-12-01

    The automated galaxy-based alignment software package developed for the Frontier Fields program (hst2galign, see Anderson & Ogaz 2014 and http://www.stsci.edu/hst/campaigns/frontier-fields/) produces a direct mapping from the pixels of the flt frame of each science exposure into a common master frame. We can use these mappings to extract the flt-pixels in the vicinity of a source of interest and package them into a convenient "bundle". In addition to the pixels, this data bundle can also contain "meta" information that will allow users to transform positions from the flt pixels to the reference frame and vice-versa. Since the un-resampled pixels in the flt frames are the only true constraints we have on the astronomical scene, the ability to inter-relate these pixels will enable many high-precision studies, such as: point-source-fitting and deconvolution with accurate PSFs, easy exploration of different image-combining algorithms, and accurate faint-source finding and photometry. The data products introduced in this ISR are a very early attempt to provide the flt-level pixel constraints in a package that is accessible to more than the handful of experts in HST astrometry. The hope is that users in the community might begin using them and will provide feedback as to what information they might want to see in the bundles and what general analysis packages they might find useful. For that reason, this document is somewhat informally written, since I know that it will be modified and updated as the products and tools are optimized.

  11. A Low Power Digital Accumulation Technique for Digital-Domain CMOS TDI Image Sensor.

    PubMed

    Yu, Changwei; Nie, Kaiming; Xu, Jiangtao; Gao, Jing

    2016-01-01

    In this paper, an accumulation technique suitable for digital domain CMOS time delay integration (TDI) image sensors is proposed to reduce power consumption without degrading the rate of imaging. In terms of the slight variations of quantization codes among different pixel exposures towards the same object, the pixel array is divided into two groups: one is for coarse quantization of high bits only, and the other one is for fine quantization of low bits. Then, the complete quantization codes are composed of both results from the coarse-and-fine quantization. The equivalent operation comparably reduces the total required bit numbers of the quantization. In the 0.18 µm CMOS process, two versions of 16-stage digital domain CMOS TDI image sensor chains based on a 10-bit successive approximate register (SAR) analog-to-digital converter (ADC), with and without the proposed technique, are designed. The simulation results show that the average power consumption of slices of the two versions are 6 . 47 × 10 - 8 J/line and 7 . 4 × 10 - 8 J/line, respectively. Meanwhile, the linearity of the two versions are 99.74% and 99.99%, respectively. PMID:27669256

  12. A 10-bit column-parallel cyclic ADC for high-speed CMOS image sensors

    NASA Astrophysics Data System (ADS)

    Ye, Han; Quanliang, Li; Cong, Shi; Nanjian, Wu

    2013-08-01

    This paper presents a high-speed column-parallel cyclic analog-to-digital converter (ADC) for a CMOS image sensor. A correlated double sampling (CDS) circuit is integrated in the ADC, which avoids a stand-alone CDS circuit block. An offset cancellation technique is also introduced, which reduces the column fixed-pattern noise (FPN) effectively. One single channel ADC with an area less than 0.02 mm2 was implemented in a 0.13 μm CMOS image sensor process. The resolution of the proposed ADC is 10-bit, and the conversion rate is 1.6 MS/s. The measured differential nonlinearity and integral nonlinearity are 0.89 LSB and 6.2 LSB together with CDS, respectively. The power consumption from 3.3 V supply is only 0.66 mW. An array of 48 10-bit column-parallel cyclic ADCs was integrated into an array of CMOS image sensor pixels. The measured results indicated that the ADC circuit is suitable for high-speed CMOS image sensors.

  13. Development of n-in-p pixel modules for the ATLAS upgrade at HL-LHC

    NASA Astrophysics Data System (ADS)

    Macchiolo, A.; Nisius, R.; Savic, N.; Terzo, S.

    2016-09-01

    Thin planar pixel modules are promising candidates to instrument the inner layers of the new ATLAS pixel detector for HL-LHC, thanks to the reduced contribution to the material budget and their high charge collection efficiency after irradiation. 100-200 μm thick sensors, interconnected to FE-I4 read-out chips, have been characterized with radioactive sources and beam tests at the CERN-SPS and DESY. The results of these measurements are reported for devices before and after irradiation up to a fluence of 14 ×1015 neq /cm2 . The charge collection and tracking efficiency of the different sensor thicknesses are compared. The outlook for future planar pixel sensor production is discussed, with a focus on sensor design with the pixel pitches (50×50 and 25×100 μm2) foreseen for the RD53 Collaboration read-out chip in 65 nm CMOS technology. An optimization of the biasing structures in the pixel cells is required to avoid the hit efficiency loss presently observed in the punch-through region after irradiation. For this purpose the performance of different layouts have been compared in FE-I4 compatible sensors at various fluence levels by using beam test data. Highly segmented sensors will represent a challenge for the tracking in the forward region of the pixel system at HL-LHC. In order to reproduce the performance of 50×50 μm2 pixels at high pseudo-rapidity values, FE-I4 compatible planar pixel sensors have been studied before and after irradiation in beam tests at high incidence angle (80°) with respect to the short pixel direction. Results on cluster shapes, charge collection and hit efficiency will be shown.

  14. X-ray characterization of a multichannel smart-pixel array detector.

    PubMed

    Ross, Steve; Haji-Sheikh, Michael; Huntington, Andrew; Kline, David; Lee, Adam; Li, Yuelin; Rhee, Jehyuk; Tarpley, Mary; Walko, Donald A; Westberg, Gregg; Williams, George; Zou, Haifeng; Landahl, Eric

    2016-01-01

    The Voxtel VX-798 is a prototype X-ray pixel array detector (PAD) featuring a silicon sensor photodiode array of 48 × 48 pixels, each 130 µm × 130 µm × 520 µm thick, coupled to a CMOS readout application specific integrated circuit (ASIC). The first synchrotron X-ray characterization of this detector is presented, and its ability to selectively count individual X-rays within two independent arrival time windows, a programmable energy range, and localized to a single pixel is demonstrated. During our first trial run at Argonne National Laboratory's Advance Photon Source, the detector achieved a 60 ns gating time and 700 eV full width at half-maximum energy resolution in agreement with design parameters. Each pixel of the PAD holds two independent digital counters, and the discriminator for X-ray energy features both an upper and lower threshold to window the energy of interest discarding unwanted background. This smart-pixel technology allows energy and time resolution to be set and optimized in software. It is found that the detector linearity follows an isolated dead-time model, implying that megahertz count rates should be possible in each pixel. Measurement of the line and point spread functions showed negligible spatial blurring. When combined with the timing structure of the synchrotron storage ring, it is demonstrated that the area detector can perform both picosecond time-resolved X-ray diffraction and fluorescence spectroscopy measurements. PMID:26698064

  15. X-ray Characterization of a Multichannel Smart-Pixel Array Detector

    SciTech Connect

    Ross, Steve; Haji-Sheikh, Michael; Huntington, Andrew; Kline, David; Lee, Adam; Li, Yuelin; Rhee, Jehyuk; Tarpley, Mary; Walko, Donald A.; Westberg, Gregg; Williams, George; Zou, Haifeng; Landahl, Eric

    2016-01-01

    The Voxtel VX-798 is a prototype X-ray pixel array detector (PAD) featuring a silicon sensor photodiode array of 48 x 48 pixels, each 130 mu m x 130 mu m x 520 mu m thick, coupled to a CMOS readout application specific integrated circuit (ASIC). The first synchrotron X-ray characterization of this detector is presented, and its ability to selectively count individual X-rays within two independent arrival time windows, a programmable energy range, and localized to a single pixel is demonstrated. During our first trial run at Argonne National Laboratory's Advance Photon Source, the detector achieved a 60 ns gating time and 700 eV full width at half-maximum energy resolution in agreement with design parameters. Each pixel of the PAD holds two independent digital counters, and the discriminator for X-ray energy features both an upper and lower threshold to window the energy of interest discarding unwanted background. This smart-pixel technology allows energy and time resolution to be set and optimized in software. It is found that the detector linearity follows an isolated dead-time model, implying that megahertz count rates should be possible in each pixel. Measurement of the line and point spread functions showed negligible spatial blurring. When combined with the timing structure of the synchrotron storage ring, it is demonstrated that the area detector can perform both picosecond time-resolved X-ray diffraction and fluorescence spectroscopy measurements.

  16. Fast Imaging Detector Readout Circuits with In-Pixel ADCs for Fourier Transform Imaging Spectrometers

    NASA Technical Reports Server (NTRS)

    Rider, D.; Blavier, J-F.; Cunningham, T.; Hancock, B.; Key, R.; Pannell, Z.; Sander, S.; Seshadri, S.; Sun, C.; Wrigley, C.

    2011-01-01

    Focal plane arrays (FPAs) with high frame rates and many pixels benefit several upcoming Earth science missions including GEO-CAPE, GACM, and ACE by enabling broader spatial coverage and higher spectral resolution. FPAs for the PanFTS, a high spatial resolution Fourier transform spectrometer and a candidate instrument for the GEO-CAPE mission are the focus of the developments reported here, but this FPA technology has the potential to enable a variety of future measurements and instruments. The ESTO ACT Program funded the developed of a fast readout integrated circuit (ROIC) based on an innovative in-pixel analog-to-digital converter (ADC). The 128 X 128 pixel ROIC features 60 ?m pixels, a 14-bit ADC in each pixel and operates at a continuous frame rate of 14 kHz consuming only 1.1 W of power. The ROIC outputs digitized data completely eliminating the bulky, power consuming signal chains needed by conventional FPAs. The 128 X 128 pixel ROIC has been fabricated in CMOS and tested at the Jet Propulsion Laboratory. The current version is designed to be hybridized with PIN photodiode arrays via indium bump bonding for light detection in the visible and ultraviolet spectral regions. However, the ROIC design incorporates a small photodiode in each cell to permit detailed characterization of the ROICperformance without the need for hybridization. We will describe the essential features of the ROIC design and present results of ROIC performance measurements.

  17. Vertical cavity surface emitting laser-based smart pixels with coplanar bump-bonded contacts

    NASA Astrophysics Data System (ADS)

    Jurrat, Randy; Pu, Rui; Hayes, Eric M.; Pulver, Daryl; Feld, Stewart A.; Wilmsen, Carl W.

    1996-11-01

    Integration of vertical cavity surface emitting lasers (VCSELs) onto a prefabricated smart pixel chip introduces fabrication problems since they can not be grown on foundry fabricated Si CMOS or GaAs MESFET circuit. This paper presents an approach to flip-chip bump-bonding VCSEL-arrays to a pixel chip in which each VCSEL is bonding directly to the appropriate pixel circuit. Thus, no added area is required and the interconnect capacitance is held to a minimum. The technique requires contacting both the n- and p-mirror of the VCSEL on the same side of the VCSEL chip and in the same plane. This allows bump bonding both contacts to the pixel chip and subsequent removal of the VCSEL chip substrate. The steps required to accomplish the VCSEL coplanar bonding include reactive ion etching of mesas and device separation in BCL3/Cl, electroplating a 4.5 micrometers high gold coplanar contact post, In/Sn alloy solder deposition, bonding to the smart pixel chip, and accurate alignment of the VCSEL and pixel chips, epoxy underfill and at last substrate removal.

  18. Design and coupled-effect simulations of CMOS micro gas sensors built on SOI thin membranes

    NASA Astrophysics Data System (ADS)

    Lu, Chih-Cheng; Udrea, Florin; Gardner, Julian W.; Setiadi, D.; Dogaru, T.; Tsai, T. H.; Covington, James A.

    2001-04-01

    This paper describes coupled-effect simulations of smart micro gas-sensors based on standard BiCMOS technology. The smart sensor features very low power consumption, high sensitivity and potential low fabrication cost achieved through full CMOS integration. For the first time the micro heaters are made of active CMOS elements (i.e. MOSFET transistors) and embedded in a thin SOI membrane consisting of Si and SiO2 thin layers. Micro gas-sensors such as chemoresistive, microcalorimeteric and Pd/polymer gate FET sensors can be made using this technology. Full numerical analyses including 3D electro- thermo-mechanical simulations, in particular stress and deflection studies on the SOI membranes are presented. The transducer circuit design and the post-CMOS fabrication process, which includes single sided back-etching, are also reported.

  19. Recent progress and development of a speedster-EXD: a new event-triggered hybrid CMOS x-ray detector

    NASA Astrophysics Data System (ADS)

    Griffith, Christopher V.; Falcone, Abraham D.; Prieskorn, Zachary R.; Burrows, David N.

    2015-08-01

    We present the characterization of a new event-driven X-ray hybrid CMOS detector developed by Penn State University in collaboration with Teledyne Imaging Sensors. Along with its low susceptibility to radiation damage, low power consumption, and fast readout time to avoid pile-up, the Speedster-EXD has been designed with the capability to limit its readout to only those pixels containing charge, thus enabling even faster effective frame rates. The threshold for the comparator in each pixel can be set by the user so that only pixels with signal above the set threshold are read out. The Speedster-EXD hybrid CMOS detector also has two new in-pixel features that reduce noise from known noise sources: (1) a low-noise, high-gain CTIA amplifier to eliminate crosstalk from interpixel capacitance (IPC) and (2) in-pixel CDS subtraction to reduce kTC noise. We present the read noise, dark current, IPC, energy resolution, and gain variation measurements of one Speedster-EXD detector.

  20. Method of fabrication of display pixels driven by silicon thin film transistors

    DOEpatents

    Carey, Paul G.; Smith, Patrick M.

    1999-01-01

    Display pixels driven by silicon thin film transistors are fabricated on plastic substrates for use in active matrix displays, such as flat panel displays. The process for forming the pixels involves a prior method for forming individual silicon thin film transistors on low-temperature plastic substrates. Low-temperature substrates are generally considered as being incapable of withstanding sustained processing temperatures greater than about 200.degree. C. The pixel formation process results in a complete pixel and active matrix pixel array. A pixel (or picture element) in an active matrix display consists of a silicon thin film transistor (TFT) and a large electrode, which may control a liquid crystal light valve, an emissive material (such as a light emitting diode or LED), or some other light emitting or attenuating material. The pixels can be connected in arrays wherein rows of pixels contain common gate electrodes and columns of pixels contain common drain electrodes. The source electrode of each pixel TFT is connected to its pixel electrode, and is electrically isolated from every other circuit element in the pixel array.

  1. Accelerated life testing effects on CMOS microcircuit characteristics, phase 1

    NASA Technical Reports Server (NTRS)

    Maximow, B.

    1976-01-01

    An accelerated life test of sufficient duration to generate a minimum of 50% cumulative failures in lots of CMOS devices was conducted to provide a basis for determining the consistency of activation energy at 250 C. An investigation was made to determine whether any thresholds were exceeded during the high temperature testing, which could trigger failure mechanisms unique to that temperature. The usefulness of the 250 C temperature test as a predictor of long term reliability was evaluated.

  2. Measurements of Si hybrid CMOS x-ray detector characteristics

    NASA Astrophysics Data System (ADS)

    Bongiorno, Stephen D.; Falcone, Abe D.; Burrows, David N.; Cook, Robert; Bai, Yibin; Farris, Mark

    2009-08-01

    The development of Hybrid CMOS Detectors (HCDs) for X-Ray telescope focal planes will place them in contention with CCDs on future satellite missions due to their faster frame rates, flexible readout scenarios, lower power consumption, and inherent radiation hardness. CCDs have been used with great success on the current generation of X-Ray telescopes (e.g. Chandra, XMM, Suzaku, and Swift). However their bucket-brigade readout architecture, which transfers charge across the chip with discrete component readout electronics, results in clockrate limited readout speeds that cause pileup (saturation) of bright sources and an inherent susceptibility to radiation induced displacement damage that limits mission lifetime. In contrast, HCDs read pixels with low power, on-chip multiplexer electronics in a random access fashion. Faster frame rates achieved with multi-output readout design will allow the next generation's larger effective area telescopes to observe bright sources free of pileup. Radiation damaged lattice sites effect a single pixel instead of an entire row. Random access, multi-output readout will allow for novel readout modes such as simultaneous bright-source-fast/whole-chip-slow readout. In order for HCDs to be useful as X-Ray detectors, they must show noise and energy resolution performance similar to CCDs while retaining advantages inherent to HCDs. We will report on readnoise, conversion gain, and energy resolution measurements of an X-Ray enhanced Teledyne HAWAII-1RG (H1RG) HCD and describe techniques of H1RG data reduction.

  3. IR CMOS: the digital nightvision solution to sub-1 mLux imaging

    NASA Astrophysics Data System (ADS)

    Pralle, M. U.; Carey, J. E.; Vineis, C.; Palsule, C.; Jiang, J.; Joy, T.

    2015-05-01

    SiOnyx has demonstrated imaging at light levels below 1 mLux at 60 FPS with a 720P CMOS image sensor in a compact, low latency camera. The camera contains a 1 inch (16 mm) optical format sensor and streams uncompressed video over CameraLink with row wise image latency below 1 msec. Sub mLux imaging is enabled by the combination of enhanced quantum efficiency in the near infrared together with state of the art low noise image sensor design. The quantum efficiency enhancement is achieved by utilizing SiOnyx's proprietary ultrafast laser semiconductor processing technology that enhances the absorption of light within a thin pixel layer. Our technology demonstrates a 10 fold improvement in infrared sensitivity over incumbent imaging technology while maintaining complete compatibility with standard CMOS image sensor process flows. Applications include surveillance, nightvision, and 1064nm laser see-spot.

  4. Readout circuit design of the retina-like CMOS image sensor

    NASA Astrophysics Data System (ADS)

    Cao, Fengmei; Song, Shengyu; Bai, Tingzhu; Cao, Nan

    2015-02-01

    Readout circuit is designed for a special retina-like CMOS image sensor. To realize the pixels timing drive and readout of the sensor, the Altera's Cyclone II FPGA is used as a control chip. The voltage of the sensor is supported by a voltage chip initialized by SPI with AVR MCU system. The analog image signal outputted by the sensor is converted to digital image data by 12-bits A/D converter ADS807 and the digital data is memorized in the SRAM. Using the Camera-link image grabber, the data stored in SRAM is transformed to image shown on PC. Experimental results show the circuit works well on retina-like CMOS timing drive and image readout and images can be displayed properly on the PC.

  5. The Belle II DEPFET pixel detector

    NASA Astrophysics Data System (ADS)

    Moser, Hans-Günther

    2016-09-01

    The Belle II experiment at KEK (Tsukuba, Japan) will explore heavy flavour physics (B, charm and tau) at the starting of 2018 with unprecedented precision. Charged particles are tracked by a two-layer DEPFET pixel device (PXD), a four-layer silicon strip detector (SVD) and the central drift chamber (CDC). The PXD will consist of two layers at radii of 14 mm and 22 mm with 8 and 12 ladders, respectively. The pixel sizes will vary, between 50 μm×(55-60) μm in the first layer and between 50 μm×(70-85) μm in the second layer, to optimize the charge sharing efficiency. These innermost layers have to cope with high background occupancy, high radiation and must have minimal material to reduce multiple scattering. These challenges are met using the DEPFET technology. Each pixel is a FET integrated on a fully depleted silicon bulk. The signal charge collected in the 'internal gate' modulates the FET current resulting in a first stage amplification and therefore very low noise. This allows very thin sensors (75 μm) reducing the overall material budget of the detector (0.21% X0). Four fold multiplexing of the column parallel readout allows read out a full frame of the pixel matrix in only 20 μs while keeping the power consumption low enough for air cooling. Only the active electronics outside the detector acceptance has to be cooled actively with a two phase CO2 system. Furthermore the DEPFET technology offers the unique feature of an electronic shutter which allows the detector to operate efficiently in the continuous injection mode of superKEKB.

  6. HEPS-BPIX, a single photon counting pixel detector with a high frame rate for the HEPS project

    NASA Astrophysics Data System (ADS)

    Wei, Wei; Zhang, Jie; Ning, Zhe; Lu, Yunpeng; Fan, Lei; Li, Huaishen; Jiang, Xiaoshan; Lan, Allan K.; Ouyang, Qun; Wang, Zheng; Zhu, Kejun; Chen, Yuanbo; Liu, Peng

    2016-11-01

    China's next generation light source, named the High Energy Photon Source (HEPS), is currently under construction. HEPS-BPIX (HEPS-Beijing PIXel) is a dedicated pixel readout chip that operates in single photon counting mode for X-ray applications in HEPS. Designed using CMOS 0.13 μm technology, the chip contains a matrix of 104×72 pixels. Each pixel measures 150 μm×150 μm and has a counting depth of 20 bits. A bump-bonded prototyping detector module with a 300-μm thick silicon sensor was tested in the beamline of Beijing Synchrotron Radiation Facility. A fast stream of X-ray images was demonstrated, and a frame rate of 1.2 kHz was proven, with a negligible dead time. The test results showed an equivalent noise charge of 115 e- rms after bump bonding and a threshold dispersion of 55 e- rms after calibration.

  7. Comparative study of a wireless digital system and 2 PSP digital systems on proximal caries detection and pixel values.

    PubMed

    dos Anjos Pontual, Andrea; de Melo, Daniela Pita; Pontual, Maria Luiza dos Anjos; de Almeida, Solange Maria; Haiter-Neto, Francisco

    2013-01-01

    This study compared the radiographic image quality of 2 photostimulable phosphor (PSP) plate systems with a radiographic system against a complementary metal oxide silicon (CMOS) system. Using the 3 digital systems, 160 approximal surfaces were radiographed under standardized conditions. Using a 5-point scale, 6 observers scored the resulting images for the presence of caries. The presence of caries was validated histologically, and the image receptors were evaluated using receiver operating characteristic curve analysis. The digital systems were used to take radiographs of an aluminum step wedge for objective analysis with pixel density measurements. The mean pixel values were analyzed statistically using the Kruskal-Wallis test and Dunn multiple comparison test (P < 0.01). The performance of the new CMOS system was comparable to the PSP plate systems and radiographic film.

  8. The CMS pixel luminosity telescope

    NASA Astrophysics Data System (ADS)

    Kornmayer, A.

    2016-07-01

    The Pixel Luminosity Telescope (PLT) is a new complement to the CMS detector for the LHC Run II data taking period. It consists of eight 3-layer telescopes based on silicon pixel detectors that are placed around the beam pipe on each end of CMS viewing the interaction point at small angle. A fast 3-fold coincidence of the pixel planes in each telescope will provide a bunch-by-bunch measurement of the luminosity. Particle tracking allows collision products to be distinguished from beam background, provides a self-alignment of the detectors, and a continuous in-time monitoring of the efficiency of each telescope plane. The PLT is an independent luminometer, essential to enhance the robustness on the measurement of the delivered luminosity and to reduce its systematic uncertainties. This will allow to determine production cross-sections, and hence couplings, with high precision and to set more stringent limits on new particle production.

  9. Performance analysis of a large photoactive area CMOS line sensor for fast, time-resolved spectroscopy applications

    NASA Astrophysics Data System (ADS)

    Poklonskaya, Elena A.; Durini, Daniel; Jung, Melanie; Schrey, Olaf; Driewer, Adrian; Brockherde, Werner; Hosticka, Bedrich; Vogt, Holger

    2014-05-01

    The performance of a fabricated CMOS line sensor based on the lateral drift-field photodiode (LDPD)1 concept is described. A new pixel structure was designed to decrease the charge transfer time across the photoactive area. Synopsys TCAD simulations were performed to design a proper intrinsic lateral drift-field within the pixel. The line sensor was fabricated in the 0.35 μm CMOS technology, and further characterized using a tailored photon-transfer method2 and the EMVA 1288 standard3. The basic parameters such as spectral responsivity, photo-response non-uniformity and dark current were measured at fabricated sensor samples. A special attention was paid to charge transfer time characterization4 and the evaluation of crosstalk between neighboring pixels - two major concerns attained during the development. It is shown that the electro-optical characteristics of the developed line sensor are comparable to those delivered by CCD line sensors available on the market, which are normally superior in performance compared to their CMOS based counterparts, but offering additional features such as the possibility of time gating, non-destructive readout, and charge accumulation over several cycles: approaches used to enhance the signal-to-noise ratio (SNR) of the sensor output.

  10. Commercial CMOS image sensors as X-ray imagers and particle beam monitors

    NASA Astrophysics Data System (ADS)

    Castoldi, A.; Guazzoni, C.; Maffessanti, S.; Montemurro, G. V.; Carraresi, L.

    2015-01-01

    CMOS image sensors are widely used in several applications such as mobile handsets webcams and digital cameras among others. Furthermore they are available across a wide range of resolutions with excellent spectral and chromatic responses. In order to fulfill the need of cheap systems as beam monitors and high resolution image sensors for scientific applications we exploited the possibility of using commercial CMOS image sensors as X-rays and proton detectors. Two different sensors have been mounted and tested. An Aptina MT9v034, featuring 752 × 480 pixels, 6μm × 6μm pixel size has been mounted and successfully tested as bi-dimensional beam profile monitor, able to take pictures of the incoming proton bunches at the DeFEL beamline (1-6 MeV pulsed proton beam) of the LaBeC of INFN in Florence. The naked sensor is able to successfully detect the interactions of the single protons. The sensor point-spread-function (PSF) has been qualified with 1MeV protons and is equal to one pixel (6 mm) r.m.s. in both directions. A second sensor MT9M032, featuring 1472 × 1096 pixels, 2.2 × 2.2 μm pixel size has been mounted on a dedicated board as high-resolution imager to be used in X-ray imaging experiments with table-top generators. In order to ease and simplify the data transfer and the image acquisition the system is controlled by a dedicated micro-processor board (DM3730 1GHz SoC ARM Cortex-A8) on which a modified LINUX kernel has been implemented. The paper presents the architecture of the sensor systems and the results of the experimental measurements.

  11. Coherence experiments in single-pixel digital holography.

    PubMed

    Liu, Jung-Ping; Guo, Chia-Hao; Hsiao, Wei-Jen; Poon, Ting-Chung; Tsang, Peter

    2015-05-15

    In optical scanning holography (OSH), the coherence properties of the acquired holograms depend on the single-pixel size, i.e., the active area of the photodetector. For the first time, to the best of our knowledge, we have demonstrated coherent, partial coherent, and incoherent three-dimensional (3D) imaging by experiment in such a single-pixel digital holographic recording system. We have found, for the incoherent mode of OSH, in which the detector of the largest active area is applied, the 3D location of a diffusely reflecting object can be successfully retrieved without speckle noise. For the partial coherent mode employing a smaller pixel size of the detector, significant speckles and randomly distributed bright spots appear among the reconstructed images. For the coherent mode of OSH when the size of the pixel is vanishingly small, the bright spots disappear. However, the speckle remains and the signal-to-noise ratio is low. PMID:26393741

  12. Stellar photometry with big pixels

    SciTech Connect

    Buonanno, R.; Iannicola, G.; European Southern Observatory, Garching )

    1989-03-01

    A new software for stellar photometry in crowded fields is presented. This software overcomes the limitations present in a traditional package like ROMAFOT when the pixel size of the detector is comparable to the scale length of point images. This is the case, for instance, with the Hubble Space Telescope-Wide Field Camera and, partially, with the Planetary Camera. The numerical solution presented here is compared to the technical solution of obtaining more exposures of the same field, each shifted by a fraction of pixel. This software will be available in MIDAS. 11 refs.

  13. Pixel Analysis and Plasma Dynamics Characterized by Photospheric Spectral Data

    NASA Astrophysics Data System (ADS)

    Rasca, A.; Chen, J.; Pevtsov, A. A.

    2015-12-01

    Continued advances in solar observations have led to higher-resolution magnetograms and surface (photospheric) images, revealing bipolar magnetic features operating near the resolution limit during emerging flux events and other phenomena used to predict solar eruptions responsible for geomagnetic plasma disturbances. However, line of sight (LOS) magnetogram pixels only contain the net uncanceled magnetic flux, which is expected to increase for fixed regions as resolution limits improve. A pixel dynamics model utilizing Stokes I spectral profiles was previously-used to quantify changes in the Doppler shift, width, asymmetry, and tail flatness of Fe I lines at 6301.5 and 6302.5 Å and used pixel-by-pixel line profile fluctuations to characterize quiet and active regions on the Sun. We use this pixel dynamics model with circularly polarized photospheric data (e.g., SOLIS data) to estimate plasma dynamic properties at a sub-pixel level. The analysis can be extended to include the full Stokes parameters and study signatures of magnetic fields and coupled plasma properties on sub-pixel scales.

  14. Spectrometry with consumer-quality CMOS cameras.

    PubMed

    Scheeline, Alexander

    2015-01-01

    Many modern spectrometric instruments use diode arrays, charge-coupled arrays, or CMOS cameras for detection and measurement. As portable or point-of-use instruments are desirable, one would expect that instruments using the cameras in cellular telephones and tablet computers would be the basis of numerous instruments. However, no mass market for such devices has yet developed. The difficulties in using megapixel CMOS cameras for scientific measurements are discussed, and promising avenues for instrument development reviewed. Inexpensive alternatives to use of the built-in camera are also mentioned, as the long-term question is whether it is better to overcome the constraints of CMOS cameras or to bypass them.

  15. Development of silicon micropattern pixel detectors

    NASA Astrophysics Data System (ADS)

    Heijne, E. H. M.; Antinori, F.; Beker, H.; Batignani, G.; Beusch, W.; Bonvicini, V.; Bosisio, L.; Boutonnet, C.; Burger, P.; Campbell, M.; Cantoni, P.; Catanesi, M. G.; Chesi, E.; Claeys, C.; Clemens, J. C.; Cohen Solal, M.; Darbo, G.; Da Via, C.; Debusschere, I.; Delpierre, P.; Di Bari, D.; Di Liberto, S.; Dierickx, B.; Enz, C. C.; Focardi, E.; Forti, F.; Gally, Y.; Glaser, M.; Gys, T.; Habrard, M. C.; Hallewell, G.; Hermans, L.; Heuser, J.; Hurst, R.; Inzani, P.; Jæger, J. J.; Jarron, P.; Karttaavi, T.; Kersten, S.; Krummenacher, F.; Leitner, R.; Lemeilleur, F.; Lenti, V.; Letheren, M.; Lokajicek, M.; Loukas, D.; Macdermott, M.; Maggi, G.; Manzari, V.; Martinengo, P.; Meddeler, G.; Meddi, F.; Mekkaoui, A.; Menetrey, A.; Middelkamp, P.; Morando, M.; Munns, A.; Musico, P.; Nava, P.; Navach, F.; Neyer, C.; Pellegrini, F.; Pengg, F.; Perego, R.; Pindo, M.; Pospisil, S.; Potheau, R.; Quercigh, E.; Redaelli, N.; Ridky, J.; Rossi, L.; Sauvage, D.; Segato, G.; Simone, S.; Sopko, B.; Stefanini, G.; Strakos, V.; Tempesta, P.; Tonelli, G.; Vegni, G.; Verweij, H.; Viertel, G. M.; Vrba, V.; Waisbard, J.; CERN RD19 Collaboration

    1994-09-01

    Successive versions of high speed, active silicon pixel detectors with integrated readout electronics have been developed for particle physics experiments using monolithic and hybrid technologies. Various matrices with binary output as well as a linear detector with analog output have been made. The hybrid binary matrix with 1024 cells (dimension 75 μm×500 μm) can capture events at ˜5 MHz and a selected event can then be read out in < 10 μs. In different beam tests at CERN a precision of 25 μm has been achieved and the efficiency was better than 99.2%. Detector thicknesses of 300 μm and 150 μm of silicon have been used. In a test with a 109Cd source a noise level of 170 e - r.m.s. (1.4 keV fwhm) has been measured with a threshold non-uniformity of 750 e - r.m.s. Objectives of the development work are the increase of the size of detecting area without loss of efficiency, the design of an appropriate readout architecture for collider operation, the reduction of material thickness in the detector, understanding of the threshold non-uniformity, study of the sensitivity of the pixel matrices to light and low energy electrons for scintillating fiber detector readout and last but not least, the optimization of cost and yield of the pixel detectors in production.

  16. Micromachined high-performance RF passives in CMOS substrate

    NASA Astrophysics Data System (ADS)

    Li, Xinxin; Ni, Zao; Gu, Lei; Wu, Zhengzheng; Yang, Chen

    2016-11-01

    This review systematically addresses the micromachining technologies used for the fabrication of high-performance radio-frequency (RF) passives that can be integrated into low-cost complementary metal-oxide semiconductor (CMOS)-grade (i.e. low-resistivity) silicon wafers. With the development of various kinds of post-CMOS-compatible microelectromechanical systems (MEMS) processes, 3D structural inductors/transformers, variable capacitors, tunable resonators and band-pass/low-pass filters can be compatibly integrated into active integrated circuits to form monolithic RF system-on-chips. By using MEMS processes, including substrate modifying/suspending and LIGA-like metal electroplating, both the highly lossy substrate effect and the resistive loss can be largely eliminated and depressed, thereby meeting the high-performance requirements of telecommunication applications.

  17. Zero suppression logic of the ALICE muon forward tracker pixel chip prototype PIXAM and associated readout electronics development

    NASA Astrophysics Data System (ADS)

    Flouzat, C.; Değerli, Y.; Guilloux, F.; Orsini, F.; Venault, P.

    2015-05-01

    In the framework of the ALICE experiment upgrade at HL-LHC, a new forward tracking detector, the Muon Forward Tracker (MFT), is foreseen to overcome the intrinsic limitations of the present Muon Spectrometer and will perform new measurements of general interest for the whole ALICE physics. To fulfill the new detector requirements, CMOS Monolithic Active Pixel Sensors (MAPS) provide an attractive trade-off between readout speed, spatial resolution, radiation hardness, granularity, power consumption and material budget. This technology has been chosen to equip the Muon Forward Tracker and also the vertex detector: the Inner Tracking System (ITS). Since few years, an intensive R&D program has been performed on the design of MAPS in the 0.18 μ m CMOS Image Sensor (CIS) process. In order to avoid pile up effects in the experiment, the classical rolling shutter readout system of MAPS has been improved to overcome the readout speed limitation. A zero suppression algorithm, based on a 3 by 3 cluster finding (position and data), has been chosen for the MFT. This algorithm allows adequate data compression for the sensor. This paper presents the large size prototype PIXAM, which represents 1/3 of the final chip, and will focus specially on the zero suppression block architecture. This chip is designed and under fabrication in the 0.18 μ m CIS process. Finally, the readout electronics principle to send out the compressed data flow is also presented taking into account the cluster occupancy per MFT plane for a single central Pb-Pb collision.

  18. Silicon CMOS optical receiver circuits with integrated thin-film compound semiconductor detectors

    NASA Astrophysics Data System (ADS)

    Brooke, Martin A.; Lee, Myunghee; Jokerst, Nan Marie; Camperi-Ginestet, C.

    1995-04-01

    While many circuit designers have tackled the problem of CMOS digital communications receiver design, few have considered the problem of circuitry suitable for an all CMOS digital IC fabrication process. Faced with a high speed receiver design the circuit designer will soon conclude that a high speed analog-oriented fabrication process provides superior performance advantages to a digital CMOS process. However, for applications where there are overwhelming reasons to integrate the receivers on the same IC as large amounts of conventional digital circuitry, the low yield and high cost of the exotic analog-oriented fabrication is no longer an option. The issues that result from a requirement to use a digital CMOS IC process cut across all aspects of receiver design, and result in significant differences in circuit design philosophy and topology. Digital ICs are primarily designed to yield small, fast CMOS devices for digital logic gates, thus no effort is put into providing accurate or high speed resistances, or capacitors. This lack of any reliable resistance or capacitance has a significant impact on receiver design. Since resistance optimization is not a prerogative of the digital IC process engineer, the wisest option is thus to not use these elements, opting instead for active circuitry to replace the functions normally ascribed to resistance and capacitance. Depending on the application receiver noise may be a dominant design constraint. The noise performance of CMOS amplifiers is different than bipolar or GaAs MESFET circuits, shot noise is generally insignificant when compared to channel thermal noise. As a result the optimal input stage topology is significantly different for the different technologies. It is found that, at speeds of operation approaching the limits of the digital CMOS process, open loop designs have noise-power-gain-bandwidth tradeoff performance superior to feedback designs. Furthermore, the lack of good resisters and capacitors

  19. A CMOS microdisplay with integrated controller utilizing improved silicon hot carrier luminescent light sources

    NASA Astrophysics Data System (ADS)

    Venter, Petrus J.; Alberts, Antonie C.; du Plessis, Monuko; Joubert, Trudi-Heleen; Goosen, Marius E.; Janse van Rensburg, Christo; Rademeyer, Pieter; Fauré, Nicolaas M.

    2013-03-01

    Microdisplay technology, the miniaturization and integration of small displays for various applications, is predominantly based on OLED and LCoS technologies. Silicon light emission from hot carrier electroluminescence has been shown to emit light visibly perceptible without the aid of any additional intensification, although the electrical to optical conversion efficiency is not as high as the technologies mentioned above. For some applications, this drawback may be traded off against the major cost advantage and superior integration opportunities offered by CMOS microdisplays using integrated silicon light sources. This work introduces an improved version of our previously published microdisplay by making use of new efficiency enhanced CMOS light emitting structures and an increased display resolution. Silicon hot carrier luminescence is often created when reverse biased pn-junctions enter the breakdown regime where impact ionization results in carrier transport across the junction. Avalanche breakdown is typically unwanted in modern CMOS processes. Design rules and process design are generally tailored to prevent breakdown, while the voltages associated with breakdown are too high to directly interact with the rest of the CMOS standard library. This work shows that it is possible to lower the operating voltage of CMOS light sources without compromising the optical output power. This results in more efficient light sources with improved interaction with other standard library components. This work proves that it is possible to create a reasonably high resolution microdisplay while integrating the active matrix controller and drivers on the same integrated circuit die without additional modifications, in a standard CMOS process.

  20. The pixel detector for the CMS phase-II upgrade

    NASA Astrophysics Data System (ADS)

    Dinardo, M. E.

    2015-04-01

    The high luminosity phase of the Large Hadron Collider (HL-LHC) requires a major pixel detector R&D effort to develop both readout chip and sensor that are capable to withstand unprecedented extremely high radiation. The target integrated luminosity of 3000 fb-1, that the HL-LHC is expected to deliver over about 10 years of operation, translates into a hadron fluence of 2×1016 1 MeV eq.n. / cm2, or equivalently 10 MGy of radiation dose in silicon, at about 3 cm from the interaction region where the first layer of the pixel detector could be located. The CMS collaboration has undertaken two baseline sensor R&D programs on thin n-on-p planar and 3D silicon sensor technologies. Together with the ATLAS collaboration it has also been established a common R&D effort for the development of the readout chip in the 65 nm CMOS technology. Status, progresses, and prospects of the CMS R&D effort are presented and discussed in this article.

  1. Photon crosstalk in pixel array for x-ray imaging

    NASA Astrophysics Data System (ADS)

    Kim, Myung Soo; Kim, Giyoon; Kang, Dong-uk; Lee, Daehee; Cho, Gyuseong

    2014-09-01

    A large-area X-ray CMOS image sensor (LXCIS) is widely used in mammography, non-destructive inspection, and animal CT. For LXCIS, in spite of weakness such as low spatial and energy resolution, a Indirect method using scintillator like CsI(Tl) or Gd2O2S is still well-used because of low cost and easy manufacture. A photo-diode for X-ray imaging has large area about 50 ~ 200 um as compared with vision image sensors. That is because X-ray has feature of straight and very small light emission of a scintillator. Moreover, notwithstanding several structure like columnar, the scintillator still emit a diffusible light. This diffusible light from scintillator can make spatial crosstalk in X-ray photodiode array because of a large incidence angle. Moreover, comparing with vision image sensors, X-ray sensor doesn't have micro lens for gathering the photons to photo-diode. In this study, we simulated the affection of spatial crosstalk in X-ray sensor by comparing optical sensor. Additionally, the chip, which was fabricated in 0.18 um 1P5M process by Hynix in Korea, was tested to know the effect of spatial crosstalk by changing design parameters. From these works, we found out that spatial crosstalk is affected by pixel pitch, incident angle of photons, and micro lens on each pixels.

  2. Experiment on digital CDS with 33-M pixel 120-fps super hi-vision image sensor

    NASA Astrophysics Data System (ADS)

    Yonai, J.; Yasue, T.; Kitamura, K.; Hayashida, T.; Watabe, T.; Shimamoto, H.; Kawahito, S.

    2014-03-01

    We have developed a CMOS image sensor with 33 million pixels and 120 frames per second (fps) for Super Hi-Vision (SHV:8K version of UHDTV). There is a way to reduce the fixed pattern noise (FPN) caused in CMOS image sensors by using digital correlated double sampling (digital CDS), but digital CDS methods need high-speed analog-to-digital conversion and are not applicable to conventional UHDTV image sensors due to their speed limit. Our image sensor, on the other hand, has a very fast analog-to-digital converter (ADC) using "two-stage cyclic ADC" architecture that is capable of being driven at 120-fps, which is double the normal frame rate for TV. In this experiment, we performed experimental digital CDS using the high-frame rate UHDTV image sensor. By reading the same row twice at 120-fps and subtracting dark pixel signals from accumulated pixel signals, we obtained a 60-fps equivalent video signal with digital noise reduction. The results showed that the VFPN was effectively reduced from 24.25 e-rms to 0.43 e-rms.

  3. Development of Gated Pinned Avalanche Photodiode Pixels for High-Speed Low-Light Imaging.

    PubMed

    Resetar, Tomislav; De Munck, Koen; Haspeslagh, Luc; Rosmeulen, Maarten; Süss, Andreas; Puers, Robert; Van Hoof, Chris

    2016-01-01

    This work explores the benefits of linear-mode avalanche photodiodes (APDs) in high-speed CMOS imaging as compared to different approaches present in literature. Analysis of APDs biased below their breakdown voltage employed in single-photon counting mode is also discussed, showing a potentially interesting alternative to existing Geiger-mode APDs. An overview of the recently presented gated pinned avalanche photodiode pixel concept is provided, as well as the first experimental results on a 8 × 16 pixel test array. Full feasibility of the proposed pixel concept is not demonstrated; however, informative data is obtained from the sensor operating under -32 V substrate bias and clearly exhibiting wavelength-dependent gain in frontside illumination. The readout of the chip designed in standard 130 nm CMOS technology shows no dependence on the high-voltage bias. Readout noise level of 15 e - rms, full well capacity of 8000 e - , and the conversion gain of 75 µV / e - are extracted from the photon-transfer measurements. The gain characteristics of the avalanche junction are characterized on separate test diodes showing a multiplication factor of 1.6 for red light in frontside illumination. PMID:27537882

  4. Development of Gated Pinned Avalanche Photodiode Pixels for High-Speed Low-Light Imaging

    PubMed Central

    Resetar, Tomislav; De Munck, Koen; Haspeslagh, Luc; Rosmeulen, Maarten; Süss, Andreas; Puers, Robert; Van Hoof, Chris

    2016-01-01

    This work explores the benefits of linear-mode avalanche photodiodes (APDs) in high-speed CMOS imaging as compared to different approaches present in literature. Analysis of APDs biased below their breakdown voltage employed in single-photon counting mode is also discussed, showing a potentially interesting alternative to existing Geiger-mode APDs. An overview of the recently presented gated pinned avalanche photodiode pixel concept is provided, as well as the first experimental results on a 8 × 16 pixel test array. Full feasibility of the proposed pixel concept is not demonstrated; however, informative data is obtained from the sensor operating under −32 V substrate bias and clearly exhibiting wavelength-dependent gain in frontside illumination. The readout of the chip designed in standard 130 nm CMOS technology shows no dependence on the high-voltage bias. Readout noise level of 15 e- rms, full well capacity of 8000e-, and the conversion gain of 75 µV/e- are extracted from the photon-transfer measurements. The gain characteristics of the avalanche junction are characterized on separate test diodes showing a multiplication factor of 1.6 for red light in frontside illumination. PMID:27537882

  5. Development of Gated Pinned Avalanche Photodiode Pixels for High-Speed Low-Light Imaging.

    PubMed

    Resetar, Tomislav; De Munck, Koen; Haspeslagh, Luc; Rosmeulen, Maarten; Süss, Andreas; Puers, Robert; Van Hoof, Chris

    2016-08-15

    This work explores the benefits of linear-mode avalanche photodiodes (APDs) in high-speed CMOS imaging as compared to different approaches present in literature. Analysis of APDs biased below their breakdown voltage employed in single-photon counting mode is also discussed, showing a potentially interesting alternative to existing Geiger-mode APDs. An overview of the recently presented gated pinned avalanche photodiode pixel concept is provided, as well as the first experimental results on a 8 × 16 pixel test array. Full feasibility of the proposed pixel concept is not demonstrated; however, informative data is obtained from the sensor operating under -32 V substrate bias and clearly exhibiting wavelength-dependent gain in frontside illumination. The readout of the chip designed in standard 130 nm CMOS technology shows no dependence on the high-voltage bias. Readout noise level of 15 e - rms, full well capacity of 8000 e - , and the conversion gain of 75 µV / e - are extracted from the photon-transfer measurements. The gain characteristics of the avalanche junction are characterized on separate test diodes showing a multiplication factor of 1.6 for red light in frontside illumination.

  6. Edge pixel response studies of edgeless silicon sensor technology for pixellated imaging detectors

    NASA Astrophysics Data System (ADS)

    Maneuski, D.; Bates, R.; Blue, A.; Buttar, C.; Doonan, K.; Eklund, L.; Gimenez, E. N.; Hynds, D.; Kachkanov, S.; Kalliopuska, J.; McMullen, T.; O'Shea, V.; Tartoni, N.; Plackett, R.; Vahanen, S.; Wraight, K.

    2015-03-01

    Silicon sensor technologies with reduced dead area at the sensor's perimeter are under development at a number of institutes. Several fabrication methods for sensors which are sensitive close to the physical edge of the device are under investigation utilising techniques such as active-edges, passivated edges and current-terminating rings. Such technologies offer the goal of a seamlessly tiled detection surface with minimum dead space between the individual modules. In order to quantify the performance of different geometries and different bulk and implant types, characterisation of several sensors fabricated using active-edge technology were performed at the B16 beam line of the Diamond Light Source. The sensors were fabricated by VTT and bump-bonded to Timepix ROICs. They were 100 and 200 μ m thick sensors, with the last pixel-to-edge distance of either 50 or 100 μ m. The sensors were fabricated as either n-on-n or n-on-p type devices. Using 15 keV monochromatic X-rays with a beam spot of 2.5 μ m, the performance at the outer edge and corners pixels of the sensors was evaluated at three bias voltages. The results indicate a significant change in the charge collection properties between the edge and 5th (up to 275 μ m) from edge pixel for the 200 μ m thick n-on-n sensor. The edge pixel performance of the 100 μ m thick n-on-p sensors is affected only for the last two pixels (up to 110 μ m) subject to biasing conditions. Imaging characteristics of all sensor types investigated are stable over time and the non-uniformities can be minimised by flat-field corrections. The results from the synchrotron tests combined with lab measurements are presented along with an explanation of the observed effects.

  7. Implantable CMOS imaging device with absorption filters for green fluorescence imaging

    NASA Astrophysics Data System (ADS)

    Sunaga, Yoshinori; Haruta, Makito; Takehara, Hironari; Ohta, Yasumi; Motoyama, Mayumi; Noda, Toshihiko; Sasagawa, Kiyotaka; Tokuda, Takashi; Ohta, Jun

    2014-03-01

    Green fluorescent materials such as Green Fluorescence Protein (GFP) and fluorescein are often used for observing neural activities. Thus, it is important to observe the fluorescence in a freely moving state in order to understand neural activities corresponding to behaviors. In this work, we developed an implantable CMOS imaging device for in-vivo green fluorescence imaging with efficient excitation light rejection using a combination of absorption filters. An interference filter is usually used for a fluorescence microscope in order to achieve high fluorescence imaging sensitivity. However, in the case of the implantable device, interference filters are not suitable because their transmission spectra depend on incident angle. To solve this problem we used two kinds of absorption filters that do not have angle dependence. An absorption filter consisting of yellow dye (VARYFAST YELLOW 3150) was coated on the pixel array of an image sensor. The rejection ratio of ideal excitation light (490 nm) against green fluorescence (510 nm) was 99.66%. However, the blue LED as an excitation light source has a broad emission spectrum and its intensity at 510 nm is 2.2 x 10-2 times the emission peak intensity. By coating LEDs with the emission absorption filters, the intensity of the unwanted component of the excitation light was reduced to 1.4 x 10-4. Using the combination of absorption filters, we achieved excitation light transmittance of 10-5 onto the image sensor. It is expected that high-sensitivity green fluorescence imaging of neural activities in a freely moving mouse will be possible by using this technology.

  8. Design and Fabrication of High-Efficiency CMOS/CCD Imagers

    NASA Technical Reports Server (NTRS)

    Pain, Bedabrata

    2007-01-01

    An architecture for back-illuminated complementary metal oxide/semiconductor (CMOS) and charge-coupled-device (CCD) ultraviolet/visible/near infrared- light image sensors, and a method of fabrication to implement the architecture, are undergoing development. The architecture and method are expected to enable realization of the full potential of back-illuminated CMOS/CCD imagers to perform with high efficiency, high sensitivity, excellent angular response, and in-pixel signal processing. The architecture and method are compatible with next-generation CMOS dielectric-forming and metallization techniques, and the process flow of the method is compatible with process flows typical of the manufacture of very-large-scale integrated (VLSI) circuits. The architecture and method overcome all obstacles that have hitherto prevented high-yield, low-cost fabrication of back-illuminated CMOS/CCD imagers by use of standard VLSI fabrication tools and techniques. It is not possible to discuss the obstacles in detail within the space available for this article. Briefly, the obstacles are posed by the problems of generating light-absorbing layers having desired uniform and accurate thicknesses, passivation of surfaces, forming structures for efficient collection of charge carriers, and wafer-scale thinning (in contradistinction to diescale thinning). A basic element of the present architecture and method - the element that, more than any other, makes it possible to overcome the obstacles - is the use of an alternative starting material: Instead of starting with a conventional bulk-CMOS wafer that consists of a p-doped epitaxial silicon layer grown on a heavily-p-doped silicon substrate, one starts with a special silicon-on-insulator (SOI) wafer that consists of a thermal oxide buried between a lightly p- or n-doped, thick silicon layer and a device silicon layer of appropriate thickness and doping. The thick silicon layer is used as a handle: that is, as a mechanical support for the

  9. Study of built-in amplifier performance on HV-CMOS sensor for the ATLAS phase-II strip tracker upgrade

    NASA Astrophysics Data System (ADS)

    Liang, Z.; Affolder, A.; Arndt, K.; Bates, R.; Benoit, M.; Di Bello, F.; Blue, A.; Bortoletto, D.; Buckland, M.; Buttar, C.; Caragiulo, P.; Das, D.; Dopke, J.; Dragone, A.; Ehrler, F.; Fadeyev, V.; Galloway, Z.; Grabas, H.; Gregor, I. M.; Grenier, P.; Grillo, A.; Hoeferkamp, M.; Hommels, L. B. A.; Huffman, B. T.; John, J.; Kanisauskas, K.; Kenney, C.; Kramberger, J.; Mandić, I.; Maneuski, D.; Martinez-Mckinney, F.; McMahon, S.; Meng, L.; Mikuž, M.; Muenstermann, D.; Nickerson, R.; Peric, I.; Phillips, P.; Plackett, R.; Rubbo, F.; Segal, J.; Seidel, S.; Seiden, A.; Shipsey, I.; Song, W.; Stanitzki, M.; Su, D.; Tamma, C.; Turchetta, R.; Vigani, L.; Volk, J.; Wang, R.; Warren, M.; Wilson, F.; Worm, S.; Xiu, Q.; Zhang, J.; Zhu, H.

    2016-09-01

    This paper focuses on the performance of analog readout electronics (built-in amplifier) integrated on the high-voltage (HV) CMOS silicon sensor chip, as well as its radiation hardness. Since the total collected charge from minimum ionizing particle (MIP) for the CMOS sensor is 10 times lower than for a conventional planar sensor, it is crucial to integrate a low noise built-in amplifier on the sensor chip to improve the signal to noise ratio of the system. As part of the investigation for the ATLAS strip detector upgrade, a test chip that comprises several pixel arrays with different geometries, as well as standalone built-in amplifiers and built-in amplifiers in pixel arrays has been fabricated in a 0.35 μm high-voltage CMOS process. Measurements of the gain and the noise of both the standalone amplifiers and built-in amplifiers in pixel arrays were performed before and after gamma radiation of up to 60 Mrad. Of special interest is the variation of the noise as a function of the sensor capacitance. We optimized the configuration of the amplifier for a fast rise time to adapt to the LHC bunch crossing period of 25 ns, and measured the timing characteristics including jitter. Our results indicate an adequate amplifier performance for monolithic structures used in HV-CMOS technology. The results have been incorporated in the next submission of a large-structure chip.

  10. X-ray performance of a wafer-scale CMOS flat panel imager for applications in medical imaging and nondestructive testing

    NASA Astrophysics Data System (ADS)

    Cha, Bo Kyung; Jeon, Seongchae; Seo, Chang-Woo

    2016-09-01

    This paper presents a wafer-scale complementary metal-oxide semiconductor (CMOS)-based X-ray flat panel detector for medical imaging and nondestructive testing applications. In this study, our proposed X-ray CMOS flat panel imager has been fabricated by using a 0.35 μm 1-poly/4-metal CMOS process. The pixel size is 100 μm×100 μm and the pixel array format is 1200×1200 pixels, which provide a field-of-view (FOV) of 120mm×120 mm. The 14.3-bit extended counting analog-to digital converter (ADC) with built-in binning mode was used to reduce the area and simultaneously improve the image resolution. The different screens such as thallium-doped CsI (CsI:Tl) and terbium gadolinium oxysulfide (Gd2O2S:Tb) scintillators were used as conversion materials for X-rays to visible light photons. The X-ray imaging performance such as X-ray sensitivity as a function of X-ray exposure dose, spatial resolution, image lag and X-ray images of various objects were measured under practical medical and industrial application conditions. This paper results demonstrate that our prototype CMOS-based X-ray flat panel imager has the significant potential for medical imaging and non-destructive testing (NDT) applications with high-resolution and high speed rate.

  11. Single Photon Counting Performance and Noise Analysis of CMOS SPAD-Based Image Sensors.

    PubMed

    Dutton, Neale A W; Gyongy, Istvan; Parmesan, Luca; Henderson, Robert K

    2016-01-01

    SPAD-based solid state CMOS image sensors utilising analogue integrators have attained deep sub-electron read noise (DSERN) permitting single photon counting (SPC) imaging. A new method is proposed to determine the read noise in DSERN image sensors by evaluating the peak separation and width (PSW) of single photon peaks in a photon counting histogram (PCH). The technique is used to identify and analyse cumulative noise in analogue integrating SPC SPAD-based pixels. The DSERN of our SPAD image sensor is exploited to confirm recent multi-photon threshold quanta image sensor (QIS) theory. Finally, various single and multiple photon spatio-temporal oversampling techniques are reviewed. PMID:27447643

  12. Single Photon Counting Performance and Noise Analysis of CMOS SPAD-Based Image Sensors

    PubMed Central

    Dutton, Neale A. W.; Gyongy, Istvan; Parmesan, Luca; Henderson, Robert K.

    2016-01-01

    SPAD-based solid state CMOS image sensors utilising analogue integrators have attained deep sub-electron read noise (DSERN) permitting single photon counting (SPC) imaging. A new method is proposed to determine the read noise in DSERN image sensors by evaluating the peak separation and width (PSW) of single photon peaks in a photon counting histogram (PCH). The technique is used to identify and analyse cumulative noise in analogue integrating SPC SPAD-based pixels. The DSERN of our SPAD image sensor is exploited to confirm recent multi-photon threshold quanta image sensor (QIS) theory. Finally, various single and multiple photon spatio-temporal oversampling techniques are reviewed. PMID:27447643

  13. Hardware solutions for the 65k pixel X-ray camera module of 75 μm pixel size

    NASA Astrophysics Data System (ADS)

    Kasinski, K.; Maj, P.; Grybos, P.; Koziol, A.

    2016-02-01

    We present three hardware solutions designed for a detector module built with a 2 cm × 2 cm hybrid pixel detector built from a single 320 or 450 μ m thick silicon sensor designed and fabricated by Hamamatsu and two UFXC32k readout integrated circuits (128 × 256 pixels with 75μ m pitch, designed in CMOS 130 nm at AGH-UST). The chips work in a single photon counting mode and provide ultra-fast X-ray imaging. The presented hardware modules are designed according to requirements of various tests and applications: ṡDevice A: a fast and flexible system for tests with various radiation sources. ṡDevice B: a standalone, all-in-one imaging device providing three standard interfaces (USB 2.0, Ethernet, Camera Link) and up to 640 MB/s bandwidth. ṡDevice C: a prototype large-area imaging system. The paper shows the readout system structure for each case with highlighted circuit board designs with details on power distribution and cooling on both FR4 and LTCC (low temperature co-fired ceramic) based circuits.

  14. A 65k pixel, 150k frames-per-second camera with global gating and micro-lenses suitable for fluorescence lifetime imaging

    NASA Astrophysics Data System (ADS)

    Burri, Samuel; Powolny, François; Bruschini, Claudio E.; Michalet, Xavier; Regazzoni, Francesco; Charbon, Edoardo

    2014-05-01

    This paper presents our work on a 65k pixel single-photon avalanche diode (SPAD) based imaging sensor realized in a 0.35μm standard CMOS process. At a resolution of 512 by 128 pixels the sensor is read out in 6.4μs to deliver over 150k monochrome frames per second. The individual pixel has a size of 24μm2 and contains the SPAD with a 12T quenching and gating circuitry along with a memory element. The gating signals are distributed across the chip through a balanced tree to minimize the signal skew between the pixels. The array of pixels is row-addressable and data is sent out of the chip on 128 lines in parallel at a frequency of 80MHz. The system is controlled by an FPGA which generates the gating and readout signals and can be used for arbitrary real-time computation on the frames from the sensor. The communication protocol between the camera and a conventional PC is USB2. The active area of the chip is 5% and can be significantly improved with the application of a micro-lens array. A micro-lens array, for use with collimated light, has been designed and its performance is reviewed in the paper. Among other high-speed phenomena the gating circuitry capable of generating illumination periods shorter than 5ns can be used for Fluorescence Lifetime Imaging (FLIM). In order to measure the lifetime of fluorophores excited by a picosecond laser, the sensor's illumination period is synchronized with the excitation laser pulses. A histogram of the photon arrival times relative to the excitation is then constructed by counting the photons arriving during the sensitive time for several positions of the illumination window. The histogram for each pixel is transferred afterwards to a computer where software routines extract the lifetime at each location with an accuracy better than 100ps. We show results for fluorescence lifetime measurements using different fluorophores with lifetimes ranging from 150ps to 5ns.

  15. DynAMITe: a prototype large area CMOS APS for breast cancer diagnosis using x-ray diffraction measurements

    NASA Astrophysics Data System (ADS)

    Konstantinidis, A.; Anaxagoras, T.; Esposito, M.; Allinson, N.; Speller, R.

    2012-03-01

    X-ray diffraction studies are used to identify specific materials. Several laboratory-based x-ray diffraction studies were made for breast cancer diagnosis. Ideally a large area, low noise, linear and wide dynamic range digital x-ray detector is required to perform x-ray diffraction measurements. Recently, digital detectors based on Complementary Metal-Oxide- Semiconductor (CMOS) Active Pixel Sensor (APS) technology have been used in x-ray diffraction studies. Two APS detectors, namely Vanilla and Large Area Sensor (LAS), were developed by the Multidimensional Integrated Intelligent Imaging (MI-3) consortium to cover a range of scientific applications including x-ray diffraction. The MI-3 Plus consortium developed a novel large area APS, named as Dynamically Adjustable Medical Imaging Technology (DynAMITe), to combine the key characteristics of Vanilla and LAS with a number of extra features. The active area (12.8 × 13.1 cm2) of DynaMITe offers the ability of angle dispersive x-ray diffraction (ADXRD). The current study demonstrates the feasibility of using DynaMITe for breast cancer diagnosis by identifying six breast-equivalent plastics. Further work will be done to optimize the system in order to perform ADXRD for identification of suspicious areas of breast tissue following a conventional mammogram taken with the same sensor.

  16. 18k Channels single photon counting readout circuit for hybrid pixel detector

    NASA Astrophysics Data System (ADS)

    Maj, P.; Grybos, P.; Szczygiel, R.; Zoladz, M.; Sakumura, T.; Tsuji, Y.

    2013-01-01

    We have performed measurements of an integrated circuit named PXD18k designed for hybrid pixel semiconductor detectors used in X-ray imaging applications. The PXD18k integrated circuit, fabricated in CMOS 180 nm technology, has dimensions of 9.64 mm×20 mm and contains approximately 26 million transistors. The core of the IC is a matrix of 96×192 pixels with 100 μm×100 μm pixel size. Each pixel works in a single photon counting mode. A single pixel contains two charge sensitive amplifiers with Krummenacher feedback scheme, two shapers, two discriminators (with independent thresholds A and B) and two 16-bit ripple counters. The data are read out via eight low voltage differential signaling (LVDS) outputs with 100 Mbps rate. The power consumption is dominated by analog blocks and it is about 23 μW/pixel. The effective peaking time at the discriminator input is 30 ns and is mainly determined by the time constants of the charge sensitive amplifier (CSA). The gain is equal to 42.5 μV/e- and the equivalent noise charge is 168 e- rms (with bump-bonded silicon pixel detector). Thanks to the use of trim DACs in each pixel, the effective threshold spread at the discriminator input is only 1.79 mV. The dead time of the front end electronics for a standard setting is 172 ns (paralyzable model). In the standard readout mode (when the data collection time is separated from the time necessary to readout data from the chip) the PXD18k IC works with two energy thresholds per pixel. The PXD18k can also be operated in the continuous readout mode (with a zero dead time) where one can select the number of bits readout from each pixel to optimize the PXD18k frame rate. For example, for reading out 16 bits/pixel the frame rate is 2.7 kHz and for 4 bits/pixel it rises to 7.1 kHz.

  17. Beam test results of pixel triggerless prototypes for the PbarANDA MVD

    NASA Astrophysics Data System (ADS)

    Calvo, Daniela; De Remigis, Paolo; Filippi, Alessandra; Mazza, Giovanni; Rivetti, Angelo; Wheadon, Richard; De Mori, Francesca; Marcello, Simonetta; Zotti, Laura; Bianco, Simone; Zaunick, Hans-Georg; Brinkmann, Kai-Thomas; Quagli, Tommaso; Schnell, Robert

    2013-12-01

    Hybrid pixel and double sided silicon microstrip devices will equip the Micro Vertex Detector of the PbarANDA experiment. The most challenging request of the experiment is the continuous readout at the rate of 2×107 interactions/s. The detector is in an advanced R&D phase and pixel assemblies, composed of thinned epitaxial sensor read out by the custom chip prototype ToPix, developed in the 130 nm CMOS technology, were produced. The triggerless ASIC implements readout channels that are able to detect signals and transmit the information with a precise timestamp. It performs the energy loss measurement using the Time over Threshold technique, in the input range to about 50 fC. A dedicated testing bench allows the control and the readout of each single chip assembly. Two experimental setups were assembled for testing these first single chip prototypes with pions at CERN, T9, in August 2012. The first one is based on a pixel assembly positioned in the middle of a telescope composed of double sided silicon strips sensors. A 50 MHz clock signal synchronizes these two systems, the triggerless pixels and the strip detectors triggered by scintillation detectors. The second experimental setup is a tracking station housing four pixel assemblies. First results will be reported.

  18. Compact SPAD-Based Pixel Architectures for Time-Resolved Image Sensors.

    PubMed

    Perenzoni, Matteo; Pancheri, Lucio; Stoppa, David

    2016-01-01

    This paper reviews the state of the art of single-photon avalanche diode (SPAD) image sensors for time-resolved imaging. The focus of the paper is on pixel architectures featuring small pixel size (<25 μm) and high fill factor (>20%) as a key enabling technology for the successful implementation of high spatial resolution SPAD-based image sensors. A summary of the main CMOS SPAD implementations, their characteristics and integration challenges, is provided from the perspective of targeting large pixel arrays, where one of the key drivers is the spatial uniformity. The main analog techniques aimed at time-gated photon counting and photon timestamping suitable for compact and low-power pixels are critically discussed. The main features of these solutions are the adoption of analog counting techniques and time-to-analog conversion, in NMOS-only pixels. Reliable quantum-limited single-photon counting, self-referenced analog-to-digital conversion, time gating down to 0.75 ns and timestamping with 368 ps jitter are achieved. PMID:27223284

  19. Demonstration of 1024x1024 pixel dual-band QWIP focal plane array

    NASA Astrophysics Data System (ADS)

    Gunapala, S. D.; Bandara, S. V.; Liu, J. K.; Mumolo, J. M.; Ting, D. Z.; Hill, C. J.; Nguyen, J.; Rafol, S. B.

    2010-04-01

    QWIPs are well known for their stability, high pixel-pixel uniformity and high pixel operability which are quintessential parameters for large area imaging arrays. In this paper we report the first demonstration of the megapixel-simultaneously-readable and pixel-co-registered dual-band QWIP focal plane array (FPA). The dual-band QWIP device was developed by stacking two multi-quantum-well stacks tuned to absorb two different infrared wavelengths. The full width at half maximum (FWHM) of the mid-wave infrared (MWIR) band extends from 4.4 - 5.1 μm and FWHM of the long-wave infrared (LWIR) band extends from 7.8 - 8.8 μm. Dual-band QWIP detector arrays were hybridized with direct injection 30 μm pixel pitch megapixel dual-band simultaneously readable CMOS read out integrated circuits using the indium bump hybridization technique. The initial dual-band megapixel QWIP FPAs were cooled to 68K operating temperature. The preliminary data taken from the first megapixel QWIP FPA has shown system NE▵T of 27 and 40 mK for MWIR and LWIR bands respectively.

  20. Compact SPAD-Based Pixel Architectures for Time-Resolved Image Sensors

    PubMed Central

    Perenzoni, Matteo; Pancheri, Lucio; Stoppa, David

    2016-01-01

    This paper reviews the state of the art of single-photon avalanche diode (SPAD) image sensors for time-resolved imaging. The focus of the paper is on pixel architectures featuring small pixel size (<25 μm) and high fill factor (>20%) as a key enabling technology for the successful implementation of high spatial resolution SPAD-based image sensors. A summary of the main CMOS SPAD implementations, their characteristics and integration challenges, is provided from the perspective of targeting large pixel arrays, where one of the key drivers is the spatial uniformity. The main analog techniques aimed at time-gated photon counting and photon timestamping suitable for compact and low-power pixels are critically discussed. The main features of these solutions are the adoption of analog counting techniques and time-to-analog conversion, in NMOS-only pixels. Reliable quantum-limited single-photon counting, self-referenced analog-to-digital conversion, time gating down to 0.75 ns and timestamping with 368 ps jitter are achieved. PMID:27223284

  1. Signal-Conditioning Block of a 1 × 200 CMOS Detector Array for a Terahertz Real-Time Imaging System.

    PubMed

    Yang, Jong-Ryul; Lee, Woo-Jae; Han, Seong-Tae

    2016-01-01

    A signal conditioning block of a 1 × 200 Complementary Metal-Oxide-Semiconductor (CMOS) detector array is proposed to be employed with a real-time 0.2 THz imaging system for inspecting large areas. The plasmonic CMOS detector array whose pixel size including an integrated antenna is comparable to the wavelength of the THz wave for the imaging system, inevitably carries wide pixel-to-pixel variation. To make the variant outputs from the array uniform, the proposed signal conditioning block calibrates the responsivity of each pixel by controlling the gate bias of each detector and the voltage gain of the lock-in amplifiers in the block. The gate bias of each detector is modulated to 1 MHz to improve the signal-to-noise ratio of the imaging system via the electrical modulation by the conditioning block. In addition, direct current (DC) offsets of the detectors in the array are cancelled by initializing the output voltage level from the block. Real-time imaging using the proposed signal conditioning block is demonstrated by obtaining images at the rate of 19.2 frame-per-sec of an object moving on the conveyor belt with a scan width of 20 cm and a scan speed of 25 cm/s. PMID:26950128

  2. Signal-Conditioning Block of a 1 × 200 CMOS Detector Array for a Terahertz Real-Time Imaging System

    PubMed Central

    Yang, Jong-Ryul; Lee, Woo-Jae; Han, Seong-Tae

    2016-01-01

    A signal conditioning block of a 1 × 200 Complementary Metal-Oxide-Semiconductor (CMOS) detector array is proposed to be employed with a real-time 0.2 THz imaging system for inspecting large areas. The plasmonic CMOS detector array whose pixel size including an integrated antenna is comparable to the wavelength of the THz wave for the imaging system, inevitably carries wide pixel-to-pixel variation. To make the variant outputs from the array uniform, the proposed signal conditioning block calibrates the responsivity of each pixel by controlling the gate bias of each detector and the voltage gain of the lock-in amplifiers in the block. The gate bias of each detector is modulated to 1 MHz to improve the signal-to-noise ratio of the imaging system via the electrical modulation by the conditioning block. In addition, direct current (DC) offsets of the detectors in the array are cancelled by initializing the output voltage level from the block. Real-time imaging using the proposed signal conditioning block is demonstrated by obtaining images at the rate of 19.2 frame-per-sec of an object moving on the conveyor belt with a scan width of 20 cm and a scan speed of 25 cm/s. PMID:26950128

  3. A 2D 4×4 Channel Readout ASIC for Pixelated CdTe Detectors for Medical Imaging Applications

    PubMed Central

    Macias-Montero, Jose-Gabriel; Sarraj, Maher; Chmeissani, Mokhtar; Martínez, Ricardo; Puigdengoles, Carles

    2015-01-01

    We present a 16-channel readout integrated circuit (ROIC) with nanosecond-resolution time to digital converter (TDC) for pixelated Cadmium Telluride (CdTe) gamma-ray detectors. The 4 × 4 pixel array ROIC is the proof of concept of the 10 × 10 pixel array readout ASIC for positron-emission tomography (PET) scanner, positron-emission mammography (PEM) scanner, and Compton gamma camera. The electronics of each individual pixel integrates an analog front-end with switchable gain, an analog to digital converter (ADC), configuration registers, and a 4-state digital controller. For every detected photon, the pixel electronics provides the energy deposited in the detector with 10-bit resolution, and a fast trigger signal for time stamp. The ASIC contains the 16-pixel matrix electronics, a digital controller, five global voltage references, a TDC, a temperature sensor, and a band-gap based current reference. The ASIC has been fabricated with TSMC 0.25 μm mixed-signal CMOS technology and occupies an area of 5.3 mm × 6.8 mm. The TDC shows a resolution of 95.5 ps, a precision of 600 ps at full width half maximum (FWHM), and a power consumption of 130 μW. In acquisition mode, the total power consumption of every pixel is 200 μW. An equivalent noise charge (ENC) of 160 e−RMS at maximum gain and negative polarity conditions has been measured at room temperature. PMID:26744545

  4. Characterization of the C-MOS Cd-Te Imager PIXIRAD for energy discriminated X-ray imaging

    NASA Astrophysics Data System (ADS)

    Romano, A.; Pacella, D.; Claps, G.; Causa, F.; Gabellieri, L.

    2015-02-01

    The aim of the present work is to assess the operational characteristics of the PIXIRAD Imaging Counter for use in high-definition energy resolved X-ray imaging for different applications. The PIXIRAD imager was developed by an INFN-Pisa Spin-off. It works in photon counting mode in a wide energy range, soft and hard X-rays (2-100 keV), with pulse discrimination defined by two thresholds. The 650 μ m thick CdTe X-ray sensor is interfaced with a CMOS VLSI chip organized on a 512× 476 matrix of 55 μ m exagonal pixels (total active area of 30.7× 24.8 mm2). The experimental characterization was carried out in the range 3.7-80 keV, to assess the energy discrimination capability and detection efficiency of the PIXIRAD. Energy discrimination in bands was investigated using calibrated monochromatic X-ray sources (fluorescence of Ca, Fe, Cu, Br, Mo, Ag, I, Ta) and a BaCs radioactive source. In addition, two absolutely calibrated X-ray sources (Moxtek 50 kV Bullet and Oxford Instruments SB-80-1M) were utilized. The experimental data show that the PIXIRAD energy response is linear up to about 15 keV, beyond which the cluster size becomes larger than the pixel dimension. It produces multiple counts resulting in a tail at lower energy. Energy resolution was estimated to be about 30%. The effects in term of energy discrimination and a ``smooth energy discrimination'' in bands has been investigated by studying the separation between different energy lines, acquiring combined images with different energy ranges and setting properly the PIXIRAD threshold.

  5. Single-pixel polarimetric imaging.

    PubMed

    Durán, Vicente; Clemente, Pere; Fernández-Alonso, Mercedes; Tajahuerce, Enrique; Lancis, Jesús

    2012-03-01

    We present an optical system that performs Stokes polarimetric imaging with a single-pixel detector. This fact is possible by applying the theory of compressive sampling to the data acquired by a commercial polarimeter without spatial resolution. The measurement process is governed by a spatial light modulator, which sequentially generates a set of preprogrammed light intensity patterns. Experimental results are presented and discussed for an object that provides an inhomogeneous polarization distribution. PMID:22378406

  6. Representing SAR complex image pixels

    NASA Astrophysics Data System (ADS)

    Doerry, A. W.

    2016-05-01

    Synthetic Aperture Radar (SAR) images are often complex-valued to facilitate specific exploitation modes. Furthermore, these pixel values are typically represented with either real/imaginary (also known as I/Q) values, or as Magnitude/Phase values, with constituent components comprised of integers with limited number of bits. For clutter energy well below full-scale, Magnitude/Phase offers lower quantization noise than I/Q representation. Further improvement can be had with companding of the Magnitude value.

  7. SAR Image Complex Pixel Representations

    SciTech Connect

    Doerry, Armin W.

    2015-03-01

    Complex pixel values for Synthetic Aperture Radar (SAR) images of uniform distributed clutter can be represented as either real/imaginary (also known as I/Q) values, or as Magnitude/Phase values. Generally, these component values are integers with limited number of bits. For clutter energy well below full-scale, Magnitude/Phase offers lower quantization noise than I/Q representation. Further improvement can be had with companding of the Magnitude value.

  8. Mapping Electrical Crosstalk in Pixelated Sensor Arrays

    NASA Technical Reports Server (NTRS)

    Seshadri, Suresh (Inventor); Cole, David (Inventor); Smith, Roger M (Inventor); Hancock, Bruce R. (Inventor)

    2013-01-01

    The effects of inter pixel capacitance in a pixilated array may be measured by first resetting all pixels in the array to a first voltage, where a first image is read out, followed by resetting only a subset of pixels in the array to a second voltage, where a second image is read out, where the difference in the first and second images provide information about the inter pixel capacitance. Other embodiments are described and claimed.

  9. New package for CMOS sensors

    NASA Astrophysics Data System (ADS)

    Diot, Jean-Luc; Loo, Kum Weng; Moscicki, Jean-Pierre; Ng, Hun Shen; Tee, Tong Yan; Teysseyre, Jerome; Yap, Daniel

    2004-02-01

    Cost is the main drawback of existing packages for C-MOS sensors (mainly CLCC family). Alternative packages are thus developed world-wide. And in particular, S.T.Microelectronics has studied a low cost alternative packages based on QFN structure, still with a cavity. Intensive work was done to optimize the over-molding operation forming the cavity onto a metallic lead-frame (metallic lead-frame is a low cost substrate allowing very good mechanical definition of the final package). Material selection (thermo-set resin and glue for glass sealing) was done through standard reliability tests for cavity packages (Moisture Sensitivity Level 3 followed by temperature cycling, humidity storage and high temperature storage). As this package concept is new (without leads protruding the molded cavity), the effect of variation of package dimensions, as well as board lay-out design, are simulated on package life time (during temperature cycling, thermal mismatch between board and package leads to thermal fatigue of solder joints). These simulations are correlated with an experimental temperature cycling test with daisy-chain packages.

  10. Future of nano CMOS technology

    NASA Astrophysics Data System (ADS)

    Iwai, Hiroshi

    2015-10-01

    Although Si MOS devices have dominated the integrated circuit applications over the four decades, it has been anticipated that the development of CMOS would reach its limits after the next decade because of the difficulties in the technologies for further downscaling and also because of some fundamental limits of MOSFETs. However, there have been no promising candidates yet, which can replace Si MOSFETs with better performance with low cost. Thus, for the moment, it seems that we have to stick to the Si MOSFET devices until their end. The downsizing is limited by the increase of off-leakage current between source and drain. In order to suppress the off-leakage current, multi-gate structures (FinFET, Tri-gate, and Si-nanowire MOSFETs) are replacing conventional planar MOSFETs, and continuous innovation of high-k/metal gate technologies has enabled EOT scaling down to 0.9 nm in production. However, it was found that the multi-gate structures have a future big problem of significant conduction reduction with decrease in fin width. Also it is not easy to further decrease EOT because of the mobility and reliability degradation. Furthermore, the development of EUV (Extremely Ultra-Violet) lithography, which is supposed to be essential for sub-10 nm lithography, delays significantly because of insufficient illumination intensity for production. Thus, it is now expected that the reduction rate of the gate length, which has a strong influence on the off-leakage current, will become slower in near future.

  11. Wavelength scanning achieves pixel super-resolution in holographic on-chip microscopy

    NASA Astrophysics Data System (ADS)

    Luo, Wei; Göröcs, Zoltan; Zhang, Yibo; Feizi, Alborz; Greenbaum, Alon; Ozcan, Aydogan

    2016-03-01

    Lensfree holographic on-chip imaging is a potent solution for high-resolution and field-portable bright-field imaging over a wide field-of-view. Previous lensfree imaging approaches utilize a pixel super-resolution technique, which relies on sub-pixel lateral displacements between the lensfree diffraction patterns and the image sensor's pixel-array, to achieve sub-micron resolution under unit magnification using state-of-the-art CMOS imager chips, commonly used in e.g., mobile-phones. Here we report, for the first time, a wavelength scanning based pixel super-resolution technique in lensfree holographic imaging. We developed an iterative super-resolution algorithm, which generates high-resolution reconstructions of the specimen from low-resolution (i.e., under-sampled) diffraction patterns recorded at multiple wavelengths within a narrow spectral range (e.g., 10-30 nm). Compared with lateral shift-based pixel super-resolution, this wavelength scanning approach does not require any physical shifts in the imaging setup, and the resolution improvement is uniform in all directions across the sensor-array. Our wavelength scanning super-resolution approach can also be integrated with multi-height and/or multi-angle on-chip imaging techniques to obtain even higher resolution reconstructions. For example, using wavelength scanning together with multi-angle illumination, we achieved a halfpitch resolution of 250 nm, corresponding to a numerical aperture of 1. In addition to pixel super-resolution, the small scanning steps in wavelength also enable us to robustly unwrap phase, revealing the specimen's optical path length in our reconstructed images. We believe that this new wavelength scanning based pixel super-resolution approach can provide competitive microscopy solutions for high-resolution and field-portable imaging needs, potentially impacting tele-pathology applications in resource-limited-settings.

  12. Portable profilometer based on low-coherence interferometry and smart pixel camera

    NASA Astrophysics Data System (ADS)

    Salbut, Leszek; Pakuła, Anna; Tomczewski, Sławomir; Styk, Adam

    2010-09-01

    Although low coherence interferometers are commercially available (e.g., white light interferometers), they are generally quite bulky, expensive, and offer limited flexibility. In the paper the new portable profilometer based on low coherence interferometry is presented. In the device the white light diode with controlled spectrum shape is used in order to increase the zero order fringe contrast, what allows for its better and quicker localization. For image analysis the special type of CMOS matrix (called smart pixel camera), synchronized with reference mirror transducer, is applied. Due to hardware realization of the fringe contrast analysis, independently in each pixel, the time of measurement decreases significantly. High speed processing together with compact design allows that profilometer to be used as the portable device for both in and out door measurements. The capabilities of the designed profilometer are well illustrated by a few application examples.

  13. Column-Parallel Correlated Multiple Sampling Circuits for CMOS Image Sensors and Their Noise Reduction Effects

    PubMed Central

    Suh, Sungho; Itoh, Shinya; Aoyama, Satoshi; Kawahito, Shoji

    2010-01-01

    For low-noise complementary metal-oxide-semiconductor (CMOS) image sensors, the reduction of pixel source follower noises is becoming very important. Column-parallel high-gain readout circuits are useful for low-noise CMOS image sensors. This paper presents column-parallel high-gain signal readout circuits, correlated multiple sampling (CMS) circuits and their noise reduction effects. In the CMS, the gain of the noise cancelling is controlled by the number of samplings. It has a similar effect to that of an amplified CDS for the thermal noise but is a little more effective for 1/f and RTS noises. Two types of the CMS with simple integration and folding integration are proposed. In the folding integration, the output signal swing is suppressed by a negative feedback using a comparator and one-bit D-to-A converter. The CMS circuit using the folding integration technique allows to realize a very low-noise level while maintaining a wide dynamic range. The noise reduction effects of their circuits have been investigated with a noise analysis and an implementation of a 1Mpixel pinned photodiode CMOS image sensor. Using 16 samplings, dynamic range of 59.4 dB and noise level of 1.9 e− for the simple integration CMS and 75 dB and 2.2 e− for the folding integration CMS, respectively, are obtained. PMID:22163400

  14. Gun muzzle flash detection using a CMOS single photon avalanche diode

    NASA Astrophysics Data System (ADS)

    Merhav, Tomer; Savuskan, Vitali; Nemirovsky, Yael

    2013-10-01

    Si based sensors, in particular CMOS Image sensors, have revolutionized low cost imaging systems but to date have hardly been considered as possible candidates for gun muzzle flash detection, due to performance limitations, and low SNR in the visible spectrum. In this study, a CMOS Single Photon Avalanche Diode (SPAD) module is used to record and sample muzzle flash events in the visible spectrum, from representative weapons, common on the modern battlefield. SPADs possess two crucial properties for muzzle flash imaging - Namely, very high photon detection sensitivity, coupled with a unique ability to convert the optical signal to a digital signal at the source pixel, thus practically eliminating readout noise. This enables high sampling frequencies in the kilohertz range without SNR degradation, in contrast to regular CMOS image sensors. To date, the SPAD has not been utilized for flash detection in an uncontrolled environment, such as gun muzzle flash detection. Gun propellant manufacturers use alkali salts to suppress secondary flashes ignited during the muzzle flash event. Common alkali salts are compounds based on Potassium or Sodium, with spectral emission lines around 769nm and 589nm, respectively. A narrow band filter around the Potassium emission doublet is used in this study to favor the muzzle flash signal over solar radiation. This research will demonstrate the SPAD's ability to accurately sample and reconstruct the temporal behavior of the muzzle flash in the visible wavelength under the specified imaging conditions. The reconstructed signal is clearly distinguishable from background clutter, through exploitation of flash temporal characteristics.

  15. Realization of the FPGA based TDI algorithm in digital domain for CMOS cameras

    NASA Astrophysics Data System (ADS)

    Tao, Shuping; Jin, Guang; Zhang, Xuyan; Qu, Hongsong

    2012-10-01

    In order to make the CMOS image sensors suitable for space high resolution imaging applications, a new method realizing TDI in digital domain by FPGA is proposed in this paper, which improves the imaging mode for area array CMOS sensors. The TDI algorithm accumulates the corresponding pixels of adjoining frames in digital domain, so the gray values increase by M times, where M is for the integration number, and the image's quality in signal-to-noise ratio can be improved. In addition, the TDI optimization algorithm is discussed. Firstly, the signal storage is optimized by 2 slices of external RAM, where memory depth expanding and the table tennis operation mechanism are used. Secondly, the FIFO operation mechanism reduces the reading and writing operation on memory by M×(M-1) times, It saves so much signal transfer time as is proportional to the square of integration number M2, that the frame frequency is able to increase greatly. At last, the CMOS camera based on TDI in digital domain is developed, and the algorithm is validated by experiments on it.

  16. Development and characterization of the latest X-ray SOI pixel sensor for a future astronomical mission

    NASA Astrophysics Data System (ADS)

    Nakashima, Shinya; Gando Ryu, Syukyo; Tanaka, Takaaki; Go Tsuru, Takeshi; Takeda, Ayaki; Arai, Yasuo; Imamura, Toshifumi; Ohmoto, Takafumi; Iwata, Atsushi

    2013-12-01

    We have been developing active pixel sensors based on silicon-on-insulator technology for future X-ray astronomy missions. Recently we fabricated the new prototype named “XRPIX2”, and investigated its spectroscopic performance. For comparison and evaluation of different chip designs, XRPIX2 consists of 3 pixel types: Small Pixel, Large Pixel 1, and Large Pixel 2. In Small Pixel, we found that the gains of the 68% pixels are within 1.4% of the mean value, and the energy resolution is 656 eV (FWHM) for 8 keV X-rays, which is the best spectroscopic performance in our development. The pixel pitch of Large Pixel 1 and Large Pixel 2 is twice as large as that of Small Pixel. Charge sharing events are successfully reduced for Large Pixel 1. Moreover Large Pixel 2 has multiple nodes for charge collection in a pixel. We confirmed that the multi-nodes structure is effective to increase charge collection efficiency.

  17. Giga-Pixel Lensfree Holographic Microscopy and Tomography Using Color Image Sensors

    PubMed Central

    Coskun, Ahmet F.; Ozcan, Aydogan

    2012-01-01

    We report Giga-pixel lensfree holographic microscopy and tomography using color sensor-arrays such as CMOS imagers that exhibit Bayer color filter patterns. Without physically removing these color filters coated on the sensor chip, we synthesize pixel super-resolved lensfree holograms, which are then reconstructed to achieve ∼350 nm lateral resolution, corresponding to a numerical aperture of ∼0.8, across a field-of-view of ∼20.5 mm2. This constitutes a digital image with ∼0.7 Billion effective pixels in both amplitude and phase channels (i.e., ∼1.4 Giga-pixels total). Furthermore, by changing the illumination angle (e.g., ±50°) and scanning a partially-coherent light source across two orthogonal axes, super-resolved images of the same specimen from different viewing angles are created, which are then digitally combined to synthesize tomographic images of the object. Using this dual-axis lensfree tomographic imager running on a color sensor-chip, we achieve a 3D spatial resolution of ∼0.35 µm×0.35 µm×∼2 µm, in x, y and z, respectively, creating an effective voxel size of ∼0.03 µm3 across a sample volume of ∼5 mm3, which is equivalent to >150 Billion voxels. We demonstrate the proof-of-concept of this lensfree optical tomographic microscopy platform on a color CMOS image sensor by creating tomograms of micro-particles as well as a wild-type C. elegans nematode. PMID:22984606

  18. Noise Reduction Techniques and Scaling Effects towards Photon Counting CMOS Image Sensors

    PubMed Central

    Boukhayma, Assim; Peizerat, Arnaud; Enz, Christian

    2016-01-01

    This paper presents an overview of the read noise in CMOS image sensors (CISs) based on four-transistors (4T) pixels, column-level amplification and correlated multiple sampling. Starting from the input-referred noise analytical formula, process level optimizations, device choices and circuit techniques at the pixel and column level of the readout chain are derived and discussed. The noise reduction techniques that can be implemented at the column and pixel level are verified by transient noise simulations, measurement and results from recently-published low noise CIS. We show how recently-reported process refinement, leading to the reduction of the sense node capacitance, can be combined with an optimal in-pixel source follower design to reach a sub-0.3erms- read noise at room temperature. This paper also discusses the impact of technology scaling on the CIS read noise. It shows how designers can take advantage of scaling and how the Metal-Oxide-Semiconductor (MOS) transistor gate leakage tunneling current appears as a challenging limitation. For this purpose, both simulation results of the gate leakage current and 1/f noise data reported from different foundries and technology nodes are used.

  19. Design and test of a CMOS camera with analog memory for synchronous image capture

    NASA Astrophysics Data System (ADS)

    Chapinal, Genis; Moreno, Mauricio; Bota, Sebastian A.; Hornero, Gemma; Herms, Atila

    1999-04-01

    Implementation and test results of an array for image applications with full-frame analog memory is presented. The array was implemented using 1.0 micrometers double metal, single poly n-well standard CMOS technology. The sensor consists of a 24 by 24 pixels square array and circuitry for random access readout. A pixel is composed by a phototransistor and control circuitry to regulate the exposure time to light of phototransistors. Each pixel also includes an analog memory implemented using MOSFET capacitors. The output buffer drives the capacitance of the output line. The system requires a total core area of 5 mm2. Tests were performed for each individual pixels and for the complete array. The voltage output as a function of integration time under different illumination levels shows a linear behavior. Varying the exposure time is possible to change the detector sensitivity. The fixed pattern noise was 0.58 percent of saturation level. Memory capabilities were also tested, allowing non-destructive reading and a storage time over few seconds without a significant degradation.

  20. Optical and x-ray characterization of two novel CMOS image sensors

    NASA Astrophysics Data System (ADS)

    Bohndiek, Sarah E.; Arvanitis, Costas D.; Venanzi, Cristian; Royle, Gary J.; Clark, Andy T.; Crooks, Jamie P.; Prydderch, Mark L.; Turchetta, Renato; Blue, Andrew; Speller, Robert D.

    2007-02-01

    A UK consortium (MI3) has been founded to develop advanced CMOS pixel designs for scientific applications. Vanilla, a 520x520 array of 25μm pixels benefits from flushed reset circuitry for low noise and random pixel access for region of interest (ROI) readout. OPIC, a 64x72 test structure array of 30μm digital pixels has thresholding capabilities for sparse readout at 3,700fps. Characterization is performed with both optical illumination and x-ray exposure via a scintillator. Vanilla exhibits 34+/-3e - read noise, interactive quantum efficiency of 54% at 500nm and can read a 6x6 ROI at 24,395fps. OPIC has 46+/-3e - read noise and a wide dynamic range of 65dB due to high full well capacity. Based on these characterization studies, Vanilla could be utilized in applications where demands include high spectral response and high speed region of interest readout while OPIC could be used for high speed, high dynamic range imaging.

  1. Design and Implementation of A CMOS Light Pulse Receiver Cell Array for Spatial Optical Communications

    PubMed Central

    Sarker, Md. Shakowat Zaman; Itoh, Shinya; Hamai, Moeta; Takai, Isamu; Andoh, Michinori; Yasutomi, Keita; Kawahito, Shoji

    2011-01-01

    A CMOS light pulse receiver (LPR) cell for spatial optical communications is designed and evaluated by device simulations and a prototype chip implementation. The LPR cell consists of a pinned photodiode and four transistors. It works under sub-threshold region of a MOS transistor and the source terminal voltage which responds to the logarithm of the photo current are read out with a source follower circuit. For finding the position of the light spot on the focal plane, an image pixel array is embedded on the same plane of the LPR cell array. A prototype chip with 640 × 240 image pixels and 640 × 240 LPR cells is implemented with 0.18 μm CMOS technology. A proposed model of the transient response of the LPR cell agrees with the result of the device simulations and measurements. Both imaging at 60 fps and optical communication at the carrier frequency of 1 MHz are successfully performed. The measured signal amplitude and the calculation results of photocurrents show that the spatial optical communication up to 100 m is feasible using a 10 × 10 LED array. PMID:22319398

  2. Design and implementation of a CMOS light pulse receiver cell array for spatial optical communications.

    PubMed

    Sarker, Md Shakowat Zaman; Itoh, Shinya; Hamai, Moeta; Takai, Isamu; Andoh, Michinori; Yasutomi, Keita; Kawahito, Shoji

    2011-01-01

    A CMOS light pulse receiver (LPR) cell for spatial optical communications is designed and evaluated by device simulations and a prototype chip implementation. The LPR cell consists of a pinned photodiode and four transistors. It works under sub-threshold region of a MOS transistor and the source terminal voltage which responds to the logarithm of the photo current are read out with a source follower circuit. For finding the position of the light spot on the focal plane, an image pixel array is embedded on the same plane of the LPR cell array. A prototype chip with 640 × 240 image pixels and 640 × 240 LPR cells is implemented with 0.18 μm CMOS technology. A proposed model of the transient response of the LPR cell agrees with the result of the device simulations and measurements. Both imaging at 60 fps and optical communication at the carrier frequency of 1 MHz are successfully performed. The measured signal amplitude and the calculation results of photocurrents show that the spatial optical communication up to 100 m is feasible using a 10 × 10 LED array.

  3. Advances in CMOS Solid-state Photomultipliers for Scintillation Detector Applications

    PubMed Central

    Christian, James F.; Stapels, Christopher J.; Johnson, Erik B.; McClish, Mickel; Dokhale, Purushotthom; Shah, Kanai S.; Mukhopadhyay, Sharmistha; Chapman, Eric; Augustine, Frank L.

    2014-01-01

    Solid-state photomultipliers (SSPMs) are a compact, lightweight, potentially low-cost alternative to a photomultiplier tube for a variety of scintillation detector applications, including digital-dosimeter and medical-imaging applications. Manufacturing SSPMs with a commercial CMOS process provides the ability for rapid prototyping, and facilitates production to reduce the cost. RMD designs CMOS SSPM devices that are fabricated by commercial foundries. This work describes the characterization and performance of these devices for scintillation detector applications. This work also describes the terms contributing to device noise in terms of the excess noise of the SSPM, the binomial statistics governing the number of pixels triggered by a scintillation event, and the background, or thermal, count rate. The fluctuations associated with these terms limit the resolution of the signal pulse amplitude. We explore the use of pixel-level signal conditioning, and characterize the performance of a prototype SSPM device that preserves the digital nature of the signal. In addition, we explore designs of position-sensitive SSPM detectors for medical imaging applications, and characterize their performance. PMID:25540471

  4. Design and TCAD simulation of planar p-on-n active-edge pixel sensors for the next generation of FELs

    NASA Astrophysics Data System (ADS)

    Dalla Betta, G.-F.; Batignani, G.; Benkechkache, M. A.; Bettarini, S.; Casarosa, G.; Comotti, D.; Fabris, L.; Forti, F.; Grassi, M.; Latreche, S.; Lodola, L.; Malcovati, P.; Manghisoni, M.; Mendicino, R.; Morsani, F.; Paladino, A.; Pancheri, L.; Paoloni, E.; Ratti, L.; Re, V.; Rizzo, G.; Traversi, G.; Vacchi, C.; Verzellesi, G.; Xu, H.

    2016-07-01

    We report on the design and TCAD simulations of planar p-on-n sensors with active edge aimed at a four-side buttable X-ray detector module for future FEL applications. Edge terminations with different number of guard rings were designed to find the best trade-off between breakdown voltage and border gap size. The methodology of the sensor design, the optimization of the most relevant parameters to maximize the breakdown voltage and the final layout are described.

  5. Ultra-low power high-dynamic range color pixel embedding RGB to r-g chromaticity transformation

    NASA Astrophysics Data System (ADS)

    Lecca, Michela; Gasparini, Leonardo; Gottardi, Massimo

    2014-05-01

    This work describes a novel color pixel topology that converts the three chromatic components from the standard RGB space into the normalized r-g chromaticity space. This conversion is implemented with high-dynamic range and with no dc power consumption, and the auto-exposure capability of the sensor ensures to capture a high quality chromatic signal, even in presence of very bright illuminants or in the darkness. The pixel is intended to become the basic building block of a CMOS color vision sensor, targeted to ultra-low power applications for mobile devices, such as human machine interfaces, gesture recognition, face detection. The experiments show that significant improvements of the proposed pixel with respect to standard cameras in terms of energy saving and accuracy on data acquisition. An application to skin color-based description is presented.

  6. A 15 × 15 single photon avalanche diode sensor featuring breakdown pixels extraction architecture for efficient data readout

    NASA Astrophysics Data System (ADS)

    Yang, Xiao; Zhu, Hongbo; Nakura, Toru; Iizuka, Tetsuya; Asada, Kunihiro

    2016-04-01

    This paper proposes a breakdown pixels extraction architecture for single photon avalanche diode (SPAD) based faint light detection systems. The proposed extraction circuit detects the breakdown pixels and only their addresses are readout. Therefore, under the faint light environment, this SPAD-based sensor significantly improves the data readout efficiency. In addition, since the readout sequence is 4× faster than that of the conventional architecture in the dark condition, the proposed system does not need an independent on-chip event detection circuit that consumes additional area and power. A test-of-concept chip with a 15 × 15 SPAD pixels array was fabricated in a 0.18 µm 1P5M standard CMOS process and pinhole diffraction patterns were successfully captured thanks to the high sensitivity of the SPAD sensor. Under the faint light condition, a high-speed readout is verified by measurement and the robustness of the proposed architecture is successfully demonstrated.

  7. Pixelated filters for spatial imaging

    NASA Astrophysics Data System (ADS)

    Mathieu, Karine; Lequime, Michel; Lumeau, Julien; Abel-Tiberini, Laetitia; Savin De Larclause, Isabelle; Berthon, Jacques

    2015-10-01

    Small satellites are often used by spatial agencies to meet scientific spatial mission requirements. Their payloads are composed of various instruments collecting an increasing amount of data, as well as respecting the growing constraints relative to volume and mass; So small-sized integrated camera have taken a favored place among these instruments. To ensure scene specific color information sensing, pixelated filters seem to be more attractive than filter wheels. The work presented here, in collaboration with Institut Fresnel, deals with the manufacturing of this kind of component, based on thin film technologies and photolithography processes. CCD detectors with a pixel pitch about 30 μm were considered. In the configuration where the matrix filters are positioned the closest to the detector, the matrix filters are composed of 2x2 macro pixels (e.g. 4 filters). These 4 filters have a bandwidth about 40 nm and are respectively centered at 550, 700, 770 and 840 nm with a specific rejection rate defined on the visible spectral range [500 - 900 nm]. After an intense design step, 4 thin-film structures have been elaborated with a maximum thickness of 5 μm. A run of tests has allowed us to choose the optimal micro-structuration parameters. The 100x100 matrix filters prototypes have been successfully manufactured with lift-off and ion assisted deposition processes. High spatial and spectral characterization, with a dedicated metrology bench, showed that initial specifications and simulations were globally met. These excellent performances knock down the technological barriers for high-end integrated specific multi spectral imaging.

  8. A 64 single photon avalanche diode array in 0.18 µm CMOS standard technology with versatile quenching circuit for quick prototyping

    NASA Astrophysics Data System (ADS)

    Uhring, Wilfried; Le Normand, Jean-Pierre; Zint, Virginie; Dumas, Norbert; Dadouche, Foudil; Malasse, Imane; Scholz, Jeremy

    2012-04-01

    Several works have demonstrated the successfully integration of Single-photon avalanche photodiodes (SPADs) operating in Geiger mode in a standard CMOS circuit for the last 10 years. These devices offer an exceptional temporal resolution as well as a very good optical sensitivity. Nevertheless, it is difficult to predict the expected performances of such a device. Indeed, for a similar structure of SPAD, some parameter values can differ by two orders of magnitude from a technology to another. We proposed here a procedure to identify in just one or two runs the optimal structure of SPAD available for a given technology. A circuit with an array of 64 SPAD has been realized in the Tower-Jazz 0.18 μm CMOS image sensor process. It encompasses an array of 8 different structures of SPAD reproduced in 8 diameters in the range from 5 μm up to 40 μm. According to the SPAD structures, efficient shallow trench insulator and/or P-Well guard ring are used for preventing edge breakdown. Low dark count rate of about 100 Hz are expected thanks to the use of buried n-well layer and a high resistivity substrate. Each photodiode is embedded in a pixel which includes a versatile quenching circuitry and an analog output of its cathode voltage. The quenching system is configurable in four operation modes; the SPAD is disabled, the quenching is completely passive, the reset of the photodiode is active and the quenching is fully active. The architecture of the array makes possible the characterization of every single photodiode individually. The parameters to be measured for a SPAD are the breakdown avalanche voltage, the dark count rate, the dead time, the timing jitter, the photon detection probability and the after-pulsing rate.

  9. CMOS image sensor for the analysis of fast-moving luminous objects

    NASA Astrophysics Data System (ADS)

    Bellach, Benaissa; Lamalle, Bernard; Lew Yan Voon, Lew F.; Cathebras, Guy

    2003-07-01

    We present an image sensor dedicated to the analysis of fast moving luminous objects. The circuit is fabricated in standard 0.6 μm CMOS technology with an image sensing array of 64 x 64 pixels. Its working principle is as follows: An electronic unit integrated at the pixel level measures the elapsed time since the beginning of the acquisition till the passage of the luminous object in front of the pixel under consideration. This value that corresponds to a number of clock cycles is stored in a 4-bit memory at the pixel level and translated into a gray level, the brighter ones corresponding to the shortest time. The result is a 16-gray level image that represents the trajectory and direction of motion of the object. Knowing the frequency of the clock, the distance between the pixels and the difference in gray levels of the pixels, the speed of the moving object can be determined. Alternatively, the 16-gray level image can be considered as a superposition of 16 one gray level images that represent the 16 positions of the moving object at 16 different time instances in the course of its displacement. The frequency of the clock can be as high as 20 MHz for the analysis of very high speed phenomena. The working principle and the architecture of the image sensor will be described in details in this paper. Moreover, the results of the tests carried out on the circuit, namely the analysis of the movement of the spot on an oscilloscope screen, will also be reported and the potential applications of the image sensor discussed.

  10. Characterization and reliability of CMOS microstructures

    NASA Astrophysics Data System (ADS)

    Fedder, Gary K.; Blanton, Ronald D. S.

    1999-08-01

    This paper provides an overview of high-aspect-ratio CMOS micromachining, focusing on materials characterization, reliability, and fault analysis. Composite microstrutural beam widths and gaps down to 1.2 micrometers are etched out of conventional CMOS dielectric, aluminum, and gate-polysilicon thin films using post-CMOS dry etching for both structural sidewall definition and for release from the substrate. Differences in stress between the multiple metal and dielectric layers cause vertical stress gradients and curl, while misalignment between layers causes lateral stress gradients and curl. Cracking is induced in a resonant fatigue structures at 620 MPa of repetitive stress after over 50 million cycles. Beams have withstood over 1.3 billion cycles at 124 MPa stress levels induced by electrostatic actuation. Failures due to process defects are classified according to the geometrical features of the defective structures. Relative probability of occurrence of each defect type is extracted from the process simulation results.

  11. Nanopore-CMOS Interfaces for DNA Sequencing.

    PubMed

    Magierowski, Sebastian; Huang, Yiyun; Wang, Chengjie; Ghafar-Zadeh, Ebrahim

    2016-01-01

    DNA sequencers based on nanopore sensors present an opportunity for a significant break from the template-based incumbents of the last forty years. Key advantages ushered by nanopore technology include a simplified chemistry and the ability to interface to CMOS technology. The latter opportunity offers substantial promise for improvement in sequencing speed, size and cost. This paper reviews existing and emerging means of interfacing nanopores to CMOS technology with an emphasis on massively-arrayed structures. It presents this in the context of incumbent DNA sequencing techniques, reviews and quantifies nanopore characteristics and models and presents CMOS circuit methods for the amplification of low-current nanopore signals in such interfaces. PMID:27509529

  12. Nanopore-CMOS Interfaces for DNA Sequencing

    PubMed Central

    Magierowski, Sebastian; Huang, Yiyun; Wang, Chengjie; Ghafar-Zadeh, Ebrahim

    2016-01-01

    DNA sequencers based on nanopore sensors present an opportunity for a significant break from the template-based incumbents of the last forty years. Key advantages ushered by nanopore technology include a simplified chemistry and the ability to interface to CMOS technology. The latter opportunity offers substantial promise for improvement in sequencing speed, size and cost. This paper reviews existing and emerging means of interfacing nanopores to CMOS technology with an emphasis on massively-arrayed structures. It presents this in the context of incumbent DNA sequencing techniques, reviews and quantifies nanopore characteristics and models and presents CMOS circuit methods for the amplification of low-current nanopore signals in such interfaces. PMID:27509529

  13. High-temperature Complementary Metal Oxide Semiconductors (CMOS)

    NASA Technical Reports Server (NTRS)

    Mcbrayer, J. D.

    1981-01-01

    The results of an investigation into the possibility of using complementary metal oxide semiconductor (CMOS) technology for high temperature electronics are presented. A CMOS test chip was specifically developed as the test bed. This test chip incorporates CMOS transistors that have no gate protection diodes; these diodes are the major cause of leakage in commercial devices.

  14. Low power, CMOS digital autocorrelator spectrometer for spaceborne applications

    NASA Technical Reports Server (NTRS)

    Chandra, Kumar; Wilson, William J.

    1992-01-01

    A 128-channel digital autocorrelator spectrometer using four 32 channel low power CMOS correlator chips was built and tested. The CMOS correlator chip uses a 2-bit multiplication algorithm and a full-custom CMOS VLSI design to achieve low DC power consumption. The digital autocorrelator spectrometer has a 20 MHz band width, and the total DC power requirement is 6 Watts.

  15. Resistor Extends Life Of Battery In Clocked CMOS Circuit

    NASA Technical Reports Server (NTRS)

    Wells, George H., Jr.

    1991-01-01

    Addition of fixed resistor between battery and clocked complementary metal oxide/semiconductor (CMOS) circuit reduces current drawn from battery. Basic idea to minimize current drawn from battery by operating CMOS circuit at lowest possible current consistent with use of simple, fixed off-the-shelf components. Prolongs lives of batteries in such low-power CMOS circuits as watches and calculators.

  16. Intercomparison of EMCCD- and sCMOS-based imaging spectrometers for biomedical applications in low-light conditions

    NASA Astrophysics Data System (ADS)

    Hernandez-Palacios, J.; Randeberg, L. L.

    2012-03-01

    Hyperspectral imaging provides means for characterizing large biological samples with microscopic spatial resolution and a narrow spectral sampling interval. However, this approach requires having a measurable light signal in each spectral band. Overcoming the limitations imposed by working with biological samples requires the use of a highly sensitive sensor to detect weak signals. For this study we have built and compared the performance of two imaging spectrometers using optimized for low light environments: an electron-multiplying CCD (EMCCD) and a scientific CMOS (sCMOS). Both systems have been designed to lower the risk of damaging photosensitive samples, delay the bleaching of fluorophores and detect weak fluorescence signals. The cameras work within the VNIR spectral region (400 nm - 900 nm) with a spectral sampling lower than 4 nm. The produced images have scene pixel sizes smaller than 25 μm and a field of view larger than 25 mm. The systems have been tested side to side measuring the diffusion front of a fluorescent tag in samples of porcine skin in challenging light conditions. The study aimed to show the advantages and limitations of each approach. Preliminary results show good performance of the EMCCD for fluorescence applications, whereas more experimental results are needed to be able to conclude on the performance of the sCMOS sensor. However, the sCMOS appears promising for imaging scenes with high dynamics in low light settings.

  17. Development activities of a CdTe/CdZnTe pixel detector for gamma-ray spectrometry with imaging and polarimetry capability in astrophysics

    NASA Astrophysics Data System (ADS)

    Gálvez, J. L.; Hernanz, M.; Álvarez, J. M.; Álvarez, L.; La Torre, M.; Caroli, E.; Lozano, M.; Pellegrini, G.; Ullán, M.; Cabruja, E.; Martínez, R.; Chmeissani, M.; Puigdengoles, C.

    2013-05-01

    In the last few years we have been working on feasibility studies of future instruments in the gamma-ray range, from several keV up to a few MeV, in collaboration with other research institutes. High sensitivities are essential to perform detailed studies of cosmic explosions and cosmic accelerators, e.g., Supernovae, Classical Novae, Supernova Remnants (SNRs), Gamma-Ray Bursts (GRBs), Pulsars, Active Galactic Nuclei (AGN).Cadmium Telluride (CdTe) and Cadmium Zinc Telluride (CdZnTe) are very attractive materials for gamma-ray detection, since they have already demonstrated their great performance onboard current space missions, such as IBIS/INTEGRAL and BAT/SWIFT, and future projects like ASIM onboard the ISS. However, the energy coverage of these instruments is limited up to a few hundred keV, and there has not been yet a dedicated instrument for polarimetry.Our research and development activities aim to study a gamma-ray imaging spectrometer in the MeV range based on CdTe detectors, suited either for the focal plane of a focusing mission or as a calorimeter for a Compton camera. In addition, our undergoing detector design is proposed as the baseline for the payload of a balloon-borne experiment dedicated to hard X- and soft gamma-ray polarimetry, currently under study and called CμSP (CZT μ-Spectrometer Polarimeter). Other research institutes such as INAF-IASF, DTU Space, LIP, INEM/CNR, CEA, are involved in this proposal. We will report on the main features of the prototype we are developing at the Institute of Space Sciences, a gamma-ray detector with imaging and polarimetry capabilities in order to fulfil the combined requirement of high detection efficiency with good spatial and energy resolution driven by the science.

  18. End-of-fabrication CMOS process monitor

    NASA Technical Reports Server (NTRS)

    Buehler, M. G.; Allen, R. A.; Blaes, B. R.; Hannaman, D. J.; Lieneweg, U.; Lin, Y.-S.; Sayah, H. R.

    1990-01-01

    A set of test 'modules' for verifying the quality of a complementary metal oxide semiconductor (CMOS) process at the end of the wafer fabrication is documented. By electrical testing of specific structures, over thirty parameters are collected characterizing interconnects, dielectrics, contacts, transistors, and inverters. Each test module contains a specification of its purpose, the layout of the test structure, the test procedures, the data reduction algorithms, and exemplary results obtained from 3-, 2-, or 1.6-micrometer CMOS/bulk processes. The document is intended to establish standard process qualification procedures for Application Specific Integrated Circuits (ASIC's).

  19. Optical addressing technique for a CMOS RAM

    NASA Technical Reports Server (NTRS)

    Wu, W. H.; Bergman, L. A.; Allen, R. A.; Johnston, A. R.

    1988-01-01

    Progress on optically addressing a CMOS RAM for a feasibility demonstration of free space optical interconnection is reported in this paper. The optical RAM chip has been fabricated and functional testing is in progress. Initial results seem promising. New design and SPICE simulation of optical gate cell (OGC) circuits have been carried out to correct the slow fall time of the 'weak pull down' OGC, which has been characterized experimentally. Methods of reducing the response times of the photodiodes and the associated circuits are discussed. Even with the current photodiode, it appears that an OGC can be designed with a performance that is compatible with a CMOS circuit such as the RAM.

  20. CMOS Image Sensor with a Built-in Lane Detector.

    PubMed

    Hsiao, Pei-Yung; Cheng, Hsien-Chein; Huang, Shih-Shinh; Fu, Li-Chen

    2009-01-01

    This work develops a new current-mode mixed signal Complementary Metal-Oxide-Semiconductor (CMOS) imager, which can capture images and simultaneously produce vehicle lane maps. The adopted lane detection algorithm, which was modified to be compatible with hardware requirements, can achieve a high recognition rate of up to approximately 96% under various weather conditions. Instead of a Personal Computer (PC) based system or embedded platform system equipped with expensive high performance chip of Reduced Instruction Set Computer (RISC) or Digital Signal Processor (DSP), the proposed imager, without extra Analog to Digital Converter (ADC) circuits to transform signals, is a compact, lower cost key-component chip. It is also an innovative component device that can be integrated into intelligent automotive lane departure systems. The chip size is 2,191.4 × 2,389.8 μm, and the package uses 40 pin Dual-In-Package (DIP). The pixel cell size is 18.45 × 21.8 μm and the core size of photodiode is 12.45 × 9.6 μm; the resulting fill factor is 29.7%. PMID:22573983