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Sample records for active pixel cmos

  1. CMOS Active Pixel Sensor Technology and Reliability Characterization Methodology

    NASA Technical Reports Server (NTRS)

    Chen, Yuan; Guertin, Steven M.; Pain, Bedabrata; Kayaii, Sammy

    2006-01-01

    This paper describes the technology, design features and reliability characterization methodology of a CMOS Active Pixel Sensor. Both overall chip reliability and pixel reliability are projected for the imagers.

  2. CMOS Active-Pixel Image Sensor With Simple Floating Gates

    NASA Technical Reports Server (NTRS)

    Fossum, Eric R.; Nakamura, Junichi; Kemeny, Sabrina E.

    1996-01-01

    Experimental complementary metal-oxide/semiconductor (CMOS) active-pixel image sensor integrated circuit features simple floating-gate structure, with metal-oxide/semiconductor field-effect transistor (MOSFET) as active circuit element in each pixel. Provides flexibility of readout modes, no kTC noise, and relatively simple structure suitable for high-density arrays. Features desirable for "smart sensor" applications.

  3. Radiation tolerance of CMOS monolithic active pixel sensors with self-biased pixels

    NASA Astrophysics Data System (ADS)

    Deveaux, M.; Amar-Youcef, S.; Besson, A.; Claus, G.; Colledani, C.; Dorokhov, M.; Dritsa, C.; Dulinski, W.; Fröhlich, I.; Goffe, M.; Grandjean, D.; Heini, S.; Himmi, A.; Hu, C.; Jaaskelainen, K.; Müntz, C.; Shabetai, A.; Stroth, J.; Szelezniak, M.; Valin, I.; Winter, M.

    2010-12-01

    CMOS monolithic active pixel sensors (MAPS) are proposed as a technology for various vertex detectors in nuclear and particle physics. We discuss the mechanisms of ionizing radiation damage on MAPS hosting the dead time free, so-called self bias pixel. Moreover, we introduce radiation hardened sensor designs which allow operating detectors after exposing them to irradiation doses above 1 Mrad.

  4. CMOS VLSI Active-Pixel Sensor for Tracking

    NASA Technical Reports Server (NTRS)

    Pain, Bedabrata; Sun, Chao; Yang, Guang; Heynssens, Julie

    2004-01-01

    An architecture for a proposed active-pixel sensor (APS) and a design to implement the architecture in a complementary metal oxide semiconductor (CMOS) very-large-scale integrated (VLSI) circuit provide for some advanced features that are expected to be especially desirable for tracking pointlike features of stars. The architecture would also make this APS suitable for robotic- vision and general pointing and tracking applications. CMOS imagers in general are well suited for pointing and tracking because they can be configured for random access to selected pixels and to provide readout from windows of interest within their fields of view. However, until now, the architectures of CMOS imagers have not supported multiwindow operation or low-noise data collection. Moreover, smearing and motion artifacts in collected images have made prior CMOS imagers unsuitable for tracking applications. The proposed CMOS imager (see figure) would include an array of 1,024 by 1,024 pixels containing high-performance photodiode-based APS circuitry. The pixel pitch would be 9 m. The operations of the pixel circuits would be sequenced and otherwise controlled by an on-chip timing and control block, which would enable the collection of image data, during a single frame period, from either the full frame (that is, all 1,024 1,024 pixels) or from within as many as 8 different arbitrarily placed windows as large as 8 by 8 pixels each. A typical prior CMOS APS operates in a row-at-a-time ( grolling-shutter h) readout mode, which gives rise to exposure skew. In contrast, the proposed APS would operate in a sample-first/readlater mode, suppressing rolling-shutter effects. In this mode, the analog readout signals from the pixels corresponding to the windows of the interest (which windows, in the star-tracking application, would presumably contain guide stars) would be sampled rapidly by routing them through a programmable diagonal switch array to an on-chip parallel analog memory array. The

  5. A CMOS Active Pixel Sensor for Charged Particle Detection

    SciTech Connect

    Matis, Howard S.; Bieser, Fred; Kleinfelder, Stuart; Rai, Gulshan; Retiere, Fabrice; Ritter, Hans George; Singh, Kunal; Wurzel, Samuel E.; Wieman, Howard; Yamamoto, Eugene

    2002-12-02

    Active Pixel Sensor (APS) technology has shown promise for next-generation vertex detectors. This paper discusses the design and testing of two generations of APS chips. Both are arrays of 128 by 128 pixels, each 20 by 20 {micro}m. Each array is divided into sub-arrays in which different sensor structures (4 in the first version and 16 in the second) and/or readout circuits are employed. Measurements of several of these structures under Fe{sup 55} exposure are reported. The sensors have also been irradiated by 55 MeV protons to test for radiation damage. The radiation increased the noise and reduced the signal. The noise can be explained by shot noise from the increased leakage current and the reduction in signal is due to charge being trapped in the epi layer. Nevertheless, the radiation effect is small for the expected exposures at RHIC and RHIC II. Finally, we describe our concept for mechanically supporting a thin silicon wafer in an actual detector.

  6. Integrated imaging sensor systems with CMOS active pixel sensor technology

    NASA Technical Reports Server (NTRS)

    Yang, G.; Cunningham, T.; Ortiz, M.; Heynssens, J.; Sun, C.; Hancock, B.; Seshadri, S.; Wrigley, C.; McCarty, K.; Pain, B.

    2002-01-01

    This paper discusses common approaches to CMOS APS technology, as well as specific results on the five-wire programmable digital camera-on-a-chip developed at JPL. The paper also reports recent research in the design, operation, and performance of APS imagers for several imager applications.

  7. Proof of principle study of the use of a CMOS active pixel sensor for proton radiography

    SciTech Connect

    Seco, Joao; Depauw, Nicolas

    2011-02-15

    Purpose: Proof of principle study of the use of a CMOS active pixel sensor (APS) in producing proton radiographic images using the proton beam at the Massachusetts General Hospital (MGH). Methods: A CMOS APS, previously tested for use in s-ray radiation therapy applications, was used for proton beam radiographic imaging at the MGH. Two different setups were used as a proof of principle that CMOS can be used as proton imaging device: (i) a pen with two metal screws to assess spatial resolution of the CMOS and (ii) a phantom with lung tissue, bone tissue, and water to assess tissue contrast of the CMOS. The sensor was then traversed by a double scattered monoenergetic proton beam at 117 MeV, and the energy deposition inside the detector was recorded to assess its energy response. Conventional x-ray images with similar setup at voltages of 70 kVp and proton images using commercial Gafchromic EBT 2 and Kodak X-Omat V films were also taken for comparison purposes. Results: Images were successfully acquired and compared to x-ray kVp and proton EBT2/X-Omat film images. The spatial resolution of the CMOS detector image is subjectively comparable to the EBT2 and Kodak X-Omat V film images obtained at the same object-detector distance. X-rays have apparent higher spatial resolution than the CMOS. However, further studies with different commercial films using proton beam irradiation demonstrate that the distance of the detector to the object is important to the amount of proton scatter contributing to the proton image. Proton images obtained with films at different distances from the source indicate that proton scatter significantly affects the CMOS image quality. Conclusion: Proton radiographic images were successfully acquired at MGH using a CMOS active pixel sensor detector. The CMOS demonstrated spatial resolution subjectively comparable to films at the same object-detector distance. Further work will be done in order to establish the spatial and energy resolution of the

  8. A CMOS Energy Harvesting and Imaging (EHI) Active Pixel Sensor (APS) Imager for Retinal Prosthesis.

    PubMed

    Ay, S U

    2011-12-01

    A CMOS image sensor capable of imaging and energy harvesting on same focal plane is presented for retinal prosthesis. The energy harvesting and imaging (EHI) active pixel sensor (APS) imager was designed, fabricated, and tested in a standard 0.5 μm CMOS process. It has 54 × 50 array of 21 × 21 μm(2) EHI pixels, 10-bit supply boosted (SB) SAR ADC, and charge pump circuits consuming only 14.25 μW from 1.2 V and running at 7.4 frames per second. The supply boosting technique (SBT) is used in an analog signal chain of the EHI imager. Harvested solar energy on focal plane is stored on an off-chip capacitor with the help of a charge pump circuit with better than 70% efficiency. Energy harvesting efficiency of the EHI pixel was measured at different light levels. It was 9.4% while producing 0.41 V open circuit voltage. The EHI imager delivers 3.35 μW of power was delivered to a resistive load at maximum power point operation. The measured pixel array figure of merit (FoM) was 1.32 pW/frame/pixel while imager figure of merit (iFoM) including whole chip power consumption was 696 fJ/pixel/code for the EHI imager.

  9. Performance of a novel wafer scale CMOS active pixel sensor for bio-medical imaging

    NASA Astrophysics Data System (ADS)

    Esposito, M.; Anaxagoras, T.; Konstantinidis, A. C.; Zheng, Y.; Speller, R. D.; Evans, P. M.; Allinson, N. M.; Wells, K.

    2014-07-01

    Recently CMOS active pixels sensors (APSs) have become a valuable alternative to amorphous silicon and selenium flat panel imagers (FPIs) in bio-medical imaging applications. CMOS APSs can now be scaled up to the standard 20 cm diameter wafer size by means of a reticle stitching block process. However, despite wafer scale CMOS APS being monolithic, sources of non-uniformity of response and regional variations can persist representing a significant challenge for wafer scale sensor response. Non-uniformity of stitched sensors can arise from a number of factors related to the manufacturing process, including variation of amplification, variation between readout components, wafer defects and process variations across the wafer due to manufacturing processes. This paper reports on an investigation into the spatial non-uniformity and regional variations of a wafer scale stitched CMOS APS. For the first time a per-pixel analysis of the electro-optical performance of a wafer CMOS APS is presented, to address inhomogeneity issues arising from the stitching techniques used to manufacture wafer scale sensors. A complete model of the signal generation in the pixel array has been provided and proved capable of accounting for noise and gain variations across the pixel array. This novel analysis leads to readout noise and conversion gain being evaluated at pixel level, stitching block level and in regions of interest, resulting in a coefficient of variation ⩽1.9%. The uniformity of the image quality performance has been further investigated in a typical x-ray application, i.e. mammography, showing a uniformity in terms of CNR among the highest when compared with mammography detectors commonly used in clinical practice. Finally, in order to compare the detection capability of this novel APS with the technology currently used (i.e. FPIs), theoretical evaluation of the detection quantum efficiency (DQE) at zero-frequency has been performed, resulting in a higher DQE for this

  10. Performance of a novel wafer scale CMOS active pixel sensor for bio-medical imaging.

    PubMed

    Esposito, M; Anaxagoras, T; Konstantinidis, A C; Zheng, Y; Speller, R D; Evans, P M; Allinson, N M; Wells, K

    2014-07-07

    Recently CMOS active pixels sensors (APSs) have become a valuable alternative to amorphous silicon and selenium flat panel imagers (FPIs) in bio-medical imaging applications. CMOS APSs can now be scaled up to the standard 20 cm diameter wafer size by means of a reticle stitching block process. However, despite wafer scale CMOS APS being monolithic, sources of non-uniformity of response and regional variations can persist representing a significant challenge for wafer scale sensor response. Non-uniformity of stitched sensors can arise from a number of factors related to the manufacturing process, including variation of amplification, variation between readout components, wafer defects and process variations across the wafer due to manufacturing processes. This paper reports on an investigation into the spatial non-uniformity and regional variations of a wafer scale stitched CMOS APS. For the first time a per-pixel analysis of the electro-optical performance of a wafer CMOS APS is presented, to address inhomogeneity issues arising from the stitching techniques used to manufacture wafer scale sensors. A complete model of the signal generation in the pixel array has been provided and proved capable of accounting for noise and gain variations across the pixel array. This novel analysis leads to readout noise and conversion gain being evaluated at pixel level, stitching block level and in regions of interest, resulting in a coefficient of variation ⩽1.9%. The uniformity of the image quality performance has been further investigated in a typical x-ray application, i.e. mammography, showing a uniformity in terms of CNR among the highest when compared with mammography detectors commonly used in clinical practice. Finally, in order to compare the detection capability of this novel APS with the technology currently used (i.e. FPIs), theoretical evaluation of the detection quantum efficiency (DQE) at zero-frequency has been performed, resulting in a higher DQE for this

  11. Development of a new electronic personal neutron dosemeter using a CMOS active pixel sensor.

    PubMed

    Trocmé, M; Higueret, S; Husson, D; Nourreddine, A; Lê, T D

    2007-01-01

    A CMOS active pixel sensor, originally designed for the tracking of minimum ionising charged particles in high-energy physics, has been recently used for the detection of fast neutrons. Data were taken at the IRSN Cadarache facility with a (241)Am-Be ISO source and a polyethylene radiator. A high-intrinsic efficiency (1.2 x 10(-3)) has been obtained. It is in good agreement with both calculations and a MCNPX Monte Carlo simulation. This experiment paves the way for a fully electronic personal neutron dosemeter.

  12. Development of CMOS Active Pixel Image Sensors for Low Cost Commercial Applications

    NASA Technical Reports Server (NTRS)

    Fossum, E.; Gee, R.; Kemeny, S.; Kim, Q.; Mendis, S.; Nakamura, J.; Nixon, R.; Ortiz, M.; Pain, B.; Zhou, Z.; Ackland, B.; Dickinson, A.; Eid, E.; Inglis, D.

    1994-01-01

    This paper describes ongoing research and development of CMOS active pixel image sensors for low cost commercial applications. A number of sensor designs have been fabricated and tested in both p-well and n-well technologies. Major elements in the development of the sensor include on-chip analog signal processing circuits for the reduction of fixed pattern noise, on-chip timing and control circuits and on-chip analog-to-digital conversion (ADC). Recent results and continuing efforts in these areas will be presented.

  13. CMOS digital pixel sensors: technology and applications

    NASA Astrophysics Data System (ADS)

    Skorka, Orit; Joseph, Dileepan

    2014-04-01

    CMOS active pixel sensor technology, which is widely used these days for digital imaging, is based on analog pixels. Transition to digital pixel sensors can boost signal-to-noise ratios and enhance image quality, but can increase pixel area to dimensions that are impractical for the high-volume market of consumer electronic devices. There are two main approaches to digital pixel design. The first uses digitization methods that largely rely on photodetector properties and so are unique to imaging. The second is based on adaptation of a classical analog-to-digital converter (ADC) for in-pixel data conversion. Imaging systems for medical, industrial, and security applications are emerging lower-volume markets that can benefit from these in-pixel ADCs. With these applications, larger pixels are typically acceptable, and imaging may be done in invisible spectral bands.

  14. Improved Design of Active Pixel CMOS Sensors for Charged Particle Detection

    SciTech Connect

    Deptuch, Grzegorz

    2007-11-12

    The Department of Energy (DOE) nuclear physics program requires developments in detector instrumentation electronics with improved energy, position and timing resolution, sensitivity, rate capability, stability, dynamic range, and background suppression. The current Phase-I project was focused on analysis of standard-CMOS photogate Active Pixel Sensors (APS) as an efficient solution to this challenge. The advantages of the CMOS APS over traditional hybrid approaches (i.e., separate detection regions bump-bonded to readout circuits) include greatly reduced cost, low power and the potential for vastly larger pixel counts and densities. However, challenges remain in terms of the signal-to-noise ratio (SNR) and readout speed (currently on the order of milliseconds), which is the major problem for this technology. Recent work has shown that the long readout time for photogate APS is due to the presence of (interface) traps at the semiconductor-oxide interface. This Phase-I work yielded useful results in two areas: (a) Advanced three-dimensional (3D) physics-based simulation models and simulation-based analysis of the impact of interface trap density on the transient charge collection characteristics of existing APS structures; and (b) Preliminary analysis of the feasibility of an improved photogate pixel structure (i.e., new APS design) with an induced electric field under the charge collecting electrode to enhance charge collection. Significant effort was dedicated in Phase-I to the critical task of implementing accurate interface trap models in CFDRC's NanoTCAD 3D semiconductor device-physics simulator. This resulted in validation of the new NanoTCAD models and simulation results against experimental (published) data, within the margin of uncertainty associated with obtaining device geometry, material properties, and experimentation details. Analyses of the new, proposed photogate APS design demonstrated several promising trends.

  15. Three-dimensional cascaded system analysis of a 50 µm pixel pitch wafer-scale CMOS active pixel sensor x-ray detector for digital breast tomosynthesis

    NASA Astrophysics Data System (ADS)

    Zhao, C.; Vassiljev, N.; Konstantinidis, A. C.; Speller, R. D.; Kanicki, J.

    2017-03-01

    High-resolution, low-noise x-ray detectors based on the complementary metal-oxide-semiconductor (CMOS) active pixel sensor (APS) technology have been developed and proposed for digital breast tomosynthesis (DBT). In this study, we evaluated the three-dimensional (3D) imaging performance of a 50 µm pixel pitch CMOS APS x-ray detector named DynAMITe (Dynamic Range Adjustable for Medical Imaging Technology). The two-dimensional (2D) angle-dependent modulation transfer function (MTF), normalized noise power spectrum (NNPS), and detective quantum efficiency (DQE) were experimentally characterized and modeled using the cascaded system analysis at oblique incident angles up to 30°. The cascaded system model was extended to the 3D spatial frequency space in combination with the filtered back-projection (FBP) reconstruction method to calculate the 3D and in-plane MTF, NNPS and DQE parameters. The results demonstrate that the beam obliquity blurs the 2D MTF and DQE in the high spatial frequency range. However, this effect can be eliminated after FBP image reconstruction. In addition, impacts of the image acquisition geometry and detector parameters were evaluated using the 3D cascaded system analysis for DBT. The result shows that a wider projection angle range (e.g.  ±30°) improves the low spatial frequency (below 5 mm‑1) performance of the CMOS APS detector. In addition, to maintain a high spatial resolution for DBT, a focal spot size of smaller than 0.3 mm should be used. Theoretical analysis suggests that a pixelated scintillator in combination with the 50 µm pixel pitch CMOS APS detector could further improve the 3D image resolution. Finally, the 3D imaging performance of the CMOS APS and an indirect amorphous silicon (a-Si:H) thin-film transistor (TFT) passive pixel sensor (PPS) detector was simulated and compared.

  16. Three-dimensional cascaded system analysis of a 50 µm pixel pitch wafer-scale CMOS active pixel sensor x-ray detector for digital breast tomosynthesis.

    PubMed

    Zhao, C; Vassiljev, N; Konstantinidis, A C; Speller, R D; Kanicki, J

    2017-03-07

    High-resolution, low-noise x-ray detectors based on the complementary metal-oxide-semiconductor (CMOS) active pixel sensor (APS) technology have been developed and proposed for digital breast tomosynthesis (DBT). In this study, we evaluated the three-dimensional (3D) imaging performance of a 50 µm pixel pitch CMOS APS x-ray detector named DynAMITe (Dynamic Range Adjustable for Medical Imaging Technology). The two-dimensional (2D) angle-dependent modulation transfer function (MTF), normalized noise power spectrum (NNPS), and detective quantum efficiency (DQE) were experimentally characterized and modeled using the cascaded system analysis at oblique incident angles up to 30°. The cascaded system model was extended to the 3D spatial frequency space in combination with the filtered back-projection (FBP) reconstruction method to calculate the 3D and in-plane MTF, NNPS and DQE parameters. The results demonstrate that the beam obliquity blurs the 2D MTF and DQE in the high spatial frequency range. However, this effect can be eliminated after FBP image reconstruction. In addition, impacts of the image acquisition geometry and detector parameters were evaluated using the 3D cascaded system analysis for DBT. The result shows that a wider projection angle range (e.g.  ±30°) improves the low spatial frequency (below 5 mm(-1)) performance of the CMOS APS detector. In addition, to maintain a high spatial resolution for DBT, a focal spot size of smaller than 0.3 mm should be used. Theoretical analysis suggests that a pixelated scintillator in combination with the 50 µm pixel pitch CMOS APS detector could further improve the 3D image resolution. Finally, the 3D imaging performance of the CMOS APS and an indirect amorphous silicon (a-Si:H) thin-film transistor (TFT) passive pixel sensor (PPS) detector was simulated and compared.

  17. High-End CMOS Active Pixel Sensors For Space-Borne Imaging Instruments

    DTIC Science & Technology

    2005-07-13

    sur la technologie CCD, alors que les capteurs CMOS à pixel actifs (APS) ont des nombreux avantages pour des applications embarquées. Cette...Les capteurs optiques intégrés sont utilisés dans le domaine spatial dans un large éventail d’applications. Beaucoup d’entres elles reposent toujours...publication présente des capteurs CMOS hautes performances d’aujourd’hui et met en lumière leurs avantages par rapport à leur équivalent CCD. Ces capteurs

  18. Active pixel sensors in AMS H18/H35 HV-CMOS technology for the ATLAS HL-LHC upgrade

    NASA Astrophysics Data System (ADS)

    Ristic, Branislav

    2016-09-01

    Deep sub micron HV-CMOS processes offer the opportunity for sensors built by industry standard techniques while being HV tolerant, making them good candidates for drift-based, fast collecting, thus radiation-hard pixel detectors. For the upgrade of the ATLAS Pixel Detector towards the HL-LHC requirements, active pixel sensors in HV-CMOS technology were investigated. These implement signal processing electronics in deep n-wells, which also act as collecting electrodes. The deep n-wells allow for bias voltages up to 150 V leading to a depletion depth of several 10 μm. Prototype sensors in the AMS H18 180 nm and H35 350 nm HV-CMOS processes were thoroughly tested in lab measurements as well as in testbeam experiments. Irradiations with X-rays and protons revealed a tolerance to ionizing doses of 1 Grad while Edge-TCT studies assessed the effects of radiation on the charge collection. The sensors showed high detection efficiencies after neutron irradiation to 1015neq cm-2 in testbeam experiments. A full reticle size demonstrator chip, implemented in the H35 process is being submitted to prove the large scale feasibility of the HV-CMOS concept.

  19. Characterization of high resolution CMOS monolithic active pixel detector in SOI technology

    NASA Astrophysics Data System (ADS)

    Ahmed, M. I.; Arai, Y.; Glab, S.; Idzik, M.; Kapusta, P.; Miyoshi, T.; Takeda, A.; Turala, M.

    2015-05-01

    Novel CMOS monolithic pixel detectors designed at KEK and fabricated at Lapis Semiconductor in 0.2 μm Silicon-on-Insulator (SOI) technology are presented. A thin layer of silicon oxide separates high and low resistivity silicon layers, allowing for optimization of design of detector and readout parts. Shallow wells buried under the oxide in the detector part screen the entire pixel electronics from electrical field applied to the detector. Several integration type SOI pixel detectors have been developed with pixel sizes 8-20 μm. The general features of 14 × 14 μm2 detectors designed on different wafers (CZ-n, FZ-n and FZ-p) were measured and compared. The detector performance was studied under irradiation with visible and infra-red laser, and also X-ray ionizing source. Using X-rays from an Am-241 source the noise of readout electronics was measured at different working conditions, showing the ENC in the range of 88-120 e-. The pixel current was calculated from average DC pedestal shift while varying the pixel integration time. The operation of the detector was studied under partial and full depletion conditions. The effects of temperature and detector bias voltage on noise and leakage current were studied. Characteristics of an ADC integrated in the front-end chip are also presented.

  20. CMOS monolithic pixel sensors research and development at LBNL

    NASA Astrophysics Data System (ADS)

    Contarato, D.; Bussat, J.-M.; Denes, P.; Greiner, L.; Kim, T.; Stezelberger, T.; Wieman, H.; Battaglia, M.; Hooberman, B.; Tompkins, L.

    2007-12-01

    This paper summarizes the recent progress in the design and characterization of CMOS pixel sensors at LBNL. Results of lab tests, beam tests and radiation hardness tests carried out at LBNL on a test structure with pixels of various sizes are reported. The first results of the characterization of back-thinned CMOS pixel sensors are also reported, and future plans and activities are discussed.

  1. Characterization of CMOS Active Pixel Sensors for particle detection: Beam test of the four-sensors RAPS03 stacked system

    NASA Astrophysics Data System (ADS)

    Passeri, Daniele; Servoli, Leonello; Biagetti, Daniele; Meroli, Stefano

    2010-05-01

    In this work, in order to check the suitability of CMOS Active Pixel Sensors (APS) detectors for vertexing/tracking applications, four stacked CMOS APS sensors featuring 256×256 pixels with 10×10 μm 2 size have been tested at the INFN Beam Test Facility (BFT), Frascati (Rome). For this purpose, a dedicated mechanical and electrical set-up has been devised and implemented, allowing for the simultaneous read-out of four sensors arranged in a stacked structure. A compact and fast system (up to 64 MHz read-out clock) based on external ADCs and FPGA allows for the PC communication through USB2.0. Preliminary results in terms of track reconstructions of electrons of different energies (up to 496 MeV) are presented. This work has been carried out within the framework of the SHARPS project, supported by INFN.

  2. Integrated X-ray and charged particle active pixel CMOS sensor arrays using an epitaxial silicon sensitive region

    SciTech Connect

    Kleinfelder, Stuart; Bichsel, Hans; Bieser, Fred; Matis, Howard S.; Rai, Gulshan; Retiere, Fabrice; Weiman, Howard; Yamamoto, Eugene

    2002-07-01

    Integrated CMOS Active Pixel Sensor (APS) arrays have been fabricated and tested using X-ray and electron sources. The 128 by 128 pixel arrays, designed in a standard 0.25 micron process, use a {approx}10 micron epitaxial silicon layer as a deep detection region. The epitaxial layer has a much greater thickness than the surface features used by standard CMOS APS, leading to stronger signals and potentially better signal-to-noise ratio (SNR). On the other hand, minority carriers confined within the epitaxial region may diffuse to neighboring pixels, blur images and reduce peak signal intensity. But for low-rate, sparse-event images, centroid analysis of this diffusion may be used to increase position resolution. Careful trade-offs involving pixel size and sense-node area verses capacitance must be made to optimize overall performance. The prototype sensor arrays, therefore, include a range of different pixel designs, including different APS circuits and a range of different epitaxial layer contact structures. The fabricated arrays were tested with 1.5 GeV electrons and Fe-55 X-ray sources, yielding a measured noise of 13 electrons RMS and an SNR for single Fe-55 X-rays of greater than 38.

  3. 50 μm pixel pitch wafer-scale CMOS active pixel sensor x-ray detector for digital breast tomosynthesis.

    PubMed

    Zhao, C; Konstantinidis, A C; Zheng, Y; Anaxagoras, T; Speller, R D; Kanicki, J

    2015-12-07

    Wafer-scale CMOS active pixel sensors (APSs) have been developed recently for x-ray imaging applications. The small pixel pitch and low noise are very promising properties for medical imaging applications such as digital breast tomosynthesis (DBT). In this work, we evaluated experimentally and through modeling the imaging properties of a 50 μm pixel pitch CMOS APS x-ray detector named DynAMITe (Dynamic Range Adjustable for Medical Imaging Technology). A modified cascaded system model was developed for CMOS APS x-ray detectors by taking into account the device nonlinear signal and noise properties. The imaging properties such as modulation transfer function (MTF), noise power spectrum (NPS), and detective quantum efficiency (DQE) were extracted from both measurements and the nonlinear cascaded system analysis. The results show that the DynAMITe x-ray detector achieves a high spatial resolution of 10 mm(-1) and a DQE of around 0.5 at spatial frequencies  <1 mm(-1). In addition, the modeling results were used to calculate the image signal-to-noise ratio (SNRi) of microcalcifications at various mean glandular dose (MGD). For an average breast (5 cm thickness, 50% glandular fraction), 165 μm microcalcifications can be distinguished at a MGD of 27% lower than the clinical value (~1.3 mGy). To detect 100 μm microcalcifications, further optimizations of the CMOS APS x-ray detector, image aquisition geometry and image reconstruction techniques should be considered.

  4. High responsivity CMOS imager pixel implemented in SOI technology

    NASA Technical Reports Server (NTRS)

    Zheng, X.; Wrigley, C.; Yang, G.; Pain, B.

    2000-01-01

    Availability of mature sub-micron CMOS technology and the advent of the new low noise active pixel sensor (APS) concept have enabled the development of low power, miniature, single-chip, CMOS digital imagers in the decade of the 1990's.

  5. Linear analysis of signal and noise characteristics of a nonlinear CMOS active-pixel detector for mammography

    NASA Astrophysics Data System (ADS)

    Yun, Seungman; Kim, Ho Kyung; Han, Jong Chul; Kam, Soohwa; Youn, Hanbean; Cunningham, Ian A.

    2017-03-01

    The imaging properties of a complementary metal-oxide-semiconductor (CMOS) active-pixel photodiode array coupled to a thin gadolinium-based granular phosphor screen with a fiber-optic faceplate are investigated. It is shown that this system has a nonlinear response at low detector exposure levels (<10 mR), resulting in an over-estimation of the detective quantum efficiency (DQE) by a factor of two in some cases. Errors in performance metrics on this scale make it difficult to compare new technologies with established systems and predict performance benchmarks that can be achieved in practice and help understand performance bottlenecks. It is shown the CMOS response is described by a power-law model that can be used to linearize image data. Linearization removed an unexpected dependence of the DQE on detector exposure level.

  6. Large area CMOS active pixel sensor x-ray imager for digital breast tomosynthesis: Analysis, modeling, and characterization

    SciTech Connect

    Zhao, Chumin; Kanicki, Jerzy; Konstantinidis, Anastasios C.; Patel, Tushita

    2015-11-15

    Purpose: Large area x-ray imagers based on complementary metal-oxide-semiconductor (CMOS) active pixel sensor (APS) technology have been proposed for various medical imaging applications including digital breast tomosynthesis (DBT). The low electronic noise (50–300 e{sup −}) of CMOS APS x-ray imagers provides a possible route to shrink the pixel pitch to smaller than 75 μm for microcalcification detection and possible reduction of the DBT mean glandular dose (MGD). Methods: In this study, imaging performance of a large area (29 × 23 cm{sup 2}) CMOS APS x-ray imager [Dexela 2923 MAM (PerkinElmer, London)] with a pixel pitch of 75 μm was characterized and modeled. The authors developed a cascaded system model for CMOS APS x-ray imagers using both a broadband x-ray radiation and monochromatic synchrotron radiation. The experimental data including modulation transfer function, noise power spectrum, and detective quantum efficiency (DQE) were theoretically described using the proposed cascaded system model with satisfactory consistency to experimental results. Both high full well and low full well (LFW) modes of the Dexela 2923 MAM CMOS APS x-ray imager were characterized and modeled. The cascaded system analysis results were further used to extract the contrast-to-noise ratio (CNR) for microcalcifications with sizes of 165–400 μm at various MGDs. The impact of electronic noise on CNR was also evaluated. Results: The LFW mode shows better DQE at low air kerma (K{sub a} < 10 μGy) and should be used for DBT. At current DBT applications, air kerma (K{sub a} ∼ 10 μGy, broadband radiation of 28 kVp), DQE of more than 0.7 and ∼0.3 was achieved using the LFW mode at spatial frequency of 0.5 line pairs per millimeter (lp/mm) and Nyquist frequency ∼6.7 lp/mm, respectively. It is shown that microcalcifications of 165–400 μm in size can be resolved using a MGD range of 0.3–1 mGy, respectively. In comparison to a General Electric GEN2 prototype DBT system (at

  7. Analysis of pixel circuits in CMOS image sensors

    NASA Astrophysics Data System (ADS)

    Mei, Zou; Chen, Nan; Yao, Li-bin

    2015-04-01

    CMOS image sensors (CIS) have lower power consumption, lower cost and smaller size than CCD image sensors. However, generally CCDs have higher performance than CIS mainly due to lower noise. The pixel circuit used in CIS is the first part of the signal processing circuit and connected to photodiode directly, so its performance will greatly affect the CIS or even the whole imaging system. To achieve high performance, CMOS image sensors need advanced pixel circuits. There are many pixel circuits used in CIS, such as passive pixel sensor (PPS), 3T and 4T active pixel sensor (APS), capacitive transimpedance amplifier (CTIA), and passive pixel sensor (PPS). At first, the main performance parameters of each pixel structure including the noise, injection efficiency, sensitivity, power consumption, and stability of bias voltage are analyzed. Through the theoretical analysis of those pixel circuits, it is concluded that CTIA pixel circuit has good noise performance, high injection efficiency, stable photodiode bias, and high sensitivity with small integrator capacitor. Furthermore, the APS and CTIA pixel circuits are simulated in a standard 0.18-μm CMOS process and using a n-well/p-sub photodiode by SPICE and the simulation result confirms the theoretical analysis result. It shows the possibility that CMOS image sensors can be extended to a wide range of applications requiring high performance.

  8. Signal and noise transfer properties of CMOS based active pixel flat panel imager coupled to structured CsI:Tl.

    PubMed

    Arvanitis, C D; Bohndiek, S E; Blakesley, J; Olivo, A; Speller, R D

    2009-01-01

    Complementary metal-oxide-semiconductors (CMOS) active pixel sensors can be optically coupled to CsI:Tl phosphors forming a indirect active pixel flat panel imager (APFPI) for high performance medical imaging. The aim of this work is to determine the x-ray imaging capabilities of CMOS-based APFPI and study the signal and noise transfer properties of CsI:Tl phosphors. Three different CsI:Tl phosphors from two different vendors have been used to produce three system configurations. The performance of each system configuration has been studied in terms of the modulation transfer function (MTF), noise power spectra, and detective quantum efficiency (DQE) in the mammographic energy range. A simple method to determine quantum limited systems in this energy range is also presented. In addition, with aid of monochromatic synchrotron radiation, the effect of iodine characteristic x-rays of the CsI:Tl on the MTF has been determined. A Monte Carlo simulation of the signal transfer properties of the imager is also presented in order to study the stages that degrade the spatial resolution of our current system. The effect of using substrate patterning during the growth of CsI:Tl columnar structure was also studied, along with the effect of CsI:Tl fixed pattern noise due to local variations in the scintillation light. CsI:Tl fixed pattern noise appears to limit the performance of our current system configurations. All the system configurations are quantum limited at 0.23 microC/kg with two of them having DQE (0) equal to 0.57. Active pixel flat panel imagers are shown to be digital x-ray imagers with almost constant DQE throughout a significant part of their dynamic range and in particular at very low exposures.

  9. Development of CMOS Active Pixel Image Sensors for Low Cost Commercial Applications

    NASA Technical Reports Server (NTRS)

    Gee, R.; Kemeny, S.; Kim, Q.; Mendis, S.; Nakamura, J.; Nixon, R.; Ortiz, M.; Pain, B.; Staller, C.; Zhou, Z; Fossum, E.

    1994-01-01

    JPL, under sponsorship from the NASA Office of Advanced Concepts and Technology, has been developing a second-generation solid-state image sensor technology. Charge-coupled devices (CCD) are a well-established first generation image sensor technology. For both commercial and NASA applications, CCDs have numerous shortcomings. In response, the active pixel sensor (APS) technology has been under research. The major advantages of APS technology are the ability to integrate on-chip timing, control, signal-processing and analog-to-digital converter functions, reduced sensitivity to radiation effects, low power operation, and random access readout.

  10. Synchrotron based planar imaging and digital tomosynthesis of breast and biopsy phantoms using a CMOS active pixel sensor.

    PubMed

    Szafraniec, Magdalena B; Konstantinidis, Anastasios C; Tromba, Giuliana; Dreossi, Diego; Vecchio, Sara; Rigon, Luigi; Sodini, Nicola; Naday, Steve; Gunn, Spencer; McArthur, Alan; Olivo, Alessandro

    2015-03-01

    The SYRMEP (SYnchrotron Radiation for MEdical Physics) beamline at Elettra is performing the first mammography study on human patients using free-space propagation phase contrast imaging. The stricter spatial resolution requirements of this method currently force the use of conventional films or specialized computed radiography (CR) systems. This also prevents the implementation of three-dimensional (3D) approaches. This paper explores the use of an X-ray detector based on complementary metal-oxide-semiconductor (CMOS) active pixel sensor (APS) technology as a possible alternative, for acquisitions both in planar and tomosynthesis geometry. Results indicate higher quality of the images acquired with the synchrotron set-up in both geometries. This improvement can be partly ascribed to the use of parallel, collimated and monochromatic synchrotron radiation (resulting in scatter rejection, no penumbra-induced blurring and optimized X-ray energy), and partly to phase contrast effects. Even though the pixel size of the used detector is still too large - and thus suboptimal - for free-space propagation phase contrast imaging, a degree of phase-induced edge enhancement can clearly be observed in the images.

  11. The Dexela 2923 CMOS X-ray detector: A flat panel detector based on CMOS active pixel sensors for medical imaging applications

    NASA Astrophysics Data System (ADS)

    Konstantinidis, Anastasios C.; Szafraniec, Magdalena B.; Speller, Robert D.; Olivo, Alessandro

    2012-10-01

    Complementary metal-oxide-semiconductors (CMOS) active pixel sensors (APS) have been introduced recently in many scientific applications. This work reports on the performance (in terms of signal and noise transfer) of an X-ray detector that uses a novel CMOS APS which was developed for medical X-ray imaging applications. For a full evaluation of the detector's performance, electro-optical and X-ray characterizations were carried out. The former included measuring read noise, full well capacity and dynamic range. The latter, which included measuring X-ray sensitivity, presampling modulation transfer function (pMTF), noise power spectrum (NPS) and the resulting detective quantum efficiency (DQE), was assessed under three beam qualities (28 kV, 50 kV (RQA3) and 70 kV (RQA5) using W/Al) all in accordance with the IEC standard. The detector features an in-pixel option for switching the full well capacity between two distinct modes, high full well (HFW) and low full well (LFW). Two structured CsI:Tl scintillators of different thickness (a “thin” one for high resolution and a thicker one for high light efficiency) were optically coupled to the sensor array to optimize the performance of the system for different medical applications. The electro-optical performance evaluation of the sensor results in relatively high read noise (∼360 e-), high full well capacity (∼1.5×106 e-) and wide dynamic range (∼73 dB) under HFW mode operation. When the LFW mode is used, the read noise is lower (∼165) at the expense of a reduced full well capacity (∼0.5×106 e-) and dynamic range (∼69 dB). The maximum DQE values at low frequencies (i.e. 0.5 lp/mm) are high for both HFW (0.69 for 28 kV, 0.71 for 50 kV and 0.75 for 70 kV) and LFW (0.69 for 28 kV and 0.7 for 50 kV) modes. The X-ray performance of the studied detector compares well to that of other mammography and general radiography systems, obtained under similar experimental conditions. This demonstrates the suitability

  12. An integrating CMOS APS for X-ray imaging with an in-pixel preamplifier

    NASA Astrophysics Data System (ADS)

    Abdalla, M. A.; Fröjdh, C.; Petersson, C. S.

    2001-06-01

    We present in this paper an integrating CMOS Active Pixel Sensor (APS) circuit coated with scintillator type sensors for intra-oral dental X-ray imaging systems. The photosensing element in the pixel is formed by the p-diffusion on the n-well diode. The advantage of this photosensor is its very low direct absorption of X-rays compared to the other available photosensing elements in the CMOS pixel. The pixel features an integrating capacitor in the feedback loop of a preamplifier of a finite gain in order to increase the optical sensitivity. To verify the effectiveness of this in-pixel preamplification, a prototype 32×80 element CMOS active pixel array was implemented in a 0.8 μm CMOS double poly, n-well process with a pixel pitch of 50 μm. Measured results confirmed the improved optical sensitivity performance of the APS. Various measurements on device performance are presented.

  13. Novel integrated CMOS pixel structures for vertex detectors

    SciTech Connect

    Kleinfelder, Stuart; Bieser, Fred; Chen, Yandong; Gareus, Robin; Matis, Howard S.; Oldenburg, Markus; Retiere, Fabrice; Ritter, Hans Georg; Wieman, Howard H.; Yamamoto, Eugene

    2003-10-29

    Novel CMOS active pixel structures for vertex detector applications have been designed and tested. The overriding goal of this work is to increase the signal to noise ratio of the sensors and readout circuits. A large-area native epitaxial silicon photogate was designed with the aim of increasing the charge collected per struck pixel and to reduce charge diffusion to neighboring pixels. The photogate then transfers the charge to a low capacitance readout node to maintain a high charge to voltage conversion gain. Two techniques for noise reduction are also presented. The first is a per-pixel kT/C noise reduction circuit that produces results similar to traditional correlated double sampling (CDS). It has the advantage of requiring only one read, as compared to two for CDS, and no external storage or subtraction is needed. The technique reduced input-referred temporal noise by a factor of 2.5, to 12.8 e{sup -}. Finally, a column-level active reset technique is explored that suppresses kT/C noise during pixel reset. In tests, noise was reduced by a factor of 7.6 times, to an estimated 5.1 e{sup -} input-referred noise. The technique also dramatically reduces fixed pattern (pedestal) noise, by up to a factor of 21 in our tests. The latter feature may possibly reduce pixel-by-pixel pedestal differences to levels low enough to permit sparse data scan without per-pixel offset corrections.

  14. A novel CMOS sensor with in-pixel auto-zeroed discrimination for charged particle tracking

    NASA Astrophysics Data System (ADS)

    Degerli, Y.; Guilloux, F.; Orsini, F.

    2014-05-01

    With the aim of developing fast and granular Monolithic Active Pixels Sensors (MAPS) as new charged particle tracking detectors for high energy physics experiments, a new rolling shutter binary pixel architecture concept (RSBPix) with in-pixel correlated double sampling, amplification and discrimination is presented. The discriminator features auto-zeroing in order to compensate process-related transistor mismatches. In order to validate the pixel, a first monolithic CMOS sensor prototype, including a pixel array of 96 × 64 pixels, has been designed and fabricated in the Tower-Jazz 0.18 μm CMOS Image Sensor (CIS) process. Results of laboratory tests are presented.

  15. Analysis and Enhancement of Low-Light-Level Performance of Photodiode-Type CMOS Active Pixel Images Operated with Sub-Threshold Reset

    NASA Technical Reports Server (NTRS)

    Pain, Bedabrata; Yang, Guang; Ortiz, Monico; Wrigley, Christopher; Hancock, Bruce; Cunningham, Thomas

    2000-01-01

    Noise in photodiode-type CMOS active pixel sensors (APS) is primarily due to the reset (kTC) noise at the sense node, since it is difficult to implement in-pixel correlated double sampling for a 2-D array. Signal integrated on the photodiode sense node (SENSE) is calculated by measuring difference between the voltage on the column bus (COL) - before and after the reset (RST) is pulsed. Lower than kTC noise can be achieved with photodiode-type pixels by employing "softreset" technique. Soft-reset refers to resetting with both drain and gate of the n-channel reset transistor kept at the same potential, causing the sense node to be reset using sub-threshold MOSFET current. However, lowering of noise is achieved only at the expense higher image lag and low-light-level non-linearity. In this paper, we present an analysis to explain the noise behavior, show evidence of degraded performance under low-light levels, and describe new pixels that eliminate non-linearity and lag without compromising noise.

  16. Design and characterization of high precision in-pixel discriminators for rolling shutter CMOS pixel sensors with full CMOS capability

    NASA Astrophysics Data System (ADS)

    Fu, Y.; Hu-Guo, C.; Dorokhov, A.; Pham, H.; Hu, Y.

    2013-07-01

    In order to exploit the ability to integrate a charge collecting electrode with analog and digital processing circuitry down to the pixel level, a new type of CMOS pixel sensors with full CMOS capability is presented in this paper. The pixel array is read out based on a column-parallel read-out architecture, where each pixel incorporates a diode, a preamplifier with a double sampling circuitry and a discriminator to completely eliminate analog read-out bottlenecks. The sensor featuring a pixel array of 8 rows and 32 columns with a pixel pitch of 80 μm×16 μm was fabricated in a 0.18 μm CMOS process. The behavior of each pixel-level discriminator isolated from the diode and the preamplifier was studied. The experimental results indicate that all in-pixel discriminators which are fully operational can provide significant improvements in the read-out speed and the power consumption of CMOS pixel sensors.

  17. Silicon pixel detector prototyping in SOI CMOS technology

    NASA Astrophysics Data System (ADS)

    Dasgupta, Roma; Bugiel, Szymon; Idzik, Marek; Kapusta, Piotr; Kucewicz, Wojciech; Turala, Michal

    2016-12-01

    The Silicon-On-Insulator (SOI) CMOS is one of the most advanced and promising technology for monolithic pixel detectors design. The insulator layer that is implemented inside the silicon crystal allows to integrate sensors matrix and readout electronic on a single wafer. Moreover, the separation of electronic and substrate increases also the SOI circuits performance. The parasitic capacitances to substrate are significantly reduced, so the electronic systems are faster and consume much less power. The authors of this presentation are the members of international SOIPIX collaboration, that is developing SOI pixel detectors in 200 nm Lapis Fully-Depleted, Low-Leakage SOI CMOS. This work shows a set of advantages of SOI technology and presents possibilities for pixel detector design SOI CMOS. In particular, the preliminary results of a Cracow chip are presented.

  18. CMOS in-pixel optical pulse frequency modulator

    NASA Astrophysics Data System (ADS)

    Nel, Nicolaas E.; du Plessis, M.; Joubert, T.-H.

    2016-02-01

    This paper covers the design of a complementary metal oxide semiconductor (CMOS) pixel readout circuit with a built-in frequency conversion feature. The pixel contains a CMOS photo sensor along with all signal-to-frequency conversion circuitry. An 8×8 array of these pixels is also designed. Current imaging arrays often use analog-to-digital conversion (ADC) and digital signal processing (DSP) techniques that are off-chip1. The frequency modulation technique investigated in this paper is preferred over other ADC techniques due to its smaller size, and the possibility of a higher dynamic range. Careful considerations are made regarding the size of the components of the pixel, as various characteristics of CMOS devices are limited by decreasing the scale of the components2. The methodology used was the CMOS design cycle for integrated circuit design. All components of the pixel were designed from first principles to meet necessary requirements of a small pixel size (30×30 μm2) and an output resolution greater than that of an 8-bit ADC. For the photodetector, an n+-p+/p-substrate diode was designed with a parasitic capacitance of 3 fF. The analog front-end stage was designed around a Schmitt trigger circuit. The photo current is integrated on an integration capacitor of 200 fF, which is reset when the Schmitt trigger output voltage exceeds a preset threshold. The circuit schematic and layout were designed using Cadence Virtuoso and the process used was the AMS CMOS 350 nm process using a power supply of 5V. The simulation results were confirmed to comply with specifications, and the layout passed all verification checks. The dynamic range achieved is 58.828 dB per pixel, with the output frequencies ranging from 12.341kHz to 10.783 MHz. It is also confirmed that the output frequency has a linear relationship to the photocurrent generated by the photodiode.

  19. Detection and compensation of bad pixel for CMOS image sensor

    NASA Astrophysics Data System (ADS)

    Xu, Youqing; Yu, Shengsheng; Zhou, Jingli; Fang, Zuyuan

    2000-05-01

    This paper presents a detailed analysis of the occurring reason and features of bad pixels in CMOS image sensor. Detect and compensate algorithms have also bee introduced. Experimental result show that the algorithms are efficiently when they are applied on CH5001 produced by Chrontel Inc.

  20. Fully depleted CMOS pixel sensor development and potential applications

    SciTech Connect

    Baudot, J.; Kachel, M.

    2015-07-01

    CMOS pixel sensors are often opposed to hybrid pixel sensors due to their very different sensitive layer. In standard CMOS imaging processes, a thin (about 20 μm) low resistivity epitaxial layer acts as the sensitive volume and charge collection is mostly driven by thermal agitation. In contrast, the so-called hybrid pixel technology exploits a thick (typically 300 μm) silicon sensor with high resistivity allowing for the depletion of this volume, hence charges drift toward collecting electrodes. But this difference is fading away with the recent availability of some CMOS imaging processes based on a relatively thick (about 50 μm) high resistivity epitaxial layer which allows for full depletion. This evolution extents the range of applications for CMOS pixel sensors where their known assets, high sensitivity and granularity combined with embedded signal treatment, could potentially foster breakthrough in detection performances for specific scientific instruments. One such domain is the Xray detection for soft energies, typically below 10 keV, where the thin sensitive layer was previously severely impeding CMOS sensor usage. Another application becoming realistic for CMOS sensors, is the detection in environment with a high fluence of non-ionizing radiation, such as hadron colliders. However, when considering highly demanding applications, it is still to be proven that micro-circuits required to uniformly deplete the sensor at the pixel level, do not mitigate the sensitivity and efficiency required. Prototype sensors in two different technologies with resistivity higher than 1 kΩ, sensitive layer between 40 and 50 μm and featuring pixel pitch in the range 25 to 50 μm, have been designed and fabricated. Various biasing architectures were adopted to reach full depletion with only a few volts. Laboratory investigations with three types of sources (X-rays, β-rays and infrared light) demonstrated the validity of the approach with respect to depletion, keeping a

  1. A CMOS In-Pixel CTIA High Sensitivity Fluorescence Imager

    PubMed Central

    Murari, Kartikeya; Etienne-Cummings, Ralph; Thakor, Nitish; Cauwenberghs, Gert

    2012-01-01

    Traditionally, charge coupled device (CCD) based image sensors have held sway over the field of biomedical imaging. Complementary metal oxide semiconductor (CMOS) based imagers so far lack sensitivity leading to poor low-light imaging. Certain applications including our work on animal-mountable systems for imaging in awake and unrestrained rodents require the high sensitivity and image quality of CCDs and the low power consumption, flexibility and compactness of CMOS imagers. We present a 132×124 high sensitivity imager array with a 20.1 μm pixel pitch fabricated in a standard 0.5 μ CMOS process. The chip incorporates n-well/p-sub photodiodes, capacitive transimpedance amplifier (CTIA) based in-pixel amplification, pixel scanners and delta differencing circuits. The 5-transistor all-nMOS pixel interfaces with peripheral pMOS transistors for column-parallel CTIA. At 70 fps, the array has a minimum detectable signal of 4 nW/cm2 at a wavelength of 450 nm while consuming 718 μA from a 3.3 V supply. Peak signal to noise ratio (SNR) was 44 dB at an incident intensity of 1 μW/cm2. Implementing 4×4 binning allowed the frame rate to be increased to 675 fps. Alternately, sensitivity could be increased to detect about 0.8 nW/cm2 while maintaining 70 fps. The chip was used to image single cell fluorescence at 28 fps with an average SNR of 32 dB. For comparison, a cooled CCD camera imaged the same cell at 20 fps with an average SNR of 33.2 dB under the same illumination while consuming over a watt. PMID:23136624

  2. Design of an ultra low power CMOS pixel sensor for a future neutron personal dosimeter

    SciTech Connect

    Zhang, Y.; Hu-Guo, C.; Husson, D.; Hu, Y.

    2011-07-01

    Despite a continuously increasing demand, neutron electronic personal dosimeters (EPDs) are still far from being completely established because their development is a very difficult task. A low-noise, ultra low power consumption CMOS pixel sensor for a future neutron personal dosimeter has been implemented in a 0.35 {mu}m CMOS technology. The prototype is composed of a pixel array for detection of charged particles, and the readout electronics is integrated on the same substrate for signal processing. The excess electrons generated by an impinging particle are collected by the pixel array. The charge collection time and the efficiency are the crucial points of a CMOS detector. The 3-D device simulations using the commercially available Synopsys-SENTAURUS package address the detailed charge collection process. Within a time of 1.9 {mu}s, about 59% electrons created by the impact particle are collected in a cluster of 4 x 4 pixels with the pixel pitch of 80 {mu}m. A charge sensitive preamplifier (CSA) and a shaper are employed in the frond-end readout. The tests with electrical signals indicate that our prototype with a total active area of 2.56 x 2.56 mm{sup 2} performs an equivalent noise charge (ENC) of less than 400 e - and 314 {mu}W power consumption, leading to a promising prototype. (authors)

  3. New CMOS digital pixel sensor architecture dedicated to a visual cortical implant

    NASA Astrophysics Data System (ADS)

    Trépanier, Annie; Trépanier, Jean-Luc; Sawan, Mohamad; Audet, Yves

    2004-10-01

    A CMOS image sensor with pixel level analog to digital conversion is presented. Each 16μm x 16μm pixel area contains a photodiode, with a fill factor of 22%, a comparator and an 8-bit DRAM, resulting in a total of 44 transistors per pixel. A digital to analog converter is used to deliver a voltage reference to compare with the pixel voltage for the analog to digital conversion. This sensor is required by a visual cortical stimulator, primarily to capture the image which is dedicated to stimulate the visual cortex of a blind patient. An active range finder system will be added to the implant, requiring the difference information between two images, in order to obtain the 3D information useful to the patient. For this purpose, three selectable operation modes are combined in the same pixel circuit. The linear integration, resulting from image capture at multiple exposure times, allows a high intrascene dynamic range. Random accessibility, in space and time, of the array of sensors is possible with the logarithmic mode. And the new differential mode makes the difference between two consecutive images. The circuit of a pixel has been fabricated in CMOS 0.18μm technology and it is under test to validate the full operation of the 3 modes. Also, a matrix of 45 x 90 pixels is currently being implemented for fabrication.

  4. From vertex detectors to inner trackers with CMOS pixel sensors

    NASA Astrophysics Data System (ADS)

    Besson, A.; Pérez, A. Pérez; Spiriti, E.; Baudot, J.; Claus, G.; Goffe, M.; Winter, M.

    2017-02-01

    The use of CMOS Pixel Sensors (CPS) for high resolution and low material vertex detectors has been validated with the 2014 and 2015 physics runs of the STAR-PXL detector at RHIC/BNL. This opens the door to the use of CPS for inner tracking devices, with 10-100 times larger sensitive area, which require therefore a sensor design privileging power saving, response uniformity and robustness. The 350 nm CMOS technology used for the STAR-PXL sensors was considered as too poorly suited to upcoming applications like the upgraded ALICE Inner Tracking System (ITS), which requires sensors with one order of magnitude improvement on readout speed and improved radiation tolerance. This triggered the exploration of a deeper sub-micron CMOS technology, Tower-Jazz 180 nm, for the design of a CPS well adapted for the new ALICE-ITS running conditions. This paper reports the R & D results for the conception of a CPS well adapted for the ALICE-ITS.

  5. Improvement to the signaling interface for CMOS pixel sensors

    NASA Astrophysics Data System (ADS)

    Shi, Zhan; Tang, Zhenan; Feng, Chong; Cai, Hong

    2016-10-01

    The development of the readout speed of CMOS pixel sensors (CPS) is motivated by the demanding requirements of future high energy physics (HEP) experiments. As the interface between CPS and the data acquisition (DAQ) system, which inputs clock from the DAQ system and outputs data from CPS, the signaling interface should also be improved in terms of data rates. Meanwhile, the power consumption of the signaling interface should be maintained as low as possible. Consequently, a reduced swing differential signaling (RSDS) driver was adopted instead of a low-voltage differential signaling (LVDS) driver to transmit data from CPS to the DAQ system. In order to increase the capability of data rates, a serial source termination technique was employed. A LVDS/RSDS receiver was employed for transmitting clock from the DAQ system to CPS. A new method of generating hysteresis and a special current comparator were used to achieve a higher speed with lower power consumption. The signaling interface was designed and submitted for fabrication in a 0.18 μm CMOS image sensor (CIS) process. Measurement results indicate that the RSDS driver and the LVDS receiver can operate correctly at a data rate of 2 Gb/s with a power consumption of 19.1 mW.

  6. CMOS Hybrid Pixel Detectors for Scientific, Industrial and Medical Applications

    NASA Astrophysics Data System (ADS)

    Broennimann, Christian

    2009-03-01

    Crystallography is the principal technique for determining macromolecular structures at atomic resolution and uses advantageously the high intensity of 3rd generation synchrotron X-ray sources . Macromolecular crystallography experiments benefit from excellent beamline equipment, recent software advances and modern X-ray detectors. However, the latter do not take full advantage of the brightness of modern synchrotron sources. CMOS Hybrid pixel array detectors, originally developed for high energy physics experiments, meet these requirements. X-rays are recorded in single photon counting mode and data thus are stored digitally at the earliest possible stage. This architecture leads to several advantages over current detectors: No detector noise is added to the signal. Readout time is reduced to a few milliseconds. The counting rates are matched to beam intensities at protein crystallography beamlines at 3rd generation synchrotrons. The detector is not sensitive to X-rays during readout; therefore no mechanical shutter is required. The detector has a very sharp point spread function (PSF) of one pixel, which allows better resolution of adjacent reflections. Low energy X-rays can be suppressed by the comparator At the Paul Scherrer Institute (PSI) in Switzerland the first and largest array based on this technology was constructed: The Pilatus 6M detector. The detector covers an area of 43.1 x 44.8 cm2 , has 6 million pixels and is read out noise free in 3.7 ms. Since June 2007 the detector is in routine operation at the beamline 6S of the Swiss Light Source (SLS). The company DETCRIS Ltd, has licensed the technology from PSI and is commercially offering the PILATUS detectors. Examples of the wide application range of the detectors will be shown.

  7. Microlens performance limits in sub-2mum pixel CMOS image sensors.

    PubMed

    Huo, Yijie; Fesenmaier, Christian C; Catrysse, Peter B

    2010-03-15

    CMOS image sensors with smaller pixels are expected to enable digital imaging systems with better resolution. When pixel size scales below 2 mum, however, diffraction affects the optical performance of the pixel and its microlens, in particular. We present a first-principles electromagnetic analysis of microlens behavior during the lateral scaling of CMOS image sensor pixels. We establish for a three-metal-layer pixel that diffraction prevents the microlens from acting as a focusing element when pixels become smaller than 1.4 microm. This severely degrades performance for on and off-axis pixels in red, green and blue color channels. We predict that one-metal-layer or backside-illuminated pixels are required to extend the functionality of microlenses beyond the 1.4 microm pixel node.

  8. Using an Active Pixel Sensor In A Vertex Detector

    SciTech Connect

    Matis, Howard S.; Bieser, Fred; Chen, Yandong; Gareus, Robin; Kleinfelder, Stuart; Oldenburg, Markus; Retiere, Fabrice; Ritter, HansGeorg; Wieman, Howard H.; Wurzel, Samuel E.; Yamamoto, Eugene

    2004-04-22

    Research has shown that Active Pixel CMOS sensors can detect charged particles. We have been studying whether this process can be used in a collider environment. In particular, we studied the effect of radiation with 55 MeV protons. These results show that a fluence of about 2 x 10{sup 12} protons/cm{sup 2} reduces the signal by a factor of two while the noise increases by 25%. A measurement 6 months after exposure shows that the silicon lattice naturally repairs itself. Heating the silicon to 100 C reduced the shot noise and increased the collected charge. CMOS sensors have a reduced signal to noise ratio per pixel because charge diffuses to neighboring pixels. We have constructed a photogate to see if this structure can collect more charge per pixel. Results show that a photogate does collect charge in fewer pixels, but it takes about 15 ms to collect all of the electrons produced by a pulse of light.

  9. Power and area efficient 4-bit column-level ADC in a CMOS pixel sensor for the ILD vertex detector

    NASA Astrophysics Data System (ADS)

    Zhang, L.; Morel, F.; Hu-Guo, Ch; Hu, Y.

    2013-01-01

    A 48 × 64 pixels prototype CMOS pixel sensor (CPS) integrated with 4-bit column-level, self triggered ADCs for the outer layers of the ILD vertex detector (VTX) was developed and fabricated in a 0.35 μm CMOS process with a pixel pitch of 35 μm. The pixel concept combines in-pixel amplification with a correlated double sampling (CDS) operation. The ADCs accommodating the pixel read out in a rolling shutter mode complete the conversion by performing a multi-bit/step approximation. The design was optimised for power saving at sampling frequency. The prototype sensor is currently at the stage of being started testing and evaluation. So what is described is based on post simulation results rather than test data. This 4-bit ADC dissipates, at a 3-V supply and 6.25-MS/s sampling rate, 486 μW in its inactive mode, which is by far the most frequent. This value rises to 714 μW in case of the active mode. Its footprint amounts to 35 × 545 μm2.

  10. 1T Pixel Using Floating-Body MOSFET for CMOS Image Sensors.

    PubMed

    Lu, Guo-Neng; Tournier, Arnaud; Roy, François; Deschamps, Benoît

    2009-01-01

    We present a single-transistor pixel for CMOS image sensors (CIS). It is a floating-body MOSFET structure, which is used as photo-sensing device and source-follower transistor, and can be controlled to store and evacuate charges. Our investigation into this 1T pixel structure includes modeling to obtain analytical description of conversion gain. Model validation has been done by comparing theoretical predictions and experimental results. On the other hand, the 1T pixel structure has been implemented in different configurations, including rectangular-gate and ring-gate designs, and variations of oxidation parameters for the fabrication process. The pixel characteristics are presented and discussed.

  11. 1T Pixel Using Floating-Body MOSFET for CMOS Image Sensors

    PubMed Central

    Lu, Guo-Neng; Tournier, Arnaud; Roy, François; Deschamps, Benoît

    2009-01-01

    We present a single-transistor pixel for CMOS image sensors (CIS). It is a floating-body MOSFET structure, which is used as photo-sensing device and source-follower transistor, and can be controlled to store and evacuate charges. Our investigation into this 1T pixel structure includes modeling to obtain analytical description of conversion gain. Model validation has been done by comparing theoretical predictions and experimental results. On the other hand, the 1T pixel structure has been implemented in different configurations, including rectangular-gate and ring-gate designs, and variations of oxidation parameters for the fabrication process. The pixel characteristics are presented and discussed. PMID:22389592

  12. Pixel architectures in a HV-CMOS process for the ATLAS inner detector upgrade

    NASA Astrophysics Data System (ADS)

    Degerli, Y.; Godiot, S.; Guilloux, F.; Hemperek, T.; Krüger, H.; Lachkar, M.; Liu, J.; Orsini, F.; Pangaud, P.; Rymaszewski, P.; Wang, T.

    2016-12-01

    In this paper, design details and simulation results of new pixel architectures designed in LFoundry 150 nm high voltage CMOS process in the framework of the ATLAS high luminosity inner detector upgrade are presented. These pixels can be connected to the FE-I4 readout chip via bump bonding or glue and some of them can also be tested without a readout chip. Negative high voltage is applied to the high resistivity (> 2 kΩ .cm) substrate in order to deplete the deep n-well charge collection diode, ensuring good charge collection and radiation tolerance. In these pixels, the front-end has been implemented inside the diode using both NMOS and PMOS transistors. The pixel pitch is 50 μm × 250 μm for all pixels. These pixels have been implemented in a demonstrator chip called LFCPIX.

  13. Development of CMOS pixel sensors for the upgrade of the ALICE Inner Tracking System

    NASA Astrophysics Data System (ADS)

    Molnar, L.

    2014-12-01

    The ALICE Collaboration is preparing a major upgrade of the current detector, planned for installation during the second long LHC shutdown in the years 2018-19, in order to enhance its low-momentum vertexing and tracking capability, and exploit the planned increase of the LHC luminosity with Pb beams. One of the cornerstones of the ALICE upgrade strategy is to replace the current Inner Tracking System in its entirety with a new, high resolution, low-material ITS detector. The new ITS will consist of seven concentric layers equipped with Monolithic Active Pixel Sensors (MAPS) implemented using the 0.18 μm CMOS technology of TowerJazz. In this contribution, the main key features of the ITS upgrade will be illustrated with emphasis on the functionality of the pixel chip. The ongoing developments on the readout architectures, which have been implemented in several fabricated prototypes, will be discussed. The operational features of these prototypes as well as the results of the characterisation tests before and after irradiation will also be presented.

  14. Detection of thermal neutrons with a CMOS pixel sensor for a future dosemeter

    SciTech Connect

    Vanstalle, M.; Husson, D.; Higueret, S.; Le, T. D.; Nourreddine, A. M.

    2011-07-01

    The RaMsEs group (Radioprotection et Mesures Environnementales) is developing a new compact device for operational neutron dosimetry. The electronic part of the detector is made of an integrated active pixel sensor, originally designed for tracking in particle physics. This device has useful features for neutrons, such as high detection efficiency for charged particles, good radiation resistance, high readout speed, low power consumption and high rejection of photon background. A good response of the device to fast neutrons has already been demonstrated [1]. In order to test the sensibility of the detector to thermal neutrons, experiments have been carried out with a 512 x 512 pixel CMOS sensor on a californium source moderated with heavy water (Cf.D{sub 2}O) on the Van Gogh irradiator at the LMDN, IRSN, Cadarache (France)). A thin boron converter is used to benefit from the significant cross section of the {sup 10}B (n,{alpha}) {sup 7}Li reaction. Results show a high detection efficiency (around 10{sup -3}) of the device to thermal neutrons. Our measurements are in good agreement with GEANT4 Monte Carlo simulations. (authors)

  15. High Speed, Radiation Hard CMOS Pixel Sensors for Transmission Electron Microscopy

    NASA Astrophysics Data System (ADS)

    Contarato, Devis; Denes, Peter; Doering, Dionisio; Joseph, John; Krieger, Brad

    CMOS monolithic active pixel sensors are currently being established as the technology of choice for new generation digital imaging systems in Transmission Electron Microscopy (TEM). A careful sensor design that couples μm-level pixel pitches with high frame rate readout and radiation hardness to very high electron doses enables the fabrication of direct electron detectors that are quickly revolutionizing high-resolution TEM imaging in material science and molecular biology. This paper will review the principal characteristics of this novel technology and its advantages over conventional, optically-coupled cameras, and retrace the sensor development driven by the Transmission Electron Aberration corrected Microscope (TEAM) project at the LBNL National Center for Electron Microscopy (NCEM), illustrating in particular the imaging capabilities enabled by single electron detection at high frame rate. Further, the presentation will report on the translation of the TEAM technology to a finer feature size process, resulting in a sensor with higher spatial resolution and superior radiation tolerance currently serving as the baseline for a commercial camera system.

  16. Investigation of CMOS pixel sensor with 0.18 μm CMOS technology for high-precision tracking detector

    NASA Astrophysics Data System (ADS)

    Zhang, L.; Fu, M.; Zhang, Y.; Yan, W.; Wang, M.

    2017-01-01

    The Circular Electron Positron Collider (CEPC) proposed by the Chinese high energy physics community is aiming to measure Higgs particles and their interactions precisely. The tracking detector including Silicon Inner Tracker (SIT) and Forward Tracking Disks (FTD) has driven stringent requirements on sensor technologies in term of spatial resolution, power consumption and readout speed. CMOS Pixel Sensor (CPS) is a promising candidate to approach these requirements. This paper presents the preliminary studies on the sensor optimization for tracking detector to achieve high collection efficiency while keeping necessary spatial resolution. Detailed studies have been performed on the charge collection using a 0.18 μm CMOS image sensor process. This process allows high resistivity epitaxial layer, leading to a significant improvement on the charge collection and therefore improving the radiation tolerance. Together with the simulation results, the first exploratory prototype has bee designed and fabricated. The prototype includes 9 different pixel arrays, which vary in terms of pixel pitch, diode size and geometry. The total area of the prototype amounts to 2 × 7.88 mm2.

  17. A CMOS image sensor using high-speed lock-in pixels for stimulated Raman scattering

    NASA Astrophysics Data System (ADS)

    Lioe, DeXing; Mars, Kamel; Takasawa, Taishi; Yasutomi, Keita; Kagawa, Keiichiro; Hashimoto, Mamoru; Kawahito, Shoji

    2016-03-01

    A CMOS image sensor using high-speed lock-in pixels for stimulated Raman scattering (SRS) spectroscopy is presented in this paper. The effective SRS signal from the stimulated emission of SRS mechanism is very small in contrast to the offset of a probing laser source, which is in the ratio of 10-4 to 10-5. In order to extract this signal, the common offset component is removed, and the small difference component is sampled using switched-capacitor integrator with a fully differential amplifier. The sampling is performed over many integration cycles to achieve appropriate amplification. The lock-in pixels utilizes high-speed lateral electric field charge modulator (LEFM) to demodulate the SRS signal which is modulated at high-frequency of 20MHz. A prototype chip is implemented using 0.11μm CMOS image sensor technology.

  18. A low-noise CMOS pixel direct charge sensor, Topmetal-II-

    NASA Astrophysics Data System (ADS)

    An, Mangmang; Chen, Chufeng; Gao, Chaosong; Han, Mikyung; Ji, Rong; Li, Xiaoting; Mei, Yuan; Sun, Quan; Sun, Xiangming; Wang, Kai; Xiao, Le; Yang, Ping; Zhou, Wei

    2016-02-01

    We report the design and characterization of a CMOS pixel direct charge sensor, Topmetal-II-, fabricated in a standard 0.35 μm CMOS Integrated Circuit process. The sensor utilizes exposed metal patches on top of each pixel to directly collect charge. Each pixel contains a low-noise charge-sensitive preamplifier to establish the analog signal and a discriminator with tunable threshold to generate hits. The analog signal from each pixel is accessible through time-shared multiplexing over the entire array. Hits are read out digitally through a column-based priority logic structure. Tests show that the sensor achieved a < 15e- analog noise and a 200e- minimum threshold for digital readout per pixel. The sensor is capable of detecting both electrons and ions drifting in gas. These characteristics enable its use as the charge readout device in future Time Projection Chambers without gaseous gain mechanism, which has unique advantages in low background and low rate-density experiments.

  19. Denoising Algorithm for the Pixel-Response Non-Uniformity Correction of a Scientific CMOS Under Low Light Conditions

    NASA Astrophysics Data System (ADS)

    Hu, Changmiao; Bai, Yang; Tang, Ping

    2016-06-01

    We present a denoising algorithm for the pixel-response non-uniformity correction of a scientific complementary metal-oxide-semiconductor (CMOS) image sensor, which captures images under extremely low-light conditions. By analyzing the integrating sphere experimental data, we present a pixel-by-pixel flat-field denoising algorithm to remove this fixed pattern noise, which occur in low-light conditions and high pixel response readouts. The response of the CMOS image sensor imaging system to the uniform radiance field shows a high level of spatial uniformity after the denoising algorithm has been applied.

  20. Pixel response function experimental techniques and analysis of active pixel sensor star cameras

    NASA Astrophysics Data System (ADS)

    Fumo, Patrick; Waldron, Erik; Laine, Juha-Pekka; Evans, Gary

    2015-04-01

    The pixel response function (PRF) of a pixel within a focal plane is defined as the pixel intensity with respect to the position of a point source within the pixel. One of its main applications is in the field of astrometry, which is a branch of astronomy that deals with positioning data of a celestial body for tracking movement or adjusting the attitude of a spacecraft. Complementary metal oxide semiconductor (CMOS) image sensors generally offer better radiation tolerance to protons and heavy ions than CCDs making them ideal candidates for space applications aboard satellites, but like all image sensors they are limited by their spatial frequency response, better known as the modulation transfer function. Having a well-calibrated PRF allows us to eliminate some of the uncertainty in the spatial response of the system providing better resolution and a more accurate centroid estimation. This paper describes the experimental setup for determining the PRF of a CMOS image sensor and analyzes the effect on the oversampled point spread function (PSF) of an image intensifier, as well as the effects due to the wavelength of light used as a point source. It was found that using electron bombarded active pixel sensor (EBAPS) intensification technology had a significant impact on the PRF of the camera being tested as a result of an increase in the amount of carrier diffusion between collection sites generated by the intensification process. Taking the full width at half maximum (FWHM) of the resulting data, it was found that the intensified version of a CMOS camera exhibited a PSF roughly 16.42% larger than its nonintensified counterpart.

  1. Ultra-thin silicon (UTSi) on insulator CMOS transceiver and time-division multiplexed switch chips for smart pixel integration

    NASA Astrophysics Data System (ADS)

    Zhang, Liping; Sawchuk, Alexander A.

    2001-12-01

    We describe the design, fabrication and functionality of two different 0.5 micron CMOS optoelectronic integrated circuit (OEIC) chips based on the Peregrine Semiconductor Ultra-Thin Silicon on insulator technology. The Peregrine UTSi silicon- on-sapphire (SOS) technology is a member of the silicon-on- insulator (SOI) family. The low-loss synthetic sapphire substrate is optically transparent and has good thermal conductivity and coefficient of thermal expansion properties, which meet the requirements for flip-chip bonding of VCSELs and other optoelectronic input-output components. One chip contains transceiver and network components, including four channel high-speed CMOS transceiver modules, pseudo-random bit stream (PRBS) generators, a voltage controlled oscillator (VCO) and other test circuits. The transceiver chips can operate in both self-testing mode and networking mode. An on- chip clock and true-single-phase-clock (TSPC) D-flip-flop have been designed to generate a PRBS at over 2.5 Gb/s for the high-speed transceiver arrays to operate in self-testing mode. In the networking mode, an even number of transceiver chips forms a ring network through free-space or fiber ribbon interconnections. The second chip contains four channel optical time-division multiplex (TDM) switches, optical transceiver arrays, an active pixel detector and additional test devices. The eventual applications of these chips will require monolithic OEICs with integrated optical input and output. After fabrication and testing, the CMOS transceiver array dies will be packaged with 850 nm vertical cavity surface emitting lasers (VCSELs), and metal-semiconductor- metal (MSM) or GaAs p-i-n detector die arrays to achieve high- speed optical interconnections. The hybrid technique could be either wire bonding or flip-chip bonding of the CMOS SOS smart-pixel arrays with arrays of VCSELs and photodetectors onto an optoelectronic chip carrier as a multi-chip module (MCM).

  2. Image sensor pixel with on-chip high extinction ratio polarizer based on 65-nm standard CMOS technology.

    PubMed

    Sasagawa, Kiyotaka; Shishido, Sanshiro; Ando, Keisuke; Matsuoka, Hitoshi; Noda, Toshihiko; Tokuda, Takashi; Kakiuchi, Kiyomi; Ohta, Jun

    2013-05-06

    In this study, we demonstrate a polarization sensitive pixel for a complementary metal-oxide-semiconductor (CMOS) image sensor based on 65-nm standard CMOS technology. Using such a deep-submicron CMOS technology, it is possible to design fine metal patterns smaller than the wavelengths of visible light by using a metal wire layer. We designed and fabricated a metal wire grid polarizer on a 20 × 20 μm(2) pixel for image sensor. An extinction ratio of 19.7 dB was observed at a wavelength 750 nm.

  3. Pixel-based characterisation of CMOS high-speed camera systems

    NASA Astrophysics Data System (ADS)

    Weber, V.; Brübach, J.; Gordon, R. L.; Dreizler, A.

    2011-05-01

    Quantifying high-repetition rate laser diagnostic techniques for measuring scalars in turbulent combustion relies on a complete description of the relationship between detected photons and the signal produced by the detector. CMOS-chip based cameras are becoming an accepted tool for capturing high frame rate cinematographic sequences for laser-based techniques such as Particle Image Velocimetry (PIV) and Planar Laser Induced Fluorescence (PLIF) and can be used with thermographic phosphors to determine surface temperatures. At low repetition rates, imaging techniques have benefitted from significant developments in the quality of CCD-based camera systems, particularly with the uniformity of pixel response and minimal non-linearities in the photon-to-signal conversion. The state of the art in CMOS technology displays a significant number of technical aspects that must be accounted for before these detectors can be used for quantitative diagnostics. This paper addresses these issues.

  4. Large monolithic particle pixel-detector in high-voltage CMOS technology

    NASA Astrophysics Data System (ADS)

    Perić, I.; Takacs, C.

    2010-12-01

    A large monolithic particle pixel-detector implemented as system on a chip in a high-voltage 0.35 μm CMOS technology will be presented. The detector uses high-voltage n-well/p-substrate diodes as pixel-sensors. The diodes can be reversely biased with more than 60 V. In this way, depleted zones of about 10 μm thickness are formed, where the signal charges can be collected by drift. Due to fast charge collection in the strong electric-field zones, a higher radiation tolerance of the sensor is expected than in the case of the standard MAPS detectors. Simple pixel-readout electronics are implemented inside the n-wells. The readout is based on a source follower with one select- and two reset-transistors. Due to embedding of the pixel-readout electronics inside the collecting electrodes (n-wells) there are no insensitive zones within the pixel matrix. The detector chip contains a 128×128 matrix consisting of pixels of 21×21 μm2 -size. The diode voltages of one selected pixel-row are received at the bottom of the matrix by 128 eight-bit single-slope ADCs. All ADCs operate in parallel. The ADC codes are read out using eight LVDS 500 MBit/s output links. The readout electronics are designed to allow the readout of the whole pixel matrix in less than 50 μs. The total DC power consumption of the chip is 50 mW. All analog parts of the chip are implemented using radiation-hard layout techniques. Experimental results will be presented.

  5. Optical confinement methods for continued scaling of CMOS image sensor pixels.

    PubMed

    Fesenmaier, Christian C; Huo, Yijie; Catrysse, Peter B

    2008-12-08

    The pixels that make up CMOS image sensors have steadily decreased in size over the last decade. This scaling has two effects: first, the amount of light incident on each pixel decreases, making optical efficiency, i.e., the collection of each photon, more important. Second, diffraction comes into play when pixel size approaches the wavelength of visible light, resulting in increased spatial optical crosstalk. To address these two effects, we investigate and compare three methods for guiding incident light from the microlens down to the photodiode. Two of these techniques rely on total internal reflection (TIR) at the boundary between dielectric media of different refractive indices, while the third uses reflection at a metal-dielectric interface to confine the light. Simulations are performed using a finite-difference time-domain (FDTD) method on a realistic 1.75-mum pixel model for on-axis as well as angled incidence. We evaluate the optical efficiency and spatial crosstalk performance of these methods compared to a reference pixel and find significant (10%) improvement for the TIR designs with properly chosen parameters and nearly full spatial crosstalk elimination using metal to confine the light. We also show that these improvements are comparable to those achieved by thinning the image sensor stack.

  6. Noise optimization of the source follower of a CMOS pixel using BSIM3 noise model

    NASA Astrophysics Data System (ADS)

    Mahato, Swaraj; Meynants, Guy; Raskin, Gert; De Ridder, J.; Van Winckel, H.

    2016-07-01

    CMOS imagers are becoming increasingly popular in astronomy. A very low noise level is required to observe extremely faint targets and to get high-precision flux measurements. Although CMOS technology offers many advantages over CCDs, a major bottleneck is still the read noise. To move from an industrial CMOS sensor to one suitable for scientific applications, an improved design that optimizes the noise level is essential. Here, we study the 1/f and thermal noise performance of the source follower (SF) of a CMOS pixel in detail. We identify the relevant design parameters, and analytically study their impact on the noise level using the BSIM3v3 noise model with an enhanced model of gate capacitance. Our detailed analysis shows that the dependence of the 1/f noise on the geometrical size of the source follower is not limited to minimum channel length, compared to the classical approach to achieve the minimum 1/f noise. We derive the optimal gate dimensions (the width and the length) of the source follower that minimize the 1/f noise, and validate our results using numerical simulations. By considering the thermal noise or white noise along with 1/f noise, the total input noise of the source follower depends on the capacitor ratio CG/CFD and the drain current (Id). Here, CG is the total gate capacitance of the source follower and CFD is the total floating diffusion capacitor at the input of the source follower. We demonstrate that the optimum gate capacitance (CG) depends on the chosen bias current but ranges from CFD/3 to CFD to achieve the minimum total noise of the source follower. Numerical calculation and circuit simulation with 180nm CMOS technology are performed to validate our results.

  7. A high speed, low power consumption LVDS interface for CMOS pixel sensors

    NASA Astrophysics Data System (ADS)

    Shi, Zhan; Tang, Zhenan; Tian, Yong; Pham, Hung; Valin, Isabelle; Jaaskelainen, Kimmo

    2015-01-01

    The use of CMOS Pixel Sensors (CPSs) offers a promising approach to the design of vertex detectors in High Energy Physics (HEP) experiments. As the CPS equipping the upgraded Solenoidal Tracker at RHIC (STAR) pixel detector, ULTIMATE perfectly illustrates the potential of CPSs for HEP applications. However, further development of CPSs with respect to readout speed is required to fulfill the readout time requirement of the next generation HEP detectors, such as the upgrade of A Large Ion Collider Experiment (ALICE) Inner Tracking System (ITS), the International Linear Collider (ILC), and the Compressed Baryonic Matter (CBM) vertex detectors. One actual limitation of CPSs is related to the speed of the Low-Voltage Differential Signaling (LVDS) circuitry implementing the interface between the sensor and the Data Acquisition (DAQ) system. To improve the transmission rate while keeping the power consumption at a low level, a source termination technique and a special current comparator were adopted for the LVDS driver and receiver, respectively. Moreover, hardening techniques are used. The circuitry was designed and submitted for fabrication in a 0.18-μm CMOS Image Sensor (CIS) process at the end of 2011. The test results indicated that the LVDS driver and receiver can operate properly at the data rate of 1.2 Gb/s with power consumption of 19.6 mW.

  8. Active-Pixel Image Sensor With Analog-To-Digital Converters

    NASA Technical Reports Server (NTRS)

    Fossum, Eric R.; Mendis, Sunetra K.; Pain, Bedabrata; Nixon, Robert H.

    1995-01-01

    Proposed single-chip integrated-circuit image sensor contains 128 x 128 array of active pixel sensors at 50-micrometer pitch. Output terminals of all pixels in each given column connected to analog-to-digital (A/D) converter located at bottom of column. Pixels scanned in semiparallel fashion, one row at time; during time allocated to scanning row, outputs of all active pixel sensors in row fed to respective A/D converters. Design of chip based on complementary metal oxide semiconductor (CMOS) technology, and individual circuit elements fabricated according to 2-micrometer CMOS design rules. Active pixel sensors designed to operate at video rate of 30 frames/second, even at low light levels. A/D scheme based on first-order Sigma-Delta modulation.

  9. A 65 nm CMOS analog processor with zero dead time for future pixel detectors

    NASA Astrophysics Data System (ADS)

    Gaioni, L.; Braga, D.; Christian, D. C.; Deptuch, G.; Fahim, F.; Nodari, B.; Ratti, L.; Re, V.; Zimmerman, T.

    2017-02-01

    Next generation pixel chips at the High-Luminosity (HL) LHC will be exposed to extremely high levels of radiation and particle rates. In the so-called Phase II upgrade, ATLAS and CMS will need a completely new tracker detector, complying with the very demanding operating conditions and the delivered luminosity (up to 5×1034 cm-2 s-1 in the next decade). This work is concerned with the design of a synchronous analog processor with zero dead time developed in a 65 nm CMOS technology, conceived for pixel detectors at the HL-LHC experiment upgrades. It includes a low noise, fast charge sensitive amplifier featuring a detector leakage compensation circuit, and a compact, single ended comparator that guarantees very good performance in terms of channel-to-channel dispersion of threshold without needing any pixel-level trimming. A flash ADC is exploited for digital conversion immediately after the charge amplifier. A thorough discussion on the design of the charge amplifier and the comparator is provided along with an exhaustive set of simulation results.

  10. Reset noise suppression in two-dimensional CMOS photodiode pixels through column-based feedback-reset

    NASA Technical Reports Server (NTRS)

    Pain, B.; Cunningham, T. J.; Hancock, B.; Yang, G.; Seshadri, S.; Ortiz, M.

    2002-01-01

    We present new CMOS photodiode imager pixel with ultra-low read noise through on-chip suppression of reset noise via column-based feedback circuitry. The noise reduction is achieved without introducing any image lag, and with insignificant reduction in quantum efficiency and full well.

  11. A Low-Noise CMOS THz Imager Based on Source Modulation and an In-Pixel High-Q Passive Switched-Capacitor N-Path Filter.

    PubMed

    Boukhayma, Assim; Dupret, Antoine; Rostaing, Jean-Pierre; Enz, Christian

    2016-03-03

    This paper presents the first low noise complementary metal oxide semiconductor (CMOS) deletedCMOS terahertz (THz) imager based on source modulation and in-pixel high-Q filtering. The 31 × 31 focal plane array has been fully integrated in a 0 . 13 μ m standard CMOS process. The sensitivity has been improved significantly by modulating the active THz source that lights the scene and performing on-chip high-Q filtering. Each pixel encompass a broadband bow tie antenna coupled to an N-type metal-oxide-semiconductor (NMOS) detector that shifts the THz radiation, a low noise adjustable gain amplifier and a high-Q filter centered at the modulation frequency. The filter is based on a passive switched-capacitor (SC) N-path filter combined with a continuous-time broad-band Gm-C filter. A simplified analysis that helps in designing and tuning the passive SC N-path filter is provided. The characterization of the readout chain shows that a Q factor of 100 has been achieved for the filter with a good matching between the analytical calculation and the measurement results. An input-referred noise of 0 . 2 μ V RMS has been measured. Characterization of the chip with different THz wavelengths confirms the broadband feature of the antenna and shows that this THz imager reaches a total noise equivalent power of 0 . 6 nW at 270 GHz and 0 . 8 nW at 600 GHz.

  12. First measurement of the in-pixel electron multiplying with a standard imaging CMOS technology: Study of the EMCMOS concept

    NASA Astrophysics Data System (ADS)

    Brugière, Timothée; Mayer, Fréderic; Fereyre, Pierre; Guérin, Cyrille; Dominjon, Agnés; Barbier, Rémi

    2015-07-01

    Scientific low light imaging devices benefit today from designs for pushing the mean noise to the single electron level. When readout noise reduction reaches its limit, signal-to-noise ratio improvement can be driven by an electron multiplication process, driven by impact ionization, before adding the readout noises. This concept already implemented in CCD structures using extra-pixel shift registers can today be integrated inside each pixel in CMOS technology. The EBCMOS group at IPNL is in charge of the characterization of new prototypes developed by E2V using this concept: the electron multiplying CMOS (EMCMOS). The CMOS technology enables electron multiplication inside the photodiode itself, and thus, an overlap of the charge integration and multiplication. A new modeling has been developed to describe the output signal mean and variance after the impact ionization process in such a case. In this paper the feasibility of impact ionization process inside a 8 μm-pitch pixel is demonstrated. The new modeling is also validated by data and a value of 0.32% is obtained for the impact ionization parameter α with an electric field intensity of 24 V / μm.

  13. Tracking and flavour-tagging performance for HV-CMOS sensors in the context of the ATLAS ITK pixel simulation program

    NASA Astrophysics Data System (ADS)

    Calandri, A.; Vacavant, L.; Barbero, M.; Rozanov, A.; Djama, F.

    2016-12-01

    The HV-CMOS (High Voltage - Complementary Metal-Oxide Semiconductor) pixel technology has recently risen interest for the upgrade of the pixel detector of the ATLAS experiment towards the High Luminosity phase of the Large Hadron Collider (LHC) . HV-CMOS sensors can be employed in the pixel outer layers (R >15 cm), where the radiation hardness requirements are less stringent, as they could instrument large areas at a relatively low cost. In addition, smaller pixel granularity can be achieved by exploiting sub-pixel encoding technology. Therefore, the largest impact on physics performance, tracking and flavour tagging, could be reached if exploited in the innermost layer (in place of the current IBL) or in the next-to-innermost layer. This proceeding will present studies on tracking and flavour-tagging performance in presence of HV-CMOS sensors in the innermost layer of the ATLAS detector.

  14. Active Pixel Sensors: Are CCD's Dinosaurs?

    NASA Technical Reports Server (NTRS)

    Fossum, Eric R.

    1993-01-01

    Charge-coupled devices (CCD's) are presently the technology of choice for most imaging applications. In the 23 years since their invention in 1970, they have evolved to a sophisticated level of performance. However, as with all technologies, we can be certain that they will be supplanted someday. In this paper, the Active Pixel Sensor (APS) technology is explored as a possible successor to the CCD. An active pixel is defined as a detector array technology that has at least one active transistor within the pixel unit cell. The APS eliminates the need for nearly perfect charge transfer -- the Achilles' heel of CCDs. This perfect charge transfer makes CCD's radiation 'soft,' difficult to use under low light conditions, difficult to manufacture in large array sizes, difficult to integrate with on-chip electronics, difficult to use at low temperatures, difficult to use at high frame rates, and difficult to manufacture in non-silicon materials that extend wavelength response.

  15. Charge collection and non-ionizing radiation tolerance of CMOS pixel sensors using a 0.18 μm CMOS process

    NASA Astrophysics Data System (ADS)

    Zhang, Ying; Zhu, Hongbo; Zhang, Liang; Fu, Min

    2016-09-01

    The proposed Circular Electron Positron Collider (CEPC) will be primarily aimed for precision measurements of the discovered Higgs boson. Its innermost vertex detector, which will play a critical role in heavy-flavor tagging, must be constructed with fine-pitched silicon pixel sensors with low power consumption and fast readout. CMOS pixel sensor (CPS), as one of the most promising candidate technologies, has already demonstrated its excellent performance in several high energy physics experiments. Therefore it has been considered for R&D for the CEPC vertex detector. In this paper, we present the preliminary studies to improve the collected signal charge over the equivalent input capacitance ratio (Q / C), which will be crucial to reduce the analog power consumption. We have performed detailed 3D device simulation and evaluated potential impacts from diode geometry, epitaxial layer properties and non-ionizing radiation damage. We have proposed a new approach to improve the treatment of the boundary conditions in simulation. Along with the TCAD simulation, we have designed the exploratory prototype utilizing the TowerJazz 0.18 μm CMOS imaging sensor process and we will verify the simulation results with future measurements.

  16. MONOLITHIC ACTIVE PIXEL MATRIX WITH BINARY COUNTERS IN AN SOI PROCESS.

    SciTech Connect

    DUPTUCH,G.; YAREMA, R.

    2007-06-07

    The design of a Prototype monolithic active pixel matrix, designed in a 0.15 {micro}m CMOS SOI Process, is presented. The process allowed connection between the electronics and the silicon volume under the layer of buried oxide (BOX). The small size vias traversing through the BOX and implantation of small p-type islands in the n-type bulk result in a monolithic imager. During the acquisition time, all pixels register individual radiation events incrementing the counters. The counting rate is up to 1 MHz per pixel. The contents of counters are shifted out during the readout phase. The designed prototype is an array of 64 x 64 pixels and the pixel size is 26 x 26 {micro}m{sup 2}.

  17. A Stimulated Raman Scattering CMOS Pixel Using a High-Speed Charge Modulator and Lock-in Amplifier

    PubMed Central

    Lioe, De Xing; Mars, Kamel; Kawahito, Shoji; Yasutomi, Keita; Kagawa, Keiichiro; Yamada, Takahiro; Hashimoto, Mamoru

    2016-01-01

    A complementary metal-oxide semiconductor (CMOS) lock-in pixel to observe stimulated Raman scattering (SRS) using a high speed lateral electric field modulator (LEFM) for photo-generated charges and in-pixel readout circuits is presented. An effective SRS signal generated after the SRS process is very small and needs to be extracted from an extremely large offset due to a probing laser signal. In order to suppress the offset components while amplifying high-frequency modulated small SRS signal components, the lock-in pixel uses a high-speed LEFM for demodulating the SRS signal, resistor-capacitor low-pass filter (RC-LPF) and switched-capacitor (SC) integrator with a fully CMOS differential amplifier. AC (modulated) components remained in the RC-LPF outputs are eliminated by the phase-adjusted sampling with the SC integrator and the demodulated DC (unmodulated) components due to the SRS signal are integrated over many samples in the SC integrator. In order to suppress further the residual offset and the low frequency noise (1/f noise) components, a double modulation technique is introduced in the SRS signal measurements, where the phase of high-frequency modulated laser beam before irradiation of a specimen is modulated at an intermediate frequency and the demodulation is done at the lock-in pixel output. A prototype chip for characterizing the SRS lock-in pixel is implemented and a successful operation is demonstrated. The reduction effects of residual offset and 1/f noise components are confirmed by the measurements. A ratio of the detected small SRS to offset a signal of less than 10−5 is experimentally demonstrated, and the SRS spectrum of a Benzonitrile sample is successfully observed. PMID:27089339

  18. A Stimulated Raman Scattering CMOS Pixel Using a High-Speed Charge Modulator and Lock-in Amplifier.

    PubMed

    Lioe, De Xing; Mars, Kamel; Kawahito, Shoji; Yasutomi, Keita; Kagawa, Keiichiro; Yamada, Takahiro; Hashimoto, Mamoru

    2016-04-13

    A complementary metal-oxide semiconductor (CMOS) lock-in pixel to observe stimulated Raman scattering (SRS) using a high speed lateral electric field modulator (LEFM) for photo-generated charges and in-pixel readout circuits is presented. An effective SRS signal generated after the SRS process is very small and needs to be extracted from an extremely large offset due to a probing laser signal. In order to suppress the offset components while amplifying high-frequency modulated small SRS signal components, the lock-in pixel uses a high-speed LEFM for demodulating the SRS signal, resistor-capacitor low-pass filter (RC-LPF) and switched-capacitor (SC) integrator with a fully CMOS differential amplifier. AC (modulated) components remained in the RC-LPF outputs are eliminated by the phase-adjusted sampling with the SC integrator and the demodulated DC (unmodulated) components due to the SRS signal are integrated over many samples in the SC integrator. In order to suppress further the residual offset and the low frequency noise (1/f noise) components, a double modulation technique is introduced in the SRS signal measurements, where the phase of high-frequency modulated laser beam before irradiation of a specimen is modulated at an intermediate frequency and the demodulation is done at the lock-in pixel output. A prototype chip for characterizing the SRS lock-in pixel is implemented and a successful operation is demonstrated. The reduction effects of residual offset and 1/f noise components are confirmed by the measurements. A ratio of the detected small SRS to offset a signal of less than 10(-)⁵ is experimentally demonstrated, and the SRS spectrum of a Benzonitrile sample is successfully observed.

  19. Characterization of the column-based priority logic readout of Topmetal-II‑ CMOS pixel direct charge sensor

    NASA Astrophysics Data System (ADS)

    An, M.; Zhang, W.; Xiao, L.; Gao, C.; Chen, C.; Han, M.; Huang, G.; Ji, R.; Li, X.; Liu, J.; Mei, Y.; Pei, H.; Sun, Q.; Sun, X.; Wang, K.; Yang, P.; Zhou, W.

    2017-03-01

    We present the detailed study of the digital readout of Topmetal-II- CMOS pixel direct charge sensor. Topmetal-II- is an integrated sensor with an array of 72×72 pixels each capable of directly collecting external charge through exposed metal electrodes in the topmost metal layer. In addition to the time-shared multiplexing readout of the analog output from Charge Sensitive Amplifiers in each pixel, hits are also generated through comparators in each pixel with individually adjustable thresholds. The hits are read out via a column-based priority logic structure, retaining both hit location and time information. The in-array column-based priority logic features with a full clock-less circuitry hence there is no continuously running clock distributed in the pixel and matrix logic. These characteristics enable its use as the charge readout device in future Time Projection Chambers without gaseous gain mechanism, which has unique advantages in low background and low rate-density experiments. We studied the detailed working behavior and performance of this readout, and demonstrated its functional validity and potential in imaging applications.

  20. Front-end electronics in a 65 nm CMOS process for high density readout of pixel sensors

    NASA Astrophysics Data System (ADS)

    Gaioni, Luigi; Manghisoni, Massimo; Ratti, Lodovico; Re, Valerio; Traversi, Gianluca

    2011-09-01

    In future high energy physics experiments (HEP), readout integrated circuits for vertexing and tracking applications will be implemented by means of CMOS devices belonging to processes with minimum feature size in the 100 nm span. In these nanoscale technologies the impact of new dielectric materials and processing techniques on the analog behavior of MOSFETs has to be carefully evaluated. This paper is concerned with the study of the analog properties, in particular in terms of noise performance and radiation hardness, of MOSFET devices belonging to a 65 nm CMOS low power technology. The behavior of the 1/ f and white noise terms is studied as a function of the main device parameters before and after exposure to 10 keV X-rays and 60Co γ-rays. A prototype chip designed in a 65 nm CMOS process including deep n-well MAPS structures and a fast front-end conceived for the readout of high-resistivity pixel sensors will be introduced.

  1. Active pixel sensor with intra-pixel charge transfer

    NASA Technical Reports Server (NTRS)

    Fossum, Eric R. (Inventor); Mendis, Sunetra (Inventor); Kemeny, Sabrina E. (Inventor)

    1995-01-01

    An imaging device formed as a monolithic complementary metal oxide semiconductor integrated circuit in an industry standard complementary metal oxide semiconductor process, the integrated circuit including a focal plane array of pixel cells, each one of the cells including a photogate overlying the substrate for accumulating photo-generated charge in an underlying portion of the substrate, a readout circuit including at least an output field effect transistor formed in the substrate, and a charge coupled device section formed on the substrate adjacent the photogate having a sensing node connected to the output transistor and at least one charge coupled device stage for transferring charge from the underlying portion of the substrate to the sensing node.

  2. Active pixel sensor with intra-pixel charge transfer

    NASA Technical Reports Server (NTRS)

    Fossum, Eric R. (Inventor); Mendis, Sunetra (Inventor); Kemeny, Sabrina E. (Inventor)

    2003-01-01

    An imaging device formed as a monolithic complementary metal oxide semiconductor integrated circuit in an industry standard complementary metal oxide semiconductor process, the integrated circuit including a focal plane array of pixel cells, each one of the cells including a photogate overlying the substrate for accumulating photo-generated charge in an underlying portion of the substrate, a readout circuit including at least an output field effect transistor formed in the substrate, and a charge coupled device section formed on the substrate adjacent the photogate having a sensing node connected to the output transistor and at least one charge coupled device stage for transferring charge from the underlying portion of the substrate to the sensing node.

  3. Active pixel sensor with intra-pixel charge transfer

    NASA Technical Reports Server (NTRS)

    Fossum, Eric R. (Inventor); Mendis, Sunetra (Inventor); Kemeny, Sabrina E. (Inventor)

    2004-01-01

    An imaging device formed as a monolithic complementary metal oxide semiconductor integrated circuit in an industry standard complementary metal oxide semiconductor process, the integrated circuit including a focal plane array of pixel cells, each one of the cells including a photogate overlying the substrate for accumulating photo-generated charge in an underlying portion of the substrate, a readout circuit including at least an output field effect transistor formed in the substrate, and a charge coupled device section formed on the substrate adjacent the photogate having a sensing node connected to the output transistor and at least one charge coupled device stage for transferring charge from the underlying portion of the substrate to the sensing node.

  4. Active pixel sensor array with electronic shuttering

    NASA Technical Reports Server (NTRS)

    Fossum, Eric R. (Inventor)

    2002-01-01

    An active pixel cell includes electronic shuttering capability. The cell can be shuttered to prevent additional charge accumulation. One mode transfers the current charge to a storage node that is blocked against accumulation of optical radiation. The charge is sampled from a floating node. Since the charge is stored, the node can be sampled at the beginning and the end of every cycle. Another aspect allows charge to spill out of the well whenever the charge amount gets higher than some amount, thereby providing anti blooming.

  5. ALPIDE, the Monolithic Active Pixel Sensor for the ALICE ITS upgrade

    NASA Astrophysics Data System (ADS)

    Mager, M.

    2016-07-01

    A new 10 m2 inner tracking system based on seven concentric layers of Monolithic Active Pixel Sensors will be installed in the ALICE experiment during the second long shutdown of LHC in 2019-2020. The monolithic pixel sensors will be fabricated in the 180 nm CMOS Imaging Sensor process of TowerJazz. The ALPIDE design takes full advantage of a particular process feature, the deep p-well, which allows for full CMOS circuitry within the pixel matrix, while at the same time retaining the full charge collection efficiency. Together with the small feature size and the availability of six metal layers, this allowed a continuously active low-power front-end to be placed into each pixel and an in-matrix sparsification circuit to be used that sends only the addresses of hit pixels to the periphery. This approach led to a power consumption of less than 40 mWcm-2, a spatial resolution of around 5 μm, a peaking time of around 2 μs, while being radiation hard to some 1013 1 MeVneq /cm2, fulfilling or exceeding the ALICE requirements. Over the last years of R & D, several prototype circuits have been used to verify radiation hardness, and to optimize pixel geometry and in-pixel front-end circuitry. The positive results led to a submission of full-scale (3 cm×1.5 cm) sensor prototypes in 2014. They are being characterized in a comprehensive campaign that also involves several irradiation and beam tests. A summary of the results obtained and prospects towards the final sensor to instrument the ALICE Inner Tracking System are given.

  6. A Low-Noise CMOS THz Imager Based on Source Modulation and an In-Pixel High-Q Passive Switched-Capacitor N-Path Filter

    PubMed Central

    Boukhayma, Assim; Dupret, Antoine; Rostaing, Jean-Pierre; Enz, Christian

    2016-01-01

    This paper presents the first low noise complementary metal oxide semiconductor (CMOS) terahertz (THz) imager based on source modulation and in-pixel high-Q filtering. The 31×31 focal plane array has been fully integrated in a 0.13μm standard CMOS process. The sensitivity has been improved significantly by modulating the active THz source that lights the scene and performing on-chip high-Q filtering. Each pixel encompass a broadband bow tie antenna coupled to an N-type metal-oxide-semiconductor (NMOS) detector that shifts the THz radiation, a low noise adjustable gain amplifier and a high-Q filter centered at the modulation frequency. The filter is based on a passive switched-capacitor (SC) N-path filter combined with a continuous-time broad-band Gm-C filter. A simplified analysis that helps in designing and tuning the passive SC N-path filter is provided. The characterization of the readout chain shows that a Q factor of 100 has been achieved for the filter with a good matching between the analytical calculation and the measurement results. An input-referred noise of 0.2μV RMS has been measured. Characterization of the chip with different THz wavelengths confirms the broadband feature of the antenna and shows that this THz imager reaches a total noise equivalent power of 0.6 nW at 270 GHz and 0.8 nW at 600 GHz. PMID:26950131

  7. Recent progress in the development of a B-factory monolithic active pixel detector

    NASA Astrophysics Data System (ADS)

    Stanič, S.; Aihara, H.; Barbero, M.; Bozek, A.; Browder, T.; Hazumi, M.; Kennedy, J.; Kent, N.; Olsen, S.; Palka, H.; Rosen, M.; Ruckman, L.; Trabelsi, K.; Tsuboyama, T.; Uchida, K.; Varner, G.; Yang, Q.

    2006-11-01

    Due to the need for precise vertexing at future higher luminosity B-factories with the expectedly increasing track densities and radiation exposures, upgrade of present silicon strip detectors with thin, radiation resistant pixel detectors is highly desired. Considerable progress in the technological development of thin CMOS based Monolithic Active Pixel Sensors (MAPS) in the last years makes them a realistic upgrade option and the feasibility studies of their application in Belle are actively pursued. The most serious concerns are their radiation hardness and their read-out speed. To address them, several prototypes denoted as Continuous Acquisition Pixel (CAP) sensors have been developed and tested. The latest of the CAP sensor prototypes is CAP3, designed in the TSMC 0.25 μm process with a 5-deep sample pair pipeline in each pixel. A setup with several CAP3 sensors will be used to assess the performance of a full scale pixel read-out system running at realistic read-out speed. The results and plans for the next stages of R&D towards a full Pixel Vertex Detector (PVD) are presented.

  8. CMOS active pixel sensor type imaging system on a chip

    NASA Technical Reports Server (NTRS)

    Fossum, Eric R. (Inventor); Nixon, Robert (Inventor)

    2011-01-01

    A single chip camera which includes an .[.intergrated.]. .Iadd.integrated .Iaddend.image acquisition portion and control portion and which has double sampling/noise reduction capabilities thereon. Part of the .[.intergrated.]. .Iadd.integrated .Iaddend.structure reduces the noise that is picked up during imaging.

  9. A 256 pixel magnetoresistive biosensor microarray in 0.18μm CMOS

    PubMed Central

    Hall, Drew A.; Gaster, Richard S.; Makinwa, Kofi; Wang, Shan X.; Murmann, Boris

    2014-01-01

    Magnetic nanotechnologies have shown significant potential in several areas of nanomedicine such as imaging, therapeutics, and early disease detection. Giant magnetoresistive spin-valve (GMR SV) sensors coupled with magnetic nanotags (MNTs) possess great promise as ultra-sensitive biosensors for diagnostics. We report an integrated sensor interface for an array of 256 GMR SV biosensors designed in 0.18 μm CMOS. Arranged like an imager, each of the 16 column level readout channels contains an analog front- end and a compact ΣΔ modulator (0.054 mm2) with 84 dB of dynamic range and an input referred noise of 49 nT/√Hz. Performance is demonstrated through detection of an ovarian cancer biomarker, secretory leukocyte peptidase inhibitor (SLPI), spiked at concentrations as low as 10 fM. This system is designed as a replacement for optical protein microarrays while also providing real-time kinetics monitoring. PMID:24761029

  10. A 256 pixel magnetoresistive biosensor microarray in 0.18μm CMOS.

    PubMed

    Hall, Drew A; Gaster, Richard S; Makinwa, Kofi; Wang, Shan X; Murmann, Boris

    2013-05-01

    Magnetic nanotechnologies have shown significant potential in several areas of nanomedicine such as imaging, therapeutics, and early disease detection. Giant magnetoresistive spin-valve (GMR SV) sensors coupled with magnetic nanotags (MNTs) possess great promise as ultra-sensitive biosensors for diagnostics. We report an integrated sensor interface for an array of 256 GMR SV biosensors designed in 0.18 μm CMOS. Arranged like an imager, each of the 16 column level readout channels contains an analog front- end and a compact ΣΔ modulator (0.054 mm(2)) with 84 dB of dynamic range and an input referred noise of 49 nT/√Hz. Performance is demonstrated through detection of an ovarian cancer biomarker, secretory leukocyte peptidase inhibitor (SLPI), spiked at concentrations as low as 10 fM. This system is designed as a replacement for optical protein microarrays while also providing real-time kinetics monitoring.

  11. CMOS Image Sensors for High Speed Applications

    PubMed Central

    El-Desouki, Munir; Deen, M. Jamal; Fang, Qiyin; Liu, Louis; Tse, Frances; Armstrong, David

    2009-01-01

    Recent advances in deep submicron CMOS technologies and improved pixel designs have enabled CMOS-based imagers to surpass charge-coupled devices (CCD) imaging technology for mainstream applications. The parallel outputs that CMOS imagers can offer, in addition to complete camera-on-a-chip solutions due to being fabricated in standard CMOS technologies, result in compelling advantages in speed and system throughput. Since there is a practical limit on the minimum pixel size (4∼5 μm) due to limitations in the optics, CMOS technology scaling can allow for an increased number of transistors to be integrated into the pixel to improve both detection and signal processing. Such smart pixels truly show the potential of CMOS technology for imaging applications allowing CMOS imagers to achieve the image quality and global shuttering performance necessary to meet the demands of ultrahigh-speed applications. In this paper, a review of CMOS-based high-speed imager design is presented and the various implementations that target ultrahigh-speed imaging are described. This work also discusses the design, layout and simulation results of an ultrahigh acquisition rate CMOS active-pixel sensor imager that can take 8 frames at a rate of more than a billion frames per second (fps). PMID:22389609

  12. CMOS Image Sensors for High Speed Applications.

    PubMed

    El-Desouki, Munir; Deen, M Jamal; Fang, Qiyin; Liu, Louis; Tse, Frances; Armstrong, David

    2009-01-01

    Recent advances in deep submicron CMOS technologies and improved pixel designs have enabled CMOS-based imagers to surpass charge-coupled devices (CCD) imaging technology for mainstream applications. The parallel outputs that CMOS imagers can offer, in addition to complete camera-on-a-chip solutions due to being fabricated in standard CMOS technologies, result in compelling advantages in speed and system throughput. Since there is a practical limit on the minimum pixel size (4∼5 μm) due to limitations in the optics, CMOS technology scaling can allow for an increased number of transistors to be integrated into the pixel to improve both detection and signal processing. Such smart pixels truly show the potential of CMOS technology for imaging applications allowing CMOS imagers to achieve the image quality and global shuttering performance necessary to meet the demands of ultrahigh-speed applications. In this paper, a review of CMOS-based high-speed imager design is presented and the various implementations that target ultrahigh-speed imaging are described. This work also discusses the design, layout and simulation results of an ultrahigh acquisition rate CMOS active-pixel sensor imager that can take 8 frames at a rate of more than a billion frames per second (fps).

  13. 4K×4K format 10μm pixel pitch H4RG-10 hybrid CMOS silicon visible focal plane array for space astronomy

    NASA Astrophysics Data System (ADS)

    Bai, Yibin; Tennant, William; Anglin, Selmer; Wong, Andre; Farris, Mark; Xu, Min; Holland, Eric; Cooper, Donald; Hosack, Joseph; Ho, Kenneth; Sprafke, Thomas; Kopp, Robert; Starr, Brian; Blank, Richard; Beletic, James W.; Luppino, Gerard A.

    2012-07-01

    Teledyne’s silicon hybrid CMOS focal plane array technology has matured into a viable, high performance and high- TRL alternative to scientific CCD sensors for space-based applications in the UV-visible-NIR wavelengths. This paper presents the latest results from Teledyne’s low noise silicon hybrid CMOS visible focal place array produced in 4K×4K format with 10 μm pixel pitch. The H4RG-10 readout circuit retains all of the CMOS functionality (windowing, guide mode, reference pixels) and heritage of its highly successful predecessor (H2RG) developed for JWST, with additional features for improved performance. Combined with a silicon PIN detector layer, this technology is termed HyViSI™ (Hybrid Visible Silicon Imager). H4RG-10 HyViSI™ arrays achieve high pixel interconnectivity (<99.99%), low readout noise (<10 e- rms single CDS), low dark current (<0.5 e-/pixel/s at 193K), high quantum efficiency (<90% broadband), and large dynamic range (<13 bits). Pixel crosstalk and interpixel capacitance (IPC) have been predicted using detailed models of the hybrid structure and these predictions have been confirmed by measurements with Fe-55 Xray events and the single pixel reset technique. For a 100-micron thick detector, IPC of less than 3% and total pixel crosstalk of less than 7% have been achieved for the HyViSI™ H4RG-10. The H4RG-10 array is mounted on a lightweight silicon carbide (SiC) package and has been qualified to Technology Readiness Level 6 (TRL-6). As part of space qualification, the HyViSI™ H4RG-10 array passed radiation testing for low earth orbit (LEO) environment.

  14. Active pixel image sensor with a winner-take-all mode of operation

    NASA Technical Reports Server (NTRS)

    Yadid-Pecht, Orly (Inventor); Fossum, Eric R. (Inventor); Mead, Carver (Inventor)

    2003-01-01

    An integrated CMOS semiconductor imaging device having two modes of operation that can be performed simultaneously to produce an output image and provide information of a brightest or darkest pixel in the image.

  15. A Pixel Readout Chip in 40 nm CMOS Process for High Count Rate Imaging Systems with Minimization of Charge Sharing Effects

    SciTech Connect

    Maj, Piotr; Grybos, P.; Szczgiel, R.; Kmon, P.; Drozd, A.; Deptuch, G.

    2013-11-07

    We present a prototype chip in 40 nm CMOS technology for readout of hybrid pixel detector. The prototype chip has a matrix of 18x24 pixels with a pixel pitch of 100 μm. It can operate both in single photon counting (SPC) mode and in C8P1 mode. In SPC the measured ENC is 84 erms (for the peaking time of 48 ns), while the effective offset spread is below 2 mV rms. In the C8P1 mode the chip reconstructs full charge deposited in the detector, even in the case of charge sharing, and it identifies a pixel with the largest charge deposition. The chip architecture and preliminary measurements are reported.

  16. Pixel pitch and particle energy influence on the dark current distribution of neutron irradiated CMOS image sensors.

    PubMed

    Belloir, Jean-Marc; Goiffon, Vincent; Virmontois, Cédric; Raine, Mélanie; Paillet, Philippe; Duhamel, Olivier; Gaillardin, Marc; Molina, Romain; Magnan, Pierre; Gilard, Olivier

    2016-02-22

    The dark current produced by neutron irradiation in CMOS Image Sensors (CIS) is investigated. Several CIS with different photodiode types and pixel pitches are irradiated with various neutron energies and fluences to study the influence of each of these optical detector and irradiation parameters on the dark current distribution. An empirical model is tested on the experimental data and validated on all the irradiated optical imagers. This model is able to describe all the presented dark current distributions with no parameter variation for neutron energies of 14 MeV or higher, regardless of the optical detector and irradiation characteristics. For energies below 1 MeV, it is shown that a single parameter has to be adjusted because of the lower mean damage energy per nuclear interaction. This model and these conclusions can be transposed to any silicon based solid-state optical imagers such as CIS or Charged Coupled Devices (CCD). This work can also be used when designing an optical imager instrument, to anticipate the dark current increase or to choose a mitigation technique.

  17. A 10 MS/s 8-bit charge-redistribution ADC for hybrid pixel applications in 65 m CMOS

    NASA Astrophysics Data System (ADS)

    Kishishita, Tetsuichi; Hemperek, Tomasz; Krüger, Hans; Koch, Manuel; Germic, Leonard; Wermes, Norbert

    2013-12-01

    The design and measurement results of an 8-bit SAR ADC, based on a charge-redistribution DAC, are presented. This ADC is characterized by superior power efficiency and small area, realized by employing a lateral metal-metal capacitor array and a dynamic two-stage comparator. To avoid the need for a high-speed clock and its associated power consumption, an asynchronous logic was implemented in a logic control cell. A test chip has been developed in a 65 nm CMOS technology, including eight ADC channels with different layout flavors of the capacitor array, a transimpedance amplifier as a signal input structure, a serializer, and a custom-made LVDS driver for data transmission. The integral (INL) and differential (DNL) nonlinearities are measured below 0.5 LSB and 0.8 LSB, respectively, for the best channel operating at a sampling frequency of 10 MS/s. The area occupies 40 μm×70 μm for one ADC channel. The power consumption is estimated as 4 μW at 1 MS/s and 38 μW at 10 MS/s with a supply rail of 1.2 V. These excellent performance features and the natural radiation hardness of the design, due to the thin gate oxide thickness of transistors, are very interesting for front-end electronics ICs of future hybrid-pixel detector systems.

  18. Prototype of a gigabit data transmitter in 65 nm CMOS for DEPFET pixel detectors at Belle-II

    NASA Astrophysics Data System (ADS)

    Kishishita, T.; Krüger, H.; Hemperek, T.; Lemarenko, M.; Koch, M.; Gronewald, M.; Wermes, N.

    2013-08-01

    This paper describes the recent development of a gigabit data transmitter for the Belle-II pixel detector (PXD). The PXD is an innermost detector currently under development for the upgraded KEK-B factory in Japan. The PXD consists of two layers of DEPFET sensor modules located at 1.8 and 2.2 cm radii. Each module is equipped with three different ASIC types mounted on the detector substrate with a flip-chip technique: (a) SWITCHER for generating steering signals for the DEPFET sensors, (b) DCD for digitizing the signal currents, and (c) DHP for performing data processing and sending the data off the module to the back-end data handling hybrid via ∼ 40 cm Kapton flex and 12-15 m twisted pair (TWP) cables. To meet the requirements of the PXD data transmission, a prototype of the DHP data transmitter has been developed in a 65-nm standard CMOS technology. The transmitter test chip consists of current-mode logic (CML) drivers and a phase-locked loop (PLL) which generates a clock signal for a 1.6 Gbit/s output data stream from an 80 cm reference clock. A programmable pre-emphasis circuit is also implemented in the CML driver to compensate signal losses in the long cable by shaping the transmitted pulse response. The jitter performance was measured as 25 ps (1 σ distribution) by connecting the chip with 38 cm flex and 10 m TWP cables.

  19. Backside-illuminated, high-QE, 3e- RoN, fast 700fps, 1760x1680 pixels CMOS imager for AO with highly parallel readout

    NASA Astrophysics Data System (ADS)

    Downing, Mark; Kolb, Johann; Baade, Dietrich; Balard, Philippe; Dierickx, Bart; Defernez, Arnaud; Dupont, Benoit; Feautrier, Philippe; Finger, Gert; Fryer, Martin; Gach, Jean-Luc; Guillaume, Christian; Hubin, Norbert; Iwert, Olaf; Jerram, Paul; Jorden, Paul; Pike, Andrew; Pratlong, Jerome; Reyes, Javier; Stadler, Eric; Walker, Andrew

    2012-07-01

    The success of the next generation of instruments for 8 to 40-m class telescopes will depend upon improving the image quality (correcting the distortion caused by atmospheric turbulence) by exploiting sophisticated Adaptive Optics (AO) systems. One of the critical components of the AO systems for the E-ELT has been identified as the Laser/Natural Guide Star (LGS/NGS) WaveFront Sensing (WFS) detector. The combination of large format, 1760x1680 pixels to finely sample (84x84 sub-apertures) the wavefront and the spot elongation of laser guide stars, fast frame rate of 700 (up to 1000) frames per second, low read noise (< 3e-), and high QE (> 90%) makes the development of such a device extremely challenging. Design studies by industry concluded that a thinned and backside-illuminated CMOS Imager as the most promising technology. This paper describes the multi-phased development plan that will ensure devices are available on-time for E-ELT first-light AO systems; the different CMOS pixel architectures studied; measured results of technology demonstrators that have validated the CMOS Imager approach; the design explaining the approach of massive parallelism (70,000 ADCs) needed to achieve low noise at high pixel rates of ~3 Gpixel/s ; the 88 channel LVDS data interface; the restriction that stitching (required due to the 5x6cm size) posed on the design and the solutions found to overcome these limitations. Two generations of the CMOS Imager will be built: a pioneering quarter sized device of 880x840 pixels capable of meeting first light needs of the E-ELT called NGSD (Natural Guide Star Detector); followed by the full size device, the LGSD (Laser Guide Star Detector). Funding sources: OPTICON FP6 and FP7 from European Commission and ESO.

  20. CMOS foveal image sensor chip

    NASA Technical Reports Server (NTRS)

    Bandera, Cesar (Inventor); Scott, Peter (Inventor); Sridhar, Ramalingam (Inventor); Xia, Shu (Inventor)

    2002-01-01

    A foveal image sensor integrated circuit comprising a plurality of CMOS active pixel sensors arranged both within and about a central fovea region of the chip. The pixels in the central fovea region have a smaller size than the pixels arranged in peripheral rings about the central region. A new photocharge normalization scheme and associated circuitry normalizes the output signals from the different size pixels in the array. The pixels are assembled into a multi-resolution rectilinear foveal image sensor chip using a novel access scheme to reduce the number of analog RAM cells needed. Localized spatial resolution declines monotonically with offset from the imager's optical axis, analogous to biological foveal vision.

  1. Active pixel sensor array with multiresolution readout

    NASA Technical Reports Server (NTRS)

    Fossum, Eric R. (Inventor); Kemeny, Sabrina E. (Inventor); Pain, Bedabrata (Inventor)

    1999-01-01

    An imaging device formed as a monolithic complementary metal oxide semiconductor integrated circuit in an industry standard complementary metal oxide semiconductor process, the integrated circuit including a focal plane array of pixel cells, each one of the cells including a photogate overlying the substrate for accumulating photo-generated charge in an underlying portion of the substrate and a charge coupled device section formed on the substrate adjacent the photogate having a sensing node and at least one charge coupled device stage for transferring charge from the underlying portion of the substrate to the sensing node. There is also a readout circuit, part of which can be disposed at the bottom of each column of cells and be common to all the cells in the column. The imaging device can also include an electronic shutter formed on the substrate adjacent the photogate, and/or a storage section to allow for simultaneous integration. In addition, the imaging device can include a multiresolution imaging circuit to provide images of varying resolution. The multiresolution circuit could also be employed in an array where the photosensitive portion of each pixel cell is a photodiode. This latter embodiment could further be modified to facilitate low light imaging.

  2. A synchronous analog very front-end in 65 nm CMOS with local fast ToT encoding for pixel detectors at HL-LHC

    NASA Astrophysics Data System (ADS)

    Monteil, E.; Pacher, L.; Paternò, A.; Demaria, N.; Rivetti, A.; Da Rocha Rolo, M.; Rotondo, F.; Leng, C.; Chai, J.

    2017-03-01

    This work describes the design, in 65 nm CMOS, of a very compact, low power, low threshold synchronous analog front-end for pixel detectors at HL-LHC . Threshold trimming is avoided using offset compensation techniques. Fast ToT encoding is possible, as the comparator can be turned into a Local Oscillator up to several hundreds MHz. Two small prototypes have been submitted and tested; a X-ray irradiation up to 600 Mrad has been performed. Detailed results in terms of gain, noise, ToT and threshold dispersion are presented. This design will be part of the CHIPIX65 demonstrator and of the RD53A chip.

  3. Low-Voltage 96 dB Snapshot CMOS Image Sensor with 4.5 nW Power Dissipation per Pixel

    PubMed Central

    Spivak, Arthur; Teman, Adam; Belenky, Alexander; Yadid-Pecht, Orly; Fish, Alexander

    2012-01-01

    Modern “smart” CMOS sensors have penetrated into various applications, such as surveillance systems, bio-medical applications, digital cameras, cellular phones and many others. Reducing the power of these sensors continuously challenges designers. In this paper, a low power global shutter CMOS image sensor with Wide Dynamic Range (WDR) ability is presented. This sensor features several power reduction techniques, including a dual voltage supply, a selective power down, transistors with different threshold voltages, a non-rationed logic, and a low voltage static memory. A combination of all these approaches has enabled the design of the low voltage “smart” image sensor, which is capable of reaching a remarkable dynamic range, while consuming very low power. The proposed power-saving solutions have allowed the maintenance of the standard architecture of the sensor, reducing both the time and the cost of the design. In order to maintain the image quality, a relation between the sensor performance and power has been analyzed and a mathematical model, describing the sensor Signal to Noise Ratio (SNR) and Dynamic Range (DR) as a function of the power supplies, is proposed. The described sensor was implemented in a 0.18 um CMOS process and successfully tested in the laboratory. An SNR of 48 dB and DR of 96 dB were achieved with a power dissipation of 4.5 nW per pixel. PMID:23112588

  4. Charged particle detection performances of CMOS pixel sensors produced in a 0.18 μm process with a high resistivity epitaxial layer

    NASA Astrophysics Data System (ADS)

    Senyukov, S.; Baudot, J.; Besson, A.; Claus, G.; Cousin, L.; Dorokhov, A.; Dulinski, W.; Goffe, M.; Hu-Guo, C.; Winter, M.

    2013-12-01

    The apparatus of the ALICE experiment at CERN will be upgraded in 2017/18 during the second long shutdown of the LHC (LS2). A major motivation for this upgrade is to extend the physics reach for charmed and beauty particles down to low transverse momenta. This requires a substantial improvement of the spatial resolution and the data rate capability of the ALICE Inner Tracking System (ITS). To achieve this goal, the new ITS will be equipped with 50 μm thin CMOS Pixel Sensors (CPS) covering either the three innermost layers or all the 7 layers of the detector. The CPS being developed for the ITS upgrade at IPHC (Strasbourg) is derived from the MIMOSA 28 sensor realised for the STAR-PXL at RHIC in a 0.35 μm CMOS process. In order to satisfy the ITS upgrade requirements in terms of readout speed and radiation tolerance, a CMOS process with a reduced feature size and a high resistivity epitaxial layer should be exploited. In this respect, the charged particle detection performance and radiation hardness of the TowerJazz 0.18 μm CMOS process were studied with the help of the first prototype chip MIMOSA 32. The beam tests performed with negative pions of 120 GeV/c at the CERN-SPS allowed to measure a signal-to-noise ratio (SNR) for the non-irradiated chip in the range between 22 and 32 depending on the pixel design. The chip irradiated with the combined dose of 1 MRad and 1013neq /cm2 was observed to yield an SNR ranging between 11 and 23 for coolant temperatures varying from 15 °C to 30 °C. These SNR values were measured to result in particle detection efficiencies above 99.5% and 98% before and after irradiation, respectively. These satisfactory results allow to validate the TowerJazz 0.18 μm CMOS process for the ALICE ITS upgrade.

  5. Fault tolerant photodiode and photogate active pixel sensors

    NASA Astrophysics Data System (ADS)

    Jung, Cory; Chapman, Glenn H.; La Haye, Michelle L.; Djaja, Sunjaya; Cheung, Desmond Y. H.; Lin, Henry; Loo, Edward; Audet, Yves R.

    2005-03-01

    As the pixel counts of digital imagers increase, the challenge of maintaining high yields and ensuring reliability over an imager"s lifetime increases. A fault tolerant active pixel sensor (APS) has been designed to meet this need by splitting an APS in half and operating both halves in parallel. The fault tolerant APS will perform normally in the no defect case and will produce approximately half the output for single defects. Thus, the entire signal can be recovered by multiplying the output by two. Since pixels containing multiple defects are rare, this design can correct for most defects allowing for higher production yields. Fault tolerant photodiode and photogate APS" were fabricated in 0.18-micron technology. Testing showed that the photodiode APS could correct for optically induced and electrically induced faults, within experimental error. The photogate APS was only tested for optically induced defects and also corrects for defects within experimental error. Further testing showed that the sensitivity of fault tolerant pixels was approximately 2-3 times more sensitive than the normal pixels. HSpice simulations of the fault tolerant APS circuit did not show increased sensitivity, however an equivalent normal APS circuit with twice width readout and row transistors was 1.90 times more sensitive than a normal pixel.

  6. Time-resolved Förster-resonance-energy-transfer DNA assay on an active CMOS microarray

    PubMed Central

    Schwartz, David Eric; Gong, Ping; Shepard, Kenneth L.

    2008-01-01

    We present an active oligonucleotide microarray platform for time-resolved Förster resonance energy transfer (TR-FRET) assays. In these assays, immobilized probe is labeled with a donor fluorophore and analyte target is labeled with a fluorescence quencher. Changes in the fluorescence decay lifetime of the donor are measured to determine the extent of hybridization. In this work, we demonstrate that TR-FRET assays have reduced sensitivity to variances in probe surface density compared with standard fluorescence-based microarray assays. Use of an active array substrate, fabricated in a standard complementary metal-oxide-semiconductor (CMOS) process, provides the additional benefits of reduced system complexity and cost. The array consists of 4096 independent single-photon avalanche diode (SPAD) pixel sites and features on-chip time-to-digital conversion. We demonstrate the functionality of our system by measuring a DNA target concentration series using TR-FRET with semiconductor quantum dot donors. PMID:18515059

  7. ALPIDE: the Monolithic Active Pixel Sensor for the ALICE ITS upgrade

    NASA Astrophysics Data System (ADS)

    Šuljić, M.

    2016-11-01

    The upgrade of the ALICE vertex detector, the Inner Tracking System (ITS), is scheduled to be installed during the next long shutdown period (2019-2020) of the CERN Large Hadron Collider (LHC) . The current ITS will be replaced by seven concentric layers of Monolithic Active Pixel Sensors (MAPS) with total active surface of ~10 m2, thus making ALICE the first LHC experiment implementing MAPS detector technology on a large scale. The ALPIDE chip, based on TowerJazz 180 nm CMOS Imaging Process, is being developed for this purpose. A particular process feature, the deep p-well, is exploited so the full CMOS logic can be implemented over the active sensor area without impinging on the deposited charge collection. ALPIDE is implemented on silicon wafers with a high resistivity epitaxial layer. A single chip measures 15 mm by 30 mm and contains half a million pixels distributed in 512 rows and 1024 columns. In-pixel circuitry features amplification, shaping, discrimination and multi-event buffering. The readout is hit driven i.e. only addresses of hit pixels are sent to the periphery. The upgrade of the ITS presents two different sets of requirements for sensors of the inner and of the outer layers due to the significantly different track density, radiation level and active detector surface. The ALPIDE chip fulfils the stringent requirements in both cases. The detection efficiency is higher than 99%, fake-hit probability is orders of magnitude lower than the required 10-6 and spatial resolution within the required 5 μm. This performance is to be maintained even after a total ionising does (TID) of 2.7 Mrad and a non-ionising energy loss (NIEL) fluence of 1.7 × 1013 1 MeV neq/cm2, which is above what is expected during the detector lifetime. Readout rate of 100 kHz is provided and the power density of ALPIDE is less than 40 mW/cm2. This contribution will provide a summary of the ALPIDE features and main test results.

  8. Photon counting readout pixel array in 0.18-μm CMOS technology for on-line gamma-ray imaging of 103palladium seeds for permanent breast seed implant (PBSI) brachytherapy

    NASA Astrophysics Data System (ADS)

    Goldan, A. H.; Karim, K. S.; Reznik, A.; Caldwell, C. B.; Rowlands, J. A.

    2008-03-01

    Permanent breast seed implant (PBSI) brachytherapy technique was recently introduced as an alternative to high dose rate (HDR) brachytherapy and involves the permanent implantation of radioactive 103Palladium seeds into the surgical cavity of the breast for cancer treatment. To enable accurate seed implantation, this research introduces a gamma camera based on a hybrid amorphous selenium detector and CMOS readout pixel architecture for real-time imaging of 103Palladium seeds during the PBSI procedure. A prototype chip was designed and fabricated in 0.18-μm n-well CMOS process. We present the experimental results obtained from this integrated photon counting readout pixel.

  9. Low-power priority Address-Encoder and Reset-Decoder data-driven readout for Monolithic Active Pixel Sensors for tracker system

    NASA Astrophysics Data System (ADS)

    Yang, P.; Aglieri, G.; Cavicchioli, C.; Chalmet, P. L.; Chanlek, N.; Collu, A.; Gao, C.; Hillemanns, H.; Junique, A.; Kofarago, M.; Keil, M.; Kugathasan, T.; Kim, D.; Kim, J.; Lattuca, A.; Marin Tobon, C. A.; Marras, D.; Mager, M.; Martinengo, P.; Mazza, G.; Mugnier, H.; Musa, L.; Puggioni, C.; Rousset, J.; Reidt, F.; Riedler, P.; Snoeys, W.; Siddhanta, S.; Usai, G.; van Hoorne, J. W.; Yi, J.

    2015-06-01

    Active Pixel Sensors used in High Energy Particle Physics require low power consumption to reduce the detector material budget, low integration time to reduce the possibilities of pile-up and fast readout to improve the detector data capability. To satisfy these requirements, a novel Address-Encoder and Reset-Decoder (AERD) asynchronous circuit for a fast readout of a pixel matrix has been developed. The AERD data-driven readout architecture operates the address encoding and reset decoding based on an arbitration tree, and allows us to readout only the hit pixels. Compared to the traditional readout structure of the rolling shutter scheme in Monolithic Active Pixel Sensors (MAPS), AERD can achieve a low readout time and a low power consumption especially for low hit occupancies. The readout is controlled at the chip periphery with a signal synchronous with the clock, allows a good digital and analogue signal separation in the matrix and a reduction of the power consumption. The AERD circuit has been implemented in the TowerJazz 180 nm CMOS Imaging Sensor (CIS) process with full complementary CMOS logic in the pixel. It works at 10 MHz with a matrix height of 15 mm. The energy consumed to read out one pixel is around 72 pJ. A scheme to boost the readout speed to 40 MHz is also discussed. The sensor chip equipped with AERD has been produced and characterised. Test results including electrical beam measurement are presented.

  10. A prototype of a new generation readout ASIC in 65nm CMOS for pixel detectors at HL-LHC

    NASA Astrophysics Data System (ADS)

    Monteil, E.; Pacher, L.; Paternò, A.; Loddo, F.; Demaria, N.; Gaioni, L.; De Canio, F.; Traversi, G.; Re, V.; Ratti, L.; Rivetti, A.; Da Rocha Rolo, M.; Dellacasa, G.; Mazza, G.; Marzocca, C.; Licciulli, F.; Ciciriello, F.; Marconi, S.; Placidi, P.; Magazzù, G.; Stabile, A.; Mattiazzo, S.; Veri, C.

    2016-12-01

    This paper describes a readout ASIC prototype designed by CHIPIX65 project, part of RD53, for a pixel detector at HL-LHC . A 64 × 64 matrix of 50 × 50 μ m2 pixels is realised. A digital architecture has been developed, with particle efficiency above 99.9% at 3 GHz/cm2 pixel rate, 1 MHz trigger rate with 12.5 μ s latency. Two analog front end designs, one synchronous and one asynchronous, are implemented. Charge is measured with 5-bit precision and the analog dead-time is below 1%. IP-blocks (DAC, ADC, BandGap, SER, sLVS-TX/RX) and very front ends are silicon proven, irradiated to 600-800Mrad.

  11. A prototype of pixel readout ASIC in 65 nm CMOS technology for extreme hit rate detectors at HL-LHC

    NASA Astrophysics Data System (ADS)

    Paternò, A.; Pacher, L.; Monteil, E.; Loddo, F.; Demaria, N.; Gaioni, L.; De Canio, F.; Traversi, G.; Re, V.; Ratti, L.; Rivetti, A.; Da Rocha Rolo, M.; Dellacasa, G.; Mazza, G.; Marzocca, C.; Licciulli, F.; Ciciriello, F.; Marconi, S.; Placidi, P.; Magazzù, G.; Stabile, A.; Mattiazzo, S.; Veri, C.

    2017-02-01

    This paper describes a readout ASIC prototype designed by the CHIPIX65 project, part of RD53, for a pixel detector at HL-LHC . A 64×64 matrix of 50×50μm2 pixels is realised. A digital architecture has been developed, with particle efficiency above 99.5% at 3 GHz/cm2 pixel rate, trigger frequency of 1 MHz and 12.5μsec latency. Two analog front end designs, one synchronous and one asynchronous, are implemented. Charge is measured with 5-bit precision, analog dead-time below 1%. The chip integrates for the first time many of the components developed by the collaboration in the past, including the Digital-to-Analog converters, Bandgap reference, Serializer, sLVS drivers, and analog Front Ends. Irradiation tests on these components proved their reliability up to 600 Mrad.

  12. Hybrid Pixel Detectors for gamma/X-ray imaging

    NASA Astrophysics Data System (ADS)

    Hatzistratis, D.; Theodoratos, G.; Zografos, V.; Kazas, I.; Loukas, D.; Lambropoulos, C. P.

    2015-09-01

    Hybrid pixel detectors are made by direct converting high-Z semi-insulating single crystalline material coupled to complementary-metal-oxide semiconductor (CMOS) readout electronics. They are attractive because direct conversion exterminates all the problems of spatial localization related to light diffusion, energy resolution, is far superior from the combination of scintillation crystals and photomultipliers and lithography can be used to pattern electrodes with very fine pitch. We are developing 2-D pixel CMOS ASICs, connect them to pixilated CdTe crystals with the flip chip and bump bonding method and characterize the hybrids. We have designed a series of circuits, whose latest member consists of a 50×25 pixel array with 400um pitch and an embedded controller. In every pixel a full spectroscopic channel with time tagging information has been implemented. The detectors are targeting Compton scatter imaging and they can be used for coded aperture imaging too. Hybridization using CMOS can overcome the limit put on pixel circuit complexity by the use of thin film transistors (TFT) in large flat panels. Hybrid active pixel sensors are used in dental imaging and other applications (e.g. industrial CT etc.). Thus X-ray imaging can benefit from the work done on dynamic range enhancement methods developed initially for visible and infrared CMOS pixel sensors. A 2-D CMOS ASIC with 100um pixel pitch to demonstrate the feasibility of such methods in the context of X-ray imaging has been designed.

  13. Low-noise low-jitter 32-pixels CMOS single-photon avalanche diodes array for single-photon counting from 300 nm to 900 nm

    SciTech Connect

    Scarcella, Carmelo; Tosi, Alberto Villa, Federica; Tisa, Simone; Zappa, Franco

    2013-12-15

    We developed a single-photon counting multichannel detection system, based on a monolithic linear array of 32 CMOS SPADs (Complementary Metal-Oxide-Semiconductor Single-Photon Avalanche Diodes). All channels achieve a timing resolution of 100 ps (full-width at half maximum) and a photon detection efficiency of 50% at 400 nm. Dark count rate is very low even at room temperature, being about 125 counts/s for 50 μm active area diameter SPADs. Detection performance and microelectronic compactness of this CMOS SPAD array make it the best candidate for ultra-compact time-resolved spectrometers with single-photon sensitivity from 300 nm to 900 nm.

  14. A Design of a New Column-Parallel Analog-to-Digital Converter Flash for Monolithic Active Pixel Sensor.

    PubMed

    Chakir, Mostafa; Akhamal, Hicham; Qjidaa, Hassan

    2017-01-01

    The CMOS Monolithic Active Pixel Sensor (MAPS) for the International Linear Collider (ILC) vertex detector (VXD) expresses stringent requirements on their analog readout electronics, specifically on the analog-to-digital converter (ADC). This paper concerns designing and optimizing a new architecture of a low power, high speed, and small-area 4-bit column-parallel ADC Flash. Later in this study, we propose to interpose an S/H block in the converter. This integration of S/H block increases the sensitiveness of the converter to the very small amplitude of the input signal from the sensor and provides a sufficient time to the converter to be able to code the input signal. This ADC is developed in 0.18 μm CMOS process with a pixel pitch of 35 μm. The proposed ADC responds to the constraints of power dissipation, size, and speed for the MAPS composed of a matrix of 64 rows and 48 columns where each column ADC covers a small area of 35 × 336.76 μm(2). The proposed ADC consumes low power at a 1.8 V supply and 100 MS/s sampling rate with dynamic range of 125 mV. Its DNL and INL are 0.0812/-0.0787 LSB and 0.0811/-0.0787 LSB, respectively. Furthermore, this ADC achieves a high speed more than 5 GHz.

  15. Active pixel sensor pixel having a photodetector whose output is coupled to an output transistor gate

    NASA Technical Reports Server (NTRS)

    Fossum, Eric R. (Inventor); Nakamura, Junichi (Inventor); Kemeny, Sabrina E. (Inventor)

    2005-01-01

    An imaging device formed as a monolithic complementary metal oxide semiconductor integrated circuit in an industry standard complementary metal oxide semiconductor process, the integrated circuit including a focal plane array of pixel cells, each one of the cells including a photogate overlying the substrate for accumulating photo-generated charge in an underlying portion of the substrate and a charge coupled device section formed on the substrate adjacent the photogate having a sensing node and at least one charge coupled device stage for transferring charge from the underlying portion of the substrate to the sensing node. There is also a readout circuit, part of which can be disposed at the bottom of each column of cells and be common to all the cells in the column. A Simple Floating Gate (SFG) pixel structure could also be employed in the imager to provide a non-destructive readout and smaller pixel sizes.

  16. A Monolithic Active Pixel Sensor for ionizing radiation using a 180 nm HV-SOI process

    NASA Astrophysics Data System (ADS)

    Hemperek, Tomasz; Kishishita, Tetsuichi; Krüger, Hans; Wermes, Norbert

    2015-10-01

    An improved SOI-MAPS (Silicon On Insulator Monolithic Active Pixel Sensor) for ionizing radiation based on thick-film High Voltage SOI technology (HV-SOI) has been developed. Similar to existing Fully Depleted SOI-based (FD-SOI) MAPS, a buried silicon oxide inter-dielectric (BOX) layer is used to separate the CMOS electronics from the handle wafer which is used as a depleted charge collection layer. FD-SOI MAPS suffers from radiation damage such as transistor threshold voltage shifts due to charge traps in the oxide layers and charge states created at the silicon oxide boundaries (back gate effect). The X-FAB 180-nm HV-SOI technology offers an additional isolation by deep non-depleted implant between the BOX layer and the active circuitry which mitigates this problem. Therefore we see in this technology a high potential to implement radiation-tolerant MAPS with fast charge collection property. The design and measurement results from a first prototype are presented including charge collection in neutron irradiated samples.

  17. A High-Speed, Event-Driven, Active Pixel Sensor Readout for Photon-Counting Microchannel Plate Detectors

    NASA Technical Reports Server (NTRS)

    Kimble, Randy A.; Pain, Bedabrata; Norton, Timothy J.; Haas, J. Patrick; Oegerle, William R. (Technical Monitor)

    2002-01-01

    Silicon array readouts for microchannel plate intensifiers offer several attractive features. In this class of detector, the electron cloud output of the MCP intensifier is converted to visible light by a phosphor; that light is then fiber-optically coupled to the silicon array. In photon-counting mode, the resulting light splashes on the silicon array are recognized and centroided to fractional pixel accuracy by off-chip electronics. This process can result in very high (MCP-limited) spatial resolution while operating at a modest MCP gain (desirable for dynamic range and long term stability). The principal limitation of intensified CCD systems of this type is their severely limited local dynamic range, as accurate photon counting is achieved only if there are not overlapping event splashes within the frame time of the device. This problem can be ameliorated somewhat by processing events only in pre-selected windows of interest of by using an addressable charge injection device (CID) for the readout array. We are currently pursuing the development of an intriguing alternative readout concept based on using an event-driven CMOS Active Pixel Sensor. APS technology permits the incorporation of discriminator circuitry within each pixel. When coupled with suitable CMOS logic outside the array area, the discriminator circuitry can be used to trigger the readout of small sub-array windows only when and where an event splash has been detected, completely eliminating the local dynamic range problem, while achieving a high global count rate capability and maintaining high spatial resolution. We elaborate on this concept and present our progress toward implementing an event-driven APS readout.

  18. A High-Speed, Event-Driven, Active Pixel Sensor Readout for Photon-Counting Microchannel Plate Detectors

    NASA Technical Reports Server (NTRS)

    Kimble, Randy A.; Pain, B.; Norton, T. J.; Haas, P.; Fisher, Richard R. (Technical Monitor)

    2001-01-01

    Silicon array readouts for microchannel plate intensifiers offer several attractive features. In this class of detector, the electron cloud output of the MCP intensifier is converted to visible light by a phosphor; that light is then fiber-optically coupled to the silicon array. In photon-counting mode, the resulting light splashes on the silicon array are recognized and centroided to fractional pixel accuracy by off-chip electronics. This process can result in very high (MCP-limited) spatial resolution for the readout while operating at a modest MCP gain (desirable for dynamic range and long term stability). The principal limitation of intensified CCD systems of this type is their severely limited local dynamic range, as accurate photon counting is achieved only if there are not overlapping event splashes within the frame time of the device. This problem can be ameliorated somewhat by processing events only in pre-selected windows of interest or by using an addressable charge injection device (CID) for the readout array. We are currently pursuing the development of an intriguing alternative readout concept based on using an event-driven CMOS Active Pixel Sensor. APS technology permits the incorporation of discriminator circuitry within each pixel. When coupled with suitable CMOS logic outside the array area, the discriminator circuitry can be used to trigger the readout of small sub-array windows only when and where an event splash has been detected, completely eliminating the local dynamic range problem, while achieving a high global count rate capability and maintaining high spatial resolution. We elaborate on this concept and present our progress toward implementing an event-driven APS readout.

  19. Monolithic Active Pixel Matrix with Binary Counters (MAMBO) ASIC

    SciTech Connect

    Khalid, Farah F.; Deptuch, Grzegorz; Shenai, Alpana; Yarema, Raymond J.; /Fermilab

    2010-11-01

    Monolithic Active Matrix with Binary Counters (MAMBO) is a counting ASIC designed for detecting and measuring low energy X-rays from 6-12 keV. Each pixel contains analogue functionality implemented with a charge preamplifier, CR-RC{sup 2} shaper and a baseline restorer. It also contains a window comparator which can be trimmed by 4 bit DACs to remove systematic offsets. The hits are registered by a 12 bit ripple counter which is reconfigured as a shift register to serially output the data from the entire ASIC. Each pixel can be tested individually. Two diverse approaches have been used to prevent coupling between the detector and electronics in MAMBO III and MAMBO IV. MAMBO III is a 3D ASIC, the bottom ASIC consists of diodes which are connected to the top ASIC using {mu}-bump bonds. The detector is decoupled from the electronics by physically separating them on two tiers and using several metal layers as a shield. MAMBO IV is a monolithic structure which uses a nested well approach to isolate the detector from the electronics. The ASICs are being fabricated using the SOI 0.2 {micro}m OKI process, MAMBO III is 3D bonded at T-Micro and MAMBO IV nested well structure was developed in collaboration between OKI and Fermilab.

  20. Monolithic active pixel matrix with binary counters (MAMBO III) ASIC

    SciTech Connect

    Khalid, Farah; Deptuch, Grzegorz; Shenai, Alpana; Yarema, Raymond; /Fermilab

    2010-01-01

    Monolithic Active Matrix with Binary Counters (MAMBO) is a counting ASIC designed for detecting and measuring low energy X-rays from 6-12keV. Each pixel contains analogue functionality implemented with a charge preamplifier, CR-RC{sup 2} shaper and a baseline restorer. It also contains a window comparator which can be trimmed by 4 bit DACs to remove systematic offsets. The hits are registered by a 12 bit ripple counter which is reconfigured as a shift register to serially output the data from the entire ASIC. Each pixel can be tested individually. Two diverse approaches have been used to prevent coupling between the detector and electronics in MAMBO III and MAMBO IV. MAMBO III is a 3D ASIC, the bottom ASIC consists of diodes which are connected to the top ASIC using {mu}-bump bonds. The detector is decoupled from the electronics by physically separating them on two tiers and using several metal layers as a shield. MAMBO IV is a monolithic structure which uses a nested well approach to isolate the detector from the electronics. The ASICs are being fabricated using the SOI 0.2 {micro}m OKI process, MAMBO III is 3D bonded at T-Micro and MAMBO IV nested well structure was developed in collaboration between OKI and Fermilab.

  1. Evaluation of a single-pixel one-transistor active pixel sensor for fingerprint imaging

    NASA Astrophysics Data System (ADS)

    Xu, Man; Ou, Hai; Chen, Jun; Wang, Kai

    2015-08-01

    Since it first appeared in iPhone 5S in 2013, fingerprint identification (ID) has rapidly gained popularity among consumers. Current fingerprint-enabled smartphones unanimously consists of a discrete sensor to perform fingerprint ID. This architecture not only incurs higher material and manufacturing cost, but also provides only static identification and limited authentication. Hence as the demand for a thinner, lighter, and more secure handset grows, we propose a novel pixel architecture that is a photosensitive device embedded in a display pixel and detects the reflected light from the finger touch for high resolution, high fidelity and dynamic biometrics. To this purpose, an amorphous silicon (a-Si:H) dual-gate photo TFT working in both fingerprint-imaging mode and display-driving mode will be developed.

  2. Compact VLSI neural computer integrated with active pixel sensor for real-time ATR applications

    NASA Astrophysics Data System (ADS)

    Fang, Wai-Chi; Udomkesmalee, Gabriel; Alkalai, Leon

    1997-04-01

    A compact VLSI neural computer integrated with an active pixel sensor has been under development to mimic what is inherent in biological vision systems. This electronic eye- brain computer is targeted for real-time machine vision applications which require both high-bandwidth communication and high-performance computing for data sensing, synergy of multiple types of sensory information, feature extraction, target detection, target recognition, and control functions. The neural computer is based on a composite structure which combines Annealing Cellular Neural Network (ACNN) and Hierarchical Self-Organization Neural Network (HSONN). The ACNN architecture is a programmable and scalable multi- dimensional array of annealing neurons which are locally connected with their local neurons. Meanwhile, the HSONN adopts a hierarchical structure with nonlinear basis functions. The ACNN+HSONN neural computer is effectively designed to perform programmable functions for machine vision processing in all levels with its embedded host processor. It provides a two order-of-magnitude increase in computation power over the state-of-the-art microcomputer and DSP microelectronics. A compact current-mode VLSI design feasibility of the ACNN+HSONN neural computer is demonstrated by a 3D 16X8X9-cube neural processor chip design in a 2-micrometers CMOS technology. Integration of this neural computer as one slice of a 4'X4' multichip module into the 3D MCM based avionics architecture for NASA's New Millennium Program is also described.

  3. CMOS detectors at Rome "Tor Vergata" University

    NASA Astrophysics Data System (ADS)

    Berrilli, F.; Cantarano, S.; Egidi, A.; Giordano, S.

    The new class of CMOS panoramic detectors represents an innovative tool for the experimental astronomy of the forthcoming years. While current charge-coupled device (CCD) technology can produce nearly ideal detectors for astronomical use, the scientific quality CMOS detectors made today have characteristics similar to those of CCD devices but a simpler electronics and a reduced cost. Moreover, the high frame rate capability and the amplification of each pixel - active pixel - in a CMOS detector, allows the implementation of a specific data management. So, it is possible to design cameras with very high dynamic range suitable for the imaging of solar active regions. In fact, in such regions, the onset of a flare can produce problems of saturation in a CCD-based camera. In this work we present the preliminary result obtained with the Tor Vergata C-Cam APS camera used at the University Solar Station.

  4. A column level, low power, 1 M sample/s double ramp A/D converter for monolithic active pixel sensors in high energy physics

    NASA Astrophysics Data System (ADS)

    Pillet, N.; Heini, S.; Hu, Y.

    2010-08-01

    Monolithic active pixel sensors (MAPS) using standard low cost CMOS technologies available from industrial manufacturers have demonstrated excellent tracking performances for minimum ionizing particles. The need for highly granular, fast, thin sensors with a full digital output drives an R&D effort, aiming to design and optimize a low power high speed A/D converter integrated at the column level. Following this main issue, a double digital ramp A/D converter has been proposed for CMOS monolithic active pixel sensors in this paper. This A/D converter responds to the constraints of size, power dissipation and precision for CMOS sensors for particle detection. It also represents a first step in order to reach the high speed of conversion needed for this kind of application. The A/D converter has a resolution of 4 bits for conversion speed of 1 M sample/s with only 264 μW of static consumption in a very particular pitch of 25 μm×900 μm.

  5. Monolithic active pixel radiation detector with shielding techniques

    DOEpatents

    Deptuch, Grzegorz W.

    2016-09-06

    A monolithic active pixel radiation detector including a method of fabricating thereof. The disclosed radiation detector can include a substrate comprising a silicon layer upon which electronics are configured. A plurality of channels can be formed on the silicon layer, wherein the plurality of channels are connected to sources of signals located in a bulk part of the substrate, and wherein the signals flow through electrically conducting vias established in an isolation oxide on the substrate. One or more nested wells can be configured from the substrate, wherein the nested wells assist in collecting charge carriers released in interaction with radiation and wherein the nested wells further separate the electronics from the sensing portion of the detector substrate. The detector can also be configured according to a thick SOA method of fabrication.

  6. MonoColor CMOS sensor

    NASA Astrophysics Data System (ADS)

    Wang, Ynjiun P.

    2009-02-01

    A new breed of CMOS color sensor called MonoColor sensor is developed for a barcode reading application in AIDC industry. The RGBW color filter array (CFA) in a MonoColor sensor is arranged in a 8 x 8 pixels CFA with only 4 pixels of them are color (RGB) pixels and the rest of 60 pixels are transparent or monochrome. Since the majority of pixels are monochrome, MonoColor sensor maintains 98% barcode decode performance compared with a pure monochrome CMOS sensor. With the help of monochrome and color pixel fusion technique, the resulting color pictures have similar color quality in terms of Color Semantic Error (CSE) compared with a Bayer pattern (RGB) CMOS color camera. Since monochrome pixels are more sensitive than color pixels, a MonoColor sensor produces in general about 2X brighter color picture and higher luminance pixel resolution.

  7. Active pixel sensor having intra-pixel charge transfer with analog-to-digital converter

    NASA Technical Reports Server (NTRS)

    Fossum, Eric R. (Inventor); Mendis, Sunetra K. (Inventor); Pain, Bedabrata (Inventor); Nixon, Robert H. (Inventor); Zhou, Zhimin (Inventor)

    2003-01-01

    An imaging device formed as a monolithic complementary metal oxide semiconductor integrated circuit in an industry standard complementary metal oxide semiconductor process, the integrated circuit including a focal plane array of pixel cells, each one of the cells including a photogate overlying the substrate for accumulating photo-generated charge in an underlying portion of the substrate, a readout circuit including at least an output field effect transistor formed in the substrate, and a charge coupled device section formed on the substrate adjacent the photogate having a sensing node connected to the output transistor and at least one charge coupled device stage for transferring charge from the underlying portion of the substrate to the sensing node and an analog-to-digital converter formed in the substrate connected to the output of the readout circuit.

  8. Active pixel sensor having intra-pixel charge transfer with analog-to-digital converter

    NASA Technical Reports Server (NTRS)

    Fossum, Eric R. (Inventor); Mendis, Sunetra K. (Inventor); Pain, Bedabrata (Inventor); Nixon, Robert H. (Inventor); Zhou, Zhimin (Inventor)

    2000-01-01

    An imaging device formed as a monolithic complementary metal oxide semiconductor Integrated circuit in an industry standard complementary metal oxide semiconductor process, the integrated circuit including a focal plane array of pixel cells, each one of the cells including a photogate overlying the substrate for accumulating photo-generated charge in an underlying portion of the substrate, a readout circuit including at least an output field effect transistor formed in the substrate, and a charge coupled device section formed on the substrate adjacent the photogate having a sensing node connected to the output transistor and at least one charge coupled device stage for transferring charge from the underlying portion of the substrate to the sensing node and an analog-to-digital converter formed in the substrate connected to the output of the readout circuit.

  9. Active pixel imagers incorporating pixel-level amplifiers based on polycrystalline-silicon thin-film transistors.

    PubMed

    El-Mohri, Youcef; Antonuk, Larry E; Koniczek, Martin; Zhao, Qihua; Li, Yixin; Street, Robert A; Lu, Jeng-Ping

    2009-07-01

    Active matrix, flat-panel imagers (AMFPIs) employing a 2D matrix of a-Si addressing TFTs have become ubiquitous in many x-ray imaging applications due to their numerous advantages. However, under conditions of low exposures and/or high spatial resolution, their signal-to-noise performance is constrained by the modest system gain relative to the electronic additive noise. In this article, a strategy for overcoming this limitation through the incorporation of in-pixel amplification circuits, referred to as active pixel (AP) architectures, using polycrystalline-silicon (poly-Si) TFTs is reported. Compared to a-Si, poly-Si offers substantially higher mobilities, enabling higher TFT currents and the possibility of sophisticated AP designs based on both n- and p-channel TFTs. Three prototype indirect detection arrays employing poly-Si TFTs and a continuous a-Si photodiode structure were characterized. The prototypes consist of an array (PSI-1) that employs a pixel architecture with a single TFT, as well as two arrays (PSI-2 and PSI-3) that employ AP architectures based on three and five TFTs, respectively. While PSI-1 serves as a reference with a design similar to that of conventional AMFPI arrays, PSI-2 and PSI-3 incorporate additional in-pixel amplification circuitry. Compared to PSI-1, results of x-ray sensitivity demonstrate signal gains of approximately 10.7 and 20.9 for PSI-2 and PSI-3, respectively. These values are in reasonable agreement with design expectations, demonstrating that poly-Si AP circuits can be tailored to provide a desired level of signal gain. PSI-2 exhibits the same high levels of charge trapping as those observed for PSI-1 and other conventional arrays employing a continuous photodiode structure. For PSI-3, charge trapping was found to be significantly lower and largely independent of the bias voltage applied across the photodiode. MTF results indicate that the use of a continuous photodiode structure in PSI-1, PSI-2, and PSI-3 results in

  10. Active pixel imagers incorporating pixel-level amplifiers based on polycrystalline-silicon thin-film transistors

    PubMed Central

    El-Mohri, Youcef; Antonuk, Larry E.; Koniczek, Martin; Zhao, Qihua; Li, Yixin; Street, Robert A.; Lu, Jeng-Ping

    2009-01-01

    Active matrix, flat-panel imagers (AMFPIs) employing a 2D matrix of a-Si addressing TFTs have become ubiquitous in many x-ray imaging applications due to their numerous advantages. However, under conditions of low exposures and∕or high spatial resolution, their signal-to-noise performance is constrained by the modest system gain relative to the electronic additive noise. In this article, a strategy for overcoming this limitation through the incorporation of in-pixel amplification circuits, referred to as active pixel (AP) architectures, using polycrystalline-silicon (poly-Si) TFTs is reported. Compared to a-Si, poly-Si offers substantially higher mobilities, enabling higher TFT currents and the possibility of sophisticated AP designs based on both n- and p-channel TFTs. Three prototype indirect detection arrays employing poly-Si TFTs and a continuous a-Si photodiode structure were characterized. The prototypes consist of an array (PSI-1) that employs a pixel architecture with a single TFT, as well as two arrays (PSI-2 and PSI-3) that employ AP architectures based on three and five TFTs, respectively. While PSI-1 serves as a reference with a design similar to that of conventional AMFPI arrays, PSI-2 and PSI-3 incorporate additional in-pixel amplification circuitry. Compared to PSI-1, results of x-ray sensitivity demonstrate signal gains of ∼10.7 and 20.9 for PSI-2 and PSI-3, respectively. These values are in reasonable agreement with design expectations, demonstrating that poly-Si AP circuits can be tailored to provide a desired level of signal gain. PSI-2 exhibits the same high levels of charge trapping as those observed for PSI-1 and other conventional arrays employing a continuous photodiode structure. For PSI-3, charge trapping was found to be significantly lower and largely independent of the bias voltage applied across the photodiode. MTF results indicate that the use of a continuous photodiode structure in PSI-1, PSI-2, and PSI-3 results in optical fill

  11. A Design of a New Column-Parallel Analog-to-Digital Converter Flash for Monolithic Active Pixel Sensor

    PubMed Central

    Qjidaa, Hassan

    2017-01-01

    The CMOS Monolithic Active Pixel Sensor (MAPS) for the International Linear Collider (ILC) vertex detector (VXD) expresses stringent requirements on their analog readout electronics, specifically on the analog-to-digital converter (ADC). This paper concerns designing and optimizing a new architecture of a low power, high speed, and small-area 4-bit column-parallel ADC Flash. Later in this study, we propose to interpose an S/H block in the converter. This integration of S/H block increases the sensitiveness of the converter to the very small amplitude of the input signal from the sensor and provides a sufficient time to the converter to be able to code the input signal. This ADC is developed in 0.18 μm CMOS process with a pixel pitch of 35 μm. The proposed ADC responds to the constraints of power dissipation, size, and speed for the MAPS composed of a matrix of 64 rows and 48 columns where each column ADC covers a small area of 35 × 336.76 μm2. The proposed ADC consumes low power at a 1.8 V supply and 100 MS/s sampling rate with dynamic range of 125 mV. Its DNL and INL are 0.0812/−0.0787 LSB and 0.0811/−0.0787 LSB, respectively. Furthermore, this ADC achieves a high speed more than 5 GHz. PMID:28243628

  12. Active pixel as dosimetric device for interventional radiology

    NASA Astrophysics Data System (ADS)

    Servoli, L.; Baldaccini, F.; Biasini, M.; Checcucci, B.; Chiocchini, S.; Cicioni, R.; Conti, E.; Di Lorenzo, R.; Dipilato, A. C.; Esposito, A.; Fanó, L.; Paolucci, M.; Passeri, D.; Pentiricci, A.; Placidi, P.

    2013-08-01

    Interventional Radiology (IR) is a subspecialty of radiology comprehensive of all minimally invasive diagnostic and therapeutic procedures performed using radiological devices to obtain image guidance. The interventional procedures are potentially harmful for interventional radiologists and medical staff due to the X-ray diffusion by the patient's body. The characteristic energy range of the diffused photons spans few tens of keV. In this work we will present a proposal for a new X-ray sensing element in the energy range of interest for IR procedures. The sensing element will then be assembled in a dosimeter prototype, capable of real-time measurement, packaged in a small form-factor, with wireless communication and no external power supply to be used for individual operators dosimetry for IR procedures. For the sensor, which is the heart of the system, we considered three different Active Pixel Sensors (APS). They have shown a good capability as single X-ray photon detectors, up to several tens keV photon energy. Two dosimetric quantities have been considered, the number of detected photons and the measured energy deposition. Both observables have a linear dependence with the dose, as measured by commercial dosimeters. The uncertainties in the measurement are dominated by statistic and can be pushed at ˜5% for all the sensors under test.

  13. Development of a super B-factory monolithic active pixel detector—the Continuous Acquisition Pixel (CAP) prototypes

    NASA Astrophysics Data System (ADS)

    Varner, G.; Barbero, M.; Bozek, A.; Browder, T.; Fang, F.; Hazumi, M.; Igarashi, A.; Iwaida, S.; Kennedy, J.; Kent, N.; Olsen, S.; Palka, H.; Rosen, M.; Ruckman, L.; Stanic, S.; Trabelsi, K.; Tsuboyama, T.; Uchida, K.

    2005-04-01

    Over the last few years great progress has been made in the technological development of Monolithic Active Pixel Sensors (MAPS) such that upgrades to existing vertex detectors using this technology are now actively being considered. Future vertex detection at an upgraded KEK-B factory, already the highest luminosity collider in the world, will require a detector technology capable of withstanding the increased track densities and larger radiation exposures. Near the beam pipe the current silicon strip detectors have projected occupancies in excess of 100%. Deep sub-micron MAPS look very promising to address this problem. In the context of an upgrade to the Belle vertex detector, the major obstacles to realizing such a device have been concerns about radiation hardness and readout speed. Two prototypes implemented in the TSMC 0.35 μm process have been developed to address these issues. Denoted the Continuous Acquisition Pixel, or CAP, the two variants of this architecture are distinguished in that CAP2 includes an 8-deep sampling pipeline within each 22.5 μm 2 pixel. Preliminary test results and remaining R&D issues are presented.

  14. A novel position and time sensing active pixel sensor with field-assisted electron collection for charged particle tracking and electron microscopy

    NASA Astrophysics Data System (ADS)

    De Geronimo, G.; Deptuch, G.; Dragone, A.; Radeka, V.; Rehak, P.; Castoldi, A.; Fazzi, A.; Gatti, E.; Guazzoni, C.; Rijssenbeek, M.; Dulinski, W.; Besson, A.; Deveaux, M.; Winter, M.

    2006-11-01

    A new type of active pixel sensors (APSs) to track charged particles for particle physics experiments or to count number of electrons that cross any pixel at the focal plane of electron microscopes is described. The electric field of desirable shape is created inside the active volume of the pixel introducing the drift component in the movement of the signal electrons towards charge collecting electrodes. The electric field results from the flow of ˜100 mA/cm 2 hole currents within individual pixels of the sensor. The proposed sensor is produced using a standard industrially available complementary metal oxide silicon (CMOS) process. There are two main advantages of the proposed detectors when compared to the present (February 2005) state-of-the-art, i.e. field-free APS sensors. The first advantage of a field-assisted transport mechanism is the reduction of the charge collection time and of the sharing of the signal electrons between adjacent pixels by diffusion. The second advantage is the freedom to use both kinds of MOS transistors within each pixel of the sensor. Thus, the full functional power of CMOS circuits can be embedded in situ. As an example, 16-bit scalers will be implemented in each pixel of the sensor for electron microscopy. The reduced collection time combined with the state-of-the-art electronics within each pixel provides the most complete information about the position and the timing of incident charged particles for particle physics experiments. Position resolution of new sensors was computationally simulated to be a few microns, that is, the same as the resolution of standard APSs. Moreover, the active depth of the sensor and the associate electronics is less than about 20 μm and a thinned down sensor together with its beryllium backing can have a total thickness of less than 0.1% of one radiation length. The reduction of the thickness of the detector reduces the amount of multiple scattering within the detector. The determination of the

  15. A novel source-drain follower for monolithic active pixel sensors

    NASA Astrophysics Data System (ADS)

    Gao, C.; Aglieri, G.; Hillemanns, H.; Huang, G.; Junique, A.; Keil, M.; Kim, D.; Kofarago, M.; Kugathasan, T.; Mager, M.; Marin Tobon, C. A.; Martinengo, P.; Mugnier, H.; Musa, L.; Lee, S.; Reidt, F.; Riedler, P.; Rousset, J.; Sielewicz, K. M.; Snoeys, W.; Sun, X.; Van Hoorne, J. W.; Yang, P.

    2016-09-01

    Monolithic active pixel sensors (MAPS) receive interest in tracking applications in high energy physics as they integrate sensor and readout electronics in one silicon die with potential for lower material budget and cost, and better performance. Source followers (SFs) are widely used for MAPS readout: they increase charge conversion gain 1/Ceff or decrease the effective sensing node capacitance Ceff because the follower action compensates part of the input capacitance. Charge conversion gain is critical for analog power consumption and therefore for material budget in tracking applications, and also has direct system impact. This paper presents a novel source-drain follower (SDF), where both source and drain follow the gate potential improving charge conversion gain. For the inner tracking system (ITS) upgrade of the ALICE experiment at CERN, low material budget is a primary requirement. The SDF circuit was studied as part of the effort to optimize the effective capacitance of the sensing node. The collection electrode, input transistor and routing metal all contribute to Ceff. Reverse sensor bias reduces the collection electrode capacitance. The novel SDF circuit eliminates the contribution of the input transistor to Ceff, reduces the routing contribution if additional shielding is introduced, provides a way to estimate the capacitance of the sensor itself, and has a voltage gain closer to unity than the standard SF. The SDF circuit has a somewhat larger area with a somewhat smaller bandwidth, but this is acceptable in most cases. A test chip, manufactured in a 180 nm CMOS image sensor process, implements small prototype pixel matrices in different flavors to compare the standard SF to the novel SF and to the novel SF with additional shielding. The effective sensing node capacitance was measured using a 55Fe source. Increasing reverse substrate bias from -1 V to -6 V reduces Ceff by 38% and the equivalent noise charge (ENC) by 22% for the standard SF. The SDF

  16. All-CMOS night vision viewer with integrated microdisplay

    NASA Astrophysics Data System (ADS)

    Goosen, Marius E.; Venter, Petrus J.; du Plessis, Monuko; Faure, Nicolaas M.; Janse van Rensburg, Christo; Rademeyer, Pieter

    2014-02-01

    The unrivalled integration potential of CMOS has made it the dominant technology for digital integrated circuits. With the advent of visible light emission from silicon through hot carrier electroluminescence, several applications arose, all of which rely upon the advantages of mature CMOS technologies for a competitive edge in a very active and attractive market. In this paper we present a low-cost night vision viewer which employs only standard CMOS technologies. A commercial CMOS imager is utilized for near infrared image capturing with a 128x96 pixel all-CMOS microdisplay implemented to convey the image to the user. The display is implemented in a standard 0.35 μm CMOS process, with no process alterations or post processing. The display features a 25 μm pixel pitch and a 3.2 mm x 2.4 mm active area, which through magnification presents the virtual image to the user equivalent of a 19-inch display viewed from a distance of 3 meters. This work represents the first application of a CMOS microdisplay in a low-cost consumer product.

  17. CAOS-CMOS camera.

    PubMed

    Riza, Nabeel A; La Torre, Juan Pablo; Amin, M Junaid

    2016-06-13

    Proposed and experimentally demonstrated is the CAOS-CMOS camera design that combines the coded access optical sensor (CAOS) imager platform with the CMOS multi-pixel optical sensor. The unique CAOS-CMOS camera engages the classic CMOS sensor light staring mode with the time-frequency-space agile pixel CAOS imager mode within one programmable optical unit to realize a high dynamic range imager for extreme light contrast conditions. The experimentally demonstrated CAOS-CMOS camera is built using a digital micromirror device, a silicon point-photo-detector with a variable gain amplifier, and a silicon CMOS sensor with a maximum rated 51.3 dB dynamic range. White light imaging of three different brightness simultaneously viewed targets, that is not possible by the CMOS sensor, is achieved by the CAOS-CMOS camera demonstrating an 82.06 dB dynamic range. Applications for the camera include industrial machine vision, welding, laser analysis, automotive, night vision, surveillance and multispectral military systems.

  18. CMOS sensor for face tracking and recognition

    NASA Astrophysics Data System (ADS)

    Ginhac, Dominique; Prasetyo, Eri; Paindavoine, Michel

    2005-03-01

    This paper describes the main principles of a vision sensor dedicated to the detecting and tracking faces in video sequences. For this purpose, a current mode CMOS active sensor has been designed using an array of pixels that are amplified by using current mirrors of column amplifier. This circuit is simulated using Mentor Graphics software with parameters of a 0.6 μm CMOS process. The circuit design is added with a sequential control unit which purpose is to realise capture of subwindows at any location and any size in the whole image.

  19. X-ray imaging characterization of active edge silicon pixel sensors

    NASA Astrophysics Data System (ADS)

    Ponchut, C.; Ruat, M.; Kalliopuska, J.

    2014-05-01

    The aim of this work was the experimental characterization of edge effects in active-edge silicon pixel sensors, in the frame of X-ray pixel detectors developments for synchrotron experiments. We produced a set of active edge pixel sensors with 300 to 500 μm thickness, edge widths ranging from 100 μm to 150 μm, and n or p pixel contact types. The sensors with 256 × 256 pixels and 55 × 55 μm2 pixel pitch were then bump-bonded to Timepix readout chips for X-ray imaging measurements. The reduced edge widths makes the edge pixels more sensitive to the electrical field distribution at the sensor boundaries. We characterized this effect by mapping the spatial response of the sensor edges with a finely focused X-ray synchrotron beam. One of the samples showed a distortion-free response on all four edges, whereas others showed variable degrees of distortions extending at maximum to 300 micron from the sensor edge. An application of active edge pixel sensors to coherent diffraction imaging with synchrotron beams is described.

  20. Characteristics of Monolithically Integrated InGaAs Active Pixel Image Array

    NASA Technical Reports Server (NTRS)

    Kim, Q.; Cunningham, T. J.; Pain, B.; Lange, M. J.; Olsen, G. H.

    1999-01-01

    Switching and amplifying characteristics of a newly developed monolithic InGaAs Active Pixel Imager Array are presented. The sensor array is fabricated from InGaAs material epitaxially deposited on an InP substrate.

  1. Passive radiation detection using optically active CMOS sensors

    NASA Astrophysics Data System (ADS)

    Dosiek, Luke; Schalk, Patrick D.

    2013-05-01

    Recently, there have been a number of small-scale and hobbyist successes in employing commodity CMOS-based camera sensors for radiation detection. For example, several smartphone applications initially developed for use in areas near the Fukushima nuclear disaster are capable of detecting radiation using a cell phone camera, provided opaque tape is placed over the lens. In all current useful implementations, it is required that the sensor not be exposed to visible light. We seek to build a system that does not have this restriction. While building such a system would require sophisticated signal processing, it would nevertheless provide great benefits. In addition to fulfilling their primary function of image capture, cameras would also be able to detect unknown radiation sources even when the danger is considered to be low or non-existent. By experimentally profiling the image artifacts generated by gamma ray and β particle impacts, algorithms are developed to identify the unique features of radiation exposure, while discarding optical interaction and thermal noise effects. Preliminary results focus on achieving this goal in a laboratory setting, without regard to integration time or computational complexity. However, future work will seek to address these additional issues.

  2. Memory based active contour algorithm using pixel-level classified images for colon crypt segmentation.

    PubMed

    Cohen, Assaf; Rivlin, Ehud; Shimshoni, Ilan; Sabo, Edmond

    2015-07-01

    In this paper, we introduce a novel method for detection and segmentation of crypts in colon biopsies. Most of the approaches proposed in the literature try to segment the crypts using only the biopsy image without understanding the meaning of each pixel. The proposed method differs in that we segment the crypts using an automatically generated pixel-level classification image of the original biopsy image and handle the artifacts due to the sectioning process and variance in color, shape and size of the crypts. The biopsy image pixels are classified to nuclei, immune system, lumen, cytoplasm, stroma and goblet cells. The crypts are then segmented using a novel active contour approach, where the external force is determined by the semantics of each pixel and the model of the crypt. The active contour is applied for every lumen candidate detected using the pixel-level classification. Finally, a false positive crypt elimination process is performed to remove segmentation errors. This is done by measuring their adherence to the crypt model using the pixel level classification results. The method was tested on 54 biopsy images containing 4944 healthy and 2236 cancerous crypts, resulting in 87% detection of the crypts with 9% of false positive segments (segments that do not represent a crypt). The segmentation accuracy of the true positive segments is 96%.

  3. A Highly Linear and Wide Input Range Four-Quadrant CMOS Analog Multiplier Using Active Feedback

    NASA Astrophysics Data System (ADS)

    Huang, Zhangcai; Jiang, Minglu; Inoue, Yasuaki

    Analog multipliers are one of the most important building blocks in analog signal processing circuits. The performance with high linearity and wide input range is usually required for analog four-quadrant multipliers in most applications. Therefore, a highly linear and wide input range four-quadrant CMOS analog multiplier using active feedback is proposed in this paper. Firstly, a novel configuration of four-quadrant multiplier cell is presented. Its input dynamic range and linearity are improved significantly by adding two resistors compared with the conventional structure. Then based on the proposed multiplier cell configuration, a four-quadrant CMOS analog multiplier with active feedback technique is implemented by two operational amplifiers. Because of both the proposed multiplier cell and active feedback technique, the proposed multiplier achieves a much wider input range with higher linearity than conventional structures. The proposed multiplier was fabricated by a 0.6µm CMOS process. Experimental results show that the input range of the proposed multiplier can be up to 5.6Vpp with 0.159% linearity error on VX and 4.8Vpp with 0.51% linearity error on VY for ±2.5V power supply voltages, respectively.

  4. High-sensitivity chemiluminescence detection of cytokines using an antibody-immobilized CMOS image sensor

    NASA Astrophysics Data System (ADS)

    Hong, Dong-Gu; Joung, Hyou-Arm; Kim, Sang-Hyo; Kim, Min-Gon

    2013-05-01

    In this study, we used a Complementary Metal Oxide Semiconductor (CMOS) image sensor with immobilizing antibodies on its surface to detect human cytokines, which are activators that mediate intercellular communication including expression and control of immune responses. The CMOS image sensor has many advantages over the Charge Couple Device, including lower power consumption, operation voltage, and cost. The photodiode, a unit pixel component in the CMOS image sensor, receives light from the detection area and generates digital image data. About a million pixels are embedded, and size of each pixel is 3 x 3 μm. The chemiluminescence reaction produces light from the chemical reaction of luminol and hydrogen peroxide. To detect cytokines, antibodies were immobilized on the surface of the CMOS image sensor, and a sandwich immunoassay using an HRP-labeled antibody was performed. An HRP-catalyzed chemiluminescence reaction was measured by each pixel of the CMOS image sensor. Pixels with stronger signals indicated higher cytokine concentrations; thus, we were able to measure human interleukin-5 (IL-5) at femtomolar concentrations.

  5. Depleted Monolithic Pixels (DMAPS) in a 150 nm technology: lab and beam results

    NASA Astrophysics Data System (ADS)

    Obermann, T.; Hemperek, T.; Hügging, F.; Krüger, H.; Pohl, D.-L.; Schwenker, B.; Wermes, N.

    2017-01-01

    The fully depleted monolithic active pixel sensor (DMAPS) is a new concept integrating full CMOS circuitry onto a fully depletable silicon substrate wafer. The realization of prototypes of the DMAPS concept relies on the availability of multiple well CMOS processes and high resistive substrates. The CMOS foundry ESPROS Photonics offers both and was chosen for prototyping. Two prototypes, EPCB01 and EPCB02, were developed in a 150 nm process on a high resistive n-type wafer of 50 μm thickness. The prototypes have 352 square pixels of 40 μm pitch and small n-well charge collection node with very low capacitance (n+-implantation size: 5 μm by 5 μm) and about 150 transistors per pixel (CSA and discriminator plus a small digital part).

  6. Imaging of moving fiducial markers during radiotherapy using a fast, efficient active pixel sensor based EPID

    SciTech Connect

    Osmond, John P. F.; Zin, Hafiz M.; Harris, Emma J.; Lupica, Giovanni; Allinson, Nigel M.; Evans, Philip M.

    2011-11-15

    Purpose: The purpose of this work was to investigate the use of an experimental complementary metal-oxide-semiconductor (CMOS) active pixel sensor (APS) for tracking of moving fiducial markers during radiotherapy. Methods: The APS has an active area of 5.4 x 5.4 cm and maximum full frame read-out rate of 20 frame s{sup -1}, with the option to read out a region-of-interest (ROI) at an increased rate. It was coupled to a 4 mm thick ZnWO4 scintillator which provided a quantum efficiency (QE) of 8% for a 6 MV x-ray treatment beam. The APS was compared with a standard iViewGT flat panel amorphous Silicon (a-Si) electronic portal imaging device (EPID), with a QE of 0.34% and a frame-rate of 2.5 frame s{sup -1}. To investigate the ability of the two systems to image markers, four gold cylinders of length 8 mm and diameter 0.8, 1.2, 1.6, and 2 mm were placed on a motion-platform. Images of the stationary markers were acquired using the APS at a frame-rate of 20 frame s{sup -1}, and a dose-rate of 143 MU min{sup -1} to avoid saturation. EPID images were acquired at the maximum frame-rate of 2.5 frame s{sup -1}, and a reduced dose-rate of 19 MU min{sup -1} to provide a similar dose per frame to the APS. Signal-to-noise ratio (SNR) of the background signal and contrast-to-noise ratio (CNR) of the marker signal relative to the background were evaluated for both imagers at doses of 0.125 to 2 MU. Results: Image quality and marker visibility was found to be greater in the APS with SNR {approx}5 times greater than in the EPID and CNR up to an order of magnitude greater for all four markers. To investigate the ability to image and track moving markers the motion-platform was moved to simulate a breathing cycle with period 6 s, amplitude 20 mm and maximum speed 13.2 mm s{sup -1}. At the minimum integration time of 50 ms a tracking algorithm applied to the APS data found all four markers with a success rate of {>=}92% and positional error {<=}90 {mu}m. At an integration time of 400

  7. Design and Fabrication of Vertically-Integrated CMOS Image Sensors

    PubMed Central

    Skorka, Orit; Joseph, Dileepan

    2011-01-01

    Technologies to fabricate integrated circuits (IC) with 3D structures are an emerging trend in IC design. They are based on vertical stacking of active components to form heterogeneous microsystems. Electronic image sensors will benefit from these technologies because they allow increased pixel-level data processing and device optimization. This paper covers general principles in the design of vertically-integrated (VI) CMOS image sensors that are fabricated by flip-chip bonding. These sensors are composed of a CMOS die and a photodetector die. As a specific example, the paper presents a VI-CMOS image sensor that was designed at the University of Alberta, and fabricated with the help of CMC Microsystems and Micralyne Inc. To realize prototypes, CMOS dies with logarithmic active pixels were prepared in a commercial process, and photodetector dies with metal-semiconductor-metal devices were prepared in a custom process using hydrogenated amorphous silicon. The paper also describes a digital camera that was developed to test the prototype. In this camera, scenes captured by the image sensor are read using an FPGA board, and sent in real time to a PC over USB for data processing and display. Experimental results show that the VI-CMOS prototype has a higher dynamic range and a lower dark limit than conventional electronic image sensors. PMID:22163860

  8. Design and fabrication of vertically-integrated CMOS image sensors.

    PubMed

    Skorka, Orit; Joseph, Dileepan

    2011-01-01

    Technologies to fabricate integrated circuits (IC) with 3D structures are an emerging trend in IC design. They are based on vertical stacking of active components to form heterogeneous microsystems. Electronic image sensors will benefit from these technologies because they allow increased pixel-level data processing and device optimization. This paper covers general principles in the design of vertically-integrated (VI) CMOS image sensors that are fabricated by flip-chip bonding. These sensors are composed of a CMOS die and a photodetector die. As a specific example, the paper presents a VI-CMOS image sensor that was designed at the University of Alberta, and fabricated with the help of CMC Microsystems and Micralyne Inc. To realize prototypes, CMOS dies with logarithmic active pixels were prepared in a commercial process, and photodetector dies with metal-semiconductor-metal devices were prepared in a custom process using hydrogenated amorphous silicon. The paper also describes a digital camera that was developed to test the prototype. In this camera, scenes captured by the image sensor are read using an FPGA board, and sent in real time to a PC over USB for data processing and display. Experimental results show that the VI-CMOS prototype has a higher dynamic range and a lower dark limit than conventional electronic image sensors.

  9. Assessing Design Activity in Complex CMOS Circuit Design.

    ERIC Educational Resources Information Center

    Biswas, Gautam; And Others

    This report characterizes human problem solving in digital circuit design. Protocols of 11 different designers with varying degrees of training were analyzed by identifying the designers' problem solving strategies and discussing activity patterns that differentiate the designers. These methods are proposed as a tentative basis for assessing…

  10. The MuPix high voltage monolithic active pixel sensor for the Mu3e experiment

    NASA Astrophysics Data System (ADS)

    Augustin, H.; Berger, N.; Bravar, S.; Corrodi, S.; Damyanova, A.; Förster, F.; Gredig, R.; Herkert, A.; Huang, Q.; Huth, L.; Kiehn, M.; Kozlinskiy, A.; Maldaner, S.; Perić, I.; Philipp, R.; Robmann, P.; Schöning, A.; Shrestha, S.; vom Bruch, D.; Weber, T.; Wiedner, D.

    2015-03-01

    Mu3e is a novel experiment searching for charged lepton flavor violation in the rare decay μ → eee. In order to reduce background by up to 16 orders of magnitude, decay vertex position, decay time and particle momenta have to be measured precisely. A pixel tracker based on 50 μm thin high voltage monolithic active pixel sensors (HV-MAPS) in a magnetic field will deliver precise vertex and momentum information. Test beam results like an excellent efficiency of >99.5% and a time resolution of better than 16.6 ns obtained with the MuPix HV-MAPS chip developed for the Mu3e pixel tracker are presented.

  11. Results of the 2015 testbeam of a 180 nm AMS High-Voltage CMOS sensor prototype

    SciTech Connect

    Benoit, M.; de Mendizabal, J. Bilbao; Casse, G.; Chen, H.; Chen, K.; Bello, F. A. Di; Ferrere, D.; Golling, T.; Gonzalez-Sevilla, S.; Iacobucci, G.; Lanni, F.; Liu, H.; Meloni, F.; Meng, L.; Miucci, A.; Muenstermann, D.; Nessi, M.; Perić, I.; Rimoldi, M.; Ristic, B.; Pinto, M. Vicente Barrero; Vossebeld, J.; Weber, M.; Wu, W.; Xu, L.

    2016-07-21

    We investigated the active pixel sensors based on the High-Voltage CMOS technology as a viable option for the future pixel tracker of the ATLAS experiment at the High-Luminosity LHC. Our paper reports on the testbeam measurements performed at the H8 beamline of the CERN Super Proton Synchrotron on a High-Voltage CMOS sensor prototype produced in 180 nm AMS technology. These results in terms of tracking efficiency and timing performance, for different threshold and bias conditions, are shown.

  12. Bad pixel mapping

    NASA Astrophysics Data System (ADS)

    Smith, Roger M.; Hale, David; Wizinowich, Peter

    2014-07-01

    Bad pixels are generally treated as a loss of useable area and then excluded from averaged performance metrics. The definition and detection of "bad pixels" or "cosmetic defects" are seldom discussed, perhaps because they are considered self-evident or of minor consequence for any scientific grade detector, however the ramifications can be more serious than generally appreciated. While the definition of pixel performance is generally understood, the classification of pixels as useable is highly application-specific, as are the consequences of ignoring or interpolating over such pixels. CMOS sensors (including NIR detectors) exhibit less compact distributions of pixel properties than CCDs. The extended tails in these distributions result in a steeper increase in bad pixel counts as performance thresholds are tightened which comes as a surprise to many users. To illustrate how some applications are much more sensitive to bad pixels than others, we present a bad pixel mapping exercise for the Teledyne H2RG used as the NIR tip-tilt sensor in the Keck-1 Adaptive Optics system. We use this example to illustrate the wide range of metrics by which a pixel might be judged inadequate. These include pixel bump bond connectivity, vignetting, addressing faults in the mux, severe sensitivity deficiency of some pixels, non linearity, poor signal linearity, low full well, poor mean-variance linearity, excessive noise and high dark current. Some pixels appear bad by multiple metrics. We also discuss the importance of distinguishing true performance outliers from measurement errors. We note how the complexity of these issues has ramifications for sensor procurement and acceptance testing strategies.

  13. Improved Space Object Observation Techniques Using CMOS Detectors

    NASA Astrophysics Data System (ADS)

    Schildknecht, T.; Hinze, A.; Schlatter, P.; Silha, J.; Peltonen, J.; Santti, T.; Flohrer, T.

    2013-08-01

    CMOS-sensors, or in general Active Pixel Sensors (APS), are rapidly replacing CCDs in the consumer camera market. Due to significant technological advances during the past years these devices start to compete with CCDs also for demanding scientific imaging applications, in particular in the astronomy community. CMOS detectors offer a series of inherent advantages compared to CCDs, due to the structure of their basic pixel cells, which each contain their own amplifier and readout electronics. The most prominent advantages for space object observations are the extremely fast and flexible readout capabilities, feasibility for electronic shuttering and precise epoch registration, and the potential to perform image processing operations on-chip and in real-time. Presently applied and proposed optical observation strategies for space debris surveys and space surveillance applications had to be analyzed. The major design drivers were identified and potential benefits from using available and future CMOS sensors were assessed. The major challenges and design drivers for ground-based and space-based optical observation strategies have been analyzed. CMOS detector characteristics were critically evaluated and compared with the established CCD technology, especially with respect to the above mentioned observations. Similarly, the desirable on-chip processing functionalities which would further enhance the object detection and image segmentation were identified. Finally, the characteristics of a particular CMOS sensor available at the Zimmerwald observatory were analyzed by performing laboratory test measurements.

  14. Heavily irradiated N-in-p thin planar pixel sensors with and without active edges

    NASA Astrophysics Data System (ADS)

    Terzo, S.; Andricek, L.; Macchiolo, A.; Moser, H. G.; Nisius, R.; Richter, R. H.; Weigell, P.

    2014-05-01

    We present the results of the characterization of silicon pixel modules employing n-in-p planar sensors with an active thickness of 150 μm, produced at MPP/HLL, and 100-200 μm thin active edge sensor devices, produced at VTT in Finland. These thin sensors are designed as candidates for the ATLAS pixel detector upgrade to be operated at the HL-LHC, as they ensure radiation hardness at high fluences. They are interconnected to the ATLAS FE-I3 and FE-I4 read-out chips. Moreover, the n-in-p technology only requires a single side processing and thereby it is a cost-effective alternative to the n-in-n pixel technology presently employed in the LHC experiments. High precision beam test measurements of the hit efficiency have been performed on these devices both at the CERN SpS and at DESY, Hamburg. We studied the behavior of these sensors at different bias voltages and different beam incident angles up to the maximum one expected for the new Insertable B-Layer of ATLAS and for HL-LHC detectors. Results obtained with 150 μm thin sensors, assembled with the new ATLAS FE-I4 chip and irradiated up to a fluence of 4 × 1015 neq/cm2, show that they are excellent candidates for larger radii of the silicon pixel tracker in the upgrade of the ATLAS detector at HL-LHC. In addition, the active edge technology of the VTT devices maximizes the active area of the sensor and reduces the material budget to suit the requirements for the innermost layers. The edge pixel performance of VTT modules has been investigated at beam test experiments and the analysis after irradiation up to a fluence of 5 × 1015 neq/cm2 has been performed using radioactive sources in the laboratory.

  15. Contact CMOS imaging of gaseous oxygen sensor array

    PubMed Central

    Daivasagaya, Daisy S.; Yao, Lei; Yi Yung, Ka; Hajj-Hassan, Mohamad; Cheung, Maurice C.; Chodavarapu, Vamsy P.; Bright, Frank V.

    2014-01-01

    We describe a compact luminescent gaseous oxygen (O2) sensor microsystem based on the direct integration of sensor elements with a polymeric optical filter and placed on a low power complementary metal-oxide semiconductor (CMOS) imager integrated circuit (IC). The sensor operates on the measurement of excited-state emission intensity of O2-sensitive luminophore molecules tris(4,7-diphenyl-1,10-phenanthroline) ruthenium(II) ([Ru(dpp)3]2+) encapsulated within sol–gel derived xerogel thin films. The polymeric optical filter is made with polydimethylsiloxane (PDMS) that is mixed with a dye (Sudan-II). The PDMS membrane surface is molded to incorporate arrays of trapezoidal microstructures that serve to focus the optical sensor signals on to the imager pixels. The molded PDMS membrane is then attached with the PDMS color filter. The xerogel sensor arrays are contact printed on top of the PDMS trapezoidal lens-like microstructures. The CMOS imager uses a 32 × 32 (1024 elements) array of active pixel sensors and each pixel includes a high-gain phototransistor to convert the detected optical signals into electrical currents. Correlated double sampling circuit, pixel address, digital control and signal integration circuits are also implemented on-chip. The CMOS imager data is read out as a serial coded signal. The CMOS imager consumes a static power of 320 µW and an average dynamic power of 625 µW when operating at 100 Hz sampling frequency and 1.8 V DC. This CMOS sensor system provides a useful platform for the development of miniaturized optical chemical gas sensors. PMID:24493909

  16. Contact CMOS imaging of gaseous oxygen sensor array.

    PubMed

    Daivasagaya, Daisy S; Yao, Lei; Yi Yung, Ka; Hajj-Hassan, Mohamad; Cheung, Maurice C; Chodavarapu, Vamsy P; Bright, Frank V

    2011-10-01

    We describe a compact luminescent gaseous oxygen (O2) sensor microsystem based on the direct integration of sensor elements with a polymeric optical filter and placed on a low power complementary metal-oxide semiconductor (CMOS) imager integrated circuit (IC). The sensor operates on the measurement of excited-state emission intensity of O2-sensitive luminophore molecules tris(4,7-diphenyl-1,10-phenanthroline) ruthenium(II) ([Ru(dpp)3](2+)) encapsulated within sol-gel derived xerogel thin films. The polymeric optical filter is made with polydimethylsiloxane (PDMS) that is mixed with a dye (Sudan-II). The PDMS membrane surface is molded to incorporate arrays of trapezoidal microstructures that serve to focus the optical sensor signals on to the imager pixels. The molded PDMS membrane is then attached with the PDMS color filter. The xerogel sensor arrays are contact printed on top of the PDMS trapezoidal lens-like microstructures. The CMOS imager uses a 32 × 32 (1024 elements) array of active pixel sensors and each pixel includes a high-gain phototransistor to convert the detected optical signals into electrical currents. Correlated double sampling circuit, pixel address, digital control and signal integration circuits are also implemented on-chip. The CMOS imager data is read out as a serial coded signal. The CMOS imager consumes a static power of 320 µW and an average dynamic power of 625 µW when operating at 100 Hz sampling frequency and 1.8 V DC. This CMOS sensor system provides a useful platform for the development of miniaturized optical chemical gas sensors.

  17. Research on evaluation method of CMOS camera

    NASA Astrophysics Data System (ADS)

    Zhang, Shaoqiang; Han, Weiqiang; Cui, Lanfang

    2014-09-01

    In some professional image application fields, we need to test some key parameters of the CMOS camera and evaluate the performance of the device. Aiming at this requirement, this paper proposes a perfect test method to evaluate the CMOS camera. Considering that the CMOS camera has a big fixed pattern noise, the method proposes the `photon transfer curve method' based on pixels to measure the gain and the read noise of the camera. The advantage of this method is that it can effectively wipe out the error brought by the response nonlinearity. Then the reason of photoelectric response nonlinearity of CMOS camera is theoretically analyzed, and the calculation formula of CMOS camera response nonlinearity is deduced. Finally, we use the proposed test method to test the CMOS camera of 2560*2048 pixels. In addition, we analyze the validity and the feasibility of this method.

  18. Characteristics of Monolithically Integrated InGaAs Active Pixel Imager Array

    NASA Technical Reports Server (NTRS)

    Kim, Q.; Cunningham, T. J.; Pain, B.; Lange, M. J.; Olsen, G. H.

    2000-01-01

    Switching and amplifying characteristics of a newly developed monolithic InGaAs Active Pixel Imager Array are presented. The sensor array is fabricated from InGaAs material epitaxially deposited on an InP substrate. It consists of an InGaAs photodiode connected to InP depletion-mode junction field effect transistors (JFETs) for low leakage, low power, and fast control of circuit signal amplifying, buffering, selection, and reset. This monolithically integrated active pixel sensor configuration eliminates the need for hybridization with silicon multiplexer. In addition, the configuration allows the sensor to be front illuminated, making it sensitive to visible as well as near infrared signal radiation. Adapting the existing 1.55 micrometer fiber optical communication technology, this integration will be an ideal system of optoelectronic integration for dual band (Visible/IR) applications near room temperature, for use in atmospheric gas sensing in space, and for target identification on earth. In this paper, two different types of small 4 x 1 test arrays will be described. The effectiveness of switching and amplifying circuits will be discussed in terms of circuit effectiveness (leakage, operating frequency, and temperature) in preparation for the second phase demonstration of integrated, two-dimensional monolithic InGaAs active pixel sensor arrays for applications in transportable shipboard surveillance, night vision, and emission spectroscopy.

  19. Development of active edge pixel sensors and four-side buttable modules using vertical integration technologies

    NASA Astrophysics Data System (ADS)

    Macchiolo, A.; Andricek, L.; Moser, H.-G.; Nisius, R.; Richter, R. H.; Terzo, S.; Weigell, P.

    2014-11-01

    We present an R&D activity focused on the development of novel modules for the upgrade of the ATLAS pixel system at the High Luminosity LHC (HL-LHC). The modules consist of n-in-p pixel sensors, 100 or 200 μm thick, produced at VTT (Finland) with an active edge technology, which considerably reduces the dead area at the periphery of the device. The sensors are interconnected with solder bump-bonding to the ATLAS FE-I3 and FE-I4 read-out chips, and characterised with radioactive sources and beam tests at the CERN-SPS and DESY. The results of these measurements will be discussed for devices before and after irradiation up to a fluence of 5 ×1015neq /cm2. We will also report on the R&D activity to obtain Inter Chip Vias (ICVs) on the ATLAS read-out chip in collaboration with the Fraunhofer Institute EMFT. This step is meant to prove the feasibility of the signal transport to the newly created readout pads on the backside of the chips allowing for four side buttable devices without the presently used cantilever for wire bonding. The read-out chips with ICVs will be interconnected to thin pixel sensors, 75 μm and 150 μm thick, with the Solid Liquid Interdiffusion (SLID) technology, which is an alternative to the standard solder bump-bonding.

  20. Image pixel device using integrated organic electronic components

    NASA Astrophysics Data System (ADS)

    Swathi, K.; Narayan, K. S.

    2016-11-01

    We report a solution processed, monolithically integrated device similar to an imaging pixel element used in complementary metal-oxide semiconductor (CMOS) based cameras. This integrated pixel essentially consists of a pair of organic photodiode (OPD) and organic field effect transistor (OFET). The signal generated by the light responsive OPD drives the OFET to different output states to quantify the light intensity. The prerequisite of a low operating voltage OFET (<2 V) was achieved using a bottom-gate, top-contact OFET consisting of a high mobility polymer semiconductor and a self-assembled hybrid dielectric layer. A bulk heterojunction blend was used as the photo-active layer in the OPD along with suitable buffer layers for charge extraction. The material parameters were optimized to realize a suitable structure which clearly demonstrated the interplay of the OPD and OFET operations, thereby forming a roadmap for all-organic CMOS arrays.

  1. CMOS imager for pointing and tracking applications

    NASA Technical Reports Server (NTRS)

    Pain, Bedabrata (Inventor); Sun, Chao (Inventor); Yang, Guang (Inventor); Heynssens, Julie B. (Inventor)

    2006-01-01

    Systems and techniques to realize pointing and tracking applications with CMOS imaging devices. In general, in one implementation, the technique includes: sampling multiple rows and multiple columns of an active pixel sensor array into a memory array (e.g., an on-chip memory array), and reading out the multiple rows and multiple columns sampled in the memory array to provide image data with reduced motion artifact. Various operation modes may be provided, including TDS, CDS, CQS, a tracking mode to read out multiple windows, and/or a mode employing a sample-first-read-later readout scheme. The tracking mode can take advantage of a diagonal switch array. The diagonal switch array, the active pixel sensor array and the memory array can be integrated onto a single imager chip with a controller. This imager device can be part of a larger imaging system for both space-based applications and terrestrial applications.

  2. CMOS common-mode rejection filter with floating active transformer operation

    NASA Astrophysics Data System (ADS)

    Uchida, Daisuke; Ikebe, Masayuki; Motohisa, Junichi; Sano, Eiichi; Kondou, Akira

    2014-01-01

    We propose an inductorless common-mode rejection filter with a gyrator-C network for common-mode-noise reduction. By adopting a gyrator-C network and ladder structure, high-order and small filter circuits with active transformer operation were fabricated. The filter was designed and fabricated in a Taiwan Semiconductor Manufacturing Company (TSMC) 0.18 µm CMOS process. This filter exhibited a CMRR of 80 dB, output noise voltage of 103 nV/Hz1/2, third-order input intercept point of 8.8 dBm at 1 MHz operation, and cutoff frequency of under 6 MHz. The total power consumption was 14.8 mW with a 2.5 V supply, and the chip area was 0.7 × 0.4 mm2.

  3. Comparative study of various pixel photodiodes for digital radiography: Junction structure, corner shape and noble window opening

    NASA Astrophysics Data System (ADS)

    Kang, Dong-Uk; Cho, Minsik; Lee, Dae Hee; Yoo, Hyunjun; Kim, Myung Soo; Bae, Jun Hyung; Kim, Hyoungtaek; Kim, Jongyul; Kim, Hyunduk; Cho, Gyuseong

    2012-05-01

    Recently, large-size 3-transistors (3-Tr) active pixel complementary metal-oxide silicon (CMOS) image sensors have been being used for medium-size digital X-ray radiography, such as dental computed tomography (CT), mammography and nondestructive testing (NDT) for consumer products. We designed and fabricated 50 µm × 50 µm 3-Tr test pixels having a pixel photodiode with various structures and shapes by using the TSMC 0.25-m standard CMOS process to compare their optical characteristics. The pixel photodiode output was continuously sampled while a test pixel was continuously illuminated by using 550-nm light at a constant intensity. The measurement was repeated 300 times for each test pixel to obtain reliable results on the mean and the variance of the pixel output at each sampling time. The sampling rate was 50 kHz, and the reset period was 200 msec. To estimate the conversion gain, we used the mean-variance method. From the measured results, the n-well/p-substrate photodiode, among 3 photodiode structures available in a standard CMOS process, showed the best performance at a low illumination equivalent to the typical X-ray signal range. The quantum efficiencies of the n+/p-well, n-well/p-substrate, and n+/p-substrate photodiodes were 18.5%, 62.1%, and 51.5%, respectively. From a comparison of pixels with rounded and rectangular corners, we found that a rounded corner structure could reduce the dark current in large-size pixels. A pixel with four rounded corners showed a reduced dark current of about 200fA compared to a pixel with four rectangular corners in our pixel sample size. Photodiodes with round p-implant openings showed about 5% higher dark current, but about 34% higher sensitivities, than the conventional photodiodes.

  4. Radiation hardness studies of AMS HV-CMOS 350 nm prototype chip HVStripV1

    NASA Astrophysics Data System (ADS)

    Kanisauskas, K.; Affolder, A.; Arndt, K.; Bates, R.; Benoit, M.; Di Bello, F.; Blue, A.; Bortoletto, D.; Buckland, M.; Buttar, C.; Caragiulo, P.; Das, D.; Dopke, J.; Dragone, A.; Ehrler, F.; Fadeyev, V.; Galloway, Z.; Grabas, H.; Gregor, I. M.; Grenier, P.; Grillo, A.; Hiti, B.; Hoeferkamp, M.; Hommels, L. B. A.; Huffman, B. T.; John, J.; Kenney, C.; Kramberger, J.; Liang, Z.; Mandic, I.; Maneuski, D.; Martinez-Mckinney, F.; MacMahon, S.; Meng, L.; Mikuž, M.; Muenstermann, D.; Nickerson, R.; Peric, I.; Phillips, P.; Plackett, R.; Rubbo, F.; Segal, J.; Seidel, S.; Seiden, A.; Shipsey, I.; Song, W.; Staniztki, M.; Su, D.; Tamma, C.; Turchetta, R.; Vigani, L.; Volk, J.; Wang, R.; Warren, M.; Wilson, F.; Worm, S.; Xiu, Q.; Zhang, J.; Zhu, H.

    2017-02-01

    CMOS active pixel sensors are being investigated for their potential use in the ATLAS inner tracker upgrade at the HL-LHC. The new inner tracker will have to handle a significant increase in luminosity while maintaining a sufficient signal-to-noise ratio and pulse shaping times. This paper focuses on the prototype chip "HVStripV1" (manufactured in the AMS HV-CMOS 350nm process) characterization before and after irradiation up to fluence levels expected for the strip region in the HL-LHC environment. The results indicate an increase of depletion region after irradiation for the same bias voltage by a factor of ≈2.4 and ≈2.8 for two active pixels on the test chip. There was also a notable increase in noise levels from 85 e‑ to 386 e‑ and from 75 e‑ to 277 e‑ for the corresponding pixels.

  5. A perforated CMOS microchip for immobilization and activity monitoring of electrogenic cells

    NASA Astrophysics Data System (ADS)

    Greve, F.; Lichtenberg, J.; Kirstein, K.-U.; Frey, U.; Perriard, J.-C.; Hierlemann, A.

    2007-03-01

    CMOS-based microelectrode systems offer decisive advantages over conventional micro-electrode arrays, which include the possibility to perform on-chip signal conditioning or to efficiently use larger numbers of electrodes to obtain statistically relevant data, e.g., in pharmacological drug screening. A larger number of electrodes can only be realized with the help of on-chip multiplexing and readout schemes, which require integrated electronics. Another fundamental issue in performing high-fidelity recordings from electrogenic cells is a good electrical coupling between the cells and the microelectrodes, in particular, since the recorded extracellular signals are in the range of only 10-1000 µV. In this paper we present the first CMOS microelectrode system with integrated micromechanical cell-placement features fabricated in a commercial CMOS process with subsequent post-CMOS bulk micromachining. This new microdevice aims at enabling the precise placement of single cells in the center of the electrodes to ensure an efficient use of the available electrodes, even for low-density cell cultures. Small through-chip holes have been generated at the metal-electrode sites by using a combination of bulk micromachining and reactive-ion etching. These holes act as orifices so that cell immobilization can be achieved by means of pneumatic anchoring. The chip additionally hosts integrated circuitry, i.e., multiplexers to select the respective readout electrodes, an amplifier with selectable gain (2×, 10×, 100×), and a high-pass filter (100 Hz cut-off). In this paper we show that electrical signals from most of the electrodes can be recorded, even in low-density cultures of neonatal rat cardiomyocytes, by using perforated metal electrodes and by applying a small underpressure from the backside of the chip. The measurements evidenced that, in most cases, about 90% of the electrodes were covered with single cells, approximately 4% were covered with more than one cell due to

  6. Dynamically re-configurable CMOS imagers for an active vision system

    NASA Technical Reports Server (NTRS)

    Yang, Guang (Inventor); Pain, Bedabrata (Inventor)

    2005-01-01

    A vision system is disclosed. The system includes a pixel array, at least one multi-resolution window operation circuit, and a pixel averaging circuit. The pixel array has an array of pixels configured to receive light signals from an image having at least one tracking target. The multi-resolution window operation circuits are configured to process the image. Each of the multi-resolution window operation circuits processes each tracking target within a particular multi-resolution window. The pixel averaging circuit is configured to sample and average pixels within the particular multi-resolution window.

  7. Smart-Pixel Array Processors Based on Optimal Cellular Neural Networks for Space Sensor Applications

    NASA Technical Reports Server (NTRS)

    Fang, Wai-Chi; Sheu, Bing J.; Venus, Holger; Sandau, Rainer

    1997-01-01

    A smart-pixel cellular neural network (CNN) with hardware annealing capability, digitally programmable synaptic weights, and multisensor parallel interface has been under development for advanced space sensor applications. The smart-pixel CNN architecture is a programmable multi-dimensional array of optoelectronic neurons which are locally connected with their local neurons and associated active-pixel sensors. Integration of the neuroprocessor in each processor node of a scalable multiprocessor system offers orders-of-magnitude computing performance enhancements for on-board real-time intelligent multisensor processing and control tasks of advanced small satellites. The smart-pixel CNN operation theory, architecture, design and implementation, and system applications are investigated in detail. The VLSI (Very Large Scale Integration) implementation feasibility was illustrated by a prototype smart-pixel 5x5 neuroprocessor array chip of active dimensions 1380 micron x 746 micron in a 2-micron CMOS technology.

  8. Principle and modelling of Transient Current Technique for interface traps characterization in monolithic pixel detectors obtained by CMOS-compatible wafer bonding

    NASA Astrophysics Data System (ADS)

    Bronuzzi, J.; Mapelli, A.; Moll, M.; Sallese, J. M.

    2016-08-01

    In the framework of monolithic silicon radiation detectors, a fabrication process based on a recently developed silicon wafer bonding technique at low temperature was proposed. Ideally, this new process would enable direct bonding of a read-out electronic chip wafer on a highly resistive silicon substrate wafer, which is expected to present many advantages since it would combine high performance IC's with high sensitive ultra-low doped bulk silicon detectors. But electrical properties of the bonded interface are critical for this kind of application since the mobile charges generated by radiation inside the bonded bulk are expected to transit through the interface in order to be collected by the read-out electronics. In this work, we propose to explore and develop a model for the so-called Transient Current Technique (TCT) to identify the presence of deep traps at the bonded interface. For this purpose, we consider a simple PIN diode reversely biased where the ultra-low doped active region of interest is set in full depletion. In a first step, Synopsys Sentaurus TCAD is used to evaluate the soundness of this technique for interface traps characterization such as it may happen in bonded interfaces. Next, an analytical model is developed in details to give a better insight into the physics behind the TCT for interface layers. Further, this can be used as a simple tool to evidence what are the relevant parameters influencing the TCT signal and to set the basis for preliminary characterizations.

  9. TFT-Based Active Pixel Sensors for Large Area Thermal Neutron Detection

    NASA Astrophysics Data System (ADS)

    Kunnen, George

    Due to diminishing availability of 3He, which is the critical component of neutron detecting proportional counters, large area flexible arrays are being considered as a potential replacement for neutron detection. A large area flexible array, utilizing semiconductors for both charged particle detection and pixel readout, ensures a large detection surface area in a light weight rugged form. Such a neutron detector could be suitable for deployment at ports of entry. The specific approach used in this research, uses a neutron converter layer which captures incident thermal neutrons, and then emits ionizing charged particles. These ionizing particles cause electron-hole pair generation within a single pixel's integrated sensing diode. The resulting charge is then amplified via a low-noise amplifier. This document begins by discussing the current state of the art in neutron detection and the associated challenges. Then, for the purpose of resolving some of these issues, recent design and modeling efforts towards developing an improved neutron detection system are described. Also presented is a low-noise active pixel sensor (APS) design capable of being implemented in low temperature indium gallium zinc oxide (InGaZnO) or amorphous silicon (a-Si:H) thin film transistor process compatible with plastic substrates. The low gain and limited scalability of this design are improved upon by implementing a new multi-stage self-resetting APS. For each APS design, successful radiation measurements are also presented using PiN diodes for charged particle detection. Next, detection array readout methodologies are modeled and analyzed, and use of a matched filter readout circuit is described as well. Finally, this document discusses detection diode integration with the designed TFT-based APSs.

  10. Silicon-on-insulator (SOI) active pixel sensors with the photosite implemented in the substrate

    NASA Technical Reports Server (NTRS)

    Pain, Bedabrata (Inventor); Zheng, Xinyu (Inventor)

    2002-01-01

    Active pixel sensors for a high quality imager are fabricated using a silicon-on-insulator (SOI) process by integrating the photodetectors on the SOI substrate and forming pixel readout transistors on the SOI thin-film. The technique can include forming silicon islands on a buried insulator layer disposed on a silicon substrate and selectively etching away the buried insulator layer over a region of the substrate to define a photodetector area. Dopants of a first conductivity type are implanted to form a signal node in the photodetector area and to form simultaneously drain/source regions for a first transistor in at least a first one of the silicon islands. Dopants of a second conductivity type are implanted to form drain/source regions for a second transistor in at least a second one of the silicon islands. Isolation rings around the photodetector also can be formed when dopants of the second conductivity type are implanted. Interconnections among the transistors and the photodetector are provided to allow signals sensed by the photodetector to be read out via the transistors formed on the silicon islands.

  11. Silicon-on-insulator (SOI) active pixel sensors with the photosite implemented in the substrate

    NASA Technical Reports Server (NTRS)

    Zheng, Xinyu (Inventor); Pain, Bedabrata (Inventor)

    2005-01-01

    Active pixel sensors for a high quality imager are fabricated using a silicon-on-insulator (SOI) process by integrating the photodetectors on the SOI substrate and forming pixel readout transistors on the SOI thin-film. The technique can include forming silicon islands on a buried insulator layer disposed on a silicon substrate and selectively etching away the buried insulator layer over a region of the substrate to define a photodetector area. Dopants of a first conductivity type are implanted to form a signal node in the photodetector area and to form simultaneously drain/source regions for a first transistor in at least a first one of the silicon islands. Dopants of a second conductivity type are implanted to form drain/source regions for a second transistor in at least a second one of the silicon islands. Isolation rings around the photodetector also can be formed when dopants of the second conductivity type are implanted. Interconnections among the transistors and the photodetector are provided to allow signals sensed by the photodetector to be read out via the transistors formed on the silicon islands.

  12. Direct tests of a pixelated microchannel plate as the active element of a shower maximum detector

    DOE PAGES

    Apresyan, A.; Los, S.; Pena, C.; ...

    2016-05-07

    One possibility to make a fast and radiation resistant shower maximum detector is to use a secondary emitter as an active element. We report our studies of microchannel plate photomultipliers (MCPs) as the active element of a shower-maximum detector. We present test beam results obtained using Photonis XP85011 to detect secondary particles of an electromagnetic shower. We focus on the use of the multiple pixels on the Photonis MCP in order to find a transverse two-dimensional shower distribution. A spatial resolution of 0.8 mm was obtained with an 8 GeV electron beam. As a result, a method for measuring themore » arrival time resolution for electromagnetic showers is presented, and we show that time resolution better than 40 ps can be achieved.« less

  13. Direct tests of a pixelated microchannel plate as the active element of a shower maximum detector

    SciTech Connect

    Apresyan, A.; Los, S.; Pena, C.; Presutti, F.; Ronzhin, A.; Spiropulu, M.; Xie, S.

    2016-05-07

    One possibility to make a fast and radiation resistant shower maximum detector is to use a secondary emitter as an active element. We report our studies of microchannel plate photomultipliers (MCPs) as the active element of a shower-maximum detector. We present test beam results obtained using Photonis XP85011 to detect secondary particles of an electromagnetic shower. We focus on the use of the multiple pixels on the Photonis MCP in order to find a transverse two-dimensional shower distribution. A spatial resolution of 0.8 mm was obtained with an 8 GeV electron beam. As a result, a method for measuring the arrival time resolution for electromagnetic showers is presented, and we show that time resolution better than 40 ps can be achieved.

  14. A radiation-hardened two transistor memory cell for monolithic active pixel sensors in STAR experiment

    NASA Astrophysics Data System (ADS)

    Wei, X.; Gao, D.; Dorokhov, A.; Hu, Y.

    2011-01-01

    Radiation tolerance of Monolithic Active Pixel Sensors (MAPS) is dramatically decreased when intellectual property (IP) memories are integrated for fast readout application. This paper presents a new solution to improve radiation hardness and avoid latch-up for memory cell design. The tradeoffs among radiation tolerance, area and speed are significantly considered and analyzed. The cell designed in 0.35 μm process satisfies the radiation tolerance requirements of STAR experiment. The cell size is 4.55 × 5.45 μm2. This cell is smaller than the IP memory cell based on the same process and is only 26% of a radiation tolerant 6T SRAM cell used in previous contribution. The write access time of the cell is less than 2 ns, while the read access time is 80 ns.

  15. Impact of Substrate Bias on Fixed-Pattern-Noise in Active Pixel Sensor Cells

    NASA Astrophysics Data System (ADS)

    Terauchi, Mamoru

    2007-11-01

    The effect of substrate (body) bias on fixed-pattern-noise (FPN) in active pixel sensor (APS) cells is studied. Through measuring test devices consisting of two metal-oxide-semiconductor field-effect transistors (MOSFETs) connected in series with each of the transistors located in the same well region, it has been revealed that substrate bias, which is inevitably applied in a normal circuit configuration in conventional APS cells, worsens the characteristics fluctuation in source-follower amplifiers in APS cells, leading to FPN that cannot be mitigated by conventional correction methods such as correlated double sampling. In addition it has been confirmed that the current-voltage characteristics of logarithmic converters, each of which is realized using a MOSFET with gate and drain terminals connected together, are also affected by substrate bias, resulting in increased characteristics fluctuation as compared with the case with no substrate bias.

  16. CMOS Imaging of Temperature Effects on Pin-Printed Xerogel Sensor Microarrays.

    PubMed

    Lei Yao; Ka Yi Yung; Chodavarapu, Vamsy P; Bright, Frank V

    2011-04-01

    In this paper, we study the effect of temperature on the operation and performance of a xerogel-based sensor microarrays coupled to a complementary metal-oxide semiconductor (CMOS) imager integrated circuit (IC) that images the photoluminescence response from the sensor microarray. The CMOS imager uses a 32 × 32 (1024 elements) array of active pixel sensors and each pixel includes a high-gain phototransistor to convert the detected optical signals into electrical currents. A correlated double sampling circuit and pixel address/digital control/signal integration circuit are also implemented on-chip. The CMOS imager data are read out as a serial coded signal. The sensor system uses a light-emitting diode to excite target analyte responsive organometallic luminophores doped within discrete xerogel-based sensor elements. As a proto type, we developed a 3 × 3 (9 elements) array of oxygen (O2) sensors. Each group of three sensor elements in the array (arranged in a column) is designed to provide a different and specific sensitivity to the target gaseous O2 concentration. This property of multiple sensitivities is achieved by using a mix of two O2 sensitive luminophores in each pin-printed xerogel sensor element. The CMOS imager is designed to be low noise and consumes a static power of 320.4 μW and an average dynamic power of 624.6 μW when operating at 100-Hz sampling frequency and 1.8-V dc power supply.

  17. High-voltage pixel sensors for ATLAS upgrade

    NASA Astrophysics Data System (ADS)

    Perić, I.; Kreidl, C.; Fischer, P.; Bompard, F.; Breugnon, P.; Clemens, J.-C.; Fougeron, D.; Liu, J.; Pangaud, P.; Rozanov, A.; Barbero, M.; Feigl, S.; Capeans, M.; Ferrere, D.; Pernegger, H.; Ristic, B.; Muenstermann, D.; Gonzalez Sevilla, S.; La Rosa, A.; Miucci, A.; Nessi, M.; Iacobucci, G.; Backhaus, M.; Hügging, Fabian; Krüger, H.; Hemperek, T.; Obermann, T.; Wermes, N.; Garcia-Sciveres, M.; Quadt, A.; Weingarten, J.; George, M.; Grosse-Knetter, J.; Rieger, J.; Bates, R.; Blue, A.; Buttar, C.; Hynds, D.

    2014-11-01

    The high-voltage (HV-) CMOS pixel sensors offer several good properties: a fast charge collection by drift, the possibility to implement relatively complex CMOS in-pixel electronics and the compatibility with commercial processes. The sensor element is a deep n-well diode in a p-type substrate. The n-well contains CMOS pixel electronics. The main charge collection mechanism is drift in a shallow, high field region, which leads to a fast charge collection and a high radiation tolerance. We are currently evaluating the use of the high-voltage detectors implemented in 180 nm HV-CMOS technology for the high-luminosity ATLAS upgrade. Our approach is replacing the existing pixel and strip sensors with the CMOS sensors while keeping the presently used readout ASICs. By intelligence we mean the ability of the sensor to recognize a particle hit and generate the address information. In this way we could benefit from the advantages of the HV sensor technology such as lower cost, lower mass, lower operating voltage, smaller pitch, smaller clusters at high incidence angles. Additionally we expect to achieve a radiation hardness necessary for ATLAS upgrade. In order to test the concept, we have designed two HV-CMOS prototypes that can be readout in two ways: using pixel and strip readout chips. In the case of the pixel readout, the connection between HV-CMOS sensor and the readout ASIC can be established capacitively.

  18. Fundamental performance differences of CMOS and CCD imagers: part V

    NASA Astrophysics Data System (ADS)

    Janesick, James R.; Elliott, Tom; Andrews, James; Tower, John; Pinter, Jeff

    2013-02-01

    Previous papers delivered over the last decade have documented developmental progress made on large pixel scientific CMOS imagers that match or surpass CCD performance. New data and discussions presented in this paper include: 1) a new buried channel CCD fabricated on a CMOS process line, 2) new data products generated by high performance custom scientific CMOS 4T/5T/6T PPD pixel imagers, 3) ultimate CTE and speed limits for large pixel CMOS imagers, 4) fabrication and test results of a flight 4k x 4k CMOS imager for NRL's SoloHi Solar Orbiter Mission, 5) a progress report on ultra large stitched Mk x Nk CMOS imager, 6) data generated by on-chip sub-electron CDS signal chain circuitry used in our imagers, 7) CMOS and CMOSCCD proton and electron radiation damage data for dose levels up to 10 Mrd, 8) discussions and data for a new class of PMOS pixel CMOS imagers and 9) future CMOS development work planned.

  19. Planar CMOS analog SiPMs: design, modeling, and characterization

    NASA Astrophysics Data System (ADS)

    Zou, Yu; Villa, Federica; Bronzi, Danilo; Tisa, Simone; Tosi, Alberto; Zappa, Franco

    2015-11-01

    Silicon photomultipliers (SiPMs) are large area detectors consisting of an array of single-photon-sensitive microcells, which make SiPMs extremely attractive to substitute the photomultiplier tubes in many applications. We present the design, fabrication, and characterization of analog SiPMs in standard planar 0.35 μm CMOS technology, with about 1 mm × 1 mm total area and different kinds of microcells, based on single-photon avalanche diodes with 30 μm diameter reaching 21.0% fill-factor (FF), 50 μm diameter (FF = 58.3%) or 50 μm square active area with rounded corner of 5 μm radius (FF = 73.7%). We also developed the electrical SPICE model for CMOS SiPMs. Our CMOS SiPMs have 25 V breakdown voltage, in line with most commercial SiPMs and higher gain (8.8 × 106, 13.2 × 106, and 15.0 × 106, respectively). Although dark count rate density is slightly higher than state-of-the-art analog SiPMs, the proposed standard CMOS processing opens the feasibility of integration with active electronics, for switching hot pixels off, drastically reducing the overall dark count rate, or for further on-chip processing.

  20. SOI CMOS Imager with Suppression of Cross-Talk

    NASA Technical Reports Server (NTRS)

    Pain, Bedabrata; Zheng, Xingyu; Cunningham, Thomas J.; Seshadri, Suresh; Sun, Chao

    2009-01-01

    A monolithic silicon-on-insulator (SOI) complementary metal oxide/semiconductor (CMOS) image-detecting integrated circuit of the active-pixel-sensor type, now undergoing development, is designed to operate at visible and near-infrared wavelengths and to offer a combination of high quantum efficiency and low diffusion and capacitive cross-talk among pixels. The imager is designed to be especially suitable for astronomical and astrophysical applications. The imager design could also readily be adapted to general scientific, biological, medical, and spectroscopic applications. One of the conditions needed to ensure both high quantum efficiency and low diffusion cross-talk is a relatively high reverse bias potential (between about 20 and about 50 V) on the photodiode in each pixel. Heretofore, a major obstacle to realization of this condition in a monolithic integrated circuit has been posed by the fact that the required high reverse bias on the photodiode is incompatible with metal oxide/semiconductor field-effect transistors (MOSFETs) in the CMOS pixel readout circuitry. In the imager now being developed, the SOI structure is utilized to overcome this obstacle: The handle wafer is retained and the photodiode is formed in the handle wafer. The MOSFETs are formed on the SOI layer, which is separated from the handle wafer by a buried oxide layer. The electrical isolation provided by the buried oxide layer makes it possible to bias the MOSFETs at CMOS-compatible potentials (between 0 and 3 V), while biasing the photodiode at the required higher potential, and enables independent optimization of the sensory and readout portions of the imager.

  1. Mechanism of activation of the mouse c-mos oncogene by the LTR of an intracisternal A-particle gene.

    PubMed Central

    Horowitz, M; Luria, S; Rechavi, G; Givol, D

    1984-01-01

    In the mouse myeloma XRPC-24 the DNA of an intracisternal A-particle (IAP) is inserted within the coding region of c-mos. This insertion splits the c-mos into a 3' rc-mos and a 5' rc-mos separated by approximately 4.7 kb of IAP DNA. The insertion is in a head-to-head orientation and brings the 5' LTR of the IAP in juxtaposition to the 3' rc-mos such that the IAP and the 3' rc-mos are transcribed in opposite directions. The intact c-mos gene is usually dormant, whereas the 3' rc-mos is actively transcribed and is capable of transforming NIH3T3 cells. In an effort to understand the nature of this activation we mapped the 5' ends of the 3' rc-mos mRNA present in XPRC-24. We found two main mRNA start sites, one mapping to the junction of the 3' rc-mos and the 5' LTR, and the other located 10 nucleotides upstream to this junction, within the 5' LTR. This result indicates that the 3' rc-mos in XRPC-24 was activated by insertion of a promoter provided by the LTR of an IAP genome. Furthermore, the 5' LTR appears to possess promoter activities in two directions. This conclusion was confirmed by the fact that this 5' LTR, in both orientations, was able to activate the bacterial gene coding for chloramphenicol acetyltransferase (CAT) in the modular vector pSVOCAT. Images Fig. 2. Fig. 5. PMID:6098457

  2. Nanosecond monolithic CMOS readout cell

    DOEpatents

    Souchkov, Vitali V.

    2004-08-24

    A pulse shaper is implemented in monolithic CMOS with a delay unit formed of a unity gain buffer. The shaper is formed of a difference amplifier having one input connected directly to an input signal and a second input connected to a delayed input signal through the buffer. An elementary cell is based on the pulse shaper and a timing circuit which gates the output of an integrator connected to the pulse shaper output. A detector readout system is formed of a plurality of elementary cells, each connected to a pixel of a pixel array, or to a microstrip of a plurality of microstrips, or to a detector segment.

  3. Improved Space Object Orbit Determination Using CMOS Detectors

    NASA Astrophysics Data System (ADS)

    Schildknecht, T.; Peltonen, J.; Sännti, T.; Silha, J.; Flohrer, T.

    2014-09-01

    CMOS-sensors, or in general Active Pixel Sensors (APS), are rapidly replacing CCDs in the consumer camera market. Due to significant technological advances during the past years these devices start to compete with CCDs also for demanding scientific imaging applications, in particular in the astronomy community. CMOS detectors offer a series of inherent advantages compared to CCDs, due to the structure of their basic pixel cells, which each contains their own amplifier and readout electronics. The most prominent advantages for space object observations are the extremely fast and flexible readout capabilities, feasibility for electronic shuttering and precise epoch registration, and the potential to perform image processing operations on-chip and in real-time. The major challenges and design drivers for ground-based and space-based optical observation strategies have been analyzed. CMOS detector characteristics were critically evaluated and compared with the established CCD technology, especially with respect to the above mentioned observations. Similarly, the desirable on-chip processing functionalities which would further enhance the object detection and image segmentation were identified. Finally, we simulated several observation scenarios for ground- and space-based sensor by assuming different observation and sensor properties. We will introduce the analyzed end-to-end simulations of the ground- and space-based strategies in order to investigate the orbit determination accuracy and its sensitivity which may result from different values for the frame-rate, pixel scale, astrometric and epoch registration accuracies. Two cases were simulated, a survey using a ground-based sensor to observe objects in LEO for surveillance applications, and a statistical survey with a space-based sensor orbiting in LEO observing small-size debris in LEO. The ground-based LEO survey uses a dynamical fence close to the Earth shadow a few hours after sunset. For the space-based scenario

  4. Development of a Depleted Monolithic CMOS Sensor in a 150 nm CMOS Technology for the ATLAS Inner Tracker Upgrade

    NASA Astrophysics Data System (ADS)

    Wang, T.; Rymaszewski, P.; Barbero, M.; Degerli, Y.; Godiot, S.; Guilloux, F.; Hemperek, T.; Hirono, T.; Krüger, H.; Liu, J.; Orsini, F.; Pangaud, P.; Rozanov, A.; Wermes, N.

    2017-01-01

    The recent R&D focus on CMOS sensors with charge collection in a depleted zone has opened new perspectives for CMOS sensors as fast and radiation hard pixel devices. These sensors, labelled as depleted CMOS sensors (DMAPS), have already shown promising performance as feasible candidates for the ATLAS Inner Tracker (ITk) upgrade, possibly replacing the current passive sensors. A further step to exploit the potential of DMAPS is to investigate the suitability of equipping the outer layers of the ATLAS ITk upgrade with fully monolithic CMOS sensors. This paper presents the development of a depleted monolithic CMOS pixel sensor designed in the LFoundry 150 nm CMOS technology, with the focus on design details and simulation results.

  5. A high frequency active voltage doubler in standard CMOS using offset-controlled comparators for inductive power transmission.

    PubMed

    Lee, Hyung-Min; Ghovanloo, Maysam

    2013-06-01

    In this paper, we present a fully integrated active voltage doubler in CMOS technology using offset-controlled high speed comparators for extending the range of inductive power transmission to implantable microelectronic devices (IMD) and radio-frequency identification (RFID) tags. This active voltage doubler provides considerably higher power conversion efficiency (PCE) and lower dropout voltage compared to its passive counterpart and requires lower input voltage than active rectifiers, leading to reliable and efficient operation with weakly coupled inductive links. The offset-controlled functions in the comparators compensate for turn-on and turn-off delays to not only maximize the forward charging current to the load but also minimize the back current, optimizing PCE in the high frequency (HF) band. We fabricated the active voltage doubler in a 0.5-μm 3M2P std . CMOS process, occupying 0.144 mm(2) of chip area. With 1.46 V peak AC input at 13.56 MHz, the active voltage doubler provides 2.4 V DC output across a 1 kΩ load, achieving the highest PCE = 79% ever reported at this frequency. In addition, the built-in start-up circuit ensures a reliable operation at lower voltages.

  6. A High Frequency Active Voltage Doubler in Standard CMOS Using Offset-Controlled Comparators for Inductive Power Transmission

    PubMed Central

    Lee, Hyung-Min; Ghovanloo, Maysam

    2014-01-01

    In this paper, we present a fully integrated active voltage doubler in CMOS technology using offset-controlled high speed comparators for extending the range of inductive power transmission to implantable microelectronic devices (IMD) and radio-frequency identification (RFID) tags. This active voltage doubler provides considerably higher power conversion efficiency (PCE) and lower dropout voltage compared to its passive counterpart and requires lower input voltage than active rectifiers, leading to reliable and efficient operation with weakly coupled inductive links. The offset-controlled functions in the comparators compensate for turn-on and turn-off delays to not only maximize the forward charging current to the load but also minimize the back current, optimizing PCE in the high frequency (HF) band. We fabricated the active voltage doubler in a 0.5-μm 3M2P std. CMOS process, occupying 0.144 mm2 of chip area. With 1.46 V peak AC input at 13.56 MHz, the active voltage doubler provides 2.4 V DC output across a 1 kΩ load, achieving the highest PCE = 79% ever reported at this frequency. In addition, the built-in start-up circuit ensures a reliable operation at lower voltages. PMID:23853321

  7. Accelerated life testing effects on CMOS microcircuit characteristics

    NASA Technical Reports Server (NTRS)

    1977-01-01

    Accelerated life tests were performed on CMOS microcircuits to predict their long term reliability. The consistency of the CMOS microcircuit activation energy between the range of 125 C to 200 C and the range 200 C to 250 C was determined. Results indicate CMOS complexity and the amount of moisture detected inside the devices after testing influences time to failure of tested CMOS devices.

  8. Ultra-low material pixel layers for the Mu3e experiment

    NASA Astrophysics Data System (ADS)

    Berger, N.; Dittmeier, S.; Henkelmann, L.; Herkert, A.; Meier Aeschbacher, F.; Ng, Y. W.; Noehte, L. O. S.; Schöning, A.; Wiedner, D.

    2016-12-01

    The upcoming Mu3e experiment will search for the charged lepton flavour violating decay of a muon at rest into three electrons. The maximal energy of the electrons is 53 MeV, hence a low material budget is a key performance requirement for the tracking detector. In this paper we summarize our approach to meet the requirement of about 1 ‰ of a radiation length per pixel detector layer. This includes the choice of thinned active monolithic pixel sensors in HV-CMOS technology, ultra-thin flexible printed circuits, and helium gas cooling.

  9. Fundamental study on identification of CMOS cameras

    NASA Astrophysics Data System (ADS)

    Kurosawa, Kenji; Saitoh, Naoki

    2003-08-01

    In this study, we discussed individual camera identification of CMOS cameras, because CMOS (complementary-metal-oxide-semiconductor) imaging detectors have begun to make their move into the CCD (charge-coupled-device) fields for recent years. It can be identified whether or not the given images have been taken with the given CMOS camera by detecting the imager's intrinsic unique fixed pattern noise (FPN) just like the individual CCD camera identification method proposed by the authors. Both dark and bright pictures taken with the CMOS cameras can be identified by the method, because not only dark current in the photo detectors but also MOS-FET amplifiers incorporated in each pixel may produce pixel-to-pixel nonuniformity in sensitivity. Each pixel in CMOS detectors has the amplifier, which degrades image quality of bright images due to the nonuniformity of the amplifier gain. Two CMOS cameras were evaluated in our experiments. They were WebCamGoPlus (Creative), and EOS D30 (Canon). WebCamGoPlus is a low-priced web camera, whereas EOS D30 is for professional use. Image of a white plate were recorded with the cameras under the plate's luminance condition of 0cd/m2 and 150cd/m2. The recorded images were multiply integrated to reduce the random noise component. From the images of both cameras, characteristic dots patterns were observed. Some bright dots were observed in the dark images, whereas some dark dots were in the bright images. The results show that the camera identification method is also effective for CMOS cameras.

  10. Simulation of active-edge pixelated CdTe radiation detectors

    NASA Astrophysics Data System (ADS)

    Duarte, D. D.; Lipp, J. D.; Schneider, A.; Seller, P.; Veale, M. C.; Wilson, M. D.; Baker, M. A.; Sellin, P. J.

    2016-01-01

    The edge surfaces of single crystal CdTe play an important role in the electronic properties and performance of this material as an X-ray and γ-ray radiation detector. Edge effects have previously been reported to reduce the spectroscopic performance of the edge pixels in pixelated CdTe radiation detectors without guard bands. A novel Technology Computer Aided Design (TCAD) model based on experimental data has been developed to investigate these effects. The results presented in this paper show how localized low resistivity surfaces modify the internal electric field of CdTe creating potential wells. These result in a reduction of charge collection efficiency of the edge pixels, which compares well with experimental data.

  11. X-RAY ACTIVE MATRIX PIXEL SENSORS BASEDON J-FET TECHNOLOGY DEVELOPED FOR THE LINAC COHERENT LIGHT SOURCE.

    SciTech Connect

    CARINI,G.A.; CHEN, W.; LI, Z.; REHAK, P.; SIDDONS, D.P.

    2007-10-29

    An X-ray Active Matrix Pixel Sensor (XAMPS) is being developed for recording data for the X-ray Pump Probe experiment at the Linac Coherent Light Source (LCLS). Special attention has to be paid to some technological challenges that this design presents. New processes were developed and refined to address problems encountered during previous productions of XAMPS. The development of these critical steps and corresponding tests results are reported here.

  12. Thin n-in-p planar pixel sensors and active edge sensors for the ATLAS upgrade at HL-LHC

    NASA Astrophysics Data System (ADS)

    Terzo, S.; Macchiolo, A.; Nisius, R.; Paschen, B.

    2014-12-01

    Silicon pixel modules employing n-in-p planar sensors with an active thickness of 200 μm, produced at CiS, and 100-200 μm thin active/slim edge sensor devices, produced at VTT in Finland have been interconnected to ATLAS FE-I3 and FE-I4 read-out chips. The thin sensors are designed for high energy physics collider experiments to ensure radiation hardness at high fluences. Moreover, the active edge technology of the VTT production maximizes the sensitive region of the assembly, allowing for a reduced overlap of the modules in the pixel layer close to the beam pipe. The CiS production includes also four chip sensors according to the module geometry planned for the outer layers of the upgraded ATLAS pixel detector to be operated at the HL-LHC. The modules have been characterized using radioactive sources in the laboratory and with high precision measurements at beam tests to investigate the hit efficiency and charge collection properties at different bias voltages and particle incidence angles. The performance of the different sensor thicknesses and edge designs are compared before and after irradiation up to a fluence of 1.4 × 1016 neq/cm2.

  13. Measurement results of DIPIX pixel sensor developed in SOI technology

    NASA Astrophysics Data System (ADS)

    Ahmed, Mohammed Imran; Arai, Yasuo; Idzik, Marek; Kapusta, Piotr; Miyoshi, Toshinobu; Turala, Michal

    2013-08-01

    The development of integration type pixel detectors presents interest for physics communities because it brings optimization of design, simplicity of production-which means smaller cost, and reduction of detector material budget. During the last decade a lot of research and development activities took place in the field of CMOS Silicon-On-Insulator (SOI) technology resulting in improvement in wafer size, wafer resistivity and MIM capacitance. Several ideas have been tested successfully and are gradually entering into the application phase. Some of the novel concepts exploring SOI technology are pursued at KEK; several prototypes of dual mode integration type pixel (DIPIX) have been recently produced and described. This report presents initial test results of some of the prototypes including tests obtained with the infrared laser beams and Americium (Am-241) source. The Equivalent Noise Charge (ENC) of 86 e - has been measured. The measured performance demonstrates that SOI technology is a feasible choice for future applications.

  14. PIXEL PUSHER

    NASA Technical Reports Server (NTRS)

    Stanfill, D. F.

    1994-01-01

    Pixel Pusher is a Macintosh application used for viewing and performing minor enhancements on imagery. It will read image files in JPL's two primary image formats- VICAR and PDS - as well as the Macintosh PICT format. VICAR (NPO-18076) handles an array of image processing capabilities which may be used for a variety of applications including biomedical image processing, cartography, earth resources, and geological exploration. Pixel Pusher can also import VICAR format color lookup tables for viewing images in pseudocolor (256 colors). This program currently supports only eight bit images but will work on monitors with any number of colors. Arbitrarily large image files may be viewed in a normal Macintosh window. Color and contrast enhancement can be performed with a graphical "stretch" editor (as in contrast stretch). In addition, VICAR images may be saved as Macintosh PICT files for exporting into other Macintosh programs, and individual pixels can be queried to determine their locations and actual data values. Pixel Pusher is written in Symantec's Think C and was developed for use on a Macintosh SE30, LC, or II series computer running System Software 6.0.3 or later and 32 bit QuickDraw. Pixel Pusher will only run on a Macintosh which supports color (whether a color monitor is being used or not). The standard distribution medium for this program is a set of three 3.5 inch Macintosh format diskettes. The program price includes documentation. Pixel Pusher was developed in 1991 and is a copyrighted work with all copyright vested in NASA. Think C is a trademark of Symantec Corporation. Macintosh is a registered trademark of Apple Computer, Inc.

  15. Implementation of TDI based digital pixel ROIC with 15μm pixel pitch

    NASA Astrophysics Data System (ADS)

    Ceylan, Omer; Shafique, Atia; Burak, A.; Caliskan, Can; Abbasi, Shahbaz; Yazici, Melik; Gurbuz, Yasar

    2016-05-01

    A 15um pixel pitch digital pixel for LWIR time delay integration (TDI) applications is implemented which occupies one fourth of pixel area compared to previous digital TDI implementation. TDI is implemented on 8 pixels with oversampling rate of 2. ROIC provides 16 bits output with 8 bits of MSB and 8 bits of LSB. Pixel can store 75 M electrons with a quantization noise of 500 electrons. Digital pixel TDI implementation is advantageous over analog counterparts considering power consumption, chip area and signal-to-noise ratio. Digital pixel TDI ROIC is fabricated with 0.18um CMOS process. In digital pixel TDI implementation photocurrent is integrated on a capacitor in pixel and converted to digital data in pixel. This digital data triggers the summation counters which implements TDI addition. After all pixels in a row contribute, the summed data is divided to the number of TDI pixels(N) to have the actual output which is square root of N improved version of a single pixel output in terms of signal-to-noise-ratio (SNR).

  16. High-Sensitivity X-ray Polarimetry with Amorphous Silicon Active-Matrix Pixel Proportional Counters

    NASA Technical Reports Server (NTRS)

    Black, J. K.; Deines-Jones, P.; Jahoda, K.; Ready, S. E.; Street, R. A.

    2003-01-01

    Photoelectric X-ray polarimeters based on pixel micropattern gas detectors (MPGDs) offer order-of-magnitude improvement in sensitivity over more traditional techniques based on X-ray scattering. This new technique places some of the most interesting astronomical observations within reach of even a small, dedicated mission. The most sensitive instrument would be a photoelectric polarimeter at the focus of 2 a very large mirror, such as the planned XEUS. Our efforts are focused on a smaller pathfinder mission, which would achieve its greatest sensitivity with large-area, low-background, collimated polarimeters. We have recently demonstrated a MPGD polarimeter using amorphous silicon thin-film transistor (TFT) readout suitable for the focal plane of an X-ray telescope. All the technologies used in the demonstration polarimeter are scalable to the areas required for a high-sensitivity collimated polarimeter. Leywords: X-ray polarimetry, particle tracking, proportional counter, GEM, pixel readout

  17. Development of the Continuous Acquisition Pixel (CAP) sensor for high luminosity lepton colliders

    NASA Astrophysics Data System (ADS)

    Varner, G.; Aihara, H.; Barbero, M.; Bozek, A.; Browder, T.; Hazumi, M.; Kennedy, J.; Martin, E.; Mueller, J.; Olsen, S.; Palka, H.; Rosen, M.; Ruckman, L.; Stanič, S.; Trabelsi, K.; Tsuboyama, T.; Uchida, K.; Yang, Q.; Yarema, R.

    2006-09-01

    A future higher luminosity B-factory detector and concept study detectors for the proposed International Linear Collider require precision vertex reconstruction while coping with high track densities and radiation exposures. Compared with current silicon strip and hybrid pixels, a significant reduction in the overall detector material thickness is needed to achieve the desired vertex resolution. Considerable progress in the development of thin CMOS-based Monolithic Active Pixel Sensors (MAPS) in recent years makes them a viable technology option and feasibility studies are being actively pursued. The most serious concerns are their radiation hardness and their readout speed. To address these, several prototypes denoted as the Continuous Acquisition Pixel (CAP) sensors have been developed and tested. The latest of the CAP sensor prototypes is CAP3, designed in the TSMC 0.25 μm process with a 5-deep Correlated Double Sample (CDS) pair pipeline in each pixel. A setup with several CAP3 sensors is under evaluation to assess the performance of a full-scale pixel readout system running at realistic readout speed. Given the similarity in the occupancy numbers and hit throughput requirements, per unit area, between a Belle vertex detector upgradation and the requirements for a future ILC pixel detector, this effort can be considered a small-scale functioning prototype for such a future system. The results and plans for the next stages of R&D towards a full Belle Pixel Vertex Detector (PVD) are presented.

  18. Pixel Perfect

    SciTech Connect

    Perrine, Kenneth A.; Hopkins, Derek F.; Lamarche, Brian L.; Sowa, Marianne B.

    2005-09-01

    Biologists and computer engineers at Pacific Northwest National Laboratory have specified, designed, and implemented a hardware/software system for performing real-time, multispectral image processing on a confocal microscope. This solution is intended to extend the capabilities of the microscope, enabling scientists to conduct advanced experiments on cell signaling and other kinds of protein interactions. FRET (fluorescence resonance energy transfer) techniques are used to locate and monitor protein activity. In FRET, it is critical that spectral images be precisely aligned with each other despite disturbances in the physical imaging path caused by imperfections in lenses and cameras, and expansion and contraction of materials due to temperature changes. The central importance of this work is therefore automatic image registration. This runs in a framework that guarantees real-time performance (processing pairs of 1024x1024, 8-bit images at 15 frames per second) and enables the addition of other types of advanced image processing algorithms such as image feature characterization. The supporting system architecture consists of a Visual Basic front-end containing a series of on-screen interfaces for controlling various aspects of the microscope and a script engine for automation. One of the controls is an ActiveX component written in C++ for handling the control and transfer of images. This component interfaces with a pair of LVDS image capture boards and a PCI board containing a 6-million gate Xilinx Virtex-II FPGA. Several types of image processing are performed on the FPGA in a pipelined fashion, including the image registration. The FPGA offloads work that would otherwise need to be performed by the main CPU and has a guaranteed real-time throughput. Image registration is performed in the FPGA by applying a cubic warp on one image to precisely align it with the other image. Before each experiment, an automated calibration procedure is run in order to set up the

  19. Spectroscopic performance of DEPFET active pixel sensor prototypes suitable for the high count rate Athena WFI detector

    NASA Astrophysics Data System (ADS)

    Müller-Seidlitz, Johannes; Andritschke, Robert; Bähr, Alexander; Meidinger, Norbert; Ott, Sabine; Richter, Rainer H.; Treberspurg, Wolfgang; Treis, Johannes

    2016-07-01

    The focal plane of the WFI of Athena consists of two sensors. One features a large field of view of 40' X 40' and one is forseen to be used for bright point like sources. Both parts base on DEPFET active pixel sensors. To fulfil the count rate requirement for the smaller sensor of less than 1% pile-up for a one Crab source it has to have a sufficient high frame rate. Since therefore the readout becomes a large fraction of the total photon integration time, the probability of measurements with incomplete signals increases. A shutter would solve the problem of these so called misfits but is not in agreement with the required high throughput of more than 80%. The Infinipix design has implemented a storage in addition to separate the collection and the readout of the charges without discarding them. Its working principle was successfully shown by Bähr et al.1 on single pixel level. For the further development three layout variants were tested on a 32 X 32 pixel array scale. The measurements of the spectroscopic performance show very promising results even for the intended readout speed for the Athena WFI of 2:5 μs per sensor row. Although, there are still layout and technology improvements necessary to ensure the reliability needed for space missions. In this paper we present the measurement results on the comparison of the three prototype layout variants.

  20. Silicon pixel R&D for CLIC

    NASA Astrophysics Data System (ADS)

    Munker, M.

    2017-01-01

    Challenging detector requirements are imposed by the physics goals at the future multi-TeV e+ e‑ Compact Linear Collider (CLIC). A single point resolution of 3 μm for the vertex detector and 7 μm for the tracker is required. Moreover, the CLIC vertex detector and tracker need to be extremely light weighted with a material budget of 0.2% X0 per layer in the vertex detector and 1–2% X0 in the tracker. A fast time slicing of 10 ns is further required to suppress background from beam-beam interactions. A wide range of sensor and readout ASIC technologies are investigated within the CLIC silicon pixel R&D effort. Various hybrid planar sensor assemblies with a pixel size of 25×25 μm2 and 55×55 μm2 have been produced and characterised by laboratory measurements and during test-beam campaigns. Experimental and simulation results for thin (50 μm–500 μm) slim edge and active-edge planar, and High-Voltage CMOS sensors hybridised to various readout ASICs (Timepix, Timepix3, CLICpix) are presented.

  1. Linear dynamic range enhancement in a CMOS imager

    NASA Technical Reports Server (NTRS)

    Pain, Bedabrata (Inventor)

    2008-01-01

    A CMOS imager with increased linear dynamic range but without degradation in noise, responsivity, linearity, fixed-pattern noise, or photometric calibration comprises a linear calibrated dual gain pixel in which the gain is reduced after a pre-defined threshold level by switching in an additional capacitance. The pixel may include a novel on-pixel latch circuit that is used to switch in the additional capacitance.

  2. Fully depleted and backside biased monolithic CMOS image sensor

    NASA Astrophysics Data System (ADS)

    Stefanov, Konstantin D.; Clarke, Andrew S.; Holland, Andrew D.

    2016-07-01

    We are presenting a novel concept for a fully depleted, monolithic, pinned photodiode CMOS image sensor using reverse substrate bias. The principle of operation allows the manufacture of backside illuminated CMOS sensors with active thickness in excess of 100 μm. This helps increase the QE at near-IR and soft X-ray wavelengths, while preserving the excellent characteristics associated with the pinned photodiode sensitive elements. Such sensors are relevant to a wide range of applications, including scientific imaging, astronomy, Earth observation and surveillance. A prototype device with 10 μm and 5.4 μm pixels using this concept has been designed and is being manufactured on a 0.18 μm CMOS image sensor process. Only one additional implantation step has been introduced to the normal manufacturing flow to make this device. The paper discusses the design of the sensor and the challenges that had to be overcome to realise it in practice, and in particular the method of achieving full depletion without parasitic substrate currents. It is expected that this new technology can be competitive with modern backside illuminated thick CCDs for use at visible to near-IR telescopes and synchrotron light sources.

  3. Design and image-quality performance of high resolution CMOS-based X-ray imaging detectors for digital mammography

    NASA Astrophysics Data System (ADS)

    Cha, B. K.; Kim, J. Y.; Kim, Y. J.; Yun, S.; Cho, G.; Kim, H. K.; Seo, C.-W.; Jeon, S.; Huh, Y.

    2012-04-01

    In digital X-ray imaging systems, X-ray imaging detectors based on scintillating screens with electronic devices such as charge-coupled devices (CCDs), thin-film transistors (TFT), complementary metal oxide semiconductor (CMOS) flat panel imagers have been introduced for general radiography, dental, mammography and non-destructive testing (NDT) applications. Recently, a large-area CMOS active-pixel sensor (APS) in combination with scintillation films has been widely used in a variety of digital X-ray imaging applications. We employed a scintillator-based CMOS APS image sensor for high-resolution mammography. In this work, both powder-type Gd2O2S:Tb and a columnar structured CsI:Tl scintillation screens with various thicknesses were fabricated and used as materials to convert X-ray into visible light. These scintillating screens were directly coupled to a CMOS flat panel imager with a 25 × 50 mm2 active area and a 48 μm pixel pitch for high spatial resolution acquisition. We used a W/Al mammographic X-ray source with a 30 kVp energy condition. The imaging characterization of the X-ray detector was measured and analyzed in terms of linearity in incident X-ray dose, modulation transfer function (MTF), noise-power spectrum (NPS) and detective quantum efficiency (DQE).

  4. A 2D imager for X-ray FELs with a 65 nm CMOS readout based on per-pixel signal compression and 10 bit A/D conversion

    NASA Astrophysics Data System (ADS)

    Ratti, L.; Comotti, D.; Fabris, L.; Grassi, M.; Lodola, L.; Malcovati, P.; Manghisoni, M.; Re, V.; Traversi, G.; Vacchi, C.; Rizzo, G.; Batignani, G.; Bettarini, S.; Casarosa, G.; Forti, F.; Giorgi, M.; Morsani, F.; Paladino, A.; Paoloni, E.; Pancheri, L.; Dalla Betta, G.-F.; Mendicino, R.; Verzellesi, G.; Xu, H.; Benkechkache, M. A.

    2016-09-01

    A readout channel for applications to X-ray diffraction imaging at free electron lasers has been developed in a 65 nm CMOS technology. The analog front-end circuit can achieve an input dynamic range of 100 dB by leveraging a novel signal compression technique based on the non-linear features of MOS capacitors. Trapezoidal shaping is accomplished through a transconductor and a switched capacitor circuit, performing gated integration and correlated double sampling. A small area, low power 10 bit successive approximation register (SAR) ADC, operated in a time-interleaved fashion, is used for numerical conversion of the amplitude measurement. Operation at 5 MHz of the analog channel including the shaper was demonstrated. Also, the channel was found to be compliant with single 1 keV photon resolution at 1.25 MHz. The ADC provides a signal-to-noise ratio (SNR) of 56 dB, corresponding to an equivalent number of bits (ENOB) of 9 bits, and a differential non linearity DNL < 1 LSB at a sampling rate slightly larger than 1.8 MHz.

  5. a Portable Pixel Detector Operating as AN Active Nuclear Emulsion and its Application for X-Ray and Neutron Tomography

    NASA Astrophysics Data System (ADS)

    Vykydal, Z.; Jakubek, J.; Holy, T.; Pospisil, S.

    2006-04-01

    This work is devoted to the development of a USB1.1 (Universal Serial Bus) based read out system for the Medipix2 detector to achieve maximum portability of this position sensitive detecting device. All necessary detector support is integrated into one compact system (80 × 50 × 20 mm3) including the detector bias source (up to 100 V). The read out interface can control external I2C based devices, so in case of tomography it is easy to synchronize detector shutter with stepper motor control. An additional significant advantage of the USB interface is the support of back side pulse processing. This feature enables to determine the energy additionally to the position of a heavy charged particle hitting the sensor. Due to the small pixel dimensions it is also possible to distinguish the type of single quanta of radiation from the track created in the pixel detector as in case of an active nuclear emulsion.

  6. High accuracy injection circuit for the calibration of a large pixel sensor matrix

    NASA Astrophysics Data System (ADS)

    Quartieri, E.; Comotti, D.; Manghisoni, M.

    2013-08-01

    Semiconductor pixel detectors, for particle tracking and vertexing in high energy physics experiments as well as for X-ray imaging, in particular for synchrotron light sources and XFELs, require a large area sensor matrix. This work will discuss the design and the characterization of a high-linearity, low dispersion injection circuit to be used for pixel-level calibration of detector readout electronics in a large pixel sensor matrix. The circuit provides a useful tool for the characterization of the readout electronics of the pixel cell unit for both monolithic active pixel sensors and hybrid pixel detectors. In the latter case, the circuit allows for precise analogue test of the readout channel already at the chip level, when no sensor is connected. Moreover, it provides a simple means for calibration of readout electronics once the detector has been connected to the chip. Two injection techniques can be provided by the circuit: one for a charge sensitive amplification and the other for a transresistance readout channel. The aim of the paper is to describe the architecture and the design guidelines of the calibration circuit, which has been implemented in a 130 nm CMOS technology. Moreover, experimental results of the proposed injection circuit will be presented in terms of linearity and dispersion.

  7. Experiments with synchronized sCMOS cameras

    NASA Astrophysics Data System (ADS)

    Steele, Iain A.; Jermak, Helen; Copperwheat, Chris M.; Smith, Robert J.; Poshyachinda, Saran; Soonthorntham, Boonrucksar

    2016-07-01

    Scientific-CMOS (sCMOS) cameras can combine low noise with high readout speeds and do not suffer the charge multiplication noise that effectively reduces the quantum efficiency of electron multiplying CCDs by a factor 2. As such they have strong potential in fast photometry and polarimetry instrumentation. In this paper we describe the results of laboratory experiments using a pair of commercial off the shelf sCMOS cameras based around a 4 transistor per pixel architecture. In particular using a both stable and a pulsed light sources we evaluate the timing precision that may be obtained when the cameras readouts are synchronized either in software or electronically. We find that software synchronization can introduce an error of 200-msec. With electronic synchronization any error is below the limit ( 50-msec) of our simple measurement technique.

  8. Imaging properties of pixellated scintillators with deep pixels

    PubMed Central

    Barber, H. Bradford; Fastje, David; Lemieux, Daniel; Grim, Gary P.; Furenlid, Lars R.; Miller, Brian W.; Parkhurst, Philip; Nagarkar, Vivek V.

    2015-01-01

    We have investigated the light-transport properties of scintillator arrays with long, thin pixels (deep pixels) for use in high-energy gamma-ray imaging. We compared 10×10 pixel arrays of YSO:Ce, LYSO:Ce and BGO (1mm × 1mm × 20 mm pixels) made by Proteus, Inc. with similar 10×10 arrays of LSO:Ce and BGO (1mm × 1mm × 15mm pixels) loaned to us by Saint-Gobain. The imaging and spectroscopic behaviors of these scintillator arrays are strongly affected by the choice of a reflector used as an inter-pixel spacer (3M ESR in the case of the Proteus arrays and white, diffuse-reflector for the Saint-Gobain arrays). We have constructed a 3700-pixel LYSO:Ce Prototype NIF Gamma-Ray Imager for use in diagnosing target compression in inertial confinement fusion. This system was tested at the OMEGA Laser and exhibited significant optical, inter-pixel cross-talk that was traced to the use of a single-layer of ESR film as an inter-pixel spacer. We show how the optical cross-talk can be mapped, and discuss correction procedures. We demonstrate a 10×10 YSO:Ce array as part of an iQID (formerly BazookaSPECT) imager and discuss issues related to the internal activity of 176Lu in LSO:Ce and LYSO:Ce detectors. PMID:26236070

  9. Imaging properties of pixellated scintillators with deep pixels

    NASA Astrophysics Data System (ADS)

    Barber, H. Bradford; Fastje, David; Lemieux, Daniel; Grim, Gary P.; Furenlid, Lars R.; Miller, Brian W.; Parkhurst, Philip; Nagarkar, Vivek V.

    2014-09-01

    We have investigated the light-transport properties of scintillator arrays with long, thin pixels (deep pixels) for use in high-energy gamma-ray imaging. We compared 10x10 pixel arrays of YSO:Ce, LYSO:Ce and BGO (1mm x 1mm x 20 mm pixels) made by Proteus, Inc. with similar 10x10 arrays of LSO:Ce and BGO (1mm x 1mm x 15mm pixels) loaned to us by Saint-Gobain. The imaging and spectroscopic behaviors of these scintillator arrays are strongly affected by the choice of a reflector used as an inter-pixel spacer (3M ESR in the case of the Proteus arrays and white, diffuse-reflector for the Saint-Gobain arrays). We have constructed a 3700-pixel LYSO:Ce Prototype NIF Gamma-Ray Imager for use in diagnosing target compression in inertial confinement fusion. This system was tested at the OMEGA Laser and exhibited significant optical, inter-pixel cross-talk that was traced to the use of a single-layer of ESR film as an inter-pixel spacer. We show how the optical cross-talk can be mapped, and discuss correction procedures. We demonstrate a 10x10 YSO:Ce array as part of an iQID (formerly BazookaSPECT) imager and discuss issues related to the internal activity of 176Lu in LSO:Ce and LYSO:Ce detectors.

  10. Imaging properties of pixellated scintillators with deep pixels.

    PubMed

    Barber, H Bradford; Fastje, David; Lemieux, Daniel; Grim, Gary P; Furenlid, Lars R; Miller, Brian W; Parkhurst, Philip; Nagarkar, Vivek V

    2014-08-17

    We have investigated the light-transport properties of scintillator arrays with long, thin pixels (deep pixels) for use in high-energy gamma-ray imaging. We compared 10×10 pixel arrays of YSO:Ce, LYSO:Ce and BGO (1mm × 1mm × 20 mm pixels) made by Proteus, Inc. with similar 10×10 arrays of LSO:Ce and BGO (1mm × 1mm × 15mm pixels) loaned to us by Saint-Gobain. The imaging and spectroscopic behaviors of these scintillator arrays are strongly affected by the choice of a reflector used as an inter-pixel spacer (3M ESR in the case of the Proteus arrays and white, diffuse-reflector for the Saint-Gobain arrays). We have constructed a 3700-pixel LYSO:Ce Prototype NIF Gamma-Ray Imager for use in diagnosing target compression in inertial confinement fusion. This system was tested at the OMEGA Laser and exhibited significant optical, inter-pixel cross-talk that was traced to the use of a single-layer of ESR film as an inter-pixel spacer. We show how the optical cross-talk can be mapped, and discuss correction procedures. We demonstrate a 10×10 YSO:Ce array as part of an iQID (formerly BazookaSPECT) imager and discuss issues related to the internal activity of (176)Lu in LSO:Ce and LYSO:Ce detectors.

  11. A 0.18-µm CMOS Array Sensor for Integrated Time-Resolved Fluorescence Detection

    PubMed Central

    Huang, Ta-chien D.; Sorgenfrei, Sebastian; Gong, Ping; Levicky, Rastislav; Shepard, Kenneth L.

    2010-01-01

    This paper describes the design of an active, integrated CMOS sensor array for fluorescence applications which enables time-gated, time-resolved fluorescence spectroscopy. The 64-by-64 array is sensitive to photon densities as low as 8.8 × 106 photons/cm2 with 64-point averaging and, through a differential pixel design, has a measured impulse response of better than 800 ps. Applications include both active microarrays and high-frame-rate imagers for fluorescence lifetime imaging microscopy. PMID:20436922

  12. The ALPIDE pixel sensor chip for the upgrade of the ALICE Inner Tracking System

    NASA Astrophysics Data System (ADS)

    Aglieri Rinella, Gianluca

    2017-02-01

    The ALPIDE chip is a CMOS Monolithic Active Pixel Sensor being developed for the Upgrade of the ITS of the ALICE experiment at the CERN Large Hadron Collider. The ALPIDE chip is implemented with a 180 nm CMOS Imaging Process and fabricated on substrates with a high-resistivity epitaxial layer. It measures 15 mm×30 mm and contains a matrix of 512×1024 pixels with in-pixel amplification, shaping, discrimination and multi-event buffering. The readout of the sensitive matrix is hit driven. There is no signaling activity over the matrix if there are no hits to read out and power consumption is proportional to the occupancy. The sensor meets the experimental requirements of detection efficiency above 99%, fake-hit probability below 10-5 and a spatial resolution of 5 μm. The capability to read out Pb-Pb interactions at 100 kHz is provided. The power density of the ALPIDE chip is projected to be less than 35 mW/cm2 for the application in the Inner Barrel Layers and below 20 mW/cm2 for the Outer Barrel Layers, where the occupancy is lower. This contribution describes the architecture and the main features of the final ALPIDE chip, planned for submission at the beginning of 2016. Early results from the experimental qualification of full scale prototype predecessors are also reported.

  13. Vertical Isolation for Photodiodes in CMOS Imagers

    NASA Technical Reports Server (NTRS)

    Pain, Bedabrata

    2008-01-01

    In a proposed improvement in complementary metal oxide/semi conduct - or (CMOS) image detectors, two additional implants in each pixel would effect vertical isolation between the metal oxide/semiconductor field-effect transistors (MOSFETs) and the photodiode of the pixel. This improvement is expected to enable separate optimization of the designs of the photodiode and the MOSFETs so as to optimize their performances independently of each other. The purpose to be served by enabling this separate optimization is to eliminate or vastly reduce diffusion cross-talk, thereby increasing sensitivity, effective spatial resolution, and color fidelity while reducing noise.

  14. An investigation of signal performance enhancements achieved through innovative pixel design across several generations of indirect detection, active matrix, flat-panel arrays

    PubMed Central

    Antonuk, Larry E.; Zhao, Qihua; El-Mohri, Youcef; Du, Hong; Wang, Yi; Street, Robert A.; Ho, Jackson; Weisfield, Richard; Yao, William

    2009-01-01

    Active matrix flat-panel imager (AMFPI) technology is being employed for an increasing variety of imaging applications. An important element in the adoption of this technology has been significant ongoing improvements in optical signal collection achieved through innovations in indirect detection array pixel design. Such improvements have a particularly beneficial effect on performance in applications involving low exposures and∕or high spatial frequencies, where detective quantum efficiency is strongly reduced due to the relatively high level of additive electronic noise compared to signal levels of AMFPI devices. In this article, an examination of various signal properties, as determined through measurements and calculations related to novel array designs, is reported in the context of the evolution of AMFPI pixel design. For these studies, dark, optical, and radiation signal measurements were performed on prototype imagers incorporating a variety of increasingly sophisticated array designs, with pixel pitches ranging from 75 to 127 μm. For each design, detailed measurements of fundamental pixel-level properties conducted under radiographic and fluoroscopic operating conditions are reported and the results are compared. A series of 127 μm pitch arrays employing discrete photodiodes culminated in a novel design providing an optical fill factor of ∼80% (thereby assuring improved x-ray sensitivity), and demonstrating low dark current, very low charge trapping and charge release, and a large range of linear signal response. In two of the designs having 75 and 90 μm pitches, a novel continuous photodiode structure was found to provide fill factors that approach the theoretical maximum of 100%. Both sets of novel designs achieved large fill factors by employing architectures in which some, or all of the photodiode structure was elevated above the plane of the pixel addressing transistor. Generally, enhancement of the fill factor in either discrete or continuous

  15. Characterization of a fast CMOS imaging sensor for high-speed laser detection

    NASA Astrophysics Data System (ADS)

    Casadei, Bruno; Le Normand, J. P.; Hu, Y.; Cunin, Bernard

    2003-07-01

    CMOS active pixel sensors (APS) have performances competitive with charge-coupled device (CCD) technology, and offer advantages in on-chip functionality, system power reduction, cost and miniaturization. In this paper, we present characterization of a fast CMOS APS used in an imager for high-speed laser detections, which can replace the streak cameras. It produces the intensity information in function of one spatial dimension and time [I = f(x,t)] from one frame in two spatial dimensions. The time information is obtained for the first prototype camera to delay successively the integration phase in each pixel of the same row. The different noise sources of the APS sensors such as shot noise due to the photo sensor, the thermal noise and flicker noise due to the readout transistors and the photon shot noise are presented to determine the fundamental limits on image sensor. The first prototype FAMOSI (FAst MOS Imager) is composed of 64 x 64 active pixels. The simulation and experimental results show that a conversion gain of 6.73 +/- 0.25 μV/e- has been obtained with a noise level of 87 +/- 3e- rms. The power consumption of the chip is 25 mW at 50 images/sec.

  16. CMOS Imaging of Pin-Printed Xerogel-Based Luminescent Sensor Microarrays.

    PubMed

    Yao, Lei; Yung, Ka Yi; Khan, Rifat; Chodavarapu, Vamsy P; Bright, Frank V

    2010-12-01

    We present the design and implementation of a luminescence-based miniaturized multisensor system using pin-printed xerogel materials which act as host media for chemical recognition elements. We developed a CMOS imager integrated circuit (IC) to image the luminescence response of the xerogel-based sensor array. The imager IC uses a 26 × 20 (520 elements) array of active pixel sensors and each active pixel includes a high-gain phototransistor to convert the detected optical signals into electrical currents. The imager includes a correlated double sampling circuit and pixel address/digital control circuit; the image data is read-out as coded serial signal. The sensor system uses a light-emitting diode (LED) to excite the target analyte responsive luminophores doped within discrete xerogel-based sensor elements. As a prototype, we developed a 4 × 4 (16 elements) array of oxygen (O2) sensors. Each group of 4 sensor elements in the array (arranged in a row) is designed to provide a different and specific sensitivity to the target gaseous O2 concentration. This property of multiple sensitivities is achieved by using a strategic mix of two oxygen sensitive luminophores ([Ru(dpp)3](2+) and ([Ru(bpy)3](2+)) in each pin-printed xerogel sensor element. The CMOS imager consumes an average power of 8 mW operating at 1 kHz sampling frequency driven at 5 V. The developed prototype system demonstrates a low cost and miniaturized luminescence multisensor system.

  17. High-speed binary CMOS image sensor using a high-responsivity MOSFET-type photodetector

    NASA Astrophysics Data System (ADS)

    Choi, Byoung-Soo; Jo, Sung-Hyun; Bae, Myunghan; Choi, Pyung; Shin, Jang-Kyoo

    2015-03-01

    In this paper, a complementary metal oxide semiconductor (CMOS) binary image sensor based on a gate/body-tied (GBT) MOSFET-type photodetector is proposed. The proposed CMOS binary image sensor was simulated and measured using a standard CMOS 0.18-μm process. The GBT MOSFET-type photodetector is composed of a floating gate (n+- polysilicon) tied to the body (n-well) of the p-type MOSFET. The size of the active pixel sensor (APS) using GBT photodetector is smaller than that of APS using the photodiode. This means that the resolution of the image can be increased. The high-gain GBT photodetector has a higher photosensitivity compared to the p-n junction photodiode that is used in a conventional APS. Because GBT has a high sensitivity, fast operation of the binary processing is possible. A CMOS image sensor with the binary processing can be designed with simple circuits composed of a comparator and a Dflip- flop while a complex analog to digital converter (ADC) is not required. In addition, the binary image sensor has low power consumption and high speed operation with the ability to switch back and forth between a binary mode and an analog mode.

  18. Second Generation Monolithic Full-depletion Radiation Sensor with Integrated CMOS Circuitry

    SciTech Connect

    Segal, J.D.; Kenney, C.J.; Parker, S.I.; Aw, C.H.; Snoeys, W.J.; Wooley, B.; Plummer, J.D.; /Stanford U., Elect. Eng. Dept.

    2011-05-20

    A second-generation monolithic silicon radiation sensor has been built and characterized. This pixel detector has CMOS circuitry fabricated directly in the high-resistivity floatzone substrate. The bulk is fully depleted from bias applied to the backside diode. Within the array, PMOS pixel circuitry forms the first stage amplifiers. Full CMOS circuitry implementing further amplification as well as column and row logic is located in the periphery of the pixel array. This allows a sparse-field readout scheme where only pixels with signals above a certain threshold are readout. We describe the fabrication process, circuit design, system performance, and results of gamma-ray radiation tests.

  19. Modulator and VCSEL-MSM smart pixels for parallel pipeline networking and signal processing

    NASA Astrophysics Data System (ADS)

    Chen, C.-H.; Hoanca, Bogdan; Kuznia, C. B.; Pansatiankul, Dhawat E.; Zhang, Liping; Sawchuk, Alexander A.

    1999-07-01

    TRANslucent Smart Pixel Array (TRANSPAR) systems perform high performance parallel pipeline networking and signal processing based on optical propagation of 3D data packets. The TRANSPAR smart pixel devices use either self-electro- optic effect GaAs multiple quantum well modulators or CMOS- VCSEL-MSM (CMOS-Vertical Cavity Surface Emitting Laser- Metal-Semiconductor-Metal) technology. The data packets transfer among high throughput photonic network nodes using multiple access/collision detection or token-ring protocols.

  20. A PFM based digital pixel with off-pixel residue measurement for 15μm pitch MWIR FPAs

    NASA Astrophysics Data System (ADS)

    Abbasi, Shahbaz; Shafique, Atia; Galioglu, Arman; Ceylan, Omer; Yazici, Melik; Gurbuz, Yasar

    2016-05-01

    Digital pixels based on pulse frequency modulation (PFM) employ counting techniques to achieve very high charge handling capability compared to their analog counterparts. Moreover, extended counting methods making use of leftover charge (residue) on the integration capacitor help improve the noise performance of these pixels. However, medium wave infrared (MWIR) focal plane arrays (FPAs) having smaller pixel pitch are constrained in terms of pixel area which makes it difficult to add extended counting circuitry to the pixel. Thus, this paper investigates the performance of digital pixels employing off-pixel residue measurement. A circuit prototype of such a pixel has been designed for 15μm pixel pitch and fabricated in 90nm CMOS. The prototype is composed of a pixel front-end based on a PFM loop. The frontend is a modified version of conventional design providing a means for buffering the signal that needs to be converted to a digital value by an off-pixel ADC. The pixel has an integration phase and a residue measurement phase. Measured integration performance of the pixel has been reported in this paper for various detector currents and integration times.

  1. Developments and Applications of High-Performance CCD and CMOS Imaging Arrays

    NASA Astrophysics Data System (ADS)

    Janesick, James; Putnam, Gloria

    2003-12-01

    For over 20 years, charge-coupled devices (CCDs) have dominated most digital imaging applications and markets. Today, complementary metal oxide semiconductor (CMOS) arrays are displacing CCDs in some applications, and this trend is expected to continue. Low cost, low power, on-chip system integration, and high-speed operation are unique features that have generated interest in CMOS arrays. This paper reviews current CCD and CMOS sensor developments and related applications. We compare fundamental performance parameters common to these technologies and describe why the CCD is considered a mature technology, whereas CMOS arrays have significant room for growth. The paper presents custom CMOS pixel designs and related fabrication processes that address performance deficiencies of the CCD in high-performance applications. We discuss areas of development for future CCD and CMOS imagers. The paper also briefly reviews hybrid imaging arrays that combine the advantages of CCD and CMOS, producing better sensors than either technology alone can provide.

  2. High-performance VGA-resolution digital color CMOS imager

    NASA Astrophysics Data System (ADS)

    Agwani, Suhail; Domer, Steve; Rubacha, Ray; Stanley, Scott

    1999-04-01

    This paper discusses the performance of a new VGA resolution color CMOS imager developed by Motorola on a 0.5micrometers /3.3V CMOS process. This fully integrated, high performance imager has on chip timing, control, and analog signal processing chain for digital imaging applications. The picture elements are based on 7.8micrometers active CMOS pixels that use pinned photodiodes for higher quantum efficiency and low noise performance. The image processing engine includes a bank of programmable gain amplifiers, line rate clamping for dark offset removal, real time auto white balancing, per column gain and offset calibration, and a 10 bit pipelined RSD analog to digital converter with a programmable input range. Post ADC signal processing includes features such as bad pixel replacement based on user defined thresholds levels, 10 to 8 bit companding and 5 tap FIR filtering. The sensor can be programmed via a standard I2C interface that runs on 3.3V clocks. Programmable features include variable frame rates using a constant frequency master clock, electronic exposure control, continuous or single frame capture, progressive or interlace scanning modes. Each pixel is individually addressable allowing region of interest imaging and image subsampling. The sensor operates with master clock frequencies of up to 13.5MHz resulting in 30FPS. A total programmable gain of 27dB is available. The sensor power dissipation is 400mW at full speed of operation. The low noise design yields a measured 'system on a chip' dynamic range of 50dB thus giving over 8 true bits of resolution. Extremely high conversion gain result in an excellent peak sensitivity of 22V/(mu) J/cm2 or 3.3V/lux-sec. This monolithic image capture and processing engine represent a compete imaging solution making it a true 'camera on a chip'. Yet in its operation it remains extremely easy to use requiring only one clock and a 3.3V power supply. Given the available features and performance levels, this sensor will be

  3. CMOS analog switches for adaptive filters

    NASA Technical Reports Server (NTRS)

    Dixon, C. E.

    1980-01-01

    Adaptive active low-pass filters incorporate CMOS (Complimentary Metal-Oxide Semiconductor) analog switches (such as 4066 switch) that reduce variation in switch resistance when filter is switched to any selected transfer function.

  4. Modulated CMOS camera for fluorescence lifetime microscopy.

    PubMed

    Chen, Hongtao; Holst, Gerhard; Gratton, Enrico

    2015-12-01

    Widefield frequency-domain fluorescence lifetime imaging microscopy (FD-FLIM) is a fast and accurate method to measure the fluorescence lifetime of entire images. However, the complexity and high costs involved in construction of such a system limit the extensive use of this technique. PCO AG recently released the first luminescence lifetime imaging camera based on a high frequency modulated CMOS image sensor, QMFLIM2. Here we tested and provide operational procedures to calibrate the camera and to improve the accuracy using corrections necessary for image analysis. With its flexible input/output options, we are able to use a modulated laser diode or a 20 MHz pulsed white supercontinuum laser as the light source. The output of the camera consists of a stack of modulated images that can be analyzed by the SimFCS software using the phasor approach. The nonuniform system response across the image sensor must be calibrated at the pixel level. This pixel calibration is crucial and needed for every camera settings, e.g. modulation frequency and exposure time. A significant dependency of the modulation signal on the intensity was also observed and hence an additional calibration is needed for each pixel depending on the pixel intensity level. These corrections are important not only for the fundamental frequency, but also for the higher harmonics when using the pulsed supercontinuum laser. With these post data acquisition corrections, the PCO CMOS-FLIM camera can be used for various biomedical applications requiring a large frame and high speed acquisition.

  5. Towards spark-proof gaseous pixel detectors

    NASA Astrophysics Data System (ADS)

    Tsigaridas, S.; Beuzekom, M. v.; Chan, H. W.; Graaf, H. v. d.; Hartjes, F.; Heijhoff, K.; Hessey, N. P.; Prodanovic, V.

    2016-11-01

    The micro-pattern gaseous pixel detector, is a promising technology for imaging and particle tracking applications. It is a combination of a gas layer acting as detection medium and a CMOS pixelated readout-chip. As a prevention against discharges we deposit a protection layer on the chip and then integrate on top a micromegas-like amplification structure. With this technology we are able to reconstruct 3D track segments of particles passing through the gas thanks to the functionality of the chip. We have turned a Timepix3 chip into a gaseous pixel detector and tested it at the SPS at Cern. The preliminary results are promising and within the expectations. However, the spark protection layer needs further improvement to make reliable detectors. For this reason, we have created a setup for spark-testing. We present the first results obtained from the lab-measurements along with preliminary results from the testbeam.

  6. Turn-on circuits based on standard CMOS technology for active RFID labels

    NASA Astrophysics Data System (ADS)

    Hall, David; Ranasinghe, Damith C.; Jamali, Behnam; Cole, Peter H.

    2005-06-01

    The evolution of RFID Systems has lead to the development of a class hierarchy in which the battery powered labels are a set of higher class labels referred to as active labels. The battery powering active transponders must last for an acceptable time, so the electronics of the label must have very low current consumption in order to prolong the life of the battery. However due to circuit complexity or the desired operating range the electronics may drain the battery more rapidly than desired but use of a turn-on circuit allows the battery to be connected only when communication is needed, thus lengthening the life of the battery. Two solutions available for the development of a turn on circuit use resonance in a label rectification circuit to provide a high sensitivity result. This paper presents the results of experiments conducted to evaluate resonance in a label rectification circuit and the designs of fully integrable turn-on circuits. We have also presented test results showing a successful practical implementation of one of the turn on circuit designs.

  7. CMOS Image Sensor and System for Imaging Hemodynamic Changes in Response to Deep Brain Stimulation.

    PubMed

    Zhang, Xiao; Noor, Muhammad S; McCracken, Clinton B; Kiss, Zelma H T; Yadid-Pecht, Orly; Murari, Kartikeya

    2016-06-01

    Deep brain stimulation (DBS) is a therapeutic intervention used for a variety of neurological and psychiatric disorders, but its mechanism of action is not well understood. It is known that DBS modulates neural activity which changes metabolic demands and thus the cerebral circulation state. However, it is unclear whether there are correlations between electrophysiological, hemodynamic and behavioral changes and whether they have any implications for clinical benefits. In order to investigate these questions, we present a miniaturized system for spectroscopic imaging of brain hemodynamics. The system consists of a 144 ×144, [Formula: see text] pixel pitch, high-sensitivity, analog-output CMOS imager fabricated in a standard 0.35 μm CMOS process, along with a miniaturized imaging system comprising illumination, focusing, analog-to-digital conversion and μSD card based data storage. This enables stand alone operation without a computer, nor electrical or fiberoptic tethers. To achieve high sensitivity, the pixel uses a capacitive transimpedance amplifier (CTIA). The nMOS transistors are in the pixel while pMOS transistors are column-parallel, resulting in a fill factor (FF) of 26%. Running at 60 fps and exposed to 470 nm light, the CMOS imager has a minimum detectable intensity of 2.3 nW/cm(2) , a maximum signal-to-noise ratio (SNR) of 49 dB at 2.45 μW/cm(2) leading to a dynamic range (DR) of 61 dB while consuming 167 μA from a 3.3 V supply. In anesthetized rats, the system was able to detect temporal, spatial and spectral hemodynamic changes in response to DBS.

  8. Review of radiation damage studies on DNW CMOS MAPS

    NASA Astrophysics Data System (ADS)

    Traversi, G.; Gaioni, L.; Manazza, A.; Manghisoni, M.; Ratti, L.; Re, V.; Zucca, S.; Bettarini, S.; Rizzo, G.; Morsani, F.; Bosisio, L.; Rashevskaya, I.; Cindro, V.

    2013-12-01

    Monolithic active pixel sensors fabricated in a bulk CMOS technology with no epitaxial layer and standard resistivity (10 Ω cm) substrate, featuring a deep N-well as the collecting electrode (DNW MAPS), have been exposed to γ-rays, up to a final dose of 10 Mrad (SiO2), and to neutrons from a nuclear reactor, up to a total 1 MeV neutron equivalent fluence of about 3.7 ·1013cm-2. The irradiation campaign was aimed at studying the effects of radiation on the most significant parameters of the front-end electronics and on the charge collection properties of the sensors. Device characterization has been carried out before and after irradiations. The DNW MAPS irradiated with 60Co γ-rays were also subjected to high temperature annealing (100 °C for 168 h). Measurements have been performed through a number of different techniques, including electrical characterization of the front-end electronics and of DNW diodes, laser stimulation of the sensors and tests with 55Fe and 90Sr radioactive sources. This paper reviews the measurement results, their relation with the damage mechanisms underlying performance degradation and provides a new comparison between DNW devices and MAPS fabricated in a CMOS process with high resistivity (1 kΩ cm) epitaxial layer.

  9. The ALICE Pixel Detector

    NASA Astrophysics Data System (ADS)

    Mercado-Perez, Jorge

    2002-07-01

    The present document is a brief summary of the performed activities during the 2001 Summer Student Programme at CERN under the Scientific Summer at Foreign Laboratories Program organized by the Particles and Fields Division of the Mexican Physical Society (Sociedad Mexicana de Fisica). In this case, the activities were related with the ALICE Pixel Group of the EP-AIT Division, under the supervision of Jeroen van Hunen, research fellow in this group. First, I give an introduction and overview to the ALICE experiment; followed by a description of wafer probing. A brief summary of the test beam that we had from July 13th to July 25th is given as well.

  10. Theoretical performance analysis for CMOS based high resolution detectors.

    PubMed

    Jain, Amit; Bednarek, Daniel R; Rudin, Stephen

    2013-03-06

    High resolution imaging capabilities are essential for accurately guiding successful endovascular interventional procedures. Present x-ray imaging detectors are not always adequate due to their inherent limitations. The newly-developed high-resolution micro-angiographic fluoroscope (MAF-CCD) detector has demonstrated excellent clinical image quality; however, further improvement in performance and physical design may be possible using CMOS sensors. We have thus calculated the theoretical performance of two proposed CMOS detectors which may be used as a successor to the MAF. The proposed detectors have a 300 μm thick HL-type CsI phosphor, a 50 μm-pixel CMOS sensor with and without a variable gain light image intensifier (LII), and are designated MAF-CMOS-LII and MAF-CMOS, respectively. For the performance evaluation, linear cascade modeling was used. The detector imaging chains were divided into individual stages characterized by one of the basic processes (quantum gain, binomial selection, stochastic and deterministic blurring, additive noise). Ranges of readout noise and exposure were used to calculate the detectors' MTF and DQE. The MAF-CMOS showed slightly better MTF than the MAF-CMOS-LII, but the MAF-CMOS-LII showed far better DQE, especially for lower exposures. The proposed detectors can have improved MTF and DQE compared with the present high resolution MAF detector. The performance of the MAF-CMOS is excellent for the angiography exposure range; however it is limited at fluoroscopic levels due to additive instrumentation noise. The MAF-CMOS-LII, having the advantage of the variable LII gain, can overcome the noise limitation and hence may perform exceptionally for the full range of required exposures; however, it is more complex and hence more expensive.

  11. Monolithic pixels on moderate resistivity substrate and sparsifying readout architecture

    NASA Astrophysics Data System (ADS)

    Giubilato, P.; Battaglia, M.; Bisello, D.; Caselle, M.; Chalmet, P.; Demaria, L.; Ikemoto, Y.; Kloukinas, K.; Mansuy, S. C.; Mattiazzo, S.; Marchioro, A.; Mugnier, H.; Pantano, D.; Potenza, A.; Rivetti, A.; Rousset, J.; Silvestrin, L.; Snoeys, W.

    2013-12-01

    The LePix projects aim realizing a new generation monolithic pixel detectors with improved performances at lesser cost with respect to both current state of the art monolithic and hybrid pixel sensors. The detector is built in a 90 nm CMOS process on a substrate of moderate resistivity. This allows charge collection by drift while maintaining the other advantages usually offered by MAPS, like having a single piece detector and using a standard CMOS production line. The collection by drift mechanism, coupled to the low capacitance design of the collecting node made possible by the monolithic approach, provides an excellent signal to noise ratio straight at the pixel cell together with a radiation tolerance far superior to conventional un-depleted MAPS. The excellent signal-to-noise performance is demonstrated by the device ability to separate the 6 keV 55Fe double peak at room temperature. To achieve high granularity (10-20 μm pitch pixels) over large detector areas maintaining high readout speed, a completely new compressing architecture has been devised. This architecture departs from the mainstream hybrid pixel sparsification approach, which uses in-pixel logic to reduce data, by using topological compression to minimize pixel area and power consumption.

  12. A low light level sensor with dark current compensating pixels

    NASA Astrophysics Data System (ADS)

    Perley, Mitchell; Baxter, Patrick; Raynor, Jeffrey M.; Renshaw, David

    2008-09-01

    In ultra-low light conditions the presence of dark current becomes a major source of noise for a CMOS sensor. Standard dark current compensation techniques, such as using a dark reference frame, bring significant improvements to dark noise in typical applications. However, applications requiring long integration times mean that such techniques cannot always be used. This paper presents a differential dark current compensating pixel. The pixel is made up of a differential amplifier and two photodiodes: one light shielded photodiode connected to the non-inverting input of the opamp and a light detecting photodiode connected to the inverting input of the opamp. An integrating capacitor is used in the feedback loop to convert photocurrent to voltage, and a switched capacitor network is present in parallel with the light shielded pixel, which is used to satisfy the output equation to compensate the dark current. The pixel uses 150 μm x 150 μm photodiodes and is fabricated in a standard 0.18 μm, 6M1P, CMOS process. The results show that the pixel is light sensitive and has a linear output as expected. However, the dark current is not predictably controlled. Further work will be carried out on the pixel design, and particularly the switched capacitor circuit, to determine the cause of the non-predictability of the pixel output.

  13. Smart CMOS image sensor for lightning detection and imaging.

    PubMed

    Rolando, Sébastien; Goiffon, Vincent; Magnan, Pierre; Corbière, Franck; Molina, Romain; Tulet, Michel; Bréart-de-Boisanger, Michel; Saint-Pé, Olivier; Guiry, Saïprasad; Larnaudie, Franck; Leone, Bruno; Perez-Cuevas, Leticia; Zayer, Igor

    2013-03-01

    We present a CMOS image sensor dedicated to lightning detection and imaging. The detector has been designed to evaluate the potentiality of an on-chip lightning detection solution based on a smart sensor. This evaluation is performed in the frame of the predevelopment phase of the lightning detector that will be implemented in the Meteosat Third Generation Imager satellite for the European Space Agency. The lightning detection process is performed by a smart detector combining an in-pixel frame-to-frame difference comparison with an adjustable threshold and on-chip digital processing allowing an efficient localization of a faint lightning pulse on the entire large format array at a frequency of 1 kHz. A CMOS prototype sensor with a 256×256 pixel array and a 60 μm pixel pitch has been fabricated using a 0.35 μm 2P 5M technology and tested to validate the selected detection approach.

  14. Development of a large-area CMOS-based detector for real-time x-ray imaging

    NASA Astrophysics Data System (ADS)

    Heo, Sung Kyn; Park, Sung Kyu; Hwang, Sung Ha; Im, Dong Ak; Kosonen, Jari; Kim, Tae Woo; Yun, Seungman; Kim, Ho Kyung

    2010-04-01

    Complementary metal-oxide-semiconductor (CMOS) active pixel sensors (APSs) with high electrical and optical performances are now being attractive for digital radiography (DR) and dental cone-beam computed tomography (CBCT). In this study, we report our prototype CMOS-based detectors capable of real-time imaging. The field-of-view of the detector is 12 × 14.4 cm. The detector employs a CsI:Tl scintillator as an x-ray-to-light converter. The electrical performance of the CMOS APS, such as readout noise and full-well capacity, was evaluated. The x-ray imaging characteristics of the detector were evaluated in terms of characteristic curve, pre-sampling modulation transfer function, noise power spectrum, detective quantum efficiency, and image lag. The overall performance of the detector is demonstrated with phantom images obtained for DR and CBCT applications. The detailed development description and measurement results are addressed. With the results, we suggest that the prototype CMOS-based detector has the potential for CBCT and real-time x-ray imaging applications.

  15. Development and simulation results of a sparsification and readout circuit for wide pixel matrices

    NASA Astrophysics Data System (ADS)

    Gabrielli, A.; Giorgi, F.; Morsani, F.; Villa, M.

    2011-06-01

    In future collider experiments, the increasing luminosity and centre of mass energy are rising challenging problems in the design of new inner tracking systems. In this context we develop high-efficiency readout architectures for large binary pixel matrices that are meant to cope with the high-stressing conditions foreseen in the innermost layers of a tracker [The SuperB Conceptual Design Report, INFN/AE-07/02, SLAC-R-856, LAL 07-15, Available online at: http://www.pi.infn.it/SuperB]. We model and design digital readout circuits to be integrated on VLSI ASICs. These architectures can be realized with different technology processes and sensors: they can be implemented on the same silicon sensor substrate of a CMOS MAPS devices (Monolithic Active Pixel Sensor), on the CMOS tier of a hybrid pixel sensor or in a 3D chip where the digital layer is stacked on the sensor and the analog layers [V. Re et al., Nuc. Instr. and Meth. in Phys. Res. A, doi:10.1016/j.nima.2010.05.039]. In the presented work, we consider a data-push architecture designed for a sensor matrix of an area of about 1.3 cm 2 with a pitch of 50 microns. The readout circuit tries to take great advantage of the high density of in-pixel digital logic allowed by vertical integration. We aim at sustaining a rate density of 100 Mtrack ṡ s -1 ṡ cm -2 with a temporal resolution below 1 μs. We show how this architecture can cope with these stressing conditions presenting the results of Monte Carlo simulations.

  16. Mapping Electrical Crosstalk in Pixelated Sensor Arrays

    NASA Technical Reports Server (NTRS)

    Seshadri, S.; Cole, D. M.; Hancock, B. R.; Smith, R. M.

    2008-01-01

    Electronic coupling effects such as Inter-Pixel Capacitance (IPC) affect the quantitative interpretation of image data from CMOS, hybrid visible and infrared imagers alike. Existing methods of characterizing IPC do not provide a map of the spatial variation of IPC over all pixels. We demonstrate a deterministic method that provides a direct quantitative map of the crosstalk across an imager. The approach requires only the ability to reset single pixels to an arbitrary voltage, different from the rest of the imager. No illumination source is required. Mapping IPC independently for each pixel is also made practical by the greater S/N ratio achievable for an electrical stimulus than for an optical stimulus, which is subject to both Poisson statistics and diffusion effects of photo-generated charge. The data we present illustrates a more complex picture of IPC in Teledyne HgCdTe and HyViSi focal plane arrays than is presently understood, including the presence of a newly discovered, long range IPC in the HyViSi FPA that extends tens of pixels in distance, likely stemming from extended field effects in the fully depleted substrate. The sensitivity of the measurement approach has been shown to be good enough to distinguish spatial structure in IPC of the order of 0.1%.

  17. Faint-meteor survey with a large-format CMOS sensor

    NASA Astrophysics Data System (ADS)

    Watanabe, J.; Enomoto, T.; Terai, T.; Kasuga, T.; Miyazaki, S.; Oota, K.; Muraoka, F.; Onishi, T.; Yamasaki, T.; Mito, H.; Aoki, T.; Soyano, T.; Tarusawa, K.; Matsunaga, N.; Sako, S.; Kobayashi, N.; Doi, M.

    2014-07-01

    For observing faint meteors, we need a large telescope or similar optics, which always give a restriction of the field of view. It is a kind of trade-off between the high sensitivity by using larger telescope and narrower field of view. Reconciling this contradiction, we need a large-format imaging detector together with fast readout for meteor observations. A high-sensitivity CMOS sensor of the large format was developed by Canon Inc. in 2010[1]. Its size is 202 mm×205 mm which makes it the largest one-chip CMOS sensor in the world, and approximately 40 times the size of Canon's largest commercial CMOS sensor as shown in the figure. The number of pixel is 1280×1248. Because the increased size of the new CMOS sensor allows more light to be gathered, it enables shooting in low-light environments. The sensor makes image capture possible in one-hundredth the amount of light required by a 35 mm full-frame CMOS sensor, facilitating the shooting of 60 frame-per-second video with a mere 0.3 lux of illumination. We tried to use this large-format CMOS sensor attached to the prime focus of the 1.05-m (F3.1) Schmidt telescope at the Kiso Observatory, University of Tokyo, for surveying faint meteors. The field of view is 3.3 by 3.3 degrees. Test observations including operation check of the system were carried out in January 2011, September 2011,and December 2012. Images were obtained at a time resolution of 60 frames per second. In this system, the limiting magnitude is estimated to be about 11-12. Because of the limitation of the data storage, full-power observations (14-bit data per 1/60 second) were performed for about one or two hours each night. During the first period, we can count a sporadic meteor every 5 seconds. This is about one order higher detection rate of the faint meteors compared with the previous work[2]. Assuming the height of faint meteors at 100 km, the derived flux of the sporadic meteors is about 5 × 10^{-4} km^{-2} sec^{-1}. The last run was

  18. Fluence measurement of fast neutron fields with a highly efficient recoil proton telescope using active pixel sensors.

    PubMed

    Taforeau, J; Higueret, S; Husson, D; Kachel, M; Lebreton, L

    2014-10-01

    The spectrometer ATHENA (Accurate Telescope for High-Energy Neutron metrology Applications) is being developed at the LNE-IRSN and aims at characterising energy and fluence of fast neutron fields. The detector is a recoil proton telescope and measures neutron fields in the range of 5-20 MeV. This telescope is intended to become a primary standard for both energy and fluence measurements. The neutron detection is achieved by a polyethylene radiator for n-p conversion, three 50-µm-thick silicon sensors that use CMOS technology for proton tracking and a 3-mm-thick silicon diode to measure the residual proton energy. The use of CMOS sensors and silicon diode, owing to a large detection solid angle, increases the intrinsic efficiency of the detector by a factor of 10 compared with conventional designs. The ability of the spectrometer to determine the neutron energy was demonstrated and reported elsewhere. This paper focuses on the fluence measurement of monoenergetic neutron fields in the range of 5-20 MeV. Experimental investigations, performed at the AMANDE facility, indicate a good estimation of neutron fluence at various energies. In addition, a complete description of uncertainties budget is presented in this paper and a Monte Carlo propagation of uncertainty sources leads to a fluence measurement with a precision ∼3-5 % depending on the neutron energy.

  19. Single photon detection and localization accuracy with an ebCMOS camera

    NASA Astrophysics Data System (ADS)

    Cajgfinger, T.; Dominjon, A.; Barbier, R.

    2015-07-01

    The CMOS sensor technologies evolve very fast and offer today very promising solutions to existing issues facing by imaging camera systems. CMOS sensors are very attractive for fast and sensitive imaging thanks to their low pixel noise (1e-) and their possibility of backside illumination. The ebCMOS group of IPNL has produced a camera system dedicated to Low Light Level detection and based on a 640 kPixels ebCMOS with its acquisition system. After reminding the principle of detection of an ebCMOS and the characteristics of our prototype, we confront our camera to other imaging systems. We compare the identification efficiency and the localization accuracy of a point source by four different photo-detection devices: the scientific CMOS (sCMOS), the Charge Coupled Device (CDD), the Electron Multiplying CCD (emCCD) and the Electron Bombarded CMOS (ebCMOS). Our ebCMOS camera is able to identify a single photon source in less than 10 ms with a localization accuracy better than 1 μm. We report as well efficiency measurement and the false positive identification of the ebCMOS camera by identifying more than hundreds of single photon sources in parallel. About 700 spots are identified with a detection efficiency higher than 90% and a false positive percentage lower than 5. With these measurements, we show that our target tracking algorithm can be implemented in real time at 500 frames per second under a photon flux of the order of 8000 photons per frame. These results demonstrate that the ebCMOS camera concept with its single photon detection and target tracking algorithm is one of the best devices for low light and fast applications such as bioluminescence imaging, quantum dots tracking or adaptive optics.

  20. First prototypes of two-tier avalanche pixel sensors for particle detection

    NASA Astrophysics Data System (ADS)

    Pancheri, L.; Brogi, P.; Collazuol, G.; Dalla Betta, G.-F.; Ficorella, A.; Marrocchesi, P. S.; Morsani, F.; Ratti, L.; Savoy-Navarro, A.

    2017-02-01

    In this paper, we present the implementation and preliminary evaluation of a new type of silicon sensor for charged particle detection operated in Geiger-mode. The proposed device, formed by two vertically-aligned pixel arrays, exploits the coincidence between two simultaneous avalanche events to discriminate between particle-triggered detections and dark counts. A proof-of-concept two-layer sensor with per-pixel coincidence circuits was designed and fabricated in a 150 nm CMOS process and vertically integrated through bump bonding. The sensor includes a 48×16 pixel array with 50 μ m × 75 μ m pixels. This work describes the sensor architecture and reports a selection of results from the characterization of the avalanche detectors in the two layers. Detectors with an active area of 43 × 45 μ m2 have a median dark count rate of 3 kHz at 3.3 V excess bias and a breakdown voltage non-uniformity lower than 20 mV.

  1. An investigation of medical radiation detection using CMOS image sensors in smartphones

    NASA Astrophysics Data System (ADS)

    Kang, Han Gyu; Song, Jae-Jun; Lee, Kwonhee; Nam, Ki Chang; Hong, Seong Jong; Kim, Ho Chul

    2016-07-01

    Medical radiation exposure to patients has increased with the development of diagnostic X-ray devices and multi-channel computed tomography (CT). Despite the fact that the low-dose CT technique can significantly reduce medical radiation exposure to patients, the increasing number of CT examinations has increased the total medical radiation exposure to patients. Therefore, medical radiation exposure to patients should be monitored to prevent cancers caused by diagnostic radiation. However, without using thermoluminescence or glass dosimeters, it is hardly measure doses received by patients during medical examinations accurately. Hence, it is necessary to develop radiation monitoring devices and algorithms that are reasonably priced and have superior radiation detection efficiencies. The aim of this study is to investigate the feasibility of medical dose measurement using complementary metal oxide semiconductor (CMOS) sensors in smartphone cameras with an algorithm to extract the X-ray interacted pixels. We characterized the responses of the CMOS sensors in a smartphone with respect to the X-rays generated by a general diagnostic X-ray system. The characteristics of the CMOS sensors in a smartphone camera, such as dose response linearity, dose rate dependence, energy dependence, angular dependence, and minimum detectable activity were evaluated. The high energy gamma-ray of 662 keV from Cs-137 can be detected using the smartphone camera. The smartphone cameras which employ the developed algorithm can detect medical radiations.

  2. Using a large area CMOS APS for direct chemiluminescence detection in Western blotting electrophoresis

    NASA Astrophysics Data System (ADS)

    Esposito, Michela; Newcombe, Jane; Anaxagoras, Thalis; Allinson, Nigel M.; Wells, Kevin

    2012-03-01

    Western blotting electrophoretic sequencing is an analytical technique widely used in Functional Proteomics to detect, recognize and quantify specific labelled proteins in biological samples. A commonly used label for western blotting is Enhanced ChemiLuminescence (ECL) reagents based on fluorescent light emission of Luminol at 425nm. Film emulsion is the conventional detection medium, but is characterized by non-linear response and limited dynamic range. Several western blotting digital imaging systems have being developed, mainly based on the use of cooled Charge Coupled Devices (CCDs) and single avalanche diodes that address these issues. Even so these systems present key drawbacks, such as a low frame rate and require operation at low temperature. Direct optical detection using Complementary Metal Oxide Semiconductor (CMOS) Active Pixel Sensors (APS)could represent a suitable digital alternative for this application. In this paper the authors demonstrate the viability of direct chemiluminescent light detection in western blotting electrophoresis using a CMOS APS at room temperature. Furthermore, in recent years, improvements in fabrication techniques have made available reliable processes for very large imagers, which can be now scaled up to wafer size, allowing direct contact imaging of full size western blotting samples. We propose using a novel wafer scale APS (12.8 cm×13.2 cm), with an array architecture using two different pixel geometries that can deliver an inherently low noise and high dynamic range image at the same time representing a dramatic improvement with respect to the current western blotting imaging systems.

  3. Proton-counting radiography for proton therapy: a proof of principle using CMOS APS technology.

    PubMed

    Poludniowski, G; Allinson, N M; Anaxagoras, T; Esposito, M; Green, S; Manolopoulos, S; Nieto-Camero, J; Parker, D J; Price, T; Evans, P M

    2014-06-07

    Despite the early recognition of the potential of proton imaging to assist proton therapy (Cormack 1963 J. Appl. Phys. 34 2722), the modality is still removed from clinical practice, with various approaches in development. For proton-counting radiography applications such as computed tomography (CT), the water-equivalent-path-length that each proton has travelled through an imaged object must be inferred. Typically, scintillator-based technology has been used in various energy/range telescope designs. Here we propose a very different alternative of using radiation-hard CMOS active pixel sensor technology. The ability of such a sensor to resolve the passage of individual protons in a therapy beam has not been previously shown. Here, such capability is demonstrated using a 36 MeV cyclotron beam (University of Birmingham Cyclotron, Birmingham, UK) and a 200 MeV clinical radiotherapy beam (iThemba LABS, Cape Town, SA). The feasibility of tracking individual protons through multiple CMOS layers is also demonstrated using a two-layer stack of sensors. The chief advantages of this solution are the spatial discrimination of events intrinsic to pixelated sensors, combined with the potential provision of information on both the range and residual energy of a proton. The challenges in developing a practical system are discussed.

  4. Proton-counting radiography for proton therapy: a proof of principle using CMOS APS technology

    PubMed Central

    Poludniowski, G; Allinson, N M; Anaxagoras, T; Esposito, M; Green, S; Manolopoulos, S; Nieto-Camero, J; Parker, D J; Price, T; Evans, P M

    2014-01-01

    Despite the early recognition of the potential of proton imaging to assist proton therapy the modality is still removed from clinical practice, with various approaches in development. For proton-counting radiography applications such as Computed Tomography (CT), the Water-Equivalent-Path-Length (WEPL) that each proton has travelled through an imaged object must be inferred. Typically, scintillator-based technology has been used in various energy/range telescope designs. Here we propose a very different alternative of using radiation-hard CMOS Active Pixel Sensor (APS) technology. The ability of such a sensor to resolve the passage of individual protons in a therapy beam has not been previously shown. Here, such capability is demonstrated using a 36 MeV cyclotron beam (University of Birmingham Cyclotron, Birmingham, UK) and a 200 MeV clinical radiotherapy beam (iThemba LABS, Cape Town, SA). The feasibility of tracking individual protons through multiple CMOS layers is also demonstrated using a two-layer stack of sensors. The chief advantages of this solution are the spatial discrimination of events intrinsic to pixelated sensors, combined with the potential provision of information on both the range and residual energy of a proton. The challenges in developing a practical system are discussed. PMID:24785680

  5. Noise Characterization of Polycrystalline Silicon Thin Film Transistors for X-ray Imagers Based on Active Pixel Architectures.

    PubMed

    Antonuk, L E; Koniczek, M; McDonald, J; El-Mohri, Y; Zhao, Q; Behravan, M

    2008-01-01

    An examination of the noise of polycrystalline silicon thin film transistors, in the context of flat panel x-ray imager development, is reported. The study was conducted in the spirit of exploring how the 1/f, shot and thermal noise components of poly-Si TFTs, determined from current noise power spectral density measurements, as well as through calculation, can be used to assist in the development of imagers incorporating pixel amplification circuits based on such transistors.

  6. Source Driver Channel Reduction Schemes Employing Corresponding Pixel Alignments for Current Programming Active-Matrix Organic Light-Emitting Diode Displays

    NASA Astrophysics Data System (ADS)

    Hong, Soon-Kwang; Oh, Du-Hwan; Jeong, Seok-Hee; Park, Young-Ju; Kim, Byeong-Koo; Ha, Yong-Min; Jang, Jin

    2008-03-01

    We propose two types of novel scheme for reducing the number of output channels of driver-integrated circuit (D-IC) for the current programming compensation pixel structures of active-matrix organic light-emitting diodes (AMOLEDs). One is a 2:1 data demultiplexing technique that can reduce the number of output channels of D-IC by half. The proposed second scheme is a vertically aligned red (R), green (G), and blue (B) subpixel scheme instead of a horizontally aligned R-G-B subpixel one, which is regarded as the conventional pixel alignment scheme. We have also successfully implemented these schemes in a 2.4-in.-sized QCIF + (176 × RGB × 220) AMOLED using p-type excimer laser annealing (ELA) low-temperature polycrystalline silicon (LTPS) technology and evaluated key performance characteristics.

  7. ATLAS IBL Pixel Upgrade

    NASA Astrophysics Data System (ADS)

    La Rosa, A.; Atlas Ibl Collaboration

    2011-06-01

    The upgrade for ATLAS detector will undergo different phases towards super-LHC. The first upgrade for the Pixel detector will consist of the construction of a new pixel layer which will be installed during the first shutdown of the LHC machine (LHC phase-I upgrade). The new detector, called Insertable B-Layer (IBL), will be inserted between the existing pixel detector and a new (smaller radius) beam-pipe at a radius of 3.3 cm. The IBL will require the development of several new technologies to cope with increase of radiation or pixel occupancy and also to improve the physics performance which will be achieved by reducing the pixel size and of the material budget. Three different promising sensor technologies (planar-Si, 3D-Si and diamond) are currently under investigation for the pixel detector. An overview of the project with particular emphasis on the pixel module is presented in this paper.

  8. Towards arrays of smart-pixels for time-correlated single photon counting and time of flight application

    NASA Astrophysics Data System (ADS)

    Markovic, Bojan; Tisa, Simone; Tosi, Alberto; Zappa, Franco

    2011-01-01

    We present a novel "smart-pixel" able to detect single photons and to measure and record in-pixel the time delay between a START pulse (e.g., laser excitation, cell stimulus, or LIDAR flash) and a STOP pulse given by the detection of a single photon (e. g., fluorescence decay signal or back reflection from an object). This smart-pixel represents the basic building block of SPAD arrays aimed at time-correlated single photon counting (TCSPC) applications (like FLIM, FCS, FRET), but also at photon timing and direct Time-of-Flight (dTOF) measurements for 3D ranging applications (e.g., in LIDAR systems). The pixel comprises a Single-Photon Avalanche Diode (SPAD) detector, an analog sensing and driving electronics, and a Time-to-Digital Converter monolithically designed and manufactured into the same chip. We report on the design and characterization of prototype circuits, fabricated in a 0.35 μm standard CMOS technology containing complete conversion channels, smart-pixels and ancillary electronics with 20 μm active area diameter SPAD detectors and related quenching circuitry. With a 100 MHz reference clock, the TDC provides a time-resolution of 10 ps, a dynamic range of 160 ns and very high conversion linearity.

  9. CMOS prototype for retinal prosthesis applications with analog processing

    NASA Astrophysics Data System (ADS)

    Castillo-Cabrera, G.; García-Lamont, J.; Reyes-Barranca, M. A.; Matsumoto-Kuwabara, Y.; Moreno-Cadenas, J. A.; Flores-Nava, L. M.

    2014-12-01

    A core architecture for analog processing, which emulates a retina's receptive field, is presented in this work. A model was partially implemented and built on CMOS standard technology through MOSIS. It considers that the receptive field is the basic unit for image processing in the visual system. That is why the design is concerned on a partial solution of receptive field properties in order to be adapted in the future as an aid to people with retinal diseases. A receptive field is represented by an array of 3×3 pixels. Each pixel carries out a process based on four main operations. This means that image processing is developed at pixel level. Operations involved are: (1) photo-transduction by photocurrent integration, (2) signal averaging from eight neighbouring pixels executed by a neu-NMOS (ν-NMOS) neuron, (3) signal average gradient between central pixel and the average value from the eight neighbouring pixels (this gradient is performed by a comparator) and finally (4) a pulse generator. Each one of these operations gives place to circuital blocks which were built on 0.5 μm CMOS technology.

  10. HV-CMOS detectors in BCD8 technology

    NASA Astrophysics Data System (ADS)

    Andreazza, A.; Castoldi, A.; Ceriale, V.; Chiodini, G.; Citterio, M.; Darbo, G.; Gariano, G.; Gaudiello, A.; Guazzoni, C.; Joshi, A.; Liberali, V.; Passadore, S.; Ragusa, F.; Ruscino, E.; Sbarra, C.; Shrimali, H.; Sidoti, A.; Stabile, A.; Yadav, I.; Zaffaroni, E.

    2016-11-01

    This paper presents the first pixel detector realized using the BCD8 technology of STMicroelectronics. The BCD8 is a 160 nm process with bipolar, CMOS and DMOS devices; mainly targeted for an automotive application. The silicon particle detector is realized as a pixel sensor diode with a dimension of 250 × 50 μm2. To support the signal sensitivity of pixel diode, the circuit simulations have been performed with a substrate voltage of 50 V. The analog signal processing circuitry and the digital operation of the circuit is designed with the supply voltage of 1.8 V. Moreover, an analog processing part of the pixel detector circuit is confined in a unit pixel (diode sensor) to achieve 100 % fill factor. As a first phase of the design, an array of 8 pixels and 4 passive diodes have been designed and measured experimentally. The entire analog circuitry including passive diodes is implemented in a single chip. This chip has been tested experimentally with 70 V voltage capability, to evaluate its suitability. The sensor on a 125 Ωcm resistivity substrate has been characterized in the laboratory. The CMOS sensor realizes a depleted region of several tens of micrometer. The characterization shows a uniform breakdown at 70 V before irradiation and an approximate capacitance of 80 fF at 50 V of reverse bias voltage. The response to ionizing radiation is tested using radioactive sources and an X-ray tube.

  11. Polycrystalline Mercuric Iodide Films on CMOS Readout Arrays

    PubMed Central

    Hartsough, Neal E.; Iwanczyk, Jan S.; Nygard, Einar; Malakhov, Nail; Barber, William C.; Gandhi, Thulasidharan

    2009-01-01

    We have created high-resolution x-ray imaging devices using polycrystalline mercuric iodide (HgI2) films grown directly onto CMOS readout chips using a thermal vapor transport process. Images from prototype 400×400 pixel HgI2-coated CMOS readout chips are presented, where the pixel grid is 30 μm × 30 μm. The devices exhibited sensitivity of 6.2 μC/Rcm2 with corresponding dark current of ∼2.7 nA/cm2, and a 80 μm FWHM planar image response to a 50 μm slit aperture. X-ray CT images demonstrate a point spread function sufficient to obtain a 50 μm spatial resolution in reconstructed CT images at a substantially reduced dose compared to phosphor-coated readouts. The use of CMOS technology allows for small pixels (30 μm), fast readout speeds (8 fps for a 3200×3200 pixel array), and future design flexibility due to the use of well-developed fabrication processes. PMID:20161098

  12. How Many Pixels Does It Take to Make a Good 4"×6" Print? Pixel Count Wars Revisited

    NASA Astrophysics Data System (ADS)

    Kriss, Michael A.

    Digital still cameras emerged following the introduction of the Sony Mavica analog prototype camera in 1981. These early cameras produced poor image quality and did not challenge film cameras for overall quality. By 1995 digital still cameras in expensive SLR formats had 6 mega-pixels and produced high quality images (with significant image processing). In 2005 significant improvement in image quality was apparent and lower prices for digital still cameras (DSCs) started a rapid decline in film usage and film camera sells. By 2010 film usage was mostly limited to professionals and the motion picture industry. The rise of DSCs was marked by a “pixel war” where the driving feature of the cameras was the pixel count where even moderate cost, ˜120, DSCs would have 14 mega-pixels. The improvement of CMOS technology pushed this trend of lower prices and higher pixel counts. Only the single lens reflex cameras had large sensors and large pixels. The drive for smaller pixels hurt the quality aspects of the final image (sharpness, noise, speed, and exposure latitude). Only today are camera manufactures starting to reverse their course and producing DSCs with larger sensors and pixels. This paper will explore why larger pixels and sensors are key to the future of DSCs.

  13. A 2.2M CMOS image sensor for high-speed machine vision applications

    NASA Astrophysics Data System (ADS)

    Wang, Xinyang; Bogaerts, Jan; Vanhorebeek, Guido; Ruythoren, Koen; Ceulemans, Bart; Lepage, Gérald; Willems, Pieter; Meynants, Guy

    2010-01-01

    This paper describes a 2.2 Megapixel CMOS image sensor made in 0.18 μm CMOS process for high-speed machine vision applications. The sensor runs at 340 fps with digital output using 16 LVDS channels at 480MHz. The pixel array counts 2048x1088 pixels with a 5.5um pitch. The unique pixel architecture supports a true correlated double sampling, thus yields a noise level as low as 13 e- and a pixel parasitic light sensitivity (PLS) of 1/60 000. The sensitivity of the sensor is measured to be 4.64 Vlux.s and the pixel full well charge is 18k e-.

  14. Amorphous In–Ga–Zn–O thin-film transistor active pixel sensor x-ray imager for digital breast tomosynthesis

    SciTech Connect

    Zhao, Chumin; Kanicki, Jerzy

    2014-09-15

    Purpose: The breast cancer detection rate for digital breast tomosynthesis (DBT) is limited by the x-ray image quality. The limiting Nyquist frequency for current DBT systems is around 5 lp/mm, while the fine image details contained in the high spatial frequency region (>5 lp/mm) are lost. Also today the tomosynthesis patient dose is high (0.67–3.52 mGy). To address current issues, in this paper, for the first time, a high-resolution low-dose organic photodetector/amorphous In–Ga–Zn–O thin-film transistor (a-IGZO TFT) active pixel sensor (APS) x-ray imager is proposed for next generation DBT systems. Methods: The indirect x-ray detector is based on a combination of a novel low-cost organic photodiode (OPD) and a cesium iodide-based (CsI:Tl) scintillator. The proposed APS x-ray imager overcomes the difficulty of weak signal detection, when small pixel size and low exposure conditions are used, by an on-pixel signal amplification with a significant charge gain. The electrical performance of a-IGZO TFT APS pixel circuit is investigated by SPICE simulation using modified Rensselaer Polytechnic Institute amorphous silicon (a-Si:H) TFT model. Finally, the noise, detective quantum efficiency (DQE), and resolvability of the complete system are modeled using the cascaded system formalism. Results: The result demonstrates that a large charge gain of 31–122 is achieved for the proposed high-mobility (5–20 cm{sup 2}/V s) amorphous metal-oxide TFT APS. The charge gain is sufficient to eliminate the TFT thermal noise, flicker noise as well as the external readout circuit noise. Moreover, the low TFT (<10{sup −13} A) and OPD (<10{sup −8} A/cm{sup 2}) leakage currents can further reduce the APS noise. Cascaded system analysis shows that the proposed APS imager with a 75 μm pixel pitch can effectively resolve the Nyquist frequency of 6.67 lp/mm, which can be further improved to ∼10 lp/mm if the pixel pitch is reduced to 50 μm. Moreover, the

  15. CMOS Imaging of Pin-Printed Xerogel-Based Luminescent Sensor Microarrays

    PubMed Central

    Yao, Lei; Yung, Ka Yi; Khan, Rifat; Chodavarapu, Vamsy P.; Bright, Frank V.

    2014-01-01

    We present the design and implementation of a luminescence-based miniaturized multisensor system using pin-printed xerogel materials which act as host media for chemical recognition elements. We developed a CMOS imager integrated circuit (IC) to image the luminescence response of the xerogel-based sensor array. The imager IC uses a 26 × 20 (520 elements) array of active pixel sensors and each active pixel includes a high-gain phototransistor to convert the detected optical signals into electrical currents. The imager includes a correlated double sampling circuit and pixel address/digital control circuit; the image data is read-out as coded serial signal. The sensor system uses a light-emitting diode (LED) to excite the target analyte responsive luminophores doped within discrete xerogel-based sensor elements. As a prototype, we developed a 4 × 4 (16 elements) array of oxygen (O2) sensors. Each group of 4 sensor elements in the array (arranged in a row) is designed to provide a different and specific sensitivity to the target gaseous O2 concentration. This property of multiple sensitivities is achieved by using a strategic mix of two oxygen sensitive luminophores ([Ru(dpp)3]2+ and ([Ru(bpy)3]2+) in each pin-printed xerogel sensor element. The CMOS imager consumes an average power of 8 mW operating at 1 kHz sampling frequency driven at 5 V. The developed prototype system demonstrates a low cost and miniaturized luminescence multisensor system. PMID:24489484

  16. On-chip polarizer on image sensor using advanced CMOS technology

    NASA Astrophysics Data System (ADS)

    Sasagawa, Kiyotaka; Wakama, Norimitsu; Noda, Toshihiko; Tokuda, Takashi; Kakiuchi, Kiyomi; Ohta, Jun

    2014-03-01

    The structures in advanced complementary metal-oxide-semiconductor (CMOS) integrated circuit technology are in the range of deep-submicron. It allows designing and integrating nano-photonic structures for the visible to near infrared region on a chip. In this work, we designed and fabricated an image sensor with on-pixel metal wire grid polarizers by using a 65-nm standard CMOS technology. It is known that the extinction ratio of a metal wire grid polarizer is increased with decrease in the grid pitch. With the metal wire layers of the 65-nm technology, the grid pitch sufficiently smaller than the wavelengths of visible light can be realized. The extinction ratio of approximately 20 dB has been successfully achieved at a wavelength of 750 nm. In the CMOS technologies, it is usual to include multiple metal layers. This feature is also useful to increase the extinction ratio of polarizers. We designed dual layer polarizers. Each layer partially reflects incident light. Thus, the layers form a cavity and its transmission spectrum depends on the layer position. The extinction ratio of 19.2 dB at 780 nm was achieved with the grid pitch greater than the single layer polarizer. The high extinction ratio is obtained only red to near infrared region because the fine metal layers of deepsubmicron standard CMOS process is usually composed of Cu. Thus, it should be applied for measurement or observation where wide spectrum is not required such as optical rotation measurement of optically active materials or electro-optic imaging of RF/THz wave.

  17. Monolithic CMOS imaging x-ray spectrometers

    NASA Astrophysics Data System (ADS)

    Kenter, Almus; Kraft, Ralph; Gauron, Thomas; Murray, Stephen S.

    2014-07-01

    The Smithsonian Astrophysical Observatory (SAO) in collaboration with SRI/Sarnoff is developing monolithic CMOS detectors optimized for x-ray astronomy. The goal of this multi-year program is to produce CMOS x-ray imaging spectrometers that are Fano noise limited over the 0.1-10keV energy band while incorporating the many benefits of CMOS technology. These benefits include: low power consumption, radiation "hardness", high levels of integration, and very high read rates. Small format test devices from a previous wafer fabrication run (2011-2012) have recently been back-thinned and tested for response below 1keV. These devices perform as expected in regards to dark current, read noise, spectral response and Quantum Efficiency (QE). We demonstrate that running these devices at rates ~> 1Mpix/second eliminates the need for cooling as shot noise from any dark current is greatly mitigated. The test devices were fabricated on 15μm, high resistivity custom (~30kΩ-cm) epitaxial silicon and have a 16 by 192 pixel format. They incorporate 16μm pitch, 6 Transistor Pinned Photo Diode (6TPPD) pixels which have ~40μV/electron sensitivity and a highly parallel analog CDS signal chain. Newer, improved, lower noise detectors have just been fabricated (October 2013). These new detectors are fabricated on 9μm epitaxial silicon and have a 1k by 1k format. They incorporate similar 16μm pitch, 6TPPD pixels but have ~ 50% higher sensitivity and much (3×) lower read noise. These new detectors have undergone preliminary testing for functionality in Front Illuminated (FI) form and are presently being prepared for back thinning and packaging. Monolithic CMOS devices such as these, would be ideal candidate detectors for the focal planes of Solar, planetary and other space-borne x-ray astronomy missions. The high through-put, low noise and excellent low energy response, provide high dynamic range and good time resolution; bright, time varying x-ray features could be temporally and

  18. PixelLearn

    NASA Technical Reports Server (NTRS)

    Mazzoni, Dominic; Wagstaff, Kiri; Bornstein, Benjamin; Tang, Nghia; Roden, Joseph

    2006-01-01

    PixelLearn is an integrated user-interface computer program for classifying pixels in scientific images. Heretofore, training a machine-learning algorithm to classify pixels in images has been tedious and difficult. PixelLearn provides a graphical user interface that makes it faster and more intuitive, leading to more interactive exploration of image data sets. PixelLearn also provides image-enhancement controls to make it easier to see subtle details in images. PixelLearn opens images or sets of images in a variety of common scientific file formats and enables the user to interact with several supervised or unsupervised machine-learning pixel-classifying algorithms while the user continues to browse through the images. The machinelearning algorithms in PixelLearn use advanced clustering and classification methods that enable accuracy much higher than is achievable by most other software previously available for this purpose. PixelLearn is written in portable C++ and runs natively on computers running Linux, Windows, or Mac OS X.

  19. e2v CCD and CMOS sensors and systems designed for astronomical applications

    NASA Astrophysics Data System (ADS)

    Jorden, Paul; Jerram, Paul; Jordan, Douglas; Pratlong, Jérôme; Robbins, Mark

    2016-08-01

    e2v continues to evolve its product range of sensors and systems, with CCD and CMOS sensors. We describe recent developments of high performance image sensors and precision system components. Several low noise backthinned CMOS sensors have been developed for scientific applications. CCDs have become larger whilst retaining very low noise and high quantum efficiency. Examples of sensors and sub-systems are presented including the recently completed 1.2 GigaPixel J-PAS cryogenic camera.

  20. Current progress on pixel level packaging for uncooled IRFPA

    NASA Astrophysics Data System (ADS)

    Dumont, G.; Rabaud, W.; Yon, J.-J.; Carle, L.; Goudon, V.; Vialle, C.; Becker, Sébastien; Hamelin, Antoine; Arnaud, A.

    2012-06-01

    Vacuum packaging is definitely a major cost driver for uncooled IRFPA and a technological breakthrough is still expected to comply with the very low cost infrared camera market. To address this key issue, CEA-LETI is developing a Pixel Level Packaging (PLP) technology which basically consists in capping each pixel under vacuum in the direct continuation of the wafer level bolometer process. Previous CEA-LETI works have yet shown the feasibility of PLP based microbolometers that exhibit the required thermal insulation and vacuum achievement. CEA-LETI is still pushing the technology which has been now applied for the first time on a CMOS readout circuit. The paper will report on the recent progress obtained on PLP technology with particular emphasis on the optical efficiency of the PLP arrangement compared to the traditional microbolometer packaging. Results including optical performances, aging studies and compatibility with CMOS readout circuit are extensively presented.

  1. Pixel detector system development at Diamond Light Source

    NASA Astrophysics Data System (ADS)

    Marchal, J.; Horswell, I.; Gimenez, E. N.; Tartoni, N.

    2010-10-01

    Hybrid pixel detectors consisting of an array of silicon photodiodes bump-bonded to CMOS read-out chips provide high signal-to-noise ratio and high dynamic range compared to CCD-based detectors and Image Plates. These detector features are important for SAXS experiments where a wide range of intensities are present in the images. For time resolved SAXS experiments, high frame rates are compulsory. The latest CMOS read-out chip developed by the MEDIPIX collaboration provides high frame rate and continuous acquisition mode. A read-out system for an array of MEDIPIX3 sensors is under development at Diamond Light Source. This system will support a full resolution frame rate of 1 kHz at a pixel counter depth of 12-bit and a frame rate of 30 kHz at a counter depth of 1 bit. Details concerning system design and MEDIPIX sensors characterization are presented.

  2. FPIX2: A radiation-hard pixel readout chip for BTeV

    SciTech Connect

    David C. Christian et al.

    2000-12-11

    A radiation-hard pixel readout chip, FPIX2, is being developed at Fermilab for the recently approved BTeV experiment. Although designed for BTeV, this chip should also be appropriate for use by CDF and DZero. A short review of this development effort is presented. Particular attention is given to the circuit redesign which was made necessary by the decision to implement FPIX2 using a standard deep-submicron CMOS process rather than an explicitly radiation-hard CMOS technology, as originally planned. The results of initial tests of prototype 0.25{micro} CMOS devices are presented, as are plans for the balance of the development effort.

  3. Josephson-CMOS Hybrid Memories

    DTIC Science & Technology

    2007-04-25

    Liu, X . Meng, S. R. Whiteley, and T. Van Duzer, “Characterization of 4 K CMOS devices and circuits for hybrid Josephson- CMOS systems,” IEEE Trans. on...Josephson- CMOS hybrid memories Qingguo Liu Electrical Engineering and Computer Sciences University of California at Berkeley Technical Report No. UCB...to 00-00-2007 4. TITLE AND SUBTITLE Josephson- CMOS hybrid memories 5a. CONTRACT NUMBER 5b. GRANT NUMBER 5c. PROGRAM ELEMENT NUMBER 6. AUTHOR(S

  4. A back-illuminated megapixel CMOS image sensor

    NASA Technical Reports Server (NTRS)

    Pain, Bedabrata; Cunningham, Thomas; Nikzad, Shouleh; Hoenk, Michael; Jones, Todd; Wrigley, Chris; Hancock, Bruce

    2005-01-01

    In this paper, we present the test and characterization results for a back-illuminated megapixel CMOS imager. The imager pixel consists of a standard junction photodiode coupled to a three transistor-per-pixel switched source-follower readout [1]. The imager also consists of integrated timing and control and bias generation circuits, and provides analog output. The analog column-scan circuits were implemented in such a way that the imager could be configured to run in off-chip correlated double-sampling (CDS) mode. The imager was originally designed for normal front-illuminated operation, and was fabricated in a commercially available 0.5 pn triple-metal CMOS-imager compatible process. For backside illumination, the imager was thinned by etching away the substrate was etched away in a post-fabrication processing step.

  5. Design of a 3D-IC multi-resolution digital pixel sensor

    NASA Astrophysics Data System (ADS)

    Brochard, N.; Nebhen, J.; Dubois, J.; Ginhac, D.

    2016-04-01

    This paper presents a digital pixel sensor (DPS) integrating a sigma-delta analog-to-digital converter (ADC) at pixel level. The digital pixel includes a photodiode, a delta-sigma modulation and a digital decimation filter. It features adaptive dynamic range and multiple resolutions (up to 10-bit) with a high linearity. A specific row decoder and column decoder are also designed to permit to read a specific pixel chosen in the matrix and its neighborhood of 4 x 4. Finally, a complete design with the CMOS 130 nm 3D-IC FaStack Tezzaron technology is also described, revealing a high fill-factor of about 80%.

  6. Spectrometer with CMOS demodulation of fiber optic Bragg grating sensors

    NASA Astrophysics Data System (ADS)

    Christiansen, Martin Brokner

    A CMOS imager based spectrometer is developed to interrogate a network containing a large number of Bragg grating sensors. The spectrometer uses a Prism-Grating- Prism (PGP) to spectrally separate serially multiplexed Bragg reflections on a single fiber. As a result, each Bragg grating produces a discrete spot on the CMOS imager that shifts horizontally as the Bragg grating experiences changes in strain or temperature. The reflected wavelength of the spot can be determined by finding the center of the spot produced. The use of a randomly addressable CMOS imager enables a flexible sampling rate. Some fibers can be interrogated at a high sampling rate while others can be interrogated at a low sampling rate. However, the use of a CMOS imager leads to several unique problems in terms of signal processing. These include a logarithmic pixel response, a low signal-to-noise ratio, a long pixel time constant, and software issues. The expected capabilities of the CMOS imager based spectrometer are determined with a theoretical model. The theoretical model tests three algorithms for determining the center of the spot: single row centroid, single row parabolic fit, and entire spot centroid. The theoretical results are compared to laboratory test data and field test data. The CMOS based spectrometer is capable of interrogating many optical fibers, and in the configuration tested, the fiber bundle consisted of 23 fibers. Using this system, a single fiber can be interrogated from 778 nm to 852 nm at 2100 Hz or multiple fibers can be interrogated over the same wavelength so that the total number of fiber interrogations is up to 2100 per second. The reflected Bragg wavelength can be determined within +/-3pm, corresponding to a +/-3μɛ uncertainty.

  7. A functional hybrid memristor crossbar-array/CMOS system for data storage and neuromorphic applications.

    PubMed

    Kim, Kuk-Hwan; Gaba, Siddharth; Wheeler, Dana; Cruz-Albrecht, Jose M; Hussain, Tahir; Srinivasa, Narayan; Lu, Wei

    2012-01-11

    Crossbar arrays based on two-terminal resistive switches have been proposed as a leading candidate for future memory and logic applications. Here we demonstrate a high-density, fully operational hybrid crossbar/CMOS system composed of a transistor- and diode-less memristor crossbar array vertically integrated on top of a CMOS chip by taking advantage of the intrinsic nonlinear characteristics of the memristor element. The hybrid crossbar/CMOS system can reliably store complex binary and multilevel 1600 pixel bitmap images using a new programming scheme.

  8. Evaluation of sCMOS cameras for detection and localization of single Cy5 molecules.

    PubMed

    Saurabh, Saumya; Maji, Suvrajit; Bruchez, Marcel P

    2012-03-26

    The ability to detect single molecules over the electronic noise requires high performance detector systems. Electron Multiplying Charge-Coupled Device (EMCCD) cameras have been employed successfully to image single molecules. Recently, scientific Complementary Metal Oxide Semiconductor (sCMOS) based cameras have been introduced with very low read noise at faster read out rates, smaller pixel sizes and a lower price compared to EMCCD cameras. In this study, we have compared the two technologies using two EMCCD and three sCMOS cameras to detect single Cy5 molecules. Our findings indicate that the sCMOS cameras perform similar to EMCCD cameras for detecting and localizing single Cy5 molecules.

  9. Investigation of HV/HR-CMOS technology for the ATLAS Phase-II Strip Tracker Upgrade

    NASA Astrophysics Data System (ADS)

    Fadeyev, V.; Galloway, Z.; Grabas, H.; Grillo, A. A.; Liang, Z.; Martinez-Mckinney, F.; Seiden, A.; Volk, J.; Affolder, A.; Buckland, M.; Meng, L.; Arndt, K.; Bortoletto, D.; Huffman, T.; John, J.; McMahon, S.; Nickerson, R.; Phillips, P.; Plackett, R.; Shipsey, I.; Vigani, L.; Bates, R.; Blue, A.; Buttar, C.; Kanisauskas, K.; Maneuski, D.; Benoit, M.; Di Bello, F.; Caragiulo, P.; Dragone, A.; Grenier, P.; Kenney, C.; Rubbo, F.; Segal, J.; Su, D.; Tamma, C.; Das, D.; Dopke, J.; Turchetta, R.; Wilson, F.; Worm, S.; Ehrler, F.; Peric, I.; Gregor, I. M.; Stanitzki, M.; Hoeferkamp, M.; Seidel, S.; Hommels, L. B. A.; Kramberger, G.; Mandić, I.; Mikuž, M.; Muenstermann, D.; Wang, R.; Zhang, J.; Warren, M.; Song, W.; Xiu, Q.; Zhu, H.

    2016-09-01

    ATLAS has formed strip CMOS project to study the use of CMOS MAPS devices as silicon strip sensors for the Phase-II Strip Tracker Upgrade. This choice of sensors promises several advantages over the conventional baseline design, such as better resolution, less material in the tracking volume, and faster construction speed. At the same time, many design features of the sensors are driven by the requirement of minimizing the impact on the rest of the detector. Hence the target devices feature long pixels which are grouped to form a virtual strip with binary-encoded z position. The key performance aspects are radiation hardness compatibility with HL-LHC environment, as well as extraction of the full hit position with full-reticle readout architecture. To date, several test chips have been submitted using two different CMOS technologies. The AMS 350 nm is a high voltage CMOS process (HV-CMOS), that features the sensor bias of up to 120 V. The TowerJazz 180 nm high resistivity CMOS process (HR-CMOS) uses a high resistivity epitaxial layer to provide the depletion region on top of the substrate. We have evaluated passive pixel performance, and charge collection projections. The results strongly support the radiation tolerance of these devices to radiation dose of the HL-LHC in the strip tracker region. We also describe design features for the next chip submission that are motivated by our technology evaluation.

  10. Ion traps fabricated in a CMOS foundry

    SciTech Connect

    Mehta, K. K.; Ram, R. J.; Eltony, A. M.; Chuang, I. L.; Bruzewicz, C. D.; Sage, J. M. Chiaverini, J.

    2014-07-28

    We demonstrate trapping in a surface-electrode ion trap fabricated in a 90-nm CMOS (complementary metal-oxide-semiconductor) foundry process utilizing the top metal layer of the process for the trap electrodes. The process includes doped active regions and metal interconnect layers, allowing for co-fabrication of standard CMOS circuitry as well as devices for optical control and measurement. With one of the interconnect layers defining a ground plane between the trap electrode layer and the p-type doped silicon substrate, ion loading is robust and trapping is stable. We measure a motional heating rate comparable to those seen in surface-electrode traps of similar size. This demonstration of scalable quantum computing hardware utilizing a commercial CMOS process opens the door to integration and co-fabrication of electronics and photonics for large-scale quantum processing in trapped-ion arrays.

  11. Development of a 55 μm pitch 8 inch CMOS image sensor for the high resolution NDT application

    NASA Astrophysics Data System (ADS)

    Kim, M. S.; Kim, G.; Cho, G.; Kim, D.

    2016-11-01

    A CMOS image sensor (CIS) with a large area for the high resolution X-ray imaging was designed. The sensor has an active area of 125 × 125 mm2 comprised with 2304 × 2304 pixels and a pixel size of 55 × 55 μm2. First batch samples were fabricated by using an 8 inch silicon CMOS image sensor process with a stitching method. In order to evaluate the performance of the first batch samples, the electro-optical test and the X-ray test after coupling with an image intensifier screen were performed. The primary results showed that the performance of the manufactured sensors was limited by a large stray capacitance from the long path length between the analog multiplexer on the chip and the bank ADC on the data acquisition board. The measured speed and dynamic range were limited up to 12 frame per sec and 55 dB respectively, but other parameters such as the MTF, NNPS and DQE showed a good result as designed. Based on this study, the new X-ray CIS with ~ 50 μm pitch and ~ 150 cm2 active area are going to be designed for the high resolution X-ray NDT equipment for semiconductor and PCB inspections etc.

  12. Sub-pixel mapping of water boundaries using pixel swapping algorithm (case study: Tagliamento River, Italy)

    NASA Astrophysics Data System (ADS)

    Niroumand-Jadidi, Milad; Vitti, Alfonso

    2015-10-01

    Taking the advantages of remotely sensed data for mapping and monitoring of water boundaries is of particular importance in many different management and conservation activities. Imagery data are classified using automatic techniques to produce maps entering the water bodies' analysis chain in several and different points. Very commonly, medium or coarse spatial resolution imagery is used in studies of large water bodies. Data of this kind is affected by the presence of mixed pixels leading to very outstanding problems, in particular when dealing with boundary pixels. A considerable amount of uncertainty inescapably occurs when conventional hard classifiers (e.g., maximum likelihood) are applied on mixed pixels. In this study, Linear Spectral Mixture Model (LSMM) is used to estimate the proportion of water in boundary pixels. Firstly by applying an unsupervised clustering, the water body is identified approximately and a buffer area considered ensuring the selection of entire boundary pixels. Then LSMM is applied on this buffer region to estimate the fractional maps. However, resultant output of LSMM does not provide a sub-pixel map corresponding to water abundances. To tackle with this problem, Pixel Swapping (PS) algorithm is used to allocate sub-pixels within mixed pixels in such a way to maximize the spatial proximity of sub-pixels and pixels in the neighborhood. The water area of two segments of Tagliamento River (Italy) are mapped in sub-pixel resolution (10m) using a 30m Landsat image. To evaluate the proficiency of the proposed approach for sub-pixel boundary mapping, the image is also classified using a conventional hard classifier. A high resolution image of the same area is also classified and used as a reference for accuracy assessment. According to the results, sub-pixel map shows in average about 8 percent higher overall accuracy than hard classification and fits very well in the boundaries with the reference map.

  13. SNR improvement for hyperspectral application using frame and pixel binning

    NASA Astrophysics Data System (ADS)

    Rehman, Sami Ur; Kumar, Ankush; Banerjee, Arup

    2016-05-01

    Hyperspectral imaging spectrometer systems are increasingly being used in the field of remote sensing for variety of civilian and military applications. The ability of such instruments in discriminating finer spectral features along with improved spatial and radiometric performance have made such instruments a powerful tool in the field of remote sensing. Design and development of spaceborne hyper spectral imaging spectrometers poses lot of technological challenges in terms of optics, dispersion element, detectors, electronics and mechanical systems. The main factors that define the type of detectors are the spectral region, SNR, dynamic range, pixel size, number of pixels, frame rate, operating temperature etc. Detectors with higher quantum efficiency and higher well depth are the preferred choice for such applications. CCD based Si detectors serves the requirement of high well depth for VNIR band spectrometers but suffers from smear. Smear can be controlled by using CMOS detectors. Si CMOS detectors with large format arrays are available. These detectors generally have smaller pitch and low well depth. Binning technique can be used with available CMOS detectors to meet the large swath, higher resolution and high SNR requirements. Availability of larger dwell time of satellite can be used to bin multiple frames to increase the signal collection even with lesser well depth detectors and ultimately increase the SNR. Lab measurements reveal that SNR improvement by frame binning is more in comparison to pixel binning. Effect of pixel binning as compared to the frame binning will be discussed and degradation of SNR as compared to theoretical value for pixel binning will be analyzed.

  14. Figures of merit for CMOS SPADs and arrays

    NASA Astrophysics Data System (ADS)

    Bronzi, D.; Villa, F.; Bellisai, S.; Tisa, S.; Ripamonti, G.; Tosi, A.

    2013-05-01

    SPADs (Single Photon Avalanche Diodes) are emerging as most suitable photodetectors for both single-photon counting (Fluorescence Correlation Spectroscopy, Lock-in 3D Ranging) and single-photon timing (Lidar, Fluorescence Lifetime Imaging, Diffuse Optical Imaging) applications. Different complementary metal-oxide semiconductor (CMOS) implementations have been reported in literature. We present some figure of merit able to summarize the typical SPAD performances (i.e. Dark Counting Rate, Photo Detection Efficiency, afterpulsing probability, hold-off time, timing jitter) and to identify a proper metric for SPAD comparison, both as single detectors and also as imaging arrays. The goal is to define a practical framework within which it is possible to rank detectors based on their performances in specific experimental conditions, for either photon-counting or photon-timing applications. Furthermore we review the performances of some CMOS and custom-made SPADs. Results show that CMOS SPADs performances improve as the technology scales down; moreover, miniaturization of SPADs and new solutions adopted to counteract issues related with the SPAD design (electric field uniformity, premature edge breakdown, tunneling effects, defect-rich STI interface) along with advances in standard CMOS processes led to a general improvement in all fabricated photodetectors; therefore, CMOS SPADs can be suitable for very dense and cost-effective many-pixels imagers with high performances.

  15. Implantable CMOS Biomedical Devices

    PubMed Central

    Ohta, Jun; Tokuda, Takashi; Sasagawa, Kiyotaka; Noda, Toshihiko

    2009-01-01

    The results of recent research on our implantable CMOS biomedical devices are reviewed. Topics include retinal prosthesis devices and deep-brain implantation devices for small animals. Fundamental device structures and characteristics as well as in vivo experiments are presented. PMID:22291554

  16. On noise in time-delay integration CMOS image sensors

    NASA Astrophysics Data System (ADS)

    Levski, Deyan; Choubey, Bhaskar

    2016-05-01

    Time delay integration sensors are of increasing interest in CMOS processes owing to their low cost, power and ability to integrate with other circuit readout blocks. This paper presents an analysis of the noise contributors in current day CMOS Time-Delay-Integration image sensors with various readout architectures. An analysis of charge versus voltage domain readout modes is presented, followed by a noise classification of the existing Analog Accumulator Readout (AAR) and Digital Accumulator Readout (DAR) schemes for TDI imaging. The analysis and classification of existing readout schemes include, pipelined charge transfer, buffered direct injection, voltage as well as current-mode analog accumulators and all-digital accumulator techniques. Time-Delay-Integration imaging modes in CMOS processes typically use an N-number of readout steps, equivalent to the number of TDI pixel stages. In CMOS TDI sensors, where voltage domain readout is used, the requirements over speed and noise of the ADC readout chain are increased due to accumulation of the dominant voltage readout and ADC noise with every stage N. Until this day, the latter is the primary reason for a leap-back of CMOS TDI sensors as compared to their CCD counterparts. Moreover, most commercial CMOS TDI implementations are still based on a charge-domain readout, mimicking a CCD-like operation mode. Thus, having a good understanding of each noise contributor in the signal chain, as well as its magnitude in different readout architectures, is vital for the design of future generation low-noise CMOS TDI image sensors based on a voltage domain readout. This paper gives a quantitative classification of all major noise sources for all popular implementations in the literature.

  17. Combined reactor neutron beam and {sup 60}Co γ-ray radiation effects on CMOS APS image sensors

    SciTech Connect

    Wang, Zujun Chen, Wei; Sheng, Jiangkun; Liu, Yan; Xiao, Zhigang; Huang, Shaoyan; Liu, Minbo

    2015-02-15

    The combined reactor neutron beam and {sup 60}Co γ-ray radiation effects on complementary metal-oxide semiconductor (CMOS) active pixel sensors (APS) have been discussed and some new experimental phenomena are presented. The samples are manufactured in the standard 0.35-μm CMOS technology. Two samples were first exposed to {sup 60}Co γ-rays up to the total ionizing dose (TID) level of 200 krad(Si) at the dose rates of 50.0 and 0.2 rad(Si)/s, and then exposed to neutron fluence up to 1 × 10{sup 11} n/cm{sup 2} (1-MeV equivalent neutron fluence). One sample was first exposed to neutron fluence up to 1 × 10{sup 11} n/cm{sup 2} (1-MeV equivalent neutron fluence), and then exposed to {sup 60}Co γ-rays up to the TID level of 200 krad(Si) at the dose rate of 0.2 rad(Si)/s. The mean dark signal (K{sub D}), the dark signal non-uniformity (DSNU), and the noise (V{sub N}) versus the total dose and neutron fluence has been investigated. The degradation mechanisms of CMOS APS image sensors have been analyzed, especially for the interaction induced by neutron displacement damage and TID damage.

  18. High resolution, high bandwidth global shutter CMOS area scan sensors

    NASA Astrophysics Data System (ADS)

    Faramarzpour, Naser; Sonder, Matthias; Li, Binqiao

    2013-10-01

    Global shuttering, sometimes also known as electronic shuttering, enables the use of CMOS sensors in a vast range of applications. Teledyne DALSA Global shutter sensors are able to integrate light synchronously across millions of pixels with microsecond accuracy. Teledyne DALSA offers 5 transistor global shutter pixels in variety of resolutions, pitches and noise and full-well combinations. One of the recent generations of these pixels is implemented in 12 mega pixel area scan device at 6 um pitch and that images up to 70 frames per second with 58 dB dynamic range. These square pixels include microlens and optional color filters. These sensors also offer exposure control, anti-blooming and high dynamic range operation by introduction of a drain and a PPD reset gate to the pixel. The state of the art sense node design of Teledyne DALSA's 5T pixel offers exceptional shutter rejection ratio. The architecture is consistent with the requirements to use stitching to achieve very large area scan devices. Parallel or serial digital output is provided on these sensors using on-chip, column-wise analog to digital converters. Flexible ADC bit depth combined with windowing (adjustable region of interest, ROI) allows these sensors to run with variety of resolution/bandwidth combinations. The low power, state of the art LVDS I/O technology allows for overall power consumptions of less than 2W at full performance conditions.

  19. High density pixel array

    NASA Technical Reports Server (NTRS)

    Wiener-Avnear, Eliezer (Inventor); McFall, James Earl (Inventor)

    2004-01-01

    A pixel array device is fabricated by a laser micro-milling method under strict process control conditions. The device has an array of pixels bonded together with an adhesive filling the grooves between adjacent pixels. The array is fabricated by moving a substrate relative to a laser beam of predetermined intensity at a controlled, constant velocity along a predetermined path defining a set of grooves between adjacent pixels so that a predetermined laser flux per unit area is applied to the material, and repeating the movement for a plurality of passes of the laser beam until the grooves are ablated to a desired depth. The substrate is of an ultrasonic transducer material in one example for fabrication of a 2D ultrasonic phase array transducer. A substrate of phosphor material is used to fabricate an X-ray focal plane array detector.

  20. Monolithic pixel detectors with 0.2 μm FD-SOI pixel process technology

    NASA Astrophysics Data System (ADS)

    Miyoshi, Toshinobu; Arai, Yasuo; Chiba, Tadashi; Fujita, Yowichi; Hara, Kazuhiko; Honda, Shunsuke; Igarashi, Yasushi; Ikegami, Yoichi; Ikemoto, Yukiko; Kohriki, Takashi; Ohno, Morifumi; Ono, Yoshimasa; Shinoda, Naoyuki; Takeda, Ayaki; Tauchi, Kazuya; Tsuboyama, Toru; Tadokoro, Hirofumi; Unno, Yoshinobu; Yanagihara, Masashi

    2013-12-01

    Truly monolithic pixel detectors were fabricated with 0.2 μm SOI pixel process technology by collaborating with LAPIS Semiconductor Co., Ltd. for particle tracking experiment, X-ray imaging and medical applications. CMOS circuits were fabricated on a thin SOI layer and connected to diodes formed in the silicon handle wafer through the buried oxide layer. We can choose the handle wafer and therefore high-resistivity silicon is also available. Double SOI (D-SOI) wafers fabricated from Czochralski (CZ)-SOI wafers were newly obtained and successfully processed in 2012. The top SOI layers are used as electric circuits and the middle SOI layers used as a shield layer against the back-gate effect and cross-talk between sensors and CMOS circuits, and as an electrode to compensate for the total ionizing dose (TID) effect. In 2012, we developed two SOI detectors, INTPIX5 and INTPIX3g. A spatial resolution study was done with INTPIX5 and it showed excellent performance. The TID effect study with D-SOI INTPIX3g detectors was done and we confirmed improvement of TID tolerance in D-SOI sensors.

  1. Fibre-optic coupling to high-resolution CCD and CMOS image sensors

    NASA Astrophysics Data System (ADS)

    van Silfhout, R. G.; Kachatkou, A. S.

    2008-12-01

    We describe a simple method of gluing fibre-optic faceplates to complementary metal oxide semiconductor (CMOS) active pixel and charge coupled device (CCD) image sensors and report on their performance. Cross-sectional cuts reveal that the bonding layer has a thickness close to the diameter of the individual fibres and is uniform over the whole sensor area. Our method requires no special tools or alignment equipment and gives reproducible and high-quality results. The method maintains a uniform bond layer thickness even if sensor dies are mounted at slight angles with their package. These fibre-coupled sensors are of particular interest to X-ray imaging applications but also provide a solution for compact optical imaging systems.

  2. Focal-plane CMOS wavelet feature extraction for real-time pattern recognition

    NASA Astrophysics Data System (ADS)

    Olyaei, Ashkan; Genov, Roman

    2005-09-01

    Kernel-based pattern recognition paradigms such as support vector machines (SVM) require computationally intensive feature extraction methods for high-performance real-time object detection in video. The CMOS sensory parallel processor architecture presented here computes delta-sigma (ΔΣ)-modulated Haar wavelet transform on the focal plane in real time. The active pixel array is integrated with a bank of column-parallel first-order incremental oversampling analog-to-digital converters (ADCs). Each ADC performs distributed spatial focal-plane sampling and concurrent weighted average quantization. The architecture is benchmarked in SVM face detection on the MIT CBCL data set. At 90% detection rate, first-level Haar wavelet feature extraction yields a 7.9% reduction in the number of false positives when compared to classification with no feature extraction. The architecture yields 1.4 GMACS simulated computational throughput at SVGA imager resolution at 8-bit output depth.

  3. A 75-ps Gated CMOS Image Sensor with Low Parasitic Light Sensitivity

    PubMed Central

    Zhang, Fan; Niu, Hanben

    2016-01-01

    In this study, a 40 × 48 pixel global shutter complementary metal-oxide-semiconductor (CMOS) image sensor with an adjustable shutter time as low as 75 ps was implemented using a 0.5-μm mixed-signal CMOS process. The implementation consisted of a continuous contact ring around each p+/n-well photodiode in the pixel array in order to apply sufficient light shielding. The parasitic light sensitivity of the in-pixel storage node was measured to be 1/8.5 × 107 when illuminated by a 405-nm diode laser and 1/1.4 × 104 when illuminated by a 650-nm diode laser. The pixel pitch was 24 μm, the size of the square p+/n-well photodiode in each pixel was 7 μm per side, the measured random readout noise was 217 e− rms, and the measured dynamic range of the pixel of the designed chip was 5500:1. The type of gated CMOS image sensor (CIS) that is proposed here can be used in ultra-fast framing cameras to observe non-repeatable fast-evolving phenomena. PMID:27367699

  4. A 75-ps Gated CMOS Image Sensor with Low Parasitic Light Sensitivity.

    PubMed

    Zhang, Fan; Niu, Hanben

    2016-06-29

    In this study, a 40 × 48 pixel global shutter complementary metal-oxide-semiconductor (CMOS) image sensor with an adjustable shutter time as low as 75 ps was implemented using a 0.5-μm mixed-signal CMOS process. The implementation consisted of a continuous contact ring around each p+/n-well photodiode in the pixel array in order to apply sufficient light shielding. The parasitic light sensitivity of the in-pixel storage node was measured to be 1/8.5 × 10⁷ when illuminated by a 405-nm diode laser and 1/1.4 × 10⁴ when illuminated by a 650-nm diode laser. The pixel pitch was 24 μm, the size of the square p+/n-well photodiode in each pixel was 7 μm per side, the measured random readout noise was 217 e(-) rms, and the measured dynamic range of the pixel of the designed chip was 5500:1. The type of gated CMOS image sensor (CIS) that is proposed here can be used in ultra-fast framing cameras to observe non-repeatable fast-evolving phenomena.

  5. A novel wafer-scale CMOS APS X-ray detector for breast cancer diagnosis using X-ray diffraction studies

    NASA Astrophysics Data System (ADS)

    Konstantinidis, A.; Zheng, Y.; Philip, D.; Vinnicombe, S.; Speller, R.

    2012-12-01

    The current study uses a novel large area (12.8 cm × 13.1 cm) complementary metal-oxide-semiconductor (CMOS) active pixel sensor (APS) X-ray detector, named Dynamic range Adjustable for Medical Imaging Technology (DynAMITe), for breast cancer diagnosis. The detector consists of two geometrically superimposed grids: a) 2560 × 2624 fine-pitch grid of pixels (50 μm pitch), named Sub-Pixels (SP camera), for low intrinsic noise and high spatial resolution and b) 1280 × 1312 large-pitch grid of pixels (100 μm pitch), named Pixels (P camera), for high dynamic range. X-ray performance characterization measurements show that the detective quantum efficiency (DQE) of the SP camera is in the range 0.7-0.75 at low spatial frequencies using a tungsten (W) anode X-ray source at 28 kV. Hence, the detector is suitable for mammography. Furthermore, we used the SP camera to combine mammograms with angle dispersive X-ray diffraction (ADXRD) measurements in order to apply the X-ray biopsy concept in one examination. The results show that ADXRD technique indicates the presence of cancer in suspicious areas on the mammogram. Hence, it could be used to determine the region affected by cancer and assist in planning surgery. This study is the proof of concept that mammography and ADXRD can be combined in one examination.

  6. Acousto-optic imaging with a smart-pixels sensor

    NASA Astrophysics Data System (ADS)

    Barjean, K.; Contreras, K.; Laudereau, J.-B.; Tinet, E.; Ettori, D.; Ramaz, F.; Tualle, J.-M.

    2015-03-01

    Acousto-optic imaging (AOI) is an emerging technique in the field of biomedical optics which combines the optical contrast allowed by diffuse optical tomography with the resolution of ultrasound (US) imaging. In this work we report the implementation, for that purpose, of a CMOS smart-pixels sensor dedicated to the real-time analysis of speckle patterns. We implemented a highly sensitive lock-in detection in each pixel in order to extract the tagged photons after an appropriate in-pixel post-processing. With this system we can acquire images in scattering samples with a spatial resolution in the 2mm range, with an integration time compatible with the dynamic of living biological tissue.

  7. Performance of the INTPIX6 SOI pixel detector

    NASA Astrophysics Data System (ADS)

    Arai, Y.; Bugiel, Sz.; Dasgupta, R.; Idzik, M.; Kapusta, P.; Kucewicz, W.; Miyoshi, T.; Turala, M.

    2017-01-01

    Characterization of the monolithic pixel detector INPTIX6, designed at KEK and fabricated in Lapis 0.2 μ m Fully-Depleted, Low-Leakage Silicon-On-Insulator (SOI) CMOS technology, was performed. The INTPIX6 comprises a large area of 1408 × 896 integrating type squared pixels of 12 micron pitch. In this work the performance and measurement results of the prototypes produced on lower resistivity Czochralski type (CZ-n) and high resistivity floating zone (FZ-n) sensor wafers are presented. Using 241Am radioactive source the noise of INTPIX6 was measured, showing the ENC (Equivalent Noise Charge) of about 70 e-. The resolution calculated from the FWHM of the Iron-55 X-ray peak was about 100 e-. The radiation hardness of the SOI pixel detector was also investigated. The CZ-n type INTPIX6 received a dose of 60 krad and its performance has been continuously monitored during the irradiation.

  8. HEXITEC ASIC—a pixellated readout chip for CZT detectors

    NASA Astrophysics Data System (ADS)

    Jones, Lawrence; Seller, Paul; Wilson, Matthew; Hardie, Alec

    2009-06-01

    HEXITEC is a collaborative project with the aim of developing a new range of detectors for high-energy X-ray imaging. High-energy X-ray imaging has major advantages over current lower energy imaging for the life and physical sciences, including improved phase-contrast images on larger, higher density samples and with lower accumulated doses. However, at these energies conventional silicon-based devices cannot be used, hence, the requirement for a new range of high Z-detector materials. Underpinning the HEXITEC programme are the development of a pixellated Cadmium Zinc Telluride (CZT) detectors and a pixellated readout ASIC which will be bump-bonded to the detector. The HEXITEC ASIC is required to have low noise (20 electrons rms) and tolerate detector leakage currents. A prototype 20×20 pixel ASIC has been developed and manufactured on a standard 0.35 μm CMOS process.

  9. Time-resolved Emission from Bright Hot Pixels of an Active Region Observed in the EUV Band with SDO/AIA and Multi-stranded Loop Modeling

    NASA Astrophysics Data System (ADS)

    Tajfirouze, E.; Reale, F.; Petralia, A.; Testa, P.

    2016-01-01

    Evidence of small amounts of very hot plasma has been found in active regions and might be an indication of impulsive heating released at spatial scales smaller than the cross-section of a single loop. We investigate the heating and substructure of coronal loops in the core of one such active region by analyzing the light curves in the smallest resolution elements of solar observations in two EUV channels (94 and 335 Å) from the Atmospheric Imaging Assembly on board the Solar Dynamics Observatory. We model the evolution of a bundle of strands heated by a storm of nanoflares by means of a hydrodynamic 0D loop model (EBTEL). The light curves obtained from a random combination of those of single strands are compared to the observed light curves either in a single pixel or in a row of pixels, simultaneously in the two channels, and using two independent methods: an artificial intelligent system (Probabilistic Neural Network) and a simple cross-correlation technique. We explore the space of the parameters to constrain the distribution of the heat pulses, their duration, their spatial size, and, as a feedback on the data, their signatures on the light curves. From both methods the best agreement is obtained for a relatively large population of events (1000) with a short duration (less than 1 minute) and a relatively shallow distribution (power law with index 1.5) in a limited energy range (1.5 decades). The feedback on the data indicates that bumps in the light curves, especially in the 94 Å channel, are signatures of a heating excess that occurred a few minutes before.

  10. TIME-RESOLVED EMISSION FROM BRIGHT HOT PIXELS OF AN ACTIVE REGION OBSERVED IN THE EUV BAND WITH SDO/AIA AND MULTI-STRANDED LOOP MODELING

    SciTech Connect

    Tajfirouze, E.; Reale, F.; Petralia, A.; Testa, P.

    2016-01-01

    Evidence of small amounts of very hot plasma has been found in active regions and might be an indication of impulsive heating released at spatial scales smaller than the cross-section of a single loop. We investigate the heating and substructure of coronal loops in the core of one such active region by analyzing the light curves in the smallest resolution elements of solar observations in two EUV channels (94 and 335 Å) from the Atmospheric Imaging Assembly on board the Solar Dynamics Observatory. We model the evolution of a bundle of strands heated by a storm of nanoflares by means of a hydrodynamic 0D loop model (EBTEL). The light curves obtained from a random combination of those of single strands are compared to the observed light curves either in a single pixel or in a row of pixels, simultaneously in the two channels, and using two independent methods: an artificial intelligent system (Probabilistic Neural Network) and a simple cross-correlation technique. We explore the space of the parameters to constrain the distribution of the heat pulses, their duration, their spatial size, and, as a feedback on the data, their signatures on the light curves. From both methods the best agreement is obtained for a relatively large population of events (1000) with a short duration (less than 1 minute) and a relatively shallow distribution (power law with index 1.5) in a limited energy range (1.5 decades). The feedback on the data indicates that bumps in the light curves, especially in the 94 Å channel, are signatures of a heating excess that occurred a few minutes before.

  11. Fiber pixelated image database

    NASA Astrophysics Data System (ADS)

    Shinde, Anant; Perinchery, Sandeep Menon; Matham, Murukeshan Vadakke

    2016-08-01

    Imaging of physically inaccessible parts of the body such as the colon at micron-level resolution is highly important in diagnostic medical imaging. Though flexible endoscopes based on the imaging fiber bundle are used for such diagnostic procedures, their inherent honeycomb-like structure creates fiber pixelation effects. This impedes the observer from perceiving the information from an image captured and hinders the direct use of image processing and machine intelligence techniques on the recorded signal. Significant efforts have been made by researchers in the recent past in the development and implementation of pixelation removal techniques. However, researchers have often used their own set of images without making source data available which subdued their usage and adaptability universally. A database of pixelated images is the current requirement to meet the growing diagnostic needs in the healthcare arena. An innovative fiber pixelated image database is presented, which consists of pixelated images that are synthetically generated and experimentally acquired. Sample space encompasses test patterns of different scales, sizes, and shapes. It is envisaged that this proposed database will alleviate the current limitations associated with relevant research and development and would be of great help for researchers working on comb structure removal algorithms.

  12. Building strong partnerships with CMOs.

    PubMed

    Dye, Carson F

    2014-07-01

    CFOs and chief medical officers (CMOs) can build on common traits to form productive partnerships in guiding healthcare organizations through the changes affecting the industry. CFOs can strengthen bonds with CMOs by taking steps to engage physicians on their own turf--by visiting clinical locations and attending medical-executive committee meetings, for example. Steps CFOs can take to help CMOs become more acquainted with the financial operations of health systems include demonstrating the impact of clinical decisions on costs and inviting CMOs to attend finance-related meetings.

  13. The c-mos proto-oncogene protein kinase turns on and maintains the activity of MAP kinase, but not MPF, in cell-free extracts of Xenopus oocytes and eggs.

    PubMed Central

    Nebreda, A R; Hunt, T

    1993-01-01

    During studies of the activation and inactivation of the cyclin B-p34cdc2 protein kinase (MPF) in cell-free extracts of Xenopus oocytes and eggs, we found that a bacterially expressed fusion protein between the Escherichia coli maltose-binding protein and the Xenopus c-mos protein kinase (malE-mos) activated a 42 kDa MAP kinase. The activation of MAP kinase on addition of malE-mos was consistent, whereas the activation of MPF was variable and failed to occur in some oocyte extracts in which cyclin A or okadaic acid activated both MPF and MAP kinase. In cases when MPF activation was transient, MAP kinase activity declined after MPF activity was lost, and MAP kinase, but not MPF, could be maintained at a high level by the presence of malE-mos. When intact oocytes were treated with progesterone, however, the activation of MPF and MAP kinase occurred simultaneously, in contrast to the behaviour of extracts. These observations suggest that one role of c-mos may be to maintain high MAP kinase activity in meiosis. They also imply that the activation of MPF and MAP kinase in vivo are synchronous events that normally rely on an agent that has still to be identified. Images PMID:8387916

  14. A CMOS Time-Resolved Fluorescence Lifetime Analysis Micro-System

    PubMed Central

    Rae, Bruce R.; Muir, Keith R.; Gong, Zheng; McKendry, Jonathan; Girkin, John M.; Gu, Erdan; Renshaw, David; Dawson, Martin D.; Henderson, Robert K.

    2009-01-01

    We describe a CMOS-based micro-system for time-resolved fluorescence lifetime analysis. It comprises a 16 × 4 array of single-photon avalanche diodes (SPADs) fabricated in 0.35 μm high-voltage CMOS technology with in-pixel time-gated photon counting circuitry and a second device incorporating an 8 × 8 AlInGaN blue micro-pixellated light-emitting diode (micro-LED) array bump-bonded to an equivalent array of LED drivers realized in a standard low-voltage 0.35 μm CMOS technology, capable of producing excitation pulses with a width of 777 ps (FWHM). This system replaces instrumentation based on lasers, photomultiplier tubes, bulk optics and discrete electronics with a PC-based micro-system. Demonstrator lifetime measurements of colloidal quantum dot and Rhodamine samples are presented. PMID:22291564

  15. New generation CMOS 2D imager evaluation and qualification for semiconductor inspection applications

    NASA Astrophysics Data System (ADS)

    Zhou, Wei; Hart, Darcy

    2013-09-01

    Semiconductor fabrication process defect inspection industry is always driven by inspection resolution and through-put. With fabrication technology node advances to 2X ~1Xnm range, critical macro defect size approaches to typical CMOS camera pixel size range, therefore single pixel defect detection technology becomes more and more essential, which is fundamentally constrained by camera performance. A new evaluation model is presented here to specifically describe the camera performance for semiconductor machine vision applications, especially targeting at low image contrast high speed applications. Current mainline cameras and high-end OEM cameras are evaluated with this model. Camera performances are clearly differentiated among CMOS technology generations and vendors, which will facilitate application driven camera selection and operation optimization. The new challenges for CMOS detectors are discussed for semiconductor inspection applications.

  16. Solution processed integrated pixel element for an imaging device

    NASA Astrophysics Data System (ADS)

    Swathi, K.; Narayan, K. S.

    2016-09-01

    We demonstrate the implementation of a solid state circuit/structure comprising of a high performing polymer field effect transistor (PFET) utilizing an oxide layer in conjunction with a self-assembled monolayer (SAM) as the dielectric and a bulk-heterostructure based organic photodiode as a CMOS-like pixel element for an imaging sensor. Practical usage of functional organic photon detectors requires on chip components for image capture and signal transfer as in the CMOS/CCD architecture rather than simple photodiode arrays in order to increase speed and sensitivity of the sensor. The availability of high performing PFETs with low operating voltage and photodiodes with high sensitivity provides the necessary prerequisite to implement a CMOS type image sensing device structure based on organic electronic devices. Solution processing routes in organic electronics offers relatively facile procedures to integrate these components, combined with unique features of large-area, form factor and multiple optical attributes. We utilize the inherent property of a binary mixture in a blend to phase-separate vertically and create a graded junction for effective photocurrent response. The implemented design enables photocharge generation along with on chip charge to voltage conversion with performance parameters comparable to traditional counterparts. Charge integration analysis for the passive pixel element using 2D TCAD simulations is also presented to evaluate the different processes that take place in the monolithic structure.

  17. Selecting Pixels for Kepler Downlink

    NASA Technical Reports Server (NTRS)

    Bryson, Stephen T.; Jenkins, Jon M.; Klaus, Todd C.; Cote, Miles T.; Quintana, Elisa V.; Hall, Jennifer R.; Ibrahim, Khadeejah; Chandrasekaran, Hema; Caldwell, Douglas A.; Van Cleve, Jeffrey E.; Haas, Michael R.

    2010-01-01

    The Kepler mission monitors > 100,000 stellar targets using 42 2200 1024 pixel CCDs. Bandwidth constraints prevent the downlink of all 96 million pixels per 30-minute cadence, so the Kepler spacecraft downlinks a specified collection of pixels for each target. These pixels are selected by considering the object brightness, background and the signal-to-noise of each pixel, and are optimized to maximize the signal-to-noise ratio of the target. This paper describes pixel selection, creation of spacecraft apertures that efficiently capture selected pixels, and aperture assignment to a target. Diagnostic apertures, short-cadence targets and custom specified shapes are discussed.

  18. CMOS Amperometric ADC With High Sensitivity, Dynamic Range and Power Efficiency for Air Quality Monitoring.

    PubMed

    Li, Haitao; Boling, C Sam; Mason, Andrew J

    2016-08-01

    Airborne pollutants are a leading cause of illness and mortality globally. Electrochemical gas sensors show great promise for personal air quality monitoring to address this worldwide health crisis. However, implementing miniaturized arrays of such sensors demands high performance instrumentation circuits that simultaneously meet challenging power, area, sensitivity, noise and dynamic range goals. This paper presents a new multi-channel CMOS amperometric ADC featuring pixel-level architecture for gas sensor arrays. The circuit combines digital modulation of input currents and an incremental Σ∆ ADC to achieve wide dynamic range and high sensitivity with very high power efficiency and compact size. Fabricated in 0.5 [Formula: see text] CMOS, the circuit was measured to have 164 dB cross-scale dynamic range, 100 fA sensitivity while consuming only 241 [Formula: see text] and 0.157 [Formula: see text] active area per channel. Electrochemical experiments with liquid and gas targets demonstrate the circuit's real-time response to a wide range of analyte concentrations.

  19. CCD/CMOS hybrid FPA for low light level imaging

    NASA Astrophysics Data System (ADS)

    Liu, Xinqiao; Fowler, Boyd A.; Onishi, Steve K.; Vu, Paul; Wen, David D.; Do, Hung; Horn, Stuart

    2005-08-01

    We present a CCD / CMOS hybrid focal plane array (FPA) for low light level imaging applications. The hybrid approach combines the best of CCD imaging characteristics (e.g. high quantum efficiency, low dark current, excellent uniformity, and low pixel cross talk) with the high speed, low power and ultra-low read noise of CMOS readout technology. The FPA is comprised of two CMOS readout integrated circuits (ROIC) that are bump bonded to a CCD imaging substrate. Each ROIC is an array of Capacitive Transimpedence Amplifiers (CTIA) that connect to the CCD columns via indium bumps. The proposed column parallel readout architecture eliminates the slow speed, high noise, and high power limitations of a conventional CCD. This results in a compact, low power, ultra-sensitive solid-state FPA that can be used in low light level applications such as live-cell microscopy and security cameras at room temperature operation. The prototype FPA has a 1280×1024 format with 12-um square pixels. Measured dark current is less than 5.8 pA/cm2 at room temperature and the overall read noise is as low as 2.9e at 30 frames/sec.

  20. Hybrid CMOS SiPIN detectors as astronomical imagers

    NASA Astrophysics Data System (ADS)

    Simms, Lance Michael

    Charge Coupled Devices (CCDs) have dominated optical and x-ray astronomy since their inception in 1969. Only recently, through improvements in design and fabrication methods, have imagers that use Complimentary Metal Oxide Semiconductor (CMOS) technology gained ground on CCDs in scientific imaging. We are now in the midst of an era where astronomers might begin to design optical telescope cameras that employ CMOS imagers. The first three chapters of this dissertation are primarily composed of introductory material. In them, we discuss the potential advantages that CMOS imagers offer over CCDs in astronomical applications. We compare the two technologies in terms of the standard metrics used to evaluate and compare scientific imagers: dark current, read noise, linearity, etc. We also discuss novel features of CMOS devices and the benefits they offer to astronomy. In particular, we focus on a specific kind of hybrid CMOS sensor that uses Silicon PIN photodiodes to detect optical light in order to overcome deficiencies of commercial CMOS sensors. The remaining four chapters focus on a specific type of hybrid CMOS Silicon PIN sensor: the Teledyne Hybrid Visible Silicon PIN Imager (HyViSI). In chapters four and five, results from testing HyViSI detectors in the laboratory and at the Kitt Peak 2.1m telescope are presented. We present our laboratory measurements of the standard detector metrics for a number of HyViSI devices, ranging from 1k×1k to 4k×4k format. We also include a description of the SIDECAR readout circuit that was used to control the detectors. We then show how they performed at the telescope in terms of photometry, astrometry, variability measurement, and telescope focusing and guiding. Lastly, in the final two chapters we present results on detector artifacts such as pixel crosstalk, electronic crosstalk, and image persistence. One form of pixel crosstalk that has not been discussed elsewhere in the literature, which we refer to as Interpixel Charge

  1. A neighbor pixel communication filtering structure for Dynamic Vision Sensors

    NASA Astrophysics Data System (ADS)

    Xu, Yuan; Liu, Shiqi; Lu, Hehui; Zhang, Zilong

    2017-02-01

    For Dynamic Vision Sensors (DVS), thermal noise and junction leakage current induced Background Activity (BA) is the major cause of the deterioration of images quality. Inspired by the smoothing filtering principle of horizontal cells in vertebrate retina, A DVS pixel with Neighbor Pixel Communication (NPC) filtering structure is proposed to solve this issue. The NPC structure is designed to judge the validity of pixel's activity through the communication between its 4 adjacent pixels. The pixel's outputs will be suppressed if its activities are determined not real. The proposed pixel's area is 23.76×24.71μm2 and only 3ns output latency is introduced. In order to validate the effectiveness of the structure, a 5×5 pixel array has been implemented in SMIC 0.13μm CIS process. 3 test cases of array's behavioral model show that the NPC-DVS have an ability of filtering the BA.

  2. Further applications for mosaic pixel FPA technology

    NASA Astrophysics Data System (ADS)

    Liddiard, Kevin C.

    2011-06-01

    In previous papers to this SPIE forum the development of novel technology for next generation PIR security sensors has been described. This technology combines the mosaic pixel FPA concept with low cost optics and purpose-designed readout electronics to provide a higher performance and affordable alternative to current PIR sensor technology, including an imaging capability. Progressive development has resulted in increased performance and transition from conventional microbolometer fabrication to manufacture on 8 or 12 inch CMOS/MEMS fabrication lines. A number of spin-off applications have been identified. In this paper two specific applications are highlighted: high performance imaging IRFPA design and forest fire detection. The former involves optional design for small pixel high performance imaging. The latter involves cheap expendable sensors which can detect approaching fire fronts and send alarms with positional data via mobile phone or satellite link. We also introduce to this SPIE forum the application of microbolometer IR sensor technology to IoT, the Internet of Things.

  3. Enhancing the fill-factor of CMOS SPAD arrays using microlens integration

    NASA Astrophysics Data System (ADS)

    Intermite, G.; Warburton, R. E.; McCarthy, A.; Ren, X.; Villa, F.; Waddie, A. J.; Taghizadeh, M. R.; Zou, Y.; Zappa, F.; Tosi, A.; Buller, G. S.

    2015-05-01

    Arrays of single-photon avalanche diode (SPAD) detectors were fabricated, using a 0.35 μm CMOS technology process, for use in applications such as time-of-flight 3D ranging and microscopy. Each 150 x 150 μm pixel comprises a 30 μm active area diameter SPAD and its associated circuitry for counting, timing and quenching, resulting in a fill-factor of 3.14%. This paper reports how a higher effective fill-factor was achieved as a result of integrating microlens arrays on top of the 32 x 32 SPAD arrays. Diffractive and refractive microlens arrays were designed to concentrate the incoming light onto the active area of each pixel. A telecentric imaging system was used to measure the improvement factor (IF) resulting from microlens integration, whilst varying the f-number of incident light from f/2 to f/22 in one-stop increments across a spectral range of 500-900 nm. These measurements have demonstrated an increasing IF with fnumber, and a maximum of ~16 at the peak wavelength, showing a good agreement with theoretical values. An IF of 16 represents the highest value reported in the literature for microlenses integrated onto a SPAD detector array. The results from statistical analysis indicated the variation of detector efficiency was between 3-10% across the whole f-number range, demonstrating excellent uniformity across the detector plane with and without microlenses.

  4. Integration of nanostructured planar diffractive lenses dedicated to near infrared detection for CMOS image sensors.

    PubMed

    Lopez, Thomas; Massenot, Sébastien; Estribeau, Magali; Magnan, Pierre; Pardo, Fabrice; Pelouard, Jean-Luc

    2016-04-18

    This paper deals with the integration of metallic and dielectric nanostructured planar lenses into a pixel from a silicon based CMOS image sensor, for a monochromatic application at 1.064 μm. The first is a Plasmonic Lens, based on the phase delay through nanoslits, which has been found to be hardly compatible with current CMOS technology and exhibits a notable metallic absorption. The second is a dielectric Phase-Fresnel Lens integrated at the top of a pixel, it exhibits an Optical Efficiency (OE) improved by a few percent and an angle of view of 50°. The third one is a metallic diffractive lens integrated inside a pixel, which shows a better OE and an angle of view of 24°. The last two lenses exhibit a compatibility with a spectral band close to 1.064 μm.

  5. Analysis of incomplete charge transfer effects in a CMOS image sensor

    NASA Astrophysics Data System (ADS)

    Liqiang, Han; Suying, Yao; Jiangtao, Xu; Chao, Xu; Zhiyuan, Gao

    2013-05-01

    A method to judge complete charger transfer is proposed for a four-transistor CMOS image sensor with a large pixel size. Based on the emission current theory, a qualitative photoresponse model is established to the preliminary prediction. Further analysis of noise for incomplete charge transfer predicts the noise variation. The test pixels were fabricated in a specialized 0.18 μm CMOS image sensor process and two different processes of buried N layer implantation are compared. The trend prediction corresponds with the test results, especially as it can distinguish an unobvious incomplete charge transfer. The method helps us judge whether the charge transfer time satisfies the requirements of the readout circuit for the given process especially for pixels of a large size.

  6. Design of a 12-megapixel imager with a nanowatt A/D converter at each pixel

    NASA Astrophysics Data System (ADS)

    Mandl, William J.

    2003-09-01

    The design for a large format digital visible light area array was developed based on A/D conversion at each pixel. Production CMOS technology was used in the development of a monolithic front side illuminated photo diode pixel. Each pixel includes a one loop MOSAD, multiplexed oversample A/D, converter, the photo diode and a buffered output to support a very large array format operating at a high frame rate. MOSAD is a modification of the delta sigma approach to A/D conversion. The requirements are to develop a 4,000 x 3,000 pixel array capable of up to 1,000 frames per second sample rate. A design was developed using the AMIS 0.35 μm CMOS process with a single poly and three metal layers. To approximately fit a 35 millimeter optics format, a pixel size of 8.5 μm was selected. There are no operational amplifiers required at the pixel to perform the A/D function, thus allowing a high fill factor. With this pixel size, a 48% fill factor and 38% photo diode area was achieved. The design can produce a pixel size of 4.3 μm square with the use of 0.18 μm CMOS without sacrificing fill factor. Alternate approaches to satisfy the 1 kiloframe sample rate with up to 10 bits dynamic range were analyzed. The design is still in progress with layout and simulation of the critical elements complete. This development program is sponsored by the Army White Sands Missile Range.

  7. IR CMOS: near infrared enhanced digital imaging (Presentation Recording)

    NASA Astrophysics Data System (ADS)

    Pralle, Martin U.; Carey, James E.; Joy, Thomas; Vineis, Chris J.; Palsule, Chintamani

    2015-08-01

    SiOnyx has demonstrated imaging at light levels below 1 mLux (moonless starlight) at video frame rates with a 720P CMOS image sensor in a compact, low latency camera. Low light imaging is enabled by the combination of enhanced quantum efficiency in the near infrared together with state of the art low noise image sensor design. The quantum efficiency enhancements are achieved by applying Black Silicon, SiOnyx's proprietary ultrafast laser semiconductor processing technology. In the near infrared, silicon's native indirect bandgap results in low absorption coefficients and long absorption lengths. The Black Silicon nanostructured layer fundamentally disrupts this paradigm by enhancing the absorption of light within a thin pixel layer making 5 microns of silicon equivalent to over 300 microns of standard silicon. This results in a demonstrate 10 fold improvements in near infrared sensitivity over incumbent imaging technology while maintaining complete compatibility with standard CMOS image sensor process flows. Applications include surveillance, nightvision, and 1064nm laser see spot. Imaging performance metrics will be discussed. Demonstrated performance characteristics: Pixel size : 5.6 and 10 um Array size: 720P/1.3Mpix Frame rate: 60 Hz Read noise: 2 ele/pixel Spectral sensitivity: 400 to 1200 nm (with 10x QE at 1064nm) Daytime imaging: color (Bayer pattern) Nighttime imaging: moonless starlight conditions 1064nm laser imaging: daytime imaging out to 2Km

  8. Large CMOS imager using hadamard transform based multiplexing

    NASA Technical Reports Server (NTRS)

    Karasik, Boris S.; Wadsworth, Mark V.

    2005-01-01

    We have developed a concept design for a large (10k x 10k) CMOS imaging array whose elements are grouped in small subarrays with N pixels in each. The subarrays are code-division multiplexed using the Hadamard Transform (HT) based encoding. The Hadamard code improves the signal-to-noise (SNR) ratio to the reference of the read-out amplifier by a factor of N^1/2. This way of grouping pixels reduces the number of hybridization bumps by N. A single chip layout has been designed and the architecture of the imager has been developed to accommodate the HT base multiplexing into the existing CMOS technology. The imager architecture allows for a trade-off between the speed and the sensitivity. The envisioned imager would operate at a speed >100 fps with the pixel noise < 20 e-. The power dissipation would be 100 pW/pixe1. The combination of the large format, high speed, high sensitivity and low power dissipation can be very attractive for space reconnaissance applications.

  9. Beam test results of a monolithic pixel sensor in the 0.18 μm tower-jazz technology with high resistivity epitaxial layer

    NASA Astrophysics Data System (ADS)

    Mattiazzo, S.; Aimo, I.; Baudot, J.; Bedda, C.; La Rocca, P.; Perez, A.; Riggi, F.; Spiriti, E.

    2015-10-01

    The ALICE experiment at CERN will undergo a major upgrade in the second Long LHC Shutdown in the years 2018-2019; this upgrade includes the full replacement of the Inner Tracking System (ITS), deploying seven layers of Monolithic Active Pixel Sensors (MAPS). For the development of the new ALICE ITS, the Tower-Jazz 0.18 μm CMOS imaging sensor process has been chosen as it is possible to use full CMOS in the pixel and different silicon wafers (including high resistivity epitaxial layers). A large test campaign has been carried out on several small prototype chips, designed to optimize the pixel sensor layout and the front-end electronics. Results match the target requirements both in terms of performance and of radiation hardness. Following this development, the first full scale chips have been designed, submitted and are currently under test, with promising results. A telescope composed of 4 planes of Mimosa-28 and 2 planes of Mimosa-18 chips is under development at the DAFNE Beam Test Facility (BTF) at the INFN Laboratori Nazionali di Frascati (LNF) in Italy with the final goal to perform a comparative test of the full scale prototypes. The telescope has been recently used to test a Mimosa-22THRb chip (a monolithic pixel sensor built in the 0.18 μm Tower-Jazz process) and we foresee to perform tests on the full scale chips for the ALICE ITS upgrade at the beginning of 2015. In this contribution we will describe some first measurements of spatial resolution, fake hit rate and detection efficiency of the Mimosa-22THRb chip obtained at the BTF facility in June 2014 with an electron beam of 500 MeV.

  10. Regenerative switching CMOS system

    DOEpatents

    Welch, James D.

    1998-01-01

    Complementary Metal Oxide Semiconductor (CMOS) Schottky barrier Field Effect Transistor systems, which are a seriesed combination of N and P-Channel MOSFETS, in which Source Schottky barrier junctions of the N and P-Channel Schottky barrier MOSFETS are electically interconnected, (rather than the Drains as in conventional diffused junction CMOS), which Schottky barrier MOSFET system demonstrates Regenerative Inverting Switching Characteristics in use are disclosed. Both the N and P-Channel Schottky barrier MOSFET devices are unique in that they provide operational Drain Current vs. Drain to Source voltage as a function of Gate voltage only where the polarities of the Drain voltage and Gate voltage are opposite, referenced to the Source as a common terminal, and where the polarity of the voltage applied to the Gate is appropriate to cause Channel inversion. Experimentally derived results which demonstrate and verify the operation of N and P-Channel Schottky barrier MOSFETS actually fabricated on P and N-type Silicon respectively, by a common procedure using vacuum deposited Chromium as a Schottky barrier forming metal, are also provided.

  11. Regenerative switching CMOS system

    DOEpatents

    Welch, J.D.

    1998-06-02

    Complementary Metal Oxide Semiconductor (CMOS) Schottky barrier Field Effect Transistor systems, which are a series combination of N and P-Channel MOSFETS, in which Source Schottky barrier junctions of the N and P-Channel Schottky barrier MOSFETS are electrically interconnected, (rather than the Drains as in conventional diffused junction CMOS), which Schottky barrier MOSFET system demonstrates Regenerative Inverting Switching Characteristics in use are disclosed. Both the N and P-Channel Schottky barrier MOSFET devices are unique in that they provide operational Drain Current vs. Drain to Source voltage as a function of Gate voltage only where the polarities of the Drain voltage and Gate voltage are opposite, referenced to the Source as a common terminal, and where the polarity of the voltage applied to the Gate is appropriate to cause Channel inversion. Experimentally derived results which demonstrate and verify the operation of N and P-Channel Schottky barrier MOSFETS actually fabricated on P and N-type Silicon respectively, by a common procedure using vacuum deposited Chromium as a Schottky barrier forming metal, are also provided. 14 figs.

  12. High throughput optoelectronic smart pixel systems using diffractive optics

    NASA Astrophysics Data System (ADS)

    Chen, Chih-Hao

    1999-12-01

    Recent developments in digital video, multimedia technology and data networks have greatly increased the demand for high bandwidth communication channels and high throughput data processing. Electronics is particularly suited for switching, amplification and logic functions, while optics is more suitable for interconnections and communications with lower energy and crosstalk. In this research, we present the design, testing, integration and demonstration of several optoelectronic smart pixel devices and system architectures. These systems integrate electronic switching/processing capability with parallel optical interconnections to provide high throughput network communication and pipeline data processing. The Smart Pixel Array Cellular Logic processor (SPARCL) is designed in 0.8 m m CMOS and hybrid integrated with Multiple-Quantum-Well (MQW) devices for pipeline image processing. The Smart Pixel Network Interface (SAPIENT) is designed in 0.6 m m GaAs and monolithically integrated with LEDs to implement a highly parallel optical interconnection network. The Translucent Smart Pixel Array (TRANSPAR) design is implemented in two different versions. The first version, TRANSPAR-MQW, is designed in 0.5 m m CMOS and flip-chip integrated with MQW devices to provide 2-D pipeline processing and translucent networking using the Carrier- Sense-MultipleAccess/Collision-Detection (CSMA/CD) protocol. The other version, TRANSPAR-VM, is designed in 1.2 m m CMOS and discretely integrated with VCSEL-MSM (Vertical-Cavity-Surface- Emitting-Laser and Metal-Semiconductor-Metal detectors) chips and driver/receiver chips on a printed circuit board. The TRANSPAR-VM provides an option of using the token ring network protocol in addition to the embedded functions of TRANSPAR-MQW. These optoelectronic smart pixel systems also require micro-optics devices to provide high resolution, high quality optical interconnections and external source arrays. In this research, we describe an innovative

  13. A 65 nm pixel readout ASIC with quick transverse momentum discrimination capabilities for the CMS Tracker at HL-LHC

    NASA Astrophysics Data System (ADS)

    Ceresa, D.; Kaplon, J.; Francisco, R.; Caratelli, A.; Kloukinas, K.; Marchioro, A.

    2016-01-01

    A readout ASIC for the hybrid pixel detector with the capability of performing quick recognition of particles with high transverse momentum has been designed for the requirements of the CMS Outer Tracker at the High Luminosity LHC . The particle momentum dicrimination capability represents the main challenge for this design together with the low power requirement: the constraint of low mass for the new tracker dictates a total power budget of less than 100 mW/cm2. The choice of a 65 nm CMOS technology has made it possible to satisfy this power requirement despite the fairly large amount of logic necessary to perform the momentum discrimination and the continuous operation at 40 MHz. Several techniques for low power have been used to implement this logic that performs cluster reduction, position offset correction and coordinate encoding. A prototype chip including a large part of the final functionality and the full front-end has been realized and comprises a matrix of 16 by 3 rectangular pixels of 100 μm × 1446 μm, providing 7.65 mm2 of segmented active area. Measurements of the analog front-end characteristics closely match the simulations and confirm the consumption of < 30 μA per pixel. Front-end characterization and irradiation results up to 150 MRad are also reported.

  14. A 160 x 120 pixel uncooled TEC-less infrared radiation focal plane array on a standard ceramic package

    NASA Astrophysics Data System (ADS)

    Funaki, Hideyuki; Honda, Hiroto; Fujiwara, Ikuo; Yagi, Hitoshi; Ishii, Kouichi; Sasaki, Keita

    2009-05-01

    We have developed a 32 μm pitch and 160 × 120 pixel uncooled infrared radiation focal plane array (IRFPA) on SOI by 0.35 μm CMOS technology and bulk-micromachining. For IR detection, we use silicon single crystal series p-n junctions which can realize high uniformity of temperature coefficient and low voltage drift. We have also developed a low-noise CMOS readout circuit on the same SOI which can calibrate the substrate temperature variation in every frame period, comparing two types of pixels, a bulk-micromachined infrared detection pixel and a non-micromachined reference pixel. Then the FPA requires no thermo-electric cooler (TEC) and is mounted on a low-cost standard ceramic package for the consumer products market.

  15. CMOS detector arrays in a virtual 10-kilopixel camera for coherent terahertz real-time imaging.

    PubMed

    Boppel, Sebastian; Lisauskas, Alvydas; Max, Alexander; Krozer, Viktor; Roskos, Hartmut G

    2012-02-15

    We demonstrate the principle applicability of antenna-coupled complementary metal oxide semiconductor (CMOS) field-effect transistor arrays as cameras for real-time coherent imaging at 591.4 GHz. By scanning a few detectors across the image plane, we synthesize a focal-plane array of 100×100 pixels with an active area of 20×20 mm2, which is applied to imaging in transmission and reflection geometries. Individual detector pixels exhibit a voltage conversion loss of 24 dB and a noise figure of 41 dB for 16 μW of the local oscillator (LO) drive. For object illumination, we use a radio-frequency (RF) source with 432 μW at 590 GHz. Coherent detection is realized by quasioptical superposition of the image and the LO beam with 247 μW. At an effective frame rate of 17 Hz, we achieve a maximum dynamic range of 30 dB in the center of the image and more than 20 dB within a disk of 18 mm diameter. The system has been used for surface reconstruction resolving a height difference in the μm range.

  16. Transmission and reflective ultrasound images using PE-CMOS sensor array

    NASA Astrophysics Data System (ADS)

    Lo, Shih-Chung B.; Liu, Chu Chuan; Freedman, Matthew T.; Kula, John; Lasser, Bob; Lasser, Marvin E.; Wang, Yue

    2005-04-01

    The purpose of this study is to investigate the imaging capability of a CMOS (PE-CMOS) ultrasound sensing array coated with piezoelectric material. There are three main components in the laboratory setup: (1) a transducer operated at 3.5MHz-7MHz frequency generating unfocused ultrasound plane waves, (2) an acoustic compound lens that collects the energy and focuses ultrasound signals onto the detector array, and (3) a PE-CMOS ultrasound sensing array (Model I400, Imperium Inc. Silver Spring, MD) that receives the ultrasound and converts the energy to analog voltage followed by a digital conversion. The PE-CMOS array consists of 128×128 pixel elements with 85μm per pixel. The major improvement of the new ultrasound sensor array has been in its dynamic range. We found that the current PE-CMOS ultrasound sensor (Model I400) possesses a dynamic range up to 70dB. The system can generate ultrasound attenuation images of soft tissues which are similar to digital images obtained from an x-ray projection system. In the paper, we also show that the prototype system can image bone fractures using reflective geometry.

  17. Ultraviolet detector with CMOS-coupled microchannel plates for future space missions

    NASA Astrophysics Data System (ADS)

    Murakami, Go; Kuwabara, Masaki; Yoshioka, Kazuo; Hikida, Reina; Suzuki, Fumiharu; Yoshikawa, Ichiro

    2016-07-01

    The extreme ultraviolet (EUV) telescopes and spectrometers have been used as powerful tools in a variety of space applications, especially in planetary science. Many EUV instruments adopted microchannel plate (MCP) detection systems with resistive anode encoders (RAEs). An RAE is one of the position sensitive anodes suitable for space-based applications because of its low power, mass, and volume coupled with very high reliability. However, this detection system with RAE has limitations of resolution (up to 512 x 512 pixels) and incident count rate (up to 104 count/sec). Concerning the future space and planetary missions, a new detector with different position sensitive system is required in order to a higher resolution and dynamic range of incident photons. One of the solutions of this issue is using a CMOS imaging sensor. The CMOS imaging sensor with high resolution and high radiation tolerance has been widely used. Here we developed a new CMOS-coupled MCP detector for future UV space and planetary missions. It consists of MCPs followed by a phosphor screen, fiber optic plate, and a windowless CMOS. We manufactured a test model of this detector and performed vibration, thermal cycle, and performance tests. The test sample of FOP-coupled CMOS image sensor achieved the resolving limit of 32 lp/mm and the PSF of 28 um, corresponds to the spatial resolution of 1024 x 1024 pixels. Our results indicate that this new type of UV detector can be widely used for future space applications.

  18. Development for Germanium Blocked Impurity Band Far-Infrared Image Sensors with Fully-Depleted Silicon-On-Insulator CMOS Readout Integrated Circuit

    NASA Astrophysics Data System (ADS)

    Wada, T.; Arai, Y.; Baba, S.; Hanaoka, M.; Hattori, Y.; Ikeda, H.; Kaneda, H.; Kochi, C.; Miyachi, A.; Nagase, K.; Nakaya, H.; Ohno, M.; Oyabu, S.; Suzuki, T.; Ukai, S.; Watanabe, K.; Yamamoto, K.

    2016-07-01

    We are developing far-infrared (FIR) imaging sensors for low-background and high-sensitivity applications such as infrared astronomy. Previous FIR monolithic imaging sensors, such as an extrinsic germanium photo-conductor (Ge PC) with a PMOS readout integrated circuit (ROIC) hybridized by indium pixel-to-pixel interconnection, had three difficulties: (1) short cut-off wavelength (120 \\upmu m), (2) large power consumption (10 \\upmu W/pixel), and (3) large mismatch in thermal expansion between the Ge PC and the Si ROIC. In order to overcome these difficulties, we developed (1) a blocked impurity band detector fabricated by a surface- activated bond technology, whose cut-off wavelength is longer than 160 \\upmu m, (2) a fully-depleted silicon-on-insulator CMOS ROIC which works below 4 K with 1 \\upmu W/pixel operating power, and (3) a new concept, Si-supported Ge detector, which shows tolerance to thermal cycling down to 3 K. With these new techniques, we are now developing a 32 × 32 FIR imaging sensor.

  19. Widefield heterodyne interferometry using a custom CMOS modulated light camera.

    PubMed

    Patel, Rikesh; Achamfuo-Yeboah, Samuel; Light, Roger; Clark, Matt

    2011-11-21

    In this paper a method of taking widefield heterodyne interferograms using a prototype modulated light camera is described. This custom CMOS modulated light camera (MLC) uses analogue quadrature demodulation at each pixel to output the phase and amplitude of the modulated light as DC voltages. The heterodyne interference fringe patterns are generated using an acousto-optical frequency shifter (AOFS) in an arm of a Mach-Zehnder interferometer. Widefield images of fringe patterns acquired using the prototype MLC are presented. The phase can be measured to an accuracy of ±6.6°. The added value of this method to acquire widefield images are discussed along with the advantages.

  20. A 1.2 Gb/s Data Transmission Unit in CMOS 0.18 μm technology for the ALICE Inner Tracking System front-end ASIC

    NASA Astrophysics Data System (ADS)

    Mazza, G.; Aglieri Rinella, G.; Benotto, F.; Corrales Morales, Y.; Kugathasan, T.; Lattuca, A.; Lupi, M.; Ravasenga, I.

    2017-02-01

    The upgrade of the ALICE Inner Tracking System is based on a Monolithic Active Pixel Sensor and ASIC designed in a CMOS 0.18 μ m process. In order to provide the required output bandwidth (1.2 Gb/s for the inner layers and 400 Mb/s for the outer ones) on a single high speed serial link, a custom Data Transmission Unit (DTU) has been developed in the same process. The DTU includes a clock multiplier PLL, a double data rate serializer and a pseudo-LVDS driver with pre-emphasis and is designed to be SEU tolerant.

  1. VeloPix: the pixel ASIC for the LHCb upgrade

    NASA Astrophysics Data System (ADS)

    Poikela, T.; De Gaspari, M.; Plosila, J.; Westerlund, T.; Ballabriga, R.; Buytaert, J.; Campbell, M.; Llopart, X.; Wyllie, K.; Gromov, V.; van Beuzekom, M.; Zivkovic, V.

    2015-01-01

    The LHCb Vertex Detector (VELO) will be upgraded in 2018 along with the other subsystems of LHCb in order to enable full readout at 40 MHz, with the data fed directly to the software triggering algorithms. The upgraded VELO is a lightweight hybrid pixel detector operating in vacuum in close proximity to the LHC beams. The readout will be provided by a dedicated front-end ASIC, dubbed VeloPix, matched to the LHCb readout requirements and the 55 × 55 μm VELO pixel dimensions. The chip is closely related to the Timepix3, from the Medipix family of ASICs. The principal challenge that the chip has to meet is a hit rate of up to 900 Mhits/s, resulting in a required output bandwidth of more than 16 Gbit/s. The occupancy across the chip is also very non-uniform, and the radiation levels reach an integrated 400 Mrad over the lifetime of the detector.VeloPix is a binary pixel readout chip with a data driven readout, designed in 130 nm CMOS technology. The pixels are combined into groups of 2 × 4 super pixels, enabling a shared logic and a reduction of bandwidth due to combined address and time stamp information. The pixel hits are combined with other simultaneous hits in the same super pixel, time stamped, and immediately driven off-chip. The analog front-end must be sufficiently fast to accurately time stamp the data, with a small enough dead time to minimize data loss in the most occupied regions of the chip. The data is driven off chip with a custom designed high speed serialiser. The current status of the ASIC design, the chip architecture and the simulations will be described.

  2. Method and apparatus of high dynamic range image sensor with individual pixel reset

    NASA Technical Reports Server (NTRS)

    Yadid-Pecht, Orly (Inventor); Pain, Bedabrata (Inventor); Fossum, Eric R. (Inventor)

    2001-01-01

    A wide dynamic range image sensor provides individual pixel reset to vary the integration time of individual pixels. The integration time of each pixel is controlled by column and row reset control signals which activate a logical reset transistor only when both signals coincide for a given pixel.

  3. Digital pixel sensor array with logarithmic delta-sigma architecture.

    PubMed

    Mahmoodi, Alireza; Li, Jing; Joseph, Dileepan

    2013-08-16

    Like the human eye, logarithmic image sensors achieve wide dynamic range easily at video rates, but, unlike the human eye, they suffer from low peak signal-to-noise-and-distortion ratios (PSNDRs). To improve the PSNDR, we propose integrating a delta-sigma analog-to-digital converter (ADC) in each pixel. An image sensor employing this architecture is designed, built and tested in 0.18 micron complementary metal-oxide-semiconductor (CMOS) technology. It achieves a PSNDR better than state-of-the-art logarithmic sensors and comparable to the human eye. As the approach concerns an array of many ADCs, we use a small-area low-power delta-sigma design. For scalability, each pixel has its own decimator. The prototype is compared to a variety of other image sensors, linear and nonlinear, from industry and academia.

  4. Video-rate nanoscopy using sCMOS camera-specific single-molecule localization algorithms.

    PubMed

    Huang, Fang; Hartwich, Tobias M P; Rivera-Molina, Felix E; Lin, Yu; Duim, Whitney C; Long, Jane J; Uchil, Pradeep D; Myers, Jordan R; Baird, Michelle A; Mothes, Walther; Davidson, Michael W; Toomre, Derek; Bewersdorf, Joerg

    2013-07-01

    Newly developed scientific complementary metal-oxide semiconductor (sCMOS) cameras have the potential to dramatically accelerate data acquisition, enlarge the field of view and increase the effective quantum efficiency in single-molecule switching nanoscopy. However, sCMOS-intrinsic pixel-dependent readout noise substantially lowers the localization precision and introduces localization artifacts. We present algorithms that overcome these limitations and that provide unbiased, precise localization of single molecules at the theoretical limit. Using these in combination with a multi-emitter fitting algorithm, we demonstrate single-molecule localization super-resolution imaging at rates of up to 32 reconstructed images per second in fixed and living cells.

  5. Use of CMOS imagers to measure high fluxes of charged particles

    NASA Astrophysics Data System (ADS)

    Servoli, L.; Tucceri, P.

    2016-03-01

    The measurement of high flux charged particle beams, specifically at medical accelerators and with small fields, poses several challenges. In this work we propose a single particle counting method based on CMOS imagers optimized for visible light collection, exploiting their very high spatial segmentation (> 3 106 pixels/cm2) and almost full efficiency detection capability. An algorithm to measure the charged particle flux with a precision of ~ 1% for fluxes up to 40 MHz/cm2 has been developed, using a non-linear calibration algorithm, and several CMOS imagers with different characteristics have been compared to find their limits on flux measurement.

  6. Pixelated neutron image plates

    NASA Astrophysics Data System (ADS)

    Schlapp, M.; Conrad, H.; von Seggern, H.

    2004-09-01

    Neutron image plates (NIPs) have found widespread application as neutron detectors for single-crystal and powder diffraction, small-angle scattering and tomography. After neutron exposure, the image plate can be read out by scanning with a laser. Commercially available NIPs consist of a powder mixture of BaFBr : Eu2+ and Gd2O3 dispersed in a polymer matrix and supported by a flexible polymer sheet. Since BaFBr : Eu2+ is an excellent x-ray storage phosphor, these NIPs are particularly sensitive to ggr-radiation, which is always present as a background radiation in neutron experiments. In this work we present results on NIPs consisting of KCl : Eu2+ and LiF that were fabricated into ceramic image plates in which the alkali halides act as a self-supporting matrix without the necessity for using a polymeric binder. An advantage of this type of NIP is the significantly reduced ggr-sensitivity. However, the much lower neutron absorption cross section of LiF compared with Gd2O3 demands a thicker image plate for obtaining comparable neutron absorption. The greater thickness of the NIP inevitably leads to a loss in spatial resolution of the image plate. However, this reduction in resolution can be restricted by a novel image plate concept in which a ceramic structure with square cells (referred to as a 'honeycomb') is embedded in the NIP, resulting in a pixelated image plate. In such a NIP the read-out light is confined to the particular illuminated pixel, decoupling the spatial resolution from the optical properties of the image plate material and morphology. In this work, a comparison of experimentally determined and simulated spatial resolutions of pixelated and unstructured image plates for a fixed read-out laser intensity is presented, as well as simulations of the properties of these NIPs at higher laser powers.

  7. CMOS array design automation techniques

    NASA Technical Reports Server (NTRS)

    Lombardi, T.; Feller, A.

    1976-01-01

    The design considerations and the circuit development for a 4096-bit CMOS SOS ROM chip, the ATL078 are described. Organization of the ATL078 is 512 words by 8 bits. The ROM was designed to be programmable either at the metal mask level or by a directed laser beam after processing. The development of a 4K CMOS SOS ROM fills a void left by available ROM chip types, and makes the design of a totally major high speed system more realizable.

  8. A high-resolution CMOS imaging detector for the search of neutrinoless double β decay in 82Se

    NASA Astrophysics Data System (ADS)

    Chavarria, A. E.; Galbiati, C.; Li, X.; Rowlands, J. A.

    2017-03-01

    We introduce high-resolution solid-state imaging detectors for the search of neutrinoless double β decay. Based on the present literature, imaging devices from amorphous 82Se evaporated on a complementary metal-oxide-semiconductor (CMOS) active pixel array could have the energy and spatial resolution to produce two-dimensional images of ionizing tracks of utmost quality, effectively akin to an electronic bubble chamber in the double β decay energy regime. Still to be experimentally demonstrated, a detector consisting of a large array of these devices could have very low backgrounds, possibly reaching 1 × 10‑7/(kgy) in the neutrinoless decay region of interest (ROI), as it may be required for the full exploration of the neutrinoless double β decay parameter space in the most unfavorable condition of a strongly quenched nucleon axial coupling constant.

  9. Micro-lens maker equation of a CMOS image sensor

    NASA Astrophysics Data System (ADS)

    Wu, Yang

    2007-09-01

    The demand of a large resolution CMOS image sensor (CIS) in a small package drives the pixel pitch size down to the neighborhood of 2 μm. Double-micro-lens (ML) structure is a promising technology to obtain the high focusing capability required by such a small pixel. In this work, an optical model of a double-ML is derived from the well-known lens maker equation. This model predicts the critical back focal length (BFL) and the effective focal length (EFL) of the double-ML embedded in the Back-End-Of-The-Line (BEOL) stack. Explained by this model, a design guideline is provided to optimize the amount of light collected by the photo diode area for a good quantum efficiency (QE), which is crucial to the sensitivity of the sensor.

  10. The Speedster-EXD- A New Event-Driven Hybrid CMOS X-ray Detector

    NASA Astrophysics Data System (ADS)

    Griffith, Christopher V.; Falcone, Abraham D.; Prieskorn, Zachary R.; Burrows, David N.

    2016-01-01

    The Speedster-EXD is a new 64×64 pixel, 40-μm pixel pitch, 100-μm depletion depth hybrid CMOS x-ray detector with the capability of reading out only those pixels containing event charge, thus enabling fast effective frame rates. A global charge threshold can be specified, and pixels containing charge above this threshold are flagged and read out. The Speedster detector has also been designed with other advanced in-pixel features to improve performance, including a low-noise, high-gain capacitive transimpedance amplifier that eliminates interpixel capacitance crosstalk (IPC), and in-pixel correlated double sampling subtraction to reduce reset noise. We measure the best energy resolution on the Speedster-EXD detector to be 206 eV (3.5%) at 5.89 keV and 172 eV (10.0%) at 1.49 keV. The average IPC to the four adjacent pixels is measured to be 0.25%±0.2% (i.e., consistent with zero). The pixel-to-pixel gain variation is measured to be 0.80%±0.03%, and a Monte Carlo simulation is applied to better characterize the contributions to the energy resolution.

  11. Development of a pixel sensor with fine space-time resolution based on SOI technology for the ILC vertex detector

    NASA Astrophysics Data System (ADS)

    Ono, Shun; Togawa, Manabu; Tsuji, Ryoji; Mori, Teppei; Yamada, Miho; Arai, Yasuo; Tsuboyama, Toru; Hanagaki, Kazunori

    2017-02-01

    We have been developing a new monolithic pixel sensor with silicon-on-insulator (SOI) technology for the International Linear Collider (ILC) vertex detector system. The SOI monolithic pixel detector is realized using standard CMOS circuits fabricated on a fully depleted sensor layer. The new SOI sensor SOFIST can store both the position and timing information of charged particles in each 20×20 μm2 pixel. The position resolution is further improved by the position weighted with the charges spread to multiple pixels. The pixel also records the hit timing with an embedded time-stamp circuit. The sensor chip has column-parallel analog-to-digital conversion (ADC) circuits and zero-suppression logic for high-speed data readout. We are designing and evaluating some prototype sensor chips for optimizing and minimizing the pixel circuit.

  12. Using of a modulated CMOS camera for fluorescence lifetime microscopy

    PubMed Central

    Chen, Hongtao; Holst, Gerhard

    2016-01-01

    Widefield frequency-domain fluorescence lifetime imaging microscopy (FD-FLIM) is a fast and accurate method to measure the fluorescence lifetime of entire images. However, the complexity and high costs involved in construction of such a system limit the extensive use of this technique. PCO AG recently released the first luminescence lifetime imaging camera based on a high frequency modulated CMOS image sensor, QMFLIM2. Here we tested and provide operational procedures to calibrate the camera and to improve the accuracy using corrections necessary for image analysis. With its flexible input/output options, we are able to use a modulated laser diode or a 20MHz pulsed white supercontinuum laser as the light source. The output of the camera consists of a stack of modulated images that can be analyzed by the SimFCS software using the phasor approach. The non-uniform system response across the image sensor must be calibrated at the pixel level. This pixel calibration is crucial and needed for every camera settings, e.g. modulation frequency and exposure time. A significant dependency of the modulation signal on the intensity was also observed and hence an additional calibration is needed for each pixel depending on the pixel intensity level. These corrections are important not only for the fundamental frequency, but also for the higher harmonics when using the pulsed supercontinuum laser. With these post data acquisition corrections, the PCO CMOS-FLIM camera can be used for various biomedical applications requiring a large frame and high speed acquisition. PMID:26500051

  13. Pixelated gamma detector

    SciTech Connect

    Dolinsky, Sergei Ivanovich; Yanoff, Brian David; Guida, Renato; Ivan, Adrian

    2016-12-27

    A pixelated gamma detector includes a scintillator column assembly having scintillator crystals and optical transparent elements alternating along a longitudinal axis, a collimator assembly having longitudinal walls separated by collimator septum, the collimator septum spaced apart to form collimator channels, the scintillator column assembly positioned adjacent to the collimator assembly so that the respective ones of the scintillator crystal are positioned adjacent to respective ones of the collimator channels, the respective ones of the optical transparent element are positioned adjacent to respective ones of the collimator septum, and a first photosensor and a second photosensor, the first and the second photosensor each connected to an opposing end of the scintillator column assembly. A system and a method for inspecting and/or detecting defects in an interior of an object are also disclosed.

  14. Imaging by photon counting with 256x256 pixel matrix

    NASA Astrophysics Data System (ADS)

    Tlustos, Lukas; Campbell, Michael; Heijne, Erik H. M.; Llopart, Xavier

    2004-09-01

    Using 0.25µm standard CMOS we have developed 2-D semiconductor matrix detectors with sophisticated functionality integrated inside each pixel of a hybrid sensor module. One of these sensor modules is a matrix of 256x256 square 55µm pixels intended for X-ray imaging. This device is called 'Medipix2' and features a fast amplifier and two-level discrimination for signals between 1000 and 100000 equivalent electrons, with overall signal noise ~150 e- rms. Signal polarity and comparator thresholds are programmable. A maximum count rate of nearly 1 MHz per pixel can be achieved, which corresponds to an average flux of 3x10exp10 photons per cm2. The selected signals can be accumulated in each pixel in a 13-bit register. The serial readout takes 5-10 ms. A parallel readout of ~300 µs could also be used. Housekeeping functions such as local dark current compensation, test pulse generation, silencing of noisy pixels and threshold tuning in each pixel contribute to the homogeneous response over a large sensor area. The sensor material can be adapted to the energy of the X-rays. Best results have been obtained with high-resistivity silicon detectors, but also CdTe and GaAs detectors have been used. The lowest detectable X-ray energy was about 4 keV. Background measurements have been made, as well as measurements of the uniformity of imaging by photon counting. Very low photon count rates are feasible and noise-free at room temperature. The readout matrix can be used also with visible photons if an energy or charge intensifier structure is interposed such as a gaseous amplification layer or a microchannel plate or acceleration field in vacuum.

  15. Low voltage electron multiplying CCD in a CMOS process

    NASA Astrophysics Data System (ADS)

    Dunford, Alice; Stefanov, Konstantin; Holland, Andrew

    2016-07-01

    Low light level and high-speed image sensors as required for space applications can suffer from a decrease in the signal to noise ratio (SNR) due to the photon-starved environment and limitations of the sensor's readout noise. The SNR can be increased by the implementation of Time Delay Integration (TDI) as it allows photoelectrons from multiple exposures to be summed in the charge domain with no added noise. Electron Multiplication (EM) can further improve the SNR and lead to an increase in device performance. However, both techniques have traditionally been confined to Charge Coupled Devices (CCD) due to the efficient charge transfer required. With the increase in demand for CMOS sensors with equivalent or superior functionality and performance, this paper presents findings from the characterisation of a low voltage EMCCD in a CMOS process using advanced design features to increase the electron multiplying gain. By using the CMOS process, it is possible to increase chip integration and functionality and achieve higher readout speeds and reduced pixel size. The presented characterisation results include analysis of the photon transfer curve, the dark current, the electron multiplying gain and analysis of the parameters' dependence on temperature and operating voltage.

  16. Predicted image quality of a CMOS APS X-ray detector across a range of mammographic beam qualities

    NASA Astrophysics Data System (ADS)

    Konstantinidis, A.

    2015-09-01

    Digital X-ray detectors based on Complementary Metal-Oxide- Semiconductor (CMOS) Active Pixel Sensor (APS) technology have been introduced in the early 2000s in medical imaging applications. In a previous study the X-ray performance (i.e. presampling Modulation Transfer Function (pMTF), Normalized Noise Power Spectrum (NNPS), Signal-to-Noise Ratio (SNR) and Detective Quantum Efficiency (DQE)) of the Dexela 2923MAM CMOS APS X-ray detector was evaluated within the mammographic energy range using monochromatic synchrotron radiation (i.e. 17-35 keV). In this study image simulation was used to predict how the mammographic beam quality affects image quality. In particular, the experimentally measured monochromatic pMTF, NNPS and SNR parameters were combined with various mammographic spectral shapes (i.e. Molybdenum/Molybdenum (Mo/Mo), Rhodium/Rhodium (Rh/Rh), Tungsten/Aluminium (W/Al) and Tungsten/Rhodium (W/Rh) anode/filtration combinations at 28 kV). The image quality was measured in terms of Contrast-to-Noise Ratio (CNR) using a synthetic breast phantom (4 cm thick with 50% glandularity). The results can be used to optimize the imaging conditions in order to minimize patient's Mean Glandular Dose (MGD).

  17. Commissioning of the ATLAS pixel detector

    SciTech Connect

    ATLAS Collaboration; Golling, Tobias

    2008-09-01

    The ATLAS pixel detector is a high precision silicon tracking device located closest to the LHC interaction point. It belongs to the first generation of its kind in a hadron collider experiment. It will provide crucial pattern recognition information and will largely determine the ability of ATLAS to precisely track particle trajectories and find secondary vertices. It was the last detector to be installed in ATLAS in June 2007, has been fully connected and tested in-situ during spring and summer 2008, and is ready for the imminent LHC turn-on. The highlights of the past and future commissioning activities of the ATLAS pixel system are presented.

  18. Pixelation Effects in Weak Lensing

    NASA Technical Reports Server (NTRS)

    High, F. William; Rhodes, Jason; Massey, Richard; Ellis, Richard

    2007-01-01

    Weak gravitational lensing can be used to investigate both dark matter and dark energy but requires accurate measurements of the shapes of faint, distant galaxies. Such measurements are hindered by the finite resolution and pixel scale of digital cameras. We investigate the optimum choice of pixel scale for a space-based mission, using the engineering model and survey strategy of the proposed Supernova Acceleration Probe as a baseline. We do this by simulating realistic astronomical images containing a known input shear signal and then attempting to recover the signal using the Rhodes, Refregier, and Groth algorithm. We find that the quality of shear measurement is always improved by smaller pixels. However, in practice, telescopes are usually limited to a finite number of pixels and operational life span, so the total area of a survey increases with pixel size. We therefore fix the survey lifetime and the number of pixels in the focal plane while varying the pixel scale, thereby effectively varying the survey size. In a pure trade-off for image resolution versus survey area, we find that measurements of the matter power spectrum would have minimum statistical error with a pixel scale of 0.09' for a 0.14' FWHM point-spread function (PSF). The pixel scale could be increased to 0.16' if images dithered by exactly half-pixel offsets were always available. Some of our results do depend on our adopted shape measurement method and should be regarded as an upper limit: future pipelines may require smaller pixels to overcome systematic floors not yet accessible, and, in certain circumstances, measuring the shape of the PSF might be more difficult than those of galaxies. However, the relative trends in our analysis are robust, especially those of the surface density of resolved galaxies. Our approach thus provides a snapshot of potential in available technology, and a practical counterpart to analytic studies of pixelation, which necessarily assume an idealized shape

  19. The FE-I4 Pixel Readout Chip and the IBL Module

    SciTech Connect

    Barbero, Marlon; Arutinov, David; Backhaus, Malte; Fang, Xiao-Chao; Gonella, Laura; Hemperek, Tomasz; Karagounis, Michael; Hans, Kruger; Kruth, Andre; Wermes, Norbert; Breugnon, Patrick; Fougeron, Denis; Gensolen, Fabrice; Menouni, Mohsine; Rozanov, Alexander; Beccherle, Roberto; Darbo, Giovanni; Caminada, Lea; Dube, Sourabh; Fleury, Julien; Gnani, Dario; /LBL, Berkeley /NIKHEF, Amsterdam /Gottingen U. /SLAC

    2012-05-01

    FE-I4 is the new ATLAS pixel readout chip for the upgraded ATLAS pixel detector. Designed in a CMOS 130 nm feature size process, the IC is able to withstand higher radiation levels compared to the present generation of ATLAS pixel Front-End FE-I3, and can also cope with higher hit rate. It is thus suitable for intermediate radii pixel detector layers in the High Luminosity LHC environment, but also for the inserted layer at 3.3 cm known as the 'Insertable B-Layer' project (IBL), at a shorter timescale. In this paper, an introduction to the FE-I4 will be given, focusing on test results from the first full size FE-I4A prototype which has been available since fall 2010. The IBL project will be introduced, with particular emphasis on the FE-I4-based module concept.

  20. Pixel-level A/D conversion using voltage reset technique

    NASA Astrophysics Data System (ADS)

    Minzeng, Li; Fule, Li; Chun, Zhang; Zhihua, Wang

    2014-11-01

    This paper presents a 50 Hz 15-bit analog-to-digital converter (ADC) for pixel-level implementation in CMOS image sensors. The ADC is based on charge packets counting and adopts a voltage reset technique to inject charge packets. The core circuit for charge/pulse conversion is specially optimized for low power, low noise and small area. An experimental chip with ten pixel-level ADCs has been fabricated and tested for verification. The measurement result shows a standard deviation of 1.8 LSB for full-scale output. The ADC has an area of 45 × 45 μm2 and consumes less than 2 μW in a standard 1P-6M 0.18 μm CMOS process.

  1. A memristor-based pixel implementing light-to-resistance conversion

    NASA Astrophysics Data System (ADS)

    Olumodeji, Olufemi A.; Bramanti, Alessandro P.; Gottardi, Massimo; Iannotta, Salvatore

    2016-02-01

    This letter reports a pixel architecture that implements a light-to-resistance encoder exploiting the properties of a memristor. A light-to-frequency (L2F) converter is adopted to drive a memristor with pulses, thus changing its resistance according with the light intensity. In a conventional L2F implementation, a binary counter is needed to store the number of pulses generated within the exposure time (Ti). In the proposed circuit, the binary counter has been replaced with an analog counterpart, made of a single memristor. This turns into a smaller pixel pitch, compared with an all-CMOS solution and analog nonvolatile characteristics. The proposed circuit has been simulated in a 3.3 V, 0.35 μm CMOS process, while the memristor behavior relies on the HP model.

  2. Radiation Tolerance Studies of BTeV Pixel Readout Chip Prototypes

    SciTech Connect

    Gabriele Chiodini et al.

    2001-09-11

    We report on several irradiation studies performed on BTeV preFPIX2 pixel readout chip prototypes exposed to a 200 MeV proton beam at the Indiana University Cyclotron Facility. The preFPIX2 pixel readout chip has been implemented in standard 0.25 micron CMOS technology following radiation tolerant design rules. The tests confirmed the radiation tolerance of the chip design to proton total dose of 26 MRad. In addition, non destructive radiation-induced single event upsets have been observed in on-chip static registers and the single bit upset cross section has been measured.

  3. Precision of FLEET Velocimetry Using High-speed CMOS Camera Systems

    NASA Technical Reports Server (NTRS)

    Peters, Christopher J.; Danehy, Paul M.; Bathel, Brett F.; Jiang, Naibo; Calvert, Nathan D.; Miles, Richard B.

    2015-01-01

    Femtosecond laser electronic excitation tagging (FLEET) is an optical measurement technique that permits quantitative velocimetry of unseeded air or nitrogen using a single laser and a single camera. In this paper, we seek to determine the fundamental precision of the FLEET technique using high-speed complementary metal-oxide semiconductor (CMOS) cameras. Also, we compare the performance of several different high-speed CMOS camera systems for acquiring FLEET velocimetry data in air and nitrogen free-jet flows. The precision was defined as the standard deviation of a set of several hundred single-shot velocity measurements. Methods of enhancing the precision of the measurement were explored such as digital binning (similar in concept to on-sensor binning, but done in post-processing), row-wise digital binning of the signal in adjacent pixels and increasing the time delay between successive exposures. These techniques generally improved precision; however, binning provided the greatest improvement to the un-intensified camera systems which had low signal-to-noise ratio. When binning row-wise by 8 pixels (about the thickness of the tagged region) and using an inter-frame delay of 65 micro sec, precisions of 0.5 m/s in air and 0.2 m/s in nitrogen were achieved. The camera comparison included a pco.dimax HD, a LaVision Imager scientific CMOS (sCMOS) and a Photron FASTCAM SA-X2, along with a two-stage LaVision High Speed IRO intensifier. Excluding the LaVision Imager sCMOS, the cameras were tested with and without intensification and with both short and long inter-frame delays. Use of intensification and longer inter-frame delay generally improved precision. Overall, the Photron FASTCAM SA-X2 exhibited the best performance in terms of greatest precision and highest signal-to-noise ratio primarily because it had the largest pixels.

  4. Precision of FLEET Velocimetry Using High-Speed CMOS Camera Systems

    NASA Technical Reports Server (NTRS)

    Peters, Christopher J.; Danehy, Paul M.; Bathel, Brett F.; Jiang, Naibo; Calvert, Nathan D.; Miles, Richard B.

    2015-01-01

    Femtosecond laser electronic excitation tagging (FLEET) is an optical measurement technique that permits quantitative velocimetry of unseeded air or nitrogen using a single laser and a single camera. In this paper, we seek to determine the fundamental precision of the FLEET technique using high-speed complementary metal-oxide semiconductor (CMOS) cameras. Also, we compare the performance of several different high-speed CMOS camera systems for acquiring FLEET velocimetry data in air and nitrogen free-jet flows. The precision was defined as the standard deviation of a set of several hundred single-shot velocity measurements. Methods of enhancing the precision of the measurement were explored such as digital binning (similar in concept to on-sensor binning, but done in post-processing), row-wise digital binning of the signal in adjacent pixels and increasing the time delay between successive exposures. These techniques generally improved precision; however, binning provided the greatest improvement to the un-intensified camera systems which had low signal-to-noise ratio. When binning row-wise by 8 pixels (about the thickness of the tagged region) and using an inter-frame delay of 65 microseconds, precisions of 0.5 meters per second in air and 0.2 meters per second in nitrogen were achieved. The camera comparison included a pco.dimax HD, a LaVision Imager scientific CMOS (sCMOS) and a Photron FASTCAM SA-X2, along with a two-stage LaVision HighSpeed IRO intensifier. Excluding the LaVision Imager sCMOS, the cameras were tested with and without intensification and with both short and long inter-frame delays. Use of intensification and longer inter-frame delay generally improved precision. Overall, the Photron FASTCAM SA-X2 exhibited the best performance in terms of greatest precision and highest signal-to-noise ratio primarily because it had the largest pixels.

  5. Self-amplified CMOS image sensor using a current-mode readout circuit

    NASA Astrophysics Data System (ADS)

    Santos, Patrick M.; de Lima Monteiro, Davies W.; Pittet, Patrick

    2014-05-01

    The feature size of the CMOS processes decreased during the past few years and problems such as reduced dynamic range have become more significant in voltage-mode pixels, even though the integration of more functionality inside the pixel has become easier. This work makes a contribution on both sides: the possibility of a high signal excursion range using current-mode circuits together with functionality addition by making signal amplification inside the pixel. The classic 3T pixel architecture was rebuild with small modifications to integrate a transconductance amplifier providing a current as an output. The matrix with these new pixels will operate as a whole large transistor outsourcing an amplified current that will be used for signal processing. This current is controlled by the intensity of the light received by the matrix, modulated pixel by pixel. The output current can be controlled by the biasing circuits to achieve a very large range of output signal levels. It can also be controlled with the matrix size and this permits a very high degree of freedom on the signal level, observing the current densities inside the integrated circuit. In addition, the matrix can operate at very small integration times. Its applications would be those in which fast imaging processing, high signal amplification are required and low resolution is not a major problem, such as UV image sensors. Simulation results will be presented to support: operation, control, design, signal excursion levels and linearity for a matrix of pixels that was conceived using this new concept of sensor.

  6. A CMOS floating point multiplier

    NASA Astrophysics Data System (ADS)

    Uya, M.; Kaneko, K.; Yasui, J.

    1984-10-01

    This paper describes a 32-bit CMOS floating point multiplier. The chip can perform 32-bit floating point multiplication (based on the proposed IEEE Standard format) and 24-bit fixed point multiplication (two's complement format) in less than 78.7 and 71.1 ns, respectively, and the typical power dissipation is 195 mW at 10 million operations per second. High-speed multiplication techniques - a modified Booth's allgorithm, a carry save adder scheme, a high-speed CMOS full adder, and a modified carry select adder - are used to achieve the above high performance. The chip is designed for compatibility with 16-bit microcomputer systems, and is fabricated in 2 micron n-well CMOS technology; it contains about 23000 transistors of 5.75 x 5.67 sq mm in size.

  7. Design methodology: edgeless 3D ASICs with complex in-pixel processing for pixel detectors

    SciTech Connect

    Fahim Farah, Fahim Farah; Deptuch, Grzegorz W.; Hoff, James R.; Mohseni, Hooman

    2015-08-28

    The design methodology for the development of 3D integrated edgeless pixel detectors with in-pixel processing using Electronic Design Automation (EDA) tools is presented. A large area 3 tier 3D detector with one sensor layer and two ASIC layers containing one analog and one digital tier, is built for x-ray photon time of arrival measurement and imaging. A full custom analog pixel is 65μm x 65μm. It is connected to a sensor pixel of the same size on one side, and on the other side it has approximately 40 connections to the digital pixel. A 32 x 32 edgeless array without any peripheral functional blocks constitutes a sub-chip. The sub-chip is an indivisible unit, which is further arranged in a 6 x 6 array to create the entire 1.248cm x 1.248cm ASIC. Each chip has 720 bump-bond I/O connections, on the back of the digital tier to the ceramic PCB. All the analog tier power and biasing is conveyed through the digital tier from the PCB. The assembly has no peripheral functional blocks, and hence the active area extends to the edge of the detector. This was achieved by using a few flavors of almost identical analog pixels (minimal variation in layout) to allow for peripheral biasing blocks to be placed within pixels. The 1024 pixels within a digital sub-chip array have a variety of full custom, semi-custom and automated timing driven functional blocks placed together. The methodology uses a modified mixed-mode on-top digital implementation flow to not only harness the tool efficiency for timing and floor-planning but also to maintain designer control over compact parasitically aware layout. The methodology uses the Cadence design platform, however it is not limited to this tool.

  8. Design considerations for a new high resolution Micro-Angiographic Fluoroscope based on a CMOS sensor (MAF-CMOS)

    NASA Astrophysics Data System (ADS)

    Loughran, Brendan; Swetadri Vasan, S. N.; Singh, Vivek; Ionita, Ciprian N.; Jain, Amit; Bednarek, Daniel R.; Titus, Albert H.; Rudin, Stephen

    2013-03-01

    The detectors that are used for endovascular image-guided interventions (EIGI), particularly for neurovascular interventions, do not provide clinicians with adequate visualization to ensure the best possible treatment outcomes. Developing an improved x-ray imaging detector requires the determination of estimated clinical x-ray entrance exposures to the detector. The range of exposures to the detector in clinical studies was found for the three modes of operation: fluoroscopic mode, high frame-rate digital angiographic mode (HD fluoroscopic mode), and DSA mode. Using these estimated detector exposure ranges and available CMOS detector technical specifications, design requirements were developed to pursue a quantum limited, high resolution, dynamic x-ray detector based on a CMOS sensor with 50 μm pixel size. For the proposed MAF-CMOS, the estimated charge collected within the full exposure range was found to be within the estimated full well capacity of the pixels. Expected instrumentation noise for the proposed detector was estimated to be 50-1,300 electrons. Adding a gain stage such as a light image intensifier would minimize the effect of the estimated instrumentation noise on total image noise but may not be necessary to ensure quantum limited detector operation at low exposure levels. A recursive temporal filter may decrease the effective total noise by 2 to 3 times, allowing for the improved signal to noise ratios at the lowest estimated exposures despite consequent loss in temporal resolution. This work can serve as a guide for further development of dynamic x-ray imaging prototypes or improvements for existing dynamic x-ray imaging systems.

  9. Design considerations for a new, high resolution Micro-Angiographic Fluoroscope based on a CMOS sensor (MAF-CMOS).

    PubMed

    Loughran, Brendan; Swetadri Vasan, S N; Singh, Vivek; Ionita, Ciprian N; Jain, Amit; Bednarek, Daniel R; Titus, Albert; Rudin, Stephen

    2013-03-06

    The detectors that are used for endovascular image-guided interventions (EIGI), particularly for neurovascular interventions, do not provide clinicians with adequate visualization to ensure the best possible treatment outcomes. Developing an improved x-ray imaging detector requires the determination of estimated clinical x-ray entrance exposures to the detector. The range of exposures to the detector in clinical studies was found for the three modes of operation: fluoroscopic mode, high frame-rate digital angiographic mode (HD fluoroscopic mode), and DSA mode. Using these estimated detector exposure ranges and available CMOS detector technical specifications, design requirements were developed to pursue a quantum limited, high resolution, dynamic x-ray detector based on a CMOS sensor with 50 μm pixel size. For the proposed MAF-CMOS, the estimated charge collected within the full exposure range was found to be within the estimated full well capacity of the pixels. Expected instrumentation noise for the proposed detector was estimated to be 50-1,300 electrons. Adding a gain stage such as a light image intensifier would minimize the effect of the estimated instrumentation noise on total image noise but may not be necessary to ensure quantum limited detector operation at low exposure levels. A recursive temporal filter may decrease the effective total noise by 2 to 3 times, allowing for the improved signal to noise ratios at the lowest estimated exposures despite consequent loss in temporal resolution. This work can serve as a guide for further development of dynamic x-ray imaging prototypes or improvements for existing dynamic x-ray imaging systems.

  10. An Ultra-Low Power CMOS Image Sensor with On-Chip Energy Harvesting and Power Management Capability

    PubMed Central

    Cevik, Ismail; Huang, Xiwei; Yu, Hao; Yan, Mei; Ay, Suat U.

    2015-01-01

    An ultra-low power CMOS image sensor with on-chip energy harvesting and power management capability is introduced in this paper. The photodiode pixel array can not only capture images but also harvest solar energy. As such, the CMOS image sensor chip is able to switch between imaging and harvesting modes towards self-power operation. Moreover, an on-chip maximum power point tracking (MPPT)-based power management system (PMS) is designed for the dual-mode image sensor to further improve the energy efficiency. A new isolated P-well energy harvesting and imaging (EHI) pixel with very high fill factor is introduced. Several ultra-low power design techniques such as reset and select boosting techniques have been utilized to maintain a wide pixel dynamic range. The chip was designed and fabricated in a 1.8 V, 1P6M 0.18 µm CMOS process. Total power consumption of the imager is 6.53 µW for a 96 × 96 pixel array with 1 V supply and 5 fps frame rate. Up to 30 μW of power could be generated by the new EHI pixels. The PMS is capable of providing 3× the power required during imaging mode with 50% efficiency allowing energy autonomous operation with a 72.5% duty cycle. PMID:25756863

  11. An ultra-low power CMOS image sensor with on-chip energy harvesting and power management capability.

    PubMed

    Cevik, Ismail; Huang, Xiwei; Yu, Hao; Yan, Mei; Ay, Suat U

    2015-03-06

    An ultra-low power CMOS image sensor with on-chip energy harvesting and power management capability is introduced in this paper. The photodiode pixel array can not only capture images but also harvest solar energy. As such, the CMOS image sensor chip is able to switch between imaging and harvesting modes towards self-power operation. Moreover, an on-chip maximum power point tracking (MPPT)-based power management system (PMS) is designed for the dual-mode image sensor to further improve the energy efficiency. A new isolated P-well energy harvesting and imaging (EHI) pixel with very high fill factor is introduced. Several ultra-low power design techniques such as reset and select boosting techniques have been utilized to maintain a wide pixel dynamic range. The chip was designed and fabricated in a 1.8 V, 1P6M 0.18 µm CMOS process. Total power consumption of the imager is 6.53 µW for a 96 × 96 pixel array with 1 V supply and 5 fps frame rate. Up to 30 μW of power could be generated by the new EHI pixels. The PMS is capable of providing 3× the power required during imaging mode with 50% efficiency allowing energy autonomous operation with a 72.5% duty cycle.

  12. THE KEPLER PIXEL RESPONSE FUNCTION

    SciTech Connect

    Bryson, Stephen T.; Haas, Michael R.; Dotson, Jessie L.; Koch, David G.; Borucki, William J.; Tenenbaum, Peter; Jenkins, Jon M.; Chandrasekaran, Hema; Caldwell, Douglas A.; Klaus, Todd; Gilliland, Ronald L.

    2010-04-20

    Kepler seeks to detect sequences of transits of Earth-size exoplanets orbiting solar-like stars. Such transit signals are on the order of 100 ppm. The high photometric precision demanded by Kepler requires detailed knowledge of how the Kepler pixels respond to starlight during a nominal observation. This information is provided by the Kepler pixel response function (PRF), defined as the composite of Kepler's optical point-spread function, integrated spacecraft pointing jitter during a nominal cadence and other systematic effects. To provide sub-pixel resolution, the PRF is represented as a piecewise-continuous polynomial on a sub-pixel mesh. This continuous representation allows the prediction of a star's flux value on any pixel given the star's pixel position. The advantages and difficulties of this polynomial representation are discussed, including characterization of spatial variation in the PRF and the smoothing of discontinuities between sub-pixel polynomial patches. On-orbit super-resolution measurements of the PRF across the Kepler field of view are described. Two uses of the PRF are presented: the selection of pixels for each star that maximizes the photometric signal-to-noise ratio for that star, and PRF-fitted centroids which provide robust and accurate stellar positions on the CCD, primarily used for attitude and plate scale tracking. Good knowledge of the PRF has been a critical component for the successful collection of high-precision photometry by Kepler.

  13. CMOS Integrated Carbon Nanotube Sensor

    SciTech Connect

    Perez, M. S.; Lerner, B.; Boselli, A.; Lamagna, A.; Obregon, P. D. Pareja; Julian, P. M.; Mandolesi, P. S.; Buffa, F. A.

    2009-05-23

    Recently carbon nanotubes (CNTs) have been gaining their importance as sensors for gases, temperature and chemicals. Advances in fabrication processes simplify the formation of CNT sensor on silicon substrate. We have integrated single wall carbon nanotubes (SWCNTs) with complementary metal oxide semiconductor process (CMOS) to produce a chip sensor system. The sensor prototype was designed and fabricated using a 0.30 um CMOS process. The main advantage is that the device has a voltage amplifier so the electrical measure can be taken and amplified inside the sensor. When the conductance of the SWCNTs varies in response to media changes, this is observed as a variation in the output tension accordingly.

  14. Multiple-samples-method enabling high dynamic range imaging for high frame rate CMOS image sensor by FPGA and co-processor

    NASA Astrophysics Data System (ADS)

    Jacquot, Blake C.; Johnson-Williams, Nathan

    2014-09-01

    We present results from a prototype CMOS camera system implementing a multiple sampled pixel level algorithm ("Last Sample Before Saturation") to create High-Dynamic Range (HDR) images that approach the dynamic range of CCDs. The system is built around a commercial 1280 × 1024 CMOS image sensor with 10-bits per pixel and up to 500 Hz full frame rate with higher frame rates available through windowing. We analyze imagery data collected at room temperature for SNR versus photocurrent, among other figures of merit. Results conform to expectations of a model that uses only dark current, read noise, and photocurrent as input parameters.

  15. Experimental and theoretical performance analysis for a CMOS-based high resolution image detector

    PubMed Central

    Jain, Amit; Bednarek, Daniel R.; Rudin, Stephen

    2014-01-01

    Increasing complexity of endovascular interventional procedures requires superior x-ray imaging quality. Present state-of-the-art x-ray imaging detectors may not be adequate due to their inherent noise and resolution limitations. With recent developments, CMOS based detectors are presenting an option to fulfill the need for better image quality. For this work, a new CMOS detector has been analyzed experimentally and theoretically in terms of sensitivity, MTF and DQE. The detector (Dexela Model 1207, Perkin-Elmer Co., London, UK) features 14-bit image acquisition, a CsI phosphor, 75 µm pixels and an active area of 12 cm × 7 cm with over 30 fps frame rate. This detector has two modes of operations with two different full-well capacities: high and low sensitivity. The sensitivity and instrumentation noise equivalent exposure (INEE) were calculated for both modes. The detector modulation-transfer function (MTF), noise-power spectra (NPS) and detective quantum efficiency (DQE) were measured using an RQA5 spectrum. For the theoretical performance evaluation, a linear cascade model with an added aliasing stage was used. The detector showed excellent linearity in both modes. The sensitivity and the INEE of the detector were found to be 31.55 DN/µR and 0.55 µR in high sensitivity mode, while they were 9.87 DN/µR and 2.77 µR in low sensitivity mode. The theoretical and experimental values for the MTF and DQE showed close agreement with good DQE even at fluoroscopic exposure levels. In summary, the Dexela detector's imaging performance in terms of sensitivity, linear system metrics, and INEE demonstrates that it can overcome the noise and resolution limitations of present state-of-the-art x-ray detectors. PMID:25300571

  16. Experimental and theoretical performance analysis for a CMOS-based high resolution image detector

    NASA Astrophysics Data System (ADS)

    Jain, Amit; Bednarek, Daniel R.; Rudin, Stephen

    2014-03-01

    Increasing complexity of endovascular interventional procedures requires superior x-ray imaging quality. Present stateof- the-art x-ray imaging detectors may not be adequate due to their inherent noise and resolution limitations. With recent developments, CMOS based detectors are presenting an option to fulfill the need for better image quality. For this work, a new CMOS detector has been analyzed experimentally and theoretically in terms of sensitivity, MTF and DQE. The detector (Dexela Model 1207, Perkin-Elmer Co., London, UK) features 14-bit image acquisition, a CsI phosphor, 75 μm pixels and an active area of 12 cm x 7 cm with over 30 fps frame rate. This detector has two modes of operations with two different full-well capacities: high and low sensitivity. The sensitivity and instrumentation noise equivalent exposure (INEE) were calculated for both modes. The detector modulation-transfer function (MTF), noise-power spectra (NPS) and detective quantum efficiency (DQE) were measured using an RQA5 spectrum. For the theoretical performance evaluation, a linear cascade model with an added aliasing stage was used. The detector showed excellent linearity in both modes. The sensitivity and the INEE of the detector were found to be 31.55 DN/μR and 0.55 μR in high sensitivity mode, while they were 9.87 DN/μR and 2.77 μR in low sensitivity mode. The theoretical and experimental values for the MTF and DQE showed close agreement with good DQE even at fluoroscopic exposure levels. In summary, the Dexela detector's imaging performance in terms of sensitivity, linear system metrics, and INEE demonstrates that it can overcome the noise and resolution limitations of present state-of-the-art x-ray detectors.

  17. Experimental and theoretical performance analysis for a CMOS-based high resolution image detector.

    PubMed

    Jain, Amit; Bednarek, Daniel R; Rudin, Stephen

    2014-03-19

    Increasing complexity of endovascular interventional procedures requires superior x-ray imaging quality. Present state-of-the-art x-ray imaging detectors may not be adequate due to their inherent noise and resolution limitations. With recent developments, CMOS based detectors are presenting an option to fulfill the need for better image quality. For this work, a new CMOS detector has been analyzed experimentally and theoretically in terms of sensitivity, MTF and DQE. The detector (Dexela Model 1207, Perkin-Elmer Co., London, UK) features 14-bit image acquisition, a CsI phosphor, 75 µm pixels and an active area of 12 cm × 7 cm with over 30 fps frame rate. This detector has two modes of operations with two different full-well capacities: high and low sensitivity. The sensitivity and instrumentation noise equivalent exposure (INEE) were calculated for both modes. The detector modulation-transfer function (MTF), noise-power spectra (NPS) and detective quantum efficiency (DQE) were measured using an RQA5 spectrum. For the theoretical performance evaluation, a linear cascade model with an added aliasing stage was used. The detector showed excellent linearity in both modes. The sensitivity and the INEE of the detector were found to be 31.55 DN/µR and 0.55 µR in high sensitivity mode, while they were 9.87 DN/µR and 2.77 µR in low sensitivity mode. The theoretical and experimental values for the MTF and DQE showed close agreement with good DQE even at fluoroscopic exposure levels. In summary, the Dexela detector's imaging performance in terms of sensitivity, linear system metrics, and INEE demonstrates that it can overcome the noise and resolution limitations of present state-of-the-art x-ray detectors.

  18. Solid-state image sensor with focal-plane digital photon-counting pixel array

    NASA Technical Reports Server (NTRS)

    Fossum, Eric R. (Inventor); Pain, Bedabrata (Inventor)

    1995-01-01

    A photosensitive layer such as a-Si for a UV/visible wavelength band is provided for low light level imaging with at least a separate CMOS amplifier directly connected to each PIN photodetector diode to provide a focal-plane array of NxN pixels, and preferably a separate photon-counting CMOS circuit directly connected to each CMOS amplifier, although one row of counters may be time shared for reading out the photon flux rate of each diode in the array, together with a buffer memory for storing all rows of the NxN image frame before transfer to suitable storage. All CMOS circuitry is preferably fabricated in the same silicon layer as the PIN photodetector diode for a monolithic structure, but when the wavelength band of interest requires photosensitive material different from silicon, the focal-plane array may be fabricated separately on a different semiconductor layer bump-bonded or otherwise bonded for a virtually monolithic structure with one free terminal of each diode directly connected to the input terminal of its CMOS amplifier and digital counter for integration of the photon flux rate at each photodetector of the array.

  19. PIXELS: Using field-based learning to investigate students' concepts of pixels and sense of scale

    NASA Astrophysics Data System (ADS)

    Pope, A.; Tinigin, L.; Petcovic, H. L.; Ormand, C. J.; LaDue, N.

    2015-12-01

    Empirical work over the past decade supports the notion that a high level of spatial thinking skill is critical to success in the geosciences. Spatial thinking incorporates a host of sub-skills such as mentally rotating an object, imagining the inside of a 3D object based on outside patterns, unfolding a landscape, and disembedding critical patterns from background noise. In this study, we focus on sense of scale, which refers to how an individual quantified space, and is thought to develop through kinesthetic experiences. Remote sensing data are increasingly being used for wide-reaching and high impact research. A sense of scale is critical to many areas of the geosciences, including understanding and interpreting remotely sensed imagery. In this exploratory study, students (N=17) attending the Juneau Icefield Research Program participated in a 3-hour exercise designed to study how a field-based activity might impact their sense of scale and their conceptions of pixels in remotely sensed imagery. Prior to the activity, students had an introductory remote sensing lecture and completed the Sense of Scale inventory. Students walked and/or skied the perimeter of several pixel types, including a 1 m square (representing a WorldView sensor's pixel), a 30 m square (a Landsat pixel) and a 500 m square (a MODIS pixel). The group took reflectance measurements using a field radiometer as they physically traced out the pixel. The exercise was repeated in two different areas, one with homogenous reflectance, and another with heterogeneous reflectance. After the exercise, students again completed the Sense of Scale instrument and a demographic survey. This presentation will share the effects and efficacy of the field-based intervention to teach remote sensing concepts and to investigate potential relationships between students' concepts of pixels and sense of scale.

  20. From Pixels to Planets

    NASA Technical Reports Server (NTRS)

    Brownston, Lee; Jenkins, Jon M.

    2015-01-01

    The Kepler Mission was launched in 2009 as NASAs first mission capable of finding Earth-size planets in the habitable zone of Sun-like stars. Its telescope consists of a 1.5-m primary mirror and a 0.95-m aperture. The 42 charge-coupled devices in its focal plane are read out every half hour, compressed, and then downlinked monthly. After four years, the second of four reaction wheels failed, ending the original mission. Back on earth, the Science Operations Center developed the Science Pipeline to analyze about 200,000 target stars in Keplers field of view, looking for evidence of periodic dimming suggesting that one or more planets had crossed the face of its host star. The Pipeline comprises several steps, from pixel-level calibration, through noise and artifact removal, to detection of transit-like signals and the construction of a suite of diagnostic tests to guard against false positives. The Kepler Science Pipeline consists of a pipeline infrastructure written in the Java programming language, which marshals data input to and output from MATLAB applications that are executed as external processes. The pipeline modules, which underwent continuous development and refinement even after data started arriving, employ several analytic techniques, many developed for the Kepler Project. Because of the large number of targets, the large amount of data per target and the complexity of the pipeline algorithms, the processing demands are daunting. Some pipeline modules require days to weeks to process all of their targets, even when run on NASA's 128-node Pleiades supercomputer. The software developers are still seeking ways to increase the throughput. To date, the Kepler project has discovered more than 4000 planetary candidates, of which more than 1000 have been independently confirmed or validated to be exoplanets. Funding for this mission is provided by NASAs Science Mission Directorate.

  1. High-dynamic-range pixel architectures for diagnostic medical imaging

    NASA Astrophysics Data System (ADS)

    Karim, Karim S.; Yin, Sherman; Nathan, Arokia; Rowlands, John A.

    2004-05-01

    One approach to increase pixel signal-to-noise ratio (SNR) in low noise digital fluoroscopy is to employ in-situ pixel amplification via current-mediated active pixel sensors (C-APS). Experiments reveal a reduction in readout noise and indicate that an a-Si C-APS, coupled together with an established X-ray detection technology such as amorphous selenium (a-Se), can meet the stringent requirements (of < 1000 noise electrons) for digital X-ray fluoroscopy. A challenge with the C-APS circuit is the presence of a small-signal input linearity constraint. While using such a pixel amplifier for real-time fluoroscopy (where the exposure level is small) is feasible, the voltage change at the amplifier input is much higher in chest radiography or mammography due to the larger X-ray exposure levels. The larger input voltage causes the C-APS output to be non-linear thus reducing the pixel dynamic range. In addition, the resulting larger pixel output current causes the external column amplifier to saturate further reducing the pixel dynamic range. In this research, we investigate two alternate amplified pixel architectures that exhibit higher dynamic range. The test pixels are designed and simulated using an a-Si TFT model implemented in Verilog-A and results indicate a linear performance, high dynamic range, and a programmable circuit gain via choice of supply voltage and sampling time. These high dynamic range pixel architectures have the potential to enable a large area, active matrix flat panel imager (AMFPI) to switch instantly between low exposure, fluoroscopic imaging and higher exposure radiographic imaging modes. Lastly, the high dynamic range pixel circuits are suitable for integration with on-panel multiplexers for both gate and data lines, which can further reduce circuit complexity.

  2. Reliability in CMOS IC processing

    NASA Technical Reports Server (NTRS)

    Shreeve, R.; Ferrier, S.; Hall, D.; Wang, J.

    1990-01-01

    Critical CMOS IC processing reliability monitors are defined in this paper. These monitors are divided into three categories: process qualifications, ongoing production workcell monitors, and ongoing reliability monitors. The key measures in each of these categories are identified and prioritized based on their importance.

  3. Development of CMOS integrated circuits

    NASA Technical Reports Server (NTRS)

    Bertino, F.; Feller, A.; Greenhouse, J.; Lombardi, T.; Merriam, A.; Noto, R.; Ozga, S.; Pryor, R.; Ramondetta, P.; Smith, A.

    1979-01-01

    Report documents life cycles of two custom CMOS integrated circuits: (1) 4-bit multiplexed register with shift left and shift right capabilities, and (2) dual 4-bit registers. Cycles described include conception as logic diagrams through design, fabrication, testing, and delivery.

  4. Pixel telescope test in STAR at RHIC

    NASA Astrophysics Data System (ADS)

    Sun, Xiangming; Szelezniak, Michal; Greiner, Leo; Matis, Howard; Vu, Chinh; Stezelberger, Thorsten; Wieman, Howard

    2007-10-01

    The STAR experiment at RHIC is designing a new inner vertex detector called the Heavy Flavor Tracker (HFT). The HFT's innermost two layers is called the PIXEL detector which uses Monolithic Active Pixel Sensor technology (MAPS). To test the MAPS technology, we just constructed and tested a telescope. The telescope uses a stack of three MIMOSTAR2 chips, Each MIMOSTAR2 sensor, which was designed by IPHC, is an array of 132x128 pixels with a square pixel size of 30 μ. The readout of the telescope makes use of the ALICE DDL/SIU cards, which is compatible with the future STAR data acquisition system called DAQ1000. The telescope was first studied in a 1.2 GeV/c electron beam at LBNL's Advanced Light Source. Afterwards, the telescope was outside the STAR magnet, and then later inside it, 145 cm away from STAR's center. We will describe this first test of MAPS technology in a collider environment, and report on the occupancy, particle flux, and performance of the telescope.

  5. Implementation of pixel level digital TDI for scanning type LWIR FPAs

    NASA Astrophysics Data System (ADS)

    Ceylan, Omer; Kayahan, Huseyin; Yazici, Melik; Afridi, Sohaib; Shafique, Atia; Gurbuz, Yasar

    2014-07-01

    Implementation of a CMOS digital readout integrated circuit (DROIC) based on pixel level digital time delay integration (TDI) for scanning type LWIR focal plane arrays (FPAs) is presented. TDI is implemented on 8 pixels with over sampling rate of 3. Analog signal integrated on integration capacitor is converted to digital domain in pixel, and digital data is transferred to TDI summation counters, where contributions of 8 pixels are added. Output data is 16 bit, where 8 bits are allocated for most significant bits and 8 bits for least significant bits. Control block of the ROIC, which is responsible of generating timing diagram for switches controlling the pixels and summation counters, is realized with VerilogHDL. Summation counters and parallel-to-serial converter to convert 16 bit parallel output data to single bit output are also realized with Verilog HDL. Synthesized verilog netlists are placed&routed and combined with analog under-pixel part of the design. Quantization noise of analog-to-digital conversion is less than 500e-. Since analog signal is converted to digital domain in-pixel, inaccuracies due to analog signal routing over large chip area is eliminated. ROIC is fabricated with 0.18μm CMOS process and chip area is 10mm2. Post-layout simulation results of the implemented design are presented. ROIC is programmable through serial or parallel interface. Input referred noise of ROIC is less than 750 rms electron, while power consumption is less than 30mW. ROIC is designed to perform in cryogenic temperatures.

  6. The phase II ATLAS Pixel upgrade: the Inner Tracker (ITk)

    NASA Astrophysics Data System (ADS)

    Flick, T.

    2017-01-01

    The entire tracking system of the ATLAS experiment will be replaced during the LHC Phase II shutdown (foreseen to take place around 2025) by an all-silicon detector called the ITk (Inner Tracker). The pixel detector will comprise the five innermost layers, and will be instrumented with new sensor and readout electronics technologies to improve the tracking performance and cope with the HL-LHC environment, which will be severe in terms of occupancy and radiation. Several layout options are being investigated. All of these include a barrel part and ring-shaped supports in the endcap regions. All structures will be based on low mass, highly stable and highly thermally conductive carbon-based materials cooled by evaporative carbon dioxide. Different designs of planar, 3D, and CMOS sensors are being investigated to identify the optimal technology for the different pixel layers. While the RD53 Collaboration is developing the new readout chip, the pixel off-detector readout electronics will be implemented in the framework of the general ATLAS trigger and DAQ system. A readout speed of up to 5 Gbit/s per data link (FE-chip) will be needed in the innermost layers going down to 640 Mbit/s for the outermost. This paper presents an overview of the different components of the ITk and the current status of the developments.

  7. A beam monitor using silicon pixel sensors for hadron therapy

    NASA Astrophysics Data System (ADS)

    Wang, Zhen; Zou, Shuguang; Fan, Yan; Liu, Jun; Sun, Xiangming; Wang, Dong; Kang, Huili; Sun, Daming; Yang, Ping; Pei, Hua; Huang, Guangming; Xu, Nu; Gao, Chaosong; Xiao, Le

    2017-03-01

    We report the design and test results of a beam monitor developed for online monitoring in hadron therapy. The beam monitor uses eight silicon pixel sensors, Topmetal-II-, as the anode array. Topmetal-II- is a charge sensor designed in a CMOS 0.35 μm technology. Each Topmetal-II- sensor has 72×72 pixels and the pixel size is 83×83 μm2. In our design, the beam passes through the beam monitor without hitting the electrodes, making the beam monitor especially suitable for monitoring heavy ion beams. This design also reduces radiation damage to the beam monitor itself. The beam monitor is tested with a carbon ion beam at the Heavy Ion Research Facility in Lanzhou (HIRFL). Results indicate that the beam monitor can measure position, incidence angle and intensity of the beam with a position resolution better than 20 μm, angular resolution about 0.5° and intensity statistical accuracy better than 2%.

  8. Improved Signal Chains for Readout of CMOS Imagers

    NASA Technical Reports Server (NTRS)

    Pain, Bedabrata; Hancock, Bruce; Cunningham, Thomas

    2009-01-01

    An improved generic design has been devised for implementing signal chains involved in readout from complementary metal oxide/semiconductor (CMOS) image sensors and for other readout integrated circuits (ICs) that perform equivalent functions. The design applies to any such IC in which output signal charges from the pixels in a given row are transferred simultaneously into sampling capacitors at the bottoms of the columns, then voltages representing individual pixel charges are read out in sequence by sequentially turning on column-selecting field-effect transistors (FETs) in synchronism with source-follower- or operational-amplifier-based amplifier circuits. The improved design affords the best features of prior source-follower-and operational- amplifier-based designs while overcoming the major limitations of those designs. The limitations can be summarized as follows: a) For a source-follower-based signal chain, the ohmic voltage drop associated with DC bias current flowing through the column-selection FET causes unacceptable voltage offset, nonlinearity, and reduced small-signal gain. b) For an operational-amplifier-based signal chain, the required bias current and the output noise increase superlinearly with size of the pixel array because of a corresponding increase in the effective capacitance of the row bus used to couple the sampled column charges to the operational amplifier. The effect of the bus capacitance is to simultaneously slow down the readout circuit and increase noise through the Miller effect.

  9. Thin n-in-p planar pixel modules for the ATLAS upgrade at HL-LHC

    NASA Astrophysics Data System (ADS)

    Savic, N.; Bergbreiter, L.; Breuer, J.; La Rosa, A.; Macchiolo, A.; Nisius, R.; Terzo, S.

    2017-02-01

    The ATLAS experiment will undergo a major upgrade of the tracker system in view of the high luminosity phase of the LHC (HL-LHC) foreseen to start around 2025. Thin planar pixel modules are promising candidates to instrument the new pixel system, thanks to the reduced contribution to the material budget and their high charge collection efficiency after irradiation. New designs of the pixel cells, with an optimized biasing structure, have been implemented in n-in-p planar pixel productions with sensor thicknesses of 270 μm. Using beam tests, the gain in hit efficiency is investigated as a function of the received irradiation fluence. The outlook for future thin planar pixel sensor productions will be discussed, with a focus on thin sensors with a thickness of 100 and 150 μm and a novel design with the optimized biasing structure and small pixel cells (50×50 and 25×100 μm2). These dimensions are foreseen for the new ATLAS read-out chip in 65 nm CMOS technology and the fine segmentation will represent a challenge for the tracking in the forward region of the pixel system at HL-LHC. To predict the performance of 50×50 μm2 pixels at high η, FE-I4 compatible planar pixel sensors have been studied before and after irradiation in beam tests at high incidence angle with respect to the short pixel direction. Results on cluster shapes, charge collection- and hit efficiency will be shown.

  10. Measurements with MÖNCH, a 25 μm pixel pitch hybrid pixel detector

    NASA Astrophysics Data System (ADS)

    Ramilli, M.; Bergamaschi, A.; Andrae, M.; Brückner, M.; Cartier, S.; Dinapoli, R.; Fröjdh, E.; Greiffenberg, D.; Hutwelker, T.; Lopez-Cuenca, C.; Mezza, D.; Mozzanica, A.; Ruat, M.; Redford, S.; Schmitt, B.; Shi, X.; Tinti, G.; Zhang, J.

    2017-01-01

    MÖNCH is a hybrid silicon pixel detector based on charge integration and with analog readout, featuring a pixel size of 25×25 μm2. The latest working prototype consists of an array of 400×400 identical pixels for a total active area of 1×1 cm2. Its design is optimized for the single photon regime. An exhaustive characterization of this large area prototype has been carried out in the past months, and it confirms an ENC in the order of 35 electrons RMS and a dynamic range of ~4×12 keV photons in high gain mode, which increases to ~100×12 keV photons with the lowest gain setting. The low noise levels of MÖNCH make it a suitable candidate for X-ray detection at energies around 1 keV and below. Imaging applications in particular can benefit significantly from the use of MÖNCH: due to its extremely small pixel pitch, the detector intrinsically offers excellent position resolution. Moreover, in low flux conditions, charge sharing between neighboring pixels allows the use of position interpolation algorithms which grant a resolution at the micrometer-level. Its energy reconstruction and imaging capabilities have been tested for the first time at a low energy beamline at PSI, with photon energies between 1.75 keV and 3.5 keV, and results will be shown.

  11. Local Pixel Bundles: Bringing the Pixels to the People

    NASA Astrophysics Data System (ADS)

    Anderson, Jay

    2014-12-01

    The automated galaxy-based alignment software package developed for the Frontier Fields program (hst2galign, see Anderson & Ogaz 2014 and http://www.stsci.edu/hst/campaigns/frontier-fields/) produces a direct mapping from the pixels of the flt frame of each science exposure into a common master frame. We can use these mappings to extract the flt-pixels in the vicinity of a source of interest and package them into a convenient "bundle". In addition to the pixels, this data bundle can also contain "meta" information that will allow users to transform positions from the flt pixels to the reference frame and vice-versa. Since the un-resampled pixels in the flt frames are the only true constraints we have on the astronomical scene, the ability to inter-relate these pixels will enable many high-precision studies, such as: point-source-fitting and deconvolution with accurate PSFs, easy exploration of different image-combining algorithms, and accurate faint-source finding and photometry. The data products introduced in this ISR are a very early attempt to provide the flt-level pixel constraints in a package that is accessible to more than the handful of experts in HST astrometry. The hope is that users in the community might begin using them and will provide feedback as to what information they might want to see in the bundles and what general analysis packages they might find useful. For that reason, this document is somewhat informally written, since I know that it will be modified and updated as the products and tools are optimized.

  12. A 4096-pixel MAPS detector used to investigate the single-electron distribution in a Young-Feynman two-slit interference experiment

    NASA Astrophysics Data System (ADS)

    Gabrielli, A.; Giorgi, F. M.; Semprini, N.; Villa, M.; Zoccoli, A.; Matteucci, G.; Pozzi, G.; Frabboni, S.; Gazzadi, G. C.

    2013-01-01

    A monolithic CMOS detector, made of 4096 active pixels developed for HEP collider experiments, has been used in the Young-Feynman two-slit experiment with single electrons. The experiment has been carried out by inserting two nanometric slits in a transmission electron microscope that provided the electron beam source and the electro-optical lenses for projecting and focusing the interference pattern on the sensor. The fast readout of the sensor, in principle capable to manage up to 106 frames per second, allowed to record single-electron frames spaced by several empty frames. In this way, for the first time in a single-electron two-slit experiment, the time distribution of electron arrivals has been measured with a resolution of 165 μs. In addition, high statistics samples of single-electron events were collected within a time interval short enough to be compatible with the stability of the system and coherence conditions of the illumination.

  13. Using Polynomials to Simplify Fixed Pattern Noise and Photometric Correction of Logarithmic CMOS Image Sensors

    PubMed Central

    Li, Jing; Mahmoodi, Alireza; Joseph, Dileepan

    2015-01-01

    An important class of complementary metal-oxide-semiconductor (CMOS) image sensors are those where pixel responses are monotonic nonlinear functions of light stimuli. This class includes various logarithmic architectures, which are easily capable of wide dynamic range imaging, at video rates, but which are vulnerable to image quality issues. To minimize fixed pattern noise (FPN) and maximize photometric accuracy, pixel responses must be calibrated and corrected due to mismatch and process variation during fabrication. Unlike literature approaches, which employ circuit-based models of varying complexity, this paper introduces a novel approach based on low-degree polynomials. Although each pixel may have a highly nonlinear response, an approximately-linear FPN calibration is possible by exploiting the monotonic nature of imaging. Moreover, FPN correction requires only arithmetic, and an optimal fixed-point implementation is readily derived, subject to a user-specified number of bits per pixel. Using a monotonic spline, involving cubic polynomials, photometric calibration is also possible without a circuit-based model, and fixed-point photometric correction requires only a look-up table. The approach is experimentally validated with a logarithmic CMOS image sensor and is compared to a leading approach from the literature. The novel approach proves effective and efficient. PMID:26501287

  14. Using polynomials to simplify fixed pattern noise and photometric correction of logarithmic CMOS image sensors.

    PubMed

    Li, Jing; Mahmoodi, Alireza; Joseph, Dileepan

    2015-10-16

    An important class of complementary metal-oxide-semiconductor (CMOS) image sensors are those where pixel responses are monotonic nonlinear functions of light stimuli. This class includes various logarithmic architectures, which are easily capable of wide dynamic range imaging, at video rates, but which are vulnerable to image quality issues. To minimize fixed pattern noise (FPN) and maximize photometric accuracy, pixel responses must be calibrated and corrected due to mismatch and process variation during fabrication. Unlike literature approaches, which employ circuit-based models of varying complexity, this paper introduces a novel approach based on low-degree polynomials. Although each pixel may have a highly nonlinear response, an approximately-linear FPN calibration is possible by exploiting the monotonic nature of imaging. Moreover, FPN correction requires only arithmetic, and an optimal fixed-point implementation is readily derived, subject to a user-specified number of bits per pixel. Using a monotonic spline, involving cubic polynomials, photometric calibration is also possible without a circuit-based model, and fixed-point photometric correction requires only a look-up table. The approach is experimentally validated with a logarithmic CMOS image sensor and is compared to a leading approach from the literature. The novel approach proves effective and efficient.

  15. Lateral drift-field photodiode for low noise, high-speed, large photoactive-area CMOS imaging applications

    NASA Astrophysics Data System (ADS)

    Durini, Daniel; Spickermann, Andreas; Mahdi, Rana; Brockherde, Werner; Vogt, Holger; Grabmaier, Anton; Hosticka, Bedrich J.

    2010-12-01

    In this work a theoretical concept and simulations are presented for a novel lateral drift-field photodetector pixel to be fabricated in a 0.35 μm CMOS process. The proposed pixel consists of a specially designed n-well with a non-uniform lateral doping profile that follows a square-root spatial dependence. "Buried" MOS capacitor-based collection-gate, a transfer-gate, and an n-type MOSFET source/drain n + floating-diffusion serve to realize a non-destructive readout. The pixel readout is performed using an in-pixel source-follower pixel buffer configuration followed by an output amplifier featuring correlated double-sampling. The concentration gradient formed in the n-well employs a single extra implantation step in the 0.35 μm CMOS process mentioned and requires only a single extra mask. It generates an electrostatic potential gradient, i.e. a lateral drift-field, in the photoactive area of the pixel which enables high charge transfer speed and low image-lag. According to the simulation results presented, charge transfer times of less than 3 ns are to be expected.

  16. Region-of-interest cone beam computed tomography (ROI CBCT) with a high resolution CMOS detector

    PubMed Central

    Jain, A; Takemoto, H; Silver, M D; Nagesh, S V S; Ionita, C N; Bednarek, D R; Rudin, S

    2015-01-01

    Cone beam computed tomography (CBCT) systems with rotational gantries that have standard flat panel detectors (FPD) are widely used for the 3D rendering of vascular structures using Feldkamp cone beam reconstruction algorithms. One of the inherent limitations of these systems is limited resolution (<3 lp/mm). There are systems available with higher resolution but their small FOV limits them to small animal imaging only. In this work, we report on region-of-interest (ROI) CBCT with a high resolution CMOS detector (75 μm pixels, 600 μm HR-CsI) mounted with motorized detector changer on a commercial FPD-based C-arm angiography gantry (194 μm pixels, 600 μm HL-CsI). A cylindrical CT phantom and neuro stents were imaged with both detectors. For each detector a total of 209 images were acquired in a rotational protocol. The technique parameters chosen for the FPD by the imaging system were used for the CMOS detector. The anti-scatter grid was removed and the incident scatter was kept the same for both detectors with identical collimator settings. The FPD images were reconstructed for the 10 cm x10 cm FOV and the CMOS images were reconstructed for a 3.84 cm × 3.84 cm FOV. Although the reconstructed images from the CMOS detector demonstrated comparable contrast to the FPD images, the reconstructed 3D images of the neuro stent clearly showed that the CMOS detector improved delineation of smaller objects such as the stent struts (~70 μm) compared to the FPD. Further development and the potential for substantial clinical impact are suggested. PMID:26877577

  17. Region-of-interest cone beam computed tomography (ROI CBCT) with a high resolution CMOS detector

    NASA Astrophysics Data System (ADS)

    Jain, A.; Takemoto, H.; Silver, M. D.; Nagesh, S. V. S.; Ionita, C. N.; Bednarek, D. R.; Rudin, S.

    2015-03-01

    Cone beam computed tomography (CBCT) systems with rotational gantries that have standard flat panel detectors (FPD) are widely used for the 3D rendering of vascular structures using Feldkamp cone beam reconstruction algorithms. One of the inherent limitations of these systems is limited resolution (<3 lp/mm). There are systems available with higher resolution but their small FOV limits them to small animal imaging only. In this work, we report on region-of-interest (ROI) CBCT with a high resolution CMOS detector (75 μm pixels, 600 μm HR-CsI) mounted with motorized detector changer on a commercial FPD-based C-arm angiography gantry (194 μm pixels, 600 μm HL-CsI). A cylindrical CT phantom and neuro stents were imaged with both detectors. For each detector a total of 209 images were acquired in a rotational protocol. The technique parameters chosen for the FPD by the imaging system were used for the CMOS detector. The anti-scatter grid was removed and the incident scatter was kept the same for both detectors with identical collimator settings. The FPD images were reconstructed for the 10 cm x10 cm FOV and the CMOS images were reconstructed for a 3.84 cm x 3.84 cm FOV. Although the reconstructed images from the CMOS detector demonstrated comparable contrast to the FPD images, the reconstructed 3D images of the neuro stent clearly showed that the CMOS detector improved delineation of smaller objects such as the stent struts (~70 μm) compared to the FPD. Further development and the potential for substantial clinical impact are suggested.

  18. Region-of-interest cone beam computed tomography (ROI CBCT) with a high resolution CMOS detector.

    PubMed

    Jain, A; Takemoto, H; Silver, M D; Nagesh, S V S; Ionita, C N; Bednarek, D R; Rudin, S

    Cone beam computed tomography (CBCT) systems with rotational gantries that have standard flat panel detectors (FPD) are widely used for the 3D rendering of vascular structures using Feldkamp cone beam reconstruction algorithms. One of the inherent limitations of these systems is limited resolution (<3 lp/mm). There are systems available with higher resolution but their small FOV limits them to small animal imaging only. In this work, we report on region-of-interest (ROI) CBCT with a high resolution CMOS detector (75 μm pixels, 600 μm HR-CsI) mounted with motorized detector changer on a commercial FPD-based C-arm angiography gantry (194 μm pixels, 600 μm HL-CsI). A cylindrical CT phantom and neuro stents were imaged with both detectors. For each detector a total of 209 images were acquired in a rotational protocol. The technique parameters chosen for the FPD by the imaging system were used for the CMOS detector. The anti-scatter grid was removed and the incident scatter was kept the same for both detectors with identical collimator settings. The FPD images were reconstructed for the 10 cm x10 cm FOV and the CMOS images were reconstructed for a 3.84 cm × 3.84 cm FOV. Although the reconstructed images from the CMOS detector demonstrated comparable contrast to the FPD images, the reconstructed 3D images of the neuro stent clearly showed that the CMOS detector improved delineation of smaller objects such as the stent struts (~70 μm) compared to the FPD. Further development and the potential for substantial clinical impact are suggested.

  19. Increasing Linear Dynamic Range of a CMOS Image Sensor

    NASA Technical Reports Server (NTRS)

    Pain, Bedabrata

    2007-01-01

    A generic design and a corresponding operating sequence have been developed for increasing the linear-response dynamic range of a complementary metal oxide/semiconductor (CMOS) image sensor. The design provides for linear calibrated dual-gain pixels that operate at high gain at a low signal level and at low gain at a signal level above a preset threshold. Unlike most prior designs for increasing dynamic range of an image sensor, this design does not entail any increase in noise (including fixed-pattern noise), decrease in responsivity or linearity, or degradation of photometric calibration. The figure is a simplified schematic diagram showing the circuit of one pixel and pertinent parts of its column readout circuitry. The conventional part of the pixel circuit includes a photodiode having a small capacitance, CD. The unconventional part includes an additional larger capacitance, CL, that can be connected to the photodiode via a transfer gate controlled in part by a latch. In the high-gain mode, the signal labeled TSR in the figure is held low through the latch, which also helps to adapt the gain on a pixel-by-pixel basis. Light must be coupled to the pixel through a microlens or by back illumination in order to obtain a high effective fill factor; this is necessary to ensure high quantum efficiency, a loss of which would minimize the efficacy of the dynamic- range-enhancement scheme. Once the level of illumination of the pixel exceeds the threshold, TSR is turned on, causing the transfer gate to conduct, thereby adding CL to the pixel capacitance. The added capacitance reduces the conversion gain, and increases the pixel electron-handling capacity, thereby providing an extension of the dynamic range. By use of an array of comparators also at the bottom of the column, photocharge voltages on sampling capacitors in each column are compared with a reference voltage to determine whether it is necessary to switch from the high-gain to the low-gain mode. Depending upon

  20. Digital-Centric RF CMOS Technologies

    NASA Astrophysics Data System (ADS)

    Matsuzawa, Akira

    Analog-centric RFCMOS technology has played an important role in motivating the change of technology from conventional discrete device technology or bipolar IC technology to CMOS technology. However it introduces many problems such as poor performance, susceptibility to PVT fluctuation, and cost increase with technology scaling. The most important advantage of CMOS technology compared with legacy RF technology is that CMOS can use more high performance digital circuits for very low cost. In fact, analog-centric RF-CMOS technology has failed the FM/AM tuner business and the digital-centric CMOS technology is becoming attractive for many users. It has many advantages; such as high performance, no external calibration points, high yield, and low cost. From the above facts, digital-centric CMOS technology which utilizes the advantages of digital technology must be the right path for future RF technology. Further investment in this technology is necessary for the advancement of RF technology.

  1. CMOS output buffer wave shaper

    NASA Technical Reports Server (NTRS)

    Albertson, L.; Whitaker, S.; Merrell, R.

    1990-01-01

    As the switching speeds and densities of Digital CMOS integrated circuits continue to increase, output switching noise becomes more of a problem. A design technique which aids in the reduction of switching noise is reported. The output driver stage is analyzed through the use of an equivalent RLC circuit. The results of the analysis are used in the design of an output driver stage. A test circuit based on these techniques is being submitted to MOSIS for fabrication.

  2. Localization-based super-resolution microscopy with an sCMOS camera part II: experimental methodology for comparing sCMOS with EMCCD cameras.

    PubMed

    Long, Fan; Zeng, Shaoqun; Huang, Zhen-Li

    2012-07-30

    Nowadays, there is a hot debate among industry and academic researchers that whether the newly developed scientific-grade Complementary Metal Oxide Semiconductor (sCMOS) cameras could become the image sensors of choice in localization-based super-resolution microscopy. To help researchers find answers to this question, here we reported an experimental methodology for quantitatively comparing the performance of low-light cameras in single molecule detection (characterized via image SNR) and localization (via localization accuracy). We found that a newly launched sCMOS camera can present superior imaging performance than a popular Electron Multiplying Charge Coupled Device (EMCCD) camera in a signal range (15-12000 photon/pixel) more than enough for typical localization-based super-resolution microscopy.

  3. Noncolorimetric measurement of cell activity in three-dimensional histoculture using the tetrazolium dye 3-(4,5-dimethylthiazol-2-yl)-2,5-diphenyltetrazolium bromide: the pixel image analysis of formazan crystals.

    PubMed

    Colangelo, D; Guo, H Y; Connors, K M; Silvestro, L; Hoffman, R M

    1992-08-15

    We describe a novel system for measuring the 3-(4,5-dimethylthiazol-2-yl)-2,5-diphenyltetrazolium bromide (MTT) reduction in three-dimensional histoculture which is no longer dependent on colorimetric determination of extracted formazan, but rather is based on a pixel image analysis of formazan crystals, and which allows intratumor heterogeneity to be taken into account. The MTT test is based on the enzymatic reduction of the tetrazolium salt 3-(4,5-dimethylthiazol-2-yl)-2,5-dipheniltetrazolium bromide to formazan crystals by living, metabolically active cells, but not in dead cells. The reaction was carried out in situ in six-well plates on gel-supported histocultured human tumors. After a 24-h incubation with different drugs the tumors were incubated with a solution of MTT. Frozen sections of the tumor pieces were made and the slides were then stained with a propidium iodide solution, whose fluorescence is proportional to the number of cells present. We demonstrate here that the formazan crystals, formed by MTT reduction, reflect polarized light and that this can be quantified by using an image analysis system based on bright-pixel quantitation directly on a frozen section of the original tissue. Combined with the use of the fluorescent dye propidium iodide, also measured by pixel analysis, we can express a ratio between the total amount of MTT reduction and the total number of cells present in the specimen that expresses the effect of drugs on the histocultured tumors. Since histology is well maintained in histoculture it is possible to take into account the heterogeneity present in the tumor with regard to drug response.(ABSTRACT TRUNCATED AT 250 WORDS)

  4. NV-CMOS HD camera for day/night imaging

    NASA Astrophysics Data System (ADS)

    Vogelsong, T.; Tower, J.; Sudol, Thomas; Senko, T.; Chodelka, D.

    2014-06-01

    SRI International (SRI) has developed a new multi-purpose day/night video camera with low-light imaging performance comparable to an image intensifier, while offering the size, weight, ruggedness, and cost advantages enabled by the use of SRI's NV-CMOS HD digital image sensor chip. The digital video output is ideal for image enhancement, sharing with others through networking, video capture for data analysis, or fusion with thermal cameras. The camera provides Camera Link output with HD/WUXGA resolution of 1920 x 1200 pixels operating at 60 Hz. Windowing to smaller sizes enables operation at higher frame rates. High sensitivity is achieved through use of backside illumination, providing high Quantum Efficiency (QE) across the visible and near infrared (NIR) bands (peak QE <90%), as well as projected low noise (<2h+) readout. Power consumption is minimized in the camera, which operates from a single 5V supply. The NVCMOS HD camera provides a substantial reduction in size, weight, and power (SWaP) , ideal for SWaP-constrained day/night imaging platforms such as UAVs, ground vehicles, fixed mount surveillance, and may be reconfigured for mobile soldier operations such as night vision goggles and weapon sights. In addition the camera with the NV-CMOS HD imager is suitable for high performance digital cinematography/broadcast systems, biofluorescence/microscopy imaging, day/night security and surveillance, and other high-end applications which require HD video imaging with high sensitivity and wide dynamic range. The camera comes with an array of lens mounts including C-mount and F-mount. The latest test data from the NV-CMOS HD camera will be presented.

  5. Development of n-in-p pixel modules for the ATLAS upgrade at HL-LHC

    NASA Astrophysics Data System (ADS)

    Macchiolo, A.; Nisius, R.; Savic, N.; Terzo, S.

    2016-09-01

    Thin planar pixel modules are promising candidates to instrument the inner layers of the new ATLAS pixel detector for HL-LHC, thanks to the reduced contribution to the material budget and their high charge collection efficiency after irradiation. 100-200 μm thick sensors, interconnected to FE-I4 read-out chips, have been characterized with radioactive sources and beam tests at the CERN-SPS and DESY. The results of these measurements are reported for devices before and after irradiation up to a fluence of 14 ×1015 neq /cm2 . The charge collection and tracking efficiency of the different sensor thicknesses are compared. The outlook for future planar pixel sensor production is discussed, with a focus on sensor design with the pixel pitches (50×50 and 25×100 μm2) foreseen for the RD53 Collaboration read-out chip in 65 nm CMOS technology. An optimization of the biasing structures in the pixel cells is required to avoid the hit efficiency loss presently observed in the punch-through region after irradiation. For this purpose the performance of different layouts have been compared in FE-I4 compatible sensors at various fluence levels by using beam test data. Highly segmented sensors will represent a challenge for the tracking in the forward region of the pixel system at HL-LHC. In order to reproduce the performance of 50×50 μm2 pixels at high pseudo-rapidity values, FE-I4 compatible planar pixel sensors have been studied before and after irradiation in beam tests at high incidence angle (80°) with respect to the short pixel direction. Results on cluster shapes, charge collection and hit efficiency will be shown.

  6. X-ray Characterization of a Multichannel Smart-Pixel Array Detector

    SciTech Connect

    Ross, Steve; Haji-Sheikh, Michael; Huntington, Andrew; Kline, David; Lee, Adam; Li, Yuelin; Rhee, Jehyuk; Tarpley, Mary; Walko, Donald A.; Westberg, Gregg; Williams, George; Zou, Haifeng; Landahl, Eric

    2016-01-01

    The Voxtel VX-798 is a prototype X-ray pixel array detector (PAD) featuring a silicon sensor photodiode array of 48 x 48 pixels, each 130 mu m x 130 mu m x 520 mu m thick, coupled to a CMOS readout application specific integrated circuit (ASIC). The first synchrotron X-ray characterization of this detector is presented, and its ability to selectively count individual X-rays within two independent arrival time windows, a programmable energy range, and localized to a single pixel is demonstrated. During our first trial run at Argonne National Laboratory's Advance Photon Source, the detector achieved a 60 ns gating time and 700 eV full width at half-maximum energy resolution in agreement with design parameters. Each pixel of the PAD holds two independent digital counters, and the discriminator for X-ray energy features both an upper and lower threshold to window the energy of interest discarding unwanted background. This smart-pixel technology allows energy and time resolution to be set and optimized in software. It is found that the detector linearity follows an isolated dead-time model, implying that megahertz count rates should be possible in each pixel. Measurement of the line and point spread functions showed negligible spatial blurring. When combined with the timing structure of the synchrotron storage ring, it is demonstrated that the area detector can perform both picosecond time-resolved X-ray diffraction and fluorescence spectroscopy measurements.

  7. Fast Imaging Detector Readout Circuits with In-Pixel ADCs for Fourier Transform Imaging Spectrometers

    NASA Technical Reports Server (NTRS)

    Rider, D.; Blavier, J-F.; Cunningham, T.; Hancock, B.; Key, R.; Pannell, Z.; Sander, S.; Seshadri, S.; Sun, C.; Wrigley, C.

    2011-01-01

    Focal plane arrays (FPAs) with high frame rates and many pixels benefit several upcoming Earth science missions including GEO-CAPE, GACM, and ACE by enabling broader spatial coverage and higher spectral resolution. FPAs for the PanFTS, a high spatial resolution Fourier transform spectrometer and a candidate instrument for the GEO-CAPE mission are the focus of the developments reported here, but this FPA technology has the potential to enable a variety of future measurements and instruments. The ESTO ACT Program funded the developed of a fast readout integrated circuit (ROIC) based on an innovative in-pixel analog-to-digital converter (ADC). The 128 X 128 pixel ROIC features 60 ?m pixels, a 14-bit ADC in each pixel and operates at a continuous frame rate of 14 kHz consuming only 1.1 W of power. The ROIC outputs digitized data completely eliminating the bulky, power consuming signal chains needed by conventional FPAs. The 128 X 128 pixel ROIC has been fabricated in CMOS and tested at the Jet Propulsion Laboratory. The current version is designed to be hybridized with PIN photodiode arrays via indium bump bonding for light detection in the visible and ultraviolet spectral regions. However, the ROIC design incorporates a small photodiode in each cell to permit detailed characterization of the ROICperformance without the need for hybridization. We will describe the essential features of the ROIC design and present results of ROIC performance measurements.

  8. Readout circuit with pixel-level analog-to-digital conversion

    NASA Astrophysics Data System (ADS)

    Gan, Wenxiang; Ding, Ruijun; Ni, Yunzhi

    2005-01-01

    Pixel level on-focal-plane analog to digital conversion(ADC) promises many advantages including high performance and low power consumption. In this paper we argue that CMOS technology scaling will make pixel level ADC increasingly popular. Then we introduce four existing techniques for pixel level ADC. The first is an over sampling technique which uses a one bit first order sigma delta modulator for each pixel to directly convert photo charge to bits, consists of an integrator, a one bit DAC and a clocked comparator. The second technique is Nyquist rate multi-channel-bit-serial(MCBS) ADC. The technique uses special successive comparisons to convert the pixel voltage to bits. The third technique bases on a simple and robust pulse frequency modulation(PFM) scheme that can convert the photocurrent of photodetectors to proportional pulse frequency. The fourth is a software-controlled ADC, which utilize a algorithm, takes a desired photocurrent quantization scale to output bits. Each pixel contains a programmable digital processing element which directly controls the behavior of the photo detector with software. These four techniques are analyzed and compared according to their advantages, disadvantages and suitable application area. Finally we mention our current and future works with one of these techniques.

  9. A SPAD-based 3D imager with in-pixel TDC for 145ps-accuracy ToF measurement

    NASA Astrophysics Data System (ADS)

    Vornicu, I.; Carmona-Galán, R.; Rodríguez-Vázquez, Á.

    2015-03-01

    The design and measurements of a CMOS 64 × 64 Single-Photon Avalanche-Diode (SPAD) array with in-pixel Time-to-Digital Converter (TDC) are presented. This paper thoroughly describes the imager at architectural and circuit level with particular emphasis on the characterization of the SPAD-detector ensemble. It is aimed to 2D imaging and 3D image reconstruction in low light environments. It has been fabricated in a standard 0.18μm CMOS process, i. e. without high voltage or low noise features. In these circumstances, we are facing a high number of dark counts and low photon detection efficiency. Several techniques have been applied to ensure proper functionality, namely: i) time-gated SPAD front-end with fast active-quenching/recharge circuit featuring tunable dead-time, ii) reverse start-stop scheme, iii) programmable time resolution of the TDC based on a novel pseudo-differential voltage controlled ring oscillator with fast start-up, iv) a global calibration scheme against temperature and process variation. Measurements results of individual SPAD-TDC ensemble jitter, array uniformity and time resolution programmability are also provided.

  10. The Belle II DEPFET pixel detector

    NASA Astrophysics Data System (ADS)

    Moser, Hans-Günther

    2016-09-01

    The Belle II experiment at KEK (Tsukuba, Japan) will explore heavy flavour physics (B, charm and tau) at the starting of 2018 with unprecedented precision. Charged particles are tracked by a two-layer DEPFET pixel device (PXD), a four-layer silicon strip detector (SVD) and the central drift chamber (CDC). The PXD will consist of two layers at radii of 14 mm and 22 mm with 8 and 12 ladders, respectively. The pixel sizes will vary, between 50 μm×(55-60) μm in the first layer and between 50 μm×(70-85) μm in the second layer, to optimize the charge sharing efficiency. These innermost layers have to cope with high background occupancy, high radiation and must have minimal material to reduce multiple scattering. These challenges are met using the DEPFET technology. Each pixel is a FET integrated on a fully depleted silicon bulk. The signal charge collected in the 'internal gate' modulates the FET current resulting in a first stage amplification and therefore very low noise. This allows very thin sensors (75 μm) reducing the overall material budget of the detector (0.21% X0). Four fold multiplexing of the column parallel readout allows read out a full frame of the pixel matrix in only 20 μs while keeping the power consumption low enough for air cooling. Only the active electronics outside the detector acceptance has to be cooled actively with a two phase CO2 system. Furthermore the DEPFET technology offers the unique feature of an electronic shutter which allows the detector to operate efficiently in the continuous injection mode of superKEKB.

  11. High-content analysis of single cells directly assembled on CMOS sensor based on color imaging.

    PubMed

    Tanaka, Tsuyoshi; Saeki, Tatsuya; Sunaga, Yoshihiko; Matsunaga, Tadashi

    2010-12-15

    A complementary metal oxide semiconductor (CMOS) image sensor was applied to high-content analysis of single cells which were assembled closely or directly onto the CMOS sensor surface. The direct assembling of cell groups on CMOS sensor surface allows large-field (6.66 mm×5.32 mm in entire active area of CMOS sensor) imaging within a second. Trypan blue-stained and non-stained cells in the same field area on the CMOS sensor were successfully distinguished as white- and blue-colored images under white LED light irradiation. Furthermore, the chemiluminescent signals of each cell were successfully visualized as blue-colored images on CMOS sensor only when HeLa cells were placed directly on the micro-lens array of the CMOS sensor. Our proposed approach will be a promising technique for real-time and high-content analysis of single cells in a large-field area based on color imaging.

  12. Method of fabrication of display pixels driven by silicon thin film transistors

    DOEpatents

    Carey, Paul G.; Smith, Patrick M.

    1999-01-01

    Display pixels driven by silicon thin film transistors are fabricated on plastic substrates for use in active matrix displays, such as flat panel displays. The process for forming the pixels involves a prior method for forming individual silicon thin film transistors on low-temperature plastic substrates. Low-temperature substrates are generally considered as being incapable of withstanding sustained processing temperatures greater than about 200.degree. C. The pixel formation process results in a complete pixel and active matrix pixel array. A pixel (or picture element) in an active matrix display consists of a silicon thin film transistor (TFT) and a large electrode, which may control a liquid crystal light valve, an emissive material (such as a light emitting diode or LED), or some other light emitting or attenuating material. The pixels can be connected in arrays wherein rows of pixels contain common gate electrodes and columns of pixels contain common drain electrodes. The source electrode of each pixel TFT is connected to its pixel electrode, and is electrically isolated from every other circuit element in the pixel array.

  13. Illumination robust change detection with CMOS imaging sensors

    NASA Astrophysics Data System (ADS)

    Rengarajan, Vijay; Gupta, Sheetal B.; Rajagopalan, A. N.; Seetharaman, Guna

    2015-05-01

    Change detection between two images in the presence of degradations is an important problem in the computer vision community, more so for the aerial scenario which is particularly challenging. Cameras mounted on moving platforms such as aircrafts or drones are subject to general six-dimensional motion as the motion is not restricted to a single plane. With CMOS cameras increasingly in vogue due to their low power consumption, the inevitability of rolling-shutter (RS) effect adds to the challenge. This is caused by sequential exposure of rows in CMOS cameras unlike conventional global shutter cameras where all pixels are exposed simultaneously. The RS effect is particularly pronounced in aerial imaging since each row of the imaging sensor is likely to experience a different motion. For fast-moving platforms, the problem is further compounded since the rows are also affected by motion blur. Moreover, since the two images are shot at different times, illumination differences are common. In this paper, we propose a unified computational framework that elegantly exploits the scarcity constraint to deal with the problem of change detection in images degraded by RS effect, motion blur as well as non-global illumination differences. We formulate an optimization problem where each row of the distorted image is approximated as a weighted sum of the corresponding rows in warped versions of the reference image due to camera motion within the exposure period to account for geometric as well as photometric differences. The method has been validated on both synthetic and real data.

  14. Status and Construction of the Belle II DEPFET pixel system

    NASA Astrophysics Data System (ADS)

    Lütticke, Florian

    2014-06-01

    DEpleted P-channel Field Effect Transistor (DEPFET) active pixel detectors combine detection with a first amplification stage in a fully depleted detector, resulting in an superb signal-to-noise ratio even for thin sensors. Two layers of thin (75 micron) silicon DEPFET pixels will be used as the innermost vertex system, very close to the beam pipe in the Belle II detector at the SuperKEKB facility. The status of the 8 million DEPFET pixels detector, latest developments and current system tests will be discussed.

  15. Smart-pixel for 3D ranging imagers based on single-photon avalanche diode and time-to-digital converter

    NASA Astrophysics Data System (ADS)

    Markovic, Bojan; Tisa, Simone; Tosi, Alberto; Zappa, Franco

    2011-05-01

    We present a "smart-pixel" suitable for implementation of monolithic single-photon imaging arrays aimed at 3D ranging applications by means of the direct time-of-flight detection (like LIDAR systems), but also for photon timing applications (like FLIM, FCS, FRET). The pixel includes a Single-Photon Avalanche Diode (SPAD) and a Time-to-Digital Converter (TDC) monolithically designed and manufactured in the same chip, and it is able to detect single photons and to measure in-pixel the time delay between a START signal (e.g. laser excitation, LIDAR flash) and a photon detection (e.g. back reflection from a target object). In order to provide both wide dynamic range, high time resolution and very high linearity, we devised a TDC architecture based on an interpolation technique. A "coarse" counter counts the number of reference-clock rising-edges between START and STOP, while high resolution is achieved by means of two interpolators, which measure the time elapsed between START (and STOP) signal and a successive clock edge. In an array with many pixels, multiple STOP channels are needed while just one START channel is necessary if the START event is common to all channels. We report on the design and characterization of prototype circuits, fabricated in a 0.35 μm standard CMOS technology containing complete conversion channels (i.e. 20-μm active-area diameter SPAD, quenching circuitry, and TDC). With a 100 MHz reference clock, the TDC provides a time resolution of 10 ps, a dynamic range of 160 ns and DNL < 1% LSB rms.

  16. A Low Power Digital Accumulation Technique for Digital-Domain CMOS TDI Image Sensor.

    PubMed

    Yu, Changwei; Nie, Kaiming; Xu, Jiangtao; Gao, Jing

    2016-09-23

    In this paper, an accumulation technique suitable for digital domain CMOS time delay integration (TDI) image sensors is proposed to reduce power consumption without degrading the rate of imaging. In terms of the slight variations of quantization codes among different pixel exposures towards the same object, the pixel array is divided into two groups: one is for coarse quantization of high bits only, and the other one is for fine quantization of low bits. Then, the complete quantization codes are composed of both results from the coarse-and-fine quantization. The equivalent operation comparably reduces the total required bit numbers of the quantization. In the 0.18 µm CMOS process, two versions of 16-stage digital domain CMOS TDI image sensor chains based on a 10-bit successive approximate register (SAR) analog-to-digital converter (ADC), with and without the proposed technique, are designed. The simulation results show that the average power consumption of slices of the two versions are 6 . 47 × 10 - 8 J/line and 7 . 4 × 10 - 8 J/line, respectively. Meanwhile, the linearity of the two versions are 99.74% and 99.99%, respectively.

  17. HEPS-BPIX, a single photon counting pixel detector with a high frame rate for the HEPS project

    NASA Astrophysics Data System (ADS)

    Wei, Wei; Zhang, Jie; Ning, Zhe; Lu, Yunpeng; Fan, Lei; Li, Huaishen; Jiang, Xiaoshan; Lan, Allan K.; Ouyang, Qun; Wang, Zheng; Zhu, Kejun; Chen, Yuanbo; Liu, Peng

    2016-11-01

    China's next generation light source, named the High Energy Photon Source (HEPS), is currently under construction. HEPS-BPIX (HEPS-Beijing PIXel) is a dedicated pixel readout chip that operates in single photon counting mode for X-ray applications in HEPS. Designed using CMOS 0.13 μm technology, the chip contains a matrix of 104×72 pixels. Each pixel measures 150 μm×150 μm and has a counting depth of 20 bits. A bump-bonded prototyping detector module with a 300-μm thick silicon sensor was tested in the beamline of Beijing Synchrotron Radiation Facility. A fast stream of X-ray images was demonstrated, and a frame rate of 1.2 kHz was proven, with a negligible dead time. The test results showed an equivalent noise charge of 115 e- rms after bump bonding and a threshold dispersion of 55 e- rms after calibration.

  18. Pixel Analysis and Plasma Dynamics Characterized by Photospheric Spectral Data

    NASA Astrophysics Data System (ADS)

    Rasca, A.; Chen, J.; Pevtsov, A. A.

    2015-12-01

    Continued advances in solar observations have led to higher-resolution magnetograms and surface (photospheric) images, revealing bipolar magnetic features operating near the resolution limit during emerging flux events and other phenomena used to predict solar eruptions responsible for geomagnetic plasma disturbances. However, line of sight (LOS) magnetogram pixels only contain the net uncanceled magnetic flux, which is expected to increase for fixed regions as resolution limits improve. A pixel dynamics model utilizing Stokes I spectral profiles was previously-used to quantify changes in the Doppler shift, width, asymmetry, and tail flatness of Fe I lines at 6301.5 and 6302.5 Å and used pixel-by-pixel line profile fluctuations to characterize quiet and active regions on the Sun. We use this pixel dynamics model with circularly polarized photospheric data (e.g., SOLIS data) to estimate plasma dynamic properties at a sub-pixel level. The analysis can be extended to include the full Stokes parameters and study signatures of magnetic fields and coupled plasma properties on sub-pixel scales.

  19. Pixel electronics for the ATLAS experiment

    NASA Astrophysics Data System (ADS)

    Fischer, P.

    2001-06-01

    The ATLAS experiment at LHC will use 3 barrel layers and 2×5 disks of silicon pixel detectors as the innermost elements of the semiconductor tracker. The basic building blocks are pixel modules with an active area of 16.4 mm×60.8 mm which include an n + on n-type silicon sensor and 16 VLSI front-end (FE) chips. Every FE chip contains a low power, high speed charge sensitive preamplifier, a fast discriminator, and a readout system which operates at the 40 MHz rate of LHC. The addresses of hit pixels (as well as a low resolution pulse height information) are stored on the FE chips until arrival of a level 1 trigger signal. Hits are then transferred to a module controller chip (MCC) which collects the data of all 16 FE chips, builds complete events and sends the data through two optical links to the data acquisition system. The MCC receives clock and data through an additional optical link and provides timing and configuration information for the FE chips. Two additional chips are used to amplify and decode the pin diode signal and to drive the VCSEL laser diodes of the optical links.

  20. Recent progress of RD53 Collaboration towards next generation Pixel Read-Out Chip for HL-LHC

    DOE PAGES

    Demaria, N.

    2016-12-21

    This paper is a review of recent progress of RD53 Collaboration. Results obtained on the study of the radiation effects on 65 nm CMOS have matured enough to define first strategies to adopt in the design of analog and digital circuits. Critical building blocks and analog very front end chains have been designed, tested before and after 5–800 Mrad. Small prototypes of 64×64 pixels with complex digital architectures have been produced, and point to address the main issues of dealing with extremely high pixel rates, while operating at very small in-time thresholds in the analog front end. Lastly, the collaborationmore » is now proceeding at full speed towards the design of a large scale prototype, called RD53A, in 65 nm CMOS technology.« less

  1. Recent progress of RD53 Collaboration towards next generation Pixel Read-Out Chip for HL-LHC

    SciTech Connect

    Demaria, N.

    2016-12-21

    This paper is a review of recent progress of RD53 Collaboration. Results obtained on the study of the radiation effects on 65 nm CMOS have matured enough to define first strategies to adopt in the design of analog and digital circuits. Critical building blocks and analog very front end chains have been designed, tested before and after 5–800 Mrad. Small prototypes of 64×64 pixels with complex digital architectures have been produced, and point to address the main issues of dealing with extremely high pixel rates, while operating at very small in-time thresholds in the analog front end. Lastly, the collaboration is now proceeding at full speed towards the design of a large scale prototype, called RD53A, in 65 nm CMOS technology.

  2. Recent progress of RD53 Collaboration towards next generation Pixel Read-Out Chip for HL-LHC

    NASA Astrophysics Data System (ADS)

    Demaria, N.; Barbero, M. B.; Fougeron, D.; Gensolen, F.; Godiot, S.; Menouni, M.; Pangaud, P.; Rozanov, A.; Wang, A.; Bomben, M.; Calderini, G.; Crescioli, F.; Le Dortz, O.; Marchiori, G.; Dzahini, D.; Rarbi, F. E.; Gaglione, R.; Gonella, L.; Hemperek, T.; Huegging, F.; Karagounis, M.; Kishishita, T.; Krueger, H.; Rymaszewski, P.; Wermes, N.; Ciciriello, F.; Corsi, F.; Marzocca, C.; De Robertis, G.; Loddo, F.; Licciulli, F.; Andreazza, A.; Liberali, V.; Shojaii, S.; Stabile, A.; Bagatin, M.; Bisello, D.; Mattiazzo, S.; Ding, L.; Gerardin, S.; Giubilato, P.; Neviani, A.; Paccagnella, A.; Vogrig, D.; Wyss, J.; Bacchetta, N.; De Canio, F.; Gaioni, L.; Nodari, B.; Manghisoni, M.; Re, V.; Traversi, G.; Comotti, D.; Ratti, L.; Vacchi, C.; Beccherle, R.; Bellazzini, R.; Magazzu, G.; Minuti, M.; Morsani, F.; Palla, F.; Poulios, S.; Fanucci, L.; Rizzi, A.; Saponara, S.; Androsov, K.; Bilei, G. M.; Menichelli, M.; Conti, E.; Marconi, S.; Passeri, D.; Placidi, P.; Della Casa, G.; Mazza, G.; Rivetti, A.; Da Rocha Rolo, M. D.; Monteil, E.; Pacher, L.; Gajanana, D.; Gromov, V.; Hessey, N.; Kluit, R.; Zivkovic, V.; Havranek, M.; Janoska, Z.; Marcisovsky, M.; Neue, G.; Tomasek, L.; Kafka, V.; Sicho, P.; Vrba, V.; Vila, I.; Lopez-Morillo, E.; Aguirre, M. A.; Palomo, F. R.; Muñoz, F.; Abbaneo, D.; Christiansen, J.; Dannheim, D.; Dobos, D.; Linssen, L.; Pernegger, H.; Valerio, P.; Alipour Tehrani, N.; Bell, S.; Prydderch, M. L.; Thomas, S.; Christian, D. C.; Fahim, F.; Hoff, J.; Lipton, R.; Liu, T.; Zimmerman, T.; Garcia-Sciveres, M.; Gnani, D.; Mekkaoui, A.; Gorelov, I.; Hoeferkamp, M.; Seidel, S.; Toms, K.; De Witt, J. N.; Grillo, A.; Paternò, A.

    2016-12-01

    This paper is a review of recent progress of RD53 Collaboration. Results obtained on the study of the radiation effects on 65 nm CMOS have matured enough to define first strategies to adopt in the design of analog and digital circuits. Critical building blocks and analog very front end chains have been designed, tested before and after 5-800 Mrad. Small prototypes of 64×64 pixels with complex digital architectures have been produced, and point to address the main issues of dealing with extremely high pixel rates, while operating at very small in-time thresholds in the analog front end. The collaboration is now proceeding at full speed towards the design of a large scale prototype, called RD53A, in 65 nm CMOS technology.

  3. WFC3 Pixel Area Maps

    NASA Astrophysics Data System (ADS)

    Kalirai, J. S.; Cox, C.; Dressel, L.; Fruchter, A.; Hack, W.; Kozhurina-Platais, V.; Mack, J.

    2010-04-01

    We present the pixel area maps (PAMs) for the WFC3/UVIS and WFC3/IR detectors, and discuss the normalization of these images. HST processed flt images suffer from geometric distortion and therefore have pixel areas that vary on the sky. The counts (electrons) measured for a source on these images depends on the position of the source on the detector, an effect that is implicitly corrected when these images are multidrizzled into drz files. The flt images can be multiplied by the PAMs to yield correct and uniform counts for a given source irrespective of its location on the image. To ensure consistency between the count rate measured for sources in drz images and near the center of flt images, we set the normalization of the PAMs to unity at a reference pixel near the center of the UVIS mosaic and IR detector, and set the SCALE in the IDCTAB equal to the square root of the area of this reference pixel. The implications of this choice for photometric measurements are discussed.

  4. Edge pixel response studies of edgeless silicon sensor technology for pixellated imaging detectors

    NASA Astrophysics Data System (ADS)

    Maneuski, D.; Bates, R.; Blue, A.; Buttar, C.; Doonan, K.; Eklund, L.; Gimenez, E. N.; Hynds, D.; Kachkanov, S.; Kalliopuska, J.; McMullen, T.; O'Shea, V.; Tartoni, N.; Plackett, R.; Vahanen, S.; Wraight, K.

    2015-03-01

    Silicon sensor technologies with reduced dead area at the sensor's perimeter are under development at a number of institutes. Several fabrication methods for sensors which are sensitive close to the physical edge of the device are under investigation utilising techniques such as active-edges, passivated edges and current-terminating rings. Such technologies offer the goal of a seamlessly tiled detection surface with minimum dead space between the individual modules. In order to quantify the performance of different geometries and different bulk and implant types, characterisation of several sensors fabricated using active-edge technology were performed at the B16 beam line of the Diamond Light Source. The sensors were fabricated by VTT and bump-bonded to Timepix ROICs. They were 100 and 200 μ m thick sensors, with the last pixel-to-edge distance of either 50 or 100 μ m. The sensors were fabricated as either n-on-n or n-on-p type devices. Using 15 keV monochromatic X-rays with a beam spot of 2.5 μ m, the performance at the outer edge and corners pixels of the sensors was evaluated at three bias voltages. The results indicate a significant change in the charge collection properties between the edge and 5th (up to 275 μ m) from edge pixel for the 200 μ m thick n-on-n sensor. The edge pixel performance of the 100 μ m thick n-on-p sensors is affected only for the last two pixels (up to 110 μ m) subject to biasing conditions. Imaging characteristics of all sensor types investigated are stable over time and the non-uniformities can be minimised by flat-field corrections. The results from the synchrotron tests combined with lab measurements are presented along with an explanation of the observed effects.

  5. Few-Layer MoS2-Organic Thin-Film Hybrid Complementary Inverter Pixel Fabricated on a Glass Substrate.

    PubMed

    Lee, Hee Sung; Shin, Jae Min; Jeon, Pyo Jin; Lee, Junyeong; Kim, Jin Sung; Hwang, Hyun Chul; Park, Eunyoung; Yoon, Woojin; Ju, Sang-Yong; Im, Seongil

    2015-05-13

    Few-layer MoS2-organic thin-film hybrid complementary inverters demonstrate a great deal of device performance with a decent voltage gain of ≈12, a few hundred pW power consumption, and 480 Hz switching speed. As fabricated on glass, this hybrid CMOS inverter operates as a light-detecting pixel as well, using a thin MoS2 channel.

  6. Recent progress and development of a speedster-EXD: a new event-triggered hybrid CMOS x-ray detector

    NASA Astrophysics Data System (ADS)

    Griffith, Christopher V.; Falcone, Abraham D.; Prieskorn, Zachary R.; Burrows, David N.

    2015-08-01

    We present the characterization of a new event-driven X-ray hybrid CMOS detector developed by Penn State University in collaboration with Teledyne Imaging Sensors. Along with its low susceptibility to radiation damage, low power consumption, and fast readout time to avoid pile-up, the Speedster-EXD has been designed with the capability to limit its readout to only those pixels containing charge, thus enabling even faster effective frame rates. The threshold for the comparator in each pixel can be set by the user so that only pixels with signal above the set threshold are read out. The Speedster-EXD hybrid CMOS detector also has two new in-pixel features that reduce noise from known noise sources: (1) a low-noise, high-gain CTIA amplifier to eliminate crosstalk from interpixel capacitance (IPC) and (2) in-pixel CDS subtraction to reduce kTC noise. We present the read noise, dark current, IPC, energy resolution, and gain variation measurements of one Speedster-EXD detector.

  7. Pixel Hybridization Technologies for the HL-LHC

    NASA Astrophysics Data System (ADS)

    Alimonti, G.; Biasotti, M.; Ceriale, V.; Darbo, G.; Gariano, G.; Gaudiello, A.; Gemme, C.; Rossi, L.; Rovani, A.; Ruscino, E.

    2016-12-01

    During the 2024-2025 shut-down, the Large Hadron Collider (LHC) will be upgraded to reach an instantaneous luminosity up to 7×1034 cm-2s-1. This upgrade of the collider is called High-Luminosity LHC (HL-LHC). ATLAS and CMS detectors will be upgraded to meet the new challenges of HL-LHC: an average of 200 pile-up events in every bunch crossing and an integrated luminosity of 3000 fb-1 over ten years. In particular, the current trackers will be completely replaced. In HL-LHC the trackers should operate under high fluences (up to 1.4 × 1016 neq cm-2), with a correlated high radiation damage. The pixel detectors, the innermost part of the trackers, needed a completely new design in the readout electronics, sensors and interconnections. A new 65 nm front-end (FE) electronics is being developed by the RD53 collaboration compatible with smaller pixel sizes than the actual ones to cope with the high track densities. Consequently the bump density will increase up to 4 ·104 bumps/cm2. Preliminary results of two hybridization technologies study are presented in this paper. In particular, the on-going bump-bonding qualification program at Leonardo-Finmeccanica is discussed, together with alternative hybridization techniques, as the capacitive coupling for HV-CMOS detectors.

  8. Zero suppression logic of the ALICE muon forward tracker pixel chip prototype PIXAM and associated readout electronics development

    NASA Astrophysics Data System (ADS)

    Flouzat, C.; Değerli, Y.; Guilloux, F.; Orsini, F.; Venault, P.

    2015-05-01

    In the framework of the ALICE experiment upgrade at HL-LHC, a new forward tracking detector, the Muon Forward Tracker (MFT), is foreseen to overcome the intrinsic limitations of the present Muon Spectrometer and will perform new measurements of general interest for the whole ALICE physics. To fulfill the new detector requirements, CMOS Monolithic Active Pixel Sensors (MAPS) provide an attractive trade-off between readout speed, spatial resolution, radiation hardness, granularity, power consumption and material budget. This technology has been chosen to equip the Muon Forward Tracker and also the vertex detector: the Inner Tracking System (ITS). Since few years, an intensive R&D program has been performed on the design of MAPS in the 0.18 μ m CMOS Image Sensor (CIS) process. In order to avoid pile up effects in the experiment, the classical rolling shutter readout system of MAPS has been improved to overcome the readout speed limitation. A zero suppression algorithm, based on a 3 by 3 cluster finding (position and data), has been chosen for the MFT. This algorithm allows adequate data compression for the sensor. This paper presents the large size prototype PIXAM, which represents 1/3 of the final chip, and will focus specially on the zero suppression block architecture. This chip is designed and under fabrication in the 0.18 μ m CIS process. Finally, the readout electronics principle to send out the compressed data flow is also presented taking into account the cluster occupancy per MFT plane for a single central Pb-Pb collision.

  9. A custom CMOS imager for multi-beam laser scanning microscopy and an improvement of scanning speed

    NASA Astrophysics Data System (ADS)

    Seo, Min-Woong; Kagawa, Keiichiro; Yasutomi, Keita; Kawahito, Shoji

    2013-02-01

    Multi-beam laser scanning confocal microscopy with a 256 × 256-pixel custom CMOS imager performing focal-plane pinhole effect, in which any rotating disk is not required, is demonstrated. A specimen is illuminated by 32 × 32 diffraction limited light spots whose wavelength and pitch are 532nm and 8.4 μm, respectively. The spot array is generated by a microlens array, which is scanned by two-dimensional piezo actuator according to the scanning of the image sensor. The frame rate of the prototype is 0.17 Hz, which is limited by the actuator. The confocal effect has been confirmed by comparing the axial resolution in the confocal imaging mode with that of the normal imaging mode. The axial resolution in the confocal mode measured by the full width at half maximum (FWHM) for a planar mirror was 8.9 μm, which is showed that the confocality has been achieved with the proposed CMOS image sensor. The focal-plane pinhole effect in the confocal microscopy with the proposed CMOS imager has been demonstrated at low frame rate. An improvement of the scanning speed and a CMOS imager with photo-sensitivity modulation pixels suitable for high-speed scanning are also discussed.

  10. Development of Gated Pinned Avalanche Photodiode Pixels for High-Speed Low-Light Imaging

    PubMed Central

    Resetar, Tomislav; De Munck, Koen; Haspeslagh, Luc; Rosmeulen, Maarten; Süss, Andreas; Puers, Robert; Van Hoof, Chris

    2016-01-01

    This work explores the benefits of linear-mode avalanche photodiodes (APDs) in high-speed CMOS imaging as compared to different approaches present in literature. Analysis of APDs biased below their breakdown voltage employed in single-photon counting mode is also discussed, showing a potentially interesting alternative to existing Geiger-mode APDs. An overview of the recently presented gated pinned avalanche photodiode pixel concept is provided, as well as the first experimental results on a 8 × 16 pixel test array. Full feasibility of the proposed pixel concept is not demonstrated; however, informative data is obtained from the sensor operating under −32 V substrate bias and clearly exhibiting wavelength-dependent gain in frontside illumination. The readout of the chip designed in standard 130 nm CMOS technology shows no dependence on the high-voltage bias. Readout noise level of 15 e- rms, full well capacity of 8000e-, and the conversion gain of 75 µV/e- are extracted from the photon-transfer measurements. The gain characteristics of the avalanche junction are characterized on separate test diodes showing a multiplication factor of 1.6 for red light in frontside illumination. PMID:27537882

  11. Design of ADC in 25 μm pixels pitch dedicated for IRFPA image processing at LETI

    NASA Astrophysics Data System (ADS)

    Tchagaspanian, M.; Villard, P.; Dupont, B.; Chammings, G.; Martin, J. L.; Pistre, C.; Lattard, D.; Chantre, C.; Arnaud, A.; Yon, J. J.; Simoens, F.; Tissot, J. L.

    2007-04-01

    LETI has been involved in IRFPA development since 1978, the design department (LETI/DCIS) has focused its work on new ROIC architecture since many years. The trend is to integrate advanced functions into the CMOS design in the aim of making cost efficient sensors. The purpose of this paper is to present the latest developments of an Analog to Digital Converter embedded in a 25μm pixel. The design is driven by several goals. It targets both long integration time and snapshot exposure, 100% of image frame time being available for integration. All pixels are integrating the IR signal at the same time. The IR signal is converted into digital by using a charge packet counter. High density 130nm CMOS allows to use many digital functions such as counting, memory and addressing. This new structure has been applied to 25μm pitch bolometer sensors with a dedicated 320 x 240 IRCMOS circuit. Due to smart image processing in the CMOS, the bolometer architecture requirements may become very simple and low cost. The room temperature sensitivity and the DC offset are solved directly in the pixel. This FPA targets low NETD (<50mK), a variation of 80 Kelvin for the FPA temperature, 14 bits output at 50/60Hz video rate.

  12. Measurements of Si Hybrid CMOS X-Ray Detector Characteristics

    NASA Astrophysics Data System (ADS)

    Bongiorno, Stephen; Falcone, A.; Burrows, D.; Cook, R.

    2010-01-01

    The development of Hybrid CMOS Detectors (HCDs) for X-Ray telescope focal planes will place them in contention with CCDs on future satellite missions due to their faster frame rates, flexible readout scenarios, lower power consumption, and inherent radiation hardness. CCDs have been used with great success on the current generation of X-Ray telescopes (e.g. Chandra, XMM, Suzaku, and Swift). However their bucket-brigade readout architecture, which transfers charge across the chip with discrete component readout electronics, results in clockrate limited readout speeds that cause pileup (saturation) of bright sources and an inherent susceptibility to radiation induced displacement damage that limits mission lifetime. In contrast, HCDs read pixels with low power, on-chip multiplexer electronics in a random access fashion. Faster frame rates, achieved with multi-output readout design, will allow the next generation's larger effective area telescopes to observe bright sources free of pileup. Radiation damaged lattice sites effect a single pixel instead of an entire row. Random access, multi-output readout will allow for novel readout modes such as simultaneous bright-source-fast/whole-chip-slow readout. In order for HCDs to become useful X-Ray detectors, they must show noise and energy resolution performance similar to CCDs while retaining advantages inherent to HCDs. We will report on readnoise, conversion gain, and energy resolution measurements of X-Ray enhanced Teledyne HAWAII-1RG (H1RG) HCDs and describe techniques of H1RG data reduction.

  13. Measurements of Si hybrid CMOS x-ray detector characteristics

    NASA Astrophysics Data System (ADS)

    Bongiorno, Stephen D.; Falcone, Abe D.; Burrows, David N.; Cook, Robert; Bai, Yibin; Farris, Mark

    2009-08-01

    The development of Hybrid CMOS Detectors (HCDs) for X-Ray telescope focal planes will place them in contention with CCDs on future satellite missions due to their faster frame rates, flexible readout scenarios, lower power consumption, and inherent radiation hardness. CCDs have been used with great success on the current generation of X-Ray telescopes (e.g. Chandra, XMM, Suzaku, and Swift). However their bucket-brigade readout architecture, which transfers charge across the chip with discrete component readout electronics, results in clockrate limited readout speeds that cause pileup (saturation) of bright sources and an inherent susceptibility to radiation induced displacement damage that limits mission lifetime. In contrast, HCDs read pixels with low power, on-chip multiplexer electronics in a random access fashion. Faster frame rates achieved with multi-output readout design will allow the next generation's larger effective area telescopes to observe bright sources free of pileup. Radiation damaged lattice sites effect a single pixel instead of an entire row. Random access, multi-output readout will allow for novel readout modes such as simultaneous bright-source-fast/whole-chip-slow readout. In order for HCDs to be useful as X-Ray detectors, they must show noise and energy resolution performance similar to CCDs while retaining advantages inherent to HCDs. We will report on readnoise, conversion gain, and energy resolution measurements of an X-Ray enhanced Teledyne HAWAII-1RG (H1RG) HCD and describe techniques of H1RG data reduction.

  14. Hardware solutions for the 65k pixel X-ray camera module of 75 μm pixel size

    NASA Astrophysics Data System (ADS)

    Kasinski, K.; Maj, P.; Grybos, P.; Koziol, A.

    2016-02-01

    We present three hardware solutions designed for a detector module built with a 2 cm × 2 cm hybrid pixel detector built from a single 320 or 450 μ m thick silicon sensor designed and fabricated by Hamamatsu and two UFXC32k readout integrated circuits (128 × 256 pixels with 75μ m pitch, designed in CMOS 130 nm at AGH-UST). The chips work in a single photon counting mode and provide ultra-fast X-ray imaging. The presented hardware modules are designed according to requirements of various tests and applications: ṡDevice A: a fast and flexible system for tests with various radiation sources. ṡDevice B: a standalone, all-in-one imaging device providing three standard interfaces (USB 2.0, Ethernet, Camera Link) and up to 640 MB/s bandwidth. ṡDevice C: a prototype large-area imaging system. The paper shows the readout system structure for each case with highlighted circuit board designs with details on power distribution and cooling on both FR4 and LTCC (low temperature co-fired ceramic) based circuits.

  15. Readout circuit design of the retina-like CMOS image sensor

    NASA Astrophysics Data System (ADS)

    Cao, Fengmei; Song, Shengyu; Bai, Tingzhu; Cao, Nan

    2015-02-01

    Readout circuit is designed for a special retina-like CMOS image sensor. To realize the pixels timing drive and readout of the sensor, the Altera's Cyclone II FPGA is used as a control chip. The voltage of the sensor is supported by a voltage chip initialized by SPI with AVR MCU system. The analog image signal outputted by the sensor is converted to digital image data by 12-bits A/D converter ADS807 and the digital data is memorized in the SRAM. Using the Camera-link image grabber, the data stored in SRAM is transformed to image shown on PC. Experimental results show the circuit works well on retina-like CMOS timing drive and image readout and images can be displayed properly on the PC.

  16. A CMOS silicon spin qubit

    NASA Astrophysics Data System (ADS)

    Maurand, R.; Jehl, X.; Kotekar-Patil, D.; Corna, A.; Bohuslavskyi, H.; Laviéville, R.; Hutin, L.; Barraud, S.; Vinet, M.; Sanquer, M.; de Franceschi, S.

    2016-11-01

    Silicon, the main constituent of microprocessor chips, is emerging as a promising material for the realization of future quantum processors. Leveraging its well-established complementary metal-oxide-semiconductor (CMOS) technology would be a clear asset to the development of scalable quantum computing architectures and to their co-integration with classical control hardware. Here we report a silicon quantum bit (qubit) device made with an industry-standard fabrication process. The device consists of a two-gate, p-type transistor with an undoped channel. At low temperature, the first gate defines a quantum dot encoding a hole spin qubit, the second one a quantum dot used for the qubit read-out. All electrical, two-axis control of the spin qubit is achieved by applying a phase-tunable microwave modulation to the first gate. The demonstrated qubit functionality in a basic transistor-like device constitutes a promising step towards the elaboration of scalable spin qubit geometries in a readily exploitable CMOS platform.

  17. A CMOS silicon spin qubit

    PubMed Central

    Maurand, R.; Jehl, X.; Kotekar-Patil, D.; Corna, A.; Bohuslavskyi, H.; Laviéville, R.; Hutin, L.; Barraud, S.; Vinet, M.; Sanquer, M.; De Franceschi, S.

    2016-01-01

    Silicon, the main constituent of microprocessor chips, is emerging as a promising material for the realization of future quantum processors. Leveraging its well-established complementary metal–oxide–semiconductor (CMOS) technology would be a clear asset to the development of scalable quantum computing architectures and to their co-integration with classical control hardware. Here we report a silicon quantum bit (qubit) device made with an industry-standard fabrication process. The device consists of a two-gate, p-type transistor with an undoped channel. At low temperature, the first gate defines a quantum dot encoding a hole spin qubit, the second one a quantum dot used for the qubit read-out. All electrical, two-axis control of the spin qubit is achieved by applying a phase-tunable microwave modulation to the first gate. The demonstrated qubit functionality in a basic transistor-like device constitutes a promising step towards the elaboration of scalable spin qubit geometries in a readily exploitable CMOS platform. PMID:27882926

  18. A CMOS silicon spin qubit.

    PubMed

    Maurand, R; Jehl, X; Kotekar-Patil, D; Corna, A; Bohuslavskyi, H; Laviéville, R; Hutin, L; Barraud, S; Vinet, M; Sanquer, M; De Franceschi, S

    2016-11-24

    Silicon, the main constituent of microprocessor chips, is emerging as a promising material for the realization of future quantum processors. Leveraging its well-established complementary metal-oxide-semiconductor (CMOS) technology would be a clear asset to the development of scalable quantum computing architectures and to their co-integration with classical control hardware. Here we report a silicon quantum bit (qubit) device made with an industry-standard fabrication process. The device consists of a two-gate, p-type transistor with an undoped channel. At low temperature, the first gate defines a quantum dot encoding a hole spin qubit, the second one a quantum dot used for the qubit read-out. All electrical, two-axis control of the spin qubit is achieved by applying a phase-tunable microwave modulation to the first gate. The demonstrated qubit functionality in a basic transistor-like device constitutes a promising step towards the elaboration of scalable spin qubit geometries in a readily exploitable CMOS platform.

  19. Accelerated life testing effects on CMOS microcircuit characteristics, phase 1

    NASA Technical Reports Server (NTRS)

    Maximow, B.

    1976-01-01

    An accelerated life test of sufficient duration to generate a minimum of 50% cumulative failures in lots of CMOS devices was conducted to provide a basis for determining the consistency of activation energy at 250 C. An investigation was made to determine whether any thresholds were exceeded during the high temperature testing, which could trigger failure mechanisms unique to that temperature. The usefulness of the 250 C temperature test as a predictor of long term reliability was evaluated.

  20. Performance analysis of a large photoactive area CMOS line sensor for fast, time-resolved spectroscopy applications

    NASA Astrophysics Data System (ADS)

    Poklonskaya, Elena A.; Durini, Daniel; Jung, Melanie; Schrey, Olaf; Driewer, Adrian; Brockherde, Werner; Hosticka, Bedrich; Vogt, Holger

    2014-05-01

    The performance of a fabricated CMOS line sensor based on the lateral drift-field photodiode (LDPD)1 concept is described. A new pixel structure was designed to decrease the charge transfer time across the photoactive area. Synopsys TCAD simulations were performed to design a proper intrinsic lateral drift-field within the pixel. The line sensor was fabricated in the 0.35 μm CMOS technology, and further characterized using a tailored photon-transfer method2 and the EMVA 1288 standard3. The basic parameters such as spectral responsivity, photo-response non-uniformity and dark current were measured at fabricated sensor samples. A special attention was paid to charge transfer time characterization4 and the evaluation of crosstalk between neighboring pixels - two major concerns attained during the development. It is shown that the electro-optical characteristics of the developed line sensor are comparable to those delivered by CCD line sensors available on the market, which are normally superior in performance compared to their CMOS based counterparts, but offering additional features such as the possibility of time gating, non-destructive readout, and charge accumulation over several cycles: approaches used to enhance the signal-to-noise ratio (SNR) of the sensor output.

  1. 18k Channels single photon counting readout circuit for hybrid pixel detector

    NASA Astrophysics Data System (ADS)

    Maj, P.; Grybos, P.; Szczygiel, R.; Zoladz, M.; Sakumura, T.; Tsuji, Y.

    2013-01-01

    We have performed measurements of an integrated circuit named PXD18k designed for hybrid pixel semiconductor detectors used in X-ray imaging applications. The PXD18k integrated circuit, fabricated in CMOS 180 nm technology, has dimensions of 9.64 mm×20 mm and contains approximately 26 million transistors. The core of the IC is a matrix of 96×192 pixels with 100 μm×100 μm pixel size. Each pixel works in a single photon counting mode. A single pixel contains two charge sensitive amplifiers with Krummenacher feedback scheme, two shapers, two discriminators (with independent thresholds A and B) and two 16-bit ripple counters. The data are read out via eight low voltage differential signaling (LVDS) outputs with 100 Mbps rate. The power consumption is dominated by analog blocks and it is about 23 μW/pixel. The effective peaking time at the discriminator input is 30 ns and is mainly determined by the time constants of the charge sensitive amplifier (CSA). The gain is equal to 42.5 μV/e- and the equivalent noise charge is 168 e- rms (with bump-bonded silicon pixel detector). Thanks to the use of trim DACs in each pixel, the effective threshold spread at the discriminator input is only 1.79 mV. The dead time of the front end electronics for a standard setting is 172 ns (paralyzable model). In the standard readout mode (when the data collection time is separated from the time necessary to readout data from the chip) the PXD18k IC works with two energy thresholds per pixel. The PXD18k can also be operated in the continuous readout mode (with a zero dead time) where one can select the number of bits readout from each pixel to optimize the PXD18k frame rate. For example, for reading out 16 bits/pixel the frame rate is 2.7 kHz and for 4 bits/pixel it rises to 7.1 kHz.

  2. A 65k pixel, 150k frames-per-second camera with global gating and micro-lenses suitable for fluorescence lifetime imaging

    NASA Astrophysics Data System (ADS)

    Burri, Samuel; Powolny, François; Bruschini, Claudio E.; Michalet, Xavier; Regazzoni, Francesco; Charbon, Edoardo

    2014-05-01

    This paper presents our work on a 65k pixel single-photon avalanche diode (SPAD) based imaging sensor realized in a 0.35μm standard CMOS process. At a resolution of 512 by 128 pixels the sensor is read out in 6.4μs to deliver over 150k monochrome frames per second. The individual pixel has a size of 24μm2 and contains the SPAD with a 12T quenching and gating circuitry along with a memory element. The gating signals are distributed across the chip through a balanced tree to minimize the signal skew between the pixels. The array of pixels is row-addressable and data is sent out of the chip on 128 lines in parallel at a frequency of 80MHz. The system is controlled by an FPGA which generates the gating and readout signals and can be used for arbitrary real-time computation on the frames from the sensor. The communication protocol between the camera and a conventional PC is USB2. The active area of the chip is 5% and can be significantly improved with the application of a micro-lens array. A micro-lens array, for use with collimated light, has been designed and its performance is reviewed in the paper. Among other high-speed phenomena the gating circuitry capable of generating illumination periods shorter than 5ns can be used for Fluorescence Lifetime Imaging (FLIM). In order to measure the lifetime of fluorophores excited by a picosecond laser, the sensor's illumination period is synchronized with the excitation laser pulses. A histogram of the photon arrival times relative to the excitation is then constructed by counting the photons arriving during the sensitive time for several positions of the illumination window. The histogram for each pixel is transferred afterwards to a computer where software routines extract the lifetime at each location with an accuracy better than 100ps. We show results for fluorescence lifetime measurements using different fluorophores with lifetimes ranging from 150ps to 5ns.

  3. High speed wide field CMOS camera for Transneptunian Automatic Occultation Survey

    NASA Astrophysics Data System (ADS)

    Wang, Shiang-Yu; Geary, John C.; Amato, Stephen M.; Hu, Yen-Sang; Ling, Hung-Hsu; Huang, Pin-Jie; Furesz, Gabor; Chen, Hsin-Yo; Chang, Yin-Chang; Szentgyorgyi, Andrew; Lehner, Matthew; Norton, Timothy

    2014-08-01

    The Transneptunian Automated Occultation Survey (TAOS II) is a three robotic telescope project to detect the stellar occultation events generated by Trans Neptunian Objects (TNOs). TAOS II project aims to monitor about 10000 stars simultaneously at 20Hz to enable statistically significant event rate. The TAOS II camera is designed to cover the 1.7 degree diameter field of view (FoV) of the 1.3m telescope with 10 mosaic 4.5kx2k CMOS sensors. The new CMOS sensor has a back illumination thinned structure and high sensitivity to provide similar performance to that of the backillumination thinned CCDs. The sensor provides two parallel and eight serial decoders so the region of interests can be addressed and read out separately through different output channels efficiently. The pixel scale is about 0.6"/pix with the 16μm pixels. The sensors, mounted on a single Invar plate, are cooled to the operation temperature of about 200K by a cryogenic cooler. The Invar plate is connected to the dewar body through a supporting ring with three G10 bipods. The deformation of the cold plate is less than 10μm to ensure the sensor surface is always within ±40μm of focus range. The control electronics consists of analog part and a Xilinx FPGA based digital circuit. For each field star, 8×8 pixels box will be readout. The pixel rate for each channel is about 1Mpix/s and the total pixel rate for each camera is about 80Mpix/s. The FPGA module will calculate the total flux and also the centroid coordinates for every field star in each exposure.

  4. Optical detection of ultrasound from optically rough surfaces using a custom CMOS sensor

    NASA Astrophysics Data System (ADS)

    Achamfuo-Yeboah, S. O.; Light, R. A.; Sharples, S. D.

    2015-01-01

    The optical detection of ultrasound from optically rough surfaces is severely limited when using a conventional interferometric or optical beam deflection (OBD) setup because the detected light is speckled. This means that complicated and expensive setups are required to detect ultrasound optically on rough surfaces. We present a CMOS integrated circuit that can detect laser ultrasound in the presence of speckle. The detector circuit is based on the simple knife edge detector. It is self-adapting and is fast, inxepensive, compact and robust. The CMOS circuit is implemented as a widefield array of 32×32 pixels. At each pixel the received light is compared with an adjacent pixel in order to determine the local light gradient. The result of this comparison is stored and used to connect each pixel to the positive or negative gradient output as appropriate (similar to a balanced knife edge detector). The perturbation of the surface due to ultrasound preserves the speckle distribution whilst deflecting it. The spatial disturbance of the speckle pattern due to the ultrasound is detected by considering each pair of pixels as a knife edge detector. The sensor can adapt itself to match the received optical speckle pattern in less than 0.1 μs, and then detect the ultrasound within 0.5 μs of adaptation. This makes it possible to repeatedly detect ultrasound from optically rough surfaces very quickly. The detector is capable of independent operation controlled by a local microcontroller, or it may be connected to a computer for more sophisticated configuration and control. We present the theory of its operation and discuss results validating the concept and operation of the device. We also present preliminary results from an improved design which grants a higher bandwidth, allowing for optical detection of higher frequency ultrasound.

  5. Recent developments in green light sensitive organic photodetectors for hybrid CMOS image sensor applications (Conference Presentation)

    NASA Astrophysics Data System (ADS)

    Leem, Dong-Seok; Lim, Seon-Jeong; Bulliard, Xavier; Lee, Gae Hwang; Lee, Kwang-Hee; Yun, Sungyoung; Yagi, Tadao; Satoh, Ryu-Ichi; Park, Kyung-Bae; Choi, Yeong Suk; Jin, Yong Wan; Lee, Sangyoon

    2016-09-01

    Typical CMOS colour image sensors consist of Si-based photodetectors (PDs) attached with colour filter arrays (i.e., the Bayer pattern). Recent trends on the development of high resolution image sensors, however, require downsizing the pixel dimension, which inevitably results in the loss of sensitivity due to the reduction in the photon acquisition. Very recently, hybrid stacks of organic photodetectors (OPDs) on conventional CMOS technologies have been proposed as one of the promising approaches to realise highly sensitive image sensors by doubling the light detecting area in the limited pixel size. Specifically, OPDs with orthogonal photosensitivity to green light and Si-based PDs with red and blue colour filters serve as the top and bottom photo-conversion layers, respectively. In this presentation, we will introduce the recent development of high performance green light sensitive OPDs and the demonstration of colour images from hybrid CMOS image sensors proposed. OPDs consisting of small molecule organic bulk heterto-junction structures, hole/electron buffer layers, and transparent top/bottom ITO electrodes exhibited peak external quantum efficiencies of 60-65% at 550-560 nm wavelengths and full width at half maximum of 120 nm at reverse bias of 3 V. Extremely low dark current densities in the range of 0.2-0.5 nA/cm2 at reverse bias of 3V and consequently high specific detectivities over 2×10^13 Jones were obtained from the developed OPD system. Further investigations in terms of the molecular structures of organic light absorbing materials, buffer materials, layer sequences, and even integration issues of the OPD on the CMOS will be described in detail.

  6. Projection ultrasound and ultrasound CT using a PE-CMOS sensor: a preliminary study

    NASA Astrophysics Data System (ADS)

    Liu, Chu Chuan; Lo, Shih-Chung B.; Freedman, Matthew T.; Rich, David; Kula, John; Lasser, Bob; Lasser, Marvin E.; Zeng, JianChao; Ro, Doug

    2004-04-01

    The purpose of this study is to investigate the feasibility of generating 3D projection ultrasound computed tomography images using a transmission ultrasound system via a piezoelectric material coated CMOS ultrasound sensing array. There are four main components in the laboratory setup: (1) a transducer operated at 5MHz frequency generating unfocused ultrasound plane waves, (2) an acoustic compound lens that collects the energy and focuses ultrasound signals onto the detector array, and (3) a CMOS ultrasound sensing array (Model I100, Imperium Inc. Silver Spring, MD) that receives the ultrasound and converts the energy to analog voltage followed by a digital conversion, and (4) a stepping motor that controls the rotation of the target for each projection view. The CMOS array consists of 128×128 pixel elements with 85μm per pixel. The system can generate an ultrasound attenuation image similar to a digital image obtained from an x-ray projection system. A computed tomography (CT) study using the ultrasound projection was performed. The CMOS array acquired ultrasound attenuation images of the target. A total of 400 projections of the target image were generated to cover 180o rotation of the CT scan, each with 0.45° increment. Based on these 400 projection views, we rearranged each line profile in the corresponding projection views to form a sinogram. For each sinogram, we computed the cross section image of the target at the corresponding slice. Specifically, the projection ultrasound computed tomography (PUCT) images were reconstructed by applying the filtered back-projection method with scattering compensation technique. Based on the sequential 2D PUCT images of the target, we generated the 3D PUCT image.

  7. Compact SPAD-Based Pixel Architectures for Time-Resolved Image Sensors

    PubMed Central

    Perenzoni, Matteo; Pancheri, Lucio; Stoppa, David

    2016-01-01

    This paper reviews the state of the art of single-photon avalanche diode (SPAD) image sensors for time-resolved imaging. The focus of the paper is on pixel architectures featuring small pixel size (<25 μm) and high fill factor (>20%) as a key enabling technology for the successful implementation of high spatial resolution SPAD-based image sensors. A summary of the main CMOS SPAD implementations, their characteristics and integration challenges, is provided from the perspective of targeting large pixel arrays, where one of the key drivers is the spatial uniformity. The main analog techniques aimed at time-gated photon counting and photon timestamping suitable for compact and low-power pixels are critically discussed. The main features of these solutions are the adoption of analog counting techniques and time-to-analog conversion, in NMOS-only pixels. Reliable quantum-limited single-photon counting, self-referenced analog-to-digital conversion, time gating down to 0.75 ns and timestamping with 368 ps jitter are achieved. PMID:27223284

  8. Sub-pixel resolving optofluidic microscope for on-chip cell imaging.

    PubMed

    Zheng, Guoan; Lee, Seung Ah; Yang, Samuel; Yang, Changhuei

    2010-11-21

    We report the implementation of a fully on-chip, lensless, sub-pixel resolving optofluidic microscope (SROFM). The device utilizes microfluidic flow to deliver specimens directly across a complementary metal oxide semiconductor (CMOS) sensor to generate a sequence of low-resolution (LR) projection images, where resolution is limited by the sensor's pixel size. This image sequence is then processed with a pixel super-resolution algorithm to reconstruct a single high resolution (HR) image, where features beyond the Nyquist rate of the LR images are resolved. We demonstrate the device's capabilities by imaging microspheres, protist Euglena gracilis, and Entamoeba invadens cysts with sub-cellular resolution and establish that our prototype has a resolution limit of 0.75 microns. Furthermore, we also apply the same pixel super-resolution algorithm to reconstruct HR videos in which the dynamic interaction between the fluid and the sample, including the in-plane and out-of-plane rotation of the sample within the flow, can be monitored in high resolution. We believe that the powerful combination of both the pixel super-resolution and optofluidic microscopy techniques within our SROFM is a significant step forwards toward a simple, cost-effective, high throughput and highly compact imaging solution for biomedical and bioscience needs.

  9. SAR Image Complex Pixel Representations

    SciTech Connect

    Doerry, Armin W.

    2015-03-01

    Complex pixel values for Synthetic Aperture Radar (SAR) images of uniform distributed clutter can be represented as either real/imaginary (also known as I/Q) values, or as Magnitude/Phase values. Generally, these component values are integers with limited number of bits. For clutter energy well below full-scale, Magnitude/Phase offers lower quantization noise than I/Q representation. Further improvement can be had with companding of the Magnitude value.

  10. Single-pixel hyperspectral imaging

    NASA Astrophysics Data System (ADS)

    Suo, Jinli; Wang, Yuwang; Bian, Liheng; Dai, Qionghai

    2016-10-01

    Conventional multispectral imaging methods detect photons of a 3D hyperspectral data cube separately either in the spatial or spectral dimension using array detectors, and are thus photon inefficient and spectrum range limited. Besides, they are usually bulky and highly expensive. To address these issues, this paper presents single-pixel multispectral imaging techniques, which are of high sensitivity, wide spectrum range, low cost and light weight. Two mechanisms are proposed, and experimental validation are also reported.

  11. A characterization technique for nanosecond gated CMOS x-ray cameras

    NASA Astrophysics Data System (ADS)

    Dayton, M.; Carpenter, A.; Chen, H.; Palmer, N.; Datte, P.; Bell, P.; Sanchez, M.; Claus, L.; Robertson, G.; Porter, J.

    2016-09-01

    We present a characterization technique for nanosecond gated CMOS cameras designed and built by Sandia National Laboratory under their Ultra-Fast X-ray Imager program. The cameras have been used to record images during HED physics experiments at Sandia's Z Facility and at LLNL's National Ignition Facility. The behavior of the camera's fast shutters was not expected to be ideal since they propagate over a large pixel array of 25 mm x 12 mm, which could result in shutter timing skew, variations in the FWHM, and variations in the shutter's peak response. Consequently, a detailed characterization of the camera at the pixel level was critical for interpreting the images. Assuming the pixel's photo-response was linear, the shutter profiles for each pixel were simplified to a pair of sigmoid functions using standard non-linear fitting methods to make the subsequent analysis less computationally intensive. A pixel-level characterization of a "Furi" camera showed frame-to-frame gain variations that could be normalized with a gain mask and significant timing skew at the sensor's center column that could not be corrected. The shutter profiles for Furi were then convolved with data generated from computational models to forward fit images collected with the camera.

  12. LGSD/NGSD: high speed visible CMOS imagers for E-ELT adaptive optics

    NASA Astrophysics Data System (ADS)

    Downing, Mark; Kolb, Johann; Dierickx, Bart; Defernez, Arnaud; Feautrier, Philippe; Fryer, Martin; Gach, Jean-Luc; Jerram, Paul; Jorden, Paul; Meyer, Manfred; Pike, Andrew; Reyes, Javier; Stadler, Eric; Swift, Nick

    2016-08-01

    The success of the next generation of instruments for ELT class telescopes will depend upon improving the image quality by exploiting sophisticated Adaptive Optics (AO) systems. One of the critical components of the AO systems for the European Extremely Large Telescope (E-ELT) has been identified as the Large Visible Laser/Natural Guide Star AO Wavefront Sensing (WFS) detector. The combination of large format, 1600x1600 pixels to finely sample the wavefront and the spot elongation of laser guide stars (LGS), fast frame rate of 700 frames per second (fps), low read noise (< 3e-), and high QE (> 90%) makes the development of this device extremely challenging. Results of design studies concluded that a highly integrated Backside Illuminated CMOS Imager built on High Resistivity silicon as the most suitable technology. Two generations of the CMOS Imager are planned: a) a smaller `pioneering' device of > 800x800 pixels capable of meeting first light needs of the E-ELT. The NGSD, the topic of this paper, is the first iteration of this device; b) the larger full sized device called LGSD. The NGSD has come out of production, it has been thinned to 12μm, backside processed and packaged in a custom 370pin Ceramic PGA (Pin Grid Array). Results of comprehensive tests performed both at e2v and ESO are presented that validate the choice of CMOS Imager as the correct technology for the E-ELT Large Visible WFS Detector. These results along with plans for a second iteration to improve two issues of hot pixels and cross-talk are presented.

  13. A 2D 4×4 Channel Readout ASIC for Pixelated CdTe Detectors for Medical Imaging Applications

    PubMed Central

    Macias-Montero, Jose-Gabriel; Sarraj, Maher; Chmeissani, Mokhtar; Martínez, Ricardo; Puigdengoles, Carles

    2015-01-01

    We present a 16-channel readout integrated circuit (ROIC) with nanosecond-resolution time to digital converter (TDC) for pixelated Cadmium Telluride (CdTe) gamma-ray detectors. The 4 × 4 pixel array ROIC is the proof of concept of the 10 × 10 pixel array readout ASIC for positron-emission tomography (PET) scanner, positron-emission mammography (PEM) scanner, and Compton gamma camera. The electronics of each individual pixel integrates an analog front-end with switchable gain, an analog to digital converter (ADC), configuration registers, and a 4-state digital controller. For every detected photon, the pixel electronics provides the energy deposited in the detector with 10-bit resolution, and a fast trigger signal for time stamp. The ASIC contains the 16-pixel matrix electronics, a digital controller, five global voltage references, a TDC, a temperature sensor, and a band-gap based current reference. The ASIC has been fabricated with TSMC 0.25 μm mixed-signal CMOS technology and occupies an area of 5.3 mm × 6.8 mm. The TDC shows a resolution of 95.5 ps, a precision of 600 ps at full width half maximum (FWHM), and a power consumption of 130 μW. In acquisition mode, the total power consumption of every pixel is 200 μW. An equivalent noise charge (ENC) of 160 e−RMS at maximum gain and negative polarity conditions has been measured at room temperature. PMID:26744545

  14. A 2D 4×4 Channel Readout ASIC for Pixelated CdTe Detectors for Medical Imaging Applications.

    PubMed

    Macias-Montero, Jose-Gabriel; Sarraj, Maher; Chmeissani, Mokhtar; Martínez, Ricardo; Puigdengoles, Carles

    2015-10-01

    We present a 16-channel readout integrated circuit (ROIC) with nanosecond-resolution time to digital converter (TDC) for pixelated Cadmium Telluride (CdTe) gamma-ray detectors. The 4 × 4 pixel array ROIC is the proof of concept of the 10 × 10 pixel array readout ASIC for positron-emission tomography (PET) scanner, positron-emission mammography (PEM) scanner, and Compton gamma camera. The electronics of each individual pixel integrates an analog front-end with switchable gain, an analog to digital converter (ADC), configuration registers, and a 4-state digital controller. For every detected photon, the pixel electronics provides the energy deposited in the detector with 10-bit resolution, and a fast trigger signal for time stamp. The ASIC contains the 16-pixel matrix electronics, a digital controller, five global voltage references, a TDC, a temperature sensor, and a band-gap based current reference. The ASIC has been fabricated with TSMC 0.25 μm mixed-signal CMOS technology and occupies an area of 5.3 mm × 6.8 mm. The TDC shows a resolution of 95.5 ps, a precision of 600 ps at full width half maximum (FWHM), and a power consumption of 130 μW. In acquisition mode, the total power consumption of every pixel is 200 μW. An equivalent noise charge (ENC) of 160 e(-)RMS at maximum gain and negative polarity conditions has been measured at room temperature.

  15. ATLAS pixel IBL modules construction experience and developments for future upgrade

    NASA Astrophysics Data System (ADS)

    Gaudiello, A.

    2015-10-01

    The first upgrade of the ATLAS Pixel Detector is the Insertable B-Layer (IBL), installed in May 2014 in the core of ATLAS. Two different silicon sensor technologies, planar n-in-n and 3D, are used. Sensors are connected with the new generation 130 nm IBM CMOS FE-I4 read-out chip via solder bump-bonds. Production quality control tests were set up to verify and rate the performance of the modules before integration into staves. An overview of module design and construction, the quality control results and production yield will be discussed, as well as future developments foreseen for future detector upgrades.

  16. A silicon pixel readout ASIC with 100 ps time resolution for the NA62 experiment

    NASA Astrophysics Data System (ADS)

    Dellacasa, G.; Garbolino, S.; Marchetto, F.; Martoiu, S.; Mazza, G.; Rivetti, A.; Wheadon, R.

    2011-01-01

    The silicon tracker of the NA62 experiment requires the measurement of the particles arrival time with a resolution better than 200 ps rms and a spatial resolution of 300 μm. A time measurement technique based on a Time to Amplitude Converter has been implemented in an ASIC in order to prove the possibility to integrate a TDC with resolution better than 200 ps in a pixel cell. Time-walk problem has been addressed with the use of the Constant Fraction Discriminator technique. The ASIC has been designed in a CMOS 0.13 μm technology with single event upset protection of the digital logic.

  17. PILATUS: A single photon counting pixel detector for X-ray applications

    NASA Astrophysics Data System (ADS)

    Henrich, B.; Bergamaschi, A.; Broennimann, C.; Dinapoli, R.; Eikenberry, E. F.; Johnson, I.; Kobas, M.; Kraft, P.; Mozzanica, A.; Schmitt, B.

    2009-08-01

    The hybrid pixel technology combines silicon sensors with CMOS-processing chips by a 2D micro bump-bonding interconnection technology developed at Paul Scherrer Institute [C. Broennimann, E.F. Eikenberry, B. Henrich, R. Horisberger, G. Huelsen, E. Pohl, B. Schmitt, C. Schulze-Briese, M. Suzuki, T. Tomizaki, H. Toyokawa, A. Wagner. J. Synchrotron Rad. 13 (2005) 120 [1]; T. Rohe, C. Broennimann, F. Glaus, J. Gobrecht, S. Heising, M. Horisberger, R. Horisberger, H.C. Kaestl, J. Lehmann, S. Streuli, Nucl. Instr. and Meth. Phys. Res. A 565 (2006) 303 [2

  18. Mapping Electrical Crosstalk in Pixelated Sensor Arrays

    NASA Technical Reports Server (NTRS)

    Seshadri, Suresh (Inventor); Cole, David (Inventor); Smith, Roger M (Inventor); Hancock, Bruce R. (Inventor)

    2013-01-01

    The effects of inter pixel capacitance in a pixilated array may be measured by first resetting all pixels in the array to a first voltage, where a first image is read out, followed by resetting only a subset of pixels in the array to a second voltage, where a second image is read out, where the difference in the first and second images provide information about the inter pixel capacitance. Other embodiments are described and claimed.

  19. Mapping Electrical Crosstalk in Pixelated Sensor Arrays

    NASA Technical Reports Server (NTRS)

    Seshadri, Suresh (Inventor); Cole, David (Inventor); Smith, Roger M. (Inventor); Hancock, Bruce R. (Inventor)

    2017-01-01

    The effects of inter pixel capacitance in a pixilated array may be measured by first resetting all pixels in the array to a first voltage, where a first image is read out, followed by resetting only a subset of pixels in the array to a second voltage, where a second image is read out, where the difference in the first and second images provide information about the inter pixel capacitance. Other embodiments are described and claimed.

  20. A new ATLAS pixel front-end IC for upgraded LHC luminosity

    NASA Astrophysics Data System (ADS)

    Barbero, M.; Arutinov, D.; Beccherle, R.; Darbo, G.; Ely, R.; Fougeron, D.; Garcia-Sciveres, M.; Gnani, D.; Hemperek, T.; Karagounis, M.; Kluit, R.; Kostioukhine, V.; Mekkaoui, A.; Menouni, M.; Schipper, J.-D.

    2009-06-01

    A new pixel Front-End (FE) IC is being developed in a 130 nm technology for use in the upgraded ATLAS pixel detector. The new pixel FE will be made of smaller pixels (50×250 μm vs. 50×400 μm for the present FE, FE-I3), a much improved active area over inactive area ratio, and a new analog pixel chain tuned for low power and new detector input capacitance. The higher luminosity for which this IC is tuned implies a complete redefinition of the digital architecture logic, which will not be based on End-of-Column data buffering but on local pixel logic and local pixel data storage. An overview of the new FE is given with particular emphasis on the new digital logic architecture and possible architecture variations.

  1. An OTA-based CMOS bandpass filter for NMR applications

    NASA Astrophysics Data System (ADS)

    Shesharaman, K. N.; Kittur, Harish M.

    2012-12-01

    One of the very popular medical imaging techniques used in present-day radiology is the magnetic resonance imaging (MRI) which is based on the phenomenon of nuclear magnetic resonance (NMR) in the hydrogen atoms present in the body. There is ever-increasing research in electronic circuit design for biomedical applications using NMR. Earlier magnetic resonance imagers operated at a magnetic field strength of 0.3 T. The present imagers operate at a magnetic field of 1.5 T, the resonance frequency of the nuclei being 64 MHz. This article presents a CMOS bandpass filter (BPF) design for NMR applications. The overall BPF design is realised in 180 nm CMOS technology which occupies an active area of 24.23 × 33.125 µm2 and consumes 0.165 mW of power from a 1.5 V supply.

  2. Micromachined high-performance RF passives in CMOS substrate

    NASA Astrophysics Data System (ADS)

    Li, Xinxin; Ni, Zao; Gu, Lei; Wu, Zhengzheng; Yang, Chen

    2016-11-01

    This review systematically addresses the micromachining technologies used for the fabrication of high-performance radio-frequency (RF) passives that can be integrated into low-cost complementary metal-oxide semiconductor (CMOS)-grade (i.e. low-resistivity) silicon wafers. With the development of various kinds of post-CMOS-compatible microelectromechanical systems (MEMS) processes, 3D structural inductors/transformers, variable capacitors, tunable resonators and band-pass/low-pass filters can be compatibly integrated into active integrated circuits to form monolithic RF system-on-chips. By using MEMS processes, including substrate modifying/suspending and LIGA-like metal electroplating, both the highly lossy substrate effect and the resistive loss can be largely eliminated and depressed, thereby meeting the high-performance requirements of telecommunication applications.

  3. Development of CMOS-compatible membrane projection lithography

    NASA Astrophysics Data System (ADS)

    Burckel, D. Bruce; Samora, Sally; Wiwi, Mike; Wendt, Joel R.

    2013-09-01

    Recently we have demonstrated membrane projection lithography (MPL) as a fabrication approach capable of creating 3D structures with sub-micron metallic inclusions for use in metamaterial and plasmonic applications using polymer material systems. While polymers provide several advantages in processing, they are soft and subject to stress-induced buckling. Furthermore, in next generation active photonic structures, integration of photonic components with CMOS electronics is desirable. While the MPL process flow is conceptually simple, it requires matrix, membrane and backfill materials with orthogonal processing deposition/removal chemistries. By transitioning the MPL process flow into an entirely inorganic material set based around silicon and standard CMOS-compatible materials, several elements of silicon microelectronics can be integrated into photonic devices at the unit-cell scale. This paper will present detailed fabrication and characterization data of these materials, emphasizing the processing trade space as well as optical characterization of the resulting structures.

  4. Monolithic CMOS-MEMS integration for high-g accelerometers

    NASA Astrophysics Data System (ADS)

    Narasimhan, Vinayak; Li, Holden; Tan, Chuan Seng

    2014-10-01

    This paper highlights work-in-progress towards the conceptualization, simulation, fabrication and initial testing of a silicon-germanium (SiGe) integrated CMOS-MEMS high-g accelerometer for military, munition, fuze and shock measurement applications. Developed on IMEC's SiGe MEMS platform, the MEMS offers a dynamic range of 5,000 g and a bandwidth of 12 kHz. The low noise readout circuit adopts a chopper-stabilization technique implementing the CMOS through the TSMC 0.18 µm process. The device structure employs a fully differential split comb-drive set up with two sets of stators and a rotor all driven separately. Dummy structures acting as protective over-range stops were designed to protect the active components when under impacts well above the designed dynamic range.

  5. Implantable CMOS imaging device with absorption filters for green fluorescence imaging

    NASA Astrophysics Data System (ADS)

    Sunaga, Yoshinori; Haruta, Makito; Takehara, Hironari; Ohta, Yasumi; Motoyama, Mayumi; Noda, Toshihiko; Sasagawa, Kiyotaka; Tokuda, Takashi; Ohta, Jun

    2014-03-01

    Green fluorescent materials such as Green Fluorescence Protein (GFP) and fluorescein are often used for observing neural activities. Thus, it is important to observe the fluorescence in a freely moving state in order to understand neural activities corresponding to behaviors. In this work, we developed an implantable CMOS imaging device for in-vivo green fluorescence imaging with efficient excitation light rejection using a combination of absorption filters. An interference filter is usually used for a fluorescence microscope in order to achieve high fluorescence imaging sensitivity. However, in the case of the implantable device, interference filters are not suitable because their transmission spectra depend on incident angle. To solve this problem we used two kinds of absorption filters that do not have angle dependence. An absorption filter consisting of yellow dye (VARYFAST YELLOW 3150) was coated on the pixel array of an image sensor. The rejection ratio of ideal excitation light (490 nm) against green fluorescence (510 nm) was 99.66%. However, the blue LED as an excitation light source has a broad emission spectrum and its intensity at 510 nm is 2.2 x 10-2 times the emission peak intensity. By coating LEDs with the emission absorption filters, the intensity of the unwanted component of the excitation light was reduced to 1.4 x 10-4. Using the combination of absorption filters, we achieved excitation light transmittance of 10-5 onto the image sensor. It is expected that high-sensitivity green fluorescence imaging of neural activities in a freely moving mouse will be possible by using this technology.

  6. Spectrometry with consumer-quality CMOS cameras.

    PubMed

    Scheeline, Alexander

    2015-01-01

    Many modern spectrometric instruments use diode arrays, charge-coupled arrays, or CMOS cameras for detection and measurement. As portable or point-of-use instruments are desirable, one would expect that instruments using the cameras in cellular telephones and tablet computers would be the basis of numerous instruments. However, no mass market for such devices has yet developed. The difficulties in using megapixel CMOS cameras for scientific measurements are discussed, and promising avenues for instrument development reviewed. Inexpensive alternatives to use of the built-in camera are also mentioned, as the long-term question is whether it is better to overcome the constraints of CMOS cameras or to bypass them.

  7. Carbon nanotube integration with a CMOS process.

    PubMed

    Perez, Maximiliano S; Lerner, Betiana; Resasco, Daniel E; Pareja Obregon, Pablo D; Julian, Pedro M; Mandolesi, Pablo S; Buffa, Fabian A; Boselli, Alfredo; Lamagna, Alberto

    2010-01-01

    This work shows the integration of a sensor based on carbon nanotubes using CMOS technology. A chip sensor (CS) was designed and manufactured using a 0.30 μm CMOS process, leaving a free window on the passivation layer that allowed the deposition of SWCNTs over the electrodes. We successfully investigated with the CS the effect of humidity and temperature on the electrical transport properties of SWCNTs. The possibility of a large scale integration of SWCNTs with CMOS process opens a new route in the design of more efficient, low cost sensors with high reproducibility in their manufacture.

  8. Carbon Nanotube Integration with a CMOS Process

    PubMed Central

    Perez, Maximiliano S.; Lerner, Betiana; Resasco, Daniel E.; Pareja Obregon, Pablo D.; Julian, Pedro M.; Mandolesi, Pablo S.; Buffa, Fabian A.; Boselli, Alfredo; Lamagna, Alberto

    2010-01-01

    This work shows the integration of a sensor based on carbon nanotubes using CMOS technology. A chip sensor (CS) was designed and manufactured using a 0.30 μm CMOS process, leaving a free window on the passivation layer that allowed the deposition of SWCNTs over the electrodes. We successfully investigated with the CS the effect of humidity and temperature on the electrical transport properties of SWCNTs. The possibility of a large scale integration of SWCNTs with CMOS process opens a new route in the design of more efficient, low cost sensors with high reproducibility in their manufacture. PMID:22319330

  9. Nanopore-CMOS Interfaces for DNA Sequencing.

    PubMed

    Magierowski, Sebastian; Huang, Yiyun; Wang, Chengjie; Ghafar-Zadeh, Ebrahim

    2016-08-06

    DNA sequencers based on nanopore sensors present an opportunity for a significant break from the template-based incumbents of the last forty years. Key advantages ushered by nanopore technology include a simplified chemistry and the ability to interface to CMOS technology. The latter opportunity offers substantial promise for improvement in sequencing speed, size and cost. This paper reviews existing and emerging means of interfacing nanopores to CMOS technology with an emphasis on massively-arrayed structures. It presents this in the context of incumbent DNA sequencing techniques, reviews and quantifies nanopore characteristics and models and presents CMOS circuit methods for the amplification of low-current nanopore signals in such interfaces.

  10. Study of built-in amplifier performance on HV-CMOS sensor for the ATLAS phase-II strip tracker upgrade

    NASA Astrophysics Data System (ADS)

    Liang, Z.; Affolder, A.; Arndt, K.; Bates, R.; Benoit, M.; Di Bello, F.; Blue, A.; Bortoletto, D.; Buckland, M.; Buttar, C.; Caragiulo, P.; Das, D.; Dopke, J.; Dragone, A.; Ehrler, F.; Fadeyev, V.; Galloway, Z.; Grabas, H.; Gregor, I. M.; Grenier, P.; Grillo, A.; Hoeferkamp, M.; Hommels, L. B. A.; Huffman, B. T.; John, J.; Kanisauskas, K.; Kenney, C.; Kramberger, J.; Mandić, I.; Maneuski, D.; Martinez-Mckinney, F.; McMahon, S.; Meng, L.; Mikuž, M.; Muenstermann, D.; Nickerson, R.; Peric, I.; Phillips, P.; Plackett, R.; Rubbo, F.; Segal, J.; Seidel, S.; Seiden, A.; Shipsey, I.; Song, W.; Stanitzki, M.; Su, D.; Tamma, C.; Turchetta, R.; Vigani, L.; Volk, J.; Wang, R.; Warren, M.; Wilson, F.; Worm, S.; Xiu, Q.; Zhang, J.; Zhu, H.

    2016-09-01

    This paper focuses on the performance of analog readout electronics (built-in amplifier) integrated on the high-voltage (HV) CMOS silicon sensor chip, as well as its radiation hardness. Since the total collected charge from minimum ionizing particle (MIP) for the CMOS sensor is 10 times lower than for a conventional planar sensor, it is crucial to integrate a low noise built-in amplifier on the sensor chip to improve the signal to noise ratio of the system. As part of the investigation for the ATLAS strip detector upgrade, a test chip that comprises several pixel arrays with different geometries, as well as standalone built-in amplifiers and built-in amplifiers in pixel arrays has been fabricated in a 0.35 μm high-voltage CMOS process. Measurements of the gain and the noise of both the standalone amplifiers and built-in amplifiers in pixel arrays were performed before and after gamma radiation of up to 60 Mrad. Of special interest is the variation of the noise as a function of the sensor capacitance. We optimized the configuration of the amplifier for a fast rise time to adapt to the LHC bunch crossing period of 25 ns, and measured the timing characteristics including jitter. Our results indicate an adequate amplifier performance for monolithic structures used in HV-CMOS technology. The results have been incorporated in the next submission of a large-structure chip.

  11. X-ray performance of a wafer-scale CMOS flat panel imager for applications in medical imaging and nondestructive testing

    NASA Astrophysics Data System (ADS)

    Cha, Bo Kyung; Jeon, Seongchae; Seo, Chang-Woo

    2016-09-01

    This paper presents a wafer-scale complementary metal-oxide semiconductor (CMOS)-based X-ray flat panel detector for medical imaging and nondestructive testing applications. In this study, our proposed X-ray CMOS flat panel imager has been fabricated by using a 0.35 μm 1-poly/4-metal CMOS process. The pixel size is 100 μm×100 μm and the pixel array format is 1200×1200 pixels, which provide a field-of-view (FOV) of 120mm×120 mm. The 14.3-bit extended counting analog-to digital converter (ADC) with built-in binning mode was used to reduce the area and simultaneously improve the image resolution. The different screens such as thallium-doped CsI (CsI:Tl) and terbium gadolinium oxysulfide (Gd2O2S:Tb) scintillators were used as conversion materials for X-rays to visible light photons. The X-ray imaging performance such as X-ray sensitivity as a function of X-ray exposure dose, spatial resolution, image lag and X-ray images of various objects were measured under practical medical and industrial application conditions. This paper results demonstrate that our prototype CMOS-based X-ray flat panel imager has the significant potential for medical imaging and non-destructive testing (NDT) applications with high-resolution and high speed rate.

  12. System-on-Chip Considerations for Heterogeneous Integration of CMOS and Fluidic Bio-Interfaces.

    PubMed

    Datta-Chaudhuri, Timir; Smela, Elisabeth; Abshire, Pamela A

    2016-04-21

    CMOS chips are increasingly used for direct sensing and interfacing with fluidic and biological systems. While many biosensing systems have successfully combined CMOS chips for readout and signal processing with passive sensing arrays, systems that co-locate sensing with active circuits on a single chip offer significant advantages in size and performance but increase the complexity of multi-domain design and heterogeneous integration. This emerging class of lab-on-CMOS systems also poses distinct and vexing technical challenges that arise from the disparate requirements of biosensors and integrated circuits (ICs). Modeling these systems must address not only circuit design, but also the behavior of biological components on the surface of the IC and any physical structures. Existing tools do not support the cross-domain simulation of heterogeneous lab-on-CMOS systems, so we recommend a two-step modeling approach: using circuit simulation to inform physics-based simulation, and vice versa. We review the primary lab-on-CMOS implementation challenges and discuss practical approaches to overcome them. Issues include new versions of classical challenges in system-on-chip integration, such as thermal effects, floor-planning, and signal coupling, as well as new challenges that are specifically attributable to biological and fluidic domains, such as electrochemical effects, non-standard packaging, surface treatments, sterilization, microfabrication of surface structures, and microfluidic integration. We describe these concerns as they arise in lab-on-CMOS systems and discuss solutions that have been experimentally demonstrated.

  13. System-on-Chip Considerations for Heterogeneous Integration of CMOS and Fluidic Bio-Interfaces.

    PubMed

    Datta-Chaudhuri, Timir; Smela, Elisabeth; Abshire, Pamela A

    2016-12-01

    CMOS chips are increasingly used for direct sensing and interfacing with fluidic and biological systems. While many biosensing systems have successfully combined CMOS chips for readout and signal processing with passive sensing arrays, systems that co-locate sensing with active circuits on a single chip offer significant advantages in size and performance but increase the complexity of multi-domain design and heterogeneous integration. This emerging class of lab-on-CMOS systems also poses distinct and vexing technical challenges that arise from the disparate requirements of biosensors and integrated circuits (ICs). Modeling these systems must address not only circuit design, but also the behavior of biological components on the surface of the IC and any physical structures. Existing tools do not support the cross-domain simulation of heterogeneous lab-on-CMOS systems, so we recommend a two-step modeling approach: using circuit simulation to inform physics-based simulation, and vice versa. We review the primary lab-on-CMOS implementation challenges and discuss practical approaches to overcome them. Issues include new versions of classical challenges in system-on-chip integration, such as thermal effects, floor-planning, and signal coupling, as well as new challenges that are specifically attributable to biological and fluidic domains, such as electrochemical effects, non-standard packaging, surface treatments, sterilization, microfabrication of surface structures, and microfluidic integration. We describe these concerns as they arise in lab-on-CMOS systems and discuss solutions that have been experimentally demonstrated.

  14. Design and Fabrication of High-Efficiency CMOS/CCD Imagers

    NASA Technical Reports Server (NTRS)

    Pain, Bedabrata

    2007-01-01

    An architecture for back-illuminated complementary metal oxide/semiconductor (CMOS) and charge-coupled-device (CCD) ultraviolet/visible/near infrared- light image sensors, and a method of fabrication to implement the architecture, are undergoing development. The architecture and method are expected to enable realization of the full potential of back-illuminated CMOS/CCD imagers to perform with high efficiency, high sensitivity, excellent angular response, and in-pixel signal processing. The architecture and method are compatible with next-generation CMOS dielectric-forming and metallization techniques, and the process flow of the method is compatible with process flows typical of the manufacture of very-large-scale integrated (VLSI) circuits. The architecture and method overcome all obstacles that have hitherto prevented high-yield, low-cost fabrication of back-illuminated CMOS/CCD imagers by use of standard VLSI fabrication tools and techniques. It is not possible to discuss the obstacles in detail within the space available for this article. Briefly, the obstacles are posed by the problems of generating light-absorbing layers having desired uniform and accurate thicknesses, passivation of surfaces, forming structures for efficient collection of charge carriers, and wafer-scale thinning (in contradistinction to diescale thinning). A basic element of the present architecture and method - the element that, more than any other, makes it possible to overcome the obstacles - is the use of an alternative starting material: Instead of starting with a conventional bulk-CMOS wafer that consists of a p-doped epitaxial silicon layer grown on a heavily-p-doped silicon substrate, one starts with a special silicon-on-insulator (SOI) wafer that consists of a thermal oxide buried between a lightly p- or n-doped, thick silicon layer and a device silicon layer of appropriate thickness and doping. The thick silicon layer is used as a handle: that is, as a mechanical support for the

  15. Pixel Analysis of Photospheric Spectral Data. I. Plasma Dynamics

    NASA Astrophysics Data System (ADS)

    Rasca, Anthony P.; Chen, James; Pevtsov, Alexei A.

    2016-11-01

    Recent observations of the photosphere using high spatial and temporal resolution show small dynamic features at or below the current resolving limits. A new pixel dynamics method has been developed to analyze spectral profiles and quantify changes in line displacement, width, asymmetry, and peakedness of photospheric absorption lines. The algorithm evaluates variations of line profile properties in each pixel and determines the statistics of such fluctuations averaged over all pixels in a given region. The method has been used to derive statistical characteristics of pixel fluctuations in observed quiet-Sun regions, an active region with no eruption, and an active region with an ongoing eruption. Using Stokes I images from the Vector Spectromagnetograph (VSM) of the Synoptic Optical Long-term Investigations of the Sun (SOLIS) telescope on 2012 March 13, variations in line width and peakedness of Fe i 6301.5 Å are shown to have a distinct spatial and temporal relationship with an M7.9 X-ray flare in NOAA 11429. This relationship is observed as stationary and contiguous patches of pixels adjacent to a sunspot exhibiting intense flattening in the line profile and line-center displacement as the X-ray flare approaches peak intensity, which is not present in area scans of the non-eruptive active region. The analysis of pixel dynamics allows one to extract quantitative information on differences in plasma dynamics on sub-pixel scales in these photospheric regions. The analysis can be extended to include the Stokes parameters and study signatures of vector components of magnetic fields and coupled plasma properties.

  16. Single Photon Counting Performance and Noise Analysis of CMOS SPAD-Based Image Sensors

    PubMed Central

    Dutton, Neale A. W.; Gyongy, Istvan; Parmesan, Luca; Henderson, Robert K.

    2016-01-01

    SPAD-based solid state CMOS image sensors utilising analogue integrators have attained deep sub-electron read noise (DSERN) permitting single photon counting (SPC) imaging. A new method is proposed to determine the read noise in DSERN image sensors by evaluating the peak separation and width (PSW) of single photon peaks in a photon counting histogram (PCH). The technique is used to identify and analyse cumulative noise in analogue integrating SPC SPAD-based pixels. The DSERN of our SPAD image sensor is exploited to confirm recent multi-photon threshold quanta image sensor (QIS) theory. Finally, various single and multiple photon spatio-temporal oversampling techniques are reviewed. PMID:27447643

  17. Single Photon Counting Performance and Noise Analysis of CMOS SPAD-Based Image Sensors.

    PubMed

    Dutton, Neale A W; Gyongy, Istvan; Parmesan, Luca; Henderson, Robert K

    2016-07-20

    SPAD-based solid state CMOS image sensors utilising analogue integrators have attained deep sub-electron read noise (DSERN) permitting single photon counting (SPC) imaging. A new method is proposed to determine the read noise in DSERN image sensors by evaluating the peak separation and width (PSW) of single photon peaks in a photon counting histogram (PCH). The technique is used to identify and analyse cumulative noise in analogue integrating SPC SPAD-based pixels. The DSERN of our SPAD image sensor is exploited to confirm recent multi-photon threshold quanta image sensor (QIS) theory. Finally, various single and multiple photon spatio-temporal oversampling techniques are reviewed.

  18. Wavelength scanning achieves pixel super-resolution in holographic on-chip microscopy

    NASA Astrophysics Data System (ADS)

    Luo, Wei; Göröcs, Zoltan; Zhang, Yibo; Feizi, Alborz; Greenbaum, Alon; Ozcan, Aydogan

    2016-03-01

    Lensfree holographic on-chip imaging is a potent solution for high-resolution and field-portable bright-field imaging over a wide field-of-view. Previous lensfree imaging approaches utilize a pixel super-resolution technique, which relies on sub-pixel lateral displacements between the lensfree diffraction patterns and the image sensor's pixel-array, to achieve sub-micron resolution under unit magnification using state-of-the-art CMOS imager chips, commonly used in e.g., mobile-phones. Here we report, for the first time, a wavelength scanning based pixel super-resolution technique in lensfree holographic imaging. We developed an iterative super-resolution algorithm, which generates high-resolution reconstructions of the specimen from low-resolution (i.e., under-sampled) diffraction patterns recorded at multiple wavelengths within a narrow spectral range (e.g., 10-30 nm). Compared with lateral shift-based pixel super-resolution, this wavelength scanning approach does not require any physical shifts in the imaging setup, and the resolution improvement is uniform in all directions across the sensor-array. Our wavelength scanning super-resolution approach can also be integrated with multi-height and/or multi-angle on-chip imaging techniques to obtain even higher resolution reconstructions. For example, using wavelength scanning together with multi-angle illumination, we achieved a halfpitch resolution of 250 nm, corresponding to a numerical aperture of 1. In addition to pixel super-resolution, the small scanning steps in wavelength also enable us to robustly unwrap phase, revealing the specimen's optical path length in our reconstructed images. We believe that this new wavelength scanning based pixel super-resolution approach can provide competitive microscopy solutions for high-resolution and field-portable imaging needs, potentially impacting tele-pathology applications in resource-limited-settings.

  19. Submission of the first full scale prototype chip for upgraded ATLAS pixel detector at LHC, FE-I4A

    NASA Astrophysics Data System (ADS)

    Barbero, Marlon; Arutinov, David; Beccherle, Roberto; Darbo, Giovanni; Dube, Sourabh; Elledge, David; Fleury, Julien; Fougeron, Denis; Garcia-Sciveres, Maurice; Gensolen, Fabrice; Gnani, Dario; Gromov, Vladimir; Jensen, Frank; Hemperek, Tomasz; Karagounis, Michael; Kluit, Ruud; Kruth, Andre; Mekkaoui, Abderrezak; Menouni, Mohsine; Schipper, Jan David; Wermes, Norbert; Zivkovic, Vladimir

    2011-09-01

    A new ATLAS pixel chip FE-I4 is being developed for use in upgraded LHC luminosity environments, including the near-term Insertable B-Layer (IBL) upgrade. FE-I4 is designed in a 130 nm CMOS technology, presenting advantages in terms of radiation tolerance and digital logic density compared to the 0.25 μm CMOS technology used for the current ATLAS pixel IC, FE-I3. The FE-I4 architecture is based on an array of 80×336 pixels, each 50×250 μm2, consisting of analog and digital sections. In the summer 2010, a first full scale prototype FE-I4A was submitted for an engineering run. This IC features the full scale pixel array as well as the complex periphery of the future full-size FE-I4. The FE-I4A contains also various extra test features which should prove very useful for the chip characterization, but deviate from the needs for standard operation of the final FE-I4 for IBL. In this paper, focus will be brought to the various features implemented in the FE-I4A submission, while also underlining the main differences between the FE-I4A IC and the final FE-I4 as envisioned for IBL.

  20. Making a trillion pixels dance

    NASA Astrophysics Data System (ADS)

    Singh, Vivek; Hu, Bin; Toh, Kenny; Bollepalli, Srinivas; Wagner, Stephan; Borodovsky, Yan

    2008-03-01

    In June 2007, Intel announced a new pixelated mask technology. This technology was created to address the problem caused by the growing gap between the lithography wavelength and the feature sizes patterned with it. As this gap has increased, the quality of the image has deteriorated. About a decade ago, Optical Proximity Correction (OPC) was introduced to bridge this gap, but as this gap continued to increase, one could not rely on the same basic set of techniques to maintain image quality. The computational lithography group at Intel sought to alleviate this problem by experimenting with additional degrees of freedom within the mask. This paper describes the resulting pixelated mask technology, and some of the computational methods used to create it. The first key element of this technology is a thick mask model. We realized very early in the development that, unlike traditional OPC methods, the pixelated mask would require a very accurate thick mask model. Whereas in the traditional methods, one can use the relatively coarse approximations such as the boundary layer method, use of such techniques resulted not just in incorrect sizing of parts of the pattern, but in whole features missing. We built on top of previously published domain decomposition methods, and incorporated limitations of the mask manufacturing process, to create an accurate thick mask model. Several additional computational techniques were invoked to substantially increase the speed of this method to a point that it was feasible for full chip tapeout. A second key element of the computational scheme was the comprehension of mask manufacturability, including the vital issue of the number of colors in the mask. While it is obvious that use of three or more colors will give the best image, one has to be practical about projecting mask manufacturing capabilities for such a complex mask. To circumvent this serious issue, we eventually settled on a two color mask - comprising plain glass and etched

  1. Design and TCAD simulation of planar p-on-n active-edge pixel sensors for the next generation of FELs

    NASA Astrophysics Data System (ADS)

    Dalla Betta, G.-F.; Batignani, G.; Benkechkache, M. A.; Bettarini, S.; Casarosa, G.; Comotti, D.; Fabris, L.; Forti, F.; Grassi, M.; Latreche, S.; Lodola, L.; Malcovati, P.; Manghisoni, M.; Mendicino, R.; Morsani, F.; Paladino, A.; Pancheri, L.; Paoloni, E.; Ratti, L.; Re, V.; Rizzo, G.; Traversi, G.; Vacchi, C.; Verzellesi, G.; Xu, H.

    2016-07-01

    We report on the design and TCAD simulations of planar p-on-n sensors with active edge aimed at a four-side buttable X-ray detector module for future FEL applications. Edge terminations with different number of guard rings were designed to find the best trade-off between breakdown voltage and border gap size. The methodology of the sensor design, the optimization of the most relevant parameters to maximize the breakdown voltage and the final layout are described.

  2. Light-controlled biphasic current stimulator IC using CMOS image sensors for high-resolution retinal prosthesis and in vitro experimental results with rd1 mouse.

    PubMed

    Oh, Sungjin; Ahn, Jae-Hyun; Lee, Sangmin; Ko, Hyoungho; Seo, Jong Mo; Goo, Yong-Sook; Cho, Dong-il Dan

    2015-01-01

    Retinal prosthetic devices stimulate retinal nerve cells with electrical signals proportional to the incident light intensities. For a high-resolution retinal prosthesis, it is necessary to reduce the size of the stimulator pixels as much as possible, because the retinal nerve cells are concentrated in a small area of approximately 5 mm × 5 mm. In this paper, a miniaturized biphasic current stimulator integrated circuit is developed for subretinal stimulation and tested in vitro. The stimulator pixel is miniaturized by using a complementary metal-oxide-semiconductor (CMOS) image sensor composed of three transistors. Compared to a pixel that uses a four-transistor CMOS image sensor, this new design reduces the pixel size by 8.3%. The pixel size is further reduced by simplifying the stimulation-current generating circuit, which provides a 43.9% size reduction when compared to the design reported to be the most advanced version to date for subretinal stimulation. The proposed design is fabricated using a 0.35 μm bipolar-CMOS-DMOS process. Each pixel is designed to fit in a 50 μ m × 55 μm area, which theoretically allows implementing more than 5000 pixels in the 5 mm × 5 mm area. Experimental results show that a biphasic current in the range of 0 to 300 μA at 12 V can be generated as a function of incident light intensities. Results from in vitro experiments with rd1 mice indicate that the proposed method can be effectively used for retinal prosthesis with a high resolution.

  3. Signal-Conditioning Block of a 1 × 200 CMOS Detector Array for a Terahertz Real-Time Imaging System

    PubMed Central

    Yang, Jong-Ryul; Lee, Woo-Jae; Han, Seong-Tae

    2016-01-01

    A signal conditioning block of a 1 × 200 Complementary Metal-Oxide-Semiconductor (CMOS) detector array is proposed to be employed with a real-time 0.2 THz imaging system for inspecting large areas. The plasmonic CMOS detector array whose pixel size including an integrated antenna is comparable to the wavelength of the THz wave for the imaging system, inevitably carries wide pixel-to-pixel variation. To make the variant outputs from the array uniform, the proposed signal conditioning block calibrates the responsivity of each pixel by controlling the gate bias of each detector and the voltage gain of the lock-in amplifiers in the block. The gate bias of each detector is modulated to 1 MHz to improve the signal-to-noise ratio of the imaging system via the electrical modulation by the conditioning block. In addition, direct current (DC) offsets of the detectors in the array are cancelled by initializing the output voltage level from the block. Real-time imaging using the proposed signal conditioning block is demonstrated by obtaining images at the rate of 19.2 frame-per-sec of an object moving on the conveyor belt with a scan width of 20 cm and a scan speed of 25 cm/s. PMID:26950128

  4. Signal-Conditioning Block of a 1 × 200 CMOS Detector Array for a Terahertz Real-Time Imaging System.

    PubMed

    Yang, Jong-Ryul; Lee, Woo-Jae; Han, Seong-Tae

    2016-03-02

    A signal conditioning block of a 1 × 200 Complementary Metal-Oxide-Semiconductor (CMOS) detector array is proposed to be employed with a real-time 0.2 THz imaging system for inspecting large areas. The plasmonic CMOS detector array whose pixel size including an integrated antenna is comparable to the wavelength of the THz wave for the imaging system, inevitably carries wide pixel-to-pixel variation. To make the variant outputs from the array uniform, the proposed signal conditioning block calibrates the responsivity of each pixel by controlling the gate bias of each detector and the voltage gain of the lock-in amplifiers in the block. The gate bias of each detector is modulated to 1 MHz to improve the signal-to-noise ratio of the imaging system via the electrical modulation by the conditioning block. In addition, direct current (DC) offsets of the detectors in the array are cancelled by initializing the output voltage level from the block. Real-time imaging using the proposed signal conditioning block is demonstrated by obtaining images at the rate of 19.2 frame-per-sec of an object moving on the conveyor belt with a scan width of 20 cm and a scan speed of 25 cm/s.

  5. Polarization-Analyzing CMOS Image Sensor With Monolithically Embedded Polarizer for Microchemistry Systems.

    PubMed

    Tokuda, T; Yamada, H; Sasagawa, K; Ohta, J

    2009-10-01

    This paper proposes and demonstrates a polarization-analyzing CMOS sensor based on image sensor architecture. The sensor was designed targeting applications for chiral analysis in a microchemistry system. The sensor features a monolithically embedded polarizer. Embedded polarizers with different angles were implemented to realize a real-time absolute measurement of the incident polarization angle. Although the pixel-level performance was confirmed to be limited, estimation schemes based on the variation of the polarizer angle provided a promising performance for real-time polarization measurements. An estimation scheme using 180 pixels in a 1deg step provided an estimation accuracy of 0.04deg. Polarimetric measurements of chiral solutions were also successfully performed to demonstrate the applicability of the sensor to optical chiral analysis.

  6. Characterization of the C-MOS Cd-Te Imager PIXIRAD for energy discriminated X-ray imaging

    NASA Astrophysics Data System (ADS)

    Romano, A.; Pacella, D.; Claps, G.; Causa, F.; Gabellieri, L.

    2015-02-01

    The aim of the present work is to assess the operational characteristics of the PIXIRAD Imaging Counter for use in high-definition energy resolved X-ray imaging for different applications. The PIXIRAD imager was developed by an INFN-Pisa Spin-off. It works in photon counting mode in a wide energy range, soft and hard X-rays (2-100 keV), with pulse discrimination defined by two thresholds. The 650 μ m thick CdTe X-ray sensor is interfaced with a CMOS VLSI chip organized on a 512× 476 matrix of 55 μ m exagonal pixels (total active area of 30.7× 24.8 mm2). The experimental characterization was carried out in the range 3.7-80 keV, to assess the energy discrimination capability and detection efficiency of the PIXIRAD. Energy discrimination in bands was investigated using calibrated monochromatic X-ray sources (fluorescence of Ca, Fe, Cu, Br, Mo, Ag, I, Ta) and a BaCs radioactive source. In addition, two absolutely calibrated X-ray sources (Moxtek 50 kV Bullet and Oxford Instruments SB-80-1M) were utilized. The experimental data show that the PIXIRAD energy response is linear up to about 15 keV, beyond which the cluster size becomes larger than the pixel dimension. It produces multiple counts resulting in a tail at lower energy. Energy resolution was estimated to be about 30%. The effects in term of energy discrimination and a ``smooth energy discrimination'' in bands has been investigated by studying the separation between different energy lines, acquiring combined images with different energy ranges and setting properly the PIXIRAD threshold.

  7. Thin hybrid pixel assembly with backside compensation layer on ROIC

    NASA Astrophysics Data System (ADS)

    Bates, R.; Buttar, C.; McMullen, T.; Cunningham, L.; Ashby, J.; Doherty, F.; Gray, C.; Pares, G.; Vignoud, L.; Kholti, B.; Vahanen, S.

    2017-01-01

    The entire ATLAS inner tracking system will be replaced for operation at the HL-LHC . This will include a significantly larger pixel detector of approximately 15 m2. For this project, it is critical to reduce the mass of the hybrid pixel modules and this requires thinning both the sensor and readout chips to about 150 micrometres each. The thinning of the silicon chips leads to low bump yield for SnAg bumps due to bad co-planarity of the two chips at the solder reflow stage creating dead zones within the pixel array. In the case of the ATLAS FEI4 pixel readout chip thinned to 100 micrometres, the chip is concave, with the front side in compression, with a bow of +100 micrometres at room temperature which varies to a bow of -175 micrometres at the SnAg solder reflow temperature, caused by the CTE mismatch between the materials in the CMOS stack and the silicon substrate. A new wafer level process to address the issue of low bump yield be controlling the chip bow has been developed. A back-side dielectric and metal stack of SiN and Al:Si has been deposited on the readout chip wafer to dynamically compensate the stress of the front side stack. In keeping with a 3D process the materials used are compatible with Through Silicon Via (TSV) technology with a TSV last approach which is under development for this chip. It is demonstrated that the amplitude of the correction can be manipulated by the deposition conditions and thickness of the SiN/Al:Si stack. The bow magnitude over the temperature range for the best sample to date is reduced by almost a factor of 4 and the sign of the bow (shape of the die) remains constant. Further development of the backside deposition conditions is on-going with the target of close to zero bow at the solder reflow temperature and a minimal bow magnitude throughout the temperature range. Assemblies produced from FEI4 readout wafers thinned to 100 micrometres with the backside compensation layer have been made for the first time and

  8. Ultra-low power high-dynamic range color pixel embedding RGB to r-g chromaticity transformation

    NASA Astrophysics Data System (ADS)

    Lecca, Michela; Gasparini, Leonardo; Gottardi, Massimo

    2014-05-01

    This work describes a novel color pixel topology that converts the three chromatic components from the standard RGB space into the normalized r-g chromaticity space. This conversion is implemented with high-dynamic range and with no dc power consumption, and the auto-exposure capability of the sensor ensures to capture a high quality chromatic signal, even in presence of very bright illuminants or in the darkness. The pixel is intended to become the basic building block of a CMOS color vision sensor, targeted to ultra-low power applications for mobile devices, such as human machine interfaces, gesture recognition, face detection. The experiments show that significant improvements of the proposed pixel with respect to standard cameras in terms of energy saving and accuracy on data acquisition. An application to skin color-based description is presented.

  9. Development activities of a CdTe/CdZnTe pixel detector for gamma-ray spectrometry with imaging and polarimetry capability in astrophysics

    NASA Astrophysics Data System (ADS)

    Gálvez, J. L.; Hernanz, M.; Álvarez, J. M.; Álvarez, L.; La Torre, M.; Caroli, E.; Lozano, M.; Pellegrini, G.; Ullán, M.; Cabruja, E.; Martínez, R.; Chmeissani, M.; Puigdengoles, C.

    2013-05-01

    In the last few years we have been working on feasibility studies of future instruments in the gamma-ray range, from several keV up to a few MeV, in collaboration with other research institutes. High sensitivities are essential to perform detailed studies of cosmic explosions and cosmic accelerators, e.g., Supernovae, Classical Novae, Supernova Remnants (SNRs), Gamma-Ray Bursts (GRBs), Pulsars, Active Galactic Nuclei (AGN).Cadmium Telluride (CdTe) and Cadmium Zinc Telluride (CdZnTe) are very attractive materials for gamma-ray detection, since they have already demonstrated their great performance onboard current space missions, such as IBIS/INTEGRAL and BAT/SWIFT, and future projects like ASIM onboard the ISS. However, the energy coverage of these instruments is limited up to a few hundred keV, and there has not been yet a dedicated instrument for polarimetry.Our research and development activities aim to study a gamma-ray imaging spectrometer in the MeV range based on CdTe detectors, suited either for the focal plane of a focusing mission or as a calorimeter for a Compton camera. In addition, our undergoing detector design is proposed as the baseline for the payload of a balloon-borne experiment dedicated to hard X- and soft gamma-ray polarimetry, currently under study and called CμSP (CZT μ-Spectrometer Polarimeter). Other research institutes such as INAF-IASF, DTU Space, LIP, INEM/CNR, CEA, are involved in this proposal. We will report on the main features of the prototype we are developing at the Institute of Space Sciences, a gamma-ray detector with imaging and polarimetry capabilities in order to fulfil the combined requirement of high detection efficiency with good spatial and energy resolution driven by the science.

  10. Proceedings of PIXEL98 -- International pixel detector workshop

    SciTech Connect

    Anderson, D.F.; Kwan, S.

    1998-08-01

    Experiments around the globe face new challenges of more precision in the face of higher interaction rates, greater track densities, and higher radiation doses, as they look for rarer and rarer processes, leading many to incorporate pixelated solid-state detectors into their plans. The highest-readout rate devices require new technologies for implementation. This workshop reviewed recent, significant progress in meeting these technical challenges. Participants presented many new results; many of them from the weeks--even days--just before the workshop. Brand new at this workshop were results on cryogenic operation of radiation-damaged silicon detectors (dubbed the Lazarus effect). Other new work included a diamond sensor with 280-micron collection distance; new results on breakdown in p-type silicon detectors; testing of the latest versions of read-out chip and interconnection designs; and the radiation hardness of deep-submicron processes.

  11. Noise reduction effect and analysis through serial multiple sampling in a CMOS image sensor with floating diffusion boost-driving

    NASA Astrophysics Data System (ADS)

    Wakabayashi, Hayato; Yamaguchi, Keiji; Yamagata, Yuuki

    2017-04-01

    We have developed a 1/2.3-in. 10.3 mega pixel back-illuminated CMOS image sensor utilizing serial multiple sampling. This sensor achieves an RMS random noise of 1.3e‑ and row temporal noise (RTN) of 0.19e‑. Serial multiple sampling is realized with a column inline averaging technique without the need for additional processing circuitry. Pixel readout is accomplished utilizing a 4-shared-pixel floating diffusion (FD) boost-driving architecture. RTN caused by column parallel readout was analyzed considering the transfer function at the system level and the developed model was verified by measurement data taken at each sampling time. This model demonstrates the RTN improvement of ‑1.6 dB in a parallel multiple readout architecture.

  12. Serial Pixel Analog-to-Digital Converter

    SciTech Connect

    Larson, E D

    2010-02-01

    This method reduces the data path from the counter to the pixel register of the analog-to-digital converter (ADC) from as many as 10 bits to a single bit. The reduction in data path width is accomplished by using a coded serial data stream similar to a pseudo random number (PRN) generator. The resulting encoded pixel data is then decoded into a standard hexadecimal format before storage. The high-speed serial pixel ADC concept is based on the single-slope integrating pixel ADC architecture. Previous work has described a massively parallel pixel readout of a similar architecture. The serial ADC connection is similar to the state-of-the art method with the exception that the pixel ADC register is a shift register and the data path is a single bit. A state-of-the-art individual-pixel ADC uses a single-slope charge integration converter architecture with integral registers and “one-hot” counters. This implies that parallel data bits are routed among the counter and the individual on-chip pixel ADC registers. The data path bit-width to the pixel is therefore equivalent to the pixel ADC bit resolution.

  13. 320 x 240 uncooled IRFPA with pixel wise thin film vacuum packaging

    NASA Astrophysics Data System (ADS)

    Yon, J.-J.; Dumont, G.; Rabaud, W.; Becker, S.; Carle, L.; Goudon, V.; Vialle, C.; Hamelin, A.; Arnaud, A.

    2012-10-01

    Silicon based vacuum packaging is a key enabling technology for achieving affordable uncooled Infrared Focal Plane Arrays (IRFPA) as required by the promising mass market for very low cost IR applications, such as automotive driving assistance, energy loss monitoring in buildings, motion sensors… Among the various approaches studied worldwide, the CEA, LETI is developing a unique technology where each bolometer pixel is sealed under vacuum at the wafer level, using an IR transparent thin film deposition. This technology referred to as PLP (Pixel Level Packaging), leads to an array of hermetic micro-caps each containing a single microbolometer. Since the successful demonstration that the PLP technology, when applied on a single microbolometer pixel, can provide the required vacuum < 10-3 mbar, the authors have pushed forward the development of the technology on fully operational QVGA readout circuits CMOS base wafers (320 x 240 pixels). In this outlook, the article reports on the electro optical performance obtained from this preliminary PLP based QVGA demonstrator. Apart from the response, noise and NETD distributions, the paper also puts emphasis on additional key features such as thermal time constant, image quality, and ageing properties.

  14. H4RG Near-IR Detectors with 10 micron pixels for WFIRST and Space Astrophysics

    NASA Astrophysics Data System (ADS)

    Kruk, Jeffrey W.; Rauscher, B. J.

    2014-01-01

    Hybrid sensor chip assemblies (SCAs) employing HgCdTe photo-diode arrays integrated with CMOS read-out integrated circuits (ROICs) have become the detector of choice for many cutting-edge ground-based and space-based astronomical instruments operating at near infrared wavelengths. 2Kx2K arrays of 18-micron pixels are in use at many ground-based observatories and will fly on JWST and Euclid later this decade. The Wide-Field Infra-Red Survey Telescope (WFIRST) mission, which will survey large areas of the sky with reasonably-fine sampling, is extending these prior designs by developing 4Kx4K HgCdTe NIR hybrid detectors with 10 micron pixels. These will provide four times as many pixels as the current 2Kx2K detectors in a package that is only slightly larger. Four prototype 4Kx4K devices with conservative pixel designs were produced in 2011; these devices met many though not all WFIRST performance requirements. A Strategic Astrophysics Technology proposal was submitted to further the development of these detectors. This poster describes the technology development plan, progress made in the first year of the program, and plans for the future.

  15. A Bio-Inspired AER Temporal Tri-Color Differentiator Pixel Array.

    PubMed

    Farian, Łukasz; Leñero-Bardallo, Juan Antonio; Häfliger, Philipp

    2015-10-01

    This article investigates the potential of a bio-inspired vision sensor with pixels that detect transients between three primary colors. The in-pixel color processing is inspired by the retinal color opponency that are found in mammalian retinas. Color transitions in a pixel are represented by voltage spikes, which are akin to a neuron's action potential. These spikes are conveyed off-chip by the Address Event Representation (AER) protocol. To achieve sensitivity to three different color spectra within the visual spectrum, each pixel has three stacked photodiodes at different depths in the silicon substrate. The sensor has been fabricated in the standard TSMC 90 nm CMOS technology. A post-processing method to decode events into color transitions has been proposed and implemented as a custom interface to display real-time color changes in the visual scene. Experimental results are provided. Color transitions can be detected at high speed (up to 2.7 kHz). The sensor has a dynamic range of 58 dB and a power consumption of 22.5 mW. This type of sensor can be of use in industrial, robotics, automotive and other applications where essential information is contained in transient emissions shifts within the visual spectrum.

  16. Simulation study of a novel 3D SPAD pixel in an advanced FD-SOI technology

    NASA Astrophysics Data System (ADS)

    Vignetti, M. M.; Calmon, F.; Lesieur, P.; Savoy-Navarro, A.

    2017-02-01

    In this paper, a novel SPAD architecture implemented in a Fully-Depleted Silicon-On-Insulator (SOI) CMOS technology is presented. Thanks to its intrinsic vertical 3D structure, the proposed solution is expected to allow further scaling of the pixel size while ensuring high fill factors. Moreover the pixel and the detector electronics can benefit of the well-known advantages brought by SOI technology with respect to bulk CMOS, such as higher speed and lower power consumption. TCAD simulations based on realistic process parameters and dedicated post-processing analysis are carried out in order to optimize and validate the avalanche diode architecture for an optimal electric field distribution in the device but also to extract the main parameters of the SPAD, such as the breakdown voltage, the avalanche triggering probability, the dark count rate and the photon detection probability. A comparison between the efficiency in back-side and front-side approaches is carried out with a particular focus on time-of-flight applications.

  17. Designing and implementing a miniature CMOS imaging system with USB interface

    NASA Astrophysics Data System (ADS)

    Yao, Chenyun; Wang, Liqiang; Yuan, Bo; Xu, Jin

    2012-11-01

    Although CMOS cameras with USB interface are popular, their sizes are not small enough and working lengths are not that long enough when used as industrial endoscope. Here we present a small-sized image acquisition system for high-definition industrial electronic endoscope based on USB2.0 high-speed controller, which is composed of a 1/6 inch CMOS image sensor with resolution of 1 Megapixels. Signals from the CMOS image sensor are put into computer through the USB interface using the slave FIFO mode for processing, storage and display. LVDS technology is used for image data stream transmission between the sensor and USB controller to realize a long working distance, high signal integrity and low noise system. The maximum pixel clock runs at 48MHz to support for 30 fps for QSXGA mode or15 fps for SXGA mode and the data transmission rate can reach 36 megabytes per second. The imaging system is simple in structure, low-power, low-cost and easy to control. Based on multi-thread technology, the software system which realizes the function of automatic exposure, automatic gain, and AVI video recording is also designed.

  18. Complete optical stack modeling for CMOS-based medical x-ray detectors

    NASA Astrophysics Data System (ADS)

    Zyazin, Alexander S.; Peters, Inge M.

    2015-03-01

    We have developed a simulation tool for modeling the performance of CMOS-based medical x-ray detectors, based on the Monte Carlo toolkit GEANT4. Following the Fujita-Lubberts-Swank approach recently reported by Star-Lack et al., we calculate modulation transfer function MTF(f), noise power spectrum NPS(f) and detective quantum efficiency DQE(f) curves. The complete optical stack is modeled, including scintillator, fiber optic plate (FOP), optical adhesive and CMOS image sensor. For critical parts of the stack, detailed models have been developed, taking into account their respective microstructure. This includes two different scintillator types: Gd2O2S:Tb (GOS) and CsI:Tl. The granular structure of the former is modeled using anisotropic Mie scattering. The columnar structure of the latter is introduced into calculations directly, using the parameterization capabilities of GEANT4. The underlying homogeneous CsI layer is also incorporated into the model as well as the optional reflective layer on top of the scintillator screen or the protective polymer top coat. The FOP is modeled as an array of hexagonal bundles of fibers. The simulated CMOS stack consists of layers of Si3N4 and SiO2 on top of a silicon pixel array. The model is validated against measurements of various test detector structures, using different x-ray spectra (RQA5 and RQA-M2), showing good match between calculated and measured MTF(f) and DQE(f) curves.

  19. Column-parallel correlated multiple sampling circuits for CMOS image sensors and their noise reduction effects.

    PubMed

    Suh, Sungho; Itoh, Shinya; Aoyama, Satoshi; Kawahito, Shoji

    2010-01-01

    For low-noise complementary metal-oxide-semiconductor (CMOS) image sensors, the reduction of pixel source follower noises is becoming very important. Column-parallel high-gain readout circuits are useful for low-noise CMOS image sensors. This paper presents column-parallel high-gain signal readout circuits, correlated multiple sampling (CMS) circuits and their noise reduction effects. In the CMS, the gain of the noise cancelling is controlled by the number of samplings. It has a similar effect to that of an amplified CDS for the thermal noise but is a little more effective for 1/f and RTS noises. Two types of the CMS with simple integration and folding integration are proposed. In the folding integration, the output signal swing is suppressed by a negative feedback using a comparator and one-bit D-to-A converter. The CMS circuit using the folding integration technique allows to realize a very low-noise level while maintaining a wide dynamic range. The noise reduction effects of their circuits have been investigated with a noise analysis and an implementation of a 1Mpixel pinned photodiode CMOS image sensor. Using 16 samplings, dynamic range of 59.4 dB and noise level of 1.9 e(-) for the simple integration CMS and 75 dB and 2.2 e(-) for the folding integration CMS, respectively, are obtained.

  20. Photonic circuits integrated with CMOS compatible photodetectors

    NASA Astrophysics Data System (ADS)

    Cristea, Dana; Craciunoiu, F.; Modreanu, M.; Caldararu, M.; Cernica, I.

    2001-06-01

    This paper presents the integration of photodetectors and photonic circuits (waveguides and interferometers, coupling elements and chemo-optical transducing layer) on one silicon chip. Different materials: silicon, doped or undoped silica, SiO xN y, polymers, and different technologies: LPCVD, APCVD, sol-gel, spinning, micromachining have been used to realize the photonic and micromechanical components and the transducers. Also, MOS compatible processes have been used for optoelectronic circuits. The attention was focused on the matching of all the involved technologies, to allow the monolithic integration of all components, and also on the design and fabrication of special structures of photodetectors. Two types of high responsivity photodetectors, a photo-FET and a bipolar NPN phototransistor, with modified structures that allow the optical coupling to the waveguides have been designed and experimented. An original 3-D model was developed for the system: opto-FET-coupler-waveguide. A test circuit for sensor applications was experimented. All the components of the test circuits, photodetectors, waveguides, couplers, were obtained using CMOS-compatible processes. The aim of our research activity was to obtain microsensors with optical read-out.

  1. Fabrication and performance of mercuric iodide pixellated detectors

    NASA Astrophysics Data System (ADS)

    van den Berg, Lodewijk; Bastian, Lloyd F.; Zhang, Feng; Lenos, Howard; Capote, M. Albert

    2007-09-01

    The radiation detection efficiency and spectral resolution of mercuric iodide detectors can be improved significantly by increasing the volume of the detectors and by using a pixellated anode structure. Detector bodies with a thickness of nominally 10 mm and an active area of approximately 14 mm x 14 mm have been used for these experiments. The detectors were cut from single crystals grown by the physical vapor transport method. The cut surfaces were polished and etched using a string saw and potassium iodide solutions. The Palladium contacts were deposited by magnetron sputtering through stainless steel masks. The cathode contact is continuous; the anode contacts consist of an array of 11 x 11 pixels surrounded by a guard ring. The resistance between a pixel and its surrounding contacts should be larger than 0.25 Gohm. The detector is mounted on a substrate that makes it possible to connect the anode pixels to an ASIC, and is conditioned so that it is stable for all pixels at a bias of -3000 Volts. Under these conditions the spectral resolution for Cs-137 gamma rays (662 keV) is approximately 5% FWHM. When depth sensing correction methods are applied, the resolution improves to about 2% FWHM or better. It is expected that the performance of the devices can be improved by the careful selection of crystal parts that are free of structural defects. Details of the fabrication technologies will be described. The effects of material inhomogeneities and transport properties of the charge carriers will be discussed.

  2. Infrared astronomy - Pixels to spare

    SciTech Connect

    Mccaughrean, M. )

    1991-07-01

    An infrared CCD camera containing an array with 311,040 pixels arranged in 486 rows of 640 each is tested. The array is a chip of platinum silicide (PtSi), sensitive to photons with wavelengths between 1 and 6 microns. Observations of the Hubble Space Telescope, Mars, Pluto and moon are reported. It is noted that the satellite's twin solar-cell arrays, at an apparent separation of about 1 1/4 arc second, are well resolved. Some two dozen video frames were stacked to make each presented image of Mars at 1.6 microns; at this wavelength Mars appears much as it does in visible light. A stack of 11 images at a wavelength of 1.6 microns is used for an image of Jupiter with its Great Red Spot and moons Io and Europa.

  3. Dead pixel replacement in LWIR microgrid polarimeters.

    PubMed

    Ratliff, Bradley M; Tyo, J Scott; Boger, James K; Black, Wiley T; Bowers, David L; Fetrow, Matthew P

    2007-06-11

    LWIR imaging arrays are often affected by nonresponsive pixels, or "dead pixels." These dead pixels can severely degrade the quality of imagery and often have to be replaced before subsequent image processing and display of the imagery data. For LWIR arrays that are integrated with arrays of micropolarizers, the problem of dead pixels is amplified. Conventional dead pixel replacement (DPR) strategies cannot be employed since neighboring pixels are of different polarizations. In this paper we present two DPR schemes. The first is a modified nearest-neighbor replacement method. The second is a method based on redundancy in the polarization measurements.We find that the redundancy-based DPR scheme provides an order-of-magnitude better performance for typical LWIR polarimetric data.

  4. Noise Reduction Techniques and Scaling Effects towards Photon Counting CMOS Image Sensors

    PubMed Central

    Boukhayma, Assim; Peizerat, Arnaud; Enz, Christian

    2016-01-01

    This paper presents an overview of the read noise in CMOS image sensors (CISs) based on four-transistors (4T) pixels, column-level amplification and correlated multiple sampling. Starting from the input-referred noise analytical formula, process level optimizations, device choices and circuit techniques at the pixel and column level of the readout chain are derived and discussed. The noise reduction techniques that can be implemented at the column and pixel level are verified by transient noise simulations, measurement and results from recently-published low noise CIS. We show how recently-reported process refinement, leading to the reduction of the sense node capacitance, can be combined with an optimal in-pixel source follower design to reach a sub-0.3erms- read noise at room temperature. This paper also discusses the impact of technology scaling on the CIS read noise. It shows how designers can take advantage of scaling and how the Metal-Oxide-Semiconductor (MOS) transistor gate leakage tunneling current appears as a challenging limitation. For this purpose, both simulation results of the gate leakage current and 1/f noise data reported from different foundries and technology nodes are used.

  5. Equivalence of a Bit Pixel Image to a Quantum Pixel Image

    NASA Astrophysics Data System (ADS)

    Ortega, Laurel Carlos; Dong, Shi-Hai; Cruz-Irisson, M.

    2015-11-01

    We propose a new method to transform a pixel image to the corresponding quantum-pixel using a qubit per pixel to represent each pixels classical weight in a quantum image matrix weight. All qubits are linear superposition, changing the coefficients level by level to the entire longitude of the gray scale with respect to the base states of the qubit. Classically, these states are just bytes represented in a binary matrix, having code combinations of 1 or 0 at all pixel locations. This method introduces a qubit-pixel image representation of images captured by classical optoelectronic methods. Supported partially by the project 20150964-SIP-IPN, Mexico

  6. SLHC upgrade plans for the ATLAS pixel detector

    NASA Astrophysics Data System (ADS)

    Šícho, Petr

    2009-08-01

    The ATLAS pixel detector is an 80 million channels silicon tracking system designed to detect charged tracks and secondary vertices with very high precision. An upgrade of the ATLAS pixel detector is presently being considered, enabling to cope with higher luminosity at Super Large Hadron Collider (SLHC). The increased luminosity leads to extremely high radiation doses in the innermost region of the ATLAS tracker. Options considered for a new detector are discussed, as well as some important R&D activities, such as investigations towards novel detector geometries and novel processes.

  7. Method for fabricating pixelated silicon device cells

    SciTech Connect

    Nielson, Gregory N.; Okandan, Murat; Cruz-Campa, Jose Luis; Nelson, Jeffrey S.; Anderson, Benjamin John

    2015-08-18

    A method, apparatus and system for flexible, ultra-thin, and high efficiency pixelated silicon or other semiconductor photovoltaic solar cell array fabrication is disclosed. A structure and method of creation for a pixelated silicon or other semiconductor photovoltaic solar cell array with interconnects is described using a manufacturing method that is simplified compared to previous versions of pixelated silicon photovoltaic cells that require more microfabrication steps.

  8. The Phase-1 upgrade of the CMS pixel detector

    NASA Astrophysics Data System (ADS)

    Klein, Katja

    2017-02-01

    The CMS experiment features a pixel detector with three barrel layers and two discs per side, corresponding to an active silicon area of 1 m2. The detector delivered high-quality data during LHC Run 1. However, the CMS pixel detector was designed for the nominal instantaneous LHC luminosity of 1 ·1034cm-2s-1 . It is expected that the instantaneous luminosity will increase and reach twice the design value before Long Shutdown 3, scheduled for 2023. Under such conditions, the present readout chip would suffer from data loss due to buffer overflow, leading to significant inefficiencies of up to 16%. The CMS collaboration is presently constructing a new pixel detector to replace the present device during the winter shutdown 2016/2017. The design of this new detector will be outlined, the construction status summarized and the performance described.

  9. Virus based Full Colour Pixels using a Microheater

    PubMed Central

    Kim, Won-Geun; Kim, Kyujung; Ha, Sung-Hun; Song, Hyerin; Yu, Hyun-Woo; Kim, Chuntae; Kim, Jong-Man; Oh, Jin-Woo

    2015-01-01

    Mimicking natural structures has been received considerable attentions, and there have been a few practical advances. Tremendous efforts based on a self-assembly technique have been contributed to the development of the novel photonic structures which are mimicking nature’s inventions. We emulate the photonic structures from an origin of colour generation of mammalian skins and avian skin/feathers using M13 phage. The structures can be generated a full range of RGB colours that can be sensitively switched by temperature and substrate materials. Consequently, we developed an M13 phage-based temperature-dependent actively controllable colour pixels platform on a microheater chip. Given the simplicity of the fabrication process, the low voltage requirements and cycling stability, the virus colour pixels enable us to substitute for conventional colour pixels for the development of various implantable, wearable and flexible devices in future. PMID:26334322

  10. Virus based Full Colour Pixels using a Microheater

    NASA Astrophysics Data System (ADS)

    Kim, Won-Geun; Kim, Kyujung; Ha, Sung-Hun; Song, Hyerin; Yu, Hyun-Woo; Kim, Chuntae; Kim, Jong-Man; Oh, Jin-Woo

    2015-09-01

    Mimicking natural structures has been received considerable attentions, and there have been a few practical advances. Tremendous efforts based on a self-assembly technique have been contributed to the development of the novel photonic structures which are mimicking nature’s inventions. We emulate the photonic structures from an origin of colour generation of mammalian skins and avian skin/feathers using M13 phage. The structures can be generated a full range of RGB colours that can be sensitively switched by temperature and substrate materials. Consequently, we developed an M13 phage-based temperature-dependent actively controllable colour pixels platform on a microheater chip. Given the simplicity of the fabrication process, the low voltage requirements and cycling stability, the virus colour pixels enable us to substitute for conventional colour pixels for the development of various implantable, wearable and flexible devices in future.

  11. Advances in CMOS Solid-state Photomultipliers for Scintillation Detector Applications

    PubMed Central

    Christian, James F.; Stapels, Christopher J.; Johnson, Erik B.; McClish, Mickel; Dokhale, Purushotthom; Shah, Kanai S.; Mukhopadhyay, Sharmistha; Chapman, Eric; Augustine, Frank L.

    2014-01-01

    Solid-state photomultipliers (SSPMs) are a compact, lightweight, potentially low-cost alternative to a photomultiplier tube for a variety of scintillation detector applications, including digital-dosimeter and medical-imaging applications. Manufacturing SSPMs with a commercial CMOS process provides the ability for rapid prototyping, and facilitates production to reduce the cost. RMD designs CMOS SSPM devices that are fabricated by commercial foundries. This work describes the characterization and performance of these devices for scintillation detector applications. This work also describes the terms contributing to device noise in terms of the excess noise of the SSPM, the binomial statistics governing the number of pixels triggered by a scintillation event, and the background, or thermal, count rate. The fluctuations associated with these terms limit the resolution of the signal pulse amplitude. We explore the use of pixel-level signal conditioning, and characterize the performance of a prototype SSPM device that preserves the digital nature of the signal. In addition, we explore designs of position-sensitive SSPM detectors for medical imaging applications, and characterize their performance. PMID:25540471

  12. Design and implementation of a CMOS light pulse receiver cell array for spatial optical communications.

    PubMed

    Sarker, Md Shakowat Zaman; Itoh, Shinya; Hamai, Moeta; Takai, Isamu; Andoh, Michinori; Yasutomi, Keita; Kawahito, Shoji

    2011-01-01

    A CMOS light pulse receiver (LPR) cell for spatial optical communications is designed and evaluated by device simulations and a prototype chip implementation. The LPR cell consists of a pinned photodiode and four transistors. It works under sub-threshold region of a MOS transistor and the source terminal voltage which responds to the logarithm of the photo current are read out with a source follower circuit. For finding the position of the light spot on the focal plane, an image pixel array is embedded on the same plane of the LPR cell array. A prototype chip with 640 × 240 image pixels and 640 × 240 LPR cells is implemented with 0.18 μm CMOS technology. A proposed model of the transient response of the LPR cell agrees with the result of the device simulations and measurements. Both imaging at 60 fps and optical communication at the carrier frequency of 1 MHz are successfully performed. The measured signal amplitude and the calculation results of photocurrents show that the spatial optical communication up to 100 m is feasible using a 10 × 10 LED array.

  13. Design and Implementation of A CMOS Light Pulse Receiver Cell Array for Spatial Optical Communications

    PubMed Central

    Sarker, Md. Shakowat Zaman; Itoh, Shinya; Hamai, Moeta; Takai, Isamu; Andoh, Michinori; Yasutomi, Keita; Kawahito, Shoji

    2011-01-01

    A CMOS light pulse receiver (LPR) cell for spatial optical communications is designed and evaluated by device simulations and a prototype chip implementation. The LPR cell consists of a pinned photodiode and four transistors. It works under sub-threshold region of a MOS transistor and the source terminal voltage which responds to the logarithm of the photo current are read out with a source follower circuit. For finding the position of the light spot on the focal plane, an image pixel array is embedded on the same plane of the LPR cell array. A prototype chip with 640 × 240 image pixels and 640 × 240 LPR cells is implemented with 0.18 μm CMOS technology. A proposed model of the transient response of the LPR cell agrees with the result of the device simulations and measurements. Both imaging at 60 fps and optical communication at the carrier frequency of 1 MHz are successfully performed. The measured signal amplitude and the calculation results of photocurrents show that the spatial optical communication up to 100 m is feasible using a 10 × 10 LED array. PMID:22319398

  14. A 16 × 16 CMOS Capacitive Biosensor Array Towards Detection of Single Bacterial Cell.

    PubMed

    Couniot, Numa; Francis, Laurent A; Flandre, Denis

    2016-04-01

    We present a 16 × 16 CMOS biosensor array aiming at impedance detection of whole-cell bacteria. Each 14 μm × 16 μm pixel comprises high-sensitive passivated microelectrodes connected to an innovative readout interface based on charge sharing principle for capacitance-to-voltage conversion and subthreshold gain stage to boost the sensitivity. Fabricated in a 0.25 μm CMOS process, the capacitive array was experimentally shown to perform accurate dielectric measurements of the electrolyte up to electrical conductivities of 0.05 S/m, with maximal sensitivity of 55 mV/fF and signal-to-noise ratio (SNR) of 37 dB. As biosensing proof of concept, real-time detection of Staphylococcus epidermidis binding events was experimentally demonstrated and provides detection limit of ca. 7 bacteria per pixel and sensitivity of 2.18 mV per bacterial cell. Models and simulations show good matching with experimental results and provide a comprehensive analysis of the sensor and circuit system. Advantages, challenges and limits of the proposed capacitive biosensor array are finally described with regards to literature. With its small area and low power consumption, the present capacitive array is particularly suitable for portable point-of-care (PoC) diagnosis tools and lab-on-chip (LoC) systems.

  15. Operational experience with the ALICE pixel detector

    NASA Astrophysics Data System (ADS)

    Mastroserio, A.

    2017-01-01

    The Silicon Pixel Detector (SPD) constitutes the two innermost layers of the Inner Tracking System of the ALICE experiment and it is the closest detector to the interaction point. As a vertex detector, it has the unique feature of generating a trigger signal that contributes to the L0 trigger of the ALICE experiment. The SPD started collecting data since the very first pp collisions at LHC in 2009 and since then it has taken part in all pp, Pb-Pb and p-Pb data taking campaigns. This contribution will present the main features of the SPD, the detector performance and the operational experience, including calibration and optimization activities from Run 1 to Run 2.

  16. A 64 single photon avalanche diode array in 0.18 µm CMOS standard technology with versatile quenching circuit for quick prototyping

    NASA Astrophysics Data System (ADS)

    Uhring, Wilfried; Le Normand, Jean-Pierre; Zint, Virginie; Dumas, Norbert; Dadouche, Foudil; Malasse, Imane; Scholz, Jeremy

    2012-04-01

    Several works have demonstrated the successfully integration of Single-photon avalanche photodiodes (SPADs) operating in Geiger mode in a standard CMOS circuit for the last 10 years. These devices offer an exceptional temporal resolution as well as a very good optical sensitivity. Nevertheless, it is difficult to predict the expected performances of such a device. Indeed, for a similar structure of SPAD, some parameter values can differ by two orders of magnitude from a technology to another. We proposed here a procedure to identify in just one or two runs the optimal structure of SPAD available for a given technology. A circuit with an array of 64 SPAD has been realized in the Tower-Jazz 0.18 μm CMOS image sensor process. It encompasses an array of 8 different structures of SPAD reproduced in 8 diameters in the range from 5 μm up to 40 μm. According to the SPAD structures, efficient shallow trench insulator and/or P-Well guard ring are used for preventing edge breakdown. Low dark count rate of about 100 Hz are expected thanks to the use of buried n-well layer and a high resistivity substrate. Each photodiode is embedded in a pixel which includes a versatile quenching circuitry and an analog output of its cathode voltage. The quenching system is configurable in four operation modes; the SPAD is disabled, the quenching is completely passive, the reset of the photodiode is active and the quenching is fully active. The architecture of the array makes possible the characterization of every single photodiode individually. The parameters to be measured for a SPAD are the breakdown avalanche voltage, the dark count rate, the dead time, the timing jitter, the photon detection probability and the after-pulsing rate.

  17. Pixel Analysis and Plasma Dynamics Characterized by Photospheric Spectral Data

    NASA Astrophysics Data System (ADS)

    Rasca, Anthony P.; Chen, James; Pevtsov, Alexei A.

    2016-05-01

    Recent observations of the photosphere using high spatial and temporal resolutions show small dynamic features at the resolving limit during emerging flux events. However, line-of-sight (LOS) magnetogram pixels only contain the net uncanceled magnetic flux, which is expected to increase for fixed regions as resolution limits improve. A new pixel dynamics method uses spectrographic images to characterize photospheric absorption line profiles by variations in line displacement, width, asymmetry, and peakedness and is applied to quiet-sun regions, active regions with no eruption, and an active region with an ongoing eruption. Using Stokes I images from SOLIS/VSM on 2012 March 13, variations in line width and peakedness of Fe I 6301.5 Å are shown to have a strong spatial and temporal relationship with an M7.9 X-ray flare originating from NOAA 11429. This relationship is observed as a flattening in the line profile as the X-ray flare approaches peak intensity and was not present in area scans of a non-eruptive active region on 2011 April 14. These results are used to estimate dynamic plasma properties on sub-pixel scales and provide both spatial and temporal information of sub-pixel activity at the photosphere. The analysis can be extended to include the full Stokes parameters and study signatures of magnetic fields and coupled plasma properties.

  18. Commissioning of the CMS Forward Pixel Detector

    SciTech Connect

    Kumar, Ashish; /SUNY, Buffalo

    2008-12-01

    The Compact Muon Solenoid (CMS) experiment is scheduled for physics data taking in summer 2009 after the commissioning of high energy proton-proton collisions at Large Hadron Collider (LHC). At the core of the CMS all-silicon tracker is the silicon pixel detector, comprising three barrel layers and two pixel disks in the forward and backward regions, accounting for a total of 66 million channels. The pixel detector will provide high-resolution, 3D tracking points, essential for pattern recognition and precise vertexing, while being embedded in a hostile radiation environment. The end disks of the pixel detector, known as the Forward Pixel detector, has been assembled and tested at Fermilab, USA. It has 18 million pixel cells with dimension 100 x 150 {micro}m{sup 2}. The complete forward pixel detector was shipped to CERN in December 2007, where it underwent extensive system tests for commissioning prior to the installation. The pixel system was put in its final place inside the CMS following the installation and bake out of the LHC beam pipe in July 2008. It has been integrated with other sub-detectors in the readout since September 2008 and participated in the cosmic data taking. This report covers the strategy and results from commissioning of CMS forward pixel detector at CERN.

  19. Optical waveguide taps on silicon CMOS circuits

    NASA Astrophysics Data System (ADS)

    Stenger, Vincent E.; Beyette, Fred R., Jr.

    2000-11-01

    As silicon CMOS circuit technology is scaled beyond the GHz range, both chipmakers and board makers face increasingly difficult challenges in implementing high speed metal interconnects. Metal traces are limited in density-speed performance due to the skin effect, electrical conductivity, and cross talk. Optical based interconnects have higher available bandwidth by virtue of the extremely high carrier frequencies of optical signals (> 100 THz). For this work, an effort has been made to determine an optimal optical tap receiver design for integration with commercial CMOS processes. Candidate waveguide tap technologies were considered in terms of optical loss, bandwidth, economy, and CMOS process compatibility. A new device, which is based on a variation of the multimode interference effect, has been found to be especially promising. BeamProp simulation results show nearly zero excess optical loss for the design, and up to 70% coupling into a 25 micrometer traveling wave CMOS photo