Assessment of a Low-Power 65 nm CMOS Technology for Analog Front-End Design

NASA Astrophysics Data System (ADS)

Manghisoni, Massimo; Gaioni, Luigi; Ratti, Lodovico; Re, Valerio; Traversi, Gianluca

2014-02-01

This work is concerned with the study of the analog properties of MOSFET devices belonging to a 65 nm CMOS technology with emphasis on intrinsic voltage gain and noise performance. This node appears to be a robust and promising solution to cope with the unprecedented requirements set by silicon vertex trackers in experiments upgrades and future colliders as well as by imaging detectors at light sources and free electron lasers. In this scaled-down technology, the impact of new dielectric materials and processing techniques on the analog behavior of MOSFETs has to be carefully evaluated. An inversion level design methodology has been adopted to analyze data obtained from device measurements and provide a powerful tool to establish design criteria for detector front-ends in this nanoscale CMOS process. A comparison with data coming from less scaled technologies, such as 90 nm and 130 nm nodes, is also provided and can be used to evaluate the resolution limits achievable for low-noise charge sensitive amplifiers in the 100 nm minimum feature size range.

DOE Office of Scientific and Technical Information (OSTI.GOV)

Lombigit, L., E-mail: lojius@nm.gov.my; Rahman, Nur Aira Abd; Mohamad, Glam Hadzir Patai

A radioisotope identifier device based on large volume Co-planar grid CZT detector is current under development at Malaysian Nuclear Agency. This device is planned to be used for in-situ identification of radioisotopes based on their unique energies. This work reports on electronics testing performed on the front-end electronics (FEE) analog section comprising charge sensitive preamplifier-pulse shaping amplifier chain. This test involves measurement of charge sensitivity, pulse parameters and electronics noise. This report also present some preliminary results on the spectral measurement obtained from gamma emitting radioisotopes.

The phase 1 upgrade of the CMS Pixel Front-End Driver

NASA Astrophysics Data System (ADS)

Friedl, M.; Pernicka, M.; Steininger, H.

2010-12-01

The pixel detector of the CMS experiment at the LHC is read out by analog optical links, sending the data to 9U VME Front-End Driver (FED) boards located in the electronics cavern. There are plans for the phase 1 upgrade of the pixel detector (2016) to add one more layer, while significantly cutting down the overall material budget. At the same time, the optical data transmission will be replaced by a serialized digital scheme. A plug-in board solution with a high-speed digital optical receiver has been developed for the Pixel-FED readout boards and will be presented along with first tests of the future optical link.

Upgraded Readout Electronics for the ATLAS Liquid Argon Calorimeters at the High Luminosity LHC

NASA Astrophysics Data System (ADS)

Andeen, Timothy R.; ATLAS Liquid Argon Calorimeter Group

2012-12-01

The ATLAS liquid-argon calorimeters produce a total of 182,486 signals which are digitized and processed by the front-end and back-end electronics at every triggered event. In addition, the front-end electronics sum analog signals to provide coarsely grained energy sums, called trigger towers, to the first-level trigger system, which is optimized for nominal LHC luminosities. However, the pile-up background expected during the high luminosity phases of the LHC will be increased by factors of 3 to 7. An improved spatial granularity of the trigger primitives is therefore proposed in order to improve the identification performance for trigger signatures, like electrons or photons, at high background rejection rates. For the first upgrade phase in 2018, new Liquid Argon Trigger Digitizer Boards are being designed to receive higher granularity signals, digitize them on detector and send them via fast optical links to a new, off-detector digital processing system. The digital processing system applies digital filtering and identifies significant energy depositions. The refined trigger primitives are then transmitted to the first level trigger system to extract improved trigger signatures. The general concept of the upgraded liquid-argon calorimeter readout together with the various electronics components to be developed for such a complex system is presented. The research activities and architectural studies undertaken by the ATLAS Liquid Argon Calorimeter Group are described, particularly details of the on-going design of mixed-signal front-end electronics, of radiation tolerant optical-links, and of the high-speed off-detector digital processing system.

The Mobile Internet -The Next Big Thing. Electrons & Photons: You Need Both! (BRIEFING CHARTS)

DTIC Science & Technology

2007-03-05

Links Network Centric Warfighting Comms Wired & Wireless Links 20th Century 21th Century The Military Comms Problem Network Centric Operationst t i ti...Small Unit Operations TEL Underwater Vehicles & Towed Arrays RC-135V Rivet Joint Tier II+ UAV Global Hawk E-2C Hawkeye Networked Manned and Unmanned...RF Front-End Solutions ● >20 DARPA/MTO RF Programs across the spectrum - RF & Mixed Signal Electronics - Analog & Digital Photonics Enables Network

A 4 μW/Ch analog front-end module with moderate inversion and power-scalable sampling operation for 3-D neural microsystems.

PubMed

Al-Ashmouny, Khaled M; Chang, Sun-Il; Yoon, Euisik

2012-10-01

We report an analog front-end prototype designed in 0.25 μm CMOS process for hybrid integration into 3-D neural recording microsystems. For scaling towards massive parallel neural recording, the prototype has investigated some critical circuit challenges in power, area, interface, and modularity. We achieved extremely low power consumption of 4 μW/channel, optimized energy efficiency using moderate inversion in low-noise amplifiers (K of 5.98 × 10⁸ or NEF of 2.9), and minimized asynchronous interface (only 2 per 16 channels) for command and data capturing. We also implemented adaptable operations including programmable-gain amplification, power-scalable sampling (up to 50 kS/s/channel), wide configuration range (9-bit) for programmable gain and bandwidth, and 5-bit site selection capability (selecting 16 out of 128 sites). The implemented front-end module has achieved a reduction in noise-energy-area product by a factor of 5-25 times as compared to the state-of-the-art analog front-end approaches reported to date.

An RFID tag system-on-chip with wireless ECG monitoring for intelligent healthcare systems.

PubMed

Wang, Cheng-Pin; Lee, Shuenn-Yuh; Lai, Wei-Chih

2013-01-01

This paper presents a low-power wireless ECG acquisition system-on-chip (SoC), including an RF front-end circuit, a power unit, an analog front-end circuit, and a digital circuitry. The proposed RF front-end circuit can provide the amplitude shift keying demodulation and distance to digital conversion to accurately receive the data from the reader. The received data will wake up the power unit to provide the required supply voltages of analog front-end (AFE) and digital circuitry. The AFE, including a pre-amplifier, an analog filter, a post-amplifier, and an analog-to-digital converter, is used for the ECG acquisition. Moreover, the EPC Class I Gen 2 UHF standard is employed in the digital circuitry for the handshaking of communication and the control of the system. The proposed SoC has been implemented in 0.18-µm standard CMOS process and the measured results reveal the communication is compatible to the RFID protocol. The average power consumption for the operating chip is 12 µW. Using a Sony PR44 battery to the supply power (605mAh@1.4V), the RFID tag SoC operates continuously for about 50,000 hours (>5 years), which is appropriate for wireless wearable ECG monitoring systems.

Electronics for a prototype variable field of view PET camera using the PMT-quadrant-sharing detector array

NASA Astrophysics Data System (ADS)

Li, H.; Wong, Wai-Hoi; Zhang, N.; Wang, J.; Uribe, J.; Baghaei, H.; Yokoyama, S.

1999-06-01

Electronics for a prototype high-resolution PET camera with eight position-sensitive detector modules has been developed. Each module has 16 BGO (Bi/sub 4/Ge/sub 3/O/sub 12/) blocks (each block is composed of 49 crystals). The design goals are component and space reduction. The electronics is composed of five parts: front-end analog processing, digital position decoding, fast timing, coincidence processing and master data acquisition. The front-end analog circuit is a zone-based structure (each zone has 3/spl times/3 PMTs). Nine ADCs digitize integration signals of an active zone identified by eight trigger clusters; each cluster is composed of six photomultiplier tubes (PMTs). A trigger corresponding to a gamma ray is sent to a fast timing board to obtain a time-mark, and the nine digitized signals are passed to the position decoding board, where a real block (four PMTs) can be picked out from the zone for position decoding. Lookup tables are used for energy discrimination and to identify the gamma-hit crystal location. The coincidence board opens a 70-ns initial timing window, followed by two 20-ns true/accidental time-mark lookup table windows. The data output from the coincidence board can be acquired either in sinogram mode or in list mode with a Motorola/IRONICS VME-based system.

DOE Office of Scientific and Technical Information (OSTI.GOV)

Choong, W. -S.; Abu-Nimeh, F.; Moses, W. W.

Here, we present a 16-channel front-end readout board for the OpenPET electronics system. A major task in developing a nuclear medical imaging system, such as a positron emission computed tomograph (PET) or a single-photon emission computed tomograph (SPECT), is the electronics system. While there are a wide variety of detector and camera design concepts, the relatively simple nature of the acquired data allows for a common set of electronics requirements that can be met by a flexible, scalable, and high-performance OpenPET electronics system. The analog signals from the different types of detectors used in medical imaging share similar characteristics, whichmore » allows for a common analog signal processing. The OpenPET electronics processes the analog signals with Detector Boards. Here we report on the development of a 16-channel Detector Board. Each signal is digitized by a continuously sampled analog-to-digital converter (ADC), which is processed by a field programmable gate array (FPGA) to extract pulse height information. A leading edge discriminator creates a timing edge that is "time stamped" by a time-to-digital converter (TDC) implemented inside the FPGA. In conclusion, this digital information from each channel is sent to an FPGA that services 16 analog channels, and then information from multiple channels is processed by this FPGA to perform logic for crystal lookup, DOI calculation, calibration, etc.« less

MEDUSA-32: A low noise, low power silicon strip detector front-end electronics, for space applications

NASA Astrophysics Data System (ADS)

Cicuttin, Andres; Colavita, Alberto; Cerdeira, Alberto; Fratnik, Fabio; Vacchi, Andrea

1997-02-01

In this report we describe a mixed analog-digital integrated circuit (IC) designed as the front-end electronics for silicon strip-detectors for space applications. In space power consumption, compactness and robustness become critical constraints for a pre-amplifier design. The IC is a prototype with 32 complete channels, and it is intended for a large area particle tracker of a new generation of gamma ray telescopes. Each channel contains a charge sensitive amplifier, a pulse shaper, a discriminator and two digital buffers. The reference trip point of the discriminator is adjustable. This chip also has a custom PMOSFET transistor per channel, included in order to provide the high dynamic resistance needed to reverse-bias the strip diode. The digital part of the chip is used to store and serially shift out the state of the channels. There is also a storage buffer that allows the disabling of non-functioning channels if it is required by the data acquisition system. An input capacitance of 30 pF introduced at the input of the front-end produces less than 1000 electrons of RMS equivalent noise charge (ENC), for a total power dissipation of only 60 μW per channel. The chip was made using Orbit's 1.2 μm double poly, double metal n-well low noise CMOS process. The dimensions of the IC are 2400 μm × 8840 μm.

Digital front end electronics design for the EUSO photon detector

NASA Astrophysics Data System (ADS)

Musico, P.; Pallavicini, M.; Petrolini, A.; Pratolongo, F.

2003-09-01

In this paper we will present the design status of the Digital Front End Electronic system (DFEE), that will be used for the EUSO photon detector. The DFEE is able to count the single photoelectrons coming form the detector for a given time period, store the numbers in a memory buffer and read them out after a trigger, using a serial communication line. Because of space, mass and power consumption constraints, the system will be implemented in an ASIC using a deep submicron technology. The actual design follows the original ideas of the system, though adding several new functionalities. A fully functional prototype chip has been submitted for fabrication in fall 2002. Extensive tests will be performed on it both with bench instrumentations and with the real sensor (the multi anode photomultiplier Hamamatsu R7600-M64), expecting significant results by early Summer 2003. Future work is needed to convert the design into a more robust RAD-hard technology, suitable for space applications and to include in the final die an additional circuit used to optimize the performances at high photons rates: the Analog Front End Electronics (AFEE). Moreover the base board used to house the multi anode photomultipliers is presented: it is the back-bone of the microcell and will be the basic block used to build up the EUSO focal surface.

Microwave Photonic Architecture for Direction Finding of LPI Emitters: Front End Analog Circuit Design and Component Characterization

DTIC Science & Technology

2016-09-01

design to control the phase shifters was complex, and the calibration process was time consuming. During the redesign process, we carried out...signals in time domain with a maximum sampling frequency of 20 Giga samples per second. In the previous tests of the design , the performance of...PHOTONIC ARCHITECTURE FOR DIRECTION FINDING OF LPI EMITTERS: FRONT-END ANALOG CIRCUIT DESIGN AND COMPONENT CHARACTERIZATION by Chew K. Tan

A time-based front-end ASIC for the silicon micro strip sensors of the bar PANDA Micro Vertex Detector

NASA Astrophysics Data System (ADS)

Di Pietro, V.; Brinkmann, K.-Th.; Riccardi, A.; Ritman, J.; Rivetti, A.; Rolo, M. D.; Stockmanns, T.; Zambanini, A.

2016-03-01

The bar PANDA (Antiproton Annihilation at Darmstadt) experiment foresees many detectors for tracking, particle identification and calorimetry. Among them, the innermost is the MVD (Micro Vertex Detector) responsible for a precise tracking and the reconstruction of secondary vertices. This detector will be built from both hybrid pixel (two inner barrels and six forward disks) and double-sided micro strip (two outer barrels and outer rim of the last two disks) silicon sensors. A time-based approach has been chosen for the readout ASIC of the strip sensors. The PASTA (bar PANDA Strip ASIC) chip aims at high resolution time-stamping and charge information through the Time over Threshold (ToT) technique. It benefits from a Time to Digital Converter (TDC) allowing a time bin width down to 50 ps. The analog front-end was designed to serve both n-type and p-type strips and the performed simulations show remarkable performances in terms of linearity and electronic noise. The TDC consists of an analog interpolator, a digital local controller, and a digital global controller as the common back-end for all of the 64 channels.

Low-power analog integrated circuits for wireless ECG acquisition systems.

PubMed

Tsai, Tsung-Heng; Hong, Jia-Hua; Wang, Liang-Hung; Lee, Shuenn-Yuh

2012-09-01

This paper presents low-power analog ICs for wireless ECG acquisition systems. Considering the power-efficient communication in the body sensor network, the required low-power analog ICs are developed for a healthcare system through miniaturization and system integration. To acquire the ECG signal, a low-power analog front-end system, including an ECG signal acquisition board, an on-chip low-pass filter, and an on-chip successive-approximation analog-to-digital converter for portable ECG detection devices is presented. A quadrature CMOS voltage-controlled oscillator and a 2.4 GHz direct-conversion transmitter with a power amplifier and upconversion mixer are also developed to transmit the ECG signal through wireless communication. In the receiver, a 2.4 GHz fully integrated CMOS RF front end with a low-noise amplifier, differential power splitter, and quadrature mixer based on current-reused folded architecture is proposed. The circuits have been implemented to meet the specifications of the IEEE 802.15.4 2.4 GHz standard. The low-power ICs of the wireless ECG acquisition systems have been fabricated using a 0.18 μm Taiwan Semiconductor Manufacturing Company (TSMC) CMOS standard process. The measured results on the human body reveal that ECG signals can be acquired effectively by the proposed low-power analog front-end ICs.

The DIRC front-end electronics chain for BaBar

NASA Astrophysics Data System (ADS)

Bailly, P.; Chauveau, J.; Del Buono, L.; Genat, J. F.; Lebbolo, H.; Roos, L.; Zhang, B.; Beigbeder, C.; Bernier, R.; Breton, D.; Caceres, T.; Chase, R.; Ducorps, A.; Hrisoho, A.; Imbert, P.; Sen, S.; Tocut, V.; Truong, K.; Wormser, G.; Zomer, F.; Bonneaud, G.; Dohou, F.; Gastaldi, F.; Matricon, P.; Renard, C.; Thiebaux, C.; Vasileiadis, G.; Verderi, M.; Oxoby, G.; Va'Vra, J.; Warner, D.; Wilson, R. J.

1999-08-01

The detector of Internally Reflected Cherenkov light (DIRC) of the BaBar detector (SLAC Stanford, USA) measures better than 1 ns the arrival time of Cherenkov photoelectrons, detected in a 11 000 phototubes array and their amplitude spectra. It mainly comprises of 64-channel DIRC Front-End Boards (DFB) equipped with eight full-custom Analog chips performing zero-cross discrimination with 2 mV threshold and pulse shaping, four full-custom Digital TDC chips for timing measurements with 500 ps binning and a readout logic selecting hits in the trigger window, and DIRC Crate Controller cards (DCC) serializing the data collected from up to 16 DFBs onto a 1.2 Gb/s optical link. Extensive test of the pre-production chips have been performed as well as system tests.

Optimizing read-out of the NECTAr front-end electronics

NASA Astrophysics Data System (ADS)

Vorobiov, S.; Feinstein, F.; Bolmont, J.; Corona, P.; Delagnes, E.; Falvard, A.; Gascón, D.; Glicenstein, J.-F.; Naumann, C. L.; Nayman, P.; Ribo, M.; Sanuy, A.; Tavernet, J.-P.; Toussenel, F.; Vincent, P.

2012-12-01

We describe the optimization of the read-out specifications of the NECTAr front-end electronics for the Cherenkov Telescope Array (CTA). The NECTAr project aims at building and testing a demonstrator module of a new front-end electronics design, which takes an advantage of the know-how acquired while building the cameras of the CAT, H.E.S.S.-I and H.E.S.S.-II experiments. The goal of the optimization work is to define the specifications of the digitizing electronics of a CTA camera, in particular integration time window, sampling rate, analog bandwidth using physics simulations. We employed for this work real photomultiplier pulses, sampled at 100 ps with a 600 MHz bandwidth oscilloscope. The individual pulses are drawn randomly at the times at which the photo-electrons, originating from atmospheric showers, arrive at the focal planes of imaging atmospheric Cherenkov telescopes. The timing information is extracted from the existing CTA simulations on the GRID and organized in a local database, together with all the relevant physical parameters (energy, primary particle type, zenith angle, distance from the shower axis, pixel offset from the optical axis, night-sky background level, etc.), and detector configurations (telescope types, camera/mirror configurations, etc.). While investigating the parameter space, an optimal pixel charge integration time window, which minimizes relative error in the measured charge, has been determined. This will allow to gain in sensitivity and to lower the energy threshold of CTA telescopes. We present results of our optimizations and first measurements obtained using the NECTAr demonstrator module.

Frequency to Voltage Converter Analog Front-End Prototype

NASA Technical Reports Server (NTRS)

Mata, Carlos; Raines, Matthew

2012-01-01

The frequency to voltage converter analog front end evaluation prototype (F2V AFE) is an evaluation board designed for comparison of different methods of accurately extracting the frequency of a sinusoidal input signal. A configurable input stage is routed to one or several of five separate, configurable filtering circuits, and then to a configurable output stage. Amplifier selection and gain, filter corner frequencies, and comparator hysteresis and voltage reference are all easily configurable through the use of jumpers and potentiometers.

Electronic readout system for the Belle II imaging Time-Of-Propagation detector

NASA Astrophysics Data System (ADS)

Kotchetkov, Dmitri

2017-07-01

The imaging Time-Of-Propagation (iTOP) detector, constructed for the Belle II experiment at the SuperKEKB e+e- collider, is an 8192-channel high precision Cherenkov particle identification detector with timing resolution below 50 ps. To acquire data from the iTOP, a novel front-end electronic readout system was designed, built, and integrated. Switched-capacitor array application-specific integrated circuits are used to sample analog signals. Triggering, digitization, readout, and data transfer are controlled by Xilinx Zynq-7000 system on a chip devices.

Low-Power Analog Processing for Sensing Applications: Low-Frequency Harmonic Signal Classification

PubMed Central

White, Daniel J.; William, Peter E.; Hoffman, Michael W.; Balkir, Sina

2013-01-01

A low-power analog sensor front-end is described that reduces the energy required to extract environmental sensing spectral features without using Fast Fouriér Transform (FFT) or wavelet transforms. An Analog Harmonic Transform (AHT) allows selection of only the features needed by the back-end, in contrast to the FFT, where all coefficients must be calculated simultaneously. We also show that the FFT coefficients can be easily calculated from the AHT results by a simple back-substitution. The scheme is tailored for low-power, parallel analog implementation in an integrated circuit (IC). Two different applications are tested with an ideal front-end model and compared to existing studies with the same data sets. Results from the military vehicle classification and identification of machine-bearing fault applications shows that the front-end suits a wide range of harmonic signal sources. Analog-related errors are modeled to evaluate the feasibility of and to set design parameters for an IC implementation to maintain good system-level performance. Design of a preliminary transistor-level integrator circuit in a 0.13 μm complementary metal-oxide-silicon (CMOS) integrated circuit process showed the ability to use online self-calibration to reduce fabrication errors to a sufficiently low level. Estimated power dissipation is about three orders of magnitude less than similar vehicle classification systems that use commercially available FFT spectral extraction. PMID:23892765

DOE Office of Scientific and Technical Information (OSTI.GOV)

DE GERONIMO,G.; FRIED, J.; FROST, E.

We describe a front-end application specific integrated circuit (ASIC) developed for a silicon Compton telescope. Composed of 32 channels, it reads out signals in both polarities from each side of a Silicon strip sensor, 2 mm thick 27 cm long, characterized by a strip capacitance of 30 pF. Each front-end channel provides low-noise charge amplification, shaping with a stabilized baseline, discrimination, and peak detection with an analog memory. The channels can process events simultaneously, and the read out is sparsified. The charge amplifier makes uses a dual-cascode configuration and dual-polarity adaptive reset, The low-hysteresis discriminator and the multi-phase peak detectormore » process signals with a dynamic range in excess of four hundred. An equivalent noise charge (ENC) below 200 electrons was measured at 30 pF, with a slope of about 4.5 electrons/pF at a peaking time of 4 {micro}s. With a total dissipated power of 5 mW the channel covers an energy range up to 3.2 MeV.« less

Front-end electronics for the Muon Portal project

NASA Astrophysics Data System (ADS)

Garozzo, S.; Marano, D.; Bonanno, G.; Grillo, A.; Romeo, G.; Timpanaro, M. C.; Lo Presti, D.; Riggi, F.; Russo, V.; Bonanno, D.; La Rocca, P.; Longhitano, F.; Bongiovanni, D. G.; Fallica, G.; Valvo, G.

2016-10-01

The Muon Portal Project was born as a joint initiative between Italian research and industrial partners, aimed at the construction of a real-size working detector prototype to inspect the content of traveling containers by means of secondary cosmic-ray muon radiation and recognize potentially dangerous hidden materials. The tomographic image is obtained by reconstructing the incoming and outgoing muon trajectories when crossing the inspected volume, employing two tracker planes located above and below the container under inspection. In this paper, the design and development of the front-end electronics of the Muon Portal detector is presented, with particular emphasis being devoted to the photo-sensor devices detecting the scintillation light and to the read-out circuitry which is in charge of processing and digitizing the analog pulse signals. In addition, the remote control system, mechanical housing, and thermal cooling system of all structural blocks of the Muon Portal tracker are also discussed, demonstrating the effectiveness and functionality of the adopted design.

Design of an integrated sensor system for the detection of traces of different molecules in the air

NASA Astrophysics Data System (ADS)

Strle, D.; Muševič, I.

2015-04-01

This article presents the design of a miniature detection system and its associated signal processing electronics, which can detect and selectively recognize vapor traces of different materials in the air - including explosives. It is based on the array of surface-functionalized COMB capacitive sensors and extremely low noise, analog, integrated electronic circuit, hardwired digital signal processing hardware and additional software running on a PC. The instrument is sensitive and selective, consumes a minimum amount of energy, is very small (few mm3) and cheap to produce in large quantities, and is insensitive to mechanical influences. Using an electronic detection system built of low noise analog front-end and hard-wired digital signal processing, it is possible to detect less than 0.3ppt of TNT molecules in the atmosphere (3 TNT molecules in 1013 molecules of the air) at 25°C on a 1 Hz bandwidth using very small volume and approx. 10 mA current from a 5V supply voltage. The sensors are implemented in a modified MEMS process and analog electronics in 0.18 um CMOS technology.

Performance evaluation of the analogue front-end and ADC prototypes for the Gotthard-II development

NASA Astrophysics Data System (ADS)

Zhang, J.; Andrä, M.; Barten, R.; Bergamaschi, A.; Brückner, M.; Dinapoli, R.; Fröjdh, E.; Greiffenberg, D.; Lopez-Cuenca, C.; Mezza, D.; Mozzanica, A.; Ramilli, M.; Redford, S.; Ruat, M.; Ruder, C.; Schmitt, B.; Shi, X.; Thattil, D.; Tinti, G.; Turcato, M.; Vetter, S.

2017-12-01

Gotthard-II is a silicon microstrip detector developed for the European X-ray Free-Electron Laser (XFEL.EU). Its potential scientific applications include X-ray absorption/emission spectroscopy, hard X-ray high resolution single-shot spectrometry (HiREX), energy dispersive experiments at 4.5 MHz frame rate, beam diagnostics, as well as veto signal generation for pixel detectors. Gotthard-II uses a silicon microstrip sensor with a pitch of 50 μm or 25 μm and with 1280 or 2560 channels wire-bonded to readout chips (ROCs). In the ROC, an adaptive gain switching pre-amplifier (PRE), a fully differential Correlated-Double-Sampling (CDS) stage, an Analog-to-Digital Converter (ADC) as well as a Static Random-Access Memory (SRAM) capable of storing all the 2700 images in an XFEL.EU bunch train will be implemented. Several prototypes with different designs of the analogue front-end (PRE and CDS) and ADC test structures have been fabricated in UMC-110 nm CMOS technology and their performance has been evaluated. In this paper, the performance of the analogue front-end and ADC will be summarized.

An array of virtual Frisch-grid CdZnTe detectors and a front-end application-specific integrated circuit for large-area position-sensitive gamma-ray cameras.

PubMed

Bolotnikov, A E; Ackley, K; Camarda, G S; Cherches, C; Cui, Y; De Geronimo, G; Fried, J; Hodges, D; Hossain, A; Lee, W; Mahler, G; Maritato, M; Petryk, M; Roy, U; Salwen, C; Vernon, E; Yang, G; James, R B

2015-07-01

We developed a robust and low-cost array of virtual Frisch-grid CdZnTe detectors coupled to a front-end readout application-specific integrated circuit (ASIC) for spectroscopy and imaging of gamma rays. The array operates as a self-reliant detector module. It is comprised of 36 close-packed 6 × 6 × 15 mm(3) detectors grouped into 3 × 3 sub-arrays of 2 × 2 detectors with the common cathodes. The front-end analog ASIC accommodates up to 36 anode and 9 cathode inputs. Several detector modules can be integrated into a single- or multi-layer unit operating as a Compton or a coded-aperture camera. We present the results from testing two fully assembled modules and readout electronics. The further enhancement of the arrays' performance and reduction of their cost are possible by using position-sensitive virtual Frisch-grid detectors, which allow for accurate corrections of the response of material non-uniformities caused by crystal defects.

An array of virtual Frisch-grid CdZnTe detectors and a front-end application-specific integrated circuit for large-area position-sensitive gamma-ray cameras

DOE PAGES

Bolotnikov, A. E.; Ackley, K.; Camarda, G. S.; ...

2015-07-28

We developed a robust and low-cost array of virtual Frisch-grid CdZnTe (CZT) detectors coupled to a front-end readout ASIC for spectroscopy and imaging of gamma rays. The array operates as a self-reliant detector module. It is comprised of 36 close-packed 6x6x15 mm 3 detectors grouped into 3x3 sub-arrays of 2x2 detectors with the common cathodes. The front-end analog ASIC accommodates up to 36 anode and 9 cathode inputs. Several detector modules can be integrated into a single- or multi-layer unit operating as a Compton or a coded-aperture camera. We present the results from testing two fully assembled modules and readoutmore » electronics. The further enhancement of the arrays’ performance and reduction of their cost are made possible by using position-sensitive virtual Frisch-grid detectors, which allow for accurate corrections of the response of material non-uniformities caused by crystal defects.« less

Tevatron beam position monitor upgrade

DOE Office of Scientific and Technical Information (OSTI.GOV)

Wolbers, Stephen; Banerjee, B.; Barker, B.

2005-05-01

The Tevatron Beam Position Monitor (BPM) readout electronics and software have been upgraded to improve measurement precision, functionality and reliability. The original system, designed and built in the early 1980's, became inadequate for current and future operations of the Tevatron. The upgraded system consists of 960 channels of new electronics to process analog signals from 240 BPMs, new front-end software, new online and controls software, and modified applications to take advantage of the improved measurements and support the new functionality. The new system reads signals from both ends of the existing directional stripline pickups to provide simultaneous proton and antiprotonmore » position measurements. Measurements using the new system are presented that demonstrate its improved resolution and overall performance.« less

A Front-End Electronics Prototype Based on Gigabit Ethernet for the ATLAS Small-Strip Thin Gap Chamber

NASA Astrophysics Data System (ADS)

Hu, Kun; Lu, Houbing; Wang, Xu; Li, Feng; Wang, Xinxin; Geng, Tianru; Yang, Hang; Liu, Shengquan; Han, Liang; Jin, Ge

2017-06-01

A front-end electronics prototype for the ATLAS small-strip Thin Gap Chamber (sTGC) based on gigabit Ethernet has been developed. The prototype is designed to read out signals of pads, wires, and strips of the sTGC detector. The prototype includes two VMM2 chips developed to read out the signals of the sTGC, a Xilinx Kintex-7 field-programmable gate array (FPGA) used for the VMM2 configuration and the events storage, and a gigabit Ethernet transceiver PHY chip for interfacing with a computer. The VMM2 chip is designed for the readout of the Micromegas detector and sTGC detector, which is composed of 64 linear front-end channels. Each channel integrates a charge-sensitive amplifier, a shaper, several analog-to-digital converters, and other digital functions. For a bunch-crossing interval of 25 ns, events are continuously read out by the FPGA and forwarded to the computer. The interface between the computer and the prototype has been measured to reach an error-free rate of 900 Mb/s, therefore making a very effective use of the available bandwidth. Additionally, the computer can control several prototypes of this kind simultaneously via the Ethernet interface. At present, the prototype will be used for the sTGC performance test. The features of the prototype are described in detail.

AFEII Analog Front End Board Design Specifications

DOE Office of Scientific and Technical Information (OSTI.GOV)

Rubinov, Paul; /Fermilab

2005-04-01

This document describes the design of the 2nd iteration of the Analog Front End Board (AFEII), which has the function of receiving charge signals from the Central Fiber Tracker (CFT) and providing digital hit pattern and charge amplitude information from those charge signals. This second iteration is intended to address limitations of the current AFE (referred to as AFEI in this document). These limitations become increasingly deleterious to the performance of the Central Fiber Tracker as instantaneous luminosity increases. The limitations are inherent in the design of the key front end chips on the AFEI board (the SVXIIe and themore » SIFT) and the architecture of the board itself. The key limitations of the AFEI are: (1) SVX saturation; (2) Discriminator to analog readout cross talk; (3) Tick to tick pedestal variation; and (4) Channel to channel pedestal variation. The new version of the AFE board, AFEII, addresses these limitations by use of a new chip, the TriP-t and by architectural changes, while retaining the well understood and desirable features of the AFEI board.« less

Advanced Wireless Sensor Nodes - MSFC

NASA Technical Reports Server (NTRS)

Varnavas, Kosta; Richeson, Jeff

2017-01-01

NASA field center Marshall Space Flight Center (Huntsville, AL), has invested in advanced wireless sensor technology development. Developments for a wireless microcontroller back-end were primarily focused on the commercial Synapse Wireless family of devices. These devices have many useful features for NASA applications, good characteristics and the ability to be programmed Over-The-Air (OTA). The effort has focused on two widely used sensor types, mechanical strain gauges and thermal sensors. Mechanical strain gauges are used extensively in NASA structural testing and even on vehicle instrumentation systems. Additionally, thermal monitoring with many types of sensors is extensively used. These thermal sensors include thermocouples of all types, resistive temperature devices (RTDs), diodes and other thermal sensor types. The wireless thermal board will accommodate all of these types of sensor inputs to an analog front end. The analog front end on each of the sensors interfaces to the Synapse wireless microcontroller, based on the Atmel Atmega128 device. Once the analog sensor output data is digitized by the onboard analog to digital converter (A/D), the data is available for analysis, computation or transmission. Various hardware features allow custom embedded software to manage battery power to enhance battery life. This technology development fits nicely into using numerous additional sensor front ends, including some of the low-cost printed circuit board capacitive moisture content sensors currently being developed at Auburn University.

IMAPS Device Packaging Conference 2017 - Engineered Micro Systems & Devices Track

NASA Technical Reports Server (NTRS)

Varnavas, Kosta

2017-01-01

NASA field center Marshall Space Flight Center (Huntsville, AL), has invested in advanced wireless sensor technology development. Developments for a wireless microcontroller back-end were primarily focused on the commercial Synapse Wireless family of devices. These devices have many useful features for NASA applications, good characteristics and the ability to be programmed Over-The-Air (OTA). The effort has focused on two widely used sensor types, mechanical strain gauges and thermal sensors. Mechanical strain gauges are used extensively in NASA structural testing and even on vehicle instrumentation systems. Additionally, thermal monitoring with many types of sensors is extensively used. These thermal sensors include thermocouples of all types, resistive temperature devices (RTDs), diodes and other thermal sensor types. The wireless thermal board will accommodate all of these types of sensor inputs to an analog front end. The analog front end on each of the sensors interfaces to the Synapse wireless microcontroller, based on the Atmel Atmega128 device. Once the analog sensor output data is digitized by the onboard analog to digital converter (A/D), the data is available for analysis, computation or transmission. Various hardware features allow custom embedded software to manage battery power to enhance battery life. This technology development fits nicely into using numerous additional sensor front ends, including some of the low-cost printed circuit board capacitive moisture content sensors currently being developed at Auburn University.

DOE Office of Scientific and Technical Information (OSTI.GOV)

Demaria, N.

This paper is a review of recent progress of RD53 Collaboration. Results obtained on the study of the radiation effects on 65 nm CMOS have matured enough to define first strategies to adopt in the design of analog and digital circuits. Critical building blocks and analog very front end chains have been designed, tested before and after 5–800 Mrad. Small prototypes of 64×64 pixels with complex digital architectures have been produced, and point to address the main issues of dealing with extremely high pixel rates, while operating at very small in-time thresholds in the analog front end. Lastly, the collaborationmore » is now proceeding at full speed towards the design of a large scale prototype, called RD53A, in 65 nm CMOS technology.« less

FPGA-Based Front-End Electronics for Positron Emission Tomography

PubMed Central

Haselman, Michael; DeWitt, Don; McDougald, Wendy; Lewellen, Thomas K.; Miyaoka, Robert; Hauck, Scott

2010-01-01

Modern Field Programmable Gate Arrays (FPGAs) are capable of performing complex discrete signal processing algorithms with clock rates above 100MHz. This combined with FPGA’s low expense, ease of use, and selected dedicated hardware make them an ideal technology for a data acquisition system for positron emission tomography (PET) scanners. Our laboratory is producing a high-resolution, small-animal PET scanner that utilizes FPGAs as the core of the front-end electronics. For this next generation scanner, functions that are typically performed in dedicated circuits, or offline, are being migrated to the FPGA. This will not only simplify the electronics, but the features of modern FPGAs can be utilizes to add significant signal processing power to produce higher resolution images. In this paper two such processes, sub-clock rate pulse timing and event localization, will be discussed in detail. We show that timing performed in the FPGA can achieve a resolution that is suitable for small-animal scanners, and will outperform the analog version given a low enough sampling period for the ADC. We will also show that the position of events in the scanner can be determined in real time using a statistical positioning based algorithm. PMID:21961085

NECTAr: New electronics for the Cherenkov Telescope Array

NASA Astrophysics Data System (ADS)

Vorobiov, S.; Bolmont, J.; Corona, P.; Delagnes, E.; Feinstein, F.; Gascón, D.; Glicenstein, J.-F.; Naumann, C. L.; Nayman, P.; Sanuy, A.; Toussenel, F.; Vincent, P.

2011-05-01

The European astroparticle physics community aims to design and build the next generation array of Imaging Atmospheric Cherenkov Telescopes (IACTs), that will benefit from the experience of the existing H.E.S.S. and MAGIC detectors, and further expand the very-high energy astronomy domain. In order to gain an order of magnitude in sensitivity in the 10 GeV to >100TeV range, the Cherenkov Telescope Array (CTA) will employ 50-100 mirrors of various sizes equipped with 1000-4000 channels per camera, to be compared with the 6000 channels of the final H.E.S.S. array. A 3-year program, started in 2009, aims to build and test a demonstrator module of a generic CTA camera. We present here the NECTAr design of front-end electronics for the CTA, adapted to the trigger and data acquisition of a large IACTs array, with simple production and maintenance. Cost and camera performances are optimized by maximizing integration of the front-end electronics (amplifiers, fast analog samplers, ADCs) in an ASIC, achieving several GS/s and a few μs readout dead-time. We present preliminary results and extrapolated performances from Monte Carlo simulations.

DOE Office of Scientific and Technical Information (OSTI.GOV)

Bolotnikov, A. E., E-mail: bolotnik@bnl.gov; Ackley, K.; Camarda, G. S.

We developed a robust and low-cost array of virtual Frisch-grid CdZnTe detectors coupled to a front-end readout application-specific integrated circuit (ASIC) for spectroscopy and imaging of gamma rays. The array operates as a self-reliant detector module. It is comprised of 36 close-packed 6 × 6 × 15 mm{sup 3} detectors grouped into 3 × 3 sub-arrays of 2 × 2 detectors with the common cathodes. The front-end analog ASIC accommodates up to 36 anode and 9 cathode inputs. Several detector modules can be integrated into a single- or multi-layer unit operating as a Compton or a coded-aperture camera. We presentmore » the results from testing two fully assembled modules and readout electronics. The further enhancement of the arrays’ performance and reduction of their cost are possible by using position-sensitive virtual Frisch-grid detectors, which allow for accurate corrections of the response of material non-uniformities caused by crystal defects.« less

DOE Office of Scientific and Technical Information (OSTI.GOV)

Bolotnikov, A. E.; Ackley, K.; Camarda, G. S.

We developed a robust and low-cost array of virtual Frisch-grid CdZnTe (CZT) detectors coupled to a front-end readout ASIC for spectroscopy and imaging of gamma rays. The array operates as a self-reliant detector module. It is comprised of 36 close-packed 6x6x15 mm 3 detectors grouped into 3x3 sub-arrays of 2x2 detectors with the common cathodes. The front-end analog ASIC accommodates up to 36 anode and 9 cathode inputs. Several detector modules can be integrated into a single- or multi-layer unit operating as a Compton or a coded-aperture camera. We present the results from testing two fully assembled modules and readoutmore » electronics. The further enhancement of the arrays’ performance and reduction of their cost are made possible by using position-sensitive virtual Frisch-grid detectors, which allow for accurate corrections of the response of material non-uniformities caused by crystal defects.« less

Development of FEB Test Platform for ATLAS New Small Wheel Upgrade

NASA Astrophysics Data System (ADS)

Lu, Houbing; Hu, Kun; Wang, Xu; Li, Feng; Han, Liang; Jin, Ge

2016-10-01

This concept of test platform is based on the test requirements of the front-end board (FEB) which is developed for the phase I upgrade of the small Thin Gap Chamber(sTGC) detector on New Small Wheel(NSW) of ATLAS. The front-end electronics system of sTGC consists of 1,536 FEBs with about 322,000 readout of strips, wires and pads in total. A test platform for FEB with up to 256 channels has been designed to keep the testing efficiency at a controllable level. We present the circuit model architecture of the platform, and its functions and implementation as well. The firmware based on Field Programmable Gate Array (FPGA) and the software based on PC have been developed, and basic test methods have been established. FEB readout measurements have been performed in analog injection from the test platform, which will provide a fast and efficient test method for the production of FEB.

Plastic Scintillator Based Detector for Observations of Terrestrial Gamma-ray Flashes.

NASA Astrophysics Data System (ADS)

Barghi, M. R., Sr.; Delaney, N.; Forouzani, A.; Wells, E.; Parab, A.; Smith, D.; Martinez, F.; Bowers, G. S.; Sample, J.

2017-12-01

We present an overview of the concept and design of the Light and Fast TGF Recorder (LAFTR), a balloon borne gamma-ray detector designed to observe Terrestrial Gamma-Ray Flashes (TGFs). Terrestrial Gamma-Ray Flashes (TGFs) are extremely bright, sub-millisecond bursts of gamma-rays observed to originate inside thunderclouds coincident with lightning. LAFTR is joint institutional project built by undergraduates at the University of California Santa Cruz and Montana State University. It consists of a detector system fed into analog front-end electronics and digital processing. The presentation focuses specifically on the UCSC components, which consists of the detector system and analog front-end electronics. Because of the extremely high count rates observed during TGFs, speed is essential for both the detector and electronics of the instrument. The detector employs a fast plastic scintillator (BC-408) read out by a SensL Silicon Photomultiplier (SiPM). BC-408 is chosen for its speed ( 4 ns decay time) and low cost and availability. Furthermore, GEANT3 simulations confirm the scintillator is sensitive to 500 counts at 7 km horizontal distance from the TGF source (for a 13 km source altitude and 26 km balloon altitude) and to 5 counts out to 20 km. The signal from the SiPM has a long exponential decay tail and is sent to a custom shaping circuit board that amplifies and shapes the signal into a semi-Gaussian pulse with a 40 ns FWHM. The signal is then input to a 6-channel discriminator board that clamps the signal and outputs a Low Voltage Differential Signal (LVDS) for processing by the digital electronics.

Solid-State Photomultiplier with Integrated Front End Electronics

NASA Astrophysics Data System (ADS)

Christian, James; Stapels, Christopher; Johnson, Erik; Mukhopadhyay, Sharmistha; Jie Chen, Xiao; Miskimen, Rory

2009-10-01

The instrumentation cost of physics experiments has been reduced per channel, by the use of solid-state detectors, but these cost-effective techniques have not been translated to scintillation-based detectors. When considering photodetectors, the cost per channel is determined by the use of high-voltage, analog-to-digital converters, BNC cables, and any other ancillary devices. The overhead associated with device operation limits the number of channels for the detector system, while potentially limiting the scope of physics that can be explored. The PRIMEX experiment at JLab, which is being designed to measure the radiative widths of the η and η' pseudo-scalar mesons for a more comprehensive understanding of QCD at low energies, is an example where CMOS solid-state photomultipliers (SSPMs) can be implemented. The ubiquitous nature of CMOS allows for on-chip signal processing to provide front-end electronics within the detector package. We present the results of the device development for the PRIMEX calorimeter, discussing the characteristics of SSPMs, the potential cost savings, and experimental results of on-chip signal processing.

A configurable electronics system for the ESS-Bilbao beam position monitors

NASA Astrophysics Data System (ADS)

Muguira, L.; Belver, D.; Etxebarria, V.; Varnasseri, S.; Arredondo, I.; del Campo, M.; Echevarria, P.; Garmendia, N.; Feuchtwanger, J.; Jugo, J.; Portilla, J.

2013-09-01

A versatile and configurable system has been developed in order to monitorize the beam position and to meet all the requirements of the future ESS-Bilbao Linac. At the same time the design has been conceived to be open and configurable so that it could eventually be used in different kinds of accelerators, independent of the charged particle, with minimal change. The design of the Beam Position Monitors (BPMs) system includes a test bench both for button-type pick-ups (PU) and striplines (SL), the electronic units and the control system. The electronic units consist of two main parts. The first part is an Analog Front-End (AFE) unit where the RF signals are filtered, conditioned and converted to base-band. The second part is a Digital Front-End (DFE) unit which is based on an FPGA board where the base-band signals are sampled in order to calculate the beam position, the amplitude and the phase. To manage the system a Multipurpose Controller (MC) developed at ESSB has been used. It includes the FPGA management, the EPICS integration and Archiver Instances. A description of the system and a comparison between the performance of both PU and SL BPM designs measured with this electronics system are fully described and discussed.

Front-end electronics development for TPC detector in the MPD/NICA project

NASA Astrophysics Data System (ADS)

Cheremukhina, G.; Movchan, S.; Vereschagin, S.; Zaporozhets, S.

2017-06-01

The article is aimed at describing the development status, measuring results and design changes of the TPC front-end electronics. The TPC is placed in the middle of Multi-Purpose Detector (MPD) and provides tracing and identifying of charged particles in the pseudorapidity range |η| < 1.2. The readout system is one of the most complex parts of the TPC. The electronics of each readout chamber is an independent system. The whole system contains 95232 channels, 1488 64-channel—front-end cards (FEC), 24 readout control units (RCU). The front-end electronics (FEE) is based on ASICs, FPGAs and high-speed serial links. The concept of the TPC front-end electronics has been motivated from one side—by the requirements concerning the NICA accelerator complex which will operate at the luminosity up to 1027 cm-2 s-1 for Au79+ ions over the energy range of 4 < √SNN < 11 GeV with the trigger rate up to 7 kHz and from the other side—by the requirements of the 4-π geometry to minimize the substance on the end-caps of the TPC.

Embedded electronics for a 64-channel wireless brain implant

NASA Astrophysics Data System (ADS)

Burgert, Johann D.; Malasek, Jan; Martel, Sylvain M.; Wiseman, Colette; Fofonoff, Timothy; Dyer, Robert; Hunter, Ian W.; Hatsopoulos, Nicholas; Donoghue, John

2001-10-01

The Telemetric Electrode Array System (TEAS) is a surgically implantable device for the study of neural activity in the brain. An 8x8 array of electrodes collects intra-cortical neural signals and connects them to an analog front end. The front end amplifies and digitizes these microvolt-level signals with 12 bits of resolution and at 31KHz per channel. Peak detection is used to extract the information carrying features of these signals, which are transmitted over a Bluetooth-based radio link at 725 Kbit/sec. The electrode array is made up of 1mm tall, 60-micron square electrodes spaced 500 microns tip-to-tip. A flex circuit connector provides mechanical isolation between the brain and the electronics, which are mounted to the cranium. Power consumption and management is a critical aspect of the design. The entire system must operate off a surgically implantable battery. With this power source, the system must provide the functionality of a wireless, 64-channel oscilloscope for several hours. The system also provides a low-power sleep mode during which the battery can be inductively charged. Power dissipation and biocompatibility issues also affect the design of the electronics for the probe. The electronics system must fit between the skull and the skin of the test subject. Thus, circuit miniaturization and microassembly techniques are essential to construct the probe's electronics.

Recent progress of RD53 Collaboration towards next generation Pixel Read-Out Chip for HL-LHC

DOE PAGES

Demaria, N.

2016-12-21

This paper is a review of recent progress of RD53 Collaboration. Results obtained on the study of the radiation effects on 65 nm CMOS have matured enough to define first strategies to adopt in the design of analog and digital circuits. Critical building blocks and analog very front end chains have been designed, tested before and after 5–800 Mrad. Small prototypes of 64×64 pixels with complex digital architectures have been produced, and point to address the main issues of dealing with extremely high pixel rates, while operating at very small in-time thresholds in the analog front end. Lastly, the collaborationmore » is now proceeding at full speed towards the design of a large scale prototype, called RD53A, in 65 nm CMOS technology.« less

Design of a Multi-Channel Front-End Readout ASIC With Low Noise and Large Dynamic Input Range for APD-Based PET Imaging

NASA Astrophysics Data System (ADS)

Fang, X. C.; Hu-Guo, Ch.; Ollivier-Henry, N.; Brasse, D.; Hu, Y.

2010-06-01

This paper represents the design of a low-noise, wide band multi-channel readout integrated circuit (IC) used as front end readout electronics of avalanche photo diodes (APD) dedicated to a small animal positron emission tomography (PET) system. The first ten-channel prototype chip (APD-Chip) of the analog parts has been designed and fabricated in a 0.35 μm CMOS process. Every channel of the APD_Chip includes a charge-sensitive preamplifier (CSA), a CR-(RC)2 shaper, and an analog buffer. In a channel, the CSA reads charge signals (10 bits dynamic range) from an APD array having 10 pF of capacitance per pixel. A linearized degenerated differential pair which ensures high linearity in all dynamical range is used as the high feedback resistor for preventing pile up of signals. The designed CSA has the capability of compensating automatically up to 200 nA leakage current from the detector. The CR-(RC)2 shaper filters and shapes the output signal of the CSA. An equivalent input noise charge obtained from test is 275 e -+ 10 e-/pF. In this paper the prototype is presented for both its theoretical analysis and its test results.

Conceptual design of front ends for the advanced photon source multi-bend achromats upgrade

DOE Office of Scientific and Technical Information (OSTI.GOV)

Jaski, Y., E-mail: jaskiy@aps.anl.gov; Westferro, F., E-mail: westferr@aps.anl.gov; Lee, S. H., E-mail: shlee@aps.anl.gov

2016-07-27

The proposed Advanced Photon Source (APS) upgrade from a double-bend achromats (DBA) to multi-bend achromats (MBA) lattice with ring energy change from 7 GeV to 6 GeV and beam current from 100 mA to 200 mA poses new challenges for front ends. All front ends must be upgraded to fulfill the following requirements: 1) handle the high heat load from two insertion devices in either inline or canted configuration, 2) include a clearing magnet in the front end to deflect and dump any electrons in case the electrons escape from the storage ring during swap-out injection with the safety shuttersmore » open, 3) incorporate the next generation x-ray beam position monitors (XBPMs) into the front end to meet the new stringent beam stability requirements. This paper presents the evaluation of the existing APS front ends and standardizes the insertion device (ID) front ends into two types: one for the single beam and one for the canted beams. The conceptual design of high heat load front end (HHLFE) and canted undulator front end (CUFE) for APS MBA upgrade is presented.« less

Conceptual Design of Front Ends for the Advanced Photon Source Multi-bend Achromats Upgrade

DOE Office of Scientific and Technical Information (OSTI.GOV)

Jaski, Y.; Westferro, F.; Lee, S. H.

2016-07-27

The proposed Advanced Photon Source (APS) upgrade from a double-bend achromats (DBA) to multi-bend achromats (MBA) lattice with ring energy change from 7 GeV to 6 GeV and beam current from 100 mA to 200 mA poses new challenges for front ends. All front ends must be upgraded to fulfill the following requirements: 1) handle the high heat load from two insertion devices in either inline or canted configuration, 2) include a clearing magnet in the front end to deflect and dump any electrons in case the electrons escape from the storage ring during swap-out injection with the safety shuttersmore » open, 3) incorporate the next generation x-ray beam position monitors (XBPMs) into the front end to meet the new stringent beam stability requirements. This paper presents the evaluation of the existing APS front ends and standardizes the insertion device (ID) front ends into two types: one for the single beam and one for the canted beams. The conceptual design of high heat load front end (HHLFE) and canted undulator front end (CUFE) for APS MBA upgrade is presented.« less

Charge-sensitive front-end electronics with operational amplifiers for CdZnTe detectors

NASA Astrophysics Data System (ADS)

Födisch, P.; Berthel, M.; Lange, B.; Kirschke, T.; Enghardt, W.; Kaever, P.

2016-09-01

Cadmium zinc telluride (CdZnTe, CZT) radiation detectors are suitable for a variety of applications, due to their high spatial resolution and spectroscopic energy performance at room temperature. However, state-of-the-art detector systems require high-performance readout electronics. Though an application-specific integrated circuit (ASIC) is an adequate solution for the readout, requirements of high dynamic range and high throughput are not available in any commercial circuit. Consequently, the present study develops the analog front-end electronics with operational amplifiers for an 8×8 pixelated CZT detector. For this purpose, we modeled an electrical equivalent circuit of the CZT detector with the associated charge-sensitive amplifier (CSA). Based on a detailed network analysis, the circuit design is completed by numerical values for various features such as ballistic deficit, charge-to-voltage gain, rise time, and noise level. A verification of the performance is carried out by synthetic detector signals and a pixel detector. The experimental results with the pixel detector assembly and a 22Na radioactive source emphasize the depth dependence of the measured energy. After pulse processing with depth correction based on the fit of the weighting potential, the energy resolution is 2.2% (FWHM) for the 511 keV photopeak.

High-performance electronics for time-of-flight PET systems

NASA Astrophysics Data System (ADS)

Choong, W.-S.; Peng, Q.; Vu, C. Q.; Turko, B. T.; Moses, W. W.

2013-01-01

We have designed and built a high-performance readout electronics system for time-of-flight positron emission tomography (TOF PET) cameras. The electronics architecture is based on the electronics for a commercial whole-body PET camera (Siemens/CPS Cardinal electronics), modified to improve the timing performance. The fundamental contributions in the electronics that can limit the timing resolution include the constant fraction discriminator (CFD), which converts the analog electrical signal from the photo-detector to a digital signal whose leading edge is time-correlated with the input signal, and the time-to-digital converter (TDC), which provides a time stamp for the CFD output. Coincident events are identified by digitally comparing the values of the time stamps. In the Cardinal electronics, the front-end processing electronics are performed by an Analog subsection board, which has two application-specific integrated circuits (ASICs), each servicing a PET block detector module. The ASIC has a built-in CFD and TDC. We found that a significant degradation in the timing resolution comes from the ASIC's CFD and TDC. Therefore, we have designed and built an improved Analog subsection board that replaces the ASIC's CFD and TDC with a high-performance CFD (made with discrete components) and TDC (using the CERN high-performance TDC ASIC). The improved Analog subsection board is used in a custom single-ring LSO-based TOF PET camera. The electronics system achieves a timing resolution of 60 ps FWHM. Prototype TOF detector modules are read out with the electronics system and give coincidence timing resolutions of 259 ps FWHM and 156 ps FWHM for detector modules coupled to LSO and LaBr3 crystals respectively.

High-performance electronics for time-of-flight PET systems.

PubMed

Choong, W-S; Peng, Q; Vu, C Q; Turko, B T; Moses, W W

2013-01-01

We have designed and built a high-performance readout electronics system for time-of-flight positron emission tomography (TOF PET) cameras. The electronics architecture is based on the electronics for a commercial whole-body PET camera (Siemens/CPS Cardinal electronics), modified to improve the timing performance. The fundamental contributions in the electronics that can limit the timing resolution include the constant fraction discriminator (CFD), which converts the analog electrical signal from the photo-detector to a digital signal whose leading edge is time-correlated with the input signal, and the time-to-digital converter (TDC), which provides a time stamp for the CFD output. Coincident events are identified by digitally comparing the values of the time stamps. In the Cardinal electronics, the front-end processing electronics are performed by an Analog subsection board, which has two application-specific integrated circuits (ASICs), each servicing a PET block detector module. The ASIC has a built-in CFD and TDC. We found that a significant degradation in the timing resolution comes from the ASIC's CFD and TDC. Therefore, we have designed and built an improved Analog subsection board that replaces the ASIC's CFD and TDC with a high-performance CFD (made with discrete components) and TDC (using the CERN high-performance TDC ASIC). The improved Analog subsection board is used in a custom single-ring LSO-based TOF PET camera. The electronics system achieves a timing resolution of 60 ps FWHM. Prototype TOF detector modules are read out with the electronics system and give coincidence timing resolutions of 259 ps FWHM and 156 ps FWHM for detector modules coupled to LSO and LaBr 3 crystals respectively.

A 14-bit 40-MHz analog front end for CCD application

NASA Astrophysics Data System (ADS)

Jingyu, Wang; Zhangming, Zhu; Shubin, Liu

2016-06-01

A 14-bit, 40-MHz analog front end (AFE) for CCD scanners is analyzed and designed. The proposed system incorporates a digitally controlled wideband variable gain amplifier (VGA) with nearly 42 dB gain range, a correlated double sampler (CDS) with programmable gain functionality, a 14-bit analog-to-digital converter and a programmable timing core. To achieve the maximum dynamic range, the VGA proposed here can linearly amplify the input signal in a gain range from -1.08 to 41.06 dB in 6.02 dB step with a constant bandwidth. A novel CDS takes image information out of noise, and further amplifies the signal accurately in a gain range from 0 to 18 dB in 0.035 dB step. A 14-bit ADC is adopted to quantify the analog signal with optimization in power and linearity. An internal timing core can provide flexible timing for CCD arrays, CDS and ADC. The proposed AFE was fabricated in SMIC 0.18 μm CMOS process. The whole circuit occupied an active area of 2.8 × 4.8 mm2 and consumed 360 mW. When the frequency of input signal is 6.069 MHz, and the sampling frequency is 40 MHz, the signal to noise and distortion (SNDR) is 70.3 dB, the effective number of bits is 11.39 bit. Project supported by the National Natural Science Foundation of China (Nos. 61234002, 61322405, 61306044, 61376033), the National High-Tech Program of China (No. 2013AA014103), and the Opening Project of Science and Technology on Reliability Physics and Application Technology of Electronic Component Laboratory (No. ZHD201302).

Towards Gotthard-II: development of a silicon microstrip detector for the European X-ray Free-Electron Laser

NASA Astrophysics Data System (ADS)

Zhang, J.; Andrä, M.; Barten, R.; Bergamaschi, A.; Brückner, M.; Dinapoli, R.; Fröjdh, E.; Greiffenberg, D.; Lopez-Cuenca, C.; Mezza, D.; Mozzanica, A.; Ramilli, M.; Redford, S.; Ruat, M.; Ruder, C.; Schmitt, B.; Shi, X.; Thattil, D.; Tinti, G.; Turcato, M.; Vetter, S.

2018-01-01

Gotthard-II is a 1-D microstrip detector specifically developed for the European X-ray Free-Electron Laser. It will not only be used in energy dispersive experiments but also as a beam diagnostic tool with additional logic to generate veto signals for the other 2-D detectors. Gotthard-II makes use of a silicon microstrip sensor with a pitch of either 50 μm or 25 μm and with 1280 or 2560 channels wire-bonded to adaptive gain switching readout chips. Built-in analog-to-digital converters and digital memories will be implemented in the readout chip for a continuous conversion and storage of frames for all bunches in the bunch train. The performance of analogue front-end prototypes of Gotthard has been investigated in this work. The results in terms of noise, conversion gain, dynamic range, obtained by means of infrared laser and X-rays, will be shown. In particular, the effects of the strip-to-strip coupling are studied in detail and it is found that the reduction of the coupling effects is one of the key factors for the development of the analogue front-end of Gotthard-II.

DOE Office of Scientific and Technical Information (OSTI.GOV)

De Geronimo, G.; Li, S.; D'Andragora, A.

We present a front-end application-specific integrated circuit (ASIC) for a wire based time-projection-chamber (TPC) operating in liquid Argon (LAr). The LAr TPC will be used for long baseline neutrino oscillation experiments. The ASIC must provide a low-noise readout of the signals induced on the TPC wires, digitization of those signals at 2 MSamples/s, compression, buffering and multiplexing. A resolution of better than 1000 rms electrons at 200 pF input capacitance for an input range of 300 fC is required, along with low power and operation in LAr (at 87 K). We include the characterization of a commercial technology for operationmore » in the cryogenic environment and the first experimental results on the analog front end. The results demonstrate that complementary metal-oxide semiconductor transistors have lower noise and much improved dc characteristics at LAr temperature. Finally, we introduce the concept of '1/f equivalent' to model the low-frequency component of the noise spectral density, for use in the input metal-oxide semiconductor field-effect transistor optimization.« less

Noise propagation effects in power supply distribution systems for high-energy physics experiments

NASA Astrophysics Data System (ADS)

Arteche, F.; Rivetta, C.; Iglesias, M.; Echeverria, I.; Pradas, A.; Arcega, F. J.

2017-12-01

High-energy physics experiments are supplied by thousands of power supply units placed in distant areas from the front-end electronics. The power supply units and the front-end electronics are connected through long power cables that propagate the output noise from the power supplies to the detector. This paper addresses the effect of long cables on the noise propagation and the impact that those cables have on the conducted emission levels required for the power supplies and the selection of EMI filters for the front-end electronic low-voltage input. This analysis is part of the electromagnetic compatibility based design focused on functional safety to define the type of cable, shield connections, EMI filters and power supply specifications required to ensure the successful integration of the detector and, specifically, to achieve the designed performance of the front-end electronics.

Noise propagation effects in power supply distribution systems for high-energy physics experiments

DOE PAGES

Arteche, F.; Rivetta, C.; Iglesias, M.; ...

2017-12-05

High-energy physics experiments are supplied by thousands of power supply units placed in distant areas from the front-end electronics. The power supply units and the front-end electronics are connected through long power cables that propagate the output noise from the power supplies to the detector. Here, this paper addresses the effect of long cables on the noise propagation and the impact that those cables have on the conducted emission levels required for the power supplies and the selection of EMI filters for the front-end electronic low-voltage input. Lastly, this analysis is part of the electromagnetic compatibility based design focused onmore » functional safety to define the type of cable, shield connections, EMI filters and power supply specifications required to ensure the successful integration of the detector and, specifically, to achieve the designed performance of the front-end electronics.« less

Noise propagation effects in power supply distribution systems for high-energy physics experiments

DOE Office of Scientific and Technical Information (OSTI.GOV)

Arteche, F.; Rivetta, C.; Iglesias, M.

High-energy physics experiments are supplied by thousands of power supply units placed in distant areas from the front-end electronics. The power supply units and the front-end electronics are connected through long power cables that propagate the output noise from the power supplies to the detector. Here, this paper addresses the effect of long cables on the noise propagation and the impact that those cables have on the conducted emission levels required for the power supplies and the selection of EMI filters for the front-end electronic low-voltage input. Lastly, this analysis is part of the electromagnetic compatibility based design focused onmore » functional safety to define the type of cable, shield connections, EMI filters and power supply specifications required to ensure the successful integration of the detector and, specifically, to achieve the designed performance of the front-end electronics.« less

Power supply and pulsing strategies for the future linear colliders

NASA Astrophysics Data System (ADS)

Brogna, A. S.; Göttlicher, P.; Weber, M.

2012-02-01

The concept of the power delivery systems of the future linear colliders exploits the pulsed bunch structure of the beam in order to minimize the average current in the cables and the electronics and thus to reduce the material budget and heat dissipation. Although modern integrated circuit technologies are already available to design a low-power system, the concepts on how to pulse the front-end electronics and further reduce the power are not yet well understood. We propose a possible implementation of a power pulsing system based on a DC/DC converter and we choose the Analog Hadron Calorimeter as a specific example. The model features large switching currents of electronic modules in short time intervals to stimulate the inductive components along the cables and interconnections.

Diagnostic-management system and test pulse acquisition for WEST plasma measurement system

NASA Astrophysics Data System (ADS)

Wojenski, A.; Kasprowicz, G.; Pozniak, K. T.; Byszuk, A.; Juszczyk, B.; Zabolotny, W.; Zienkiewicz, P.; Chernyshova, M.; Czarski, T.; Mazon, D.; Malard, P.

2014-11-01

This paper describes current status of electronics, firmware and software development for new plasma measurement system for use in WEST facility. The system allows to perform two dimensional plasma visualization (in time) with spectrum measurement. The analog front-end is connected to Gas Electron Multiplier detector (GEM detector). The system architecture have high data throughput due to use of PCI-Express interface, Gigabit Transceivers and sampling frequency of ADC integrated circuits. The hardware is based on several years of experience in building X-ray spectrometer system for Joint European Torus (JET) facility. Data streaming is done using Artix7 FPGA devices. The system in basic configuration can work with up to 256 channels, while the maximum number of measurement channels is 2048. Advanced firmware for the FPGA is required in order to perform high speed data streaming and analog signal sampling. Diagnostic system management has been developed in order to configure measurement system, perform necessary calibration and prepare hardware for data acquisition.

Maximum-Likelihood Detection Of Noncoherent CPM

NASA Technical Reports Server (NTRS)

Divsalar, Dariush; Simon, Marvin K.

1993-01-01

Simplified detectors proposed for use in maximum-likelihood-sequence detection of symbols in alphabet of size M transmitted by uncoded, full-response continuous phase modulation over radio channel with additive white Gaussian noise. Structures of receivers derived from particular interpretation of maximum-likelihood metrics. Receivers include front ends, structures of which depends only on M, analogous to those in receivers of coherent CPM. Parts of receivers following front ends have structures, complexity of which would depend on N.

Low-voltage analog front-end processor design for ISFET-based sensor and H+ sensing applications

NASA Astrophysics Data System (ADS)

Chung, Wen-Yaw; Yang, Chung-Huang; Peng, Kang-Chu; Yeh, M. H.

2003-04-01

This paper presents a modular-based low-voltage analog-front-end processor design in a 0.5mm double-poly double-metal CMOS technology for Ion Sensitive Field Effect Transistor (ISFET)-based sensor and H+ sensing applications. To meet the potentiometric response of the ISFET that is proportional to various H+ concentrations, the constant-voltage and constant current (CVCS) testing configuration has been used. Low-voltage design skills such as bulk-driven input pair, folded-cascode amplifier, bootstrap switch control circuits have been designed and integrated for 1.5V supply and nearly rail-to-rail analog to digital signal processing. Core modules consist of an 8-bit two-step analog-digital converter and bulk-driven pre-amplifiers have been developed in this research. The experimental results show that the proposed circuitry has an acceptable linearity to 0.1 pH-H+ sensing conversions with the buffer solution in the range of pH2 to pH12. The processor has a potential usage in battery-operated and portable healthcare devices and environmental monitoring applications.

Novel active signal compression in low-noise analog readout at future X-ray FEL facilities

NASA Astrophysics Data System (ADS)

Manghisoni, M.; Comotti, D.; Gaioni, L.; Lodola, L.; Ratti, L.; Re, V.; Traversi, G.; Vacchi, C.

2015-04-01

This work presents the design of a low-noise front-end implementing a novel active signal compression technique. This feature can be exploited in the design of analog readout channels for application to the next generation free electron laser (FEL) experiments. The readout architecture includes the low-noise charge sensitive amplifier (CSA) with dynamic signal compression, a time variant shaper used to process the signal at the preamplifier output and a 10-bit successive approximation register (SAR) analog-to-digital converter (ADC). The channel will be operated in such a way to cope with the high frame rate (exceeding 1 MHz) foreseen for future XFEL machines. The choice of a 65 nm CMOS technology has been made in order to include all the building blocks in the target pixel pitch of 100 μm. This work has been carried out in the frame of the PixFEL Project funded by the Istituto Nazionale di Fisica Nucleare (INFN), Italy.

Low-noise front-end electronics for detection of intermediate-frequency weak light signals

NASA Astrophysics Data System (ADS)

Lin, Cunbao; Yan, Shuhua; Du, Zhiguang; Wei, Chunhua; Wang, Guochao

2015-02-01

A novel low-noise front-end electronics was proposed for detection of light signals with intensity about 10 μW and frequency above 2.7 MHz. The direct current (DC) power supply, pre-amplifier and main-amplifier were first designed, simulated and then realized. Small-size components were used to make the power supply small, and the pre-amplifier and main-amplifier were the least capacitors to avoid the phase shift of the signals. The performance of the developed front-end electronics was verified in cross-grating diffraction experiments. The results indicated that the output peak-topeak noise of the +/-5 V DC power supply was about 2 mV, and the total output current was 1.25 A. The signal-to-noise ratio (SNR) of the output signal of the pre-amplifier was about 50 dB, and it increased to nearly 60 dB after the mainamplifier, which means this front-end electronics was especially suitable for using in the phase-sensitive and integrated precision measurement systems.

Integration of the GET electronics for the CHIMERA and FARCOS devices

NASA Astrophysics Data System (ADS)

De Filippo, E.; Acosta, L.; Auditore, L.; Boiano, C.; Cardella, G.; Castoldi, A.; D’Andrea, M.; De Luca, S.; Favela, F.; Fichera, F.; Giudice, N.; Gnoffo, B.; Grimaldi, A.; Guazzoni, C.; Lanzalone, G.; Librizzi, F.; Litrico, P.; Maiolino, C.; Maffesanti, S.; Martorana, NS; Pagano, A.; Pagano, EV; Papa, M.; Parsani, T.; Passaro, G.; Pirrone, S.; Politi, G.; Previdi, F.; Quattrocchi, L.; Rizzo, F.; Russotto, P.; Saccà, G.; Salemi, G.; Sciliberto, D.; Trifirò, A.; Trimarchi, M.

2018-05-01

A new front-end based on digital GET electronics has been adopted for the readout of the CsI(Tl) detectors of the CHIMERA 4π multi-detector and for the new modular Femtoscopy Array for Correlation and Spectroscopy (FARCOS). It is expected that the coupling of CHIMERA with the FARCOS array, featuring high angular and energy resolution, and the adoption of the new digital electronics will be well suited for improving specific future data analysis, with the full shape storage of the signals, in the field of heavy ion reactions with stable and exotic beams around the Fermi energies domain. Integration of the GET electronics with CHIMERA and FARCOS devices and with the local analog data acquisition will be briefly discussed. We present some results from previous experimental tests and from the first in-beam experiment (Hoyle-Gamma) with the coupled GET+CHIMERA data acquisition.

Front-end Electronics for Unattended Measurement (FEUM). Prototype Test Plan

DOE Office of Scientific and Technical Information (OSTI.GOV)

Conrad, Ryan C.; Morris, Scott J.; Smith, Leon E.

2015-09-16

The IAEA has requested that PNNL perform an initial set of tests on front-end electronics for unattended measurement (FEUM) prototypes. The FEUM prototype test plan details the tests to be performed, the criteria for evaluation, and the procedures used to execute the tests.

A miniaturized neuroprosthesis suitable for implantation into the brain

NASA Technical Reports Server (NTRS)

Mojarradi, Mohammad; Binkley, David; Blalock, Benjamin; Andersen, Richard; Ulshoefer, Norbert; Johnson, Travis; Del Castillo, Linda

2003-01-01

This paper presents current research on a miniaturized neuroprosthesis suitable for implantation into the brain. The prosthesis is a heterogeneous integration of a 100-element microelectromechanical system (MEMS) electrode array, front-end complementary metal-oxide-semiconductor (CMOS) integrated circuit for neural signal preamplification, filtering, multiplexing and analog-to-digital conversion, and a second CMOS integrated circuit for wireless transmission of neural data and conditioning of wireless power. The prosthesis is intended for applications where neural signals are processed and decoded to permit the control of artificial or paralyzed limbs. This research, if successful, will allow implantation of the electronics into the brain, or subcutaneously on the skull, and eliminate all external signal and power wiring. The neuroprosthetic system design has strict size and power constraints with each of the front-end preamplifier channels fitting within the 400 x 400-microm pitch of the 100-element MEMS electrode array and power dissipation resulting in less than a 1 degree C temperature rise for the surrounding brain tissue. We describe the measured performance of initial micropower low-noise CMOS preamplifiers for the neuroprosthetic.

An ultra low-power front-end IC for wearable health monitoring system.

PubMed

Yu-Pin Hsu; Zemin Liu; Hella, Mona M

2016-08-01

This paper presents a low-power front-end IC for wearable health monitoring systems. The IC, designed in a standard 0.13μm CMOS technology, fully integrates a low-noise analog front-end (AFE) to process the weak bio-signals, followed by an analog-to-digital converter (ADC) to digitize the extracted signals. An AC-coupled driving buffer, that interfaces between the AFE and the ADC is introduced to scale down the power supply of the ADC. The power consumption decreases by 50% compared to the case without power supply scaling. The AFE passes signals from 0.5Hz to 280Hz and from 0.7Hz to 160Hz with a simulated input referred noise of 1.6μVrms and achieves a maximum gain of 35dB/41dB respectively, with a noise-efficiency factor (NEF) of the AFE is 1. The 8-bit ADC achieves a simulated 7.96-bit resolution at 10KS/s sampling rate under 0.5V supply voltage. The overall system consumes only 0.86μW at dual supply voltages of 1V (AFE) and 0.5 V (ADC).

A New Statistics-Based Online Baseline Restorer for a High Count-Rate Fully Digital System.

PubMed

Li, Hongdi; Wang, Chao; Baghaei, Hossain; Zhang, Yuxuan; Ramirez, Rocio; Liu, Shitao; An, Shaohui; Wong, Wai-Hoi

2010-04-01

The goal of this work is to develop a novel, accurate, real-time digital baseline restorer using online statistical processing for a high count-rate digital system such as positron emission tomography (PET). In high count-rate nuclear instrumentation applications, analog signals are DC-coupled for better performance. However, the detectors, pre-amplifiers and other front-end electronics would cause a signal baseline drift in a DC-coupling system, which will degrade the performance of energy resolution and positioning accuracy. Event pileups normally exist in a high-count rate system and the baseline drift will create errors in the event pileup-correction. Hence, a baseline restorer (BLR) is required in a high count-rate system to remove the DC drift ahead of the pileup correction. Many methods have been reported for BLR from classic analog methods to digital filter solutions. However a single channel BLR with analog method can only work under 500 kcps count-rate, and normally an analog front-end application-specific integrated circuits (ASIC) is required for the application involved hundreds BLR such as a PET camera. We have developed a simple statistics-based online baseline restorer (SOBLR) for a high count-rate fully digital system. In this method, we acquire additional samples, excluding the real gamma pulses, from the existing free-running ADC in the digital system, and perform online statistical processing to generate a baseline value. This baseline value will be subtracted from the digitized waveform to retrieve its original pulse with zero-baseline drift. This method can self-track the baseline without a micro-controller involved. The circuit consists of two digital counter/timers, one comparator, one register and one subtraction unit. Simulation shows a single channel works at 30 Mcps count-rate with pileup condition. 336 baseline restorer circuits have been implemented into 12 field-programmable-gate-arrays (FPGA) for our new fully digital PET system.

Analog Front-Ends comparison in the way of a portable, low-power and low-cost EMG controller based on pattern recognition EMBC 2015.

PubMed

Mastinu, Enzo; Ortiz-Catalan, Max; Hakansson, Bo

2015-01-01

Compact and low-noise Analog Front-Ends (AFEs) are becoming increasingly important for the acquisition of bioelectric signals in portable system. In this work, we compare two popular AFEs available on the market, namely the ADS1299 (Texas Instruments) and the RHA2216 (Intan Technologies). This work develops towards the identification of suitable acquisition modules to design an affordable, reliable and portable device for electromyography (EMG) acquisition and prosthetic control. Device features such as Common Mode Rejection (CMR), Input Referred Noise (IRN) and Signal to Noise Ratio (SNR) were evaluated, as well as the resulting accuracy in myoelectric pattern recognition (MPR) for the decoding of motion intention. Results reported better noise performances and higher MPR accuracy for the ADS1299 and similar SNR values for both devices.

Overview of recent trends and developments for BPM systems

DOE Office of Scientific and Technical Information (OSTI.GOV)

Wendt, M.; /Fermilab

2011-08-01

Beam position monitoring (BPM) systems are the workhorse of beam diagnostics for almost any kind of charged particle accelerator: linear, circular or transport-lines, operating with leptons, hadrons or heavy ions. BPMs are essential for beam commissioning, accelerator fault analysis and trouble shooting, machine optics, as well as lattice measurements, and finally, for accelerator optimization, in order to achieve the ultimate beam quality. This presentation summarizes the efforts of the beam instrumentation community on recent developments and advances on BPM technologies, i.e. BPM pickup monitors and front-end electronics (analog and digital). Principles, examples, and state-of-the-art status on various BPM techniques, servingmore » hadron and heavy ion machines, sync light synchrotron's, as well as electron linacs for FEL or HEP applications are outlined.« less

Design and Development of the SMAP Microwave Radiometer Electronics

NASA Technical Reports Server (NTRS)

Piepmeier, Jeffrey R.; Medeiros, James J.; Horgan, Kevin A.; Brambora, Clifford K.; Estep, Robert H.

2014-01-01

The SMAP microwave radiometer will measure land surface brightness temperature at L-band (1413 MHz) in the presence of radio frequency interference (RFI) for soil moisture remote sensing. The radiometer design was driven by the requirements to incorporate internal calibration, to operate synchronously with the SMAP radar, and to mitigate the deleterious effects of RFI. The system design includes a highly linear super-heterodyne microwave receiver with internal reference loads and noise sources for calibration and an innovative digital signal processor and detection system. The front-end comprises a coaxial cable-based feed network, with a pair of diplexers and a coupled noise source, and radiometer front-end (RFE) box. Internal calibration is provided by reference switches and a common noise source inside the RFE. The RF back-end (RBE) downconverts the 1413 MHz channel to an intermediate frequency (IF) of 120 MHz. The IF signals are then sampled and quantized by high-speed analog-to-digital converters in the radiometer digital electronics (RDE) box. The RBE local oscillator and RDE sampling clocks are phase-locked to a common reference to ensure coherency between the signals. The RDE performs additional filtering, sub-band channelization, cross-correlation for measuring third and fourth Stokes parameters, and detection and integration of the first four raw moments of the signals. These data are packetized and sent to the ground for calibration and further processing. Here we discuss the novel features of the radiometer hardware particularly those influenced by the need to mitigate RFI.

A system for the automated data-acquisition of fast transient signals in excitable membranes.

PubMed

Bustamante, J O

1988-01-01

This paper provides a description of a system for the acquisition of fast transient currents flowing across excitable membranes. The front end of the system consists of a CAMAC crate with plug-in modules. The modules provide control of CAMAC operations, analog to digital conversion, electronic memory storage and timing of events. The signals are transferred under direct memory access to an IBM PC microcomputer through a special-purpose interface. Voltage levels from a digital to analog board in the microcomputer are passed through multiplexers to produce the desired voltage pulse patterns to elicit the transmembrane currents. The dead time between consecutive excitatory voltage pulses is limited only by the computer data bus and the software characteristics. The dead time between data transfers can be reduced to the order of milliseconds, which is sufficient for most experiments with transmembrane ionic currents.

Design and Test of a 65nm CMOS Front-End with Zero Dead Time for Next Generation Pixel Detectors

DOE Office of Scientific and Technical Information (OSTI.GOV)

Gaioni, L.; Braga, D.; Christian, D.

This work is concerned with the experimental characterization of a synchronous analog processor with zero dead time developed in a 65 nm CMOS technology, conceived for pixel detectors at the HL-LHC experiment upgrades. It includes a low noise, fast charge sensitive amplifier with detector leakage compensation circuit, and a compact, single ended comparator able to correctly process hits belonging to two consecutive bunch crossing periods. A 2-bit Flash ADC is exploited for digital conversion immediately after the preamplifier. A description of the circuits integrated in the front-end processor and the initial characterization results are provided

Evaluation of commercial ADC radiation tolerance for accelerator experiments

DOE PAGES

Chen, K.; Chen, H.; Kierstead, J.; ...

2015-08-17

Electronic components used in high energy physics experiments are subjected to a radiation background composed of high energy hadrons, mesons and photons. These particles can induce permanent and transient effects that affect the normal device operation. Ionizing dose and displacement damage can cause chronic damage which disable the device permanently. Transient effects or single event effects are in general recoverable with time intervals that depend on the nature of the failure. The magnitude of these effects is technology dependent with feature size being one of the key parameters. Analog to digital converters are components that are frequently used in detectormore » front end electronics, generally placed as close as possible to the sensing elements to maximize signal fidelity. We report on radiation effects tests conducted on 17 commercially available analog to digital converters and extensive single event effect measurements on specific twelve and fourteen bit ADCs that presented high tolerance to ionizing dose. We discuss mitigation strategies for single event effects (SEE) for their use in the large hadron collider environment.« less

Design and characterization of the PREC (Prototype Readout Electronics for Counting particles)

NASA Astrophysics Data System (ADS)

Assis, P.; Brogueira, P.; Ferreira, M.; Luz, R.; Mendes, L.

2016-08-01

The design, tests and performance of a novel, low noise, acquisition system—the PREC (Prototype Readout Electronics for Counting particles) is presented in this article. PREC is a system developed using discrete electronics for particle counting applications using RPCs (Resistive Plate Chamber) detectors. PREC can, however, be used with other kind of detectors that present fast pulses, e.g. Silicon Photomultipliers. The PREC system consists in several Front-End boards that transmit data to a purely digital Motherboard. The amplification and discrimination of the signal is performed in the Front-End boards, making them the critical component of the system. In this paper, the Front-End was tested extensively by measuring the gain, noise level, crosstalk, trigger efficiency, propagation time and power consumption. The gain shows a decrease with the working temperature and an increase with the power supply voltage. The Front-End board shows a low noise level (<= 1.6 mV at 3σ level) and no crosstalk is detected above this level. The s-curve of the trigger efficiency is characterized by a 3 mV gap from the region where most of the signals are triggered to almost no signal is triggered. The signal transit time between the Front-End input and the digital Motherboard is estimated to be 5.82 ns. The maximum power consumption is 3.372 W for the Motherboard and 3.576 W and 1.443 W for each Front-End analogue circuitry and digital part, respectively.

FELIX: a PCIe based high-throughput approach for interfacing front-end and trigger electronics in the ATLAS Upgrade framework

NASA Astrophysics Data System (ADS)

Anderson, J.; Bauer, K.; Borga, A.; Boterenbrood, H.; Chen, H.; Chen, K.; Drake, G.; Dönszelmann, M.; Francis, D.; Guest, D.; Gorini, B.; Joos, M.; Lanni, F.; Lehmann Miotto, G.; Levinson, L.; Narevicius, J.; Panduro Vazquez, W.; Roich, A.; Ryu, S.; Schreuder, F.; Schumacher, J.; Vandelli, W.; Vermeulen, J.; Whiteson, D.; Wu, W.; Zhang, J.

2016-12-01

The ATLAS Phase-I upgrade (2019) requires a Trigger and Data Acquisition (TDAQ) system able to trigger and record data from up to three times the nominal LHC instantaneous luminosity. The Front-End LInk eXchange (FELIX) system provides an infrastructure to achieve this in a scalable, detector agnostic and easily upgradeable way. It is a PC-based gateway, interfacing custom radiation tolerant optical links from front-end electronics, via PCIe Gen3 cards, to a commodity switched Ethernet or InfiniBand network. FELIX enables reducing custom electronics in favour of software running on commercial servers. The FELIX system, the design of the PCIe prototype card and the integration test results are presented in this paper.

A 32-channel front-end ASIC for GEM detectors used in beam monitoring applications

NASA Astrophysics Data System (ADS)

Ciciriello, F.; Altieri, P. R.; Corsi, F.; De Robertis, G.; Felici, G.; Loddo, F.; Lorusso, L.; Marzocca, C.; Matarrese, G.; Ranieri, A.; Stamerra, A.

2017-11-01

A multichannel, mixed-signal, front-end ASIC for GEM detectors, intended for beam monitoring in hadron therapy applications, has been designed and prototyped in a standard 0.35 μm CMOS technology. The analog channels are based on the classic CSA + shaper processing chain, followed by a peak detector which can work as an analog memory, to simplifiy the analog-to-digital conversion of the peak voltage of the output pulse, proportional to the energy of the detected event. The available hardware resources include an 8-bit A/D converter and a standard-cell digital part, which manages the read-out procedure, in sparse or serial mode. The ASIC is self-triggered and transfers energy and address data to the external DAQ via a fast 100 MHz LVDS link. Preliminary characterization results show that the non-linearity error is limited to 5% for a maximum input charge of about 70 fC, the measured ENC is about 1400e- and the time jitter of the trigger signal generated in response to an injected charge of 60 fC is close to 200 ps.

Design and evaluation of wide-range and low-power analog front-end enabling body-implanted devices to monitor charge injection properties

NASA Astrophysics Data System (ADS)

Ito, Keita; Uno, Shoma; Goto, Tatsuya; Takezawa, Yoshiki; Harashima, Takuya; Morikawa, Takumi; Nishino, Satoru; Kino, Hisashi; Kiyoyama, Koji; Tanaka, Tetsu

2017-04-01

For safe electrical stimulation with body-implanted devices, the degradation of stimulus electrodes must be considered because it causes the unexpected electrolysis of water and the destruction of tissues. To monitor the charge injection property (CIP) of stimulus electrodes while these devices are implanted, we have proposed a charge injection monitoring system (CIMS). CIMS can safely read out voltages produced by a biphasic current pulse to a stimulus electrode and CIP is calculated from waveforms of the acquired voltages. In this paper, we describe a wide-range and low-power analog front-end (AFE) for CIMS that has variable gain-frequency characteristics and low-power analog-to-digital (A/D) conversion to adjust to the degradation of stimulus electrodes. The designed AFE was fabricated with 0.18 µm CMOS technology and achieved a valuable gain of 20-60 dB, an upper cutoff frequency of 0.2-10 kHz, and low-power interleaving A/D conversion. In addition, we successfully measured the CIP of stimulus electrodes for body-implanted devices using CIMS.

The design of CMOS general-purpose analog front-end circuit with tunable gain and bandwidth for biopotential signal recording systems.

PubMed

Chen, Wei-Ming; Yang, Wen-Chia; Tsai, Tzung-Yun; Chiueh, Herming; Wu, Chung-Yu

2011-01-01

In this paper an 8-channel CMOS general-purpose analog front-end (AFE) circuit with tunable gain and bandwidth for biopotential signal recording systems is presented. The proposed AFE consists of eight chopper stabilized pre-amplifiers, an 8-to-1 analog multiplexer, and a programmable gain amplifier. It can be used to sense and amplify different kinds of biopotential signals, such as electrocorticogram (ECoG), electrocardiogram (ECG) and electromyogram (EMG). The AFE chip is designed and fabricated in 0.18-μm CMOS technology. The measured maximum gain of AFE is 60.8 dB. The low cutoff frequency can achieve as low as 0.8 Hz and high cutoff frequency can be adjusted from 200 Hz to 10 kHz to suit for different kinds of biopotential signals. The measured input-referred noise is 0.9 μV(rms), with the power consumption of 18μW per channel at 1.8-V power supply. And the noise efficiency factor (NEF) is only 1.3 for pre-amplifier.

DOE Office of Scientific and Technical Information (OSTI.GOV)

Chen, K.; Chen, H.; Wu, W.

We present that in the upgrade of ATLAS experiment, the front-end electronics components are subjected to a large radiation background. Meanwhile high speed optical links are required for the data transmission between the on-detector and off-detector electronics. The GBT architecture and the Versatile Link (VL) project are designed by CERN to support the 4.8 Gbps line rate bidirectional high-speed data transmission which is called GBT link. In the ATLAS upgrade, besides the link with on-detector, the GBT link is also used between different off-detector systems. The GBTX ASIC is designed for the on-detector front-end, correspondingly for the off-detector electronics, themore » GBT architecture is implemented in Field Programmable Gate Arrays (FPGA). CERN launches the GBT-FPGA project to provide examples in different types of FPGA. In the ATLAS upgrade framework, the Front-End LInk eXchange (FELIX) system is used to interface the front end electronics of several ATLAS subsystems. The GBT link is used between them, to transfer the detector data and the timing, trigger, control and monitoring information. The trigger signal distributed in the down-link from FELIX to the front-end requires a fixed and low latency. In this paper, several optimizations on the GBT-FPGA IP core are introduced, to achieve a lower fixed latency. For FELIX, a common firmware will be used to interface different front-ends with support of both GBT modes: the forward error correction mode and the wide mode. The modified GBT-FPGA core has the ability to switch between the GBT modes without FPGA reprogramming. Finally, the system clock distribution of the multi-channel FELIX firmware is also discussed in this paper.« less

Optimization on fixed low latency implementation of the GBT core in FPGA

DOE PAGES

Chen, K.; Chen, H.; Wu, W.; ...

2017-07-11

We present that in the upgrade of ATLAS experiment, the front-end electronics components are subjected to a large radiation background. Meanwhile high speed optical links are required for the data transmission between the on-detector and off-detector electronics. The GBT architecture and the Versatile Link (VL) project are designed by CERN to support the 4.8 Gbps line rate bidirectional high-speed data transmission which is called GBT link. In the ATLAS upgrade, besides the link with on-detector, the GBT link is also used between different off-detector systems. The GBTX ASIC is designed for the on-detector front-end, correspondingly for the off-detector electronics, themore » GBT architecture is implemented in Field Programmable Gate Arrays (FPGA). CERN launches the GBT-FPGA project to provide examples in different types of FPGA. In the ATLAS upgrade framework, the Front-End LInk eXchange (FELIX) system is used to interface the front end electronics of several ATLAS subsystems. The GBT link is used between them, to transfer the detector data and the timing, trigger, control and monitoring information. The trigger signal distributed in the down-link from FELIX to the front-end requires a fixed and low latency. In this paper, several optimizations on the GBT-FPGA IP core are introduced, to achieve a lower fixed latency. For FELIX, a common firmware will be used to interface different front-ends with support of both GBT modes: the forward error correction mode and the wide mode. The modified GBT-FPGA core has the ability to switch between the GBT modes without FPGA reprogramming. Finally, the system clock distribution of the multi-channel FELIX firmware is also discussed in this paper.« less

Optimization on fixed low latency implementation of the GBT core in FPGA

NASA Astrophysics Data System (ADS)

Chen, K.; Chen, H.; Wu, W.; Xu, H.; Yao, L.

2017-07-01

In the upgrade of ATLAS experiment [1], the front-end electronics components are subjected to a large radiation background. Meanwhile high speed optical links are required for the data transmission between the on-detector and off-detector electronics. The GBT architecture and the Versatile Link (VL) project are designed by CERN to support the 4.8 Gbps line rate bidirectional high-speed data transmission which is called GBT link [2]. In the ATLAS upgrade, besides the link with on-detector, the GBT link is also used between different off-detector systems. The GBTX ASIC is designed for the on-detector front-end, correspondingly for the off-detector electronics, the GBT architecture is implemented in Field Programmable Gate Arrays (FPGA). CERN launches the GBT-FPGA project to provide examples in different types of FPGA [3]. In the ATLAS upgrade framework, the Front-End LInk eXchange (FELIX) system [4, 5] is used to interface the front-end electronics of several ATLAS subsystems. The GBT link is used between them, to transfer the detector data and the timing, trigger, control and monitoring information. The trigger signal distributed in the down-link from FELIX to the front-end requires a fixed and low latency. In this paper, several optimizations on the GBT-FPGA IP core are introduced, to achieve a lower fixed latency. For FELIX, a common firmware will be used to interface different front-ends with support of both GBT modes: the forward error correction mode and the wide mode. The modified GBT-FPGA core has the ability to switch between the GBT modes without FPGA reprogramming. The system clock distribution of the multi-channel FELIX firmware is also discussed in this paper.

Design of a wideband CMOS impedance spectroscopy ASIC analog front-end for multichannel biosensor interfaces.

PubMed

Valente, Virgilio; Dai Jiang; Demosthenous, Andreas

2015-08-01

This paper presents the preliminary design and simulation of a flexible and programmable analog front-end (AFE) circuit with current and voltage readout capabilities for electric impedance spectroscopy (EIS). The AFE is part of a fully integrated multifrequency EIS platform. The current readout comprises of a transimpedance stage and an automatic gain control (AGC) unit designed to accommodate impedance changes larger than 3 order of magnitude. The AGC is based on a dynamic peak detector that tracks changes in the input current over time and regulates the gain of a programmable gain amplifier in order to optimise the signal-to-noise ratio. The system works up to 1 MHz. The voltage readout consists of a 2 stages of fully differential current-feedback instrumentation amplifier which provide 100 dB of CMRR and a programmable gain up to 20 V/V per stage with a bandwidth in excess of 10MHz.

A low power low noise analog front end for portable healthcare system

NASA Astrophysics Data System (ADS)

Yanchao, Wang; Keren, Ke; Wenhui, Qin; Yajie, Qin; Ting, Yi; Zhiliang, Hong

2015-10-01

The presented analog front end (AFE) used to process human bio-signals consists of chopping instrument amplifier (IA), chopping spikes filter and programmable gain and bandwidth amplifier. The capacitor-coupling input of AFE can reject the DC electrode offset. The power consumption of current-feedback based IA is reduced by adopting capacitor divider in the input and feedback network. Besides, IA's input thermal noise is decreased by utilizing complementary CMOS input pairs which can offer higher transconductance. Fabricated in Global Foundry 0.35 μm CMOS technology, the chip consumes 3.96 μA from 3.3 V supply. The measured input noise is 0.85 μVrms (0.5-100 Hz) and the achieved noise efficient factor is 6.48. Project supported by the Science and Technology Commission of Shanghai Municipality (No. 13511501100), the State Key Laboratory Project of China (No. 11MS002), and the State Key Laboratory of ASIC & System, Fudan University.

Development of a dedicated readout ASIC for TPC based X-ray polarimeter

NASA Astrophysics Data System (ADS)

Zhang, Hongyan; Deng, Zhi; Li, Hong; Liu, Yinong; Feng, Hua

2016-07-01

X-ray polarimetry with time projection chambers was firstly proposed by JK Black in 2007 and has been greatly developed since then. It measured two dimensional photoelectron tracks with one dimensional strip and the other dimension was estimated by the drift time from the signal waveforms. A readout ASIC, APV25, originally developed for CMS silicon trackers was used and has shown some limitations such as waveform sampling depth. A dedicated ASIC was developed for TPC based X-ray polarimeters in this paper. It integrated 32 channel circuits and each channel consisted of an analog front-end and a waveform sampler based on switched capacitor array. The analog front-end has a charge sensitive preamplifier with a gain of 25 mV/fC, a CR-RC shaper with a peaking time of 25 ns, a baseline holder and a discriminator for self-triggering. The SCA has a buffer latency of 3.2 μs with 64 cells operating at 20 MSPS. The ASIC was fabricated in a 0.18 μm CMOS process. The equivalent noise charge (ENC) of the analog front-end was measured to be 274.8 e+34.6 e/pF. The effective resolution of the SCA was 8.8 bits at sampling rate up to 50 MSPS. The total power consumption was 2.8 mW per channel. The ASIC was also tested with real TPC detectors and two dimensional photoelectron tracks have been successfully acquired. More tests and analysis on the sensitivity to the polarimetry are undergoing and will be presented in this paper.

Signal-processing theory for the TurboRogue receiver

NASA Technical Reports Server (NTRS)

Thomas, J. B.

1995-01-01

Signal-processing theory for the TurboRogue receiver is presented. The signal form is traced from its formation at the GPS satellite, to the receiver antenna, and then through the various stages of the receiver, including extraction of phase and delay. The analysis treats the effects of ionosphere, troposphere, signal quantization, receiver components, and system noise, covering processing in both the 'code mode' when the P code is not encrypted and in the 'P-codeless mode' when the P code is encrypted. As a possible future improvement to the current analog front end, an example of a highly digital front end is analyzed.

The Front Line.

ERIC Educational Resources Information Center

Unks, Gerald

1979-01-01

The author draws an analogy between today's school system and an assembly line, deploring the notion that all children are taught the same thing at the same time, ending in humiliation, disgrace, and failure for some, and nonchallenging academic activities for others. (KC)

Electro-optical detector for use in a wide mass range mass spectrometer

NASA Technical Reports Server (NTRS)

Giffin, Charles E. (Inventor)

1976-01-01

An electro-optical detector is disclosed for use in a wide mass range mass spectrometer (MS), in the latter the focal plane is at or very near the exit end of the magnetic analyzer, so that a strong magnetic field of the order of 1000G or more is present at the focal plane location. The novel detector includes a microchannel electron multiplier array (MCA) which is positioned at the focal plane to convert ion beams which are focused by the MS at the focal plane into corresponding electron beams which are then accelerated to form visual images on a conductive phosphored surface. These visual images are then converted into images on the target of a vidicon camera or the like for electronic processing. Due to the strong magnetic field at the focal plane, in one embodiment of the invention, the MCA with front and back parallel ends is placed so that its front end forms an angle of not less than several degrees, preferably on the order of 10.degree.-20.degree., with respect to the focal plane, with the center line of the front end preferably located in the focal plane. In another embodiment the MCA is wedge-shaped, with its back end at an angle of about 10.degree.-20.degree. with respect to the front end. In this embodiment the MCA is placed so that its front end is located at the focal plane.

FELIX: a PCIe based high-throughput approach for interfacing front-end and trigger electronics in the ATLAS Upgrade framework

DOE Office of Scientific and Technical Information (OSTI.GOV)

Anderson, J.; Bauer, K.; Borga, A.

The ATLAS Phase-I upgrade (2019) requires a Trigger and Data Acquisition (TDAQ) system able to trigger and record data from up to three times the nominal LHC instantaneous luminosity. Furthermore, the Front-End LInk eXchange (FELIX) system provides an infrastructure to achieve this in a scalable, detector agnostic and easily upgradeable way. It is a PC-based gateway, interfacing custom radiation tolerant optical links from front-end electronics, via PCIe Gen3 cards, to a commodity switched Ethernet or InfiniBand network. FELIX enables reducing custom electronics in favour of software running on commercial servers. Here, the FELIX system, the design of the PCIe prototypemore » card and the integration test results are presented.« less

FELIX: a PCIe based high-throughput approach for interfacing front-end and trigger electronics in the ATLAS Upgrade framework

DOE PAGES

Anderson, J.; Bauer, K.; Borga, A.; ...

2016-12-13

The ATLAS Phase-I upgrade (2019) requires a Trigger and Data Acquisition (TDAQ) system able to trigger and record data from up to three times the nominal LHC instantaneous luminosity. Furthermore, the Front-End LInk eXchange (FELIX) system provides an infrastructure to achieve this in a scalable, detector agnostic and easily upgradeable way. It is a PC-based gateway, interfacing custom radiation tolerant optical links from front-end electronics, via PCIe Gen3 cards, to a commodity switched Ethernet or InfiniBand network. FELIX enables reducing custom electronics in favour of software running on commercial servers. Here, the FELIX system, the design of the PCIe prototypemore » card and the integration test results are presented.« less

A low power, low noise Programmable Analog Front End (PAFE) for biopotential measurements.

PubMed

Adimulam, Mahesh Kumar; Divya, A; Tejaswi, K; Srinivas, M B

2017-07-01

A low power Programmable Analog Front End (PAFE) for biopotential measurements is presented in this paper. The PAFE circuit processes electrocardiogram (ECG), electromyography (EMG) and electroencephalogram (EEG) signals with higher accuracy. It consists mainly of improved transconductance programmable gain instrumentational amplifier (PGIA), programmable high pass filter (PHPF), and second order low pass filter (SLPF). A 15-bit programmable 5-stage successive approximation analog-to-digital converter (SAR-ADC) is implemented for improving the performance, whose power consumption is reduced due to multiple stages and by OTA/Comparator sharing technique between the stages. The power consumption is further reduced by operating the analog portion of PAFE on 0.5V supply voltage and digital portion on 0.3V supply voltage generated internally through a voltage regulator. The proposed low power PAFE has been fabricated in 180nm standard CMOS process. The performance parameters of PAFE in 15-bit mode are found to be, gain of 31-70 dB, input referred noise of 1.15 μVrms, CMRR of 110 dB, PSRR of 104 dB, and signal-to-noise distortion ratio (SNDR) of 83.5dB. The power consumption of the design is 1.1 μW @ 0.5 V supply voltage and it occupies a core silicon area of 1.2 mm 2 .

Readout ASICs and Electronics for the 144-channel HAPDs for the Aerogel RICH at Belle II

NASA Astrophysics Data System (ADS)

Nishida, S.; Adachi, I.; Ikeda, H.; Hara, K.; Iijima, T.; Iwata, S.; Korpar, S.; Križan, P.; Kuroda, E.; Pestotnik, R.; Seljak, A.; Sumiyoshi, T.; Takagaki, H.

The particle identification (PID) device in the endcap of the Belle detector will be upgraded to a ring imaging Cherenkov counter (RICH) using aerogel as a radiator at the Belle II experiment. We develop the electronics to read out the 70,000 channels of hit information from the 144-channel hybrid avalanche photodetectors (HAPD), of the aerogel RICH detector. A readout ASIC is developed to digitize the HAPD signals, and was used in a beam test with the prototype detector. The performance and plan of the ASIC is reported in this study. We have also designed the readout electronics for the aerogel RICH, which consist of front-end boards with the ASICs merger boards to collect data from the front-end boards. A front-end board that fits in the actual available space for the aerogel RICH electronics was produced.

Readout electronics for LGAD sensors

NASA Astrophysics Data System (ADS)

Alonso, O.; Franch, N.; Canals, J.; Palacio, F.; López, M.; Vilà, A.; Diéguez, A.; Carulla, M.; Flores, D.; Hidalgo, S.; Merlos, A.; Pellegrini, G.; Quirion, D.

2017-02-01

In this paper, an ASIC fabricated in 180 nm CMOS technology from AMS with the very front-end electronics used to readout LGAD sensors is presented as well as its experimental results. The front-end has the typical architecture for Si-strip readout, i.e., preamplification stage with a Charge Sensitive Amplifier (CSA) followed by a CR-RC shaper. Both amplifiers are based on a folded cascode structure with a PMOS input transistor and the shaper only uses passive elements for the feedback stage. The CSA has programmable gain and a configurable input stage in order to adapt to the different input capacitance of the LGAD sensors (pixelated, short and long strips) and to the different input signal (depending on the gain of the LGAD). The fabricated prototype has an area of 0.865 mm × 0.965 mm and includes the biasing circuit for the CSA and the shaper, 4 analog channels (CSA+shaper) and programmable charge injection circuits included for testing purposes. Noise and power analysis performed during simulation fixed the size of the input transistor to W/L = 860 μm/0.2 μm. The shaping time is fixed by design at 1 us and, in this ASIC version, the feedback elements of the shaper are passive, which means that the area of the shaper can be reduced using active elements in future versions. Finally, the different gains of the CSA have been selected to maintain an ENC below 400 electrons for a detector capacitor of 20 pF, with a power consumption of 150 μ W per channel.

Signal Digitizer and Cross-Correlation Application Specific Integrated Circuit

NASA Technical Reports Server (NTRS)

Baranauskas, Gytis (Inventor); Lim, Boon H. (Inventor); Baranauskas, Dalius (Inventor); Zelenin, Denis (Inventor); Kangaslahti, Pekka (Inventor); Tanner, Alan B. (Inventor)

2017-01-01

According to one embodiment, a cross-correlator comprises a plurality of analog front ends (AFEs), a cross-correlation circuit and a data serializer. Each of the AFEs comprises a variable gain amplifier (VGA) and a corresponding analog-to-digital converter (ADC) in which the VGA receives and modifies a unique analog signal associates with a measured analog radio frequency (RF) signal and the ADC produces digital data associated with the modified analog signal. Communicatively coupled to the AFEs, the cross-correlation circuit performs a cross-correlation operation on the digital data produced from different measured analog RF signals. The data serializer is communicatively coupled to the summing and cross-correlating matrix and continuously outputs a prescribed amount of the correlated digital data.

The new front-end electronics for the ATLAS Tile Calorimeter Phase 2 Upgrade

NASA Astrophysics Data System (ADS)

Gomes, A.

2016-02-01

We present the plans, design, and performance results to date for the new front-end electronics being developed for the Phase 2 Upgrade of the ATLAS Tile Calorimeter. The front-end electronics will be replaced to address the increased luminosity at the HL-LHC around 2025, as well as to upgrade to faster, more modern components with higher radiation tolerance. The new electronics will operate dead-timelessly, pushing full data sets from each beam crossing to the data acquisition system that resides off-detector. The new on-detector electronics contains five main parts: the front-end boards that connect directly to the photomultiplier tubes; the Main Boards that digitize the data; the Daughter Boards that collect the data streams and contain the high speed optical communication links for writing data to the data acquisition system; a programmable high voltage control system; and a new low voltage power supply. There are different options for implementing these subcomponents, which will be described. The new system contains new features that in the current version include power system redundancy, data collection redundancy, data transmission redundancy with 2 QSFP optical transceivers and Kintex-7 FPGAs with firmware enhanced scheme for single event upset mitigation. To date, we have built a Demonstrator—a fully functional prototype of the new system. Performance results and plans are presented.

A dual slope charge sampling analog front-end for a wireless neural recording system.

PubMed

Lee, Seung Bae; Lee, Byunghun; Gosselin, Benoit; Ghovanloo, Maysam

2014-01-01

This paper presents a novel dual slope charge sampling (DSCS) analog front-end (AFE) architecture, which amplifies neural signals by taking advantage of the charge sampling concept for analog signal conditioning, such as amplification and filtering. The presented DSCS-AFE achieves amplification, filtering, and sampling in a simultaneous fashion, while consuming very small amount of power. The output of the DSCS-AFE produces a pulse width modulated (PWM) signal that is proportional to the input voltage amplitude. A circular shift register (CSR) utilizes time division multiplexing (TDM) of the PWM pulses to create a pseudo-digital TDM-PWM signal that can feed a wireless transmitter. The 8-channel system-on-a-chip was fabricated in a 0.35-μm CMOS process, occupying 2.4 × 2.1 mm(2) and consuming 255 μW from a 1.8V supply. Measured input-referred noise for the entire system, including the FPGA in order to recover PWM signal is 6.50 μV(rms) in the 288 Hz~10 kHz range. For each channel, sampling rate is 31.25 kHz, and power consumption is 31.8 μW.

A Dual Slope Charge Sampling Analog Front-End for a Wireless Neural Recording System

PubMed Central

Lee, Seung Bae; Lee, Byunghun; Gosselin, Benoit

2015-01-01

This paper presents a novel dual slope charge sampling (DSCS) analog front-end (AFE) architecture, which amplifies neural signals by taking advantage of the charge sampling concept for analog signal conditioning, such as amplification and filtering. The presented DSCS-AFE achieves amplification, filtering, and sampling in a simultaneous fashion, while consuming very small amount of power. The output of the DSCS-AFE produces a pulse width modulated (PWM) signal that is proportional to the input voltage amplitude. A circular shift register (CSR) utilizes time division multiplexing (TDM) of the PWM pulses to create a pseudo-digital TDM-PWM signal that can feed a wireless transmitter. The 8-channel system-on-a-chip was fabricated in a 0.35-µm CMOS process, occupying 2.4 × 2.1 mm2 and consuming 255 µW from a 1.8V supply. Measured input-referred noise for the entire system, including the FPGA in order to recover PWM signal is 6.50 µVrms in the 288 Hz~10 kHz range. For each channel, sampling rate is 31.25 kHz, and power consumption is 31.8 µW. PMID:25570655

Design and implementation of the ATLAS TRT front end electronics

NASA Astrophysics Data System (ADS)

Newcomer, Mitch; Atlas TRT Collaboration

2006-07-01

The ATLAS TRT subsystem is comprised of 380,000 4 mm straw tube sensors ranging in length from 30 to 80 cm. Polypropelene plastic layers between straws and a xenon-based gas mixture in the straws allow the straws to be used for both tracking and transition radiation detection. Detector-mounted electronics with data sparsification was chosen to minimize the cable plant inside the super-conducting solenoid of the ATLAS inner tracker. The "on detector" environment required a small footprint, low noise, low power and radiation-tolerant readout capable of triggering at rates up to 20 MHz with an analog signal dynamic range of >300 times the discriminator setting. For tracking, a position resolution better than 150 μm requires leading edge trigger timing with ˜1 ns precision and for transition radiation detection, a charge collection time long enough to integrate the direct and reflected signal from the unterminated straw tube is needed for position-independent energy measurement. These goals have been achieved employing two custom Application-specific integrated circuits (ASICS) and board design techniques that successfully separate analog and digital functionality while providing an integral part of the straw tube shielding.

ePix: a class of architectures for second generation LCLS cameras

DOE PAGES

Dragone, A.; Caragiulo, P.; Markovic, B.; ...

2014-03-31

ePix is a novel class of ASIC architectures, based on a common platform, optimized to build modular scalable detectors for LCLS. The platform architecture is composed of a random access analog matrix of pixel with global shutter, fast parallel column readout, and dedicated sigma-delta analog-to-digital converters per column. It also implements a dedicated control interface and all the required support electronics to perform configuration, calibration and readout of the matrix. Based on this platform a class of front-end ASICs and several camera modules, meeting different requirements, can be developed by designing specific pixel architectures. This approach reduces development time andmore » expands the possibility of integration of detector modules with different size, shape or functionality in the same camera. The ePix platform is currently under development together with the first two integrating pixel architectures: ePix100 dedicated to ultra low noise applications and ePix10k for high dynamic range applications.« less

45 Gb/s low complexity optical front-end for soft-decision LDPC decoders.

PubMed

Sakib, Meer Nazmus; Moayedi, Monireh; Gross, Warren J; Liboiron-Ladouceur, Odile

2012-07-30

In this paper a low complexity and energy efficient 45 Gb/s soft-decision optical front-end to be used with soft-decision low-density parity-check (LDPC) decoders is demonstrated. The results show that the optical front-end exhibits a net coding gain of 7.06 and 9.62 dB for post forward error correction bit error rate of 10(-7) and 10(-12) for long block length LDPC(32768,26803) code. The performance over a hard decision front-end is 1.9 dB for this code. It is shown that the soft-decision circuit can also be used as a 2-bit flash type analog-to-digital converter (ADC), in conjunction with equalization schemes. At bit rate of 15 Gb/s using RS(255,239), LDPC(672,336), (672, 504), (672, 588), and (1440, 1344) used with a 6-tap finite impulse response (FIR) equalizer will result in optical power savings of 3, 5, 7, 9.5 and 10.5 dB, respectively. The 2-bit flash ADC consumes only 2.71 W at 32 GSamples/s. At 45 GSamples/s the power consumption is estimated to be 4.95 W.

The PC Connection Part II.

ERIC Educational Resources Information Center

Dessy, Raymond E., Ed.

1986-01-01

Discusses topics involved in the selection of an analog-to-digital (ADC) converter and associated front-end signal conditioning hardware. Reviews what types of ADC's are available, best type for particular application, conversion rates, amplification, filtering, noise, and compatibility issues. Suggests purchase strategy and supplies names and…

An integrated multichannel neural recording analog front-end ASIC with area-efficient driven right leg circuit.

PubMed

Tao Tang; Wang Ling Goh; Lei Yao; Jia Hao Cheong; Yuan Gao

2017-07-01

This paper describes an integrated multichannel neural recording analog front end (AFE) with a novel area-efficient driven right leg (DRL) circuit to improve the system common mode rejection ratio (CMRR). The proposed AFE consists of an AC-coupled low-noise programmable-gain amplifier, an area-efficient DRL block and a 10-bit SAR ADC. Compared to conventional DRL circuit, the proposed capacitor-less DRL design achieves 90% chip area reduction with enhanced CMRR performance, making it ideal for multichannel biomedical recording applications. The AFE circuit has been designed in a standard 0.18-μm CMOS process. Post-layout simulation results show that the AFE provides two gain settings of 54dB/60dB while consuming 1 μA per channel under a supply voltage of 1 V. The input-referred noise of the AFE integrated from 1 Hz to 10k Hz is only 4 μVrms and the CMRR is 110 dB.

S-Band POSIX Device Drivers for RTEMS

NASA Technical Reports Server (NTRS)

Lux, James P.; Lang, Minh; Peters, Kenneth J.; Taylor, Gregory H.

2011-01-01

This is a set of POSIX device driver level abstractions in the RTEMS RTOS (Real-Time Executive for Multiprocessor Systems real-time operating system) to SBand radio hardware devices that have been instantiated in an FPGA (field-programmable gate array). These include A/D (analog-to-digital) sample capture, D/A (digital-to-analog) sample playback, PLL (phase-locked-loop) tuning, and PWM (pulse-width-modulation)-controlled gain. This software interfaces to Sband radio hardware in an attached Xilinx Virtex-2 FPGA. It uses plug-and-play device discovery to map memory to device IDs. Instead of interacting with hardware devices directly, using direct-memory mapped access at the application level, this driver provides an application programming interface (API) offering that easily uses standard POSIX function calls. This simplifies application programming, enables portability, and offers an additional level of protection to the hardware. There are three separate device drivers included in this package: sband_device (ADC capture and DAC playback), pll_device (RF front end PLL tuning), and pwm_device (RF front end AGC control).

Realization of the electrical Sentinel 4 detector integration

NASA Astrophysics Data System (ADS)

Hermsen, M.; Hohn, R.; Skegg, M.; Woffinden, C.; Reulke, R.

2017-09-01

The detectors of the Sentinel 4 multi spectral imager are operated in flight at 215K while the analog electronics is operated at ambient temperature. The detector is cooled by means of a radiator. For thermal reasons no active component has been allowed in the cooled area closest to the detector as the passive radiator is restricted in its size. For thermal decoupling of detector and electronics a long distance between detector and electronics is considered ideal as thermal conductivity decreases with the length of the connection. In contradiction a short connection between detector and electronics is ideal for the electronic signals. Only a short connection ensures the signal integrity of both the weak detector output signal but similarly also the clock signals for driving the detector. From a mechanical and thermal point of view the connection requires a certain minimum length. The selected solution serves all these needs but had to approach the limits of what is electrically, mechanically and thermally feasible. In addition, shielding from internal (self distortion) and external distorting signals has to be realized for the connection between FEE(Front End Electronics) and detectors. At the time of the design of the flex it was not defined whether the mechanical structure between FEE and FPA (Focal Plane Assembly) would act as a shielding structure. The physical separation between CCD detector and the Front-end Electronics, the adverse EMI environment in which the instrument will be operated in (the location of the instrument on the satellite is in vicinity to a down-link K-band communication antenna of the S/C) require at least the video output signals to be shielded. Both detectors (a NIR and a UVVIS detector) are sensitive to contamination and difficult to be cleaned in case of any contamination. This brings up extreme cleanliness requirements for the detector in manufacturing and assembly. Effectively the detector has to be kept in an ISO 5 environment and additionally humidity has to be avoided - which does not comply with the usual clean-room atmosphere. This paper describes how in Sentinel 4 the given challenges have been overcome, how the limited load drive capability of the detector component has been considered on a flex length of about 20 cm (7.87 in) and how EMC shielding of the highly sensitive analog signals of the detector has been realized. Also covered are design/manufacturing aspects and a glance on testing results is provided

Passive front-ends for wideband millimeter wave electronic warfare

NASA Astrophysics Data System (ADS)

Jastram, Nathan Joseph

This thesis presents the analysis, design and measurements of novel passive front ends of interest to millimeter wave electronic warfare systems. However, emerging threats in the millimeter waves (18 GHz and above) has led to a push for new systems capable of addressing these threats. At these frequencies, traditional techniques of design and fabrication are challenging due to small size, limited bandwidth and losses. The use of surface micromachining technology for wideband direction finding with multiple element antenna arrays for electronic support is demonstrated. A wideband tapered slot antenna is first designed and measured as an array element for the subsequent arrays. Both 18--36 GHz and 75--110 GHz amplitude only and amplitude/phase two element direction finding front ends are designed and measured. The design of arrays using Butler matrix and Rotman lens beamformers for greater than two element direction finding over W band and beyond using is also presented. The design of a dual polarized high power capable front end for electronic attack over an 18--45 GHz band is presented. To combine two polarizations into the same radiating aperture, an orthomode transducer (OMT) based upon a new double ridge waveguide cross section is developed. To provide greater flexibility in needed performance characteristics, several different turnstile junction matching sections are tested. A modular horn section is proposed to address flexible and ever changing operational requirements, and is designed for performance criteria such as constant gain, beamwidth, etc. A multi-section branch guide coupler and low loss Rotman lens based upon the proposed cross section are also developed. Prototyping methods for the herein designed millimeter wave electronic warfare front ends are investigated. Specifically, both printed circuit board (PCB) prototyping of micromachined systems and 3D printing of conventionally machined horns are presented. A 4--8 GHz two element array with integrated beamformer fabricated using the stacking of PCB boards is shown, and measured results compare favorably with the micromachined front ends. A 3D printed small aperture horn is compared with a conventionally machined horn, and measured results show similar performance with a ten-fold reduction in cost and weight.

All-Dielectric Photonic-Assisted Radio Front-End Technology

NASA Astrophysics Data System (ADS)

Ayazi, Hossein Ali

The threats to civil society posed by high-power electromagnetic weapons are viewed as a grim but real possibility in the world after 11 September 2001. These weapons produce a power surge capable of destroying or damaging sensitive circuitry in electronic systems. Unfortunately, the trend towards circuits with smaller sizes and voltages renders modern electronics highly susceptible to such damage. Radiofrequency communication systems are particularly vulnerable, because the antenna provides a direct port of entry for electromagnetic radiation. In this work, we present a novel type of radiofrequency receiver front end featuring a complete absence of electronic circuitry and metal interconnects, the traditional 'soft spots' of a conventional radiofrequency receiver. The device exploits a dielectric resonator antenna to capture and deliver the radiofrequency signal onto a whispering-gallery mode electro-optic field sensor. The dielectric approach has an added benefit in that it reduces the physical size of the front end, an important benefit in mobile applications.

Method of multi-channel data readout and acquisition

DOEpatents

Degtiarenko, Pavel V.; Popov, Vladimir E.

2010-06-15

A method for dealing with the problem of simultaneous continuous readout of large number of data channels from the set of multiple sensors in instances where the use of multiple amplitude-to-digital converters is not practical or causes undesirable extra noise and distortion in the data. The new method uses sensor front-end s and subsequent electronics to transform the analog input signals and encode them into a series of short pulses that can be transmitted to a long distance via a high frequency transmission line without information loss. Upon arrival at a destination data decoder and analyzer device, the series of short pulses can be decoded and transformed back, to obtain, store, and utilize the sensor information with the required accuracy.

Design of the front end electronics for the infrared camera of JEM-EUSO, and manufacturing and verification of the prototype model

NASA Astrophysics Data System (ADS)

Maroto, Oscar; Diez-Merino, Laura; Carbonell, Jordi; Tomàs, Albert; Reyes, Marcos; Joven-Alvarez, Enrique; Martín, Yolanda; Morales de los Ríos, J. A.; del Peral, Luis; Rodríguez-Frías, M. D.

2014-07-01

The Japanese Experiment Module (JEM) Extreme Universe Space Observatory (EUSO) will be launched and attached to the Japanese module of the International Space Station (ISS). Its aim is to observe UV photon tracks produced by ultra-high energy cosmic rays developing in the atmosphere and producing extensive air showers. The key element of the instrument is a very wide-field, very fast, large-lense telescope that can detect extreme energy particles with energy above 1019 eV. The Atmospheric Monitoring System (AMS), comprising, among others, the Infrared Camera (IRCAM), which is the Spanish contribution, plays a fundamental role in the understanding of the atmospheric conditions in the Field of View (FoV) of the telescope. It is used to detect the temperature of clouds and to obtain the cloud coverage and cloud top altitude during the observation period of the JEM-EUSO main instrument. SENER is responsible for the preliminary design of the Front End Electronics (FEE) of the Infrared Camera, based on an uncooled microbolometer, and the manufacturing and verification of the prototype model. This paper describes the flight design drivers and key factors to achieve the target features, namely, detector biasing with electrical noise better than 100μV from 1Hz to 10MHz, temperature control of the microbolometer, from 10°C to 40°C with stability better than 10mK over 4.8hours, low noise high bandwidth amplifier adaptation of the microbolometer output to differential input before analog to digital conversion, housekeeping generation, microbolometer control, and image accumulation for noise reduction. It also shows the modifications implemented in the FEE prototype design to perform a trade-off of different technologies, such as the convenience of using linear or switched regulation for the temperature control, the possibility to check the camera performances when both microbolometer and analog electronics are moved further away from the power and digital electronics, and the addition of switching regulators to demonstrate the design is immune to the electrical noise the switching converters introduce. Finally, the results obtained during the verification phase are presented: FEE limitations, verification results, including FEE noise for each channel and its equivalent NETD and microbolometer temperature stability achieved, technologies trade-off, lessons learnt, and design improvement to implement in future project phases.

Integrated front-end electronics in a detector compatible process: source-follower and charge-sensitive preamplifier configurations

NASA Astrophysics Data System (ADS)

Ratti, Lodovico; Manghisoni, Massimo; Re, Valerio; Speziali, Valeria

2001-12-01

This study is concerned with the simulation and design of low-noise front-end electronics monolithically integrated on the same high-resistivity substrate as multielectrode silicon detectors, in a process made available by the Istituto per la Ricerca Scientifica e Tecnologica (ITC-IRST) of Trento, Italy. The integrated front-end solutions described in this paper use N-channel JFETs as basic elements. The first one is based upon an all-NJFET charge preamplifier designed to match detector capacitances of a few picofarads and available in both a resistive and a non resistive feedback configuration. In the second solution, a single NJFET in the source-follower configuration is connected to the detector, while its source is wired to an external readout channel through an integrated capacitor.

Architecture of PAU survey camera readout electronics

NASA Astrophysics Data System (ADS)

Castilla, Javier; Cardiel-Sas, Laia; De Vicente, Juan; Illa, Joseph; Jimenez, Jorge; Maiorino, Marino; Martinez, Gustavo

2012-07-01

PAUCam is a new camera for studying the physics of the accelerating universe. The camera will consist of eighteen 2Kx4K HPK CCDs: sixteen for science and two for guiding. The camera will be installed at the prime focus of the WHT (William Herschel Telescope). In this contribution, the architecture of the readout electronics system is presented. Back- End and Front-End electronics are described. Back-End consists of clock, bias and video processing boards, mounted on Monsoon crates. The Front-End is based on patch panel boards. These boards are plugged outside the camera feed-through panel for signal distribution. Inside the camera, individual preamplifier boards plus kapton cable completes the path to connect to each CCD. The overall signal distribution and grounding scheme is shown in this paper.

Modeling and analysis of hybrid pixel detector deficiencies for scientific applications

NASA Astrophysics Data System (ADS)

Fahim, Farah; Deptuch, Grzegorz W.; Hoff, James R.; Mohseni, Hooman

2015-08-01

Semiconductor hybrid pixel detectors often consist of a pixellated sensor layer bump bonded to a matching pixelated readout integrated circuit (ROIC). The sensor can range from high resistivity Si to III-V materials, whereas a Si CMOS process is typically used to manufacture the ROIC. Independent, device physics and electronic design automation (EDA) tools are used to determine sensor characteristics and verify functional performance of ROICs respectively with significantly different solvers. Some physics solvers provide the capability of transferring data to the EDA tool. However, single pixel transient simulations are either not feasible due to convergence difficulties or are prohibitively long. A simplified sensor model, which includes a current pulse in parallel with detector equivalent capacitor, is often used; even then, spice type top-level (entire array) simulations range from days to weeks. In order to analyze detector deficiencies for a particular scientific application, accurately defined transient behavioral models of all the functional blocks are required. Furthermore, various simulations, such as transient, noise, Monte Carlo, inter-pixel effects, etc. of the entire array need to be performed within a reasonable time frame without trading off accuracy. The sensor and the analog front-end can be modeling using a real number modeling language, as complex mathematical functions or detailed data can be saved to text files, for further top-level digital simulations. Parasitically aware digital timing is extracted in a standard delay format (sdf) from the pixel digital back-end layout as well as the periphery of the ROIC. For any given input, detector level worst-case and best-case simulations are performed using a Verilog simulation environment to determine the output. Each top-level transient simulation takes no more than 10-15 minutes. The impact of changing key parameters such as sensor Poissonian shot noise, analog front-end bandwidth, jitter due to clock distribution etc. can be accurately analyzed to determine ROIC architectural viability and bottlenecks. Hence the impact of the detector parameters on the scientific application can be studied.

DOE Office of Scientific and Technical Information (OSTI.GOV)

Fahim, Farah; Deptuch, Grzegorz W.; Hoff, James R.

Semiconductor hybrid pixel detectors often consist of a pixellated sensor layer bump bonded to a matching pixelated readout integrated circuit (ROIC). The sensor can range from high resistivity Si to III-V materials, whereas a Si CMOS process is typically used to manufacture the ROIC. Independent, device physics and electronic design automation (EDA) tools are used to determine sensor characteristics and verify functional performance of ROICs respectively with significantly different solvers. Some physics solvers provide the capability of transferring data to the EDA tool. However, single pixel transient simulations are either not feasible due to convergence difficulties or are prohibitively long.more » A simplified sensor model, which includes a current pulse in parallel with detector equivalent capacitor, is often used; even then, spice type top-level (entire array) simulations range from days to weeks. In order to analyze detector deficiencies for a particular scientific application, accurately defined transient behavioral models of all the functional blocks are required. Furthermore, various simulations, such as transient, noise, Monte Carlo, inter-pixel effects, etc. of the entire array need to be performed within a reasonable time frame without trading off accuracy. The sensor and the analog front-end can be modeling using a real number modeling language, as complex mathematical functions or detailed data can be saved to text files, for further top-level digital simulations. Parasitically aware digital timing is extracted in a standard delay format (sdf) from the pixel digital back-end layout as well as the periphery of the ROIC. For any given input, detector level worst-case and best-case simulations are performed using a Verilog simulation environment to determine the output. Each top-level transient simulation takes no more than 10-15 minutes. The impact of changing key parameters such as sensor Poissonian shot noise, analog front-end bandwidth, jitter due to clock distribution etc. can be accurately analyzed to determine ROIC architectural viability and bottlenecks. Hence the impact of the detector parameters on the scientific application can be studied.« less

Web-based DAQ systems: connecting the user and electronics front-ends

NASA Astrophysics Data System (ADS)

Lenzi, Thomas

2016-12-01

Web technologies are quickly evolving and are gaining in computational power and flexibility, allowing for a paradigm shift in the field of Data Acquisition (DAQ) systems design. Modern web browsers offer the possibility to create intricate user interfaces and are able to process and render complex data. Furthermore, new web standards such as WebSockets allow for fast real-time communication between the server and the user with minimal overhead. Those improvements make it possible to move the control and monitoring operations from the back-end servers directly to the user and to the front-end electronics, thus reducing the complexity of the data acquisition chain. Moreover, web-based DAQ systems offer greater flexibility, accessibility, and maintainability on the user side than traditional applications which often lack portability and ease of use. As proof of concept, we implemented a simplified DAQ system on a mid-range Spartan6 Field Programmable Gate Array (FPGA) development board coupled to a digital front-end readout chip. The system is connected to the Internet and can be accessed from any web browser. It is composed of custom code to control the front-end readout and of a dual soft-core Microblaze processor to communicate with the client.

A front-end electronic system for large arrays of bolometers

NASA Astrophysics Data System (ADS)

Arnaboldi, C.; Carniti, P.; Cassina, L.; Gotti, C.; Liu, X.; Maino, M.; Pessina, G.; Rosenfeld, C.; Zhu, B. X.

2018-02-01

CUORE is an array of thermal calorimeters composed of 988 crystals held at about 10 mK, whose absorbed energy is read out with semiconductor thermistors. The composition of the crystal is TeO2, and the aim is the study of the double beta decay of 130Te on very long and stable runs. CUPID-0 is an array of 26 Zn82Se crystals with double thermistor readout to study the double beta decay of 82Se. In the present paper, we present an overview of the entire front-end electronic readout chain, from the preamplifier to the anti-aliasing filter. This overview includes motivations, design strategies, circuit implementation and performance results of the electronic system, including other auxiliary yet important elements like power supplies and the slow control communication system. The stringent requirements of stability on the very long experimental runs that are foreseen during CUORE and CUPID-0 operation, are achieved thanks to novel solutions of the front-end preamplifier and of the detector bias circuit setup.

The OPERA muon spectrometer tracking electronics

NASA Astrophysics Data System (ADS)

Ambrosio, M.; Barichello, G.; Brugnera, R.; Carrara, E.; Consiglio, L.; Corradi, A.; Dal Corso, F.; Dusini, S.; Felici, G.; Garfagnini, A.; Manea, C.; Masone, V.; Paoloni, A.; Paoluzzi, G.; Papalino, G.; Parascandolo, P.; Sorrentino, G.; Spinetti, M.; Stanco, L.; Terranova, F.; Votano, L.

2004-11-01

The document describes the front-end electronics that instrument the spectrometer of the OPERA experiment. The spectrometer is made of two separate modules. Each module consists of 22 RPC planes equipped with horizontal and vertical strips readout for a total amount of about 25,000 digital channels. The front end electronics is self-triggered and has single plane readout capability. It is made of three different stages: the Front End Boards (FEBs) system, the Controller Boards (CBs) system and the Timing Boards (TBs) system. The FEB system provides discrimination of the strip incoming signals; a FAST OR output of the input signals is also available for trigger plane signal generation. FEBs discriminated signals are acquired by the CBs system that manages also the communication to the experiment DAQ and Slow Control interface. A Trigger Board allows to operate in both self-trigger (the FEB FAST OR signal starts the plane acquisition) or external-trigger (different conditions can be set on the OR signals generated from different planes) modes.

Design of portable electrocardiogram device using DSO138

NASA Astrophysics Data System (ADS)

Abuzairi, Tomy; Matondang, Josef Stevanus; Purnamaningsih, Retno Wigajatri; Basari, Ratnasari, Anita

2018-02-01

Cardiovascular disease has been one of the leading causes of sudden cardiac deaths in many countries, covering Indonesia. Electrocardiogram (ECG) is a medical test to detect cardiac abnormalities by measuring the electrical activity generated by the heart, as the heart contracts. By using ECG, we can observe anomaly at the time of heart abnormalities. In this paper, design of portable ECG device is presented. The portable ECG device was designed to easily use in the village clinic or houses, due to the small size device and other benefits. The device was designed by using four units: (1) ECG electrode; (2) ECG analog front-end; (3) DSO138; and (4) battery. To create a simple electrode system in the portable ECG, 1-lead ECG with two electrodes were applied. The analog front-end circuitry consists of three integrated circuits, an instrumentation amplifier AD820AN, a low noise operational amplifier OPA134, and a low offset operational amplifier TL082. Digital ECG data were transformed to graphical data on DSO138. The results show that the portable ECG is successfully read the signal from 1-lead ECG system.

A low-power high-sensitivity analog front-end for PPG sensor.

PubMed

Binghui Lin; Atef, Mohamed; Guoxing Wang

2017-07-01

This paper presents a low-power analog front-end (AFE) photoplethysmography (PPG) sensor fabricated in 0.35 μm CMOS process. The AFE amplifies the weak photocurrent from the photodiode (PD) and converts it to a strong voltage at the output. In order to decrease the power consumption, the circuits are designed in subthreshold region; so the total biasing current of the AFE is 10 μ A. Since the large input DC photocurrent is a big issue for the PPG sensing circuit, we apply a DC photocurrent rejection technique by adding a DC current-cancellation loop to reject the large DC photocurrent up to 10 μA. In addition, a pseudo resistor is used to reduce the high-pass corner frequency below 0.5 Hz and Gm-C filter is adapted to reject the out-of-band noise higher than 16 Hz. For the whole sensor, the amplifier chain can achieve a total gain of 140 dBμ and an input integrated noise current of 68.87 pA rms up to 16 Hz.

Digital Baseband Architecture For Transponder

NASA Technical Reports Server (NTRS)

Nguyen, Tien M.; Yeh, Hen-Geul

1995-01-01

Proposed advanced transponder for long-distance radio communication system with turnaround ranging contains carrier-signal-tracking loop including baseband digital "front end." For reduced cost, transponder includes analog intermediate-frequency (IF) section and analog automatic gain control (AGC) loop at first of two IF mixers. However, second IF mixer redesigned to ease digitization of baseband functions. To conserve power and provide for simpler and smaller transponder hardware, baseband digital signal-processing circuits designed to implement undersampling scheme. Furthermore, sampling scheme and sampling frequency chosen so redesign involves minimum modification of command-detector unit (CDU).

Low-power low-noise mixed-mode VLSI ASIC for infinite dynamic range imaging applications

NASA Astrophysics Data System (ADS)

Turchetta, Renato; Hu, Y.; Zinzius, Y.; Colledani, C.; Loge, A.

1998-11-01

Solid state solutions for imaging are mainly represented by CCDs and, more recently, by CMOS imagers. Both devices are based on the integration of the total charge generated by the impinging radiation, with no processing of the single photon information. The dynamic range of these devices is intrinsically limited by the finite value of noise. Here we present the design of an architecture which allows efficient, in-pixel, noise reduction to a practically zero level, thus allowing infinite dynamic range imaging. A detailed calculation of the dynamic range is worked out, showing that noise is efficiently suppressed. This architecture is based on the concept of single-photon counting. In each pixel, we integrate both the front-end, low-noise, low-power analog part and the digital part. The former consists of a charge preamplifier, an active filter for optimal noise bandwidth reduction, a buffer and a threshold comparator, and the latter is simply a counter, which can be programmed to act as a normal shift register for the readout of the counters' contents. Two different ASIC's based on this concept have been designed for different applications. The first one has been optimized for silicon edge-on microstrips detectors, used in a digital mammography R and D project. It is a 32-channel circuit, with a 16-bit binary static counter.It has been optimized for a relatively large detector capacitance of 5 pF. Noise has been measured to be equal to 100 + 7*Cd (pF) electron rms with the digital part, showing no degradation of the noise performances with respect to the design values. The power consumption is 3.8mW/channel for a peaking time of about 1 microsecond(s) . The second circuit is a prototype for pixel imaging. The total active area is about (250 micrometers )**2. The main differences of the electronic architecture with respect to the first prototype are: i) different optimization of the analog front-end part for low-capacitance detectors, ii) in- pixel 4-bit comparator-offset compensation, iii) 15-bit pseudo-random counter. The power consumption is 255 (mu) W/channel for a peaking time of 300 ns and an equivalent noise charge of 185 + 97*Cd electrons rms. Simulation and experimental result as well as imaging results will be presented.

CMOS Ultralow Power Brain Signal Acquisition Front-Ends: Design and Human Testing.

PubMed

Karimi-Bidhendi, Alireza; Malekzadeh-Arasteh, Omid; Lee, Mao-Cheng; McCrimmon, Colin M; Wang, Po T; Mahajan, Akshay; Liu, Charles Yu; Nenadic, Zoran; Do, An H; Heydari, Payam

2017-08-01

Two brain signal acquisition (BSA) front-ends incorporating two CMOS ultralow power, low-noise amplifier arrays and serializers operating in mosfet weak inversion region are presented. To boost the amplifier's gain for a given current budget, cross-coupled-pair active load topology is used in the first stages of these two amplifiers. These two BSA front-ends are fabricated in 130 and 180 nm CMOS processes, occupying 5.45 mm 2 and 0.352 mm 2 of die areas, respectively (excluding pad rings). The CMOS 130-nm amplifier array is comprised of 64 elements, where each amplifier element consumes 0.216 μW from 0.4 V supply, has input-referred noise voltage (IRNoise) of 2.19 μV[Formula: see text] corresponding to a power efficiency factor (PEF) of 11.7, and occupies 0.044 mm 2 of die area. The CMOS 180 nm amplifier array employs 4 elements, where each element consumes 0.69 μW from 0.6 V supply with IRNoise of 2.3 μV[Formula: see text] (corresponding to a PEF of 31.3) and 0.051 mm 2 of die area. Noninvasive electroencephalographic and invasive electrocorticographic signals were recorded real time directly on able-bodied human subjects, showing feasibility of using these analog front-ends for future fully implantable BSA and brain- computer interface systems.

Front-end electronics and DAQ for the EURITRACK tagged neutron inspection system

NASA Astrophysics Data System (ADS)

Lunardon, M.; Bottosso, C.; Fabris, D.; Moretto, S.; Nebbia, G.; Pesente, S.; Viesti, G.; Bigongiari, A.; Colonna, A.; Tintori, C.; Valkovic, V.; Sudac, D.; Peerani, P.; Sequeira, V.; Salvato, M.

2007-08-01

The EURopean Illicit TRAfficing Countermeasures Kit (EURITRACK) Front-End and Data Acquisition System is a compact set of VME boards interfaced with a standard PC. The system is part of a cargo container inspection portal based on the tagged neutrons technique. The front-end processes all detector signals and checks coincidences between any of the 64 pixels of the alpha particle detector and any gamma-ray signals in 22 NaI(Tl) scintillators. The system is capable of handling the data flow at neutron flux up to the portal limiting value of 108 neutrons/second. Some typical applications are presented.

The Argonne CDF Group

Science.gov Websites

calorimeter, Shower Max., Preshower, Crack Chambers (1979-present) Run II Upgrade: Front end electronics (QIE , Preshower electronics and DAQ Support for Level-2 electron and photon triggers (RECES and ISO) Deputy Head

Front-end Electronics for Unattended Measurement (FEUM). Results of Prototype Evaluation

DOE Office of Scientific and Technical Information (OSTI.GOV)

Conrad, Ryan C.; Keller, Daniel T.; Morris, Scott J.

2015-07-01

The International Atomic Energy Agency (IAEA) deploys unattended monitoring systems to provide continuous monitoring of nuclear material within safeguarded facilities around the world. As the number of unattended monitoring instruments increases, the IAEA is challenged to become more efficient in the implementation of those systems. In 2010, the IAEA initiated the Front-End Electronics for Unattended Measurement (FEUM) project with the goals of greater flexibility in the interfaces to various sensors and data acquisition systems, and improved capabilities for remotely located sensors (e.g., where sensor and front-end electronics might be separated by tens of meters). In consultation with the IAEA, amore » technical evaluation of a candidate FEUM device produced by a commercial vendor has been performed. This evaluation assessed the device against the IAEA’s original technical specifications and a broad range of important parameters that include sensor types, cable lengths and types, industrial electromagnetic noise that can degrade signals from remotely located detectors, and high radiation fields. Testing data, interpretation, findings and recommendations are provided.« less

Efficient storage, computation, and exposure of computer-generated holograms by electron-beam lithography.

PubMed

Newman, D M; Hawley, R W; Goeckel, D L; Crawford, R D; Abraham, S; Gallagher, N C

1993-05-10

An efficient storage format was developed for computer-generated holograms for use in electron-beam lithography. This method employs run-length encoding and Lempel-Ziv-Welch compression and succeeds in exposing holograms that were previously infeasible owing to the hologram's tremendous pattern-data file size. These holograms also require significant computation; thus the algorithm was implemented on a parallel computer, which improved performance by 2 orders of magnitude. The decompression algorithm was integrated into the Cambridge electron-beam machine's front-end processor.Although this provides much-needed ability, some hardware enhancements will be required in the future to overcome inadequacies in the current front-end processor that result in a lengthy exposure time.

Digital beacon receiver for ionospheric TEC measurement developed with GNU Radio

NASA Astrophysics Data System (ADS)

Yamamoto, M.

2008-11-01

A simple digital receiver named GNU Radio Beacon Receiver (GRBR) was developed for the satellite-ground beacon experiment to measure the ionospheric total electron content (TEC). The open-source software toolkit for the software defined radio, GNU Radio, is utilized to realize the basic function of the receiver and perform fast signal processing. The software is written in Python for a LINUX PC. The open-source hardware called Universal Software Radio Peripheral (USRP), which best matches the GNU Radio, is used as a front-end to acquire the satellite beacon signals of 150 and 400 MHz. The first experiment was successful as results from GRBR showed very good agreement to those from the co-located analog beacon receiver. Detailed design information and software codes are open at the URL http://www.rish.kyoto-u.ac.jp/digitalbeacon/.

System-level considerations for the front-end readout ASIC in the CBM experiment from the power supply perspective

NASA Astrophysics Data System (ADS)

Kasinski, K.; Koczon, P.; Ayet, S.; Löchner, S.; Schmidt, C. J.

2017-03-01

New fixed target experiments using high intensity beams with energy up to 10 AGeV from the SIS100 synchrotron presently being constructed at FAIR/GSI are under preparation. Most of the readout electronics and power supplies are expected to be exposed to a very high flux of nuclear reaction products and have to be radiation tolerant up to 3 MRad (TID) and sustain up to 1014/cm2 of 1 MeV neutron equivalent in their life time. Moreover, the mostly minimum ionising particles under investigation leave very little signal in the sensors. Therefore very low noise level amplitude measurements are required by the front-end electronics for effective tracking. Sensor and interconnecting micro-cable capacitance and series resistance in conjunction with intrinsic noise of the charge sensitive amplifier are dominant noise sources in the system. However, the single-ended architecture of the amplifiers employed for the charge processing channels implies a potential problem with noise contributions from power supply sources. Strict system-level constraints leave very little freedom in selecting a power supply structure optimal with respect to: power efficiency, cooling capabilities and power density on modules, but also noise injection to the front-end via the power supply lines. Design of the power supply and distribution system of the Silicon Tracking System in the CBM experiment together with details on the front-end ASICs (STS -XYTER2) and measurement results of power supply and conditioning electronics (selected DC/DC converter and LDO regulators) are presented.

LISA phasemeter development

NASA Astrophysics Data System (ADS)

Kullmann, Joachim; Bykov, Iouri; Heinzel, Gerhard; Danzmann, Karsten

The phasemeter is an essentiel component in the measuring chain of the spaceborne gravita-tional wave detector LISA. √ Our goal is to achieve a phasemeter sensitivity of 1 pm/ Hz below 1 Hz with respect to optical signals within a beatnote frequency range of 2 -20 MHz. To get there, several noise sources have to be eliminated. By choosing appropriate filters and adjusting loop gains digital operations of the FPGA-based phase lock loop do not limit the phasemeter sensitivity. One of the main front-end noise sources, the so called ADC time-jitter, is already successfully suppressed by correcting the signal of in-terest by means of a 48 MHz calibration tone. Noise hunting with respect to the analog front-end, currently the most demanding task, is on-going. Recent results will be presented.

Single event effects on the APV25 front-end chip

NASA Astrophysics Data System (ADS)

Friedl, M.; Bauer, T.; Pernicka, M.

2003-03-01

The Compact Muon Solenoid (CMS) experiment at the Large Hadron Collider at CERN will include a Silicon Strip Tracker covering a sensitive area of 206 m2. About ten million channels will be read out by APV25 front-end chips, fabricated in the 0.25 μm deep submicron process. Although permanent damage is not expected within CMS radiation levels, transient Single Event Upsets are inevitable. Moreover, localized ionization can also produce fake signals in the analog circuitry. Eight APV25 chips were exposed to a high-intensity pion beam at the Paul Scherrer Institute (Villigen/CH) to study the radiation induced effects in detail. The results, which are compatible to similar measurements performed with heavy ions, are used to predict the chip error rate at CMS.

A Combined Time Domain Impedance Probe And Plasma Wave Receiver System For Small Satellite Applications.

NASA Astrophysics Data System (ADS)

Spencer, E. A.; Clark, D. C.; Vadepu, S. K.; Patra, S.

2017-12-01

A Time Domain Impedance Probe (TDIP) measures electron density and electron neutral collision frequencies in the ionosphere. This instrument has been tested on a sounding rocket flight and is now being further developed to fly on a NASA Undergraduate Student Instrument Program (USIP) cubesat to be launched out of the ISS in 2019. Here we report on the development of a new combined TDIP and plasma wave instrument that can be used on cubesat platforms to measure local electron parameters, and also to receive or transmit electron scale waves. This combined instrument can be used to study short time and space scale phenomena in the upper ionosphere using only RF signals. The front end analog circuitry is dual-purposed to perform active or passive probing of the ambient plasma. Two dipole antennas are used, one is optimzed for impedance measurements, while the other is optimized for transmitter-receiver performance. We show our circuit realization, and initial results from laboratory measurements using the TDIP prototype modified for receiver function. We also show Finite Difference Time Domain (FDTD) simulations of an electrically long antenna immersed in a magnetized plasma used to optimize the transmitter receiver performance.

Front-end electronics for the LZ experiment

NASA Astrophysics Data System (ADS)

Morad, James; LZ Collaboration

2016-03-01

LZ is a second generation direct dark matter detection experiment with 5.6 tonnes of liquid xenon active target, which will be instrumented as a two-phase time projection chamber (TPC). The peripheral xenon outside the active TPC (``skin'') will also be instrumented. In addition, there will be a liquid scintillator based outer veto surrounding the main cryostat. All of these systems will be read out using photomultiplier tubes. I will present the designs for front-end electronics for all these systems, which have been optimized for shaping times, gains, and low noise. Preliminary results from prototype boards will also be presented.

Geostationary payload concepts for personal satellite communications

NASA Technical Reports Server (NTRS)

Benedicto, J.; Rinous, P.; Roberts, I.; Roederer, A.; Stojkovic, I.

1993-01-01

This paper reviews candidate satellite payload architectures for systems providing world-wide communication services to mobile users equipped with hand-held terminals based on large geostationary satellites. There are a number of problems related to the payload architecture, on-board routing and beamforming, and the design of the S-band Tx and L-band Rx antenna and front ends. A number of solutions are outlined, based on trade-offs with respect to the most significant performance parameters such as capacity, G/T, flexibility of routing traffic to beams and re-configuration of the spot-beam coverage, and payload mass and power. Candidate antenna and front-end configurations were studied, in particular direct radiating arrays, arrays magnified by a reflector and active focused reflectors with overlapping feed clusters for both transmit (multimax) and receive (beam synthesis). Regarding the on-board routing and beamforming sub-systems, analog techniques based on banks of SAW filters, FET or CMOS switches and cross-bar fixed and variable beamforming are compared with a hybrid analog/digital approach based on Chirp Fourier Transform (CFT) demultiplexer combined with digital beamforming or a fully digital processor implementation, also based on CFT demultiplexing.

A Test Apparatus for the MAJORANA DEMONSTRATOR Front-end Electronics

NASA Astrophysics Data System (ADS)

Singh, Harjit; Loach, James; Poon, Alan

2012-10-01

One of the most important experimental programs in neutrino physics is the search for neutrinoless double-beta decay. The MAJORANA collaboration is searching for this rare nuclear process in the Ge-76 isotope using HPGe detectors. Each detector is instrumented with high-performance electronics to read out and amplify the signals. The part of the electronics close to the detectors, consisting of a novel front-end circuit, cables and connectors, is made of radio-pure materials and is exceedingly delicate. In this work a dedicated test apparatus was created to benchmark the performance of the electronics before installation in the experiment. The apparatus was designed for cleanroom use, with fixtures to hold the components without contaminating them, and included the electronics necessary for power and readout. In addition to testing, the station will find longer term use in development of future versions of the electronics.

The Zero-Degree Detector System

NASA Technical Reports Server (NTRS)

Adams, James H.; Christl, Mark J.; Howell, Leonard W.; Kouznetsov, Evgueni

2006-01-01

We will report on a detector system used for accelerator measurement of nuclear fragmentation cross sections. This system consists of two detector planes, each carrying a ring of 8 detectors. Each detector has 64 pads. These two detector planes are arranged facing each other so that the matching detector pads on each plane form a two element charged particle telescope. Each of these telescopes is capable of determining the elemental identity of nuclear fragments passing through it. The system is used to measure light fragment production in the presence of heavier fragments. We will present a detailed discussion of the 64-pad detector design, the substrate design. The front-end electronics used to read out the signals is based on a custom VLSI chip developed for the Advanced Thin Ionization Calorimeter experiment which has been flown successfully twice in Antarctica. Each of these chips has 16 channels and each channel consists of a charge-sensitive preamplifier followed by a shaping amplifier and a track-and-hold circuit. The track-and-hold circuits are connected via a multiplexer to an output line driver. This allows the held signals to be presented, one-by-one via a common data line to a analog-to-digital converter. Because the output line driver can be placed in a high input impedance state when not in use, it is possible to daisy-change many chips on the same common data line. The front-end electronics and data readout scheme will be discussed in detail. The Zero Degree Detector has been used in several accelerator experiments conducted at the NASA Space Radiation Laboratory and the Alternating Gradient Synchrotron at Brookhaven National Laboratory as well as at the HIMAC accelerator in Japan. We will show examples of data taken at these accelerator runs to demonstrate how the system works.

Deep Cryogenic Low Power 24 Bits Analog to Digital Converter with Active Reverse Cryostat

NASA Astrophysics Data System (ADS)

Turqueti, Marcos; Prestemon, Soren; Albright, Robert

LBNL is developing an innovative data acquisition module for superconductive magnets where the front-end electronics and digitizer resides inside the cryostat. This electronic package allows conventional electronic technologies such as enhanced metal-oxide-semiconductor to work inside cryostats at temperatures as low as 4.2 K. This is achieved by careful management of heat inside the module that keeps the electronic envelop at approximately 85 K. This approach avoids all the difficulties that arise from changes in carrier mobility that occur in semiconductors at deep cryogenic temperatures. There are several advantages in utilizing this system. A significant reduction in electrical noise from signals captured inside the cryostat occurs due to the low temperature that the electronics is immersed in, reducing the thermal noise. The shorter distance that signals are transmitted before digitalization reduces pickup and cross-talk between channels. This improved performance in signal-to-noise rate by itself is a significant advantage. Another important advantage is the simplification of the feedthrough interface on the cryostat head. Data coming out of the cryostat is digital and serial, dramatically reducing the number of lines going through the cryostat feedthrough interface. It is important to notice that all lines coming out of the cryostat are digital and low voltage, reducing the possibility of electric breakdown inside the cryostat. This paper will explain in details the architecture and inner workings of this data acquisition system. It will also provide the performance of the analog to digital converter when the system is immersed in liquid helium, and in liquid nitrogen. Parameters such as power dissipation, integral non-linearity, effective number of bits, signal-to-noise and distortion, will be presented for both temperatures.

Deep Cryogenic Low Power 24 Bits Analog to Digital Converter with Active Reverse Cryostat

DOE PAGES

Turqueti, Marcos; Prestemon, Soren; Albright, Robert

2015-07-15

LBNL is developing an innovative data acquisition module for superconductive magnets where the front-end electronics and digitizer resides inside the cryostat. This electronic package allows conventional electronic technologies such as enhanced metal–oxide–semiconductor to work inside cryostats at temperatures as low as 4.2 K. This is achieved by careful management of heat inside the module that keeps the electronic envelop at approximately 85 K. This approach avoids all the difficulties that arise from changes in carrier mobility that occur in semiconductors at deep cryogenic temperatures. There are several advantages in utilizing this system. A significant reduction in electrical noise from signalsmore » captured inside the cryostat occurs due to the low temperature that the electronics is immersed in, reducing the thermal noise. The shorter distance that signals are transmitted before digitalization reduces pickup and cross-talk between channels. This improved performance in signal-to-noise rate by itself is a significant advantage. Another important advantage is the simplification of the feedthrough interface on the cryostat head. Data coming out of the cryostat is digital and serial, dramatically reducing the number of lines going through the cryostat feedthrough interface. It is important to notice that all lines coming out of the cryostat are digital and low voltage, reducing the possibility of electric breakdown inside the cryostat. This paper will explain in details the architecture and inner workings of this data acquisition system. It will also provide the performance of the analog to digital converter when the system is immersed in liquid helium, and in liquid nitrogen. Parameters such as power dissipation, integral non-linearity, effective number of bits, signal-to-noise and distortion, will be presented for both temperatures.« less

PMF: The front end electronic of the ALFA detector

NASA Astrophysics Data System (ADS)

Barrillon, P.; Blin, S.; Cheikali, C.; Cuisy, D.; Gaspard, M.; Fournier, D.; Heller, M.; Iwanski, W.; Lavigne, B.; De la Taille, C.; Puzo, P.; Socha, J.-L.

2010-11-01

The front end electronic (PMF) of the future ATLAS luminometer is described here. It is composed of a MAPMT and a compact stack of three PCBs, which deliver high voltage, route and read out of the output signals. The third board contains an FPGA and MAROC, a 64-channel ASIC, which can correct the non-uniformity of the MAPMT channels gain, thanks to a variable gain preamplifier. Its main role is to shape and discriminate the input signals at 1/3 photo-electron and produce 64 trigger outputs. Laboratory tests performed on prototype and pre-series PMFs have showed performances in good agreement with the requirements and have fulfilled the approval criteria for the final production of all elements.

The HADES-RICH upgrade using Hamamatsu H12700 MAPMTs with DiRICH FEE + Readout

NASA Astrophysics Data System (ADS)

Patel, V.; Traxler, M.

2018-03-01

The High Acceptance Di-Electron Spectrometer (HADES) is operational since the year 2000 and uses a hadron blind RICH detector for electron identification. The RICH photon detector is currently replaced by Hamamatsu H12700 MAPMTs with a readout system based on the DiRICH front-end module. The electronic readout chain is being developed as a joint effort of the HADES-, CBM- and PANDA collaborations and will also be used in the photon detectors for the upcoming Compressed Baryonic Matter (CBM) and PANDA experiments at FAIR . This article gives a brief overview on the photomultipliers and their quality assurance test measurements, as well as first measurements of the new DiRICH front-end module in final configurations.

Radiation Tolerant Electronics and Digital Processing for the Phase-I Trigger Readout Upgrade of the ATLAS Liquid Argon Calorimeters

DOE Office of Scientific and Technical Information (OSTI.GOV)

Milic, A.

The high luminosities of L > 10{sup 34} cm{sup -2}s{sup -1} at the Large Hadron Collider (LHC) at CERN produce an intense radiation environment that the detectors and their electronics must withstand. The ATLAS detector is a multi-purpose apparatus constructed to explore the new particle physics regime opened by the LHC. Of the many decay particles observed by the ATLAS detector, the energy of the created electrons and photons is measured by a sampling calorimeter technique that uses Liquid Argon (LAr) as its active medium. The front end (FE) electronic readout of the ATLAS LAr calorimeter located on the detectormore » itself consists of a combined analog and digital processing system. In order to exploit the higher luminosity while keeping the same trigger bandwidth of 100 kHz, higher transverse granularity, higher resolution and longitudinal shower shape information will be provided from the LAr calorimeter to the Level-l trigger processors. New trigger readout electronics have been designed for this purpose, which will withstand the radiation dose levels expected for an integrated luminosity of 3000 fb{sup -1} during the high luminosity LHC (HL-LHC), which is well above the original LHC design qualifications. (authors)« less

Integrated input protection against discharges for Micro Pattern Gas Detectors readout ASICs

NASA Astrophysics Data System (ADS)

Fiutowski, T.; Dąbrowski, W.; Koperny, S.; Wiącek, P.

2017-02-01

Immunity against possible random discharges inside active detector volume of MPGDs is one of the key aspects that should be addressed in the design of the front-end electronics. This issue becomes particularly critical for systems with high channel counts and high density readout employing the front-end electronics built as multichannel ASICs implemented in modern CMOS technologies, for which the breakdown voltages are in the range of a few Volts. The paper presents the design of various input protection structures integrated in the ASIC manufactured in a 350 nm CMOS process and test results using an electrical circuit to mimic discharges in the detectors.

The Majorana Low-noise Low-background Front-end Electronics

NASA Astrophysics Data System (ADS)

Abgrall, N.; Aguayo, E.; Avignone, F. T.; Barabash, A. S.; Bertrand, F. E.; Boswell, M.; Brudanin, V.; Busch, M.; Byram, D.; Caldwell, A. S.; Chan, Y.-D.; Christofferson, C. D.; Combs, D. C.; Cuesta, C.; Detwiler, J. A.; Doe, P. J.; Efremenko, Yu.; Egorov, V.; Ejiri, H.; Elliott, S. R.; Fast, J. E.; Finnerty, P.; Fraenkle, F. M.; Galindo-Uribarri, A.; Giovanetti, G. K.; Goett, J.; Green, M. P.; Gruszko, J.; Guiseppe, V. E.; Gusev, K.; Hallin, A. L.; Hazama, R.; Hegai, A.; Henning, R.; Hoppe, E. W.; Howard, S.; Howe, M. A.; Keeter, K. J.; Kidd, M. F.; Kochetov, O.; Konovalov, S. I.; Kouzes, R. T.; LaFerriere, B. D.; Leon, J.; Leviner, L. E.; Loach, J. C.; MacMullin, J.; MacMullin, S.; Martin, R. D.; Meijer, S.; Mertens, S.; Nomachi, M.; Orrell, J. L.; O'Shaughnessy, C.; Overman, N. R.; Phillips, D. G.; Poon, A. W. P.; Pushkin, K.; Radford, D. C.; Rager, J.; Rielage, K.; Robertson, R. G. H.; Romero-Romero, E.; Ronquest, M. C.; Schubert, A. G.; Shanks, B.; Shima, T.; Shirchenko, M.; Snavely, K. J.; Snyder, N.; Suriano, A. M.; Thompson, J.; Timkin, V.; Tornow, W.; Trimble, J. E.; Varner, R. L.; Vasilyev, S.; Vetter, K.; Vorren, K.; White, B. R.; Wilkerson, J. F.; Wiseman, C.; Xu, W.; Yakushev, E.; Young, A. R.; Yu, C.-H.; Yumatov, V.

The MAJORANA DEMONSTRATOR will search for the neutrinoless double beta decay (ββ(0ν)) of the isotope 76Ge with a mixed array of enriched and natural germanium detectors. In view of the next generation of tonne-scale germanium-based ββ(0ν)-decay searches, a major goal of the MAJORANA DEMONSTRATOR is to demonstrate a path forward to achieving a background rate at or below 1 cnt/(ROI-t-y) in the 4 keV region of interest (ROI) around the 2039-keV Q-value of the 76Ge ββ(0ν)-decay. Such a requirement on the background level significantly constrains the design of the readout electronics, which is further driven by noise and energy resolution performances. We present here the low-noise low- background front-end electronics developed for the low-capacitance p-type point contact (P-PC) germanium detectors of the MAJORANA DEMONSTRATOR. This resistive-feedback front-end, specifically designed to have low mass, is fabricated on a radioassayed fused-silica substrate where the feedback resistor consists of a sputtered thin film of high purity amorphous germanium and the feedback capacitor is based on the capacitance between gold conductive traces.

The Majorana low-noise low-background front-end electronics

DOE PAGES

Abgrall, N.; Aguayo, E.; Avignone, III, F. T.; ...

2015-03-24

The Majorana Demonstrator will search for the neutrinoless double beta decay (ββ(0ν)) of the isotope ⁷⁶Ge with a mixed array of enriched and natural germanium detectors. In view of the next generation of tonne-scale germanium-based ββ(0ν)-decay searches, a major goal of the Majorana Demonstrator is to demonstrate a path forward to achieving a background rate at or below 1 cnt/(ROI-t-y) in the 4 keV region of interest (ROI) around the 2039-keV Q-value of the ⁷⁶Ge ββ(0ν)-decay. Such a requirement on the background level significantly constrains the design of the readout electronics, which is further driven by noise and energy resolutionmore » performances. We present here the low-noise low-background front-end electronics developed for the low-capacitance p-type point contact (P-PC) germanium detectors of the Majorana Demonstrator. This resistive-feedback front-end, specifically designed to have low mass, is fabricated on a radioassayed fused-silica substrate where the feedback resistor consists of a sputtered thin film of high purity amorphous germanium and the feedback capacitor is based on the capacitance between gold conductive traces.« less

A reconfigurable medically cohesive biomedical front-end with ΣΔ ADC in 0.18µm CMOS.

PubMed

Jha, Pankaj; Patra, Pravanjan; Naik, Jairaj; Acharya, Amit; Rajalakshmi, P; Singh, Shiv Govind; Dutta, Ashudeb

2015-08-01

This paper presents a generic programmable analog front-end (AFE) for acquisition and digitization of various biopotential signals. This includes a lead-off detection circuit, an ultra-low current capacitively coupled signal conditioning stage with programmable gain and bandwidth, a new mixed signal automatic gain control (AGC) mechanism and a medically cohesive reconfigurable ΣΔ ADC. The full system is designed in UMC 0.18μm CMOS. The AFE achieves an overall linearity of more 10 bits with 0.47μW power consumption. The ADC provides 2(nd) order noise-shaping while using single integrator and an ENOB of ~11 bits with 5μW power consumption. The system was successfully verified for various ECG signals from PTB database. This system is intended for portable batteryless u-Healthcare devices.

An Inductively-Powered Wireless Neural Recording System with a Charge Sampling Analog Front-End

PubMed Central

Lee, Seung Bae; Lee, Byunghun; Kiani, Mehdi; Mahmoudi, Babak; Gross, Robert; Ghovanloo, Maysam

2015-01-01

An inductively-powered wireless integrated neural recording system (WINeR-7) is presented for wireless and battery less neural recording from freely-behaving animal subjects inside a wirelessly-powered standard homecage. The WINeR-7 system employs a novel wide-swing dual slope charge sampling (DSCS) analog front-end (AFE) architecture, which performs amplification, filtering, sampling, and analog-to-time conversion (ATC) with minimal interference and small amount of power. The output of the DSCS-AFE produces a pseudo-digital pulse width modulated (PWM) signal. A circular shift register (CSR) time division multiplexes (TDM) the PWM pulses to create a TDM-PWM signal, which is fed into an on-chip 915 MHz transmitter (Tx). The AFE and Tx are supplied at 1.8 V and 4.2 V, respectively, by a power management block, which includes a high efficiency active rectifier and automatic resonance tuning (ART), operating at 13.56 MHz. The 8-ch system-on-a-chip (SoC) was fabricated in a 0.35-μm CMOS process, occupying 5.0 × 2.5 mm2 and consumed 51.4 mW. For each channel, the sampling rate is 21.48 kHz and the power consumption is 19.3 μW. In vivo experiments were conducted on freely behaving rats in an energized homecage by continuously delivering 51.4 mW to the WINeR-7 system in a closed-loop fashion and recording local field potentials (LFP). PMID:27069422

An Inductively-Powered Wireless Neural Recording System with a Charge Sampling Analog Front-End.

PubMed

Lee, Seung Bae; Lee, Byunghun; Kiani, Mehdi; Mahmoudi, Babak; Gross, Robert; Ghovanloo, Maysam

2016-01-15

An inductively-powered wireless integrated neural recording system (WINeR-7) is presented for wireless and battery less neural recording from freely-behaving animal subjects inside a wirelessly-powered standard homecage. The WINeR-7 system employs a novel wide-swing dual slope charge sampling (DSCS) analog front-end (AFE) architecture, which performs amplification, filtering, sampling, and analog-to-time conversion (ATC) with minimal interference and small amount of power. The output of the DSCS-AFE produces a pseudo-digital pulse width modulated (PWM) signal. A circular shift register (CSR) time division multiplexes (TDM) the PWM pulses to create a TDM-PWM signal, which is fed into an on-chip 915 MHz transmitter (Tx). The AFE and Tx are supplied at 1.8 V and 4.2 V, respectively, by a power management block, which includes a high efficiency active rectifier and automatic resonance tuning (ART), operating at 13.56 MHz. The 8-ch system-on-a-chip (SoC) was fabricated in a 0.35-μm CMOS process, occupying 5.0 × 2.5 mm 2 and consumed 51.4 mW. For each channel, the sampling rate is 21.48 kHz and the power consumption is 19.3 μW. In vivo experiments were conducted on freely behaving rats in an energized homecage by continuously delivering 51.4 mW to the WINeR-7 system in a closed-loop fashion and recording local field potentials (LFP).

Knowledge Management for Command and Control

DTIC Science & Technology

2004-06-01

interfaces relies on rich visual and conceptual understanding of what is sketched, rather than the pattern-recognition technologies that most systems use...recognizers) required by other approaches. • The underlying conceptual representations that nuSketch uses enable it to serve as a front end to knowledge...constructing enemy-intent hypotheses via mixed visual and conceptual analogies. II.C. Multi-ViewPoint Clustering Analysis (MVP-CA) technology To

Progress on the Low Frequency All Sky Monitor

NASA Astrophysics Data System (ADS)

Ford, Anthony; Jenet, F.; Craig, J.; Creighton, T. D.; Dartez, L. P.; Hicks, B.; Hinojosa, J.; Jaramillo, R.; Kassim, N. E.; Lunsford, G.; Miller, R. B.; Murray, J.; Ray, P. S.; Rivera, J.; Taylor, G. B.

2013-01-01

The Low Frequency All Sky Monitor is a system of geographically separated radio arrays dedicated to the study of radio transients. LoFASM consists of four stations, each comprised of 12 cross-dipole antennas designed to operate between 5-88MHz. The antennas and front end electronics for LoFASM were designed by the Naval Research Laboratory for the Long Wavelength Array project. Over the last year, undergraduate students from the University of Texas at Brownsville’s Center for Advanced Radio Astronomy have been establishing these stations around the continental US, consisting of sites located in Port Mansfield, Texas, the LWA North Arm site of the LWA1 Radio Observatory in New Mexico, adjacent to the North Arm of the Very Large Array, the Green Bank Radio Observatory, West Virginia, and NASA’s Goldstone tracking complex in California. In combination with the establishment of these sites was the development of the analog hardware, which consists of commercial off-the-shelf RF splitter/combiners and a custom amplifier and filter chain designed by colleagues at the University of New Mexico. This poster will expound on progress in site installation and development of the analog signal chain.

Radiation testing campaign results for understanding the suitability of FPGAs in detector electronics

DOE PAGES

Citterio, M.; Camplani, A.; Cannon, M.; ...

2015-11-19

SRAM based Field Programmable Gate Arrays (FPGAs) have been rarely used in High Energy Physics (HEP) due to their sensitivity to radiation. The last generation of commercial FPGAs based on 28 nm feature size and on Silicon On Insulator (SOI) technologies are more tolerant to radiation to the level that their use in front-end electronics is now feasible. FPGAs provide re-programmability, high-speed computation and fast data transmission through the embedded serial transceivers. They could replace custom application specific integrated circuits in front end electronics in locations with moderate radiation field. Finally, the use of a FPGA in HEP experiments ismore » only limited by our ability to mitigate single event effects induced by the high energy hadrons present in the radiation field.« less

Analog integrated circuits design for processing physiological signals.

PubMed

Li, Yan; Poon, Carmen C Y; Zhang, Yuan-Ting

2010-01-01

Analog integrated circuits (ICs) designed for processing physiological signals are important building blocks of wearable and implantable medical devices used for health monitoring or restoring lost body functions. Due to the nature of physiological signals and the corresponding application scenarios, the ICs designed for these applications should have low power consumption, low cutoff frequency, and low input-referred noise. In this paper, techniques for designing the analog front-end circuits with these three characteristics will be reviewed, including subthreshold circuits, bulk-driven MOSFETs, floating gate MOSFETs, and log-domain circuits to reduce power consumption; methods for designing fully integrated low cutoff frequency circuits; as well as chopper stabilization (CHS) and other techniques that can be used to achieve a high signal-to-noise performance. Novel applications using these techniques will also be discussed.

Gravitational Reference Sensor Front-End Electronics Simulator for LISA

NASA Astrophysics Data System (ADS)

Meshksar, Neda; Ferraioli, Luigi; Mance, Davor; ten Pierick, Jan; Zweifel, Peter; Giardini, Domenico; ">LISA Pathfinder colaboration,

DOE Office of Scientific and Technical Information (OSTI.GOV)

Jones, M.

Configuration and calibration of the front-end electronics typical of many silicon detector configurations were investigated in a lab activity based on a pair of strip sensors interfaced with FSSR2 read-out chips and an FPGA. This simple hardware configuration, originally developed for a telescope at the Fermilab Test Beam Facility, was used to measure thresholds and noise on individual readout channels and to study the influence that different configurations of the front-end electronics had on the observed levels of noise in the system. An understanding of the calibration and operation of this small detector system provided an opportunity to explore themore » architecture of larger systems such as those currently in use at LHC experiments.« less

Fully Integrated Passive UHF RFID Tag for Hash-Based Mutual Authentication Protocol.

PubMed

Mikami, Shugo; Watanabe, Dai; Li, Yang; Sakiyama, Kazuo

2015-01-01

Passive radio-frequency identification (RFID) tag has been used in many applications. While the RFID market is expected to grow, concerns about security and privacy of the RFID tag should be overcome for the future use. To overcome these issues, privacy-preserving authentication protocols based on cryptographic algorithms have been designed. However, to the best of our knowledge, evaluation of the whole tag, which includes an antenna, an analog front end, and a digital processing block, that runs authentication protocols has not been studied. In this paper, we present an implementation and evaluation of a fully integrated passive UHF RFID tag that runs a privacy-preserving mutual authentication protocol based on a hash function. We design a single chip including the analog front end and the digital processing block. We select a lightweight hash function supporting 80-bit security strength and a standard hash function supporting 128-bit security strength. We show that when the lightweight hash function is used, the tag completes the protocol with a reader-tag distance of 10 cm. Similarly, when the standard hash function is used, the tag completes the protocol with the distance of 8.5 cm. We discuss the impact of the peak power consumption of the tag on the distance of the tag due to the hash function.

Development of ground-based ELF/VLF receiver system in Wuhan and its first results

NASA Astrophysics Data System (ADS)

Chen, Yanping; Yang, Guobin; Ni, Binbin; Zhao, Zhengyu; Gu, Xudong; Zhou, Chen; Wang, Feng

2016-05-01

A new digital low-frequency receiver system has been developed at Wuhan University for sensitive reception of low-latitude broadband Extremely Low Frequency (ELF) and Very Low Frequency (VLF) radio waves originating from either natural or artificial sources. These low-frequency radio waves are useful for ionospheric remote sensing, geospace environment monitoring, and submarine communications. This paper presents the principle and architecture of the system framework, including magnetic loop antenna design, low-noise analog front-end and digital receiver with data sampling and transmission. A new structure is adopted in the analog front end to provide high common-mode rejection and to reduce interference. On basis of field programmable gate array (FPGA) device and Universal Serial Bus (USB) architecture, the digital receiver is developed along with time keeping and synchronization module. The validity and feasibility of the self-developed ground-based ELF/VLF receiver system is evaluated by first results of experimental data that show the temporal variation of broadband ELF/VLF wave spectral intensity in Wuhan (30.54 °N, 114.37 °E). In addition to the acquisition of VLF transmitter signals at various frequencies, tweek atmospherics are also clearly captured to occur at multiple modes up to n = 6.

SALT, a dedicated readout chip for high precision tracking silicon strip detectors at the LHCb Upgrade

NASA Astrophysics Data System (ADS)

Bugiel, Sz.; Dasgupta, R.; Firlej, M.; Fiutowski, T.; Idzik, M.; Kuczynska, M.; Moron, J.; Swientek, K.; Szumlak, T.

2016-02-01

The Upstream Tracker (UT) silicon strip detector, one of the central parts of the tracker system of the modernised LHCb experiment, will use a new 128-channel readout ASIC called SALT. It will extract and digitise analogue signals from the UT sensors, perform digital signal processing and transmit a serial output data. The SALT is being designed in CMOS 130 nm process and uses a novel architecture comprising of analog front-end and fast (40 MSps) ultra-low power (<0.5 mW) 6-bit ADC in each channel. The prototype ASICs of important functional blocks, like analogue front-end, 6-bit SAR ADC, PLL, and DLL, were designed, fabricated and tested. A prototype of an 8-channel version of the SALT chip, comprising all important functionalities was also designed and fabricated. The architecture and design of the SALT, together with the selected preliminary tests results, are presented.

Analysis and Quantification of Coupling Mechanisms of External Signal Perturbations on Silicon Detectors for Particle Physics Experiments

NASA Astrophysics Data System (ADS)

Arteche, F.; Rivetta, C.; Iglesias, M.; Echeverria, I.

2016-05-01

Silicon detectors have been used in astrophysics satellites and particle detectors for high energy physics (HEP) experiments. For HEP applications, EMC studies have been conducted in silicon detectors to characterize the impact of external noise on the system. They have shown that problems associated with the new generation of silicon detectors are related with interferences generated by the power supplies and auxiliary equipment connected to the device. Characterization of these interferences along with the coupling and their propagation into the susceptible front-end circuits is required for a successful integration of these systems. This paper presents the analysis of the sensitivity curves and coupling mechanisms between the noise and the front-end electronics that have been observed during the characterization of two silicon detector prototypes: the CMS-Silicon tracker detector (CMS-ST) and Silicon Vertex Detector (Belle II-SVD). As a result of these studies, it is possible to identify critical elements in prototypes to take corrective actions in the design and improve the front-end electronics performance.

Status of the design of the ITER ECE diagnostic

DOE PAGES

Taylor, G.; Austin, M. E.; Beno, J. H.; ...

2015-03-12

In this study, the baseline design for the ITER electron cyclotron emission (ECE) diagnostic has entered the detailed preliminary design phase. Two plasma views are planned, a radial view and an oblique view that is sensitive to distortions in the electron momentum distribution near the average thermal momentum. Both views provide high spatial resolution electron temperature profiles when the momentum distribution remains Maxwellian. The ECE diagnostic system consists of the front-end optics, including two 1000 K calibration sources, in equatorial port plug EP9, the 70-1000 GHz transmission system from the front-end to the diagnostics hall, and the ECE instrumentation inmore » the diagnostics hall. The baseline ECE instrumentation will include two Michelson interferometers that can simultaneously measure ordinary and extraordinary mode ECE from 70 to 1000 GHz, and two heterodyne radiometer systems, covering 122-230 GHz and 244-355 GHz. Significant design challenges include 1) developing highly-reliable 1000 K calibration sources and the associated shutters/mirrors, 2) providing compliant couplings between the front-end optics and the polarization splitter box that accommodate displacements of the vacuum vessel during plasma operations and bake out, 3) protecting components from damage due to stray ECH radiation and other intense millimeter wave emission and 4) providing the low-loss broadband transmission system.« less

A front end readout electronics ASIC chip for position sensitive solid state detectors

DOE Office of Scientific and Technical Information (OSTI.GOV)

Kravis, S.D.; Tuemer, T.O.; Visser, G.J.

1998-12-31

A mixed signal Application Specific Integrated Circuit (ASIC) chip for front end readout electronics of position sensitive solid state detectors has been manufactured. It is called RENA (Readout Electronics for Nuclear Applications). This chip can be used for both medical and industrial imaging of X-rays and gamma rays. The RENA chip is a monolithic integrated circuit and has 32 channels with low noise high input impedance charge sensitive amplifiers. It works in pulse counting mode with good energy resolution. It also has a self triggering output which is essential for nuclear applications when the incident radiation arrives at random. Different,more » externally selectable, operational modes that includes a sparse readout mode is available to increase data throughput. It also has externally selectable shaping (peaking) times.« less

The electronics and data acquisition system for the DarkSide-50 veto detectors

NASA Astrophysics Data System (ADS)

Agnes, P.; Agostino, L.; Albuquerque, I. F. M.; Alexander, T.; Alton, A. K.; Arisaka, K.; Back, H. O.; Baldin, B.; Biery, K.; Bonfini, G.; Bossa, M.; Bottino, B.; Brigatti, A.; Brodsky, J.; Budano, F.; Bussino, S.; Cadeddu, M.; Cadoni, M.; Calaprice, F.; Canci, N.; Candela, A.; Cao, H.; Cariello, M.; Carlini, M.; Catalanotti, S.; Cavalcante, P.; Chepurnov, A.; Cocco, A. G.; Covone, G.; Crippa, L.; D'Angelo, D.; D'Incecco, M.; Davini, S.; De Cecco, S.; De Deo, M.; De Vincenzi, M.; Derbin, A.; Devoto, A.; Di Eusanio, F.; Di Pietro, G.; Edkins, E.; Empl, A.; Fan, A.; Fiorillo, G.; Fomenko, K.; Foster, G.; Franco, D.; Gabriele, F.; Galbiati, C.; Giganti, C.; Goretti, A. M.; Granato, F.; Grandi, L.; Gromov, M.; Guan, M.; Guardincerri, Y.; Hackett, B. R.; Herner, K. R.; Hungerford, E. V.; Ianni, Aldo; Ianni, Andrea; James, I.; Jollet, C.; Keeter, K.; Kendziora, C. L.; Kobychev, V.; Koh, G.; Korablev, D.; Korga, G.; Kubankin, A.; Li, X.; Lissia, M.; Lombardi, P.; Luitz, S.; Ma, Y.; Machulin, I. N.; Mandarano, A.; Mari, S. M.; Maricic, J.; Marini, L.; Martoff, C. J.; Meregaglia, A.; Meyers, P. D.; Miletic, T.; Milincic, R.; Montanari, D.; Monte, A.; Montuschi, M.; Monzani, M. E.; Mosteiro, P.; Mount, B. J.; Muratova, V. N.; Musico, P.; Napolitano, J.; Nelson, A.; Odrowski, S.; Orsini, M.; Ortica, F.; Pagani, L.; Pallavicini, M.; Pantic, E.; Parmeggiano, S.; Pelczar, K.; Pelliccia, N.; Pocar, A.; Pordes, S.; Pugachev, D. A.; Qian, H.; Randle, K.; Ranucci, G.; Razeto, A.; Reinhold, B.; Renshaw, A. L.; Riffard, Q.; Romani, A.; Rossi, B.; Rossi, N.; Rountree, S. D.; Sablone, D.; Saggese, P.; Saldanha, R.; Sands, W.; Sangiorgio, S.; Savarese, C.; Segreto, E.; Semenov, D. A.; Shields, E.; Singh, P. N.; Skorokhvatov, M. D.; Smirnov, O.; Sotnikov, A.; Stanford, C.; Suvorov, Y.; Tartaglia, R.; Tatarowicz, J.; Testera, G.; Tonazzo, A.; Trinchese, P.; Unzhakov, E. V.; Vishneva, A.; Vogelaar, R. B.; Wada, M.; Walker, S.; Wang, H.; Wang, Y.; Watson, A. W.; Westerdale, S.; Wilhelmi, J.; Wojcik, M. M.; Xiang, X.; Xu, J.; Yang, C.; Yoo, J.; Zavatarelli, S.; Zec, A.; Zhong, W.; Zhu, C.; Zuzel, G.

2016-12-01

DarkSide-50 is a detector for dark matter candidates in the form of weakly interacting massive particles. It utilizes a liquid argon time projection chamber for the inner main detector, surrounded by a liquid scintillator veto (LSV) and a water Cherenkov veto detector (WCV). The LSV and WCV act as the neutron and cosmogenic muon veto detectors for DarkSide-50. This paper describes the electronics and data acquisition system used for these two detectors. The system is made of a custom built front end electronics and commercial National Instruments high speed digitizers. The front end electronics, the DAQ, and the trigger system have been used to acquire data in the form of zero-suppressed waveform samples from the 110 PMTs of the LSV and the 80 PMTs of the WCV. The veto DAQ system has proven its performance and reliability. This electronics and DAQ system can be scaled and used as it is for the veto of the next generation DarkSide-20k detector.

Reviewed approach to defining the Active Interlock Envelope for Front End ray tracing

DOE Office of Scientific and Technical Information (OSTI.GOV)

Seletskiy, S.; Shaftan, T.

To protect the NSLS-II Storage Ring (SR) components from damage from synchrotron radiation produced by insertion devices (IDs) the Active Interlock (AI) keeps electron beam within some safe envelope (a.k.a Active Interlock Envelope or AIE) in the transverse phase space. The beamline Front Ends (FEs) are designed under assumption that above certain beam current (typically 2 mA) the ID synchrotron radiation (IDSR) fan is produced by the interlocked e-beam. These assumptions also define how the ray tracing for FE is done. To simplify the FE ray tracing for typical uncanted ID it was decided to provide the Mechanical Engineering groupmore » with a single set of numbers (x,x’,y,y’) for the AIE at the center of the long (or short) ID straight section. Such unified approach to the design of the beamline Front Ends will accelerate the design process and save valuable human resources. In this paper we describe our new approach to defining the AI envelope and provide the resulting numbers required for design of the typical Front End.« less

Beam Position Monitoring in the CSU Accelerator Facility

NASA Astrophysics Data System (ADS)

Einstein, Joshua; Vankeuren, Max; Watras, Stephen

2014-03-01

A Beam Position Monitoring (BPM) system is an integral part of an accelerator beamline, and modern accelerators can take advantage of newer technologies and designs when creating a BPM system. The Colorado State University (CSU) Accelerator Facility will include four stripline detectors mounted around the beamline, a low-noise analog front-end, and digitization and interface circuitry. The design will support a sampling rate greater than 10 Hz and sub-100 μm accuracy.

Design of fast signal processing readout front-end electronics implemented in CMOS 40 nm technology

NASA Astrophysics Data System (ADS)

Kleczek, Rafal

2016-12-01

The author presents considerations on the design of fast readout front-end electronics implemented in a CMOS 40 nm technology with an emphasis on the system dead time, noise performance and power dissipation. The designed processing channel consists of a charge sensitive amplifier with different feedback types (Krummenacher, resistive and constant current blocks), a threshold setting block, a discriminator and a counter with logic circuitry. The results of schematic and post-layout simulations with randomly generated input pulses in a time domain according to the Poisson distribution are presented and analyzed. Dead time below 20 ns is possible while keeping noise ENC ≈ 90 e- for a detector capacitance CDET = 160 fF.

DOE Office of Scientific and Technical Information (OSTI.GOV)

Citterio, M.; Camplani, A.; Cannon, M.

SRAM based Field Programmable Gate Arrays (FPGAs) have been rarely used in High Energy Physics (HEP) due to their sensitivity to radiation. The last generation of commercial FPGAs based on 28 nm feature size and on Silicon On Insulator (SOI) technologies are more tolerant to radiation to the level that their use in front-end electronics is now feasible. FPGAs provide re-programmability, high-speed computation and fast data transmission through the embedded serial transceivers. They could replace custom application specific integrated circuits in front end electronics in locations with moderate radiation field. Finally, the use of a FPGA in HEP experiments ismore » only limited by our ability to mitigate single event effects induced by the high energy hadrons present in the radiation field.« less

The upgrade of the CMS hadron calorimeter with silicon photomultipliers

DOE PAGES

Strobbe, N.

2017-01-26

The upgrade of the hadron calorimeter of the CMS experiment at the CERN Large Hadron Collider is currently underway. The endcap sections will be upgraded in the winter of 2016–2017 and the barrel sections during the second LHC long shutdown in 2019. The existing photosensors will be replaced with about 16 000 new silicon photomultipliers (SiPMs), resulting in the first large installation of SiPMs in a radiation environment. All associated front-end electronics will also be upgraded. Here, this paper discusses the motivation for the upgrade and provides a description 17 of the new system, including the SiPMs with associated controlmore » electronics and the front-end readout cards.« less

Current-Voltage Characteristic of Nanosecond - Duration Relativistic Electron Beam

NASA Astrophysics Data System (ADS)

Andreev, Andrey

2005-10-01

The pulsed electron-beam accelerator SINUS-6 was used to measure current-voltage characteristic of nanosecond-duration thin annular relativistic electron beam accelerated in vacuum along axis of a smooth uniform metal tube immersed into strong axial magnetic field. Results of these measurements as well as results of computer simulations performed using 3D MAGIC code show that the electron-beam current dependence on the accelerating voltage at the front of the nanosecond-duration pulse is different from the analogical dependence at the flat part of the pulse. In the steady-state (flat) part of the pulse), the measured electron-beam current is close to Fedosov current [1], which is governed by the conservation law of an electron moment flow for any constant voltage. In the non steady-state part (front) of the pulse, the electron-beam current is higher that the appropriate, for a giving voltage, steady-state (Fedosov) current. [1] A. I. Fedosov, E. A. Litvinov, S. Ya. Belomytsev, and S. P. Bugaev, ``Characteristics of electron beam formed in diodes with magnetic insulation,'' Soviet Physics Journal (A translation of Izvestiya VUZ. Fizika), vol. 20, no. 10, October 1977 (April 20, 1978), pp.1367-1368.

A custom readout electronics for the BESIII CGEM detector

NASA Astrophysics Data System (ADS)

Da Rocha Rolo, M.; Alexeev, M.; Amoroso, A.; Baldini Ferroli, R.; Bertani, M.; Bettoni, D.; Bianchi, F.; Bugalho, R.; Calcaterra, A.; Canale, N.; Capodiferro, M.; Carassiti, V.; Cerioni, S.; Chai, J. Y.; Chiozzi, S.; Cibinetto, G.; Cossio, F.; Cotta Ramusino, A.; De Mori, F.; Destefanis, M.; Di Francesco, A.; Dong, J.; Evangelisti, F.; Farinelli, R.; Fava, L.; Felici, G.; Fioravanti, E.; Garzia, I.; Gatta, M.; Greco, M.; Lavezzi, L.; Leng, C. Y.; Li, H.; Maggiora, M.; Malaguti, R.; Marcello, S.; Marciniewski, P.; Melchiorri, M.; Mezzadri, G.; Mignone, M.; Morello, G.; Pacetti, S.; Patteri, P.; Pellegrino, J.; Pelosi, A.; Rivetti, A.; Savrié, M.; Scodeggio, M.; Soldani, E.; Sosio, S.; Spataro, S.; Tskhadadze, E.; Varela, J.; Verma, S.; Wheadon, R.; Yan, L.

2017-07-01

For the upgrade of the inner tracker of the BESIII spectrometer, planned for 2018, a lightweight tracker based on an innovative Cylindrical Gas Electron Multiplier (CGEM) detector is now under development. The analogue readout of the CGEM enables the use of a charge centroid algorithm to improve the spatial resolution to better than 130 μm while loosening the pitch strip to 650 μm, which allows to reduce the total number of channels to about 10 000. The channels are readout by 160 dedicated integrated 64-channel front-end ASICs, providing a time and charge measurement and featuring a fully-digital output. The energy measurement is extracted either from the time-over-threshold (ToT) or the 10-bit digitisation of the peak amplitude of the signal. The time of the event is generated by quad-buffered low-power TDCs, allowing for rates in excess of 60 kHz per channel. The TDCs are based on analogue interpolation techniques and produce a time stamp (or two, if working in ToT mode) of the event with a time resolution better than 50 ps. The front-end noise, based on a CSA and a two-stage complex conjugated pole shapers, dominate the channel intrinsic time jitter, which is less than 5 ns r.m.s. The time information of the hit can be used to reconstruct the track path, operating the detector as a small TPC and hence improving the position resolution when the distribution of the cloud, due to large incident angle or magnetic field, is very broad. Event data is collected by an off-detector motherboard, where each GEM-ROC readout card handles 4 ASIC carrier FEBs (512 channels). Configuration upload and data readout between the off-detector electronics and the VME-based data collector cards are managed by bi-directional fibre optical links. This paper covers the design of a custom front-end electronics for the readout of the new inner tracker of the BESIII experiment, addressing the relevant design aspects of the detector electronics and the front-end ASIC for the CGEM readout, and reviewing the first silicon results of the chip prototype.

7 CFR 1717.852 - Financing purposes.

Code of Federal Regulations, 2014 CFR

2014-01-01

... the borrower: water and waste disposal systems, solid waste disposal systems, telecommunication and other electronic communications systems, and natural gas distribution systems; (4) Front-end costs, when...

IMOTEPAD: A mixed-signal 64-channel front-end ASIC for small-animal PET imaging

NASA Astrophysics Data System (ADS)

Fang, Xiaochao; Ollivier-Henry, Nicolas; Gao, Wu; Hu-Guo, Christine; Colledani, Claude; Humbert, Bernard; Brasse, David; Hu, Yann

2011-04-01

This paper presents the design and characteristics of a mixed-signal 64-channel front-end readout ASIC called IMOTEPAD dedicated to multi-channel plate (MCP) photodetector coupled to LYSO scintillating crystals for small-animal PET imaging. In our configuration, the crystals are oriented in the axial direction readout on both sides by individual photodetector channels allowing the spatial resolution and the detection efficiency to be independent of each other. As a result, both energy signals and timing triggers from the photodetectors are required to be read out by the front-end ASIC. This dedicated ASIC IMOTEPAD comprises two parts: the analog part IMOTEPA and the digital part IMOTEPD. The IMOTEPA is dedicated to energy measurement. And the timing information is digitized by the IMOTEPD in which the key principal element is a time-to-digital converter (TDC) based on a delay-locked loop (DLL) with 32 delay cells. The chip is designed and fabricated in 0.35 μm CMOS process. The measurements show that for the analog part IMOTEPA, the energy gain is 13.1 mV/pC while the peak time of a CR-RC pulse shaper is 280 ns. The SNR is 39 dB and the RMS noise is 300 μV. The nonlinearity is less than 3%. The crosstalk is less than 0.2%. For the IMOTEPD, the bin size of the TDC is 625 ps with a reference clock of 50 MHz. The RMS jitter of the DLL is less than 42 ps. The DNL of the TDC is equal to about 0.17 LSB and the INL is equal to 0.31 LSB. The power dissipation of each channel is less than 16.8 mW. The design of the ASIC, especially for TDC and the measurement results of the IMOTEPAD will be presented and discussed in this paper.

The Front-End System For MARE In Milano

NASA Astrophysics Data System (ADS)

Arnaboldi, Claudio; Pessina, Gianluigi

2009-12-01

The first phase of MARE consists of 72 μ-bolometers composed each of a crystal of AgReO4 readout by Si thermistors. The spread in the thermistor characteristics and bolometer thermal coupling leads to different energy conversion gains and optimum operating points of the detectors. Detector biasing levels and voltage gains are completely remote-adjustable by the front end system developed, the subject of this paper, achieving the same signal range at the input of the DAQ system. The front end consists of a cold buffer stage, a second pseudo differential stage followed by a gain stage, an antialiasing filter, and a battery powered detector biasing set up. The DAQ system can be used to set all necessary parameters of the electronics remotely, by writing to a μ-controller located on each board. Fiber optics are used for the serial communication between the DAQ and the front end. To suppress interference noise during normal operation, the clocked devices of the front end are maintained in sleep-mode, except during the set-up phase of the experiment. An automatic DC detector characterization procedure is used to establish the optimum operating point of every detector of the array. A very low noise level has been achieved: about 3nV/□Hz at 1 Hz and 1 nV/□Hz for the white component, high frequencies.

FELIX: The new detector readout system for the ATLAS experiment

NASA Astrophysics Data System (ADS)

Ryu, Soo; ATLAS TDAQ Collaboration

2017-10-01

After the Phase-I upgrades (2019) of the ATLAS experiment, the Front-End Link eXchange (FELIX) system will be the interface between the data acquisition system and the detector front-end and trigger electronics. FELIX will function as a router between custom serial links and a commodity switch network using standard technologies (Ethernet or Infiniband) to communicate with commercial data collecting and processing components. The system architecture of FELIX will be described and the status of the firmware implementation and hardware development currently in progress will be presented.

Non-Electronic Radio Front-End (NERF)

DTIC Science & Technology

2007-04-01

electro - optic field sensor. The absence of metallic interconnects and the charge isolation provided by the optics removes the soft spots in a traditional receiver. In the proof-of concept experiment, detection of C band electromagnetic signals at 7.38 GHz with a sensitivity of 4.3x10 -3 V/m.Hz(exp 1/2) is demonstrated. The dielectric approach has an added benefit: it reduces physical size of the front end an important benefit in mobile applications. DIELECTRIC RESONATOR ANTENNA, PHOTONICALLY ISOLATED ANTENNA RECEIVER, ELECTRO - OPTIC DIELECTRIC ANTENNA,

A wideband dual-antenna receiver for wireless recording from animals behaving in large arenas.

PubMed

Lee, Seung Bae; Yin, Ming; Manns, Joseph R; Ghovanloo, Maysam

2013-07-01

A low-noise wideband receiver (Rx) is presented for a multichannel wireless implantable neural recording (WINeR) system that utilizes time-division multiplexing of pulse width modulated (PWM) samples. The WINeR-6 Rx consists of four parts: 1) RF front end; 2) signal conditioning; 3) analog output (AO); and 4) field-programmable gate array (FPGA) back end. The RF front end receives RF-modulated neural signals in the 403-490 MHz band with a wide bandwidth of 18 MHz. The frequency-shift keying (FSK) PWM demodulator in the FPGA is a time-to-digital converter with 304 ps resolution, which converts the analog pulse width information to 16-bit digital samples. Automated frequency tracking has been implemented in the Rx to lock onto the free-running voltage-controlled oscillator in the transmitter (Tx). Two antennas and two parallel RF paths are used to increase the wireless coverage area. BCI-2000 graphical user interface has been adopted and modified to acquire, visualize, and record the recovered neural signals in real time. The AO module picks three demultiplexed channels and converts them into analog signals for direct observation on an oscilloscope. One of these signals is further amplified to generate an audio output, offering users the ability to listen to ongoing neural activity. Bench-top testing of the Rx performance with a 32-channel WINeR-6 Tx showed that the input referred noise of the entire system at a Tx-Rx distance of 1.5 m was 4.58 μV rms with 8-bit resolution at 640 kSps. In an in vivo experiment, location-specific receptive fields of hippocampal place cells were mapped during a behavioral experiment in which a rat completed 40 laps in a large circular track. Results were compared against those acquired from the same animal and the same set of electrodes by a commercial hardwired recording system to validate the wirelessly recorded signals.

A Wideband Dual-Antenna Receiver for Wireless Recording From Animals Behaving in Large Arenas

PubMed Central

Lee, Seung Bae; Yin, Ming; Manns, Joseph R.

2014-01-01

A low-noise wideband receiver (Rx) is presented for a multichannel wireless implantable neural recording (WINeR) system that utilizes time-division multiplexing of pulse width modulated (PWM) samples. The WINeR-6 Rx consists of four parts: 1) RF front end; 2) signal conditioning; 3) analog output (AO); and 4) field-programmable gate array (FPGA) back end. The RF front end receives RF-modulated neural signals in the 403–490 MHz band with a wide bandwidth of 18 MHz. The frequency-shift keying (FSK) PWM demodulator in the FPGA is a time-to-digital converter with 304 ps resolution, which converts the analog pulse width information to 16-bit digital samples. Automated frequency tracking has been implemented in the Rx to lock onto the free-running voltage-controlled oscillator in the transmitter (Tx). Two antennas and two parallel RF paths are used to increase the wireless coverage area. BCI-2000 graphical user interface has been adopted and modified to acquire, visualize, and record the recovered neural signals in real time. The AO module picks three demultiplexed channels and converts them into analog signals for direct observation on an oscilloscope. One of these signals is further amplified to generate an audio output, offering users the ability to listen to ongoing neural activity. Bench-top testing of the Rx performance with a 32-channel WINeR-6 Tx showed that the input referred noise of the entire system at a Tx–Rx distance of 1.5 m was 4.58 μVrms with 8-bit resolution at 640 kSps. In an in vivo experiment, location-specific receptive fields of hippocampal place cells were mapped during a behavioral experiment in which a rat completed 40 laps in a large circular track. Results were compared against those acquired from the same animal and the same set of electrodes by a commercial hardwired recording system to validate the wirelessly recorded signals. PMID:23428612

The aerogel Ring Imaging Cherenkov system at the Belle II spectrometer

NASA Astrophysics Data System (ADS)

Pestotnik, R.; Adachi, I.; Dolenec, R.; Hataya, K.; Iori, S.; Iwata, S.; Kakuno, H.; Kataura, R.; Kawai, H.; Kindo, H.; Kobayashi, T.; Korpar, S.; Križan, P.; Kumita, T.; Mrvar, M.; Nishida, S.; Ogawa, K.; Ogawa, S.; Šantelj, L.; Sumiyoshi, T.; Tabata, M.; Yonenaga, M.; Yusa, Y.

2017-12-01

In the forward end-cap of the Belle II spectrometer, a proximity focusing Ring Imaging Cherenkov counter with an aerogel radiator will be installed. The detector will occupy a limited space inside solenoid magnet with longitudinal field of 1.5 T. It will consist of a double layer aerogel radiator, an expansion volume and a photon detector. 420 Hamamatsu hybrid avalanche photo sensors with 144 channels each will be used to read out single Cherenkov photons with high efficiency. More than 60,000 analog signals will be digitized and processed in the front end electronics and send to the unified experiment data acquisition system. The detector components have been successfully produced and are now being installed in the spectrometer. Tested before on the bench, they are currently being installed in the mechanical frame. Part of the detector have been commissioned and connected to the acquisition system to register the cosmic ray particles. The first preliminary results are in accordance with previous expectations. We expect an excellent performance of the device which will allow at least a 4σ separation of pions from kaons in the experiment kinematic region from 0.5 GeV/c to 4 GeV/c.

DOE Office of Scientific and Technical Information (OSTI.GOV)

Agnes, P.; Agostino, L.; Albuquerque, I. F. M.

DarkSide-50 is a detector for dark matter candidates in the form of weakly interacting massive particles. It utilizes a liquid argon time projection chamber for the inner main detector, surrounded by a liquid scintillator veto (LSV) and a water Cherenkov veto detector (WCV). The LSV and WCV act as the neutron and cosmogenic muon veto detectors for DarkSide-50. This paper describes the electronics and data acquisition system used for these two detectors. The system is made of a custom built front end electronics and commercial National Instruments high speed digitizers. The front end electronics, the DAQ, and the trigger systemmore » have been used to acquire data in the form of zero-suppressed waveform samples from the 110 PMTs of the LSV and the 80 PMTs of the WCV. The veto DAQ system has proven its performance and reliability. This electronics and DAQ system can be scaled and used as it is for the veto of the next generation DarkSide-20k detector. Abstract (arXiv)« less

A Low Cost Bluetooth Low Energy Transceiver for Wireless Sensor Network Applications with a Front-end Receiver-Matching Network-Reusing Power Amplifier Load Inductor.

PubMed

Liang, Zhen; Li, Bin; Huang, Mo; Zheng, Yanqi; Ye, Hui; Xu, Ken; Deng, Fangming

2017-04-19

In this work, a low cost Bluetooth Low Energy (BLE) transceiver for wireless sensor network (WSN) applications, with a receiver (RX)-matching network-reusing power amplifier (PA) load inductor, is presented. In order to decrease the die area, only two inductors were used in this work. Besides the one used in the voltage control oscillator (VCO), the PA load inductor was reused as the RX impedance matching component in the front-end. Proper controls have been applied to achieve high transmitter (TX) input impedance when the transceiver is in the receiving mode, and vice versa. This allows the TRX-switch/matching network integration without significant performance degradation. The RX adopted a low-IF structure and integrated a single-ended low noise amplifier (LNA), a current bleeding mixer, a 4th complex filter and a delta-sigma continuous time (CT) analog-to-digital converter (ADC). The TX employed a two-point PLL-based architecture with a non-linear PA. The RX achieved a sensitivity of -93 dBm and consumes 9.7 mW, while the TX achieved a 2.97% error vector magnitude (EVM) with 9.4 mW at 0 dBm output power. This design was fabricated in a 0.11 μm complementary metal oxide semiconductor (CMOS) technology and the front-end circuit only occupies 0.24 mm². The measurement results verify the effectiveness and applicability of the proposed BLE transceiver for WSN applications.

Fully Integrated Passive UHF RFID Tag for Hash-Based Mutual Authentication Protocol

PubMed Central

Mikami, Shugo; Watanabe, Dai; Li, Yang; Sakiyama, Kazuo

2015-01-01

Passive radio-frequency identification (RFID) tag has been used in many applications. While the RFID market is expected to grow, concerns about security and privacy of the RFID tag should be overcome for the future use. To overcome these issues, privacy-preserving authentication protocols based on cryptographic algorithms have been designed. However, to the best of our knowledge, evaluation of the whole tag, which includes an antenna, an analog front end, and a digital processing block, that runs authentication protocols has not been studied. In this paper, we present an implementation and evaluation of a fully integrated passive UHF RFID tag that runs a privacy-preserving mutual authentication protocol based on a hash function. We design a single chip including the analog front end and the digital processing block. We select a lightweight hash function supporting 80-bit security strength and a standard hash function supporting 128-bit security strength. We show that when the lightweight hash function is used, the tag completes the protocol with a reader-tag distance of 10 cm. Similarly, when the standard hash function is used, the tag completes the protocol with the distance of 8.5 cm. We discuss the impact of the peak power consumption of the tag on the distance of the tag due to the hash function. PMID:26491714

A 16-Channel CMOS Chopper-Stabilized Analog Front-End ECoG Acquisition Circuit for a Closed-Loop Epileptic Seizure Control System.

PubMed

Wu, Chung-Yu; Cheng, Cheng-Hsiang; Chen, Zhi-Xin

2018-06-01

In this paper, a 16-channel analog front-end (AFE) electrocorticography signal acquisition circuit for a closed-loop seizure control system is presented. It is composed of 16 input protection circuits, 16 auto-reset chopper-stabilized capacitive-coupled instrumentation amplifiers (AR-CSCCIA) with bandpass filters, 16 programmable transconductance gain amplifiers, a multiplexer, a transimpedance amplifier, and a 128-kS/s 10-bit delta-modulated successive-approximation-register analog-to-digital converter (SAR ADC). In closed-loop seizure control system applications, the stimulator shares the same electrode with the AFE amplifier for effective suppression of epileptic seizures. To prevent from overstress in MOS devices caused by high stimulation voltage, an input protection circuit with a high-voltage-tolerant switch is proposed for the AFE amplifier. Moreover, low input-referred noise is achieved by using the chopper modulation technique in the AR-CSCCIA. To reduce the undesired effects of chopper modulation, an improved offset reduction loop is proposed to reduce the output offset generated by input chopper mismatches. The digital ripple reduction loop is also used to reduce the chopper ripple. The fabricated AFE amplifier has 49.1-/59.4-/67.9-dB programmable gain and 2.02-μVrms input referred noise in a bandwidth of 0.59-117 Hz. The measured power consumption of the AFE amplifier is 3.26 μW per channel, and the noise efficiency factor is 3.36. The in vivo animal test has been successfully performed to verify the functions. It is shown that the proposed AFE acquisition circuit is suitable for implantable closed-loop seizure control systems.

The front-end data conversion and readout electronics for the CMS ECAL upgrade

NASA Astrophysics Data System (ADS)

Mazza, G.; Cometti, S.

2018-03-01

The High Luminosity LHC (HL-LHC) will require a significant upgrade of the readout electronics for the CMS Electromagnetic Calorimeter (ECAL). The Very Front-End (VFE) output signal will be sampled at 160 MS/s (i.e. four times the current sampling rate) with a 13 bits resolution. Therefore, a high-speed, high-resolution ADC is required. Moreover, each readout channel will produce 2.08 Gb/s, thus requiring a fast data transmission circuitry. A new readout architecture, based on two 12 bit, 160 MS/s ADCs, lossless data compression algorithms and fast serial links have been developed for the ECAL upgrade. These functions will be integrated in a single ASIC which is currently under design in a commercial CMOS 65 nm technology using radiation damage mitigation techniques.

A front-end read out chip for the OPERA scintillator tracker

NASA Astrophysics Data System (ADS)

Lucotte, A.; Bondil, S.; Borer, K.; Campagne, J. E.; Cazes, A.; Hess, M.; de La Taille, C.; Martin-Chassard, G.; Raux, L.; Repellin, J. P.

2004-04-01

Multi-anode photomultipliers H7546 are used to readout signal from the OPERA Scintillator Tracker (CERN/SPSC 2000-028, SPSC/P318, LNGSP 25/2000; CERN/SPSC 2001-025, SPSC/M668, LNGS-EXP30/2001). A 32-channel front-end Read Out Chip prototype accommodating the H7546 has been designed at LAL. This device features a low-noise, variable gain preamplifier to correct for multi-anode non-uniformity, an auto-trigger capability 100% efficient at a 0.3 photo-electron, and a charge measurement extending over a large dynamic range [0-100] photo-electrons. In this article we describe the ASIC architecture that is being implemented for the Target Tracker in OPERA, with a special emphasis put on the designs and the measured performance.

Removing non-stationary noise in spectrum sensing using matrix factorization

NASA Astrophysics Data System (ADS)

van Bloem, Jan-Willem; Schiphorst, Roel; Slump, Cornelis H.

2013-12-01

Spectrum sensing is key to many applications like dynamic spectrum access (DSA) systems or telecom regulators who need to measure utilization of frequency bands. The International Telecommunication Union (ITU) recommends a 10 dB threshold above the noise to decide whether a channel is occupied or not. However, radio frequency (RF) receiver front-ends are non-ideal. This means that the obtained data is distorted with noise and imperfections from the analog front-end. As part of the front-end the automatic gain control (AGC) circuitry mainly affects the sensing performance as strong adjacent signals lift the noise level. To enhance the performance of spectrum sensing significantly we focus in this article on techniques to remove the noise caused by the AGC from the sensing data. In order to do this we have applied matrix factorization techniques, i.e., SVD (singular value decomposition) and NMF (non-negative matrix factorization), which enables signal space analysis. In addition, we use live measurement results to verify the performance and to remove the effects of the AGC from the sensing data using above mentioned techniques, i.e., applied on block-wise available spectrum data. In this article it is shown that the occupancy in the industrial, scientific and medical (ISM) band, obtained by using energy detection (ITU recommended threshold), can be an overestimation of spectrum usage by 60%.

PCI/iRMX-Based Front-End Data Acquisition for the HT-7U Experiment

NASA Astrophysics Data System (ADS)

Shu, Yantai; Luo, Jiarong; Yan, Jianbing; Zhao, Feng; Zhang, Liang

2004-06-01

A PCI/iRMX-based front-end system is being designed to serve as data acquisition (DAQ) subsystem for the HT-7U superconducting tokamak. The diagnostic instruments are connected to four analog-to-digital converter (ADC) boards that are directly plugged into the peripheral component interconnect (PCI) bus of a personal computer (PC) running the iRMX real-time operating system. Each ADC board has eight channels. The sampling rate of each channel can be up to 125 K samples per second. The acquired data are directly transferred from the ADC board into the memory of the PC, and then transferred to servers through the network. As a testbed, one PCI/iRMX subsystem has been built and has acquired data from the existing HT-7 tokamak. The DAQ can easily support a wide range of pulse lengths, even matching extremely long pulse and steady-state operation. This paper describes the system design and performance evaluation in detail.

Development of a front-end analog circuit for multi-channel SiPM readout and performance verification for various PET detector designs

NASA Astrophysics Data System (ADS)

Ko, Guen Bae; Yoon, Hyun Suk; Kwon, Sun Il; Lee, Chan Mi; Ito, Mikiko; Hong, Seong Jong; Lee, Dong Soo; Lee, Jae Sung

2013-03-01

Silicon photomultipliers (SiPMs) are outstanding photosensors for the development of compact imaging devices and hybrid imaging systems such as positron emission tomography (PET)/ magnetic resonance (MR) scanners because of their small size and MR compatibility. The wide use of this sensor for various types of scintillation detector modules is being accelerated by recent developments in tileable multichannel SiPM arrays. In this work, we present the development of a front-end readout module for multi-channel SiPMs. This readout module is easily extendable to yield a wider detection area by the use of a resistive charge division network (RCN). We applied this readout module to various PET detectors designed for use in small animal PET/MR, optical fiber PET/MR, and double layer depth of interaction (DOI) PET. The basic characteristics of these detector modules were also investigated. The results demonstrate that the PET block detectors developed using the readout module and tileable multi-channel SiPMs had reasonable performance.

Preliminary design and implementation of the baseline digital baseband architecture for advanced deep space transponders

NASA Technical Reports Server (NTRS)

Nguyen, T. M.; Yeh, H.-G.

1993-01-01

The baseline design and implementation of the digital baseband architecture for advanced deep space transponders is investigated and identified. Trade studies on the selection of the number of bits for the analog-to-digital converter (ADC) and optimum sampling schemes are presented. In addition, the proposed optimum sampling scheme is analyzed in detail. Descriptions of possible implementations for the digital baseband (or digital front end) and digital phase-locked loop (DPLL) for carrier tracking are also described.

Asymmetric Multilevel Outphasing (AMO): A New Architecture for All-Silicon mm-Wave Transmitter ICs

DTIC Science & Technology

2015-06-12

power-amplifiers for mobile basestation infrastructure and handsets. NanoSemi Inc. designs linearization solutions for analog front-ends such as...ward flexible, multi-standard radio chips, increases the need for high-precision, high-throughput and energy-efficient backend processing. The desire...peak PAE is affected by less than 1% (46 mW/(46 mW 1.8 W/0.4)) by this 64-QAM capable AMO SCS backend . 378 IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 48

Algorithm for fast event parameters estimation on GEM acquired data

NASA Astrophysics Data System (ADS)

Linczuk, Paweł; Krawczyk, Rafał D.; Poźniak, Krzysztof T.; Kasprowicz, Grzegorz; Wojeński, Andrzej; Chernyshova, Maryna; Czarski, Tomasz

2016-09-01

We present study of a software-hardware environment for developing fast computation with high throughput and low latency methods, which can be used as back-end in High Energy Physics (HEP) and other High Performance Computing (HPC) systems, based on high amount of input from electronic sensor based front-end. There is a parallelization possibilities discussion and testing on Intel HPC solutions with consideration of applications with Gas Electron Multiplier (GEM) measurement systems presented in this paper.

Electronic drive and acquisition system for mass spectrometry

NASA Technical Reports Server (NTRS)

Schaefer, Rembrandt Thomas (Inventor); Chutjian, Ara (Inventor); Tran, Tuan (Inventor); Madzunkov, Stojan M. (Inventor); Thomas, John L. (Inventor); Mojarradi, Mohammad (Inventor); MacAskill, John (Inventor); Blaes, Brent R. (Inventor); Darrach, Murray R. (Inventor); Burke, Gary R. (Inventor)

2010-01-01

The present invention discloses a mixed signal RF drive electronics board that offers small, low power, reliable, and customizable method for driving and generating mass spectra from a mass spectrometer, and for control of other functions such as electron ionizer, ion focusing, single-ion detection, multi-channel data accumulation and, if desired, front-end interfaces such as pumps, valves, heaters, and columns.

Electronics and triggering challenges for the CMS High Granularity Calorimeter

NASA Astrophysics Data System (ADS)

Lobanov, A.

2018-02-01

The High Granularity Calorimeter (HGCAL), presently being designed by the CMS collaboration to replace the CMS endcap calorimeters for the High Luminosity phase of LHC, will feature six million channels distributed over 52 longitudinal layers. The requirements for the front-end electronics are extremely challenging, including high dynamic range (0.2 fC-10 pC), low noise (~2000 e- to be able to calibrate on single minimum ionising particles throughout the detector lifetime) and low power consumption (~20 mW/channel), as well as the need to select and transmit trigger information with a high granularity. Exploiting the intrinsic precision-timing capabilities of silicon sensors also requires careful design of the front-end electronics as well as the whole system, particularly clock distribution. The harsh radiation environment and requirement to keep the whole detector as dense as possible will require novel solutions to the on-detector electronics layout. Processing the data from the HGCAL imposes equally large challenges on the off-detector electronics, both for the hardware and incorporated algorithms. We present an overview of the complete electronics architecture, as well as the performance of prototype components and algorithms.

Actuation stability test of the LISA pathfinder inertial sensor front-end electronics

NASA Astrophysics Data System (ADS)

Mance, Davor; Gan, Li; Weber, Bill; Weber, Franz; Zweifel, Peter

In order to limit the residual stray forces on the inertial sensor test mass in LISA pathfinder, √ it is required that the fluctuation of the test mass actuation voltage is within 2ppm/ Hz. The actuation voltage stability test on the flight hardware of the inertial sensor front-end electronics (IS FEE) is presented in this paper. This test is completed during the inertial sensor integration at EADS Astrium Friedrichshafen, Germany. The standard measurement method using voltmeter is not sufficient for verification, since the instrument low frequency √ fluctuation is higher than the 2ppm/ Hz requirement. In this test, by using the differential measurement method and the lock-in amplifier, the actuation stability performance is verified and the quality of the IS FEE hardware is confirmed by the test results.

A miniature bidirectional telemetry system for in-vivo gastric slow wave recordings

PubMed Central

Farajidavar, Aydin; O’Grady, Gregory; Rao, Smitha M.N.; Cheng, Leo K; Abell, Thomas; Chiao, J.-C.

2012-01-01

Stomach contractions are initiated and coordinated by an underlying electrical activity (slow waves), and electrical dysrhythmias accompany motility diseases. Electrical recordings taken directly from the stomach provide the most valuable data, but face technical constraints. Serosal or mucosal electrodes have cables that traverse the abdominal wall, or a natural orifice, causing discomfort and possible infection, and restricting mobility. These problems motivated the development of a wireless system. The bidirectional telemetric system constitutes a front-end transponder, a back-end receiver and a graphical user interface. The front-end module conditions the analog signals, then digitizes and loads the data into a radio for transmission. Data receipt at the back-end is acknowledged via a transceiver function. The system was validated in a bench-top study, then validated in-vivo using serosal electrodes connected simultaneously to a commercial wired system. The front-end module was 35×35×27 mm3 and weighed 20 g. Bench-top tests demonstrated reliable communication within a distance range of 30 m, power consumption of 13.5 mW, and 124-hour operation when utilizing a 560-mAh, 3-V battery. In-vivo, slow wave frequencies were recorded identically with the wireless and wired reference systems (2.4 cycles/min), automated activation time detection was modestly better for the wireless system (5% vs 14% false positive rate), and signal amplitudes were modestly higher via the wireless system (462 vs 386 μV; p<0.001). This telemetric system for slow wave acquisition is reliable, power efficient, readily portable and potentially implantable. The device will enable chronic monitoring and evaluation of slow wave patterns in animals and patients. PMID:22635054

Development and evaluation of a comprehensive clinical decision support taxonomy: comparison of front-end tools in commercial and internally developed electronic health record systems

PubMed Central

Sittig, Dean F; Ash, Joan S; Feblowitz, Joshua; Meltzer, Seth; McMullen, Carmit; Guappone, Ken; Carpenter, Jim; Richardson, Joshua; Simonaitis, Linas; Evans, R Scott; Nichol, W Paul; Middleton, Blackford

2011-01-01

Background Clinical decision support (CDS) is a valuable tool for improving healthcare quality and lowering costs. However, there is no comprehensive taxonomy of types of CDS and there has been limited research on the availability of various CDS tools across current electronic health record (EHR) systems. Objective To develop and validate a taxonomy of front-end CDS tools and to assess support for these tools in major commercial and internally developed EHRs. Study design and methods We used a modified Delphi approach with a panel of 11 decision support experts to develop a taxonomy of 53 front-end CDS tools. Based on this taxonomy, a survey on CDS tools was sent to a purposive sample of commercial EHR vendors (n=9) and leading healthcare institutions with internally developed state-of-the-art EHRs (n=4). Results Responses were received from all healthcare institutions and 7 of 9 EHR vendors (response rate: 85%). All 53 types of CDS tools identified in the taxonomy were found in at least one surveyed EHR system, but only 8 functions were present in all EHRs. Medication dosing support and order facilitators were the most commonly available classes of decision support, while expert systems (eg, diagnostic decision support, ventilator management suggestions) were the least common. Conclusion We developed and validated a comprehensive taxonomy of front-end CDS tools. A subsequent survey of commercial EHR vendors and leading healthcare institutions revealed a small core set of common CDS tools, but identified significant variability in the remainder of clinical decision support content. PMID:21415065

On Emulation of Flueric Devices in Excitable Chemical Medium

PubMed Central

Adamatzky, Andrew

2016-01-01

Flueric devices are fluidic devices without moving parts. Fluidic devices use fluid as a medium for information transfer and computation. A Belousov-Zhabotinsky (BZ) medium is a thin-layer spatially extended excitable chemical medium which exhibits travelling excitation wave-fronts. The excitation wave-fronts transfer information. Flueric devices compute via jets interaction. BZ devices compute via excitation wave-fronts interaction. In numerical model of BZ medium we show that functions of key flueric devices are implemented in the excitable chemical system: signal generator, and, xor, not and nor Boolean gates, delay elements, diodes and sensors. Flueric devices have been widely used in industry since late 1960s and are still employed in automotive and aircraft technologies. Implementation of analog of the flueric devices in the excitable chemical systems opens doors to further applications of excitation wave-based unconventional computing in soft robotics, embedded organic electronics and living technologies. PMID:27997561

On Emulation of Flueric Devices in Excitable Chemical Medium.

PubMed

Adamatzky, Andrew

2016-01-01

Flueric devices are fluidic devices without moving parts. Fluidic devices use fluid as a medium for information transfer and computation. A Belousov-Zhabotinsky (BZ) medium is a thin-layer spatially extended excitable chemical medium which exhibits travelling excitation wave-fronts. The excitation wave-fronts transfer information. Flueric devices compute via jets interaction. BZ devices compute via excitation wave-fronts interaction. In numerical model of BZ medium we show that functions of key flueric devices are implemented in the excitable chemical system: signal generator, and, xor, not and nor Boolean gates, delay elements, diodes and sensors. Flueric devices have been widely used in industry since late 1960s and are still employed in automotive and aircraft technologies. Implementation of analog of the flueric devices in the excitable chemical systems opens doors to further applications of excitation wave-based unconventional computing in soft robotics, embedded organic electronics and living technologies.

MATLAB/Simulink Pulse-Echo Ultrasound System Simulator Based on Experimentally Validated Models.

PubMed

Kim, Taehoon; Shin, Sangmin; Lee, Hyongmin; Lee, Hyunsook; Kim, Heewon; Shin, Eunhee; Kim, Suhwan

2016-02-01

A flexible clinical ultrasound system must operate with different transducers, which have characteristic impulse responses and widely varying impedances. The impulse response determines the shape of the high-voltage pulse that is transmitted and the specifications of the front-end electronics that receive the echo; the impedance determines the specification of the matching network through which the transducer is connected. System-level optimization of these subsystems requires accurate modeling of pulse-echo (two-way) response, which in turn demands a unified simulation of the ultrasonics and electronics. In this paper, this is realized by combining MATLAB/Simulink models of the high-voltage transmitter, the transmission interface, the acoustic subsystem which includes wave propagation and reflection, the receiving interface, and the front-end receiver. To demonstrate the effectiveness of our simulator, the models are experimentally validated by comparing the simulation results with the measured data from a commercial ultrasound system. This simulator could be used to quickly provide system-level feedback for an optimized tuning of electronic design parameters.

The New APD Based Readout for the Crystal Barrel Calorimeter

NASA Astrophysics Data System (ADS)

Urban, M.; Honisch, Ch; Steinacher, M.; CBELSA/TAPS Collaboration

2015-02-01

The CBELSA/TAPS experiment at ELSA measures double polarization observables in meson photoproduction off protons and neutrons. To be able to measure purely neutral reactions off polarized neutrons with high efficiency, the main calorimeter has to be integrated into the first level trigger. This requires to exchange the existing PIN photo diode by a new avalanche photo diode (APD) readout. The newly developed readout electronics will provide an energy resolution compatible to the previous set-up and a fast trigger signal down to 10 MeV energy deposit per crystal. After the successful final tests with a 3x3 CsI crystal matrix in Bonn at ELSA and in Mainz at MAMI all front-end electronics were produced in fall 2013. Automated test routines for the front-end electronics were developed and the characterization measurements of all APDs were successfully accomplished in Bonn. The project is supported by the Deutsche Forschungsgemeinschaft (SFB/TR16) and Schweizerischer Nationalfonds.

NECTAR: New electronics for the Cherenkov Telescope Array

NASA Astrophysics Data System (ADS)

Naumann, Christopher Lindsay; Bolmont, J.; Corona, P.; Delagnes, E.; Dzahini, D.; Feinstein, F.; Gascon, D.; Glicenstein, J.-F.; Nayman, P.; Rarbi, F.; Ribo, M.; Sanuy, A.; Siero, X.; Tavernet, J.-P.; Toussenel, F.; Vincent, P.; Vorobiov, S.

2012-12-01

The international CTA consortium is currently in the preparatory phase for the development of the next-generation Cherenkov Telescope Array (CTA [1]), based on the return of experience from the three major current-generation arrays H.E.S.S., MAGIC and VERITAS. To achieve an unprecedented sensitivity and energy range for TeV gamma rays, a new kind of flexible and powerful yet inexpensive front-end hardware will be required for the order of 105 channels of photodetectors in up to 100 telescopes. One possible solution is the NECTAr (New Electronics for the Cherenkov Telescope Array) system, based on the integration of as much as possible of the front-end electronics (amplifiers, fast analogue samplers, memory and ADCs) into a single ASIC for very fast readout performance and a significant reduction of the cost and the lower consumption per channel, while offering a high degree of flexibility both for the triggering and the readout of the telescope. The current status of its development is presented, along with newest results from measurements and simulation studies.

Developing Electronic Performance Support Systems for Professionals.

ERIC Educational Resources Information Center

Law, Michael P.; And Others

This paper discusses a variety of development strategies and issues involved in the development of electronic performance support systems (EPSS) for professionals. The topics of front-end analysis, development, and evaluation are explored in the context of a case study involving the development of an EPSS to support teachers in the use of…

AN INTERNET RACK MONITOR-CONTROLLER FOR APS LINAC RF ELECTRONICS UPGRADE

DOE Office of Scientific and Technical Information (OSTI.GOV)

Ma, Hengjie; Smith, Terry; Nassiri, Alireza

To support the research and development in APS LINAC area, the existing LINAC rf control performance needs to be much improved, and thus an upgrade of the legacy LINAC rf electronics becomes necessary. The proposed upgrade plan centers on the concept of using a modern, network-attached, rackmount digital electronics platform –Internet Rack Monitor-Controller (or IRMC) to achieve the goal of modernizing the rf electronics at a lower cost. The system model of the envisioned IRMC is basically a 3-tier stack with a high-performance DSP in the mid-layer to perform the core tasks of real-time rf data processing and controls. Themore » Digital Front-End (DFE) attachment layer at bottom bridges the applicationspecific rf front-ends to the DSP. A network communication gateway, together with an embedded event receiver (EVR) in the top layer merges the Internet Rack MonitorController node into the networks of the accelerator controls infrastructure. Although the concept is very much in trend with today’s Internet-of-Things (IoT), this implementation has actually been used in the accelerators for over two decades.« less

The Phase-2 electronics upgrade of the ATLAS liquid argon calorimeter system

NASA Astrophysics Data System (ADS)

Vachon, B.

2018-03-01

The LHC high-luminosity upgrade in 2024-2026 requires the associated detectors to operate at luminosities about 5-7 times larger than assumed in their original design. The pile-up is expected to increase to up to 200 events per proton bunch-crossing. The current readout of the ATLAS liquid argon calorimeters does not provide sufficient buffering and bandwidth capabilities to accommodate the hardware triggers requirements imposed by these harsh conditions. Furthermore, the expected total radiation doses are beyond the qualification range of the current front-end electronics. For these reasons an almost complete replacement of the front-end and off-detector readout system is foreseen for the 182,468 readout channels. The new readout system will be based on a free-running architecture, where calorimeter signals are amplified, shaped and digitized by on-detector electronics, then sent at 40 MHz to the off-detector electronics for further processing. Results from the design studies on the performance of the components of the readout system are presented, as well as the results of the tests of the first prototypes.

Exploration of maximum count rate capabilities for large-area photon counting arrays based on polycrystalline silicon thin-film transistors

NASA Astrophysics Data System (ADS)

Liang, Albert K.; Koniczek, Martin; Antonuk, Larry E.; El-Mohri, Youcef; Zhao, Qihua

2016-03-01

Pixelated photon counting detectors with energy discrimination capabilities are of increasing clinical interest for x-ray imaging. Such detectors, presently in clinical use for mammography and under development for breast tomosynthesis and spectral CT, usually employ in-pixel circuits based on crystalline silicon - a semiconductor material that is generally not well-suited for economic manufacture of large-area devices. One interesting alternative semiconductor is polycrystalline silicon (poly-Si), a thin-film technology capable of creating very large-area, monolithic devices. Similar to crystalline silicon, poly-Si allows implementation of the type of fast, complex, in-pixel circuitry required for photon counting - operating at processing speeds that are not possible with amorphous silicon (the material currently used for large-area, active matrix, flat-panel imagers). The pixel circuits of two-dimensional photon counting arrays are generally comprised of four stages: amplifier, comparator, clock generator and counter. The analog front-end (in particular, the amplifier) strongly influences performance and is therefore of interest to study. In this paper, the relationship between incident and output count rate of the analog front-end is explored under diagnostic imaging conditions for a promising poly-Si based design. The input to the amplifier is modeled in the time domain assuming a realistic input x-ray spectrum. Simulations of circuits based on poly-Si thin-film transistors are used to determine the resulting output count rate as a function of input count rate, energy discrimination threshold and operating conditions.

Development of a 3D CZT detector prototype for Laue Lens telescope

NASA Astrophysics Data System (ADS)

Caroli, Ezio; Auricchio, Natalia; Del Sordo, Stefano; Abbene, Leonardo; Budtz-Jørgensen, Carl; Casini, Fabio; Curado da Silva, Rui M.; Kuvvetlli, Irfan; Milano, Luciano; Natalucci, Lorenzo; Quadrini, Egidio M.; Stephen, John B.; Ubertini, Pietro; Zanichelli, Massimiliano; Zappettini, Andrea

2010-07-01

We report on the development of a 3D position sensitive prototype suitable as focal plane detector for Laue lens telescope. The basic sensitive unit is a drift strip detector based on a CZT crystal, (~19×8 mm2 area, 2.4 mm thick), irradiated transversally to the electric field direction. The anode side is segmented in 64 strips, that divide the crystal in 8 independent sensor (pixel), each composed by one collecting strip and 7 (one in common) adjacent drift strips. The drift strips are biased by a voltage divider, whereas the anode strips are held at ground. Furthermore, the cathode is divided in 4 horizontal strips for the reconstruction of the third interaction position coordinate. The 3D prototype will be made by packing 8 linear modules, each composed by one basic sensitive unit, bonded on a ceramic layer. The linear modules readout is provided by a custom front end electronics implementing a set of three RENA-3 for a total of 128 channels. The front-end electronics and the operating logics (in particular coincidence logics for polarisation measurements) are handled by a versatile and modular multi-parametric back end electronics developed using FPGA technology.

Front-end circuit for position sensitive silicon and vacuum tube photomultipliers with gain control and depth of interaction measurement

NASA Astrophysics Data System (ADS)

Herrero, Vicente; Colom, Ricardo; Gadea, Rafael; Lerche, Christoph W.; Cerdá, Joaquín; Sebastiá, Ángel; Benlloch, José M.

2007-06-01

Silicon Photomultipliers, though still under development for mass production, may be an alternative to traditional Vacuum Photomultipliers Tubes (VPMT). As a consequence, electronic front-ends initially designed for VPMT will need to be modified. In this simulation, an improved architecture is presented which is able to obtain impact position and depth of interaction of a gamma ray within a continuous scintillation crystal, using either kind of PM. A current sensitive preamplifier stage with individual gain adjustment interfaces the multi-anode PM outputs with a current division resistor network. The preamplifier stage allows to improve front-end processing delay and temporal resolution behavior as well as to increase impact position calculation resolution. Depth of interaction (DOI) is calculated from the width of the scintillation light distribution, which is related to the sum of voltages in resistor network input nodes. This operation is done by means of a high-speed current mode scheme.

A new data acquisition system for the CMS Phase 1 pixel detector

NASA Astrophysics Data System (ADS)

Kornmayer, A.

2016-12-01

A new pixel detector will be installed in the CMS experiment during the extended technical stop of the LHC at the beginning of 2017. The new pixel detector, built from four layers in the barrel region and three layers on each end of the forward region, is equipped with upgraded front-end readout electronics, specifically designed to handle the high particle hit rates created in the LHC environment. The DAQ back-end was entirely redesigned to handle the increased number of readout channels, the higher data rates per channel and the new digital data format. Based entirely on the microTCA standard, new front-end controller (FEC) and front-end driver (FED) cards have been developed, prototyped and produced with custom optical link mezzanines mounted on the FC7 AMC and custom firmware. At the same time as the new detector is being assembled, the DAQ system is set up and its integration into the CMS central DAQ system tested by running the pilot blade detector already installed in CMS. This work describes the DAQ system, integration tests and gives an outline for the activities up to commissioning the final system at CMS in 2017.

Development of a 32-channel ASIC for an X-ray APD detector onboard the ISS

NASA Astrophysics Data System (ADS)

Arimoto, Makoto; Harita, Shohei; Sugita, Satoshi; Yatsu, Yoichi; Kawai, Nobuyuki; Ikeda, Hirokazu; Tomida, Hiroshi; Isobe, Naoki; Ueno, Shiro; Mihara, Tatehiro; Serino, Motoko; Kohmura, Takayoshi; Sakamoto, Takanori; Yoshida, Atsumasa; Tsunemi, Hiroshi; Hatori, Satoshi; Kume, Kyo; Hasegawa, Takashi

2018-02-01

We report on the design and performance of a mixed-signal application specific integrated circuit (ASIC) dedicated to avalanche photodiodes (APDs) in order to detect hard X-ray emissions in a wide energy band onboard the International Space Station. To realize wide-band detection from 20 keV to 1 MeV, we use Ce:GAGG scintillators, each coupled to an APD, with low-noise front-end electronics capable of achieving a minimum energy detection threshold of 20 keV. The developed ASIC has the ability to read out 32-channel APD signals using 0.35 μm CMOS technology, and an analog amplifier at the input stage is designed to suppress the capacitive noise primarily arising from the large detector capacitance of the APDs. The ASIC achieves a performance of 2099 e- + 1.5 e-/pF at root mean square (RMS) with a wide 300 fC dynamic range. Coupling a reverse-type APD with a Ce:GAGG scintillator, we obtain an energy resolution of 6.7% (FWHM) at 662 keV and a minimum detectable energy of 20 keV at room temperature (20 °C). Furthermore, we examine the radiation tolerance for space applications by using a 90 MeV proton beam, confirming that the ASIC is free of single-event effects and can operate properly without serious degradation in analog and digital processing.

Reconfigurable Multiparameter Biosignal Acquisition SoC for Low Power Wearable Platform

PubMed Central

Kim, Jongpal; Ko, Hyoungho

2016-01-01

A low power and low noise reconfigurable analog front-end (AFE) system on a chip (SoC) for biosignal acquisition is presented. The presented AFE can be reconfigured for use in electropotential, bioimpedance, electrochemical, and photoelectrical modes. The advanced healthcare services based on multiparameter physiological biosignals can be easily implemented with these multimodal and highly reconfigurable features of the proposed system. The reconfigurable gain and input referred noise of the core instrumentation amplifier block are 25 dB to 52 dB, and 1 μVRMS, respectively. The power consumption of the analog blocks in one readout channel is less than 52 μW. The reconfigurable capability among various modes of applications including electrocardiogram, blood glucose concentration, respiration, and photoplethysmography are shown experimentally. PMID:27898004

Externally-Modulated Electro-Optically Coupled Detector Architecture for Nuclear Physics Instrumentation

NASA Astrophysics Data System (ADS)

Xi, Wenze; McKisson, J. E.; Weisenberger, Andrew G.; Zhang, Shukui; Zorn, Carl

2014-06-01

A new laser-based externally-modulated electro-optically coupled detector (EOCD) architecture is being developed to enable high-density readout for radiation detectors with accurate analog radiation pulse shape and timing preservation. Unlike digital conversion before electro-optical modulation, the EOCD implements complete analog optical signal modulation and multiplexing in its detector front-end. The result is a compact, high performance detector readout that can be both radiation tolerant and immune to magnetic fields. In this work, the feasibility of EOCD was explored by constructing a two-wavelength laser-based externally-modulated EOCD, and testing analog pulse shape preservation and wavelength-division multiplexing (WDM) crosstalk. Comparisons were first made between the corresponding initial pulses and the electro-optically coupled analog pulses. This confirmed an excellent analog pulse preservation over 29% of the modulator's switching voltage range. Optical spectrum analysis revealed less than -14 dB crosstalk with 1.2 nm WDM wavelength bandgap, and provided insight on experimental conditions that could lead to increased inter-wavelength crosstalk. Further discussions and previous research on the radiation tolerance and magnetic field immunity of the candidate materials were also given, and quantitative device testing is proposed in the future.

THE POSSIBLE ROLE OF CORONAL STREAMERS AS MAGNETICALLY CLOSED STRUCTURES IN SHOCK-INDUCED ENERGETIC ELECTRONS AND METRIC TYPE II RADIO BURSTS

DOE Office of Scientific and Technical Information (OSTI.GOV)

Kong, Xiangliang; Chen, Yao; Feng, Shiwei

2015-01-10

Two solar type II radio bursts, separated by ∼24 hr in time, are examined together. Both events are associated with coronal mass ejections (CMEs) erupting from the same active region (NOAA 11176) beneath a well-observed helmet streamer. We find that the type II emissions in both events ended once the CME/shock fronts passed the white-light streamer tip, which is presumably the magnetic cusp of the streamer. This leads us to conjecture that the closed magnetic arcades of the streamer may play a role in electron acceleration and type II excitation at coronal shocks. To examine such a conjecture, we conduct a test-particle simulationmore » for electron dynamics within a large-scale partially closed streamer magnetic configuration swept by a coronal shock. We find that the closed field lines play the role of an electron trap via which the electrons are sent back to the shock front multiple times and therefore accelerated to high energies by the shock. Electrons with an initial energy of 300 eV can be accelerated to tens of keV concentrating at the loop apex close to the shock front with a counter-streaming distribution at most locations. These electrons are energetic enough to excite Langmuir waves and radio bursts. Considering the fact that most solar eruptions originate from closed field regions, we suggest that the scenario may be important for the generation of more metric type IIs. This study also provides an explanation of the general ending frequencies of metric type IIs at or above 20-30 MHz and the disconnection issue between metric and interplanetary type IIs.« less

Performance of GEM Detectors in the DarkLight Experiment at LERF

NASA Astrophysics Data System (ADS)

Mohammed Prem Nazeer, Sahara Jesmin; DarkLight Collaboration

2017-01-01

The DarkLight experiment has been proposed to search for a heavy photon A' in the mass range of 10-100 MeV/c2 produced in electron-proton collisions. Phase-I of DarkLight has started to take place in 2016 at the Low Energy Recirculator Facility (LERF) at Jefferson Lab. LERF delivered a 100 MeV electron beam onto a windowless hydrogen gas target. The phase-I detector tracks leptons inside the DarkLight solenoid with a set of Gas Electron Multiplier (GEM) detectors, combined with segmented scintillators for triggering. The GEM telescope consists of four 10 × 10 cm2 triple layer GEM chambers with 2D readout strips, mounted in a slightly angled fixed frame about 12 cm tall. The GEM data are read out with analog pipeline front-end cards (APV-25) each of which can process 128 readout channels. Each GEM chamber has 250 channels for each coordinate axis, read out with two APVs on each side, resulting in 2000 readout channels for the GEM stack, processed by 16 APVs. One Multi Purpose Digitizer (MPD) module is used to read out all of the 16 APV-25 cards. The current run status of DarkLight experiment and the performance of GEMs in the experiment will be discussed. This work has been supported by NSF PHY-1436680 and PHY-1505934.

Noise propagation issues in Belle II pixel detector power cable

NASA Astrophysics Data System (ADS)

Iglesias, M.; Arteche, F.; Echeverria, I.; Pradas, A.; Rivetta, C.; Moser, H.-G.; Kiesling, C.; Rummel, S.; Arcega, F. J.

2018-04-01

The vertex detector used in the upgrade of High-Energy physics experiment Belle II includes DEPFET pixel detector (PXD) technology. In this complex topology the power supply units and the front-end electronics are connected through a PXD power cable bundle which may propagate the output noise from the power supplies to the vertex area. This paper presents a study of the propagation of noise caused by power converters in the PXD cable bundle based on Multi-conductor Transmission Line (MTL) theory. The work exposes the effect of the complex cable topology and shield connections on the noise propagation, which has an impact on the requirements of the power supplies. This analysis is part of the electromagnetic compatibility based design focused on functional safety to define the shield connections and power supply specifications required to ensure the successful integration of the detector and, specifically, to achieve the designed performance of the front-end electronics.

ICFA Instrumentation Bulletin, Volume 20, Spring 2000 Issue (SLAC-J-ICFA-020)

DOE Office of Scientific and Technical Information (OSTI.GOV)

Va'Vra, J.

2003-10-20

Recent years have seen much dedicated work on front end electronics for hadron colliders, with a strong emphasis on radiation hardness and low cost. This has been challenging for a number of reasons, some of which are discussed further. The developments also suggest opportunities and constraints for the development of such electronics in the future.

JFET front-end circuits integrated in a detector-grade silicon substrate

NASA Astrophysics Data System (ADS)

Manghisoni, M.; Ratti, L.; Re, V.; Speziali, V.; Traversi, G.; Dalla Betta, G. F.; Boscardin, M.; Batignani, G.; Giorgi, M.; Bosisio, L.

2003-08-01

This paper presents the design and experimental results relevant to front-end circuits integrated on detector-grade high resistivity silicon. The fabrication technology is made available by the Istituto per la Ricerca Scientifica e Tecnologica (ITC-IRST), Trento, Italy and allows using a common substrate for different kinds of active devices, such as N-channel JFETs and MOSFETs, and for pixel, microstrip, and PIN detectors. This research activity is being carried out in the framework of a project aiming at the fabrication of a multichannel mixed analog-digital chip for the readout of solid-state detectors integrated in the same substrate. Possible applications are in the field of medical and industrial imaging and space and high energy physics experiments. An all-JFET charge sensitive amplifier, which can use either a resistive or a nonresistive feedback network, has been characterized. The two configurations have been compared to each other, paying particular attention to noise performances, in view of the design of the complete readout channel. Operation capability in harsh radiation environment has been evaluated through exposure to /spl gamma/-rays from a /sup 60/Co source.

Music and hearing aids--an introduction.

PubMed

Chasin, Marshall

2012-09-01

Modern digital hearing aids have provided improved fidelity over those of earlier decades for speech. The same however cannot be said for music. Most modern hearing aids have a limitation of their "front end," which comprises the analog-to-digital (A/D) converter. For a number of reasons, the spectral nature of music as an input to a hearing aid is beyond the optimal operating conditions of the "front end" components. Amplified music tends to be of rather poor fidelity. Once the music signal is distorted, no amount of software manipulation that occurs later in the circuitry can improve things. The solution is not a software issue. Some characteristics of music that make it difficult to be transduced without significant distortion include an increased sound level relative to that of speech, and the crest factor- the difference in dB between the instantaneous peak of a signal and its RMS value. Clinical strategies and technical innovations have helped to improve the fidelity of amplified music and these include a reduction of the level of the input that is presented to the A/D converter.

LANSCE-R WIRE-SCANNER ANALOG FRONT-END ELECTRONICS

DOE Office of Scientific and Technical Information (OSTI.GOV)

Gruchalla, Michael E.

2011-01-01

A new AFE is being developed for the new LANSCE-R wire-scanner systems. The new AFE is implemented in a National Instruments Compact RIO (cRIO) module installed a BiRa 4U BiRIO cRIO chassis specifically designed to accommodate the cRIO crate and all the wire-scanner interface, control and motor-drive electronics. A single AFE module provides interface to both X and Y wire sensors using true DC coupled transimpedance amplifiers providing collection of the wire charge signals, real-time wire integrity verification using the normal dataacquisition system, and wire bias of 0V to +/-50V. The AFE system is designed to accommodate comparatively long macropulsesmore » (>1ms) with high PRF (>120Hz) without the need to provide timing signals. The basic AFE bandwidth is flat from true DC to 50kHz with a true first-order pole at 50kHz. Numeric integration in the cRIO FPGA provides real-time pulse-to-pulse numeric integration of the AFE signal to compute the total charge collected in each macropulse. This method of charge collection eliminates the need to provide synchronization signals to the wire-scanner AFE while providing the capability to accurately record the charge from long macropulses at high PRF.« less

Front End Spectroscopy ASIC for Germanium Detectors

NASA Astrophysics Data System (ADS)

Wulf, Eric

Large-area, tracking, semiconductor detectors with excellent spatial and spectral resolution enable exciting new access to soft (0.2-5 MeV) gamma-ray astrophysics. The improvements from semiconductor tracking detectors come with the burden of high density of strips and/or pixels that require high-density, low-power, spectroscopy quality readout electronics. CMOS ASIC technologies are a natural fit to this requirement and have led to high-quality readout systems for all current semiconducting tracking detectors except for germanium detectors. The Compton Spectrometer and Imager (COSI), formerly NCT, at University of California Berkeley and the Gamma-Ray Imager/Polarimeter for Solar flares (GRIPS) at Goddard Space Flight Center utilize germanium cross-strip detectors and are on the forefront of NASA's Compton telescope research with funded missions of long duration balloon flights. The development of a readout ASIC for germanium detectors would allow COSI to replace their discrete electronics readout and would enable the proposed Gamma-Ray Explorer (GRX) mission utilizing germanium strip-detectors. We propose a 3-year program to develop and test a germanium readout ASIC to TRL 5 and to integrate the ASIC readout onto a COSI detector allowing a TRL 6 demonstration for the following COSI balloon flight. Our group at NRL led a program, sponsored by another government agency, to produce and integrate a cross-strip silicon detector ASIC, designed and fabricated by Dr. De Geronimo at Brookhaven National Laboratory. The ASIC was designed to handle the large (>30 pF) capacitance of three 10 cm^2 detectors daisy-chained together. The front-end preamplifier, selectable inverter, shaping times, and gains make this ASIC compatible with a germanium cross-strip detector as well. We therefore have the opportunity and expertise to leverage the previous investment in the silicon ASIC for a new mission. A germanium strip detector ASIC will also require precise timing of the signals at the anode and cathode of the device to allow the depth of the interaction within the crystal to be determined. Dr. De Geronimo has developed similar timing circuits for CZT detector ASICs. Furthermore, the timing circuitry of the ASIC is at the very end of the analog section, simplifying and mitigating risks in the redesign. In the first year, we propose to tweak the gain settings and to add timing to the silicon ASIC to match the requirements of a germanium detector. The design specifications of the ASIC will include advice from our collaborators Dr. Boggs from COSI and Dr. Shih from GRIPS. By using a master ASIC designer to integrate his proven front-end and back-end with only minor modifications, we are maximizing the probability of success. NRL has a commercial cross-strip germanium detector with 30 pF of capacitance per strip, including the flex circuit from the detector to the outside of the cryostat. The COSI and GRIPS detectors have a similar capacitance per strip on the outside of their mechanically cooled cryostat. The second year of the program will be devoted to testing the newly fabricated germanium cross-strip ASIC with the NRL germanium detector. At the end of the second year, NASA will have a TRL 5 ASIC for germanium detectors, allowing future missions, including COSI, GRX, and GRIPS, to operate within their thermal and electrical envelopes. At the end of the third year, a detector on COSI will be instrumented with the new ASIC allowing for a TRL 6 demonstration during the following COSI balloon flight.

An undulator based soft x-ray source for microscopy on the Duke electron storage ring

NASA Astrophysics Data System (ADS)

Johnson, Lewis Elgin

1998-09-01

This dissertation describes the design, development, and installation of an undulator-based soft x-ray source on the Duke Free Electron Laser laboratory electron storage ring. Insertion device and soft x-ray beamline physics and technology are all discussed in detail. The Duke/NIST undulator is a 3.64-m long hybrid design constructed by the Brobeck Division of Maxwell Laboratories. Originally built for an FEL project at the National Institute of Standards and Technology, the undulator was acquired by Duke in 1992 for use as a soft x-ray source for the FEL laboratory. Initial Hall probe measurements on the magnetic field distribution of the undulator revealed field errors of more than 0.80%. Initial phase errors for the device were more than 11 degrees. Through a series of in situ and off-line measurements and modifications we have re-tuned the magnet field structure of the device to produce strong spectral characteristics through the 5th harmonic. A low operating K has served to reduce the effects of magnetic field errors on the harmonic spectral content. Although rms field errors remained at 0.75%, we succeeded in reducing phase errors to less than 5 degrees. Using trajectory simulations from magnetic field data, we have computed the spectral output given the interaction of the Duke storage ring electron beam and the NIST undulator. Driven by a series of concerns and constraints over maximum utility, personnel safety and funding, we have also constructed a unique front end beamline for the undulator. The front end has been designed for maximum throughput of the 1st harmonic around 40A in its standard mode of operation. The front end has an alternative mode of operation which transmits the 3rd and 5th harmonics. This compact system also allows for the extraction of some of the bend magnet produced synchrotron and transition radiation from the storage ring. As with any well designed front end system, it also provides excellent protection to personnel and to the storage ring. A diagnostic beamline consisting of a transmission grating spectrometer and scanning wire beam profile monitor was constructed to measure the spatial and spectral characteristics of the undulator radiation. Test of the system with a circulating electron beam has confirmed the magnetic and focusing properties of the undulator, and verified that it can be used without perturbing the orbit of the beam.

Intelligent FPGA Data Acquisition Framework

NASA Astrophysics Data System (ADS)

Bai, Yunpeng; Gaisbauer, Dominic; Huber, Stefan; Konorov, Igor; Levit, Dmytro; Steffen, Dominik; Paul, Stephan

2017-06-01

In this paper, we present the field programmable gate arrays (FPGA)-based framework intelligent FPGA data acquisition (IFDAQ), which is used for the development of DAQ systems for detectors in high-energy physics. The framework supports Xilinx FPGA and provides a collection of IP cores written in very high speed integrated circuit hardware description language, which use the common interconnect interface. The IP core library offers functionality required for the development of the full DAQ chain. The library consists of Serializer/Deserializer (SERDES)-based time-to-digital conversion channels, an interface to a multichannel 80-MS/s 10-b analog-digital conversion, data transmission, and synchronization protocol between FPGAs, event builder, and slow control. The functionality is distributed among FPGA modules built in the AMC form factor: front end and data concentrator. This modular design also helps to scale and adapt the DAQ system to the needs of the particular experiment. The first application of the IFDAQ framework is the upgrade of the read-out electronics for the drift chambers and the electromagnetic calorimeters (ECALs) of the COMPASS experiment at CERN. The framework will be presented and discussed in the context of this paper.

Long-Term Outdoor Reliability Assessment of a Wireless Unit for Air-Quality Monitoring Based on Nanostructured Films Integrated on Micromachined Platforms

PubMed Central

Leccardi, Matteo; Decarli, Massimiliano; Lorenzelli, Leandro; Milani, Paolo; Mettala, Petteri; Orava, Risto; Barborini, Emanuele

2012-01-01

We have fabricated and tested in long-term field operating conditions a wireless unit for outdoor air quality monitoring. The unit is equipped with two multiparametric sensors, one miniaturized thermo-hygrometer, front-end analogical and digital electronics, and an IEEE 802.15.4 based module for wireless data transmission. Micromachined platforms were functionalized with nanoporous metal-oxides to obtain multiparametric sensors, hosting gas-sensitive, anemometric and temperature transducers. Nanoporous metal-oxide layer was directly deposited on gas sensing regions of micromachined platform batches by hard-mask patterned supersonic cluster beam deposition. An outdoor, roadside experiment was arranged in downtown Milan (Italy), where one wireless sensing unit was continuously operated side by side with standard gas chromatographic instrumentation for air quality measurements. By means of a router PC, data from sensing unit and other instrumentation were collected, merged, and sent to a remote data storage server, through an UMTS device. The whole-system robustness as well as sensor dataset characteristics were continuously characterized over a run-time period of 18 months. PMID:22969394

An integrated interface for peripheral neural system recording and stimulation: system design, electrical tests and in-vivo results.

PubMed

Carboni, Caterina; Bisoni, Lorenzo; Carta, Nicola; Puddu, Roberto; Raspopovic, Stanisa; Navarro, Xavier; Raffo, Luigi; Barbaro, Massimo

2016-04-01

The prototype of an electronic bi-directional interface between the Peripheral Nervous System (PNS) and a neuro-controlled hand prosthesis is presented. The system is composed of 2 integrated circuits: a standard CMOS device for neural recording and a HVCMOS device for neural stimulation. The integrated circuits have been realized in 2 different 0.35μ m CMOS processes available from ams. The complete system incorporates 8 channels each including the analog front-end, the A/D conversion, based on a sigma delta architecture and a programmable stimulation module implemented as a 5-bit current DAC; two voltage boosters supply the output stimulation stage with a programmable voltage scalable up to 17V. Successful in-vivo experiments with rats having a TIME electrode implanted in the sciatic nerve were carried out, showing the capability of recording neural signals in the tens of microvolts, with a global noise of 7μ V r m s , and to selectively elicit the tibial and plantar muscles using different active sites of the electrode.

The data acquisition system of the Latin American Giant Observatory (LAGO)

NASA Astrophysics Data System (ADS)

Sofo Haro, M.; Arnaldi, L. H.; Alvarez, W.; Alvarez, C.; Araujo, C.; Areso, O.; Arnaldi, H.; Asorey, H.; Audelo, M.; Barros, H.; Bertou, X.; Bonnett, M.; Calderon, R.; Calderon, M.; Campos-Fauth, A.; Carramiñana, A.; Carrasco, E.; Carrera, E.; Cazar, D.; Cifuentes, E.; Cogollo, D.; Conde, R.; Cotzomi, J.; Dasso, S.; De Castro, A.; De La Torre, J.; De León, R.; Estupiñan, A.; Galindo, A.; Garcia, L.; Gómez Berisso, M.; González, M.; Guevara, W.; Gulisano, A. M.; Hernández, H.; Jaimes, A.; López, J.; Mantilla, C.; Martín, R.; Martinez-Mendez, A.; Martínez, O.; Martins, E.; Masías-Meza, J. J.; Mayo-García, R.; Melo, T.; Mendoza, J.; Miranda, P.; Montes, E.; Morales, E.; Morales, I.; Moreno, E.; Murrugarra, C.; Nina, C.; Núñez, L. A.; Núñez-Castiñeyra, A.; Otiniano, L.; Peña-Rodríguez, J.; Perenguez, J.; Pérez, H.; Perez, Y.; Perez, G.; Pinilla-Velandia, S.; Ponce, E.; Quishpe, R.; Quispe, F.; Reyes, K.; Rivera, H.; Rodriguez, J.; Rodríguez-Pascual, M.; Romero, M.; Rubio-Montero, A. J.; Salazar, H.; Salinas, J.; Sarmiento-Cano, C.; Sidelnik, I.; Haro, M. Sofo; Suárez-Durán, M.; Subieta, M.; Tello, J.; Ticona, R.; Torres, I.; Torres-Niño, L.; Truyenque, J.; Valencia-Otero, M.; Vargas, S.; Vásquez, N.; Villasenor, L.; Zamalloa, M.; Zavala, L.

2016-06-01

LAGO is an extended cosmic ray observatory composed of water-Cherenkov detectors (WCD) placed throughout Latin America. It is dedicated to the study of various issues related to astrophysics, space weather and atmospheric physics at the regional scale. In this paper we present the design and implementation of the front-end electronics and the data acquisition system for readout of the WCDs of LAGO. The system consists of preamplifiers and a digital board sending data to a computer via an USB interface. The analog signals are acquired from three independent channels at a maximum rate of ~1.2×105 pulses per second and a sampling rate of 40 MHz. To avoid false trigger due to baseline fluctuations, we present in this work a baseline correction algorithm that makes it possible to use WCDs to study variations of the environmental radiation. A data logging software has been designed to format the received data. It also enables an easy access to the data for an off-line analysis, together with the operational conditions and environmental information. The system is currently used at different sites of LAGO.

Electronics design of the RPC system for the OPERA muon spectrometer

NASA Astrophysics Data System (ADS)

Acquafredda, R.; Ambrosio, M.; Balsamo, E.; Barichello, G.; Bergnoli, A.; Consiglio, L.; Corradi, G.; dal Corso, F.; Felici, G.; Manea, C.; Masone, V.; Parascandolo, P.; Sorrentino, G.

2004-09-01

The present document describes the front-end electronics of the RPC system that instruments the magnet muon spectrometer of the OPERA experiment. The main task of the OPERA spectrometer is to provide particle tracking information for muon identification and simplify the matching between the Precision Trackers. As no trigger has been foreseen for the experiment, the spectrometer electronics must be self-triggered with single-plane readout capability. Moreover, precision time information must be added within each event frame for off-line reconstruction. The read-out electronics is made of three different stages: the Front-End Boards (FEBs) system, the Controller Boards (CBs) system and the Trigger Boards (TBs) system. The FEB system provides discrimination of the strip incoming signals; a FAST-OR output of the input signals is also available for trigger plane signal generation. FEB signals are acquired by the CB system that provides the zero suppression and manages the communication to the DAQ and Slow Control. A Trigger Board allows to operate in both self-trigger mode (the FEB's FAST-OR signal starts the plane acquisition) or in external-trigger mode (different conditions can be set on the FAST-OR signals generated from different planes).

Testing of Front End Electronics for 10ps Time of Flight Detectors

NASA Astrophysics Data System (ADS)

Kimball, Matthew; EIC PID Consortium Collaboration

2016-09-01

To fully achieve the physics goals of the future Electron Ion Collider (EIC), continued development of the detectors involved is needed. One area of research involves improving the timing resolution of Time of Flight (ToF) detectors from 100ps to 10ps. When the timing resolution of these ToF detectors is improved, better particle identification can be achieved. In addition, as ToF detectors are being constructed with ever improving timing resolution, the need to improve the high speed performance of the fast electronics used in their front-end electronics (FEE) increases. A series of careful measurements has been performed to investigate the performance and efficiency of each element in the FEE chain. The focus of these tests lies on the amplitude transmission efficiency of the high speed signals as a function of frequency, also known as the bandwidth. The components tested include balanced to unbalanced (balun) boards, signal pre-amps, and waveform digitizers. These tests were performed on individual components and with all elements connected over a frequency range of 1MHz to 1GHz. The results of these tests will be presented. This research was supported by US DOE MENP Grant DE-FG02-03ER41243.

A low-power current-reuse dual-band analog front-end for multi-channel neural signal recording.

PubMed

Sepehrian, H; Gosselin, B

2014-01-01

Thoroughly studying the brain activity of freely moving subjects requires miniature data acquisition systems to measure and wirelessly transmit neural signals in real time. In this application, it is mandatory to simultaneously record the bioelectrical activity of a large number of neurons to gain a better knowledge of brain functions. However, due to limitations in transferring the entire raw data to a remote base station, employing dedicated data reduction techniques to extract the relevant part of neural signals is critical to decrease the amount of data to transfer. In this work, we present a new dual-band neural amplifier to separate the neuronal spike signals (SPK) and the local field potential (LFP) simultaneously in the analog domain, immediately after the pre-amplification stage. By separating these two bands right after the pre-amplification stage, it is possible to process LFP and SPK separately. As a result, the required dynamic range of the entire channel, which is determined by the signal-to-noise ratio of the SPK signal of larger bandwidth, can be relaxed. In this design, a new current-reuse low-power low-noise amplifier and a new dual-band filter that separates SPK and LFP while saving capacitors and pseudo resistors. A four-channel dual-band (SPK, LFP) analog front-end capable of simultaneously separating SPK and LFP is implemented in a TSMC 0.18 μm technology. Simulation results present a total power consumption per channel of 3.1 μw for an input referred noise of 3.28 μV and a NEF for 2.07. The cutoff frequency of the LFP band is fc=280 Hz, and fL=725 Hz and fL=11.2 KHz for SPK, with 36 dB gain for LFP band 46 dB gain for SPK band.

Implementation of a portable device for real-time ECG signal analysis.

PubMed

Jeon, Taegyun; Kim, Byoungho; Jeon, Moongu; Lee, Byung-Geun

2014-12-10

Cardiac disease is one of the main causes of catastrophic mortality. Therefore, detecting the symptoms of cardiac disease as early as possible is important for increasing the patient's survival. In this study, a compact and effective architecture for detecting atrial fibrillation (AFib) and myocardial ischemia is proposed. We developed a portable device using this architecture, which allows real-time electrocardiogram (ECG) signal acquisition and analysis for cardiac diseases. A noisy ECG signal was preprocessed by an analog front-end consisting of analog filters and amplifiers before it was converted into digital data. The analog front-end was minimized to reduce the size of the device and power consumption by implementing some of its functions with digital filters realized in software. With the ECG data, we detected QRS complexes based on wavelet analysis and feature extraction for morphological shape and regularity using an ARM processor. A classifier for cardiac disease was constructed based on features extracted from a training dataset using support vector machines. The classifier then categorized the ECG data into normal beats, AFib, and myocardial ischemia. A portable ECG device was implemented, and successfully acquired and processed ECG signals. The performance of this device was also verified by comparing the processed ECG data with high-quality ECG data from a public cardiac database. Because of reduced computational complexity, the ARM processor was able to process up to a thousand samples per second, and this allowed real-time acquisition and diagnosis of heart disease. Experimental results for detection of heart disease showed that the device classified AFib and ischemia with a sensitivity of 95.1% and a specificity of 95.9%. Current home care and telemedicine systems have a separate device and diagnostic service system, which results in additional time and cost. Our proposed portable ECG device provides captured ECG data and suspected waveform to identify sporadic and chronic events of heart diseases. This device has been built and evaluated for high quality of signals, low computational complexity, and accurate detection.

High-frequency ultrasound Doppler system for biomedical applications with a 30-MHz linear array.

PubMed

Xu, Xiaochen; Sun, Lei; Cannata, Jonathan M; Yen, Jesse T; Shung, K Kirk

2008-04-01

In this paper, we report the development of the first high-frequency (HF) pulsed-wave Doppler system using a 30-MHz linear array transducer to assess the cardiovascular functions in small animals. This array-based pulsed-wave Doppler system included a 16-channel HF analog beamformer, a HF pulsed-wave Doppler module, timing circuits, HF bipolar pulsers and analog front ends. The beamformed echoes acquired by the 16-channel analog beamformer were fed directly to the HF pulsed-wave Doppler module. Then the in-phase and quadrature-phase (IQ) audio Doppler signals were digitized by either a sound card or a Gage digitizer and stored in a personal computer. The Doppler spectrogram was displayed on a personal computer in real time. The two-way beamwidths were determined to be 160 microm to 320 microm when the array was electronically focused at different focal points at depths from 5 to 10 mm. A micro-flow phantom, consisting of a polyimide tube with an inner diameter of 127 microm and the wire phantom were used to evaluate and calibrate the system. The results show that the system is capable of detecting motion velocity of the wire phantom as low as 0.1 mm/s, and detecting blood-mimicking flow velocity in the 127-microm tube lower than 7 mm/s. The system was subsequently used to measure the blood flow in vivo in two mouse abdominal superficial vessels, with diameters of approximately 200 microm, and a mouse aorta close to the heart. These results demonstrated that this system may become an indispensable part of the current HF array-based imaging systems for small animal studies.

Innovative Pressure Sensor Platform and Its Integration with an End-User Application

PubMed Central

Flores-Caballero, Antonio; Copaci, Dorin; Blanco, María Dolores; Moreno, Luis; Herrán, Jaime; Fernández, Iván; Ochoteco, Estíbaliz; Cabañero, German; Grande, Hans

2014-01-01

This paper describes the fully integration of an innovative and low-cost pressure sensor sheet based on a bendable and printed electronics technology. All integration stages are covered, from most low-level functional system, like physical analog sensor data acquisition, followed by embedded data processing, to end user interactive visual application. Data acquisition embedded software and hardware was developed using a Rapid Control Prototyping (RCP). Finally, after first electronic prototype successful testing, a Taylor-made electronics was developed, reducing electronics volume to 3.5 cm × 6 cm × 2 cm with a maximum power consumption of 765 mW for both electronics and pressure sensor sheet. PMID:24922455

A system-level view of optimizing high-channel-count wireless biosignal telemetry.

PubMed

Chandler, Rodney J; Gibson, Sarah; Karkare, Vaibhav; Farshchi, Shahin; Marković, Dejan; Judy, Jack W

2009-01-01

In this paper we perform a system-level analysis of a wireless biosignal telemetry system. We perform an analysis of each major system component (e.g., analog front end, analog-to-digital converter, digital signal processor, and wireless link), in which we consider physical, algorithmic, and design limitations. Since there are a wide range applications for wireless biosignal telemetry systems, each with their own unique set of requirements for key parameters (e.g., channel count, power dissipation, noise level, number of bits, etc.), our analysis is equally broad. The net result is a set of plots, in which the power dissipation for each component and as the system as a whole, are plotted as a function of the number of channels for different architectural strategies. These results are also compared to existing implementations of complete wireless biosignal telemetry systems.

Fully Integrated Biopotential Acquisition Analog Front-End IC

PubMed Central

Song, Haryong; Park, Yunjong; Kim, Hyungseup; Ko, Hyoungho

2015-01-01

A biopotential acquisition analog front-end (AFE) integrated circuit (IC) is presented. The biopotential AFE includes a capacitively coupled chopper instrumentation amplifier (CCIA) to achieve low input referred noise (IRN) and to block unwanted DC potential signals. A DC servo loop (DSL) is designed to minimize the offset voltage in the chopper amplifier and low frequency respiration artifacts. An AC coupled ripple rejection loop (RRL) is employed to reduce ripple due to chopper stabilization. A capacitive impedance boosting loop (CIBL) is designed to enhance the input impedance and common mode rejection ratio (CMRR) without additional power consumption, even under an external electrode mismatch. The AFE IC consists of two-stage CCIA that include three compensation loops (DSL, RRL, and CIBL) at each CCIA stage. The biopotential AFE is fabricated using a 0.18 µm one polysilicon and six metal layers (1P6M) complementary metal oxide semiconductor (CMOS) process. The core chip size of the AFE without input/output (I/O) pads is 10.5 mm2. A fourth-order band-pass filter (BPF) with a pass-band in the band-width from 1 Hz to 100 Hz was integrated to attenuate unwanted signal and noise. The overall gain and band-width are reconfigurable by using programmable capacitors. The IRN is measured to be 0.94 µVRMS in the pass band. The maximum amplifying gain of the pass-band was measured as 71.9 dB. The CIBL enhances the CMRR from 57.9 dB to 67 dB at 60 Hz under electrode mismatch conditions. PMID:26437404

Beam dynamics performances and applications of a low-energy electron-beam magnetic bunch compressor

DOE Office of Scientific and Technical Information (OSTI.GOV)

Prokop, C. R.; Piot, P.; Carlsten, B. E.

2013-08-01

Many front-end applications of electron linear accelerators rely on the production of temporally compressed bunches. The shortening of electron bunches is often realized with magnetic bunch compressors located in high-energy sections of accelerators. Magnetic compression is subject to collective effects including space charge and self interaction via coherent synchrotron radiation. In this paper we explore the application of magnetic compression to low-energy (~40MeV), high-charge (nC) electron bunches with low normalized transverse emittances (<5@mm).

Performance optimization of detector electronics for millimeter laser ranging

NASA Technical Reports Server (NTRS)

Cova, Sergio; Lacaita, A.; Ripamonti, Giancarlo

1993-01-01

The front-end electronic circuitry plays a fundamental role in determining the performance actually obtained from ultrafast and highly sensitive photodetectors. We deal here with electronic problems met working with microchannel plate photomultipliers (MCP-PMTs) and single photon avalanche diodes (SPADs) for detecting single optical photons and measuring their arrival time with picosecond resolution. The performance of available fast circuits is critically analyzed. Criteria for selecting the most suitable electronics are derived and solutions for exploiting the detector performance are presented and discussed.

Development of BPM Electronics at the JLAB FEL

NASA Astrophysics Data System (ADS)

Sexton, D.; Evtushenko, P.; Jordan, K.; Yan, J.; Dutton, S.; Moore, W.; Evans, R.; Coleman, J.

2006-11-01

A new version of BPM electronics based on the AD8362 RMS detector, which is a direct RF to DC converter, is under development at the JLAB FEL. Each of these new BPM electronics utilizes an embedded ColdFire Microprocessor for data processing and communication with the EPICS control system via TCP/IP. The ColdFire runs RTEMS, which is an open source real-time operating system. The JLAB FEL is a SRF Energy Recovery LINAC capable of running up to 10 mA CW beam with a 74.85 MHz micropulse frequency. For diagnostic reasons and for machine tune up, the micropulse frequency can be reduced to 1.17 MHz, which corresponds to about 160 μA of beam current. It is required that the BPM system would be functional for all micropulse frequencies. By taking into account the headroom for the beam steering and current variations the dynamic range of the RF front end is required to be about 60 dB. A BPM resolution of at least 100 μm is required, whereas better resolution is very desirable to make it possible for more accurate measurements of the electron beam optics. Some results of the RF front end development are presented as well as the first measurements made with an electron beam.

Development of BPM Electronics at the JLAB FEL

DOE Office of Scientific and Technical Information (OSTI.GOV)

Sexton, D.; Evtushenko, P.; Jordan, K.

2006-11-20

A new version of BPM electronics based on the AD8362 RMS detector, which is a direct RF to DC converter, is under development at the JLAB FEL. Each of these new BPM electronics utilizes an embedded ColdFire Microprocessor for data processing and communication with the EPICS control system via TCP/IP. The ColdFire runs RTEMS, which is an open source real-time operating system. The JLAB FEL is a SRF Energy Recovery LINAC capable of running up to 10 mA CW beam with a 74.85 MHz micropulse frequency. For diagnostic reasons and for machine tune up, the micropulse frequency can be reducedmore » to 1.17 MHz, which corresponds to about 160 {mu}A of beam current. It is required that the BPM system would be functional for all micropulse frequencies. By taking into account the headroom for the beam steering and current variations the dynamic range of the RF front end is required to be about 60 dB. A BPM resolution of at least 100 {mu}m is required, whereas better resolution is very desirable to make it possible for more accurate measurements of the electron beam optics. Some results of the RF front end development are presented as well as the first measurements made with an electron beam.« less

Development of BPM Electronics at the JLAB FEL

DOE Office of Scientific and Technical Information (OSTI.GOV)

Daniel Sexton; Pavel Evtushenko; Kevin Jordan

2006-05-01

A new version of BPM electronics based on the AD8362 RMS detector, which is a direct RF to DC converter, is under development at the JLAB FEL. Each of these new BPM electronics utilizes an embedded ColdFire Microprocessor for data processing and communication with the EPICS control system via TCP/IP. The ColdFire runs RTEMS, which is an open source real-time operating system. The JLAB FEL is a SRF Energy Recovery LINAC capable of running up to 10 mA CW beam with the micropulse up to 74.85 MHz. For diagnostic reasons and for the machine tune up, the micropulse frequency canmore » be reduced to 1.17 MHz, which corresponds to about 160 ?A of beam current. It is required that the BPM system would be functional for all micropulse frequencies. By taking into account the headroom for the beam steering and current variations the dynamic range of the RF front end is required to be about 60 dB. A BPM resolution of at least 100 ?m is required, whereas better resolution is very desirable to make it possible for more accurate measurements of the electron beam optics. Some results of the RF front end development are presented as well as the first measurements made with an electron beam.« less

Design of a front-end integrated circuit for 3D acoustic imaging using 2D CMUT arrays.

PubMed

Ciçek, Ihsan; Bozkurt, Ayhan; Karaman, Mustafa

2005-12-01

Integration of front-end electronics with 2D capacitive micromachined ultrasonic transducer (CMUT) arrays has been a challenging issue due to the small element size and large channel count. We present design and verification of a front-end drive-readout integrated circuit for 3D ultrasonic imaging using 2D CMUT arrays. The circuit cell dedicated to a single CMUT array element consists of a high-voltage pulser and a low-noise readout amplifier. To analyze the circuit cell together with the CMUT element, we developed an electrical CMUT model with parameters derived through finite element analysis, and performed both the pre- and postlayout verification. An experimental chip consisting of 4 X 4 array of the designed circuit cells, each cell occupying a 200 X 200 microm2 area, was formed for the initial test studies and scheduled for fabrication in 0.8 microm, 50 V CMOS technology. The designed circuit is suitable for integration with CMUT arrays through flip-chip bonding and the CMUT-on-CMOS process.

REACH: a high-performance wireless base station front end

NASA Astrophysics Data System (ADS)

Nettleton, Ray W.

1996-01-01

The link budget determines the relationships between range, capacity and transmitted power for any wireless technology. In every case it is a key determinant of the system's performance from both an engineering and an economic point of view. Unfortunately, the new 1.9 GHz PCS systems will begin life with an inherent 7 dB disadvantage over the 800 MHz cellular due to propagation differences. Additionally, system wiring and electronics often degrade performance by a further 5 to 10 dB due to long coaxial runs and noisy front end amplification, both of which are harder issues to deal with at 1.9 GHz than at 800 MHz. SCT's REACHTM products address these shortcomings by packaging critical components--front end amplification, filtering, etc.--in a compact cryoelectronic package intended for mounting near the antennas of the base station. In a recent trial with Qualcomm in San Diego, this package improved the CDMA uplink budget by 6 dB--enough to halve the number of base stations that are needed in most areas. This paper examines the technical and economic ramifications of the REACHTM product.

FERMI: a digital Front End and Readout MIcrosystem for high resolution calorimetry

NASA Astrophysics Data System (ADS)

Alexanian, H.; Appelquist, G.; Bailly, P.; Benetta, R.; Berglund, S.; Bezamat, J.; Blouzon, F.; Bohm, C.; Breveglieri, L.; Brigati, S.; Cattaneo, P. W.; Dadda, L.; David, J.; Engström, M.; Genat, J. F.; Givoletti, M.; Goggi, V. G.; Gong, S.; Grieco, G. M.; Hansen, M.; Hentzell, H.; Holmberg, T.; Höglund, I.; Inkinen, S. J.; Kerek, A.; Landi, C.; Ledortz, O.; Lippi, M.; Lofstedt, B.; Lund-Jensen, B.; Maloberti, F.; Mutz, S.; Nayman, P.; Piuri, V.; Polesello, G.; Sami, M.; Savoy-Navarro, A.; Schwemling, P.; Stefanelli, R.; Sundblad, R.; Svensson, C.; Torelli, G.; Vanuxem, J. P.; Yamdagni, N.; Yuan, J.; Ödmark, A.; Fermi Collaboration

1995-02-01

We present a digital solution for the front-end electronics of high resolution calorimeters at future colliders. It is based on analogue signal compression, high speed {A}/{D} converters, a fully programmable pipeline and a digital signal processing (DSP) chain with local intelligence and system supervision. This digital solution is aimed at providing maximal front-end processing power by performing waveform analysis using DSP methods. For the system integration of the multichannel device a multi-chip, silicon-on-silicon multi-chip module (MCM) has been adopted. This solution allows a high level of integration of complex analogue and digital functions, with excellent flexibility in mixing technologies for the different functional blocks. This type of multichip integration provides a high degree of reliability and programmability at both the function and the system level, with the additional possibility of customising the microsystem to detector-specific requirements. For enhanced reliability in high radiation environments, fault tolerance strategies, i.e. redundancy, reconfigurability, majority voting and coding for error detection and correction, are integrated into the design.

Progress on the upgrade of the CMS Hadron Calorimeter Front-End electronics

DOE Office of Scientific and Technical Information (OSTI.GOV)

Anderson, Jake; Whitmore, Juliana; /Fermilab

2011-11-01

We present a scheme to upgrade the CMS HCAL front-end electronics in the second long shutdown to upgrade the LHC (LS2), which is expected to occur around 2018. The HCAL electronics upgrade is required to handle the major instantaneous luminosity increase (up to 5 * 10{sup 34} cm{sup -2} s{sup -1}) and an expected integrated luminosity of {approx}3000 fb{sup -1}. A key aspect of the HCAL upgrade is to read out longitudinal segmentation information to improve background rejection, energy resolution, and electron isolation at the L1 trigger. This paper focuses on the requirements for the new electronics and on themore » proposed solutions. The requirements include increased channel count, additional timing capabilities, and additional redundancy. The electronics are required to operate in a harsh environment and are constrained by the existing infrastructure. The proposed solutions span from chip level to system level. They include the development of a new ASIC ADC, the design and testing of higher speed transmitters to handle the increased data volume, the evaluation and use of circuits from other developments, evaluation of commercial FPGAs, better thermal design, and improvements in the overall readout architecture. We will report on the progress of the designs for these upgraded systems, along with performance requirements and initial design studies.« less

Vortex Generators to Control Boundary Layer Interactions

NASA Technical Reports Server (NTRS)

Babinsky, Holger (Inventor); Loth, Eric (Inventor); Lee, Sang (Inventor)

2014-01-01

Devices for generating streamwise vorticity in a boundary includes various forms of vortex generators. One form of a split-ramp vortex generator includes a first ramp element and a second ramp element with front ends and back ends, ramp surfaces extending between the front ends and the back ends, and vertical surfaces extending between the front ends and the back ends adjacent the ramp surfaces. A flow channel is between the first ramp element and the second ramp element. The back ends of the ramp elements have a height greater than a height of the front ends, and the front ends of the ramp elements have a width greater than a width of the back ends.

Noise propagation issues in Belle II pixel detector power cable

DOE PAGES

Iglesias, M.; Arteche, F.; Echeverria, I.; ...

2018-04-26

The vertex detector used in the upgrade of High-Energy physics experiment Belle II includes DEPFET pixel detector (PXD) technology. In this complex topology the power supply units and the front-end electronics are connected through a PXD power cable bundle which may propagate the output noise from the power supplies to the vertex area. This article presents a study of the propagation of noise caused by power converters in the PXD cable bundle based on Multi-conductor Transmission Line (MTL) theory. The work exposes the effect of the complex cable topology and shield connections on the noise propagation, which has an impactmore » on the requirements of the power supplies. This analysis is part of the electromagnetic compatibility based design focused on functional safety to define the shield connections and power supply specifications required to ensure the successful integration of the detector and, specifically, to achieve the designed performance of the front-end electronics.« less

Noise propagation issues in Belle II pixel detector power cable

DOE Office of Scientific and Technical Information (OSTI.GOV)

Iglesias, M.; Arteche, F.; Echeverria, I.

The vertex detector used in the upgrade of High-Energy physics experiment Belle II includes DEPFET pixel detector (PXD) technology. In this complex topology the power supply units and the front-end electronics are connected through a PXD power cable bundle which may propagate the output noise from the power supplies to the vertex area. This article presents a study of the propagation of noise caused by power converters in the PXD cable bundle based on Multi-conductor Transmission Line (MTL) theory. The work exposes the effect of the complex cable topology and shield connections on the noise propagation, which has an impactmore » on the requirements of the power supplies. This analysis is part of the electromagnetic compatibility based design focused on functional safety to define the shield connections and power supply specifications required to ensure the successful integration of the detector and, specifically, to achieve the designed performance of the front-end electronics.« less

DOE Office of Scientific and Technical Information (OSTI.GOV)

Shanks, Katherine S.; Philipp, Hugh T.; Weiss, Joel T.

Experiments at storage ring light sources as well as at next-generation light sources increasingly require detectors capable of high dynamic range operation, combining low-noise detection of single photons with large pixel well depth. XFEL sources in particular provide pulse intensities sufficiently high that a purely photon-counting approach is impractical. The High Dynamic Range Pixel Array Detector (HDR-PAD) project aims to provide a dynamic range extending from single-photon sensitivity to 10{sup 6} photons/pixel in a single XFEL pulse while maintaining the ability to tolerate a sustained flux of 10{sup 11} ph/s/pixel at a storage ring source. Achieving these goals involves themore » development of fast pixel front-end electronics as well as, in the XFEL case, leveraging the delayed charge collection due to plasma effects in the sensor. A first prototype of essential electronic components of the HDR-PAD readout ASIC, exploring different options for the pixel front-end, has been fabricated. Here, the HDR-PAD concept and preliminary design will be described.« less

CMOS Rad-Hard Front-End Electronics for Precise Sensors Measurements

NASA Astrophysics Data System (ADS)

Sordo-Ibáñez, Samuel; Piñero-García, Blanca; Muñoz-Díaz, Manuel; Ragel-Morales, Antonio; Ceballos-Cáceres, Joaquín; Carranza-González, Luis; Espejo-Meana, Servando; Arias-Drake, Alberto; Ramos-Martos, Juan; Mora-Gutiérrez, José Miguel; Lagos-Florido, Miguel Angel

2016-08-01

This paper reports a single-chip solution for the implementation of radiation-tolerant CMOS front-end electronics (FEE) for applications requiring the acquisition of base-band sensor signals. The FEE has been designed in a 0.35μm CMOS process, and implements a set of parallel conversion channels with high levels of configurability to adapt the resolution, conversion rate, as well as the dynamic input range for the required application. Each conversion channel has been designed with a fully-differential implementation of a configurable-gain instrumentation amplifier, followed by an also configurable dual-slope ADC (DS ADC) up to 16 bits. The ASIC also incorporates precise thermal monitoring, sensor conditioning and error detection functionalities to ensure proper operation in extreme environments. Experimental results confirm that the proposed topologies, in conjunction with the applied radiation-hardening techniques, are reliable enough to be used without loss in the performance in environments with an extended temperature range (between -25 and 125 °C) and a total dose beyond 300 krad.

Development of 3He LPSDs and read-out system for the SANS spectrometer at CPHS

NASA Astrophysics Data System (ADS)

Huang, T. C.; Gong, H.; Shao, B. B.; Wang, X. W.; Zhang, Y.; Pang, B. B.

2014-01-01

The Compact Pulsed Hadron Source (CPHS) is a 13-MeV proton-linac-driven neutron source under construction in Tsinghua University. Time-of-flight (TOF) small-angle neutron scattering (SANS) spectrometer is one of the first instruments to be built. It is designed to use linear position-sensitive detectors (LPSDs) of 3He gas proportional counters to cover a 1 m×1 m area. Prototypical LPSDs (Φ = 12 mm, L=1 m) have been made and read-out system is developed based on charge division. This work describes the in-house fabrication of the prototypical LPSDs and design of the read-out system including front-end electronics and data acquisition (DAQ) system. Key factors of the front-end electronics are studied and optimized with PSPICE simulation. DAQ system is designed based on VME bus architecture and FPGA Mezzanine Card (FMC) standard with high flexibility and extendibility. Preliminary experiments are carried out and the results are present and discussed.

Design of analog pixels front-end active feedback

NASA Astrophysics Data System (ADS)

Kmon, P.; Kadlubowski, L. A.; Kaczmarczyk, P.

2018-01-01

The paper presents the design of the active feedback used in a charge-sensitive amplifier. The predominant advantages of the presented circuit are its ability for setting wide range of pulse-time widths, small silicon area occupation and low power consumption. The feedback also allows sensor leakage current compensation and, thanks to an additional DC amplifier, it minimizes the output DC voltage variations, which is especially important in the DC coupled recording chain and for processes with limited supply voltage. The paper provides feedback description and its operation principle. The proposed circuit was designed in the CMOS 130nm technology.

Data management software concept for WEST plasma measurement system

NASA Astrophysics Data System (ADS)

Zienkiewicz, P.; Kasprowicz, G.; Byszuk, A.; Wojeński, A.; Kolasinski, P.; Cieszewski, R.; Czarski, T.; Chernyshova, M.; Pozniak, K.; Zabolotny, W.; Juszczyk, B.; Mazon, D.; Malard, P.

2014-11-01

This paper describes the concept of data management software for the multichannel readout system for the GEM detector used in WEST Plasma experiment. The proposed system consists of three separate communication channels: fast data channel, diagnostics channel, slow data channel. Fast data channel is provided by the FPGA with integrated ARM cores providing direct readout data from Analog Front Ends through 10GbE with short, guaranteed intervals. Slow data channel is provided by multiple, fast CPUs after data processing with detailed readout data with use of GNU/Linux OS and appropriate software. Diagnostic channel provides detailed feedback for control purposes.

A digital front-end and readout microsystem for calorimetry at LHC

NASA Astrophysics Data System (ADS)

Alippi, C.; Appelquist, G.; Berglund, S.; Bohm, C.; Breveglieri, L.; Brigati, S.; Carlson, P.; Cattaneo, P.; Dadda, L.; David, J.; Del Buono, L.; Dell'Acqua, A.; Engström, M.; Fumagalli, G.; Gatti, U.; Genat, J. F.; Goggi, G.; Hansen, M.; Hentzell, H.; Höglund, I.; Inkinen, S.; Kerek, A.; Lebbolo, H.; LeDortz, O.; Lofstedt, B.; Maloberti, F.; Nayman, P.; Persson, S.-T.; Piuri, V.; Salice, F.; Sami, M.; Savoy-Navarro, A.; Stefanelli, R.; Sundblad, R.; Svensson, C.; Torelli, G.; Vanuxem, J. P.; Yamdagni, N.; Yuan, J.; Zitoun, R.

1994-04-01

A digital solution to the front-end electronics for calorimetric detectors at future supercolliders is presented. The solution is based on high speed {A}/{D} converters, a fully programmable pipeline/digital filter chain and local intelligence. Questions of error correction, fault-tolerance and system redundancy are also being considered. A system integration of a multichannel device in a multichip, Silicon-on-Silicon Microsystem hybrid, is used. This solution allows a new level of integration of complex analogue and digital functions, with an excellent flexibility in mixing technologies for the different functional blocks. It also allows a high degree of programmability at both the function and the system level, and offers the possibility of customising the microsystem with detector-specific functions.

Combined PET/MRI scanner

DOEpatents

Schlyer, David; Woody, Craig L.; Rooney, William; Vaska, Paul; Stoll, Sean; Pratte, Jean-Francois; O'Connor, Paul

2007-10-23

A combined PET/MRI scanner generally includes a magnet for producing a magnetic field suitable for magnetic resonance imaging, a radiofrequency (RF) coil disposed within the magnetic field produced by the magnet and a ring tomograph disposed within the magnetic field produced by the magnet. The ring tomograph includes a scintillator layer for outputting at least one photon in response to an annihilation event, a detection array coupled to the scintillator layer for detecting the at least one photon outputted by the scintillator layer and for outputting a detection signal in response to the detected photon and a front-end electronic array coupled to the detection array for receiving the detection signal, wherein the front-end array has a preamplifier and a shaper network for conditioning the detection signal.

Ionization Readout Electronics for SuperCDMS SNOLAB Employing a HEMT Front-End

NASA Astrophysics Data System (ADS)

Partridge, R.

2014-09-01

The SuperCDMS SNOLAB experiment seeks to deploy 200 kg of cryogenic Ge detectors employing phonon and ionization readout to identify dark matter interactions. One of the design challenges for the experiment is to provide amplification of the high impedance ionization signal while minimizing power dissipation and noise. This paper describes the design and expected performance of the ionization readout being developed for an engineering model of the SuperCDMS SNOLAB Ge Tower System. The readout features the use of a low-noise HEMT front end transistor operating at 4 K to achieve a power dissipation of 100 W per channel, local grounding to minimize noise injection, and biasing circuitry that allows precise control of the HEMT operating point.

The MiniPET: a didactic PET system

NASA Astrophysics Data System (ADS)

Pedro, R.; Silva, J.; Gurriana, L.; Silva, J. M.; Maio, A.; Soares Augusto, J.

2013-03-01

The MiniPET project aims to design and build a small PET system. It consists of two 4 × 4 matrices of 16 LYSO scintillator crystals and two PMTs with 16 channels resulting in a low cost system with the essential functionality of a clinical PET instrument. It is designed to illustrate the physics of the PET technique and to provide a didactic platform for the training of students and nuclear imaging professionals as well as for scientific outreach. The PET modules can be configured to test for the coincidence of 511 keV gamma rays. The model has a flexible mechanical setup [1] and can simulate 14 diferent ring geometries, from a configuration with as few as 18 detectors per ring (ring radius phi=51 mm), up to a geometry with 70 detectors per ring (phi=200 mm). A second version of the electronic system [2] allowed measurement and recording of the energy deposited in 4 detector channels by photons from a 137Cs radioactive source and by photons resulting of the annihilation of positrons from a 22Na radioactive source. These energy spectra are used for detector performance studies, as well as angular dependency studies. In this paper, the mechanical setup, the front-end high-speed analog electronics, the digital acquisition and control electronics implemented in a FPGA, as well as the data-transfer interface between the FPGA board and a host PC are described. Recent preliminary results obtained with the 4 active channels in the prototype are also presented.

Caliste 64: detection unit of a spectro imager array for a hard x-ray space telescope

NASA Astrophysics Data System (ADS)

Limousin, O.; Meuris, A.; Lugiez, F.; Gevin, Olivier; Pinsard, F.; Blondel, C.; Le Mer, I.; Delagnes, E.; Vassal, M. C.; Soufflet, F.; Bocage, R.; Penquer, A.; Billot, M.

2017-11-01

In the frame of the hard X-ray Simbol-X observatory, a joint CNES-ASI space mission to be flown in 2014, a prototype of miniature Cd(Zn)Te camera equipped with 64 pixels has been designed. The device, called Caliste 64, is a spectro-imager with high resolution event timetagging capability. Caliste 64 integrates a Cd(Zn)Te semiconductor detector with segmented electrode and its front-end electronics made of 64 independent analog readout channels. This 1 × 1 × 2 cm3 camera, able to detect photons in the range from 2 keV up to 250 keV, is an elementary detection unit juxtaposable on its four sides. Consequently, large detector array can be made assembling a mosaic of Caliste 64 units. Electronics readout module is achieved by stacking four IDeF-X V1.1 ASICs, perpendicular to the detection plane. We achieved good noise performances, with a mean Equivalent Noise Charge of 65 electrons rms over the 64 channels. For the first prototypes, we chose Pt//CdTe//Al/Ti/Au Schottky detectors because of their very low dark current and excellent spectroscopic performances. Recently a Caliste 64 prototype has been also equipped with a 2 mm thick Au//CdZnTe//Au detector. This paper presents the performances of these four prototypes and demonstrates spectral performances better than 1 keV fwhm at 59.54 keV when the samples are moderately cooled down to -10°C.

75 FR 70703 - Humana Insurance Company a Division of Carenetwork, Inc. Front End Operations and Account...

Federal Register 2010, 2011, 2012, 2013, 2014

2010-11-18

... Division of CareNetwork, Inc., Front End Operations and Account Installation-Product Testing Groups, De... a Division of Carenetwork, Inc. Front End Operations and Account Installation-Product Testing Groups..., a Division of CareNetwork, Inc., Front End Operations and Account Installation- Product Testing...

A digitalized silicon microgyroscope based on embedded FPGA.

PubMed

Xia, Dunzhu; Yu, Cheng; Wang, Yuliang

2012-09-27

This paper presents a novel digital miniaturization method for a prototype silicon micro-gyroscope (SMG) with the symmetrical and decoupled structure. The schematic blocks of the overall system consist of high precision analog front-end interface, high-speed 18-bit analog to digital convertor, a high-performance core Field Programmable Gate Array (FPGA) chip and other peripherals such as high-speed serial ports for transmitting data. In drive mode, the closed-loop drive circuit are implemented by automatic gain control (AGC) loop and software phase-locked loop (SPLL) based on the Coordinated Rotation Digital Computer (CORDIC) algorithm. Meanwhile, the sense demodulation module based on varying step least mean square demodulation (LMSD) are addressed in detail. All kinds of algorithms are simulated by Simulink and DSPbuilder tools, which is in good agreement with the theoretical design. The experimental results have fully demonstrated the stability and flexibility of the system.

A Digitalized Silicon Microgyroscope Based on Embedded FPGA

PubMed Central

Xia, Dunzhu; Yu, Cheng; Wang, Yuliang

2012-01-01

This paper presents a novel digital miniaturization method for a prototype silicon micro-gyroscope (SMG) with the symmetrical and decoupled structure. The schematic blocks of the overall system consist of high precision analog front-end interface, high-speed 18-bit analog to digital convertor, a high-performance core Field Programmable Gate Array (FPGA) chip and other peripherals such as high-speed serial ports for transmitting data. In drive mode, the closed-loop drive circuit are implemented by automatic gain control (AGC) loop and software phase-locked loop (SPLL) based on the Coordinated Rotation Digital Computer (CORDIC) algorithm. Meanwhile, the sense demodulation module based on varying step least mean square demodulation (LMSD) are addressed in detail. All kinds of algorithms are simulated by Simulink and DSPbuilder tools, which is in good agreement with the theoretical design. The experimental results have fully demonstrated the stability and flexibility of the system. PMID:23201990

A 0.18 μm biosensor front-end based on 1/f noise, distortion cancelation and chopper stabilization techniques.

PubMed

Balasubramanian, Viswanathan; Ruedi, Pierre-Francois; Temiz, Yuksel; Ferretti, Anna; Guiducci, Carlotta; Enz

2013-10-01

This paper presents a novel sensor front-end circuit that addresses the issues of 1/f noise and distortion in a unique way by using canceling techniques. The proposed front-end is a fully differential transimpedance amplifier (TIA) targeted for current mode electrochemical biosensing applications. In this paper, we discuss the architecture of this canceling based front-end and the optimization methods followed for achieving low noise, low distortion performance at minimum current consumption are presented. To validate the employed canceling based front-end, it has been realized in a 0.18 μm CMOS process and the characterization results are presented. The front-end has also been tested as part of a complete wireless sensing system and the cyclic voltammetry (CV) test results from electrochemical sensors are provided. Overall current consumption in the front-end is 50 μA while operating on a 1.8 V supply.

40 CFR 63.487 - Batch front-end process vents-reference control technology.

Code of Federal Regulations, 2010 CFR

2010-07-01

... § 63.487 Batch front-end process vents—reference control technology. (a) Batch front-end process vents... 40 Protection of Environment 9 2010-07-01 2010-07-01 false Batch front-end process vents-reference control technology. 63.487 Section 63.487 Protection of Environment ENVIRONMENTAL PROTECTION AGENCY...

Picosecond Resolution Time-to-Digital Converter Using Gm-C Integrator and SAR-ADC

NASA Astrophysics Data System (ADS)

Xu, Zule; Miyahara, Masaya; Matsuzawa, Akira

2014-04-01

A picosecond resolution time-to-digital converter (TDC) is presented. The resolution of a conventional delay chain TDC is limited by the delay of a logic buffer. Various types of recent TDCs are successful in breaking this limitation, but they require a significant calibration effort to achieve picosecond resolution with a sufficient linear range. To address these issues, we propose a simple method to break the resolution limitation without any calibration: a Gm-C integrator followed by a successive approximation register analog-to-digital converter (SAR-ADC). This translates the time interval into charge, and then the charge is quantized. A prototype chip was fabricated in 90 nm CMOS. The measurement results reveal a 1 ps resolution, a -0.6/0.7 LSB differential nonlinearity (DNL), a -1.1/2.3 LSB integral nonlinearity (INL), and a 9-bit range. The measured 11.74 ps single-shot precision is caused by the noise of the integrator. We analyze the noise of the integrator and propose an improved front-end circuit to reduce this noise. The proposal is verified by simulations showing the maximum single-shot precision is less than 1 ps. The proposed front-end circuit can also diminish the mismatch effects.

Electronic hardware design of electrical capacitance tomography systems.

PubMed

Saied, I; Meribout, M

2016-06-28

Electrical tomography techniques for process imaging are very prominent for industrial applications, such as the oil and gas industry and chemical refineries, owing to their ability to provide the flow regime of a flowing fluid within a relatively high throughput. Among the various techniques, electrical capacitance tomography (ECT) is gaining popularity due to its non-invasive nature and its capability to differentiate between different phases based on their permittivity distribution. In recent years, several hardware designs have been provided for ECT systems that have improved its resolution of measurements to be around attofarads (aF, 10(-18) F), or the number of channels, that is required to be large for some applications that require a significant amount of data. In terms of image acquisition time, some recent systems could achieve a throughput of a few hundred frames per second, while data processing time could be achieved in only a few milliseconds per frame. This paper outlines the concept and main features of the most recent front-end and back-end electronic circuits dedicated for ECT systems. In this paper, multiple-excitation capacitance polling, a front-end electronic technique, shows promising results for ECT systems to acquire fast data acquisition speeds. A highly parallel field-programmable gate array (FPGA) based architecture for a fast reconstruction algorithm is also described. This article is part of the themed issue 'Supersensing through industrial process tomography'. © 2016 The Author(s).

Front-end receiver electronics for a matrix transducer for 3-D transesophageal echocardiography.

PubMed

Yu, Zili; Blaak, Sandra; Chang, Zu-yao; Yao, Jiajian; Bosch, Johan G; Prins, Christian; Lancée, Charles T; de Jong, Nico; Pertijs, Michiel A P; Meijer, Gerard C M

2012-07-01

There is a clear clinical need for creating 3-D images of the heart. One promising technique is the use of transesophageal echocardiography (TEE). To enable 3-D TEE, we are developing a miniature ultrasound probe containing a matrix piezoelectric transducer with more than 2000 elements. Because a gastroscopic tube cannot accommodate the cables needed to connect all transducer elements directly to an imaging system, a major challenge is to locally reduce the number of channels, while maintaining a sufficient signal-to-noise ratio. This can be achieved by using front-end receiver electronics bonded to the transducers to provide appropriate signal conditioning in the tip of the probe. This paper presents the design of such electronics, realizing time-gain compensation (TGC) and micro-beamforming using simple, low-power circuits. Prototypes of TGC amplifiers and micro-beamforming cells have been fabricated in 0.35-μm CMOS technology. These prototype chips have been combined on a printed circuit board (PCB) to form an ultrasound-receiver system capable of reading and combining the signals of three transducer elements. Experimental results show that this design is a suitable candidate for 3-D TEE.

The front-end electronics of the LSPE-SWIPE experiment

NASA Astrophysics Data System (ADS)

Fontanelli, F.; Biasotti, M.; Bevilacqua, A.; Siccardi, F.

2016-07-01

The SWIPE detector of the Ballon Borne Mission LSPE (see e.g. the contribution of P. de Bernardis et al. in this conference) intends to measure the primordial 'B-mode' polarization of the Cosmic Microwave Background (CMB). For this scope microwave telescopes need sensitive cryogenic bolometers with an overall equivalent noise temperature in the nK range. The detector is a spiderweb bolometer based on transition edge sensor and followed by a SQUID to perform the signal readout. This contribution will concentrate on the design, description and first tests on the front-end electronics which processes the squid output (and controls it). The squid output is first amplified by a very low noise preamplifier based on a discrete JFET input differential architecture followed by a low noise CMOS operational amplifier. Equivalent input noise density is 0.6 nV/Hz and bandwidth extends up to at least 2 MHz. Both devices (JFET and CMOS amplifier) have been tested at liquid nitrogen. The second part of the contribution will discuss design and results of the control electronics, both the flux locked loop for the squid and the slow control chain to monitor and set up the system will be reviewed.

Position sensitive and energy dispersive x-ray detector based on silicon strip detector technology

NASA Astrophysics Data System (ADS)

Wiącek, P.; Dąbrowski, W.; Fink, J.; Fiutowski, T.; Krane, H.-G.; Loyer, F.; Schwamberger, A.; Świentek, K.; Venanzi, C.

2015-04-01

A new position sensitive detector with a global energy resolution for the entire detector of about 380 eV FWHM for 8.04 keV line at ambient temperature is presented. The measured global energy resolution is defined by the energy spectra summed over all strips of the detector, and thus it includes electronic noise of the front-end electronics, charge sharing effects, matching of parameters across the channels and other system noise sources. The target energy resolution has been achieved by segmentation of the strips to reduce their capacitance and by careful optimization of the front-end electronics. The key design aspects and parameters of the detector are discussed briefly in the paper. Excellent noise and matching performance of the readout ASIC and negligible system noise allow us to operate the detector with a discrimination threshold as low as 1 keV and to measure fluorescence radiation lines of light elements, down to Al Kα of 1.49 keV, simultaneously with measurements of the diffraction patterns. The measurement results that demonstrate the spectrometric and count rate performance of the developed detector are presented and discussed in the paper.

Performance of the Low-Jitter High-Gain/Bandwidth Front-End Electronics of the HADES tRPC Wall

NASA Astrophysics Data System (ADS)

Belver, Daniel; Cabanelas, P.; Castro, E.; Garzon, J. A.; Gil, A.; Gonzalez-Diaz, D.; Koenig, W.; Traxler, M.

2010-10-01

A front-end electronics (FEE) chain for accurate time measurements has been developed for the new Resistive Plate Chamber (RPC)-based Time-of-Flight (TOF) wall of the High Acceptance Di-Electron Spectrometer (HADES). The wall covers an area of around 8 m2, divided in 6 sectors. In total, 1122 4-gap timing RPC cells are read-out by 2244 time and charge sensitive channels. The FEE chain consists of 2 custom-made boards: a 4-channel DaughterBOard (DBO) and a 32-channel MotherBOard (MBO). The DBO uses a fast 2 GHz amplifier feeding a dual high-speed discriminator. The time and charge information are encoded, respectively, in the leading edge and the width of an LVDS signal. Each MBO houses up to 8 DBOs providing them regulated voltage supply, threshold values via DACs, test signals and, additionally, routing out a signal proportional to the channel multiplicity needed for a 1st level trigger decision. The MBO delivers LVDS signals to a multi-purpose Trigger Readout Board (TRB) for data acquisition. The FEE allows achieving a system resolution around 75 ps fulfilling comfortably the requirements of the HADES upgrade .

Construction and first beam-tests of silicon-tungsten prototype modules for the CMS High Granularity Calorimeter for HL-LHC

NASA Astrophysics Data System (ADS)

Jain, S.

2017-03-01

The High Granularity Calorimeter (HGCAL) is the technology choice of the CMS collaboration for the endcap calorimetry upgrade planned to cope with the harsh radiation and pileup environment at the High Luminosity-LHC . The HGCAL is realized as a sampling calorimeter, including an electromagnetic compartment comprising 28 layers of silicon pad detectors with pad areas of 0.5-01. cm2 interspersed with absorbers made from tungsten and copper to form a highly compact and granular device. Prototype modules, based on hexagonal silicon pad sensors, with 128 channels, have been constructed and tested in beams at FNAL and at CERN. The modules include many of the features required for this challenging detector, including a PCB glued directly to the sensor, using through-hole wire-bonding for signal readout and 5 mm spacing between layers—including the front-end electronics and all services. Tests in 2016 have used an existing front-end chip —Skiroc2 (designed for the CALICE experiment for ILC). We present results from first tests of these modules both in the laboratory and with beams of electrons, pions and protons, including noise performance, calibration with mips and electron signals.

Stand-alone front-end system for high- frequency, high-frame-rate coded excitation ultrasonic imaging.

PubMed

Park, Jinhyoung; Hu, Changhong; Shung, K Kirk

2011-12-01

A stand-alone front-end system for high-frequency coded excitation imaging was implemented to achieve a wider dynamic range. The system included an arbitrary waveform amplifier, an arbitrary waveform generator, an analog receiver, a motor position interpreter, a motor controller and power supplies. The digitized arbitrary waveforms at a sampling rate of 150 MHz could be programmed and converted to an analog signal. The pulse was subsequently amplified to excite an ultrasound transducer, and the maximum output voltage level achieved was 120 V(pp). The bandwidth of the arbitrary waveform amplifier was from 1 to 70 MHz. The noise figure of the preamplifier was less than 7.7 dB and the bandwidth was 95 MHz. Phantoms and biological tissues were imaged at a frame rate as high as 68 frames per second (fps) to evaluate the performance of the system. During the measurement, 40-MHz lithium niobate (LiNbO(3)) single-element lightweight (<;0.28 g) transducers were utilized. The wire target measure- ment showed that the -6-dB axial resolution of a chirp-coded excitation was 50 μm and lateral resolution was 120 μm. The echo signal-to-noise ratios were found to be 54 and 65 dB for the short burst and coded excitation, respectively. The contrast resolution in a sphere phantom study was estimated to be 24 dB for the chirp-coded excitation and 15 dB for the short burst modes. In an in vivo study, zebrafish and mouse hearts were imaged. Boundaries of the zebrafish heart in the image could be differentiated because of the low-noise operation of the implemented system. In mouse heart images, valves and chambers could be readily visualized with the coded excitation.

Macro Pixel ASIC (MPA): the readout ASIC for the pixel-strip (PS) module of the CMS outer tracker at HL-LHC

NASA Astrophysics Data System (ADS)

Ceresa, D.; Marchioro, A.; Kloukinas, K.; Kaplon, J.; Bialas, W.; Re, V.; Traversi, G.; Gaioni, L.; Ratti, L.

2014-11-01

The CMS tracker at HL-LHC is required to provide prompt information on particles with high transverse momentum to the central Level 1 trigger. For this purpose, the innermost part of the outer tracker is based on a combination of a pixelated sensor with a short strip sensor, the so-called Pixel-Strip module (PS). The readout of these sensors is carried out by distinct ASICs, the Strip Sensor ASIC (SSA), for the strip layer, and the Macro Pixel ASIC (MPA) for the pixel layer. The processing of the data directly on the front-end module represents a design challenge due to the large data volume (30720 pixels and 1920 strips per module) and the limited power budget. This is the reason why several studies have been carried out to find the best compromise between ASICs performance and power consumption. This paper describes the current status of the MPA ASIC development where the logic for generating prompt information on particles with high transverse momentum is implemented. An overview of the readout method is presented with particular attention on the cluster reduction, position encoding and momentum discrimination logic. Concerning the architectural studies, a software test bench capable of reading physics Monte-Carlo generated events has been developed and used to validate the MPA design and to evaluate the MPA performance. The MPA-Light is scheduled to be submitted for fabrication this year and will include the full analog functions and a part of the digital logic of the final version in order to qualify the chosen VLSI technology for the analog front-end, the module assembly and the low voltage digital supply.

Systems Librarian and Automation Review.

ERIC Educational Resources Information Center

Schuyler, Michael

1992-01-01

Discusses software sharing on computer networks and the need for proper bandwidth; and describes the technology behind FidoNet, a computer network made up of electronic bulletin boards. Network features highlighted include front-end mailers, Zone Mail Hour, Nodelist, NetMail, EchoMail, computer conferences, tosser and scanner programs, and host…

End-Users, Front Ends and Librarians.

ERIC Educational Resources Information Center

Bourne, Donna E.

1989-01-01

The increase in end-user searching, the advantages and limitations of front ends, and the role of the librarian in end-user searching are discussed. It is argued that librarians need to recognize that front ends can be of benefit to themselves and patrons, and to assume the role of advisors and educators for end-users. (37 references) (CLB)

STIC3 - Silicon Photomultiplier Timing Chip with picosecond resolution

NASA Astrophysics Data System (ADS)

Stankova, Vera; Shen, Wei; Briggl, Konrad; Chen, Huangshan; Fischer, Peter; Gil, Alejandro; Harion, Tobias; Kiworra, Volker; Munwes, Yonathan; Ritzert, Michael; Schultz-Coulon, Hans-Christian

2015-07-01

The diagnostic of pancreas and prostate cancer is a challenging task due to the background noise coming from the closer organs. The EndoToFPET-US project aims to combine the synergy between metabolic and anatomical (ultrasound) image in order to improve the precision in the tumor localization. The goal of the project is to develop a Positron Emission Tomography (PET) system that provides a time-of-flight resolution of 200 ps FWHM for improving the signal to noise ratio and further to improve the medical image quality. In order to achieve this purpose an ASIC has been designed for very high timing resolution in time-of-flight (ToF) applications. In this paper we present the ASIC performance and the first characterization measurements with the 64-channels prototype version (STiC3). Measurements are performed with LYSO scintillator crystal and a Multi Pixel Photon Counter (MPPC). Measurements with the chip show an analog-front-end stage jitter of 35 ps for the first photo-electron equivalent charge and reach 18 ps for the third photo-electron. Coincidence time resolution (CTR) of 240 ps FWHM is measured with 3.1×3.1×15 mm3 LYSO crystal and 50 μm pixel pitch MPPC. Further optimization including the Time-to-Digital Converter (TDC) non-linearity corrections and setup fine tuning are ongoing for achieving the desired CTR of 200 ps FWHM.

Development of COTS ADC SEE Test System for the ATLAS LArCalorimeter Upgrade

DOE PAGES

Hu, Xue -Ye; Chen, Hu -Cheng; Chen, Kai; ...

2014-12-01

Radiation-tolerant, high speed, high density and low power commercial off-the-shelf (COTS) analog-to-digital converters (ADCs) are planned to be used in the upgrade to the Liquid Argon (LAr) calorimeter front end (FE) trigger readout electronics. Total ionization dose (TID) and single event effect (SEE) are two important radiation effects which need to be characterized on COTS ADCs. In our initial TID test, Texas Instruments (TI) ADS5272 was identified to be the top performer after screening a total 17 COTS ADCs from different manufacturers with dynamic range and sampling rate meeting the requirements of the FE electronics. Another interesting feature of ADS5272more » is its 6.5 clock cycles latency, which is the shortest among the 17 candidates. Based on the TID performance, we have designed a SEE evaluation system for ADS5272, which allows us to further assess its radiation tolerance. In this paper, we present a detailed design of ADS5272 SEE evaluation system and show the effectiveness of this system while evaluating ADS5272 SEE characteristics in multiple irradiation tests. According to TID and SEE test results, ADS5272 was chosen to be implemented in the full-size LAr Trigger Digitizer Board (LTDB) demonstrator, which will be installed on ATLAS calorimeter during the 2014 Long Shutdown 1 (LS1).« less

A semi-implantable multichannel telemetry system for continuous electrical, mechanical and hemodynamical recordings in animal cardiac research.

PubMed

Kong, Wei; Huang, Jian; Rollins, Dennis L; Ideker, Raymond E; Smith, William M

2007-03-01

We have developed an eight-channel telemetry system for studying experimental models of chronic cardiovascular disease. The system is an extension of a previous device that has been miniaturized, reduced in power consumption and provided with increased functionality. We added sensors for ventricular dimension, and coronary artery blood flow and arterial blood pressure that are suitable for use with the system. The telemetry system consists of a front end, a backpack and a host PC. The front end is a watertight stainless steel case with all sensor electronics sealed inside; it acquires dimension, flow, pressure and five cardiac electrograms from selected locations on the heart. The backpack includes a control unit, Bluetooth radio, and batteries. The control unit digitizes eight channels of data from the front end and forwards them to the host PC via Bluetooth link. The host PC has a receiving Bluetooth radio and Labview programs to store and display data. The whole system was successfully tested on the bench and in an animal model. This telemetry system will greatly enhance the ability to study events leading to spontaneous sudden cardiac arrest.

Performances of the Front-End Electronics for the HADES RPC TOF wall on a 12C beam

NASA Astrophysics Data System (ADS)

Belver, D.; Cabanelas, P.; Castro, E.; Díaz, J.; Garzón, J. A.; Gil, A.; Gonzalez-Diaz, D.; Koenig, W.; Traxler, M.; Zapata, M.

2009-05-01

A Front-End Electronics (FEE) chain for timing accurate measurements has been developed for the RPC wall upgrade of the High-Acceptance DiElectron Spectrometer (HADES). The wall will cover an area of around 8 m with 1122 RPC cells (2244 electronic channels). The FEE chain consists of two boards: a four-channel DaughterBOard (DBO) and a 32-channel MotherBOard (MBO). The DBO uses a fast 2 GHz amplifier feeding a discriminator. The time and the charge information are encoded in the leading and the trailing edge (by a charge to width method) of an LVDS signal. Each MBO houses up to eight DBOs providing them regulated voltage supply, threshold values via DACs, test signals and collection of their trigger outputs. The MBO delivers LVDS signals to a time-to-digital converter readout board (TRB) based on HPTDC for data acquisition. In this work, we present the performance of the FEE measured using: (a) narrow electronic test pulses and (b) real signals read out in a fully instrumented RPC sextant installed in its final position at the HADES. The detector was exposed to particles coming from reactions of a 12C beam on Be and Nb targets at 2 GeV/A kinetic energy. Results for the whole electronic chain (DBO+MBO+TRB) show a timing jitter of around 40 ps/channel for pulses above 100 fC and 80 ps/channel for beam data taken with the RPC.

A Spacecraft Housekeeping System-on-Chip in a Radiation Hardened Structured ASIC

NASA Technical Reports Server (NTRS)

Suarez, George; DuMonthier, Jeffrey J.; Sheikh, Salman S.; Powell, Wesley A.; King, Robyn L.

2012-01-01

Housekeeping systems are essential to health monitoring of spacecraft and instruments. Typically, sensors are distributed across various sub-systems and data is collected using components such as analog-to-digital converters, analog multiplexers and amplifiers. In most cases programmable devices are used to implement the data acquisition control and storage, and the interface to higher level systems. Such discrete implementations require additional size, weight, power and interconnect complexity versus an integrated circuit solution, as well as the qualification of multiple parts. Although commercial devices are readily available, they are not suitable for space applications due the radiation tolerance and qualification requirements. The Housekeeping System-o n-A-Chip (HKSOC) is a low power, radiation hardened integrated solution suitable for spacecraft and instrument control and data collection. A prototype has been designed and includes a wide variety of functions including a 16-channel analog front-end for driving and reading sensors, analog-to-digital and digital-to-analog converters, on-chip temperature sensor, power supply current sense circuits, general purpose comparators and amplifiers, a 32-bit processor, digital I/O, pulse-width modulation (PWM) generators, timers and I2C master and slave serial interfaces. In addition, the device can operate in a bypass mode where the processor is disabled and external logic is used to control the analog and mixed signal functions. The device is suitable for stand-alone or distributed systems where multiple chips can be deployed across different sub-systems as intelligent nodes with computing and processing capabilities.

Front-end ASICs for high-energy astrophysics in space

NASA Astrophysics Data System (ADS)

Gevin, O.; Limousin, O.; Meuris, A.

2016-07-01

In most of embedded imaging systems for space applications, high granularity and increasing size of focal planes justify an almost systematic use of integrated circuits. . To fulfill challenging requirements for excellent spatial and energy resolution, integrated circuits must fit the sensors perfectly and interface the system such a way to optimize simultaneously noise, geometry and architecture. Moreover, very low power consumption and radiation tolerance are mandatory to envision a use onboard a payload in space. Consequently, being part of an optimized detection system for space, the integrated circuit is specifically designed for each application and becomes an Application Specific Integrated Circuits (ASIC). The paper focuses on mixed analog and digital signal ASICs for spectro-imaging systems in the keVMeV energy band. The first part of the paper summarizes the main advantages conferred by the use of front-end ASICs for highenergy astrophysics instruments in space mission. Space qualification of ASICs requires the chip to be radiation hard. The paper will shortly describe some of the typical hardening techniques and give some guidelines that an ASIC designer should follow to choose the most efficient technology for his project. The first task of the front-end electronics is to convert the charge coming from the detector into a voltage. For most of the Silicon detectors (CCD, DEPFET, SDD) this is conversion happens in the detector itself. For other sensor materials, charge preamplifiers operate the conversion. The paper shortly describes the different key parameters of charge preamplifiers and the binding parameters for the design. Filtering is generally mandatory in order to increase the signal to noise ratio or to reduce the duration of the signal. After a brief review on the main noise sources, the paper reviews noise-filtering techniques that are commonly used in Integrated circuits designs. The way sensors and ASICs are interconnected together plays a major role in the noise performances of the detection systems. The geometry of a sensor is therefore critical and drives the ASIC design. The second part of the paper takes the geometry of the detector as a story line to explore different kinds of ASIC structures and architectures. From the simple single-channel ASIC for CCDs to the most advanced 3D ASIC prototypes used to build dead-zone free imaging systems, the paper reports on different families of circuits for spectro-imaging systems. It emphasizes a variety of designer choices, all around the word, in different space missions.

Status of the photomultiplier-based FlashCam camera for the Cherenkov Telescope Array

NASA Astrophysics Data System (ADS)

Pühlhofer, G.; Bauer, C.; Eisenkolb, F.; Florin, D.; Föhr, C.; Gadola, A.; Garrecht, F.; Hermann, G.; Jung, I.; Kalekin, O.; Kalkuhl, C.; Kasperek, J.; Kihm, T.; Koziol, J.; Lahmann, R.; Manalaysay, A.; Marszalek, A.; Rajda, P. J.; Reimer, O.; Romaszkan, W.; Rupinski, M.; Schanz, T.; Schwab, T.; Steiner, S.; Straumann, U.; Tenzer, C.; Vollhardt, A.; Weitzel, Q.; Winiarski, K.; Zietara, K.

2014-07-01

The FlashCam project is preparing a camera prototype around a fully digital FADC-based readout system, for the medium sized telescopes (MST) of the Cherenkov Telescope Array (CTA). The FlashCam design is the first fully digital readout system for Cherenkov cameras, based on commercial FADCs and FPGAs as key components for digitization and triggering, and a high performance camera server as back end. It provides the option to easily implement different types of trigger algorithms as well as digitization and readout scenarios using identical hardware, by simply changing the firmware on the FPGAs. The readout of the front end modules into the camera server is Ethernet-based using standard Ethernet switches and a custom, raw Ethernet protocol. In the current implementation of the system, data transfer and back end processing rates of 3.8 GB/s and 2.4 GB/s have been achieved, respectively. Together with the dead-time-free front end event buffering on the FPGAs, this permits the cameras to operate at trigger rates of up to several ten kHz. In the horizontal architecture of FlashCam, the photon detector plane (PDP), consisting of photon detectors, preamplifiers, high voltage-, control-, and monitoring systems, is a self-contained unit, mechanically detached from the front end modules. It interfaces to the digital readout system via analogue signal transmission. The horizontal integration of FlashCam is expected not only to be more cost efficient, it also allows PDPs with different types of photon detectors to be adapted to the FlashCam readout system. By now, a 144-pixel mini-camera" setup, fully equipped with photomultipliers, PDP electronics, and digitization/ trigger electronics, has been realized and extensively tested. Preparations for a full-scale, 1764 pixel camera mechanics and a cooling system are ongoing. The paper describes the status of the project.

KLauS: an ASIC for silicon photomultiplier readout and its application in a setup for production testing of scintillating tiles

NASA Astrophysics Data System (ADS)

Briggl, K.; Dorn, M.; Hagdorn, R.; Harion, T.; Schultz-Coulon, H. C.; Shen, W.

2014-02-01

KLauS is an ASIC produced in the AMS 0.35 μm SiGe process to read out the charge signals from silicon photomultipliers. Developed as an analog front-end for future calorimeters with high granularity as pursued by the AHCAL concept in the CALICE collaboration, the ASIC is designed to measure the charge signal of the sensors in a large dynamic range and with low electronic noise contributions. In order to tune the operation voltage of each sensor individually, an 8-bit DAC to tune the voltage at the input terminal within a range of 2V is implemented. Using an integrated fast comparator with low jitter, the time information can be measured with sub-nanosecond resolution. The low power consumption of the ASIC can be further decreased using power gating techniques. Future versions of KLauS are under development and will incorporate an ADC with a resolution of up to 12-bits and blocks for digital data transmission. The chip is used in a setup for mass testing and characterization of scintillator tiles for the AHCAL test beam program.

STREAMFLOW LOSSES IN THE SANTA CRUZ RIVER, ARIZONA.

USGS Publications Warehouse

Aldridge, B.N.

1985-01-01

The discharge and volume of flow in a peak decrease as the peak moves through an 89-mile (143 km) reach of the Santa Cruz River. An average of three peaks per year flow the length of the reach. Of 17,500 acre-ft (21,600 dam**3) that entered the upstream end of the reach, 2300 acre-ft (2,840 dam**3), 13 percent of the inflow, left the reach as streamflow. The remainder was lost through infiltration. Losses in a reach of channel were estimated by relating losses to the discharge at the upstream end of the reach. Tributary inflow was estimated through the use of synthesized duration curves. Streamflow losses along mountain fronts were estimated through the use of an electric analog model and by relating losses shown by the model to the median altitude of the contributing area.

A minimalist approach to receiver architecture

NASA Technical Reports Server (NTRS)

Collins, O.

1991-01-01

New signal processing techniques are described for Deep Space Network radios and a proposed receiver architecture is presented, as well as experimental results on this new receiver's analog front end. The receiver's design employs direct downconversion rather than high speed digitization, and it is just as suitable for use as a space based probe relay receiver as it is for installation at a ground antenna. The advantages of having an inexpensive, shoe box size receiver, which could be carried around to antennas of opportunity, used for spacecraft testing or installed in the base of every antenna in a large array are the force behind this project.

A compact, low-loss, tunable phase shifter on defect mitigated dielectrics up to 40 GHz

NASA Astrophysics Data System (ADS)

Orloff, Nathan; Long, Christian; Lu, Xifeng; Nair, Hari; Dawley, Natalie; Schlom, Darrell; Booth, James

With the emergence of the internet-of-things and increased connectivity of modern commerce, consumers have driven demand for wireless spectrum beyond current capacity and infrastructure capabilities. One way the telecommunications industry is addressing this problem is by pushing front-end electronics to higher frequencies, introducing carrier aggregation schemes, and developing spectrum-sharing techniques. Some of these solutions require frequency agile components that are vastly different from what is in today's marketplace. Perhaps the most basic and ubiquitous component in front-end electronics is the phase shifter. Phase shifters are particularly important for compact beam-forming antennas that may soon appear in commercial technology. Here, we demonstrate a compact, tunable phase shifter with very low insertion loss up to 40 GHz on a defect mitigated tunable dielectric. We demonstrate performance compared to barium-doped strontium titanate phase shifters. Such phase shifters could potentially meet the stringent size and performance characteristics demanded by telecommunications industry, readily facilitating massive multiple-input multiple-output antennas in the next-generation of mobile handsets.

Gauss-Seidel Iterative Method as a Real-Time Pile-Up Solver of Scintillation Pulses

NASA Astrophysics Data System (ADS)

Novak, Roman; Vencelj, Matja¿

2009-12-01

The pile-up rejection in nuclear spectroscopy has been confronted recently by several pile-up correction schemes that compensate for distortions of the signal and subsequent energy spectra artifacts as the counting rate increases. We study here a real-time capability of the event-by-event correction method, which at the core translates to solving many sets of linear equations. Tight time limits and constrained front-end electronics resources make well-known direct solvers inappropriate. We propose a novel approach based on the Gauss-Seidel iterative method, which turns out to be a stable and cost-efficient solution to improve spectroscopic resolution in the front-end electronics. We show the method convergence properties for a class of matrices that emerge in calorimetric processing of scintillation detector signals and demonstrate the ability of the method to support the relevant resolutions. The sole iteration-based error component can be brought below the sliding window induced errors in a reasonable number of iteration steps, thus allowing real-time operation. An area-efficient hardware implementation is proposed that fully utilizes the method's inherent parallelism.

Front End Software for Online Database Searching. Part 2: The Marketplace.

ERIC Educational Resources Information Center

Levy, Louise R.; Hawkins, Donald T.

1986-01-01

This article analyzes the front end software marketplace and discusses some of the complex forces influencing it. Discussion covers intermediary market; end users (library customers, scientific and technical professionals, corporate business specialists, consumers); marketing strategies; a British front end development firm; competitive pressures;…

EARS: Electronic Access to Reference Service.

PubMed Central

Weise, F O; Borgendale, M

1986-01-01

Electronic Access to Reference Service (EARS) is a front end to the Health Sciences Library's electronic mail system, with links to the online public catalog. EARS, which became operational in September 1984, is accessed by users at remote sites with either a terminal or microcomputer. It is menu-driven, allowing users to request: a computerized literature search, reference information, a photocopy of a journal article, or a book. This paper traces the history of EARS and discusses its use, its impact on library staff and services, and factors that influence the diffusion of new technology. PMID:3779167

EARS: Electronic Access to Reference Service.

PubMed

Weise, F O; Borgendale, M

1986-10-01

Electronic Access to Reference Service (EARS) is a front end to the Health Sciences Library's electronic mail system, with links to the online public catalog. EARS, which became operational in September 1984, is accessed by users at remote sites with either a terminal or microcomputer. It is menu-driven, allowing users to request: a computerized literature search, reference information, a photocopy of a journal article, or a book. This paper traces the history of EARS and discusses its use, its impact on library staff and services, and factors that influence the diffusion of new technology.

The PixFEL project: Progress towards a fine pitch X-ray imaging camera for next generation FEL facilities

NASA Astrophysics Data System (ADS)

Rizzo, G.; Batignani, G.; Benkechkache, M. A.; Bettarini, S.; Casarosa, G.; Comotti, D.; Dalla Betta, G.-F.; Fabris, L.; Forti, F.; Grassi, M.; Lodola, L.; Malcovati, P.; Manghisoni, M.; Mendicino, R.; Morsani, F.; Paladino, A.; Pancheri, L.; Paoloni, E.; Ratti, L.; Re, V.; Traversi, G.; Vacchi, C.; Verzellesi, G.; Xu, H.

2016-07-01

The INFN PixFEL project is developing the fundamental building blocks for a large area X-ray imaging camera to be deployed at next generation free electron laser (FEL) facilities with unprecedented intensity. Improvement in performance beyond the state of art in imaging instrumentation will be explored adopting advanced technologies like active edge sensors, a 65 nm node CMOS process and vertical integration. These are the key ingredients of the PixFEL project to realize a seamless large area focal plane instrument composed by a matrix of multilayer four-side buttable tiles. In order to minimize the dead area and reduce ambiguities in image reconstruction, a fine pitch active edge thick sensor is being optimized to cope with very high intensity photon flux, up to 104 photons per pixel, in the range from 1 to 10 keV. A low noise analog front-end channel with this wide dynamic range and a novel dynamic compression feature, together with a low power 10 bit analog to digital conversion up to 5 MHz, has been realized in a 110 μm pitch with a 65 nm CMOS process. Vertical interconnection of two CMOS tiers will be also explored in the future to build a four-side buttable readout chip with high density memories. In the long run the objective of the PixFEL project is to build a flexible X-ray imaging camera for operation both in burst mode, like at the European X-FEL, or in continuous mode with the high frame rates anticipated for future FEL facilities.

All-digital full waveform recording photon counting flash lidar

NASA Astrophysics Data System (ADS)

Grund, Christian J.; Harwit, Alex

2010-08-01

Current generation analog and photon counting flash lidar approaches suffer from limitation in waveform depth, dynamic range, sensitivity, false alarm rates, optical acceptance angle (f/#), optical and electronic cross talk, and pixel density. To address these issues Ball Aerospace is developing a new approach to flash lidar that employs direct coupling of a photocathode and microchannel plate front end to a high-speed, pipelined, all-digital Read Out Integrated Circuit (ROIC) to achieve photon-counting temporal waveform capture in each pixel on each laser return pulse. A unique characteristic is the absence of performance-limiting analog or mixed signal components. When implemented in 65nm CMOS technology, the Ball Intensified Imaging Photon Counting (I2PC) flash lidar FPA technology can record up to 300 photon arrivals in each pixel with 100 ps resolution on each photon return, with up to 6000 range bins in each pixel. The architecture supports near 100% fill factor and fast optical system designs (f/#<1), and array sizes to 3000×3000 pixels. Compared to existing technologies, >60 dB ultimate dynamic range improvement, and >104 reductions in false alarm rates are anticipated, while achieving single photon range precision better than 1cm. I2PC significantly extends long-range and low-power hard target imaging capabilities useful for autonomous hazard avoidance (ALHAT), navigation, imaging vibrometry, and inspection applications, and enables scannerless 3D imaging for distributed target applications such as range-resolved atmospheric remote sensing, vegetation canopies, and camouflage penetration from terrestrial, airborne, GEO, and LEO platforms. We discuss the I2PC architecture, development status, anticipated performance advantages, and limitations.

Internal monitoring of GBTx emulator using IPbus for CBM experiment

NASA Astrophysics Data System (ADS)

Mandal, Swagata; Zabolotny, Wojciech; Sau, Suman; Chkrabarti, Amlan; Saini, Jogender; Chattopadhyay, Subhasis; Pal, Sushanta Kumar

2015-09-01

The Compressed Baryonic Matter (CBM) experiment is a part of the Facility for Antiproton and Ion Research (FAIR) in Darmstadt at GSI. In CBM experiment a precisely time synchronized fault tolerant self-triggered electronics is required for Data Acquisition (DAQ) system in CBM experiments which can support high data rate (up to several TB/s). As a part of the implementation of the DAQ system of Muon Chamber (MUCH) which is one of the important detectors in CBM experiment, a FPGA based Gigabit Transceiver (GBTx) emulator is implemented. Readout chain for MUCH consists of XYTER chips (Front end electronics) which will be directly connected to detector, GBTx emulator, Data Processing Board (DPB) and First level event selector board (FLIB) with backend software interface. GBTx emulator will be connected with the XYTER emulator through LVDS (Low Voltage Differential Signalling) line in the front end and in the back end it is connected with DPB through 4.8 Gbps optical link. IPBus over Ethernet is used for internal monitoring of the registers within the GBTx. In IPbus implementation User Datagram Protocol (UDP) stack is used in transport layer of OSI model so that GBTx can be controlled remotely. A Python script is used at computer side to drive IPbus controller.

Caliste 64: detection unit of a spectro imager array for a hard x-ray space telescope

NASA Astrophysics Data System (ADS)

Meuris, A.; Limousin, O.; Lugiez, F.; Gevin, O.; Pinsard, F.; Blondel, C.; Le Mer, I.; Delagnes, E.; Vassal, M. C.; Soufflet, F.; Bocage, R.

2008-07-01

In the frame of the hard X-ray Simbol-X observatory, a joint CNES-ASI space mission to be flown in 2014, a prototype of miniature Cd(Zn)Te camera equipped with 64 pixels has been designed. The device, called Caliste 64, is a spectro-imager with high resolution event time-tagging capability. Caliste 64 integrates a Cd(Zn)Te semiconductor detector with segmented electrode and its front-end electronics made of 64 independent analog readout channels. This 1 × 1 × 2 cm3 camera, able to detect photons in the range from 2 keV up to 250 keV, is an elementary detection unit juxtaposable on its four sides. Consequently, large detector array can be made assembling a mosaic of Caliste 64 units. Electronics readout module is achieved by stacking four IDeF-X V1.1 ASICs, perpendicular to the detection plane. We achieved good noise performances, with a mean Equivalent Noise Charge of ~65 electrons rms over the 64 channels. Time resolution is better than 70 ns rms for energy deposits greater than 50 keV, taking into account electronic noise and technological dispersal, which enables to reject background by anticoincidence with very low probability of error. For the first prototypes, we chose CdTe detectors equipped with Al-Ti-Au Schottky barrier contacts because of their very low dark current and excellent spectroscopic performances. So far, three Caliste 64 cameras have been realized and tested. When the crystal is cooled down to -10°C, the sum spectrum built with the 64 pixels of a Caliste 64 sample results in a spectral resolution of 664 eV FWHM at 13.94 keV and 841 eV FWHM at 59.54 keV.

Observational evidence for thermal wave fronts in solar flares

NASA Technical Reports Server (NTRS)

Rust, D. M.; Simnett, G. M.; Smith, D. F.

1985-01-01

Images in 3.5-30 keV X-rays obtained during the first few minutes of seven solar flares show rapid motions. In each case X-ray emission first appeared at one end of a magnetic field structure, and then propagated along the field at a velocity between 800 and 1700 km/s. The observed X-ray structures were 45,000-230,000 km long. Simultaneous H-alpha images were available in three cases; they showed brightenings when the fast-moving fronts arrived at the chromosphere. The fast-moving fronts are interpreted as electron thermal conduction fronts since their velocities are consistent with conduction at the observed temperatures of 1-3 x 10 to the 7th K. The inferred conductive heat flux of up to 10-billion ergs/s sq cm accounts for most of the energy released in the flares, implying that the flares were primarily thermal phenomena.

New instrumentation for the 1.2m Southern Millimeter Wave Telescope (SMWT)

NASA Astrophysics Data System (ADS)

Vasquez, P.; Astudillo, P.; Rodriguez, R.; Monasterio, D.; Reyes, N.; Finger, R.; Mena, F. P.; Bronfman, L.

2016-07-01

Here we describe the status of the upgrade program that is being performed to modernize the Southern 1.2m Wave Telescope. The Telescope was built during early ´80 to complete the first Galactic survey of Molecular Clouds in the CO(1-0) line. After a fruitful operation in CTIO the telescope was relocated to the Universidad de Chile, Cerro Calán Observatory. The new site has an altitude of 850m and allows observations in the millimeter range throughout the year. The telescope was upgraded, including a new building to house operations, new control system, and new receiver and back-end technologies. The new front end is a sideband-separating receiver based on a HEMT amplifier and sub-harmonic mixers. It is cooled with Liquid Nitrogen to diminish its noise temperature. The back-end is a digital spectrometer, based on the Reconfigurable Open Architecture Computing Hardware (ROACH). The new spectrometer includes IF hybridization capabilities to avoid analog hybrids and, therefore, improve the sideband rejection ratio of the receiver.

Recent advances in the front-end sources of the LMJ fusion laser

NASA Astrophysics Data System (ADS)

Gleyze, Jean-François; Hares, Jonathan; Vidal, Sebastien; Beck, Nicolas; Dubertrand, Jerome; Perrin, Arnaud

2011-03-01

LMJ is typical of lasers used for inertial confinement fusion and requires a laser of programmable parameters for injection into the main amplifier. For several years, the CEA has developed front end fiber sources, based on telecommunications fiber optics technologies. These sources meet the needs but as the technology evolves we can expect improved efficiency and reductions in size and cost. We give an up-to-date description of some present development issues, particularly in the field of temporal shaping with the use of digital system. The synchronization of such electronics has been challenging however we now obtain system jitter of less then 7ps rms. Secondly, we will present recent advance in the use of fiber based pre-comp system to avoid parasitic amplitude modulation from phase modulation used for spectral broadening.

Performance of a resistive plate chamber equipped with a new prototype of amplified front-end electronics in the ALICE detector

NASA Astrophysics Data System (ADS)

Marchisone, Massimiliano

2017-09-01

ALICE is the LHC experiment dedicated to the study of heavy-ion collisions. At forward rapidity a muon spectrometer detects muons from low mass mesons, quarkonia (c\\bar{c} and b\\bar{b} mesons), open heavy-flavor hadrons (D and B mesons) as well as from weak bosons. A muon selection based on transverse momentum is made by a trigger system composed of 72 Resistive Plate Chambers (RPCs). For the LHC Run 1 and the ongoing Run 2 the RPCs have been equipped with a non-amplified Front-End Electronics (FEE) called ADULT. However, in view of an increase in luminosity expected for Run 3 (foreseen to start in 2021) the possibility to use an amplified FEE has been explored in order to improve the counting rate limitation and to prevent the aging of the detector by reducing the charge per hit. A prototype of this new electronics (FEERIC) has been developed and tested first with cosmic rays before equipping one RPC in the ALICE cavern with it. In this proceeding the most important performance indicators (such as efficiency, dark current, dark rate, cluster size, total charge and charge per hit) of the RPC equipped with this new FEE will be reviewed and compared to the others read out with ADULT.

Data acquisition instrument for EEG based on embedded system

NASA Astrophysics Data System (ADS)

Toresano, La Ode Husein Z.; Wijaya, Sastra Kusuma; Prawito, Sudarmaji, Arief; Syakura, Abdan; Badri, Cholid

2017-02-01

An electroencephalogram (EEG) is a device for measuring and recording the electrical activity of brain. The EEG data of signal can be used as a source of analysis for human brain function. The purpose of this study was to design a portable multichannel EEG based on embedded system and ADS1299. The ADS1299 is an analog front-end to be used as an Analog to Digital Converter (ADC) to convert analog signal of electrical activity of brain, a filter of electrical signal to reduce the noise on low-frequency band and a data communication to the microcontroller. The system has been tested to capture brain signal within a range of 1-20 Hz using the NETECH EEG simulator 330. The developed system was relatively high accuracy of more than 82.5%. The EEG Instrument has been successfully implemented to acquire the brain signal activity using a PC (Personal Computer) connection for displaying the recorded data. The final result of data acquisition has been processed using OpenBCI GUI (Graphical User Interface) based through real-time process for 8-channel signal acquisition, brain-mapping and power spectral decomposition signal using the standard FFT (Fast Fourier Transform) algorithm.

Characteristics of a multichannel low-noise front-end ASIC for CZT-based small animal PET imaging

NASA Astrophysics Data System (ADS)

Gao, W.; Liu, H.; Gan, B.; Hu, Y.

2014-05-01

In this paper, we present the design and characteristics of a novel low-noise front-end readout application-specific integrated circuit dedicated to CdZnTe (CZT) detectors for a small animal PET imaging system. A low-noise readout method based on the charge integration and the delayed peak detection is proposed. An eight-channel front-end readout prototype chip is designed and implemented in a 0.35 μm CMOS process. The die size is 2.3 mm ×2.3 mm. The prototype chip is tested in different methods including electronic test, energy spectrum test and irradiation test. The input range of the ASIC is from 2000e- to 180,000e-, reflecting the energy of the gamma ray from 11.2 keV to 1 MeV. The gain of the readout channel is 65 mV/fC at the shaping time of 1 μs. The best test result of the equivalent noise charge (ENC) is 58.9 e- at zero farad plus 5.4 e- per picofarad. The nonlinearity and the crosstalk are less than 3% and less than 2%, respectively, at the room temperature. The static power dissipation is about 3 mW/channel.

Loran digital phase-locked loop and RF front-end system error analysis

NASA Technical Reports Server (NTRS)

Mccall, D. L.

1979-01-01

An analysis of the system performance of the digital phase locked loops (DPLL) and RF front end that are implemented in the MINI-L4 Loran receiver is presented. Three of the four experiments deal with the performance of the digital phase locked loops. The other experiment deals with the RF front end and DPLL system error which arise in the front end due to poor signal to noise ratios. The ability of the DPLLs to track the offsets is studied.

Navigating the Information Ocean: Charting the Course. Abstracts from the Academic Library Association of Ohio Annual Conference (Columbus, Ohio, November 4, 1994).

ERIC Educational Resources Information Center

Academic Library Association of Ohio.

Abstracts of 14 papers presented at the conference are provided here. Titles are: "Electronic Information Terraforming: Designing and Implementing a Front-end System Using World-Wide Web Technology" (Abbie Basile; And Others); "Characteristics of Generation X and Implications for Reference and Instructional Services" (Catherine…

New coherent laser communication detection scheme based on channel-switching method.

PubMed

Liu, Fuchuan; Sun, Jianfeng; Ma, Xiaoping; Hou, Peipei; Cai, Guangyu; Sun, Zhiwei; Lu, Zhiyong; Liu, Liren

2015-04-01

A new coherent laser communication detection scheme based on the channel-switching method is proposed. The detection front end of this scheme comprises a 90° optical hybrid and two balanced photodetectors which outputs the in-phase (I) channel and quadrature-phase (Q) channel signal current, respectively. With this method, the ultrahigh speed analog/digital transform of the signal of the I or Q channel is not required. The phase error between the signal and local lasers is obtained by simple analog circuit. Using the phase error signal, the signals of the I/Q channel are switched alternately. The principle of this detection scheme is presented. Moreover, the comparison of the sensitivity of this scheme with that of homodyne detection with an optical phase-locked loop is discussed. An experimental setup was constructed to verify the proposed detection scheme. The offline processing procedure and results are presented. This scheme could be realized through simple structure and has potential applications in cost-effective high-speed laser communication.

Transparent Fingerprint Sensor System for Large Flat Panel Display.

PubMed

Seo, Wonkuk; Pi, Jae-Eun; Cho, Sung Haeung; Kang, Seung-Youl; Ahn, Seong-Deok; Hwang, Chi-Sun; Jeon, Ho-Sik; Kim, Jong-Uk; Lee, Myunghee

2018-01-19

In this paper, we introduce a transparent fingerprint sensing system using a thin film transistor (TFT) sensor panel, based on a self-capacitive sensing scheme. An armorphousindium gallium zinc oxide (a-IGZO) TFT sensor array and associated custom Read-Out IC (ROIC) are implemented for the system. The sensor panel has a 200 × 200 pixel array and each pixel size is as small as 50 μm × 50 μm. The ROIC uses only eight analog front-end (AFE) amplifier stages along with a successive approximation analog-to-digital converter (SAR ADC). To get the fingerprint image data from the sensor array, the ROIC senses a capacitance, which is formed by a cover glass material between a human finger and an electrode of each pixel of the sensor array. Three methods are reviewed for estimating the self-capacitance. The measurement result demonstrates that the transparent fingerprint sensor system has an ability to differentiate a human finger's ridges and valleys through the fingerprint sensor array.

Characterization of the ePix100 prototype: a front-end ASIC for second-generation LCLS integrating hybrid pixel detectors

NASA Astrophysics Data System (ADS)

Caragiulo, P.; Dragone, A.; Markovic, B.; Herbst, R.; Nishimura, K.; Reese, B.; Herrmann, S.; Hart, P.; Blaj, G.; Segal, J.; Tomada, A.; Hasi, J.; Carini, G.; Kenney, C.; Haller, G.

2014-09-01

ePix100 is the first variant of a novel class of integrating pixel ASICs architectures optimized for the processing of signals in second generation LINAC Coherent Light Source (LCLS) X-Ray cameras. ePix100 is optimized for ultra-low noise application requiring high spatial resolution. ePix ASICs are based on a common platform composed of a random access analog matrix of pixel with global shutter, fast parallel column readout, and dedicated sigma-delta analog to digital converters per column. The ePix100 variant has 50μmx50μm pixels arranged in a 352x384 matrix, a resolution of 50e- r.m.s. and a signal range of 35fC (100 photons at 8keV). In its final version it will be able to sustain a frame rate of 1kHz. A first prototype has been fabricated and characterized and the measurement results are reported here.

Transparent Fingerprint Sensor System for Large Flat Panel Display

PubMed Central

Seo, Wonkuk; Pi, Jae-Eun; Cho, Sung Haeung; Kang, Seung-Youl; Ahn, Seong-Deok; Hwang, Chi-Sun; Jeon, Ho-Sik; Kim, Jong-Uk

2018-01-01

In this paper, we introduce a transparent fingerprint sensing system using a thin film transistor (TFT) sensor panel, based on a self-capacitive sensing scheme. An armorphousindium gallium zinc oxide (a-IGZO) TFT sensor array and associated custom Read-Out IC (ROIC) are implemented for the system. The sensor panel has a 200 × 200 pixel array and each pixel size is as small as 50 μm × 50 μm. The ROIC uses only eight analog front-end (AFE) amplifier stages along with a successive approximation analog-to-digital converter (SAR ADC). To get the fingerprint image data from the sensor array, the ROIC senses a capacitance, which is formed by a cover glass material between a human finger and an electrode of each pixel of the sensor array. Three methods are reviewed for estimating the self-capacitance. The measurement result demonstrates that the transparent fingerprint sensor system has an ability to differentiate a human finger’s ridges and valleys through the fingerprint sensor array. PMID:29351218

Fast wire per wire X-ray data acquisition system for time-resolved small angle scattering experiments

NASA Astrophysics Data System (ADS)

Epstein, A.; Briquet-Laugier, F.; Sheldon, S.; Boulin, C.

2000-04-01

Most of the X-ray multi-wire gas detectors used at the EMBL Hamburg outstation for time-resolved studies of biological samples are readout, using the delay line method. The main disadvantage of such readout systems is their event rate limitation introduced by the delay line and the required time to digital conversion step. They also lack the possibility to deal with multiple events. To overcome these limitations, a new approach for the complete readout system was introduced. The new linear detection system is based on the wire per wire approach where each individual wire is associated to preamplifier/discriminator/counter electronics channel. High-density, front-end electronics were designed around a fast current sensitive preamplifier. An eight-channel board was designed to include the preamplifiers-discriminators and the differential ECL drivers output stages. The detector front-end consists of 25 boards directly mounted inside the detector assembly. To achieve a time framing resolution as short as 10 /spl mu/s, very fast histogramming is required. The only way to implement this for a high number of channels (200 in our case) is by using a distributed system. The digital part of the system consists of a crate controller, up to 16 acquisition boards (capable of handling fast histogramming for up to 32-channels each) and an optical-link board (based on the Cypress "Hot-Link" chip set). Both the crate controller and the acquisition boards are based on a standard RISC microcontroller (IDT R3081) plug-in board. At present, a dedicated CAMAC module which we developed is used to interface the digital front-end acquisition crate to the host via the optical link.

MO-F-CAMPUS-J-03: Development of a Human Brain PET for On-Line Proton Beam-Range Verification

DOE Office of Scientific and Technical Information (OSTI.GOV)

Shao, Yiping

Purpose: To develop a prototype PET for verifying proton beam-range before each fractionated therapy that will enable on-line re-planning proton therapy. Methods: Latest “edge-less” silicon photomultiplier arrays and customized ASIC readout electronics were used to develop PET detectors with depth-of-interaction (DOI) measurement capability. Each detector consists of one LYSO array with each end coupled to a SiPM array. Multiple detectors can be seamlessly tiled together to form a large detector panel. Detectors with 1.5×1.5 and 2.0×2.0 mm crystals at 20 or 30 mm lengths were studied. Readout of individual SiPM or signal multiplexing was used to transfer 3D interaction position-codedmore » analog signals through flexible-print-circuit cables or PCB board to dedicated ASIC front-end electronics to output digital timing pulses that encode interaction information. These digital pulses can be transferred to, through standard LVDS cables, and decoded by a FPGA-based data acquisition of coincidence events and data transfer. The modular detector and scalable electronics/data acquisition will enable flexible PET system configuration for different imaging geometry. Results: Initial detector performance measurement shows excellent crystal identification even with 30 mm long crystals, ∼18% and 2.8 ns energy and timing resolutions, and around 2–3 mm DOI resolution. A small prototype PET scanner with one detector ring has been built and evaluated, validating the technology and design. A large size detector panel has been fabricated by scaling up from modular detectors. Different designs of resistor and capacitor based signal multiplexing boards were tested and selected based on optimal crystal identification and timing performance. Stackable readout electronics boards and FPGA-based data acquisition boards were developed and tested. A brain PET is under construction. Conclusion: Technology of large-size DOI detector based on SiPM array and advanced readout has been developed. PET imaging performance and initial phantom studies of on-line proton beam-range measurement will be conducted and reported. NIH grant R21CA187717; Cancer Prevention and Research Institute of Texas grant RP120326.« less

Integrated circuits for volumetric ultrasound imaging with 2-D CMUT arrays.

PubMed

Bhuyan, Anshuman; Choe, Jung Woo; Lee, Byung Chul; Wygant, Ira O; Nikoozadeh, Amin; Oralkan, Ömer; Khuri-Yakub, Butrus T

2013-12-01

Real-time volumetric ultrasound imaging systems require transmit and receive circuitry to generate ultrasound beams and process received echo signals. The complexity of building such a system is high due to requirement of the front-end electronics needing to be very close to the transducer. A large number of elements also need to be interfaced to the back-end system and image processing of a large dataset could affect the imaging volume rate. In this work, we present a 3-D imaging system using capacitive micromachined ultrasonic transducer (CMUT) technology that addresses many of the challenges in building such a system. We demonstrate two approaches in integrating the transducer and the front-end electronics. The transducer is a 5-MHz CMUT array with an 8 mm × 8 mm aperture size. The aperture consists of 1024 elements (32 × 32) with an element pitch of 250 μm. An integrated circuit (IC) consists of a transmit beamformer and receive circuitry to improve the noise performance of the overall system. The assembly was interfaced with an FPGA and a back-end system (comprising of a data acquisition system and PC). The FPGA provided the digital I/O signals for the IC and the back-end system was used to process the received RF echo data (from the IC) and reconstruct the volume image using a phased array imaging approach. Imaging experiments were performed using wire and spring targets, a ventricle model and a human prostrate. Real-time volumetric images were captured at 5 volumes per second and are presented in this paper.

Design details of Intelligent Instruments for PLC-free Cryogenic measurements, control and data acquisition

NASA Astrophysics Data System (ADS)

Antony, Joby; Mathuria, D. S.; Chaudhary, Anup; Datta, T. S.; Maity, T.

2017-02-01

Cryogenic network for linear accelerator operations demand a large number of Cryogenic sensors, associated instruments and other control-instrumentation to measure, monitor and control different cryogenic parameters remotely. Here we describe an alternate approach of six types of newly designed integrated intelligent cryogenic instruments called device-servers which has the complete circuitry for various sensor-front-end analog instrumentation and the common digital back-end http-server built together, to make crateless PLC-free model of controls and data acquisition. These identified instruments each sensor-specific viz. LHe server, LN2 Server, Control output server, Pressure server, Vacuum server and Temperature server are completely deployed over LAN for the cryogenic operations of IUAC linac (Inter University Accelerator Centre linear Accelerator), New Delhi. This indigenous design gives certain salient features like global connectivity, low cost due to crateless model, easy signal processing due to integrated design, less cabling and device-interconnectivity etc.

High Bandwidth, Multi-Purpose Passive Radar Receiver Design For Aerospace and Geoscience Targets

NASA Astrophysics Data System (ADS)

Vertatschitsch, Laura

Passive radar permits inexpensive and stealthy detection and tracking of aerospace and geoscience targets. Transmitters of opportunity such as commercial FM broadcast, DTV broadcast, and cell phone towers are already illuminating many populated areas with continuous power. Passive radar receivers can be located at a distance from the transmitter, and can sense this direct transmission as well as any reflections from ground clutter, aircraft, ionospheric turbulence and meteor trails. The 100% duty cycle allows for long coherent integration, increasing the sensitivity of these instruments greatly. Traditional radar receivers employ analog front end downconverters to translate the radio frequency spectrum to an intermediate frequency (IF) for sampling and signal processing. Such downconverters limit the spectrum available for study, and can introduce nonlinearities which limit the detectability of weak signals in the presence of strong signals. With suitably fast digitizers one can bypass the downconversion stage completely. Very fast digitizers may have relatively few bits, but precision is recovered in subsequent signal processing. We present a new passive radar receiver designed to utilize a broad spectrum of commercial transmitters without the use of a front end analog downconverter. The receiver centers around a Reconfigurable Open Architecture Computing Hardware (ROACH) board developed by the Collaboration for Astronomy Signal Processing and Electronics Research (CASPER) group. Fast sampling rates (8-bit samples as fast as 3 GSps) combined with 640 multiply/addition operations on the Virtex-5 FPGA centered on the ROACH allows for coherent processing of broad spectrum and dynamic decision-making on one device all while sharing a single front end, putting this device on the cutting edge of wideband receiver technology. The radar is also designed to support mobile operation. It fits within a 19'' rack, it is equipped with solid state hard drives, and can run off an uninterruptible power supply (UPS) for up to 1 hour of continuous operation. In this document we provide technical details of the hardware, firmware, and software of the system and design strategies and decisions. We cover the topic of coherent processing for passive radar, specifically an overview of the cross-ambiguity function as a detection mechanism. While the applications of a system like this are incredibly broad, the initial validation and performance analysis was applied specifically to detection of aircraft using Digital Television (DTV) broadcast as an illuminator. We present results of both stationary and mobile operation. In stationary operation, the same helicopter has been detected using two different DTV transmissions. Early mobile operation results show the Doppler-spread ground clutter and possible detection of aircraft. In addition to the fully-functional aircraft detection signal chain, alternative FPGA designs are presented with modes for fast sampling on two antennas or four antennas, with access to an aggregate 240 MHz of spectrum, with 8-bit samples. At these extremely high data rates, moderate data loss occurs while saving this data to disk, but as detailed within this document, it can be accounted for and the effects minimalized, still allowing for detection of aircraft. With these modes, FM transmission and DTV transmission can be captured synchronously from a single antenna and digitizer feed, an exciting result that offers promise for both aerospace and geoscience applications.

Fiber optical sensing on-board communication satellites

NASA Astrophysics Data System (ADS)

Hurni, A.; Lemke, N. M. K.; Roner, M.; Obermaier, J.; Putzer, P.; Kuhenuri Chami, N.

2017-11-01

Striving constantly to reduce mass, AIT effort and overall cost of the classical point-to-point wired temperature sensor harness on-board telecommunication satellites, OHB System (formerly Kayser-Threde) has introduced the Hybrid Sensor Bus (HSB) system. As a future spacecraft platform element, HSB relies on electrical remote sensor units as well as fiber-optical sensors, both of which can serially be connected in a bus architecture. HSB is a modular measurement system with many applications, also thanks to the opportunities posed by the digital I²C bus. The emphasis, however, is on the introduction of fiber optics and especially fiber-Bragg grating (FBG) temperature sensors as disruptive innovation for the company's satellite platforms. The light weight FBG sensors are directly inscribed in mechanically robust and radiation tolerant fibers, reducing the need for optical fiber connectors and splices to a minimum. Wherever an FBG sensor shall be used, the fiber is glued together with a corresponding temperature transducer to the satellites structure or to a subsystem. The transducer is necessary to provide decoupling of mechanical stress, but simultaneously ensure a high thermal conductivity. HSB has been developed in the frame of an ESA-ARTES program with European and German co-funding and will be verified as flight demonstrator on-board the German Heinrich Hertz satellite (H2Sat). In this paper the Engineering Model development of HSB is presented and a Fiber-optical Sensor Multiplexer for a more flexible sensor bus architecture is introduced. The HSB system aims at telecommunication satellite platforms with an operational life time beyond 15 years in geostationary orbit. It claims a high compatibility in terms of performance and interfaces with existing platforms while it was designed with future applications with increased radiation exposure already in mind. In its basic configuration HSB consists of four modules which are the Power Supply Unit, the HSB Controller Module, the Interrogator Controller Module and the Analog Front-End for the fiber-optical interrogation. The Interrogator Controller Module handles both, the electrical and fiber-optical sensor network. For the latter it is to be completed by the Analog Front-End. On this front-end, a tunable laser diode is implemented for the scanning of the FBG sensors. The reflected spectra are measured on multiple fiber channels and are then evaluated by use of a peak detection algorithm in order to obtain a precise temperature measurement. The precise operation of the photonic system on long terms can be guaranteed thanks to an inorbit calibration concept.

Design of area array CCD image acquisition and display system based on FPGA

NASA Astrophysics Data System (ADS)

Li, Lei; Zhang, Ning; Li, Tianting; Pan, Yue; Dai, Yuming

2014-09-01

With the development of science and technology, CCD(Charge-coupled Device) has been widely applied in various fields and plays an important role in the modern sensing system, therefore researching a real-time image acquisition and display plan based on CCD device has great significance. This paper introduces an image data acquisition and display system of area array CCD based on FPGA. Several key technical challenges and problems of the system have also been analyzed and followed solutions put forward .The FPGA works as the core processing unit in the system that controls the integral time sequence .The ICX285AL area array CCD image sensor produced by SONY Corporation has been used in the system. The FPGA works to complete the driver of the area array CCD, then analog front end (AFE) processes the signal of the CCD image, including amplification, filtering, noise elimination, CDS correlation double sampling, etc. AD9945 produced by ADI Corporation to convert analog signal to digital signal. Developed Camera Link high-speed data transmission circuit, and completed the PC-end software design of the image acquisition, and realized the real-time display of images. The result through practical testing indicates that the system in the image acquisition and control is stable and reliable, and the indicators meet the actual project requirements.

Design and performance of the readout electronics chain of the Delphi Forward Ring Imaging Cherenkov Detector

DOE Office of Scientific and Technical Information (OSTI.GOV)

Dam, P.; Nielsen, B.S.; Formenti, F.

1992-10-01

In this paper the Front End Readout electronics chain of the Forward Ring Imaging CHerenkov (FRICH) Detector used at the Delphi experiment of the Large Electron Positron (LEP) collider is presented. The system incorporates a wide band low noise preamplifier, mounted in the proximity of the MultiWire Proportional Chamber, an Amplifying-Discriminating-Multiple-xing FASTBUS unit for further signal amplification, discrimination and channel reduction and a LEP Time Digitizer FASTBUS unit for time digitization. The paper gives a general view of the detector and its electronics with particular emphasis on the novel characteristics and capabilities of the system.

Readout Electronics for the ATLAS LAr Calorimeter at HL-LHC

NASA Astrophysics Data System (ADS)

Chen, Hucheng; ATLAS Liquid Argon Calorimeter Group

The ATLAS Liquid Argon (LAr) calorimeters are high precision, high sensitivity and high granularity detectors designed to provide precision measurements of electrons, photons, jets and missing transverse energy. ATLAS and its LAr calorimeters have been operating and collecting proton-proton collisions at LHC since 2009. The current front-end electronics of the LAr calorimeters need to be upgraded to sustain the higher radiation levels and data rates expected at the upgraded high luminosity LHC machine (HL-LHC), which will have 5 times more luminosity than the LHC in its ultimate configuration. The complexity of the present electronics and the obsolescence of some of components of which it is made, will not allow a partial replacement of the system. A completely new readout architecture scheme is under study and many components are being developed in various R&D programs of the LAr Calorimeter Group.The new front-end readout electronics will send data continuously at each bunch crossing through high speed radiation resistant optical links. The data will be processed real-time with the possibility of implementing trigger algorithms for clusters and electron/photon identification at a higher granularity than that which is currently implemented. The new architecture will eliminate the intrinsic limitation presently existing on Level-1 trigger acceptance. This article is an overview of the R&D activities which covers architectural design aspects of the new electronics as well as some detailed progress on the development of several ASICs needed, and preliminary studies with FPGAs to cover the backend functions including part of the Level-1 trigger requirements. A recently proposed staged upgrade with hybrid Tower Builder Board (TBB) is also described.

The Muon Portal Double Tracker for the Inspection of Travelling Containers

NASA Astrophysics Data System (ADS)

Pugliatti, C.; Antonuccio, V.; Bandieramonte, M.; Becciani, U.; Belluomo, F.; Blancato, A.; Bonanno, G.; Costa, A.; Fallica, P. G.; Garozzo, S.; Grillo, A.; Indelicato, V.; La Rocca, P.; Leonora, E.; Longhitano, F.; Longo, S.; Lo Presti, D.; Marano, D.; Massimino, P.; Petta, C.; Pistagna, C.; Puglisi, M.; Randazzo, N.; Riggi, F.; Riggi, S.; Romeo, G.; Russo, G. V.; Santagati, G.; Timpanaro, M. C.; Valvo, G.; Vitello, F.; Zaia, A.

2015-12-01

The Muon Portal Project has as its goal the design and construction of a real-size working detector prototype in scale 1:1, to inspect the content of travelling containers by means of the secondary cosmic-ray muon radiation and to recognize high-Z hidden materials (i.e. U, Pu). The tomographic image is obtained by reconstructing the input and output trajectories of each muon when it crosses the container and, consequently, the scattering angle, making use of two trackers placed above and below the container. The scan is performed without adding any external radiation, in a reasonable time (few minutes) and with a good spatial and angular resolution. The detector consists of 8 planes each segmented in 6 identical modules. Each module is made of scintillating strips with two WaveLength Shifting fibers (WLS) inside, coupled to Silicon photomultipliers. The customized read-out electronics employs programmable boards. Thanks to a smart read-out system, the number of output channels is reduced by a factor 10. The signals from the front-end modules are sent to the read-out boards, in order to convert analog signals to digital ones, by comparison with a threshold. The data are pre-analyzed and stored into a data acquisition PC. After an intense measurement and simulation campaign to carefully characterize the detector components, the first detection modules ( 1 ×3 m2) have been already built. In this paper the detector architecture, particularly focusing on the used electronics and the main preliminary results will be presented.

Towards a Chemiresistive Sensor-Integrated Electronic Nose: A Review

PubMed Central

Chiu, Shih-Wen; Tang, Kea-Tiong

2013-01-01

Electronic noses have potential applications in daily life, but are restricted by their bulky size and high price. This review focuses on the use of chemiresistive gas sensors, metal-oxide semiconductor gas sensors and conductive polymer gas sensors in an electronic nose for system integration to reduce size and cost. The review covers the system design considerations and the complementary metal-oxide-semiconductor integrated technology for a chemiresistive gas sensor electronic nose, including the integrated sensor array, its readout interface, and pattern recognition hardware. In addition, the state-of-the-art technology integrated in the electronic nose is also presented, such as the sensing front-end chip, electronic nose signal processing chip, and the electronic nose system-on-chip. PMID:24152879

An accuracy aware low power wireless EEG unit with information content based adaptive data compression.

PubMed

Tolbert, Jeremy R; Kabali, Pratik; Brar, Simeranjit; Mukhopadhyay, Saibal

2009-01-01

We present a digital system for adaptive data compression for low power wireless transmission of Electroencephalography (EEG) data. The proposed system acts as a base-band processor between the EEG analog-to-digital front-end and RF transceiver. It performs a real-time accuracy energy trade-off for multi-channel EEG signal transmission by controlling the volume of transmitted data. We propose a multi-core digital signal processor for on-chip processing of EEG signals, to detect signal information of each channel and perform real-time adaptive compression. Our analysis shows that the proposed approach can provide significant savings in transmitter power with minimal impact on the overall signal accuracy.

Ultra-low-power wearable biopotential sensor nodes.

PubMed

Yazicioglu, R F; Torfs, T; Penders, J; Romero, I; Kim, H; Merken, P; Gyselinckx, B; Yoo, H J; Van Hoof, C

2009-01-01

This paper discusses ultra-low-power wireless sensor nodes intended for wearable biopotential monitoring. Specific attention is given to mixed-signal design approaches and their impact on the overall system power dissipation. Examples of trade-offs in power dissipation between analog front-ends and digital signal processing are also given. It is shown how signal filtering can further reduce the internal power consumption of a node. Such power saving approaches are indispensable as real-life tests of custom wireless ECG patches reveal the need for artifact detection and correction. The power consumption of such additional features has to come from power savings elsewhere in the system as the overall power budget cannot increase.

MIMIC For Millimeter Wave Integrated Circuit Radars

NASA Astrophysics Data System (ADS)

Seashore, C. R.

1987-09-01

A significant program is currently underway in the U.S. to investigate, develop and produce a variety of GaAs analog circuits for use in microwave and millimeter wave sensors and systems. This represents a "new wave" of RF technology which promises to significantly change system engineering thinking relative to RF Architectures. At millimeter wave frequencies, we look forward to a relatively high level of critical component integration based on MESFET and HEMT device implementations. These designs will spawn more compact RF front ends with colocated antenna/transceiver functions and innovative packaging concepts which will survive and function in a typical military operational environment which includes challenging temperature, shock and special handling requirements.

Wearable System for Acquisition and Monitoring of Biological Signals

NASA Astrophysics Data System (ADS)

Piccinini, D. J.; Andino, N. B.; Ponce, S. D.; Roberti, MA; López, y. N.

2016-04-01

This paper presents a modular, wearable system for acquisition and wireless transmission of biological signals. Configurable slaves for different signals (such as ECG, EMG, inertial sensors, and temperature) based in the ADS1294 Medical Analog Front End are connected to a Master, based in the CC3200 microcontroller, both from Texas Instruments. The slaves are configurable according to the specific application, providing versatility to the wearable system. The battery consumption is reduced, through a couple of Li-ion batteries and the circuit has also a battery charger. A custom made box was designed and fabricated in a 3D printer, preserving the requirements of low cost, low weight and safety recommendations.

40 CFR 63.487 - Batch front-end process vents-reference control technology.

Code of Federal Regulations, 2012 CFR

2012-07-01

...-reference control technology. 63.487 Section 63.487 Protection of Environment ENVIRONMENTAL PROTECTION... SOURCE CATEGORIES National Emission Standards for Hazardous Air Pollutant Emissions: Group I Polymers and Resins § 63.487 Batch front-end process vents—reference control technology. (a) Batch front-end process...

40 CFR 63.491 - Batch front-end process vents-recordkeeping requirements.

Code of Federal Regulations, 2014 CFR

2014-07-01

... CATEGORIES National Emission Standards for Hazardous Air Pollutant Emissions: Group I Polymers and Resins § 63.491 Batch front-end process vents—recordkeeping requirements. (a) Group determination records for...) through (a)(6) of this section for each batch front-end process vent subject to the group determination...

40 CFR 63.487 - Batch front-end process vents-reference control technology.

Code of Federal Regulations, 2011 CFR

2011-07-01

... control technology. 63.487 Section 63.487 Protection of Environment ENVIRONMENTAL PROTECTION AGENCY... CATEGORIES National Emission Standards for Hazardous Air Pollutant Emissions: Group I Polymers and Resins § 63.487 Batch front-end process vents—reference control technology. (a) Batch front-end process vents...

40 CFR 63.491 - Batch front-end process vents-recordkeeping requirements.

Code of Federal Regulations, 2013 CFR

2013-07-01

... CATEGORIES National Emission Standards for Hazardous Air Pollutant Emissions: Group I Polymers and Resins § 63.491 Batch front-end process vents—recordkeeping requirements. (a) Group determination records for...) through (a)(6) of this section for each batch front-end process vent subject to the group determination...

40 CFR 63.487 - Batch front-end process vents-reference control technology.

Code of Federal Regulations, 2013 CFR

2013-07-01

...-reference control technology. 63.487 Section 63.487 Protection of Environment ENVIRONMENTAL PROTECTION... SOURCE CATEGORIES National Emission Standards for Hazardous Air Pollutant Emissions: Group I Polymers and Resins § 63.487 Batch front-end process vents—reference control technology. (a) Batch front-end process...

40 CFR 63.487 - Batch front-end process vents-reference control technology.

Code of Federal Regulations, 2014 CFR

2014-07-01

...-reference control technology. 63.487 Section 63.487 Protection of Environment ENVIRONMENTAL PROTECTION... SOURCE CATEGORIES National Emission Standards for Hazardous Air Pollutant Emissions: Group I Polymers and Resins § 63.487 Batch front-end process vents—reference control technology. (a) Batch front-end process...

40 CFR 63.491 - Batch front-end process vents-recordkeeping requirements.

Code of Federal Regulations, 2012 CFR

2012-07-01

... CATEGORIES National Emission Standards for Hazardous Air Pollutant Emissions: Group I Polymers and Resins § 63.491 Batch front-end process vents—recordkeeping requirements. (a) Group determination records for...) through (a)(6) of this section for each batch front-end process vent subject to the group determination...

40 CFR 63.491 - Batch front-end process vents-recordkeeping requirements.

Code of Federal Regulations, 2011 CFR

2011-07-01

... CATEGORIES National Emission Standards for Hazardous Air Pollutant Emissions: Group I Polymers and Resins § 63.491 Batch front-end process vents—recordkeeping requirements. (a) Group determination records for...) through (a)(6) of this section for each batch front-end process vent subject to the group determination...

The Parkes front-end controller and noise-adding radiometer

NASA Technical Reports Server (NTRS)

Brunzie, T. J.

1990-01-01

A new front-end controller (FEC) was installed on the 64-m antenna in Parkes, Australia, to support the 1989 Voyager 2 Neptune encounter. The FEC was added to automate operation of the front-end microwave hardware as part of the Deep Space Network's Parkes-Canberra Telemetry Array. Much of the front-end hardware was refurbished and reimplemented from a front-end system installed in 1985 by the European Space Agency for the Uranus encounter; however, the FEC and its associated noise-adding radiometer (NAR) were new Jet Propulsion Laboratory (JPL) designs. Project requirements and other factors led to the development of capabilities not found in standard Deep Space Network (DSN) controllers and radiometers. The Parkes FEC/NAR performed satisfactorily throughout the Neptune encounter and was removed in October 1989.

An Ultra-Low Voltage Analog Front End for Strain Gauge Sensory System Application in 0.18µm CMOS

NASA Astrophysics Data System (ADS)

Edward, Alexander; Chan, Pak Kwong

This paper presents analysis and design of a new ultra-low voltage analog front end (AFE) dedicated to strain sensor applications. The AFE, designed in 0.18µm CMOS process, features a chopper-stabilized instrumentation amplifier (IA), a balanced active MOSFET-C 2nd order low pass filter (LPF), a clock generator and a voltage booster which operate at supply voltage (Vdd) of 0.6V. The designed IA achieves 30dB of closed-loop gain, 101dB of common-mode rejection ratio (CMRR) at 50Hz, 80dB of power-supply rejection ratio (PSRR) at 50Hz, thermal noise floor of 53.4 nV/√Hz, current consumption of 14µA, and noise efficiency factor (NEF) of 9.7. The high CMRR and rail-to-rail output swing capability is attributed to a new low voltage realization of the active-bootstrapped technique using a pseudo-differential gain-boosting operational transconductance amplifier (OTA) and proposed current-driven bulk (CDB) biasing technique. An output capacitor-less low-dropout regulator (LDO), with a new fast start-up LPF technique, is used to regulate this 0.6V supply from a 0.8-1.0V energy harvesting power source. It achieves power supply rejection (PSR) of 42dB at frequency of 1MHz. A cascode compensated pseudo differential amplifier is used as the filter's building block for low power design. The filter's single-ended-to-balanced converter is implemented using a new low voltage amplifier with two-stage common-mode cancellation. The overall AFE was simulated to have 65.6dB of signal-to-noise ratio (SNR), total harmonic distortion (THD) of less than 0.9% for a 100Hz sinusoidal maximum input signal, bandwidth of 2kHz, and power consumption of 51.2µW. Spectre RF simulations were performed to validate the design using BSIM3V3 transistor models provided by GLOBALFOUNDRIES 0.18µm CMOS process.

Ultrasound phase rotation beamforming on multi-core DSP.

PubMed

Ma, Jieming; Karadayi, Kerem; Ali, Murtaza; Kim, Yongmin

2014-01-01

Phase rotation beamforming (PRBF) is a commonly-used digital receive beamforming technique. However, due to its high computational requirement, it has traditionally been supported by hardwired architectures, e.g., application-specific integrated circuits (ASICs) or more recently field-programmable gate arrays (FPGAs). In this study, we investigated the feasibility of supporting software-based PRBF on a multi-core DSP. To alleviate the high computing requirement, the analog front-end (AFE) chips integrating quadrature demodulation in addition to analog-to-digital conversion were defined and used. With these new AFE chips, only delay alignment and phase rotation need to be performed by DSP, substantially reducing the computational load. We implemented the delay alignment and phase rotation modules on a Texas Instruments C6678 DSP with 8 cores. We found it takes 200 μs to beamform 2048 samples from 64 channels using 2 cores. With 4 cores, 20 million samples can be beamformed in one second. Therefore, ADC frequencies up to 40 MHz with 2:1 decimation in AFE chips or up to 20 MHz with no decimation can be supported as long as the ADC-to-DSP I/O requirement can be met. The remaining 4 cores can work on back-end processing tasks and applications, e.g., color Doppler or ultrasound elastography. One DSP being able to handle both beamforming and back-end processing could lead to low-power and low-cost ultrasound machines, benefiting ultrasound imaging in general, particularly portable ultrasound machines. Copyright © 2013 Elsevier B.V. All rights reserved.

Proof of concept of an imaging system demonstrator for PET applications with SiPM

NASA Astrophysics Data System (ADS)

Morrocchi, Matteo; Marcatili, Sara; Belcari, Nicola; Giuseppina Bisogni, Maria; Collazuol, Gianmaria; Ambrosi, Giovanni; Santoni, Cristiano; Corsi, Francesco; Foresta, Maurizio; Marzocca, Cristoforo; Matarrese, Gianvito; Sportelli, Giancarlo; Guerra, Pedro; Santos, Andres; Del Guerra, Alberto

2013-08-01

A PET imaging system demonstrator based on LYSO crystal arrays coupled to SiPM matrices is under construction at the University and INFN of Pisa. Two SiPM matrices, composed of 8×8 SiPM pixels, and 1,5 mm pitch, have been coupled one to one to a LYSO crystals array and read out by a custom electronics system. front-end ASICs were used to read 8 channels of each matrix. Data from each front-end were multiplexed and sent to a DAQ board for the digital conversion; a motherboard collects the data and communicates with a host computer through a USB port for the storage and off-line data processing. In this paper we show the first preliminary tomographic image of a point-like radioactive source acquired with part of the two detection heads in time coincidence.

CALORIC: A readout chip for high granularity calorimeter

DOE Office of Scientific and Technical Information (OSTI.GOV)

Royer, L.; Bonnard, J.; Manen, S.

2011-07-01

A very-front-end electronics has been developed to fulfil requirements for the next generation of electromagnetic calorimeters. The compactness of this kind of detector and its large number of channels (up to several millions) impose a drastic limitation of the power consumption and a high level of integration. The electronic channel proposed is first of all composed of a low-noise Charge Sensitive Amplifier (CSA) able to amplify the charge delivered by a silicon diode up to 10 pC. Next, a two-gain shaping, based on a Gated Integration (G.I.), is implemented to cover the 15 bits dynamic range required: a high gainmore » shaper processes signals from 4 fC (charge corresponding to the MIP) up to 1 pC, and a low gain filter handles charges up to 10 pC. The G.I. performs also the analog memorization of the signal until it is digitalized. Hence, the analog-to-digital conversion is carried out through a low-power 12-bit cyclic ADC. If the signal overloads the high-gain channel dynamic range, a comparator selects the low-gain channel instead. Moreover, an auto-trigger channel has been implemented in order to select and store a valid event over the noise. The timing sequence of the channel is managed by a digital IP. It controls the G.I. switches, generates all needed clocks, drives the ADC and delivers the final result over 12 bits. The whole readout channel is power controlled, which permits to reduce the consumption according to the duty cycle of the beam collider. Simulations have been performed with Spectre simulator on the prototype chip designed with the 0.35 {mu}m CMOS technology from Austriamicrosystems. Results show a non-linearity better than 0.1% for the high-gain channel, and a non-linearity limited to 1% for the low-gain channel. The Equivalent Noise Charge referred to the input of the channel is evaluated to 0.4 fC complying with the MIP/10 limit. With the timing sequence of the International Linear Collider, which presents a duty cycle of 1%, the power consumption of the complete channel is limited to 43 {mu}W thanks to the power pulsing. The total area of the channel is 1.2 mm{sup 2} with an analog memory depth of 16. (authors)« less

A non-contact capacitance based electrocardiograph and associated heart-rate detection using enhanced Fourier interpolation method.

PubMed

Kumar Thakur, Rupak; Anoop, C S

2015-08-01

Cardio-vascular health monitoring has gained considerable attention in the recent years. Principle of non-contact capacitive electrocardiograph (ECG) and its applicability as a valuable, low-cost, easy-to-use scheme for cardio-vascular health monitoring has been demonstrated in some recent research papers. In this paper, we develop a complete non-contact ECG system using a suitable front-end electronic circuit and a heart-rate (HR) measurement unit using enhanced Fourier interpolation technique. The front-end electronic circuit is realized using low-cost, readily available components and the proposed HR measurement unit is designed to achieve fairly accurate results. The entire system has been extensively tested to verify its efficacy and test results show that the developed system can estimate HR with an accuracy of ±2 beats. Detailed tests have been conducted to validate the performance of the system for different cloth thicknesses of the subject. Some basic tests which illustrate the application of the proposed system for heart-rate variability estimation has been conducted and results reported. The developed system can be used as a portable, reliable, long-term cardiac health monitoring device and can be extended to human drowsiness detection.

Parameter Extraction Method for the Electrical Model of a Silicon Photomultiplier

NASA Astrophysics Data System (ADS)

Licciulli, Francesco; Marzocca, Cristoforo

2016-10-01

The availability of an effective electrical model, able to accurately reproduce the signals generated by a Silicon Photo-Multiplier coupled to the front-end electronics, is mandatory when the performance of a detection system based on this kind of detector has to be evaluated by means of reliable simulations. We propose a complete extraction procedure able to provide the whole set of the parameters involved in a well-known model of the detector, which includes the substrate ohmic resistance. The technique allows achieving very good quality of the fit between simulation results provided by the model and experimental data, thanks to accurate discrimination between the quenching and substrate resistances, which results in a realistic set of extracted parameters. The extraction procedure has been applied to a commercial device considering a wide range of different conditions in terms of input resistance of the front-end electronics and interconnection parasitics. In all the considered situations, very good correspondence has been found between simulations and measurements, especially for what concerns the leading edge of the current pulses generated by the detector, which strongly affects the timing performance of the detection system, thus confirming the effectiveness of the model and the associated parameter extraction technique.

Verification of the Sentinel-4 focal plane subsystem

NASA Astrophysics Data System (ADS)

Williges, Christian; Uhlig, Mathias; Hilbert, Stefan; Rossmann, Hannes; Buchwinkler, Kevin; Babben, Steffen; Sebastian, Ilse; Hohn, Rüdiger; Reulke, Ralf

2017-09-01

The Sentinel-4 payload is a multi-spectral camera system, designed to monitor atmospheric conditions over Europe from a geostationary orbit. The German Aerospace Center, DLR Berlin, conducted the verification campaign of the Focal Plane Subsystem (FPS) during the second half of 2016. The FPS consists, of two Focal Plane Assemblies (FPAs), two Front End Electronics (FEEs), one Front End Support Electronic (FSE) and one Instrument Control Unit (ICU). The FPAs are designed for two spectral ranges: UV-VIS (305 nm - 500 nm) and NIR (750 nm - 775 nm). In this publication, we will present in detail the set-up of the verification campaign of the Sentinel-4 Qualification Model (QM). This set up will also be used for the upcoming Flight Model (FM) verification, planned for early 2018. The FPAs have to be operated at 215 K +/- 5 K, making it necessary to exploit a thermal vacuum chamber (TVC) for the test accomplishment. The test campaign consists mainly of radiometric tests. This publication focuses on the challenge to remotely illuminate both Sentinel-4 detectors as well as a reference detector homogeneously over a distance of approximately 1 m from outside the TVC. Selected test analyses and results will be presented.

DOE Office of Scientific and Technical Information (OSTI.GOV)

Abgrall, N.; Aguayo, Estanislao; Avignone, F. T.

The MAJORANA DEMONSTRATOR will search for the neutrinoless double beta decay (ββ(0ʋ) of the isotope 76Ge with a mixed array of enriched and natural Germanium detectors. In view of the next generation of tonne-scale germanium-based (ββ(0ʋ)-decay searches, a major goal of the MAJORANA DEMONSTRATOR is to demonstrate a path forward to achieving a background rate at or below 1 cnt/(ROI-t-y) in the 4 keV region of interest (ROI) around the 2039-keV Q-value of the 76Ge (ββ(0ʋ)-decay. Such a requirement on the background level significantly constrains the design of the readout electronics, which is further driven by noise and energy resolutionmore » performances. We present here the low-noise low background front-end electronics developed for the low-capacitance p-type point contact (P-PC) germanium detectors of the MAJORANA DEMONSTRATOR. This resistive-feedback front-end, specifically designed to have low mass, is fabricated on a radioassayed fused-silica substrate where the feedback resistor consists of a sputtered thin film of high purity amorphous germanium and the feedback capacitor is based on the capacitance between gold conductive traces.« less

DOE Office of Scientific and Technical Information (OSTI.GOV)

Smith, Leon E.; Conrad, Ryan C.; Keller, Daniel T.

The International Atomic Energy Agency (IAEA) deploys unattended monitoring systems to provide continuous monitoring of nuclear material within safeguarded facilities around the world. As the number of unattended monitoring instruments increases, the IAEA is challenged to become more efficient in the implementation of those systems. In 2010, the IAEA initiated the Front-End Electronics for Unattended Measurement (FEUM) project with the goals of greater flexibility in the interfaces to various sensors and data acquisition systems, and improved capabilities for remotely located sensors (e.g., where sensor and front-end electronics might be separated by tens of meters). In consultation with the IAEA, amore » technical evaluation of a candidate FEUM device produced by a commercial vendor is being performed. This evaluation is assessing the device against the IAEA’s original technical specifications and a broad range of important parameters that included sensor types, cable types, and industrial electromagnetic noise that can degrade signals from remotely located detectors. Testing has been performed in a laboratory and also in environments representative of IAEA deployments. The results are expected to inform the IAEA about where and how FEUM devices might be implemented in the field. Data and preliminary findings from the testing performed to date are presented.« less

Commissioning of the CMS Hadron Forward Calorimeters Phase I Upgrade

NASA Astrophysics Data System (ADS)

Bilki, B.; Onel, Y.

2018-03-01

The final phase of the CMS Hadron Forward Calorimeters Phase I Upgrade was performed during the Extended Year End Technical Stop of 2016-2017. In the framework of the upgrade, the PMT boxes were reworked to implement two channel readout in order to exploit the benefits of the multi-anode PMTs in background tagging and signal recovery. The front-end electronics were also upgraded to QIE10-based electronics which implement larger dynamic range and a 6-bit TDC. Following this major upgrade, the Hadron Forward Calorimeters were commissioned for operation readiness in 2017. Here we describe the details and the components of the upgrade, and discuss the operational experience and results obtained during the upgrade and commissioning.

Spectrally tunable, temporally shaped parametric front end to seed high-energy Nd:glass laser systems

DOE PAGES

Dorrer, C.; Consentino, A.; Cuffney, R.; ...

2017-10-18

Here, we describe a parametric-amplification–based front end for seeding high-energy Nd:glass laser systems. The front end delivers up to 200 mJ by parametric amplification in 2.5-ns flat-in-time pulses tunable over more than 15 nm. Spectral tunability over a range larger than what is typically achieved by laser media at similar energy levels is implemented to investigate cross-beam energy transfer in multibeam target experiments. The front-end operation is simulated to explain the amplified signal’s sensitivity to the input pump and signal. A large variety of amplified waveforms are generated by closed-loop pulse shaping. Various properties and limitations of this front endmore » are discussed.« less

Spectrally tunable, temporally shaped parametric front end to seed high-energy Nd:glass laser systems

DOE Office of Scientific and Technical Information (OSTI.GOV)

Dorrer, C.; Consentino, A.; Cuffney, R.

Here, we describe a parametric-amplification–based front end for seeding high-energy Nd:glass laser systems. The front end delivers up to 200 mJ by parametric amplification in 2.5-ns flat-in-time pulses tunable over more than 15 nm. Spectral tunability over a range larger than what is typically achieved by laser media at similar energy levels is implemented to investigate cross-beam energy transfer in multibeam target experiments. The front-end operation is simulated to explain the amplified signal’s sensitivity to the input pump and signal. A large variety of amplified waveforms are generated by closed-loop pulse shaping. Various properties and limitations of this front endmore » are discussed.« less

Front End Software for Online Database Searching Part 1: Definitions, System Features, and Evaluation.

ERIC Educational Resources Information Center

Hawkins, Donald T.; Levy, Louise R.

1985-01-01

This initial article in series of three discusses barriers inhibiting use of current online retrieval systems by novice users and notes reasons for front end and gateway online retrieval systems. Definitions, front end features, user interface, location (personal computer, host mainframe), evaluation, and strengths and weaknesses are covered. (16…

Single event effect hardness for the front-end ASICs in the DAMPE satellite BGO calorimeter

NASA Astrophysics Data System (ADS)

Gao, Shan-Shan; Jiang, Di; Feng, Chang-Qing; Xi, Kai; Liu, Shu-Bin; An, Qi

2016-01-01

The Dark Matter Particle Explorer (DAMPE) is a Chinese scientific satellite designed for cosmic ray studies with a primary scientific goal of indirect detection of dark matter particles. As a crucial sub-detector, the BGO calorimeter measures the energy spectrum of cosmic rays in the energy range from 5 GeV to 10 TeV. In order to implement high-density front-end electronics (FEE) with the ability to measure 1848 signals from 616 photomultiplier tubes on the strictly constrained satellite platform, two kinds of 32-channel front-end ASICs, VA160 and VATA160, are customized. However, a space mission period of more than 3 years makes single event effects (SEEs) become threats to reliability. In order to evaluate SEE sensitivities of these chips and verify the effectiveness of mitigation methods, a series of laser-induced and heavy ion-induced SEE tests were performed. Benefiting from the single event latch-up (SEL) protection circuit for power supply, the triple module redundancy (TMR) technology for the configuration registers and the optimized sequential design for the data acquisition process, 52 VA160 chips and 32 VATA160 chips have been applied in the flight model of the BGO calorimeter with radiation hardness assurance. Supported by Strategic Priority Research Program on Space Science of the Chinese Academy of Sciences (XDA04040202-4) and Fundamental Research Funds for the Central Universities (WK2030040048)

A Differential Monolithically Integrated Inductive Linear Displacement Measurement Microsystem

PubMed Central

Podhraški, Matija; Trontelj, Janez

2016-01-01

An inductive linear displacement measurement microsystem realized as a monolithic Application-Specific Integrated Circuit (ASIC) is presented. The system comprises integrated microtransformers as sensing elements, and analog front-end electronics for signal processing and demodulation, both jointly fabricated in a conventional commercially available four-metal 350-nm CMOS process. The key novelty of the presented system is its full integration, straightforward fabrication, and ease of application, requiring no external light or magnetic field source. Such systems therefore have the possibility of substituting certain conventional position encoder types. The microtransformers are excited by an AC signal in MHz range. The displacement information is modulated into the AC signal by a metal grating scale placed over the microsystem, employing a differential measurement principle. Homodyne mixing is used for the demodulation of the scale displacement information, returned by the ASIC as a DC signal in two quadrature channels allowing the determination of linear position of the target scale. The microsystem design, simulations, and characterization are presented. Various system operating conditions such as frequency, phase, target scale material and distance have been experimentally evaluated. The best results have been achieved at 4 MHz, demonstrating a linear resolution of 20 µm with steel and copper scale, having respective sensitivities of 0.71 V/mm and 0.99 V/mm. PMID:26999146

A Differential Monolithically Integrated Inductive Linear Displacement Measurement Microsystem.

PubMed

Podhraški, Matija; Trontelj, Janez

2016-03-17

An inductive linear displacement measurement microsystem realized as a monolithic Application-Specific Integrated Circuit (ASIC) is presented. The system comprises integrated microtransformers as sensing elements, and analog front-end electronics for signal processing and demodulation, both jointly fabricated in a conventional commercially available four-metal 350-nm CMOS process. The key novelty of the presented system is its full integration, straightforward fabrication, and ease of application, requiring no external light or magnetic field source. Such systems therefore have the possibility of substituting certain conventional position encoder types. The microtransformers are excited by an AC signal in MHz range. The displacement information is modulated into the AC signal by a metal grating scale placed over the microsystem, employing a differential measurement principle. Homodyne mixing is used for the demodulation of the scale displacement information, returned by the ASIC as a DC signal in two quadrature channels allowing the determination of linear position of the target scale. The microsystem design, simulations, and characterization are presented. Various system operating conditions such as frequency, phase, target scale material and distance have been experimentally evaluated. The best results have been achieved at 4 MHz, demonstrating a linear resolution of 20 µm with steel and copper scale, having respective sensitivities of 0.71 V/mm and 0.99 V/mm.

A Universal Intelligent System-on-Chip Based Sensor Interface

PubMed Central

Mattoli, Virgilio; Mondini, Alessio; Mazzolai, Barbara; Ferri, Gabriele; Dario, Paolo

2010-01-01

The need for real-time/reliable/low-maintenance distributed monitoring systems, e.g., wireless sensor networks, has been becoming more and more evident in many applications in the environmental, agro-alimentary, medical, and industrial fields. The growing interest in technologies related to sensors is an important indicator of these new needs. The design and the realization of complex and/or distributed monitoring systems is often difficult due to the multitude of different electronic interfaces presented by the sensors available on the market. To address these issues the authors propose the concept of a Universal Intelligent Sensor Interface (UISI), a new low-cost system based on a single commercial chip able to convert a generic transducer into an intelligent sensor with multiple standardized interfaces. The device presented offers a flexible analog and/or digital front-end, able to interface different transducer typologies (such as conditioned, unconditioned, resistive, current output, capacitive and digital transducers). The device also provides enhanced processing and storage capabilities, as well as a configurable multi-standard output interface (including plug-and-play interface based on IEEE 1451.3). In this work the general concept of UISI and the design of reconfigurable hardware are presented, together with experimental test results validating the proposed device. PMID:22163624

The Radiation Assessment Detector (RAD) Investigation

NASA Astrophysics Data System (ADS)

Hassler, D. M.; Zeitlin, C.; Wimmer-Schweingruber, R. F.; Böttcher, S.; Martin, C.; Andrews, J.; Böhm, E.; Brinza, D. E.; Bullock, M. A.; Burmeister, S.; Ehresmann, B.; Epperly, M.; Grinspoon, D.; Köhler, J.; Kortmann, O.; Neal, K.; Peterson, J.; Posner, A.; Rafkin, S.; Seimetz, L.; Smith, K. D.; Tyler, Y.; Weigle, G.; Reitz, G.; Cucinotta, F. A.

2012-09-01

The Radiation Assessment Detector (RAD) on the Mars Science Laboratory (MSL) is an energetic particle detector designed to measure a broad spectrum of energetic particle radiation. It will make the first-ever direct radiation measurements on the surface of Mars, detecting galactic cosmic rays, solar energetic particles, secondary neutrons, and other secondary particles created both in the atmosphere and in the Martian regolith. The radiation environment on Mars, both past and present, may have implications for habitability and the ability to sustain life. Radiation exposure is also a major concern for future human missions. The RAD instrument combines charged- and neutral-particle detection capability over a wide dynamic range in a compact, low-mass, low-power instrument. These capabilities are required in order to measure all the important components of the radiation environment. RAD consists of the RAD Sensor Head (RSH) and the RAD Electronics Box (REB) integrated together in a small, compact volume. The RSH contains a solid-state detector telescope with three silicon PIN diodes for charged particle detection, a thallium doped Cesium Iodide scintillator, plastic scintillators for neutron detection and anti-coincidence shielding, and the front-end electronics. The REB contains three circuit boards, one with a novel mixed-signal ASIC for processing analog signals and an associated control FPGA, another with a second FPGA to communicate with the rover and perform onboard analysis of science data, and a third board with power supplies and power cycling or "sleep"-control electronics. The latter enables autonomous operation, independent of commands from the rover. RAD is a highly capable and highly configurable instrument that paves the way for future compact energetic particle detectors in space.

Multiphysical FE-analysis of a front-end bending phenomenon in a hot strip mill

NASA Astrophysics Data System (ADS)

Ilmola, Joonas; Seppälä, Oskari; Leinonen, Olli; Pohjonen, Aarne; Larkiola, Jari; Jokisaari, Juha; Putaansuu, Eero

2018-05-01

In hot steel rolling processes, a slab is generally rolled to a transfer bar in a roughing process and to a strip in a hot strip rolling process. Over several rolling passes the front-end may bend upward or downward due to asymmetrical rolling conditions causing entry problems in the next rolling pass. Many different factors may affect the front-end bending phenomenon and are very challenging to measure. Thus, a customized finite element model is designed and built to simulate the front-end bending phenomenon in a hot strip rolling process. To simulate the functioning of the hot strip mill precisely, automated controlling logic of the mill must be considered. In this paper we studied the effect of roll bite friction conditions and amount of reduction on the front-end bending phenomenon in a hot strip rolling process.

Qualification and Reliability for MEMS and IC Packages

NASA Technical Reports Server (NTRS)

Ghaffarian, Reza

2004-01-01

Advanced IC electronic packages are moving toward miniaturization from two key different approaches, front and back-end processes, each with their own challenges. Successful use of more of the back-end process front-end, e.g. microelectromechanical systems (MEMS) Wafer Level Package (WLP), enable reducing size and cost. Use of direct flip chip die is the most efficient approach if and when the issues of know good die and board/assembly are resolved. Wafer level package solve the issue of known good die by enabling package test, but it has its own limitation, e.g., the I/O limitation, additional cost, and reliability. From the back-end approach, system-in-a-package (SIAP/SIP) development is a response to an increasing demand for package and die integration of different functions into one unit to reduce size and cost and improve functionality. MEMS add another challenging dimension to electronic packaging since they include moving mechanical elements. Conventional qualification and reliability need to be modified and expanded in most cases in order to detect new unknown failures. This paper will review four standards that already released or being developed that specifically address the issues on qualification and reliability of assembled packages. Exposures to thermal cycles, monotonic bend test, mechanical shock and drop are covered in these specifications. Finally, mechanical and thermal cycle qualification data generated for MEMS accelerometer will be presented. The MEMS was an element of an inertial measurement unit (IMU) qualified for NASA Mars Exploration Rovers (MERs), Spirit and Opportunity that successfully is currently roaring the Martian surface

An 8.4-GHz dual-maser front-end system for Parkes reimplementation

NASA Technical Reports Server (NTRS)

Trowbridge, D. L.; Loreman, J. R.; Brunzie, T. J.; Quinn, R.

1990-01-01

An 8.4-GHz front-end system consisting of a feedhorn, a waveguide feed assembly, dual masers, and downconverters was reimplemented at Parkes as part of the Parkes Canberra Telemetry Array for the Voyager Neptune encounter. The front-end system was originally assembled by the European Space Agency and installed on the Parkes antenna for the Giotto project. It was also used on a time-sharing basis by the Deep Space Network as part of the Parkes Canberra Telemetry Array to enhance the data return from the Voyager Uranus encounter. At the conclusion of these projects in 1986, part of the system was then shipped to JPL on loan for reimplementation at Parkes for the Voyager Neptune encounter. New design and implementation required to make the system operable at Parkes included new microwave front-end control cabinets, closed-cycle refrigeration monitor system, noise-adding radiometer system, front-end controller assembly, X81 local oscillator multiplier, and refurbishment of the original dual 8.4-GHz traveling-wave masers and waveguide feed system. The front-end system met all requirements during the encounter and was disassembled in October 1989 and returned to JPL.

A CMOS 0.18 μm 600 MHz clock multiplier PLL and a pseudo-LVDS driver for the high speed data transmission for the ALICE Inner Tracking System front-end chip

NASA Astrophysics Data System (ADS)

Lattuca, A.; Mazza, G.; Aglieri Rinella, G.; Cavicchioli, C.; Chanlek, N.; Collu, A.; Degerli, Y.; Dorokhov, A.; Flouzat, C.; Gajanana, D.; Gao, C.; Guilloux, F.; Hillemanns, H.; Hristozkov, S.; Junique, A.; Keil, M.; Kim, D.; Kofarago, M.; Kugathasan, T.; Kwon, Y.; Mager, M.; Sielewicz, K. Marek; Marin Tobon, C. Augusto; Marras, D.; Martinengo, P.; Mugnier, H.; Musa, L.; Pham, T. Hung; Puggioni, C.; Reidt, F.; Riedler, P.; Rousset, J.; Siddhanta, S.; Snoeys, W.; Song, M.; Usai, G.; Van Hoorne, J. Willem; Yang, P.

2016-01-01

This work presents the 600 MHz clock multiplier PLL and the pseudo-LVDS driver which are two essential components of the Data Transmission Unit (DTU), a fast serial link for the 1.2 Gb/s data transmission of the ALICE inner detector front-end chip (ALPIDE). The PLL multiplies the 40 MHz input clock in order to obtain the 600 MHz and the 200 MHz clock for a fast serializer which works in Double Data Rate mode. The outputs of the serializer feed the pseudo-LVDS driver inputs which transmits the data from the pixel chip to the patch panel with a limited number of signal lines. The driver drives a 5.3 m-6.5 m long differential transmission line by steering a maximum of 5 mA of current at the target speed. To overcome bandwidth limitations coming from the long cables the pre-emphasis can be applied to the output. Currents for the main and pre-emphasis driver can individually be adjusted using on-chip digital-to-analog converters. The circuits will be integrated in the pixel chip and are designed in the same 0.18 μm CMOS technology and will operate from the same 1.8 V supply. Design and test results of both circuits are presented.

Digital Front End for Wide-Band VLBI Science Receiver

NASA Technical Reports Server (NTRS)

Jongeling, Andre; Sigman, Elliott; Navarro, Robert; Goodhart, Charles; Rogstad, Steve; Chandra, Kumar; Finley, Sue; Trinh, Joseph; Soriano, Melissa; White, Les;

Music and Hearing Aids—An Introduction

PubMed Central

2012-01-01

Modern digital hearing aids have provided improved fidelity over those of earlier decades for speech. The same however cannot be said for music. Most modern hearing aids have a limitation of their “front end,” which comprises the analog-to-digital (A/D) converter. For a number of reasons, the spectral nature of music as an input to a hearing aid is beyond the optimal operating conditions of the “front end” components. Amplified music tends to be of rather poor fidelity. Once the music signal is distorted, no amount of software manipulation that occurs later in the circuitry can improve things. The solution is not a software issue. Some characteristics of music that make it difficult to be transduced without significant distortion include an increased sound level relative to that of speech, and the crest factor- the difference in dB between the instantaneous peak of a signal and its RMS value. Clinical strategies and technical innovations have helped to improve the fidelity of amplified music and these include a reduction of the level of the input that is presented to the A/D converter. PMID:23258616

Percussive arc welding apparatus

DOEpatents

Hollar, Jr., Donald L.

2002-01-01

A percussive arc welding apparatus includes a generally cylindrical actuator body having front and rear end portions and defining an internal recess. The front end of the body includes an opening. A solenoid assembly is provided in the rear end portion in the internal recess of the body, and an actuator shaft assembly is provided in the front end portion in the internal recess of the actuator body. The actuator shaft assembly includes a generally cylindrical actuator block having first and second end portions, and an actuator shaft having a front end extending through the opening in the actuator body, and the rear end connected to the first end portion of the actuator block. The second end portion of the actuator block is in operational engagement with the solenoid shaft by a non-rigid connection to reduce the adverse rebound effects of the actuator shaft. A generally transversely extending pin is rigidly secured to the rear end of the shaft. One end of the pin is received in a slot in the nose housing sleeve to prevent rotation of the actuator shaft during operation of the apparatus.

First results of the front-end ASIC for the strip detector of the PANDA MVD

NASA Astrophysics Data System (ADS)

Quagli, T.; Brinkmann, K.-T.; Calvo, D.; Di Pietro, V.; Lai, A.; Riccardi, A.; Ritman, J.; Rivetti, A.; Rolo, M. D.; Stockmanns, T.; Wheadon, R.; Zambanini, A.

2017-03-01

PANDA is a key experiment of the future FAIR facility and the Micro Vertex Detector (MVD) is the innermost part of its tracking system. PASTA (PAnda STrip ASIC) is the readout chip for the strip part of the MVD. The chip is designed to provide high resolution timestamp and charge information with the Time over Threshold (ToT) technique. Its architecture is based on Time to Digital Converters with analog interpolators, with a time bin width of 50 ps. The chip implements Single Event Upset (SEU) protection techniques for its digital parts. A first full-size prototype with 64 channels was produced in a commercial 110 nm CMOS technology and the first characterizations of the prototype were performed.

Front-End Board with Cyclone V as a Test High-Resolution Platform for the Auger_Beyond_2015 Front End Electronics

NASA Astrophysics Data System (ADS)

Szadkowski, Zbigniew

2015-06-01

The surface detector (SD) array of the Pierre Auger Observatory needs an upgrade which allows space for more complex triggers with higher bandwidth and greater dynamic range. To this end this paper presents a front-end board (FEB) with the largest Cyclone V E FPGA 5CEFA9F31I7N. It supports eight channels sampled with max. 250 MSps@14-bit resolution. Considered sampling for the SD is 120 MSps; however, the FEB has been developed with external anti-aliasing filters to retain maximal flexibility. Six channels are targeted at the SD, two are reserved for other experiments like: Auger Engineering Radio Array and additional muon counters. The FEB is an intermediate design plugged into a unified board communicating with a micro-controller at 40 MHz; however, it provides 250 MSPs sampling with an 18-bit dynamic range, is equipped with a virtual NIOS processor and supports 256 MB of SDRAM as well as an implemented spectral trigger based on the discrete cosine transform for detection of very inclined “old” showers. The FEB can also support neural network development for detection of “young” showers, potentially generated by neutrinos. A single FEB was already tested in the Auger surface detector in Malargüe (Argentina) for 120 and 160 MSps. Preliminary tests showed perfect stability of data acquisition for sampling frequency three or four times greater. They allowed optimization of the design before deployment of seven or eight FEBs for several months of continuous tests in the engineering array.

Investigation of detonation velocity in heterogeneous explosive system using the reactive Burgers' analog

NASA Astrophysics Data System (ADS)

Di Labbio, G.; Kiyanda, C. B.; Mi, X.; Higgins, A. J.; Nikiforakis, N.; Ng, H. D.

2016-06-01

In this study, the applicability of the Chapman-Jouguet (CJ) criterion is tested numerically for heterogeneous explosive media using a simple detonation analog. The analog system consists of a reactive Burgers' equation coupled with an Arrhenius type reaction wave, and the heterogeneity of the explosive media is mimicked using a discrete energy source approach. The governing equation is solved using a second order, finite-volume approach and the average propagation velocity of the discrete detonation is determined by tracking the leading shock front. Consistent with previous studies, the averaged velocity of the leading shock front from the unsteady numerical simulations is also found to be in good agreement with the velocity of a CJ detonation in a uniform medium wherein the energy source is spatially homogenized. These simulations have thus implications for whether the CJ criterion is valid to predict the detonation velocity in heterogeneous explosive media.

49 CFR Appendix F to Part 238 - Alternative Dynamic Performance Requirements for Front End Structures of Cab Cars and MU Locomotives

Code of Federal Regulations, 2013 CFR

2013-10-01

... of cab cars and MU locomotives with shaped-noses or crash energy management designs, or both. In any... Front End Structures of Cab Cars and MU Locomotives F Appendix F to Part 238 Transportation Other... Performance Requirements for Front End Structures of Cab Cars and MU Locomotives As specified in § 238.209(b...

49 CFR Appendix F to Part 238 - Alternative Dynamic Performance Requirements for Front End Structures of Cab Cars and MU Locomotives

Code of Federal Regulations, 2012 CFR

2012-10-01

... of cab cars and MU locomotives with shaped-noses or crash energy management designs, or both. In any... Front End Structures of Cab Cars and MU Locomotives F Appendix F to Part 238 Transportation Other... Performance Requirements for Front End Structures of Cab Cars and MU Locomotives As specified in § 238.209(b...

49 CFR Appendix F to Part 238 - Alternative Dynamic Performance Requirements for Front End Structures of Cab Cars and MU Locomotives

Code of Federal Regulations, 2011 CFR

2011-10-01

... of cab cars and MU locomotives with shaped-noses or crash energy management designs, or both. In any... Front End Structures of Cab Cars and MU Locomotives F Appendix F to Part 238 Transportation Other... Performance Requirements for Front End Structures of Cab Cars and MU Locomotives As specified in § 238.209(b...

49 CFR Appendix F to Part 238 - Alternative Dynamic Performance Requirements for Front End Structures of Cab Cars and MU Locomotives

Code of Federal Regulations, 2014 CFR

2014-10-01

... of cab cars and MU locomotives with shaped-noses or crash energy management designs, or both. In any... Front End Structures of Cab Cars and MU Locomotives F Appendix F to Part 238 Transportation Other... Performance Requirements for Front End Structures of Cab Cars and MU Locomotives As specified in § 238.209(b...

49 CFR Appendix F to Part 238 - Alternative Dynamic Performance Requirements for Front End Structures of Cab Cars and MU Locomotives

Code of Federal Regulations, 2010 CFR

2010-10-01

... Front End Structures of Cab Cars and MU Locomotives F Appendix F to Part 238 Transportation Other... Performance Requirements for Front End Structures of Cab Cars and MU Locomotives As specified in § 238.209(b... and allow for the application of dynamic performance criteria to cab cars and MU locomotives as an...

Millimeter-wave imaging diagnostics systems on the EAST tokamak (invited)

DOE Office of Scientific and Technical Information (OSTI.GOV)

Zhu, Y. L.; Xie, J. L., E-mail: jlxie@ustc.edu.cn; Yu, C. X.

2016-11-15

Millimeter-wave imaging diagnostics, with large poloidal span and wide radial range, have been developed on the EAST tokamak for visualization of 2D electron temperature and density fluctuations. A 384 channel (24 poloidal × 16 radial) Electron Cyclotron Emission Imaging (ECEI) system in F-band (90-140 GHz) was installed on the EAST tokamak in 2012 to provide 2D electron temperature fluctuation images with high spatial and temporal resolution. A co-located Microwave Imaging Reflectometry (MIR) will be installed for imaging of density fluctuations by December 2016. This “4th generation” MIR system has eight independent frequency illumination beams in W-band (75-110 GHz) driven bymore » fast tuning synthesizers and active multipliers. Both of these advanced millimeter-wave imaging diagnostic systems have applied the latest techniques. A novel design philosophy “general optics structure” has been employed for the design of the ECEI and MIR receiver optics with large aperture. The extended radial and poloidal coverage of ECEI on EAST is made possible by innovations in the design of front-end optics. The front-end optical structures of the two imaging diagnostics, ECEI and MIR, have been integrated into a compact system, including the ECEI receiver and MIR transmitter and receiver. Two imaging systems share the same mid-plane port for simultaneous, co-located 2D fluctuation measurements of electron density and temperature. An intelligent remote-control is utilized in the MIR electronics systems to maintain focusing at the desired radial region even with density variations by remotely tuning the probe frequencies in about 200 μs. A similar intelligent technique has also been applied on the ECEI IF system, with remote configuration of the attenuations for each channel.« less

Millimeter-wave imaging diagnostics systems on the EAST tokamak (invited)

NASA Astrophysics Data System (ADS)

Zhu, Y. L.; Xie, J. L.; Yu, C. X.; Zhao, Z. L.; Gao, B. X.; Chen, D. X.; Liu, W. D.; Liao, W.; Qu, C. M.; Luo, C.; Hu, X.; Spear, A. G.; Luhmann, N. C.; Domier, C. W.; Chen, M.; Ren, X.; Tobias, B. J.

2016-11-01

Millimeter-wave imaging diagnostics, with large poloidal span and wide radial range, have been developed on the EAST tokamak for visualization of 2D electron temperature and density fluctuations. A 384 channel (24 poloidal × 16 radial) Electron Cyclotron Emission Imaging (ECEI) system in F-band (90-140 GHz) was installed on the EAST tokamak in 2012 to provide 2D electron temperature fluctuation images with high spatial and temporal resolution. A co-located Microwave Imaging Reflectometry (MIR) will be installed for imaging of density fluctuations by December 2016. This "4th generation" MIR system has eight independent frequency illumination beams in W-band (75-110 GHz) driven by fast tuning synthesizers and active multipliers. Both of these advanced millimeter-wave imaging diagnostic systems have applied the latest techniques. A novel design philosophy "general optics structure" has been employed for the design of the ECEI and MIR receiver optics with large aperture. The extended radial and poloidal coverage of ECEI on EAST is made possible by innovations in the design of front-end optics. The front-end optical structures of the two imaging diagnostics, ECEI and MIR, have been integrated into a compact system, including the ECEI receiver and MIR transmitter and receiver. Two imaging systems share the same mid-plane port for simultaneous, co-located 2D fluctuation measurements of electron density and temperature. An intelligent remote-control is utilized in the MIR electronics systems to maintain focusing at the desired radial region even with density variations by remotely tuning the probe frequencies in about 200 μs. A similar intelligent technique has also been applied on the ECEI IF system, with remote configuration of the attenuations for each channel.

The front-end electronics and slow control of large area SiPM for the SST-1M camera developed for the CTA experiment

NASA Astrophysics Data System (ADS)

Aguilar, J. A.; Bilnik, W.; Borkowski, J.; Cadoux, F.; Christov, A.; della Volpe, D.; Favre, Y.; Heller, M.; Kasperek, J.; Lyard, E.; Marszałek, A.; Moderski, R.; Montaruli, T.; Porcelli, A.; Prandini, E.; Rajda, P.; Rameez, M.; Schioppa, E.; Troyano Pujadas, I.; Ziȩtara, K.; Błocki, J.; Bogacz, L.; Bulik, T.; Curyło, M.; Dyrda, M.; Frankowski, A.; Grudniki, Ł.; Grudzińska, M.; Idźkowski, B.; Jamrozy, M.; Janiak, M.; Lalik, K.; Mach, E.; Mandat, D.; Michałowski, J.; Neronov, A.; Niemiec, J.; Ostrowski, M.; Paśsko, P.; Pech, M.; Schovanek, P.; Seweryn, K.; Skowron, K.; Sliusar, V.; Sowiński, M.; Stawarz, Ł.; Stodulska, M.; Stodulski, M.; Toscano, S.; Walter, R.; Wiȩcek, M.; Zagdański, A.; Żychowski, P.

2016-09-01

The single mirror Small Size Telescope (SST-1M) is one of the proposed designs for the smallest type of telescopes, SSTs that will compose the Cherenkov Telescope Array (CTA). The SST-1M camera will use Silicon PhotoMultipliers (SiPM) which are nowadays commonly used in High Energy Physics experiments and many imaging applications. However the unique pixel shape and size have required a dedicated development by the University of Geneva and Hamamatsu. The resulting sensor has a surface of ∼94 mm2 and a total capacitance of ∼3.4 nF. These unique characteristics, combined with the stringent requirements of the CTA project on timing and charge resolution have led the University of Geneva to develop custom front-end electronics. The preamplifier stage has been tailored in order to optimize the signal shape using measurement campaigns and electronic simulation of the sensor. A dedicated trans-impedance pre-amplifier topology is used resulting in a power consumption of 400 mW per pixel and a pulse width < 30 ns. The measurements that have led to the choice of the different components and the resulting performance are detailed in this paper. The slow control electronics was designed to provide the bias voltage with 6.7 mV precision and to correct for temperature variation with a forward feedback compensation with 0.17 °C resolution. It is fully configurable and can be monitored using CANbus interface. The architecture and the characterization of the various elements are presented.

Single-Chip CMUT-on-CMOS Front-End System for Real-Time Volumetric IVUS and ICE Imaging

PubMed Central

Gurun, Gokce; Tekes, Coskun; Zahorian, Jaime; Xu, Toby; Satir, Sarp; Karaman, Mustafa; Hasler, Jennifer; Degertekin, F. Levent

2014-01-01

Intravascular ultrasound (IVUS) and intracardiac echography (ICE) catheters with real-time volumetric ultrasound imaging capability can provide unique benefits to many interventional procedures used in the diagnosis and treatment of coronary and structural heart diseases. Integration of CMUT arrays with front-end electronics in single-chip configuration allows for implementation of such catheter probes with reduced interconnect complexity, miniaturization, and high mechanical flexibility. We implemented a single-chip forward-looking (FL) ultrasound imaging system by fabricating a 1.4-mm-diameter dual-ring CMUT array using CMUT-on-CMOS technology on a front-end IC implemented in 0.35-µm CMOS process. The dual-ring array has 56 transmit elements and 48 receive elements on two separate concentric annular rings. The IC incorporates a 25-V pulser for each transmitter and a low-noise capacitive transimpedance amplifier (TIA) for each receiver, along with digital control and smart power management. The final shape of the silicon chip is a 1.5-mm-diameter donut with a 430-µm center hole for a guide wire. The overall front-end system requires only 13 external connections and provides 4 parallel RF outputs while consuming an average power of 20 mW. We measured RF A-scans from the integrated single-chip array which show full functionality at 20.1 MHz with 43% fractional bandwidth. We also tested and demonstrated the image quality of the system on a wire phantom and an ex-vivo chicken heart sample. The measured axial and lateral point resolutions are 92 µm and 251 µm, respectively. We successfully acquired volumetric imaging data from the ex-vivo chicken heart with 60 frames per second without any signal averaging. These demonstrative results indicate that single-chip CMUT-on-CMOS systems have the potential to produce real-time volumetric images with image quality and speed suitable for catheter based clinical applications. PMID:24474131

Single-chip CMUT-on-CMOS front-end system for real-time volumetric IVUS and ICE imaging.

PubMed

Gurun, Gokce; Tekes, Coskun; Zahorian, Jaime; Xu, Toby; Satir, Sarp; Karaman, Mustafa; Hasler, Jennifer; Degertekin, F Levent

2014-02-01

Intravascular ultrasound (IVUS) and intracardiac echography (ICE) catheters with real-time volumetric ultrasound imaging capability can provide unique benefits to many interventional procedures used in the diagnosis and treatment of coronary and structural heart diseases. Integration of capacitive micromachined ultrasonic transducer (CMUT) arrays with front-end electronics in single-chip configuration allows for implementation of such catheter probes with reduced interconnect complexity, miniaturization, and high mechanical flexibility. We implemented a single-chip forward-looking (FL) ultrasound imaging system by fabricating a 1.4-mm-diameter dual-ring CMUT array using CMUT-on-CMOS technology on a front-end IC implemented in 0.35-μm CMOS process. The dual-ring array has 56 transmit elements and 48 receive elements on two separate concentric annular rings. The IC incorporates a 25-V pulser for each transmitter and a low-noise capacitive transimpedance amplifier (TIA) for each receiver, along with digital control and smart power management. The final shape of the silicon chip is a 1.5-mm-diameter donut with a 430-μm center hole for a guide wire. The overall front-end system requires only 13 external connections and provides 4 parallel RF outputs while consuming an average power of 20 mW. We measured RF A-scans from the integrated single- chip array which show full functionality at 20.1 MHz with 43% fractional bandwidth. We also tested and demonstrated the image quality of the system on a wire phantom and an ex vivo chicken heart sample. The measured axial and lateral point resolutions are 92 μm and 251 μm, respectively. We successfully acquired volumetric imaging data from the ex vivo chicken heart at 60 frames per second without any signal averaging. These demonstrative results indicate that single-chip CMUT-on-CMOS systems have the potential to produce realtime volumetric images with image quality and speed suitable for catheter-based clinical applications.

Design and performance of a custom ASIC digitizer for wire chamber readout in 65 nm CMOS technology

NASA Astrophysics Data System (ADS)

Lee, M. J.; Brown, D. N.; Chang, J. K.; Ding, D.; Gnani, D.; Grace, C. R.; Jones, J. A.; Kolomensky, Y. G.; von der Lippe, H.; Mcvittie, P. J.; Stettler, M. W.; Walder, J.-P.

2015-06-01

We present the design and performance of a prototype ASIC digitizer for integrated wire chamber readout, implemented in 65 nm commercial CMOS technology. Each channel of the 4-channel prototype is composed of two 16-bit Time-to-Digital Converters (TDCs), one 8-bit Analog-to-Digital Converter (ADC), a front-end preamplifier and shaper, plus digital and analog buffers that support a variety of digitization chains. The prototype has a multiplexed digital backend that executes a state machine, distributes control and timing signals, and buffers data for serial output. Laboratory bench tests measure the absolute TDC resolution between 74 ps and 480 ps, growing with the absolute delay, and a relative time resolution of 19 ps. Resolution outliers due to cross-talk between clock signals and supply or reference voltages are seen. After calibration, the ADC displays good linearity and noise performance, with an effective number of bits of 6.9. Under normal operating conditions the circuit consumes 32 mW per channel. Potential design improvements to address the resolution drift and tails are discussed.

Multiple channel data acquisition system

DOEpatents

Crawley, H. Bert; Rosenberg, Eli I.; Meyer, W. Thomas; Gorbics, Mark S.; Thomas, William D.; McKay, Roy L.; Homer, Jr., John F.

1990-05-22

A multiple channel data acquisition system for the transfer of large amounts of data from a multiplicity of data channels has a plurality of modules which operate in parallel to convert analog signals to digital data and transfer that data to a communications host via a FASTBUS. Each module has a plurality of submodules which include a front end buffer (FEB) connected to input circuitry having an analog to digital converter with cache memory for each of a plurality of channels. The submodules are interfaced with the FASTBUS via a FASTBUS coupler which controls a module bus and a module memory. The system is triggered to effect rapid parallel data samplings which are stored to the cache memories. The cache memories are uploaded to the FEBs during which zero suppression occurs. The data in the FEBs is reformatted and compressed by a local processor during transfer to the module memory. The FASTBUS coupler is used by the communications host to upload the compressed and formatted data from the module memory. The local processor executes programs which are downloaded to the module memory through the FASTBUS coupler.

Multiple channel data acquisition system

DOEpatents

Crawley, H.B.; Rosenberg, E.I.; Meyer, W.T.; Gorbics, M.S.; Thomas, W.D.; McKay, R.L.; Homer, J.F. Jr.

1990-05-22

A multiple channel data acquisition system for the transfer of large amounts of data from a multiplicity of data channels has a plurality of modules which operate in parallel to convert analog signals to digital data and transfer that data to a communications host via a FASTBUS. Each module has a plurality of submodules which include a front end buffer (FEB) connected to input circuitry having an analog to digital converter with cache memory for each of a plurality of channels. The submodules are interfaced with the FASTBUS via a FASTBUS coupler which controls a module bus and a module memory. The system is triggered to effect rapid parallel data samplings which are stored to the cache memories. The cache memories are uploaded to the FEBs during which zero suppression occurs. The data in the FEBs is reformatted and compressed by a local processor during transfer to the module memory. The FASTBUS coupler is used by the communications host to upload the compressed and formatted data from the module memory. The local processor executes programs which are downloaded to the module memory through the FASTBUS coupler. 25 figs.

A straw chambers' tracker for the high rate experiment 835 at the Fermilab accumulator

NASA Astrophysics Data System (ADS)

Bagnasco, S.; Dughera, G.; Giraudo, G.; Govi, G.; Marchetto, F.; Menichetti, E.; Pastrone, N.; Rumerio, P.; Trapani, P. P.

1998-02-01

Two layers of proportional drift tubes (aluminum mylar straws) are staggered in two cylindrical light chambers to measure charged particles' azimuthal angle. To stand the high rates (˜10 kHz/ cm2) and minimize the pile-up of the high luminosity experiment 835 at FNAL, a fast ASIC Amplifier-Shaper-Discriminator (ASD-8B) was chosen. The front-end electronics, designed exclusively with SMD components, was mounted on the downstream end plug of each chamber to avoid oscillations and noise. Design, construction and operational performances of these detectors are presented.

The modification at CSNS ion source

NASA Astrophysics Data System (ADS)

Liu, S.; Ouyang, H.; Huang, T.; Xiao, Y.; Cao, X.; Lv, Y.; Xue, K.; Chen, W.

2017-08-01

The commissioning of CSNS front end has been finished. Above 15 mA beam intensity is obtained at the end of RFQ. For CSNS ion source, it is a type of penning surface plasma ion source, similar to ISIS ion source. To improve the operation stability and reduce spark rate, some modifications have been performed, including Penning field, extraction optics and post acceleration. PBGUNS is applied to optimize beam extraction. The co-extraction electrons are considered at PBGUNS simulation and various extracted structure are simulated aiming to make the beam through the extracted electrode without loss. The stability of ion source is improved further.

A 1.2-V CMOS front-end for LTE direct conversion SAW-less receiver

NASA Astrophysics Data System (ADS)

Riyan, Wang; Jiwei, Huang; Zhengping, Li; Weifeng, Zhang; Longyue, Zeng

2012-03-01

A CMOS RF front-end for the long-term evolution (LTE) direct conversion receiver is presented. With a low noise transconductance amplifier (LNA), current commutating passive mixer and transimpedance operational amplifier (TIA), the RF front-end structure enables high-integration, high linearity and simple frequency planning for LTE multi-band applications. Large variable gain is achieved using current-steering transconductance stages. A current commutating passive mixer with 25% duty-cycle LO improves gain, noise and linearity. A direct coupled current-input filter (DCF) is employed to suppress the out-of-band interferer. Fabricated in a 0.13-μm CMOS process, the RF front-end achieves a 45 dB conversion voltage gain, 2.7 dB NF, -7 dBm IIP3, and +60 dBm IIP2 with calibration from 2.3 to 2.7 GHz. The total RF front end with divider draws 40 mA from a single 1.2-V supply.

Front-end multiplexing—applied to SQUID multiplexing: Athena X-IFU and QUBIC experiments

NASA Astrophysics Data System (ADS)

Prele, D.

2015-08-01

As we have seen for digital camera market and a sensor resolution increasing to "megapixels", all the scientific and high-tech imagers (whatever the wave length - from radio to X-ray range) tends also to always increases the pixels number. So the constraints on front-end signals transmission increase too. An almost unavoidable solution to simplify integration of large arrays of pixels is front-end multiplexing. Moreover, "simple" and "efficient" techniques allow integration of read-out multiplexers in the focal plane itself. For instance, CCD (Charge Coupled Device) technology has boost number of pixels in digital camera. Indeed, this is exactly a planar technology which integrates both the sensors and a front-end multiplexed readout. In this context, front-end multiplexing techniques will be discussed for a better understanding of their advantages and their limits. Finally, the cases of astronomical instruments in the millimeter and in the X-ray ranges using SQUID (Superconducting QUantum Interference Device) will be described.

Advanced RF Front End Technology

NASA Technical Reports Server (NTRS)

Herman, M. I.; Valas, S.; Katehi, L. P. B.

2001-01-01

The ability to achieve low-mass low-cost micro/nanospacecraft for Deep Space exploration requires extensive miniaturization of all subsystems. The front end of the Telecommunication subsystem is an area in which major mass (factor of 10) and volume (factor of 100) reduction can be achieved via the development of new silicon based micromachined technology and devices. Major components that make up the front end include single-pole and double-throw switches, diplexer, and solid state power amplifier. JPL's Center For Space Microsystems - System On A Chip (SOAC) Program has addressed the challenges of front end miniaturization (switches and diplexers). Our objectives were to develop the main components that comprise a communication front end and enable integration in a single module that we refer to as a 'cube'. In this paper we will provide the latest status of our Microelectromechanical System (MEMS) switches and surface micromachined filter development. Based on the significant progress achieved we can begin to provide guidelines of the proper system insertion for these emerging technologies. Additional information is contained in the original extended abstract.

Real-time multiplicity counter

DOEpatents

Rowland, Mark S [Alamo, CA; Alvarez, Raymond A [Berkeley, CA

2010-07-13

A neutron multi-detector array feeds pulses in parallel to individual inputs that are tied to individual bits in a digital word. Data is collected by loading a word at the individual bit level in parallel. The word is read at regular intervals, all bits simultaneously, to minimize latency. The electronics then pass the word to a number of storage locations for subsequent processing, thereby removing the front-end problem of pulse pileup.

Development and tests of MCP based timing and multiplicity detector for MIPs

NASA Astrophysics Data System (ADS)

Feofilov, G.; Kondratev, V.; Stolyarov, O.; Tulina, T.; Valiev, F.; Vinogradov, L.

2017-01-01

We present summary of technological developments and tests of the MCP based large area detector aimed at precise timing and charged particles multiplicity measurements. Results obtained in course of these developments of isochronous (simultaneity) precise signal readout, passive summation of 1 ns signals, fast (1 GHz) front-end electronics, miniature vacuum systems, etc. could be potentially interesting for a number of future applications in different fields.

Design and Implementation of an Electronic Front-End Based on Square Wave Excitation for Ultrasonic Torsional Guided Wave Viscosity Sensor

PubMed Central

Rabani, Amir

2016-01-01

The market for process instruments generally requires low cost devices that are robust, small in size, portable, and usable in-plant. Ultrasonic torsional guided wave sensors have received much attention by researchers for measurement of viscosity and/or density of fluids in recent years. The supporting electronic systems for these sensors providing many different settings of sine-wave signals are bulky and expensive. In contrast, a system based on bursts of square waves instead of sine waves would have a considerable advantage in that respect and could be built using simple integrated circuits at a cost that is orders of magnitude lower than for a windowed sine wave device. This paper explores the possibility of using square wave bursts as the driving signal source for the ultrasonic torsional guided wave viscosity sensor. A simple design of a compact and fully automatic analogue square wave front-end for the sensor is also proposed. The successful operation of the system is demonstrated by using the sensor for measuring the viscosity in a representative fluid. This work provides the basis for design and manufacture of low cost compact standalone ultrasonic guided wave sensors and enlightens the possibility of using coded excitation techniques utilising square wave sequences in such applications. PMID:27754324

Online readout and control unit for high-speed/high resolution readout of silicon tracking detectors

NASA Astrophysics Data System (ADS)

Bürger, J.; Hansen, K.; Lange, W.; Nowak, T.; Prell, S.; Zimmermann, W.

1997-02-01

We are describing a high speed VME readout and control module developed and presently working at the H1 experiment at DESY in Hamburg. It has the capability to read out 4 × 2048 analogue data channels at sampling rates up to 10 MHz with a dynamic input range of 1 V. The nominal resolution of the A/D converters can be adjusted between 8 and 12 bit. At the latter resolution we obtain signal-to-noise ratio better than 61.4 dB at a conversion rate of 5 MSps. At this data rate all 8192 detector channels can be read out to the internal raw data memory and VME interface within about 410 μs and 510 μs, respectively. The pedestal subtracted signals can be analyzed on-line. At a raw data hit occupation of 10%, the VME readout time is 50 μs per module. Each module provides four complementary CMOS signals to control the front-end electronics and four independent sets of power supplies for analogue and digital voltages (10 V, 100 mA) to drive the front-end electronics and for the bias voltage (100 V, 1.2 mA) to assure the full functionality of the detectors and the readout.

Design and Implementation of an Electronic Front-End Based on Square Wave Excitation for Ultrasonic Torsional Guided Wave Viscosity Sensor.

PubMed

Rabani, Amir

2016-10-12

The market for process instruments generally requires low cost devices that are robust, small in size, portable, and usable in-plant. Ultrasonic torsional guided wave sensors have received much attention by researchers for measurement of viscosity and/or density of fluids in recent years. The supporting electronic systems for these sensors providing many different settings of sine-wave signals are bulky and expensive. In contrast, a system based on bursts of square waves instead of sine waves would have a considerable advantage in that respect and could be built using simple integrated circuits at a cost that is orders of magnitude lower than for a windowed sine wave device. This paper explores the possibility of using square wave bursts as the driving signal source for the ultrasonic torsional guided wave viscosity sensor. A simple design of a compact and fully automatic analogue square wave front-end for the sensor is also proposed. The successful operation of the system is demonstrated by using the sensor for measuring the viscosity in a representative fluid. This work provides the basis for design and manufacture of low cost compact standalone ultrasonic guided wave sensors and enlightens the possibility of using coded excitation techniques utilising square wave sequences in such applications.

Dedicated multichannel readout ASIC coupled with single crystal diamond for dosimeter application

NASA Astrophysics Data System (ADS)

Fabbri, A.; Falco, M. D.; De Notaristefani, F.; Galasso, M.; Marinelli, M.; Orsolini Cencelli, V.; Tortora, L.; Verona, C.; Verona Rinati, G.

2013-02-01

This paper reports on the tests of a low-noise, multi-channel readout integrated circuit used as a readout electronic front-end for a diamond multi-pixel dosimeter. The system is developed for dose distribution measurement in radiotherapy applications. The first 10-channel prototype chip was designed and fabricated in a 0.18 um CMOS process. Every channel includes a charge integrator with a 10 pF capacitor and a double slope A/D converter. The diamond multi-pixel detector, based on CVD synthetic single crystal diamond Schottky diodes, is made by a 3 × 3 sensor matrix. The overall device has been tested under irradiation with 6 MeV radio therapeutic photon beams at the Policlinico ``Tor Vergata'' (PTV) hospital. Measurements show a 20 fA RMS leakage current from the front-end input stage and a negligible dark current from the diamond detector, a stable temporal response and a good linear behaviour as a function of both dose and dose rate. These characteristics were common to each tested channel.

Photon beam position monitor

DOEpatents

Kuzay, Tuncer M.; Shu, Deming

1995-01-01

A photon beam position monitor for use in the front end of a beamline of a high heat flux and high energy photon source such as a synchrotron radiation storage ring detects and measures the position and, when a pair of such monitors are used in tandem, the slope of a photon beam emanating from an insertion device such as a wiggler or an undulator inserted in the straight sections of the ring. The photon beam position monitor includes a plurality of spaced blades for precisely locating the photon beam, with each blade comprised of chemical vapor deposition (CVD) diamond with an outer metal coating of a photon sensitive metal such as tungsten, molybdenum, etc., which combination emits electrons when a high energy photon beam is incident upon the blade. Two such monitors are contemplated for use in the front end of the beamline, with the two monitors having vertically and horizontally offset detector blades to avoid blade "shadowing". Provision is made for aligning the detector blades with the photon beam and limiting detector blade temperature during operation.

DOE Office of Scientific and Technical Information (OSTI.GOV)

Gao, W.; Yin, J.; Li, C.

This paper presents a novel front-end electronics based on a front-end ASIC with post digital filtering and calibration dedicated to CZT detectors for PET imaging. A cascade amplifier based on split-leg topology is selected to realize the charge-sensitive amplifier (CSA) for the sake of low noise performances and the simple scheme of the power supplies. The output of the CSA is connected to a variable-gain amplifier to generate the compatible signals for the A/D conversion. A multi-channel single-slope ADC is designed to sample multiple points for the digital filtering and shaping. The digital signal processing algorithms are implemented by amore » FPGA. To verify the proposed scheme, a front-end readout prototype ASIC is designed and implemented in 0.35 μm CMOS process. In a single readout channel, a CSA, a VGA, a 10-bit ADC and registers are integrated. Two dummy channels, bias circuits, and time controller are also integrated. The die size is 2.0 mm x 2.1 mm. The input range of the ASIC is from 2000 e{sup -} to 100000 e{sup -}, which is suitable for the detection of the X-and gamma ray from 11.2 keV to 550 keV. The linearity of the output voltage is less than 1 %. The gain of the readout channel is 40.2 V/pC. The static power dissipation is about 10 mW/channel. The above tested results show that the electrical performances of the ASIC can well satisfy PET imaging applications. (authors)« less

First test results from the Front-End Board with Cyclone V as a test high-resolution platform for the Auger-Beyond-2015 Front End Electronics

DOE Office of Scientific and Technical Information (OSTI.GOV)

Szadkowski, Zbigniew

2015-07-01

The paper presents the first results from the Front- End Board (FEB) with the biggest Cyclone{sup R} V E FPGA 5CEFA9F31I7N, supporting 8 channels sampled up to 250 MSps at 14-bit resolution. Considered sampling for the SD is 120 MSps, however, the FEB has been developed with external anti-aliasing filters to keep a maximal flexibility. Six channels are targeted to the SD, two the rest for other experiments like: Auger Engineering Radio Array and additional muon counters. More channels and higher sampling generate larger size of registered events. We used the standard radio channel for a radio transmission from themore » detectors to the Central Data Acquisition Station (CDAS) to avoid at present a significant modification of a software in both sides: the detector and the CDAS (planned in a future for a final design). Seven FEBs have been deployed in the test detectors on a dedicated Engineering Array in a hexagon. Several variants of the FPGA code were tested for 120, 160, 200 and even 240 MSps DAQ. Tests confirmed a stability and reliability of the FEB design in real pampas conditions with more than 40 deg. C daily temperature variation and a strong sun exposition with a limited power budget only from a single solar panel. (authors)« less

Design and simulation of front end power converter for a microgrid with fuel cells and solar power sources

NASA Astrophysics Data System (ADS)

Jeevargi, Chetankumar; Lodhi, Anuj; Sateeshkumar, Allu; Elangovan, D.; Arunkumar, G.

2017-11-01

The need for Renewable Energy Sources (RES) is increasing due to increased demand for the supply of power and it is also environment friendly.In the recent few years, the cost of generation of the power from the RES has been decreased. This paper aims to design the front end power converter which is required for integrating the fuel cells and solar power sources to the micro grid. The simulation of the designed front end converter is carried out in the PSIM 9.1.1 software. The results show that the designed front end power converter is sufficient for integrating the micro grid with fuel cells and solar power sources.

GET: A generic electronics system for TPCs and nuclear physics instrumentation

NASA Astrophysics Data System (ADS)

Pollacco, E. C.; Grinyer, G. F.; Abu-Nimeh, F.; Ahn, T.; Anvar, S.; Arokiaraj, A.; Ayyad, Y.; Baba, H.; Babo, M.; Baron, P.; Bazin, D.; Beceiro-Novo, S.; Belkhiria, C.; Blaizot, M.; Blank, B.; Bradt, J.; Cardella, G.; Carpenter, L.; Ceruti, S.; De Filippo, E.; Delagnes, E.; De Luca, S.; De Witte, H.; Druillole, F.; Duclos, B.; Favela, F.; Fritsch, A.; Giovinazzo, J.; Gueye, C.; Isobe, T.; Hellmuth, P.; Huss, C.; Lachacinski, B.; Laffoley, A. T.; Lebertre, G.; Legeard, L.; Lynch, W. G.; Marchi, T.; Martina, L.; Maugeais, C.; Mittig, W.; Nalpas, L.; Pagano, E. V.; Pancin, J.; Poleshchuk, O.; Pedroza, J. L.; Pibernat, J.; Primault, S.; Raabe, R.; Raine, B.; Rebii, A.; Renaud, M.; Roger, T.; Roussel-Chomaz, P.; Russotto, P.; Saccà, G.; Saillant, F.; Sizun, P.; Suzuki, D.; Swartz, J. A.; Tizon, A.; Usher, N.; Wittwer, G.; Yang, J. C.

2018-04-01

General Electronics for TPCs (GET) is a generic, reconfigurable and comprehensive electronics and data-acquisition system for nuclear physics instrumentation of up to 33792 channels. The system consists of a custom-designed ASIC for signal processing, front-end cards that each house 4 ASIC chips and digitize the data in parallel through 12-bit ADCs, concentration boards to read and process the digital data from up to 16 ASICs, a 3-level trigger and master clock module to trigger the system and synchronize the data, as well as all of the associated firmware, communication and data-acquisition software. An overview of the system including its specifications and measured performances are presented.

DOE Office of Scientific and Technical Information (OSTI.GOV)

Ianakiev, Kiril Dimitrov; Iliev, Metodi; Swinhoe, Martyn Thomas

The KM200 device is a versatile, configurable front-end electronics boards that can be used as a functional replacement for Canberra’s JAB-01 boards based on the Amptek A-111 hybrid chip, which continues to be the preferred choice of electronics for large number of the boards in junction boxes of multiplicity counters that process the signal from an array of 3He detectors. Unlike the A-111 chip’s fixed time constants and sensitivity range, the shaping time and sensitivity of the new KM200 can be optimized for demanding applications such as spent fuel, and thus could improve the safeguards measurements of existing systems wheremore » the A-111 or PDT electronics does not perform well.« less

Physical Modeling Techniques for Missile and Other Protective Structures

DTIC Science & Technology

1983-06-29

uniaxial load only. In general , axial thrust was applied with an: initial eccentricity of zero on the specimen end. Sixteen different combinations of Pa...conditioning electronics and cabling schemes is included. The techniques described generally represent current approaches at the Civil Engineering Research...at T- zero and stopping when a pulse is generated by the pi-ezoelectric disc on arrival of! the detonation wave front. All elapsed time data is stored

A Wearable Healthcare System With a 13.7 μA Noise Tolerant ECG Processor.

PubMed

Izumi, Shintaro; Yamashita, Ken; Nakano, Masanao; Kawaguchi, Hiroshi; Kimura, Hiromitsu; Marumoto, Kyoji; Fuchikami, Takaaki; Fujimori, Yoshikazu; Nakajima, Hiroshi; Shiga, Toshikazu; Yoshimoto, Masahiko

2015-10-01

To prevent lifestyle diseases, wearable bio-signal monitoring systems for daily life monitoring have attracted attention. Wearable systems have strict size and weight constraints, which impose significant limitations of the battery capacity and the signal-to-noise ratio of bio-signals. This report describes an electrocardiograph (ECG) processor for use with a wearable healthcare system. It comprises an analog front end, a 12-bit ADC, a robust Instantaneous Heart Rate (IHR) monitor, a 32-bit Cortex-M0 core, and 64 Kbyte Ferroelectric Random Access Memory (FeRAM). The IHR monitor uses a short-term autocorrelation (STAC) algorithm to improve the heart-rate detection accuracy despite its use in noisy conditions. The ECG processor chip consumes 13.7 μA for heart rate logging application.

Two-Stage Variable Sample-Rate Conversion System

NASA Technical Reports Server (NTRS)

Tkacenko, Andre

2009-01-01

A two-stage variable sample-rate conversion (SRC) system has been pro posed as part of a digital signal-processing system in a digital com munication radio receiver that utilizes a variety of data rates. The proposed system would be used as an interface between (1) an analog- todigital converter used in the front end of the receiver to sample an intermediatefrequency signal at a fixed input rate and (2) digita lly implemented tracking loops in subsequent stages that operate at v arious sample rates that are generally lower than the input sample r ate. This Two-Stage System would be capable of converting from an input sample rate to a desired lower output sample rate that could be var iable and not necessarily a rational fraction of the input rate.

A low power wearable transceiver for human body communication.

PubMed

Huang, Jin; Chen, Lian-Kang; Zhang, Yuan-Ting

2009-01-01

This paper reports a low power transceiver designed for wearable medical healthcare system. Based on a novel energy-efficient wideband wireless communication scheme that uses human body as a transmission medium, the transceiver can achieve a maximum 15 Mbps data rate with total receiver sensitivity of -30 dBm. The chip measures only 0.56 mm(2) and was fabricated in the SMIC 0.18um 1P6M RF CMOS process. The RX consumes 5mW and TX dissipates 1mW with delivering power up to 10uW, which is suitable for the body area network short range application. Real-time medical information collecting through the human body is fully simulated. Architecture of the chip together with the detail characterizes from its wireless analog front-end are presented.

A low-noise low-power EEG acquisition node for scalable brain-machine interfaces

NASA Astrophysics Data System (ADS)

Sullivan, Thomas J.; Deiss, Stephen R.; Cauwenberghs, Gert; Jung, Tzyy-Ping

2007-05-01

Electroencephalograph (EEG) recording systems offer a versatile, noninvasive window on the brain's spatio-temporal activity for many neuroscience and clinical applications. Our research aims at improving the spatial resolution and mobility of EEG recording by reducing the form factor, power drain and signal fanout of the EEG acquisition node in a scalable sensor array architecture. We present such a node integrated onto a dimesized circuit board that contains a sensor's complete signal processing front-end, including amplifier, filters, and analog-to-digital conversion. A daisy-chain configuration between boards with bit-serial output reduces the wiring needed. The circuit's low power consumption of 423 μW supports EEG systems with hundreds of electrodes to operate from small batteries for many hours. Coupling between the bit-serial output and the highly sensitive analog input due to dense integration of analog and digital functions on the circuit board results in a deterministic noise component in the output, larger than the intrinsic sensor and circuit noise. With software correction of this noise contribution, the system achieves an input-referred noise of 0.277 μVrms in the signal band of 1 to 100 Hz, comparable to the best medical-grade systems in use. A chain of seven nodes using EEG dry electrodes created in micro-electrical-mechanical system (MEMS) technology is demonstrated in a real-world setting.

Design Architecture and Initial Results from an FPGA Based Digital Receiver for Multistatic Meteor Measurements

NASA Astrophysics Data System (ADS)

Palo, Scott; Vaudrin, Cody

Defined by a minimal RF front-end followed by an analog-to-digital converter (ADC) and con-trolled by a reconfigurable logic device (FPGA), the digital receiver will replace conventional heterodyning analog receivers currently in use by the COBRA meteor radar. A basic hardware overview touches on the major digital receiver components, theory of operation and data han-dling strategies. We address concerns within the community regarding the implementation of digital receivers in small-scale scientific radars, and outline the numerous benefits with a focus on reconfigurability. From a remote sensing viewpoint, having complete visibility into a band of the EM spectrum allows an experiment designer to focus on parameter estimation rather than hardware limitations. Finally, we show some basic multistatic receiver configurations enabled through GPS time synchronization. Currently, the digital receiver is configured to facilitate range and radial velocity determination of meteors in the MLT region for use with the COBRA meteor radar. Initial measurements from data acquired at Platteville, Colorado and Tierra Del Fuego in Argentina will be presented. We show an improvement in detection rates compared to conventional analog systems. Scientific justification for a digital receiver is clearly made by the presentation of RTI plots created using data acquired from the receiver. These plots reveal an interesting phenomenon concerning vacillating power structures in a select number of meteor trails.

A bipolar analog front-end integrated circuit for the SDC silicon tracker

NASA Astrophysics Data System (ADS)

Kipnis, I.; Spieler, H.; Collins, T.

1993-11-01

A low noise, low power, high bandwidth, radiation hard, silicon bipolar transistor full-custom integrated circuit (IC) containing 64 channels of analog signal processing has been developed for the SDC silicon tracker. The IC was designed and tested at LBL and was fabricated using CBIC-U2, 4 GHz f(sub T) complementary bipolar technology. Each channel contains the following functions: low noise preamplification, pulse shaping, and threshold discrimination. This is the first iteration of the production analog IC for the SDC silicon tracker. The IC is laid out to directly match the 50 micron pitch double-sided silicon strip detector. The chip measures 6.8 mm by 3.1 mm and contains 3,600 transistors. Three stages of amplification provide 180 mV/fC of gain with a 35 nsec peaking time at the comparator input. For a 14 pF detector capacitance, the equivalent noise charge is 1300 el. rms at a power consumption of 1 mW/channel from a single 3.5 V supply. With the discriminator threshold set to four times the noise level, a 16 nsec time-walk for 1.25 to 10 fC signals is achieved using a time-walk compensation network. Irradiation tests at TRIUMF to a Phi = 10(exp 14) protons/sq cm have been performed on the IC, demonstrating the radiation hardness of the complementary bipolar process.

Architecture of a general purpose embedded Slow-Control Adapter ASIC for future high-energy physics experiments

NASA Astrophysics Data System (ADS)

Gabrielli, Alessandro; Loddo, Flavio; Ranieri, Antonio; De Robertis, Giuseppe

2008-10-01

This work is aimed at defining the architecture of a new digital ASIC, namely Slow-Control Adapter (SCA), which will be designed in a commercial 130-nm CMOS technology. This chip will be embedded within a high-speed data acquisition optical link (GBT) to control and monitor the front-end electronics in future high-energy physics experiments. The GBT link provides a transparent transport layer between the SCA and control electronics in the counting room. The proposed SCA supports a variety of common bus protocols to interface with end-user general-purpose electronics. Between the GBT and the SCA a standard 100 Mb/s IEEE-802.3 compatible protocol will be implemented. This standard protocol allows off-line tests of the prototypes using commercial components that support the same standard. The project is justified because embedded applications in modern large HEP experiments require particular care to assure the lowest possible power consumption, still offering the highest reliability demanded by very large particle detectors.

Electronic Patient Reported Outcomes in Paediatric Oncology - Applying Mobile and Near Field Communication Technology.

PubMed

Duregger, Katharina; Hayn, Dieter; Nitzlnader, Michael; Kropf, Martin; Falgenhauer, Markus; Ladenstein, Ruth; Schreier, Günter

2016-01-01

Electronic Patient Reported Outcomes (ePRO) gathered using telemonitoring solutions might be a valuable source of information in rare cancer research. The objective of this paper was to develop a concept and implement a prototype for introducing ePRO into the existing neuroblastoma research network by applying Near Field Communication and mobile technology. For physicians, an application was developed for registering patients within the research network and providing patients with an ID card and a PIN for authentication when transmitting telemonitoring data to the Electronic Data Capture system OpenClinica. For patients, a previously developed telemonitoring system was extended by a Simple Object Access Protocol (SOAP) interface for transmitting nine different health parameters and toxicities. The concept was fully implemented on the front-end side. The developed application for physicians was prototypically implemented and the mobile application of the telemonitoring system was successfully connected to OpenClinica. Future work will focus on the implementation of the back-end features.

Relativistic runaway ionization fronts.

PubMed

Luque, A

2014-01-31

We investigate the first example of self-consistent impact ionization fronts propagating at relativistic speeds and involving interacting, high-energy electrons. These fronts, which we name relativistic runaway ionization fronts, show remarkable features such as a bulk speed within less than one percent of the speed of light and the stochastic selection of high-energy electrons for further acceleration, which leads to a power-law distribution of particle energies. A simplified model explains this selection in terms of the overrun of Coulomb-scattered electrons. Appearing as the electromagnetic interaction between electrons saturates the exponential growth of a relativistic runaway electron avalanche, relativistic runaway ionization fronts may occur in conjunction with terrestrial gamma-ray flashes and thus explain recent observations of long, power-law tails in the terrestrial gamma-ray flash energy spectrum.

Wireless recording systems: from noninvasive EEG-NIRS to invasive EEG devices.

PubMed

Sawan, Mohamad; Salam, Muhammad T; Le Lan, Jérôme; Kassab, Amal; Gelinas, Sébastien; Vannasing, Phetsamone; Lesage, Frédéric; Lassonde, Maryse; Nguyen, Dang K

2013-04-01

In this paper, we present the design and implementation of a wireless wearable electronic system dedicated to remote data recording for brain monitoring. The reported wireless recording system is used for a) simultaneous near-infrared spectrometry (NIRS) and scalp electro-encephalography (EEG) for noninvasive monitoring and b) intracerebral EEG (icEEG) for invasive monitoring. Bluetooth and dual radio links were introduced for these recordings. The Bluetooth-based device was embedded in a noninvasive multichannel EEG-NIRS system for easy portability and long-term monitoring. On the other hand, the 32-channel implantable recording device offers 24-bit resolution, tunable features, and a sampling frequency up to 2 kHz per channel. The analog front-end preamplifier presents low input-referred noise of 5 μ VRMS and a signal-to-noise ratio of 112 dB. The communication link is implemented using a dual-band radio frequency transceiver offering a half-duplex 800 kb/s data rate, 16.5 mW power consumption and less than 10(-10) post-correction Bit-Error Rate (BER). The designed system can be accessed and controlled by a computer with a user-friendly graphical interface. The proposed wireless implantable recording device was tested in vitro using real icEEG signals from two patients with refractory epilepsy. The wirelessly recorded signals were compared to the original signals recorded using wired-connection, and measured normalized root-mean square deviation was under 2%.

Fermilab Recycler Ring BPM Upgrade Based on Digital Receiver Technology

NASA Astrophysics Data System (ADS)

Webber, R.; Crisp, J.; Prieto, P.; Voy, D.; Briegel, C.; McClure, C.; West, R.; Pordes, S.; Mengel, M.

2004-11-01

Electronics for the 237 BPMs in the Fermilab Recycler Ring have been upgraded from a log-amplifier based system to a commercially produced digitizer-digital down converter based system. The hardware consists of a pre-amplifier connected to a split-plate BPM, an analog differential receiver-filter module and an 8-channel 80-MHz digital down converter VME board. The system produces position and intensity with a dynamic range of 30 dB and a resolution of ±10 microns. The position measurements are made on 2.5-MHz bunched beam and barrier buckets of the un-bunched beam. The digital receiver system operates in one of six different signal processing modes that include 2.5-MHz average, 2.5-MHz bunch-by-bunch, 2.5-MHz narrow band, unbunched average, un-bunched head/tail and 89-kHz narrow band. Receiver data is acquired on any of up to sixteen clock events related to Recycler beam transfers and other machine activities. Data from the digital receiver board are transferred to the front-end CPU for position and intensity computation on an on-demand basis through the VME bus. Data buffers are maintained for each of the acquisition events and support flash, closed orbit and turn-by-turn measurements. A calibration system provides evaluation of the BPM signal path and application programs.

EEG acquisition system based on active electrodes with common-mode interference suppression by Driving Right Leg circuit.

PubMed

Guermandi, Marco; Bigucci, Alessandro; Franchi Scarselli, Eleonora; Guerrieri, Roberto

2015-01-01

We present a system for the acquisition of EEG signals based on active electrodes and implementing a Driving Right Leg circuit (DgRL). DgRL allows for single-ended amplification and analog-to-digital conversion, still guaranteeing a common mode rejection in excess of 110 dB. This allows the system to acquire high-quality EEG signals essentially removing network interference for both wet and dry-contact electrodes. The front-end amplification stage is integrated on the electrode, minimizing the system's sensitivity to electrode contact quality, cable movement and common mode interference. The A/D conversion stage can be either integrated in the remote back-end or placed on the head as well, allowing for an all-digital communication to the back-end. Noise integrated in the band from 0.5 to 100 Hz is comprised between 0.62 and 1.3 μV, depending on the configuration. Current consumption for the amplification and A/D conversion of one channel is 390 μA. Thanks to its low noise, the high level of interference suppression and its quick setup capabilities, the system is particularly suitable for use outside clinical environments, such as in home care, brain-computer interfaces or consumer-oriented applications.

The sonic window: second generation results

NASA Astrophysics Data System (ADS)

Walker, William F.; Fuller, Michael I.; Brush, Edward V.; Eames, Matthew D. C.; Owen, Kevin; Ranganathan, Karthik; Blalock, Travis N.; Hossack, John A.

2006-03-01

Medical Ultrasound Imaging is widely used clinically because of its relatively low cost, portability, lack of ionizing radiation, and real-time nature. However, even with these advantages ultrasound has failed to permeate the broad array of clinical applications where its use could be of value. A prime example of this untapped potential is the routine use of ultrasound to guide intravenous access. In this particular application existing systems lack the required portability, low cost, and ease-of-use required for widespread acceptance. Our team has been working for a number of years to develop an extremely low-cost, pocket-sized, and intuitive ultrasound imaging system that we refer to as the "Sonic Window." We have previously described the first generation Sonic Window prototype that was a bench-top device using a 1024 element, fully populated array operating at a center frequency of 3.3 MHz. Through a high degree of custom front-end integration combined with multiplexing down to a 2 channel PC based digitizer this system acquired a full set of RF data over a course of 512 transmit events. While initial results were encouraging, this system exhibited limitations resulting from low SNR, relatively coarse array sampling, and relatively slow data acquisition. We have recently begun assembling a second-generation Sonic Window system. This system uses a 3600 element fully sampled array operating at 5.0 MHz with a 300 micron element pitch. This system extends the integration of the first generation system to include front-end protection, pre-amplification, a programmable bandpass filter, four sample and holds, and four A/D converters for all 3600 channels in a set of custom integrated circuits with a combined area smaller than the 1.8 x 1.8 cm footprint of the transducer array. We present initial results from this front-end and present benchmark results from a software beamformer implemented on the Analog Devices BF-561 DSP. We discuss our immediate plans for further integration and testing. This second prototype represents a major reduction in size and forms the foundation of a fully functional, fully integrated, pocket sized prototype.

Front-End Analysis Cornerstone of Logistics

NASA Technical Reports Server (NTRS)

Nager, Paul J.

2000-01-01

The presentation provides an overview of Front-End Logistics Support Analysis (FELSA), when it should be performed, benefits of performing FELSA and why it should be performed, how it is conducted, and examples.

Towards a Reduced-Wire Interface for CMUT-Based Intravascular Ultrasound Imaging Systems

PubMed Central

Lim, Jaemyung; Tekes, Coskun; Degertekin, F. Levent; Ghovanloo, Maysam

2016-01-01

Having intravascular ultrasound (IVUS) imaging capability on guide wires used in cardiovascular interventions may eliminate the need for separate IVUS catheters and expand the use of IVUS in a larger portion of the vasculature. High frequency capacitive micro machined ultrasonic transducer (CMUT) arrays should be integrated with interface electronics and placed on the guide wire for this purpose. Besides small size, this system-on-a-chip (SoC) front-end should connect to the back-end imaging system with a minimum number of wires to preserve the critical mechanical properties of the guide wire. We present a 40 MHz CMUT array interface SoC, which will eventually use only two wires for power delivery and transmits image data using a combination of analog-to-time conversion (ATC) and an impulse radio ultra-wideband (IR-UWB) wireless link. The proof-of-concept prototype ASIC consumes only 52.8 mW and occupies 4.07 mm2 in a 0.35-μm standard CMOS process. A rectifier and regulator power the rest of the SoC at 3.3 V from a 10 MHz power carrier that is supplied through a 2.4 m micro-coax cable with an overall efficiency of 49.1%. Echo signals from an 8-element CMUT array are amplified by a transimpedance amplifier (TIA) array and down-converted to baseband by quadrature sampling using a 40 MHz clock, derived from the power carrier. The ATC generates pulse-width-modulated (PWM) samples at 2 × 10 MS/s with 6 bit resolution, while the entire system achieved 5.1 ENOB. Preliminary images from the prototype system are presented, and alternative data transmission and possible future directions towards practical implementation are discussed. PMID:27662686

Towards a Reduced-Wire Interface for CMUT-Based Intravascular Ultrasound Imaging Systems.

PubMed

Lim, Jaemyung; Tekes, Coskun; Degertekin, F Levent; Ghovanloo, Maysam

2017-04-01

Having intravascular ultrasound (IVUS) imaging capability on guide wires used in cardiovascular interventions may eliminate the need for separate IVUS catheters and expand the use of IVUS in a larger portion of the vasculature. High frequency capacitive micro machined ultrasonic transducer (CMUT) arrays should be integrated with interface electronics and placed on the guide wire for this purpose. Besides small size, this system-on-a-chip (SoC) front-end should connect to the back-end imaging system with a minimum number of wires to preserve the critical mechanical properties of the guide wire. We present a 40 MHz CMUT array interface SoC, which will eventually use only two wires for power delivery and transmits image data using a combination of analog-to-time conversion (ATC) and an impulse radio ultra-wideband (IR-UWB) wireless link. The proof-of-concept prototype ASIC consumes only 52.8 mW and occupies 4.07 [Formula: see text] in a 0.35- [Formula: see text] standard CMOS process. A rectifier and regulator power the rest of the SoC at 3.3 V from a 10 MHz power carrier that is supplied through a 2.4 m micro-coax cable with an overall efficiency of 49.1%. Echo signals from an 8-element CMUT array are amplified by a transimpedance amplifier (TIA) array and down-converted to baseband by quadrature sampling using a 40 MHz clock, derived from the power carrier. The ATC generates pulse-width-modulated (PWM) samples at 2 × 10 MS/s with 6 bit resolution, while the entire system achieved 5.1 ENOB. Preliminary images from the prototype system are presented, and alternative data transmission and possible future directions towards practical implementation are discussed.

Controlling front-end electronics boards using commercial solutions

NASA Astrophysics Data System (ADS)

Beneyton, R.; Gaspar, C.; Jost, B.; Schmeling, S.

2002-04-01

LHCb is a dedicated B-physics experiment under construction at CERN's large hadron collider (LHC) accelerator. This paper will describe the novel approach LHCb is taking toward controlling and monitoring of electronics boards. Instead of using the bus in a crate to exercise control over the boards, we use credit-card sized personal computers (CCPCs) connected via Ethernet to cheap control PCs. The CCPCs will provide a simple parallel, I2C, and JTAG buses toward the electronics board. Each board will be equipped with a CCPC and, hence, will be completely independently controlled. The advantages of this scheme versus the traditional bus-based scheme will be described. Also, the integration of the controls of the electronics boards into a commercial supervisory control and data acquisition (SCADA) system will be shown.

Concepts for a Muon Accelerator Front-End

DOE Office of Scientific and Technical Information (OSTI.GOV)

Stratakis, Diktys; Berg, Scott; Neuffer, David

2017-03-16

We present a muon capture front-end scheme for muon based applications. In this Front-End design, a proton bunch strikes a target and creates secondary pions that drift into a capture channel, decaying into muons. A series of rf cavities forms the resulting muon beams into a series of bunches of differerent energies, aligns the bunches to equal central energies, and initiates ionization cooling. We also discuss the design of a chicane system for the removal of unwanted secondary particles from the muon capture region and thus reduce activation of the machine. With the aid of numerical simulations we evaluate themore » performance of this Front-End scheme as well as study its sensitivity against key parameters such as the type of target, the number of rf cavities and the gas pressure of the channel.« less

The Multifrequency Siberian Radioheliograph

NASA Astrophysics Data System (ADS)

Lesovoi, S. V.; Altyntsev, A. T.; Ivanov, E. F.; Gubin, A. V.

2012-10-01

The ten-antenna prototype of the multifrequency Siberian radioheliograph is described. The prototype consists of four parts: antennas with broadband front-ends, analog back-ends, digital receivers and a correlator. The prototype antennas are mounted on the outermost stations of the Siberian Solar Radio Telescope (SSRT) array. A signal from each antenna is transmitted to a workroom by an analog fiber optical link, laid in an underground tunnel. After mixing, all signals are digitized and processed by digital receivers before the data are transmitted to the correlator. The digital receivers and the correlator are accessible by the Local Area Network (LAN). The frequency range of the prototype is from 4 to 8 GHz. Currently the frequency switching observing mode is used. The prototype data include both circular polarizations at a number of frequencies given by a list. This prototype is the first stage of the multifrequency Siberian radioheliograph development. It is assumed that the radioheliograph will consist of 96 antennas and will occupy stations of the West-East-South subarray of the SSRT. The radioheliograph will be fully constructed in the autumn of 2012. We plan to reach the brightness temperature sensitivity of about 100 K for the snapshot image, a spatial resolution up to 13 arcseconds at 8 GHz and a polarization measurement accuracy about a few percent. First results with the ten-antenna prototype are presented of observations of solar microwave bursts. The prototype's abilities to estimate source size and locations at different frequencies are discussed.

High-Frequency Wireless Communications System: 2.45-GHz Front-End Circuit and System Integration

ERIC Educational Resources Information Center

Chen, M.-H.; Huang, M.-C.; Ting, Y.-C.; Chen, H.-H.; Li, T.-L.

2010-01-01

In this article, a course on high-frequency wireless communications systems is presented. With the 145-MHz baseband subsystem available from a prerequisite course, the present course emphasizes the design and implementation of the 2.45-GHz front-end subsystem as well as system integration issues. In this curriculum, the 2.45-GHz front-end…

Optical, analog and digital domain architectural considerations for visual communications

NASA Astrophysics Data System (ADS)

Metz, W. A.

2008-01-01

The end of the performance entitlement historically achieved by classic scaling of CMOS devices is within sight, driven ultimately by fundamental limits. Performance entitlements predicted by classic CMOS scaling have progressively failed to be realized in recent process generations due to excessive leakage, increasing interconnect delays and scaling of gate dielectrics. Prior to reaching fundamental limits, trends in technology, architecture and economics will pressure the industry to adopt new paradigms. A likely response is to repartition system functions away from digital implementations and into new architectures. Future architectures for visual communications will require extending the implementation into the optical and analog processing domains. The fundamental properties of these domains will in turn give rise to new architectural concepts. The limits of CMOS scaling and impact on architectures will be briefly reviewed. Alternative approaches in the optical, electronic and analog domains will then be examined for advantages, architectural impact and drawbacks.

An Analog Computer for Electronic Engineering Education

ERIC Educational Resources Information Center

Fitch, A. L.; Iu, H. H. C.; Lu, D. D. C.

2011-01-01

This paper describes a compact analog computer and proposes its use in electronic engineering teaching laboratories to develop student understanding of applications in analog electronics, electronic components, engineering mathematics, control engineering, safe laboratory and workshop practices, circuit construction, testing, and maintenance. The…

United States Air Force Summer Faculty Research Program, 1988. Program Technical Report. Volume 4

DTIC Science & Technology

1988-12-01

Professor SDecialty: Gas Phase Ion-Molecule Chem. Dept. of Chemistry Assigned: Air Force Geophysics Lab. Louisiana State University Choppin Hall...For Lucid Dr. Darin DeForest 55 Pre-Sort Processor Phase Distortion Dr. Paul Dingman Evaluation 56 A PROLOG Natural Language Front End Dr. Hugh...analysis in the electron impact mode. The column used was 25m x 0.25am ID bonded phase FSOT capillary column (#952525 Alltech and Associates), coated with

Photodetectors and front-end electronics for the LHCb RICH upgrade

NASA Astrophysics Data System (ADS)

Cassina, L.; LHCb RICH

2017-12-01

The RICH detectors of the LHCb experiment provide identification of hadrons produced in high energy proton-proton collisions in the LHC at CERN over a wide momentum range (2-100 GeV/c). Cherenkov light is collected on photon detector planes sensitive to single photons. The RICH will be upgraded (in 2019) to read out every bunch crossing, at a rate of 40 MHz. The current hybrid photon detectors (HPD) will be replaced with multi-anode photomultiplier tubes (customisations of the Hamamatsu R11265 and the H12699 MaPMTs). These 8×8 pixel devices meet the experimental requirements thanks to their small pixel size, high gain, negligible dark count rate (∼50 Hz/cm2) and moderate cross-talk. The measured performance of several tubes is reported, together with their long-term stability. A new 8-channel front-end chip, named CLARO, has been designed in 0.35 μm CMOS AMS technology for the MaPMT readout. The CLARO chip operates in binary mode and combines low power consumption (∼1 mW/Ch), wide bandwidth (baseline restored in ⩽ 25 ns) and radiation hardness. A 12-bit digital register permits the optimisation of the dynamic range and the threshold level for each channel and provides tools for the on-site calibration. The design choices and the characterization of the electronics are presented.

View southwest, east front, interior bays, and north end ...

Library of Congress Historic Buildings Survey, Historic Engineering Record, Historic Landscapes Survey

View southwest, east front, interior bays, and north end - Abraham Cyrus Farmstead, Equipment Shed, About 320 feet south-southwest of farmhouse at 3271 Cyrus Road (County Road 1/6), Cyrus, Wayne County, WV

4. DETAIL OF SOUTH (FRONT) ELEVATION AT EAST END OF ...

Library of Congress Historic Buildings Survey, Historic Engineering Record, Historic Landscapes Survey

4. DETAIL OF SOUTH (FRONT) ELEVATION AT EAST END OF PORCH WITH STRUCTURAL SYSTEM OF WOOD FRAME WITH BRICK NOGGING REVEALED. - Andalusia, The Cottage, State Road vicinity (Bensalem Township), Andalusia, Bucks County, PA

5. Bombproof barracks, front elevation at southwest end. Doors and ...

Library of Congress Historic Buildings Survey, Historic Engineering Record, Historic Landscapes Survey

5. Bomb-proof barracks, front elevation at southwest end. Doors and windows covered with plywood. Railway and car stop in foreground. - Fort Hamilton, Bomb-Proof Barracks, Rose Island, Newport, Newport County, RI

ANALYTICAL CHEMISTRY DIVISION ANNUAL PROGRESS REPORT FOR PERIOD ENDING DECEMBER 31, 1961

DOE Office of Scientific and Technical Information (OSTI.GOV)

None

1962-02-01

Research and development progress is reported on analytlcal instrumentation, dlssolver-solution analyses, special research problems, reactor projects analyses, x-ray and spectrochemical analyses, mass spectrometry, optical and electron microscopy, radiochemical analyses, nuclear analyses, inorganic preparations, organic preparations, ionic analyses, infrared spectral studies, anodization of sector coils for the Analog II Cyclotron, quality control, process analyses, and the Thermal Breeder Reactor Projects Analytical Chemistry Laboratory. (M.C.G.)

Optimization of the microcable and detector parameters towards low noise in the STS readout system

NASA Astrophysics Data System (ADS)

Kasinski, Krzysztof; Kleczek, Rafal; Schmidt, Christian J.

2015-09-01

Successful operation of the Silicon Tracking System requires charge measurement of each hit with equivalent noise charge lower than 1000 e- rms. Detector channels will not be identical, they will be constructed accordingly to the estimated occupancy, therefore for the readout electronics, detector system will exhibit various parameters. This paper presents the simulation-based study on the required microcable (trace width, dielectric material), detector (aluminum strip resistance) and external passives' (decoupling capacitors) parameters in the Silicon Tracking System. Studies will be performed using a front-end electronics (charge sensitive amplifier with shaper) designed for the power budget of 10 mA/channel.

Understanding and addressing racial/ethnic disproportionality in the front end of the child welfare system.

PubMed

Osterling, Kathy Lemon; D'Andrade, Amy; Austin, Michael J

2008-01-01

Racial/ethnic disproportionality in the child welfare system is a complicated social problem that is receiving increasing amounts of attention from researchers and practitioners. This review of the literature examines disproportionality in the front-end of the child welfare system and interventions that may address it. While none of the interventions had evidence suggesting that they reduced disproportionality in child welfare front-end processes, some of the interventions may improve child welfare case processes related to disproportionality and outcomes for families of color.

VIEW OF BASE END STATION BARLOW SHOWING THE SUGGESTED APPEARANCE ...

Library of Congress Historic Buildings Survey, Historic Engineering Record, Historic Landscapes Survey

VIEW OF BASE END STATION BARLOW SHOWING THE SUGGESTED APPEARANCE DURING USE (TOP IS NOT EXTANT INDICATING POST-USE DAMAGE), PACING NORTHWEST, VIEW IS OF THE FRONT, WITH THE RIGHT FRONT CORNER EXPOSED - White's Point Reservation, Base End Stations, B"1, Bounded by Voyager Circle & Mariner Drive, San Pedro, Los Angeles County, CA

Source-Constrained Recall: Front-End and Back-End Control of Retrieval Quality

ERIC Educational Resources Information Center

Halamish, Vered; Goldsmith, Morris; Jacoby, Larry L.

2012-01-01

Research on the strategic regulation of memory accuracy has focused primarily on monitoring and control processes used to edit out incorrect information after it is retrieved (back-end control). Recent studies, however, suggest that rememberers also enhance accuracy by preventing the retrieval of incorrect information in the first place (front-end…

A configurable and low-power mixed signal SoC for portable ECG monitoring applications.

PubMed

Kim, Hyejung; Kim, Sunyoung; Van Helleputte, Nick; Artes, Antonio; Konijnenburg, Mario; Huisken, Jos; Van Hoof, Chris; Yazicioglu, Refet Firat

2014-04-01

This paper describes a mixed-signal ECG System-on-Chip (SoC) that is capable of implementing configurable functionality with low-power consumption for portable ECG monitoring applications. A low-voltage and high performance analog front-end extracts 3-channel ECG signals and single channel electrode-tissue-impedance (ETI) measurement with high signal quality. This can be used to evaluate the quality of the ECG measurement and to filter motion artifacts. A custom digital signal processor consisting of 4-way SIMD processor provides the configurability and advanced functionality like motion artifact removal and R peak detection. A built-in 12-bit analog-to-digital converter (ADC) is capable of adaptive sampling achieving a compression ratio of up to 7, and loop buffer integration reduces the power consumption for on-chip memory access. The SoC is implemented in 0.18 μm CMOS process and consumes 32 μ W from a 1.2 V while heart beat detection application is running, and integrated in a wireless ECG monitoring system with Bluetooth protocol. Thanks to the ECG SoC, the overall system power consumption can be reduced significantly.

Development of digital sideband separating down-conversion for Yuan-Tseh Lee Array

NASA Astrophysics Data System (ADS)

Li, Chao-Te; Kubo, Derek; Cheng, Jen-Chieh; Kuroda, John; Srinivasan, Ranjani; Ho, Solomon; Guzzino, Kim; Chen, Ming-Tang

2016-07-01

This report presents a down-conversion method involving digital sideband separation for the Yuan-Tseh Lee Array (YTLA) to double the processing bandwidth. The receiver consists of a MMIC HEMT LNA front end operating at a wavelength of 3 mm, and sub-harmonic mixers that output signals at intermediate frequencies (IFs) of 2-18 GHz. The sideband separation scheme involves an analog 90° hybrid followed by two mixers that provide down-conversion of the IF signal to a pair of in-phase (I) and quadrature (Q) signals in baseband. The I and Q baseband signals are digitized using 5 Giga sample per second (Gsps) analog-to-digital converters (ADCs). A second hybrid is digitally implemented using field-programmable gate arrays (FPGAs) to produce two sidebands, each with a bandwidth of 1.6 GHz. The 2 x 1.6 GHz band can be tuned to cover any 3.6 GHz window within the aforementioned IF range of the array. Sideband rejection ratios (SRRs) above 20 dB can be obtained across the 3.6 GHz bandwidth by equalizing the power and delay between the I and Q baseband signals. Furthermore, SRRs above 30 dB can be achieved when calibration is applied.

Digital signal processing the Tevatron BPM signals

DOE Office of Scientific and Technical Information (OSTI.GOV)

Cancelo, G.; James, E.; Wolbers, S.

2005-05-01

The Beam Position Monitor (TeV BPM) readout system at Fermilab's Tevatron has been updated and is currently being commissioned. The new BPMs use new analog and digital hardware to achieve better beam position measurement resolution. The new system reads signals from both ends of the existing directional stripline pickups to provide simultaneous proton and antiproton measurements. The signals provided by the two ends of the BPM pickups are processed by analog band-pass filters and sampled by 14-bit ADCs at 74.3MHz. A crucial part of this work has been the design of digital filters that process the signal. This paper describesmore » the digital processing and estimation techniques used to optimize the beam position measurement. The BPM electronics must operate in narrow-band and wide-band modes to enable measurements of closed-orbit and turn-by-turn positions. The filtering and timing conditions of the signals are tuned accordingly for the operational modes. The analysis and the optimized result for each mode are presented.« less

The plastic scintillator detector calibration circuit for DAMPE

NASA Astrophysics Data System (ADS)

Yang, Haibo; Kong, Jie; Zhao, Hongyun; Su, Hong

2016-07-01

The Dark Matter Particle Explorer (DAMPE) is being constructed as a scientific satellite to observe high energy cosmic rays in space. Plastic scintillator detector array (PSD), developed by Institute of Modern Physics, Chinese Academy of Sciences (IMPCAS), is one of the most important parts in the payload of DAMPE which is mainly used for the study of dark matter. As an anti-coincidence detector, and a charged-particle identification detector, the PSD has a total of 360 electronic readout channels, which are distributed at four sides of PSD using four identical front end electronics (FEE). Each FEE reads out 90 charge signals output by the detector. A special calibration circuit is designed in FEE. FPGA is used for on-line control, enabling the calibration circuit to generate the pulse signal with known charge. The generated signal is then sent to the FEE for calibration and self-test. This circuit mainly consists of DAC, operation amplifier, analog switch, capacitance and resistance. By using controllable step pulse, the charge can be coupled to the charge measuring chip using the small capacitance. In order to fulfill the system's objective of large dynamic range, the FEE is required to have good linearity. Thus, the charge-controllable signal is needed to do sweep test on all channels in order to obtain the non-linear parameters for off-line correction. On the other hand, the FEE will run on the satellite for three years. The changes of the operational environment and the aging of devices will lead to parameter variation of the FEE, highlighting the need for regular calibration. The calibration signal generation circuit also has a compact structure and the ability to work normally, with the PSD system's voltage resolution being higher than 0.6%.

35. EAST FRONT OF POWERHOUSE AND CAR BARN: East front ...

Library of Congress Historic Buildings Survey, Historic Engineering Record, Historic Landscapes Survey

35. EAST FRONT OF POWERHOUSE AND CAR BARN: East front of powerhouse and car barn. 'Annex' is right end of building. - San Francisco Cable Railway, Washington & Mason Streets, San Francisco, San Francisco County, CA

Advanced integrated safeguards using front-end-triggering devices

DOE Office of Scientific and Technical Information (OSTI.GOV)

Howell, J.A.; Whitty, W.J.

This report addresses potential uses of front-end-triggering devices for enhanced safeguards. Such systems incorporate video surveillance as well as radiation and other sensors. Also covered in the report are integration issues and analysis techniques.

2. SHED, SOUTH END OF SHORTER BARRACKS, FRONT AND RIGHT ...

Library of Congress Historic Buildings Survey, Historic Engineering Record, Historic Landscapes Survey

2. SHED, SOUTH END OF SHORTER BARRACKS, FRONT AND RIGHT SIDES, LOOKING SOUTHWEST. - NIKE Missile Base C-84, Paint & Oil Storage Shed, South of Launch Area Entrance Drive, near security fence, Barrington, Cook County, IL

2. VIEW OF NORTHWEST SIDE SHOWING NORTHEAST (GABLE END) FRONT. ...

Library of Congress Historic Buildings Survey, Historic Engineering Record, Historic Landscapes Survey

2. VIEW OF NORTHWEST SIDE SHOWING NORTHEAST (GABLE END) FRONT. (BUILDING 114 IS VISIBLE ON RIGHT.) - Fort McPherson, World War II Station Hospital, G. U. Treatment Unit Dispensary, Thorne Avenue, Atlanta, Fulton County, GA

Photon beam position monitor

DOEpatents

Kuzay, T.M.; Shu, D.

1995-02-07

A photon beam position monitor is disclosed for use in the front end of a beamline of a high heat flux and high energy photon source such as a synchrotron radiation storage ring detects and measures the position and, when a pair of such monitors are used in tandem, the slope of a photon beam emanating from an insertion device such as a wiggler or an undulator inserted in the straight sections of the ring. The photon beam position monitor includes a plurality of spaced blades for precisely locating the photon beam, with each blade comprised of chemical vapor deposition (CVD) diamond with an outer metal coating of a photon sensitive metal such as tungsten, molybdenum, etc., which combination emits electrons when a high energy photon beam is incident upon the blade. Two such monitors are contemplated for use in the front end of the beamline, with the two monitors having vertically and horizontally offset detector blades to avoid blade ''shadowing''. Provision is made for aligning the detector blades with the photon beam and limiting detector blade temperature during operation. 18 figs.

The GBT-SCA, a radiation tolerant ASIC for detector control and monitoring applications in HEP experiments

NASA Astrophysics Data System (ADS)

Caratelli, A.; Bonacini, S.; Kloukinas, K.; Marchioro, A.; Moreira, P.; De Oliveira, R.; Paillard, C.

2015-03-01

The future upgrades of the LHC experiments will increase the beam luminosity leading to a corresponding growth of the amounts of data to be treated by the data acquisition systems. To address these needs, the GBT (Giga-Bit Transceiver optical link [1,2]) architecture was developed to provide the simultaneous transfer of readout data, timing and trigger signals as well as slow control and monitoring data. The GBT-SCA ASIC, part of the GBT chip-set, has the purpose to distribute control and monitoring signals to the on-detector front-end electronics and perform monitoring operations of detector environmental parameters. In order to meet the requirements of different front-end ASICs used in the experiments, it provides various user-configurable interfaces capable to perform simultaneous operations. It is designed employing radiation tolerant design techniques to ensure robustness against SEUs and TID radiation effects and is implemented in a commercial 130 nm CMOS technology. This work presents the GBT-SCA architecture, the ASIC interfaces, the data transfer protocol, and its integration with the GBT optical link.

Search for New Physics in Top Quark Production and Upgrade of the CMS Hadron Calorimeter

DOE Office of Scientific and Technical Information (OSTI.GOV)

Yumiceva, Francisco

2016-10-07

Our goal is to measure precisely the properties of the heaviest subatomic particle ever discovered, the top quark. In the proton-proton collisions at the LHC, top quarks are produced copiously. The largest set of top quarks recorded by the CMS detector make it an ideal laboratory to measure properties such as its mass and the rate at which pair of top quarks are produced in association with energetic photons. Quantum electrodynamics, or QED, describes the emission of light by charged particles and is the most precise physics theory ever devised. Typically this means light emitted by electrons, but any chargedmore » particles will do, such as the top quark. Studies of the light-emitting properties of top quarks help us to refine our current theoretical predictions at the finest level, and provide additional tools to study in more detail the recently discovered Higgs boson particle. However, during this process, the studies may reveal interesting features not yet observed. Deviations from the standard predictions would be a strong sign of something entirely new. These new physics theories are motivated to answer the current big mysteries in the universe such as what is the nature of mass or what is dark matter. As the LHC increases the collision energy and its luminosity, the detectors need to be improved to cope with these high-luminosity scenarios. New sensors will be installed in the hadron calorimeter detectors along with new front and end electronics at the end of 2016. We are testing and calibrating the new front-end readout electronics that will allow us to have more options to reduce the noise on these detectors. In order to do this calibration, we have developed a system that can inject electric charge in the full range of the charge integrator chip, the QIE ASICs.« less

1. GENERAL VIEW SHOWING NORTHEAST END (FRONT) OF TRANSIT SHED, ...

Library of Congress Historic Buildings Survey, Historic Engineering Record, Historic Landscapes Survey

1. GENERAL VIEW SHOWING NORTHEAST END (FRONT) OF TRANSIT SHED, IN CONTEXT WITH LOADING YARD AND DERRICK, LOOKING WEST - Oakland Army Base, Transit Shed, East of Dunkirk Street & South of Burma Road, Oakland, Alameda County, CA

Radiation hard programmable delay line for LHCb calorimeter upgrade

NASA Astrophysics Data System (ADS)

Mauricio, J.; Gascón, D.; Vilasís, X.; Picatoste, E.; Machefert, F.; Lefrancois, J.; Duarte, O.; Beigbeder, C.

2014-01-01

This paper describes the implementation of a SPI-programmable clock delay chip based on a Delay Locked Loop (DLL) in order to shift the phase of the LHC clock (25 ns) in steps of 1ns, with less than 5 ps jitter and 23 ps of DNL. The delay lines will be integrated into ICECAL, the LHCb calorimeter front-end analog signal processing ASIC in the near future. The stringent noise requirements on the ASIC imply minimizing the noise contribution of digital components. This is accomplished by implementing the DLL in differential mode. To achieve the required radiation tolerance several techniques are applied: double guard rings between PMOS and NMOS transistors as well as glitch suppressors and TMR Registers. This 5.7 mm2 chip has been implemented in CMOS 0.35 μm technology.

A high-frequency transimpedance amplifier for CMOS integrated 2D CMUT array towards 3D ultrasound imaging.

PubMed

Huang, Xiwei; Cheong, Jia Hao; Cha, Hyouk-Kyu; Yu, Hongbin; Je, Minkyu; Yu, Hao

2013-01-01

One transimpedance amplifier based CMOS analog front-end (AFE) receiver is integrated with capacitive micromachined ultrasound transducers (CMUTs) towards high frequency 3D ultrasound imaging. Considering device specifications from CMUTs, the TIA is designed to amplify received signals from 17.5MHz to 52.5MHz with center frequency at 35MHz; and is fabricated in Global Foundry 0.18-µm 30-V high-voltage (HV) Bipolar/CMOS/DMOS (BCD) process. The measurement results show that the TIA with power-supply 6V can reach transimpedance gain of 61dBΩ and operating frequency from 17.5MHz to 100MHz. The measured input referred noise is 27.5pA/√Hz. Acoustic pulse-echo testing is conducted to demonstrate the receiving functionality of the designed 3D ultrasound imaging system.

VEGA: A low-power front-end ASIC for large area multi-linear X-ray silicon drift detectors: Design and experimental characterization

NASA Astrophysics Data System (ADS)

Ahangarianabhari, Mahdi; Macera, Daniele; Bertuccio, Giuseppe; Malcovati, Piero; Grassi, Marco

2015-01-01

We present the design and the first experimental characterization of VEGA, an Application Specific Integrated Circuit (ASIC) designed to read out large area monolithic linear Silicon Drift Detectors (SDD's). VEGA consists of an analog and a digital/mixed-signal section to accomplish all the functionalities and specifications required for high resolution X-ray spectroscopy in the energy range between 500 eV and 50 keV. The analog section includes a charge sensitive preamplifier, a shaper with 3-bit digitally selectable shaping times from 1.6 μs to 6.6 μs and a peak stretcher/sample-and-hold stage. The digital/mixed-signal section includes an amplitude discriminator with coarse and fine threshold level setting, a peak discriminator and a logic circuit to fulfill pile-up rejection, signal sampling, trigger generation, channel reset and the preamplifier and discriminators disabling functionalities. A Serial Peripherical Interface (SPI) is integrated in VEGA for loading and storing all configuration parameters in an internal register within few microseconds. The VEGA ASIC has been designed and manufactured in 0.35 μm CMOS mixed-signal technology in single and 32 channel versions with dimensions of 200 μm×500 μm per channel. A minimum intrinsic Equivalent Noise Charge (ENC) of 12 electrons r.m.s. at 3.6 μs peaking time and room temperature is measured and the linearity error is between -0.9% and +0.6% in the whole input energy range. The total power consumption is 481 μW and 420 μW per channel for the single and 32 channels version, respectively. A comparison with other ASICs for X-ray SDD's shows that VEGA has a suitable low noise and offers high functionality as ADC-ready signal processing but at a power consumption that is a factor of four lower than other similar existing ASICs.

CNES developments of key detection technologies to prepare next generation focal planes for high resolution Earth observation

NASA Astrophysics Data System (ADS)

Materne, A.; Virmontois, C.; Bardoux, A.; Gimenez, T.; Biffi, J. M.; Laubier, D.; Delvit, J. M.

2014-10-01

This paper describes the activities managed by CNES (French National Space Agency) for the development of focal planes for next generation of optical high resolution Earth observation satellites, in low sun-synchronous orbit. CNES has launched a new programme named OTOS, to increase the level of readiness (TRL) of several key technologies for high resolution Earth observation satellites. The OTOS programme includes several actions in the field of detection and focal planes: a new generation of CCD and CMOS image sensors, updated analog front-end electronics and analog-to-digital converters. The main features that must be achieved on focal planes for high resolution Earth Observation, are: readout speed, signal to noise ratio at low light level, anti-blooming efficiency, geometric stability, MTF and line of sight stability. The next steps targeted are presented in comparison to the in-flight measured performance of the PLEIADES satellites launched in 2011 and 2012. The high resolution panchromatic channel is still based upon Backside illuminated (BSI) CCDs operated in Time Delay Integration (TDI). For the multispectral channel, the main evolution consists in moving to TDI mode and the competition is open with the concurrent development of a CCD solution versus a CMOS solution. New CCDs will be based upon several process blocks under evaluation on the e2v 6 inches BSI wafer manufacturing line. The OTOS strategy for CMOS image sensors investigates on one hand custom TDI solutions within a similar approach to CCDs, and, on the other hand, investigates ways to take advantage of existing performance of off-the-shelf 2D arrays CMOS image sensors. We present the characterization results obtained from test vehicles designed for custom TDI operation on several CIS technologies and results obtained before and after radiation on snapshot 2D arrays from the CMOSIS CMV family.

The readout electronics for Plastic Scintillator Detector of DAMPE

NASA Astrophysics Data System (ADS)

Kong, Jie; Yang, Haibo; Zhao, Hongyun; Su, Hong; Sun, Zhiyu; Yu, Yuhong; JingZhe, Zhang; Wang, XiaoHui; Liu, Jie; Xiao, Guoqing; Ma, Xinwen

2016-07-01

The Dark Matter Particle Explorer (DAMPE) satellite, which launched in December 2015, is designed to find the evidence of the existence of dark matter particles in the universe via the detection of the high-energy electrons and gamma-ray particles produced possibly by the annihilation of dark matter particles. Plastic Scintillator Detector (PSD) is one of major part of the satellite payload, which is comprised of a crossed pair of layers with 41 plastic scintillator-strips, each read out from both ends by the same Hamamatsu R4443MOD2 photo-multiplier tubes (PMTs). In order to extend linear dynamic range of detector, PMTs read out each plastic scintillator-strip separately with two dynode pickoffs. Therefore, the readout electronics system comprises of four Front-end boards to receive the pulses from 328 PMTs and implement charge measurement, which is based on the Application Specific Integrated Circuit (ASIC) chip VA160, 16 bits ADC and FPGA. The electronics of the detector has been designed following stringent requirements on mechanical and thermal stability, power consumption, radiation hardness and double redundancy. Various experiments are designed and implemented to check the performance of the electronics, some excellent results has been achieved.According to experimental results analysis, it is proved that the readout electronics works well.

OPeNDAP Server4: Buidling a High-Performance Server for the DAP by Leveraging Existing Software

NASA Astrophysics Data System (ADS)

Potter, N.; West, P.; Gallagher, J.; Garcia, J.; Fox, P.

2006-12-01

OPeNDAP has been working in conjunction with NCAR/ESSL/HAO to develop a modular, high performance data server that will be the successor to the current OPeNDAP data server. The new server, called Server4, is really two servers: A 'Back-End' data server which reads information from various types of data sources and packages the results in DAP objects; and A 'Front-End' which receives client DAP request and then decides how use features of the Back-End data server to build the correct responses. This architecture can be configured in several interesting ways: The Front- and Back-End components can be run on either the same or different machines, depending on security and performance needs, new Front-End software can be written to support other network data access protocols and local applications can interact directly with the Back-End data server. This new server's Back-End component will use the server infrastructure developed by HAO for use with the Earth System Grid II project. Extensions needed to use it as part of the new OPeNDAP server were minimal. The HAO server was modified so that it loads 'data handlers' at run-time. Each data handler module only needs to satisfy a simple interface which both enabled the existing data handlers written for the old OPeNDAP server to be directly used and also simplifies writing new handlers from scratch. The Back-End server leverages high- performance features developed for the ESG II project, so applications that can interact with it directly can read large volumes of data efficiently. The Front-End module of Server4 uses the Java Servlet system in place of the Common Gateway Interface (CGI) used in the past. New front-end modules can be written to support different network data access protocols, so that same server will ultimately be able to support more than the DAP/2.0 protocol. As an example, we will discuss a SOAP interface that's currently in development. In addition to support for DAP/2.0 and prototypical support for a SOAP interface, the new server includes support for the THREDDS cataloging protocol. THREDDS is tightly integrated into the Front-End of Server4. The Server4 Front-End can make full use of the advanced THREDDS features such as attribute specification and inheritance, custom catalogs which segue into automatically generated catalogs as well as providing a default behavior which requires almost no catalog configuration.

The 150 ns detector project: Prototype preamplifier results

NASA Astrophysics Data System (ADS)

Warburton, W. K.; Russell, S. R.; Kleinfelder, Stuart A.

1994-08-01

The long-term goal of the 150 ns detector project is to develop a pixel area detector capable of 6 MHz frame rates (150 ns/frame). Our milestones toward this goal are: a single pixel, 1×256 1D and 8×8 2D detectors, 256×256 2D detectors and, finally, 1024 × 1024 2D detectors. The design strategy is to supply a complete electronics chain (resetting preamp, selectable gain amplifier, analog-to-digital converter (ADC), and memory) for each pixel. In the final detectors these will all be custom integrated circuits. The front-end preamplifiers are integrated first, since their design and performance are the most unusual and also critical to the project's success. Similarly, our early work is concentrated on devising and perfecting detector structures. In this paper we demonstrate the performance of prototypes of our integrated preamplifiers. While the final design will have 64 preamps to a chip, including a switchable gain stage, the prototypes were integrated 8 channels to a "Tiny Chip" and tested in 4 configurations (feedback capacitor Cf equal 2.5 or 4.0 pF, output directly or through a source follower). These devices have been tested thoroughly for reset settling times, gain, linearity, and electronic noise. They generally work as designed, being fast enough to easily integrate detector charge, settle, and reset in 150 ns. Gain and linearity appear to be acceptable. Current values of electronic noise, in double-sampling mode, are about twice the design goal of {2}/{3} of a single photon at 6 keV. We expect this figure to improve with the addition of the onboard amplifier stage and improved packaging. Our next test chip will include these improvements and allow testing with our first detector samples, which will be 1×256 (50 μm wide pixels) and 8×8 (1 mm 2 pixels) element detector on 1 mm thick silicon.

DOE Office of Scientific and Technical Information (OSTI.GOV)

Evans, David Edward

A description of the development of the mc_runjob software package used to manage large scale computing tasks for the D0 Experiment at Fermilab is presented, along with a review of the Digital Front End Trigger electronics and the software used to control them. A tracking study is performed on detector data to determine that the D0 Experiment can detect charged B mesons, and that these results are in accordance with current results. B mesons are found by searching for the decay channel B ± → J / Ψ K ± .

High Resolution Imager (HRI) for the Roentgen Satellite (ROSAT) definition study

NASA Technical Reports Server (NTRS)

1983-01-01

The design of the high resolution imager (HRI) on HEAO 2 was modified for use in the instrument complement of the Roentgen Satellite (ROSAT). Mechanical models of the front end assembly, central electronics assembly, and detector assembly were used to accurately represent the HRI envelope for both fit checks and focal plane configuration studies. The mechanical and electrical interfaces were defined and the requirements for electrical ground support equipment were established. A summary description of the ROSAT telescope and mission is included.

Natural Language Processor as a Universal Front End to Expert Systems.

DTIC Science & Technology

1983-12-01

EGaschnig 19791 4.1.7 ESCA SPECTRA INTERPRETER, ESCA (Electron Spectroscopy for Chemical Analysis) is ~ an expert system which directly processes...then used as input to the ESCA Interpreter program. The 0 program, like that of CRYSALIS, is intended to be used by and expert in the field of chemical ...expect to be there. For example, in the DENDRAL 0 chemical analysis system[Handbook of AI], chemical names such as benzene and methanol, must form part of

Design and analysis of the cryoharness for Planck LFI

NASA Astrophysics Data System (ADS)

Leutenegger, Paolo H.; Bersanelli, Marco; Ferretti, Roberto; Prina, Mauro

2003-10-01

Planck is the third Medium-Sized Mission (M3) of ESA Horizon 2000 Scientific Programme. It is designed to image the anisotropies of the Cosmic Background Radiation Field over the whole sky, with unprecedented sensitivity and angular resolution. Planck carries two main experiments named HFI (High Frequency Instrument) and LFI (Low Frequency Instrument). The first is based on bolometers, the latter is an array of tuned radio receivers, based on High Electron Mobility Transistors (HEMTs) amplifier technology, and covering the frequency range from 30 to 70 GHz. The Front-End Electronics Modules (FEM"s) are cooled at 20K by a H2 sorption cooler. The high frequency signals (up to 70 GHz) are amplified, phase lagged and transported by means of waveguides to the warm back-end electronics at temperatures of the order of 300K. The 20 K cooling is achieved exploiting a two-stage cooling concept. The satellite is passively cooled to temperatures of the order of 60K using special designed radiators called V-grooves. An H2 sorption cooler constitutes the second active cooling stage, which allows focal plane temperatures of 20K, i.e. compatible with the tight noise requirements of the Low Noise Amplifiers (LNA"s). Each FEM needs 22 bias lines characterised by a high immunity to external noise and disturbances. The power required for each FEM ranges from 16 to 34mW, depending on the radiometer frequency. Due to the limited cooling power of the sorption cooler (about 2W), the heat transport through the harness and therefore the parasitics on the focal plane, shall be minimised. A total of 290 wires have to be routed from the warm electronics (300K) to the cold focal plane (20K), along a path of about 2200mm, transporting currents ranging from a few uA up to 240mA. The present paper analyses the thermal and electrical problems connected with the design of a suitable cryo-harness for the bias of the radiometers cryogenic front-end modules of LFI. Two possible approaches are proposed, and a solution presented.

4. Photocopy of measured drawing dated January, 1948 FRONT ELEVATION ...

Library of Congress Historic Buildings Survey, Historic Engineering Record, Historic Landscapes Survey

4. Photocopy of measured drawing dated January, 1948 FRONT ELEVATION An addendum to Hanson-Cramer House, Sea Street, south end, Rockport, Knox County, Maine - Hanson-Cramer House, End of Sea Street (moved from Pascal's Avenue), Rockport, Knox County, ME

Align the Front End First.

ERIC Educational Resources Information Center

Perry, Jim

1995-01-01

Discussion of management styles and front-end analysis focuses on a review of Douglas McGregor's theories. Topics include Theories X, Y, and Z; leadership skills; motivational needs of employees; intrinsic and extrinsic rewards; and faulty implementation of instructional systems design processes. (LRW)

The Giga Bit Transceiver based Expandable Front-End (GEFE)—a new radiation tolerant acquisition system for beam instrumentation

NASA Astrophysics Data System (ADS)

Barros Marin, M.; Boccardi, A.; Donat Godichal, C.; Gonzalez, J. L.; Lefevre, T.; Levens, T.; Szuk, B.

2016-02-01

The Giga Bit Transceiver based Expandable Front-End (GEFE) is a multi-purpose FPGA-based radiation tolerant card. It is foreseen to be the new standard FMC carrier for digital front-end applications in the CERN BE-BI group. Its intended use ranges from fast data acquisition systems to slow control installed close to the beamlines, in a radioactive environment exposed to total ionizing doses of up to 750 Gy. This paper introduces the architecture of the GEFE, its features as well as examples of its application in different setups.

An area and power-efficient analog li-ion battery charger circuit.

PubMed

Do Valle, Bruno; Wentz, Christian T; Sarpeshkar, Rahul

2011-04-01

The demand for greater battery life in low-power consumer electronics and implantable medical devices presents a need for improved energy efficiency in the management of small rechargeable cells. This paper describes an ultra-compact analog lithium-ion (Li-ion) battery charger with high energy efficiency. The charger presented here utilizes the tanh basis function of a subthreshold operational transconductance amplifier to smoothly transition between constant-current and constant-voltage charging regimes without the need for additional area- and power-consuming control circuitry. Current-domain circuitry for end-of-charge detection negates the need for precision-sense resistors in either the charging path or control loop. We show theoretically and experimentally that the low-frequency pole-zero nature of most battery impedances leads to inherent stability of the analog control loop. The circuit was fabricated in an AMI 0.5-μm complementary metal-oxide semiconductor process, and achieves 89.7% average power efficiency and an end voltage accuracy of 99.9% relative to the desired target 4.2 V, while consuming 0.16 mm(2) of chip area. To date and to the best of our knowledge, this design represents the most area-efficient and most energy-efficient battery charger circuit reported in the literature.

Dynamic stabilization of Rayleigh-Taylor instability: Experiments with Newtonian fluids as surrogates for ablation fronts

DOE Office of Scientific and Technical Information (OSTI.GOV)

Rodriguez Prieto, G.; Piriz, A. R.; Lopez Cela, J. J.

2013-01-15

A previous theory on dynamic stabilization of Rayleigh-Taylor instability at interfaces between Newtonian fluids is reformulated in order to make evident the analogy of this problem with the related one on dynamic stabilization of ablation fronts in the framework of inertial confinement fusion. Explicit analytical expressions are obtained for the boundaries of the dynamically stable region which turns out to be completely analogue to the stability charts obtained for the case of ablation fronts. These results allow proposing experiments with Newtonian fluids as surrogates for studying the case of ablation fronts. Experiments with Newtonian fluids are presented which demonstrate themore » validity of the theoretical approach and encourage to pursue experimental research on ablation fronts to settle the feasibility of dynamic stabilization in the inertial confinement fusion scenario.« less

Maneuvering impact boring head

DOEpatents

Zollinger, W. Thor; Reutzel, Edward W.

1998-01-01

An impact boring head may comprise a main body having an internal cavity with a front end and a rear end. A striker having a head end and a tail end is slidably mounted in the internal cavity of the main body so that the striker can be reciprocated between a forward position and an aft position in response to hydraulic pressure. A compressible gas contained in the internal cavity between the head end of the striker and the front end of the internal cavity returns the striker to the aft position upon removal of the hydraulic pressure.

A front-end readout mixed chip for high-efficiency small animal PET imaging

NASA Astrophysics Data System (ADS)

Ollivier-Henry, N.; Berst, J. D.; Colledani, C.; Hu-Guo, Ch.; Mbow, N. A.; Staub, D.; Guyonnet, J. L.; Hu, Y.

2007-02-01

Today, the main challenge of Positron Emission Tomography (PET) systems dedicated to small animal imaging is to obtain high detection efficiency and a highly accurate localization of radioisotopes. If we focus only on the PET characteristics such as the spatial resolution, its accuracy depends on the design of detector and on the electronics readout system as well. In this paper, we present a new design of such readout system with full custom submicrometer CMOS implementation. The front end chip consists of two main blocks from which the energy information and the time stamp with subnanosecond resolution can be obtained. In our A Multi-Modality Imaging System for Small Animal (AMISSA) PET system design, a matrix of LYSO crystals has to be read at each end by a 64 channels multianode photomultiplier tube. A specific readout electronic has been developed at the Hubert Curien Multidisciplinary Institute (IPHC, France). The architecture of this readout for the energy information detection is composed of a low-noise preamplifier, a CR-RC shaper and an analogue memory. In order to obtain the required dynamic range from 15 to 650 photoelectrons with good linearity, a current mode approach has been chosen for the preamplifier. To detect the signal with a temporal resolution of 1 ns, a comparator with a very low threshold (˜0.3 photoelectron) has been implemented. It gives the time reference of arrival signal coming from the detector. In order to obtain the time coincidence with a temporal resolution of 1 ns, a Time-to-Digital Converter (TDC) based on a Delay-Locked-Loop (DLL) has been designed. The chip is fabricated with AMS 0.35 μm process. The ASIC architecture and some simulation results will be presented in the paper.

User Consultation during the Fuzzy Front End: Evaluating Student's Design Outcomes

ERIC Educational Resources Information Center

Conradie, Peter; De Marez, Lieven; Saldien, Jelle

2017-01-01

In this paper we evaluate the involvement of a partially blind user as lead user in the early stages of a product redesign during an undergraduate product design-engineering course. Throughout the early stages of product design, or fuzzy front end, there is a high level of uncertainty. End users, with their increased contextual knowledge can play…

Wearable dry sensors with bluetooth connection for use in remote patient monitoring systems.

PubMed

Gargiulo, Gaetano; Bifulco, Paolo; Cesarelli, Mario; Jin, Craig; McEwan, Alistair; van Schaik, Andre

2010-01-01

Cost reduction has become the primary theme of healthcare reforms globally. More providers are moving towards remote patient monitoring, which reduces the length of hospital stays and frees up their physicians and nurses for acute cases and helps them to tackle staff shortages. Physiological sensors are commonly used in many human specialties e.g. electrocardiogram (ECG) electrodes, for monitoring heart signals, and electroencephalogram (EEG) electrodes, for sensing the electrical activity of the brain, are the most well-known applications. Consequently there is a substantial unmet need for physiological sensors that can be simply and easily applied by the patient or primary carer, are comfortable to wear, can accurately sense parameters over long periods of time and can be connected to data recording systems using Bluetooth technology. We have developed a small, battery powered, user customizable portable monitor. This prototype is capable of recording three-axial body acceleration, skin temperature, and has up to four bio analogical front ends. Moreover, it is also able of continuous wireless transmission to any Bluetooth device including a PDA or a cellular phone. The bio-front end can use long-lasting dry electrodes or novel textile electrodes that can be embedded in clothes. The device can be powered by a standard mobile phone which has a Ni-MH 3.6 V battery, to sustain more than seven days continuous functioning when using the Bluetooth Sniff mode to reduce TX power. In this paper, we present some of the evaluation experiments of our wearable personal monitor device with a focus on ECG applications.

Integrated Arrays on Silicon at Terahertz Frequencies

NASA Technical Reports Server (NTRS)

Chattopadhayay, Goutam; Lee, Choonsup; Jung, Cecil; Lin, Robert; Peralta, Alessandro; Mehdi, Imran; Llombert, Nuria; Thomas, Bertrand

2011-01-01

In this paper we explore various receiver font-end and antenna architecture for use in integrated arrays at terahertz frequencies. Development of wafer-level integrated terahertz receiver front-end by using advanced semiconductor fabrication technologies and use of novel integrated antennas with silicon micromachining are reported. We report novel stacking of micromachined silicon wafers which allows for the 3-dimensional integration of various terahertz receiver components in extremely small packages which easily leads to the development of 2- dimensioanl multi-pixel receiver front-ends in the terahertz frequency range. We also report an integrated micro-lens antenna that goes with the silicon micro-machined front-end. The micro-lens antenna is fed by a waveguide that excites a silicon lens antenna through a leaky-wave or electromagnetic band gap (EBG) resonant cavity. We utilized advanced semiconductor nanofabrication techniques to design, fabricate, and demonstrate a super-compact, low-mass submillimeter-wave heterodyne frontend. When the micro-lens antenna is integrated with the receiver front-end we will be able to assemble integrated heterodyne array receivers for various applications such as multi-pixel high resolution spectrometer and imaging radar at terahertz frequencies.

Design and development progress of a LLRF control system for a 500 MHz superconducting cavity

NASA Astrophysics Data System (ADS)

Lee, Y. S.; Kim, H. W.; Song, H. S.; Lee, J. H.; Park, K. H.; Yu, I. H.; Chai, J. S.

2012-07-01

The LLRF (low-level radio-frequency) control system which regulates the amplitude and the phase of the accelerating voltage inside a RF cavity is essential to ensure the stable operation of charged particle accelerators. Recent advances in digital signal processors and data acquisition systems have allowed the LLRF control system to be implemented in digitally and have made it possible to meet the higher demands associated with the performance of LLRF control systems, such as stability, accuracy, etc. For this reason, many accelerator laboratories have completed or are completing the developments of digital LLRF control systems. The digital LLRF control system has advantages related with flexibility and fast reconfiguration. This paper describes the design of the FPGA (field programmable gate array) based LLRF control system and the status of development for this system. The proposed LLRF control system includes an analog front-end, a digital board (ADC (analog to digital converter), DAC (digital to analog converter), FPGA, etc.) and a RF & clock generation system. The control algorithms will be implemented by using the VHDL (VHSIC (very high speed integrated circuits) hardware description language), and the EPICS (experiment physics and industrial control system) will be ported to the host computer for the communication. In addition, the purpose of this system is to control a 500 MHz RF cavity, so the system will be applied to the superconducting cavity to be installed in the PLS storage ring, and its performance will be tested.

Low complexity feature extraction for classification of harmonic signals

NASA Astrophysics Data System (ADS)

William, Peter E.

In this dissertation, feature extraction algorithms have been developed for extraction of characteristic features from harmonic signals. The common theme for all developed algorithms is the simplicity in generating a significant set of features directly from the time domain harmonic signal. The features are a time domain representation of the composite, yet sparse, harmonic signature in the spectral domain. The algorithms are adequate for low-power unattended sensors which perform sensing, feature extraction, and classification in a standalone scenario. The first algorithm generates the characteristic features using only the duration between successive zero-crossing intervals. The second algorithm estimates the harmonics' amplitudes of the harmonic structure employing a simplified least squares method without the need to estimate the true harmonic parameters of the source signal. The third algorithm, resulting from a collaborative effort with Daniel White at the DSP Lab, University of Nebraska-Lincoln, presents an analog front end approach that utilizes a multichannel analog projection and integration to extract the sparse spectral features from the analog time domain signal. Classification is performed using a multilayer feedforward neural network. Evaluation of the proposed feature extraction algorithms for classification through the processing of several acoustic and vibration data sets (including military vehicles and rotating electric machines) with comparison to spectral features shows that, for harmonic signals, time domain features are simpler to extract and provide equivalent or improved reliability over the spectral features in both the detection probabilities and false alarm rate.

An analog front-end bipolar-transistor integrated circuit for the SDC silicon tracker

NASA Astrophysics Data System (ADS)

Kipnis, I.; Spieler, H.; Collins, T.

1994-08-01

A low-noise, low-power, high-bandwidth, radiation hard, silicon bipolar-transistor full-custom integrated circuit (IC) containing 64 channels of analog signal processing has been developed for the SDC silicon tracker The IC was designed and tested at LBL and was fabricated using AT&T's CBIC-U2, 4 GHz f/sub /spl tau// complementary bipolar technology. Each channel contains the following functions: low-noise preamplification, pulse shaping and threshold discrimination. This is the first iteration of the production analog IC for the SDC silicon tracker. The IC is laid out to directly match the 50 /spl mu/m pitch double-sided silicon strip detector. The chip measures 6.8 mm/spl times/3.1 mm and contains 3,600 transistors. Three stages of amplification provide 180 mV/fC of gain with a 35 nsec peaking time at the comparator input. For a 14 pF detector capacitance, the equivalent noise charge is 1300 el. RMS at a power consumption of 1 mW/channel from a single 3.5 V supply. With the discriminator threshold set to 4 times the noise level, a 16 nsec time-walk for 1.25 to 10 fC signals is achieved using a time-walk compensation network. Irradiation tests at TRIUMF to a /spl Phi/=10/sup 14/ protons/cm/sup 2/ have been performed on the IC, demonstrating the radiation hardness of the complementary bipolar process.

Front-End/Gateway Software: Availability and Usefulness.

ERIC Educational Resources Information Center

Kesselman, Martin

1985-01-01

Reviews features of front-end software packages (interface between user and online system)--database selection, search strategy development, saving and downloading, hardware and software requirements, training and documentation, online systems and database accession, and costs--and discusses gateway services (user searches through intermediary…

1. VIEW OF NORTHEAST FRONT (GABLE END) FROM THORNE AVENUE, ...

Library of Congress Historic Buildings Survey, Historic Engineering Record, Historic Landscapes Survey

1. VIEW OF NORTHEAST FRONT (GABLE END) FROM THORNE AVENUE, FACING NORTHWEST. (BUILDINGS 114 AND 118 ARE VISIBLE IN THE BACKGROUND.) - Fort McPherson, World War II Station Hospital, G. U. Treatment Unit Dispensary, Thorne Avenue, Atlanta, Fulton County, GA

1. 185/189D in center, north end west facades (190D front ...

Library of Congress Historic Buildings Survey, Historic Engineering Record, Historic Landscapes Survey

1. 185/189-D in center, north end west facades (190-D front left and west facade; 195-D rear right). Looking south. - D-Reactor Complex, Deaeration Plant-Refrigeration Buildings, Area 100-D, Richland, Benton County, WA

Development of multi-layer crystal detector and related front end electronics

NASA Astrophysics Data System (ADS)

Cardarelli, R.; Di Ciaccio, A.; Paolozzi, L.

2014-05-01

A crystal (diamond) particle detector has been developed and tested, whose constitute elements are a multi-layer polycrystalline diamond and a pick-up system capable of collecting in parallel the charge produced in the layers. The charge is read with a charge-to-voltage amplifier (5-6 mV/fC) realized with bipolar junction transistors in order to minimize the effect of the detector capacitance. The tests performed with cosmic rays and at the beam test facility of Frascati with 500 MeV electrons in single electron mode operation have shown that a detector with 4-5 layers of 250 μm thickness each and 9 mm2 active area exhibits an upper limit of 150 ps time resolution for minimum ionizing particles at an operating voltage of about 350 V.

NASA Tech Briefs, August 2007

NASA Technical Reports Server (NTRS)

2007-01-01

Topics include: Program Merges SAR Data on Terrain and Vegetation Heights; Using G(exp 4)FETs as a Data Router for In-Plane Crossing of Signal Paths; Two Algorithms for Processing Electronic Nose Data; Radiation-Tolerant Dual Data Bus; General-Purpose Front End for Real-Time Data Processing; Nanocomposite Photoelectrochemical Cells; Ultracapacitor-Powered Cordless Drill, Cumulative Timers for Microprocessors; Photocatalytic/Magnetic Composite Particles; Separation and Sealing of a Sample Container Using Brazing; Automated Aerial Refueling Hitches a Ride on AFF; Cobra Probes Containing Replaceable Thermocouples; High-Speed Noninvasive Eye-Tracking System; Detergent-Specific Membrane Protein Crystallization Screens; Evaporation-Cooled Protective Suits for Firefighters; Plasmonic Antenna Coupling for QWIPs; Electronic Tongue Containing Redox and Conductivity Sensors; Improved Heat-Stress Algorithm; A Method of Partly Automated Testing of Software; Rover Wheel-Actuated Tool Interface; and Second-Generation Electronic Nose.

Collective Thomson scattering of a high power electron cyclotron resonance heating beam in LHD (invited).

PubMed

Kubo, S; Nishiura, M; Tanaka, K; Shimozuma, T; Yoshimura, Y; Igami, H; Takahash, H; Mutoh, T; Tamura, N; Tatematsu, Y; Saito, T; Notake, T; Korsholm, S B; Meo, F; Nielsen, S K; Salewski, M; Stejner, M

2010-10-01

Collective Thomson scattering (CTS) system has been constructed at LHD making use of the high power electron cyclotron resonance heating (ECRH) system in Large Helical Device (LHD). The necessary features for CTS, high power probing beams and receiving beams, both with well defined Gaussian profile and with the fine controllability, are endowed in the ECRH system. The 32 channel radiometer with sharp notch filter at the front end is attached to the ECRH system transmission line as a CTS receiver. The validation of the CTS signal is performed by scanning the scattering volume. A new method to separate the CTS signal from background electron cyclotron emission is developed and applied to derive the bulk and high energy ion components for several combinations of neutral beam heated plasmas.

Public Understanding of Science through Evaluations

NASA Astrophysics Data System (ADS)

Dusenbery, P.; Koke, J.

Evaluation is an integral part of exhibition development. It is usually a 3-phase process: front end, formative and summative. This report will compare science misconception studies of students with a number of front-end museum studies in order to elucidate the similarities and differences between student and general public understanding of science. The Space Science Institute (SSI) has recently conducted a major front-end evaluation of its Alien Earths exhibition. Alien Earths has four interrelated exhibit areas: Our Place in Space, Star Birth, PlanetQuest, and Search for Life. Exhibit visitors will explore the awesome events surrounding the birth of stars and planets; they will join scientists in the hunt for planets outside our solar system including those that may be in ``habitable zones'' around other stars; and finally they will be able to learn about the wide range of conditions for life on Earth and how scientists are looking for signs of life beyond Earth. The front-end evaluation elicited visitors' beliefs about the origins of life, what life is dominant on Earth, and the role indirect evidence plays in science. The front-end evaluation also examined visitors' understanding of the tools used in origins research from grand telescopes to microscopes, their ability to decipher and interpret images of star forming regions, and their fluency with the specific terminology likely to be used in the Alien Earths scripts. Front-end evaluation worked to support concept design and development by developing the visitors' entrance narrative -- their pre-existing knowledge, commonly held misconceptions, and their attitudes and interests towards the topic. This served to identify potential points of access and barriers to efficient communication.

A low-power CMOS operational amplifier IC for a heterogeneous paper-based potentiostat

NASA Astrophysics Data System (ADS)

Bezuidenhout, P.; Land, K.; Joubert, T.-H.

2016-02-01

Electrochemical biosensing is used to detect specific analytes in fluids, such as bacterial and chemical contaminants. A common implementation of an electrochemical readout is a potentiostat, which usually includes potentiometric, amperometric, and impedimetric detection. Recently several researchers have developed small, low-cost, single-chip silicon-based potentiostats. With the advances in heterogeneous integration technology, low-power potentiostats can be implemented on paper and similar low cost substrates. This paper deals with the design of a low-power paper-based amperometric front-end for a low-cost and rapid detection environment. In amperometric detection a voltage signal is provided to a sensor system, while a small current value generated by an electrochemical redox reaction in the system is measured. In order to measure low current values, the noise of the circuit must be minimized, which is accomplished with a pre-amplification front-end stage, typically designed around an operational amplifier core. An appropriate circuit design for a low-power and low-cost amperometric front-end is identified, taking the heterogeneous integration of various components into account. The operational amplifier core is on a bare custom CMOS chip, which will be integrated onto the paper substrate alongside commercial off-the-shelf electronic components. A general-purpose low-power two-stage CMOS amplifier circuit is designed and simulated for the ams 350 nm 5 V process. After the layout design and verification, the IC was submitted for a multi-project wafer manufacturing run. The simulated results are a bandwidth of 2.4 MHz, a common-mode rejection ratio of 70.04 dB, and power dissipation of 0.154 mW, which are comparable with the analytical values.

Modelling the Deformation Front of a Fold-Thrust Belt: the Effect of an Upper Detachment Horizon

NASA Astrophysics Data System (ADS)

Burberry, C. M.; Koyi, H.; Nilfouroushan, F.; Cosgrove, J. W.

2008-12-01

Structures found at the deformation fronts of fold-thrust belts are variable in type, geometry and spatial organisation, as can be demonstrated from comparisons between structures in the Zagros Fold-Thrust Belt, Iran and the Sawtooth Range, Montana. A range of influencing factors has been suggested to account for this variation, including the mechanical properties and distribution of any detachment horizons within the cover rock succession. A series of analogue models was designed to test this hypothesis, under conditions scaled to represent the Sawtooth Range, Montana. A brittle sand pack, containing an upper ductile layer with variable geometry, was shortened above a ductile base and the evolution of the deformation front was monitored throughout the deformation using a high-accuracy laser scanner. In none of the experiments did the upper detachment horizon cover the entire model. In experiments where it pinched out perpendicular to the shortening direction, a triangle zone was formed when the deformation front reached the pinch out. This situation is analogous to the Teton Canyon region structures in the Sawtooth Range, Montana, where the Cretaceous Colorado Shale unit pinches out at the deformation front, favouring the development of a triangle zone in this region. When the pinch out was oblique to the shortening direction, a more complex series of structures was formed. However, when shortening stopped before the detachment pinch out was reached, the deformation front structures were foreland-propagating and no triangle zone was observed. This situation is analogous to foreland-propagating thrust structures developed at the deformation front in the Swift Dam region of the Sawtooth Range, Montana and to the development of fault-bend folds at the deformation front of the Zagros Fold-Thrust Belt, Iran. We suggest that the presence of a suitable intermediate detachment horizon within a sediment pile can be invoked as a valid explanation for the development of varied deformation front structures in fold-thrust belts. Specifically, the spatial extent of the upper detachment horizon with respect to the spatial extent of the deformed region is a key influence on the development of deformation front structures. However, we acknowledge that factors such as basement structure and variable sedimentation within the foreland basin may also be key influences on deformation front structures in other fold-thrust belts.

A novel pulse height analysis technique for nuclear spectroscopic and imaging systems

NASA Astrophysics Data System (ADS)

Tseng, H. H.; Wang, C. Y.; Chou, H. P.

2005-08-01

The proposed pulse height analysis technique is based on the constant and linear relationship between pulse width and pulse height generated from front-end electronics of nuclear spectroscopic and imaging systems. The present technique has successfully implemented into the sump water radiation monitoring system in a nuclear power plant. The radiation monitoring system uses a NaI(Tl) scintillator to detect radioactive nuclides of Radon daughters brought down by rain. The technique is also used for a nuclear medical imaging system. The system uses a position sensitive photomultiplier tube coupled with a scintillator. The proposed techniques has greatly simplified the electronic design and made the system a feasible one for potable applications.

SYRMEP front-end and read-out electronics

NASA Astrophysics Data System (ADS)

Arfelli, F.; Bonvicini, V.; Bravin, A.; Cantatore, G.; Castelli, E.; Cristaudo, P.; Di Michiel, M.; Longo, R.; Olivo, A.; Pani, S.; Pontoni, D.; Poropat, P.; Prest, M.; Rashevsky, A.; Tomasini, F.; Tromba, G.; Vacchi, A.; Vallazza, E.

1998-02-01

The SYRMEP approach to digital mammography implies the use of a monochromatic X-ray beam from a synchrotron source and a slot of superimposed silicon microstrip detectors as a scanning image receptor. The microstrips are read by 32-channel chips mounted on 7-layer hybrid circuits which receive control signals and operating voltages from a MASTER-SLAVE configuration of cards. The MASTER card is driven by the CIRM, a dedicated CAMAC module whose timing function can be easily excluded to obtain data-storage-only units connected to different MASTERs: this second-level modular expansion capability fully achieves the tasks of an electronics system able to follow the SYRMEP detector growth till the final size of seven thousands of channels.

Tracking the NOvA Detectors' Performance

NASA Astrophysics Data System (ADS)

Psihas, Fernanda; NOvA Collaboration

2016-03-01

The NOvA experiment measures long baseline νμ -->νe oscillations in Fermilab's NuMI beam. We employ two detectors equipped with over 10 thousand sets of data-taking electronics; avalanche photo diodes and front end boards which collect and process the scintillation signal from particle interactions within the detectors. These sets of electronics -as well as the systems which power and cool them- must be monitored and maintained at precise working conditions to ensure maximal data-taking uptime, good data quality and a lasting life for our detectors. This poster describes the automated systems used on NOvA to simultaneously monitor our data quality, diagnose hardware issues, track our performance and coordinate maintenance for the detectors.

KM3NeT tower data acquisition and data transport electronics

NASA Astrophysics Data System (ADS)

Nicolau, C. A.; Ameli, F.; Biagioni, A.; Capone, A.; Frezza, O.; Lonardo, A.; Masullo, R.; Mollo, C. M.; Orlando, A.; Simeone, F.; Vicini, P.

2016-04-01

In the framework of the KM3Net European project, the production stage of a large volume underwater neutrino telescope has started. The forthcoming installation includes 8 towers and 24 strings, that will be installed 100 km off-shore Capo Passero (Italy) at 3500 m depth. The KM3NeT tower, whose layout is strongly based on the NEMO Phase-2 prototype tower deployed in March 2013, has been re-engineered and partially re-designed in order to optimize production costs, power consumption, and usability. This contribution gives a description of the main electronics, including front-end, data transport and clock distribution system, of the KM3NeT tower detection unit.

Limitations on energy resolution of segmented silicon detectors

NASA Astrophysics Data System (ADS)

Wiącek, P.; Chudyba, M.; Fiutowski, T.; Dąbrowski, W.

2018-04-01

In the paper experimental study of charge division effects and energy resolution of X-ray silicon pad detectors are presented. The measurements of electrical parameters, capacitances and leakage currents, for six different layouts of pad arrays are reported. The X-ray spectra have been measured using a custom developed dedicated low noise front-end electronics. The spectra measured for six different detector layouts have been analysed in detail with particular emphasis on quantitative evaluation of charge division effects. Main components of the energy resolution due to Fano fluctuations, electronic noise, and charge division, have been estimated for six different sensor layouts. General recommendations regarding optimisation of pad sensor layout for achieving best possible energy resolution have been formulated.

Modeling of an 8-12 GHz receiver front-end based on an in-line MEMS frequency discriminator

NASA Astrophysics Data System (ADS)

Chu, Chenlei; Liao, Xiaoping

2018-06-01

This paper focuses on the modeling of an 8-12 GHz RF (radio frequency) receiver front-end based on an in-line MEMS (microelectromechanical systems) frequency discriminator. Actually, the frequency detection is realized by measuring the output dc thermal voltage generated by the MEMS thermoelectric power sensor. Based on this thermal voltage, it has a great potential to tune the resonant frequency of the VCO (voltage controlled oscillator) in the RF receiver front-end application. The equivalent circuit model of the in-line frequency discriminator is established and the measurement verification is also implemented. Measurement and simulation results show that the output dc thermal voltage has a nearly linear relation with frequency. A new construction of RF receiver front-end is then obtained by connecting the in-line frequency discriminator with the voltage controlling port of VCO. Lastly, a systemic simulation is processed by computer-aided software and the real-time simulation waveform at each key point is observed clearly.

Multi sensor satellite imagers for commercial remote sensing

NASA Astrophysics Data System (ADS)

Cronje, T.; Burger, H.; Du Plessis, J.; Du Toit, J. F.; Marais, L.; Strumpfer, F.

2005-10-01

This paper will discuss and compare recent refractive and catodioptric imager designs developed and manufactured at SunSpace for Multi Sensor Satellite Imagers with Panchromatic, Multi-spectral, Area and Hyperspectral sensors on a single Focal Plane Array (FPA). These satellite optical systems were designed with applications to monitor food supplies, crop yield and disaster monitoring in mind. The aim of these imagers is to achieve medium to high resolution (2.5m to 15m) spatial sampling, wide swaths (up to 45km) and noise equivalent reflectance (NER) values of less than 0.5%. State-of-the-art FPA designs are discussed and address the choice of detectors to achieve these performances. Special attention is given to thermal robustness and compactness, the use of folding prisms to place multiple detectors in a large FPA and a specially developed process to customize the spectral selection with the need to minimize mass, power and cost. A refractive imager with up to 6 spectral bands (6.25m GSD) and a catodioptric imager with panchromatic (2.7m GSD), multi-spectral (6 bands, 4.6m GSD), hyperspectral (400nm to 2.35μm, 200 bands, 15m GSD) sensors on the same FPA will be discussed. Both of these imagers are also equipped with real time video view finding capabilities. The electronic units could be subdivided into the Front-End Electronics and Control Electronics with analogue and digital signal processing. A dedicated Analogue Front-End is used for Correlated Double Sampling (CDS), black level correction, variable gain and up to 12-bit digitizing and high speed LVDS data link to a mass memory unit.

Implementation of a level 1 trigger system using high speed serial (VXS) techniques for the 12GeV high luminosity experimental programs at Thomas Jefferson National Accelerator Facility

DOE Office of Scientific and Technical Information (OSTI.GOV)

C. Cuevas, B. Raydo, H. Dong, A. Gupta, F.J. Barbosa, J. Wilson, W.M. Taylor, E. Jastrzembski, D. Abbott

We will demonstrate a hardware and firmware solution for a complete fully pipelined multi-crate trigger system that takes advantage of the elegant high speed VXS serial extensions for VME. This trigger system includes three sections starting with the front end crate trigger processor (CTP), a global Sub-System Processor (SSP) and a Trigger Supervisor that manages the timing, synchronization and front end event readout. Within a front end crate, trigger information is gathered from each 16 Channel, 12 bit Flash ADC module at 4 nS intervals via the VXS backplane, to a Crate Trigger Processor (CTP). Each Crate Trigger Processor receivesmore » these 500 MB/S VXS links from the 16 FADC-250 modules, aligns skewed data inherent of Aurora protocol, and performs real time crate level trigger algorithms. The algorithm results are encoded using a Reed-Solomon technique and transmission of this Level 1 trigger data is sent to the SSP using a multi-fiber link. The multi-fiber link achieves an aggregate trigger data transfer rate to the global trigger at 8 Gb/s. The SSP receives and decodes Reed-Solomon error correcting transmission from each crate, aligns the data, and performs the global level trigger algorithms. The entire trigger system is synchronous and operates at 250 MHz with the Trigger Supervisor managing not only the front end event readout, but also the distribution of the critical timing clocks, synchronization signals, and the global trigger signals to each front end readout crate. These signals are distributed to the front end crates on a separate fiber link and each crate is synchronized using a unique encoding scheme to guarantee that each front end crate is synchronous with a fixed latency, independent of the distance between each crate. The overall trigger signal latency is <3 uS, and the proposed 12GeV experiments at Jefferson Lab require up to 200KHz Level 1 trigger rate.« less

The Discourse on Printed and Electronic Books: Analogies, Oppositions, and Perspectives

ERIC Educational Resources Information Center

Velagic, Zoran

2014-01-01

Introduction: The point of departure for this paper is the twofold analogy (analogy of content, analogy of medium) between printed and electronic books, the aim being to draw attention to the usual perception of their capacities and relationships, to provide a rather detailed analysis of the outcome and sustainability of such analogies and…

Radiometric Calibration Techniques for Signal-of-Opportunity Reflectometers

NASA Technical Reports Server (NTRS)

Piepmeier, Jeffrey R.; Shah, Rashmi; Deshpande, Manohar; Johnson, Carey

2014-01-01

Bi-static reflection measurements utilizing global navigation satellite service (GNSS) or other signals of opportunity (SoOp) can be used to sense ocean and terrestrial surface properties. End-to-end calibration of GNSS-R has been performed using well-characterized reflection surface (e.g., water), direct path antenna, and receiver gain characterization. We propose an augmented approach using on-board receiver electronics for radiometric calibration of SoOp reflectometers utilizing direct and reflected signal receiving antennas. The method calibrates receiver and correlator gains and offsets utilizing a reference switch and common noise source. On-board electronic calibration sources, such as reference switches, noise diodes and loop-back circuits, have shown great utility in stabilizing total power and correlation microwave radiometer and scatterometer receiver electronics in L-band spaceborne instruments. Application to SoOp instruments is likely to bring several benefits. For example, application to provide short and long time scale calibration stability of the direct path channel, especially in low signal-to-noise ratio configurations, is directly analogous to the microwave radiometer problem. The direct path channel is analogous to the loopback path in a scatterometer to provide a reference of the transmitted power, although the receiver is independent from the reflected path channel. Thus, a common noise source can be used to measure the gain ratio of the two paths. Using these techniques long-term (days to weeks) calibration stability of spaceborne L-band scatterometer and radiometer has been achieved better than 0.1. Similar long-term stability would likely be needed for a spaceborne reflectometer mission to measure terrestrial properties such as soil moisture.

A multitasking, multisinked, multiprocessor data acquisition front end

DOE Office of Scientific and Technical Information (OSTI.GOV)

Fox, R.; Au, R.; Molen, A.V.

1989-10-01

The authors have developed a generalized data acquisition front end system which is based on MC68020 processors running a commercial real time kernel (rhoSOS), and implemented primarily in a high level language (C). This system has been attached to the back end on-line computing system at NSCL via our high performance ETHERNET protocol. Data may be simultaneously sent to any number of back end systems. Fixed fraction sampling along links to back end computing is also supported. A nonprocedural program generator simplifies the development of experiment specific code.

Maneuvering impact boring head

DOE Office of Scientific and Technical Information (OSTI.GOV)

Zollinger, W.T.; Reutzel, E.W.

An impact boring head may comprise a main body having an internal cavity with a front end and a rear end. A striker having a head end and a tail end is slidably mounted in the internal cavity of the main body so that the striker can be reciprocated between a forward position and an aft position in response to hydraulic pressure. A compressible gas contained in the internal cavity between the head end of the striker and the front end of the internal cavity returns the striker to the aft position upon removal of the hydraulic pressure. 8 figs.

Maneuvering impact boring head

DOEpatents

Zollinger, W.T.; Reutzel, E.W.

1998-08-18

An impact boring head may comprise a main body having an internal cavity with a front end and a rear end. A striker having a head end and a tail end is slidably mounted in the internal cavity of the main body so that the striker can be reciprocated between a forward position and an aft position in response to hydraulic pressure. A compressible gas contained in the internal cavity between the head end of the striker and the front end of the internal cavity returns the striker to the aft position upon removal of the hydraulic pressure. 8 figs.

Advancements in DEPMOSFET device developments for XEUS

NASA Astrophysics Data System (ADS)

Treis, J.; Bombelli, L.; Eckart, R.; Fiorini, C.; Fischer, P.; Hälker, O.; Herrmann, S.; Lechner, P.; Lutz, G.; Peric, I.; Porro, M.; Richter, R. H.; Schaller, G.; Schopper, F.; Soltau, H.; Strüder, L.; Wölfel, S.

2006-06-01

DEPMOSFET based Active Pixel Sensor (APS) matrices are a new detector concept for X-ray imaging spectroscopy missions. They can cope with the challenging requirements of the XEUS Wide Field Imager and combine excellent energy resolution, high speed readout and low power consumption with the attractive feature of random accessibility of pixels. From the evaluation of first prototypes, new concepts have been developed to overcome the minor drawbacks and problems encountered for the older devices. The new devices will have a pixel size of 75 μm × 75 μm. Besides 64 × 64 pixel arrays, prototypes with a sizes of 256 × 256 pixels and 128 × 512 pixels and an active area of about 3.6 cm2 will be produced, a milestone on the way towards the fully grown XEUS WFI device. The production of these improved devices is currently on the way. At the same time, the development of the next generation of front-end electronics has been started, which will permit to operate the sensor devices with the readout speed required by XEUS. Here, a summary of the DEPFET capabilities, the concept of the sensors of the next generation and the new front-end electronics will be given. Additionally, prospects of new device developments using the DEPFET as a sensitive element are shown, e.g. so-called RNDR-pixels, which feature repetitive non-destructive readout to lower the readout noise below the 1 e - ENC limit.

A precise clock distribution network for MRPC-based experiments

NASA Astrophysics Data System (ADS)

Wang, S.; Cao, P.; Shang, L.; An, Q.

2016-06-01

In high energy physics experiments, the MRPC (Multi-Gap Resistive Plate Chamber) detectors are widely used recently which can provide higher-resolution measurement for particle identification. However, the application of MRPC detectors leads to a series of challenges in electronics design with large number of front-end electronic channels, especially for distributing clock precisely. To deal with these challenges, this paper presents a universal scheme of clock transmission network for MRPC-based experiments with advantages of both precise clock distribution and global command synchronization. For precise clock distributing, the clock network is designed into a tree architecture with two stages: the first one has a point-to-multipoint long range bidirectional distribution with optical channels and the second one has a fan-out structure with copper link inside readout crates. To guarantee the precision of clock frequency or phase, the r-PTP (reduced Precision Time Protocol) and the DDMTD (digital Dual Mixer Time Difference) methods are used for frequency synthesis, phase measurement and adjustment, which is implemented by FPGA (Field Programmable Gate Array) in real-time. In addition, to synchronize global command execution, based upon this clock distribution network, synchronous signals are coded with clock for transmission. With technique of encoding/decoding and clock data recovery, signals such as global triggers or system control commands, can be distributed to all front-end channels synchronously, which greatly simplifies the system design. The experimental results show that both the clock jitter (RMS) and the clock skew can be less than 100 ps.

Front-End Electron Transfer Dissociation Coupled to a 21 Tesla FT-ICR Mass Spectrometer for Intact Protein Sequence Analysis

NASA Astrophysics Data System (ADS)

Weisbrod, Chad R.; Kaiser, Nathan K.; Syka, John E. P.; Early, Lee; Mullen, Christopher; Dunyach, Jean-Jacques; English, A. Michelle; Anderson, Lissa C.; Blakney, Greg T.; Shabanowitz, Jeffrey; Hendrickson, Christopher L.; Marshall, Alan G.; Hunt, Donald F.

2017-09-01

High resolution mass spectrometry is a key technology for in-depth protein characterization. High-field Fourier transform ion cyclotron resonance mass spectrometry (FT-ICR MS) enables high-level interrogation of intact proteins in the most detail to date. However, an appropriate complement of fragmentation technologies must be paired with FTMS to provide comprehensive sequence coverage, as well as characterization of sequence variants, and post-translational modifications. Here we describe the integration of front-end electron transfer dissociation (FETD) with a custom-built 21 tesla FT-ICR mass spectrometer, which yields unprecedented sequence coverage for proteins ranging from 2.8 to 29 kDa, without the need for extensive spectral averaging (e.g., 60% sequence coverage for apo-myoglobin with four averaged acquisitions). The system is equipped with a multipole storage device separate from the ETD reaction device, which allows accumulation of multiple ETD fragment ion fills. Consequently, an optimally large product ion population is accumulated prior to transfer to the ICR cell for mass analysis, which improves mass spectral signal-to-noise ratio, dynamic range, and scan rate. We find a linear relationship between protein molecular weight and minimum number of ETD reaction fills to achieve optimum sequence coverage, thereby enabling more efficient use of instrument data acquisition time. Finally, real-time scaling of the number of ETD reactions fills during method-based acquisition is shown, and the implications for LC-MS/MS top-down analysis are discussed. [Figure not available: see fulltext.

Depth Of Modulation And Spot Size Selection In Bar-Code Laser Scanners

NASA Astrophysics Data System (ADS)

Barkan, Eric; Swartz, Jerome

1982-04-01

Many optical and electronic considerations enter into the selection of optical spot size in flying spot laser scanners of the type used in modern industrial and commerical environments. These include: the scale of the symbols to be read, optical background noise present in the symbol substrate, and factors relating to the characteristics of the signal processor. Many 'front ends' consist of a linear signal conditioner followed by nonlinear conditioning and digitizing circuitry. Although the nonlinear portions of the circuit can be difficult to characterize mathematically, it is frequently possible to at least give a minimum depth of modulation measure to yield a worst-case guarantee of adequate performance with respect to digitization accuracy. Depth of modulation actually delivered to the nonlinear circuitry will depend on scale, contrast, and noise content of the scanned symbol, as well as the characteristics of the linear conditioning circuitry (eg. transfer function and electronic noise). Time and frequency domain techniques are applied in order to estimate the effects of these factors in selecting a spot size for a given system environment. Results obtained include estimates of the effects of the linear front end transfer function on effective spot size and asymmetries which can affect digitization accuracy. Plots of convolution-computed modulation patterns and other important system properties are presented. Considerations are limited primarily to Gaussian spot profiles but also apply to more general cases. Attention is paid to realistic symbol models and to implications with respect to printing tolerances.

FRED, a Front End for Databases.

ERIC Educational Resources Information Center

Crystal, Maurice I.; Jakobson, Gabriel E.

1982-01-01

FRED (a Front End for Databases) was conceived to alleviate data access difficulties posed by the heterogeneous nature of online databases. A hardware/software layer interposed between users and databases, it consists of three subsystems: user-interface, database-interface, and knowledge base. Architectural alternatives for this database machine…

29. Interior view, south end of the west (front) wall ...

Library of Congress Historic Buildings Survey, Historic Engineering Record, Historic Landscapes Survey

29. Interior view, south end of the west (front) wall looking at the section between the door and southwestern corner, with scale (note remnants of the post-1915 fire plaster on wall) - Kiskiack, Naval Mine Depot, State Route 238 vicinity, Yorktown, York County, VA

Femtosecond laser-induced structural difference in fused silica with a non-reciprocal writing process

NASA Astrophysics Data System (ADS)

Song, Hui; Dai, Ye; Song, Juan; Ma, Hongliang; Yan, Xiaona; Ma, Guohong

2017-04-01

In this paper, we report a non-reciprocal writing process for inducing asymmetric microstructure using a femtosecond laser with tilted pulse fronts in fused silica. The shape of the induced microstructure at the focus closely depends on the laser scan direction. An elongated end is observed as a kind of structural difference between the written lines with two reverse scans along + x and - x, which further leads to a birefringence intensity difference. We also find a bifurcation in the head region of the induced microstructure between the written lines along x and y. That process results from the focal intensity distortion caused by the pulse front tilt by comparing the simulated intensity distribution with the experimental results. The current results demonstrate that the pulse front tilt not only affects the free electron excitation at the focus but also further distorts the shape of the induced microstructure during a high-energy femtosecond laser irradiation. These results offer a route to fabricate optical elements by changing the spatiotemporal characteristics of ultrashort pulses.

High-gain thompson-scattering X-ray free-electron laser by time-synchronic laterally tilted optical wave

DOEpatents

Chang, Chao; Tang, Chuanxiang; Wu, Juhao

2017-05-09

An improved optical undulator for use in connection with free electron radiation sources is provided. A tilt is introduced between phase fronts of an optical pulse and the pulse front. Two such pulses in a counter-propagating geometry overlap to create a standing wave pattern. A line focus is used to increase the intensity of this standing wave pattern. An electron beam is aligned with the line focus. The relative angle between pulse front and phase fronts is adjusted such that there is a velocity match between the electron beam and the overlapping optical pulses along the line focus. This allows one to provide a long interaction length using short and intense optical pulses, thereby greatly increasing the radiation output from the electron beam as it passes through this optical undulator.

Recent advancements in system design for miniaturized MEMS-based laser projectors

NASA Astrophysics Data System (ADS)

Scholles, M.; Frommhagen, K.; Gerwig, Ch.; Knobbe, J.; Lakner, H.; Schlebusch, D.; Schwarzenberg, M.; Vogel, U.

2008-02-01

Laser projection systems that use the flying spot principle and which are based on a single MEMS micro scanning mirrors are a very promising way to build ultra-compact projectors that may fit into mobile devices. First demonstrators that show the feasibility of this approach and the applicability of the micro scanning mirror developed by Fraunhofer IPMS for these systems have already been presented. However, a number of items still have to be resolved until miniaturized laser projectors are ready for the market. This contribution describes progress on several different items, each of them of major importance for laser projection systems. First of all, the overall performance of the system has been increased from VGA resolution to SVGA (800×600 pixels) with easy connection to a PC via DVI interface or by using the projector as embedded system with direct camera interface. Secondly, the degree of integration of the electronics has been enhanced by design of an application specific analog front end IC for the micro scanning mirror. It has been fabricated in a special high voltage technology and does not only allow to generate driving signals for the scanning mirror with amplitudes of up to 200V but also integrates position detection of the mirror by several methods. Thirdly, first results concerning Speckle reduction have been achieved, which is necessary for generation of images with high quality. Other aspects include laser modulation and solutions regarding projection on tilted screens which is possible because of the unlimited depth of focus.

Cryogenic readout techniques for germanium detectors

DOE Office of Scientific and Technical Information (OSTI.GOV)

Benato, G.; Cattadori, C.; Di Vacri, A.

High Purity Germanium detectors are used in many applications, from nuclear and astro-particle physics, to homeland security or environment protection. Although quite standard configurations are often used, with cryostats, charge sensitive amplifiers and analog or digital acquisition systems all commercially available, it might be the case that a few specific applications, e.g. satellites, portable devices, cryogenic physics experiments, etc. also require the development of a few additional or complementary techniques. An interesting case is for sure GERDA, the Germanium Detector Array experiment, searching for neutrino-less double beta decay of {sup 76}Ge at the Gran Sasso National Laboratory of INFN -more » Italy. In GERDA the entire detector array, composed of semi-coaxial and BEGe naked crystals, is operated suspended inside a cryostat filled with liquid argon, that acts not only as cooling medium and but also as an active shield, thanks to its scintillation properties. These peculiar circumstances, together with the additional requirement of a very low radioactive background from all the materials adjacent to the detectors, clearly introduce significant constraints on the design of the Ge front-end readout electronics. All the Ge readout solutions developed within the framework of the GERDA collaboration, for both Phase I and Phase II, will be briefly reviewed, with their relative strength and weakness compared together and with respect to ideal Ge readout. Finally, the digital processing techniques developed by the GERDA collaboration for energy estimation of Ge detector signals will be recalled. (authors)« less

The performance of the ZEUS central tracking detector z-by-timing electronics in a transputer based data acquisition system

NASA Astrophysics Data System (ADS)

Foster, B.; Heath, G. P.; Llewellyn, T. J.; Gingrich, D. M.; Harnew, N.; Hallam-Baker, P. M.; Khatri, T.; McArthur, I. C.; Morawitz, P.; Nash, J.; Shield, P. D.; Topp-Jorgensen, S.; Wilson, F. F.; Allen, D. B.; Carter, R. C.; Jeffs, M. D.; Morrissey, M. C.; Quinton, S. P. H.; Lane, J. B.; Postranecky, M.

1993-05-01

The Central Tracking Detector of the ZEUS experiment employs a time difference technique to measure the z coordinate of each hit. The method provides fast, three-dimensional space point measurements which are used as input to all levels of the ZEUS trigger. Such a tracking trigger is essential in order to discriminate against events with vertices lying outside the nominal electron-proton interaction region. Since the beam crossing interval of the HERA collider is 96 ns, all data must be pipelined through the front-end readout electronics. Subsequent data aquisition employs a novel technique which utilizes a network of approximately 120 INMOS transputers to process the data in parallel. The z-by-timing method and its data aquisition have been employed successfully in recording and reconstructing tracks from electron-proton interactions in ZEUS.

Handheld readout electronics to fully exploit the particle discrimination capabilities of elpasolite scintillators

DOE PAGES

Budden, B. S.; Stonehill, L. C.; Warniment, A.; ...

2015-06-10

In this study, a new class of elpasolite scintillators has garnered recent attention due to the ability to perform as simultaneous gamma spectrometers and thermal neutron detectors. Such a dual-mode capability is made possible by pulse-shape discrimination (PSD), whereby the emission waveform profiles of gamma and neutron events are fundamentally unique. To take full advantage of these materials, we have developed the Compact Advanced Readout Electronics for Elpasolites (CAREE). This handheld instrument employs a multi-channel PSD-capable ASIC, custom micro-processor board, front-end electronics, power supplies, and a 2 in. photomultiplier tube for readout of the scintillator. The unit is highly configurablemore » to allow for performance optimization amongst a wide sample of elpasolites which provide PSD in fundamentally different ways. We herein provide an introduction to elpasolites, then describe the motivation for the work, mechanical and electronic design, and preliminary performance results.« less

Central Drift Chamber for Belle-II

NASA Astrophysics Data System (ADS)

Taniguchi, N.

2017-06-01

The Central Drift Chamber (CDC) is the main device for tracking and identification of charged particles for Belle-II experiment. The Belle-II CDC is cylindrical wire chamber with 14336 sense wires, 2.3 m-length and 2.2 m-diameter. The wire chamber and readout electronics have been completely replaced from the Belle CDC. The new readout electronics system must handle higher trigger rate of 30 kHz with less dead time at the design luminosity of 8 × 1035 cm-2s-1. The front-end electronics are located close to detector and send digitized signal through optical fibers. The Amp-Shaper-Discriminator chips, FADC and FPGA are assembled on a single board. Belle-II CDC with readout electronics has been installed successfully in Belle structure in October 2016. We will present overview of the Belle-II CDC and status of commissioning with cosmic ray.

Handheld readout electronics to fully exploit the particle discrimination capabilities of elpasolite scintillators

NASA Astrophysics Data System (ADS)

Budden, B. S.; Stonehill, L. C.; Warniment, A.; Michel, J.; Storms, S.; Dallmann, N.; Coupland, D. D. S.; Stein, P.; Weller, S.; Borges, L.; Proicou, M.; Duran, G.; Kamto, J.

2015-09-01

A new class of elpasolite scintillators has garnered recent attention due to the ability to perform as simultaneous gamma spectrometers and thermal neutron detectors. Such a dual-mode capability is made possible by pulse-shape discrimination (PSD), whereby the emission waveform profiles of gamma and neutron events are fundamentally unique. To take full advantage of these materials, we have developed the Compact Advanced Readout Electronics for Elpasolites (CAREE). This handheld instrument employs a multi-channel PSD-capable ASIC, custom micro-processor board, front-end electronics, power supplies, and a 2 in. photomultiplier tube for readout of the scintillator. The unit is highly configurable to allow for performance optimization amongst a wide sample of elpasolites which provide PSD in fundamentally different ways. We herein provide an introduction to elpasolites, then describe the motivation for the work, mechanical and electronic design, and preliminary performance results.

Upgrading the ATLAS Tile Calorimeter Electronics

NASA Astrophysics Data System (ADS)

Carrió, Fernando

2013-11-01

This work summarizes the status of the on-detector and off-detector electronics developments for the Phase 2 Upgrade of the ATLAS Tile Calorimeter at the LHC scheduled around 2022. A demonstrator prototype for a slice of the calorimeter including most of the new electronics is planned to be installed in ATLAS in the middle of 2014 during the first Long Shutdown. For the on-detector readout, three different front-end boards (FEB) alternatives are being studied: a new version of the 3-in-1 card, the QIE chip and a dedicated ASIC called FATALIC. The Main Board will provide communication and control to the FEBs and the Daughter Board will transmit the digitized data to the off-detector electronics in the counting room, where the super Read-Out Driver (sROD) will perform processing tasks on them and will be the interface to the trigger levels 0, 1 and 2.

SPD very front end electronics

NASA Astrophysics Data System (ADS)

Luengo, S.; Gascón, D.; Comerma, A.; Garrido, L.; Riera, J.; Tortella, S.; Vilasís, X.

2006-11-01

The Scintillator Pad Detector (SPD) is part of the LHCb calorimetry system [D. Breton, The front-end electronics for LHCb calorimeters, Tenth International Conference on Calorimetry in Particle Physics, CALOR, Pasadena, 2002] that provides high-energy hadron, electron and photon candidates for the first level trigger. The SPD is designed to distinguish electrons from photons. It consists of a plastic scintillator layer, divided into about 6000 cells of different size to obtain better granularity near the beam [S. Amato, et al., LHCb technical design report, CERN/LHCC/2000-0036, 2000]. Charged particles will produce, and photons will not, ionization in the scintillator. This ionization generates a light pulse that is collected by a WaveLength Shifting (WLS) fiber that is coiled inside the scintillator cell. The light is transmitted through a clear fiber to the readout system that is placed at the periphery of the detector. Due to space constraints, and in order to reduce costs, these 6000 cells are divided in groups using a MAPMT [Z. Ajaltouni, et al., Nucl. Instr. and Meth. A 504 (2003) 9] of 64 channels that provides information to the VFE readout electronics. The SPD signal has rather large statistical fluctuations because of the low number (20-30) of photoelectrons per MIP. Therefore the signal is integrated over the whole bunch crossing length of 25 ns in order to have the maximum value. Since in average about 85% of the SPD signal is within 25 ns, 15% of a sample is subtracted from the following one using an operational amplifier. The SPD VFE readout system that will be presented consists of the following components. A specific ASIC [D. Gascon, et al., Discriminator ASIC for the VFE SPD of the LHCb Calorimeter, LHCB Technical Note, LHCB 2004-xx] integrates the signal, makes the signal-tail subtraction, and compares the level obtained to a programmable threshold (to distinguish electrons from photons). A FPGA programmes the ASIC threshold and the value for signal-tail subtraction. Finally, a LVDS serializer sends the information to the first level trigger system.