On-board processing for telecommunications satellites

NASA Technical Reports Server (NTRS)

Nuspl, P. P.; Dong, G.

1991-01-01

In this decade, communications satellite systems will probably face dramatic challenges from alternative transmission means. To balance and overcome such competition, and to prepare for new requirements, INTELSAT has developed several on-board processing techniques, including Satellite-Switched TDMA (SS-TDMA), Satellite-Switched FDMA (SS-FDMA), several Modulators/Demodulators (Modem), a Multicarrier Multiplexer and Demodulator MCDD), an International Business Service (IBS)/Intermediate Data Rate (IDR) BaseBand Processor (BBP), etc. Some proof-of-concept hardware and software were developed, and tested recently in the INTELSAT Technical Laboratories. These techniques and some test results are discussed.

Picoradio: Communication/Computation Piconodes for Sensor Networks

DTIC Science & Technology

2003-01-02

diagram of PicoNode III, or Quark node. It is made from two custom chips, Strange RF and Charm digital processor , and is complemented by a set of...the chipset comprising of Strange (analog OOK transceiver) and Charm (digital processor ) chips. 44 Figure 33: System block diagram of the Quark node...19 2.B PICONODE II - TWO-CHIP PICONODE IMPLEMENTATION ......................................... 21 2.B.1 Baseband processor (BBP

A TMS320-based modem for the aeronautical-satellite core data service

NASA Astrophysics Data System (ADS)

Moher, Michael L.; Lodge, John H.

The International Civil Aviation Organization (ICAO) Future Air Navigation Systems (FANS) committee, the Airlines Electronics Engineering Committee (AEEC), and Inmarsat have been developing standards for an aeronautical satellite communications service. These standards encompass a satellite communications system architecture to provide comprehensive aeronautical communications services. Incorporated into the architecture is a core service capability, providing only low rate data communications, which all service providers and all aircraft earth terminals are required to support. In this paper an implementation of the physical layer of this standard for the low data rate core service is described. This is a completely digital modem (up to a low intermediate frequency). The implementation uses a single TMS320C25 chip for the transmit baseband functions of scrambling, encoding, interleaving, block formatting and modulation. The receiver baseband unit uses a dual processor configuration to implement the functions of demodulation, synchronization, de-interleaving, decoding and de-scrambling. The hardware requirements, the software structure and the algorithms of this implementation are described.

Laboratory measurements of on-board subsystems

NASA Technical Reports Server (NTRS)

Nuspl, P. P.; Dong, G.; Seran, H. C.

1991-01-01

Good progress was achieved on the test bed for on-board subsystems for future satellites. The test bed is for subsystems developed previously. Four test setups were configured in the INTELSAT technical labs: (1) TDMA on-board modem; (2) multicarrier demultiplexer demodulator; (3) IBS/IDR baseband processor; and (4) baseband switch matrix. The first three series of tests are completed and the tests on the BSM are in progress. Descriptions of test setups and major test results are included; the format of the presentation is outlined.

Design of a robust baseband LPC coder for speech transmission over 9.6 kbit/s noisy channels

NASA Astrophysics Data System (ADS)

Viswanathan, V. R.; Russell, W. H.; Higgins, A. L.

1982-04-01

This paper describes the design of a baseband Linear Predictive Coder (LPC) which transmits speech over 9.6 kbit/sec synchronous channels with random bit errors of up to 1%. Presented are the results of our investigation of a number of aspects of the baseband LPC coder with the goal of maximizing the quality of the transmitted speech. Important among these aspects are: bandwidth of the baseband, coding of the baseband residual, high-frequency regeneration, and error protection of important transmission parameters. The paper discusses these and other issues, presents the results of speech-quality tests conducted during the various stages of optimization, and describes the details of the optimized speech coder. This optimized speech coding algorithm has been implemented as a real-time full-duplex system on an array processor. Informal listening tests of the real-time coder have shown that the coder produces good speech quality in the absence of channel bit errors and introduces only a slight degradation in quality for channel bit error rates of up to 1%.

Modeling of the ground-to-SSFMB link networking features using SPW

NASA Technical Reports Server (NTRS)

Watson, John C.

1993-01-01

This report describes the modeling and simulation of the networking features of the ground-to-Space Station Freedom manned base (SSFMB) link using COMDISCO signal processing work-system (SPW). The networking features modeled include the implementation of Consultative Committee for Space Data Systems (CCSDS) protocols in the multiplexing of digitized audio and core data into virtual channel data units (VCDU's) in the control center complex and the demultiplexing of VCDU's in the onboard baseband signal processor. The emphasis of this work has been placed on techniques for modeling the CCSDS networking features using SPW. The objectives for developing the SPW models are to test the suitability of SPW for modeling networking features and to develop SPW simulation models of the control center complex and space station baseband signal processor for use in end-to-end testing of the ground-to-SSFMB S-band single access forward (SSAF) link.

Experiments applications guide: Advanced Communications Technology Satellite (ACTS)

NASA Technical Reports Server (NTRS)

1988-01-01

This applications guide first surveys the capabilities of the Advanced Communication Technology Satellite (ACTS) system (both the flight and ground segments). This overview is followed by a description of the baseband processor (BBP) and microwave switch matrix (MSM) operating modes. Terminals operating with the baseband processor are referred to as low burst rate (LBR); and those operating with the microwave switch matrix, as high burst rate (HBR). Three very small-aperture terminals (VSATs), LBR-1, LBR-2, and HBR, are described for various ACTS operating modes. Also described is the NASA Lewis link evaluation terminal. A section on ACTS experiment opportunities introduces a wide spectrum of network control, telecommunications, system, and scientific experiments. The performance of the VSATs is discussed in detail. This guide is intended as a catalyst to encourage participation by the telecommunications, business, and science communities in a broad spectrum of experiments.

Flexible network wireless transceiver and flexible network telemetry transceiver

DOEpatents

Brown, Kenneth D.

2008-08-05

A transceiver for facilitating two-way wireless communication between a baseband application and other nodes in a wireless network, wherein the transceiver provides baseband communication networking and necessary configuration and control functions along with transmitter, receiver, and antenna functions to enable the wireless communication. More specifically, the transceiver provides a long-range wireless duplex communication node or channel between the baseband application, which is associated with a mobile or fixed space, air, water, or ground vehicle or other platform, and other nodes in the wireless network or grid. The transceiver broadly comprises a communication processor; a flexible telemetry transceiver including a receiver and a transmitter; a power conversion and regulation mechanism; a diplexer; and a phased array antenna system, wherein these various components and certain subcomponents thereof may be separately enclosed and distributable relative to the other components and subcomponents.

Software Defined GPS Receiver for International Space Station

NASA Technical Reports Server (NTRS)

Duncan, Courtney B.; Robison, David E.; Koelewyn, Cynthia Lee

2011-01-01

JPL is providing a software defined radio (SDR) that will fly on the International Space Station (ISS) as part of the CoNNeCT project under NASA's SCaN program. The SDR consists of several modules including a Baseband Processor Module (BPM) and a GPS Module (GPSM). The BPM executes applications (waveforms) consisting of software components for the embedded SPARC processor and logic for two Virtex II Field Programmable Gate Arrays (FPGAs) that operate on data received from the GPSM. GPS waveforms on the SDR are enabled by an L-Band antenna, low noise amplifier (LNA), and the GPSM that performs quadrature downconversion at L1, L2, and L5. The GPS waveform for the JPL SDR will acquire and track L1 C/A, L2C, and L5 GPS signals from a CoNNeCT platform on ISS, providing the best GPS-based positioning of ISS achieved to date, the first use of multiple frequency GPS on ISS, and potentially the first L5 signal tracking from space. The system will also enable various radiometric investigations on ISS such as local multipath or ISS dynamic behavior characterization. In following the software-defined model, this work will create a highly portable GPS software and firmware package that can be adapted to another platform with the necessary processor and FPGA capability. This paper also describes ISS applications for the JPL CoNNeCT SDR GPS waveform, possibilities for future global navigation satellite system (GNSS) tracking development, and the applicability of the waveform components to other space navigation applications.

47 CFR 73.322 - FM stereophonic sound transmission standards.

Code of Federal Regulations, 2014 CFR

2014-10-01

... transmission, modulation of the carrier by audio components within the baseband range of 50 Hz to 15 kHz shall... the carrier by audio components within the audio baseband range of 23 kHz to 99 kHz shall not exceed... method described in (a), must limit the modulation of the carrier by audio components within the audio...

47 CFR 73.322 - FM stereophonic sound transmission standards.

Code of Federal Regulations, 2013 CFR

2013-10-01

... transmission, modulation of the carrier by audio components within the baseband range of 50 Hz to 15 kHz shall... the carrier by audio components within the audio baseband range of 23 kHz to 99 kHz shall not exceed... method described in (a), must limit the modulation of the carrier by audio components within the audio...

47 CFR 73.322 - FM stereophonic sound transmission standards.

Code of Federal Regulations, 2011 CFR

2011-10-01

... transmission, modulation of the carrier by audio components within the baseband range of 50 Hz to 15 kHz shall... the carrier by audio components within the audio baseband range of 23 kHz to 99 kHz shall not exceed... method described in (a), must limit the modulation of the carrier by audio components within the audio...

47 CFR 73.322 - FM stereophonic sound transmission standards.

Code of Federal Regulations, 2012 CFR

2012-10-01

... transmission, modulation of the carrier by audio components within the baseband range of 50 Hz to 15 kHz shall... the carrier by audio components within the audio baseband range of 23 kHz to 99 kHz shall not exceed... method described in (a), must limit the modulation of the carrier by audio components within the audio...

FPGA implementation of digital down converter using CORDIC algorithm

NASA Astrophysics Data System (ADS)

Agarwal, Ashok; Lakshmi, Boppana

2013-01-01

In radio receivers, Digital Down Converters (DDC) are used to translate the signal from Intermediate Frequency level to baseband. It also decimates the oversampled signal to a lower sample rate, eliminating the need of a high end digital signal processors. In this paper we have implemented architecture for DDC employing CORDIC algorithm, which down converts an IF signal of 70MHz (3G) to 200 KHz baseband GSM signal, with an SFDR greater than 100dB. The implemented architecture reduces the hardware resource requirements by 15 percent when compared with other architecture available in the literature due to elimination of explicit multipliers and a quadrature phase shifter for mixing.

Second year technical report on-board processing for future satellite communications systems

NASA Technical Reports Server (NTRS)

Brandon, W. T.; Green, W. K.; Hoffman, M.; Jean, P. N.; Neal, W. R.; White, B. E.

1980-01-01

Advanced baseband and microwave switching techniques for large domestic communications satellites operating in the 30/20 GHz frequency bands are discussed. The nominal baseband processor throughput is one million packets per second (1.6 Gb/s) from one thousand T1 carrier rate customer premises terminals. A frequency reuse factor of sixteen is assumed by using 16 spot antenna beams with the same 100 MHz bandwidth per beam and a modulation with a one b/s per Hz bandwidth efficiency. Eight of the beams are fixed on major metropolitan areas and eight are scanning beams which periodically cover the remainder of the U.S. under dynamic control. User signals are regenerated (demodulated/remodulated) and message packages are reformatted on board. Frequency division multiple access and time division multiplex are employed on the uplinks and downlinks, respectively, for terminals within the coverage area and dwell interval of a scanning beam. Link establishment and packet routing protocols are defined. Also described is a detailed design of a separate 100 x 100 microwave switch capable of handling nonregenerated signals occupying the remaining 2.4 GHz bandwidth with 60 dB of isolation, at an estimated weight and power consumption of approximately 400 kg and 100 W, respectively.

Second year technical report on-board processing for future satellite communications systems

NASA Astrophysics Data System (ADS)

Brandon, W. T.; Green, W. K.; Hoffman, M.; Jean, P. N.; Neal, W. R.; White, B. E.

1980-10-01

Advanced baseband and microwave switching techniques for large domestic communications satellites operating in the 30/20 GHz frequency bands are discussed. The nominal baseband processor throughput is one million packets per second (1.6 Gb/s) from one thousand T1 carrier rate customer premises terminals. A frequency reuse factor of sixteen is assumed by using 16 spot antenna beams with the same 100 MHz bandwidth per beam and a modulation with a one b/s per Hz bandwidth efficiency. Eight of the beams are fixed on major metropolitan areas and eight are scanning beams which periodically cover the remainder of the U.S. under dynamic control. User signals are regenerated (demodulated/remodulated) and message packages are reformatted on board. Frequency division multiple access and time division multiplex are employed on the uplinks and downlinks, respectively, for terminals within the coverage area and dwell interval of a scanning beam. Link establishment and packet routing protocols are defined. Also described is a detailed design of a separate 100 x 100 microwave switch capable of handling nonregenerated signals occupying the remaining 2.4 GHz bandwidth with 60 dB of isolation, at an estimated weight and power consumption of approximately 400 kg and 100 W, respectively.

Earth Orbiter 1: Wideband Advanced Recorder and Processor (WARP)

NASA Technical Reports Server (NTRS)

Smith, Terry; Kessler, John

1999-01-01

An advanced on-board spacecraft data system component is presented. The component is computer-based and provides science data acquisition, processing, storage, and base-band transmission functions. Specifically, the component is a very high rate solid state recorder, serving as a pathfinder for achieving the data handling requirements of next-generation hyperspectral imaging missions.

Fiber-Bragg-Grating-Based Optical Code-Division Multiple Access Passive Optical Network Using Dual-Baseband Modulation Scheme

NASA Astrophysics Data System (ADS)

Lin, Wen-Piao; Wu, He-Long

2005-08-01

We propose a fiber-Bragg-grating (FBG)-based optical code-division multiple access passive optical network (OCDMA-PON) using a dual-baseband modulation scheme. A mathematical model is developed to study the performance of this scheme. According to the analyzed results, this scheme can allow a tolerance of the spectral power distortion (SPD) ratio of 25% with a bit error rate (BER) of 10-9 when the modified pseudorandom noise (PN) code length is 16. Moreover, we set up a simulated system to evaluate the baseband and radio frequency (RF) band transmission characteristics. The simulation results demonstrate that our proposed OCDMA-PON can provide a cost-effective and scalable fiber-to-the-home solution.

Hadfield and Marshburn during HRCS Ku Comm Unit 2 Installation

NASA Image and Video Library

2013-04-02

ISS035-E-013783 (2 April 2013) --- In the U.S. lab Destiny on the International Space Station, Expedition 35 Commander Chris Hadfield (right) and Flight Engineer Tom Marshburn remove the Video Baseband Signal Processor (VBSP) in order to replace it with a new Ku communication unit and its associated data and Ethernet cabling.

Hadfield and Marshburn during HRCS Ku Comm Unit 2 Installation

NASA Image and Video Library

2013-04-02

ISS035-E-013790 (2 April 2013) --- In the U.S. lab Destiny on the International Space Station, Expedition 35 Commander Chris Hadfield (background) and Flight Engineer Tom Marshburn remove the Video Baseband Signal Processor (VBSP) in order to replace it with a new Ku communication unit and its associated data and Ethernet cabling.

Ground Isolation Circuit for Isolating a Transmission Line from Ground Interference

NASA Technical Reports Server (NTRS)

Davidson, Craig A. (Inventor)

1996-01-01

This invention relates generally to a system for isolating ground interference from a transmission line, e.g., a ground isolation circuit for isolating a wideband transmission signal (such as a video signal) from ground by modulating the base signal on a carrier signal to permit the transmission signal to be isolated. In one embodiment, the circuit includes a pair of matched mixer circuits, each of which receives a carrier signal from the same oscillator circuit. The first mixer circuit also receives the baseband signal input, after appropriate conditioning, and modulates the baseband signal onto the carrier signal. In a preferred embodiment the carrier signal has a predetermined frequency which is at least two times the frequency of the baseband signal. The modulated signal (which can comprise an rf signal) is transmitted via an rf transmission line to the second mixer, which demodulates the rf signal to recover the baseband signal. Each port of the mixer connects to an isolation transformer to ensure isolation from ground interference. The circuit is considered to be of commercial value in that it can provide isolation between transmitting and receiving circuits, e.g., ground isolation for television circuits or high frequency transmitters, without the need for video transformers or optical isolators, thereby reducing the complexity, power consumption, and weight of the system.

System on a chip with MPEG-4 capability

NASA Astrophysics Data System (ADS)

Yassa, Fathy; Schonfeld, Dan

2002-12-01

Current products supporting video communication applications rely on existing computer architectures. RISC processors have been used successfully in numerous applications over several decades. DSP processors have become ubiquitous in signal processing and communication applications. Real-time applications such as speech processing in cellular telephony rely extensively on the computational power of these processors. Video processors designed to implement the computationally intensive codec operations have also been used to address the high demands of video communication applications (e.g., cable set-top boxes and DVDs). This paper presents an overview of a system-on-chip (SOC) architecture used for real-time video in wireless communication applications. The SOC specifications answer to the system requirements imposed by the application environment. A CAM-based video processor is used to accelerate data intensive video compression tasks such as motion estimations and filtering. Other components are dedicated to system level data processing and audio processing. A rich set of I/Os allows the SOC to communicate with other system components such as baseband and memory subsystems.

NASA 60 GHz intersatellite communication link definition study. Addendum A: Mixed baseband and IF signals

NASA Technical Reports Server (NTRS)

1986-01-01

As part of a definition study for a 60 GHz intersatellite communications link system (ICLS), baseline design concepts for a channelized crosslink were identified. The crosslink would allow communications between geostationary satellites of the planned Tracking and Data Acquisition System (TDAS) and would accommodate a mixture of frequency translation coherent links (bent pipe links) and baseband-in/baseband-out links (mod/demod links). A 60 GHz communication system was developed for sizing and analyzing the crosslink. For the coherent links this system translates incoming signals directly up to the 60 GHz band; trunks the signals across from one satellite to a second satellite at 60 GHz then down converts to the proper frequency for re-transmission from the second satellite without converting to any intermediate frequencies. For the baseband-in/baseband-out links the baseband data is modulated on to the 60 GHz carrier at the transmitting satellite and demodulated at the receiving satellite. The frequency plan, equipment diagrams, and link calculations are presented along with results from sizing and reliability analyses.

Digital tracking loops for a programmable digital modem

NASA Technical Reports Server (NTRS)

Poklemba, John J.

1992-01-01

In this paper, an analysis and hardware emulation of the tracking loops for a very flexible programmable digital modem (PDM) will be presented. The modem is capable of being programmed for 2, 4, 8, 16-PSK, 16-QAM, MSK, and Offset-QPSK modulation schemes over a range of data rates from 2.34 to 300 Mbps with programmable spectral occupancy from 1.2 to 1.8 times the symbol rate; these operational parameters are executable in burst or continuous mode. All of the critical processing in both the modulator and demodulator is done at baseband with very high-speed digital hardware and memory. Quadrature analog front-ends are used for translation between baseband and the IF center frequency. The modulator is based on a table lookup approach, where precomputed samples are stored in memory and clocked out according to the incoming data pattern. The sample values are predistorted to counteract the effects of the other filtering functions in the link as well as any transmission impairments. The demodulator architecture was adapted from a joint estimator-detector (JED) mathematical analysis. Its structure is applicable to most signalling formats that can be represented in a two-dimensional space. The JED realization uses interdependent, mutually aiding tracking loops with post-detection data feedback. To expedite and provide for more reliable synchronization, initial estimates for these loops are computed in a parallel acquisition processor. The cornerstone of the demodulator realization is the pre-averager received data filter which allows operation over a broad range of data rates without any hardware changes and greatly simplifies the implementation complexity. The emulation results confirmed tracking loop operation over the entire range of operational parameters listed above, as well as the capability of achieving and maintaining synchronization at BER's in excess of 10(exp -1). The emulation results also showed very close agreement with the tracking loop analysis, and validated the resolution apportionment of the various hardware elements in the tracking loops.

Development of a wideband pulse quaternary modulation system. [for an operational 400 Mbps baseband laser communication system

NASA Technical Reports Server (NTRS)

Federhofer, J. A.

1974-01-01

Laboratory data verifying the pulse quaternary modulation (PQM) theoretical predictions is presented. The first laboratory PQM laser communication system was successfully fabricated, integrated, tested and demonstrated. System bit error rate tests were performed and, in general, indicated approximately a 2 db degradation from the theoretically predicted results. These tests indicated that no gross errors were made in the initial theoretical analysis of PQM. The relative ease with which the entire PQM laboratory system was integrated and tested indicates that PQM is a viable candidate modulation scheme for an operational 400 Mbps baseband laser communication system.

MOBS - A modular on-board switching system

NASA Astrophysics Data System (ADS)

Berner, W.; Grassmann, W.; Piontek, M.

The authors describe a multibeam satellite system that is designed for business services and for communications at a high bit rate. The repeater is regenerative with a modular onboard switching system. It acts not only as baseband switch but also as the central node of the network, performing network control and protocol evaluation. The hardware is based on a modular bus/memory architecture with associated processors.

NASA Tech Briefs, December 2011

NASA Technical Reports Server (NTRS)

2011-01-01

Topics covered include: 1) SNE Industrial Fieldbus Interface; 2) Composite Thermal Switch; 3) XMOS XC-2 Development Board for Mechanical Control and Data Collection; 4) Receiver Gain Modulation Circuit; 5) NEXUS Scalable and Distributed Next-Generation Avionics Bus for Space Missions; 6) Digital Interface Board to Control Phase and Amplitude of Four Channels; 7) CoNNeCT Baseband Processor Module; 8) Cryogenic 160-GHz MMIC Heterodyne Receiver Module; 9) Ka-Band, Multi-Gigabit-Per-Second Transceiver; 10) All-Solid-State 2.45-to-2.78-THz Source; 11) Onboard Interferometric SAR Processor for the Ka-Band Radar Interferometer (KaRIn); 12) Space Environments Testbed; 13) High-Performance 3D Articulated Robot Display; 14) Athena; 15) In Situ Surface Characterization; 16) Ndarts; 17) Cryo-Etched Black Silicon for Use as Optical Black; 18) Advanced CO2 Removal and Reduction System; 19) Correcting Thermal Deformations in an Active Composite Reflector; 20) Umbilical Deployment Device; 21) Space Mirror Alignment System; 22) Thermionic Power Cell To Harness Heat Energies for Geothermal Applications; 23) Graph Theory Roots of Spatial Operators for Kinematics and Dynamics; 24) Spacesuit Soft Upper Torso Sizing Systems; 25) Radiation Protection Using Single-Wall Carbon Nanotube Derivatives; 26) PMA-PhyloChip DNA Microarray to Elucidate Viable Microbial Community Structure; 27) Lidar Luminance Quantizer; 28) Distributed Capacitive Sensor for Sample Mass Measurement; 29) Base Flow Model Validation; 30) Minimum Landing Error Powered-Descent Guidance for Planetary Missions; 31) Framework for Integrating Science Data Processing Algorithms Into Process Control Systems; 32) Time Synchronization and Distribution Mechanisms for Space Networks; 33) Local Estimators for Spacecraft Formation Flying; 34) Software-Defined Radio for Space-to-Space Communications; 35) Reflective Occultation Mask for Evaluation of Occulter Designs for Planet Finding; and 36) Molecular Adsorber Coating

UHF FM receiver having improved frequency stability and low RFI emission

DOEpatents

Lupinetti, Francesco

1990-02-27

A UHF receiver which converts UHF modulated carrier signals to baseband video signals without any heterodyne or frequency conversion stages. A bandpass filter having a fixed frequency first filters the signals. A low noise amplifier amplifies the filtered signal and applies the signal through further amplification stages to a limited FM demodulator circuit. The UHF signal is directly converted to a baseband video signal. The baseband video signal is clamped by a clamping circuit before driving a monitor. Frequency stability for the receivers is at a theoretical maximum, and interference to adjacent receivers is eliminated due to the absence of a local oscillator.

Vector rogue waves and baseband modulation instability in the defocusing regime.

PubMed

Baronio, Fabio; Conforti, Matteo; Degasperis, Antonio; Lombardo, Sara; Onorato, Miguel; Wabnitz, Stefan

2014-07-18

We report and discuss analytical solutions of the vector nonlinear Schrödinger equation that describe rogue waves in the defocusing regime. This family of solutions includes bright-dark and dark-dark rogue waves. The link between modulational instability (MI) and rogue waves is displayed by showing that only a peculiar kind of MI, namely baseband MI, can sustain rogue-wave formation. The existence of vector rogue waves in the defocusing regime is expected to be a crucial progress in explaining extreme waves in a variety of physical scenarios described by multicomponent systems, from oceanography to optics and plasma physics.

An accuracy aware low power wireless EEG unit with information content based adaptive data compression.

PubMed

Tolbert, Jeremy R; Kabali, Pratik; Brar, Simeranjit; Mukhopadhyay, Saibal

2009-01-01

We present a digital system for adaptive data compression for low power wireless transmission of Electroencephalography (EEG) data. The proposed system acts as a base-band processor between the EEG analog-to-digital front-end and RF transceiver. It performs a real-time accuracy energy trade-off for multi-channel EEG signal transmission by controlling the volume of transmitted data. We propose a multi-core digital signal processor for on-chip processing of EEG signals, to detect signal information of each channel and perform real-time adaptive compression. Our analysis shows that the proposed approach can provide significant savings in transmitter power with minimal impact on the overall signal accuracy.

A novel optical millimeter-wave signal generation approach to overcome chromatic dispersion

NASA Astrophysics Data System (ADS)

Liang, Dong; Jiang, Wei; Tan, Qinggui; Zhu, Zhongbo; Liu, Feng

2014-06-01

In this paper, a novel frequency octupling approach for optical millimeter-wave signal generation to overcome chromatic dispersion is proposed and demonstrated. The frequency octupling mm-wave with the baseband signal carried only by -4th order sideband is generated by properly adjusting a series of parameters, which are the modulation constant, the gain of baseband signal, the direct current bias and the different phase of the modulation arms. As the optical millimeter-wave signal is transmitted along the fiber, there is no time shift caused by chromatic dispersion. Theoretical analyses and simulated results show that when the optical mm-wave carrying 2.5 Gbps baseband signal transmits a distance of over 110 km, the eye diagram still keeps open and clear. The power penalty is about 0.4 dB after the optical signal transmits over 40 km. In additions, given the +4th order sideband carries no data, a full-duplex RoF link based on wavelength reuse is built for the uplink. The bidirectional 2.5 Gbps baseband signal could successfully transmit over 40 km with about 0.8 dB power penalty in the simulation. Both theoretical analyses and simulation results show that the full-duplex RoF link has good performance.

Demonstration of micro-projection enabled short-range communication system for 5G.

PubMed

Chou, Hsi-Hsir; Tsai, Cheng-Yu

2016-06-13

A liquid crystal on silicon (LCoS) based polarization modulated image (PMI) system architecture using red-, green- and blue-based light-emitting diodes (LEDs), which offers simultaneous micro-projection and high-speed data transmission at nearly a gigabit, serving as an alternative short-range communication (SRC) approach for personal communication device (PCD) application in 5G, is proposed and experimentally demonstrated. In order to make the proposed system architecture transparent to the future possible wireless data modulation format, baseband modulation schemes such as multilevel pulse amplitude modulation (M-PAM), M-ary phase shift keying modulation (M-PSK) and M-ary quadrature amplitude modulation (M-QAM) which can be further employed by more advanced multicarrier modulation schemes (such as DMT, OFDM and CAP) were used to investigate the highest possible data transmission rate of the proposed system architecture. The results demonstrated that an aggregative data transmission rate of 892 Mb/s and 900 Mb/s at a BER of 10^(-3) can be achieved by using 16-QAM baseband modulation scheme when data transmission were performed with and without micro-projection simultaneously.

System for delivery of broadcast digital video as an overlay to baseband switched services on a fiber-to-the-home access network

NASA Astrophysics Data System (ADS)

Chand, Naresh; Magill, Peter D.; Swaminathan, Venkat S.; Yadvish, R. D.

1999-04-01

For low cost fiber-to-the-home (FTTH) passive optical networks (PON), we have studied the delivery of broadcast digital video as an overlay to baseband switched digital services on the same fiber using a single transmitter and a single receiver. We have multiplexed the baseband data at 155.52 Mbps with digital video QPSK channels in the 270 - 1450 MHz range with minimal degradation. We used an additional 860 MHz carrier modulated with 8 Mbps QPSK as a test-signal. An optical to electrical (O/E) receiver using an APD satisfies the power budget needs of ITU-T document G983.x for both class B and C operations (i.e., receiver sensitivity less than -33 dBm for a 10-10 bit error rate) without any FEC for both data and video. The PIN diode O/E receiver nearly satisfies the need for class B operation (-30 dBm receiver sensitivity) of G983 with FEC in QPSK FDM video. For a 155.52 Mbps baseband data transmission and for a given bit error rate, there is approximately 6 dBo1 optical power penalty due to video overlay. Of this, 1 dBo penalty is due to biasing the laser with an extinction ratio reduced from 10 dBo to approximately 6 dBo, and approximately 5 dBo penalty is due to receiver bandwidth increasing from approximately 100 MHz to approximately 1 GHz. The penalty due to receiver is after optimizing the filter for baseband data, and is caused by the reduced value of feedback resistor of the first stage transimpedance amplifier. The optical power penalty for video transmission is about 2 dBo due to reduced optical modulation index.

Developments in photonic and mm-wave component technology for fiber radio

NASA Astrophysics Data System (ADS)

Iezekiel, Stavros

2013-01-01

A review of photonic component technology for fiber radio applications at 60 GHz will be given. We will focus on two architectures: (i) baseband-over-fiber and (ii) RF-over-fiber. In the first approach, up-conversion to 60 GHz is performed at the picocell base stations, with data being transported over fiber, while in the second both the data and rum­ wave carrier are transported over fiber. For the baseband-over-fiber scheme, we examine techniques to improve the modulation efficiency of directly­ modulated fiber links. These are based on traveling-wave structures applied to series cascades of lasers. This approach combines the improvement in differential quantum efficiency with the ability to tailor impedance matching as required. In addition, we report on various base station transceiver architectures based on optically-controlled :tvfMIC self­ oscillating mixers, and their application to 60 GHz fiber radio. This approach allows low cost optoelectronic transceivers to be used for the baseband fiber link, whilst minimizing the impact of dispersion. For the RF-over-fiber scheme, we report on schemes for optical generation of 100 GHz. These use modulation of a Mach-Zehnder modulator at Vπ bias in cascade with a Mach-Zehnder driven by 1.25 Gb/s data. One of the issues in RF-over-fiber is dispersion, while reduced modulation efficiency due to the presence of the optical carrier is also problematic. We examine the use of silicon nitride micro-ring resonators for the production of optical single sideband modulation in order to combat dispersion, and for the reduction of optical carrier power in order to improve link modulation efficiency.

Baseband pulse shaping techniques for nonlinearly amplified pi/4-QPSK and QAM systems

NASA Technical Reports Server (NTRS)

Feher, Kamilo

1991-01-01

A new generation of multi-stage pi/4-shifted QPSK and of superposed quadrature-amplitude-modulated (SQAM) modulators-coherent demodulators (modems) and of continuous phase modulated (CPM)-gaussian premodulation filtered minimum-shift-keying (MGMSK) systems is proposed and studied. These modems will lead to bandwidth and power efficient satellite communications systems designs. As an illustrative application, a baseband processing technique pi/4-controlled transition PSK (pi/4-CTPSK) is described. To develop a cost and power efficient design strategy, we assume that nonlinear, fully saturated high power amplifiers (HPA) are utilized in the satellite earth station transmitter and in the satellite transponder. Modem structures which could lead to application specific integrated circuit (ASIC) satellite on-board processing universal modem applications are also considered. Multistate GMSK (i.e., MGMSK) signal generation methods by means of two or more RF combined nonlinearly amplified SQAM modems and by one multistate (in-phase and quadrature-baseband premodulation filtered-superposed) SQAM architecture and one RF nonlinear amplifier are studied. During the SQAM modem development phase we investigate the potential system advantages of the pi/4-shifted logic. The bandwidth efficiency of the proposed multistate GMSK and baseband filtered PAM-FM modulator (a new class in the CPM family) will be significantly higher than that of conventional G-MSK systems. To optimize the practical P(sub e) = f((E sub b)/(N sub o)) performance we consider improved coherent demodulation MGMSK structures such as deviated-frequency locking coherent demodulators. For relative low bit rate SATCOM applications, e.g., bit rates less than 300 kb/s, phase noise tracking cancellation (for fixed site earth station) and phase noise cancellation as well as Doppler compensation (for satellite to mobile earth station) applications may be required. We study digital channel sounding methods which could cancel the phase noise-caused degradations of CPM and GMSK modems.

Comparing bandwidth requirements for digital baseband signals.

NASA Technical Reports Server (NTRS)

Houts, R. C.; Green, T. A.

1972-01-01

This paper describes the relative bandwidth requirements of the common digital baseband signaling techniques used for data transmission. Bandwidth considerations include the percentage of total power in a properly encoded PN sequence passed at bandwidths of 0.5, 1, 2 and 3 times the reciprocal of the bit interval. The signals considered in this study are limited to the binary class. The study compares such signaling techniques as delay modulation, bipolar, biternary, duobinary, pair selected ternary and time polarity control in addition to the conventional NRZ, RZ and BI-phi schemes.

LBR-2 Earth stations for the ACTS program

NASA Technical Reports Server (NTRS)

Oreilly, Michael; Jirberg, Russell; Spisz, Ernie

1990-01-01

The Low Burst Rate-2 (LBR-2) earth station being developed for NASA's Advanced Communications Technology Satellite (ACTS) is described. The LBR-2 is one of two earth station types that operate through the satellite's baseband processor. The LBR-2 is a small earth terminal (VSAT)-like earth station that is easily sited on a user's premises, and provides up to 1.792 megabits per second (MBPS) of voice, video, and data communications. Addressed here is the design of the antenna, the rf subsystems, the digital processing equipment, and the user interface equipment.

Multiplexing Readout of TES Microcalorimeters Based on Analog Baseband Feedback

DOE Office of Scientific and Technical Information (OSTI.GOV)

Takei, Y.; Yamasaki, N.Y; Mitsuda, K.

2009-12-16

A TES microcalorimeter array is a promising spectrometer with excellent energy resolution and a moderate imaging capability. To realize a large format array in space, multiplexing the TES signals at the low tempersture stage is mandatory. We are developing frequency division multiplexing (FDM) based on baseband feedback technique. In FDM, each TES is AC-biased with a different carrier frequency. Signals from several pixels are summed and then read out by one SQUID. The maximum number of multiplexed pixels are limited by the frequency band in which the SQUID can be operated in a flux-locked loop, which is {approx}1 MHz withmore » standard flux-locked loop circuit. In the baseband feedback, the signal ({approx}10 kHz band) from the TES is once demodulated. Then a reconstructed copy of the modulated signal with an appropriate phase is fed back to the SQUID input coil to maintain an approximately constant magnetic flux. This can be implemented even for large cable delays and automatically suppresses the carrier. We developed a prototype electronics for the baseband feedback based on an analog phase sensitive detector (PSD) and a multiplier. Combined with Seiko 80-SSA SQUID amp, open-loop gain of 8 has been obtained for 10 kHz baseband signal at 5 MHz carrier frequency, with a moderate noise contribution of 27pA/{radical}(Hz) at input.« less

On-board processing satellite network architecture and control study

NASA Technical Reports Server (NTRS)

Campanella, S. Joseph; Pontano, Benjamin A.; Chalmers, Harvey

1987-01-01

The market for telecommunications services needs to be segmented into user classes having similar transmission requirements and hence similar network architectures. Use of the following transmission architecture was considered: satellite switched TDMA; TDMA up, TDM down; scanning (hopping) beam TDMA; FDMA up, TDM down; satellite switched MF/TDMA; and switching Hub earth stations with double hop transmission. A candidate network architecture will be selected that: comprises multiple access subnetworks optimized for each user; interconnects the subnetworks by means of a baseband processor; and optimizes the marriage of interconnection and access techniques. An overall network control architecture will be provided that will serve the needs of the baseband and satellite switched RF interconnected subnetworks. The results of the studies shall be used to identify elements of network architecture and control that require the greatest degree of technology development to realize an operational system. This will be specified in terms of: requirements of the enabling technology; difference from the current available technology; and estimate of the development requirements needed to achieve an operational system. The results obtained for each of these tasks are presented.

Experimental demonstration of record high 19.125 Gb/s real-time end-to-end dual-band optical OFDM transmission over 25 km SMF in a simple EML-based IMDD system.

PubMed

Giddings, R P; Hugues-Salas, E; Tang, J M

2012-08-27

Record high 19.125 Gb/s real-time end-to-end dual-band optical OFDM (OOFDM) transmission is experimentally demonstrated, for the first time, in a simple electro-absorption modulated laser (EML)-based 25 km standard SMF system using intensity modulation and direct detection (IMDD). Adaptively modulated baseband (0-2GHz) and passband (6.125 ± 2GHz) OFDM RF sub-bands, supporting line rates of 10 Gb/s and 9.125 Gb/s respectively, are independently generated and detected with FPGA-based DSP clocked at only 100 MHz and DACs/ADCs operating at sampling speeds as low as 4GS/s. The two OFDM sub-bands are electrically frequency-division-multiplexed (FDM) for intensity modulation of a single optical carrier by an EML. To maximize and balance the signal transmission performance of each sub-band, on-line adaptive features and on-line performance monitoring is fully exploited to optimize key OOFDM transceiver and system parameters, which includes subcarrier characteristics within each individual OFDM sub-band, total and relative sub-band power as well as EML operating conditions. The achieved 19.125 Gb/s over 25 km SMF OOFDM transmission system has an optical power budget of 13.5 dB, and shows almost identical bit error rate (BER) performances for both the baseband and passband signals. In addition, experimental investigations also indicate that the maximum achievable transmission capacity of the present system is mainly determined by the EML frequency chirp-enhanced chromatic dispersion effect, and the passband BER performance is not affected by the two sub-band-induced intermixing effect, which, however, gives a 1.2dB optical power penalty to the baseband signal transmission.

Electronic Circuit Experiments and SPICE Simulation of Double Covering Bifurcation of 2-Torus Quasi-Periodic Flow in Phase-Locked Loop Circuit

NASA Astrophysics Data System (ADS)

Kamiyama, Kyohei; Endo, Tetsuro; Imai, Isao; Komuro, Motomasa

2016-06-01

Double covering (DC) bifurcation of a 2-torus quasi-periodic flow in a phase-locked loop circuit was experimentally investigated using an electronic circuit and via SPICE simulation; in the circuit, the input radio-frequency signal was frequency modulated by the sum of two asynchronous sinusoidal baseband signals. We observed both DC and period-doubling bifurcations of a discrete map on two Poincaré sections, which were realized by changing the sample timing from one baseband sinusoidal signal to the other. The results confirm the DC bifurcation of the original flow.

Digital Front End for Wide-Band VLBI Science Receiver

NASA Technical Reports Server (NTRS)

Jongeling, Andre; Sigman, Elliott; Navarro, Robert; Goodhart, Charles; Rogstad, Steve; Chandra, Kumar; Finley, Sue; Trinh, Joseph; Soriano, Melissa; White, Les;

47 CFR 2.1049 - Measurements required: Occupied bandwidth.

Code of Federal Regulations, 2010 CFR

2010-10-01

... established for the characteristic baseband frequency. (Modulation reference level is defined as the average....1049 Section 2.1049 Telecommunication FEDERAL COMMUNICATIONS COMMISSION GENERAL FREQUENCY ALLOCATIONS... Certification § 2.1049 Measurements required: Occupied bandwidth. The occupied bandwidth, that is the frequency...

Ultra-high-speed optical transmission using digital-preprocessed analog-multiplexed DAC

NASA Astrophysics Data System (ADS)

Yamazaki, Hiroshi; Nagatani, Munehiko; Hamaoka, Fukutaro; Horikoshi, Kengo; Nakamura, Masanori; Matsushita, Asuka; Kanazawa, Shigeru; Hashimoto, Toshikazu; Nosaka, Hideyuki; Miyamoto, Yutaka

2018-02-01

In advanced fiber transmission systems with digital signal processors (DSPs), analog bandwidths of digital-to-analog converters (DACs), which interface the DSPs and optics, are the major factors limiting the data rates. We have developed a technology to extend the DACs' bandwidth using a digital preprocessor, two sub-DACs, and an analog multiplexer. This technology enables us to generate baseband signals with bandwidths of up to around 60 GHz, which is almost twice that of signals generated by typical CMOS DACs. In this paper, we describe the principle of the bandwidth extension and review high-speed transmission experiments enabled by this technology.

Multichannel Baseband Processor for Wideband CDMA

NASA Astrophysics Data System (ADS)

Jalloul, Louay M. A.; Lin, Jim

2005-12-01

The system architecture of the cellular base station modem engine (CBME) is described. The CBME is a single-chip multichannel transceiver capable of processing and demodulating signals from multiple users simultaneously. It is optimized to process different classes of code-division multiple-access (CDMA) signals. The paper will show that through key functional system partitioning, tightly coupled small digital signal processing cores, and time-sliced reuse architecture, CBME is able to achieve a high degree of algorithmic flexibility while maintaining efficiency. The paper will also highlight the implementation and verification aspects of the CBME chip design. In this paper, wideband CDMA is used as an example to demonstrate the architecture concept.

Array processor architecture connection network

NASA Technical Reports Server (NTRS)

Barnes, George H. (Inventor); Lundstrom, Stephen F. (Inventor); Shafer, Philip E. (Inventor)

1982-01-01

A connection network is disclosed for use between a parallel array of processors and a parallel array of memory modules for establishing non-conflicting data communications paths between requested memory modules and requesting processors. The connection network includes a plurality of switching elements interposed between the processor array and the memory modules array in an Omega networking architecture. Each switching element includes a first and a second processor side port, a first and a second memory module side port, and control logic circuitry for providing data connections between the first and second processor ports and the first and second memory module ports. The control logic circuitry includes strobe logic for examining data arriving at the first and the second processor ports to indicate when the data arriving is requesting data from a requesting processor to a requested memory module. Further, connection circuitry is associated with the strobe logic for examining requesting data arriving at the first and the second processor ports for providing a data connection therefrom to the first and the second memory module ports in response thereto when the data connection so provided does not conflict with a pre-established data connection currently in use.

Advanced technology for a satellite multichannel demultiplexer/demodulator

NASA Technical Reports Server (NTRS)

Abramovitz, Irwin J.; Flechsig, Drew E.; Matteis, Richard M., Jr.

1994-01-01

Satellite on-board processing is needed to efficiently service multiple users while at the same time minimizing earth station complexity. The processing satellite receives a wideband uplink at 30 GHz and down-converts it to a suitable intermediate frequency. A multichannel demultiplexer then separates the composite signal into discrete channels. Each channel is then demodulated by bulk demodulators, with the baseband signals routed to the downlink processor for retransmission to the receiving earth stations. This type of processing circumvents many of the difficulties associated with traditional bent-pipe repeater satellites. Uplink signal distortion and interference are not retransmitted on the downlink. Downlink power can be allocated in accordance with user needs, independent of uplink transmissions. This allows the uplink users to employ different data rates as well as different modulation and coding schemes. In addition, all downlink users have a common frequency standard and symbol clock on the satellite, which is useful for network synchronization in time division multiple access schemes. The purpose of this program is to demonstrate the concept of an optically implemented multichannel demultiplexer (MCD). A proof-of-concept (POC) model has been developed which has the ability to receive a 40 MHz wide composite signal consisting of up to 1000 40 kHz QPSK modulated channels and perform the demultiplexing process. In addition a set of special test equipment (STE) has been configured to evaluate the performance of the POC model. The optical MCD is realized as an acousto-optic spectrum analyzer utilizing the capability of Bragg cells to perform the required channelization. These Bragg cells receive an optical input from a laser source and an RF input (the signal). The Bragg interaction causes optical output diffractions at angles proportional to the RF input frequency. These discrete diffractions are optically detected and output to individual demodulators for baseband conversion. Optimization of the MCD design was conducted in order to achieve a compromise between two opposing sources of signal degradation: adjacent channel interference and intersymbol interference. The system was also optimized to allow simple, inexpensive ground stations communications with the MCD. These design goals led to the realization of a POC MCD which demonstrates the demultiplexing function with minimal signal degradation. Performance evaluation results using the STE equipment indicate that the dynamic range of the demultiplexer in the presence of adjacent and multiple channel loading is 40 - 50 dB. Measured bit error rate (BER) probabilities varied from the predicted theoretical results by one dB or less. The performance of the proof-of-concept model indicate that the development of a space qualified optically implemented MCD are feasible. The advantages to such an implementation include reduced size, weight and power and increased reliability when compared with electronic approaches. All of these factors are critical to on-board satellite processors. Further optimization can be conducted which trade ground station complexity and MCD performance to achieve desired system results.

Generic Bluetooth Data Module

DTIC Science & Technology

2002-09-01

to Ref (1). 34 RS232.java Serial Coomunication port class To Bluetooth module HCI.java Host Control Interface class L2CAP.java Logical Link Control...standard protocol for transporting IP datagrams over point-to-point link . It is designed to run over RFCOMM to accomplish point-to-point connections...Control and Adaption Host Controller Interface Link Manager Baseband / Link Controller Radio Figure 2. Bluetooth layers (From Ref. [3].) C

Up-converted 1/f PM and AM noise in linear HBT amplifiers.

PubMed

Ferre-Pikal, Eva S; Savage, Frederick H

2008-08-01

In this paper we describe a technique to predict the 1/f phase modulation (PM) and 1/f amplitude modulation (AM) noise due to up-conversion of 1/f baseband current noise in microwave heterojunction bipolar transistor (HBT) amplifiers. We obtain an accurate model for the amplifier and find the expression for voltage gain in terms of DC bias, transistor parameters, and circuit components. Theoretical 1/f PM and AM noise sensitivities to 1/f baseband current noise are then found by applying the definitions of PM and AM noise to the gain expression of the amplifier. Measurements of PM and AM sensitivities at 500 MHz and 1 GHz were in good agreement with the values predicted by theory, verifying the validity of this technique. This method can be used to optimize amplifier design for low PM and AM noise. We show that the amplifier PM noise can be reduced by 9 dB by adjusting the value of the input coupling capacitor.

Parallel processor for real-time structural control

NASA Astrophysics Data System (ADS)

Tise, Bert L.

1993-07-01

A parallel processor that is optimized for real-time linear control has been developed. This modular system consists of A/D modules, D/A modules, and floating-point processor modules. The scalable processor uses up to 1,000 Motorola DSP96002 floating-point processors for a peak computational rate of 60 GFLOPS. Sampling rates up to 625 kHz are supported by this analog-in to analog-out controller. The high processing rate and parallel architecture make this processor suitable for computing state-space equations and other multiply/accumulate-intensive digital filters. Processor features include 14-bit conversion devices, low input-to-output latency, 240 Mbyte/s synchronous backplane bus, low-skew clock distribution circuit, VME connection to host computer, parallelizing code generator, and look- up-tables for actuator linearization. This processor was designed primarily for experiments in structural control. The A/D modules sample sensors mounted on the structure and the floating- point processor modules compute the outputs using the programmed control equations. The outputs are sent through the D/A module to the power amps used to drive the structure's actuators. The host computer is a Sun workstation. An OpenWindows-based control panel is provided to facilitate data transfer to and from the processor, as well as to control the operating mode of the processor. A diagnostic mode is provided to allow stimulation of the structure and acquisition of the structural response via sensor inputs.

THz photonic wireless links with 16-QAM modulation in the 375-450 GHz band.

PubMed

Jia, Shi; Yu, Xianbin; Hu, Hao; Yu, Jinlong; Guan, Pengyu; Da Ros, Francesco; Galili, Michael; Morioka, Toshio; Oxenløwe, Leif K

2016-10-17

We propose and experimentally demonstrate THz photonic wireless communication systems with 16-QAM modulation in the 375-450 GHz band. The overall throughput reaches as high as 80 Gbit/s by exploiting four THz channels with 5 Gbaud 16-QAM baseband modulation per channel. We create a coherent optical frequency comb (OFC) for photonic generation of multiple THz carriers based on photo-mixing in a uni-travelling carrier photodiode (UTC-PD). The OFC configuration also allows us to generate reconfigurable THz carriers with low phase noise. The multiple-channel THz radiation is received by using a Schottky mixer based electrical receiver after 0.5 m free-space wireless propagation. 2-channel (40 Gbit/s) and 4-channel (80 Gbit/s) THz photonic wireless links with 16-QAM modulation are reported in this paper, and the bit error rate (BER) performance for all channels in both cases is below the hard decision forward error correction (HD-FEC) threshold of 3.8e-3 with 7% overhead. In addition, we also successfully demonstrate hybrid photonic wireless transmission of 40 Gbit/s 16-QAM signal at carrier frequencies of 400 GHz and 425 GHz over 30 km standard single mode fiber (SSMF) between the optical baseband signal transmitter and the THz wireless transmitter with negligible induced power penalty.

Parallel processor for real-time structural control

DOE Office of Scientific and Technical Information (OSTI.GOV)

Tise, B.L.

1992-01-01

A parallel processor that is optimized for real-time linear control has been developed. This modular system consists of A/D modules, D/A modules, and floating-point processor modules. The scalable processor uses up to 1,000 Motorola DSP96002 floating-point processors for a peak computational rate of 60 GFLOPS. Sampling rates up to 625 kHz are supported by this analog-in to analog-out controller. The high processing rate and parallel architecture make this processor suitable for computing state-space equations and other multiply/accumulate-intensive digital filters. Processor features include 14-bit conversion devices, low input-output latency, 240 Mbyte/s synchronous backplane bus, low-skew clock distribution circuit, VME connection tomore » host computer, parallelizing code generator, and look-up-tables for actuator linearization. This processor was designed primarily for experiments in structural control. The A/D modules sample sensors mounted on the structure and the floating-point processor modules compute the outputs using the programmed control equations. The outputs are sent through the D/A module to the power amps used to drive the structure's actuators. The host computer is a Sun workstation. An Open Windows-based control panel is provided to facilitate data transfer to and from the processor, as well as to control the operating mode of the processor. A diagnostic mode is provided to allow stimulation of the structure and acquisition of the structural response via sensor inputs.« less

Ultrabroadband phased-array radio frequency (RF) receivers based on optical techniques

NASA Astrophysics Data System (ADS)

Overmiller, Brock M.; Schuetz, Christopher A.; Schneider, Garrett; Murakowski, Janusz; Prather, Dennis W.

2014-03-01

Military operations require the ability to locate and identify electronic emissions in the battlefield environment. However, recent developments in radio detection and ranging (RADAR) and communications technology are making it harder to effectively identify such emissions. Phased array systems aid in discriminating emitters in the scene by virtue of their relatively high-gain beam steering and nulling capabilities. For the purpose of locating emitters, we present an approach realize a broadband receiver based on optical processing techniques applied to the response of detectors in conformal antenna arrays. This approach utilizes photonic techniques that enable us to capture, route, and process the incoming signals. Optical modulators convert the incoming signals up to and exceeding 110 GHz with appreciable conversion efficiency and route these signals via fiber optics to a central processing location. This central processor consists of a closed loop phase control system which compensates for phase fluctuations induced on the fibers due to thermal or acoustic vibrations as well as an optical heterodyne approach for signal conversion down to baseband. Our optical heterodyne approach uses injection-locked paired optical sources to perform heterodyne downconversion/frequency identification of the detected emission. Preliminary geolocation and frequency identification testing of electronic emissions has been performed demonstrating the capabilities of our RF receiver.

Tunable microwave photonic filter free from baseband and carrier suppression effect not requiring single sideband modulation using a Mach-Zenhder configuration.

PubMed

Mora, José; Ortigosa-Blanch, Arturo; Pastor, Daniel; Capmany, José

2006-08-21

We present a full theoretical and experimental analysis of a novel all-optical microwave photonic filter combining a mode-locked fiber laser and a Mach-Zenhder structure in cascade to a 2x1 electro-optic modulator. The filter is free from the carrier suppression effect and thus it does not require single sideband modulation. Positive and negative coefficients are obtained inherently in the system and the tunability is achieved by controlling the optical path difference of the Mach-Zenhder structure.

Practical, redundant, failure-tolerant, self-reconfiguring embedded system architecture

DOEpatents

Klarer, Paul R.; Hayward, David R.; Amai, Wendy A.

2006-10-03

This invention relates to system architectures, specifically failure-tolerant and self-reconfiguring embedded system architectures. The invention provides both a method and architecture for redundancy. There can be redundancy in both software and hardware for multiple levels of redundancy. The invention provides a self-reconfiguring architecture for activating redundant modules whenever other modules fail. The architecture comprises: a communication backbone connected to two or more processors and software modules running on each of the processors. Each software module runs on one processor and resides on one or more of the other processors to be available as a backup module in the event of failure. Each module and backup module reports its status over the communication backbone. If a primary module does not report, its backup module takes over its function. If the primary module becomes available again, the backup module returns to its backup status.

The advanced receiver 2: Telemetry test results in CTA 21

NASA Technical Reports Server (NTRS)

Hinedi, S.; Bevan, R.; Marina, M.

1991-01-01

Telemetry tests with the Advanced Receiver II (ARX II) in Compatibility Test Area 21 are described. The ARX II was operated in parallel with a Block-III Receiver/baseband processor assembly combination (BLK-III/BPA) and a Block III Receiver/subcarrier demodulation assembly/symbol synchronization assembly combination (BLK-III/SDA/SSA). The telemetry simulator assembly provided the test signal for all three configurations, and the symbol signal to noise ratio as well as the symbol error rates were measured and compared. Furthermore, bit error rates were also measured by the system performance test computer for all three systems. Results indicate that the ARX-II telemetry performance is comparable and sometimes superior to the BLK-III/BPA and BLK-III/SDA/SSA combinations.

Advances in gallium arsenide monolithic microwave integrated-circuit technology for space communications systems

NASA Technical Reports Server (NTRS)

Bhasin, K. B.; Connolly, D. J.

1986-01-01

Future communications satellites are likely to use gallium arsenide (GaAs) monolithic microwave integrated-circuit (MMIC) technology in most, if not all, communications payload subsystems. Multiple-scanning-beam antenna systems are expected to use GaAs MMIC's to increase functional capability, to reduce volume, weight, and cost, and to greatly improve system reliability. RF and IF matrix switch technology based on GaAs MMIC's is also being developed for these reasons. MMIC technology, including gigabit-rate GaAs digital integrated circuits, offers substantial advantages in power consumption and weight over silicon technologies for high-throughput, on-board baseband processor systems. In this paper, current developments in GaAs MMIC technology are described, and the status and prospects of the technology are assessed.

Digital and analog communication systems

NASA Technical Reports Server (NTRS)

Shanmugam, K. S.

1979-01-01

The book presents an introductory treatment of digital and analog communication systems with emphasis on digital systems. Attention is given to the following topics: systems and signal analysis, random signal theory, information and channel capacity, baseband data transmission, analog signal transmission, noise in analog communication systems, digital carrier modulation schemes, error control coding, and the digital transmission of analog signals.

Flexible digital modulation and coding synthesis for satellite communications

NASA Technical Reports Server (NTRS)

Vanderaar, Mark; Budinger, James; Hoerig, Craig; Tague, John

1991-01-01

An architecture and a hardware prototype of a flexible trellis modem/codec (FTMC) transmitter are presented. The theory of operation is built upon a pragmatic approach to trellis-coded modulation that emphasizes power and spectral efficiency. The system incorporates programmable modulation formats, variations of trellis-coding, digital baseband pulse-shaping, and digital channel precompensation. The modulation formats examined include (uncoded and coded) binary phase shift keying (BPSK), quatenary phase shift keying (QPSK), octal phase shift keying (8PSK), 16-ary quadrature amplitude modulation (16-QAM), and quadrature quadrature phase shift keying (Q squared PSK) at programmable rates up to 20 megabits per second (Mbps). The FTMC is part of the developing test bed to quantify modulation and coding concepts.

Array processor architecture

NASA Technical Reports Server (NTRS)

Barnes, George H. (Inventor); Lundstrom, Stephen F. (Inventor); Shafer, Philip E. (Inventor)

1983-01-01

A high speed parallel array data processing architecture fashioned under a computational envelope approach includes a data base memory for secondary storage of programs and data, and a plurality of memory modules interconnected to a plurality of processing modules by a connection network of the Omega gender. Programs and data are fed from the data base memory to the plurality of memory modules and from hence the programs are fed through the connection network to the array of processors (one copy of each program for each processor). Execution of the programs occur with the processors operating normally quite independently of each other in a multiprocessing fashion. For data dependent operations and other suitable operations, all processors are instructed to finish one given task or program branch before all are instructed to proceed in parallel processing fashion on the next instruction. Even when functioning in the parallel processing mode however, the processors are not locked-step but execute their own copy of the program individually unless or until another overall processor array synchronization instruction is issued.

HEP - A semaphore-synchronized multiprocessor with central control. [Heterogeneous Element Processor

NASA Technical Reports Server (NTRS)

Gilliland, M. C.; Smith, B. J.; Calvert, W.

1976-01-01

The paper describes the design concept of the Heterogeneous Element Processor (HEP), a system tailored to the special needs of scientific simulation. In order to achieve high-speed computation required by simulation, HEP features a hierarchy of processes executing in parallel on a number of processors, with synchronization being largely accomplished by hardware. A full-empty-reserve scheme of synchronization is realized by zero-one-valued hardware semaphores. A typical system has, besides the control computer and the scheduler, an algebraic module, a memory module, a first-in first-out (FIFO) module, an integrator module, and an I/O module. The architecture of the scheduler and the algebraic module is examined in detail.

Ethernet-Enabled Power and Communication Module for Embedded Processors

NASA Technical Reports Server (NTRS)

Perotti, Jose; Oostdyk, Rebecca

2010-01-01

The power and communications module is a printed circuit board (PCB) that has the capability of providing power to an embedded processor and converting Ethernet packets into serial data to transfer to the processor. The purpose of the new design is to address the shortcomings of previous designs, including limited bandwidth and program memory, lack of control over packet processing, and lack of support for timing synchronization. The new design of the module creates a robust serial-to-Ethernet conversion that is powered using the existing Ethernet cable. This innovation has a small form factor that allows it to power processors and transducers with minimal space requirements.

Interpreter composition issues in the formal verification of a processor-memory module

NASA Technical Reports Server (NTRS)

Fura, David A.; Cohen, Gerald C.

1994-01-01

This report describes interpreter composition techniques suitable for the formal specification and verification of a processor-memory module using the HOL theorem proving system. The processor-memory module is a multichip subsystem within a fault-tolerant embedded system under development within the Boeing Defense and Space Group. Modeling and verification methods were developed that permit provably secure composition at the transaction-level of specification, significantly reducing the complexity of the hierarchical verification of the system.

Modulation and coding for fast fading mobile satellite communication channels

NASA Technical Reports Server (NTRS)

Mclane, P. J.; Wittke, P. H.; Smith, W. S.; Lee, A.; Ho, P. K. M.; Loo, C.

1988-01-01

The performance of Gaussian baseband filtered minimum shift keying (GMSK) using differential detection in fast Rician fading, with a novel treatment of the inherent intersymbol interference (ISI) leading to an exact solution is discussed. Trellis-coded differentially coded phase shift keying (DPSK) with a convolutional interleaver is considered. The channel is the Rician Channel with the line-of-sight component subject to a lognormal transformation.

Pulse Shaped Constant Envelope 8-PSK Modulation Study

NASA Technical Reports Server (NTRS)

Tao, Jianping; Horan, Sheila

1997-01-01

This report provides simulation results for constant envelope pulse shaped 8 Level Phase Shift Keying (8 PSK) modulation for end to end system performance. In order to increase bandwidth utilization, pulse shaping is applied to signals before they are modulated. This report provides simulation results of power spectra and measurement of bit errors produced by pulse shaping in a non-linear channel with Additive White Gaussian Noise (AWGN). The pulse shaping filters can placed before (Type B) or after (Type A) signals are modulated. Three kinds of baseband filters, 5th order Butterworth, 3rd order Bessel and Square-Root Raised Cosine with different BTs or roll off factors, are utilized in the simulations. The simulations were performed on a Signal Processing Worksystem (SPW).

Experimental demonstration of 24-Gb/s CAP-64QAM radio-over-fiber system over 40-GHz mm-wave fiber-wireless transmission.

PubMed

Zhang, Junwen; Yu, Jianjun; Chi, Nan; Li, Fan; Li, Xinying

2013-11-04

We propose and demonstrate a novel CAP-ROF system based on multi-level carrier-less amplitude and phase modulation (CAP) 64QAM with high spectrum efficiency for mm-wave fiber-wireless transmission. The performance of novel CAP modulation with high order QAM, for the first time, is investigated in the mm-wave fiber-wireless transmission system. One I/Q modulator is used for mm-wave generation and base-band signal modulation based on optical carrier suppression (OCS) and intensity modulation. Finally, we demonstrated a 24-Gb/s CAP-64QAM radio-over-fiber (ROF) system over 40-km stand single-mode-fiber (SMMF) and 1.5-m 38-GHz wireless transmission. The system operation factors are also experimentally investigated.

Digital Baseband Architecture For Transponder

NASA Technical Reports Server (NTRS)

Nguyen, Tien M.; Yeh, Hen-Geul

1995-01-01

Proposed advanced transponder for long-distance radio communication system with turnaround ranging contains carrier-signal-tracking loop including baseband digital "front end." For reduced cost, transponder includes analog intermediate-frequency (IF) section and analog automatic gain control (AGC) loop at first of two IF mixers. However, second IF mixer redesigned to ease digitization of baseband functions. To conserve power and provide for simpler and smaller transponder hardware, baseband digital signal-processing circuits designed to implement undersampling scheme. Furthermore, sampling scheme and sampling frequency chosen so redesign involves minimum modification of command-detector unit (CDU).

Optimal partitioning of random programs across two processors

NASA Technical Reports Server (NTRS)

Nicol, D. M.

1986-01-01

The optimal partitioning of random distributed programs is discussed. It is concluded that the optimal partitioning of a homogeneous random program over a homogeneous distributed system either assigns all modules to a single processor, or distributes the modules as evenly as possible among all processors. The analysis rests heavily on the approximation which equates the expected maximum of a set of independent random variables with the set's maximum expectation. The results are strengthened by providing an approximation-free proof of this result for two processors under general conditions on the module execution time distribution. It is also shown that use of this approximation causes two of the previous central results to be false.

A wideband software reconfigurable modem

NASA Astrophysics Data System (ADS)

Turner, J. H., Jr.; Vickers, H.

A wideband modem is described which provides signal processing capability for four Lx-band signals employing QPSK, MSK and PPM waveforms and employs a software reconfigurable architecture for maximum system flexibility and graceful degradation. The current processor uses a 2901 and two 8086 microprocessors per channel and performs acquisition, tracking, and data demodulation for JITDS, GPS, IFF and TACAN systems. The next generation processor will be implemented using a VHSIC chip set employing a programmable complex array vector processor module, a GP computer module, customized gate array modules, and a digital array correlator. This integrated processor has application to a wide number of diverse system waveforms, and will bring the benefits of VHSIC technology insertion into avionic antijam communications systems.

ACTS Experiments Program

NASA Technical Reports Server (NTRS)

Schertler, R. J.

1986-01-01

An overview of the ACTS Experiments Program is presented. ACTS is being developed and will flight test the advanced technologies associated with: a Ka-band multibeam antenna, onboard signal processing and switching as well as laser communications. A nominal 3 yr experiments program is planned. Through the experiments program, the capabilities of the ACTS system will be made available to U.S. industry, university and government experimenters to test, prove the feasibility and evaluate the key ACTS system technologies. Communication modes of operation using the baseband processor and microwave switch matrix are presented, along with the antenna coverage pattern. Potential experiment categories are also presented and briefly discussed. An overall schedule of activities associated with the experiments program is outlined. Results of the ACTS Experiments Program will provide information vital to successful industry implementation of ACTS technology in a future operational system.

VLITE-Fast: A Real-time, 350 MHz Commensal VLA Survey for Fast Transients

NASA Astrophysics Data System (ADS)

Kerr, Matthew; Ray, Paul S.; Kassim, Namir E.; Clarke, Tracy; Deneva, Julia; Polisensky, Emil

2018-01-01

The VLITE (VLA Low Band Ionosphere and Transient Experiment; http://vlite.nrao.edu) program operates commensally during all Very Large Array observations, collecting data from 320 to 384 MHz. Recently expanded to include 16 antennas, the large field of view and huge time on sky offer good coverage of the transient, low-frequency sky. We describe the VLITE-Fast system, a GPU-based signal processor capable of detecting short (<1s) transients in real time and triggering recording of baseband voltage for offline imaging. In the case of Fast Radio Bursts, this offers the opportunity for discovering host galaxies of non-repeating FRBs, and in the case of single pulses, the identification of pulsar positions for dedicated follow-up. We describe the observing system, techniques for mitigating interference, and initial results from searches for FRBs.

The ACTS Flight System - Cost-Effective Advanced Communications Technology. [Advanced Communication Technology Satellite

NASA Technical Reports Server (NTRS)

Holmes, W. M., Jr.; Beck, G. A.

1984-01-01

The multibeam communications package (MCP) for the Advanced Communications Technology Satellite (ACTS) to be STS-launched by NASA in 1988 for experimental demonstration of satellite-switched TDMA (at 220 Mbit/sec) and baseband-processor signal routing (at 110 or 27.5 Mbit/sec) is characterized. The developmental history of the ACTS, the program definition, and the spacecraft-bus and MCP parameters are reviewed and illustrated with drawings, block diagrams, and maps of the coverage plan. Advanced features of the MPC include 4.5-dB-noise-figure 30-GHz FET amplifiers and 20-GHz TWTA transmitters which provide either 40-W or 8-W RF output, depending on rain conditions. The technologies being tested in ACTS can give frequency-reuse factors as high as 20, thus greatly expanding the orbit/spectrum resources available for U.S. communications use.

49.6 Gb/s direct detection DMT transmission over 40 km single mode fibre using an electrically packaged silicon photonic modulator.

PubMed

Lacava, C; Cardea, I; Demirtzioglou, I; Khoja, A E; Ke, Li; Thomson, D J; Ruan, X; Zhang, F; Reed, G T; Richardson, D J; Petropoulos, P

2017-11-27

We present the characterization of a silicon Mach-Zehnder modulator with electrical packaging and show that it exhibits a large third-order intermodulation spurious-free dynamic range (> 100 dB Hz 2/3 ). This characteristic renders the modulator particularly suitable for the generation of high spectral efficiency discrete multi-tone signals and we experimentally demonstrate a single-channel, direct detection transmission system operating at 49.6 Gb/s, exhibiting a baseband spectral efficiency of 5 b/s/Hz. Successful transmission is demonstrated over various lengths of single mode fibre up to 40 km, without the need of any amplification or dispersion compensation.

FM Quieting Curves and Related Topics

DTIC Science & Technology

1977-08-01

Electronics Engineering Group (EEO) is organized as an independent group reorting, directly to -the Comwiander, Air ’Force Conmmunica-r tions Service (WOC...NUMBER N/A 7. AklTHO -() 6. CONTRACT OR GRANT NUMBER(#) /, .C...or.e M./ Kizer/ , ,/A 9. PERFORMING ORGANIZATION NAME AND ADDRESS 10. PROGRAM ELEMENT...in vestigial sideband modulation) and are separated from the carrier frequency by a frequency difference equal to the frequency of the baseband

A closed-loop time-alignment system for baseband combining

NASA Technical Reports Server (NTRS)

Feria, Y.

1994-01-01

In baseband combining, the key element is the time alignment of the baseband signals. This article describes a closed-loop time-alignment system that estimates and adjusts the relative delay between two baseband signals received from two different antennas for the signals to be coherently combined. This system automatically determines which signal is advanced and delays it accordingly with a resolution of a sample period. The performance of the loop is analyzed, and the analysis is verified through simulation. The variance of the delay estimates and the signal-to-noise ratio degradation in the simulations agree with the theoretical calculations.

Global synchronization of parallel processors using clock pulse width modulation

DOEpatents

Chen, Dong; Ellavsky, Matthew R.; Franke, Ross L.; Gara, Alan; Gooding, Thomas M.; Haring, Rudolf A.; Jeanson, Mark J.; Kopcsay, Gerard V.; Liebsch, Thomas A.; Littrell, Daniel; Ohmacht, Martin; Reed, Don D.; Schenck, Brandon E.; Swetz, Richard A.

2013-04-02

A circuit generates a global clock signal with a pulse width modification to synchronize processors in a parallel computing system. The circuit may include a hardware module and a clock splitter. The hardware module may generate a clock signal and performs a pulse width modification on the clock signal. The pulse width modification changes a pulse width within a clock period in the clock signal. The clock splitter may distribute the pulse width modified clock signal to a plurality of processors in the parallel computing system.

Conceptual design of an on-board optical processor with components

NASA Technical Reports Server (NTRS)

Walsh, J. R.; Shackelford, R. G.

1977-01-01

The specification of components for a spacecraft on-board optical processor was investigated. A space oriented application of optical data processing and the investigation of certain aspects of optical correlators were examined. The investigation confirmed that real-time optical processing has made significant advances over the past few years, but that there are still critical components which will require further development for use in an on-board optical processor. The devices evaluated were the coherent light valve, the readout optical modulator, the liquid crystal modulator, and the image forming light modulator.

System on chip module configured for event-driven architecture

DOEpatents

Robbins, Kevin; Brady, Charles E.; Ashlock, Tad A.

2017-10-17

A system on chip (SoC) module is described herein, wherein the SoC modules comprise a processor subsystem and a hardware logic subsystem. The processor subsystem and hardware logic subsystem are in communication with one another, and transmit event messages between one another. The processor subsystem executes software actors, while the hardware logic subsystem includes hardware actors, the software actors and hardware actors conform to an event-driven architecture, such that the software actors receive and generate event messages and the hardware actors receive and generate event messages.

Ultra-Reliable Digital Avionics (URDA) processor

NASA Astrophysics Data System (ADS)

Branstetter, Reagan; Ruszczyk, William; Miville, Frank

1994-10-01

Texas Instruments Incorporated (TI) developed the URDA processor design under contract with the U.S. Air Force Wright Laboratory and the U.S. Army Night Vision and Electro-Sensors Directorate. TI's approach couples advanced packaging solutions with advanced integrated circuit (IC) technology to provide a high-performance (200 MIPS/800 MFLOPS) modular avionics processor module for a wide range of avionics applications. TI's processor design integrates two Ada-programmable, URDA basic processor modules (BPM's) with a JIAWG-compatible PiBus and TMBus on a single F-22 common integrated processor-compatible form-factor SEM-E avionics card. A separate, high-speed (25-MWord/second 32-bit word) input/output bus is provided for sensor data. Each BPM provides a peak throughput of 100 MIPS scalar concurrent with 400-MFLOPS vector processing in a removable multichip module (MCM) mounted to a liquid-flowthrough (LFT) core and interfacing to a processor interface module printed wiring board (PWB). Commercial RISC technology coupled with TI's advanced bipolar complementary metal oxide semiconductor (BiCMOS) application specific integrated circuit (ASIC) and silicon-on-silicon packaging technologies are used to achieve the high performance in a miniaturized package. A Mips R4000-family reduced instruction set computer (RISC) processor and a TI 100-MHz BiCMOS vector coprocessor (VCP) ASIC provide, respectively, the 100 MIPS of a scalar processor throughput and 400 MFLOPS of vector processing throughput for each BPM. The TI Aladdim ASIC chipset was developed on the TI Aladdin Program under contract with the U.S. Army Communications and Electronics Command and was sponsored by the Advanced Research Projects Agency with technical direction from the U.S. Army Night Vision and Electro-Sensors Directorate.

Design of a MIMD neural network processor

NASA Astrophysics Data System (ADS)

Saeks, Richard E.; Priddy, Kevin L.; Pap, Robert M.; Stowell, S.

1994-03-01

The Accurate Automation Corporation (AAC) neural network processor (NNP) module is a fully programmable multiple instruction multiple data (MIMD) parallel processor optimized for the implementation of neural networks. The AAC NNP design fully exploits the intrinsic sparseness of neural network topologies. Moreover, by using a MIMD parallel processing architecture one can update multiple neurons in parallel with efficiency approaching 100 percent as the size of the network increases. Each AAC NNP module has 8 K neurons and 32 K interconnections and is capable of 140,000,000 connections per second with an eight processor array capable of over one billion connections per second.

Database interfaces on NASA's heterogeneous distributed database system

NASA Technical Reports Server (NTRS)

Huang, Shou-Hsuan Stephen

1987-01-01

The purpose of Distributed Access View Integrated Database (DAVID) interface module (Module 9: Resident Primitive Processing Package) is to provide data transfer between local DAVID systems and resident Data Base Management Systems (DBMSs). The result of current research is summarized. A detailed description of the interface module is provided. Several Pascal templates were constructed. The Resident Processor program was also developed. Even though it is designed for the Pascal templates, it can be modified for templates in other languages, such as C, without much difficulty. The Resident Processor itself can be written in any programming language. Since Module 5 routines are not ready yet, there is no way to test the interface module. However, simulation shows that the data base access programs produced by the Resident Processor do work according to the specifications.

Mechanism to support generic collective communication across a variety of programming models

DOEpatents

Almasi, Gheorghe [Ardsley, NY; Dozsa, Gabor [Ardsley, NY; Kumar, Sameer [White Plains, NY

2011-07-19

A system and method for supporting collective communications on a plurality of processors that use different parallel programming paradigms, in one aspect, may comprise a schedule defining one or more tasks in a collective operation, an executor that executes the task, a multisend module to perform one or more data transfer functions associated with the tasks, and a connection manager that controls one or more connections and identifies an available connection. The multisend module uses the available connection in performing the one or more data transfer functions. A plurality of processors that use different parallel programming paradigms can use a common implementation of the schedule module, the executor module, the connection manager and the multisend module via a language adaptor specific to a parallel programming paradigm implemented on a processor.

Electrical Prototype Power Processor for the 30-cm Mercury electric propulsion engine

NASA Technical Reports Server (NTRS)

Biess, J. J.; Frye, R. J.

1978-01-01

An Electrical Prototpye Power Processor has been designed to the latest electrical and performance requirements for a flight-type 30-cm ion engine and includes all the necessary power, command, telemetry and control interfaces for a typical electric propulsion subsystem. The power processor was configured into seven separate mechanical modules that would allow subassembly fabrication, test and integration into a complete power processor unit assembly. The conceptual mechanical packaging of the electrical prototype power processor unit demonstrated the relative location of power, high voltage and control electronic components to minimize electrical interactions and to provide adequate thermal control in a vacuum environment. Thermal control was accomplished with a heat pipe simulator attached to the base of the modules.

Increasing capacity of baseband digital data communication networks

DOEpatents

Frankel, Robert S.; Herman, Alexander

1985-01-01

This invention provides broadband network capabilities for baseband digital collision detection transceiver equipment for communication between a plurality of data stations by affording simultaneous transmission of multiple channels over a broadband pass transmission link such as a coaxial cable. Thus, a fundamental carrier wave is transmitted on said link, received at local data stations and used to detect signals on different baseband channels for reception. For transmission the carrier wave typically is used for segregating a plurality of at least two transmission channels into typically single sideband upper and lower pass bands of baseband bandwidth capability adequately separated with guard bands to permit simple separation for receiving by means of pass band filters, etc.

Increasing capacity of baseband digital data communication networks

DOEpatents

Frankel, R.S.; Herman, A.

This invention provides broadbank network capabilities for baseband digital collision detection transceiver equipment for communication between a plurality of data stations by affording simultaneous transmission of multiple channels over a broadband pass transmission link such as a coaxial cable. Thus, a fundamental carrier wave is transmitted on said link, received at local data stations and used to detect signals on different baseband channels for reception. For transmission the carrier wave typically is used for segregating a plurality of at least two transmission channels into typically single sideband upper and lower pass bands of baseband bandwidth capability adequately separated with guard bands to permit simple separation for receiving by means of pass band filters, etc.

A design of 30/20 GHz flight communications experiment for NASA. [satellite and earth segments for high data rate commercial service

NASA Technical Reports Server (NTRS)

Kawamoto, Y.

1982-01-01

The objective of the 30/20 GHz Flight Experiment System is to develop the required technology and to experiment with the communication technique for an operational communication satellite system. The system uses polarization, spatial, and frequency isolations to maximize the spectrum utilization. The key spacecraft technologies required for the concept are the scan beam antenna, the baseband processor, the IF switch matrix, TWTA, SSPA, and LNA. The spacecraft communication payload information will be telemetered and monitored closely so that these technologies and performances can be verified. Two types of services, a trunk service and a customer premise service, are demonstrated in the system. Many experiments associated with these services, such as synchronization, demand assignment, link control, and network control will be performed to provide important information on the operational aspect of the system.

Monolithic Microwave Integrated Circuit (MMIC) technology for space communications applications

NASA Technical Reports Server (NTRS)

Connolly, Denis J.; Bhasin, Kul B.; Romanofsky, Robert R.

1987-01-01

Future communications satellites are likely to use gallium arsenide (GaAs) monolithic microwave integrated-circuit (MMIC) technology in most, if not all, communications payload subsystems. Multiple-scanning-beam antenna systems are expected to use GaAs MMIC's to increase functional capability, to reduce volume, weight, and cost, and to greatly improve system reliability. RF and IF matrix switch technology based on GaAs MMIC's is also being developed for these reasons. MMIC technology, including gigabit-rate GaAs digital integrated circuits, offers substantial advantages in power consumption and weight over silicon technologies for high-throughput, on-board baseband processor systems. For the more distant future pseudomorphic indium gallium arsenide (InGaAs) and other advanced III-V materials offer the possibility of MMIC subsystems well up into the millimeter wavelength region. All of these technology elements are in NASA's MMIC program. Their status is reviewed.

Monolithic Microwave Integrated Circuit (MMIC) technology for space communications applications

NASA Technical Reports Server (NTRS)

Connolly, Denis J.; Bhasin, Kul B.; Romanofsky, Robert R.

1987-01-01

Future communications satellites are likely to use gallium arsenide (GaAs) monolithic microwave integrated-circuit (MMIC) technology in most, if not all, communications payload subsystems. Multiple-scanning-beam antenna systems are expected to use GaAs MMICs to increase functional capability, to reduce volume, weight, and cost, and to greatly improve system reliability. RF and IF matrix switch technology based on GaAs MMICs is also being developed for these reasons. MMIC technology, including gigabit-rate GaAs digital integrated circuits, offers substantial advantages in power consumption and weight over silicon technologies for high-throughput, on-board baseband processor systems. For the more distant future pseudomorphic indium gallium arsenide (InGaAs) and other advanced III-V materials offer the possibility of MMIC subsystems well up into the millimeter wavelength region. All of these technology elements are in NASA's MMIC program. Their status is reviewed.

Planning assistance for the 30/20 GHz program, volume 2

NASA Technical Reports Server (NTRS)

Al-Kinani, G.; Frankfort, M.; Kaushal, D.; Markham, R.; Siperko, C.; Wall, M.

1981-01-01

In the baseline concept development the communications payload on Flight 1 was specified to consist of on-board trunking and emergency communications systems (ECS). On Flight 2 the communications payloads consisted of trunking and CPS on-board systems, the CPS capability replacing the Flight 1 ECS. No restriction was placed on the launch vehicle size. Constraints placed on multiple concept development effort were that launch vehicle size for Concept 1 was restricted to SUSS-D and for Concept 2 a SUSS-A. The design concept development was based on satisfying the baseline requirements set forth in the SOW for a single demonstration flight system. Key constraints on contractors were cost and launch vehicle size. Five major areas of new technology development were reviewed: (1) 30 GHz low noise receivers; (2) 20 GHz Power Amplifiers; (3) SS-TDMA switch; (4) Baseband Processor; (5) Multibeam Antennas.

Advanced Communications Technology Satellite (ACTS): Four-Year System Performance

NASA Technical Reports Server (NTRS)

Acosta, Roberto J.; Bauer, Robert; Krawczyk, Richard J.; Reinhart, Richard C.; Zernic, Michael J.; Gargione, Frank

1999-01-01

The Advanced Communications Technology Satellite (ACTS) was conceived at the National Aeronautics and Space Administration (NASA) in the late 1970's as a follow-on program to ATS and CTS to continue NASA's long history of satellite communications projects. The ACTS project set the stage for the C-band satellites that started the industry, and later the ACTS project established the use of Ku-band for video distribution and direct-to-home broadcasting. ACTS, launched in September 1993 from the space shuttle, created a revolution in satellite system architecture by using digital communications techniques employing key technologies such as a fast hopping multibeam antenna, an on-board baseband processor, a wide-band microwave switch matrix, adaptive rain fade compensation, and the use of 900 MHz transponders operating at Ka-band frequencies. This paper describes the lessons learned in each of the key ACTS technology areas, as well as in the propagation investigations.

Fault-tolerant battery system employing intra-battery network architecture

DOEpatents

Hagen, Ronald A.; Chen, Kenneth W.; Comte, Christophe; Knudson, Orlin B.; Rouillard, Jean

2000-01-01

A distributed energy storing system employing a communications network is disclosed. A distributed battery system includes a number of energy storing modules, each of which includes a processor and communications interface. In a network mode of operation, a battery computer communicates with each of the module processors over an intra-battery network and cooperates with individual module processors to coordinate module monitoring and control operations. The battery computer monitors a number of battery and module conditions, including the potential and current state of the battery and individual modules, and the conditions of the battery's thermal management system. An over-discharge protection system, equalization adjustment system, and communications system are also controlled by the battery computer. The battery computer logs and reports various status data on battery level conditions which may be reported to a separate system platform computer. A module transitions to a stand-alone mode of operation if the module detects an absence of communication connectivity with the battery computer. A module which operates in a stand-alone mode performs various monitoring and control functions locally within the module to ensure safe and continued operation.

Target Super-Resolution Compensation for Coherent Airborne Radar Utilizing Spread Spectrum Waveforms.

DTIC Science & Technology

1983-12-01

effects of the transmitted waveform. This will be accomplished via comparisons of signal-to-noise ratios for non-coherent filtering vs. coherent narrowband...form of frequency or phase modulation. The simulation will assume we are processing the video (baseband) signal which resu fr i an enviroment (target...range, they can be resolved in doppler if AWD/2 > Fr where &wD is the doppler-shift difference. A similiar consideration of target resolution for a

A Gigabit-per-Second Ka-Band Demonstration Using a Reconfigurable FPGA Modulator

NASA Technical Reports Server (NTRS)

Lee, Dennis; Gray, Andrew A.; Kang, Edward C.; Tsou, Haiping; Lay, Norman E.; Fong, Wai; Fisher, Dave; Hoy, Scott

2005-01-01

Gigabit-per-second communications have been a desired target for future NASA Earth science missions, and for potential manned lunar missions. Frequency bandwidth at S-band and X-band is typically insufficient to support missions at these high data rates. In this paper, we present the results of a 1 Gbps 32-QAM end-to-end experiment at Ka-band using a reconfigurable Field Programmable Gate Array (FPGA) baseband modulator board. Bit error rate measurements of the received signal using a software receiver demonstrate the feasibility of using ultra-high data rates at Ka-band, although results indicate that error correcting coding and/or modulator predistortion must be implemented in addition. Also, results of the demonstration validate the low-cost, MOS-based reconfigurable modulator approach taken to development of a high rate modulator, as opposed to more expensive ASIC or pure analog approaches.

Hybrid Electro-Optic Processor

DTIC Science & Technology

1991-07-01

This report describes the design of a hybrid electro - optic processor to perform adaptive interference cancellation in radar systems. The processor is...modulator is reported. Included is this report is a discussion of the design, partial fabrication in the laboratory, and partial testing of the hybrid electro ... optic processor. A follow on effort is planned to complete the construction and testing of the processor. The work described in this report is the

Space vehicle onboard command encoder

NASA Technical Reports Server (NTRS)

1975-01-01

A flexible onboard encoder system was designed for the space shuttle. The following areas were covered: (1) implementation of the encoder design into hardware to demonstrate the various encoding algorithms/code formats, (2) modulation techniques in a single hardware package to maintain comparable reliability and link integrity of the existing link systems and to integrate the various techniques into a single design using current technology. The primary function of the command encoder is to accept input commands, generated either locally onboard the space shuttle or remotely from the ground, format and encode the commands in accordance with the payload input requirements and appropriately modulate a subcarrier for transmission by the baseband RF modulator. The following information was provided: command encoder system design, brassboard hardware design, test set hardware and system packaging, and software.

Radio Implementation of a Testbed For Cognitive Radio Source Localization Using USRPS and GNU Radio

DTIC Science & Technology

2014-09-01

average received energy F FFT vector size FS sampling rate g gain h channel attenuation H0 hypothesis 0 H1 hypothesis 1 I in-phase L packet size...Amplitude Modulation (QAM)). The baseband signal is then sent to the USRP in the form of in-phase (I) and quadrature (Q) complex samples to be further... sampling rate defines the bandwidth of the transmitted signal, which must be less than the channel separation to give non- overlapping channels. The FFT

Floating-Point Modules Targeted for Use with RC Compilation Tools

NASA Technical Reports Server (NTRS)

Sahin, Ibrahin; Gloster, Clay S.

2000-01-01

Reconfigurable Computing (RC) has emerged as a viable computing solution for computationally intensive applications. Several applications have been mapped to RC system and in most cases, they provided the smallest published execution time. Although RC systems offer significant performance advantages over general-purpose processors, they require more application development time than general-purpose processors. This increased development time of RC systems provides the motivation to develop an optimized module library with an assembly language instruction format interface for use with future RC system that will reduce development time significantly. In this paper, we present area/performance metrics for several different types of floating point (FP) modules that can be utilized to develop complex FP applications. These modules are highly pipelined and optimized for both speed and area. Using these modules, and example application, FP matrix multiplication, is also presented. Our results and experiences show, that with these modules, 8-10X speedup over general-purpose processors can be achieved.

Digitally generated excitation and near-baseband quadrature detection of rapid scan EPR signals.

PubMed

Tseitlin, Mark; Yu, Zhelin; Quine, Richard W; Rinard, George A; Eaton, Sandra S; Eaton, Gareth R

2014-12-01

The use of multiple synchronized outputs from an arbitrary waveform generator (AWG) provides the opportunity to perform EPR experiments differently than by conventional EPR. We report a method for reconstructing the quadrature EPR spectrum from periodic signals that are generated with sinusoidal magnetic field modulation such as continuous wave (CW), multiharmonic, or rapid scan experiments. The signal is down-converted to an intermediate frequency (IF) that is less than the field scan or field modulation frequency and then digitized in a single channel. This method permits use of a high-pass analog filter before digitization to remove the strong non-EPR signal at the IF, that might otherwise overwhelm the digitizer. The IF is the difference between two synchronized X-band outputs from a Tektronix AWG 70002A, one of which is for excitation and the other is the reference for down-conversion. To permit signal averaging, timing was selected to give an exact integer number of full cycles for each frequency. In the experiments reported here the IF was 5kHz and the scan frequency was 40kHz. To produce sinusoidal rapid scans with a scan frequency eight times IF, a third synchronized output generated a square wave that was converted to a sine wave. The timing of the data acquisition with a Bruker SpecJet II was synchronized by an external clock signal from the AWG. The baseband quadrature signal in the frequency domain was reconstructed. This approach has the advantages that (i) the non-EPR response at the carrier frequency is eliminated, (ii) both real and imaginary EPR signals are reconstructed from a single physical channel to produce an ideal quadrature signal, and (iii) signal bandwidth does not increase relative to baseband detection. Spectra were obtained by deconvolution of the reconstructed signals for solid BDPA (1,3-bisdiphenylene-2-phenylallyl) in air, 0.2mM trityl OX63 in water, 15 N perdeuterated tempone, and a nitroxide with a 0.5G partially-resolved proton hyperfine splitting. Copyright © 2014 Elsevier Inc. All rights reserved.

Preliminary design and implementation of the baseline digital baseband architecture for advanced deep space transponders

NASA Technical Reports Server (NTRS)

Nguyen, T. M.; Yeh, H.-G.

1993-01-01

The baseline design and implementation of the digital baseband architecture for advanced deep space transponders is investigated and identified. Trade studies on the selection of the number of bits for the analog-to-digital converter (ADC) and optimum sampling schemes are presented. In addition, the proposed optimum sampling scheme is analyzed in detail. Descriptions of possible implementations for the digital baseband (or digital front end) and digital phase-locked loop (DPLL) for carrier tracking are also described.

Noncoherent sampling technique for communications parameter estimations

NASA Technical Reports Server (NTRS)

Su, Y. T.; Choi, H. J.

1985-01-01

This paper presents a method of noncoherent demodulation of the PSK signal for signal distortion analysis at the RF interface. The received RF signal is downconverted and noncoherently sampled for further off-line processing. Any mismatch in phase and frequency is then compensated for by the software using the estimation techniques to extract the baseband waveform, which is needed in measuring various signal parameters. In this way, various kinds of modulated signals can be treated uniformly, independent of modulation format, and additional distortions introduced by the receiver or the hardware measurement instruments can thus be eliminated. Quantization errors incurred by digital sampling and ensuing software manipulations are analyzed and related numerical results are presented also.

Next Generation Space Telescope Integrated Science Module Data System

NASA Technical Reports Server (NTRS)

Schnurr, Richard G.; Greenhouse, Matthew A.; Jurotich, Matthew M.; Whitley, Raymond; Kalinowski, Keith J.; Love, Bruce W.; Travis, Jeffrey W.; Long, Knox S.

1999-01-01

The Data system for the Next Generation Space Telescope (NGST) Integrated Science Module (ISIM) is the primary data interface between the spacecraft, telescope, and science instrument systems. This poster includes block diagrams of the ISIM data system and its components derived during the pre-phase A Yardstick feasibility study. The poster details the hardware and software components used to acquire and process science data for the Yardstick instrument compliment, and depicts the baseline external interfaces to science instruments and other systems. This baseline data system is a fully redundant, high performance computing system. Each redundant computer contains three 150 MHz power PC processors. All processors execute a commercially available real time multi-tasking operating system supporting, preemptive multi-tasking, file management and network interfaces. These six processors in the system are networked together. The spacecraft interface baseline is an extension of the network, which links the six processors. The final selection for Processor busses, processor chips, network interfaces, and high-speed data interfaces will be made during mid 2002.

Experimental demonstration of real-time adaptively modulated DDO-OFDM systems with a high spectral efficiency up to 5.76bit/s/Hz transmission over SMF links.

PubMed

Chen, Ming; He, Jing; Tang, Jin; Wu, Xian; Chen, Lin

2014-07-28

In this paper, a FPGAs-based real-time adaptively modulated 256/64/16QAM-encoded base-band OFDM transceiver with a high spectral efficiency up to 5.76bit/s/Hz is successfully developed, and experimentally demonstrated in a simple intensity-modulated direct-detection optical communication system. Experimental results show that it is feasible to transmit a raw signal bit rate of 7.19Gbps adaptively modulated real-time optical OFDM signal over 20km and 50km single mode fibers (SMFs). The performance comparison between real-time and off-line digital signal processing is performed, and the results show that there is a negligible power penalty. In addition, to obtain the best transmission performance, direct-current (DC) bias voltage for MZM and launch power into optical fiber links are explored in the real-time optical OFDM systems.

47 CFR 73.665 - Use of TV aural baseband subcarriers.

Code of Federal Regulations, 2010 CFR

2010-10-01

... signals within the composite baseband for the following purposes: (a) Stereophonic (biphonic, quadraphonic... relating to the operation of TV stations, such as relaying broadcast materials to other stations, remote...

Performance results of a digital test signal generator

NASA Technical Reports Server (NTRS)

Gutierrez-Luaces, B. O.; Marina, M.; Parham, B.

1993-01-01

Performance results of a digital test signal-generator hardware-demonstration unit are reported. Capabilities available include baseband and intermediate frequency (IF) spectrum generation, for which test results are provided. Repeatability in the setting of a given signal-to-noise ratio (SNR) when a baseband or an IF spectrum is being generated ranges from 0.01 dB at high SNR's or high data rates to 0.3 dB at low data rates or low SNR's. Baseband symbol SNR and carrier SNR (Pc/No) accuracies of 0.1 dB were verified with the built-in statistics circuitry. At low SNR's that accuracy remains to be fully verified. These results were confirmed with measurements from a demodulator synchronizer assembly for the baseband spectrum generation, and with a digital receiver (Pioneer 10 receiver) for the IF spectrum generation.

A programmable power processor for a 25-kW power module

NASA Technical Reports Server (NTRS)

Lanier, R., Jr.; Kapustka, R. E.; Bush, J. R., Jr.

1979-01-01

A discussion of the power processor for an electrical power system for a 25-kW Power Module that could support the Space Shuttle program during the 1980's and 1990's and which could be a stepping stone to future large space power systems is presented. Trades that led to the selection of a microprocessor-controlled power processor are briefly discussed. Emphasis is given to the power processing equipment that uses a microprocessor to provide versatility that allows multiple use and to provide for future growth by reprogramming output voltage to a higher level (to 120 V from 30 V). Efficiency data from a breadboard programmable power processor are presented, and component selection and design considerations are also discussed.

A 24-GHz portable FMCW radar with continuous beam steering phased array (Conference Presentation)

NASA Astrophysics Data System (ADS)

Peng, Zhengyu; Li, Changzhi

2017-05-01

A portable 24-GHz frequency-modulated continuous-wave (FMCW) radar with continuous beam steering phased array is presented. This board-level integrated radar system consists of a phased array antenna, a radar transceiver and a baseband. The phased array used by the receiver is a 4-element linear array. The beam of the phased array can be continuously steered with a range of ±30° on the H-plane through an array of vector controllers. The vector controller is based on the concept of vector sum with binary-phase-shift attenuators. Each vector controller is capable of independently controlling the phase and the amplitude of each element of the linear array. The radar transceiver is based on the six-port technique. A free-running voltage controlled oscillator (VCO) is controlled by an analog "sawtooth" voltage generator to produce frequency-modulated chirp signal. This chirp signal is used as the transmitter signal, as well as the local oscillator (LO) signal to drive the six-port circuit. The transmitter antenna is a single patch antenna. In the baseband, the beat signal of the FMCW radar is detected by the six-port circuit and then processed by a laptop in real time. Experiments have been performed to reveal the capabilities of the proposed radar system for applications including indoor inverse synthetic aperture radar (ISAR) imaging, vital sign detection, and short-range navigation, etc. (This abstract is for the profiles session.)

Full duplex fiber link for alternative wired and wireless access based on SSB optical millimeter-wave with 4-PAM signal

NASA Astrophysics Data System (ADS)

Ma, Jianxin; Zhang, Junjie

2015-03-01

A novel full-duplex fiber-wireless link based on single sideband (SSB) optical millimeter (mm)-wave with 10 Gbit/s 4-pulse amplitude modulation (PAM) signal is proposed to provide alternative wired and 40 GHz wireless accesses for the user terminals. The SSB optical mm-wave with 4-PAM signal consists of two tones: one bears the 4-PAM signal and the other is unmodulated with high power. After transmission over the fiber to the hybrid optical network unit (HONU), the SSB optical mm-wave signal can be decomposed by fiber Bragg gratings (FBGs) as the SSB optical mm-wave signal with reduced carrier-to-sideband ratio (the baseband 4-PAM optical signal) and the uplink optical carrier for the wireless (wired) access. This makes the HONU free from the laser source. For the uplink, since the wireless access signal is converted to the baseband by power detection, both the transmitter in the HONU and the receiver in optical line terminal (OLT) are co-shared for both wireless and wired accesses, which makes the full duplex link much simpler. In our scheme, the optical electrical field of the square-root increment level 4-PAM signal assures an equal level spacing receiving for both the downlink wired and wireless accesses. Since the downlink wireless signal is down-converted to the baseband by power detection, RF local oscillator is unnecessary. To confirm the feasibility of our proposed scheme, a simulation full duplex link with 40 GHz SSB optical mm-wave with 10 Gbit/s 4-PAM signal is built. The simulation results show that both down- and up-links for either wired or wireless access can keep good performance even if the link length of the SSMF is extended to 40 km.

Prototype real-time baseband signal combiner. [deep space network

NASA Technical Reports Server (NTRS)

Howard, L. D.

1980-01-01

The design and performance of a prototype real-time baseband signal combiner, used to enhance the received Voyager 2 spacecraft signals during the Jupiter flyby, is described. Hardware delay paths, operating programs, and firmware are discussed.

Behavioral modeling and digital compensation of nonlinearity in DFB lasers for multi-band directly modulated radio-over-fiber systems

NASA Astrophysics Data System (ADS)

Li, Jianqiang; Yin, Chunjing; Chen, Hao; Yin, Feifei; Dai, Yitang; Xu, Kun

2014-11-01

The envisioned C-RAN concept in wireless communication sector replies on distributed antenna systems (DAS) which consist of a central unit (CU), multiple remote antenna units (RAUs) and the fronthaul links between them. As the legacy and emerging wireless communication standards will coexist for a long time, the fronthaul links are preferred to carry multi-band multi-standard wireless signals. Directly-modulated radio-over-fiber (ROF) links can serve as a lowcost option to make fronthaul connections conveying multi-band wireless signals. However, directly-modulated radioover- fiber (ROF) systems often suffer from inherent nonlinearities from directly-modulated lasers. Unlike ROF systems working at the single-band mode, the modulation nonlinearities in multi-band ROF systems can result in both in-band and cross-band nonlinear distortions. In order to address this issue, we have recently investigated the multi-band nonlinear behavior of directly-modulated DFB lasers based on multi-dimensional memory polynomial model. Based on this model, an efficient multi-dimensional baseband digital predistortion technique was developed and experimentally demonstrated for linearization of multi-band directly-modulated ROF systems.

RASSP signal processing architectures

NASA Astrophysics Data System (ADS)

Shirley, Fred; Bassett, Bob; Letellier, J. P.

1995-06-01

The rapid prototyping of application specific signal processors (RASSP) program is an ARPA/tri-service effort to dramatically improve the process by which complex digital systems, particularly embedded signal processors, are specified, designed, documented, manufactured, and supported. The domain of embedded signal processing was chosen because it is important to a variety of military and commercial applications as well as for the challenge it presents in terms of complexity and performance demands. The principal effort is being performed by two major contractors, Lockheed Sanders (Nashua, NH) and Martin Marietta (Camden, NJ). For both, improvements in methodology are to be exercised and refined through the performance of individual 'Demonstration' efforts. The Lockheed Sanders' Demonstration effort is to develop an infrared search and track (IRST) processor. In addition, both contractors' results are being measured by a series of externally administered (by Lincoln Labs) six-month Benchmark programs that measure process improvement as a function of time. The first two Benchmark programs are designing and implementing a synthetic aperture radar (SAR) processor. Our demonstration team is using commercially available VME modules from Mercury Computer to assemble a multiprocessor system scalable from one to hundreds of Intel i860 microprocessors. Custom modules for the sensor interface and display driver are also being developed. This system implements either proprietary or Navy owned algorithms to perform the compute-intensive IRST function in real time in an avionics environment. Our Benchmark team is designing custom modules using commercially available processor ship sets, communication submodules, and reconfigurable logic devices. One of the modules contains multiple vector processors optimized for fast Fourier transform processing. Another module is a fiberoptic interface that accepts high-rate input data from the sensors and provides video-rate output data to a display. This paper discusses the impact of simulation on choosing signal processing algorithms and architectures, drawing from the experiences of the Demonstration and Benchmark inter-company teams at Lockhhed Sanders, Motorola, Hughes, and ISX.

Shuttle Ku-band bent-pipe implementation considerations. [for Space Shuttle digital communication systems

NASA Technical Reports Server (NTRS)

Batson, B. H.; Seyl, J. W.; Huth, G. K.

1977-01-01

This paper describes an approach for relay of data-modulated subcarriers from Shuttle payloads through the Shuttle Ku-band communications subsystem (and subsequently through a tracking and data relay satellite system to a ground terminal). The novelty is that a channel originally provided for baseband digital data is shown to be suitable for this purpose; the resulting transmission scheme is referred to as a narrowband bent-pipe scheme. Test results demonstrating the validity of the narrowband bent-pipe mode are presented, and limitations on system performance are described.

Large liquid rocket engine transient performance simulation system

NASA Technical Reports Server (NTRS)

Mason, J. R.; Southwick, R. D.

1989-01-01

Phase 1 of the Rocket Engine Transient Simulation (ROCETS) program consists of seven technical tasks: architecture; system requirements; component and submodel requirements; submodel implementation; component implementation; submodel testing and verification; and subsystem testing and verification. These tasks were completed. Phase 2 of ROCETS consists of two technical tasks: Technology Test Bed Engine (TTBE) model data generation; and system testing verification. During this period specific coding of the system processors was begun and the engineering representations of Phase 1 were expanded to produce a simple model of the TTBE. As the code was completed, some minor modifications to the system architecture centering on the global variable common, GLOBVAR, were necessary to increase processor efficiency. The engineering modules completed during Phase 2 are listed: INJTOO - main injector; MCHBOO - main chamber; NOZLOO - nozzle thrust calculations; PBRNOO - preburner; PIPE02 - compressible flow without inertia; PUMPOO - polytropic pump; ROTROO - rotor torque balance/speed derivative; and TURBOO - turbine. Detailed documentation of these modules is in the Appendix. In addition to the engineering modules, several submodules were also completed. These submodules include combustion properties, component performance characteristics (maps), and specific utilities. Specific coding was begun on the system configuration processor. All functions necessary for multiple module operation were completed but the SOLVER implementation is still under development. This system, the Verification Checkout Facility (VCF) allows interactive comparison of module results to store data as well as provides an intermediate checkout of the processor code. After validation using the VCF, the engineering modules and submodules were used to build a simple TTBE.

DOE Office of Scientific and Technical Information (OSTI.GOV)

Wickstrom, Gregory Lloyd; Gale, Jason Carl; Ma, Kwok Kee

The Sandia Secure Processor (SSP) is a new native Java processor that has been specifically designed for embedded applications. The SSP's design is a system composed of a core Java processor that directly executes Java bytecodes, on-chip intelligent IO modules, and a suite of software tools for simulation and compiling executable binary files. The SSP is unique in that it provides a way to control real-time IO modules for embedded applications. The system software for the SSP is a 'class loader' that takes Java .class files (created with your favorite Java compiler), links them together, and compiles a binary. Themore » complete SSP system provides very powerful functionality with very light hardware requirements with the potential to be used in a wide variety of small-system embedded applications. This paper gives a detail description of the Sandia Secure Processor and its unique features.« less

Compact propane fuel processor for auxiliary power unit application

NASA Astrophysics Data System (ADS)

Dokupil, M.; Spitta, C.; Mathiak, J.; Beckhaus, P.; Heinzel, A.

With focus on mobile applications a fuel cell auxiliary power unit (APU) using liquefied petroleum gas (LPG) is currently being developed at the Centre for Fuel Cell Technology (Zentrum für BrennstoffzellenTechnik, ZBT gGmbH). The system is consisting of an integrated compact and lightweight fuel processor and a low temperature PEM fuel cell for an electric power output of 300 W. This article is presenting the current status of development of the fuel processor which is designed for a nominal hydrogen output of 1 k Wth,H2 within a load range from 50 to 120%. A modular setup was chosen defining a reformer/burner module and a CO-purification module. Based on the performance specifications, thermodynamic simulations, benchmarking and selection of catalysts the modules have been developed and characterised simultaneously and then assembled to the complete fuel processor. Automated operation results in a cold startup time of about 25 min for nominal load and carbon monoxide output concentrations below 50 ppm for steady state and dynamic operation. Also fast transient response of the fuel processor at load changes with low fluctuations of the reformate gas composition have been achieved. Beside the development of the main reactors the transfer of the fuel processor to an autonomous system is of major concern. Hence, concepts for packaging have been developed resulting in a volume of 7 l and a weight of 3 kg. Further a selection of peripheral components has been tested and evaluated regarding to the substitution of the laboratory equipment.

Modulation and synchronization technique for MF-TDMA system

NASA Technical Reports Server (NTRS)

Faris, Faris; Inukai, Thomas; Sayegh, Soheil

1994-01-01

This report addresses modulation and synchronization techniques for a multi-frequency time division multiple access (MF-TDMA) system with onboard baseband processing. The types of synchronization techniques analyzed are asynchronous (conventional) TDMA, preambleless asynchronous TDMA, bit synchronous timing with a preamble, and preambleless bit synchronous timing. Among these alternatives, preambleless bit synchronous timing simplifies onboard multicarrier demultiplexer/demodulator designs (about 2:1 reduction in mass and power), requires smaller onboard buffers (10:1 to approximately 3:1 reduction in size), and provides better frame efficiency as well as lower onboard processing delay. Analysis and computer simulation illustrate that this technique can support a bit rate of up to 10 Mbit/s (or higher) with proper selection of design parameters. High bit rate transmission may require Doppler compensation and multiple phase error measurements. The recommended modulation technique for bit synchronous timing is coherent QPSK with differential encoding for the uplink and coherent QPSK for the downlink.

Photonic generation of background-free millimeter-wave ultra-wideband pulses based on a single dual-drive Mach-Zehnder modulator.

PubMed

Li, Wei; Wang, Wen Ting; Sun, Wen Hui; Wang, Li Xian; Zhu, Ning Hua

2014-03-01

We propose a novel photonic approach for generating a background-free millimeter-wave (MMW) ultra-wideband (UWB) signal based on a conventional dual-drive Mach-Zehnder modulator (DMZM). One arm of the DMZM is driven by a local oscillator (LO) signal. The LO power is optimized to realize optical carrier suppressed modulation. The other arm is fed by a rectangular signal. The MMW UWB pulses are generated by truncating the continuous wave LO signal into a pulsed one in a photodetector (PD). The generated MMW UWB signal is background-free by eliminating the baseband frequency components because the optical power launched to the PD keeps constant all the time. The proposed method is theoretically analyzed and experimentally verified. The generated MMW UWB signal centered at a frequency of 26 GHz meets the Federal Communications Commission spectral mask very well.

Simultaneously frequency down-conversion, independent multichannel phase shifting and zero-IF receiving using a phase modulator in a sagnac loop and balanced detection

NASA Astrophysics Data System (ADS)

Zhu, Zihang; Zhao, Shanghong; Li, Xuan; Lin, Tao; Hu, Dapeng

2018-03-01

Photonic microwave frequency down-conversion with independent multichannel phase shifting and zero-intermediate frequency (IF) receiving is proposed and demonstrated by simulation. By combined use of a phase modulator (PM) in a sagnac loop and an optical bandpass filter (OBPF), orthogonal polarized carrier suppression single sideband (CS-SSB) signals are obtained. By adjusting the polarization controllers (PCs) to introduce the phase difference in the optical domain and using balanced detection to eliminate the direct current components, the phase of the generated IF signal can be arbitrarily tuned. Besides, the radio frequency (RF) vector signal can be also frequency down-converted to baseband directly by choosing two quadrature channels. In the simulation, high gain and continuously tunable phase shifts over the 360 degree range are verified. Furthermore, 2.5 Gbit/s RF vector signals centered at 10 GHz with different modulation formats are successfully demodulated.

Electroacoustic verification of frequency modulation systems in cochlear implant users.

PubMed

Fidêncio, Vanessa Luisa Destro; Jacob, Regina Tangerino de Souza; Tanamati, Liége Franzini; Bucuvic, Érika Cristina; Moret, Adriane Lima Mortari

2017-12-26

The frequency modulation system is a device that helps to improve speech perception in noise and is considered the most beneficial approach to improve speech recognition in noise in cochlear implant users. According to guidelines, there is a need to perform a check before fitting the frequency modulation system. Although there are recommendations regarding the behavioral tests that should be performed at the fitting of the frequency modulation system to cochlear implant users, there are no published recommendations regarding the electroacoustic test that should be performed. Perform and determine the validity of an electroacoustic verification test for frequency modulation systems coupled to different cochlear implant speech processors. The sample included 40 participants between 5 and 18 year's users of four different models of speech processors. For the electroacoustic evaluation, we used the Audioscan Verifit device with the HA-1 coupler and the listening check devices corresponding to each speech processor model. In cases where the transparency was not achieved, a modification was made in the frequency modulation gain adjustment and we used the Brazilian version of the "Phrases in Noise Test" to evaluate the speech perception in competitive noise. It was observed that there was transparency between the frequency modulation system and the cochlear implant in 85% of the participants evaluated. After adjusting the gain of the frequency modulation receiver in the other participants, the devices showed transparency when the electroacoustic verification test was repeated. It was also observed that patients demonstrated better performance in speech perception in noise after a new adjustment, that is, in these cases; the electroacoustic transparency caused behavioral transparency. The electroacoustic evaluation protocol suggested was effective in evaluation of transparency between the frequency modulation system and the cochlear implant. Performing the adjustment of the speech processor and the frequency modulation system gain are essential when fitting this device. Copyright © 2017 Associação Brasileira de Otorrinolaringologia e Cirurgia Cérvico-Facial. Published by Elsevier Editora Ltda. All rights reserved.

Photorefractive Integrators and Correlators

DTIC Science & Technology

1992-12-01

The use of photorefractive crystals as optically addressed time integrating spatial light modulators in acousto - optic signal processing applications...adaptive acousto - optic processor. These results demonstrated the feasibility of using photorefractives for such applications.... Photorefractive, Acousto - optic processor.

Optical-wireless-optical full link for polarization multiplexing quadrature amplitude/phase modulation signal transmission.

PubMed

Li, Xinying; Yu, Jianjun; Chi, Nan; Zhang, Junwen

2013-11-15

We propose and experimentally demonstrate an optical wireless integration system at the Q-band, in which up to 40 Gb/s polarization multiplexing multilevel quadrature amplitude/phase modulation (PM-QAM) signal can be first transmitted over 20 km single-mode fiber-28 (SMF-28), then delivered over a 2 m 2 × 2 multiple-input multiple-output wireless link, and finally transmitted over another 20 km SMF-28. The PM-QAM modulated wireless millimeter-wave (mm-wave) signal at 40 GHz is generated based on the remote heterodyning technique, and demodulated by the radio-frequency transparent photonic technique based on homodyne coherent detection and baseband digital signal processing. The classic constant modulus algorithm equalization is used at the receiver to realize polarization demultiplexing of the PM-QAM signal. For the first time, to the best of our knowledge, we realize the conversion of the PM-QAM modulated wireless mm-wave signal to the optical signal as well as 20 km fiber transmission of the converted optical signal.

Rapid Damage Assessment. Volume II. Development and Testing of Rapid Damage Assessment System.

DTIC Science & Technology

1981-02-01

pixels/s Camera Line Rate 732.4 lines/s Pixels per Line 1728 video 314 blank 4 line number (binary) 2 run number (BCD) 2048 total Pixel Resolution 8 bits...sists of an LSI-ll microprocessor, a VDI -200 video display processor, an FD-2 dual floppy diskette subsystem, an FT-I function key-trackball module...COMPONENT LIST FOR IMAGE PROCESSOR SYSTEM IMAGE PROCESSOR SYSTEM VIEWS I VDI -200 Display Processor Racks, Table FD-2 Dual Floppy Diskette Subsystem FT-l

A data base processor semantics specification package

NASA Technical Reports Server (NTRS)

Fishwick, P. A.

1983-01-01

A Semantics Specification Package (DBPSSP) for the Intel Data Base Processor (DBP) is defined. DBPSSP serves as a collection of cross assembly tools that allow the analyst to assemble request blocks on the host computer for passage to the DBP. The assembly tools discussed in this report may be effectively used in conjunction with a DBP compatible data communications protocol to form a query processor, precompiler, or file management system for the database processor. The source modules representing the components of DBPSSP are fully commented and included.

CMOS analog baseband circuitry for an IEEE 802.11 b/g/n WLAN transceiver

NASA Astrophysics Data System (ADS)

Zheng, Gong; Xiaojie, Chu; Qianqian, Lei; Min, Lin; Yin, Shi

2012-11-01

An analog baseband circuit for a direct conversion wireless local area network (WLAN) transceiver in a standard 0.13-μm CMOS occupying 1.26 mm2 is presented. The circuit consists of active-RC receiver (RX) 4th order elliptic lowpass filters(LPFs), transmit (PGAs) with DC offset cancellation (DCOC) servo loops, and on-chip output buffers. The RX baseband gain can be programmed in the range of -11 to 49 dB in 2 dB steps with 50-30.2 nV/√Hz input referred noise (IRN) and a 21 to -41 dBm in-band 3rd order interception point (IIP3). The RX/TX LPF cutoff frequencies can be switched between 5 MHz, 10 MHz, and 20 MHz to fulfill the multimode 802.11b/g/n requirements. The TX baseband gain of the I/Q paths are tuned separately from -1.6 to 0.9 dB in 0.1 dB steps to calibrate TX I/Q gain mismatches. By using an identical integrator based elliptic filter synthesis method together with global compensation applied to the LPF capacitor array, the power consumption of the RX LPF is considerably reduced and the proposed chip draws 26.8 mA/8 mA by the RX/TX baseband paths from a 1.2 V supply.

NASA Tech Briefs, July 2012

NASA Technical Reports Server (NTRS)

2012-01-01

Topics covered include: Instrument Suite for Vertical Characterization of the Ionosphere-Thermosphere System; Terahertz Radiation Heterodyne Detector Using Two-Dimensional Electron Gas in a GaN Heterostructure; Pattern Recognition Algorithm for High-Sensitivity Odorant Detection in Unknown Environments; Determining Performance Acceptability of Electrochemical Oxygen Sensors; Versatile Controller for Infrared Lamp and Heater Arrays; High-Speed Scanning Interferometer Using CMOS Image Sensor and FPGA Based on Multifrequency Phase-Tracking Detection; Ultra-Low-Power MEMS Selective Gas Sensors; Compact Receiver Front Ends for Submillimeter-Wave Applications; Dynamically Reconfigurable Systolic Array Accelerator; Blocking Losses With a Photon Counter; Motion-Capture-Enabled Software for Gestural Control of 3D Mod; Orbit Software Suite; CoNNeCT Baseband Processor Module Boot Code SoftWare (BCSW); Trajectory Software With Upper Atmosphere Model; ALSSAT Version 6.0; Employing a Grinding Technology to Assess the Microbial Density for Encapsulated Organisms; Demonstration of Minimally Machined Honeycomb Silicon Carbide Mirrors; Polyimide Aerogel Thin Films; Nanoengineered Thermal Materials Based on Carbon Nanotube Array Composites; Composite Laminate With Coefficient of Thermal Expansion Matching D263 Glass; Robust Tensioned Kevlar Suspension Design; Focal Plane Alignment Utilizing Optical CMM; Purifying, Separating, and Concentrating Cells From a Sample Low in Biomass; Virtual Ultrasound Guidance for Inexperienced Operators; Beat-to-Beat Blood Pressure Monitor; Non-Contact Conductivity Measurement for Automated Sample Processing Systems; An MSK Radar Waveform; Telescope Alignment From Sparsely Sampled Wavefront Measurements Over Pupil Subapertures; Method to Remove Particulate Matter from Dusty Gases at Low Pressures; Terahertz Quantum Cascade Laser With Efficient Coupling and Beam Profile; Measurement Via Optical Near-Nulling and Subaperture Stitching; 885-nm Pumped Ceramic Nd:YAG Master Oscillator Power Amplifier Laser System; Airborne Hyperspectral Imaging System; Heat Shield Employing Cured Thermal Protection Material Blocks Bonded in a Large-Cell Honeycomb Matrix; and Asymmetric Supercapacitor for Long-Duration Power Storage.

A high-speed digital signal processor for atmospheric radar, part 7.3A

NASA Technical Reports Server (NTRS)

Brosnahan, J. W.; Woodard, D. M.

1984-01-01

The Model SP-320 device is a monolithic realization of a complex general purpose signal processor, incorporating such features as a 32-bit ALU, a 16-bit x 16-bit combinatorial multiplier, and a 16-bit barrel shifter. The SP-320 is designed to operate as a slave processor to a host general purpose computer in applications such as coherent integration of a radar return signal in multiple ranges, or dedicated FFT processing. Presently available is an I/O module conforming to the Intel Multichannel interface standard; other I/O modules will be designed to meet specific user requirements. The main processor board includes input and output FIFO (First In First Out) memories, both with depths of 4096 W, to permit asynchronous operation between the source of data and the host computer. This design permits burst data rates in excess of 5 MW/s.

An additional study and implementation of tone calibrated technique of modulation

NASA Technical Reports Server (NTRS)

Rafferty, W.; Bechtel, L. K.; Lay, N. E.

1985-01-01

The Tone Calibrated Technique (TCT) was shown to be theoretically free from an error floor, and is only limited, in practice, by implementation constraints. The concept of the TCT transmission scheme along with a baseband implementation of a suitable demodulator is introduced. Two techniques for the generation of the TCT signal are considered: a Manchester source encoding scheme (MTCT) and a subcarrier based technique (STCT). The results are summarized for the TCT link computer simulation. The hardware implementation of the MTCT system is addressed and the digital signal processing design considerations involved in satisfying the modulator/demodulator requirements are outlined. The program findings are discussed and future direction are suggested based on conclusions made regarding the suitability of the TCT system for the transmission channel presently under consideration.

Space station communications and tracking equipment management/control system

NASA Technical Reports Server (NTRS)

Kapell, M. H.; Seyl, J. W.

1982-01-01

Design details of a communications and tracking (C and T) local area network and the distribution system requirements for the prospective space station are described. The hardware will be constructed of LRUs, including those for baseband, RF, and antenna subsystems. It is noted that the C and T equipment must be routed throughout the station to accommodate growth of the station. Configurations of the C and T modules will therefore be dependent on the function of the space station module where they are located. A block diagram is provided of a sample C and T hardware distribution configuration. A topology and protocol will be needed to accommodate new terminals, wide bandwidths, bidirectional message transmission, and distributed functioning. Consideration will be given to collisions occurring in the data transmission channels.

Interprocessor bus switching system for simultaneous communication in plural bus parallel processing system

DOEpatents

Atac, R.; Fischler, M.S.; Husby, D.E.

1991-01-15

A bus switching apparatus and method for multiple processor computer systems comprises a plurality of bus switches interconnected by branch buses. Each processor or other module of the system is connected to a spigot of a bus switch. Each bus switch also serves as part of a backplane of a modular crate hardware package. A processor initiates communication with another processor by identifying that other processor. The bus switch to which the initiating processor is connected identifies and secures, if possible, a path to that other processor, either directly or via one or more other bus switches which operate similarly. If a particular desired path through a given bus switch is not available to be used, an alternate path is considered, identified and secured. 11 figures.

Interprocessor bus switching system for simultaneous communication in plural bus parallel processing system

DOEpatents

Atac, Robert; Fischler, Mark S.; Husby, Donald E.

1991-01-01

A bus switching apparatus and method for multiple processor computer systems comprises a plurality of bus switches interconnected by branch buses. Each processor or other module of the system is connected to a spigot of a bus switch. Each bus switch also serves as part of a backplane of a modular crate hardware package. A processor initiates communication with another processor by identifying that other processor. The bus switch to which the initiating processor is connected identifies and secures, if possible, a path to that other processor, either directly or via one or more other bus switches which operate similarly. If a particular desired path through a given bus switch is not available to be used, an alternate path is considered, identified and secured.

Implementation and Assessment of Advanced Analog Vector-Matrix Processor

NASA Technical Reports Server (NTRS)

Gary, Charles K.; Bualat, Maria G.; Lum, Henry, Jr. (Technical Monitor)

1994-01-01

This paper discusses the design and implementation of an analog optical vecto-rmatrix coprocessor with a throughput of 128 Mops for a personal computer. Vector matrix calculations are inherently parallel, providing a promising domain for the use of optical calculators. However, to date, digital optical systems have proven too cumbersome to replace electronics, and analog processors have not demonstrated sufficient accuracy in large scale systems. The goal of the work described in this paper is to demonstrate a viable optical coprocessor for linear operations. The analog optical processor presented has been integrated with a personal computer to provide full functionality and is the first demonstration of an optical linear algebra processor with a throughput greater than 100 Mops. The optical vector matrix processor consists of a laser diode source, an acoustooptical modulator array to input the vector information, a liquid crystal spatial light modulator to input the matrix information, an avalanche photodiode array to read out the result vector of the vector matrix multiplication, as well as transport optics and the electronics necessary to drive the optical modulators and interface to the computer. The intent of this research is to provide a low cost, highly energy efficient coprocessor for linear operations. Measurements of the analog accuracy of the processor performing 128 Mops are presented along with an assessment of the implications for future systems. A range of noise sources, including cross-talk, source amplitude fluctuations, shot noise at the detector, and non-linearities of the optoelectronic components are measured and compared to determine the most significant source of error. The possibilities for reducing these sources of error are discussed. Also, the total error is compared with that expected from a statistical analysis of the individual components and their relation to the vector-matrix operation. The sufficiency of the measured accuracy of the processor is compared with that required for a range of typical problems. Calculations resolving alloy concentrations from spectral plume data of rocket engines are implemented on the optical processor, demonstrating its sufficiency for this problem. We also show how this technology can be easily extended to a 100 x 100 10 MHz (200 Cops) processor.

Design of a 12 channel fm microwave receiver. [for satellite ground stations

NASA Technical Reports Server (NTRS)

Risch, C. O.; Rosenbaum, F. J.; Gregory, R. O.

1974-01-01

The design, fabrication, and performance of elements of a low cost FM microwave satellite ground station receiver is described. It is capable of accepting 12 contiguous color television equivalent bandwidth channels in the 11.72 to 12.2 GHz band. Each channel is 40 MHz wide and incorporates a 4 MHz guard band. The modulation format is wideband FM and the channels are frequency division multiplexed. Twelve independent CATV compatible baseband outputs are provided. The overall system specifications are first discussed, then consideration is given to the receiver subsystems and the signal branching network.

Modulation aware cluster size optimisation in wireless sensor networks

NASA Astrophysics Data System (ADS)

Sriram Naik, M.; Kumar, Vinay

2017-07-01

Wireless sensor networks (WSNs) play a great role because of their numerous advantages to the mankind. The main challenge with WSNs is the energy efficiency. In this paper, we have focused on the energy minimisation with the help of cluster size optimisation along with consideration of modulation effect when the nodes are not able to communicate using baseband communication technique. Cluster size optimisations is important technique to improve the performance of WSNs. It provides improvement in energy efficiency, network scalability, network lifetime and latency. We have proposed analytical expression for cluster size optimisation using traditional sensing model of nodes for square sensing field with consideration of modulation effects. Energy minimisation can be achieved by changing the modulation schemes such as BPSK, 16-QAM, QPSK, 64-QAM, etc., so we are considering the effect of different modulation techniques in the cluster formation. The nodes in the sensing fields are random and uniformly deployed. It is also observed that placement of base station at centre of scenario enables very less number of modulation schemes to work in energy efficient manner but when base station placed at the corner of the sensing field, it enable large number of modulation schemes to work in energy efficient manner.

VENTURE/PC manual: A multidimensional multigroup neutron diffusion code system

DOE Office of Scientific and Technical Information (OSTI.GOV)

Shapiro, A.; Huria, H.C.; Cho, K.W.

1991-12-01

VENTURE/PC is a recompilation of part of the Oak Ridge BOLD VENTURE code system, which will operate on an IBM PC or compatible computer. Neutron diffusion theory solutions are obtained for multidimensional, multigroup problems. This manual contains information associated with operating the code system. The purpose of the various modules used in the code system, and the input for these modules are discussed. The PC code structure is also given. Version 2 included several enhancements not given in the original version of the code. In particular, flux iterations can be done in core rather than by reading and writing tomore » disk, for problems which allow sufficient memory for such in-core iterations. This speeds up the iteration process. Version 3 does not include any of the special processors used in the previous versions. These special processors utilized formatted input for various elements of the code system. All such input data is now entered through the Input Processor, which produces standard interface files for the various modules in the code system. In addition, a Standard Interface File Handbook is included in the documentation which is distributed with the code, to assist in developing the input for the Input Processor.« less

47 CFR 76.55 - Definitions applicable to the must-carry rules.

Code of Federal Regulations, 2011 CFR

2011-10-01

... SERVICES MULTICHANNEL VIDEO AND CABLE TELEVISION SERVICE Carriage of Television Broadcast Signals § 76.55... responsible for the costs of delivering to the cable system a signal of good quality or a baseband video... terminals of the signal processing equipment, or a baseband video signal. (e) Television market. (1) Until...

47 CFR 76.55 - Definitions applicable to the must-carry rules.

Code of Federal Regulations, 2014 CFR

2014-10-01

... SERVICES MULTICHANNEL VIDEO AND CABLE TELEVISION SERVICE Carriage of Television Broadcast Signals § 76.55... responsible for the costs of delivering to the cable system a signal of good quality or a baseband video... terminals of the signal processing equipment, or a baseband video signal. (e) Television market. (1) Until...

47 CFR 76.55 - Definitions applicable to the must-carry rules.

Code of Federal Regulations, 2012 CFR

2012-10-01

... SERVICES MULTICHANNEL VIDEO AND CABLE TELEVISION SERVICE Carriage of Television Broadcast Signals § 76.55... responsible for the costs of delivering to the cable system a signal of good quality or a baseband video... terminals of the signal processing equipment, or a baseband video signal. (e) Television market. (1) Until...

47 CFR 76.55 - Definitions applicable to the must-carry rules.

Code of Federal Regulations, 2013 CFR

2013-10-01

... SERVICES MULTICHANNEL VIDEO AND CABLE TELEVISION SERVICE Carriage of Television Broadcast Signals § 76.55... responsible for the costs of delivering to the cable system a signal of good quality or a baseband video... terminals of the signal processing equipment, or a baseband video signal. (e) Television market. (1) Until...

SEMICONDUCTOR INTEGRATED CIRCUITS: A reconfigurable analog baseband circuit for WLAN, WCDMA, and Bluetooth

NASA Astrophysics Data System (ADS)

Tao, Tong; Baoyong, Chi; Ziqiang, Wang; Ying, Zhang; Hanjun, Jiang; Zhihua, Wang

2010-05-01

A reconfigurable analog baseband circuit for WLAN, WCDMA, and Bluetooth in 0.35 μm CMOS is presented. The circuit consists of two variable gain amplifiers (VGA) in cascade and a Gm-C elliptic low-pass filter (LPF). The filter-order and the cut-off frequency of the LPF can be reconfigured to satisfy the requirements of various applications. In order to achieve the optimum power consumption, the bandwidth of the VGAs can also be dynamically reconfigured and some Gm cells can be cut off in the given application. Simulation results show that the analog baseband circuit consumes 16.8 mW for WLAN, 8.9 mW for WCDMA and only 6.5 mW for Bluetooth, all with a 3 V power supply. The analog baseband circuit could provide -10 to +40 dB variable gain, third-order low pass filtering with 1 MHz cut-off frequency for Bluetooth, fourth-order low pass filtering with 2.2 MHz cut-off frequency for WCDMA, and fifth-order low pass filtering with 11 MHz cut-off frequency for WLAN, respectively.

Baseband pulse shaping for pi /4 FQPSK in nonlinearly amplified mobile channels

NASA Astrophysics Data System (ADS)

Subasinghe-Dias, Dileeka; Feher, Kamilo

1994-10-01

We apply baseband pulse shaping techniques for pi /4 QPSK in order to reduce the spectral regeneration of the bandlimited carrier after nonlinear amplification. These Feher's patented techniques, namely, pi /4 FQPSK (superposed QPSK) and pi /4 CTPSK (controlled transition PSK), may also be noncoherently demodulated. Application of these techniques is in fast fading, power efficient channels, typical of the mobile radio environment. Patents related to FQPSK are described. Computer simulation and experimental studies demonstrate that with these baseband waveshaping techniques, carrier envelope fluctuations are significantly reduced, and the out-of-band power after nonlinear amplification is suppressed by up to 20 dB compared to pi /4 QPSK. In frequency noninterleaved land or satellite mobile radio systems operating in a nonlinear, fading and ACI (adjacent channel interference) environment, these techniques may achieve 20%-50% higher spectral efficiency compared to pi /4 QPSK. In mobile cellular systems using pi /4 QPSK, such as the new North American and the Japanese digital cellular systems, the application of these baseband pulse shapes may allow more convenient and less costly amplifier linearization.

Image matrix processor for fast multi-dimensional computations

DOEpatents

Roberson, George P.; Skeate, Michael F.

1996-01-01

An apparatus for multi-dimensional computation which comprises a computation engine, including a plurality of processing modules. The processing modules are configured in parallel and compute respective contributions to a computed multi-dimensional image of respective two dimensional data sets. A high-speed, parallel access storage system is provided which stores the multi-dimensional data sets, and a switching circuit routes the data among the processing modules in the computation engine and the storage system. A data acquisition port receives the two dimensional data sets representing projections through an image, for reconstruction algorithms such as encountered in computerized tomography. The processing modules include a programmable local host, by which they may be configured to execute a plurality of different types of multi-dimensional algorithms. The processing modules thus include an image manipulation processor, which includes a source cache, a target cache, a coefficient table, and control software for executing image transformation routines using data in the source cache and the coefficient table and loading resulting data in the target cache. The local host processor operates to load the source cache with a two dimensional data set, loads the coefficient table, and transfers resulting data out of the target cache to the storage system, or to another destination.

Satellite antenna management system and method

NASA Technical Reports Server (NTRS)

Leath, Timothy T (Inventor); Azzolini, John D (Inventor)

1999-01-01

The antenna management system and method allow a satellite to communicate with a ground station either directly or by an intermediary of a second satellite, thus permitting communication even when the satellite is not within range of the ground station. The system and method employ five major software components, which are the control and initialization module, the command and telemetry handler module, the contact schedule processor module, the contact state machining module, and the telemetry state machine module. The control and initialization module initializes the system and operates the main control cycle, in which the other modules are called. The command and telemetry handler module handles communication to and from the ground station. The contact scheduler processor module handles the contact entry schedules to allow scheduling of contacts with the second satellite. The contact and telemetry state machine modules handle the various states of the satellite in beginning, maintaining and ending contact with the second satellite and in beginning, maintaining and ending communication with the satellite.

Neurovision processor for designing intelligent sensors

NASA Astrophysics Data System (ADS)

Gupta, Madan M.; Knopf, George K.

1992-03-01

A programmable multi-task neuro-vision processor, called the Positive-Negative (PN) neural processor, is proposed as a plausible hardware mechanism for constructing robust multi-task vision sensors. The computational operations performed by the PN neural processor are loosely based on the neural activity fields exhibited by certain nervous tissue layers situated in the brain. The neuro-vision processor can be programmed to generate diverse dynamic behavior that may be used for spatio-temporal stabilization (STS), short-term visual memory (STVM), spatio-temporal filtering (STF) and pulse frequency modulation (PFM). A multi- functional vision sensor that performs a variety of information processing operations on time- varying two-dimensional sensory images can be constructed from a parallel and hierarchical structure of numerous individually programmed PN neural processors.

Microscopy imaging system and method employing stimulated raman spectroscopy as a contrast mechanism

DOEpatents

Xie, Xiaoliang Sunney [Lexington, MA; Freudiger, Christian [Boston, MA; Min, Wei [Cambridge, MA

2011-09-27

A microscopy imaging system includes a first light source for providing a first train of pulses at a first center optical frequency .omega..sub.1, a second light source for providing a second train of pulses at a second center optical frequency .omega..sub.2, a modulator system, an optical detector, and a processor. The modulator system is for modulating a beam property of the second train of pulses at a modulation frequency f of at least 100 kHz. The optical detector is for detecting an integrated intensity of substantially all optical frequency components of the first train of pulses from the common focal volume by blocking the second train of pulses being modulated. The processor is for detecting, a modulation at the modulation frequency f, of the integrated intensity of the optical frequency components of the first train of pulses to provide a pixel of an image for the microscopy imaging system.

Joint Carrier-Phase Synchronization and LDPC Decoding

NASA Technical Reports Server (NTRS)

Simon, Marvin; Valles, Esteban

2009-01-01

A method has been proposed to increase the degree of synchronization of a radio receiver with the phase of a suppressed carrier signal modulated with a binary- phase-shift-keying (BPSK) or quaternary- phase-shift-keying (QPSK) signal representing a low-density parity-check (LDPC) code. This method is an extended version of the method described in Using LDPC Code Constraints to Aid Recovery of Symbol Timing (NPO-43112), NASA Tech Briefs, Vol. 32, No. 10 (October 2008), page 54. Both methods and the receiver architectures in which they would be implemented belong to a class of timing- recovery methods and corresponding receiver architectures characterized as pilotless in that they do not require transmission and reception of pilot signals. The proposed method calls for the use of what is known in the art as soft decision feedback to remove the modulation from a replica of the incoming signal prior to feeding this replica to a phase-locked loop (PLL) or other carrier-tracking stage in the receiver. Soft decision feedback refers to suitably processed versions of intermediate results of iterative computations involved in the LDPC decoding process. Unlike a related prior method in which hard decision feedback (the final sequence of decoded symbols) is used to remove the modulation, the proposed method does not require estimation of the decoder error probability. In a basic digital implementation of the proposed method, the incoming signal (having carrier phase theta theta (sub c) plus noise would first be converted to inphase (I) and quadrature (Q) baseband signals by mixing it with I and Q signals at the carrier frequency [wc/(2 pi)] generated by a local oscillator. The resulting demodulated signals would be processed through one-symbol-period integrate and- dump filters, the outputs of which would be sampled and held, then multiplied by a soft-decision version of the baseband modulated signal. The resulting I and Q products consist of terms proportional to the cosine and sine of the carrier phase cc as well as correlated noise components. These products would be fed as inputs to a digital PLL that would include a number-controlled oscillator (NCO), which provides an estimate of the carrier phase, theta(sub c).

Generic accelerated sequence alignment in SeqAn using vectorization and multi-threading.

PubMed

Rahn, René; Budach, Stefan; Costanza, Pascal; Ehrhardt, Marcel; Hancox, Jonny; Reinert, Knut

2018-05-03

Pairwise sequence alignment is undoubtedly a central tool in many bioinformatics analyses. In this paper, we present a generically accelerated module for pairwise sequence alignments applicable for a broad range of applications. In our module, we unified the standard dynamic programming kernel used for pairwise sequence alignments and extended it with a generalized inter-sequence vectorization layout, such that many alignments can be computed simultaneously by exploiting SIMD (Single Instruction Multiple Data) instructions of modern processors. We then extended the module by adding two layers of thread-level parallelization, where we a) distribute many independent alignments on multiple threads and b) inherently parallelize a single alignment computation using a work stealing approach producing a dynamic wavefront progressing along the minor diagonal. We evaluated our alignment vectorization and parallelization on different processors, including the newest Intel® Xeon® (Skylake) and Intel® Xeon Phi™ (KNL) processors, and use cases. The instruction set AVX512-BW (Byte and Word), available on Skylake processors, can genuinely improve the performance of vectorized alignments. We could run single alignments 1600 times faster on the Xeon Phi™ and 1400 times faster on the Xeon® than executing them with our previous sequential alignment module. The module is programmed in C++ using the SeqAn (Reinert et al., 2017) library and distributed with version 2.4. under the BSD license. We support SSE4, AVX2, AVX512 instructions and included UME::SIMD, a SIMD-instruction wrapper library, to extend our module for further instruction sets. We thoroughly test all alignment components with all major C++ compilers on various platforms. rene.rahn@fu-berlin.de.

Verification of a Proposed Clinical Electroacoustic Test Protocol for Personal Digital Modulation Receivers Coupled to Cochlear Implant Sound Processors.

PubMed

Nair, Erika L; Sousa, Rhonda; Wannagot, Shannon

Guidelines established by the AAA currently recommend behavioral testing when fitting frequency modulated (FM) systems to individuals with cochlear implants (CIs). A protocol for completing electroacoustic measures has not yet been validated for personal FM systems or digital modulation (DM) systems coupled to CI sound processors. In response, some professionals have used or altered the AAA electroacoustic verification steps for fitting FM systems to hearing aids when fitting FM systems to CI sound processors. More recently steps were outlined in a proposed protocol. The purpose of this research is to review and compare the electroacoustic test measures outlined in a 2013 article by Schafer and colleagues in the Journal of the American Academy of Audiology titled "A Proposed Electroacoustic Test Protocol for Personal FM Receivers Coupled to Cochlear Implant Sound Processors" to the AAA electroacoustic verification steps for fitting FM systems to hearing aids when fitting DM systems to CI users. Electroacoustic measures were conducted on 71 CI sound processors and Phonak Roger DM systems using a proposed protocol and an adapted AAA protocol. Phonak's recommended default receiver gain setting was used for each CI sound processor manufacturer and adjusted if necessary to achieve transparency. Electroacoustic measures were conducted on Cochlear and Advanced Bionics (AB) sound processors. In this study, 28 Cochlear Nucleus 5/CP810 sound processors, 26 Cochlear Nucleus 6/CP910 sound processors, and 17 AB Naida CI Q70 sound processors were coupled in various combinations to Phonak Roger DM dedicated receivers (25 Phonak Roger 14 receivers-Cochlear dedicated receiver-and 9 Phonak Roger 17 receivers-AB dedicated receiver) and 20 Phonak Roger Inspiro transmitters. Employing both the AAA and the Schafer et al protocols, electroacoustic measurements were conducted with the Audioscan Verifit in a clinical setting on 71 CI sound processors and Phonak Roger DM systems to determine transparency and verify FM advantage, comparing speech inputs (65 dB SPL) in an effort to achieve equal outputs. If transparency was not achieved at Phonak's recommended default receiver gain, adjustments were made to the receiver gain. The integrity of the signal was monitored with the appropriate manufacturer's monitor earphones. Using the AAA hearing aid protocol, 50 of the 71 CI sound processors achieved transparency, and 59 of the 71 CI sound processors achieved transparency when using the proposed protocol at Phonak's recommended default receiver gain. After the receiver gain was adjusted, 3 of 21 CI sound processors still did not meet transparency using the AAA protocol, and 2 of 12 CI sound processors still did not meet transparency using the Schafer et al proposed protocol. Both protocols were shown to be effective in taking reliable electroacoustic measurements and demonstrate transparency. Both protocols are felt to be clinically feasible and to address the needs of populations that are unable to reliably report regarding the integrity of their personal DM systems. American Academy of Audiology

Antenna unit and radio base station therewith

DOEpatents

Kuwahara, Mikio; Doi, Nobukazu; Suzuki, Toshiro; Ishida, Yuji; Inoue, Takashi; Niida, Sumaru

2007-04-10

Phase and amplitude deviations, which are generated, for example, by cables connecting an array antenna of a CDMA base station and the base station, are calibrated in the baseband. The base station comprises: an antenna apparatus 1; couplers 2; an RF unit 3 that converts a receive signal to a baseband signal, converts a transmit signal to a radio frequency, and performs power control; an A/D converter 4 for converting a receive signal to a digital signal; a receive beam form unit 6 that multiplies the receive signal by semi-fixed weight; a despreader 7 for this signal input; a time-space demodulator 8 for demodulating user data; a despreader 9 for probe signal; a space modulator 14 for user data; a spreader 13 for user signal; a channel combiner 12; a Tx calibrater 11 for controlling calibration of a signal; a D/A converter 10; a unit 16 for calculation of correlation matrix for generating a probe signal used for controlling an Rx calibration system and a TX calibration system; a spreader 17 for probe signal; a power control unit 18; a D/A converter 19; an RF unit 20 for probe signal; an A/D converter 21 for signal from the couplers 2; and a despreader 22.

SPECIAL ISSUE ON OPTICAL PROCESSING OF INFORMATION: Optoelectronic processors with scanning CCD photodetectors

NASA Astrophysics Data System (ADS)

Esepkina, N. A.; Lavrov, A. P.; Anan'ev, M. N.; Blagodarnyi, V. S.; Ivanov, S. I.; Mansyrev, M. I.; Molodyakov, S. A.

1995-10-01

Two new types of optoelectronic radio-signal processors were investigated. Charge-coupled device (CCD) photodetectors are used in these processors under continuous scanning conditions, i.e. in a time delay and storage mode. One of these processors is based on a CCD photodetector array with a reference-signal amplitude transparency and the other is an adaptive acousto-optical signal processor with linear frequency modulation. The processor with the transparency performs multichannel discrete—analogue convolution of an input signal with a corresponding kernel of the transformation determined by the transparency. If a light source is an array of light-emitting diodes of special (stripe) geometry, the optical stages of the processor can be made from optical fibre components and the whole processor then becomes a rigid 'sandwich' (a compact hybrid optoelectronic microcircuit). A report is given also of a study of a prototype processor with optical fibre components for the reception of signals from a system with antenna aperture synthesis, which forms a radio image of the Earth.

Multi-processor including data flow accelerator module

DOEpatents

Davidson, George S.; Pierce, Paul E.

1990-01-01

An accelerator module for a data flow computer includes an intelligent memory. The module is added to a multiprocessor arrangement and uses a shared tagged memory architecture in the data flow computer. The intelligent memory module assigns locations for holding data values in correspondence with arcs leading to a node in a data dependency graph. Each primitive computation is associated with a corresponding memory cell, including a number of slots for operands needed to execute a primitive computation, a primitive identifying pointer, and linking slots for distributing the result of the cell computation to other cells requiring that result as an operand. Circuitry is provided for utilizing tag bits to determine automatically when all operands required by a processor are available and for scheduling the primitive for execution in a queue. Each memory cell of the module may be associated with any of the primitives, and the particular primitive to be executed by the processor associated with the cell is identified by providing an index, such as the cell number for the primitive, to the primitive lookup table of starting addresses. The module thus serves to perform functions previously performed by a number of sections of data flow architectures and coexists with conventional shared memory therein. A multiprocessing system including the module operates in a hybrid mode, wherein the same processing modules are used to perform some processing in a sequential mode, under immediate control of an operating system, while performing other processing in a data flow mode.

Hardware Architecture Study for NASA's Space Software Defined Radios

NASA Technical Reports Server (NTRS)

Reinhart, Richard C.; Scardelletti, Maximilian C.; Mortensen, Dale J.; Kacpura, Thomas J.; Andro, Monty; Smith, Carl; Liebetreu, John

2008-01-01

This study defines a hardware architecture approach for software defined radios to enable commonality among NASA space missions. The architecture accommodates a range of reconfigurable processing technologies including general purpose processors, digital signal processors, field programmable gate arrays (FPGAs), and application-specific integrated circuits (ASICs) in addition to flexible and tunable radio frequency (RF) front-ends to satisfy varying mission requirements. The hardware architecture consists of modules, radio functions, and and interfaces. The modules are a logical division of common radio functions that comprise a typical communication radio. This paper describes the architecture details, module definitions, and the typical functions on each module as well as the module interfaces. Trade-offs between component-based, custom architecture and a functional-based, open architecture are described. The architecture does not specify the internal physical implementation within each module, nor does the architecture mandate the standards or ratings of the hardware used to construct the radios.

Space Telecommunications Radio Systems (STRS) Hardware Architecture Standard: Release 1.0 Hardware Section

NASA Technical Reports Server (NTRS)

Reinhart, Richard C.; Kacpura, Thomas J.; Smith, Carl R.; Liebetreu, John; Hill, Gary; Mortensen, Dale J.; Andro, Monty; Scardelletti, Maximilian C.; Farrington, Allen

2008-01-01

This report defines a hardware architecture approach for software-defined radios to enable commonality among NASA space missions. The architecture accommodates a range of reconfigurable processing technologies including general-purpose processors, digital signal processors, field programmable gate arrays, and application-specific integrated circuits (ASICs) in addition to flexible and tunable radiofrequency front ends to satisfy varying mission requirements. The hardware architecture consists of modules, radio functions, and interfaces. The modules are a logical division of common radio functions that compose a typical communication radio. This report describes the architecture details, the module definitions, the typical functions on each module, and the module interfaces. Tradeoffs between component-based, custom architecture and a functional-based, open architecture are described. The architecture does not specify a physical implementation internally on each module, nor does the architecture mandate the standards or ratings of the hardware used to construct the radios.

Nyquist-WDM filter shaping with a high-resolution colorless photonic spectral processor.

PubMed

Sinefeld, David; Ben-Ezra, Shalva; Marom, Dan M

2013-09-01

We employ a spatial-light-modulator-based colorless photonic spectral processor with a spectral addressability of 100 MHz along 100 GHz bandwidth, for multichannel, high-resolution reshaping of Gaussian channel response to square-like shape, compatible with Nyquist WDM requirements.

Theory of Remote Image Formation

NASA Astrophysics Data System (ADS)

Blahut, Richard E.

2004-11-01

In many applications, images, such as ultrasonic or X-ray signals, are recorded and then analyzed with digital or optical processors in order to extract information. Such processing requires the development of algorithms of great precision and sophistication. This book presents a unified treatment of the mathematical methods that underpin the various algorithms used in remote image formation. The author begins with a review of transform and filter theory. He then discusses two- and three-dimensional Fourier transform theory, the ambiguity function, image construction and reconstruction, tomography, baseband surveillance systems, and passive systems (where the signal source might be an earthquake or a galaxy). Information-theoretic methods in image formation are also covered, as are phase errors and phase noise. Throughout the book, practical applications illustrate theoretical concepts, and there are many homework problems. The book is aimed at graduate students of electrical engineering and computer science, and practitioners in industry. Presents a unified treatment of the mathematical methods that underpin the algorithms used in remote image formation Illustrates theoretical concepts with reference to practical applications Provides insights into the design parameters of real systems

Advanced development of a programmable power processor

NASA Technical Reports Server (NTRS)

Lukens, F. E.; Lanier, J. R., Jr.; Kapustka, R. E.; Graves, J.

1980-01-01

The need for the development of a multipurpose flexible programmable power processor (PPP) has increased significantly in recent years to reduce ever rising development costs. One of the program requirements the PPP specification will cover is the 25 kW power module power conversion needs. The 25 kW power module could support the Space Shuttle program during the 1980s and 1990s and could be the stepping stone to future large space programs. Trades that led to selection of a microprocessor controlled power processor are briefly discussed. Emphasis is given to the power processing equipment that uses a microprocessor to provide versatility that allows multiple use and to provide for future growth by reprogramming output voltage to a higher level (to 120 V from 30 V). Component selection and design considerations are also discussed.

VENTURE/PC manual: A multidimensional multigroup neutron diffusion code system. Version 3

DOE Office of Scientific and Technical Information (OSTI.GOV)

Shapiro, A.; Huria, H.C.; Cho, K.W.

1991-12-01

VENTURE/PC is a recompilation of part of the Oak Ridge BOLD VENTURE code system, which will operate on an IBM PC or compatible computer. Neutron diffusion theory solutions are obtained for multidimensional, multigroup problems. This manual contains information associated with operating the code system. The purpose of the various modules used in the code system, and the input for these modules are discussed. The PC code structure is also given. Version 2 included several enhancements not given in the original version of the code. In particular, flux iterations can be done in core rather than by reading and writing tomore » disk, for problems which allow sufficient memory for such in-core iterations. This speeds up the iteration process. Version 3 does not include any of the special processors used in the previous versions. These special processors utilized formatted input for various elements of the code system. All such input data is now entered through the Input Processor, which produces standard interface files for the various modules in the code system. In addition, a Standard Interface File Handbook is included in the documentation which is distributed with the code, to assist in developing the input for the Input Processor.« less

Image matrix processor for fast multi-dimensional computations

DOEpatents

Roberson, G.P.; Skeate, M.F.

1996-10-15

An apparatus for multi-dimensional computation is disclosed which comprises a computation engine, including a plurality of processing modules. The processing modules are configured in parallel and compute respective contributions to a computed multi-dimensional image of respective two dimensional data sets. A high-speed, parallel access storage system is provided which stores the multi-dimensional data sets, and a switching circuit routes the data among the processing modules in the computation engine and the storage system. A data acquisition port receives the two dimensional data sets representing projections through an image, for reconstruction algorithms such as encountered in computerized tomography. The processing modules include a programmable local host, by which they may be configured to execute a plurality of different types of multi-dimensional algorithms. The processing modules thus include an image manipulation processor, which includes a source cache, a target cache, a coefficient table, and control software for executing image transformation routines using data in the source cache and the coefficient table and loading resulting data in the target cache. The local host processor operates to load the source cache with a two dimensional data set, loads the coefficient table, and transfers resulting data out of the target cache to the storage system, or to another destination. 10 figs.

GNAQPMS v1.1: accelerating the Global Nested Air Quality Prediction Modeling System (GNAQPMS) on Intel Xeon Phi processors

NASA Astrophysics Data System (ADS)

Wang, Hui; Chen, Huansheng; Wu, Qizhong; Lin, Junmin; Chen, Xueshun; Xie, Xinwei; Wang, Rongrong; Tang, Xiao; Wang, Zifa

2017-08-01

The Global Nested Air Quality Prediction Modeling System (GNAQPMS) is the global version of the Nested Air Quality Prediction Modeling System (NAQPMS), which is a multi-scale chemical transport model used for air quality forecast and atmospheric environmental research. In this study, we present the porting and optimisation of GNAQPMS on a second-generation Intel Xeon Phi processor, codenamed Knights Landing (KNL). Compared with the first-generation Xeon Phi coprocessor (codenamed Knights Corner, KNC), KNL has many new hardware features such as a bootable processor, high-performance in-package memory and ISA compatibility with Intel Xeon processors. In particular, we describe the five optimisations we applied to the key modules of GNAQPMS, including the CBM-Z gas-phase chemistry, advection, convection and wet deposition modules. These optimisations work well on both the KNL 7250 processor and the Intel Xeon E5-2697 V4 processor. They include (1) updating the pure Message Passing Interface (MPI) parallel mode to the hybrid parallel mode with MPI and OpenMP in the emission, advection, convection and gas-phase chemistry modules; (2) fully employing the 512 bit wide vector processing units (VPUs) on the KNL platform; (3) reducing unnecessary memory access to improve cache efficiency; (4) reducing the thread local storage (TLS) in the CBM-Z gas-phase chemistry module to improve its OpenMP performance; and (5) changing the global communication from writing/reading interface files to MPI functions to improve the performance and the parallel scalability. These optimisations greatly improved the GNAQPMS performance. The same optimisations also work well for the Intel Xeon Broadwell processor, specifically E5-2697 v4. Compared with the baseline version of GNAQPMS, the optimised version was 3.51 × faster on KNL and 2.77 × faster on the CPU. Moreover, the optimised version ran at 26 % lower average power on KNL than on the CPU. With the combined performance and energy improvement, the KNL platform was 37.5 % more efficient on power consumption compared with the CPU platform. The optimisations also enabled much further parallel scalability on both the CPU cluster and the KNL cluster scaled to 40 CPU nodes and 30 KNL nodes, with a parallel efficiency of 70.4 and 42.2 %, respectively.

Input data requirements for special processors in the computation system containing the VENTURE neutronics code. [LMFBR

DOE Office of Scientific and Technical Information (OSTI.GOV)

Vondy, D.R.; Fowler, T.B.; Cunningham, G.W.

1979-07-01

User input data requirements are presented for certain special processors in a nuclear reactor computation system. These processors generally read data in formatted form and generate binary interface data files. Some data processing is done to convert from the user oriented form to the interface file forms. The VENTURE diffusion theory neutronics code and other computation modules in this system use the interface data files which are generated.

Ultrasonic Device for Assessing the Quality of a Wire Crimp

NASA Technical Reports Server (NTRS)

Yost, William T. (Inventor); Perey, Daniel F. (Inventor); Cramer, Karl E. (Inventor)

2015-01-01

A system for determining the quality of an electrical wire crimp between a wire and ferrule includes an ultrasonically equipped crimp tool (UECT) configured to transmit an ultrasonic acoustic wave through a wire and ferrule, and a signal processor in communication with the UECT. The signal processor includes a signal transmitting module configured to transmit the ultrasonic acoustic wave via an ultrasonic transducer, signal receiving module configured to receive the ultrasonic acoustic wave after it passes through the wire and ferrule, and a signal analysis module configured to identify signal differences between the ultrasonic waves. The signal analysis module is then configured to compare the signal differences attributable to the wire crimp to a baseline, and to provide an output signal if the signal differences deviate from the baseline.

Parallel PWMs Based Fully Digital Transmitter with Wide Carrier Frequency Range

PubMed Central

Zhou, Bo; Zhang, Kun; Zhou, Wenbiao; Zhang, Yanjun; Liu, Dake

2013-01-01

The carrier-frequency (CF) and intermediate-frequency (IF) pulse-width modulators (PWMs) based on delay lines are proposed, where baseband signals are conveyed by both positions and pulse widths or densities of the carrier clock. By combining IF-PWM and precorrected CF-PWM, a fully digital transmitter with unit-delay autocalibration is implemented in 180 nm CMOS for high reconfiguration. The proposed architecture achieves wide CF range of 2 M–1 GHz, high power efficiency of 70%, and low error vector magnitude (EVM) of 3%, with spectrum purity of 20 dB optimized in comparison to the existing designs. PMID:24223503

Residual and suppressed-carrier arraying techniques for deep-space communications

NASA Technical Reports Server (NTRS)

Shihabi, M.; Shah, B.; Hinedi, S.; Million, S.

1995-01-01

Three techniques that use carrier information from multiple antennas to enhance carrier acquisition and tracking are presented. These techniques in combination with baseband combining are analyzed and simulated for residual and suppressed-carrier modulation. It is shown that the carrier arraying using a single carrier loop technique can acquire and track the carrier even when any single antenna in the array cannot do so by itself. The carrier aiding and carrier arraying using multiple carrier loop techniques, on the other hand, are shown to lock on the carrier only when one of the array elements has sufficient margin to acquire the carrier on its own.

Program on application of communications satellites to educational development: Design of a 12 channel FM microwave receiver. [color television from communication satellites

NASA Technical Reports Server (NTRS)

Risch, C. O.; Rosenbaum, F. J.; Gregory, R. O.

1974-01-01

The design, fabrication, and performance of elements of a low cost FM microwave satellite ground station receiver is described. It is capable of accepting 12 contiguous color television equivalent bandwidth channels in the 11.72 to 12.2 GHz band. Each channel is 40 MHz wide and incorporates a 4 MHz guard band. The modulation format is wideband FM and the channels are frequency division multiplexed. Twelve independent CATV compatible baseband outputs are provided. The overall system specifications are first discussed, then consideration is given to the receiver subsystems and the signal branching network.

Smart Sensor Network for Aircraft Corrosion Monitoring

DTIC Science & Technology

2010-02-01

Network Elements – Hub, Network capable application processor ( NCAP ) – Node, Smart transducer interface module (STIM)  Corrosion Sensing and...software Transducer software Network Protocol 1451.2 1451.3 1451.5 1451.6 1451.7 I/O Node -processor Power TEDS Smart Sensor Hub ( NCAP ) IEEE 1451.0 and

System support software for the Space Ultrareliable Modular Computer (SUMC)

NASA Technical Reports Server (NTRS)

Hill, T. E.; Hintze, G. C.; Hodges, B. C.; Austin, F. A.; Buckles, B. P.; Curran, R. T.; Lackey, J. D.; Payne, R. E.

1974-01-01

The highly transportable programming system designed and implemented to support the development of software for the Space Ultrareliable Modular Computer (SUMC) is described. The SUMC system support software consists of program modules called processors. The initial set of processors consists of the supervisor, the general purpose assembler for SUMC instruction and microcode input, linkage editors, an instruction level simulator, a microcode grid print processor, and user oriented utility programs. A FORTRAN 4 compiler is undergoing development. The design facilitates the addition of new processors with a minimum effort and provides the user quasi host independence on the ground based operational software development computer. Additional capability is provided to accommodate variations in the SUMC architecture without consequent major modifications in the initial processors.

System-wide power management control via clock distribution network

DOEpatents

Coteus, Paul W.; Gara, Alan; Gooding, Thomas M.; Haring, Rudolf A.; Kopcsay, Gerard V.; Liebsch, Thomas A.; Reed, Don D.

2015-05-19

An apparatus, method and computer program product for automatically controlling power dissipation of a parallel computing system that includes a plurality of processors. A computing device issues a command to the parallel computing system. A clock pulse-width modulator encodes the command in a system clock signal to be distributed to the plurality of processors. The plurality of processors in the parallel computing system receive the system clock signal including the encoded command, and adjusts power dissipation according to the encoded command.

Pilot symbol-assisted beamforming algorithms in the WCDMA reverse link

NASA Astrophysics Data System (ADS)

Kong, Dongkeon; Lee, Jong H.; Chun, Joohwan; Woo, Yeon Sik; Soh, Ju Won

2001-08-01

We present a pilot symbol-assisted beamforming algorithm and a simulation tool of smart antennas for Wideband Code Division Multiple Access (WCDMA) in reverse link. In the 3GPP WCDMA system smart antenna technology has more room to play with than in the second generation wireless mobile systems such as IS-95 because the pilot symbol in Dedicated Physical Control Channel (DPCCH) can be utilized. First we show a smart antenna structure and adaptation algorithms, and then we explain a low-level smart antenna implementation using Simulink and MATLAB. In the design of our smart antenna system we pay special attention for the easiness of the interface to the baseband modem; Our ultimate goal is to implement a baseband smart antenna chip sets that can easily be added to to-be-existed baseband WCDMA modem units.

Design of an FMCW radar baseband signal processing system for automotive application.

PubMed

Lin, Jau-Jr; Li, Yuan-Ping; Hsu, Wei-Chiang; Lee, Ta-Sung

2016-01-01

For a typical FMCW automotive radar system, a new design of baseband signal processing architecture and algorithms is proposed to overcome the ghost targets and overlapping problems in the multi-target detection scenario. To satisfy the short measurement time constraint without increasing the RF front-end loading, a three-segment waveform with different slopes is utilized. By introducing a new pairing mechanism and a spatial filter design algorithm, the proposed detection architecture not only provides high accuracy and reliability, but also requires low pairing time and computational loading. This proposed baseband signal processing architecture and algorithms balance the performance and complexity, and are suitable to be implemented in a real automotive radar system. Field measurement results demonstrate that the proposed automotive radar signal processing system can perform well in a realistic application scenario.

Effects of input processing and type of personal frequency modulation system on speech-recognition performance of adults with cochlear implants.

PubMed

Wolfe, Jace; Schafer, Erin; Parkinson, Aaron; John, Andrew; Hudson, Mary; Wheeler, Julie; Mucci, Angie

2013-01-01

The objective of this study was to compare speech recognition in quiet and in noise for cochlear implant recipients using two different types of personal frequency modulation (FM) systems (directly coupled [direct auditory input] versus induction neckloop) with each of two sound processors (Cochlear Nucleus Freedom versus Cochlear Nucleus 5). Two different experiments were conducted within this study. In both these experiments, mixing of the FM signal within the Freedom processor was implemented via the same scheme used clinically for the Freedom sound processor. In Experiment 1, the aforementioned comparisons were conducted with the Nucleus 5 programmed so that the microphone and FM signals were mixed and then the mixed signals were subjected to autosensitivity control (ASC). In Experiment 2, comparisons between the two FM systems and processors were conducted again with the Nucleus 5 programmed to provide a more complex multistage implementation of ASC during the preprocessing stage. This study was a within-subject, repeated-measures design. Subjects were recruited from the patient population at the Hearts for Hearing Foundation in Oklahoma City, OK. Fifteen subjects participated in Experiment 1, and 16 subjects participated in Experiment 2. Subjects were adults who had used either unilateral or bilateral cochlear implants for at least 1 year. In this experiment, no differences were found in speech recognition in quiet obtained with the two different FM systems or the various sound-processor conditions. With each sound processor, speech recognition in noise was better with the directly coupled direct auditory input system relative to the neckloop system. The multistage ASC processing of the Nucleus 5 sound processor provided better performance than the single-stage approach for the Nucleus 5 and the Nucleus Freedom sound processor. Speech recognition in noise is substantially affected by the type of sound processor, FM system, and implementation of ASC used by a Cochlear implant recipient.

Composite rogue waves and modulation instability for the three-coupled Hirota system in an optical fiber

NASA Astrophysics Data System (ADS)

Chai, Han-Peng; Tian, Bo; Chai, Jun; Du, Zhong

2017-10-01

We investigate the three-coupled Hirota system, which is applied to model the long distance communication and ultrafast signal routing systems governing the propagation of light pulses. With the aid of the Darboux dressing transformation, composite rogue wave solutions are derived. Spatial-temporal structures, including the four-petaled structure for the three-coupled Hirota system, are exhibited. We find that the four-petaled rogue waves occur in two of the three components, whereas the eye-shaped rogue wave occurs in the other one. The composite rogue waves can split up into two or three single rogue waves. The corresponding conditions for the occurrence of such phenomena are discussed and presented. We find that the relative position of every single rogue wave is influenced by the ratios of certain parameters. Besides, the linear instability analysis is performed, and our results agree with those from the baseband modulation instability theory.

Optical single sideband millimeter-wave signal generation and transmission using 120° hybrid coupler

NASA Astrophysics Data System (ADS)

Zheng, Zhiwei; Peng, Miao; Zhou, Hui; Chen, Ming; Jiang, Leyong; Tan, Li; Dai, Xiaoyu; Xiang, Yuanjiang

2018-03-01

We propose a novel 60 GHz optical single sideband (OSSB) millimeter-wave (mm-wave) signal generation scheme using 120° hybrid coupler based on external integrated Mach-Zehnder modulator (MZM). The proposed scheme shows that the bit error ratio (BER) performance is improved by suppressing the +2nd-order sideband. Meanwhile, the transmission distance is extended as only the optical +1st-order sideband is modulated by using 5 Gbit/s baseband signal while the carrier is blank, owing to the elimination of walk-off effect suffered from fiber dispersion. The simulation results demonstrated that the eye diagrams of the generated 60 GHz OSSB signal keep open and clear after 100 km standard single-mode fiber (SSMF). In addition, the proposed scheme can achieve 2 dB receiver sensitivity improvements than the conventional 90° hybrid coupler when transmitted over 100 km SSMF at a BER of 10-9.

Methods and Apparatus for Aggregation of Multiple Pulse Code Modulation Channels into a Signal Time Division Multiplexing Stream

NASA Technical Reports Server (NTRS)

Chang, Chen J. (Inventor); Liaghati, Jr., Amir L. (Inventor); Liaghati, Mahsa L. (Inventor)

2018-01-01

Methods and apparatus are provided for telemetry processing using a telemetry processor. The telemetry processor can include a plurality of communications interfaces, a computer processor, and data storage. The telemetry processor can buffer sensor data by: receiving a frame of sensor data using a first communications interface and clock data using a second communications interface, receiving an end of frame signal using a third communications interface, and storing the received frame of sensor data in the data storage. After buffering the sensor data, the telemetry processor can generate an encapsulated data packet including a single encapsulated data packet header, the buffered sensor data, and identifiers identifying telemetry devices that provided the sensor data. A format of the encapsulated data packet can comply with a Consultative Committee for Space Data Systems (CCSDS) standard. The telemetry processor can send the encapsulated data packet using a fourth and a fifth communications interfaces.

Electro-optic voltage sensor with Multiple Beam Splitting

DOEpatents

Woods, Gregory K.; Renak, Todd W.; Crawford, Thomas M.; Davidson, James R.

2000-01-01

A miniature electro-optic voltage sensor system capable of accurate operation at high voltages without use of the dedicated voltage dividing hardware. The invention achieves voltage measurement without significant error contributions from neighboring conductors or environmental perturbations. The invention employs a transmitter, a sensor, a detector, and a signal processor. The transmitter produces a beam of electromagnetic radiation which is routed into the sensor. Within the sensor the beam undergoes the Pockels electro-optic effect. The electro-optic effect produces a modulation of the beam's polarization, which is in turn converted to a pair of independent conversely-amplitude-modulated signals, from which the voltage of the E-field is determined by the signal processor. The use of converse AM signals enables the signal processor to better distinguish signal from noise. The sensor converts the beam by splitting the beam in accordance with the axes of the beam's polarization state (an ellipse) into at least two AM signals. These AM signals are fed into a signal processor and processed to determine the voltage between a ground conductor and the conductor on which voltage is being measured.

A comparison between coherent and noncoherent mobile systems in large Doppler shift, delay spread, and C/I environment

NASA Technical Reports Server (NTRS)

Feher, Kamilo

1993-01-01

The performance and implementation complexity of coherent and of noncoherent QPSK and GMSK modulation/demodulation techniques in a complex mobile satellite systems environment, including large Doppler shift, delay spread, and low C/I, are compared. We demonstrate that for large f(sub d)T(sub b) products, where f(sub d) is the Doppler shift and T(sub b) is the bit duration, noncoherent (discriminator detector or differential demodulation) systems have a lower BER floor than their coherent counterparts. For significant delay spreads, e.g., tau(sub rms) greater than 0.4 T(sub b), and low C/I, coherent systems outperform noncoherent systems. However, the synchronization time of coherent systems is longer than that of noncoherent systems. Spectral efficiency, overall capacity, and related hardware complexity issues of these systems are also analyzed. We demonstrate that coherent systems have a simpler overall architecture (IF filter implementation-cost versus carrier recovery) and are more robust in an RF frequency drift environment. Additionally, the prediction tools, computer simulations, and analysis of coherent systems is simpler. The threshold or capture effect in low C/I interference environment is critical for noncoherent discriminator based systems. We conclude with a comparison of hardware architectures of coherent and of noncoherent systems, including recent trends in commercial VLSI technology and direct baseband to RF transmit, RF to baseband (0-IF) receiver implementation strategies.

A comparison between coherent and noncoherent mobile systems in large Doppler shift, delay spread, and C/I environment

NASA Astrophysics Data System (ADS)

Feher, Kamilo

The performance and implementation complexity of coherent and of noncoherent QPSK and GMSK modulation/demodulation techniques in a complex mobile satellite systems environment, including large Doppler shift, delay spread, and low C/I, are compared. We demonstrate that for large f(sub d)T(sub b) products, where f(sub d) is the Doppler shift and T(sub b) is the bit duration, noncoherent (discriminator detector or differential demodulation) systems have a lower BER floor than their coherent counterparts. For significant delay spreads, e.g., tau(sub rms) greater than 0.4 T(sub b), and low C/I, coherent systems outperform noncoherent systems. However, the synchronization time of coherent systems is longer than that of noncoherent systems. Spectral efficiency, overall capacity, and related hardware complexity issues of these systems are also analyzed. We demonstrate that coherent systems have a simpler overall architecture (IF filter implementation-cost versus carrier recovery) and are more robust in an RF frequency drift environment. Additionally, the prediction tools, computer simulations, and analysis of coherent systems is simpler. The threshold or capture effect in low C/I interference environment is critical for noncoherent discriminator based systems. We conclude with a comparison of hardware architectures of coherent and of noncoherent systems, including recent trends in commercial VLSI technology and direct baseband to RF transmit, RF to baseband (0-IF) receiver implementation strategies.

Large constraint length high speed viterbi decoder based on a modular hierarchial decomposition of the deBruijn graph

NASA Technical Reports Server (NTRS)

Collins, Oliver (Inventor); Dolinar, Jr., Samuel J. (Inventor); Hus, In-Shek (Inventor); Bozzola, Fabrizio P. (Inventor); Olson, Erlend M. (Inventor); Statman, Joseph I. (Inventor); Zimmerman, George A. (Inventor)

1991-01-01

A method of formulating and packaging decision-making elements into a long constraint length Viterbi decoder which involves formulating the decision-making processors as individual Viterbi butterfly processors that are interconnected in a deBruijn graph configuration. A fully distributed architecture, which achieves high decoding speeds, is made feasible by novel wiring and partitioning of the state diagram. This partitioning defines universal modules, which can be used to build any size decoder, such that a large number of wires is contained inside each module, and a small number of wires is needed to connect modules. The total system is modular and hierarchical, and it implements a large proportion of the required wiring internally within modules and may include some external wiring to fully complete the deBruijn graph. pg,14.

The ATLAS Level-1 Calorimeter Trigger: PreProcessor implementation and performance

NASA Astrophysics Data System (ADS)

Åsman, B.; Achenbach, R.; Allbrooke, B. M. M.; Anders, G.; Andrei, V.; Büscher, V.; Bansil, H. S.; Barnett, B. M.; Bauss, B.; Bendtz, K.; Bohm, C.; Bracinik, J.; Brawn, I. P.; Brock, R.; Buttinger, W.; Caputo, R.; Caughron, S.; Cerrito, L.; Charlton, D. G.; Childers, J. T.; Curtis, C. J.; Daniells, A. C.; Davis, A. O.; Davygora, Y.; Dorn, M.; Eckweiler, S.; Edmunds, D.; Edwards, J. P.; Eisenhandler, E.; Ellis, K.; Ermoline, Y.; Föhlisch, F.; Faulkner, P. J. W.; Fedorko, W.; Fleckner, J.; French, S. T.; Gee, C. N. P.; Gillman, A. R.; Goeringer, C.; Hülsing, T.; Hadley, D. R.; Hanke, P.; Hauser, R.; Heim, S.; Hellman, S.; Hickling, R. S.; Hidvégi, A.; Hillier, S. J.; Hofmann, J. I.; Hristova, I.; Ji, W.; Johansen, M.; Keller, M.; Khomich, A.; Kluge, E.-E.; Koll, J.; Laier, H.; Landon, M. P. J.; Lang, V. S.; Laurens, P.; Lepold, F.; Lilley, J. N.; Linnemann, J. T.; Müller, F.; Müller, T.; Mahboubi, K.; Martin, T. A.; Mass, A.; Meier, K.; Meyer, C.; Middleton, R. P.; Moa, T.; Moritz, S.; Morris, J. D.; Mudd, R. D.; Narayan, R.; zur Nedden, M.; Neusiedl, A.; Newman, P. R.; Nikiforov, A.; Ohm, C. C.; Perera, V. J. O.; Pfeiffer, U.; Plucinski, P.; Poddar, S.; Prieur, D. P. F.; Qian, W.; Rieck, P.; Rizvi, E.; Sankey, D. P. C.; Schäfer, U.; Scharf, V.; Schmitt, K.; Schröder, C.; Schultz-Coulon, H.-C.; Schumacher, C.; Schwienhorst, R.; Silverstein, S. B.; Simioni, E.; Snidero, G.; Staley, R. J.; Stamen, R.; Stock, P.; Stockton, M. C.; Tan, C. L. A.; Tapprogge, S.; Thomas, J. P.; Thompson, P. D.; Thomson, M.; True, P.; Watkins, P. M.; Watson, A. T.; Watson, M. F.; Weber, P.; Wessels, M.; Wiglesworth, C.; Williams, S. L.

2012-12-01

The PreProcessor system of the ATLAS Level-1 Calorimeter Trigger (L1Calo) receives about 7200 analogue signals from the electromagnetic and hadronic components of the calorimetric detector system. Lateral division results in cells which are pre-summed to so-called Trigger Towers of size 0.1 × 0.1 along azimuth (phi) and pseudorapidity (η). The received calorimeter signals represent deposits of transverse energy. The system consists of 124 individual PreProcessor modules that digitise the input signals for each LHC collision, and provide energy and timing information to the digital processors of the L1Calo system, which identify physics objects forming much of the basis for the full ATLAS first level trigger decision. This paper describes the architecture of the PreProcessor, its hardware realisation, functionality, and performance.

Optical stereo video signal processor

NASA Technical Reports Server (NTRS)

Craig, G. D. (Inventor)

1985-01-01

An otpical video signal processor is described which produces a two-dimensional cross-correlation in real time of images received by a stereo camera system. The optical image of each camera is projected on respective liquid crystal light valves. The images on the liquid crystal valves modulate light produced by an extended light source. This modulated light output becomes the two-dimensional cross-correlation when focused onto a video detector and is a function of the range of a target with respect to the stereo camera. Alternate embodiments utilize the two-dimensional cross-correlation to determine target movement and target identification.

Technology transfer of military space microprocessor developments

NASA Astrophysics Data System (ADS)

Gorden, C.; King, D.; Byington, L.; Lanza, D.

1999-01-01

Over the past 13 years the Air Force Research Laboratory (AFRL) has led the development of microprocessors and computers for USAF space and strategic missile applications. As a result of these Air Force development programs, advanced computer technology is available for use by civil and commercial space customers as well. The Generic VHSIC Spaceborne Computer (GVSC) program began in 1985 at AFRL to fulfill a deficiency in the availability of space-qualified data and control processors. GVSC developed a radiation hardened multi-chip version of the 16-bit, Mil-Std 1750A microprocessor. The follow-on to GVSC, the Advanced Spaceborne Computer Module (ASCM) program, was initiated by AFRL to establish two industrial sources for complete, radiation-hardened 16-bit and 32-bit computers and microelectronic components. Development of the Control Processor Module (CPM), the first of two ASCM contract phases, concluded in 1994 with the availability of two sources for space-qualified, 16-bit Mil-Std-1750A computers, cards, multi-chip modules, and integrated circuits. The second phase of the program, the Advanced Technology Insertion Module (ATIM), was completed in December 1997. ATIM developed two single board computers based on 32-bit reduced instruction set computer (RISC) processors. GVSC, CPM, and ATIM technologies are flying or baselined into the majority of today's DoD, NASA, and commercial satellite systems.

On-board demux/demod

NASA Technical Reports Server (NTRS)

Sayegh, S.; Kappes, M.; Thomas, J.; Snyder, J.; Eng, M.; Poklemba, John J.; Steber, M.; House, G.

1991-01-01

To make satellite channels cost competitive with optical cables, the use of small, inexpensive earth stations with reduced antenna size and high powered amplifier (HPA) power will be needed. This will necessitate the use of high e.i.r.p. and gain-to-noise temperature ratio (G/T) multibeam satellites. For a multibeam satellite, onboard switching is required in order to maintain the needed connectivity between beams. This switching function can be realized by either an receive frequency (RF) or a baseband unit. The baseband switching approach has the additional advantage of decoupling the up-link and down-link, thus enabling rate and format conversion as well as improving the link performance. A baseband switching satellite requires the demultiplexing and demodulation of the up-link carriers before they can be switched to their assigned down-link beams. Principles of operation, design and implementation issues of such an onboard demultiplexer/demodulator (bulk demodulator) that was recently built at COMSAT Labs. are discussed.

Satellite on-board real-time SAR processor prototype

NASA Astrophysics Data System (ADS)

Bergeron, Alain; Doucet, Michel; Harnisch, Bernd; Suess, Martin; Marchese, Linda; Bourqui, Pascal; Desnoyers, Nicholas; Legros, Mathieu; Guillot, Ludovic; Mercier, Luc; Châteauneuf, François

2017-11-01

A Compact Real-Time Optronic SAR Processor has been successfully developed and tested up to a Technology Readiness Level of 4 (TRL4), the breadboard validation in a laboratory environment. SAR, or Synthetic Aperture Radar, is an active system allowing day and night imaging independent of the cloud coverage of the planet. The SAR raw data is a set of complex data for range and azimuth, which cannot be compressed. Specifically, for planetary missions and unmanned aerial vehicle (UAV) systems with limited communication data rates this is a clear disadvantage. SAR images are typically processed electronically applying dedicated Fourier transformations. This, however, can also be performed optically in real-time. Originally the first SAR images were optically processed. The optical Fourier processor architecture provides inherent parallel computing capabilities allowing real-time SAR data processing and thus the ability for compression and strongly reduced communication bandwidth requirements for the satellite. SAR signal return data are in general complex data. Both amplitude and phase must be combined optically in the SAR processor for each range and azimuth pixel. Amplitude and phase are generated by dedicated spatial light modulators and superimposed by an optical relay set-up. The spatial light modulators display the full complex raw data information over a two-dimensional format, one for the azimuth and one for the range. Since the entire signal history is displayed at once, the processor operates in parallel yielding real-time performances, i.e. without resulting bottleneck. Processing of both azimuth and range information is performed in a single pass. This paper focuses on the onboard capabilities of the compact optical SAR processor prototype that allows in-orbit processing of SAR images. Examples of processed ENVISAT ASAR images are presented. Various SAR processor parameters such as processing capabilities, image quality (point target analysis), weight and size are reviewed.

Advanced satellite communication system

NASA Technical Reports Server (NTRS)

Staples, Edward J.; Lie, Sen

1992-01-01

The objective of this research program was to develop an innovative advanced satellite receiver/demodulator utilizing surface acoustic wave (SAW) chirp transform processor and coherent BPSK demodulation. The algorithm of this SAW chirp Fourier transformer is of the Convolve - Multiply - Convolve (CMC) type, utilizing off-the-shelf reflective array compressor (RAC) chirp filters. This satellite receiver, if fully developed, was intended to be used as an on-board multichannel communications repeater. The Advanced Communications Receiver consists of four units: (1) CMC processor, (2) single sideband modulator, (3) demodulator, and (4) chirp waveform generator and individual channel processors. The input signal is composed of multiple user transmission frequencies operating independently from remotely located ground terminals. This signal is Fourier transformed by the CMC Processor into a unique time slot for each user frequency. The CMC processor is driven by a waveform generator through a single sideband (SSB) modulator. The output of the coherent demodulator is composed of positive and negative pulses, which are the envelopes of the chirp transform processor output. These pulses correspond to the data symbols. Following the demodulator, a logic circuit reconstructs the pulses into data, which are subsequently differentially decoded to form the transmitted data. The coherent demodulation and detection of BPSK signals derived from a CMC chirp transform processor were experimentally demonstrated and bit error rate (BER) testing was performed. To assess the feasibility of such advanced receiver, the results were compared with the theoretical analysis and plotted for an average BER as a function of signal-to-noise ratio. Another goal of this SBIR program was the development of a commercial product. The commercial product developed was an arbitrary waveform generator. The successful sales have begun with the delivery of the first arbitrary waveform generator.

Multiple channel data acquisition system

DOEpatents

Crawley, H. Bert; Rosenberg, Eli I.; Meyer, W. Thomas; Gorbics, Mark S.; Thomas, William D.; McKay, Roy L.; Homer, Jr., John F.

1990-05-22

A multiple channel data acquisition system for the transfer of large amounts of data from a multiplicity of data channels has a plurality of modules which operate in parallel to convert analog signals to digital data and transfer that data to a communications host via a FASTBUS. Each module has a plurality of submodules which include a front end buffer (FEB) connected to input circuitry having an analog to digital converter with cache memory for each of a plurality of channels. The submodules are interfaced with the FASTBUS via a FASTBUS coupler which controls a module bus and a module memory. The system is triggered to effect rapid parallel data samplings which are stored to the cache memories. The cache memories are uploaded to the FEBs during which zero suppression occurs. The data in the FEBs is reformatted and compressed by a local processor during transfer to the module memory. The FASTBUS coupler is used by the communications host to upload the compressed and formatted data from the module memory. The local processor executes programs which are downloaded to the module memory through the FASTBUS coupler.

Multiple channel data acquisition system

DOEpatents

Crawley, H.B.; Rosenberg, E.I.; Meyer, W.T.; Gorbics, M.S.; Thomas, W.D.; McKay, R.L.; Homer, J.F. Jr.

1990-05-22

A multiple channel data acquisition system for the transfer of large amounts of data from a multiplicity of data channels has a plurality of modules which operate in parallel to convert analog signals to digital data and transfer that data to a communications host via a FASTBUS. Each module has a plurality of submodules which include a front end buffer (FEB) connected to input circuitry having an analog to digital converter with cache memory for each of a plurality of channels. The submodules are interfaced with the FASTBUS via a FASTBUS coupler which controls a module bus and a module memory. The system is triggered to effect rapid parallel data samplings which are stored to the cache memories. The cache memories are uploaded to the FEBs during which zero suppression occurs. The data in the FEBs is reformatted and compressed by a local processor during transfer to the module memory. The FASTBUS coupler is used by the communications host to upload the compressed and formatted data from the module memory. The local processor executes programs which are downloaded to the module memory through the FASTBUS coupler. 25 figs.

Novel Robotic Tools for Piping Inspection and Repair

DTIC Science & Technology

2015-01-14

was selected due to its small size, and peripheral capability. The SoM measures 50mm x 44mm. The SoM processor is an ARM Cortex -A8 running at720MHz...designing an embedded computing system from scratch. The SoM is a single integrated module which contains the processor , RAM, power management, and

Multitask neurovision processor with extensive feedback and feedforward connections

NASA Astrophysics Data System (ADS)

Gupta, Madan M.; Knopf, George K.

1991-11-01

A multi-task neuro-vision parameter which performs a variety of information processing operations associated with the early stages of biological vision is presented. The network architecture of this neuro-vision processor, called the positive-negative (PN) neural processor, is loosely based on the neural activity fields exhibited by thalamic and cortical nervous tissue layers. The computational operation performed by the processor arises from the strength of the recurrent feedback among the numerous positive and negative neural computing units. By adjusting the feedback connections it is possible to generate diverse dynamic behavior that may be used for short-term visual memory (STVM), spatio-temporal filtering (STF), and pulse frequency modulation (PFM). The information attributes that are to be processes may be regulated by modifying the feedforward connections from the signal space to the neural processor.

Real-time FPGA-based radar imaging for smart mobility systems

NASA Astrophysics Data System (ADS)

Saponara, Sergio; Neri, Bruno

2016-04-01

The paper presents an X-band FMCW (Frequency Modulated Continuous Wave) Radar Imaging system, called X-FRI, for surveillance in smart mobility applications. X-FRI allows for detecting the presence of targets (e.g. obstacles in a railway crossing or urban road crossing, or ships in a small harbor), as well as their speed and their position. With respect to alternative solutions based on LIDAR or camera systems, X-FRI operates in real-time also in bad lighting and weather conditions, night and day. The radio-frequency transceiver is realized through COTS (Commercial Off The Shelf) components on a single-board. An FPGA-based baseband platform allows for real-time Radar image processing.

Optical millimeter-wave signal generation by frequency quadrupling using one dual-drive Mach-Zehnder modulator to overcome chromatic dispersion

NASA Astrophysics Data System (ADS)

Zhu, Zihang; Zhao, Shanghong; Yao, Zhoushi; Tan, Qinggui; Li, Yongjun; Chu, Xingchun; Shi, Lei; Zhang, Xi

2012-06-01

We propose a novel approach to generate quadrupling-frequency optical millimeter-wave using a dual-drive Mach-Zehnder modulator (MZM) in radio-over-fiber system. By properly adjusting the phase difference in the two modulation arms of MZM, the direct current (DC) bias, the modulation index and the gain of base-band signal, the quadrupling-frequency optical millimeter-wave with signal only carried by one second-order sideband is generated. As the signal is transmitted along the fiber, there is no time shift of the codes caused by chromatic dispersion. Theoretical analysis and simulation results show that the eye diagram keeps open and clear even when the quadrupling-frequency optical millimeter-wave are transmitted over 110 km and the power penalty is about 0.45 dB after fiber transmission distance of 60 km. Furthermore, due to another second-order sideband carrying no signals, a full duplex radio-over-fiber link based on wavelength reuse is also built to simplify the base station. The bidirectional 2.5 Gbit/s data is successfully transmitted over 40 km standard single mode fiber with less than 0.6 dB power penalty in the simulation.

VLSI 'smart' I/O module development

NASA Astrophysics Data System (ADS)

Kirk, Dan

The developmental history, design, and operation of the MIL-STD-1553A/B discrete and serial module (DSM) for the U.S. Navy AN/AYK-14(V) avionics computer are described and illustrated with diagrams. The ongoing preplanned product improvement for the AN/AYK-14(V) includes five dual-redundant MIL-STD-1553 channels based on DSMs. The DSM is a front-end processor for transferring data to and from a common memory, sharing memory with a host processor to provide improved 'smart' input/output performance. Each DSM comprises three hardware sections: three VLSI-6000 semicustomized CMOS arrays, memory units to support the arrays, and buffers and resynchronization circuits. The DSM hardware module design, VLSI-6000 design tools, controlware and test software, and checkout procedures (using a hardware simulator) are characterized in detail.

Mechanically verified hardware implementing an 8-bit parallel IO Byzantine agreement processor

NASA Technical Reports Server (NTRS)

Moore, J. Strother

1992-01-01

Consider a network of four processors that use the Oral Messages (Byzantine Generals) Algorithm of Pease, Shostak, and Lamport to achieve agreement in the presence of faults. Bevier and Young have published a functional description of a single processor that, when interconnected appropriately with three identical others, implements this network under the assumption that the four processors step in synchrony. By formalizing the original Pease, et al work, Bevier and Young mechanically proved that such a network achieves fault tolerance. We develop, formalize, and discuss a hardware design that has been mechanically proven to implement their processor. In particular, we formally define mapping functions from the abstract state space of the Bevier-Young processor to a concrete state space of a hardware module and state a theorem that expresses the claim that the hardware correctly implements the processor. We briefly discuss the Brock-Hunt Formal Hardware Description Language which permits designs both to be proved correct with the Boyer-Moore theorem prover and to be expressed in a commercially supported hardware description language for additional electrical analysis and layout. We briefly describe our implementation.

Bidirectional fiber-wireless and fiber-IVLLC integrated system based on polarization-orthogonal modulation scheme.

PubMed

Lu, Hai-Han; Li, Chung-Yi; Chen, Hwan-Wei; Ho, Chun-Ming; Cheng, Ming-Te; Huang, Sheng-Jhe; Yang, Zih-Yi; Lin, Xin-Yao

2016-07-25

A bidirectional fiber-wireless and fiber-invisible laser light communication (IVLLC) integrated system that employs polarization-orthogonal modulation scheme for hybrid cable television (CATV)/microwave (MW)/millimeter-wave (MMW)/baseband (BB) signal transmission is proposed and demonstrated. To our knowledge, it is the first one that adopts a polarization-orthogonal modulation scheme in a bidirectional fiber-wireless and fiber-IVLLC integrated system with hybrid CATV/MW/MMW/BB signal. For downlink transmission, carrier-to-noise ratio (CNR), composite second-order (CSO), composite triple-beat (CTB), and bit error rate (BER) perform well over 40-km single-mode fiber (SMF) and 10-m RF/50-m optical wireless transport scenarios. For uplink transmission, good BER performance is obtained over 40-km SMF and 50-m optical wireless transport scenario. Such a bidirectional fiber-wireless and fiber-IVLLC integrated system for hybrid CATV/MW/MMW/BB signal transmission will be an attractive alternative for providing broadband integrated services, including CATV, Internet, and telecommunication services. It is shown to be a prominent one to present the advancements for the convergence of fiber backbone and RF/optical wireless feeder.

Metal membrane-type 25-kW methanol fuel processor for fuel-cell hybrid vehicle

NASA Astrophysics Data System (ADS)

Han, Jaesung; Lee, Seok-Min; Chang, Hyuksang

A 25-kW on-board methanol fuel processor has been developed. It consists of a methanol steam reformer, which converts methanol to hydrogen-rich gas mixture, and two metal membrane modules, which clean-up the gas mixture to high-purity hydrogen. It produces hydrogen at rates up to 25 N m 3/h and the purity of the product hydrogen is over 99.9995% with a CO content of less than 1 ppm. In this fuel processor, the operating condition of the reformer and the metal membrane modules is nearly the same, so that operation is simple and the overall system construction is compact by eliminating the extensive temperature control of the intermediate gas streams. The recovery of hydrogen in the metal membrane units is maintained at 70-75% by the control of the pressure in the system, and the remaining 25-30% hydrogen is recycled to a catalytic combustion zone to supply heat for the methanol steam-reforming reaction. The thermal efficiency of the fuel processor is about 75% and the inlet air pressure is as low as 4 psi. The fuel processor is currently being integrated with 25-kW polymer electrolyte membrane fuel-cell (PEMFC) stack developed by the Hyundai Motor Company. The stack exhibits the same performance as those with pure hydrogen, which proves that the maximum power output as well as the minimum stack degradation is possible with this fuel processor. This fuel-cell 'engine' is to be installed in a hybrid passenger vehicle for road testing.

Design of RISC Processor Using VHDL and Cadence

NASA Astrophysics Data System (ADS)

Moslehpour, Saeid; Puliroju, Chandrasekhar; Abu-Aisheh, Akram

The project deals about development of a basic RISC processor. The processor is designed with basic architecture consisting of internal modules like clock generator, memory, program counter, instruction register, accumulator, arithmetic and logic unit and decoder. This processor is mainly used for simple general purpose like arithmetic operations and which can be further developed for general purpose processor by increasing the size of the instruction register. The processor is designed in VHDL by using Xilinx 8.1i version. The present project also serves as an application of the knowledge gained from past studies of the PSPICE program. The study will show how PSPICE can be used to simplify massive complex circuits designed in VHDL Synthesis. The purpose of the project is to explore the designed RISC model piece by piece, examine and understand the Input/ Output pins, and to show how the VHDL synthesis code can be converted to a simplified PSPICE model. The project will also serve as a collection of various research materials about the pieces of the circuit.

Electro-optic voltage sensor with beam splitting

DOEpatents

Woods, Gregory K.; Renak, Todd W.; Davidson, James R.; Crawford, Thomas M.

2002-01-01

The invention is a miniature electro-optic voltage sensor system capable of accurate operation at high voltages without use of the dedicated voltage dividing hardware typically found in the prior art. The invention achieves voltage measurement without significant error contributions from neighboring conductors or environmental perturbations. The invention employs a transmitter, a sensor, a detector, and a signal processor. The transmitter produces a beam of electromagnetic radiation which is routed into the sensor. Within the sensor the beam undergoes the Pockels electro-optic effect. The electro-optic effect produces a modulation of the beam's polarization, which is in turn converted to a pair of independent conversely-amplitude-modulated signals, from which the voltage of the E-field is determined by the signal processor. The use of converse AM signals enables the signal processor to better distinguish signal from noise. The sensor converts the beam by splitting the beam in accordance with the axes of the beam's polarization state (an ellipse) into at least two AM signals. These AM signals are fed into a signal processor and processed to determine the voltage between a ground conductor and the conductor on which voltage is being measured.

Goldstone R/D High Speed Data Acquisition System

NASA Technical Reports Server (NTRS)

Deutsch, L. J.; Jurgens, R. F.; Brokl, S. S.

1984-01-01

A digital data acquisition system that meets the requirements of several users (initially the planetary radar program) is planned for general use at Deep Space Station 14 (DSS 14). The system, now partially complete, is controlled by VAX 11/780 computer that is programmed in high level languages. A DEC Data Controller is included for moderate-speed data acquisition, low speed data display, and for a digital interface to special user-provided devices. The high-speed data acquisition is performed in devices that are being designed and built at JPL. Analog IF signals are converted to a digitized 50 MHz real signal. This signal is filtered and mixed digitally to baseband after which its phase code (a PN sequence in the case of planetary radar) is removed. It may then be accumulated (or averaged) and fed into the VAX through an FPS 5210 array processor. Further data processing before entering the VAX is thus possible (computation and accumulation of the power spectra, for example). The system is to be located in the research and development pedestal at DSS 14 for easy access by researchers in radio astronomy as well as telemetry processing and antenna arraying.

A system for the simulation and evaluation of satellite communication networks

NASA Technical Reports Server (NTRS)

Bagwell, J. W.

1983-01-01

With the emergence of a new era in satellite communications brought about by NASA's thrust into the Ka band with multibeam and onboard processing technologies, new and innovative techniques for evaluating these concepts and systems are required. To this end, NASA, in conjunction with its extensive program for advanced communications technology development, has undertaken to develop a concept for the simulation and evaluation of a complete communications network. Incorporated in this network will be proof of concept models of the latest technologies proposed for future satellite communications systems. These include low noise receivers, matrix switches, baseband processors, and solid state and tube type high power amplifiers. To accomplish this, numerous supporting technologies must be added to those aforementioned proof of concept models. These include controllers for synchronization, order wire, and resource allocation, gain compensation, signal leveling, power augmentation, and rain fade and range delay simulation. Taken together, these will be assembled to comprise a system capable of addressing numerous design and performance questions. The simulation and evaluation system as planned will be modular in design and implementation, capable of modification and updating to track and evaluate a continuum emerging concepts and technologies.

Modulation Classification of Satellite Communication Signals Using Cumulants and Neural Networks

NASA Technical Reports Server (NTRS)

Smith, Aaron; Evans, Michael; Downey, Joseph

2017-01-01

National Aeronautics and Space Administration (NASA)'s future communication architecture is evaluating cognitive technologies and increased system intelligence. These technologies are expected to reduce the operational complexity of the network, increase science data return, and reduce interference to self and others. In order to increase situational awareness, signal classification algorithms could be applied to identify users and distinguish sources of interference. A significant amount of previous work has been done in the area of automatic signal classification for military and commercial applications. As a preliminary step, we seek to develop a system with the ability to discern signals typically encountered in satellite communication. Proposed is an automatic modulation classifier which utilizes higher order statistics (cumulants) and an estimate of the signal-to-noise ratio. These features are extracted from baseband symbols and then processed by a neural network for classification. The modulation types considered are phase-shift keying (PSK), amplitude and phase-shift keying (APSK),and quadrature amplitude modulation (QAM). Physical layer properties specific to the Digital Video Broadcasting - Satellite- Second Generation (DVB-S2) standard, such as pilots and variable ring ratios, are also considered. This paper will provide simulation results of a candidate modulation classifier, and performance will be evaluated over a range of signal-to-noise ratios, frequency offsets, and nonlinear amplifier distortions.

An Experimental Study of a Micro-Projection Enabled Optical Terminal for Short-Range Bidirectional Multi-Wavelength Visible Light Communications

PubMed Central

Tsai, Cheng-Yu; Jiang, Jhih-Shan

2018-01-01

A micro-projection enabled short-range communication (SRC) approach using red-, green- and blue-based light-emitting diodes (RGB-LEDs) has experimentally demonstrated recently that micro-projection and high-speed data transmission can be performed simultaneously. In this research, a reconfigurable design of a polarization modulated image system based on the use of a Liquid Crystal on Silicon based Spatial Light Modulator (LCoS-based SLM) serving as a portable optical terminal capable of micro-projection and bidirectional multi-wavelength communications is proposed and experimentally demonstrated. For the proof of concept, the system performance was evaluated through a bidirectional communication link at a transmission distance over 0.65 m. In order to make the proposed communication system architecture compatible with the data modulation format of future possible wireless communication system, baseband modulation scheme, i.e., Non-Return-to-Zero On-Off-Keying (NRZ_OOK), M-ary Phase Shift Keying (M-PSK) and M-ary Quadrature Amplitude Modulation (M-QAM) were used to investigate the system transmission performance. The experimental results shown that an acceptable BER (satisfying the limitation of Forward Error Correction, FEC standard) and crosstalk can all be achieved in the bidirectional multi-wavelength communication scenario. PMID:29587457

Eight-Channel Digital Signal Processor and Universal Trigger Module

NASA Astrophysics Data System (ADS)

Skulski, Wojtek; Wolfs, Frank

2003-04-01

A 10-bit, 8-channel, 40 megasamples per second digital signal processor and waveform digitizer DDC-8 (nicknamed Universal Trigger Module) is presented. The digitizer features 8 analog inputs, 1 analog output for a reconstructed analog waveform, 16 NIM logic inputs, 8 NIM logic outputs, and a pool of 16 TTL logic lines which can be individually configured as either inputs or outputs. The first application of this device is to enhance the present trigger electronics for PHOBOS at RHIC. The status of the development and the first results are presented. Possible applications of the new device are discussed. Supported by the NSF grant PHY-0072204.

Systems and methods for performing wireless financial transactions

DOE Office of Scientific and Technical Information (OSTI.GOV)

McCown, Steven Harvey

2012-07-03

A secure computing module (SCM) is configured for connection with a host device. The SCM includes a processor for performing secure processing operations, a host interface for coupling the processor to the host device, and a memory connected to the processor wherein the processor logically isolates at least some of the memory from access by the host device. The SCM also includes a proximate-field wireless communicator connected to the processor to communicate with another SCM associated with another host device. The SCM generates a secure digital signature for a financial transaction package and communicates the package and the signature tomore » the other SCM using the proximate-field wireless communicator. Financial transactions are performed from person to person using the secure digital signature of each person's SCM and possibly message encryption. The digital signatures and transaction details are communicated to appropriate financial organizations to authenticate the transaction parties and complete the transaction.« less

Limit characteristics of digital optoelectronic processor

NASA Astrophysics Data System (ADS)

Kolobrodov, V. G.; Tymchik, G. S.; Kolobrodov, M. S.

2018-01-01

In this article, the limiting characteristics of a digital optoelectronic processor are explored. The limits are defined by diffraction effects and a matrix structure of the devices for input and output of optical signals. The purpose of a present research is to optimize the parameters of the processor's components. The developed physical and mathematical model of DOEP allowed to establish the limit characteristics of the processor, restricted by diffraction effects and an array structure of the equipment for input and output of optical signals, as well as to optimize the parameters of the processor's components. The diameter of the entrance pupil of the Fourier lens is determined by the size of SLM and the pixel size of the modulator. To determine the spectral resolution, it is offered to use a concept of an optimum phase when the resolved diffraction maxima coincide with the pixel centers of the radiation detector.

Less-Complex Method of Classifying MPSK

NASA Technical Reports Server (NTRS)

Hamkins, Jon

2006-01-01

An alternative to an optimal method of automated classification of signals modulated with M-ary phase-shift-keying (M-ary PSK or MPSK) has been derived. The alternative method is approximate, but it offers nearly optimal performance and entails much less complexity, which translates to much less computation time. Modulation classification is becoming increasingly important in radio-communication systems that utilize multiple data modulation schemes and include software-defined or software-controlled receivers. Such a receiver may "know" little a priori about an incoming signal but may be required to correctly classify its data rate, modulation type, and forward error-correction code before properly configuring itself to acquire and track the symbol timing, carrier frequency, and phase, and ultimately produce decoded bits. Modulation classification has long been an important component of military interception of initially unknown radio signals transmitted by adversaries. Modulation classification may also be useful for enabling cellular telephones to automatically recognize different signal types and configure themselves accordingly. The concept of modulation classification as outlined in the preceding paragraph is quite general. However, at the present early stage of development, and for the purpose of describing the present alternative method, the term "modulation classification" or simply "classification" signifies, more specifically, a distinction between M-ary and M'-ary PSK, where M and M' represent two different integer multiples of 2. Both the prior optimal method and the present alternative method require the acquisition of magnitude and phase values of a number (N) of consecutive baseband samples of the incoming signal + noise. The prior optimal method is based on a maximum- likelihood (ML) classification rule that requires a calculation of likelihood functions for the M and M' hypotheses: Each likelihood function is an integral, over a full cycle of carrier phase, of a complicated sum of functions of the baseband sample values, the carrier phase, the carrier-signal and noise magnitudes, and M or M'. Then the likelihood ratio, defined as the ratio between the likelihood functions, is computed, leading to the choice of whichever hypothesis - M or M'- is more likely. In the alternative method, the integral in each likelihood function is approximated by a sum over values of the integrand sampled at a number, 1, of equally spaced values of carrier phase. Used in this way, 1 is a parameter that can be adjusted to trade computational complexity against the probability of misclassification. In the limit as 1 approaches infinity, one obtains the integral form of the likelihood function and thus recovers the ML classification. The present approximate method has been tested in comparison with the ML method by means of computational simulations. The results of the simulations have shown that the performance (as quantified by probability of misclassification) of the approximate method is nearly indistinguishable from that of the ML method (see figure).

Performance Analysis of a JTIDS/Link-16 Type Waveform using 32-ary Orthogonal Signaling with 32 Chip Baseband Waveforms and a Concatenated Code

DTIC Science & Technology

2009-12-01

with 32 chip baseband waveforms such as Walsh functions. Performance with both coherent and noncoherent detection is analyzed. For noncoherent ...detection, only one five bit symbol is transmitted on the I and Q components of the carrier per symbol duration, so the data throughput for noncoherent ...for coherent and noncoherent demodulation, respectively, when 510bP  . Likewise, in an AWGN only environment with a diversity of two, the proposed

SDDL- SOFTWARE DESIGN AND DOCUMENTATION LANGUAGE

NASA Technical Reports Server (NTRS)

Kleine, H.

1994-01-01

Effective, efficient communication is an essential element of the software development process. The Software Design and Documentation Language (SDDL) provides an effective communication medium to support the design and documentation of complex software applications. SDDL supports communication between all the members of a software design team and provides for the production of informative documentation on the design effort. Even when an entire development task is performed by a single individual, it is important to explicitly express and document communication between the various aspects of the design effort including concept development, program specification, program development, and program maintenance. SDDL ensures that accurate documentation will be available throughout the entire software life cycle. SDDL offers an extremely valuable capability for the design and documentation of complex programming efforts ranging from scientific and engineering applications to data management and business sytems. Throughout the development of a software design, the SDDL generated Software Design Document always represents the definitive word on the current status of the ongoing, dynamic design development process. The document is easily updated and readily accessible in a familiar, informative form to all members of the development team. This makes the Software Design Document an effective instrument for reconciling misunderstandings and disagreements in the development of design specifications, engineering support concepts, and the software design itself. Using the SDDL generated document to analyze the design makes it possible to eliminate many errors that might not be detected until coding and testing is attempted. As a project management aid, the Software Design Document is useful for monitoring progress and for recording task responsibilities. SDDL is a combination of language, processor, and methodology. The SDDL syntax consists of keywords to invoke design structures and a collection of directives which control processor actions. The designer has complete control over the choice of keywords, commanding the capabilities of the processor in a way which is best suited to communicating the intent of the design. The SDDL processor translates the designer's creative thinking into an effective document for communication. The processor performs as many automatic functions as possible, thereby freeing the designer's energy for the creative effort. Document formatting includes graphical highlighting of structure logic, accentuation of structure escapes and module invocations, logic error detection, and special handling of title pages and text segments. The SDDL generated document contains software design summary information including module invocation hierarchy, module cross reference, and cross reference tables of user selected words or phrases appearing in the document. The basic forms of the methodology are module and block structures and the module invocation statement. A design is stated in terms of modules that represent problem abstractions which are complete and independent enough to be treated as separate problem entities. Blocks are lower-level structures used to build the modules. Both kinds of structures may have an initiator part, a terminator part, an escape segment, or a substructure. The SDDL processor is written in PASCAL for batch execution on a DEC VAX series computer under VMS. SDDL was developed in 1981 and last updated in 1984.

Architecture for Control of the K9 Rover

NASA Technical Reports Server (NTRS)

Bresina, John L.; Bualat, maria; Fair, Michael; Wright, Anne; Washington, Richard

2006-01-01

Software featuring a multilevel architecture is used to control the hardware on the K9 Rover, which is a mobile robot used in research on robots for scientific exploration and autonomous operation in general. The software consists of five types of modules: Device Drivers - These modules, at the lowest level of the architecture, directly control motors, cameras, data buses, and other hardware devices. Resource Managers - Each of these modules controls several device drivers. Resource managers can be commanded by either a remote operator or the pilot or conditional-executive modules described below. Behaviors and Data Processors - These modules perform computations for such functions as planning paths, avoiding obstacles, visual tracking, and stereoscopy. These modules can be commanded only by the pilot. Pilot - The pilot receives a possibly complex command from the remote operator or the conditional executive, then decomposes the command into (1) more-specific commands to the resource managers and (2) requests for information from the behaviors and data processors. Conditional Executive - This highest-level module interprets a command plan sent by the remote operator, determines whether resources required for execution of the plan are available, monitors execution, and, if necessary, selects an alternate branch of the plan.

Efficient Lookup Table-Based Adaptive Baseband Predistortion Architecture for Memoryless Nonlinearity

NASA Astrophysics Data System (ADS)

Ba, Seydou N.; Waheed, Khurram; Zhou, G. Tong

2010-12-01

Digital predistortion is an effective means to compensate for the nonlinear effects of a memoryless system. In case of a cellular transmitter, a digital baseband predistorter can mitigate the undesirable nonlinear effects along the signal chain, particularly the nonlinear impairments in the radiofrequency (RF) amplifiers. To be practically feasible, the implementation complexity of the predistorter must be minimized so that it becomes a cost-effective solution for the resource-limited wireless handset. This paper proposes optimizations that facilitate the design of a low-cost high-performance adaptive digital baseband predistorter for memoryless systems. A comparative performance analysis of the amplitude and power lookup table (LUT) indexing schemes is presented. An optimized low-complexity amplitude approximation and its hardware synthesis results are also studied. An efficient LUT predistorter training algorithm that combines the fast convergence speed of the normalized least mean squares (NLMSs) with a small hardware footprint is proposed. Results of fixed-point simulations based on the measured nonlinear characteristics of an RF amplifier are presented.

Marine Vessel Traffic System

DTIC Science & Technology

2001-06-19

Queue Get Put The MutexQ module provides primitive queue operations which synchronize access to the queues and ensure queue structure integrity...interface provides for synchronous data rates ranging from 64 Kbps to 1.536 Mbps, while an RS-232 interface accommodates asynchronous data up to...interface VME Communications processor 57 and 8-channel serial I/O board. This board set provides a 68040 processor and 8-channels of synchronous

Wartime Medical Requirements Models: A Comparison of MPM, MEPES, and LPX-MED.

DTIC Science & Technology

1996-10-01

theater-level models: • Medical Planning Module (MPM) • Medical Planning and Execution System (MEPES) • External Logistics Processor-Medical Module ...current plan is to modify LPX-MED to include a requirements calculator, there is no plan to link the require- ments calculation module and the...simulation module . We believe the simulation module (i.e., today’s LPX-MED) needs reasonable starting values, which a calculator model can pro- vide

Software techniques for a distributed real-time processing system. [for spacecraft

NASA Technical Reports Server (NTRS)

Lesh, F.; Lecoq, P.

1976-01-01

The paper describes software techniques developed for the Unified Data System (UDS), a distributed processor network for control and data handling onboard a planetary spacecraft. These techniques include a structured language for specifying the programs contained in each module, and a small executive program in each module which performs scheduling and implements the module task.

Energy consumption estimation of an OMAP-based Android operating system

NASA Astrophysics Data System (ADS)

González, Gabriel; Juárez, Eduardo; Castro, Juan José; Sanz, César

2011-05-01

System-level energy optimization of battery-powered multimedia embedded systems has recently become a design goal. The poor operational time of multimedia terminals makes computationally demanding applications impractical in real scenarios. For instance, the so-called smart-phones are currently unable to remain in operation longer than several hours. The OMAP3530 processor basically consists of two processing cores, a General Purpose Processor (GPP) and a Digital Signal Processor (DSP). The former, an ARM Cortex-A8 processor, is aimed to run a generic Operating System (OS) while the latter, a DSP core based on the C64x+, has architecture optimized for video processing. The BeagleBoard, a commercial prototyping board based on the OMAP processor, has been used to test the Android Operating System and measure its performance. The board has 128 MB of SDRAM external memory, 256 MB of Flash external memory and several interfaces. Note that the clock frequency of the ARM and DSP OMAP cores is 600 MHz and 430 MHz, respectively. This paper describes the energy consumption estimation of the processes and multimedia applications of an Android v1.6 (Donut) OS on the OMAP3530-Based BeagleBoard. In addition, tools to communicate the two processing cores have been employed. A test-bench to profile the OS resource usage has been developed. As far as the energy estimates concern, the OMAP processor energy consumption model provided by the manufacturer has been used. The model is basically divided in two energy components. The former, the baseline core energy, describes the energy consumption that is independent of any chip activity. The latter, the module active energy, describes the energy consumed by the active modules depending on resource usage.

Soft-core processor study for node-based architectures.

DOE Office of Scientific and Technical Information (OSTI.GOV)

Van Houten, Jonathan Roger; Jarosz, Jason P.; Welch, Benjamin James

2008-09-01

Node-based architecture (NBA) designs for future satellite projects hold the promise of decreasing system development time and costs, size, weight, and power and positioning the laboratory to address other emerging mission opportunities quickly. Reconfigurable Field Programmable Gate Array (FPGA) based modules will comprise the core of several of the NBA nodes. Microprocessing capabilities will be necessary with varying degrees of mission-specific performance requirements on these nodes. To enable the flexibility of these reconfigurable nodes, it is advantageous to incorporate the microprocessor into the FPGA itself, either as a hardcore processor built into the FPGA or as a soft-core processor builtmore » out of FPGA elements. This document describes the evaluation of three reconfigurable FPGA based processors for use in future NBA systems--two soft cores (MicroBlaze and non-fault-tolerant LEON) and one hard core (PowerPC 405). Two standard performance benchmark applications were developed for each processor. The first, Dhrystone, is a fixed-point operation metric. The second, Whetstone, is a floating-point operation metric. Several trials were run at varying code locations, loop counts, processor speeds, and cache configurations. FPGA resource utilization was recorded for each configuration. Cache configurations impacted the results greatly; for optimal processor efficiency it is necessary to enable caches on the processors. Processor caches carry a penalty; cache error mitigation is necessary when operating in a radiation environment.« less

FBMC receiver for multi-user asynchronous transmission on fragmented spectrum

NASA Astrophysics Data System (ADS)

Doré, Jean-Baptiste; Berg, Vincent; Cassiau, Nicolas; Kténas, Dimitri

2014-12-01

Relaxed synchronization and access to fragmented spectrum are considered for future generations of wireless networks. Frequency division multiple access for filter bank multicarrier (FBMC) modulation provides promising performance without strict synchronization requirements contrary to conventional orthogonal frequency division multiplexing (OFDM). The architecture of a FBMC receiver suitable for this scenario is considered. Carrier frequency offset (CFO) compensation is combined with intercarrier interference (ICI) cancellation and performs well under very large frequency offsets. Channel estimation and interpolation had to be adapted and proved effective even for heavily fragmented spectrum usage. Channel equalization can sustain large delay spread. Because all the receiver baseband signal processing functionalities are proposed in the frequency domain, the overall architecture is suitable for multiuser asynchronous transmission on fragmented spectrum.

Direct Synthesis of Microwave Waveforms for Quantum Computing

NASA Astrophysics Data System (ADS)

Raftery, James; Vrajitoarea, Andrei; Zhang, Gengyan; Leng, Zhaoqi; Srinivasan, Srikanth; Houck, Andrew

Current state of the art quantum computing experiments in the microwave regime use control pulses generated by modulating microwave tones with baseband signals generated by an arbitrary waveform generator (AWG). Recent advances in digital analog conversion technology have made it possible to directly synthesize arbitrary microwave pulses with sampling rates of 65 gigasamples per second (GSa/s) or higher. These new ultra-wide bandwidth AWG's could dramatically simplify the classical control chain for quantum computing experiments, presenting potential cost savings and reducing the number of components that need to be carefully calibrated. Here we use a Keysight M8195A AWG to study the viability of such a simplified scheme, demonstrating randomized benchmarking of a superconducting qubit with high fidelity.

Convergent optical wired and wireless long-reach access network using high spectral-efficient modulation.

PubMed

Chow, C W; Lin, Y H

2012-04-09

To provide broadband services in a single and low cost perform, the convergent optical wired and wireless access network is promising. Here, we propose and demonstrate a convergent optical wired and wireless long-reach access networks based on orthogonal wavelength division multiplexing (WDM). Both the baseband signal and the radio-over-fiber (ROF) signal are multiplexed and de-multiplexed in optical domain, hence it is simple and the operation speed is not limited by the electronic bottleneck caused by the digital signal processing (DSP). Error-free de-multiplexing and down-conversion can be achieved for all the signals after 60 km (long-reach) fiber transmission. The scalability of the system for higher bit-rate (60 GHz) is also simulated and discussed.

Vector semirational rogue waves and modulation instability for the coupled higher-order nonlinear Schrödinger equations in the birefringent optical fibers.

PubMed

Sun, Wen-Rong; Liu, De-Yin; Xie, Xi-Yang

2017-04-01

We report the existence and properties of vector breather and semirational rogue-wave solutions for the coupled higher-order nonlinear Schrödinger equations, which describe the propagation of ultrashort optical pulses in birefringent optical fibers. Analytic vector breather and semirational rogue-wave solutions are obtained with Darboux dressing transformation. We observe that the superposition of the dark and bright contributions in each of the two wave components can give rise to complicated breather and semirational rogue-wave dynamics. We show that the bright-dark type vector solitons (or breather-like vector solitons) with nonconstant speed interplay with Akhmediev breathers, Kuznetsov-Ma solitons, and rogue waves. By adjusting parameters, we note that the rogue wave and bright-dark soliton merge, generating the boomeron-type bright-dark solitons. We prove that the rogue wave can be excited in the baseband modulation instability regime. These results may provide evidence of the collision between the mixed ultrashort soliton and rogue wave.

Digital services using quadrature amplitude modulation (QAM) over CATV analog DWDM system

NASA Astrophysics Data System (ADS)

Yeh, JengRong; Selker, Mark D.; Trail, J.; Piehler, David; Levi, Israel

2000-04-01

Dense Wavelength Division Multiplexing (DWDM) has recently gained great popularity as it provides a cost effective way to increase the transmission capacity of the existing fiber cable plant. For a long time, Dense WDM was exclusively used for baseband digital applications, predominantly in terrestrial long haul networks and in some cases in metropolitan and enterprise networks. Recently, the performance of DWDM components and frequency-stabilized lasers has substantially improved while the costs have down significantly. This makes a variety of new optical network architectures economically viable. The first commercial 8- wavelength DWDM system designed for Hybrid Fiber Coax networks was reported in 1998. This type of DWDM system utilizes Sub-Carrier Multiplexing (SCM) of Quadrature Amplitude Modulated (QAM) signals to transport IP data digital video broadcast and Video on Demand on ITU grid lightwave carriers. The ability of DWDM to provide scalable transmission capacity in the optical layer with SCM granularity is now considered by many to be the most promising technology for future transport and distribution of broadband multimedia services.

Analysis of different sub-carrier allocation of M-ary QAM-OFDM downlink in RoF system

NASA Astrophysics Data System (ADS)

Shao, Yu-feng; Chen, Luo; Wang, An-rong; Zhao, Yun-jie; Long, Ying; Ji, Xing-ping

2018-01-01

In this paper, the performance of a 60 GHz radio over fiber (RoF) system with 4/16/64 quadrature amplitude modulation (QAM) orthogonal frequency division multiplexing (OFDM) downstream signals is studied. Delivery of 10 Gbit/s M-ary QAM (MQAM) OFDM signals through the 20-km-long single-mode fiber (SMF) is complicated in terms of intensity modulation and direct detection (IM/DD). Using self-homodyne method, the beating of two independent light waves generating the millimeter-wave at the photodetector can be down-converted to baseband in the electrical domain. Meanwhile, three kinds of sub-carrier arrangement schemes are compared and discussed, and the simulation results show that lower peak-to-average power ratio ( PAPR) can be obtained adopting the adjacent scheme. At bit error rate ( BER) of 10-3, the receiver sensitivity using 4QAM-OFDM sub-carrier signal is almost enhanced by 4 dB and 9 dB compared with those of 16QAM-OFDM signal and 64QAM-OFDM signal.

Multichannel photonic Hilbert transformers based on complex modulated integrated Bragg gratings.

PubMed

Cheng, Rui; Chrostowski, Lukas

2018-03-01

Multichannel photonic Hilbert transformers (MPHTs) are reported. The devices are based on single compact spiral integrated Bragg gratings on silicon with coupling coefficients precisely modulated by the phase of each grating period. MPHTs with up to nine wavelength channels and a single-channel bandwidth of up to ∼625  GHz are achieved. The potential of the devices for multichannel single-sideband signal generation is suggested. The work offers a new possibility of utilizing wavelength as an extra degree of freedom in designing radio-frequency photonic signal processors. Such multichannel processors are expected to possess improved capacities and a potential to greatly benefit current widespread wavelength division multiplexed systems.

Reward-based learning under hardware constraints-using a RISC processor embedded in a neuromorphic substrate.

PubMed

Friedmann, Simon; Frémaux, Nicolas; Schemmel, Johannes; Gerstner, Wulfram; Meier, Karlheinz

2013-01-01

In this study, we propose and analyze in simulations a new, highly flexible method of implementing synaptic plasticity in a wafer-scale, accelerated neuromorphic hardware system. The study focuses on globally modulated STDP, as a special use-case of this method. Flexibility is achieved by embedding a general-purpose processor dedicated to plasticity into the wafer. To evaluate the suitability of the proposed system, we use a reward modulated STDP rule in a spike train learning task. A single layer of neurons is trained to fire at specific points in time with only the reward as feedback. This model is simulated to measure its performance, i.e., the increase in received reward after learning. Using this performance as baseline, we then simulate the model with various constraints imposed by the proposed implementation and compare the performance. The simulated constraints include discretized synaptic weights, a restricted interface between analog synapses and embedded processor, and mismatch of analog circuits. We find that probabilistic updates can increase the performance of low-resolution weights, a simple interface between analog synapses and processor is sufficient for learning, and performance is insensitive to mismatch. Further, we consider communication latency between wafer and the conventional control computer system that is simulating the environment. This latency increases the delay, with which the reward is sent to the embedded processor. Because of the time continuous operation of the analog synapses, delay can cause a deviation of the updates as compared to the not delayed situation. We find that for highly accelerated systems latency has to be kept to a minimum. This study demonstrates the suitability of the proposed implementation to emulate the selected reward modulated STDP learning rule. It is therefore an ideal candidate for implementation in an upgraded version of the wafer-scale system developed within the BrainScaleS project.

Reward-based learning under hardware constraints—using a RISC processor embedded in a neuromorphic substrate

PubMed Central

Friedmann, Simon; Frémaux, Nicolas; Schemmel, Johannes; Gerstner, Wulfram; Meier, Karlheinz

2013-01-01

In this study, we propose and analyze in simulations a new, highly flexible method of implementing synaptic plasticity in a wafer-scale, accelerated neuromorphic hardware system. The study focuses on globally modulated STDP, as a special use-case of this method. Flexibility is achieved by embedding a general-purpose processor dedicated to plasticity into the wafer. To evaluate the suitability of the proposed system, we use a reward modulated STDP rule in a spike train learning task. A single layer of neurons is trained to fire at specific points in time with only the reward as feedback. This model is simulated to measure its performance, i.e., the increase in received reward after learning. Using this performance as baseline, we then simulate the model with various constraints imposed by the proposed implementation and compare the performance. The simulated constraints include discretized synaptic weights, a restricted interface between analog synapses and embedded processor, and mismatch of analog circuits. We find that probabilistic updates can increase the performance of low-resolution weights, a simple interface between analog synapses and processor is sufficient for learning, and performance is insensitive to mismatch. Further, we consider communication latency between wafer and the conventional control computer system that is simulating the environment. This latency increases the delay, with which the reward is sent to the embedded processor. Because of the time continuous operation of the analog synapses, delay can cause a deviation of the updates as compared to the not delayed situation. We find that for highly accelerated systems latency has to be kept to a minimum. This study demonstrates the suitability of the proposed implementation to emulate the selected reward modulated STDP learning rule. It is therefore an ideal candidate for implementation in an upgraded version of the wafer-scale system developed within the BrainScaleS project. PMID:24065877

High speed optical object recognition processor with massive holographic memory

NASA Technical Reports Server (NTRS)

Chao, T.; Zhou, H.; Reyes, G.

2002-01-01

Real-time object recognition using a compact grayscale optical correlator will be introduced. A holographic memory module for storing a large bank of optimum correlation filters, to accommodate the large data throughput rate needed for many real-world applications, has also been developed. System architecture of the optical processor and the holographic memory will be presented. Application examples of this object recognition technology will also be demonstrated.

The effect of presentation level and stimulation rate on speech perception and modulation detection for cochlear implant users.

PubMed

Brochier, Tim; McDermott, Hugh J; McKay, Colette M

2017-06-01

In order to improve speech understanding for cochlear implant users, it is important to maximize the transmission of temporal information. The combined effects of stimulation rate and presentation level on temporal information transfer and speech understanding remain unclear. The present study systematically varied presentation level (60, 50, and 40 dBA) and stimulation rate [500 and 2400 pulses per second per electrode (pps)] in order to observe how the effect of rate on speech understanding changes for different presentation levels. Speech recognition in quiet and noise, and acoustic amplitude modulation detection thresholds (AMDTs) were measured with acoustic stimuli presented to speech processors via direct audio input (DAI). With the 500 pps processor, results showed significantly better performance for consonant-vowel nucleus-consonant words in quiet, and a reduced effect of noise on sentence recognition. However, no rate or level effect was found for AMDTs, perhaps partly because of amplitude compression in the sound processor. AMDTs were found to be strongly correlated with the effect of noise on sentence perception at low levels. These results indicate that AMDTs, at least when measured with the CP910 Freedom speech processor via DAI, explain between-subject variance of speech understanding, but do not explain within-subject variance for different rates and levels.

Acoustic Response of Underwater Munitions near a Sediment Interface: Measurement Model Comparisons and Classification Schemes

DTIC Science & Technology

2015-04-23

12 Figure 4. Pulse- compressed baseband signals for sequence 40 from TREX13 …… 13 Figure 5. SAS image for sequence 40 from TREX13...12 meshes with data …………… 28 Figure 14. FE simulations for aluminum and steel replicas of an 100-mm UXO …… 28 Figure 15. FE meshes for two targets...PCB Pulse- compressed and baseband PC SWAT Personal Computer Shallow Water Acoustic Toolset PondEx09 Pond Experiment 2009 PondEx10 Pond Experiment

Correction of I/Q channel errors without calibration

DOEpatents

Doerry, Armin W.; Tise, Bertice L.

2002-01-01

A method of providing a balanced demodular output for a signal such as a Doppler radar having an analog pulsed input; includes adding a variable phase shift as a function of time to the input signal, applying the phase shifted input signal to a demodulator; and generating a baseband signal from the input signal. The baseband signal is low-pass filtered and converted to a digital output signal. By removing the variable phase shift from the digital output signal, a complex data output is formed that is representative of the output of a balanced demodulator.

Passive Synthetic Aperture Radar Imaging Using Commercial OFDM Communication Networks

DTIC Science & Technology

2012-09-13

baseband sampling is key to ensure proper correlation with a reference signal. The DFT represents the sam- pled spectrum of a periodic discrete sequence...convenient to sample the baseband time domain segments at a rate of Ts/N . In this way, the segments are easily correlated to the elemental form of the...phase history solution of Gp ,l[k ′ n] = Sp,l,n ϕp,l,ndp,l,nN2 , dp,l,n 6= 0. (5.5.13) The segment need not be limited to N samples . For segments of length

Optical laboratory solution and error model simulation of a linear time-varying finite element equation

NASA Technical Reports Server (NTRS)

Taylor, B. K.; Casasent, D. P.

1989-01-01

The use of simplified error models to accurately simulate and evaluate the performance of an optical linear-algebra processor is described. The optical architecture used to perform banded matrix-vector products is reviewed, along with a linear dynamic finite-element case study. The laboratory hardware and ac-modulation technique used are presented. The individual processor error-source models and their simulator implementation are detailed. Several significant simplifications are introduced to ease the computational requirements and complexity of the simulations. The error models are verified with a laboratory implementation of the processor, and are used to evaluate its potential performance.

Application of convolve-multiply-convolve SAW processor for satellite communications

NASA Technical Reports Server (NTRS)

Lie, Y. S.; Ching, M.

1991-01-01

There is a need for a satellite communications receiver than can perform simultaneous multi-channel processing of single channel per carrier (SCPC) signals originating from various small (mobile or fixed) earth stations. The number of ground users can be as many as 1000. Conventional techniques of simultaneously processing these signals is by employing as many RF-bandpass filters as the number of channels. Consequently, such an approach would result in a bulky receiver, which becomes impractical for satellite applications. A unique approach utilizing a realtime surface acoustic wave (SAW) chirp transform processor is presented. The application of a Convolve-Multiply-Convolve (CMC) chirp transform processor is described. The CMC processor transforms each input channel into a unique timeslot, while preserving its modulation content (in this case QPSK). Subsequently, each channel is individually demodulated without the need of input channel filters. Circuit complexity is significantly reduced, because the output frequency of the CMC processor is common for all input channel frequencies. The results of theoretical analysis and experimental results are in good agreement.

Advanced technologies for encryption of satellite links

NASA Astrophysics Data System (ADS)

McMahan, Sherry S.

The use of encryption on satellite links is discussed. Advanced technology exists to provide transmission security for large earth station with data rates up to 50 megabits per second. One of the major concerns in the use of encryption equipment with very small aperture terminals (VSAT) is the key management issue and the related operational costs. The low cost requirement and the lack of physical protection of remote VSATs place severe constraints on the design of encryption equipment. Encryption may be accomplished by embedding a tamper proof encryption module into the baseband unit of each VSAT. VSAT networks are usually star networks where there is a single large earth station that serves as a hub and all satellite communications takes place between each VSAT and the hub earth station. The hub earth station has the secret master key of each VSAT. These master keys are used to downline load encrypted session keys to each VSAT. A more secure alternative is to use public key techniques where each embedded VSAT encryption module internally generates its own secret and public numbers. The secret number never leaves the module while the public number is sent to the hub at the time of initialization of the encryption module into the VSAT. Physical access control to encryption modules of VSAT systems can be implemented using passwords, smart cards or biometrics.

FPGA-Based, Self-Checking, Fault-Tolerant Computers

NASA Technical Reports Server (NTRS)

Some, Raphael; Rennels, David

2004-01-01

A proposed computer architecture would exploit the capabilities of commercially available field-programmable gate arrays (FPGAs) to enable computers to detect and recover from bit errors. The main purpose of the proposed architecture is to enable fault-tolerant computing in the presence of single-event upsets (SEUs). [An SEU is a spurious bit flip (also called a soft error) caused by a single impact of ionizing radiation.] The architecture would also enable recovery from some soft errors caused by electrical transients and, to some extent, from intermittent and permanent (hard) errors caused by aging of electronic components. A typical FPGA of the current generation contains one or more complete processor cores, memories, and highspeed serial input/output (I/O) channels, making it possible to shrink a board-level processor node to a single integrated-circuit chip. Custom, highly efficient microcontrollers, general-purpose computers, custom I/O processors, and signal processors can be rapidly and efficiently implemented by use of FPGAs. Unfortunately, FPGAs are susceptible to SEUs. Prior efforts to mitigate the effects of SEUs have yielded solutions that degrade performance of the system and require support from external hardware and software. In comparison with other fault-tolerant- computing architectures (e.g., triple modular redundancy), the proposed architecture could be implemented with less circuitry and lower power demand. Moreover, the fault-tolerant computing functions would require only minimal support from circuitry outside the central processing units (CPUs) of computers, would not require any software support, and would be largely transparent to software and to other computer hardware. There would be two types of modules: a self-checking processor module and a memory system (see figure). The self-checking processor module would be implemented on a single FPGA and would be capable of detecting its own internal errors. It would contain two CPUs executing identical programs in lock step, with comparison of their outputs to detect errors. It would also contain various cache local memory circuits, communication circuits, and configurable special-purpose processors that would use self-checking checkers. (The basic principle of the self-checking checker method is to utilize logic circuitry that generates error signals whenever there is an error in either the checker or the circuit being checked.) The memory system would comprise a main memory and a hardware-controlled check-pointing system (CPS) based on a buffer memory denoted the recovery cache. The main memory would contain random-access memory (RAM) chips and FPGAs that would, in addition to everything else, implement double-error-detecting and single-error-correcting memory functions to enable recovery from single-bit errors.

Compact Modules for Wireless Communication Systems in the E-Band (71-76 GHz)

NASA Astrophysics Data System (ADS)

Montero-de-Paz, Javier; Oprea, Ion; Rymanov, Vitaly; Babiel, Sebastian; García-Muñoz, Luis Enrique; Lisauskas, Alvydas; Hoefle, Matthias; Jimenez, Álvaro; Cojocari, Oleg; Segovia-Vargas, Daniel; Palandöken, Merih; Tekin, Tolga; Stöhr, Andreas; Carpintero, Guillermo

2013-04-01

The millimeter-wave spectrum above 70 GHz provides a cost-effective solution to increase the wireless communications data rates by increasing the carrier wave frequencies. We report on the development of two key components of a wireless transmission system, a high-speed photodiode (HS-PD) and a Schottky Barrier Diode (SBD). Both components operate uncooled, a key issue in the development of compact modules. On the transmitter side, an improved design of the HS-PD allows it to deliver an output RF power exceeding 0 dBm (1 mW). On the receiver side, we present the design process and achieved results on the development of a compact direct envelope detection receiver based on a quasi-optical SDB module. Different resonant (meander dipole) and broadband (Log-Spiral and Log-Periodic) planar antenna solutions are designed, matching the antenna and Schottky diode impedances at high frequency. Impedance matching at baseband is also provided by means of an impedance transition to a 50 Ohm output. From this comparison, we demonstrate the excellent performance of the broadband antennas over the entire E-band by setting up a short-range wireless link transmitting a 1 Gbps data signal.

Effects Of Local Oscillator Errors On Digital Beamforming

DTIC Science & Technology

2016-03-01

processor EF element factor EW electronic warfare FFM flicker frequency modulation FOV field-of-view FPGA field-programmable gate array FPM flicker...frequencies and also more difficult to measure [15]. 2. Flicker frequency modulation The source for flicker frequency modulation ( FFM ) is attributed to...a physical resonance mechanism of an oscillator or issues controlling electronic components. Some oscillators might not show FFM noise, which might

Photonic Applications Using Electrooptic Optical Signal Processors

DTIC Science & Technology

2011-11-16

analog-to-digital conversion using a continuous wave multiwavelength source and phase modulation Author(s): Bortnik, B.J.; Fetterman, H.R. Source... multiwavelength source and phase modulation Bartosz J. Bortnik* and Harold R. Fetterman Department of Electrical Engineering, University of California Los...utilizing a cw multiwavelength source and phase modulation instead of a mode-locked laser is presented. The output of the cw multiwave- length source

Reconfigurable signal processor designs for advanced digital array radar systems

NASA Astrophysics Data System (ADS)

Suarez, Hernan; Zhang, Yan (Rockee); Yu, Xining

2017-05-01

The new challenges originated from Digital Array Radar (DAR) demands a new generation of reconfigurable backend processor in the system. The new FPGA devices can support much higher speed, more bandwidth and processing capabilities for the need of digital Line Replaceable Unit (LRU). This study focuses on using the latest Altera and Xilinx devices in an adaptive beamforming processor. The field reprogrammable RF devices from Analog Devices are used as analog front end transceivers. Different from other existing Software-Defined Radio transceivers on the market, this processor is designed for distributed adaptive beamforming in a networked environment. The following aspects of the novel radar processor will be presented: (1) A new system-on-chip architecture based on Altera's devices and adaptive processing module, especially for the adaptive beamforming and pulse compression, will be introduced, (2) Successful implementation of generation 2 serial RapidIO data links on FPGA, which supports VITA-49 radio packet format for large distributed DAR processing. (3) Demonstration of the feasibility and capabilities of the processor in a Micro-TCA based, SRIO switching backplane to support multichannel beamforming in real-time. (4) Application of this processor in ongoing radar system development projects, including OU's dual-polarized digital array radar, the planned new cylindrical array radars, and future airborne radars.

Functional relevance of neurotransmitter receptor heteromers in the central nervous system.

PubMed

Ferré, Sergi; Ciruela, Francisco; Woods, Amina S; Lluis, Carme; Franco, Rafael

2007-09-01

The existence of neurotransmitter receptor heteromers is becoming broadly accepted and their functional significance is being revealed. Heteromerization of neurotransmitter receptors produces functional entities that possess different biochemical characteristics with respect to the individual components of the heteromer. Neurotransmitter receptor heteromers can function as processors of computations that modulate cell signaling. Thus, the quantitative or qualitative aspects of the signaling generated by stimulation of any of the individual receptor units in the heteromer are different from those obtained during coactivation. Furthermore, recent studies demonstrate that some neurotransmitter receptor heteromers can exert an effect as processors of computations that directly modulate both pre- and postsynaptic neurotransmission. This is illustrated by the analysis of striatal receptor heteromers that control striatal glutamatergic neurotransmission.

Using Intel's Knight Landing Processor to Accelerate Global Nested Air Quality Prediction Modeling System (GNAQPMS) Model

NASA Astrophysics Data System (ADS)

Wang, H.; Chen, H.; Chen, X.; Wu, Q.; Wang, Z.

2016-12-01

The Global Nested Air Quality Prediction Modeling System for Hg (GNAQPMS-Hg) is a global chemical transport model coupled Hg transport module to investigate the mercury pollution. In this study, we present our work of transplanting the GNAQPMS model on Intel Xeon Phi processor, Knights Landing (KNL) to accelerate the model. KNL is the second-generation product adopting Many Integrated Core Architecture (MIC) architecture. Compared with the first generation Knight Corner (KNC), KNL has more new hardware features, that it can be used as unique processor as well as coprocessor with other CPU. According to the Vtune tool, the high overhead modules in GNAQPMS model have been addressed, including CBMZ gas chemistry, advection and convection module, and wet deposition module. These high overhead modules were accelerated by optimizing code and using new techniques of KNL. The following optimized measures was done: 1) Changing the pure MPI parallel mode to hybrid parallel mode with MPI and OpenMP; 2.Vectorizing the code to using the 512-bit wide vector computation unit. 3. Reducing unnecessary memory access and calculation. 4. Reducing Thread Local Storage (TLS) for common variables with each OpenMP thread in CBMZ. 5. Changing the way of global communication from files writing and reading to MPI functions. After optimization, the performance of GNAQPMS is greatly increased both on CPU and KNL platform, the single-node test showed that optimized version has 2.6x speedup on two sockets CPU platform and 3.3x speedup on one socket KNL platform compared with the baseline version code, which means the KNL has 1.29x speedup when compared with 2 sockets CPU platform.

Prototype Focal-Plane-Array Optoelectronic Image Processor

NASA Technical Reports Server (NTRS)

Fang, Wai-Chi; Shaw, Timothy; Yu, Jeffrey

1995-01-01

Prototype very-large-scale integrated (VLSI) planar array of optoelectronic processing elements combines speed of optical input and output with flexibility of reconfiguration (programmability) of electronic processing medium. Basic concept of processor described in "Optical-Input, Optical-Output Morphological Processor" (NPO-18174). Performs binary operations on binary (black and white) images. Each processing element corresponds to one picture element of image and located at that picture element. Includes input-plane photodetector in form of parasitic phototransistor part of processing circuit. Output of each processing circuit used to modulate one picture element in output-plane liquid-crystal display device. Intended to implement morphological processing algorithms that transform image into set of features suitable for high-level processing; e.g., recognition.

Systems and methods for reconfiguring input devices

NASA Technical Reports Server (NTRS)

Lancaster, Jeff (Inventor); De Mers, Robert E. (Inventor)

2012-01-01

A system includes an input device having first and second input members configured to be activated by a user. The input device is configured to generate activation signals associated with activation of the first and second input members, and each of the first and second input members are associated with an input function. A processor is coupled to the input device and configured to receive the activation signals. A memory coupled to the processor, and includes a reconfiguration module configured to store the input functions assigned to the first and second input members and, upon execution of the processor, to reconfigure the input functions assigned to the input members when the first input member is inoperable.

Matter rogue waves for the three-component Gross-Pitaevskii equations in the spinor Bose-Einstein condensates.

PubMed

Sun, Wen-Rong; Wang, Lei

2018-01-01

To show the existence and properties of matter rogue waves in an F =1 spinor Bose-Einstein condensate (BEC), we work on the three-component Gross-Pitaevskii (GP) equations. Via the Darboux-dressing transformation, we obtain a family of rational solutions describing the extreme events, i.e. rogue waves. This family of solutions includes bright-dark-bright and bright-bright-bright rogue waves. The algebraic construction depends on Lax matrices and their Jordan form. The conditions for the existence of rogue wave solutions in an F =1 spinor BEC are discussed. For the three-component GP equations, if there is modulation instability, it is of baseband type only, confirming our analytic conditions. The energy transfers between the waves are discussed.

Photonic arbitrary waveform generation applicable to multiband UWB communications.

PubMed

Bolea, Mario; Mora, José; Ortega, Beatriz; Capmany, José

2010-12-06

A novel photonic structure for arbitrary waveform generation (AWG) is proposed based on the electrooptical intensity modulation of a broadband optical signal which is transmitted by a dispersive element and the optoelectrical processing is realized by combining an interferometric structure with balanced photodetection. The generated waveform can be fully reconfigured through the control of the optical source power spectrum and the interferometric structure. The use of balanced photodetection permits to remove the baseband component of the generated signal which is relevant in certain applications. We have theoretically described and experimentally demonstrated the feasibility of the system by means of the generation of different pulse shapes. Specifically, the proposed structure has been applicable to generate Multiband UWB signaling formats regarding to the FCC requirements in order to show the flexibility of the system.

Simpler Alternative to an Optimum FQPSK-B Viterbi Receiver

NASA Technical Reports Server (NTRS)

Lee, Dennis; Simon, Marvin; Yan, Tsun-Yee

2003-01-01

A reduced-complexity alternative to an optimum FQPSK-B Viterbi receiver has been invented. As described, the reduction in complexity is achieved at the cost of only a small reduction in power performance [performance expressed in terms of a bit-energy-to-noise-energy ratio (Eb/N0) for a given bit-error rate (BER)]. The term "FQPSK-B" denotes a baseband-filtered version of Feher quadrature-phase-shift keying, which is a patented, bandwidth-efficient phase-modulation scheme named after its inventor. Heretofore, commercial FQPSK-B receivers have performed symbol-by-symbol detection, in each case using a detection filter (either the proprietary FQPSK-B filter for better BER performance, or a simple integrate-and-dump filter with degraded performance) and a sample-and-hold circuit.

Matter rogue waves for the three-component Gross-Pitaevskii equations in the spinor Bose-Einstein condensates

NASA Astrophysics Data System (ADS)

Sun, Wen-Rong; Wang, Lei

2018-01-01

To show the existence and properties of matter rogue waves in an F=1 spinor Bose-Einstein condensate (BEC), we work on the three-component Gross-Pitaevskii (GP) equations. Via the Darboux-dressing transformation, we obtain a family of rational solutions describing the extreme events, i.e. rogue waves. This family of solutions includes bright-dark-bright and bright-bright-bright rogue waves. The algebraic construction depends on Lax matrices and their Jordan form. The conditions for the existence of rogue wave solutions in an F=1 spinor BEC are discussed. For the three-component GP equations, if there is modulation instability, it is of baseband type only, confirming our analytic conditions. The energy transfers between the waves are discussed.

A broadband ASE light source-based full-duplex FTTX/ROF transport system.

PubMed

Chang, Ching-Hung; Lu, Hai-Han; Su, Heng-Sheng; Shih, Chien-Liang; Chen, Kai-Jen

2009-11-23

A full-duplex fiber-to-the-X (FTTX)/radio-over-fiber (ROF) transport system based on a broadband amplified spontaneous emission (ASE) light source is proposed and demonstrated for rural wide-spread villages. Combining the concepts of long-transmission transmission and ring topology, a long-haul single-mode fiber (SMF) trunk is sharing with multiple rural villages. Externally modulated baseband (BB) (1.25 Gbps) and radio-frequency (RF) (622 Mbps/10 GHz) signals are successfully transmitted simultaneously. Good bit error rate (BER) performance was achieved to demonstrate the practice of providing wire/wireless connections for long-haul wide-spread rural villages. Since our proposed system uses only a broadband ASE light source to achieve multi-wavelengths transmissions, it also reveals an outstanding one with simpler and more economic advantages.

Integrated High-Speed Torque Control System for a Robotic Joint

NASA Technical Reports Server (NTRS)

Davis, Donald R. (Inventor); Radford, Nicolaus A. (Inventor); Permenter, Frank Noble (Inventor); Valvo, Michael C. (Inventor); Askew, R. Scott (Inventor)

2013-01-01

A control system for achieving high-speed torque for a joint of a robot includes a printed circuit board assembly (PCBA) having a collocated joint processor and high-speed communication bus. The PCBA may also include a power inverter module (PIM) and local sensor conditioning electronics (SCE) for processing sensor data from one or more motor position sensors. Torque control of a motor of the joint is provided via the PCBA as a high-speed torque loop. Each joint processor may be embedded within or collocated with the robotic joint being controlled. Collocation of the joint processor, PIM, and high-speed bus may increase noise immunity of the control system, and the localized processing of sensor data from the joint motor at the joint level may minimize bus cabling to and from each control node. The joint processor may include a field programmable gate array (FPGA).

A single-board NMR spectrometer based on a software defined radio architecture

NASA Astrophysics Data System (ADS)

Tang, Weinan; Wang, Weimin

2011-01-01

A single-board software defined radio (SDR) spectrometer for nuclear magnetic resonance (NMR) is presented. The SDR-based architecture, realized by combining a single field programmable gate array (FPGA) and a digital signal processor (DSP) with peripheral radio frequency (RF) front-end circuits, makes the spectrometer compact and reconfigurable. The DSP, working as a pulse programmer, communicates with a personal computer via a USB interface and controls the FPGA through a parallel port. The FPGA accomplishes digital processing tasks such as a numerically controlled oscillator (NCO), digital down converter (DDC) and gradient waveform generator. The NCO, with agile control of phase, frequency and amplitude, is part of a direct digital synthesizer that is used to generate an RF pulse. The DDC performs quadrature demodulation, multistage low-pass filtering and gain adjustment to produce a bandpass signal (receiver bandwidth from 3.9 kHz to 10 MHz). The gradient waveform generator is capable of outputting shaped gradient pulse waveforms and supports eddy-current compensation. The spectrometer directly acquires an NMR signal up to 30 MHz in the case of baseband sampling and is suitable for low-field (<0.7 T) application. Due to the featured SDR architecture, this prototype has flexible add-on ability and is expected to be suitable for portable NMR systems.

Expedition Seven CDR Malenkenko performs IFM on Condensate Water Processor

NASA Image and Video Library

2003-07-03

ISS007-E-09229 (3 July 2003) --- Cosmonaut Yuri I. Malenchenko, Expedition 7 mission commander, performs scheduled in-flight maintenance (IFM) on the condensate water processor (SRV-K2M) by removing and replacing its BKO multifiltration/purification column unit, which has reached its service life limit (450 liters min.). The old unit will be discarded on Progress. The IFM took place in the Zvezda Service Module on the International Space Station (ISS). Malenchenko represents Rosaviakosmos.

Expedition Seven CDR Malenkenko performs IFM on Condensate Water Processor

NASA Image and Video Library

2003-07-03

ISS007-E-09231 (3 July 2003) --- Cosmonaut Yuri I. Malenchenko, Expedition 7 mission commander, performs scheduled in-flight maintenance (IFM) on the condensate water processor (SRV-K2M) by removing and replacing its BKO multifiltration/purification column unit, which has reached its service life limit (450 liters min.). The old unit will be discarded on Progress. The IFM took place in the Zvezda Service Module on the International Space Station (ISS). Malenchenko represents Rosaviakosmos.

An ultra-compact processor module based on the R3000

NASA Astrophysics Data System (ADS)

Mullenhoff, D. J.; Kaschmitter, J. L.; Lyke, J. C.; Forman, G. A.

1992-08-01

Viable high density packaging is of critical importance for future military systems, particularly space borne systems which require minimum weight and size and high mechanical integrity. A leading, emerging technology for high density packaging is multi-chip modules (MCM). During the 1980's, a number of different MCM technologies have emerged. In support of Strategic Defense Initiative Organization (SDIO) programs, Lawrence Livermore National Laboratory (LLNL) has developed, utilized, and evaluated several different MCM technologies. Prior LLNL efforts include modules developed in 1986, using hybrid wafer scale packaging, which are still operational in an Air Force satellite mission. More recent efforts have included very high density cache memory modules, developed using laser pantography. As part of the demonstration effort, LLNL and Phillips Laboratory began collaborating in 1990 in the Phase 3 Multi-Chip Module (MCM) technology demonstration project. The goal of this program was to demonstrate the feasibility of General Electric's (GE) High Density Interconnect (HDI) MCM technology. The design chosen for this demonstration was the processor core for a MIPS R3000 based reduced instruction set computer (RISC), which has been described previously. It consists of the R3000 microprocessor, R3010 floating point coprocessor and 128 Kbytes of cache memory.

Spatial attention in the mental architecture: evidence from neuropsychology.

PubMed

Behrmann, M; Black, S E; Murji, S

1995-04-01

Using neuropsychological evidence, this paper examines whether spatial attention functions as a domain-specific module or as a more general-purpose central processor. Data are presented from two spatial attention cuing tasks completed by subjects, with an acquired attentional deficit, and control subjects. In both tasks, an arrow indicated with high probability the side of response (response task) or the side of space on which the stimulus would appear (visuospatial task). In the response task, the stimuli appeared foveally and the response component was lateralized, and in the visuospatial task, the stimuli were lateralized and the response component remained constant in the midline. Only the neglect subjects showed a disproportionate increase in reaction time on both the response and visuospatial tasks when the arrow cued the subject to the ipsilateral side and the stimulus or response was on the side of space contralateral to the lesion. The substantial association across the two tasks suggests that a common underlying internal spatial representation subserves perception and action. While this finding is consistent with Fodor's view of a cross-domain processor, it does not meet all of his criteria of a central processor. We conclude, therefore, that the posterior attentional mechanism is strictly neither a module nor a central processor. Rather, these results suggest that a common attentional mechanism may subserve behavior in domains that are tightly coupled.

Design and implementation of highly parallel pipelined VLSI systems

NASA Astrophysics Data System (ADS)

Delange, Alphonsus Anthonius Jozef

A methodology and its realization as a prototype CAD (Computer Aided Design) system for the design and analysis of complex multiprocessor systems is presented. The design is an iterative process in which the behavioral specifications of the system components are refined into structural descriptions consisting of interconnections and lower level components etc. A model for the representation and analysis of multiprocessor systems at several levels of abstraction and an implementation of a CAD system based on this model are described. A high level design language, an object oriented development kit for tool design, a design data management system, and design and analysis tools such as a high level simulator and graphics design interface which are integrated into the prototype system and graphics interface are described. Procedures for the synthesis of semiregular processor arrays, and to compute the switching of input/output signals, memory management and control of processor array, and sequencing and segmentation of input/output data streams due to partitioning and clustering of the processor array during the subsequent synthesis steps, are described. The architecture and control of a parallel system is designed and each component mapped to a module or module generator in a symbolic layout library, compacted for design rules of VLSI (Very Large Scale Integration) technology. An example of the design of a processor that is a useful building block for highly parallel pipelined systems in the signal/image processing domains is given.

Using Temporal Modulation Sensitivity to Select Stimulation Sites for Processor MAPs in Cochlear Implant Listeners

PubMed Central

Garadat, Soha N.; Zwolan, Teresa A.; Pfingst, Bryan E.

2013-01-01

Previous studies in our laboratory showed that temporal acuity as assessed by modulation detection thresholds (MDTs) varied across activation sites and that this site-to-site variability was subject specific. Using two 10-channel MAPs, the previous experiments showed that processor MAPs that had better across-site mean (ASM) MDTs yielded better speech recognition than MAPs with poorer ASM MDTs tested in the same subject. The current study extends our earlier work on developing more optimal fitting strategies to test the feasibility of using a site-selection approach in the clinical domain. This study examined the hypothesis that revising the clinical speech processor MAP for cochlear implant (CI) recipients by turning off selected sites that have poorer temporal acuity and reallocating frequencies to the remaining electrodes would lead to improved speech recognition. Twelve CI recipients participated in the experiments. We found that site selection procedure based on MDTs in the presence of a masker resulted in improved performance on consonant recognition and recognition of sentences in noise. In contrast, vowel recognition was poorer with the experimental MAP than with the clinical MAP, possibly due to reduced spectral resolution when sites were removed from the experimental MAP. Overall, these results suggest a promising path for improving recipient outcomes using personalized processor-fitting strategies based on a psychophysical measure of temporal acuity. PMID:23881208

Efficient mapping algorithms for scheduling robot inverse dynamics computation on a multiprocessor system

NASA Technical Reports Server (NTRS)

Lee, C. S. G.; Chen, C. L.

1989-01-01

Two efficient mapping algorithms for scheduling the robot inverse dynamics computation consisting of m computational modules with precedence relationship to be executed on a multiprocessor system consisting of p identical homogeneous processors with processor and communication costs to achieve minimum computation time are presented. An objective function is defined in terms of the sum of the processor finishing time and the interprocessor communication time. The minimax optimization is performed on the objective function to obtain the best mapping. This mapping problem can be formulated as a combination of the graph partitioning and the scheduling problems; both have been known to be NP-complete. Thus, to speed up the searching for a solution, two heuristic algorithms were proposed to obtain fast but suboptimal mapping solutions. The first algorithm utilizes the level and the communication intensity of the task modules to construct an ordered priority list of ready modules and the module assignment is performed by a weighted bipartite matching algorithm. For a near-optimal mapping solution, the problem can be solved by the heuristic algorithm with simulated annealing. These proposed optimization algorithms can solve various large-scale problems within a reasonable time. Computer simulations were performed to evaluate and verify the performance and the validity of the proposed mapping algorithms. Finally, experiments for computing the inverse dynamics of a six-jointed PUMA-like manipulator based on the Newton-Euler dynamic equations were implemented on an NCUBE/ten hypercube computer to verify the proposed mapping algorithms. Computer simulation and experimental results are compared and discussed.

Use of amplitude modulation cues recovered from frequency modulation for cochlear implant users when original speech cues are severely degraded.

PubMed

Won, Jong Ho; Shim, Hyun Joon; Lorenzi, Christian; Rubinstein, Jay T

2014-06-01

Won et al. (J Acoust Soc Am 132:1113-1119, 2012) reported that cochlear implant (CI) speech processors generate amplitude-modulation (AM) cues recovered from broadband speech frequency modulation (FM) and that CI users can use these cues for speech identification in quiet. The present study was designed to extend this finding for a wide range of listening conditions, where the original speech cues were severely degraded by manipulating either the acoustic signals or the speech processor. The manipulation of the acoustic signals included the presentation of background noise, simulation of reverberation, and amplitude compression. The manipulation of the speech processor included changing the input dynamic range and the number of channels. For each of these conditions, multiple levels of speech degradation were tested. Speech identification was measured for CI users and compared for stimuli having both AM and FM information (intact condition) or FM information only (FM condition). Each manipulation degraded speech identification performance for both intact and FM conditions. Performance for the intact and FM conditions became similar for stimuli having the most severe degradations. Identification performance generally overlapped for the intact and FM conditions. Moreover, identification performance for the FM condition was better than chance performance even at the maximum level of distortion. Finally, significant correlations were found between speech identification scores for the intact and FM conditions. Altogether, these results suggest that despite poor frequency selectivity, CI users can make efficient use of AM cues recovered from speech FM in difficult listening situations.

FPGA-Based Reconfigurable Processor for Ultrafast Interlaced Ultrasound and Photoacoustic Imaging

PubMed Central

Alqasemi, Umar; Li, Hai; Aguirre, Andrés; Zhu, Quing

2016-01-01

In this paper, we report, to the best of our knowledge, a unique field-programmable gate array (FPGA)-based reconfigurable processor for real-time interlaced co-registered ultrasound and photoacoustic imaging and its application in imaging tumor dynamic response. The FPGA is used to control, acquire, store, delay-and-sum, and transfer the data for real-time co-registered imaging. The FPGA controls the ultrasound transmission and ultrasound and photoacoustic data acquisition process of a customized 16-channel module that contains all of the necessary analog and digital circuits. The 16-channel module is one of multiple modules plugged into a motherboard; their beamformed outputs are made available for a digital signal processor (DSP) to access using an external memory interface (EMIF). The FPGA performs a key role through ultrafast reconfiguration and adaptation of its structure to allow real-time switching between the two imaging modes, including transmission control, laser synchronization, internal memory structure, beamforming, and EMIF structure and memory size. It performs another role by parallel accessing of internal memories and multi-thread processing to reduce the transfer of data and the processing load on the DSP. Furthermore, because the laser will be pulsing even during ultrasound pulse-echo acquisition, the FPGA ensures that the laser pulses are far enough from the pulse-echo acquisitions by appropriate time-division multiplexing (TDM). A co-registered ultrasound and photoacoustic imaging system consisting of four FPGA modules (64-channels) is constructed, and its performance is demonstrated using phantom targets and in vivo mouse tumor models. PMID:22828830

FPGA-based reconfigurable processor for ultrafast interlaced ultrasound and photoacoustic imaging.

PubMed

Alqasemi, Umar; Li, Hai; Aguirre, Andrés; Zhu, Quing

2012-07-01

In this paper, we report, to the best of our knowledge, a unique field-programmable gate array (FPGA)-based reconfigurable processor for real-time interlaced co-registered ultrasound and photoacoustic imaging and its application in imaging tumor dynamic response. The FPGA is used to control, acquire, store, delay-and-sum, and transfer the data for real-time co-registered imaging. The FPGA controls the ultrasound transmission and ultrasound and photoacoustic data acquisition process of a customized 16-channel module that contains all of the necessary analog and digital circuits. The 16-channel module is one of multiple modules plugged into a motherboard; their beamformed outputs are made available for a digital signal processor (DSP) to access using an external memory interface (EMIF). The FPGA performs a key role through ultrafast reconfiguration and adaptation of its structure to allow real-time switching between the two imaging modes, including transmission control, laser synchronization, internal memory structure, beamforming, and EMIF structure and memory size. It performs another role by parallel accessing of internal memories and multi-thread processing to reduce the transfer of data and the processing load on the DSP. Furthermore, because the laser will be pulsing even during ultrasound pulse-echo acquisition, the FPGA ensures that the laser pulses are far enough from the pulse-echo acquisitions by appropriate time-division multiplexing (TDM). A co-registered ultrasound and photoacoustic imaging system consisting of four FPGA modules (64-channels) is constructed, and its performance is demonstrated using phantom targets and in vivo mouse tumor models.

A Versatile Multichannel Digital Signal Processing Module for Microcalorimeter Arrays

NASA Astrophysics Data System (ADS)

Tan, H.; Collins, J. W.; Walby, M.; Hennig, W.; Warburton, W. K.; Grudberg, P.

2012-06-01

Different techniques have been developed for reading out microcalorimeter sensor arrays: individual outputs for small arrays, and time-division or frequency-division or code-division multiplexing for large arrays. Typically, raw waveform data are first read out from the arrays using one of these techniques and then stored on computer hard drives for offline optimum filtering, leading not only to requirements for large storage space but also limitations on achievable count rate. Thus, a read-out module that is capable of processing microcalorimeter signals in real time will be highly desirable. We have developed multichannel digital signal processing electronics that are capable of on-board, real time processing of microcalorimeter sensor signals from multiplexed or individual pixel arrays. It is a 3U PXI module consisting of a standardized core processor board and a set of daughter boards. Each daughter board is designed to interface a specific type of microcalorimeter array to the core processor. The combination of the standardized core plus this set of easily designed and modified daughter boards results in a versatile data acquisition module that not only can easily expand to future detector systems, but is also low cost. In this paper, we first present the core processor/daughter board architecture, and then report the performance of an 8-channel daughter board, which digitizes individual pixel outputs at 1 MSPS with 16-bit precision. We will also introduce a time-division multiplexing type daughter board, which takes in time-division multiplexing signals through fiber-optic cables and then processes the digital signals to generate energy spectra in real time.

Development of the SEASIS instrument for SEDSAT

NASA Technical Reports Server (NTRS)

Maier, Mark W.

1996-01-01

Two SEASIS experiment objectives are key: take images that allow three axis attitude determination and take multi-spectral images of the earth. During the tether mission it is also desirable to capture images for the recoiling tether from the endmass perspective (which has never been observed). SEASIS must store all its imagery taken during the tether mission until the earth downlink can be established. SEASIS determines attitude with a panoramic camera and performs earth observation with a telephoto lens camera. Camera video is digitized, compressed, and stored in solid state memory. These objectives are addressed through the following architectural choices: (1) A camera system using a Panoramic Annular Lens (PAL). This lens has a 360 deg. azimuthal field of view by a +45 degree vertical field measured from a plan normal to the lens boresight axis. It has been shown in Mr. Mark Steadham's UAH M.S. thesis that his camera can determine three axis attitude anytime the earth and one other recognizable celestial object (for example, the sun) is in the field of view. This will be essentially all the time during tether deployment. (2) A second camera system using telephoto lens and filter wheel. The camera is a black and white standard video camera. The filters are chosen to cover the visible spectral bands of remote sensing interest. (3) A processor and mass memory arrangement linked to the cameras. Video signals from the cameras are digitized, compressed in the processor, and stored in a large static RAM bank. The processor is a multi-chip module consisting of a T800 Transputer and three Zoran floating point Digital Signal Processors. This processor module was supplied under ARPA contract by the Space Computer Corporation to demonstrate its use in space.

Digital Radar-Signal Processors Implemented in FPGAs

NASA Technical Reports Server (NTRS)

Berkun, Andrew; Andraka, Ray

2004-01-01

High-performance digital electronic circuits for onboard processing of return signals in an airborne precipitation- measuring radar system have been implemented in commercially available field-programmable gate arrays (FPGAs). Previously, it was standard practice to downlink the radar-return data to a ground station for postprocessing a costly practice that prevents the nearly-real-time use of the data for automated targeting. In principle, the onboard processing could be performed by a system of about 20 personal- computer-type microprocessors; relative to such a system, the present FPGA-based processor is much smaller and consumes much less power. Alternatively, the onboard processing could be performed by an application-specific integrated circuit (ASIC), but in comparison with an ASIC implementation, the present FPGA implementation offers the advantages of (1) greater flexibility for research applications like the present one and (2) lower cost in the small production volumes typical of research applications. The generation and processing of signals in the airborne precipitation measuring radar system in question involves the following especially notable steps: The system utilizes a total of four channels two carrier frequencies and two polarizations at each frequency. The system uses pulse compression: that is, the transmitted pulse is spread out in time and the received echo of the pulse is processed with a matched filter to despread it. The return signal is band-limited and digitally demodulated to a complex baseband signal that, for each pulse, comprises a large number of samples. Each complex pair of samples (denoted a range gate in radar terminology) is associated with a numerical index that corresponds to a specific time offset from the beginning of the radar pulse, so that each such pair represents the energy reflected from a specific range. This energy and the average echo power are computed. The phase of each range bin is compared to the previous echo by complex conjugate multiplication to obtain the mean Doppler shift (and hence the mean and variance of the velocity of precipitation) of the echo at that range.

New developments for SAW channelization for mobile satellite payloads

NASA Technical Reports Server (NTRS)

Peach, R. C.; Mabson, P.

1995-01-01

The use of SAW technology in mobile communication payloads is becoming widely accepted by the industry since being pioneered by Inmarsat for its third generation of satellites. This paper presents new developments in this area, including broadband processors of the Inmarsat 3 type, and the use of SAW filters at L-band. It is demonstrated that SAW processors have considerable potential for increasing the capacity of future communications payloads, while allowing fully transparent operation without any restriction on traffic type or modulation format. In addition to the evolutionary development of Inmarsat type processors, new SAW applications have also emerged recently. Therefore, despite the rapid changes in the industry, it is predicted that SAW processing has a strong future in satellite communications.

A Conformance Test Suite for Arden Syntax Compilers and Interpreters.

PubMed

Wolf, Klaus-Hendrik; Klimek, Mike

2016-01-01

The Arden Syntax for Medical Logic Modules is a standardized and well-established programming language to represent medical knowledge. To test the compliance level of existing compilers and interpreters no public test suite exists. This paper presents the research to transform the specification into a set of unit tests, represented in JUnit. It further reports on the utilization of the test suite testing four different Arden Syntax processors. The presented and compared results reveal the status conformance of the tested processors. How test driven development of Arden Syntax processors can help increasing the compliance with the standard is described with two examples. In the end some considerations how an open source test suite can improve the development and distribution of the Arden Syntax are presented.

Frequency division multiplexed readout of TES detectors with baseband feedback

NASA Astrophysics Data System (ADS)

den Hartog, R.; Audley, M. D.; Beyer, J.; Bruijn, M. P.; de Korte, P.; Gottardi, L.; Hijmering, R.; Jackson, B.; Nieuwenhuizen, A.; van der Kuur, J.; van Leeuwen, B.-J.; Van Loon, D.

2012-09-01

SRON is developing an electronic system for the multiplexed read-out of an array of transition edge sensors (TES) by combining the techniques of frequency domain multiplexing (FDM) with base-band feedback (BBFB). The astronomical applications are the read-out of soft X-ray microcalorimeters and the far-infrared bolometers for the SAFARI instrument on the Japanese mission SPICA. In this paper we derive the requirements for the read-out system regarding noise and dynamic range in the context of the SAFARI instrument, and demonstrate that the current experimental prototype is capable of simultaneously locking 57 channels and complies with these requirements.

Noise considerations for remote detection of life signs with microwave Doppler radar.

PubMed

Nguyen, Dung; Yamada, Shuhei; Park, Byung-Kwon; Lubecke, Victor; Boric-Lubecke, Olga; Host-Madsen, Anders

2007-01-01

This paper describes and quantifies three main sources of baseband noise affecting physiological signals in a direct conversion microwave Doppler radar for life signs detection. They are thermal noise, residual phase noise, and Flicker noise. In order to increase the SNR of physiological signals at baseband, the noise floor, in which the Flicker noise is the most dominant factor, needs to be minimized. This paper shows that with the consideration of the noise factor in our Doppler radar, Flicker noise canceling techniques may drastically reduce the power requirement for heart rate signal detection by as much as a factor of 100.

Front end for GPS receivers

NASA Technical Reports Server (NTRS)

Thomas, Jr., Jess Brooks (Inventor)

1999-01-01

The front end in GPS receivers has the functions of amplifying, down-converting, filtering and sampling the received signals. In the preferred embodiment, only two operations, A/D conversion and a sum, bring the signal from RF to filtered quadrature baseband samples. After amplification and filtering at RF, the L1 and L2 signals are each sampled at RF at a high selected subharmonic rate. The subharmonic sample rates are approximately 900 MHz for L1 and 982 MHz for L2. With the selected subharmonic sampling, the A/D conversion effectively down-converts the signal from RF to quadrature components at baseband. The resulting sample streams for L1 and L2 are each reduced to a lower rate with a digital filter, which becomes a straight sum in the simplest embodiment. The frequency subsystem can be very simple, only requiring the generation of a single reference frequency (e.g. 20.46 MHz minus a small offset) and the simple multiplication of this reference up to the subharmonic sample rates for L1 and L2. The small offset in the reference frequency serves the dual purpose of providing an advantageous offset in the down-converted carrier frequency and in the final baseband sample rate.

Development of digital sideband separating down-conversion for Yuan-Tseh Lee Array

NASA Astrophysics Data System (ADS)

Li, Chao-Te; Kubo, Derek; Cheng, Jen-Chieh; Kuroda, John; Srinivasan, Ranjani; Ho, Solomon; Guzzino, Kim; Chen, Ming-Tang

2016-07-01

This report presents a down-conversion method involving digital sideband separation for the Yuan-Tseh Lee Array (YTLA) to double the processing bandwidth. The receiver consists of a MMIC HEMT LNA front end operating at a wavelength of 3 mm, and sub-harmonic mixers that output signals at intermediate frequencies (IFs) of 2-18 GHz. The sideband separation scheme involves an analog 90° hybrid followed by two mixers that provide down-conversion of the IF signal to a pair of in-phase (I) and quadrature (Q) signals in baseband. The I and Q baseband signals are digitized using 5 Giga sample per second (Gsps) analog-to-digital converters (ADCs). A second hybrid is digitally implemented using field-programmable gate arrays (FPGAs) to produce two sidebands, each with a bandwidth of 1.6 GHz. The 2 x 1.6 GHz band can be tuned to cover any 3.6 GHz window within the aforementioned IF range of the array. Sideband rejection ratios (SRRs) above 20 dB can be obtained across the 3.6 GHz bandwidth by equalizing the power and delay between the I and Q baseband signals. Furthermore, SRRs above 30 dB can be achieved when calibration is applied.

Photonic-Assisted mm-Wave and THz Wireless Transmission towards 100 Gbit/s Data Rate

NASA Astrophysics Data System (ADS)

Freire Hermelo, Maria; Chuenchom, Rattana; Rymanov, Vitaly; Kaiser, Thomas; Sheikh, Fawad; Czylwik, Andreas; Stöhr, Andreas

2017-09-01

This paper presents photonic-assisted 60 GHz mm-wave and 325 GHz system approaches that enable the transmission of spectral-efficient and high data rate signals over fiber and over air. First, we focus on generic channel characteristics within the mm-wave 60 GHz band and at the terahertz (THz) band around 325 GHz. Next, for generating the high data rate baseband signals, we present a technical solution for constructing an extreme bandwidth arbitrary waveform generator (AWG). We then report the development of a novel coherent photonic mixer (CPX) module for direct optic-to-RF conversion of extreme wideband optical signals, with a>5 dB higher conversion gain compared to conventional photodiodes. Finally, we experimentally demonstrate record spectral efficient wireless transmission for both bands. The achieved spectral efficiencies reach 10 bit/s/Hz for the 60 GHz band and 6 bit/s/Hz for the 325 GHz band. The maximum data rate transmitted at THz frequencies in the 325 GHz band is 59 Gbit/s using a 64-QAM-OFDM modulation format and a 10 GHz wide data signal.

Toward a reduced-wire readout system for ultrasound imaging.

PubMed

Lim, Jaemyung; Arkan, Evren F; Degertekin, F Levent; Ghovanloo, Maysam

2014-01-01

We present a system-on-a-chip (SoC) for use in high-frequency capacitive micromachined ultrasonic transducer (CMUT) imaging systems. This SoC consists of trans-impedance amplifiers (TIA), delay locked loop (DLL) based clock multiplier, quadrature sampler, and pulse width modulator (PWM). The SoC down converts RF echo signal to baseband by quadrature sampling which facilitates modulation. To send data through a 1.6 m wire in the catheter which has limited bandwidth and is vulnerable to noise, the SoC creates a pseudo-digital PWM signal which can be used for back telemetry or wireless readout of the RF data. In this implementation, using a 0.35-μm std. CMOS process, the TIA and single-to-differential (STD) converter had 45 MHz bandwidth, the quadrature sampler had 10.1 dB conversion gain, and the PWM had 5-bit ENoB. Preliminary results verified front-end functionality, and the power consumption of a TIA, STD, quadrature sampler, PWM, and clock multiplier was 26 mW from a 3 V supply.

Toward a Reduced-Wire Readout System for Ultrasound Imaging

PubMed Central

Lim, Jaemyung; Arkan, Evren F.; Degertekin, F. Levent; Ghovanloo, Maysam

2015-01-01

We present a system-on-a-chip (SoC) for use in high-frequency capacitive micromachined ultrasonic transducer (CMUT) imaging systems. This SoC consists of trans-impedance amplifiers (TIA), delay locked loop (DLL) based clock multiplier, quadrature sampler, and pulse width modulator (PWM). The SoC down converts RF echo signal to baseband by quadrature sampling which facilitates modulation. To send data through a 1.6 m wire in the catheter which has limited bandwidth and is vulnerable to noise, the SoC creates a pseudo-digital PWM signal which can be used for back telemetry or wireless readout of the RF data. In this implementation, using a 0.35-μm std. CMOS process, the TIA and single-to-differential (STD) converter had 45 MHz bandwidth, the quadrature sampler had 10.1 dB conversion gain, and the PWM had 5-bit ENoB. Preliminary results verified front-end functionality, and the power consumption of a TIA, STD, quadrature sampler, PWM, and clock multiplier was 26 mW from a 3 V supply. PMID:25571135

Methods and Devices for Modifying Active Paths in a K-Delta-1-Sigma Modulator

NASA Technical Reports Server (NTRS)

Ardalan, Sasan (Inventor)

2017-01-01

The invention relates to an improved K-Delta-1-Sigma Modulators (KG1Ss) that achieve multi GHz sampling rates with 90 nm and 45 nm CMOS processes, and that provide the capability to balance performance with power in many applications. The improved KD1Ss activate all paths when high performance is needed (e.g. high bandwidth), and reduce the effective bandwidth by shutting down multiple paths when low performance is required. The improved KD1Ss can adjust the baseband filtering for lower bandwidth, and can provide large savings in power consumption while maintaining the communication link, which is a great advantage in space communications. The improved KD1Ss herein provides a receiver that adjusts to accommodate a higher rate when a packet is received at a low bandwidth, and at a initial lower rate, power is saved by turning off paths in the KD1S Analog to Digital Converter, and where when a higher rate is required, multiple paths are enabled in the KD1S to accommodate the higher band widths.

Wideband fiber optic communications link

NASA Astrophysics Data System (ADS)

Bray, J. R.

1984-12-01

This thesis examined the feasibility of upgrading a nine port fiber optic bundle telecommunications system to a single strand fiber optic system. Usable pieces of equipment were identified and new Light Emitting Diodes (LED), Photodetectors and single strand SMA styled fiber optic connectors were ordered. Background research was conducted in the area of fiber optic power launching, fiber losses, connector losses and efficiencies. A new modulation/demodulation circuit was designed and constructed using parts from unused equipment. A new front panel was constructed to house the components, switches and connectors. A 2-m piece of optical fiber was terminated with the new connectors and tested for connector loss, numeric aperture and attenuation. The new LED was characterized by its emission radiation pattern and the entire system was tested for functional operation, frequency response and bandwidth of operation. An operations manual was prepared to ensure proper use in the future. The result was a two piece, single strand, fiber optic communications systems fully TTL compatible, capable of transmitting digital signals from 80 Kbit/sec to 20 Mbit/sec. The system was tested in a half duplex mode using both baseband and carrier modulated signals.

ELIPS: Toward a Sensor Fusion Processor on a Chip

NASA Technical Reports Server (NTRS)

Daud, Taher; Stoica, Adrian; Tyson, Thomas; Li, Wei-te; Fabunmi, James

1998-01-01

The paper presents the concept and initial tests from the hardware implementation of a low-power, high-speed reconfigurable sensor fusion processor. The Extended Logic Intelligent Processing System (ELIPS) processor is developed to seamlessly combine rule-based systems, fuzzy logic, and neural networks to achieve parallel fusion of sensor in compact low power VLSI. The first demonstration of the ELIPS concept targets interceptor functionality; other applications, mainly in robotics and autonomous systems are considered for the future. The main assumption behind ELIPS is that fuzzy, rule-based and neural forms of computation can serve as the main primitives of an "intelligent" processor. Thus, in the same way classic processors are designed to optimize the hardware implementation of a set of fundamental operations, ELIPS is developed as an efficient implementation of computational intelligence primitives, and relies on a set of fuzzy set, fuzzy inference and neural modules, built in programmable analog hardware. The hardware programmability allows the processor to reconfigure into different machines, taking the most efficient hardware implementation during each phase of information processing. Following software demonstrations on several interceptor data, three important ELIPS building blocks (a fuzzy set preprocessor, a rule-based fuzzy system and a neural network) have been fabricated in analog VLSI hardware and demonstrated microsecond-processing times.

Micromechanical Signal Processors

NASA Astrophysics Data System (ADS)

Nguyen, Clark Tu-Cuong

Completely monolithic high-Q micromechanical signal processors constructed of polycrystalline silicon and integrated with CMOS electronics are described. The signal processors implemented include an oscillator, a bandpass filter, and a mixer + filter--all of which are components commonly required for up- and down-conversion in communication transmitters and receivers, and all of which take full advantage of the high Q of micromechanical resonators. Each signal processor is designed, fabricated, then studied with particular attention to the performance consequences associated with miniaturization of the high-Q element. The fabrication technology which realizes these components merges planar integrated circuit CMOS technologies with those of polysilicon surface micromachining. The technologies are merged in a modular fashion, where the CMOS is processed in the first module, the microstructures in a following separate module, and at no point in the process sequence are steps from each module intermixed. Although the advantages of such modularity include flexibility in accommodating new module technologies, the developed process constrained the CMOS metallization to a high temperature refractory metal (tungsten metallization with TiSi _2 contact barriers) and constrained the micromachining process to long-term temperatures below 835^circC. Rapid-thermal annealing (RTA) was used to relieve residual stress in the mechanical structures. To reduce the complexity involved with developing this merged process, capacitively transduced resonators are utilized. High-Q single resonator and spring-coupled micromechanical resonator filters are also investigated, with particular attention to noise performance, bandwidth control, and termination design. The noise in micromechanical filters is found to be fairly high due to poor electromechanical coupling on the micro-scale with present-day technologies. Solutions to this high series resistance problem are suggested, including smaller electrode-to-resonator gaps to increase the coupling capacitance. Active Q-control techniques are demonstrated which control the bandwidth of micromechanical filters and simulate filter terminations with little passband distortion. Noise analysis shows that these active techniques are relatively quiet when compared with other resistive techniques. Modulation techniques are investigated whereby a single resonator or a filter constructed from several such resonators can provide both a mixing and a filtering function, or a filtering and amplitude modulation function. These techniques center around the placement of a carrier signal on the micromechanical resonator. Finally, micro oven stabilization is investigated in an attempt to null the temperature coefficient of a polysilicon micromechanical resonator. Here, surface micromachining procedures are utilized to fabricate a polysilicon resonator on a microplatform--two levels of suspension--equipped with heater and temperature sensing resistors, which are then imbedded in a feedback loop to control the platform (and resonator) temperature. (Abstract shortened by UMI.).

A Versatile Image Processor For Digital Diagnostic Imaging And Its Application In Computed Radiography

NASA Astrophysics Data System (ADS)

Blume, H.; Alexandru, R.; Applegate, R.; Giordano, T.; Kamiya, K.; Kresina, R.

1986-06-01

In a digital diagnostic imaging department, the majority of operations for handling and processing of images can be grouped into a small set of basic operations, such as image data buffering and storage, image processing and analysis, image display, image data transmission and image data compression. These operations occur in almost all nodes of the diagnostic imaging communications network of the department. An image processor architecture was developed in which each of these functions has been mapped into hardware and software modules. The modular approach has advantages in terms of economics, service, expandability and upgradeability. The architectural design is based on the principles of hierarchical functionality, distributed and parallel processing and aims at real time response. Parallel processing and real time response is facilitated in part by a dual bus system: a VME control bus and a high speed image data bus, consisting of 8 independent parallel 16-bit busses, capable of handling combined up to 144 MBytes/sec. The presented image processor is versatile enough to meet the video rate processing needs of digital subtraction angiography, the large pixel matrix processing requirements of static projection radiography, or the broad range of manipulation and display needs of a multi-modality diagnostic work station. Several hardware modules are described in detail. For illustrating the capabilities of the image processor, processed 2000 x 2000 pixel computed radiographs are shown and estimated computation times for executing the processing opera-tions are presented.

A novel speech-processing strategy incorporating tonal information for cochlear implants.

PubMed

Lan, N; Nie, K B; Gao, S K; Zeng, F G

2004-05-01

Good performance in cochlear implant users depends in large part on the ability of a speech processor to effectively decompose speech signals into multiple channels of narrow-band electrical pulses for stimulation of the auditory nerve. Speech processors that extract only envelopes of the narrow-band signals (e.g., the continuous interleaved sampling (CIS) processor) may not provide sufficient information to encode the tonal cues in languages such as Chinese. To improve the performance in cochlear implant users who speak tonal language, we proposed and developed a novel speech-processing strategy, which extracted both the envelopes of the narrow-band signals and the fundamental frequency (F0) of the speech signal, and used them to modulate both the amplitude and the frequency of the electrical pulses delivered to stimulation electrodes. We developed an algorithm to extract the fundatmental frequency and identified the general patterns of pitch variations of four typical tones in Chinese speech. The effectiveness of the extraction algorithm was verified with an artificial neural network that recognized the tonal patterns from the extracted F0 information. We then compared the novel strategy with the envelope-extraction CIS strategy in human subjects with normal hearing. The novel strategy produced significant improvement in perception of Chinese tones, phrases, and sentences. This novel processor with dynamic modulation of both frequency and amplitude is encouraging for the design of a cochlear implant device for sensorineurally deaf patients who speak tonal languages.

Across-site patterns of modulation detection: Relation to speech recognitiona)

PubMed Central

Garadat, Soha N.; Zwolan, Teresa A.; Pfingst, Bryan E.

2012-01-01

The aim of this study was to identify across-site patterns of modulation detection thresholds (MDTs) in subjects with cochlear implants and to determine if removal of sites with the poorest MDTs from speech processor programs would result in improved speech recognition. Five hundred millisecond trains of symmetric-biphasic pulses were modulated sinusoidally at 10 Hz and presented at a rate of 900 pps using monopolar stimulation. Subjects were asked to discriminate a modulated pulse train from an unmodulated pulse train for all electrodes in quiet and in the presence of an interleaved unmodulated masker presented on the adjacent site. Across-site patterns of masked MDTs were then used to construct two 10-channel MAPs such that one MAP consisted of sites with the best masked MDTs and the other MAP consisted of sites with the worst masked MDTs. Subjects’ speech recognition skills were compared when they used these two different MAPs. Results showed that MDTs were variable across sites and were elevated in the presence of a masker by various amounts across sites. Better speech recognition was observed when the processor MAP consisted of sites with best masked MDTs, suggesting that temporal modulation sensitivity has important contributions to speech recognition with a cochlear implant. PMID:22559376

Amplitude modulation detection with concurrent frequency modulation.

PubMed

Nagaraj, Naveen K

2016-09-01

Human speech consists of concomitant temporal modulations in amplitude and frequency that are crucial for speech perception. In this study, amplitude modulation (AM) detection thresholds were measured for 550 and 5000 Hz carriers with and without concurrent frequency modulation (FM), at AM rates crucial for speech perception. Results indicate that adding 40 Hz FM interferes with AM detection, more so for 5000 Hz carrier and for frequency deviations exceeding the critical bandwidth of the carrier frequency. These findings suggest that future cochlear implant processors, encoding speech fine-structures may consider limiting the FM to narrow bandwidth and to low frequencies.

MOSAIC - A space-multiplexing technique for optical processing of large images

NASA Technical Reports Server (NTRS)

Athale, Ravindra A.; Astor, Michael E.; Yu, Jeffrey

1993-01-01

A technique for Fourier processing of images larger than the space-bandwidth products of conventional or smart spatial light modulators and two-dimensional detector arrays is described. The technique involves a spatial combination of subimages displayed on individual spatial light modulators to form a phase-coherent image, which is subsequently processed with Fourier optical techniques. Because of the technique's similarity with the mosaic technique used in art, the processor used is termed an optical MOSAIC processor. The phase accuracy requirements of this system were studied by computer simulation. It was found that phase errors of less than lambda/8 did not degrade the performance of the system and that the system was relatively insensitive to amplitude nonuniformities. Several schemes for implementing the subimage combination are described. Initial experimental results demonstrating the validity of the mosaic concept are also presented.

Embedded Palmprint Recognition System Using OMAP 3530

PubMed Central

Shen, Linlin; Wu, Shipei; Zheng, Songhao; Ji, Zhen

2012-01-01

We have proposed in this paper an embedded palmprint recognition system using the dual-core OMAP 3530 platform. An improved algorithm based on palm code was proposed first. In this method, a Gabor wavelet is first convolved with the palmprint image to produce a response image, where local binary patterns are then applied to code the relation among the magnitude of wavelet response at the ccentral pixel with that of its neighbors. The method is fully tested using the public PolyU palmprint database. While palm code achieves only about 89% accuracy, over 96% accuracy is achieved by the proposed G-LBP approach. The proposed algorithm was then deployed to the DSP processor of OMAP 3530 and work together with the ARM processor for feature extraction. When complicated algorithms run on the DSP processor, the ARM processor can focus on image capture, user interface and peripheral control. Integrated with an image sensing module and central processing board, the designed device can achieve accurate and real time performance. PMID:22438721

Embedded palmprint recognition system using OMAP 3530.

PubMed

Shen, Linlin; Wu, Shipei; Zheng, Songhao; Ji, Zhen

2012-01-01

We have proposed in this paper an embedded palmprint recognition system using the dual-core OMAP 3530 platform. An improved algorithm based on palm code was proposed first. In this method, a Gabor wavelet is first convolved with the palmprint image to produce a response image, where local binary patterns are then applied to code the relation among the magnitude of wavelet response at the central pixel with that of its neighbors. The method is fully tested using the public PolyU palmprint database. While palm code achieves only about 89% accuracy, over 96% accuracy is achieved by the proposed G-LBP approach. The proposed algorithm was then deployed to the DSP processor of OMAP 3530 and work together with the ARM processor for feature extraction. When complicated algorithms run on the DSP processor, the ARM processor can focus on image capture, user interface and peripheral control. Integrated with an image sensing module and central processing board, the designed device can achieve accurate and real time performance.

Optical interconnection using polyimide waveguide for multichip module

NASA Astrophysics Data System (ADS)

Koyanagi, Mitsumasa

1996-01-01

We have developed a parallel processor system with 152 RISC processor chips specific for Monte-Carlo analysis. This system has the ring-bus architecture. The performance of several Gflops is expected in this system according to the computer simulation. However, it was revealed that the data transfer speed of the bus has to be increased more dramatically in order to further increase the performance. Then, we propose to introduce the optical interconnection into the parallel processor system to increase the data transfer speed of the buses. The double ringbus architecture is employed in this new parallel processor system with optical interconnection. The free-space optical interconnection arid the optical waveguide are used for the optical ring-bus. Thin polyimide film was used to form the optical waveguide. A relatively low propagation loss was achieved in the polyimide optical waveguide. In addition, it was confirmed that the propagation direction of signal light can be easily changed by using a micro-mirror.

Optical interconnection using polyimide waveguide for multichip module

NASA Astrophysics Data System (ADS)

Koyanagi, Mitsumasa

1996-01-01

We have developed a parallel processor system with 152 RISC processor chips specific for Monte-Carlo analysis. This system has the ring-bus architecture. The performance of several Gflops is expected in this system according to the computer simulation. However, it was revealed that the data transfer speed of the bus has to be increased more dramatically in order to further increase the performance. Then, we propose to introduce the optical interconnection into the parallel processor system to increase the data transfer speed of the buses. The double ring-bus architecture is employed in this new parallel processor system with optical interconnection. The free-space optical interconnection and the optical waveguide are used for the optical ring-bus. Thin polyimide film was used to form the optical waveguide. A relatively low propagation loss was achieved in the polyimide optical waveguide. In addition, it was confirmed that the propagation direction of signal light can be easily changed by using a micro-mirror.

EGR distribution and fluctuation probe based on CO2 measurements

DOEpatents

Parks, II, James E.; Partridge, Jr., William P.; Yoo, Ji Hyung

2015-06-30

A diagnostic system having a laser, an EGR probe, a detector and a processor. The laser may be a swept-.lamda. laser having a sweep range including a significant CO.sub.2 feature and substantially zero absorption regions. The sweep range may extend from about 2.708 .mu.m to about 2.7085 .mu.m. The processor may determine CO.sub.2 concentration as a function of the detector output signal. The processor may normalize the output signal as a function of the zero absorption regions. The system may include a plurality of EGR probes receiving light from a single laser. The system may include a separate detector for each probe. Alternatively, the system may combine the light returning from the different probes into a composite beam that is measured by a single detector. A unique modulation characteristic may be introduced into each light beam before combination so that the processor can discriminate between them in the composite beam.

Software-Reconfigurable Processors for Spacecraft

NASA Technical Reports Server (NTRS)

Farrington, Allen; Gray, Andrew; Bell, Bryan; Stanton, Valerie; Chong, Yong; Peters, Kenneth; Lee, Clement; Srinivasan, Jeffrey

2005-01-01

A report presents an overview of an architecture for a software-reconfigurable network data processor for a spacecraft engaged in scientific exploration. When executed on suitable electronic hardware, the software performs the functions of a physical layer (in effect, acts as a software radio in that it performs modulation, demodulation, pulse-shaping, error correction, coding, and decoding), a data-link layer, a network layer, a transport layer, and application-layer processing of scientific data. The software-reconfigurable network processor is undergoing development to enable rapid prototyping and rapid implementation of communication, navigation, and scientific signal-processing functions; to provide a long-lived communication infrastructure; and to provide greatly improved scientific-instrumentation and scientific-data-processing functions by enabling science-driven in-flight reconfiguration of computing resources devoted to these functions. This development is an extension of terrestrial radio and network developments (e.g., in the cellular-telephone industry) implemented in software running on such hardware as field-programmable gate arrays, digital signal processors, traditional digital circuits, and mixed-signal application-specific integrated circuits (ASICs).

Software design and implementation of ship heave motion monitoring system based on MBD method

NASA Astrophysics Data System (ADS)

Yu, Yan; Li, Yuhan; Zhang, Chunwei; Kang, Won-Hee; Ou, Jinping

2015-03-01

Marine transportation plays a significant role in the modern transport sector due to its advantage of low cost, large capacity. It is being attached enormous importance to all over the world. Nowadays the related areas of product development have become an existing hot spot. DSP signal processors feature micro volume, low cost, high precision, fast processing speed, which has been widely used in all kinds of monitoring systems. But traditional DSP code development process is time-consuming, inefficiency, costly and difficult. MathWorks company proposed Model-based Design (MBD) to overcome these defects. By calling the target board modules in simulink library to compile and generate the corresponding code for the target processor. And then automatically call DSP integrated development environment CCS for algorithm validation on the target processor. This paper uses the MDB to design the algorithm for the ship heave motion monitoring system. It proves the effectiveness of the MBD run successfully on the processor.

Automation in the Space Station module power management and distribution Breadboard

NASA Technical Reports Server (NTRS)

Walls, Bryan; Lollar, Louis F.

1990-01-01

The Space Station Module Power Management and Distribution (SSM/PMAD) Breadboard, located at NASA's Marshall Space Flight Center (MSFC) in Huntsville, Alabama, models the power distribution within a Space Station Freedom Habitation or Laboratory module. Originally designed for 20 kHz ac power, the system is now being converted to high voltage dc power with power levels on a par with those expected for a space station module. In addition to the power distribution hardware, the system includes computer control through a hierarchy of processes. The lowest level process consists of fast, simple (from a computing standpoint) switchgear, capable of quickly safing the system. The next level consists of local load center processors called Lowest Level Processors (LLP's). These LLP's execute load scheduling, perform redundant switching, and shed loads which use more than scheduled power. The level above the LLP's contains a Communication and Algorithmic Controller (CAC) which coordinates communications with the highest level. Finally, at this highest level, three cooperating Artificial Intelligence (AI) systems manage load prioritization, load scheduling, load shedding, and fault recovery and management. The system provides an excellent venue for developing and examining advanced automation techniques. The current system and the plans for its future are examined.

Simulation analysis of a microcomputer-based, low-cost Omega navigation system

NASA Technical Reports Server (NTRS)

Lilley, R. W.; Salter, R. J., Jr.

1976-01-01

The current status of research on a proposed micro-computer-based, low-cost Omega Navigation System (ONS) is described. The design approach emphasizes minimum hardware, maximum software, and the use of a low-cost, commercially-available microcomputer. Currently under investigation is the implementation of a low-cost navigation processor and its interface with an omega sensor to complete the hardware-based ONS. Sensor processor functions are simulated to determine how many of the sensor processor functions can be handled by innovative software. An input data base of live Omega ground and flight test data was created. The Omega sensor and microcomputer interface modules used to collect the data are functionally described. Automatic synchronization to the Omega transmission pattern is described as an example of the algorithms developed using this data base.

Advances in optical information processing IV; Proceedings of the Meeting, Orlando, FL, Apr. 18-20, 1990

NASA Astrophysics Data System (ADS)

Pape, Dennis R.

1990-09-01

The present conference discusses topics in optical image processing, optical signal processing, acoustooptic spectrum analyzer systems and components, and optical computing. Attention is given to tradeoffs in nonlinearly recorded matched filters, miniature spatial light modulators, detection and classification using higher-order statistics of optical matched filters, rapid traversal of an image data base using binary synthetic discriminant filters, wideband signal processing for emitter location, an acoustooptic processor for autonomous SAR guidance, and sampling of Fresnel transforms. Also discussed are an acoustooptic RF signal-acquisition system, scanning acoustooptic spectrum analyzers, the effects of aberrations on acoustooptic systems, fast optical digital arithmetic processors, information utilization in analog and digital processing, optical processors for smart structures, and a self-organizing neural network for unsupervised learning.

Systems and methods for selective detection and imaging in coherent Raman microscopy by spectral excitation shaping

DOEpatents

Xie, Xiaoliang Sunney; Freudiger, Christian; Min, Wei

2016-03-15

A microscopy imaging system is disclosed that includes a light source system, a spectral shaper, a modulator system, an optics system, an optical detector and a processor. The light source system is for providing a first train of pulses and a second train of pulses. The spectral shaper is for spectrally modifying an optical property of at least some frequency components of the broadband range of frequency components such that the broadband range of frequency components is shaped producing a shaped first train of pulses to specifically probe a spectral feature of interest from a sample, and to reduce information from features that are not of interest from the sample. The modulator system is for modulating a property of at least one of the shaped first train of pulses and the second train of pulses at a modulation frequency. The optical detector is for detecting an integrated intensity of substantially all optical frequency components of a train of pulses of interest transmitted or reflected through the common focal volume. The processor is for detecting a modulation at the modulation frequency of the integrated intensity of substantially all of the optical frequency components of the train of pulses of interest due to the non-linear interaction of the shaped first train of pulses with the second train of pulses as modulated in the common focal volume, and for providing an output signal for a pixel of an image for the microscopy imaging system.

Scalable Multiprocessor for High-Speed Computing in Space

NASA Technical Reports Server (NTRS)

Lux, James; Lang, Minh; Nishimoto, Kouji; Clark, Douglas; Stosic, Dorothy; Bachmann, Alex; Wilkinson, William; Steffke, Richard

2004-01-01

A report discusses the continuing development of a scalable multiprocessor computing system for hard real-time applications aboard a spacecraft. "Hard realtime applications" signifies applications, like real-time radar signal processing, in which the data to be processed are generated at "hundreds" of pulses per second, each pulse "requiring" millions of arithmetic operations. In these applications, the digital processors must be tightly integrated with analog instrumentation (e.g., radar equipment), and data input/output must be synchronized with analog instrumentation, controlled to within fractions of a microsecond. The scalable multiprocessor is a cluster of identical commercial-off-the-shelf generic DSP (digital-signal-processing) computers plus generic interface circuits, including analog-to-digital converters, all controlled by software. The processors are computers interconnected by high-speed serial links. Performance can be increased by adding hardware modules and correspondingly modifying the software. Work is distributed among the processors in a parallel or pipeline fashion by means of a flexible master/slave control and timing scheme. Each processor operates under its own local clock; synchronization is achieved by broadcasting master time signals to all the processors, which compute offsets between the master clock and their local clocks.

Developing infrared array controller with software real time operating system

NASA Astrophysics Data System (ADS)

Sako, Shigeyuki; Miyata, Takashi; Nakamura, Tomohiko; Motohara, Kentaro; Uchimoto, Yuka Katsuno; Onaka, Takashi; Kataza, Hirokazu

2008-07-01

Real-time capabilities are required for a controller of a large format array to reduce a dead-time attributed by readout and data transfer. The real-time processing has been achieved by dedicated processors including DSP, CPLD, and FPGA devices. However, the dedicated processors have problems with memory resources, inflexibility, and high cost. Meanwhile, a recent PC has sufficient resources of CPUs and memories to control the infrared array and to process a large amount of frame data in real-time. In this study, we have developed an infrared array controller with a software real-time operating system (RTOS) instead of the dedicated processors. A Linux PC equipped with a RTAI extension and a dual-core CPU is used as a main computer, and one of the CPU cores is allocated to the real-time processing. A digital I/O board with DMA functions is used for an I/O interface. The signal-processing cores are integrated in the OS kernel as a real-time driver module, which is composed of two virtual devices of the clock processor and the frame processor tasks. The array controller with the RTOS realizes complicated operations easily, flexibly, and at a low cost.

Multimedia-based decision support system for hazards recognition and abatement

DOEpatents

Czachowski, John B.; Zoldak, John T.

1998-01-01

A system for monitoring a site includes a portable data collection module used in the field to collect site specific data, and a processor module located at a central location. The data collection module displays choices of categories of findings, and then specific findings within each category. A selected specific finding is then displayed in report form with a citation to the specific code or statutory requirement, as well as a recommended course of action and an abatement date.

FPGA Acceleration of the phylogenetic likelihood function for Bayesian MCMC inference methods.

PubMed

Zierke, Stephanie; Bakos, Jason D

2010-04-12

Likelihood (ML)-based phylogenetic inference has become a popular method for estimating the evolutionary relationships among species based on genomic sequence data. This method is used in applications such as RAxML, GARLI, MrBayes, PAML, and PAUP. The Phylogenetic Likelihood Function (PLF) is an important kernel computation for this method. The PLF consists of a loop with no conditional behavior or dependencies between iterations. As such it contains a high potential for exploiting parallelism using micro-architectural techniques. In this paper, we describe a technique for mapping the PLF and supporting logic onto a Field Programmable Gate Array (FPGA)-based co-processor. By leveraging the FPGA's on-chip DSP modules and the high-bandwidth local memory attached to the FPGA, the resultant co-processor can accelerate ML-based methods and outperform state-of-the-art multi-core processors. We use the MrBayes 3 tool as a framework for designing our co-processor. For large datasets, we estimate that our accelerated MrBayes, if run on a current-generation FPGA, achieves a 10x speedup relative to software running on a state-of-the-art server-class microprocessor. The FPGA-based implementation achieves its performance by deeply pipelining the likelihood computations, performing multiple floating-point operations in parallel, and through a natural log approximation that is chosen specifically to leverage a deeply pipelined custom architecture. Heterogeneous computing, which combines general-purpose processors with special-purpose co-processors such as FPGAs and GPUs, is a promising approach for high-performance phylogeny inference as shown by the growing body of literature in this field. FPGAs in particular are well-suited for this task because of their low power consumption as compared to many-core processors and Graphics Processor Units (GPUs).

ATCA digital controller hardware for vertical stabilization of plasmas in tokamaks

DOE Office of Scientific and Technical Information (OSTI.GOV)

Batista, A. J. N.; Sousa, J.; Varandas, C. A. F.

2006-10-15

The efficient vertical stabilization (VS) of plasmas in tokamaks requires a fast reaction of the VS controller, for example, after detection of edge localized modes (ELM). For controlling the effects of very large ELMs a new digital control hardware, based on the Advanced Telecommunications Computing Architecture trade mark sign (ATCA), is being developed aiming to reduce the VS digital control loop cycle (down to an optimal value of 10 {mu}s) and improve the algorithm performance. The system has 1 ATCA trade mark sign processor module and up to 12 ATCA trade mark sign control modules, each one with 32 analogmore » input channels (12 bit resolution), 4 analog output channels (12 bit resolution), and 8 digital input/output channels. The Aurora trade mark sign and PCI Express trade mark sign communication protocols will be used for data transport, between modules, with expected latencies below 2 {mu}s. Control algorithms are implemented on a ix86 based processor with 6 Gflops and on field programmable gate arrays with 80 GMACS, interconnected by serial gigabit links in a full mesh topology.« less

ULA-OP 256: A 256-Channel Open Scanner for Development and Real-Time Implementation of New Ultrasound Methods.

PubMed

Boni, Enrico; Bassi, Luca; Dallai, Alessandro; Guidi, Francesco; Meacci, Valentino; Ramalli, Alessandro; Ricci, Stefano; Tortoli, Piero

2016-10-01

Open scanners offer an increasing support to the ultrasound researchers who are involved in the experimental test of novel methods. Each system presents specific performance in terms of number of channels, flexibility, processing power, data storage capability, and overall dimensions. This paper reports the design criteria and hardware/software implementation details of a new 256-channel ultrasound advanced open platform. This system is organized in a modular architecture, including multiple front-end boards, interconnected by a high-speed (80 Gb/s) ring, capable of finely controlling all transmit (TX) and receive (RX) signals. High flexibility and processing power (equivalent to 2500 GFLOP) are guaranteed by the possibility of individually programming multiple digital signal processors and field programmable gate arrays. Eighty GB of on-board memory are available for the storage of prebeamforming, postbeamforming, and baseband data. The use of latest generation devices allowed to integrate all needed electronics in a small size ( 34 cm ×30 cm ×26 cm). The system implements a multiline beamformer that allows obtaining images of 96 lines by 2048 depths at a frame rate of 720 Hz (expandable to 3000 Hz). The multiline beamforming capability is also exploited to implement a real-time vector Doppler scheme in which a single TX and two independent RX apertures are simultaneously used to maintain the analysis over a full pulse repetition frequency range.

Characterization of a high performance ultra-thin heat pipe cooling module for mobile hand held electronic devices

NASA Astrophysics Data System (ADS)

Ahamed, Mohammad Shahed; Saito, Yuji; Mashiko, Koichi; Mochizuki, Masataka

2017-11-01

In recent years, heat pipes have been widely used in various hand held mobile electronic devices such as smart phones, tablet PCs, digital cameras. With the development of technology these devices have different user friendly features and applications; which require very high clock speeds of the processor. In general, a high clock speed generates a lot of heat, which needs to be spreaded or removed to eliminate the hot spot on the processor surface. However, it is a challenging task to achieve proper cooling of such electronic devices mentioned above because of their confined spaces and concentrated heat sources. Regarding this challenge, we introduced an ultra-thin heat pipe; this heat pipe consists of a special fiber wick structure named as "Center Fiber Wick" which can provide sufficient vapor space on the both sides of the wick structure. We also developed a cooling module that uses this kind of ultra-thin heat pipe to eliminate the hot spot issue. This cooling module consists of an ultra-thin heat pipe and a metal plate. By changing the width, the flattened thickness and the effective length of the ultra-thin heat pipe, several experiments have been conducted to characterize the thermal properties of the developed cooling module. In addition, other experiments were also conducted to determine the effects of changes in the number of heat pipes in a single module. Characterization and comparison of the module have also been conducted both experimentally and theoretically.

Optical phase locked loop for transparent inter-satellite communications.

PubMed

Herzog, F; Kudielka, K; Erni, D; Bächtold, W

2005-05-16

A novel type of optical phase locked loop (OPLL), optimized for homodyne inter-satellite communication, is presented. The loop employs a conventional 180? 3 dB optical hybrid and an AC-coupled balanced front end. No residual carrier transmission is required for phase locking. The loop accepts analog as well as digital data and various modulation formats. The only requirement to the transmitted user signal is a constant envelope. Phase error extraction occurs through applying a small sinusoidal local oscillator (LO) phase disturbance, while measuring its impact on the power of the baseband output signal. First experimental results indicate a receiver sensitivity of 36 photons/bit (-55.7 dBm) for a BER of 10 ;-9, when transmitting a PRBS-31 signal at a data rate of 400 Mbit/s. The system setup employs diode-pumped Nd:YAG lasers at a wavelength of 1.06 mum.

Optical phase locked loop for transparent inter-satellite communications

NASA Astrophysics Data System (ADS)

Herzog, F.; Kudielka, K.; Erni, D.; Bächtold, W.

2005-05-01

A novel type of optical phase locked loop (OPLL), optimized for homodyne inter-satellite communication, is presented. The loop employs a conventional 180◦ 3 dB optical hybrid and an AC-coupled balanced front end. No residual carrier transmission is required for phase locking. The loop accepts analog as well as digital data and various modulation formats. The only requirement to the transmitted user signal is a constant envelope. Phase error extraction occurs through applying a small sinusoidal local oscillator (LO) phase disturbance, while measuring its impact on the power of the baseband output signal. First experimental results indicate a receiver sensitivity of 36 photons/bit (-55.7 dBm) for a BER of 10 ^-9, when transmitting a PRBS-31 signal at a data rate of 400 Mbit/s. The system setup employs diode-pumped Nd:YAG lasers at a wavelength of 1.06 μm.

The Statistical Loop Analyzer (SLA)

NASA Technical Reports Server (NTRS)

Lindsey, W. C.

1985-01-01

The statistical loop analyzer (SLA) is designed to automatically measure the acquisition, tracking and frequency stability performance characteristics of symbol synchronizers, code synchronizers, carrier tracking loops, and coherent transponders. Automated phase lock and system level tests can also be made using the SLA. Standard baseband, carrier and spread spectrum modulation techniques can be accomodated. Through the SLA's phase error jitter and cycle slip measurements the acquisition and tracking thresholds of the unit under test are determined; any false phase and frequency lock events are statistically analyzed and reported in the SLA output in probabilistic terms. Automated signal drop out tests can be performed in order to trouble shoot algorithms and evaluate the reacquisition statistics of the unit under test. Cycle slip rates and cycle slip probabilities can be measured using the SLA. These measurements, combined with bit error probability measurements, are all that are needed to fully characterize the acquisition and tracking performance of a digital communication system.

Multi-service small-cell cloud wired/wireless access network based on tunable optical frequency comb

NASA Astrophysics Data System (ADS)

Xiang, Yu; Zhou, Kun; Yang, Liu; Pan, Lei; Liao, Zhen-wan; Zhang, Qiang

2015-11-01

In this paper, we demonstrate a novel multi-service wired/wireless integrated access architecture of cloud radio access network (C-RAN) based on radio-over-fiber passive optical network (RoF-PON) system, which utilizes scalable multiple- frequency millimeter-wave (MF-MMW) generation based on tunable optical frequency comb (TOFC). In the baseband unit (BBU) pool, the generated optical comb lines are modulated into wired, RoF and WiFi/WiMAX signals, respectively. The multi-frequency RoF signals are generated by beating the optical comb line pairs in the small cell. The WiFi/WiMAX signals are demodulated after passing through the band pass filter (BPF) and band stop filter (BSF), respectively, whereas the wired signal can be received directly. The feasibility and scalability of the proposed multi-service wired/wireless integrated C-RAN are confirmed by the simulations.

Methods and apparatuses using filter banks for multi-carrier spread-spectrum signals

DOEpatents

Moradi, Hussein; Farhang, Behrouz; Kutsche, Carl A

2014-10-14

A transmitter includes a synthesis filter bank to spread a data symbol to a plurality of frequencies by encoding the data symbol on each frequency, apply a common pulse-shaping filter, and apply gains to the frequencies such that a power level of each frequency is less than a noise level of other communication signals within the spectrum. Each frequency is modulated onto a different evenly spaced subcarrier. A demodulator in a receiver converts a radio frequency input to a spread-spectrum signal in a baseband. A matched filter filters the spread-spectrum signal with a common filter having characteristics matched to the synthesis filter bank in the transmitter by filtering each frequency to generate a sequence of narrow pulses. A carrier recovery unit generates control signals responsive to the sequence of narrow pulses suitable for generating a phase-locked loop between the demodulator, the matched filter, and the carrier recovery unit.

Methods and apparatuses using filter banks for multi-carrier spread-spectrum signals

DOEpatents

Moradi, Hussein; Farhang, Behrouz; Kutsche, Carl A

2014-05-20

A transmitter includes a synthesis filter bank to spread a data symbol to a plurality of frequencies by encoding the data symbol on each frequency, apply a common pulse-shaping filter, and apply gains to the frequencies such that a power level of each frequency is less than a noise level of other communication signals within the spectrum. Each frequency is modulated onto a different evenly spaced subcarrier. A demodulator in a receiver converts a radio frequency input to a spread-spectrum signal in a baseband. A matched filter filters the spread-spectrum signal with a common filter having characteristics matched to the synthesis filter bank in the transmitter by filtering each frequency to generate a sequence of narrow pulses. A carrier recovery unit generates control signals responsive to the sequence of narrow pulses suitable for generating a phase-locked loop between the demodulator, the matched filter, and the carrier recovery unit.

Signal to noise ratio calculation for fiber optics links

NASA Technical Reports Server (NTRS)

Lau, K. Y.

1980-01-01

The signal to noise ratio (SNR) effect upon the maximum transmission length of a fiberoptic system is discussed. The relationships of different system parameters are discussed. A general formula to obtain the SNR of a single mode fiberoptic system is derived. The SNR attainable with single mode and multimode fiber optics links was calculated from fundamental noise considerations. It was found that for single mode fibers, laser noise dominates the noise contributions for links less than 30 km long, while thermal noise dominates for longer links. Multimode fibers degrade SNR for long links because of intermode dispersion. For frequency standard transmission, as long as the baseband modulation signals are within the bandwidth of the fibers, respectable SNR can be attained with low loss fibers (approximately 1 dB/km) for links as long as 70 km. For wideband transmission SNR is decreased by a factor equal to the ratio of the bandwidth.

A Fast Hartley Transform based novel optical OFDM system for VLC indoor application with constant envelope PAPR reduction technique using frequency modulation

NASA Astrophysics Data System (ADS)

Singh, Vinay Kumar; Dalal, U. D.

2017-10-01

In this research literature we present a unique optical OFDM system for Visible Light Communication (VLC) intended for indoor application which uses a non conventional transform-Fast Hartley Transform and an effective method to reduce the peak to average power ratio (PAPR) of the OFDM signal based on frequency modulation leading to a constant envelope (CE) signal. The proposed system is analyzed by a complete mathematical model and verified by the concurrent simulations results. The use of the non conventional transform makes the system computationally more desirable as it does not require the Hermitian symmetry constraint to yield real signals. The frequency modulation of the baseband signal converge random peaks into a CE signal. This leads to alleviation of the non linearity effects of the LED used in the link for electrical to optical conversion. The PAPR is reduced to 2 dB by this technique in this work. The impact of the modulation index on the performance of the system is also investigated. An optimum modulation depth of 30% gives better results. The additional phase discontinuity incurring on the demodulated signal at the receiver is also significantly reduced. A comparison of the improvement in phase discontinuity of the proposed technique of combating the PAPR with the previously known phase modulation technique is also presented in this work. Based on the channel metrics we evaluate the system performance and report an improvement of 1.2 dB at the FEC threshold. The proposed system is simple in design and computationally efficient and this can be incorporated into the present VLC system without much alteration thereby making it a cost effective solution.

Power Analysis of an Enterprise Wireless Communication Architecture

DTIC Science & Technology

2017-09-01

easily plug a satellite-based communication module into the enterprise processor when needed. Once plugged-in, it automatically runs the corresponding...reduce the SWaP by using a singular processing/computing module to run user applications and to implement waveform algorithms. This approach would...GPP) technology improved enough to allow a wide variety of waveforms to run in the GPP; thus giving rise to the SDR (Brannon 2004). Today’s

A wireless laser displacement sensor node for structural health monitoring.

PubMed

Park, Hyo Seon; Kim, Jong Moon; Choi, Se Woon; Kim, Yousok

2013-09-30

This study describes a wireless laser displacement sensor node that measures displacement as a representative damage index for structural health monitoring (SHM). The proposed measurement system consists of a laser displacement sensor (LDS) and a customized wireless sensor node. Wireless communication is enabled by a sensor node that consists of a sensor module, a code division multiple access (CDMA) communication module, a processor, and a power module. An LDS with a long measurement distance is chosen to increase field applicability. For a wireless sensor node driven by a battery, we use a power control module with a low-power processor, which facilitates switching between the sleep and active modes, thus maximizing the power consumption efficiency during non-measurement and non-transfer periods. The CDMA mode is also used to overcome the limitation of communication distance, which is a challenge for wireless sensor networks and wireless communication. To evaluate the reliability and field applicability of the proposed wireless displacement measurement system, the system is tested onsite to obtain the required vertical displacement measurements during the construction of mega-trusses and an edge truss, which are the primary structural members in a large-scale irregular building currently under construction. The measurement values confirm the validity of the proposed wireless displacement measurement system and its potential for use in safety evaluations of structural elements.

Real-time machine vision system using FPGA and soft-core processor

NASA Astrophysics Data System (ADS)

Malik, Abdul Waheed; Thörnberg, Benny; Meng, Xiaozhou; Imran, Muhammad

2012-06-01

This paper presents a machine vision system for real-time computation of distance and angle of a camera from reference points in the environment. Image pre-processing, component labeling and feature extraction modules were modeled at Register Transfer (RT) level and synthesized for implementation on field programmable gate arrays (FPGA). The extracted image component features were sent from the hardware modules to a soft-core processor, MicroBlaze, for computation of distance and angle. A CMOS imaging sensor operating at a clock frequency of 27MHz was used in our experiments to produce a video stream at the rate of 75 frames per second. Image component labeling and feature extraction modules were running in parallel having a total latency of 13ms. The MicroBlaze was interfaced with the component labeling and feature extraction modules through Fast Simplex Link (FSL). The latency for computing distance and angle of camera from the reference points was measured to be 2ms on the MicroBlaze, running at 100 MHz clock frequency. In this paper, we present the performance analysis, device utilization and power consumption for the designed system. The FPGA based machine vision system that we propose has high frame speed, low latency and a power consumption that is much lower compared to commercially available smart camera solutions.

Integral Fast Reactor fuel pin processor

DOE Office of Scientific and Technical Information (OSTI.GOV)

Levinskas, D.

1993-01-01

This report discusses the pin processor which receives metal alloy pins cast from recycled Integral Fast Reactor (IFR) fuel and prepares them for assembly into new IFR fuel elements. Either full length as-cast or precut pins are fed to the machine from a magazine, cut if necessary, and measured for length, weight, diameter and deviation from straightness. Accepted pins are loaded into cladding jackets located in a magazine, while rejects and cutting scraps are separated into trays. The magazines, trays, and the individual modules that perform the different machine functions are assembled and removed using remote manipulators and master-slaves.

Integral Fast Reactor fuel pin processor

DOE Office of Scientific and Technical Information (OSTI.GOV)

Levinskas, D.

1993-03-01

This report discusses the pin processor which receives metal alloy pins cast from recycled Integral Fast Reactor (IFR) fuel and prepares them for assembly into new IFR fuel elements. Either full length as-cast or precut pins are fed to the machine from a magazine, cut if necessary, and measured for length, weight, diameter and deviation from straightness. Accepted pins are loaded into cladding jackets located in a magazine, while rejects and cutting scraps are separated into trays. The magazines, trays, and the individual modules that perform the different machine functions are assembled and removed using remote manipulators and master-slaves.

Development of a 30-cm ion thruster thermal-vacuum power processor

NASA Technical Reports Server (NTRS)

Herron, B. G.

1976-01-01

The 30-cm Hg electron-bombardment ion thruster presently under development has reached engineering model status and is generally accepted as the prime propulsion thruster module to be used on the earliest solar electric propulsion missions. This paper presents the results of a related program to develop a transistorized 3-kW Thermal-Vacuum Breadboard (TVBB) Power Processor for this thruster. Emphasized in the paper are the implemented electrical and mechanical designs as well as the resultant system performance achieved over a range of test conditions. In addition, design modifications affording improved performance are identified and discussed.

Signal generation and mixing electronics for frequency-domain lifetime and spectral fluorometry

NASA Technical Reports Server (NTRS)

Cruce, Tommy Clay (Inventor); Hallidy, William H. (Inventor); Chin, Robert C. (Inventor)

2007-01-01

The present invention additionally comprises a method and apparatus for generating and mixing signals for frequency-domain lifetime and spectral fluorometry. The present invention comprises a plurality of signal generators that generate a plurality of signals where the signal generators modulate the amplitude and/or the frequency of the signals. The present invention uses one of these signals to drive an excitation signal that the present invention then directs and transmits at a target mixture, which absorbs the energy from the excitation signal. The property of fluorescence causes the target mixture to emit an emitted signal that the present invention detects with a signal detector. The present invention uses a plurality of mixers to produce a processor reference signal and a data signal. The present invention then uses a processor to compare the processor reference signal with the data signal by analyzing the differences in the phase and the differences in the amplitude between the two signals. The processor then extracts the fluorescence lifetime and fluorescence spectrum of the emitted signal from the phase and amplitude information using a chemometric analysis.

Spacewire on Earth orbiting scatterometers

NASA Technical Reports Server (NTRS)

Bachmann, Alex; Lang, Minh; Lux, James; Steffke, Richard

2002-01-01

The need for a high speed, reliable and easy to implement communication link has led to the development of a space flight oriented version of IEEE 1355 called SpaceWire. SpaceWire is based on high-speed (200 Mbps) serial point-to-point links using Low Voltage Differential Signaling (LVDS). SpaceWIre has provisions for routing messages between a large network of processors, using wormhole routing for low overhead and latency. {additionally, there are available space qualified hybrids, which provide the Link layer to the user's bus}. A test bed of multiple digital signal processor breadboards, demonstrating the ability to meet signal processing requirements for an orbiting scatterometer has been implemented using three Astrium MCM-DSPs, each breadboard consists of a Multi Chip Module (MCM) that combines a space qualified Digital Signal Processor and peripherals, including IEEE-1355 links. With the addition of appropriate physical layer interfaces and software on the DSP, the SpaceWire link is used to communicate between processors on the test bed, e.g. sending timing references, commands, status, and science data among the processors. Results are presented on development issues surrounding the use of SpaceWire in this environment, from physical layer implementation (cables, connectors, LVDS drivers) to diagnostic tools, driver firmware, and development methodology. The tools, methods, and hardware, software challenges and preliminary performance are investigated and discussed.

Multipath interference test method using synthesized chirped signal from directly modulated DFB-LD with digital-signal-processing technique.

PubMed

Aida, Kazuo; Sugie, Toshihiko

2011-12-12

We propose a method of testing transmission fiber lines and distributed amplifiers. Multipath interference (MPI) is detected as a beat spectrum between a multipath signal and a direct signal using a synthesized chirped test signal with lightwave frequencies of f(1) and f(2) periodically emitted from a distributed feedback laser diode (DFB-LD). This chirped test pulse is generated using a directly modulated DFB-LD with a drive signal calculated using a digital signal processing technique (DSP). A receiver consisting of a photodiode and an electrical spectrum analyzer (ESA) detects a baseband power spectrum peak appearing at the frequency of the test signal frequency deviation (f(1)-f(2)) as a beat spectrum of self-heterodyne detection. Multipath interference is converted from the spectrum peak power. This method improved the minimum detectable MPI to as low as -78 dB. We discuss the detailed design and performance of the proposed test method, including a DFB-LD drive signal calculation algorithm with DSP for synthesis of the chirped test signal and experiments on single-mode fibers with discrete reflections. © 2011 Optical Society of America

Subcarrier multiplexing with dispersion reduction and direct detection

DOEpatents

Sargis, Paul D.; Haigh, Ronald E.; McCammon, Kent G.

1997-01-01

An SCM system for simultaneously reducing the concomitant problems of receiver complexity and dispersion penalty and without requiring the use of an expensive, high-bandwidth optical detector. The system provides both a dispersion reduction and a direct detection to the receiver, with microwave mixers and lithium niobate external modulators that produce sidebands that are only separated by a few gigahertz from a principal laser optical carrier. Digital data streams are independently impressed upon these sidebands for transmission over an ordinary single-mode fiber. Independent high-speed data streams are upconverted to microwave frequencies. These subcarriers are then combined with a microwave power combiner and amplified with a microwave amplifier. A solid-state 1550-nm laser carrier is modulated by the microwave subcarriers. An erbium-doped fiber amplifier (EDFA) is used just prior to long-distance transmission over ordinary single-mode fiber. The transmitted optical signal may then traverse multiple EDFAs to compensate for long-haul optical fiber losses prior to detection. At a receiving end, the optical signal is split into multiple paths. The subcarrier channels are optically pre-selected using a narrowband optical filter, such as a fiber Fabry-Perot (FFP) filter. An optical detector converts the selected optical signal into a baseband electrical data stream.

Modulated Fourier Transform Raman Fiber-Optic Spectroscopy

NASA Technical Reports Server (NTRS)

Jensen, Brian J. (Inventor); Cooper, John B. (Inventor); Wise, Kent L. (Inventor)

2000-01-01

A modification to a commercial Fourier Transform (FT) Raman spectrometer is presented for the elimination of thermal backgrounds in the FT Raman spectra. The modification involves the use of a mechanical optical chopper to modulate the continuous wave laser, remote collection of the signal via fiber optics, and connection of a dual-phase digital-signal-processor (DSP) lock-in amplifier between the detector and the spectrometer's collection electronics to demodulate and filter the optical signals. The resulting Modulated Fourier Transform Raman Fiber-Optic Spectrometer is capable of completely eliminating thermal backgrounds at temperatures exceeding 300 C.

Generation-based memory synchronization in a multiprocessor system with weakly consistent memory accesses

DOEpatents

Ohmacht, Martin

2017-08-15

In a multiprocessor system, a central memory synchronization module coordinates memory synchronization requests responsive to memory access requests in flight, a generation counter, and a reclaim pointer. The central module communicates via point-to-point communication. The module includes a global OR reduce tree for each memory access requesting device, for detecting memory access requests in flight. An interface unit is implemented associated with each processor requesting synchronization. The interface unit includes multiple generation completion detectors. The generation count and reclaim pointer do not pass one another.

Generation-based memory synchronization in a multiprocessor system with weakly consistent memory accesses

DOEpatents

Ohmacht, Martin

2014-09-09

In a multiprocessor system, a central memory synchronization module coordinates memory synchronization requests responsive to memory access requests in flight, a generation counter, and a reclaim pointer. The central module communicates via point-to-point communication. The module includes a global OR reduce tree for each memory access requesting device, for detecting memory access requests in flight. An interface unit is implemented associated with each processor requesting synchronization. The interface unit includes multiple generation completion detectors. The generation count and reclaim pointer do not pass one another.

Electromagnetic versus electrical coupling of personal frequency modulation (FM) receivers to cochlear implant sound processors.

PubMed

Schafer, Erin C; Romine, Denise; Musgrave, Elizabeth; Momin, Sadaf; Huynh, Christy

2013-01-01

Previous research has suggested that electrically coupled frequency modulation (FM) systems substantially improved speech-recognition performance in noise in individuals with cochlear implants (CIs). However, there is limited evidence to support the use of electromagnetically coupled (neck loop) FM receivers with contemporary CI sound processors containing telecoils. The primary goal of this study was to compare speech-recognition performance in noise and subjective ratings of adolescents and adults using one of three contemporary CI sound processors coupled to electromagnetically and electrically coupled FM receivers from Oticon. A repeated-measures design was used to compare speech-recognition performance in noise and subjective ratings without and with the FM systems across three test sessions (Experiment 1) and to compare performance at different FM-gain settings (Experiment 2). Descriptive statistics were used in Experiment 3 to describe output differences measured through a CI sound processor. Experiment 1 included nine adolescents or adults with unilateral or bilateral Advanced Bionics Harmony (n = 3), Cochlear Nucleus 5 (n = 3), and MED-EL OPUS 2 (n = 3) CI sound processors. In Experiment 2, seven of the original nine participants were tested. In Experiment 3, electroacoustic output was measured from a Nucleus 5 sound processor when coupled to the electromagnetically coupled Oticon Arc neck loop and electrically coupled Oticon R2. In Experiment 1, participants completed a field trial with each FM receiver and three test sessions that included speech-recognition performance in noise and a subjective rating scale. In Experiment 2, participants were tested in three receiver-gain conditions. Results in both experiments were analyzed using repeated-measures analysis of variance. Experiment 3 involved electroacoustic-test measures to determine the monitor-earphone output of the CI alone and CI coupled to the two FM receivers. The results in Experiment 1 suggested that both FM receivers provided significantly better speech-recognition performance in noise than the CI alone; however, the electromagnetically coupled receiver provided significantly better speech-recognition performance in noise and better ratings in some situations than the electrically coupled receiver when set to the same gain. In Experiment 2, the primary analysis suggested significantly better speech-recognition performance in noise for the neck-loop versus electrically coupled receiver, but a second analysis, using the best performance across gain settings for each device, revealed no significant differences between the two FM receivers. Experiment 3 revealed monitor-earphone output differences in the Nucleus 5 sound processor for the two FM receivers when set to the +8 setting used in Experiment 1 but equal output when the electrically coupled device was set to a +16 gain setting and the electromagnetically coupled device was set to the +8 gain setting. Individuals with contemporary sound processors may show more favorable speech-recognition performance in noise electromagnetically coupled FM systems (i.e., Oticon Arc), which is most likely related to the input processing and signal processing pathway within the CI sound processor for direct input versus telecoil input. Further research is warranted to replicate these findings with a larger sample size and to develop and validate a more objective approach to fitting FM systems to CI sound processors. American Academy of Audiology.

All-Digital Baseband 65nm PLL/FPLL Clock Multiplier using 10-cell Library

NASA Technical Reports Server (NTRS)

Shuler, Robert L., Jr.; Wu, Qiong; Liu, Rui; Chen, Li

2014-01-01

PLLs for clock generation are essential for modern circuits, to generate specialized frequencies for many interfaces and high frequencies for chip internal operation. These circuits depend on analog circuits and careful tailoring for each new process, and making them fault tolerant is an incompletely solved problem. Until now, all digital PLLs have been restricted to sampled data DSP techniques and not available for the highest frequency baseband applications. This paper presents the design and preliminary evaluation of an all-digital baseband technique built entirely with an easily portable 10-cell digital library. The library is also described, as it aids in research and low volume design porting to new processes. The advantages of the digital approach are the wide variety of techniques available to give varying degrees of fault tolerance, and the simplicity of porting the design to new processes, even to exotic processes that may not have analog capability. The only tuning parameter is digital gate delay. An all-digital approach presents unique problems and standard analog loop stability design criteria cannot be directly used. Because of the quantization of frequency, there is effectively infinite gain for very small loop error feedback. The numerically controlled oscillator (NCO) based on a tapped delay line cannot be reliably updated while a pulse is active in the delay line, and ordinarily does not have enough frequency resolution for a low-jitter output.

ALL-Digital Baseband 65nm PLL/FPLL Clock Multiplier Using 10-Cell Library

NASA Technical Reports Server (NTRS)

Schuler, Robert L., Jr.; Wu, Qiong; Liu, Rui; Chen, Li; Madala, Shridhar

2014-01-01

PLLs for clock generation are essential for modern circuits, to generate specialized frequencies for many interfaces and high frequencies for chip internal operation. These circuits depend on analog circuits and careful tailoring for each new process, and making them fault tolerant is an incompletely solved problem. Until now, all digital PLLs have been restricted to sampled data DSP techniques and not available for the highest frequency baseband applications. This paper presents the design and preliminary evaluation of an all-digital baseband technique built entirely with an easily portable 10-cell digital library. The library is also described, as it aids in research and low volume design porting to new processes. The advantages of the digital approach are the wide variety of techniques available to give varying degrees of fault tolerance, and the simplicity of porting the design to new processes, even to exotic processes that may not have analog capability. The only tuning parameter is digital gate delay. An all-digital approach presents unique problems and standard analog loop stability design criteria cannot be directly used. Because of the quantization of frequency, there is effectively infinite gain for very small loop error feedback. The numerically controlled oscillator (NCO) based on a tapped delay line cannot be reliably updated while a pulse is active in the delay line, and ordinarily does not have enough frequency resolution for a low-jitter output.

A neuronal model of a global workspace in effortful cognitive tasks.

PubMed

Dehaene, S; Kerszberg, M; Changeux, J P

1998-11-24

A minimal hypothesis is proposed concerning the brain processes underlying effortful tasks. It distinguishes two main computational spaces: a unique global workspace composed of distributed and heavily interconnected neurons with long-range axons, and a set of specialized and modular perceptual, motor, memory, evaluative, and attentional processors. Workspace neurons are mobilized in effortful tasks for which the specialized processors do not suffice. They selectively mobilize or suppress, through descending connections, the contribution of specific processor neurons. In the course of task performance, workspace neurons become spontaneously coactivated, forming discrete though variable spatio-temporal patterns subject to modulation by vigilance signals and to selection by reward signals. A computer simulation of the Stroop task shows workspace activation to increase during acquisition of a novel task, effortful execution, and after errors. We outline predictions for spatio-temporal activation patterns during brain imaging, particularly about the contribution of dorsolateral prefrontal cortex and anterior cingulate to the workspace.

Controller and interface module for the High-Speed Data Acquisition System correlator/accumulator

NASA Technical Reports Server (NTRS)

Brokl, S. S.

1985-01-01

One complex channel of the High-Speed Data Acquisition System (a subsystem used in the Goldstone solar system radar), consisting of two correlator modules and one accumulator module, is operated by the controller and interface module interfaces are provided to the VAX UNIBUS for computer control, monitor, and test of the controller and correlator/accumulator. The correlator and accumulator modules controlled by this module are the key digital signal processing elements of the Goldstone High-Speed Data Acquisition System. This fully programmable unit provides for a wide variety of correlation and filtering functions operating on a three megaword/second data flow. Data flow is to the VAX by way of the I/O port of a FPS 5210 array processor.

Stroboscope Controller for Imaging Helicopter Rotors

NASA Technical Reports Server (NTRS)

Jensen, Scott; Marmie, John; Mai, Nghia

2004-01-01

A versatile electronic timing-and-control unit, denoted a rotorcraft strobe controller, has been developed for use in controlling stroboscopes, lasers, video cameras, and other instruments for capturing still images of rotating machine parts especially helicopter rotors. This unit is designed to be compatible with a variety of sources of input shaftangle or timing signals and to be capable of generating a variety of output signals suitable for triggering instruments characterized by different input-signal specifications. It is also designed to be flexible and reconfigurable in that it can be modified and updated through changes in its control software, without need to change its hardware. Figure 1 is a block diagram of the rotorcraft strobe controller. The control processor is a high-density complementary metal oxide semiconductor, singlechip 8-bit microcontroller. It is connected to a 32K x 8 nonvolatile static random-access memory (RAM) module. Also connected to the control processor is a 32K 8 electrically programmable read-only-memory (EPROM) module, which is used to store the control software. Digital logic support circuitry is implemented in a field-programmable gate array (FPGA). A 240 x 128-dot, 40- character 16-line liquid-crystal display (LCD) module serves as a graphical user interface; the user provides input through a 16-key keypad mounted next to the LCD. A 12-bit digital-to-analog converter (DAC) generates a 0-to-10-V ramp output signal used as part of a rotor-blade monitoring system, while the control processor generates all the appropriate strobing signals. Optocouplers are used to isolate all input and output digital signals, and optoisolators are used to isolate all analog signals. The unit is designed to fit inside a 19-in. (.48-cm) rack-mount enclosure. Electronic components are mounted on a custom printed-circuit board (see Figure 2). Two power-conversion modules on the printedcircuit board convert AC power to +5 VDC and 15 VDC, respectively.

Design of object-oriented distributed simulation classes

NASA Technical Reports Server (NTRS)

Schoeffler, James D. (Principal Investigator)

1995-01-01

Distributed simulation of aircraft engines as part of a computer aided design package is being developed by NASA Lewis Research Center for the aircraft industry. The project is called NPSS, an acronym for 'Numerical Propulsion Simulation System'. NPSS is a flexible object-oriented simulation of aircraft engines requiring high computing speed. It is desirable to run the simulation on a distributed computer system with multiple processors executing portions of the simulation in parallel. The purpose of this research was to investigate object-oriented structures such that individual objects could be distributed. The set of classes used in the simulation must be designed to facilitate parallel computation. Since the portions of the simulation carried out in parallel are not independent of one another, there is the need for communication among the parallel executing processors which in turn implies need for their synchronization. Communication and synchronization can lead to decreased throughput as parallel processors wait for data or synchronization signals from other processors. As a result of this research, the following have been accomplished. The design and implementation of a set of simulation classes which result in a distributed simulation control program have been completed. The design is based upon MIT 'Actor' model of a concurrent object and uses 'connectors' to structure dynamic connections between simulation components. Connectors may be dynamically created according to the distribution of objects among machines at execution time without any programming changes. Measurements of the basic performance have been carried out with the result that communication overhead of the distributed design is swamped by the computation time of modules unless modules have very short execution times per iteration or time step. An analytical performance model based upon queuing network theory has been designed and implemented. Its application to realistic configurations has not been carried out.

Design of Object-Oriented Distributed Simulation Classes

NASA Technical Reports Server (NTRS)

Schoeffler, James D.

1995-01-01

Distributed simulation of aircraft engines as part of a computer aided design package being developed by NASA Lewis Research Center for the aircraft industry. The project is called NPSS, an acronym for "Numerical Propulsion Simulation System". NPSS is a flexible object-oriented simulation of aircraft engines requiring high computing speed. It is desirable to run the simulation on a distributed computer system with multiple processors executing portions of the simulation in parallel. The purpose of this research was to investigate object-oriented structures such that individual objects could be distributed. The set of classes used in the simulation must be designed to facilitate parallel computation. Since the portions of the simulation carried out in parallel are not independent of one another, there is the need for communication among the parallel executing processors which in turn implies need for their synchronization. Communication and synchronization can lead to decreased throughput as parallel processors wait for data or synchronization signals from other processors. As a result of this research, the following have been accomplished. The design and implementation of a set of simulation classes which result in a distributed simulation control program have been completed. The design is based upon MIT "Actor" model of a concurrent object and uses "connectors" to structure dynamic connections between simulation components. Connectors may be dynamically created according to the distribution of objects among machines at execution time without any programming changes. Measurements of the basic performance have been carried out with the result that communication overhead of the distributed design is swamped by the computation time of modules unless modules have very short execution times per iteration or time step. An analytical performance model based upon queuing network theory has been designed and implemented. Its application to realistic configurations has not been carried out.

Cache Hardware Approaches to Multiple Independent Levels of Security (MILS)

DTIC Science & Technology

2012-10-01

systems that require that several multicore processors be connected together in a single system. However, no such boards were available on the market ...available concerning each module. However, the availability of modules seems to significantly lag the time when the corresponding hardware hits the market ...version of real mode often referred to as “Unreal mode” can be entered by loading a Local Descriptor Table (LDT) and Global Descriptor Table (GDT

USAF Summer Research Program - 1993 Graduate Student Research Program Final Reports, Volume 6, AEDC, FJSRL and WHMC

DTIC Science & Technology

1993-12-01

Mechanical Engineering Associate, PhD Laboratory: PL/VT Division Engineering University of Texas, San Anton Vol-Page No: 3-26 San Antonio, TX 7824-9065...parameters. The modules can be primitive or compound. Primitive modules represent the elementary computation units and define their interfaces. The... linear under varying conditions for the range of processor numbers. Discussion Performance: Our evaluation of the performance measurement results is the

Fronthaul evolution: From CPRI to Ethernet

NASA Astrophysics Data System (ADS)

Gomes, Nathan J.; Chanclou, Philippe; Turnbull, Peter; Magee, Anthony; Jungnickel, Volker

2015-12-01

It is proposed that using Ethernet in the fronthaul, between base station baseband unit (BBU) pools and remote radio heads (RRHs), can bring a number of advantages, from use of lower-cost equipment, shared use of infrastructure with fixed access networks, to obtaining statistical multiplexing and optimised performance through probe-based monitoring and software-defined networking. However, a number of challenges exist: ultra-high-bit-rate requirements from the transport of increased bandwidth radio streams for multiple antennas in future mobile networks, and low latency and jitter to meet delay requirements and the demands of joint processing. A new fronthaul functional division is proposed which can alleviate the most demanding bit-rate requirements by transport of baseband signals instead of sampled radio waveforms, and enable statistical multiplexing gains. Delay and synchronisation issues remain to be solved.

Utility of coupling nonlinear optimization methods with numerical modeling software

DOE Office of Scientific and Technical Information (OSTI.GOV)

Murphy, M.J.

1996-08-05

Results of using GLO (Global Local Optimizer), a general purpose nonlinear optimization software package for investigating multi-parameter problems in science and engineering is discussed. The package consists of the modular optimization control system (GLO), a graphical user interface (GLO-GUI), a pre-processor (GLO-PUT), a post-processor (GLO-GET), and nonlinear optimization software modules, GLOBAL & LOCAL. GLO is designed for controlling and easy coupling to any scientific software application. GLO runs the optimization module and scientific software application in an iterative loop. At each iteration, the optimization module defines new values for the set of parameters being optimized. GLO-PUT inserts the new parametermore » values into the input file of the scientific application. GLO runs the application with the new parameter values. GLO-GET determines the value of the objective function by extracting the results of the analysis and comparing to the desired result. GLO continues to run the scientific application over and over until it finds the ``best`` set of parameters by minimizing (or maximizing) the objective function. An example problem showing the optimization of material model is presented (Taylor cylinder impact test).« less

The ability of cochlear implant users to use temporal envelope cues recovered from speech frequency modulation.

PubMed

Won, Jong Ho; Lorenzi, Christian; Nie, Kaibao; Li, Xing; Jameyson, Elyse M; Drennan, Ward R; Rubinstein, Jay T

2012-08-01

Previous studies have demonstrated that normal-hearing listeners can understand speech using the recovered "temporal envelopes," i.e., amplitude modulation (AM) cues from frequency modulation (FM). This study evaluated this mechanism in cochlear implant (CI) users for consonant identification. Stimuli containing only FM cues were created using 1, 2, 4, and 8-band FM-vocoders to determine if consonant identification performance would improve as the recovered AM cues become more available. A consistent improvement was observed as the band number decreased from 8 to 1, supporting the hypothesis that (1) the CI sound processor generates recovered AM cues from broadband FM, and (2) CI users can use the recovered AM cues to recognize speech. The correlation between the intact and the recovered AM components at the output of the sound processor was also generally higher when the band number was low, supporting the consonant identification results. Moreover, CI subjects who were better at using recovered AM cues from broadband FM cues showed better identification performance with intact (unprocessed) speech stimuli. This suggests that speech perception performance variability in CI users may be partly caused by differences in their ability to use AM cues recovered from FM speech cues.

Digital Intermediate Frequency Receiver Module For Use In Airborne Sar Applications

DOEpatents

Tise, Bertice L.; Dubbert, Dale F.

2005-03-08

A digital IF receiver (DRX) module directly compatible with advanced radar systems such as synthetic aperture radar (SAR) systems. The DRX can combine a 1 G-Sample/sec 8-bit ADC with high-speed digital signal processor, such as high gate-count FPGA technology or ASICs to realize a wideband IF receiver. DSP operations implemented in the DRX can include quadrature demodulation and multi-rate, variable-bandwidth IF filtering. Pulse-to-pulse (Doppler domain) filtering can also be implemented in the form of a presummer (accumulator) and an azimuth prefilter. An out of band noise source can be employed to provide a dither signal to the ADC, and later be removed by digital signal processing. Both the range and Doppler domain filtering operations can be implemented using a unique pane architecture which allows on-the-fly selection of the filter decimation factor, and hence, the filter bandwidth. The DRX module can include a standard VME-64 interface for control, status, and programming. An interface can provide phase history data to the real-time image formation processors. A third front-panel data port (FPDP) interface can send wide bandwidth, raw phase histories to a real-time phase history recorder for ground processing.

Area- and energy-efficient CORDIC accelerators in deep sub-micron CMOS technologies

NASA Astrophysics Data System (ADS)

Vishnoi, U.; Noll, T. G.

2012-09-01

The COordinate Rotate DIgital Computer (CORDIC) algorithm is a well known versatile approach and is widely applied in today's SoCs for especially but not restricted to digital communications. Dedicated CORDIC blocks can be implemented in deep sub-micron CMOS technologies at very low area and energy costs and are attractive to be used as hardware accelerators for Application Specific Instruction Processors (ASIPs). Thereby, overcoming the well known energy vs. flexibility conflict. Optimizing Global Navigation Satellite System (GNSS) receivers to reduce the hardware complexity is an important research topic at present. In such receivers CORDIC accelerators can be used for digital baseband processing (fixed-point) and in Position-Velocity-Time estimation (floating-point). A micro architecture well suited to such applications is presented. This architecture is parameterized according to the wordlengths as well as the number of iterations and can be easily extended for floating point data format. Moreover, area can be traded for throughput by partially or even fully unrolling the iterations, whereby the degree of pipelining is organized with one CORDIC iteration per cycle. From the architectural description, the macro layout can be generated fully automatically using an in-house datapath generator tool. Since the adders and shifters play an important role in optimizing the CORDIC block, they must be carefully optimized for high area and energy efficiency in the underlying technology. So, for this purpose carry-select adders and logarithmic shifters have been chosen. Device dimensioning was automatically optimized with respect to dynamic and static power, area and performance using the in-house tool. The fully sequential CORDIC block for fixed-point digital baseband processing features a wordlength of 16 bits, requires 5232 transistors, which is implemented in a 40-nm CMOS technology and occupies a silicon area of 1560 μm2 only. Maximum clock frequency from circuit simulation of extracted netlist is 768 MHz under typical, and 463 MHz under worst case technology and application corner conditions, respectively. Simulated dynamic power dissipation is 0.24 uW MHz-1 at 0.9 V; static power is 38 uW in slow corner, 65 uW in typical corner and 518 uW in fast corner, respectively. The latter can be reduced by 43% in a 40-nm CMOS technology using 0.5 V reverse-backbias. These features are compared with the results from different design styles as well as with an implementation in 28-nm CMOS technology. It is interesting that in the latter case area scales as expected, but worst case performance and energy do not scale well anymore.

Tests with beam setup of the TileCal phase-II upgrade electronics

NASA Astrophysics Data System (ADS)

Reward Hlaluku, Dingane

2017-09-01

The LHC has planned a series of upgrades culminating in the High Luminosity LHC which will have an average luminosity 5-7 times larger than the nominal Run-2 value. The ATLAS Tile calorimeter plans to introduce a new readout architecture by completely replacing the back-end and front-end electronics for the High Luminosity LHC. The photomultiplier signals will be fully digitized and transferred for every bunch crossing to the off-detector Tile PreProcessor. The Tile PreProcessor will further provide preprocessed digital data to the first level of trigger with improved spatial granularity and energy resolution in contrast to the current analog trigger signals. A single super-drawer module commissioned with the phase-II upgrade electronics is to be inserted into the real detector to evaluate and qualify the new readout and trigger concepts in the overall ATLAS data acquisition system. This new super-drawer, so-called hybrid Demonstrator, must provide analog trigger signals for backward compatibility with the current system. This Demonstrator drawer has been inserted into a Tile calorimeter module prototype to evaluate the performance in the lab. In parallel, one more module has been instrumented with two other front-end electronics options based on custom ASICs (QIE and FATALIC) which are under evaluation. These two modules together with three other modules composed of the current system electronics were exposed to different particles and energies in three test-beam campaigns during 2015 and 2016.

A bunch to bucket phase detector for the RHIC LLRF upgrade platform

DOE Office of Scientific and Technical Information (OSTI.GOV)

Smith, K.S.; Harvey, M.; Hayes, T.

2011-03-28

As part of the overall development effort for the RHIC LLRF Upgrade Platform [1,2,3], a generic four channel 16 bit Analog-to-Digital Converter (ADC) daughter module was developed to provide high speed, wide dynamic range digitizing and processing of signals from DC to several hundred megahertz. The first operational use of this card was to implement the bunch to bucket phase detector for the RHIC LLRF beam control feedback loops. This paper will describe the design and performance features of this daughter module as a bunch to bucket phase detector, and also provide an overview of its place within the overallmore » LLRF platform architecture as a high performance digitizer and signal processing module suitable to a variety of applications. In modern digital control and signal processing systems, ADCs provide the interface between the analog and digital signal domains. Once digitized, signals are then typically processed using algorithms implemented in field programmable gate array (FPGA) logic, general purpose processors (GPPs), digital signal processors (DSPs) or a combination of these. For the recently developed and commissioned RHIC LLRF Upgrade Platform, we've developed a four channel ADC daughter module based on the Linear Technology LTC2209 16 bit, 160 MSPS ADC and the Xilinx V5FX70T FPGA. The module is designed to be relatively generic in application, and with minimal analog filtering on board, is capable of processing signals from DC to 500 MHz or more. The module's first application was to implement the bunch to bucket phase detector (BTB-PD) for the RHIC LLRF system. The same module also provides DC digitizing of analog processed BPM signals used by the LLRF system for radial feedback.« less

Multi-gigabit optical interconnects for next-generation on-board digital equipment

NASA Astrophysics Data System (ADS)

Venet, Norbert; Favaro, Henri; Sotom, Michel; Maignan, Michel; Berthon, Jacques

2017-11-01

Parallel optical interconnects are experimentally assessed as a technology that may offer the high-throughput data communication capabilities required to the next-generation on-board digital processing units. An optical backplane interconnect was breadboarded, on the basis of a digital transparent processor that provides flexible connectivity and variable bandwidth in telecom missions with multi-beam antenna coverage. The unit selected for the demonstration required that more than tens of Gbit/s be supported by the backplane. The demonstration made use of commercial parallel optical link modules at 850 nm wavelength, with 12 channels running at up to 2.5 Gbit/s. A flexible optical fibre circuit was developed so as to route board-to-board connections. It was plugged to the optical transmitter and receiver modules through 12-fibre MPO connectors. BER below 10-14 and optical link budgets in excess of 12 dB were measured, which would enable to integrate broadcasting. Integration of the optical backplane interconnect was successfully demonstrated by validating the overall digital processor functionality.

Multi-gigabit optical interconnects for next-generation on-board digital equipment

NASA Astrophysics Data System (ADS)

Venet, Norbert; Favaro, Henri; Sotom, Michel; Maignan, Michel; Berthon, Jacques

2004-06-01

Parallel optical interconnects are experimentally assessed as a technology that may offer the high-throughput data communication capabilities required to the next-generation on-board digital processing units. An optical backplane interconnect was breadboarded, on the basis of a digital transparent processor that provides flexible connectivity and variable bandwidth in telecom missions with multi-beam antenna coverage. The unit selected for the demonstration required that more than tens of Gbit/s be supported by the backplane. The demonstration made use of commercial parallel optical link modules at 850 nm wavelength, with 12 channels running at up to 2.5 Gbit/s. A flexible optical fibre circuit was developed so as to route board-to-board connections. It was plugged to the optical transmitter and receiver modules through 12-fibre MPO connectors. BER below 10-14 and optical link budgets in excess of 12 dB were measured, which would enable to integrate broadcasting. Integration of the optical backplane interconnect was successfully demonstrated by validating the overall digital processor functionality.

Compact lidar system using laser diode, binary continuous wave power modulation, and an avalanche photodiode-based receiver controlled by a digital signal processor

NASA Astrophysics Data System (ADS)

Ardanuy, Antoni; Comerón, Adolfo

2018-04-01

We analyze the practical limits of a lidar system based on the use of a laser diode, random binary continuous wave power modulation, and an avalanche photodiode (APD)-based photereceiver, combined with the control and computing power of the digital signal processors (DSP) currently available. The target is to design a compact portable lidar system made all in semiconductor technology, with a low-power demand and an easy configuration of the system, allowing change in some of its features through software. Unlike many prior works, we emphasize the use of APDs instead of photomultiplier tubes to detect the return signal and the application of the system to measure not only hard targets, but also medium-range aerosols and clouds. We have developed an experimental prototype to evaluate the behavior of the system under different environmental conditions. Experimental results provided by the prototype are presented and discussed.

Radar transponder apparatus and signal processing technique

DOEpatents

Axline, Jr., Robert M.; Sloan, George R.; Spalding, Richard E.

1996-01-01

An active, phase-coded, time-grating transponder and a synthetic-aperture radar (SAR) and signal processor means, in combination, allow the recognition and location of the transponder (tag) in the SAR image and allow communication of information messages from the transponder to the SAR. The SAR is an illuminating radar having special processing modifications in an image-formation processor to receive an echo from a remote transponder, after the transponder receives and retransmits the SAR illuminations, and to enhance the transponder's echo relative to surrounding ground clutter by recognizing special transponder modulations from phase-shifted from the transponder retransmissions. The remote radio-frequency tag also transmits information to the SAR through a single antenna that also serves to receive the SAR illuminations. Unique tag-modulation and SAR signal processing techniques, in combination, allow the detection and precise geographical location of the tag through the reduction of interfering signals from ground clutter, and allow communication of environmental and status information from said tag to be communicated to said SAR.

Radar transponder apparatus and signal processing technique

DOEpatents

Axline, R.M. Jr.; Sloan, G.R.; Spalding, R.E.

1996-01-23

An active, phase-coded, time-grating transponder and a synthetic-aperture radar (SAR) and signal processor means, in combination, allow the recognition and location of the transponder (tag) in the SAR image and allow communication of information messages from the transponder to the SAR. The SAR is an illuminating radar having special processing modifications in an image-formation processor to receive an echo from a remote transponder, after the transponder receives and retransmits the SAR illuminations, and to enhance the transponder`s echo relative to surrounding ground clutter by recognizing special transponder modulations from phase-shifted from the transponder retransmissions. The remote radio-frequency tag also transmits information to the SAR through a single antenna that also serves to receive the SAR illuminations. Unique tag-modulation and SAR signal processing techniques, in combination, allow the detection and precise geographical location of the tag through the reduction of interfering signals from ground clutter, and allow communication of environmental and status information from said tag to be communicated to said SAR. 4 figs.

Evaluation and application of a fast module in a PLC based interlock and control system

NASA Astrophysics Data System (ADS)

Zaera-Sanz, M.

2009-08-01

The LHC Beam Interlock system requires a controller performing a simple matrix function to collect the different beam dump requests. To satisfy the expected safety level of the Interlock, the system should be robust and reliable. The PLC is a promising candidate to fulfil both aspects but too slow to meet the expected response time which is of the order of μseconds. Siemens has introduced a ``so called'' fast module (FM352-5 Boolean Processor). It provides independent and extremely fast control of a process within a larger control system using an onboard processor, a Field Programmable Gate Array (FPGA), to execute code in parallel which results in extremely fast scan times. It is interesting to investigate its features and to evaluate it as a possible candidate for the beam interlock system. This paper publishes the results of this study. As well, this paper could be useful for other applications requiring fast processing using a PLC.

Data processing techniques used with MST radars: A review

NASA Technical Reports Server (NTRS)

Rastogi, P. K.

1983-01-01

The data processing methods used in high power radar probing of the middle atmosphere are examined. The radar acts as a spatial filter on the small scale refractivity fluctuations in the medium. The characteristics of the received signals are related to the statistical properties of these fluctuations. A functional outline of the components of a radar system is given. Most computation intensive tasks are carried out by the processor. The processor computes a statistical function of the received signals, simultaneously for a large number of ranges. The slow fading of atmospheric signals is used to reduce the data input rate to the processor by coherent integration. The inherent range resolution of the radar experiments can be improved significant with the use of pseudonoise phase codes to modulate the transmitted pulses and a corresponding decoding operation on the received signals. Commutability of the decoding and coherent integration operations is used to obtain a significant reduction in computations. The limitations of the processors are outlined. At the next level of data reduction, the measured function is parameterized by a few spectral moments that can be related to physical processes in the medium. The problems encountered in estimating the spectral moments in the presence of strong ground clutter, external interference, and noise are discussed. The graphical and statistical analysis of the inferred parameters are outlined. The requirements for special purpose processors for MST radars are discussed.

Abatement of PAPR for ACO-OFDM deployed in VLC systems by frequency modulation of the baseband signal forming a constant envelope

NASA Astrophysics Data System (ADS)

Kumar Singh, Vinay; Dalal, U. D.

2017-06-01

To inhibit the effect of non-linearity of the LEDs leading to a significant increase in the peak to average power ratio (PAPR) of the OFDM signals in the Visible light communication (VLC) we propose a frequency modulated constant envelope OFDM (FM CE-OFDM) technique. The abrupt amplitude variations in the OFDM signal are frequency modulated before being applied to the LED for electro-optical conversion resulting in a constant envelope signal. The LED is maintained in the linear region of operation by this constant envelope signal at sufficient DC bias. The proposed technique reduces the PAPR to the least possible value ≈0 dB. We theoretically analyze and perform numerical simulations to assess the enhancement of the proposed system. The optimal modulation index is found to be 0.3. The metrics pertaining to the evaluation of the phase discontinuity is derived and is found to be lesser for the FM CE-OFDM as compared to the phase modulated (PM) CE-OFDM. The receiver sensitivity is improved by 1.6 dB for a transmission distance of 2 m for the FM CE-OFDM as compared to the PM CE-OFDM at the FEC threshold. We compare the BER performance of the ideal OFDM (without the non linearity of LED), power back-off OFDM, PM CE-OFDM and FM CE-OFDM in an optical wireless channel (OWC) scenario. The FM CE-OFDM has an improvement of 2.1 dB SNR at the FEC threshold as compared to the PM CE-OFDM. It also shows an improvement of 11 dB when compared with the power back-off technique used in the VLC systems for 10 dB power back-off.

Non-line-of-sight (NLOS), secure, low-probability of intercept (LPI), antijam (AJ), high frequency (HF), real time video communication system

DOE Office of Scientific and Technical Information (OSTI.GOV)

Lupinetti, F.

1988-01-01

This paper outlines a video communication system capable of non-line-of-sight (NLOS), secure, low-probability of intercept (LPI), antijam, real time transmission and reception of video information in a tactical enviroment. An introduction to a class of ternary PN sequences is presented to familiarize the reader with yet another avenue for spreading and despreading baseband information. The use of the high frequency (HF) band (1.5 to 30 MHz) for real time video transmission is suggested to allow NLOS communication. The spreading of the baseband information by means of multiple nontrivially different ternary pseudonoise (PN) sequence is used in order to assure encryptionmore » of the signal, enhanced security, a good degree of LPI, and good antijam features. 18 refs., 3 figs., 1 tab.« less

A Micropulse eye-safe all-fiber molecular backscatter coherent temperature lidar

NASA Astrophysics Data System (ADS)

Abari, Cyrus F.; Chu, Xinzhao; Mann, Jakob; Spuler, Scott

2016-06-01

In this paper, we analyze the performance of an all-fiber, micropulse, 1.5 μm coherent lidar for remote sensing of atmospheric temperature. The proposed system benefits from the recent advances in optics/electronics technology, especially an all-fiber image-reject homodyne receiver, where a high resolution spectrum in the baseband can be acquired. Due to the presence of a structured spectra resulting from the spontaneous Rayleigh-Brillouine scattering, associated with the relevant operating regimes, an accurate estimation of the temperature can be carried out. One of the main advantages of this system is the removal of the contaminating Mie backscatter signal by electronic filters at the baseband (before signal conditioning and amplification). The paper presents the basic concepts as well as a Monte-Carlo system simulation as the proof of concept.

IEEE 1451.2 based Smart sensor system using ADuc847

NASA Astrophysics Data System (ADS)

Sreejithlal, A.; Ajith, Jose

IEEE 1451 standard defines a standard interface for connecting transducers to microprocessor based data acquisition systems, instrumentation systems, control and field networks. Smart transducer interface module (STIM) acts as a unit which provides signal conditioning, digitization and data packet generation functions to the transducers connected to it. This paper describes the implementation of a microcontroller based smart transducer interface module based on IEEE 1451.2 standard. The module, implemented using ADuc847 microcontroller has 2 transducer channels and is programmed using Embedded C language. The Sensor system consists of a Network Controlled Application Processor (NCAP) module which controls the Smart transducer interface module (STIM) over an IEEE1451.2-RS232 bus. The NCAP module is implemented as a software module in C# language. The hardware details, control principles involved and the software implementation for the STIM are described in detail.

Behavioral study and design of a digital interpolator filter for wireless reconfigurable transmitters

NASA Astrophysics Data System (ADS)

Ferragina, V.; Frassone, A.; Ghittori, N.; Malcovati, P.; Vigna, A.

2005-06-01

The behavioral analysis and the design in a 0.13 μm CMOS technology of a digital interpolator filter for wireless applications are presented. The proposed block is designed to be embedded in the baseband part of a reconfigurable transmitter (WLAN 802.11a, UMTS) to operate as a sampling frequency boost between the digital signal processor (DSP) and the digital-to-analog converter (DAC). In recent trends the DAC of such transmitters usually operates at high conversion frequencies (to allow a relaxed implementation of the following analog reconstruction filter), while the DSP output flows at low frequencies (typically Nyquist rate). Thus a block able to increase the digital data rate, like the one proposed, is needed before the DAC. For example, in the WLAN case, an interpolation factor of 4 has been used, allowing the digital data frequency to raise from 20 MHz to 80 MHz. Using a time-domain model of the TX chain, a behavioral analysis has been performed to determine the impact of the filter performance on the quality of the signal at the antenna. This study has led to the evaluation of the z-domain filter transfer function, together with the specifications concerning a finite precision implementation. A VHDL description has allowed an automatic synthesis of the circuit in a 0.13 μm CMOS technology (with a supply voltage of 1.2 V). Post-synthesis simulations have confirmed the effectiveness of the proposed study.

On the Run-Time Optimization of the Boolean Logic of a Program.

ERIC Educational Resources Information Center

Cadolino, C.; Guazzo, M.

1982-01-01

Considers problem of optimal scheduling of Boolean expression (each Boolean variable represents binary outcome of program module) on single-processor system. Optimization discussed consists of finding operand arrangement that minimizes average execution costs representing consumption of resources (elapsed time, main memory, number of…

A wide-angle camera module for disposable endoscopy

NASA Astrophysics Data System (ADS)

Shim, Dongha; Yeon, Jesun; Yi, Jason; Park, Jongwon; Park, Soo Nam; Lee, Nanhee

2016-08-01

A wide-angle miniaturized camera module for disposable endoscope is demonstrated in this paper. A lens module with 150° angle of view (AOV) is designed and manufactured. All plastic injection-molded lenses and a commercial CMOS image sensor are employed to reduce the manufacturing cost. The image sensor and LED illumination unit are assembled with a lens module. The camera module does not include a camera processor to further reduce its size and cost. The size of the camera module is 5.5 × 5.5 × 22.3 mm3. The diagonal field of view (FOV) of the camera module is measured to be 110°. A prototype of a disposable endoscope is implemented to perform a pre-clinical animal testing. The esophagus of an adult beagle dog is observed. These results demonstrate the feasibility of a cost-effective and high-performance camera module for disposable endoscopy.

Design and Analysis of an Optical Interface Message Processor

DTIC Science & Technology

1993-03-01

Device 16 2.2.15 Microchannel Spatial Light Modulator (MSLM) 16 2.2.16 Si/PLST Modulator 16 2.2.17 Deformable Mirror Device ( DMD ) 17 2.2.18 Charged...wavelength of UV light, ’n this process, is the minimum image which can be developed. X-Ray lithography wil’ reduce the image size to the 1000 Angstrom...resonance of laser wavelength. This is due to a change in the index of refraction which results in an optical path allowing constructive interference

Development of a patch type embedded cardiac function monitoring system using dual microprocessor for arrhythmia detection in heart disease patient.

PubMed

Jang, Yongwon; Noh, Hyung Wook; Lee, I B; Jung, Ji-Wook; Song, Yoonseon; Lee, Sooyeul; Kim, Seunghwan

2012-01-01

A patch type embedded cardiac function monitoring system was developed to detect arrhythmias such as PVC (Premature Ventricular Contraction), pause, ventricular fibrillation, and tachy/bradycardia. The overall system is composed of a main module including a dual processor and a Bluetooth telecommunication module. The dual microprocessor strategy minimizes power consumption and size, and guarantees the resources of embedded software programs. The developed software was verified with standard DB, and showed good performance.

Modulated error diffusion CGHs for neural nets

NASA Astrophysics Data System (ADS)

Vermeulen, Pieter J. E.; Casasent, David P.

1990-05-01

New modulated error diffusion CGHs (computer generated holograms) for optical computing are considered. Specific attention is given to their use in optical matrix-vector, associative processor, neural net and optical interconnection architectures. We consider lensless CGH systems (many CGHs use an external Fourier transform (FT) lens), the Fresnel sampling requirements, the effects of finite CGH apertures (sample and hold inputs), dot size correction (for laser recorders), and new applications for this novel encoding method (that devotes attention to quantization noise effects).

JSC Wireless Sensor Network Update

NASA Technical Reports Server (NTRS)

Wagner, Robert

2010-01-01

Sensor nodes composed of three basic components... radio module: COTS radio module implementing standardized WSN protocol; treated as WSN modem by main board main board: contains application processor (TI MSP430 microcontroller), memory, power supply; responsible for sensor data acquisition, pre-processing, and task scheduling; re-used in every application with growing library of embedded C code sensor card: contains application-specific sensors, data conditioning hardware, and any advanced hardware not built into main board (DSPs, faster A/D, etc.); requires (re-) development for each application.

A Concurrent Smalltalk Compiler for the Message-Driven Processor

DTIC Science & Technology

1988-05-01

apj with bits from low-bit (inclusive) to high-bit (exclusive) set. ;;;Low-bit defaults to zero. (defmacro brange (high-bit &optional low-bit) (list...n2) (null (cddr num))) (aetg bits (b+ bits (if (>- nl n2) ( brange (1+ nl) n2) ( brange (1+ n2) ni)))) (error "Bad bmap range: -S" flu.)))) (t (error...vlocs) flat ((vlive (b- finst-vllv* mast) *I.( brange firat-context-slot-nun))) (next (inst-next last))) (if (bempty vlive) (delete-module module inat

Purifier-integrated methanol reformer for fuel cell vehicles

NASA Astrophysics Data System (ADS)

Han, Jaesung; Kim, Il-soo; Choi, Keun-Sup

We developed a compact, 3-kW, purifier-integrated modular reformer which becomes the building block of full-scale 30-kW or 50-kW methanol fuel processors for fuel cell vehicles. Our proprietary technologies regarding hydrogen purification by composite metal membrane and catalytic combustion by washcoated wire-mesh catalyst were combined with the conventional methanol steam-reforming technology, resulting in higher conversion, excellent quality of product hydrogen, and better thermal efficiency than any other systems using preferential oxidation. In this system, steam reforming, hydrogen purification, and catalytic combustion all take place in a single reactor so that the whole system is compact and easy to operate. Hydrogen from the module is ultrahigh pure (99.9999% or better), hence there is no power degradation of PEMFC stack due to contamination by CO. Also, since only pure hydrogen is supplied to the anode of the PEMFC stack, 100% hydrogen utilization is possible in the stack. The module produces 2.3 Nm 3/h of hydrogen, which is equivalent to 3 kW when PEMFC has 43% efficiency. Thermal efficiency (HHV of product H 2/HHV of MeOH in) of the module is 89% and the power density of the module is 0.77 kW/l. This work was conducted in cooperation with Hyundai Motor Company in the form of a Korean national project. Currently the module is under test with an actual fuel cell stack in order to verify its performance. Sooner or later a full-scale 30-kW system will be constructed by connecting these modules in series and parallel and will serve as the fuel processor for the Korean first fuel cell hybrid vehicle.

Hypoxia, Monitoring, and Mitigation System

DTIC Science & Technology

2015-08-01

Oxygen Saturation Measured via Pulse - Oximeter SRS Software Requirements Specification SW Software TI Texas Instruments uPROC Micro-Processor USAARL...Financial) Table of Figures Figure 1: Pulse OX custom module...Tasks 3, 4 and 5 have not been exercised. Sensor definition testing continued on the custom pulse -ox design. Additional refinement on the pulse

Machine Vision Giving Eyes to Robots. Resources in Technology.

ERIC Educational Resources Information Center

Technology Teacher, 1990

1990-01-01

This module introduces machine vision, which can be used for inspection, robot guidance and part sorting. The future for machine vision will include new technology and will bring vision systems closer to the ultimate vision processor, the human eye. Includes a student quiz, outcomes, and activities. (JOW)

Status of a Power Processor for the Prometheus-1 Electric Propulsion System

NASA Technical Reports Server (NTRS)

Pinero, Luis R.; Hill, Gerald M.; Aulisio, Michael; Gerber, Scott; Griebeler, Elmer; Hewitt, Frank; Scina, Joseph

2006-01-01

NASA is developing technologies for nuclear electric propulsion for proposed deep space missions in support of the Exploration initiative under Project Prometheus. Electrical power produced by the combination of a fission-based power source and a Brayton power conversion and distribution system is used by a high specific impulse ion propulsion system to propel the spaceship. The ion propulsion system include the thruster, power processor and propellant feed system. A power processor technology development effort was initiated under Project Prometheus to develop high performance and lightweight power-processing technologies suitable for the application. This effort faces multiple challenges including developing radiation hardened power modules and converters with very high power capability and efficiency to minimize the impact on the power conversion and distribution system as well as the heat rejection system. This paper documents the design and test results of the first version of the beam supply, the design of a second version of the beam supply and the design and test results of the ancillary supplies.

The AD and ELENA orbit, trajectory and intensity measurement systems

NASA Astrophysics Data System (ADS)

Marco-Hernández, R.; Alves, D.; Angoletta, M. E.; Marqversen, O.; Molendijk, J.; Oponowicz, E.; Ruffieux, R.; Sánchez-Quesada, J.; SØby, L.

2017-07-01

This paper describes the new Antiproton Decelerator (AD) orbit measurement system and the Extra Low ENergy Antiproton ring (ELENA) orbit, trajectory and intensity measurement system. The AD machine at European Organization for Nuclear Research (CERN) is presently being used to decelerate antiprotons from 3.57 GeV/c to 100 MeV/c for matter vs anti-matter comparative studies. The ELENA machine, presently under commissioning, has been designed to provide an extra deceleration stage down to 13.7 MeV/c. The AD orbit system is based on 32 horizontal and 27 vertical electrostatic Beam Position Monitor (BPM) fitted with existing low noise front-end amplifiers while the ELENA system consists of 24 \\gls{BPM}s equipped with new low-noise head amplifiers. In both systems the front-end amplifiers generate a difference (delta) and a sum (sigma) signal which are sent to the digital acquisition system, placed tens of meters away from the AD or ELENA rings, where they are digitized and further processed. The beam position is calculated by dividing the difference signal by the sum signal either using directly the raw digitized data for measuring the turn-by-turn trajectory in the ELENA system or after down-mixing the signals to baseband for the orbit measurement in both machines. The digitized sigma signal will be used in the ELENA system to calculate the bunched beam intensity and the Schottky parameters with coasting beam after passing through different signal processing chain. The digital acquisition arrangement for both systems is based on the same hardware, also used in the ELENA Low Level Radio Frequency (LLRF) system, which follows the VME Switched Serial (VXS) enhancement of the Versa Module Eurocard 64x extension (VME64x) standard and includes VITA 57 standard Field Programmable Gate Array Mezzanine Card (FMC). The digital acquisition Field Programmable Gate Array (FPGA) and Digital Signal Processor (DSP) firmware shares many common functionalities with the LLRF system but has been tailored for this measurement application in particular. Specific control and acquisition software has been developed for these systems. Both systems are installed in AD and ELENA. The AD orbit system currently measures the orbit in AD while the ELENA system is being used in the commissioning of the ELENA ring.

Remote beating of parallel or orthogonally polarized dual-wavelength optical carriers for 5G millimeter-wave radio-over-fiber link.

PubMed

Wang, Huai-Yung; Chi, Yu-Chieh; Lin, Gong-Ru

2016-08-08

A novel millimeter-wave radio over fiber (MMW-RoF) link at carrier frequency of 35-GHz is proposed with the use of remotely beating MMW generation from reference master and injected slave colorless laser diode (LD) carriers at orthogonally polarized dual-wavelength injection-locking. The slave colorless LD supports lasing one of the dual-wavelength master modes with orthogonal polarizations, which facilitates the single-mode direct modulation of the quadrature amplitude modulation (QAM) orthogonal frequency division multiplexing (OFDM) data. Such an injected single-carrier encoding and coupled dual-carrier transmission with orthogonal polarization effectively suppresses the cross-heterodyne mode-beating intensity noise, the nonlinear modulation (NLM) and four-wave mixing (FWM) sidemodes during injection locking and fiber transmission. In 25-km single-mode fiber (SMF) based wireline system, the dual-carrier under single-mode encoding provides baseband 24-Gbit/s 64-QAM OFDM transmission with an error vector magnitude (EVM) of 8.8%, a bit error rate (BER) of 3.7 × 10^-3, a power penalty of <1.5 dB. After remotely self-beating for wireless transmission, the beat MMW carrier at 35 GHz can deliver the passband 16-QAM OFDM at 4 Gbit/s to show corresponding EVM and BER of 15.5% and 1.4 × 10^-3, respectively, after 25-km SMF and 1.6-m free-space transmission.

Loran-C digital word generator for use with a KIM-1 microprocessor system

NASA Technical Reports Server (NTRS)

Nickum, J. D.

1977-01-01

The problem of translating the time of occurrence of received Loran-C pulses into a time, referenced to a particular period of occurrence is addressed and applied to the design of a digital word generator for a Loran-C sensor processor package. The digital information from this word generator is processed in a KIM-1 microprocessor system which is based on the MOS 6502 CPU. This final system will consist of a complete time difference sensor processor for determining position information using Loran-C charts. The system consists of the KIM-1 microprocessor module, a 4K RAM memory board, a user interface, and the Loran-C word generator.

Spatial Phase Coding for Incoherent Optical Processors

NASA Technical Reports Server (NTRS)

Tigin, D. V.; Lavrentev, A. A.; Gary, C. K.

1994-01-01

In this paper we introduce spatial phase coding of incoherent optical signals for representing signed numbers in optical processors and present an experimental demonstration of this coding technique. If a diffraction grating, such as an acousto-optic cell, modulates a stream of light, the image of the grating can be recovered from the diffracted beam. The position of the grating image, or more precisely its phase, can be used to denote the sign of the number represented by the diffracted light. The intensity of the light represents the magnitude of the number. This technique is more economical than current methods in terms of the number of information channels required to represent a number and the amount of post processing required.

Reconfigurable Drive Current System

NASA Technical Reports Server (NTRS)

Alhorn, Dean C. (Inventor); Dutton, Kenneth R. (Inventor); Howard, David E. (Inventor); Smith, Dennis A. (Inventor)

2017-01-01

A reconfigurable drive current system includes drive stages, each of which includes a high-side transistor and a low-side transistor in a totem pole configuration. A current monitor is coupled to an output of each drive stage. Input channels are provided to receive input signals. A processor is coupled to the input channels and to each current monitor for generating at least one drive signal using at least one of the input signals and current measured by at least one of the current monitors. A pulse width modulation generator is coupled to the processor and each drive stage for varying the drive signals as a function of time prior to being supplied to at least one of the drive stages.

The design and research of anti-color-noise chaos M-ary communication system

DOE Office of Scientific and Technical Information (OSTI.GOV)

Fu, Yongqing, E-mail: fuyongqing@hrbeu.edu.cn; Li, Xingyuan; Li, Yanan

Previously a novel chaos M-ary digital communication method based on spatiotemporal chaos Hamilton oscillator has been proposed. Without chaos synchronization circumstance, it has performance improvement in bandwidth efficiency, transmission efficiency and anti-white-noise performance compared with traditional communication method. In this paper, the channel noise influence on chaotic modulation signals and the construction problem of anti-color-noise chaotic M-ary communication system are studied. The formula of zone partition demodulator’s boundary in additive white Gaussian noise is derived, besides, the problem about how to determine the boundary of zone partition demodulator in additive color noise is deeply studied; Then an approach on constructingmore » anti-color-noise chaos M-ary communication system is proposed, in which a pre-distortion filter is added after the chaos baseband modulator in the transmitter and whitening filter is added before zone partition demodulator in the receiver. Finally, the chaos M-ary communication system based on Hamilton oscillator is constructed and simulated in different channel noise. The result shows that the proposed method in this paper can improve the anti-color-noise performance of the whole communication system compared with the former system, and it has better anti-fading and resisting disturbance performance than Quadrature Phase Shift Keying system.« less

Research on the optoacoustic communication system for speech transmission by variable laser-pulse repetition rates

NASA Astrophysics Data System (ADS)

Jiang, Hongyan; Qiu, Hongbing; He, Ning; Liao, Xin

2018-06-01

For the optoacoustic communication from in-air platforms to submerged apparatus, a method based on speech recognition and variable laser-pulse repetition rates is proposed, which realizes character encoding and transmission for speech. Firstly, the theories and spectrum characteristics of the laser-generated underwater sound are analyzed; and moreover character conversion and encoding for speech as well as the pattern of codes for laser modulation is studied; lastly experiments to verify the system design are carried out. Results show that the optoacoustic system, where laser modulation is controlled by speech-to-character baseband codes, is beneficial to improve flexibility in receiving location for underwater targets as well as real-time performance in information transmission. In the overwater transmitter, a pulse laser is controlled to radiate by speech signals with several repetition rates randomly selected in the range of one to fifty Hz, and then in the underwater receiver laser pulse repetition rate and data can be acquired by the preamble and information codes of the corresponding laser-generated sound. When the energy of the laser pulse is appropriate, real-time transmission for speaker-independent speech can be realized in that way, which solves the problem of underwater bandwidth resource and provides a technical approach for the air-sea communication.

Delta Modulation Technique for Improving the Sensitivity of Monobit Subsamplers in Radar and Coherent Receiver Applications

DOE PAGES

Rodenbeck, Christopher T.; Tracey, Keith J.; Barkley, Keith R.; ...

2014-08-01

This paper introduces a technique for improving the sensitivity of RF subsamplers in radar and coherent receiver applications. The technique, referred to herein as “delta modulation” (DM), feeds the time-average output of a monobit analog-to-digital converter (ADC) back to the ADC input, but with opposite polarity. Assuming pseudo-stationary modulation statistics on the sampled RF waveform, the feedback signal corrects for aggregate DC offsets present in the ADC that otherwise degrade ADC sensitivity. Two RF integrated circuits (RFICs) are designed to demonstrate the approach. One uses analog DM to create the feedback signal; the other uses digital DM to achieve themore » same result. A series of tests validates the designs. The dynamic time-domain response confirms the feedback loop’s basic operation. Measured output quantization imbalance, under noise-only input drive, significantly improves with the use of the DM circuit, even for large, deliberately induced DC offsets and wide temperature variation from -55°C to +85 °C. Examination of the corrected vs. uncorrected baseband spectrum under swept input signal-tonoise ratio (SNR) conditions demonstrates the effectiveness of this approach for realistic radar and coherent receiver applications. In conclusion, two-tone testing shows no impact of the DM technique on ADC linearity.« less

A Low Cost Single Chip VDL Compatible Transceiver ASIC

NASA Technical Reports Server (NTRS)

Becker, Robert

2004-01-01

Recent trends in commercial communications system components have focussed almost exclusively on cellular telephone technology. As many of the traditional sources of receiver components have discontinued non-cellular telephone products, the designers of avionics and other low volume radio applications find themselves increasingly unable to find highly integrated components. This is particularly true for low power, low cost applications which cannot afford the lavish current consumption of the software defined radio approach increasingly taken by certified device manufacturers. In this paper, we describe a low power transceiver chip targeting applications from low VHF to low UHF frequencies typical of avionics systems. The chip encompasses a selectable single or double conversion design for the receiver and a low power IF upconversion transmitter. All local oscillators are synthesized and integrated into the chip. An on-chip I-Q modulator and demodulator provide baseband modulation and demodulation capability allowing the use of low power, fixed point signal processing components for signal demodulation. The goal of this program is to demonstrate a low cost VDL mode-3 transceiver using this chip to receive text weather information sent using 4-slot TDMA with no support for voice. The data will be sent from an experimental ground station. This work is funded by NASA Glenn Research Center.

Subcarrier multiplexing with dispersion reduction and direct detection

DOEpatents

Sargis, P.D.; Haigh, R.E.; McCammon, K.G.

1997-01-21

An SCM system is disclosed for simultaneously reducing the concomitant problems of receiver complexity and dispersion penalty and without requiring the use of an expensive, high-bandwidth optical detector. The system provides both a dispersion reduction and a direct detection to the receiver, with microwave mixers and lithium niobate external modulators that produce sidebands that are only separated by a few gigahertz from a principal laser optical carrier. Digital data streams are independently impressed upon these sidebands for transmission over an ordinary single-mode fiber. Independent high-speed data streams are upconverted to microwave frequencies. These subcarriers are then combined with a microwave power combiner and amplified with a microwave amplifier. A solid-state 1550-nm laser carrier is modulated by the microwave subcarriers. An erbium-doped fiber amplifier (EDFA) is used just prior to long-distance transmission over ordinary single-mode fiber. The transmitted optical signal may then traverse multiple EDFAs to compensate for long-haul optical fiber losses prior to detection. At a receiving end, the optical signal is split into multiple paths. The subcarrier channels are optically pre-selected using a narrowband optical filter, such as a fiber Fabry-Perot (FFP) filter. An optical detector converts the selected optical signal into a baseband electrical data stream. 2 figs.

Universal sensor interface module (USIM)

NASA Astrophysics Data System (ADS)

King, Don; Torres, A.; Wynn, John

1999-01-01

A universal sensor interface model (USIM) is being developed by the Raytheon-TI Systems Company for use with fields of unattended distributed sensors. In its production configuration, the USIM will be a multichip module consisting of a set of common modules. The common module USIM set consists of (1) a sensor adapter interface (SAI) module, (2) digital signal processor (DSP) and associated memory module, and (3) a RF transceiver model. The multispectral sensor interface is designed around a low-power A/D converted, whose input/output interface consists of: -8 buffered, sampled inputs from various devices including environmental, acoustic seismic and magnetic sensors. The eight sensor inputs are each high-impedance, low- capacitance, differential amplifiers. The inputs are ideally suited for interface with discrete or MEMS sensors, since the differential input will allow direct connection with high-impedance bridge sensors and capacitance voltage sources. Each amplifier is connected to a 22-bit (Delta) (Sigma) A/D converter to enable simultaneous samples. The low power (Delta) (Sigma) converter provides 22-bit resolution at sample frequencies up to 142 hertz (used for magnetic sensors) and 16-bit resolution at frequencies up to 1168 hertz (used for acoustic and seismic sensors). The video interface module is based around the TMS320C5410 DSP. It can provide sensor array addressing, video data input, data calibration and correction. The processor module is based upon a MPC555. It will be used for mode control, synchronization of complex sensors, sensor signal processing, array processing, target classification and tracking. Many functions of the A/D, DSP and transceiver can be powered down by using variable clock speeds under software command or chip power switches. They can be returned to intermediate or full operation by DSP command. Power management may be based on the USIM's internal timer, command from the USIM transceiver, or by sleep mode processing management. The low power detection mode is implemented by monitoring any of the sensor analog outputs at lower sample rates for detection over a software controllable threshold.

Smart Fan Modules And System

DOEpatents

Cipolla, Thomas M.; Kaufman, Richard I.; Mok, Lawrence S.

2003-07-15

A fan module including: two or more individual fans, each fan having an air movement means and a motor engaged with the air movement means for accelerating air entering each of the two or more individual fans; a temperature sensor for sensing a temperature associated with the two or more fans and for outputting a first signal corresponding to the temperature; rotational speed sensor for outputting a second signal corresponding to a rotational speed of each of the two or more fans; and a processor for receiving the first and second signals and controlling the two or more individual fans based on the first and second signals. A fan module including: two or more individual fans, each fan having an air movement means and a motor engaged with the air movement means for accelerating air entering each of the two or more individual fans; a temperature sensor for sensing a temperature associated with the two or more fans and for outputting a first signal corresponding to the temperature; rotational speed sensor for outputting a second signal corresponding to a rotational speed of each of the two or more fans; and a processor for receiving the first and second signals and controlling the two or more individual fans based on the first and second signals.

Cochlear implant characteristics and speech perception skills of adolescents with long-term device use.

PubMed

Davidson, Lisa S; Geers, Ann E; Brenner, Christine

2010-10-01

Updated cochlear implant technology and optimized fitting can have a substantial impact on speech perception. The effects of upgrades in processor technology and aided thresholds on word recognition at soft input levels and sentence recognition in noise were examined. We hypothesized that updated speech processors and lower aided thresholds would allow improved recognition of soft speech without compromising performance in noise. 109 teenagers who had used a Nucleus 22-cochlear implant since preschool were tested with their current speech processor(s) (101 unilateral and 8 bilateral): 13 used the Spectra, 22 the ESPrit 22, 61 the ESPrit 3G, and 13 the Freedom. The Lexical Neighborhood Test (LNT) was administered at 70 and 50 dB SPL and the Bamford Kowal Bench sentences were administered in quiet and in noise. Aided thresholds were obtained for frequency-modulated tones from 250 to 4,000 Hz. Results were analyzed using repeated measures analysis of variance. Aided thresholds for the Freedom/3G group were significantly lower (better) than the Spectra/Sprint group. LNT scores at 50 dB were significantly higher for the Freedom/3G group. No significant differences between the 2 groups were found for the LNT at 70 or sentences in quiet or noise. Adolescents using updated processors that allowed for aided detection thresholds of 30 dB HL or better performed the best at soft levels. The BKB in noise results suggest that greater access to soft speech does not compromise listening in noise.

Theoretical analysis of the performance of code division multiple access communications over multimode optical fiber channels. Part 1: Transmission and detection

NASA Astrophysics Data System (ADS)

Walker, Ernest L.

1994-05-01

This paper presents results of a theoretical investigation to evaluate the performance of code division multiple access communications over multimode optical fiber channels in an asynchronous, multiuser communication network environment. The system is evaluated using Gold sequences for spectral spreading of the baseband signal from each user employing direct-sequence biphase shift keying and intensity modulation techniques. The transmission channel model employed is a lossless linear system approximation of the field transfer function for the alpha -profile multimode optical fiber. Due to channel model complexity, a correlation receiver model employing a suboptimal receive filter was used in calculating the peak output signal at the ith receiver. In Part 1, the performance measures for the system, i.e., signal-to-noise ratio and bit error probability for the ith receiver, are derived as functions of channel characteristics, spectral spreading, number of active users, and the bit energy to noise (white) spectral density ratio. In Part 2, the overall system performance is evaluated.

Low Density ITB Studies Using the Upgraded C-Mod Reflectometry System

NASA Astrophysics Data System (ADS)

Dominguez, A.; Edlund, E.; Fiore, C. L.; Lin, L.; Marmar, E. S.; Snipes, J. A.; Porkolab, M.; Kramer, G. J.; Rowan, W. L.

2007-11-01

The Alcator C-Mod reflectometry system was recently upgraded in two ways: The low frequency channels were changed from amplitude modulation - in which two microwave signals, slightly separated in frequency, are injected into the plasma - to baseband, where a single frequency is used, in order to improve density fluctuation measurements. The second change, a variable frequency channel operating over the range from 122GHz to 140GHz (with corresponding density cutoffs of 1.84-2.43x10^20m-3) has been installed in collaboration with PPPL. Initial results from the upgraded system are presented, including the study of low density Internal Transport Barriers. Using O-mode waves, the reflectometry system is able to radially localize density fluctuations on the low field side along the tokamak midplane. It can, therefore, be used to probe the foot of low density ITBs. The corresponding reflectometry data will be compared to those of other fluctuation diagnostics, including Phase Contrast Imaging and magnetic pick-up coils.

A Wireless Capsule Endoscope System With Low-Power Controlling and Processing ASIC.

PubMed

Xinkai Chen; Xiaoyu Zhang; Linwei Zhang; Xiaowen Li; Nan Qi; Hanjun Jiang; Zhihua Wang

2009-02-01

This paper presents the design of a wireless capsule endoscope system. The proposed system is mainly composed of a CMOS image sensor, a RF transceiver and a low-power controlling and processing application specific integrated circuit (ASIC). Several design challenges involving system power reduction, system miniaturization and wireless wake-up method are resolved by employing optimized system architecture, integration of an area and power efficient image compression module, a power management unit (PMU) and a novel wireless wake-up subsystem with zero standby current in the ASIC design. The ASIC has been fabricated in 0.18-mum CMOS technology with a die area of 3.4 mm * 3.3 mm. The digital baseband can work under a power supply down to 0.95 V with a power dissipation of 1.3 mW. The prototype capsule based on the ASIC and a data recorder has been developed. Test result shows that proposed system architecture with local image compression lead to an average of 45% energy reduction for transmitting an image frame.

Methods and apparatuses using filter banks for multi-carrier spread spectrum signals

DOE Office of Scientific and Technical Information (OSTI.GOV)

Moradi, Hussein; Farhang, Behrouz; Kutsche, Carl A

2017-01-31

A transmitter includes a synthesis filter bank to spread a data symbol to a plurality of frequencies by encoding the data symbol on each frequency, apply a common pulse-shaping filter, and apply gains to the frequencies such that a power level of each frequency is less than a noise level of other communication signals within the spectrum. Each frequency is modulated onto a different evenly spaced subcarrier. A demodulator in a receiver converts a radio frequency input to a spread-spectrum signal in a baseband. A matched filter filters the spread-spectrum signal with a common filter having characteristics matched to themore » synthesis filter bank in the transmitter by filtering each frequency to generate a sequence of narrow pulses. A carrier recovery unit generates control signals responsive to the sequence of narrow pulses suitable for generating a phase-locked loop between the demodulator, the matched filter, and the carrier recovery unit.« less

Methods and apparatuses using filter banks for multi-carrier spread spectrum signals

DOE Office of Scientific and Technical Information (OSTI.GOV)

Moradi, Hussein; Farhang, Behrouz; Kutsche, Carl A.

2016-06-14

A transmitter includes a synthesis filter bank to spread a data symbol to a plurality of frequencies by encoding the data symbol on each frequency, apply a common pulse-shaping filter, and apply gains to the frequencies such that a power level of each frequency is less than a noise level of other communication signals within the spectrum. Each frequency is modulated onto a different evenly spaced subcarrier. A demodulator in a receiver converts a radio frequency input to a spread-spectrum signal in a baseband. A matched filter filters the spread-spectrum signal with a common filter having characteristics matched to themore » synthesis filter bank in the transmitter by filtering each frequency to generate a sequence of narrow pulses. A carrier recovery unit generates control signals responsive to the sequence of narrow pulses suitable for generating a phase-locked loop between the demodulator, the matched filter, and the carrier recovery unit.« less

Automated cassette-to-cassette substrate handling system

DOE Office of Scientific and Technical Information (OSTI.GOV)

Kraus, Joseph Arthur; Boyer, Jeremy James; Mack, Joseph

2014-03-18

An automated cassette-to-cassette substrate handling system includes a cassette storage module for storing a plurality of substrates in cassettes before and after processing. A substrate carrier storage module stores a plurality of substrate carriers. A substrate carrier loading/unloading module loads substrates from the cassette storage module onto the plurality of substrate carriers and unloads substrates from the plurality of substrate carriers to the cassette storage module. A transport mechanism transports the plurality of substrates between the cassette storage module and the plurality of substrate carriers and transports the plurality of substrate carriers between the substrate carrier loading/unloading module and amore » processing chamber. A vision system recognizes recesses in the plurality of substrate carriers corresponding to empty substrate positions in the substrate carrier. A processor receives data from the vision system and instructs the transport mechanism to transport substrates to positions on the substrate carrier in response to the received data.« less

SPACE COMMUNICATIONS TECHNIQUES

DTIC Science & Technology

A description is given of the expansion of interim simplex space communication facilities at Rome, N . Y ., and Trinidad to full duplex for use in...communications baseband demod ulator, doppler-shift tracking, and passive radar tracking at Rome, N . Y . are discussed.

All-digital GPS receiver mechanization

NASA Astrophysics Data System (ADS)

Ould, P. C.; van Wechel, R. J.

The paper describes the all-digital baseband correlation processing of GPS signals, which is characterized by (1) a potential for improved antijamming performance, (2) fast acquisition by a digital matched filter, (3) reduction of adjustment, (4) increased system reliability, and (5) provision of a basis for the realization of a high degree of VLSI potential for the development of small economical GPS sets. The basic technical approach consists of a broadband fix-tuned RF converter followed by a digitizer; digital-matched-filter acquisition section; phase- and delay-lock tracking via baseband digital correlation; software acquisition logic and loop filter implementation; and all-digital implementation of the feedback numerical controlled oscillators and code generator. Broadband in-phase and quadrature tracking is performed by an arctangent angle detector followed by a phase-unwrapping algorithm that eliminates false locks induced by sampling and data bit transitions, and yields a wide pull-in frequency range approaching one-fourth of the loop iteration frequency.

Fault-tolerant computer study. [logic designs for building block circuits

NASA Technical Reports Server (NTRS)

Rennels, D. A.; Avizienis, A. A.; Ercegovac, M. D.

1981-01-01

A set of building block circuits is described which can be used with commercially available microprocessors and memories to implement fault tolerant distributed computer systems. Each building block circuit is intended for VLSI implementation as a single chip. Several building blocks and associated processor and memory chips form a self checking computer module with self contained input output and interfaces to redundant communications buses. Fault tolerance is achieved by connecting self checking computer modules into a redundant network in which backup buses and computer modules are provided to circumvent failures. The requirements and design methodology which led to the definition of the building block circuits are discussed.

Ion propulsion cost effectivity

NASA Technical Reports Server (NTRS)

Zafran, S.; Biess, J. J.

1978-01-01

Ion propulsion modules employing 8-cm thrusters and 30-cm thrusters were studied for Multimission Modular Spacecraft (MMS) applications. Recurring and nonrecurring cost elements were generated for these modules. As a result, ion propulsion cost drivers were identified to be Shuttle charges, solar array, power processing, and thruster costs. Cost effective design approaches included short length module configurations, array power sharing, operation at reduced thruster input power, simplified power processing units, and power processor output switching. The MMS mission model employed indicated that nonrecurring costs have to be shared with other programs unless the mission model grows. Extended performance missions exhibited the greatest benefits when compared with monopropellant hydrazine propulsion.

Method and Apparatus for Characterizing Pressure Sensors using Modulated Light Beam Pressure

NASA Technical Reports Server (NTRS)

Youngquist, Robert C. (Inventor)

2003-01-01

Embodiments of apparatuses and methods are provided that use light sources instead of sound sources for characterizing and calibrating sensors for measuring small pressures to mitigate many of the problems with using sound sources. In one embodiment an apparatus has a light source for directing a beam of light on a sensing surface of a pressure sensor for exerting a force on the sensing surface. The pressure sensor generates an electrical signal indicative of the force exerted on the sensing surface. A modulator modulates the beam of light. A signal processor is electrically coupled to the pressure sensor for receiving the electrical signal.

DOE Office of Scientific and Technical Information (OSTI.GOV)

Harper, Jason; Dobrzynski, Daniel S.

A smart charging system for charging a plug-in electric vehicle (PEV) includes an electric vehicle supply equipment (EVSE) configured to supply electrical power to the PEV through a smart charging module coupled to the EVSE. The smart charging module comprises an electronic circuitry which includes a processor. The electronic circuitry includes electronic components structured to receive electrical power from the EVSE, and supply the electrical power to the PEV. The electronic circuitry is configured to measure a charging parameter of the PEV. The electronic circuitry is further structured to emulate a pulse width modulated signal generated by the EVSE. Themore » smart charging module can also include a first coupler structured to be removably couple to the EVSE and a second coupler structured to be removably coupled to the PEV.« less

The Advanced Communication Technology Satellite and ISDN

NASA Technical Reports Server (NTRS)

Lowry, Peter A.

1996-01-01

This paper depicts the Advanced Communication Technology Satellite (ACTS) system as a global central office switch. The ground portion of the system is the collection of earth stations or T1-VSAT's (T1 very small aperture terminals). The control software for the T1-VSAT's resides in a single CPU. The software consists of two modules, the modem manager and the call manager. The modem manager (MM) controls the RF modem portion of the T1-VSAT. It processes the orderwires from the satellite or from signaling generated by the call manager (CM). The CM controls the Recom Laboratories MSPs by receiving signaling messages from the stacked MSP shelves ro units and sending appropriate setup commands to them. There are two methods used to setup and process calls in the CM; first by dialing up a circuit using a standard telephone handset or, secondly by using an external processor connected to the CPU's second COM port, by sending and receiving signaling orderwires. It is the use of the external processor which permits the ISDN (Integrated Services Digital Network) Signaling Processor to implement ISDN calls. In August 1993, the initial testing of the ISDN Signaling Processor was carried out at ACTS System Test at Lockheed Marietta, Princeton, NJ using the spacecraft in its test configuration on the ground.

Holo-Chidi video concentrator card

NASA Astrophysics Data System (ADS)

Nwodoh, Thomas A.; Prabhakar, Aditya; Benton, Stephen A.

2001-12-01

The Holo-Chidi Video Concentrator Card is a frame buffer for the Holo-Chidi holographic video processing system. Holo- Chidi is designed at the MIT Media Laboratory for real-time computation of computer generated holograms and the subsequent display of the holograms at video frame rates. The Holo-Chidi system is made of two sets of cards - the set of Processor cards and the set of Video Concentrator Cards (VCCs). The Processor cards are used for hologram computation, data archival/retrieval from a host system, and for higher-level control of the VCCs. The VCC formats computed holographic data from multiple hologram computing Processor cards, converting the digital data to analog form to feed the acousto-optic-modulators of the Media lab's Mark-II holographic display system. The Video Concentrator card is made of: a High-Speed I/O (HSIO) interface whence data is transferred from the hologram computing Processor cards, a set of FIFOs and video RAM used as buffer for data for the hololines being displayed, a one-chip integrated microprocessor and peripheral combination that handles communication with other VCCs and furnishes the card with a USB port, a co-processor which controls display data formatting, and D-to-A converters that convert digital fringes to analog form. The co-processor is implemented with an SRAM-based FPGA with over 500,000 gates and controls all the signals needed to format the data from the multiple Processor cards into the format required by Mark-II. A VCC has three HSIO ports through which up to 500 Megabytes of computed holographic data can flow from the Processor Cards to the VCC per second. A Holo-Chidi system with three VCCs has enough frame buffering capacity to hold up to thirty two 36Megabyte hologram frames at a time. Pre-computed holograms may also be loaded into the VCC from a host computer through the low- speed USB port. Both the microprocessor and the co- processor in the VCC can access the main system memory used to store control programs and data for the VCC. The Card also generates the control signals used by the scanning mirrors of Mark-II. In this paper we discuss the design of the VCC and its implementation in the Holo-Chidi system.

77 FR 49702 - Airworthiness Directives; Embraer S.A. Airplanes

Federal Register 2010, 2011, 2012, 2013, 2014

2012-08-17

... replacing the AMS controller processor module with one containing new software, and a new AFM revision. This... protection system. We are issuing this AD to prevent the possibility of a right-hand (RH) engine compressor... down. Also there is the possibility of right hand (RH) engine compressor to stall after the Auxiliary...

Orbit attitude processor. STS-1 bench program verification test plan

NASA Technical Reports Server (NTRS)

Mcclain, C. R.

1980-01-01

A plan for the static verification of the STS-1 ATT PROC ORBIT software requirements is presented. The orbit version of the SAPIENS bench program is used to generate the verification data. A brief discussion of the simulation software and flight software modules is presented along with a description of the test cases.

Adaptive Optical Processor

DTIC Science & Technology

1991-08-01

spatial light modulator, Dr. George Brost and I LT Edward Toughlian who helped "trouble-shoot" many of the problems that came up, Mr. Paul Repak and Mr...RADC-TR-89-226, (1989). 8. Welstead, S.T., M.J. Ward, D.M. Blanchard, G.A. Brost , S.L Halby, "Adaptive signal processing using a liquid crystal

Challenging prior evidence for a shared syntactic processor for language and music.

PubMed

Perruchet, Pierre; Poulin-Charronnat, Bénédicte

2013-04-01

A theoretical landmark in the growing literature comparing language and music is the shared syntactic integration resource hypothesis (SSIRH; e.g., Patel, 2008), which posits that the successful processing of linguistic and musical materials relies, at least partially, on the mastery of a common syntactic processor. Supporting the SSIRH, Slevc, Rosenberg, and Patel (Psychonomic Bulletin & Review 16(2):374-381, 2009) recently reported data showing enhanced syntactic garden path effects when the sentences were paired with syntactically unexpected chords, whereas the musical manipulation had no reliable effect on the processing of semantic violations. The present experiment replicated Slevc et al.'s (2009) procedure, except that syntactic garden paths were replaced with semantic garden paths. We observed the very same interactive pattern of results. These findings suggest that the element underpinning interactions is the garden path configuration, rather than the implication of an alleged syntactic module. We suggest that a different amount of attentional resources is recruited to process each type of linguistic manipulations, hence modulating the resources left available for the processing of music and, consequently, the effects of musical violations.

A System-on-Chip Solution for Point-of-Care Ultrasound Imaging Systems: Architecture and ASIC Implementation.

PubMed

Kang, Jeeun; Yoon, Changhan; Lee, Jaejin; Kye, Sang-Bum; Lee, Yongbae; Chang, Jin Ho; Kim, Gi-Duck; Yoo, Yangmo; Song, Tai-kyong

2016-04-01

In this paper, we present a novel system-on-chip (SOC) solution for a portable ultrasound imaging system (PUS) for point-of-care applications. The PUS-SOC includes all of the signal processing modules (i.e., the transmit and dynamic receive beamformer modules, mid- and back-end processors, and color Doppler processors) as well as an efficient architecture for hardware-based imaging methods (e.g., dynamic delay calculation, multi-beamforming, and coded excitation and compression). The PUS-SOC was fabricated using a UMC 130-nm NAND process and has 16.8 GFLOPS of computing power with a total equivalent gate count of 12.1 million, which is comparable to a Pentium-4 CPU. The size and power consumption of the PUS-SOC are 27×27 mm(2) and 1.2 W, respectively. Based on the PUS-SOC, a prototype hand-held US imaging system was implemented. Phantom experiments demonstrated that the PUS-SOC can provide appropriate image quality for point-of-care applications with a compact PDA size ( 200×120×45 mm(3)) and 3 hours of battery life.

FPGA Techniques Based New Hybrid Modulation Strategies for Voltage Source Inverters

PubMed Central

Sudha, L. U.; Baskaran, J.; Elankurisil, S. A.

2015-01-01

This paper corroborates three different hybrid modulation strategies suitable for single-phase voltage source inverter. The proposed method is formulated using fundamental switching and carrier based pulse width modulation methods. The main tale of this proposed method is to optimize a specific performance criterion, such as minimization of the total harmonic distortion (THD), lower order harmonics, switching losses, and heat losses. The proposed method is articulated using fundamental switching and carrier based pulse width modulation methods. Thus, the harmonic pollution in the power system will be reduced and the power quality will be augmented with better harmonic profile for a target fundamental output voltage. The proposed modulation strategies are simulated in MATLAB r2010a and implemented in a Xilinx spartan 3E-500 FG 320 FPGA processor. The feasibility of these modulation strategies is authenticated through simulation and experimental results. PMID:25821852

Hyperspectral Microwave Atmospheric Sounder (HyMas) - New Capability in the CoSMIR-CoSSIR Scanhead

NASA Technical Reports Server (NTRS)

Hilliard, L. M.; Racette, P. E.; Blackwell, W.; Galbraith, C.; Thompson, E.

2015-01-01

Lincoln Laboratory and NASA's Goddard Space Flight Center have teamed to re-use an existing instrument platform, the CoSMIRCoSSIR system for atmospheric sounding, to develop a new capability in hyperspectral filtering, data collection, and display. The volume of the scanhead accomodated an intermediate frequency processor(IFP), that provides the filtering and digitization of the raw data and the interoperable remote component (IRC) adapted to CoSMIR, CoSSIR, and HyMAS that stores and archives the data with time tagged calibration and navigation data.The first element of the work is the demonstration of a hyperspectral microwave receiver subsystem that was recently shown using a comprehensive simulation study to yield performance that substantially exceeds current state-of-the-art. Hyperspectral microwave sounders with 100 channels offer temperature and humidity sounding improvements similar to those obtained when infrared sensors became hyperspectral, but with the relative insensitivity to clouds that characterizes microwave sensors. Hyperspectral microwave operation is achieved using independent RF antennareceiver arrays that sample the same areavolume of the Earths surfaceatmosphere at slightly different frequencies and therefore synthesize a set of dense, finely spaced vertical weighting functions. The second, enabling element of the proposal is the development of a compact 52-channel Intermediate Frequency processor module. A principal challenge in the development of a hyperspectral microwave system is the size of the IF filter bank required for channelization. Large bandwidths are simultaneously processed, thus complicating the use of digital back-ends with associated high complexities, costs, and power requirements. Our approach involves passive filters implemented using low-temperature co-fired ceramic (LTCC) technology to achieve an ultra-compact module that can be easily integrated with existing RF front-end technology. This IF processor is universally applicable to other microwave sensing missions requiring compact IF spectrometry.The data include 52 operational channels with low IF module volume (100cm3) and mass (300g) and linearity better than 0.3 over a 330K dynamic range.

Pulse Shaped 8-PSK Bandwidth Efficiency and Spectral Spike Elimination

NASA Technical Reports Server (NTRS)

Tao, Jian-Ping

1998-01-01

The most bandwidth-efficient communication methods are imperative to cope with the congested frequency bands. Pulse shaping methods have excellent effects on narrowing bandwidth and increasing band utilization. The position of the baseband filters for the pulse shaping is crucial. Post-modulation pulse shaping (a low pass filter is located after the modulator) can change signals from constant envelope to non-constant envelope, and non-constant envelope signals through non-linear device (a SSPA or TWT) can further spread the power spectra. Pre-modulation pulse shaping (a filter is located before the modulator) will have constant envelope. These two pulse shaping methods have different effects on narrowing the bandwidth and producing bit errors. This report studied the effect of various pre-modulation pulse shaping filters with respect to bandwidth, spectral spikes and bit error rate. A pre-modulation pulse shaped 8-ary Phase Shift Keying (8PSK) modulation was used throughout the simulations. In addition to traditional pulse shaping filters, such as Bessel, Butterworth and Square Root Raised Cosine (SRRC), other kinds of filters or pulse waveforms were also studied in the pre-modulation pulse shaping method. Simulations were conducted by using the Signal Processing Worksystem (SPW) software package on HP workstations which simulated the power spectral density of pulse shaped 8-PSK signals, end to end system performance and bit error rates (BERS) as a function of Eb/No using pulse shaping in an AWGN channel. These results are compared with the post-modulation pulse shaped 8-PSK results. The simulations indicate traditional pulse shaping filters used in pre-modulation pulse shaping may produce narrower bandwidth, but with worse BER than those in post-modulation pulse shaping. Theory and simulations show pre- modulation pulse shaping could also produce discrete line power spectra (spikes) at regular frequency intervals. These spikes may cause interference with adjacent channel and reduce power efficiency. Some particular pulses (filters), such as trapezoid and pulses with different transits (such as weighted raised cosine transit) were found to reduce bandwidth and not generate spectral spikes. Although a solid state power amplifier (SSPA) was simulated in the non-linear (saturation) region, output power spectra did not spread due to the constant envelope 8-PSK signals.

A flexible CAMAC based data system for Space Shuttle scientific instruments

NASA Technical Reports Server (NTRS)

Ehrmann, C. H.; Baker, R. G.; Smith, R. L.; Kaminski, T. J.

1979-01-01

An effort has been made within NASA to produce a low-cost modular system for implementation of Shuttle payloads based on the CAMAC standards for packaging and data transfer. A key element of such a modular system is a means for controlling the data system, collecting and processing the data for transmission to the ground, and issuing commands to the instrument either from the ground or based on the data collected. A description is presented of such a means based on a network of digital processors and CAMAC crate controllers, which allows for the implementation of instruments ranging from those requiring only a single CAMAC crate of functional modules and no data processing to ones requiring multiple crates and multiple data processors.

Integrated 3-D vision system for autonomous vehicles

NASA Astrophysics Data System (ADS)

Hou, Kun M.; Shawky, Mohamed; Tu, Xiaowei

1992-03-01

Nowadays, autonomous vehicles have become a multidiscipline field. Its evolution is taking advantage of the recent technological progress in computer architectures. As the development tools became more sophisticated, the trend is being more specialized, or even dedicated architectures. In this paper, we will focus our interest on a parallel vision subsystem integrated in the overall system architecture. The system modules work in parallel, communicating through a hierarchical blackboard, an extension of the 'tuple space' from LINDA concepts, where they may exchange data or synchronization messages. The general purpose processing elements are of different skills, built around 40 MHz i860 Intel RISC processors for high level processing and pipelined systolic array processors based on PLAs or FPGAs for low-level processing.

A high-speed, large-capacity, 'jukebox' optical disk system

NASA Technical Reports Server (NTRS)

Ammon, G. J.; Calabria, J. A.; Thomas, D. T.

1985-01-01

Two optical disk 'jukebox' mass storage systems which provide access to any data in a store of 10 to the 13th bits (1250G bytes) within six seconds have been developed. The optical disk jukebox system is divided into two units, including a hardware/software controller and a disk drive. The controller provides flexibility and adaptability, through a ROM-based microcode-driven data processor and a ROM-based software-driven control processor. The cartridge storage module contains 125 optical disks housed in protective cartridges. Attention is given to a conceptual view of the disk drive unit, the NASA optical disk system, the NASA database management system configuration, the NASA optical disk system interface, and an open systems interconnect reference model.

Compact time- and space-integrating SAR processor: design and development status

NASA Astrophysics Data System (ADS)

Haney, Michael W.; Levy, James J.; Christensen, Marc P.; Michael, Robert R., Jr.; Mock, Michael M.

1994-06-01

Progress toward a flight demonstration of the acousto-optic time- and space- integrating real-time SAR image formation processor program is reported. The concept overcomes the size and power consumption limitations of electronic approaches by using compact, rugged, and low-power analog optical signal processing techniques for the most computationally taxing portions of the SAR imaging problem. Flexibility and performance are maintained by the use of digital electronics for the critical low-complexity filter generation and output image processing functions. The results reported include tests of a laboratory version of the concept, a description of the compact optical design that will be implemented, and an overview of the electronic interface and controller modules of the flight-test system.

Campus Nets for the Nineties.

ERIC Educational Resources Information Center

Neff, Raymond K.

1994-01-01

Describes present and future plans for the campuswide communications network at Case Western Reserve University (Ohio). Highlights include upgrading from baseband to broadband technologies; ATM (Asynchronous Transfer Mode)-based networks that allow simultaneous voice, video, and data transmission; strategic planning goals; implications for…

Digital 8-DPSK Modem For Trellis-Coded Communication

NASA Technical Reports Server (NTRS)

Jedrey, T. C.; Lay, N. E.; Rafferty, W.

1989-01-01

Digital real-time modem processes octuple differential-phase-shift-keyed trellis-coded modulation. Intended for use in communicating data at rate up to 4.8 kb/s in land-mobile satellite channel (Rician fading) of 5-kHz bandwidth at carrier frequency of 1 to 2 GHz. Modulator and demodulator contain digital signal processors performing modem functions. Design flexible in that functions altered via software. Modem successfully tested and evaluated in both laboratory and field experiments, including recent full-scale satellite experiment. In all cases, modem performed within 1 dB of theory. Other communication systems benefitting from this type of modem include land mobile (without satellites), paging, digitized voice, and frequency-modulation subcarrier data broadcasting.

Optical links in handheld multimedia devices

NASA Astrophysics Data System (ADS)

van Geffen, S.; Duis, J.; Miller, R.

2008-04-01

Ever emerging applications in handheld multimedia devices such as mobile phones, laptop computers, portable video games and digital cameras requiring increased screen resolutions are driving higher aggregate bitrates between host processor and display(s) enabling services such as mobile video conferencing, video on demand and TV broadcasting. Larger displays and smaller phones require complex mechanical 3D hinge configurations striving to combine maximum functionality with compact building volumes. Conventional galvanic interconnections such as Micro-Coax and FPC carrying parallel digital data between host processor and display module may produce Electromagnetic Interference (EMI) and bandwidth limitations caused by small cable size and tight cable bends. To reduce the number of signals through a hinge, the mobile phone industry, organized in the MIPI (Mobile Industry Processor Interface) alliance, is currently defining an electrical interface transmitting serialized digital data at speeds >1Gbps. This interface allows for electrical or optical interconnects. Above 1Gbps optical links may offer a cost effective alternative because of their flexibility, increased bandwidth and immunity to EMI. This paper describes the development of optical links for handheld communication devices. A cable assembly based on a special Plastic Optical Fiber (POF) selected for its mechanical durability is terminated with a small form factor molded lens assembly which interfaces between an 850nm VCSEL transmitter and a receiving device on the printed circuit board of the display module. A statistical approach based on a Lean Design For Six Sigma (LDFSS) roadmap for new product development tries to find an optimum link definition which will be robust and low cost meeting the power consumption requirements appropriate for battery operated systems.

Command and Service Module Communications

NASA Technical Reports Server (NTRS)

Interbartolo, Michael

2009-01-01

This viewgraph presentation examines Command and Service Module (CSM) Communications. The communication system's capabilities are defined, including CSM-Earth, CSM-Lunar Module and CSM-Extravehicular crewman communications. An overview is provided for S-band communications, including data transmission and receiving rates, operating frequencies and major system components (pre-modulation processors, unified S-band electronics, S-band power amplifier and S-band antennas). Additionally, data transmission rates, operating frequencies and the capabilities of VHF communications are described. Major VHF components, including transmitters and receivers, and the VHF multiplexer and antennas are also highlighted. Finally, communications during pre-launch, ascent, in-flight and entry are discussed. Overall, the CSM communication system was rated highly by flight controllers and crew. The system was mostly autonomous for both crew and flight controllers and no major issues were encountered during flight.

High Performance Power Module for Hall Effect Thrusters

NASA Technical Reports Server (NTRS)

Pinero, Luis R.; Peterson, Peter Y.; Bowers, Glen E.

2002-01-01

Previous efforts to develop power electronics for Hall thruster systems have targeted the 1 to 5 kW power range and an output voltage of approximately 300 V. New Hall thrusters are being developed for higher power, higher specific impulse, and multi-mode operation. These thrusters require up to 50 kW of power and a discharge voltage in excess of 600 V. Modular power supplies can process more power with higher efficiency at the expense of complexity. A 1 kW discharge power module was designed, built and integrated with a Hall thruster. The breadboard module has a power conversion efficiency in excess of 96 percent and weighs only 0.765 kg. This module will be used to develop a kW, multi-kW, and high voltage power processors.

Electro-Optic Computing Architectures. Volume I

DTIC Science & Technology

1998-02-01

The objective of the Electro - Optic Computing Architecture (EOCA) program was to develop multi-function electro - optic interfaces and optical...interconnect units to enhance the performance of parallel processor systems and form the building blocks for future electro - optic computing architectures...Specifically, three multi-function interface modules were targeted for development - an Electro - Optic Interface (EOI), an Optical Interconnection Unit (OW

Low power signal processing research at Stanford

NASA Technical Reports Server (NTRS)

Burr, J.; Williamson, P. R.; Peterson, A.

1991-01-01

This paper gives an overview of the research being conducted at Stanford University's Space, Telecommunications, and Radioscience Laboratory in the area of low energy computation. It discusses the work we are doing in large scale digital VLSI neural networks, interleaved processor and pipelined memory architectures, energy estimation and optimization, multichip module packaging, and low voltage digital logic.

DataHawk Flocks: Self-Contained sUAS Modules for High-Resolution Atmospheric Measurements

DTIC Science & Technology

2015-08-25

Gabriel LoDolce (sr. technician) 0.38 Emily Ranquist (jr. technician) 0.20 Gabriel Chapel (jr. technician) 0.04 Russel Temple (jr. technician) 0.04...processor board, including 3 SPI, 3 I2C, 1 CAN, 6 UART, 8 analog, and 1 digital camera interface. 2.2 Flexibility in changing peripherals: The

How to Choose a Media Retrieval System.

ERIC Educational Resources Information Center

Huber, Joe

1995-01-01

Provides guidelines for schools choosing a media retrieval system. Topics include broadband, baseband, coaxial cable, or fiber optic decisions; the control network; selecting scheduling software; presentation software; device control; control from the classroom; and a comparison of systems offered by five companies. (LRW)

Low-voltage analog front-end processor design for ISFET-based sensor and H+ sensing applications

NASA Astrophysics Data System (ADS)

Chung, Wen-Yaw; Yang, Chung-Huang; Peng, Kang-Chu; Yeh, M. H.

2003-04-01

This paper presents a modular-based low-voltage analog-front-end processor design in a 0.5mm double-poly double-metal CMOS technology for Ion Sensitive Field Effect Transistor (ISFET)-based sensor and H+ sensing applications. To meet the potentiometric response of the ISFET that is proportional to various H+ concentrations, the constant-voltage and constant current (CVCS) testing configuration has been used. Low-voltage design skills such as bulk-driven input pair, folded-cascode amplifier, bootstrap switch control circuits have been designed and integrated for 1.5V supply and nearly rail-to-rail analog to digital signal processing. Core modules consist of an 8-bit two-step analog-digital converter and bulk-driven pre-amplifiers have been developed in this research. The experimental results show that the proposed circuitry has an acceptable linearity to 0.1 pH-H+ sensing conversions with the buffer solution in the range of pH2 to pH12. The processor has a potential usage in battery-operated and portable healthcare devices and environmental monitoring applications.

G-cueing microcontroller (a microprocessor application in simulators)

NASA Technical Reports Server (NTRS)

Horattas, C. G.

1980-01-01

A g cueing microcontroller is described which consists of a tandem pair of microprocessors, dedicated to the task of simulating pilot sensed cues caused by gravity effects. This task includes execution of a g cueing model which drives actuators that alter the configuration of the pilot's seat. The g cueing microcontroller receives acceleration commands from the aerodynamics model in the main computer and creates the stimuli that produce physical acceleration effects of the aircraft seat on the pilots anatomy. One of the two microprocessors is a fixed instruction processor that performs all control and interface functions. The other, a specially designed bipolar bit slice microprocessor, is a microprogrammable processor dedicated to all arithmetic operations. The two processors communicate with each other by a shared memory. The g cueing microcontroller contains its own dedicated I/O conversion modules for interface with the seat actuators and controls, and a DMA controller for interfacing with the simulation computer. Any application which can be microcoded within the available memory, the available real time and the available I/O channels, could be implemented in the same controller.

Microlens array processor with programmable weight mask and direct optical input

NASA Astrophysics Data System (ADS)

Schmid, Volker R.; Lueder, Ernst H.; Bader, Gerhard; Maier, Gert; Siegordner, Jochen

1999-03-01

We present an optical feature extraction system with a microlens array processor. The system is suitable for online implementation of a variety of transforms such as the Walsh transform and DCT. Operating with incoherent light, our processor accepts direct optical input. Employing a sandwich- like architecture, we obtain a very compact design of the optical system. The key elements of the microlens array processor are a square array of 15 X 15 spherical microlenses on acrylic substrate and a spatial light modulator as transmissive mask. The light distribution behind the mask is imaged onto the pixels of a customized a-Si image sensor with adjustable gain. We obtain one output sample for each microlens image and its corresponding weight mask area as summation of the transmitted intensity within one sensor pixel. The resulting architecture is very compact and robust like a conventional camera lens while incorporating a high degree of parallelism. We successfully demonstrate a Walsh transform into the spatial frequency domain as well as the implementation of a discrete cosine transform with digitized gray values. We provide results showing the transformation performance for both synthetic image patterns and images of natural texture samples. The extracted frequency features are suitable for neural classification of the input image. Other transforms and correlations can be implemented in real-time allowing adaptive optical signal processing.

Noise reduction technologies implemented in head-worn preprocessors for improving cochlear implant performance in reverberant noise fields.

PubMed

Chung, King; Nelson, Lance; Teske, Melissa

2012-09-01

The purpose of this study was to investigate whether a multichannel adaptive directional microphone and a modulation-based noise reduction algorithm could enhance cochlear implant performance in reverberant noise fields. A hearing aid was modified to output electrical signals (ePreprocessor) and a cochlear implant speech processor was modified to receive electrical signals (eProcessor). The ePreprocessor was programmed to flat frequency response and linear amplification. Cochlear implant listeners wore the ePreprocessor-eProcessor system in three reverberant noise fields: 1) one noise source with variable locations; 2) three noise sources with variable locations; and 3) eight evenly spaced noise sources from 0° to 360°. Listeners' speech recognition scores were tested when the ePreprocessor was programmed to omnidirectional microphone (OMNI), omnidirectional microphone plus noise reduction algorithm (OMNI + NR), and adaptive directional microphone plus noise reduction algorithm (ADM + NR). They were also tested with their own cochlear implant speech processor (CI_OMNI) in the three noise fields. Additionally, listeners rated overall sound quality preferences on recordings made in the noise fields. Results indicated that ADM+NR produced the highest speech recognition scores and the most preferable rating in all noise fields. Factors requiring attention in the hearing aid-cochlear implant integration process are discussed. Copyright © 2012 Elsevier B.V. All rights reserved.

Strong Motion Seismograph Based On MEMS Accelerometer

NASA Astrophysics Data System (ADS)

Teng, Y.; Hu, X.

2013-12-01

The MEMS strong motion seismograph we developed used the modularization method to design its software and hardware.It can fit various needs in different application situation.The hardware of the instrument is composed of a MEMS accelerometer,a control processor system,a data-storage system,a wired real-time data transmission system by IP network,a wireless data transmission module by 3G broadband,a GPS calibration module and power supply system with a large-volumn lithium battery in it. Among it,the seismograph's sensor adopted a three-axis with 14-bit high resolution and digital output MEMS accelerometer.Its noise level just reach about 99μg/√Hz and ×2g to ×8g dynamically selectable full-scale.Its output data rates from 1.56Hz to 800Hz. Its maximum current consumption is merely 165μA,and the device is so small that it is available in a 3mm×3mm×1mm QFN package. Furthermore,there is access to both low pass filtered data as well as high pass filtered data,which minimizes the data analysis required for earthquake signal detection. So,the data post-processing can be simplified. Controlling process system adopts a 32-bit low power consumption embedded ARM9 processor-S3C2440 and is based on the Linux operation system.The processor's operating clock at 400MHz.The controlling system's main memory is a 64MB SDRAM with a 256MB flash-memory.Besides,an external high-capacity SD card data memory can be easily added.So the system can meet the requirements for data acquisition,data processing,data transmission,data storage,and so on. Both wired and wireless network can satisfy remote real-time monitoring, data transmission,system maintenance,status monitoring or updating software.Linux was embedded and multi-layer designed conception was used.The code, including sensor hardware driver,the data acquisition,earthquake setting out and so on,was written on medium layer.The hardware driver consist of IIC-Bus interface driver, IO driver and asynchronous notification driver. The application program layer mainly concludes: earthquake parameter module, local database managing module, data transmission module, remote monitoring, FTP service and so on. The application layer adopted multi-thread process. The whole strong motion seismograph was encapsulated in a small aluminum box, which size is 80mm×120mm×55mm. The inner battery can work continuesly more than 24 hours. The MEMS accelerograph uses modular design for its software part and hardware part. It has remote software update function and can meet the following needs: a) Auto picking up the earthquake event; saving the data on wave-event files and hours files; It may be used for monitoring strong earthquake, explosion, bridge and house health. b) Auto calculate the earthquake parameters, and transferring those parameters by 3G wireless broadband network. This kind of seismograph has characteristics of low cost, easy installation. They can be concentrated in the urban region or areas need to specially care. We can set up a ground motion parameters quick report sensor network while large earthquake break out. Then high-resolution-fine shake-map can be easily produced for the need of emergency rescue. c) By loading P-wave detection program modules, it can be used for earthquake early warning for large earthquakes; d) Can easily construct a high-density layout seismic monitoring network owning remote control and modern intelligent earthquake sensor.

Task allocation model for minimization of completion time in distributed computer systems

NASA Astrophysics Data System (ADS)

Wang, Jai-Ping; Steidley, Carl W.

1993-08-01

A task in a distributed computing system consists of a set of related modules. Each of the modules will execute on one of the processors of the system and communicate with some other modules. In addition, precedence relationships may exist among the modules. Task allocation is an essential activity in distributed-software design. This activity is of importance to all phases of the development of a distributed system. This paper establishes task completion-time models and task allocation models for minimizing task completion time. Current work in this area is either at the experimental level or without the consideration of precedence relationships among modules. The development of mathematical models for the computation of task completion time and task allocation will benefit many real-time computer applications such as radar systems, navigation systems, industrial process control systems, image processing systems, and artificial intelligence oriented systems.

47 CFR 76.60 - Compensation for carriage.

Code of Federal Regulations, 2012 CFR

2012-10-01

... 47 Telecommunication 4 2012-10-01 2012-10-01 false Compensation for carriage. 76.60 Section 76.60 Telecommunication FEDERAL COMMUNICATIONS COMMISSION (CONTINUED) BROADCAST RADIO SERVICES MULTICHANNEL VIDEO AND... bear the costs associated with delivering a good quality signal or a baseband video signal to the...

47 CFR 76.60 - Compensation for carriage.

Code of Federal Regulations, 2014 CFR

2014-10-01

... 47 Telecommunication 4 2014-10-01 2014-10-01 false Compensation for carriage. 76.60 Section 76.60 Telecommunication FEDERAL COMMUNICATIONS COMMISSION (CONTINUED) BROADCAST RADIO SERVICES MULTICHANNEL VIDEO AND... bear the costs associated with delivering a good quality signal or a baseband video signal to the...

47 CFR 76.60 - Compensation for carriage.

Code of Federal Regulations, 2013 CFR

2013-10-01

... 47 Telecommunication 4 2013-10-01 2013-10-01 false Compensation for carriage. 76.60 Section 76.60 Telecommunication FEDERAL COMMUNICATIONS COMMISSION (CONTINUED) BROADCAST RADIO SERVICES MULTICHANNEL VIDEO AND... bear the costs associated with delivering a good quality signal or a baseband video signal to the...

47 CFR 76.60 - Compensation for carriage.

Code of Federal Regulations, 2011 CFR

2011-10-01

... 47 Telecommunication 4 2011-10-01 2011-10-01 false Compensation for carriage. 76.60 Section 76.60 Telecommunication FEDERAL COMMUNICATIONS COMMISSION (CONTINUED) BROADCAST RADIO SERVICES MULTICHANNEL VIDEO AND... bear the costs associated with delivering a good quality signal or a baseband video signal to the...

Generalized Chirp Scaling Combined with Baseband Azimuth Scaling Algorithm for Large Bandwidth Sliding Spotlight SAR Imaging

PubMed Central

Yi, Tianzhu; He, Zhihua; He, Feng; Dong, Zhen; Wu, Manqing

2017-01-01

This paper presents an efficient and precise imaging algorithm for the large bandwidth sliding spotlight synthetic aperture radar (SAR). The existing sub-aperture processing method based on the baseband azimuth scaling (BAS) algorithm cannot cope with the high order phase coupling along the range and azimuth dimensions. This coupling problem causes defocusing along the range and azimuth dimensions. This paper proposes a generalized chirp scaling (GCS)-BAS processing algorithm, which is based on the GCS algorithm. It successfully mitigates the deep focus along the range dimension of a sub-aperture of the large bandwidth sliding spotlight SAR, as well as high order phase coupling along the range and azimuth dimensions. Additionally, the azimuth focusing can be achieved by this azimuth scaling method. Simulation results demonstrate the ability of the GCS-BAS algorithm to process the large bandwidth sliding spotlight SAR data. It is proven that great improvements of the focus depth and imaging accuracy are obtained via the GCS-BAS algorithm. PMID:28555057

A Cost Effective System Design Approach for Critical Space Systems

NASA Technical Reports Server (NTRS)

Abbott, Larry Wayne; Cox, Gary; Nguyen, Hai

2000-01-01

NASA-JSC required an avionics platform capable of serving a wide range of applications in a cost-effective manner. In part, making the avionics platform cost effective means adhering to open standards and supporting the integration of COTS products with custom products. Inherently, operation in space requires low power, mass, and volume while retaining high performance, reconfigurability, scalability, and upgradability. The Universal Mini-Controller project is based on a modified PC/104-Plus architecture while maintaining full compatibility with standard COTS PC/104 products. The architecture consists of a library of building block modules, which can be mixed and matched to meet a specific application. A set of NASA developed core building blocks, processor card, analog input/output card, and a Mil-Std-1553 card, have been constructed to meet critical functions and unique interfaces. The design for the processor card is based on the PowerPC architecture. This architecture provides an excellent balance between power consumption and performance, and has an upgrade path to the forthcoming radiation hardened PowerPC processor. The processor card, which makes extensive use of surface mount technology, has a 166 MHz PowerPC 603e processor, 32 Mbytes of error detected and corrected RAM, 8 Mbytes of Flash, and I Mbytes of EPROM, on a single PC/104-Plus card. Similar densities have been achieved with the quad channel Mil-Std-1553 card and the analog input/output cards. The power management built into the processor and its peripheral chip allows the power and performance of the system to be adjusted to meet the requirements of the application, allowing another dimension to the flexibility of the Universal Mini-Controller. Unique mechanical packaging allows the Universal Mini-Controller to accommodate standard COTS and custom oversized PC/104-Plus cards. This mechanical packaging also provides thermal management via conductive cooling of COTS boards, which are typically designed for convection cooling methods.

Status of the International Space Station Regenerative ECLSS Water Recovery and Oxygen Generation Systems

NASA Technical Reports Server (NTRS)

Bagdigian, Robert M.; Cloud, Dale

2005-01-01

NASA is developing three racks containing regenerative water recovery and oxygen generation systems (WRS and OGS) for deployment on the International Space Station (ISS). The major assemblies included in these racks are the Water Processor Assembly (WPA), Urine Processor Assembly (UPA), Oxygen Generation Assembly (OGA), and the Power Supply Module (PSM) supporting the OGA. The WPA and OGA are provided by Hamilton Sundstrand Space Systems International (HSSSI), Inc., while the UPA and PSM are developed in- house by the Marshall Space Flight Center (MSFC). The assemblies have completed the manufacturing phase and are in various stages of testing and integration into the flight racks. This paper summarizes the status as of April 2005 and describes some of the technical challenges encountered and lessons learned over the past year.

A complexity-scalable software-based MPEG-2 video encoder.

PubMed

Chen, Guo-bin; Lu, Xin-ning; Wang, Xing-guo; Liu, Ji-lin

2004-05-01

With the development of general-purpose processors (GPP) and video signal processing algorithms, it is possible to implement a software-based real-time video encoder on GPP, and its low cost and easy upgrade attract developers' interests to transfer video encoding from specialized hardware to more flexible software. In this paper, the encoding structure is set up first to support complexity scalability; then a lot of high performance algorithms are used on the key time-consuming modules in coding process; finally, at programming level, processor characteristics are considered to improve data access efficiency and processing parallelism. Other programming methods such as lookup table are adopted to reduce the computational complexity. Simulation results showed that these ideas could not only improve the global performance of video coding, but also provide great flexibility in complexity regulation.

Wireless remote monitoring of critical facilities

DOE Office of Scientific and Technical Information (OSTI.GOV)

Tsai, Hanchung; Anderson, John T.; Liu, Yung Y.

A method, apparatus, and system are provided for monitoring environment parameters of critical facilities. A Remote Area Modular Monitoring (RAMM) apparatus is provided for monitoring environment parameters of critical facilities. The RAMM apparatus includes a battery power supply and a central processor. The RAMM apparatus includes a plurality of sensors monitoring the associated environment parameters and at least one communication module for transmitting one or more monitored environment parameters. The RAMM apparatus is powered by the battery power supply, controlled by the central processor operating a wireless sensor network (WSN) platform when the facility condition is disrupted. The RAMM apparatusmore » includes a housing prepositioned at a strategic location, for example, where a dangerous build-up of contamination and radiation may preclude subsequent manned entrance and surveillance.« less

An implementation of a reference symbol approach to generic modulation in fading channels

NASA Technical Reports Server (NTRS)

Young, R. J.; Lodge, J. H.; Pacola, L. C.

1990-01-01

As mobile satellite communications systems evolve over the next decade, they will have to adapt to a changing tradeoff between bandwidth and power. This paper presents a flexible approach to digital modulation and coding that will accommodate both wideband and narrowband schemes. This architecture could be the basis for a family of modems, each satisfying a specific power and bandwidth constraint, yet all having a large number of common signal processing blocks. The implementation of this generic approach, with general purpose digital processors for transmission of 4.8 kilobits per sec. digitally encoded speech, is described.

System and method for modeling and analyzing complex scenarios

DOEpatents

Shevitz, Daniel Wolf

2013-04-09

An embodiment of the present invention includes a method for analyzing and solving possibility tree. A possibility tree having a plurality of programmable nodes is constructed and solved with a solver module executed by a processor element. The solver module executes the programming of said nodes, and tracks the state of at least a variable through a branch. When a variable of said branch is out of tolerance with a parameter, the solver disables remaining nodes of the branch and marks the branch as an invalid solution. The valid solutions are then aggregated and displayed as valid tree solutions.

Ada Compiler Validation Summary Report. Certificate Number: 920918S1. 11273 U.S. Navy, Ada/M, Version 4.5 /OPTIMIZE) VAX 8550/8600/8650 (Cluster) = VHSIC Processor Module (VPM) AN/AYK-14 (Bare Board)

DTIC Science & Technology

1992-10-27

Module (VPM) AN/AYK-14 (Bare Board) (target), 920918S1.11273 6. AUTHOR(S) National Institute of Standards and Technology Gaithersburg, MD USA 7 ...Validation Procedures (Pro90] against the Ada Standard (Ada83] using the current Ada Compiler Validation Capability (ACVC). This Validation Summary Report ( VSR ...l..V-20 => ’ $MAXLENINTBASEDLITERAL "-Ŗ:" & (l..V-5 1> 𔃺’) & ൓:" $MAXLENREALBASEDLITERAL ൘:" & (i..V- 7 => 𔃺’) & "F.E:" $MAXSTRINGLITERAL

Research in the design of high-performance reconfigurable systems

NASA Technical Reports Server (NTRS)

Slotnick, D. L.; Mcewan, S. D.; Spry, A. J.

1984-01-01

An initial design for the Bit Processor (BP) referred to in prior reports as the Processing Element or PE has been completed. Eight BP's, together with their supporting random-access memory, a 64 k x 9 ROM to perform addition, routing logic, and some additional logic, constitute the components of a single stage. An initial stage design is given. Stages may be combined to perform high-speed fixed or floating point arithmetic. Stages can be configured into a range of arithmetic modules that includes bit-serial one or two-dimensional arrays; one or two dimensional arrays fixed or floating point processors; and specialized uniprocessors, such as long-word arithmetic units. One to eight BP's represent a likely initial chip level. The Stage would then correspond to a first-level pluggable module. As both this project and VLSI CAD/CAM progress, however, it is expected that the chip level would migrate upward to the stage and, perhaps, ultimately the box level. The BP RAM, consisting of two banks, holds only operands and indices. Programs are at the box (high-level function) and system level. At the system level initial effort has been concentrated on specifying the tools needed to evaluate design alternatives.

Embedded neural recording with TinyOS-based wireless-enabled processor modules.

PubMed

Farshchi, Shahin; Pesterev, Aleksey; Nuyujukian, Paul; Guenterberg, Eric; Mody, Istvan; Judy, Jack W

2010-04-01

To create a wireless neural recording system that can benefit from the continuous advancements being made in embedded microcontroller and communications technologies, an embedded-system-based architecture for wireless neural recording has been designed, fabricated, and tested. The system consists of commercial-off-the-shelf wireless-enabled processor modules (motes) for communicating the neural signals, and a back-end database server and client application for archiving and browsing the neural signals. A neural-signal-acquisition application has been developed to enable the mote to either acquire neural signals at a rate of 4000 12-bit samples per second, or detect and transmit spike heights and widths sampled at a rate of 16670 12-bit samples per second on a single channel. The motes acquire neural signals via a custom low-noise neural-signal amplifier with adjustable gain and high-pass corner frequency that has been designed, and fabricated in a 1.5-microm CMOS process. In addition to browsing acquired neural data, the client application enables the user to remotely toggle modes of operation (real-time or spike-only), as well as amplifier gain and high-pass corner frequency.

Fast Fourier Transform Co-Processor (FFTC)- Towards Embedded GFLOPs

NASA Astrophysics Data System (ADS)

Kuehl, Christopher; Liebstueckel, Uwe; Tejerina, Isaac; Uemminghaus, Michael; Wite, Felix; Kolb, Michael; Suess, Martin; Weigand, Roland

2012-08-01

Many signal processing applications and algorithms perform their operations on the data in the transform domain to gain efficiency. The Fourier Transform Co- Processor has been developed with the aim to offload General Purpose Processors from performing these transformations and therefore to boast the overall performance of a processing module. The IP of the commercial PowerFFT processor has been selected and adapted to meet the constraints of the space environment.In frame of the ESA activity “Fast Fourier Transform DSP Co-processor (FFTC)” (ESTEC/Contract No. 15314/07/NL/LvH/ma) the objectives were the following:Production of prototypes of a space qualified version of the commercial PowerFFT chip called FFTC based on the PowerFFT IP.The development of a stand-alone FFTC Accelerator Board (FTAB) based on the FFTC including the Controller FPGA and SpaceWire Interfaces to verify the FFTC function and performance.The FFTC chip performs its calculations with floating point precision. Stand alone it is capable computing FFTs of up to 1K complex samples in length in only 10μsec. This corresponds to an equivalent processing performance of 4.7 GFlops. In this mode the maximum sustained data throughput reaches 6.4Gbit/s. When connected to up to 4 EDAC protected SDRAM memory banks the FFTC can perform long FFTs with up to 1M complex samples in length or multidimensional FFT- based processing tasks.A Controller FPGA on the FTAB takes care of the SDRAM addressing. The instructions commanded via the Controller FPGA are used to set up the data flow and generate the memory addresses.The presentation will give and overview on the project, including the results of the validation of the FFTC ASIC prototypes.

Fast Fourier Transform Co-processor (FFTC), towards embedded GFLOPs

NASA Astrophysics Data System (ADS)

Kuehl, Christopher; Liebstueckel, Uwe; Tejerina, Isaac; Uemminghaus, Michael; Witte, Felix; Kolb, Michael; Suess, Martin; Weigand, Roland; Kopp, Nicholas

2012-10-01

Many signal processing applications and algorithms perform their operations on the data in the transform domain to gain efficiency. The Fourier Transform Co-Processor has been developed with the aim to offload General Purpose Processors from performing these transformations and therefore to boast the overall performance of a processing module. The IP of the commercial PowerFFT processor has been selected and adapted to meet the constraints of the space environment. In frame of the ESA activity "Fast Fourier Transform DSP Co-processor (FFTC)" (ESTEC/Contract No. 15314/07/NL/LvH/ma) the objectives were the following: • Production of prototypes of a space qualified version of the commercial PowerFFT chip called FFTC based on the PowerFFT IP. • The development of a stand-alone FFTC Accelerator Board (FTAB) based on the FFTC including the Controller FPGA and SpaceWire Interfaces to verify the FFTC function and performance. The FFTC chip performs its calculations with floating point precision. Stand alone it is capable computing FFTs of up to 1K complex samples in length in only 10μsec. This corresponds to an equivalent processing performance of 4.7 GFlops. In this mode the maximum sustained data throughput reaches 6.4Gbit/s. When connected to up to 4 EDAC protected SDRAM memory banks the FFTC can perform long FFTs with up to 1M complex samples in length or multidimensional FFT-based processing tasks. A Controller FPGA on the FTAB takes care of the SDRAM addressing. The instructions commanded via the Controller FPGA are used to set up the data flow and generate the memory addresses. The paper will give an overview on the project, including the results of the validation of the FFTC ASIC prototypes.

47 CFR 73.295 - FM subsidiary communications services.

Code of Federal Regulations, 2011 CFR

2011-10-01

... 47 Telecommunication 4 2011-10-01 2011-10-01 false FM subsidiary communications services. 73.295... RADIO BROADCAST SERVICES FM Broadcast Stations § 73.295 FM subsidiary communications services. (a) Subsidiary communication services are those transmitted on a subcarrier within the FM baseband signal, but do...

47 CFR 2.1400 - Application for advance approval under part 73.

Code of Federal Regulations, 2010 CFR

2010-10-01

.... 2.1400 Section 2.1400 Telecommunication FEDERAL COMMUNICATIONS COMMISSION GENERAL FREQUENCY... standards specified in part 73 of the Rules. The application must include information to show that the... of the encoded aural and visual baseband and transmitted signals and of the encoding equipment used...

The optimal input optical pulse shape for the self-phase modulation based chirp generator

NASA Astrophysics Data System (ADS)

Zachinyaev, Yuriy; Rumyantsev, Konstantin

2018-04-01

The work is aimed to obtain the optimal shape of the input optical pulse for the proper functioning of the self-phase modulation based chirp generator allowing to achieve high values of chirp frequency deviation. During the research, the structure of the device based on self-phase modulation effect using has been analyzed. The influence of the input optical pulse shape of the transmitting optical module on the chirp frequency deviation has been studied. The relationship between the frequency deviation of the generated chirp and frequency linearity for the three options for implementation of the pulse shape has been also estimated. The results of research are related to the development of the theory of radio processors based on fiber-optic structures and can be used in radars, secure communications, geolocation and tomography.

VINE-A NUMERICAL CODE FOR SIMULATING ASTROPHYSICAL SYSTEMS USING PARTICLES. I. DESCRIPTION OF THE PHYSICS AND THE NUMERICAL METHODS

DOE Office of Scientific and Technical Information (OSTI.GOV)

Wetzstein, M.; Nelson, Andrew F.; Naab, T.

2009-10-01

We present a numerical code for simulating the evolution of astrophysical systems using particles to represent the underlying fluid flow. The code is written in Fortran 95 and is designed to be versatile, flexible, and extensible, with modular options that can be selected either at the time the code is compiled or at run time through a text input file. We include a number of general purpose modules describing a variety of physical processes commonly required in the astrophysical community and we expect that the effort required to integrate additional or alternate modules into the code will be small. Inmore » its simplest form the code can evolve the dynamical trajectories of a set of particles in two or three dimensions using a module which implements either a Leapfrog or Runge-Kutta-Fehlberg integrator, selected by the user at compile time. The user may choose to allow the integrator to evolve the system using individual time steps for each particle or with a single, global time step for all. Particles may interact gravitationally as N-body particles, and all or any subset may also interact hydrodynamically, using the smoothed particle hydrodynamic (SPH) method by selecting the SPH module. A third particle species can be included with a module to model massive point particles which may accrete nearby SPH or N-body particles. Such particles may be used to model, e.g., stars in a molecular cloud. Free boundary conditions are implemented by default, and a module may be selected to include periodic boundary conditions. We use a binary 'Press' tree to organize particles for rapid access in gravity and SPH calculations. Modules implementing an interface with special purpose 'GRAPE' hardware may also be selected to accelerate the gravity calculations. If available, forces obtained from the GRAPE coprocessors may be transparently substituted for those obtained from the tree, or both tree and GRAPE may be used as a combination GRAPE/tree code. The code may be run without modification on single processors or in parallel using OpenMP compiler directives on large-scale, shared memory parallel machines. We present simulations of several test problems, including a merger simulation of two elliptical galaxies with 800,000 particles. In comparison to the Gadget-2 code of Springel, the gravitational force calculation, which is the most costly part of any simulation including self-gravity, is {approx}4.6-4.9 times faster with VINE when tested on different snapshots of the elliptical galaxy merger simulation when run on an Itanium 2 processor in an SGI Altix. A full simulation of the same setup with eight processors is a factor of 2.91 faster with VINE. The code is available to the public under the terms of the Gnu General Public License.« less

Vine—A Numerical Code for Simulating Astrophysical Systems Using Particles. I. Description of the Physics and the Numerical Methods

NASA Astrophysics Data System (ADS)

Wetzstein, M.; Nelson, Andrew F.; Naab, T.; Burkert, A.

2009-10-01

We present a numerical code for simulating the evolution of astrophysical systems using particles to represent the underlying fluid flow. The code is written in Fortran 95 and is designed to be versatile, flexible, and extensible, with modular options that can be selected either at the time the code is compiled or at run time through a text input file. We include a number of general purpose modules describing a variety of physical processes commonly required in the astrophysical community and we expect that the effort required to integrate additional or alternate modules into the code will be small. In its simplest form the code can evolve the dynamical trajectories of a set of particles in two or three dimensions using a module which implements either a Leapfrog or Runge-Kutta-Fehlberg integrator, selected by the user at compile time. The user may choose to allow the integrator to evolve the system using individual time steps for each particle or with a single, global time step for all. Particles may interact gravitationally as N-body particles, and all or any subset may also interact hydrodynamically, using the smoothed particle hydrodynamic (SPH) method by selecting the SPH module. A third particle species can be included with a module to model massive point particles which may accrete nearby SPH or N-body particles. Such particles may be used to model, e.g., stars in a molecular cloud. Free boundary conditions are implemented by default, and a module may be selected to include periodic boundary conditions. We use a binary "Press" tree to organize particles for rapid access in gravity and SPH calculations. Modules implementing an interface with special purpose "GRAPE" hardware may also be selected to accelerate the gravity calculations. If available, forces obtained from the GRAPE coprocessors may be transparently substituted for those obtained from the tree, or both tree and GRAPE may be used as a combination GRAPE/tree code. The code may be run without modification on single processors or in parallel using OpenMP compiler directives on large-scale, shared memory parallel machines. We present simulations of several test problems, including a merger simulation of two elliptical galaxies with 800,000 particles. In comparison to the Gadget-2 code of Springel, the gravitational force calculation, which is the most costly part of any simulation including self-gravity, is ~4.6-4.9 times faster with VINE when tested on different snapshots of the elliptical galaxy merger simulation when run on an Itanium 2 processor in an SGI Altix. A full simulation of the same setup with eight processors is a factor of 2.91 faster with VINE. The code is available to the public under the terms of the Gnu General Public License.

Implementation of a level 1 trigger system using high speed serial (VXS) techniques for the 12GeV high luminosity experimental programs at Thomas Jefferson National Accelerator Facility

DOE Office of Scientific and Technical Information (OSTI.GOV)

C. Cuevas, B. Raydo, H. Dong, A. Gupta, F.J. Barbosa, J. Wilson, W.M. Taylor, E. Jastrzembski, D. Abbott

We will demonstrate a hardware and firmware solution for a complete fully pipelined multi-crate trigger system that takes advantage of the elegant high speed VXS serial extensions for VME. This trigger system includes three sections starting with the front end crate trigger processor (CTP), a global Sub-System Processor (SSP) and a Trigger Supervisor that manages the timing, synchronization and front end event readout. Within a front end crate, trigger information is gathered from each 16 Channel, 12 bit Flash ADC module at 4 nS intervals via the VXS backplane, to a Crate Trigger Processor (CTP). Each Crate Trigger Processor receivesmore » these 500 MB/S VXS links from the 16 FADC-250 modules, aligns skewed data inherent of Aurora protocol, and performs real time crate level trigger algorithms. The algorithm results are encoded using a Reed-Solomon technique and transmission of this Level 1 trigger data is sent to the SSP using a multi-fiber link. The multi-fiber link achieves an aggregate trigger data transfer rate to the global trigger at 8 Gb/s. The SSP receives and decodes Reed-Solomon error correcting transmission from each crate, aligns the data, and performs the global level trigger algorithms. The entire trigger system is synchronous and operates at 250 MHz with the Trigger Supervisor managing not only the front end event readout, but also the distribution of the critical timing clocks, synchronization signals, and the global trigger signals to each front end readout crate. These signals are distributed to the front end crates on a separate fiber link and each crate is synchronized using a unique encoding scheme to guarantee that each front end crate is synchronous with a fixed latency, independent of the distance between each crate. The overall trigger signal latency is <3 uS, and the proposed 12GeV experiments at Jefferson Lab require up to 200KHz Level 1 trigger rate.« less

Voltage scheduling for low power/energy

NASA Astrophysics Data System (ADS)

Manzak, Ali

2001-07-01

Power considerations have become an increasingly dominant factor in the design of both portable and desk-top systems. An effective way to reduce power consumption is to lower the supply voltage since voltage is quadratically related to power. This dissertation considers the problem of lowering the supply voltage at (i) the system level and at (ii) the behavioral level. At the system level, the voltage of the variable voltage processor is dynamically changed with the work load. Processors with limited sized buffers as well as those with very large buffers are considered. Given the task arrival times, deadline times, execution times, periods and switching activities, task scheduling algorithms that minimize energy or peak power are developed for the processors equipped with very large buffers. A relation between the operating voltages of the tasks for minimum energy/power is determined using the Lagrange multiplier method, and an iterative algorithm that utilizes this relation is developed. Experimental results show that the voltage assignment obtained by the proposed algorithm is very close (0.1% error) to that of the optimal energy assignment and the optimal peak power (1% error) assignment. Next, on-line and off-fine minimum energy task scheduling algorithms are developed for processors with limited sized buffers. These algorithms have polynomial time complexity and present optimal (off-line) and close-to-optimal (on-line) solutions. A procedure to calculate the minimum buffer size given information about the size of the task (maximum, minimum), execution time (best case, worst case) and deadlines is also presented. At the behavioral level, resources operating at multiple voltages are used to minimize power while maintaining the throughput. Such a scheme has the advantage of allowing modules on the critical paths to be assigned to the highest voltage levels (thus meeting the required timing constraints) while allowing modules on non-critical paths to be assigned to lower voltage levels (thus reducing the power consumption). A polynomial time resource and latency constrained scheduling algorithm is developed to distribute the available slack among the nodes such that power consumption is minimum. The algorithm is iterative and utilizes the slack based on the Lagrange multiplier method.

Power amplifier linearization technique with IQ imbalance and crosstalk compensation for broadband MIMO-OFDM transmitters

NASA Astrophysics Data System (ADS)

Gregorio, Fernando; Cousseau, Juan; Werner, Stefan; Riihonen, Taneli; Wichman, Risto

2011-12-01

The design of predistortion techniques for broadband multiple input multiple output-OFDM (MIMO-OFDM) systems raises several implementation challenges. First, the large bandwidth of the OFDM signal requires the introduction of memory effects in the PD model. In addition, it is usual to consider an imbalanced in-phase and quadrature (IQ) modulator to translate the predistorted baseband signal to RF. Furthermore, the coupling effects, which occur when the MIMO paths are implemented in the same reduced size chipset, cannot be avoided in MIMO transceivers structures. This study proposes a MIMO-PD system that linearizes the power amplifier response and compensates nonlinear crosstalk and IQ imbalance effects for each branch of the multiantenna system. Efficient recursive algorithms are presented to estimate the complete MIMO-PD coefficients. The algorithms avoid the high computational complexity in previous solutions based on least squares estimation. The performance of the proposed MIMO-PD structure is validated by simulations using a two-transmitter antenna MIMO system. Error vector magnitude and adjacent channel power ratio are evaluated showing significant improvement compared with conventional MIMO-PD systems.

Digital test signal generation: An accurate SNR calibration approach for the DSN

NASA Technical Reports Server (NTRS)

Gutierrez-Luaces, Benito O.

1993-01-01

In support of the on-going automation of the Deep Space Network (DSN) a new method of generating analog test signals with accurate signal-to-noise ratio (SNR) is described. High accuracy is obtained by simultaneous generation of digital noise and signal spectra at the desired bandwidth (base-band or bandpass). The digital synthesis provides a test signal embedded in noise with the statistical properties of a stationary random process. Accuracy is dependent on test integration time and limited only by the system quantization noise (0.02 dB). The monitor and control as well as signal-processing programs reside in a personal computer (PC). Commands are transmitted to properly configure the specially designed high-speed digital hardware. The prototype can generate either two data channels modulated or not on a subcarrier, or one QPSK channel, or a residual carrier with one biphase data channel. The analog spectrum generated is on the DC to 10 MHz frequency range. These spectra may be up-converted to any desired frequency without loss on the characteristics of the SNR provided. Test results are presented.

Evaluation of Clipping Based Iterative PAPR Reduction Techniques for FBMC Systems

PubMed Central

Kollár, Zsolt

2014-01-01

This paper investigates filter bankmulticarrier (FBMC), a multicarrier modulation technique exhibiting an extremely low adjacent channel leakage ratio (ACLR) compared to conventional orthogonal frequency division multiplexing (OFDM) technique. The low ACLR of the transmitted FBMC signal makes it especially favorable in cognitive radio applications, where strict requirements are posed on out-of-band radiation. Large dynamic range resulting in high peak-to-average power ratio (PAPR) is characteristic of all sorts of multicarrier signals. The advantageous spectral properties of the high-PAPR FBMC signal are significantly degraded if nonlinearities are present in the transceiver chain. Spectral regrowth may appear, causing harmful interference in the neighboring frequency bands. This paper presents novel clipping based PAPR reduction techniques, evaluated and compared by simulations and measurements, with an emphasis on spectral aspects. The paper gives an overall comparison of PAPR reduction techniques, focusing on the reduction of the dynamic range of FBMC signals without increasing out-of-band radiation. An overview is presented on transmitter oriented techniques employing baseband clipping, which can maintain the system performance with a desired bit error rate (BER). PMID:24558338

5 Gbps wireless transmission link with an optically pumped uni-traveling carrier photodiode mixer at the receiver.

PubMed

Mohammad, Ahmad W; Shams, Haymen; Balakier, Katarzyna; Graham, Chris; Natrella, Michele; Seeds, Alwyn J; Renaud, Cyril C

2018-02-05

We report the first demonstration of a uni-traveling carrier photodiode (UTC-PD) used as a 5 Gbps wireless receiver. In this experiment, a 35.1 GHz carrier was electrically modulated with 5 Gbps non-return with zero on-off keying (NRZ-OOK) data and transmitted wirelessly over a distance of 1.3 m. At the receiver, a UTC-PD was used as an optically pumped mixer (OPM) to down-convert the received radio frequency (RF) signal to an intermediate frequency (IF) of 11.7 GHz, before it was down-converted to the baseband using an electronic mixer. The recovered data show a clear eye diagram, and a bit error rate (BER) of less than 10 -8 was measured. The conversion loss of the UTC-PD optoelectronic mixer has been measured at 22 dB. The frequency of the local oscillator (LO) used for the UTC-PD is defined by the frequency spacing between the two optical tones, which can be broadly tuneable offering the frequency agility of this photodiode-based receiver.

Seamless integration of 57.2-Gb/s signal wireline transmission and 100-GHz wireless delivery.

PubMed

Li, Xinying; Yu, Jianjun; Dong, Ze; Cao, Zizheng; Chi, Nan; Zhang, Junwen; Shao, Yufeng; Tao, Li

2012-10-22

We experimentally demonstrated the seamless integration of 57.2-Gb/s signal wireline transmission and 100-GHz wireless delivery adopting polarization-division-multiplexing quadrature-phase-shift-keying (PDM-QPSK) modulation with 400-km single-mode fiber-28 (SMF-28) transmission and 1-m wireless delivery. The X- and Y-polarization components of optical PDM-QPSK baseband signal are simultaneously up-converted to 100 GHz by optical polarization-diversity heterodyne beating, and then independently transmitted and received by two pairs of transmitter and receiver antennas, which make up a 2x2 multiple-input multiple-output (MIMO) wireless link based on microwave polarization multiplexing. At the wireless receiver, a two-stage down conversion is firstly done in analog domain based on balanced mixer and sinusoidal radio frequency (RF) signal, and then in digital domain based on digital signal processing (DSP). Polarization de-multiplexing is realized by constant modulus algorithm (CMA) based on DSP in heterodyne coherent detection. Our experimental results show that more taps are required for CMA when the X- and Y-polarization antennas have different wireless distance.

Multipath interference test method for distributed amplifiers

NASA Astrophysics Data System (ADS)

Okada, Takahiro; Aida, Kazuo

2005-12-01

A method for testing distributed amplifiers is presented; the multipath interference (MPI) is detected as a beat spectrum between the multipath signal and the direct signal using a binary frequency shifted keying (FSK) test signal. The lightwave source is composed of a DFB-LD that is directly modulated by a pulse stream passing through an equalizer, and emits the FSK signal of the frequency deviation of about 430MHz at repetition rate of 80-100 kHz. The receiver consists of a photo-diode and an electrical spectrum analyzer (ESA). The base-band power spectrum peak appeared at the frequency of the FSK frequency deviation can be converted to amount of MPI using a calibration chart. The test method has improved the minimum detectable MPI as low as -70 dB, compared to that of -50 dB of the conventional test method. The detailed design and performance of the proposed method are discussed, including the MPI simulator for calibration procedure, computer simulations for evaluating the error caused by the FSK repetition rate and the fiber length under test and experiments on singlemode fibers and distributed Raman amplifier.

Miniature Intelligent Sensor Module

NASA Technical Reports Server (NTRS)

Beech, Russell S.

2007-01-01

An electronic unit denoted the Miniature Intelligent Sensor Module performs sensor-signal-conditioning functions and local processing of sensor data. The unit includes four channels of analog input/output circuitry, a processor, volatile and nonvolatile memory, and two Ethernet communication ports, all housed in a weathertight enclosure. The unit accepts AC or DC power. The analog inputs provide programmable gain, offset, and filtering as well as shunt calibration and auto-zeroing. Analog outputs include sine, square, and triangular waves having programmable frequencies and amplitudes, as well as programmable amplitude DC. One innovative aspect of the design of this unit is the integration of a relatively powerful processor and large amount of memory along with the sensor-signalconditioning circuitry so that sophisticated computer programs can be used to acquire and analyze sensor data and estimate and track the health of the overall sensor-data-acquisition system of which the unit is a part. The unit includes calibration, zeroing, and signalfeedback circuitry to facilitate health monitoring. The processor is also integrated with programmable logic circuitry in such a manner as to simplify and enhance acquisition of data and generation of analog outputs. A notable unique feature of the unit is a cold-junction compensation circuit in the back shell of a sensor connector. This circuit makes it possible to use Ktype thermocouples without compromising a housing seal. Replicas of this unit may prove useful in industrial and manufacturing settings - especially in such large outdoor facilities as refineries. Two features can be expected to simplify installation: the weathertight housings should make it possible to mount the units near sensors, and the Ethernet communication capability of the units should facilitate establishment of communication connections for the units.

47 CFR 73.644 - Subscription TV transmission systems.

Code of Federal Regulations, 2010 CFR

2010-10-01

... station must perform such tests and measurements to determine that the transmitted encoded signal conforms... the system being used. A copy of the measurement data is to be maintained in the station files and... being used of both the aural and visual baseband signals and the transmitted radiofrequency signals, and...

47 CFR 73.644 - Subscription TV transmission systems.

Code of Federal Regulations, 2011 CFR

2011-10-01

... adjacent channel stations must not increase over that resulting from the transmission of programming with... transmission of encoded subscription programming, the licensee or permittee of a TV broadcast or low power TV... being used of both the aural and visual baseband signals and the transmitted radiofrequency signals, and...

Integrated circuit for SAW and MEMS sensors

NASA Astrophysics Data System (ADS)

Fischer, Wolf-Joachim; Koenig, Peter; Ploetner, Matthias; Hermann, Rudiger; Stab, Helmut

2001-11-01

The sensor processor circuit has been developed for hand-held devices used in industrial and environmental applications, such as on-line process monitoring. Thereby devices with SAW sensors or MEMS resonators will benefit from this processor especially. Up to 8 sensors can be connected to the circuit as multisensors or sensor arrays. Two sensor processors SP1 and SP2 for different applications are presented in this paper. The SP-1 chip has a PCMCIA interface which can be used for the program and data transfer. SAW sensors which are working in the frequency range from 80 MHz to 160 MHz can be connected to the processor directly. It is possible to use the new SP-2 chip fabricated in a 0.5(mu) CMOS process for SAW devices with a maximum frequency of 600 MHz. An on-chip analog-digital-converter (ADC) and 6 PWM modules support the development of high-miniaturized intelligent sensor systems We have developed a multi-SAW sensor system with this ASIC that manages the requirements on control as well as signal generation and storage and provides an interface to the PC and electronic devices on the board. Its low power consumption and its PCMCIA plug fulfil the requirements of small size and mobility. For this application sensors have been developed to detect hazardous gases in ambient air. Sensors with differently modified copper-phthalocyanine films are capable of detecting NO2 and O3, whereas those with a hyperbranched polyester film respond to NH3.

A hybrid optic-fiber sensor network with the function of self-diagnosis and self-healing

NASA Astrophysics Data System (ADS)

Xu, Shibo; Liu, Tiegen; Ge, Chunfeng; Chen, Cheng; Zhang, Hongxia

2014-11-01

We develop a hybrid wavelength division multiplexing optical fiber network with distributed fiber-optic sensors and quasi-distributed FBG sensor arrays which detect vibrations, temperatures and strains at the same time. The network has the ability to locate the failure sites automatically designated as self-diagnosis and make protective switching to reestablish sensing service designated as self-healing by cooperative work of software and hardware. The processes above are accomplished by master-slave processors with the help of optical and wireless telemetry signals. All the sensing and optical telemetry signals transmit in the same fiber either working fiber or backup fiber. We take wavelength 1450nm as downstream signal and wavelength 1350nm as upstream signal to control the network in normal circumstances, both signals are sent by a light emitting node of the corresponding processor. There is also a continuous laser wavelength 1310nm sent by each node and received by next node on both working and backup fibers to monitor their healthy states, but it does not carry any message like telemetry signals do. When fibers of two sensor units are completely damaged, the master processor will lose the communication with the node between the damaged ones.However we install RF module in each node to solve the possible problem. Finally, the whole network state is transmitted to host computer by master processor. Operator could know and control the network by human-machine interface if needed.

Electro-Optic Computing Architectures: Volume II. Components and System Design and Analysis

DTIC Science & Technology

1998-02-01

The objective of the Electro - Optic Computing Architecture (EOCA) program was to develop multi-function electro - optic interfaces and optical...interconnect units to enhance the performance of parallel processor systems and form the building blocks for future electro - optic computing architectures...Specifically, three multi-function interface modules were targeted for development - an Electro - Optic Interface (EOI), an Optical Interconnection Unit

Multi-Objective Optimization for Trustworthy Tactical Networks: A Survey and Insights

DTIC Science & Technology

2013-06-01

existing data sources, gathering and maintaining the data needed , and completing and reviewing the collection of information. Send comments regarding...problems: using repeated cooperative games [12], hedonic games [25], and nontransferable utility cooperative games [27]. It should be noted that trust...examined an optimal task allocation problem in a distributed computing system where program modules need to be allocated to different processors to

Uncertainty Analysis Principles and Methods

DTIC Science & Technology

2007-09-01

error source . The Data Processor converts binary coded numbers to values, performs D/A curve fitting and applies any correction factors that may be...describes the stages or modules involved in the measurement process. We now need to identify all relevant error sources and develop the mathematical... sources , gathering and maintaining the data needed, and completing and reviewing the collection of information. Send comments regarding this burden

A pluggable framework for parallel pairwise sequence search.

PubMed

Archuleta, Jeremy; Feng, Wu-chun; Tilevich, Eli

2007-01-01

The current and near future of the computing industry is one of multi-core and multi-processor technology. Most existing sequence-search tools have been designed with a focus on single-core, single-processor systems. This discrepancy between software design and hardware architecture substantially hinders sequence-search performance by not allowing full utilization of the hardware. This paper presents a novel framework that will aid the conversion of serial sequence-search tools into a parallel version that can take full advantage of the available hardware. The framework, which is based on a software architecture called mixin layers with refined roles, enables modules to be plugged into the framework with minimal effort. The inherent modular design improves maintenance and extensibility, thus opening up a plethora of opportunities for advanced algorithmic features to be developed and incorporated while routine maintenance of the codebase persists.

Status of the Node 3 Regenerative Environmental Cpntrol& Life Support System Water Recovery & Oxygen Generation Systems

NASA Technical Reports Server (NTRS)

Carrasquillo, Robyn L.

2003-01-01

NASA s Marshall Space Flight Center is providing three racks containing regenerative water recovery and oxygen generation systems (WRS and OGS) for flight on the lnternational Space Station s (ISS) Node 3 element. The major assemblies included in these racks are the Water Processor Assembly (WPA), Urine Processor Assembly (UPA), Oxygen Generation Assembly (OGA), and the Power Supply Module (PSM) supporting the OGA. The WPA and OGA are provided by Hamilton Sundstrand Space Systems lnternational (HSSSI), while the UPA and PSM are being designed and manufactured in-house by MSFC. The assemblies are currently in the manufacturing and test phase and are to be completed and integrated into flight racks this year. This paper gives an overview of the technologies and system designs, technical challenges encountered and solved, and the current status.

Realization of preconditioned Lanczos and conjugate gradient algorithms on optical linear algebra processors.

PubMed

Ghosh, A

1988-08-01

Lanczos and conjugate gradient algorithms are important in computational linear algebra. In this paper, a parallel pipelined realization of these algorithms on a ring of optical linear algebra processors is described. The flow of data is designed to minimize the idle times of the optical multiprocessor and the redundancy of computations. The effects of optical round-off errors on the solutions obtained by the optical Lanczos and conjugate gradient algorithms are analyzed, and it is shown that optical preconditioning can improve the accuracy of these algorithms substantially. Algorithms for optical preconditioning and results of numerical experiments on solving linear systems of equations arising from partial differential equations are discussed. Since the Lanczos algorithm is used mostly with sparse matrices, a folded storage scheme to represent sparse matrices on spatial light modulators is also described.

Hyperspectral Microwave Atmospheric Sounder (HyMAS) - New Capability in the CoSMIR-CoSSIR Scanhead

NASA Technical Reports Server (NTRS)

Hilliard, Lawrence; Racette, Paul; Blackwell, William; Galbraith, Christopher; Thompson, Erik

2015-01-01

Lincoln Laboratory and NASA's Goddard Space Flight Center have teamed to re-use an existing instrument platform, the CoSMIR/CoSSIR system for atmospheric sounding, to develop a new capability in hyperspectral filtering, data collection, and display. The volume of the scanhead accomodated an intermediate frequency processor(IFP), that provides the filtering and digitization of the raw data and the interoperable remote component (IRC) adapted to CoSMIR, CoSSIR, and HyMAS that stores and archives the data with time tagged calibration and navigation data. The first element of the work is the demonstration of a hyperspectral microwave receiver subsystem that was recently shown using a comprehensive simulation study to yield performance that substantially exceeds current state-of-the-art. Hyperspectral microwave sounders with approximately 100 channels offer temperature and humidity sounding improvements similar to those obtained when infrared sensors became hyperspectral, but with the relative insensitivity to clouds that characterizes microwave sensors. Hyperspectral microwave operation is achieved using independent RF antenna/receiver arrays that sample the same area/volume of the Earth's surface/atmosphere at slightly different frequencies and therefore synthesize a set of dense, finely spaced vertical weighting functions. The second, enabling element of the proposal is the development of a compact 52-channel Intermediate Frequency processor module. A principal challenge in the development of a hyperspectral microwave system is the size of the IF filter bank required for channelization. Large bandwidths are simultaneously processed, thus complicating the use of digital back-ends with associated high complexities, costs, and power requirements. Our approach involves passive filters implemented using low-temperature co-fired ceramic (LTCC) technology to achieve an ultra-compact module that can be easily integrated with existing radio frequency front-end technology. This IF processor is universally applicable to other microwave sensing missions requiring compact IF spectrometry. The data include 52 operational channels with low IF module volume (less than 100 cubic centimeters) and mass (less than 300 grams) and linearity better than 0.3 percent over a 330,000 dynamic range.

Method to implement the CCD timing generator based on FPGA

NASA Astrophysics Data System (ADS)

Li, Binhua; Song, Qian; He, Chun; Jin, Jianhui; He, Lin

2010-07-01

With the advance of the PFPA technology, the design methodology of digital systems is changing. In recent years we develop a method to implement the CCD timing generator based on FPGA and VHDL. This paper presents the principles and implementation skills of the method. Taking a developed camera as an example, we introduce the structure, input and output clocks/signals of a timing generator implemented in the camera. The generator is composed of a top module and a bottom module. The bottom one is made up of 4 sub-modules which correspond to 4 different operation modes. The modules are implemented by 5 VHDL programs. Frame charts of the architecture of these programs are shown in the paper. We also describe implementation steps of the timing generator in Quartus II, and the interconnections between the generator and a Nios soft core processor which is the controller of this generator. Some test results are presented in the end.

High-Q photonic resonators and electro-optic coupling using silicon-on-lithium-niobate

NASA Astrophysics Data System (ADS)

Witmer, Jeremy D.; Valery, Joseph A.; Arrangoiz-Arriola, Patricio; Sarabalis, Christopher J.; Hill, Jeff T.; Safavi-Naeini, Amir H.

2017-04-01

Future quantum networks, in which superconducting quantum processors are connected via optical links, will require microwave-to-optical photon converters that preserve entanglement. A doubly-resonant electro-optic modulator (EOM) is a promising platform to realize this conversion. Here, we present our progress towards building such a modulator by demonstrating the optically-resonant half of the device. We demonstrate high quality (Q) factor ring, disk and photonic crystal resonators using a hybrid silicon-on-lithium-niobate material system. Optical Q factors up to 730,000 are achieved, corresponding to propagation loss of 0.8 dB/cm. We also use the electro-optic effect to modulate the resonance frequency of a photonic crystal cavity, achieving a electro-optic modulation coefficient between 1 and 2 pm/V. In addition to quantum technology, we expect that our results will be useful both in traditional silicon photonics applications and in high-sensitivity acousto-optic devices.

Robot Task Commander with Extensible Programming Environment

NASA Technical Reports Server (NTRS)

Hart, Stephen W (Inventor); Wightman, Brian J (Inventor); Dinh, Duy Paul (Inventor); Yamokoski, John D. (Inventor); Gooding, Dustin R (Inventor)

2014-01-01

A system for developing distributed robot application-level software includes a robot having an associated control module which controls motion of the robot in response to a commanded task, and a robot task commander (RTC) in networked communication with the control module over a network transport layer (NTL). The RTC includes a script engine(s) and a GUI, with a processor and a centralized library of library blocks constructed from an interpretive computer programming code and having input and output connections. The GUI provides access to a Visual Programming Language (VPL) environment and a text editor. In executing a method, the VPL is opened, a task for the robot is built from the code library blocks, and data is assigned to input and output connections identifying input and output data for each block. A task sequence(s) is sent to the control module(s) over the NTL to command execution of the task.

Instructional image processing on a university mainframe: The Kansas system

NASA Technical Reports Server (NTRS)

Williams, T. H. L.; Siebert, J.; Gunn, C.

1981-01-01

An interactive digital image processing program package was developed that runs on the University of Kansas central computer, a Honeywell Level 66 multi-processor system. The module form of the package allows easy and rapid upgrades and extensions of the system and is used in remote sensing courses in the Department of Geography, in regional five-day short courses for academics and professionals, and also in remote sensing projects and research. The package comprises three self-contained modules of processing functions: Subimage extraction and rectification; image enhancement, preprocessing and data reduction; and classification. Its use in a typical course setting is described. Availability and costs are considered.

VLBI2010 and the Westford Station - The Path Forward

NASA Astrophysics Data System (ADS)

Beaudoin, C.; Wilson, K.; Whittier, B.; Whitney, A.; McWhirter, R.; Smythe, J. SooHoo, D.; Ruszczyk, C.; Rogers, A.; Poirier, M.; Niell, A.; Corey, B.; Cappallo, R.; Byford, J.; Bolis, P.

2012-12-01

For the past three years the role of the Westford antenna in geodetic VLBI has been two-fold. Over this time its primary purpose has been to participate in standard S/X-band geodetic VLBI observations. In its secondary role the Westford antenna has been converted into a research instrument, facilitating the development of the broadband geodetic VLBI observing technique. As a research instrument, the Westford antenna incorporates a commercially-available ETS-Lindgren 3164 quadridge antenna as a radio telescope feed. The system also uses the VLBI2010 data acquisition system that incorporates digital backends (DBEs) implementing a polyphase filter bank processor. The process of converting the station from its mode of operations to a research instrument often introduces subtle anomalies that must be diagnosed prior to broadband observing. Furthermore, this bifurcation of the station's role is not in line with the goals of the VLBI2010 specifications. Until recently it has not been possible for the Westford station to serve as both an operational and research instrument without conversion for two reasons: poor sensitivity and incompatibility of backend baseband filter bandwidths. The poor sensitivity of the Westford antenna as a broadband radio telescope is in large part due to the commercial broadband feed which was readily available when the proof-of-concept VLBI2010 observations were initiated. However, with the materialization of the quadridge flared horn (QRFH) by the California Institute of Technology and with the improvements in the DiFX software correlator, the necessary components are now available to upgrade the Westford station to full-broadband capability while adhering to the mandate to maintain backwards compatibility with the legacy S/X systems. In this paper we will present the path forward for upgrading the Westford site to full-broadband capability while maintaining S/X compatibility.

Instrumentation and Baseband Telemetry for RLV-TD HEX Mission

NASA Astrophysics Data System (ADS)

Jose, Smitha; Varghese, Bibin; Chauhan, Akshay; Elizabeth, Sheba; Sreelal, S.; Sreekumar, S.; Vinod, P.; Mookiah, T.

2017-12-01

In this work, the salient requirements and features of the baseband telemetry system used in Reusable Launch Vehicle—Technology Demonstrator Hypersonic Experiment mission are discussed. The configuration of the overall system, subsystem components and their features are described in brief. The unique requirements of the telemetry system, when compared to that in a conventional launch vehicle, by way of a large number of temperature and strain measurements that enable the assessment of structural integrity and mission performance in re-entry mission, are dealt with, along with the system configuration to cater to these. Subsequently, two new units have been described—Strain Data Acquisition Unit and Multiplexed Data Acquisition Unit that were inducted specifically to cater to strain measurements using strain gauges and temperature measurements using thermocouples respectively. The optimized subsystem configurations for these units are described and their field performance during flight is analyzed. This work further discusses a novel method of data recovery for those measurements affected by the baseline offset shift caused by the presence of a chassis voltage and poor isolation of sensor to chassis.

A new approach to telemetry data processing. Ph.D. Thesis - Maryland Univ.

NASA Technical Reports Server (NTRS)

Broglio, C. J.

1973-01-01

An approach for a preprocessing system for telemetry data processing was developed. The philosophy of the approach is the development of a preprocessing system to interface with the main processor and relieve it of the burden of stripping information from a telemetry data stream. To accomplish this task, a telemetry preprocessing language was developed. Also, a hardware device for implementing the operation of this language was designed using a cellular logic module concept. In the development of the hardware device and the cellular logic module, a distributed form of control was implemented. This is accomplished by a technique of one-to-one intermodule communications and a set of privileged communication operations. By transferring this control state from module to module, the control function is dispersed through the system. A compiler for translating the preprocessing language statements into an operations table for the hardware device was also developed. Finally, to complete the system design and verify it, a simulator for the collular logic module was written using the APL/360 system.

Arctic Remote Autonomous Measurement Platform Post CEAREX Engineering Report

DTIC Science & Technology

1990-11-01

consists of an aluminum frame which houses and supports the various electronics modules. This structure is supported in- side a specially constructed... aluminum cylinder for deployment. At the lower end, mechanical and electrical terminations connect the sea cable and the salt water battery. At the...2. Temperature transducer ( Thermometrics ) 3. Pressure Transducer (Sensotec) 4. Processor (Baiscon) 5. A/D converter 6. FSK modem 7. Case and Frame 8

National Radar Conference, Los Angeles, CA, March 12, 13, 1986, Proceedings

NASA Astrophysics Data System (ADS)

The topics discussed include radar systems, radar subsystems, and radar signal processing. Papers are presented on millimeter wave radar for proximity fuzing of smart munitions, a solid state low pulse power ground surveillance radar, and the Radarsat prototype synthetic-aperture radar signal processor. Consideration is also given to automatic track quality assessment in ADT radar systems instrumentation of RCS measurements of modulation spectra of aircraft blades.

Custom instruction set NIOS-based OFDM processor for FPGAs

NASA Astrophysics Data System (ADS)

Meyer-Bäse, Uwe; Sunkara, Divya; Castillo, Encarnacion; Garcia, Antonio

2006-05-01

Orthogonal Frequency division multiplexing (OFDM) spread spectrum technique, sometimes also called multi-carrier or discrete multi-tone modulation, are used in bandwidth-efficient communication systems in the presence of channel distortion. The benefits of OFDM are high spectral efficiency, resiliency to RF interference, and lower multi-path distortion. OFDM is the basis for the European digital audio broadcasting (DAB) standard, the global asymmetric digital subscriber line (ADSL) standard, in the IEEE 802.11 5.8 GHz band standard, and ongoing development in wireless local area networks. The modulator and demodulator in an OFDM system can be implemented by use of a parallel bank of filters based on the discrete Fourier transform (DFT), in case the number of subchannels is large (e.g. K > 25), the OFDM system are efficiently implemented by use of the fast Fourier transform (FFT) to compute the DFT. We have developed a custom FPGA-based Altera NIOS system to increase the performance, programmability, and low power in mobil wireless systems. The overall gain observed for a 1024-point FFT ranges depending on the multiplier used by the NIOS processor between a factor of 3 and 16. A careful optimization described in the appendix yield a performance gain of up to 77% when compared with our preliminary results.

Reduction and coding of synthetic aperture radar data with Fourier transforms

NASA Technical Reports Server (NTRS)

Tilley, David G.

1995-01-01

Recently, aboard the Space Radar Laboratory (SRL), the two roles of Fourier Transforms for ocean image synthesis and surface wave analysis have been implemented with a dedicated radar processor to significantly reduce Synthetic Aperture Radar (SAR) ocean data before transmission to the ground. The object was to archive the SAR image spectrum, rather than the SAR image itself, to reduce data volume and capture the essential descriptors of the surface wave field. SAR signal data are usually sampled and coded in the time domain for transmission to the ground where Fourier Transforms are applied both to individual radar pulses and to long sequences of radar pulses to form two-dimensional images. High resolution images of the ocean often contain no striking features and subtle image modulations by wind generated surface waves are only apparent when large ocean regions are studied, with Fourier transforms, to reveal periodic patterns created by wind stress over the surface wave field. Major ocean currents and atmospheric instability in coastal environments are apparent as large scale modulations of SAR imagery. This paper explores the possibility of computing complex Fourier spectrum codes representing SAR images, transmitting the coded spectra to Earth for data archives and creating scenes of surface wave signatures and air-sea interactions via inverse Fourier transformations with ground station processors.

The ability of cochlear implant users to use temporal envelope cues recovered from speech frequency modulationa

PubMed Central

Won, Jong Ho; Lorenzi, Christian; Nie, Kaibao; Li, Xing; Jameyson, Elyse M.; Drennan, Ward R.; Rubinstein, Jay T.

2012-01-01

Previous studies have demonstrated that normal-hearing listeners can understand speech using the recovered “temporal envelopes,” i.e., amplitude modulation (AM) cues from frequency modulation (FM). This study evaluated this mechanism in cochlear implant (CI) users for consonant identification. Stimuli containing only FM cues were created using 1, 2, 4, and 8-band FM-vocoders to determine if consonant identification performance would improve as the recovered AM cues become more available. A consistent improvement was observed as the band number decreased from 8 to 1, supporting the hypothesis that (1) the CI sound processor generates recovered AM cues from broadband FM, and (2) CI users can use the recovered AM cues to recognize speech. The correlation between the intact and the recovered AM components at the output of the sound processor was also generally higher when the band number was low, supporting the consonant identification results. Moreover, CI subjects who were better at using recovered AM cues from broadband FM cues showed better identification performance with intact (unprocessed) speech stimuli. This suggests that speech perception performance variability in CI users may be partly caused by differences in their ability to use AM cues recovered from FM speech cues. PMID:22894230

Face classification using electronic synapses

NASA Astrophysics Data System (ADS)

Yao, Peng; Wu, Huaqiang; Gao, Bin; Eryilmaz, Sukru Burc; Huang, Xueyao; Zhang, Wenqiang; Zhang, Qingtian; Deng, Ning; Shi, Luping; Wong, H.-S. Philip; Qian, He

2017-05-01

Conventional hardware platforms consume huge amount of energy for cognitive learning due to the data movement between the processor and the off-chip memory. Brain-inspired device technologies using analogue weight storage allow to complete cognitive tasks more efficiently. Here we present an analogue non-volatile resistive memory (an electronic synapse) with foundry friendly materials. The device shows bidirectional continuous weight modulation behaviour. Grey-scale face classification is experimentally demonstrated using an integrated 1024-cell array with parallel online training. The energy consumption within the analogue synapses for each iteration is 1,000 × (20 ×) lower compared to an implementation using Intel Xeon Phi processor with off-chip memory (with hypothetical on-chip digital resistive random access memory). The accuracy on test sets is close to the result using a central processing unit. These experimental results consolidate the feasibility of analogue synaptic array and pave the way toward building an energy efficient and large-scale neuromorphic system.

KSC01padig006

NASA Image and Video Library

2001-01-03

KENNEDY SPACE CENTER, Fla. -- Under wispy white morning clouds, Space Shuttle Atlantis approaches Launch Pad 39A, which shows the Rotating Service Structure open (left) and the Fixed Service Structure (right). At the RSS, the payload canister is being lifted up to the Payload Changeout Room. This is the Shuttle’s second attempt at rollout. Jan. 2 a failed computer processor on the crawler transporter aborted the rollout and the Shuttle was returned to the Vehicle Assembly Building using a secondary computer processor on the vehicle. Atlantis will fly on mission STS-98, the seventh construction flight to the International Space Station, carrying the U.S. Laboratory, named Destiny. The lab will have five system racks already installed inside the module. After delivery of electronics in the lab, electrically powered attitude control for Control Moment Gyroscopes will be activated. Atlantis is scheduled for launch no earlier than Jan. 19, 2001, with a crew of five

Applications of surface acoustic and shallow bulk acoustic wave devices

NASA Astrophysics Data System (ADS)

Campbell, Colin K.

1989-10-01

Surface acoustic wave (SAW) device coverage includes delay lines and filters operating at selected frequencies in the range from about 10 MHz to 11 GHz; modeling with single-crystal piezoelectrics and layered structures; resonators and low-loss filters; comb filters and multiplexers; antenna duplexers; harmonic devices; chirp filters for pulse compression; coding with fixed and programmable transversal filters; Barker and quadraphase coding; adaptive filters; acoustic and acoustoelectric convolvers and correlators for radar, spread spectrum, and packet radio; acoustooptic processors for Bragg modulation and spectrum analysis; real-time Fourier-transform and cepstrum processors for radar and sonar; compressive receivers; Nyquist filters for microwave digital radio; clock-recovery filters for fiber communications; fixed-, tunable-, and multimode oscillators and frequency synthesizers; acoustic charge transport; and other SAW devices for signal processing on gallium arsenide. Shallow bulk acoustic wave device applications include gigahertz delay lines, surface-transverse-wave resonators employing energy-trapping gratings, and oscillators with enhanced performance and capability.

Face classification using electronic synapses.

PubMed

Yao, Peng; Wu, Huaqiang; Gao, Bin; Eryilmaz, Sukru Burc; Huang, Xueyao; Zhang, Wenqiang; Zhang, Qingtian; Deng, Ning; Shi, Luping; Wong, H-S Philip; Qian, He

2017-05-12

Conventional hardware platforms consume huge amount of energy for cognitive learning due to the data movement between the processor and the off-chip memory. Brain-inspired device technologies using analogue weight storage allow to complete cognitive tasks more efficiently. Here we present an analogue non-volatile resistive memory (an electronic synapse) with foundry friendly materials. The device shows bidirectional continuous weight modulation behaviour. Grey-scale face classification is experimentally demonstrated using an integrated 1024-cell array with parallel online training. The energy consumption within the analogue synapses for each iteration is 1,000 × (20 ×) lower compared to an implementation using Intel Xeon Phi processor with off-chip memory (with hypothetical on-chip digital resistive random access memory). The accuracy on test sets is close to the result using a central processing unit. These experimental results consolidate the feasibility of analogue synaptic array and pave the way toward building an energy efficient and large-scale neuromorphic system.

A SOPC-BASED Evaluation of AES for 2.4 GHz Wireless Network

NASA Astrophysics Data System (ADS)

Ken, Cai; Xiaoying, Liang

In modern systems, data security is needed more than ever before and many cryptographic algorithms are utilized for security services. Wireless Sensor Networks (WSN) is an example of such technologies. In this paper an innovative SOPC-based approach for the security services evaluation in WSN is proposed that addresses the issues of scalability, flexible performance, and silicon efficiency for the hardware acceleration of encryption system. The design includes a Nios II processor together with custom designed modules for the Advanced Encryption Standard (AES) which has become the default choice for various security services in numerous applications. The objective of this mechanism is to present an efficient hardware realization of AES using very high speed integrated circuit hardware description language (Verilog HDL) and expand the usability for various applications. As compared to traditional customize processor design, the mechanism provides a very broad range of cost/performance points.

Apparatus and method for temperature mapping a turbine component in a high temperature combustion environment

DOEpatents

Baleine, Erwan; Sheldon, Danny M

2014-06-10

Method and system for calibrating a thermal radiance map of a turbine component in a combustion environment. At least one spot (18) of material is disposed on a surface of the component. An infrared (IR) imager (14) is arranged so that the spot is within a field of view of the imager to acquire imaging data of the spot. A processor (30) is configured to process the imaging data to generate a sequence of images as a temperature of the combustion environment is increased. A monitor (42, 44) may be coupled to the processor to monitor the sequence of images of to determine an occurrence of a physical change of the spot as the temperature is increased. A calibration module (46) may be configured to assign a first temperature value to the surface of the turbine component when the occurrence of the physical change of the spot is determined.

Time Reversal Acoustic Communication Using Filtered Multitone Modulation

PubMed Central

Sun, Lin; Chen, Baowei; Li, Haisen; Zhou, Tian; Li, Ruo

2015-01-01

The multipath spread in underwater acoustic channels is severe and, therefore, when the symbol rate of the time reversal (TR) acoustic communication using single-carrier (SC) modulation is high, the large intersymbol interference (ISI) span caused by multipath reduces the performance of the TR process and needs to be removed using the long adaptive equalizer as the post-processor. In this paper, a TR acoustic communication method using filtered multitone (FMT) modulation is proposed in order to reduce the residual ISI in the processed signal using TR. In the proposed method, FMT modulation is exploited to modulate information symbols onto separate subcarriers with high spectral containment and TR technique, as well as adaptive equalization is adopted at the receiver to suppress ISI and noise. The performance of the proposed method is assessed through simulation and real data from a trial in an experimental pool. The proposed method was compared with the TR acoustic communication using SC modulation with the same spectral efficiency. Results demonstrate that the proposed method can improve the performance of the TR process and reduce the computational complexity of adaptive equalization for post-process. PMID:26393586

Time Reversal Acoustic Communication Using Filtered Multitone Modulation.

PubMed

Sun, Lin; Chen, Baowei; Li, Haisen; Zhou, Tian; Li, Ruo

2015-09-17

The multipath spread in underwater acoustic channels is severe and, therefore, when the symbol rate of the time reversal (TR) acoustic communication using single-carrier (SC) modulation is high, the large intersymbol interference (ISI) span caused by multipath reduces the performance of the TR process and needs to be removed using the long adaptive equalizer as the post-processor. In this paper, a TR acoustic communication method using filtered multitone (FMT) modulation is proposed in order to reduce the residual ISI in the processed signal using TR. In the proposed method, FMT modulation is exploited to modulate information symbols onto separate subcarriers with high spectral containment and TR technique, as well as adaptive equalization is adopted at the receiver to suppress ISI and noise. The performance of the proposed method is assessed through simulation and real data from a trial in an experimental pool. The proposed method was compared with the TR acoustic communication using SC modulation with the same spectral efficiency. Results demonstrate that the proposed method can improve the performance of the TR process and reduce the computational complexity of adaptive equalization for post-process.

Superelement model based parallel algorithm for vehicle dynamics

DOE Office of Scientific and Technical Information (OSTI.GOV)

Agrawal, O.P.; Danhof, K.J.; Kumar, R.

1994-05-01

This paper presents a superelement model based parallel algorithm for a planar vehicle dynamics. The vehicle model is made up of a chassis and two suspension systems each of which consists of an axle-wheel assembly and two trailing arms. In this model, the chassis is treated as a Cartesian element and each suspension system is treated as a superelement. The parameters associated with the superelements are computed using an inverse dynamics technique. Suspension shock absorbers and the tires are modeled by nonlinear springs and dampers. The Euler-Lagrange approach is used to develop the system equations of motion. This leads tomore » a system of differential and algebraic equations in which the constraints internal to superelements appear only explicitly. The above formulation is implemented on a multiprocessor machine. The numerical flow chart is divided into modules and the computation of several modules is performed in parallel to gain computational efficiency. In this implementation, the master (parent processor) creates a pool of slaves (child processors) at the beginning of the program. The slaves remain in the pool until they are needed to perform certain tasks. Upon completion of a particular task, a slave returns to the pool. This improves the overall response time of the algorithm. The formulation presented is general which makes it attractive for a general purpose code development. Speedups obtained in the different modules of the dynamic analysis computation are also presented. Results show that the superelement model based parallel algorithm can significantly reduce the vehicle dynamics simulation time. 52 refs.« less

Design and simulation of programmable relational optoelectronic time-pulse coded processors as base elements for sorting neural networks

NASA Astrophysics Data System (ADS)

Krasilenko, Vladimir G.; Nikolsky, Alexander I.; Lazarev, Alexander A.; Lazareva, Maria V.

2010-05-01

In the paper we show that the biologically motivated conception of time-pulse encoding usage gives a set of advantages (single methodological basis, universality, tuning simplicity, learning and programming et al) at creation and design of sensor systems with parallel input-output and processing for 2D structures hybrid and next generations neuro-fuzzy neurocomputers. We show design principles of programmable relational optoelectronic time-pulse encoded processors on the base of continuous logic, order logic and temporal waves processes. We consider a structure that execute analog signal extraction, analog and time-pulse coded variables sorting. We offer optoelectronic realization of such base relational order logic element, that consists of time-pulse coded photoconverters (pulse-width and pulse-phase modulators) with direct and complementary outputs, sorting network on logical elements and programmable commutation blocks. We make technical parameters estimations of devices and processors on such base elements by simulation and experimental research: optical input signals power 0.2 - 20 uW, processing time 1 - 10 us, supply voltage 1 - 3 V, consumption power 10 - 100 uW, extended functional possibilities, learning possibilities. We discuss some aspects of possible rules and principles of learning and programmable tuning on required function, relational operation and realization of hardware blocks for modifications of such processors. We show that it is possible to create sorting machines, neural networks and hybrid data-processing systems with untraditional numerical systems and pictures operands on the basis of such quasiuniversal hardware simple blocks with flexible programmable tuning.

Parallelization of interpolation, solar radiation and water flow simulation modules in GRASS GIS using OpenMP

NASA Astrophysics Data System (ADS)

Hofierka, Jaroslav; Lacko, Michal; Zubal, Stanislav

2017-10-01

In this paper, we describe the parallelization of three complex and computationally intensive modules of GRASS GIS using the OpenMP application programming interface for multi-core computers. These include the v.surf.rst module for spatial interpolation, the r.sun module for solar radiation modeling and the r.sim.water module for water flow simulation. We briefly describe the functionality of the modules and parallelization approaches used in the modules. Our approach includes the analysis of the module's functionality, identification of source code segments suitable for parallelization and proper application of OpenMP parallelization code to create efficient threads processing the subtasks. We document the efficiency of the solutions using the airborne laser scanning data representing land surface in the test area and derived high-resolution digital terrain model grids. We discuss the performance speed-up and parallelization efficiency depending on the number of processor threads. The study showed a substantial increase in computation speeds on a standard multi-core computer while maintaining the accuracy of results in comparison to the output from original modules. The presented parallelization approach showed the simplicity and efficiency of the parallelization of open-source GRASS GIS modules using OpenMP, leading to an increased performance of this geospatial software on standard multi-core computers.

Design and Characterization of a Secure Automatic Dependent Surveillance-Broadcast Prototype

DTIC Science & Technology

2015-03-26

during the thesis process. Thank you to Mr. Dave Prentice of AFRL for providing the Aeroflex IFR 6000 baseband signals, upon which many design decisions...35 25 Example Aeroflex IFR 6000 signal. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36 26...Global Positioning System HDL hardware description language I in-phase IFR Instrument Flight Rules IP Internet Protocol IP intellectual property IPSec

SystemC modelling of wireless communication channel

NASA Astrophysics Data System (ADS)

Conti, Massimo; Orcioni, Simone

2011-05-01

This paper presents the definition in SystemC of wireless channels at different levels of abstraction. The different levels of description of the wireless channel can be easily interchanged allowing the reuse of the application and baseband layers in a high level analysis of the network or in a deep analysis of the communication between the wireless devices.

Application of advanced on-board processing concepts to future satellite communications systems

NASA Technical Reports Server (NTRS)

Katz, J. L.; Hoffman, M.; Kota, S. L.; Ruddy, J. M.; White, B. F.

1979-01-01

An initial definition of on-board processing requirements for an advanced satellite communications system to service domestic markets in the 1990's is presented. An exemplar system architecture with both RF on-board switching and demodulation/remodulation baseband processing was used to identify important issues related to system implementation, cost, and technology development.

Vapor compression distillation module

NASA Technical Reports Server (NTRS)

Nuccio, P. P.

1975-01-01

A Vapor Compression Distillation (VCD) module was developed and evaluated as part of a Space Station Prototype (SSP) environmental control and life support system. The VCD module includes the waste tankage, pumps, post-treatment cells, automatic controls and fault detection instrumentation. Development problems were encountered with two components: the liquid pumps, and the waste tank and quantity gauge. Peristaltic pumps were selected instead of gear pumps, and a sub-program of materials and design optimization was undertaken leading to a projected life greater than 10,000 hours of continuous operation. A bladder tank was designed and built to contain the waste liquids and deliver it to the processor. A detrimental pressure pattern imposed upon the bladder by a force-operated quantity gauge was corrected by rearranging the force application, and design goals were achieved. System testing has demonstrated that all performance goals have been fulfilled.

Engine structures modeling software system: Computer code. User's manual

NASA Technical Reports Server (NTRS)

1992-01-01

ESMOSS is a specialized software system for the construction of geometric descriptive and discrete analytical models of engine parts, components and substructures which can be transferred to finite element analysis programs such as NASTRAN. The software architecture of ESMOSS is designed in modular form with a central executive module through which the user controls and directs the development of the analytical model. Modules consist of a geometric shape generator, a library of discretization procedures, interfacing modules to join both geometric and discrete models, a deck generator to produce input for NASTRAN and a 'recipe' processor which generates geometric models from parametric definitions. ESMOSS can be executed both in interactive and batch modes. Interactive mode is considered to be the default mode and that mode will be assumed in the discussion in this document unless stated otherwise.

Digital Low Level RF Systems for Fermilab Main Ring and Tevatron

NASA Astrophysics Data System (ADS)

Chase, B.; Barnes, B.; Meisner, K.

1997-05-01

At Fermilab, a new Low Level RF system is successfully installed and operating in the Main Ring. Installation is proceeding for a Tevatron system. This upgrade replaces aging CAMAC/NIM components for an increase in accuracy, reliability, and flexibility. These VXI systems are based on a custom three channel direct digital synthesizer(DDS) module. Each synthesizer channel is capable of independent or ganged operation for both frequency and phase modulation. New frequency and phase values are computed at a 100kHz rate on the module's Analog Devices ADSP21062 (SHARC) digital signal processor. The DSP concurrently handles feedforward, feedback, and beam manipulations. Higher level state machines and the control system interface are handled at the crate level using the VxWorks operating system. This paper discusses the hardware, software and operational aspects of these LLRF systems.

Custom electronic subsystems for the laboratory telerobotic manipulator

NASA Technical Reports Server (NTRS)

Glassell, R. L.; Butler, P. L.; Rowe, J. C.; Zimmermann, S. D.

1990-01-01

The National Aeronautics and Space Administration (NASA) Space Station Program presents new opportunities for the application of telerobotic and robotic systems. The Laboratory Telerobotic Manipulator (LTM) is a highly advanced 7 degrees-of-freedom (DOF) telerobotic/robotic manipulator. It was developed and built for the Automation Technology Branch at NASA's Langley Research Center (LaRC) for work in research and to demonstrate ground-based telerobotic manipulator system hardware and software systems for future NASA applications in the hazardous environment of space. The LTM manipulator uses an embedded wiring design with all electronics, motor power, and control and communication cables passing through the pitch-yaw differential joints. This design requires the number of cables passing through the pitch/yaw joint to be kept to a minimum. To eliminate the cables needed to carry each pitch-yaw joint's sensor data to the VME control computers, a custom-embedded electronics package for each manipulator joint was developed. The electronics package collects and sends the joint's sensor data to the VME control computers over a fiber optic cable. The electronics package consist of five individual subsystems: the VME Link Processor, the Joint Processor and the Joint Processor power supply in the joint module, the fiber optics communications system, and the electronics and motor power cabling.

Configurable Multi-Purpose Processor

NASA Technical Reports Server (NTRS)

Valencia, J. Emilio; Forney, Chirstopher; Morrison, Robert; Birr, Richard

2010-01-01

Advancements in technology have allowed the miniaturization of systems used in aerospace vehicles. This technology is driven by the need for next-generation systems that provide reliable, responsive, and cost-effective range operations while providing increased capabilities such as simultaneous mission support, increased launch trajectories, improved launch, and landing opportunities, etc. Leveraging the newest technologies, the command and telemetry processor (CTP) concept provides for a compact, flexible, and integrated solution for flight command and telemetry systems and range systems. The CTP is a relatively small circuit board that serves as a processing platform for high dynamic, high vibration environments. The CTP can be reconfigured and reprogrammed, allowing it to be adapted for many different applications. The design is centered around a configurable field-programmable gate array (FPGA) device that contains numerous logic cells that can be used to implement traditional integrated circuits. The FPGA contains two PowerPC processors running the Vx-Works real-time operating system and are used to execute software programs specific to each application. The CTP was designed and developed specifically to provide telemetry functions; namely, the command processing, telemetry processing, and GPS metric tracking of a flight vehicle. However, it can be used as a general-purpose processor board to perform numerous functions implemented in either hardware or software using the FPGA s processors and/or logic cells. Functionally, the CTP was designed for range safety applications where it would ultimately become part of a vehicle s flight termination system. Consequently, the major functions of the CTP are to perform the forward link command processing, GPS metric tracking, return link telemetry data processing, error detection and correction, data encryption/ decryption, and initiate flight termination action commands. Also, the CTP had to be designed to survive and operate in a launch environment. Additionally, the CTP was designed to interface with the WFF (Wallops Flight Facility) custom-designed transceiver board which is used in the Low Cost TDRSS Transceiver (LCT2) also developed by WFF. The LCT2 s transceiver board demodulates commands received from the ground via the forward link and sends them to the CTP, where they are processed. The CTP inputs and processes data from the inertial measurement unit (IMU) and the GPS receiver board, generates status data, and then sends the data to the transceiver board where it is modulated and sent to the ground via the return link. Overall, the CTP has combined processing with the ability to interface to a GPS receiver, an IMU, and a pulse code modulation (PCM) communication link, while providing the capability to support common interfaces including Ethernet and serial interfaces boarding a relatively small-sized, lightweight package.

Wide-Area Persistent Energy-Efficient Maritime Sensing

DTIC Science & Technology

2015-09-30

Matt Reynolds, Lefteris Kampianakis, and Andreas Pedrosse-Engel at UW designed and tested a Software Defined Radar testbed as well as an Arduino - based ...hardware based on a software-defined radio platform. 2) Development of a standalone Arduino - based backscatter node. 3) Analysis of the limits of the... Arduino - based node that can modulate radar backscatter with data received from a sensor using a low-power Arduino Nano processor. Figure 5 shows a