Application of phase-change materials in memory taxonomy.
Wang, Lei; Tu, Liang; Wen, Jing
2017-01-01
Phase-change materials are suitable for data storage because they exhibit reversible transitions between crystalline and amorphous states that have distinguishable electrical and optical properties. Consequently, these materials find applications in diverse memory devices ranging from conventional optical discs to emerging nanophotonic devices. Current research efforts are mostly devoted to phase-change random access memory, whereas the applications of phase-change materials in other types of memory devices are rarely reported. Here we review the physical principles of phase-change materials and devices aiming to help researchers understand the concept of phase-change memory. We classify phase-change memory devices into phase-change optical disc, phase-change scanning probe memory, phase-change random access memory, and phase-change nanophotonic device, according to their locations in memory hierarchy. For each device type we discuss the physical principles in conjunction with merits and weakness for data storage applications. We also outline state-of-the-art technologies and future prospects.
Application of phase-change materials in memory taxonomy
Wang, Lei; Tu, Liang; Wen, Jing
2017-01-01
Abstract Phase-change materials are suitable for data storage because they exhibit reversible transitions between crystalline and amorphous states that have distinguishable electrical and optical properties. Consequently, these materials find applications in diverse memory devices ranging from conventional optical discs to emerging nanophotonic devices. Current research efforts are mostly devoted to phase-change random access memory, whereas the applications of phase-change materials in other types of memory devices are rarely reported. Here we review the physical principles of phase-change materials and devices aiming to help researchers understand the concept of phase-change memory. We classify phase-change memory devices into phase-change optical disc, phase-change scanning probe memory, phase-change random access memory, and phase-change nanophotonic device, according to their locations in memory hierarchy. For each device type we discuss the physical principles in conjunction with merits and weakness for data storage applications. We also outline state-of-the-art technologies and future prospects. PMID:28740557
Forced Ion Migration for Chalcogenide Phase Change Memory Device
NASA Technical Reports Server (NTRS)
Campbell, Kristy A (Inventor)
2013-01-01
Non-volatile memory devices with two stacked layers of chalcogenide materials comprising the active memory device have been investigated for their potential as phase-change memories. The devices tested included GeTe/SnTe, Ge2Se3/SnTe, and Ge2Se3/SnSe stacks. All devices exhibited resistance switching behavior. The polarity of the applied voltage with respect to the SnTe or SnSe layer was critical to the memory switching properties, due to the electric field induced movement of either Sn or Te into the Ge-chalcogenide layer. One embodiment of the invention is a device comprising a stack of chalcogenide-containing layers which exhibit phase-change switching only after a reverse polarity voltage potential is applied across the stack causing ion movement into an adjacent layer and thus "activating" the device to act as a phase-change random access memory device or a reconfigurable electronics device when the applied voltage potential is returned to the normal polarity. Another embodiment of the invention is a device that is capable of exhibiting more than two data states.
Forced ion migration for chalcogenide phase change memory device
NASA Technical Reports Server (NTRS)
Campbell, Kristy A. (Inventor)
2011-01-01
Non-volatile memory devices with two stacked layers of chalcogenide materials comprising the active memory device have been investigated for their potential as phase change memories. The devices tested included GeTe/SnTe, Ge.sub.2Se.sub.3/SnTe, and Ge.sub.2Se.sub.3/SnSe stacks. All devices exhibited resistance switching behavior. The polarity of the applied voltage with respect to the SnTe or SnSe layer was critical to the memory switching properties, due to the electric field induced movement of either Sn or Te into the Ge-chalcogenide layer. One embodiment of the invention is a device comprising a stack of chalcogenide-containing layers which exhibit phase change switching only after a reverse polarity voltage potential is applied across the stack causing ion movement into an adjacent layer and thus "activating" the device to act as a phase change random access memory device or a reconfigurable electronics device when the applied voltage potential is returned to the normal polarity. Another embodiment of the invention is a device that is capable of exhibiting more that two data states.
Forced ion migration for chalcogenide phase change memory device
NASA Technical Reports Server (NTRS)
Campbell, Kristy A. (Inventor)
2012-01-01
Non-volatile memory devices with two stacked layers of chalcogenide materials comprising the active memory device have been investigated for their potential as phase-change memories. The devices tested included GeTe/SnTe, Ge.sub.2Se.sub.3/SnTe, and Ge.sub.2Se.sub.3/SnSe stacks. All devices exhibited resistance switching behavior. The polarity of the applied voltage with respect to the SnTe or SnSe layer was critical to the memory switching properties, due to the electric field induced movement of either Sn or Te into the Ge-chalcogenide layer. One embodiment of the invention is a device comprising a stack of chalcogenide-containing layers which exhibit phase-change switching only after a reverse polarity voltage potential is applied across the stack causing ion movement into an adjacent layer and thus "activating" the device to act as a phase-change random access memory device or a reconfigurable electronics device when the applied voltage potential is returned to the normal polarity. Another embodiment of the invention is a device that is capable of exhibiting more than two data states.
Projected phase-change memory devices.
Koelmans, Wabe W; Sebastian, Abu; Jonnalagadda, Vara Prasad; Krebs, Daniel; Dellmann, Laurent; Eleftheriou, Evangelos
2015-09-03
Nanoscale memory devices, whose resistance depends on the history of the electric signals applied, could become critical building blocks in new computing paradigms, such as brain-inspired computing and memcomputing. However, there are key challenges to overcome, such as the high programming power required, noise and resistance drift. Here, to address these, we present the concept of a projected memory device, whose distinguishing feature is that the physical mechanism of resistance storage is decoupled from the information-retrieval process. We designed and fabricated projected memory devices based on the phase-change storage mechanism and convincingly demonstrate the concept through detailed experimentation, supported by extensive modelling and finite-element simulations. The projected memory devices exhibit remarkably low drift and excellent noise performance. We also demonstrate active control and customization of the programming characteristics of the device that reliably realize a multitude of resistance states.
Electrically Variable Resistive Memory Devices
NASA Technical Reports Server (NTRS)
Liu, Shangqing; Wu, Nai-Juan; Ignatiev, Alex; Charlson, E. J.
2010-01-01
Nonvolatile electronic memory devices that store data in the form of electrical- resistance values, and memory circuits based on such devices, have been invented. These devices and circuits exploit an electrically-variable-resistance phenomenon that occurs in thin films of certain oxides that exhibit the colossal magnetoresistive (CMR) effect. It is worth emphasizing that, as stated in the immediately preceding article, these devices function at room temperature and do not depend on externally applied magnetic fields. A device of this type is basically a thin film resistor: it consists of a thin film of a CMR material located between, and in contact with, two electrical conductors. The application of a short-duration, low-voltage current pulse via the terminals changes the electrical resistance of the film. The amount of the change in resistance depends on the size of the pulse. The direction of change (increase or decrease of resistance) depends on the polarity of the pulse. Hence, a datum can be written (or a prior datum overwritten) in the memory device by applying a pulse of size and polarity tailored to set the resistance at a value that represents a specific numerical value. To read the datum, one applies a smaller pulse - one that is large enough to enable accurate measurement of resistance, but small enough so as not to change the resistance. In writing, the resistance can be set to any value within the dynamic range of the CMR film. Typically, the value would be one of several discrete resistance values that represent logic levels or digits. Because the number of levels can exceed 2, a memory device of this type is not limited to binary data. Like other memory devices, devices of this type can be incorporated into a memory integrated circuit by laying them out on a substrate in rows and columns, along with row and column conductors for electrically addressing them individually or collectively.
Park, Woon Ik; Kim, Jong Min; Jeong, Jae Won; ...
2015-03-17
Phase change memory (PCM) is one of the most promising candidates for next-generation nonvolatile memory devices because of its high speed, excellent reliability, and outstanding scalability. But, the high switching current of PCM devices has been a critical hurdle to realize low-power operation. Although one solution is to reduce the switching volume of the memory, the resolution limit of photolithography hinders further miniaturization of device dimensions. Here, we employed unconventional self-assembly geometries obtained from blends of block copolymers (BCPs) to form ring-shaped hollow PCM nanostructures with an ultrasmall contact area between a phase-change material (Ge 2Sb 2Te 5) and amore » heater (TiN) electrode. The high-density (approximately 0.1 terabits per square inch) PCM nanoring arrays showed extremely small switching current of 2-3 mu A. Furthermore, the relatively small reset current of the ring-shaped PCM compared to the pillar-shaped devices is attributed to smaller switching volume, which is well supported by electro-thermal simulation results. Our approach may also be extended to other nonvolatile memory device applications such as resistive switching memory and magnetic storage devices, where the control of nanoscale geometry can significantly affect device performances.« less
Similarity between the response of memristive and memcapacitive circuits subjected to ramped voltage
NASA Astrophysics Data System (ADS)
Kanygin, Mikhail A.; Katkov, Mikhail V.; Pershin, Yuriy V.
2017-07-01
We report a similar feature in the response of resistor-memristor and capacitor-memcapacitor circuits with threshold-type memory devices driven by triangular waveform voltage. In both cases, the voltage across the memory device is stabilized during the switching of the memory device state. While in the memristive circuit this feature is observed when the applied voltage changes in one direction, the memcapacitive circuit with a ferroelectric memcapacitor demonstrates the voltage stabilization effect at both sweep directions. The discovered behavior of capacitor-memcapacitor circuit is also demonstrated experimentally. We anticipate that our observation can be used in the design of electronic circuits with emergent memory devices as well as in the identification and characterization of memory effects in threshold-type memory devices.
Biomaterial-based Memory Device Development by Conducting Metallic DNA
2013-05-28
time. Therefore, we have created a multiple-states memory system . This is the first multi-states resistance memory device by using bio-nanowire of the...world. Based on this achievement, logic device and application will be developed in the near future, too. Moreover, by using Ni-DNA detection system ...ions in DNA can change the resistance of Ni-DNA by applying different polar bias and time. Therefore, we have created a multiple-states memory system
NASA Astrophysics Data System (ADS)
Guo, Tao; Sun, Bai; Mao, Shuangsuo; Zhu, Shouhui; Xia, Yudong; Wang, Hongyan; Zhao, Yong; Yu, Zhou
2018-03-01
In this work, the Cu(In1-xGax)Se2 (CIGS), Al doped ZnO (AZO) and Mo has been used for constructing a resistive switching device with AZO/CIGS/Mo sandwich structure grown on a transparent glass substrate. The device represents a high-performance memory characteristics under ambient temperature. In particularly, a resistance ratio change phenomenon have been observed in our device for the first time.
Resistive switching characteristics of interfacial phase-change memory at elevated temperature
NASA Astrophysics Data System (ADS)
Mitrofanov, Kirill V.; Saito, Yuta; Miyata, Noriyuki; Fons, Paul; Kolobov, Alexander V.; Tominaga, Junji
2018-04-01
Interfacial phase-change memory (iPCM) devices were fabricated using W and TiN for the bottom and top contacts, respectively, and the effect of operation temperature on the resistive switching was examined over the range between room temperature and 200 °C. It was found that the high-resistance (RESET) state in an iPCM device drops sharply at around 150 °C to a low-resistance (SET) state, which differs by ˜400 Ω from the SET state obtained by electric-field-induced switching. The iPCM device SET state resistance recovered during the cooling process and remained at nearly the same value for the RESET state. These resistance characteristics greatly differ from those of the conventional Ge-Sb-Te (GST) alloy phase-change memory device, underscoring the fundamentally different switching nature of iPCM devices. From the thermal stability measurements of iPCM devices, their optimal temperature operation was concluded to be less than 100 °C.
Overview of Probe-based Storage Technologies
NASA Astrophysics Data System (ADS)
Wang, Lei; Yang, Ci Hui; Wen, Jing; Gong, Si Di; Peng, Yuan Xiu
2016-07-01
The current world is in the age of big data where the total amount of global digital data is growing up at an incredible rate. This indeed necessitates a drastic enhancement on the capacity of conventional data storage devices that are, however, suffering from their respective physical drawbacks. Under this circumstance, it is essential to aggressively explore and develop alternative promising mass storage devices, leading to the presence of probe-based storage devices. In this paper, the physical principles and the current status of several different probe storage devices, including thermo-mechanical probe memory, magnetic probe memory, ferroelectric probe memory, and phase-change probe memory, are reviewed in details, as well as their respective merits and weakness. This paper provides an overview of the emerging probe memories potentially for next generation storage device so as to motivate the exploration of more innovative technologies to push forward the development of the probe storage devices.
Overview of Probe-based Storage Technologies.
Wang, Lei; Yang, Ci Hui; Wen, Jing; Gong, Si Di; Peng, Yuan Xiu
2016-12-01
The current world is in the age of big data where the total amount of global digital data is growing up at an incredible rate. This indeed necessitates a drastic enhancement on the capacity of conventional data storage devices that are, however, suffering from their respective physical drawbacks. Under this circumstance, it is essential to aggressively explore and develop alternative promising mass storage devices, leading to the presence of probe-based storage devices. In this paper, the physical principles and the current status of several different probe storage devices, including thermo-mechanical probe memory, magnetic probe memory, ferroelectric probe memory, and phase-change probe memory, are reviewed in details, as well as their respective merits and weakness. This paper provides an overview of the emerging probe memories potentially for next generation storage device so as to motivate the exploration of more innovative technologies to push forward the development of the probe storage devices.
Jung, Sungchul; Jeon, Youngeun; Jin, Hanbyul; Lee, Jung-Yong; Ko, Jae-Hyeon; Kim, Nam; Eom, Daejin; Park, Kibog
2016-01-01
An enormous amount of research activities has been devoted to developing new types of non-volatile memory devices as the potential replacements of current flash memory devices. Theoretical device modeling was performed to demonstrate that a huge change of tunnel resistance in an Edge Metal-Insulator-Metal (EMIM) junction of metal crossbar structure can be induced by the modulation of electric fringe field, associated with the polarization reversal of an underlying ferroelectric layer. It is demonstrated that single three-terminal EMIM/Ferroelectric structure could form an active memory cell without any additional selection devices. This new structure can open up a way of fabricating all-thin-film-based, high-density, high-speed, and low-power non-volatile memory devices that are stackable to realize 3D memory architecture. PMID:27476475
Three-terminal resistive switching memory in a transparent vertical-configuration device
NASA Astrophysics Data System (ADS)
Ungureanu, Mariana; Llopis, Roger; Casanova, Fèlix; Hueso, Luis E.
2014-01-01
The resistive switching phenomenon has attracted much attention recently for memory applications. It describes the reversible change in the resistance of a dielectric between two non-volatile states by the application of electrical pulses. Typical resistive switching memories are two-terminal devices formed by an oxide layer placed between two metal electrodes. Here, we report on the fabrication and operation of a three-terminal resistive switching memory that works as a reconfigurable logic component and offers an increased logic density on chip. The three-terminal memory device we present is transparent and could be further incorporated in transparent computing electronic technologies.
Nonvolatile “AND,” “OR,” and “NOT” Boolean logic gates based on phase-change memory
DOE Office of Scientific and Technical Information (OSTI.GOV)
Li, Y.; Zhong, Y. P.; Deng, Y. F.
2013-12-21
Electronic devices or circuits that can implement both logic and memory functions are regarded as the building blocks for future massive parallel computing beyond von Neumann architecture. Here we proposed phase-change memory (PCM)-based nonvolatile logic gates capable of AND, OR, and NOT Boolean logic operations verified in SPICE simulations and circuit experiments. The logic operations are parallel computing and results can be stored directly in the states of the logic gates, facilitating the combination of computing and memory in the same circuit. These results are encouraging for ultralow-power and high-speed nonvolatile logic circuit design based on novel memory devices.
Feasibility study of molecular memory device based on DNA using methylation to store information
NASA Astrophysics Data System (ADS)
Jiang, Liming; Qiu, Wanzhi; Al-Dirini, Feras; Hossain, Faruque M.; Evans, Robin; Skafidas, Efstratios
2016-07-01
DNA, because of its robustness and dense information storage capability, has been proposed as a potential candidate for next-generation storage media. However, encoding information into the DNA sequence requires molecular synthesis technology, which to date is costly and prone to synthesis errors. Reading the DNA strand information is also complex. Ideally, DNA storage will provide methods for modifying stored information. Here, we conduct a feasibility study investigating the use of the DNA 5-methylcytosine (5mC) methylation state as a molecular memory to store information. We propose a new 1-bit memory device and study, based on the density functional theory and non-equilibrium Green's function method, the feasibility of electrically reading the information. Our results show that changes to methylation states lead to changes in the peak of negative differential resistance which can be used to interrogate memory state. Our work demonstrates a new memory concept based on methylation state which can be beneficial in the design of next generation DNA based molecular electronic memory devices.
Wang, Weijie; Loke, Desmond; Shi, Luping; Zhao, Rong; Yang, Hongxin; Law, Leong-Tat; Ng, Lung-Tat; Lim, Kian-Guan; Yeo, Yee-Chia; Chong, Tow-Chong; Lacaita, Andrea L
2012-01-01
The quest for universal memory is driving the rapid development of memories with superior all-round capabilities in non-volatility, high speed, high endurance and low power. Phase-change materials are highly promising in this respect. However, their contradictory speed and stability properties present a key challenge towards this ambition. We reveal that as the device size decreases, the phase-change mechanism changes from the material inherent crystallization mechanism (either nucleation- or growth-dominated), to the hetero-crystallization mechanism, which resulted in a significant increase in PCRAM speeds. Reducing the grain size can further increase the speed of phase-change. Such grain size effect on speed becomes increasingly significant at smaller device sizes. Together with the nano-thermal and electrical effects, fast phase-change, good stability and high endurance can be achieved. These findings lead to a feasible solution to achieve a universal memory.
Wang, Weijie; Loke, Desmond; Shi, Luping; Zhao, Rong; Yang, Hongxin; Law, Leong-Tat; Ng, Lung-Tat; Lim, Kian-Guan; Yeo, Yee-Chia; Chong, Tow-Chong; Lacaita, Andrea L.
2012-01-01
The quest for universal memory is driving the rapid development of memories with superior all-round capabilities in non-volatility, high speed, high endurance and low power. Phase-change materials are highly promising in this respect. However, their contradictory speed and stability properties present a key challenge towards this ambition. We reveal that as the device size decreases, the phase-change mechanism changes from the material inherent crystallization mechanism (either nucleation- or growth-dominated), to the hetero-crystallization mechanism, which resulted in a significant increase in PCRAM speeds. Reducing the grain size can further increase the speed of phase-change. Such grain size effect on speed becomes increasingly significant at smaller device sizes. Together with the nano-thermal and electrical effects, fast phase-change, good stability and high endurance can be achieved. These findings lead to a feasible solution to achieve a universal memory. PMID:22496956
Novel synaptic memory device for neuromorphic computing
NASA Astrophysics Data System (ADS)
Mandal, Saptarshi; El-Amin, Ammaarah; Alexander, Kaitlyn; Rajendran, Bipin; Jha, Rashmi
2014-06-01
This report discusses the electrical characteristics of two-terminal synaptic memory devices capable of demonstrating an analog change in conductance in response to the varying amplitude and pulse-width of the applied signal. The devices are based on Mn doped HfO2 material. The mechanism behind reconfiguration was studied and a unified model is presented to explain the underlying device physics. The model was then utilized to show the application of these devices in speech recognition. A comparison between a 20 nm × 20 nm sized synaptic memory device with that of a state-of-the-art VLSI SRAM synapse showed ~10× reduction in area and >106 times reduction in the power consumption per learning cycle.
NASA Astrophysics Data System (ADS)
Lee, Sejoon; Song, Emil B.; Kim, Sungmin; Seo, David H.; Seo, Sunae; Won Kang, Tae; Wang, Kang L.
2012-01-01
Graphene-based non-volatile memory devices composed of a single-layer graphene channel and an Al2O3/HfOx/Al2O3 charge-storage layer exhibit memory functionality. The impact of the gate material's work-function (Φ) on the memory characteristics is investigated using different types of metals [Ti (ΦTi = 4.3 eV) and Ni (ΦNi = 5.2 eV)]. The ambipolar carrier conduction of graphene results in an enlargement of memory window (ΔVM), which is ˜4.5 V for the Ti-gate device and ˜9.1 V for the Ni-gate device. The increase in ΔVM is attributed to the change in the flat-band condition and the suppression of electron back-injection within the gate stack.
NASA Astrophysics Data System (ADS)
Marinella, M.
In the not too distant future, the traditional memory and storage hierarchy of may be replaced by a single Storage Class Memory (SCM) device integrated on or near the logic processor. Traditional magnetic hard drives, NAND flash, DRAM, and higher level caches (L2 and up) will be replaced with a single high performance memory device. The Storage Class Memory paradigm will require high speed (< 100 ns read/write), excellent endurance (> 1012), nonvolatility (retention > 10 years), and low switching energies (< 10 pJ per switch). The International Technology Roadmap for Semiconductors (ITRS) has recently evaluated several potential candidates SCM technologies, including Resistive (or Redox) RAM, Spin Torque Transfer RAM (STT-MRAM), and phase change memory (PCM). All of these devices show potential well beyond that of current flash technologies and research efforts are underway to improve the endurance, write speeds, and scalabilities to be on-par with DRAM. This progress has interesting implications for space electronics: each of these emerging device technologies show excellent resistance to the types of radiation typically found in space applications. Commercially developed, high density storage class memory-based systems may include a memory that is physically radiation hard, and suitable for space applications without major shielding efforts. This paper reviews the Storage Class Memory concept, emerging memory devices, and possible applicability to radiation hardened electronics for space.
Baeumer, Christoph; Schmitz, Christoph; Marchewka, Astrid; Mueller, David N.; Valenta, Richard; Hackl, Johanna; Raab, Nicolas; Rogers, Steven P.; Khan, M. Imtiaz; Nemsak, Slavomir; Shim, Moonsub; Menzel, Stephan; Schneider, Claus Michael; Waser, Rainer; Dittmann, Regina
2016-01-01
The continuing revolutionary success of mobile computing and smart devices calls for the development of novel, cost- and energy-efficient memories. Resistive switching is attractive because of, inter alia, increased switching speed and device density. On electrical stimulus, complex nanoscale redox processes are suspected to induce a resistance change in memristive devices. Quantitative information about these processes, which has been experimentally inaccessible so far, is essential for further advances. Here we use in operando spectromicroscopy to verify that redox reactions drive the resistance change. A remarkable agreement between experimental quantification of the redox state and device simulation reveals that changes in donor concentration by a factor of 2–3 at electrode-oxide interfaces cause a modulation of the effective Schottky barrier and lead to >2 orders of magnitude change in device resistance. These findings allow realistic device simulations, opening a route to less empirical and more predictive design of future memory cells. PMID:27539213
Baeumer, Christoph; Schmitz, Christoph; Marchewka, Astrid; Mueller, David N; Valenta, Richard; Hackl, Johanna; Raab, Nicolas; Rogers, Steven P; Khan, M Imtiaz; Nemsak, Slavomir; Shim, Moonsub; Menzel, Stephan; Schneider, Claus Michael; Waser, Rainer; Dittmann, Regina
2016-08-19
The continuing revolutionary success of mobile computing and smart devices calls for the development of novel, cost- and energy-efficient memories. Resistive switching is attractive because of, inter alia, increased switching speed and device density. On electrical stimulus, complex nanoscale redox processes are suspected to induce a resistance change in memristive devices. Quantitative information about these processes, which has been experimentally inaccessible so far, is essential for further advances. Here we use in operando spectromicroscopy to verify that redox reactions drive the resistance change. A remarkable agreement between experimental quantification of the redox state and device simulation reveals that changes in donor concentration by a factor of 2-3 at electrode-oxide interfaces cause a modulation of the effective Schottky barrier and lead to >2 orders of magnitude change in device resistance. These findings allow realistic device simulations, opening a route to less empirical and more predictive design of future memory cells.
NASA Astrophysics Data System (ADS)
Baeumer, Christoph; Schmitz, Christoph; Marchewka, Astrid; Mueller, David N.; Valenta, Richard; Hackl, Johanna; Raab, Nicolas; Rogers, Steven P.; Khan, M. Imtiaz; Nemsak, Slavomir; Shim, Moonsub; Menzel, Stephan; Schneider, Claus Michael; Waser, Rainer; Dittmann, Regina
2016-08-01
The continuing revolutionary success of mobile computing and smart devices calls for the development of novel, cost- and energy-efficient memories. Resistive switching is attractive because of, inter alia, increased switching speed and device density. On electrical stimulus, complex nanoscale redox processes are suspected to induce a resistance change in memristive devices. Quantitative information about these processes, which has been experimentally inaccessible so far, is essential for further advances. Here we use in operando spectromicroscopy to verify that redox reactions drive the resistance change. A remarkable agreement between experimental quantification of the redox state and device simulation reveals that changes in donor concentration by a factor of 2-3 at electrode-oxide interfaces cause a modulation of the effective Schottky barrier and lead to >2 orders of magnitude change in device resistance. These findings allow realistic device simulations, opening a route to less empirical and more predictive design of future memory cells.
Feasibility study of molecular memory device based on DNA using methylation to store information
DOE Office of Scientific and Technical Information (OSTI.GOV)
Jiang, Liming; Al-Dirini, Feras; Center for Neural Engineering
DNA, because of its robustness and dense information storage capability, has been proposed as a potential candidate for next-generation storage media. However, encoding information into the DNA sequence requires molecular synthesis technology, which to date is costly and prone to synthesis errors. Reading the DNA strand information is also complex. Ideally, DNA storage will provide methods for modifying stored information. Here, we conduct a feasibility study investigating the use of the DNA 5-methylcytosine (5mC) methylation state as a molecular memory to store information. We propose a new 1-bit memory device and study, based on the density functional theory and non-equilibriummore » Green's function method, the feasibility of electrically reading the information. Our results show that changes to methylation states lead to changes in the peak of negative differential resistance which can be used to interrogate memory state. Our work demonstrates a new memory concept based on methylation state which can be beneficial in the design of next generation DNA based molecular electronic memory devices.« less
A review of emerging non-volatile memory (NVM) technologies and applications
NASA Astrophysics Data System (ADS)
Chen, An
2016-11-01
This paper will review emerging non-volatile memory (NVM) technologies, with the focus on phase change memory (PCM), spin-transfer-torque random-access-memory (STTRAM), resistive random-access-memory (RRAM), and ferroelectric field-effect-transistor (FeFET) memory. These promising NVM devices are evaluated in terms of their advantages, challenges, and applications. Their performance is compared based on reported parameters of major industrial test chips. Memory selector devices and cell structures are discussed. Changing market trends toward low power (e.g., mobile, IoT) and data-centric applications create opportunities for emerging NVMs. High-performance and low-cost emerging NVMs may simplify memory hierarchy, introduce non-volatility in logic gates and circuits, reduce system power, and enable novel architectures. Storage-class memory (SCM) based on high-density NVMs could fill the performance and density gap between memory and storage. Some unique characteristics of emerging NVMs can be utilized for novel applications beyond the memory space, e.g., neuromorphic computing, hardware security, etc. In the beyond-CMOS era, emerging NVMs have the potential to fulfill more important functions and enable more efficient, intelligent, and secure computing systems.
Signal and noise extraction from analog memory elements for neuromorphic computing.
Gong, N; Idé, T; Kim, S; Boybat, I; Sebastian, A; Narayanan, V; Ando, T
2018-05-29
Dense crossbar arrays of non-volatile memory (NVM) can potentially enable massively parallel and highly energy-efficient neuromorphic computing systems. The key requirements for the NVM elements are continuous (analog-like) conductance tuning capability and switching symmetry with acceptable noise levels. However, most NVM devices show non-linear and asymmetric switching behaviors. Such non-linear behaviors render separation of signal and noise extremely difficult with conventional characterization techniques. In this study, we establish a practical methodology based on Gaussian process regression to address this issue. The methodology is agnostic to switching mechanisms and applicable to various NVM devices. We show tradeoff between switching symmetry and signal-to-noise ratio for HfO 2 -based resistive random access memory. Then, we characterize 1000 phase-change memory devices based on Ge 2 Sb 2 Te 5 and separate total variability into device-to-device variability and inherent randomness from individual devices. These results highlight the usefulness of our methodology to realize ideal NVM devices for neuromorphic computing.
Memory function and supportive technology
Charness, Neil; Best, Ryan; Souders, Dustin
2013-01-01
Episodic and working memory processes show pronounced age-related decline, with other memory processes such as semantic, procedural, and metamemory less affected. Older adults tend to complain the most about prospective and retrospective memory failures. We introduce a framework for deciding how to mitigate memory decline using augmentation and substitution and discuss techniques that change the user, through mnemonics training, and change the tool or environment, by providing environmental support. We provide examples of low-tech and high-tech memory supports and discuss constraints on the utility of high-tech systems including effectiveness of devices, attitudes toward memory aids, and reliability of systems. PMID:24379752
Carbon nanomaterials for non-volatile memories
NASA Astrophysics Data System (ADS)
Ahn, Ethan C.; Wong, H.-S. Philip; Pop, Eric
2018-03-01
Carbon can create various low-dimensional nanostructures with remarkable electronic, optical, mechanical and thermal properties. These features make carbon nanomaterials especially interesting for next-generation memory and storage devices, such as resistive random access memory, phase-change memory, spin-transfer-torque magnetic random access memory and ferroelectric random access memory. Non-volatile memories greatly benefit from the use of carbon nanomaterials in terms of bit density and energy efficiency. In this Review, we discuss sp2-hybridized carbon-based low-dimensional nanostructures, such as fullerene, carbon nanotubes and graphene, in the context of non-volatile memory devices and architectures. Applications of carbon nanomaterials as memory electrodes, interfacial engineering layers, resistive-switching media, and scalable, high-performance memory selectors are investigated. Finally, we compare the different memory technologies in terms of writing energy and time, and highlight major challenges in the manufacturing, integration and understanding of the physical mechanisms and material properties.
Preparation and characterization of Sb2Se3 devices for memory applications
NASA Astrophysics Data System (ADS)
Shylashree, N.; Uma B., V.; Dhanush, S.; Abachi, Sagar; Nisarga, A.; Aashith, K.; Sangeetha B., G.
2018-05-01
In this paper, A phase change material of Sb2Se3 was proposed for non volatile memory application. The thin film device preparation and characterization were carried out. The deposition method used was vapor evaporation technique and a thickness of 180nm was deposited. The switching between the SET and RESET state is shown by the I-V characterization. The change of phase was studied using R-V characterization. Different fundamental modes were also identified using Raman spectroscopy.
Spin transport and spin torque in antiferromagnetic devices
Zelezny, J.; Wadley, P.; Olejnik, K.; ...
2018-03-02
Ferromagnets are key materials for sensing and memory applications. In contrast, antiferromagnets which represent the more common form of magnetically ordered materials, have found less practical application beyond their use for establishing reference magnetic orientations via exchange bias. This might change in the future due to the recent progress in materials research and discoveries of antiferromagnetic spintronic phenomena suitable for device applications. Experimental demonstration of the electrical switching and detection of the Néel order open a route towards memory devices based on antiferromagnets. Apart from the radiation and magnetic-field hardness, memory cells fabricated from antiferromagnets can be inherently multilevel, whichmore » could be used for neuromorphic computing. Switching speeds attainable in antiferromagnets far exceed those of ferromagnetic and semiconductor memory technologies. Here we review the recent progress in electronic spin-transport and spin-torque phenomena in antiferromagnets that are dominantly of the relativistic quantum mechanical origin. We discuss their utility in pure antiferromagnetic or hybrid ferromagnetic/antiferromagnetic memory devices.« less
Spin transport and spin torque in antiferromagnetic devices
DOE Office of Scientific and Technical Information (OSTI.GOV)
Zelezny, J.; Wadley, P.; Olejnik, K.
Ferromagnets are key materials for sensing and memory applications. In contrast, antiferromagnets which represent the more common form of magnetically ordered materials, have found less practical application beyond their use for establishing reference magnetic orientations via exchange bias. This might change in the future due to the recent progress in materials research and discoveries of antiferromagnetic spintronic phenomena suitable for device applications. Experimental demonstration of the electrical switching and detection of the Néel order open a route towards memory devices based on antiferromagnets. Apart from the radiation and magnetic-field hardness, memory cells fabricated from antiferromagnets can be inherently multilevel, whichmore » could be used for neuromorphic computing. Switching speeds attainable in antiferromagnets far exceed those of ferromagnetic and semiconductor memory technologies. Here we review the recent progress in electronic spin-transport and spin-torque phenomena in antiferromagnets that are dominantly of the relativistic quantum mechanical origin. We discuss their utility in pure antiferromagnetic or hybrid ferromagnetic/antiferromagnetic memory devices.« less
Spin transport and spin torque in antiferromagnetic devices
NASA Astrophysics Data System (ADS)
Železný, J.; Wadley, P.; Olejník, K.; Hoffmann, A.; Ohno, H.
2018-03-01
Ferromagnets are key materials for sensing and memory applications. In contrast, antiferromagnets, which represent the more common form of magnetically ordered materials, have found less practical application beyond their use for establishing reference magnetic orientations via exchange bias. This might change in the future due to the recent progress in materials research and discoveries of antiferromagnetic spintronic phenomena suitable for device applications. Experimental demonstration of the electrical switching and detection of the Néel order open a route towards memory devices based on antiferromagnets. Apart from the radiation and magnetic-field hardness, memory cells fabricated from antiferromagnets can be inherently multilevel, which could be used for neuromorphic computing. Switching speeds attainable in antiferromagnets far exceed those of ferromagnetic and semiconductor memory technologies. Here, we review the recent progress in electronic spin-transport and spin-torque phenomena in antiferromagnets that are dominantly of the relativistic quantum-mechanical origin. We discuss their utility in pure antiferromagnetic or hybrid ferromagnetic/antiferromagnetic memory devices.
Material Engineering for Phase Change Memory
NASA Astrophysics Data System (ADS)
Cabrera, David M.
As semiconductor devices continue to scale downward, and portable consumer electronics become more prevalent there is a need to develop memory technology that will scale with devices and use less energy, while maintaining performance. One of the leading prototypical memories that is being investigated is phase change memory. Phase change memory (PCM) is a non-volatile memory composed of 1 transistor and 1 resistor. The resistive structure includes a memory material alloy which can change between amorphous and crystalline states repeatedly using current/voltage pulses of different lengths and magnitudes. The most widely studied PCM materials are chalcogenides - Germanium-Antimony-Tellerium (GST) with Ge2Sb2Te3 and Germanium-Tellerium (GeTe) being some of the most popular stochiometries. As these cells are scaled downward, the current/voltage needed to switch these materials becomes comparable to the voltage needed to sense the cell's state. The International Roadmap for Semiconductors aims to raise the threshold field of these devices from 66.6 V/mum to be at least 375 V/mum for the year 2024. These cells are also prone to resistance drift between states, leading to bit corruption and memory loss. Phase change material properties are known to influence PCM device performance such as crystallization temperature having an effect on data retention and litetime, while resistivity values in the amorphous and crystalline phases have an effect on the current/voltage needed to write/erase the cell. Addition of dopants is also known to modify the phase change material parameters. The materials G2S2T5, GeTe, with dopants - nitrogen, silicon, titanium, and aluminum oxide and undoped Gallium-Antimonide (GaSb) are studied for these desired characteristics. Thin films of these compositions are deposited via physical vapor deposition at IBM Watson Research Center. Crystallization temperatures are investigated using time resolved x-ray diffraction at Brookhaven National Laboratory. Subsequently, these are incorporated into PCM cells with structure designed as shown in Fig.1. A photolithographic lift-off process is developed to realize these devices. Electrical parameters such as the voltage needed to switch the device between memory states, the difference in resistance between these memory states, and the amount of time to switch are studied using HP4145 equipped with a pulsed generator. The results show that incorporating aluminum oxide dopant into G2S2T 5 raises its threshold field from 60 V/mum to 96 V/mum, while for GeTe, nitrogen doping raises its threshold field from 143 V/mum to 248 V/mum. It is found that GaSb at comparable volume devices has a threshold field of 130 V/mum. It was also observed that nitrogen and silicon doping made G 2S2T5 more resistant to drift, raising time to drift from 2 to 16.6 minutes while titanium and aluminum oxide doping made GeTe drift time rise from 3 to 20 minutes. It was also found that shrinking the cell area in GaSb from 1 mum2 to 0.5 mum2 lengthened drift time from 45s to over 24 hours. The PCM process developed in this study is extended to GeTe/Sb2 Te3 multilayers called the superlattice (SL) structure that opens opportunities for future work. Recent studies have shown that the superlattice structure exhibits low switching energies, therefore has potential for low power operation.
NASA Astrophysics Data System (ADS)
Noé, Pierre; Vallée, Christophe; Hippert, Françoise; Fillot, Frédéric; Raty, Jean-Yves
2018-01-01
Chalcogenide phase-change materials (PCMs), such as Ge-Sb-Te alloys, have shown outstanding properties, which has led to their successful use for a long time in optical memories (DVDs) and, recently, in non-volatile resistive memories. The latter, known as PCM memories or phase-change random access memories (PCRAMs), are the most promising candidates among emerging non-volatile memory (NVM) technologies to replace the current FLASH memories at CMOS technology nodes under 28 nm. Chalcogenide PCMs exhibit fast and reversible phase transformations between crystalline and amorphous states with very different transport and optical properties leading to a unique set of features for PCRAMs, such as fast programming, good cyclability, high scalability, multi-level storage capability, and good data retention. Nevertheless, PCM memory technology has to overcome several challenges to definitively invade the NVM market. In this review paper, we examine the main technological challenges that PCM memory technology must face and we illustrate how new memory architecture, innovative deposition methods, and PCM composition optimization can contribute to further improvements of this technology. In particular, we examine how to lower the programming currents and increase data retention. Scaling down PCM memories for large-scale integration means the incorporation of the PCM into more and more confined structures and raises materials science issues in order to understand interface and size effects on crystallization. Other materials science issues are related to the stability and ageing of the amorphous state of PCMs. The stability of the amorphous phase, which determines data retention in memory devices, can be increased by doping the PCM. Ageing of the amorphous phase leads to a large increase of the resistivity with time (resistance drift), which has up to now hindered the development of ultra-high multi-level storage devices. A review of the current understanding of all these issues is provided from a materials science point of view.
Electrical Switching of Perovskite Thin-Film Resistors
NASA Technical Reports Server (NTRS)
Liu, Shangqing; Wu, Juan; Ignatiev, Alex
2010-01-01
Electronic devices that exploit electrical switching of physical properties of thin films of perovskite materials (especially colossal magnetoresistive materials) have been invented. Unlike some related prior devices, these devices function at room temperature and do not depend on externally applied magnetic fields. Devices of this type can be designed to function as sensors (exhibiting varying electrical resistance in response to varying temperature, magnetic field, electric field, and/or mechanical pressure) and as elements of electronic memories. The underlying principle is that the application of one or more short electrical pulse(s) can induce a reversible, irreversible, or partly reversible change in the electrical, thermal, mechanical, and magnetic properties of a thin perovskite film. The energy in the pulse must be large enough to induce the desired change but not so large as to destroy the film. Depending on the requirements of a specific application, the pulse(s) can have any of a large variety of waveforms (e.g., square, triangular, or sine) and be of positive, negative, or alternating polarity. In some applications, it could be necessary to use multiple pulses to induce successive incremental physical changes. In one class of applications, electrical pulses of suitable shapes, sizes, and polarities are applied to vary the detection sensitivities of sensors. Another class of applications arises in electronic circuits in which certain resistance values are required to be variable: Incorporating the affected resistors into devices of the present type makes it possible to control their resistances electrically over wide ranges, and the lifetimes of electrically variable resistors exceed those of conventional mechanically variable resistors. Another and potentially the most important class of applications is that of resistance-based nonvolatile-memory devices, such as a resistance random access memory (RRAM) described in the immediately following article, Electrically Variable Resistive Memory Devices (MFS-32511-1).
Nanoscale phase change memory materials.
Caldwell, Marissa A; Jeyasingh, Rakesh Gnana David; Wong, H-S Philip; Milliron, Delia J
2012-08-07
Phase change memory materials store information through their reversible transitions between crystalline and amorphous states. For typical metal chalcogenide compounds, their phase transition properties directly impact critical memory characteristics and the manipulation of these is a major focus in the field. Here, we discuss recent work that explores the tuning of such properties by scaling the materials to nanoscale dimensions, including fabrication and synthetic strategies used to produce nanoscale phase change memory materials. The trends that emerge are relevant to understanding how such memory technologies will function as they scale to ever smaller dimensions and also suggest new approaches to designing materials for phase change applications. Finally, the challenges and opportunities raised by integrating nanoscale phase change materials into switching devices are discussed.
Self-assembled phase-change nanowire for nonvolatile electronic memory
NASA Astrophysics Data System (ADS)
Jung, Yeonwoong
One of the most important subjects in nanosciences is to identify and exploit the relationship between size and structural/physical properties of materials and to explore novel material properties at a small-length scale. Scale-down of materials is not only advantageous in realizing miniaturized devices but nanometer-sized materials often exhibit intriguing physical/chemical properties that greatly differ from their bulk counterparts. This dissertation studies self-assembled phase-change nanowires for future nonvolatile electronic memories, mainly focusing on their size-dependent memory switching properties. Owing to the one-dimensional, unique geometry coupled with the small and tunable sizes, bottom-designed nanowires offer great opportunities in terms for both fundamental science and practical engineering perspectives, which would be difficult to realize in conventional top-down based approaches. We synthesized chalcogenide phase-change nanowires of different compositions and sizes, and studied their electronic memory switching owing to the structural change between crystalline and amorphous phases. In particular, we investigated nanowire size-dependent memory switching parameters, including writing current, power consumption, and data retention times, as well as studying composition-dependent electronic properties. The observed size and composition-dependent switching and recrystallization kinetics are explained based on the heat transport model and heterogeneous nucleation theories, which help to design phase-change materials with better properties. Moreover, we configured unconventional heterostructured phase-change nanowire memories and studied their multiple memory states in single nanowire devices. Finally, by combining in-situ/ex-situ electron microscopy techniques and electrical measurements, we characterized the structural states involved in electrically-driven phase-change in order to understand the atomistic mechanism that governs the electronic memory switching through phase-change.
NASA Astrophysics Data System (ADS)
Gyanathan, Ashvini; Yeo, Yee-Chia
2012-11-01
This work demonstrates a novel two-bit multi-level device structure comprising three phase change material (PCM) layers, separated by SiN thermal barrier layers. This triple PCM stack consisted of (from bottom to top), Ge2Sb2Te5 (GST), an ultrathin SiN barrier, nitrogen-doped GST, another ultrathin SiN barrier, and Ag0.5In0.5Sb3Te6. The PCM layers can selectively amorphize to form 4 different resistance levels ("00," "01," "10," and "11") using respective voltage pulses. Electrical characterization was extensively performed on these devices. Thermal analysis was also done to understand the physics behind the phase changing characteristics of the two-bit memory devices. The melting and crystallization temperatures of the PCMs play important roles in the power consumption of the multi-level devices. The electrical resistivities and thermal conductivities of the PCMs and the SiN thermal barrier are also crucial factors contributing to the phase changing behaviour of the PCMs in the two-bit multi-level PCRAM device.
Hayakawa, Ryoma; Higashiguchi, Kenji; Matsuda, Kenji; Chikyow, Toyohiro; Wakayama, Yutaka
2013-11-13
We demonstrated optical manipulation of single-electron tunneling (SET) by photoisomerization of diarylethene molecules in a metal-insulator-semiconductor (MIS) structure. Stress is placed on the fact that device operation is realized in the practical device configuration of MIS structure and that it is not achieved in structures based on nanogap electrodes and scanning probe techniques. Namely, this is a basic memory device configuration that has the potential for large-scale integration. In our device, the threshold voltage of SET was clearly modulated as a reversible change in the molecular orbital induced by photoisomerization, indicating that diarylethene molecules worked as optically controllable quantum dots. These findings will allow the integration of photonic functionality into current Si-based memory devices, which is a unique feature of organic molecules that is unobtainable with inorganic materials. Our proposed device therefore has enormous potential for providing a breakthrough in Si technology.
Short-term memory to long-term memory transition in a nanoscale memristor.
Chang, Ting; Jo, Sung-Hyun; Lu, Wei
2011-09-27
"Memory" is an essential building block in learning and decision-making in biological systems. Unlike modern semiconductor memory devices, needless to say, human memory is by no means eternal. Yet, forgetfulness is not always a disadvantage since it releases memory storage for more important or more frequently accessed pieces of information and is thought to be necessary for individuals to adapt to new environments. Eventually, only memories that are of significance are transformed from short-term memory into long-term memory through repeated stimulation. In this study, we show experimentally that the retention loss in a nanoscale memristor device bears striking resemblance to memory loss in biological systems. By stimulating the memristor with repeated voltage pulses, we observe an effect analogous to memory transition in biological systems with much improved retention time accompanied by additional structural changes in the memristor. We verify that not only the shape or the total number of stimuli is influential, but also the time interval between stimulation pulses (i.e., the stimulation rate) plays a crucial role in determining the effectiveness of the transition. The memory enhancement and transition of the memristor device was explained from the microscopic picture of impurity redistribution and can be qualitatively described by the same equations governing biological memories. © 2011 American Chemical Society
NASA Technical Reports Server (NTRS)
Virakas, G. I.; Matsyulevichyus, R. A.; Minkevichyus, K. P.; Potsyus, Z. Y.; Shirvinskas, B. D.
1973-01-01
Problems in measurement of irregularities in angular velocity of rotating assemblies in memory devices with rigid and flexible magnetic data carriers are discussed. A device and method for determination of change in angular velocities in various frequency and rotation rate ranges are examined. A schematic diagram of a photoelectric sensor for recording the signal pulses is provided. Mathematical models are developed to show the amount of error which can result from misalignment of the test equipment.
Avalanche atomic switching in strain engineered Sb2Te3-GeTe interfacial phase-change memory cells
NASA Astrophysics Data System (ADS)
Zhou, Xilin; Behera, Jitendra K.; Lv, Shilong; Wu, Liangcai; Song, Zhitang; Simpson, Robert E.
2017-09-01
By confining phase transitions to the nanoscale interface between two different crystals, interfacial phase change memory heterostructures represent the state of the art for energy efficient data storage. We present the effect of strain engineering on the electrical switching performance of the {{Sb}}2{{Te}}3-GeTe superlattice van der Waals devices. Multiple Ge atoms switching through a two-dimensional Te layer reduces the activation barrier for further atoms to switch; an effect that can be enhanced by biaxial strain. The out-of-plane phonon mode of the GeTe crystal remains active in the superlattice heterostructures. The large in-plane biaxial strain imposed by the {{Sb}}2{{Te}}3 layers on the GeTe layers substantially improves the switching speed, reset energy, and cyclability of the superlattice memory devices. Moreover, carefully controlling residual stress in the layers of {{Sb}}2{{Te}}3-GeTe interfacial phase change memories provides a new degree of freedom to design the properties of functional superlattice structures for memory and photonics applications.
Recent Advances on Neuromorphic Systems Using Phase-Change Materials
NASA Astrophysics Data System (ADS)
Wang, Lei; Lu, Shu-Ren; Wen, Jing
2017-05-01
Realization of brain-like computer has always been human's ultimate dream. Today, the possibility of having this dream come true has been significantly boosted due to the advent of several emerging non-volatile memory devices. Within these innovative technologies, phase-change memory device has been commonly regarded as the most promising candidate to imitate the biological brain, owing to its excellent scalability, fast switching speed, and low energy consumption. In this context, a detailed review concerning the physical principles of the neuromorphic circuit using phase-change materials as well as a comprehensive introduction of the currently available phase-change neuromorphic prototypes becomes imperative for scientists to continuously progress the technology of artificial neural networks. In this paper, we first present the biological mechanism of human brain, followed by a brief discussion about physical properties of phase-change materials that recently receive a widespread application on non-volatile memory field. We then survey recent research on different types of neuromorphic circuits using phase-change materials in terms of their respective geometrical architecture and physical schemes to reproduce the biological events of human brain, in particular for spike-time-dependent plasticity. The relevant virtues and limitations of these devices are also evaluated. Finally, the future prospect of the neuromorphic circuit based on phase-change technologies is envisioned.
Recent Advances on Neuromorphic Systems Using Phase-Change Materials.
Wang, Lei; Lu, Shu-Ren; Wen, Jing
2017-12-01
Realization of brain-like computer has always been human's ultimate dream. Today, the possibility of having this dream come true has been significantly boosted due to the advent of several emerging non-volatile memory devices. Within these innovative technologies, phase-change memory device has been commonly regarded as the most promising candidate to imitate the biological brain, owing to its excellent scalability, fast switching speed, and low energy consumption. In this context, a detailed review concerning the physical principles of the neuromorphic circuit using phase-change materials as well as a comprehensive introduction of the currently available phase-change neuromorphic prototypes becomes imperative for scientists to continuously progress the technology of artificial neural networks. In this paper, we first present the biological mechanism of human brain, followed by a brief discussion about physical properties of phase-change materials that recently receive a widespread application on non-volatile memory field. We then survey recent research on different types of neuromorphic circuits using phase-change materials in terms of their respective geometrical architecture and physical schemes to reproduce the biological events of human brain, in particular for spike-time-dependent plasticity. The relevant virtues and limitations of these devices are also evaluated. Finally, the future prospect of the neuromorphic circuit based on phase-change technologies is envisioned.
Energy-Efficient Phase-Change Memory with Graphene as a Thermal Barrier.
Ahn, Chiyui; Fong, Scott W; Kim, Yongsung; Lee, Seunghyun; Sood, Aditya; Neumann, Christopher M; Asheghi, Mehdi; Goodson, Kenneth E; Pop, Eric; Wong, H-S Philip
2015-10-14
Phase-change memory (PCM) is an important class of data storage, yet lowering the programming current of individual devices is known to be a significant challenge. Here we improve the energy-efficiency of PCM by placing a graphene layer at the interface between the phase-change material, Ge2Sb2Te5 (GST), and the bottom electrode (W) heater. Graphene-PCM (G-PCM) devices have ∼40% lower RESET current compared to control devices without the graphene. This is attributed to the graphene as an added interfacial thermal resistance which helps confine the generated heat inside the active PCM volume. The G-PCM achieves programming up to 10(5) cycles, and the graphene could further enhance the PCM endurance by limiting atomic migration or material segregation at the bottom electrode interface.
Ga-doped indium oxide nanowire phase change random access memory cells
NASA Astrophysics Data System (ADS)
Jin, Bo; Lim, Taekyung; Ju, Sanghyun; Latypov, Marat I.; Kim, Hyoung Seop; Meyyappan, M.; Lee, Jeong-Soo
2014-02-01
Phase change random access memory (PCRAM) devices are usually constructed using tellurium based compounds, but efforts to seek other materials providing desirable memory characteristics have continued. We have fabricated PCRAM devices using Ga-doped In2O3 nanowires with three different Ga compositions (Ga/(In+Ga) atomic ratio: 2.1%, 11.5% and 13.0%), and investigated their phase switching properties. The nanowires (˜40 nm in diameter) can be repeatedly switched between crystalline and amorphous phases, and Ga concentration-dependent memory switching behavior in the nanowires was observed with ultra-fast set/reset rates of 80 ns/20 ns, which are faster than for other competitive phase change materials. The observations of fast set/reset rates and two distinct states with a difference in resistance of two to three orders of magnitude appear promising for nonvolatile information storage. Moreover, we found that increasing the Ga concentration can reduce the power consumption and resistance drift; however, too high a level of Ga doping may cause difficulty in achieving the phase transition.
Fully transparent, non-volatile bipolar resistive memory based on flexible copolyimide films
NASA Astrophysics Data System (ADS)
Yu, Hwan-Chul; Kim, Moon Young; Hong, Minki; Nam, Kiyong; Choi, Ju-Young; Lee, Kwang-Hun; Baeck, Kyoung Koo; Kim, Kyoung-Kook; Cho, Soohaeng; Chung, Chan-Moon
2017-01-01
Partially aliphatic homopolyimides and copolyimides were prepared from rel-(1'R,3S,5'S)-spiro[furan-3(2H),6'-[3]oxabicyclo[3.2.1]octane]-2,2',4',5(4H)-tetrone (DAn), 2,6-diaminoanthracene (AnDA), and 4,4'-oxydianiline (ODA) by varying the molar ratio of AnDA and ODA. We utilized these polyimide films as the resistive switching layer in transparent memory devices. While WORM memory behavior was obtained with the PI-A100-O0-based device (molar feed ratio of DAn : AnDA : ODA = 1 : 1 : 0), the PI-A70-O30-based device (molar feed ratio of DAn : AnDA : ODA = 1 : 0.7 : 0.3) exhibited bipolar resistive switching behavior with stable retention for 104 s. This result implies that the memory properties can be controlled by changing the polyimide composition. The two devices prepared from PI-A100-O0 and PI-A70-O30 showed over 90% transmittance in the visible wavelength range from 400 to 800 nm. The behavior of the memory devices is considered to be governed by trap-controlled, space-charge limited conduction (SCLC) and local filament formation. [Figure not available: see fulltext.
Scientific developments of liquid crystal-based optical memory: a review
NASA Astrophysics Data System (ADS)
Prakash, Jai; Chandran, Achu; Biradar, Ashok M.
2017-01-01
The memory behavior in liquid crystals (LCs), although rarely observed, has made very significant headway over the past three decades since their discovery in nematic type LCs. It has gone from a mere scientific curiosity to application in variety of commodities. The memory element formed by numerous LCs have been protected by patents, and some commercialized, and used as compensation to non-volatile memory devices, and as memory in personal computers and digital cameras. They also have the low cost, large area, high speed, and high density memory needed for advanced computers and digital electronics. Short and long duration memory behavior for industrial applications have been obtained from several LC materials, and an LC memory with interesting features and applications has been demonstrated using numerous LCs. However, considerable challenges still exist in searching for highly efficient, stable, and long-lifespan materials and methods so that the development of useful memory devices is possible. This review focuses on the scientific and technological approach of fascinating applications of LC-based memory. We address the introduction, development status, novel design and engineering principles, and parameters of LC memory. We also address how the amalgamation of LCs could bring significant change/improvement in memory effects in the emerging field of nanotechnology, and the application of LC memory as the active component for futuristic and interesting memory devices.
Scientific developments of liquid crystal-based optical memory: a review.
Prakash, Jai; Chandran, Achu; Biradar, Ashok M
2017-01-01
The memory behavior in liquid crystals (LCs), although rarely observed, has made very significant headway over the past three decades since their discovery in nematic type LCs. It has gone from a mere scientific curiosity to application in variety of commodities. The memory element formed by numerous LCs have been protected by patents, and some commercialized, and used as compensation to non-volatile memory devices, and as memory in personal computers and digital cameras. They also have the low cost, large area, high speed, and high density memory needed for advanced computers and digital electronics. Short and long duration memory behavior for industrial applications have been obtained from several LC materials, and an LC memory with interesting features and applications has been demonstrated using numerous LCs. However, considerable challenges still exist in searching for highly efficient, stable, and long-lifespan materials and methods so that the development of useful memory devices is possible. This review focuses on the scientific and technological approach of fascinating applications of LC-based memory. We address the introduction, development status, novel design and engineering principles, and parameters of LC memory. We also address how the amalgamation of LCs could bring significant change/improvement in memory effects in the emerging field of nanotechnology, and the application of LC memory as the active component for futuristic and interesting memory devices.
CMOS compatible electrode materials selection in oxide-based memory devices
NASA Astrophysics Data System (ADS)
Zhuo, V. Y.-Q.; Li, M.; Guo, Y.; Wang, W.; Yang, Y.; Jiang, Y.; Robertson, J.
2016-07-01
Electrode materials selection guidelines for oxide-based memory devices are constructed from the combined knowledge of observed device operation characteristics, ab-initio calculations, and nano-material characterization. It is demonstrated that changing the top electrode material from Ge to Cr to Ta in the Ta2O5-based memory devices resulted in a reduction of the operation voltages and current. Energy Dispersed X-ray (EDX) Spectrometer analysis clearly shows that the different top electrode materials scavenge oxygen ions from the Ta2O5 memory layer at various degrees, leading to different oxygen vacancy concentrations within the Ta2O5, thus the observed trends in the device performance. Replacing the Pt bottom electrode material with CMOS compatible materials (Ru and Ir) further reduces the power consumption and can be attributed to the modification of the Schottky barrier height and oxygen vacancy concentration at the electrode/oxide interface. Both trends in the device performance and EDX results are corroborated by the ab-initio calculations which reveal that the electrode material tunes the oxygen vacancy concentration via the oxygen chemical potential and defect formation energy. This experimental-theoretical approach strongly suggests that the proper selection of CMOS compatible electrode materials will create the critical oxygen vacancy concentration to attain low power memory performance.
Shape memory polymer network with thermally distinct elasticity and plasticity.
Zhao, Qian; Zou, Weike; Luo, Yingwu; Xie, Tao
2016-01-01
Stimuli-responsive materials with sophisticated yet controllable shape-changing behaviors are highly desirable for real-world device applications. Among various shape-changing materials, the elastic nature of shape memory polymers allows fixation of temporary shapes that can recover on demand, whereas polymers with exchangeable bonds can undergo permanent shape change via plasticity. We integrate the elasticity and plasticity into a single polymer network. Rational molecular design allows these two opposite behaviors to be realized at different temperature ranges without any overlap. By exploring the cumulative nature of the plasticity, we demonstrate easy manipulation of highly complex shapes that is otherwise extremely challenging. The dynamic shape-changing behavior paves a new way for fabricating geometrically complex multifunctional devices.
Controllable SET process in O-Ti-Sb-Te based phase change memory for synaptic application
NASA Astrophysics Data System (ADS)
Ren, Kun; Li, Ruiheng; Chen, Xin; Wang, Yong; Shen, Jiabin; Xia, Mengjiao; Lv, Shilong; Ji, Zhenguo; Song, Zhitang
2018-02-01
The nonlinear resistance change and small bit resolution of phase change memory (PCM) under identical operation pulses will limit its performance as a synaptic device. The octahedral Ti-Te units in Ti-Sb-Te, regarded as nucleation seeds, are degenerated when Ti is bonded with O, causing a slower crystallization and a controllable SET process in PCM cells. A linear resistance change under identical pulses, a resolution of ˜8 bits, and an ON/OFF ratio of ˜102 has been achieved in O-Ti-Sb-Te based PCM, showing its potential application as a synaptic device to improve recognition performance of the neural network.
Memory device using movement of protons
Warren, W.L.; Vanheusden, K.J.R.; Fleetwood, D.M.; Devine, R.A.B.
1998-11-03
An electrically written memory element is disclosed utilizing the motion of protons within a dielectric layer surrounded by layers on either side to confine the protons within the dielectric layer with electrode means attached to the surrounding layers to change the spatial position of the protons within the dielectric layer. The device is preferably constructed as a silicon-silicon dioxide-silicon layered structure with the protons being introduced to the structure laterally through the exposed edges of the silicon dioxide layer during a high temperature anneal in an atmosphere containing hydrogen gas. The device operates at low power, is preferably nonvolatile, is radiation tolerant, and is compatible with convention silicon MOS processing for integration with other microelectronic elements on the same silicon substrate. With the addition of an optically active layer, the memory element becomes an electrically written, optically read optical memory element. 19 figs.
Memory device using movement of protons
Warren, William L.; Vanheusden, Karel J. R.; Fleetwood, Daniel M.; Devine, Roderick A. B.
1998-01-01
An electrically written memory element utilizing the motion of protons within a dielectric layer surrounded by layers on either side to confine the protons within the dielectric layer with electrode means attached to the surrounding layers to change the spatial position of the protons within the dielectric layer. The device is preferably constructed as a silicon-silicon dioxide-silicon layered structure with the protons being introduced to the structure laterally through the exposed edges of the silicon dioxide layer during a high temperature anneal in an atmosphere containing hydrogen gas. The device operates at low power, is preferably nonvolatile, is radiation tolerant, and is compatible with convention silicon MOS processing for integration with other microelectronic elements on the same silicon substrate. With the addition of an optically active layer, the memory element becomes an electrically written, optically read optical memory element.
Memory device using movement of protons
Warren, William L.; Vanheusden, Karel J. R.; Fleetwood, Daniel M.; Devine, Roderick A. B.
2000-01-01
An electrically written memory element utilizing the motion of protons within a dielectric layer surrounded by layers on either side to confine the protons within the dielectric layer with electrode means attached to the surrounding layers to change the spatial position of the protons within the dielectric layer. The device is preferably constructed as a silicon-silicon dioxide-silicon layered structure with the protons being introduced to the structure laterally through the exposed edges of the silicon dioxide layer during a high temperature anneal in an atmosphere containing hydrogen gas. The device operates at low power, is preferably nonvolatile, is radiation tolerant, and is compatible with convention silicon MOS processing for integration with other microelectronic elements on the same silicon substrate. With the addition of an optically active layer, the memory element becomes an electrically written, optically read optical memory element.
Sub-10 nm Ta Channel Responsible for Superior Performance of a HfO 2 Memristor
DOE Office of Scientific and Technical Information (OSTI.GOV)
Jiang, Hao; Han, Lili; Lin, Peng
Memristive devices are promising candidates for the next generation non-volatile memory and neuromorphic computing. It has been widely accepted that the motion of oxygen anions leads to the resistance changes for valence-change-memory (VCM) type of materials. Only very recently it was speculated that metal cations could also play an important role, but no direct physical characterizations have been reported yet. We report a Ta/HfO 2/Pt memristor with fast switching speed, record high endurance (120 billion cycles) and reliable retention. We also programmed the device to 24 discrete resistance levels, and also demonstrated over a million (220) epochs of potentiation andmore » depression, suggesting that our devices can be used for both multi-level non-volatile memory and neuromorphic computing applications. More importantly, we directly observed a sub-10 nm Ta-rich and O-deficient conduction channel within the HfO 2 layer that is responsible for the switching. Our work deepens our understanding of the resistance switching mechanism behind oxide-based memristive devices and paves the way for further device performance optimization for a broad spectrum of applications.« less
Sub-10 nm Ta Channel Responsible for Superior Performance of a HfO 2 Memristor
Jiang, Hao; Han, Lili; Lin, Peng; ...
2016-06-23
Memristive devices are promising candidates for the next generation non-volatile memory and neuromorphic computing. It has been widely accepted that the motion of oxygen anions leads to the resistance changes for valence-change-memory (VCM) type of materials. Only very recently it was speculated that metal cations could also play an important role, but no direct physical characterizations have been reported yet. We report a Ta/HfO 2/Pt memristor with fast switching speed, record high endurance (120 billion cycles) and reliable retention. We also programmed the device to 24 discrete resistance levels, and also demonstrated over a million (220) epochs of potentiation andmore » depression, suggesting that our devices can be used for both multi-level non-volatile memory and neuromorphic computing applications. More importantly, we directly observed a sub-10 nm Ta-rich and O-deficient conduction channel within the HfO 2 layer that is responsible for the switching. Our work deepens our understanding of the resistance switching mechanism behind oxide-based memristive devices and paves the way for further device performance optimization for a broad spectrum of applications.« less
Multilevel Resistance Programming in Conductive Bridge Resistive Memory
NASA Astrophysics Data System (ADS)
Mahalanabis, Debayan
This work focuses on the existence of multiple resistance states in a type of emerging non-volatile resistive memory device known commonly as Programmable Metallization Cell (PMC) or Conductive Bridge Random Access Memory (CBRAM), which can be important for applications such as multi-bit memory as well as non-volatile logic and neuromorphic computing. First, experimental data from small signal, quasi-static and pulsed mode electrical characterization of such devices are presented which clearly demonstrate the inherent multi-level resistance programmability property in CBRAM devices. A physics based analytical CBRAM compact model is then presented which simulates the ion-transport dynamics and filamentary growth mechanism that causes resistance change in such devices. Simulation results from the model are fitted to experimental dynamic resistance switching characteristics. The model designed using Verilog-a language is computation-efficient and can be integrated with industry standard circuit simulation tools for design and analysis of hybrid circuits involving both CMOS and CBRAM devices. Three main circuit applications for CBRAM devices are explored in this work. Firstly, the susceptibility of CBRAM memory arrays to single event induced upsets is analyzed via compact model simulation and experimental heavy ion testing data that show possibility of both high resistance to low resistance and low resistance to high resistance transitions due to ion strikes. Next, a non-volatile sense amplifier based flip-flop architecture is proposed which can help make leakage power consumption negligible by allowing complete shutdown of power supply while retaining its output data in CBRAM devices. Reliability and energy consumption of the flip-flop circuit for different CBRAM low resistance levels and supply voltage values are analyzed and compared to CMOS designs. Possible extension of this architecture for threshold logic function computation using the CBRAM devices as re-configurable resistive weights is also discussed. Lastly, Spike timing dependent plasticity (STDP) based gradual resistance change behavior in CBRAM device fabricated in back-end-of-line on a CMOS die containing integrate and fire CMOS neuron circuits is demonstrated for the first time which indicates the feasibility of using CBRAM devices as electronic synapses in spiking neural network hardware implementations for non-Boolean neuromorphic computing.
Shukla, Krishna Dayal; Saxena, Nishant; Manivannan, Anbarasu
2017-12-01
Recent advancements in commercialization of high-speed non-volatile electronic memories including phase change memory (PCM) have shown potential not only for advanced data storage but also for novel computing concepts. However, an in-depth understanding on ultrafast electrical switching dynamics is a key challenge for defining the ultimate speed of nanoscale memory devices that demands for an unconventional electrical setup, specifically capable of handling extremely fast electrical pulses. In the present work, an ultrafast programmable electrical tester (PET) setup has been developed exceptionally for unravelling time-resolved electrical switching dynamics and programming characteristics of nanoscale memory devices at the picosecond (ps) time scale. This setup consists of novel high-frequency contact-boards carefully designed to capture extremely fast switching transient characteristics within 200 ± 25 ps using time-resolved current-voltage measurements. All the instruments in the system are synchronized using LabVIEW, which helps to achieve various programming characteristics such as voltage-dependent transient parameters, read/write operations, and endurance test of memory devices systematically using short voltage pulses having pulse parameters varied from 1 ns rise/fall time and 1.5 ns pulse width (full width half maximum). Furthermore, the setup has successfully demonstrated strikingly one order faster switching characteristics of Ag 5 In 5 Sb 60 Te 30 (AIST) PCM devices within 250 ps. Hence, this novel electrical setup would be immensely helpful for realizing the ultimate speed limits of various high-speed memory technologies for future computing.
NASA Astrophysics Data System (ADS)
Shukla, Krishna Dayal; Saxena, Nishant; Manivannan, Anbarasu
2017-12-01
Recent advancements in commercialization of high-speed non-volatile electronic memories including phase change memory (PCM) have shown potential not only for advanced data storage but also for novel computing concepts. However, an in-depth understanding on ultrafast electrical switching dynamics is a key challenge for defining the ultimate speed of nanoscale memory devices that demands for an unconventional electrical setup, specifically capable of handling extremely fast electrical pulses. In the present work, an ultrafast programmable electrical tester (PET) setup has been developed exceptionally for unravelling time-resolved electrical switching dynamics and programming characteristics of nanoscale memory devices at the picosecond (ps) time scale. This setup consists of novel high-frequency contact-boards carefully designed to capture extremely fast switching transient characteristics within 200 ± 25 ps using time-resolved current-voltage measurements. All the instruments in the system are synchronized using LabVIEW, which helps to achieve various programming characteristics such as voltage-dependent transient parameters, read/write operations, and endurance test of memory devices systematically using short voltage pulses having pulse parameters varied from 1 ns rise/fall time and 1.5 ns pulse width (full width half maximum). Furthermore, the setup has successfully demonstrated strikingly one order faster switching characteristics of Ag5In5Sb60Te30 (AIST) PCM devices within 250 ps. Hence, this novel electrical setup would be immensely helpful for realizing the ultimate speed limits of various high-speed memory technologies for future computing.
Review of radiation effects on ReRAM devices and technology
NASA Astrophysics Data System (ADS)
Gonzalez-Velo, Yago; Barnaby, Hugh J.; Kozicki, Michael N.
2017-08-01
A review of the ionizing radiation effects on resistive random access memory (ReRAM) technology and devices is presented in this article. The review focuses on vertical devices exhibiting bipolar resistance switching, devices that have already exhibited interesting properties and characteristics for memory applications and, in particular, for non-volatile memory applications. Non-volatile memories are important devices for any type of electronic and embedded system, as they are for space applications. In such applications, specific environmental issues related to the existence of cosmic rays and Van Allen radiation belts around the Earth contribute to specific failure mechanisms related to the energy deposition induced by such ionizing radiation. Such effects are important in non-volatile memory as the current leading technology, i.e. flash-based technology, is sensitive to the total ionizing dose (TID) and single-event effects. New technologies such as ReRAM, if competing with or complementing the existing non-volatile area of memories from the point of view of performance, also have to exhibit great reliability for use in radiation environments such as space. This has driven research on the radiation effects of such ReRAM technology, on both the conductive-bridge RAM as well as the valence-change memories, or OxRAM variants of the technology. Initial characterizations of ReRAM technology showed a high degree of resilience to TID, developing researchers’ interest in characterizing such resilience as well as investigating the cause of such behavior. The state of the art of such research is reviewed in this article.
NASA Astrophysics Data System (ADS)
Vyas, Giriraj; Dagar, Parveen; Sahu, Satyajit
2016-06-01
We have fabricated an organic non-volatile memory device wherein the ON/OFF current ratio has been controlled by varying the concentration of a small organic molecule, 2,3-Dichloro-5,6-dicyano-p-benzoquinone (DDQ), in an insulating matrix of a polymer Poly(4-vinylphenol) (PVP). A maximum ON-OFF ratio of 106 is obtained when the concentration of DDQ is half or 10 wt. % of PVP. In this process, the switching direction for the devices has also been altered, indicating the disparity in conduction mechanism. Conduction due to metal filament formation through the active material and the voltage dependent conformational change of the organic molecule seem to be the motivation behind the gradual change in the switching direction.
Shape memory polymer network with thermally distinct elasticity and plasticity
Zhao, Qian; Zou, Weike; Luo, Yingwu; Xie, Tao
2016-01-01
Stimuli-responsive materials with sophisticated yet controllable shape-changing behaviors are highly desirable for real-world device applications. Among various shape-changing materials, the elastic nature of shape memory polymers allows fixation of temporary shapes that can recover on demand, whereas polymers with exchangeable bonds can undergo permanent shape change via plasticity. We integrate the elasticity and plasticity into a single polymer network. Rational molecular design allows these two opposite behaviors to be realized at different temperature ranges without any overlap. By exploring the cumulative nature of the plasticity, we demonstrate easy manipulation of highly complex shapes that is otherwise extremely challenging. The dynamic shape-changing behavior paves a new way for fabricating geometrically complex multifunctional devices. PMID:26824077
Ultralow-power switching via defect engineering in germanium telluride phase-change memory devices.
Nukala, Pavan; Lin, Chia-Chun; Composto, Russell; Agarwal, Ritesh
2016-01-25
Crystal-amorphous transformation achieved via the melt-quench pathway in phase-change memory involves fundamentally inefficient energy conversion events; and this translates to large switching current densities, responsible for chemical segregation and device degradation. Alternatively, introducing defects in the crystalline phase can engineer carrier localization effects enhancing carrier-lattice coupling; and this can efficiently extract work required to introduce bond distortions necessary for amorphization from input electrical energy. Here, by pre-inducing extended defects and thus carrier localization effects in crystalline GeTe via high-energy ion irradiation, we show tremendous improvement in amorphization current densities (0.13-0.6 MA cm(-2)) compared with the melt-quench strategy (∼50 MA cm(-2)). We show scaling behaviour and good reversibility on these devices, and explore several intermediate resistance states that are accessible during both amorphization and recrystallization pathways. Existence of multiple resistance states, along with ultralow-power switching and scaling capabilities, makes this approach promising in context of low-power memory and neuromorphic computation.
Ultralow-power switching via defect engineering in germanium telluride phase-change memory devices
Nukala, Pavan; Lin, Chia-Chun; Composto, Russell; Agarwal, Ritesh
2016-01-01
Crystal–amorphous transformation achieved via the melt-quench pathway in phase-change memory involves fundamentally inefficient energy conversion events; and this translates to large switching current densities, responsible for chemical segregation and device degradation. Alternatively, introducing defects in the crystalline phase can engineer carrier localization effects enhancing carrier–lattice coupling; and this can efficiently extract work required to introduce bond distortions necessary for amorphization from input electrical energy. Here, by pre-inducing extended defects and thus carrier localization effects in crystalline GeTe via high-energy ion irradiation, we show tremendous improvement in amorphization current densities (0.13–0.6 MA cm−2) compared with the melt-quench strategy (∼50 MA cm−2). We show scaling behaviour and good reversibility on these devices, and explore several intermediate resistance states that are accessible during both amorphization and recrystallization pathways. Existence of multiple resistance states, along with ultralow-power switching and scaling capabilities, makes this approach promising in context of low-power memory and neuromorphic computation. PMID:26805748
NASA Astrophysics Data System (ADS)
Baek, Burm
Superconducting-ferromagnetic hybrid devices have potential for a practical memory technology compatible with superconducting logic circuits and may help realize energy-efficient, high-performance superconducting computers. We have developed Josephson junction devices with pseudo-spin-valve barriers. We observed changes in Josephson critical current depending on the magnetization state of the barrier (parallel or anti-parallel) through the superconductor-ferromagnet proximity effect. This effect persists to nanoscale devices in contrast to the remanent field effect. In nanopillar devices, the magnetization states of the pseudo-spin-valve barriers could also be switched with applied bias currents at 4 K, which is consistent with the spin-transfer torque effect in analogous room-temperature spin valve devices. These results demonstrate devices that combine major superconducting and spintronic effects for scalable read and write of memory states, respectively. Further challenges and proposals towards practical devices will also be discussed.In collaboration with: William Rippard, NIST - Boulder, Matthew Pufall, NIST - Boulder, Stephen Russek, NIST-Boulder, Michael Schneider, NIST - Boulder, Samuel Benz, NIST - Boulder, Horst Rogalla, NIST-Boulder, Paul Dresselhaus, NIST - Boulder
Switching behavior of resistive change memory using oxide nanowires
NASA Astrophysics Data System (ADS)
Aono, Takashige; Sugawa, Kosuke; Shimizu, Tomohiro; Shingubara, Shoso; Takase, Kouichi
2018-06-01
Resistive change random access memory (ReRAM), which is expected to be the next-generation nonvolatile memory, often has wide switching voltage distributions due to many kinds of conductive filaments. In this study, we have tried to suppress the distribution through the structural restriction of the filament-forming area using NiO nanowires. The capacitor with Ni metal nanowires whose surface is oxidized showed good switching behaviors with narrow distributions. The knowledge gained from our study will be very helpful in producing practical ReRAM devices.
NASA Astrophysics Data System (ADS)
Liu, Y.; Chen, T. P.; Liu, Z.; Yu, Y. F.; Yu, Q.; Li, P.; Fung, S.
2011-12-01
The resistive switching device based on a Ni-rich nickel oxide thin film exhibits an inherent learning ability of a neural network. The device has the short-term-memory and long-term-memory functions analogous to those of the human brain, depending on the history of its experience of voltage pulsing or sweeping. Neuroplasticity could be realized with the device, as the device can be switched from a high-resistance state to a low-resistance state due to the formation of stable filaments by a series of electrical pulses, resembling the changes such as the growth of new connections and the creation of new neurons in the brain in response to experience.
NASA Astrophysics Data System (ADS)
Kumar, Dayanand; Aluguri, Rakesh; Chand, Umesh; Tseng, Tseung-Yuen
2018-04-01
Ta5Si3-based conductive bridge random access memory (CBRAM) devices have been investigated to improve their resistive switching characteristics for their application in future nonvolatile memory technology. Changes in the switching characteristics by the addition of a thin Al2O3 layer of different thicknesses at the bottom electrode interface of a Ta5Si3-based CBRAM devices have been studied. The double-layer device with a 1 nm Al2O3 layer has shown improved resistive switching characteristics over the single layer one with a high on/off resistance ratio of 102, high endurance of more than 104 cycles, and good retention for more than 105 s at the temperature of 130 °C. The higher thermal conductivity of Al2O3 over Ta5Si3 has been attributed to the enhanced switching properties of the double-layer devices.
NASA Astrophysics Data System (ADS)
Xu, Cheng; Liu, Bo; Chen, Yi-Feng; Liang, Shuang; Song, Zhi-Tang; Feng, Song-Lin; Wan, Xu-Dong; Yang, Zuo-Ya; Xie, Joseph; Chen, Bomy
2008-05-01
A Ge2Sb2Te5 based phase change memory device cell integrated with metal-oxide semiconductor field effect transistor (MOSFET) is fabricated using standard 0. 18 μm complementary metal-oxide semiconductor process technology. It shows steady switching characteristics in the dc current-voltage measurement. The phase changing phenomenon from crystalline state to amorphous state with a voltage pulse altitude of 2.0 V and pulse width of 50 ns is also obtained. These results show the feasibility of integrating phase change memory cell with MOSFET.
DOE Office of Scientific and Technical Information (OSTI.GOV)
Tan, Chun Chia; Zhao, Rong, E-mail: zhao-rong@sutd.edu.sg; Chong, Tow Chong
2014-10-13
Nitrogen-doped titanium-tungsten (N-TiW) was proposed as a tunable heater in Phase Change Random Access Memory (PCRAM). By tuning N-TiW's material properties through doping, the heater can be tailored to optimize the access speed and programming current of PCRAM. Experiments reveal that N-TiW's resistivity increases and thermal conductivity decreases with increasing nitrogen-doping ratio, and N-TiW devices displayed (∼33% to ∼55%) reduced programming currents. However, there is a tradeoff between the current and speed for heater-based PCRAM. Analysis of devices with different N-TiW heaters shows that N-TiW doping levels could be optimized to enable low RESET currents and fast access speeds.
Hydrogen doping in HfO{sub 2} resistance change random access memory
DOE Office of Scientific and Technical Information (OSTI.GOV)
Duncan, D.; Magyari-Köpe, B.; Nishi, Y.
2016-01-25
The structures and energies of hydrogen-doped monoclinic hafnium dioxide were calculated using density-functional theory. The electronic interactions are described within the LDA + U formalism, where on-site Coulomb corrections are applied to the 5d orbital electrons of Hf atoms and 2p orbital electrons of the O atoms. The effects of charge state, defect-defect interactions, and hydrogenation are investigated and compared with experiment. It is found that hydrogenation of HfO{sub 2} resistance-change random access memory devices energetically stabilizes the formation of oxygen vacancies and conductive vacancy filaments through multiple mechanisms, leading to improved switching characteristic and device yield.
Towards a drift-free multi-level Phase Change Memory
NASA Astrophysics Data System (ADS)
Cinar, Ibrahim; Ozdemir, Servet; Cogulu, Egecan; Gokce, Aisha; Stipe, Barry; Katine, Jordan; Aktas, Gulen; Ozatay, Ozhan
For ultra-high density data storage applications, Phase Change Memory (PCM) is considered a potentially disruptive technology. Yet, the long-term reliability of the logic levels corresponding to the resistance states of a PCM device is an important issue for a stable device operation since the resistance levels drift uncontrollably in time. The underlying mechanism for the resistance drift is considered as the structural relaxation and spontaneous crystallization at elevated temperatures. We fabricated a nanoscale single active layer-phase change memory cell with three resistance levels corresponding to crystalline, amorphous and intermediate states by controlling the current injection site geometry. For the intermediate state and the reset state, the activation energies and the trap distances have been found to be 0.021 eV and 0.235 eV, 1.31 nm and 7.56 nm, respectively. We attribute the ultra-low and weakly temperature dependent drift coefficient of the intermediate state (ν = 0.0016) as opposed to that of the reset state (ν = 0.077) as being due to the dominant contribution of the interfacial defects in electrical transport in the case of the mixed phase. Our results indicate that the engineering of interfacial defects will enable a drift-free multi-level PCM device design.
Overview of emerging nonvolatile memory technologies
2014-01-01
Nonvolatile memory technologies in Si-based electronics date back to the 1990s. Ferroelectric field-effect transistor (FeFET) was one of the most promising devices replacing the conventional Flash memory facing physical scaling limitations at those times. A variant of charge storage memory referred to as Flash memory is widely used in consumer electronic products such as cell phones and music players while NAND Flash-based solid-state disks (SSDs) are increasingly displacing hard disk drives as the primary storage device in laptops, desktops, and even data centers. The integration limit of Flash memories is approaching, and many new types of memory to replace conventional Flash memories have been proposed. Emerging memory technologies promise new memories to store more data at less cost than the expensive-to-build silicon chips used by popular consumer gadgets including digital cameras, cell phones and portable music players. They are being investigated and lead to the future as potential alternatives to existing memories in future computing systems. Emerging nonvolatile memory technologies such as magnetic random-access memory (MRAM), spin-transfer torque random-access memory (STT-RAM), ferroelectric random-access memory (FeRAM), phase-change memory (PCM), and resistive random-access memory (RRAM) combine the speed of static random-access memory (SRAM), the density of dynamic random-access memory (DRAM), and the nonvolatility of Flash memory and so become very attractive as another possibility for future memory hierarchies. Many other new classes of emerging memory technologies such as transparent and plastic, three-dimensional (3-D), and quantum dot memory technologies have also gained tremendous popularity in recent years. Subsequently, not an exaggeration to say that computer memory could soon earn the ultimate commercial validation for commercial scale-up and production the cheap plastic knockoff. Therefore, this review is devoted to the rapidly developing new class of memory technologies and scaling of scientific procedures based on an investigation of recent progress in advanced Flash memory devices. PMID:25278820
Overview of emerging nonvolatile memory technologies.
Meena, Jagan Singh; Sze, Simon Min; Chand, Umesh; Tseng, Tseung-Yuen
2014-01-01
Nonvolatile memory technologies in Si-based electronics date back to the 1990s. Ferroelectric field-effect transistor (FeFET) was one of the most promising devices replacing the conventional Flash memory facing physical scaling limitations at those times. A variant of charge storage memory referred to as Flash memory is widely used in consumer electronic products such as cell phones and music players while NAND Flash-based solid-state disks (SSDs) are increasingly displacing hard disk drives as the primary storage device in laptops, desktops, and even data centers. The integration limit of Flash memories is approaching, and many new types of memory to replace conventional Flash memories have been proposed. Emerging memory technologies promise new memories to store more data at less cost than the expensive-to-build silicon chips used by popular consumer gadgets including digital cameras, cell phones and portable music players. They are being investigated and lead to the future as potential alternatives to existing memories in future computing systems. Emerging nonvolatile memory technologies such as magnetic random-access memory (MRAM), spin-transfer torque random-access memory (STT-RAM), ferroelectric random-access memory (FeRAM), phase-change memory (PCM), and resistive random-access memory (RRAM) combine the speed of static random-access memory (SRAM), the density of dynamic random-access memory (DRAM), and the nonvolatility of Flash memory and so become very attractive as another possibility for future memory hierarchies. Many other new classes of emerging memory technologies such as transparent and plastic, three-dimensional (3-D), and quantum dot memory technologies have also gained tremendous popularity in recent years. Subsequently, not an exaggeration to say that computer memory could soon earn the ultimate commercial validation for commercial scale-up and production the cheap plastic knockoff. Therefore, this review is devoted to the rapidly developing new class of memory technologies and scaling of scientific procedures based on an investigation of recent progress in advanced Flash memory devices.
Low latency and persistent data storage
Fitch, Blake G; Franceschini, Michele M; Jagmohan, Ashish; Takken, Todd E
2014-02-18
Persistent data storage is provided by a method that includes receiving a low latency store command that includes write data. The write data is written to a first memory device that is implemented by a nonvolatile solid-state memory technology characterized by a first access speed. It is acknowledged that the write data has been successfully written to the first memory device. The write data is written to a second memory device that is implemented by a volatile memory technology. At least a portion of the data in the first memory device is written to a third memory device when a predetermined amount of data has been accumulated in the first memory device. The third memory device is implemented by a nonvolatile solid-state memory technology characterized by a second access speed that is slower than the first access speed.
Proton Irradiation of the 16GB Intel Optane SSD
NASA Technical Reports Server (NTRS)
Wyrwas, E. J.
2017-01-01
The purpose of this test is to assess the single event effects (SEE) and radiation susceptibility of the Intel Optane Memory device (SSD) containing the 3D Xpoint phase change memory (PCM) technology. This test is supported by the NASA Electronics Parts and Packaging Program (NEPP).
NASA Astrophysics Data System (ADS)
Lu, Bin; Cheng, Xiaomin; Feng, Jinlong; Guan, Xiawei; Miao, Xiangshui
2016-07-01
Nonvolatile memory devices or circuits that can implement both storage and calculation are a crucial requirement for the efficiency improvement of modern computer. In this work, we realize logic functions by using [GeTe/Sb2Te3]n super lattice phase change memory (PCM) cell in which higher threshold voltage is needed for phase change with a magnetic field applied. First, the [GeTe/Sb2Te3]n super lattice cells were fabricated and the R-V curve was measured. Then we designed the logic circuits with the super lattice PCM cell verified by HSPICE simulation and experiments. Seven basic logic functions are first demonstrated in this letter; then several multi-input logic gates are presented. The proposed logic devices offer the advantages of simple structures and low power consumption, indicating that the super lattice PCM has the potential in the future nonvolatile central processing unit design, facilitating the development of massive parallel computing architecture.
Application of nanomaterials in two-terminal resistive-switching memory devices
Ouyang, Jianyong
2010-01-01
Nanometer materials have been attracting strong attention due to their interesting structure and properties. Many important practical applications have been demonstrated for nanometer materials based on their unique properties. This article provides a review on the fabrication, electrical characterization, and memory application of two-terminal resistive-switching devices using nanomaterials as the active components, including metal and semiconductor nanoparticles (NPs), nanotubes, nanowires, and graphenes. There are mainly two types of device architectures for the two-terminal devices with NPs. One has a triple-layer structure with a metal film sandwiched between two organic semiconductor layers, and the other has a single polymer film blended with NPs. These devices can be electrically switched between two states with significant different resistances, i.e. the ‘ON’ and ‘OFF’ states. These render the devices important application as two-terminal non-volatile memory devices. The electrical behavior of these devices can be affected by the materials in the active layer and the electrodes. Though the mechanism for the electrical switches has been in argument, it is generally believed that the resistive switches are related to charge storage on the NPs. Resistive switches were also observed on crossbars formed by nanotubes, nanowires, and graphene ribbons. The resistive switches are due to nanoelectromechanical behavior of the materials. The Coulombic interaction of transient charges on the nanomaterials affects the configurable gap of the crossbars, which results into significant change in current through the crossbars. These nanoelectromechanical devices can be used as fast-response and high-density memory devices as well. PMID:22110862
Low latency and persistent data storage
Fitch, Blake G; Franceschini, Michele M; Jagmohan, Ashish; Takken, Todd
2014-11-04
Persistent data storage is provided by a computer program product that includes computer program code configured for receiving a low latency store command that includes write data. The write data is written to a first memory device that is implemented by a nonvolatile solid-state memory technology characterized by a first access speed. It is acknowledged that the write data has been successfully written to the first memory device. The write data is written to a second memory device that is implemented by a volatile memory technology. At least a portion of the data in the first memory device is written to a third memory device when a predetermined amount of data has been accumulated in the first memory device. The third memory device is implemented by a nonvolatile solid-state memory technology characterized by a second access speed that is slower than the first access speed.
Apparatus and methods for memory using in-plane polarization
DOE Office of Scientific and Technical Information (OSTI.GOV)
Liu, Junwei; Chang, Kai; Ji, Shuai-Hua
A memory device includes a semiconductor layer with an in-plane polarization component switchable between a first direction and a second direction. A writing electrode is employed to apply a writing voltage to the semiconductor layer to change the in-plane polarization component between the first direction and the second direction. A reading electrode is employed to apply a reading voltage to the semiconductor layer to measure a tunneling current substantially perpendicular to the polarization direction of the in-plane polarization component. The directions of the reading voltage and the writing voltage are substantially perpendicular to each other. Therefore, the reading process ismore » non-destructive. Thin films (e.g., one unit cell thick) of ferroelectric material can be used in the memory device to increase the miniaturization of the device.« less
Multifunctional shape-memory polymers.
Behl, Marc; Razzaq, Muhammad Yasar; Lendlein, Andreas
2010-08-17
The thermally-induced shape-memory effect (SME) is the capability of a material to change its shape in a predefined way in response to heat. In shape-memory polymers (SMP) this shape change is the entropy-driven recovery of a mechanical deformation, which was obtained before by application of external stress and was temporarily fixed by formation of physical crosslinks. The high technological significance of SMP becomes apparent in many established products (e.g., packaging materials, assembling devices, textiles, and membranes) and the broad SMP development activities in the field of biomedical as well as aerospace applications (e.g., medical devices or morphing structures for aerospace vehicles). Inspired by the complex and diverse requirements of these applications fundamental research is aiming at multifunctional SMP, in which SME is combined with additional functions and is proceeding rapidly. In this review different concepts for the creation of multifunctionality are derived from the various polymer network architectures of thermally-induced SMP. Multimaterial systems, such as nanocomposites, are described as well as one-component polymer systems, in which independent functions are integrated. Future challenges will be to transfer the concept of multifunctionality to other emerging shape-memory technologies like light-sensitive SMP, reversible shape changing effects or triple-shape polymers.
A visual-display and storage device
NASA Technical Reports Server (NTRS)
Bosomworth, D. R.; Moles, W. H.
1972-01-01
Memory and display device uses cathodochromic material to store visual information and fast phosphor to recall information for display and electronic processing. Cathodochromic material changes color when bombarded with electrons, and is restored to its original color when exposed to light of appropiate wavelength.
System and method for programmable bank selection for banked memory subsystems
Blumrich, Matthias A.; Chen, Dong; Gara, Alan G.; Giampapa, Mark E.; Hoenicke, Dirk; Ohmacht, Martin; Salapura, Valentina; Sugavanam, Krishnan
2010-09-07
A programmable memory system and method for enabling one or more processor devices access to shared memory in a computing environment, the shared memory including one or more memory storage structures having addressable locations for storing data. The system comprises: one or more first logic devices associated with a respective one or more processor devices, each first logic device for receiving physical memory address signals and programmable for generating a respective memory storage structure select signal upon receipt of pre-determined address bit values at selected physical memory address bit locations; and, a second logic device responsive to each of the respective select signal for generating an address signal used for selecting a memory storage structure for processor access. The system thus enables each processor device of a computing environment memory storage access distributed across the one or more memory storage structures.
Memory device using movement of protons
Warren, William L.; Vanheusden, Karel J. R.; Fleetwood, Daniel M.; Devine, Roderick A. B.; Archer, Leo B.; Brown, George A.; Wallace, Robert M.
2000-01-01
An enhancement of an electrically written memory element utilizing the motion of protons within a dielectric layer surrounded by layers on either side to confine the protons within the dielectric layer with electrode means attached to the surrounding layers to change the spatial position of the protons within the dielectric layer. The device is preferably constructed as a silicon-silicon dioxide-silicon layered structure with the protons being introduced to the structure during an anneal in an atmosphere containing hydrogen gas. Device operation is enhanced by concluding this anneal step with a sudden cooling. The device operates at low power, is preferably nonvolatile, is radiation tolerant, and is compatible with convention silicon MOS processing for integration with other microelectronics elements on the same silicon substrate.
A self-resetting spiking phase-change neuron
NASA Astrophysics Data System (ADS)
Cobley, R. A.; Hayat, H.; Wright, C. D.
2018-05-01
Neuromorphic, or brain-inspired, computing applications of phase-change devices have to date concentrated primarily on the implementation of phase-change synapses. However, the so-called accumulation mode of operation inherent in phase-change materials and devices can also be used to mimic the integrative properties of a biological neuron. Here we demonstrate, using physical modelling of nanoscale devices and SPICE modelling of associated circuits, that a single phase-change memory cell integrated into a comparator type circuit can deliver a basic hardware mimic of an integrate-and-fire spiking neuron with self-resetting capabilities. Such phase-change neurons, in combination with phase-change synapses, can potentially open a new route for the realisation of all-phase-change neuromorphic computing.
A self-resetting spiking phase-change neuron.
Cobley, R A; Hayat, H; Wright, C D
2018-05-11
Neuromorphic, or brain-inspired, computing applications of phase-change devices have to date concentrated primarily on the implementation of phase-change synapses. However, the so-called accumulation mode of operation inherent in phase-change materials and devices can also be used to mimic the integrative properties of a biological neuron. Here we demonstrate, using physical modelling of nanoscale devices and SPICE modelling of associated circuits, that a single phase-change memory cell integrated into a comparator type circuit can deliver a basic hardware mimic of an integrate-and-fire spiking neuron with self-resetting capabilities. Such phase-change neurons, in combination with phase-change synapses, can potentially open a new route for the realisation of all-phase-change neuromorphic computing.
Accessing global data from accelerator devices
Bertolli, Carlo; O'Brien, John K.; Sallenave, Olivier H.; Sura, Zehra N.
2016-12-06
An aspect includes a table of contents (TOC) that was generated by a compiler being received at an accelerator device. The TOC includes an address of global data in a host memory space. The global data is copied from the address in the host memory space to an address in the device memory space. The address in the host memory space is obtained from the received TOC. The received TOC is updated to indicate that global data is stored at the address in the device memory space. A kernel that accesses the global data from the address in the device memory space is executed. The address in the device memory space is obtained based on contents of the updated TOC. When the executing is completed, the global data from the address in the device memory space is copied to the address in the host memory space.
An UV photochromic memory effect in proton-based WO3 electrochromic devices
NASA Astrophysics Data System (ADS)
Zhang, Yong; Lee, S.-H.; Mascarenhas, A.; Deb, S. K.
2008-11-01
We report an UV photochromic memory effect on a standard proton-based WO3 electrochromic device. It exhibits two memory states, associated with the colored and bleached states of the device, respectively. Such an effect can be used to enhance device performance (increasing the dynamic range), re-energize commercial electrochromic devices, and develop memory devices.
Li, Hongze; Gao, Xiang; Luo, Yingwu
2016-04-07
Multi-shape memory polymers were prepared by the macroscale spatio-assembly of building blocks in this work. The building blocks were methyl acrylate-co-styrene (MA-co-St) copolymers, which have the St-block-(St-random-MA)-block-St tri-block chain sequence. This design ensures that their transition temperatures can be adjusted over a wide range by varying the composition of the middle block. The two St blocks at the chain ends can generate a crosslink network in the final device to achieve strong bonding force between building blocks and the shape memory capacity. Due to their thermoplastic properties, 3D printing was employed for the spatio-assembly to build devices. This method is capable of introducing many transition phases into one device and preparing complicated shapes via 3D printing. The device can perform a complex action via a series of shape changes. Besides, this method can avoid the difficult programing of a series of temporary shapes. The control of intermediate temporary shapes was realized via programing the shapes and locations of building blocks in the final device.
Kowalczyk, Philippe; Hippert, Françoise; Bernier, Nicolas; Mocuta, Cristian; Sabbione, Chiara; Batista-Pessoa, Walter; Noé, Pierre
2018-06-01
Van der Waals layered GeTe/Sb 2 Te 3 superlattices (SLs) have demonstrated outstanding performances for use in resistive memories in so-called interfacial phase-change memory (iPCM) devices. GeTe/Sb 2 Te 3 SLs are made by periodically stacking ultrathin GeTe and Sb 2 Te 3 crystalline layers. The mechanism of the resistance change in iPCM devices is still highly debated. Recent experimental studies on SLs grown by molecular beam epitaxy or pulsed laser deposition indicate that the local structure does not correspond to any of the previously proposed structural models. Here, a new insight is given into the complex structure of prototypical GeTe/Sb 2 Te 3 SLs deposited by magnetron sputtering, which is the used industrial technique for SL growth in iPCM devices. X-ray diffraction analysis shows that the structural quality of the SL depends critically on its stoichiometry. Moreover, high-angle annular dark-field-scanning transmission electron microscopy analysis of the local atomic order in a perfectly stoichiometric SL reveals the absence of GeTe layers, and that Ge atoms intermix with Sb atoms in, for instance, Ge 2 Sb 2 Te 5 blocks. This result shows that an alternative structural model is required to explain the origin of the electrical contrast and the nature of the resistive switching mechanism observed in iPCM devices. © 2018 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.
NASA Astrophysics Data System (ADS)
Weems, Andrew C.; Boyle, Anthony J.; Maitland, Duncan J.
2017-03-01
The long-term shape-recovery behavior of shape memory polymers has often been shown to be dependent on the length of time the material has been stored in the secondary shape. Typically, recovery performance and shape fixity will decrease with increased time in the secondary shape. In medical materials, a shelf-life is crucial to establish as it sets the upper threshold for device performance in a clinical setting, and a reduction in shape recovery would limit the development of SMP medical devices. Here, we present a two-year study of strain recovery, strain fixity, and shape recovery kinetics for passively and actively actuated SMPs intended for vascular devices. While kinetic experiments using immersion DMA indicate slight material relaxation and a decrease in the time to recovery, these changes are not found for bulk recovery experiments. The results indicate that a two-year shelf-life for these SMPs is very reasonable, as there is no change in the recovery kinetics, strain recovery, or strain fixity associated with this aging time. Further, a thermal accelerated aging test is presented for more rapid testing of the shape memory behavior of these SMPs and is compared with the real time aging results, indicating that this test is a reasonable indicator of the two-year behavior.
A FPGA-based Measurement System for Nonvolatile Semiconductor Memory Characterization
NASA Astrophysics Data System (ADS)
Bu, Jiankang; White, Marvin
2002-03-01
Low voltage, long retention, high density SONOS nonvolatile semiconductor memory (NVSM) devices are ideally suited for PCMCIA, FLASH and 'smart' cards. The SONOS memory transistor requires characterization with an accurate, rapid measurement system with minimum disturbance to the device. The FPGA-based measurement system includes three parts: 1) a pattern generator implemented with XILINX FPGAs and corresponding software, 2) a high-speed, constant-current, threshold voltage detection circuit, 3) and a data evaluation program, implemented with a LABVIEW program. Fig. 1 shows the general block diagram of the FPGA-based measurement system. The function generator is designed and simulated with XILINX Foundation Software. Under the control of the specific erase/write/read pulses, the analog detect circuit applies operational modes to the SONOS device under test (DUT) and determines the change of the memory-state of the SONOS nonvolatile memory transistor. The TEK460 digitizes the analog threshold voltage output and sends to the PC computer. The data is filtered and averaged with a LABVIEWTM program running on the PC computer and displayed on the monitor in real time. We have implemented the pattern generator with XILINX FPGAs. Fig. 2 shows the block diagram of the pattern generator. We realized the logic control by a method of state machine design. Fig. 3 shows a small part of the state machine. The flexibility of the FPGAs enhances the capabilities of this system and allows measurement variations without hardware changes. The characterization of the nonvolatile memory transistor device under test (DUT), as function of programming voltage and time, is achieved by a high-speed, constant-current threshold voltage detection circuit. The analog detection circuit incorporating fast analog switches controlled digitally with the FPGAs. The schematic circuit diagram is shown in Fig. 4. The various operational modes for the DUT are realized with control signals applied to the analog switches (SW) as shown in Fig. 5. A LABVIEWTM program, on a PC platform, collects and processes the data. The data is displayed on the monitor in real time. This time-domain filtering reduces the digitizing error. Fig. 6 shows the data processing. SONOS nonvolatile semiconductor memories are characterized by erase/write, retention and endurance measurements. Fig. 7 shows the erase/write characteristics of an n-Channel, 5V prog-rammable SONOS memory transistor. Fig.8 shows the retention characteristic of the same SONOS transistor. We have used this system to characterize SONOS nonvolatile semiconductor memory transistors. The attractive features of the test system design lies in the cost-effectiveness and flexibility of the test pattern implementation, fast read-out of memory state, low power, high precision determination of the device threshold voltage, and perhaps most importantly, minimum disturbance, which is indispensable for nonvolatile memory characterization.
Investigation of Hafnium oxide/Copper resistive memory for advanced encryption applications
NASA Astrophysics Data System (ADS)
Briggs, Benjamin D.
The Advanced Encryption Standard (AES) is a widely used encryption algorithm to protect data and communications in today's digital age. Modern AES CMOS implementations require large amounts of dedicated logic and must be tuned for either performance or power consumption. A high throughput, low power, and low die area AES implementation is required in the growing mobile sector. An emerging non-volatile memory device known as resistive memory (ReRAM) is a simple metal-insulator-metal capacitor device structure with the ability to switch between two stable resistance states. Currently, ReRAM is targeted as a non-volatile memory replacement technology to eventually replace flash. Its advantages over flash include ease of fabrication, speed, and lower power consumption. In addition to memory, ReRAM can also be used in advanced logic implementations given its purely resistive behavior. The combination of a new non-volatile memory element ReRAM along with high performance, low power CMOS opens new avenues for logic implementations. This dissertation will cover the design and process implementation of a ReRAM-CMOS hybrid circuit, built using IBM's 10LPe process, for the improvement of hardware AES implementations. Further the device characteristics of ReRAM, specifically the HfO2/Cu memory system, and mechanisms for operation are not fully correlated. Of particular interest to this work is the role of material properties such as the stoichiometry, crystallinity, and doping of the HfO2 layer and their effect on the switching characteristics of resistive memory. Material properties were varied by a combination of atomic layer deposition and reactive sputtering of the HfO2 layer. Several studies will be discussed on how the above mentioned material properties influence switching parameters, and change the underlying physics of device operation.
NASA Technical Reports Server (NTRS)
Hall, William A. (Inventor)
1993-01-01
A bus programmable slave module card for use in a computer control system is disclosed which comprises a master computer and one or more slave computer modules interfacing by means of a bus. Each slave module includes its own microprocessor, memory, and control program for acting as a single loop controller. The slave card includes a plurality of memory means (S1, S2...) corresponding to a like plurality of memory devices (C1, C2...) in the master computer, for each slave memory means its own communication lines connectable through the bus with memory communication lines of an associated memory device in the master computer, and a one-way electronic door which is switchable to either a closed condition or a one-way open condition. With the door closed, communication lines between master computer memory (C1, C2...) and slave memory (S1, S2...) are blocked. In the one-way open condition invention, the memory communication lines or each slave memory means (S1, S2...) connect with the memory communication lines of its associated memory device (C1, C2...) in the master computer, and the memory devices (C1, C2...) of the master computer and slave card are electrically parallel such that information seen by the master's memory is also seen by the slave's memory. The slave card is also connectable to a switch for electronically removing the slave microprocessor from the system. With the master computer and the slave card in programming mode relationship, and the slave microprocessor electronically removed from the system, loading a program in the memory devices (C1, C2...) of the master accomplishes a parallel loading into the memory devices (S1, S2...) of the slave.
Accessing global data from accelerator devices
DOE Office of Scientific and Technical Information (OSTI.GOV)
Bertolli, Carlo; O'Brien, John K.; Sallenave, Olivier H.
2016-12-06
An aspect includes a table of contents (TOC) that was generated by a compiler being received at an accelerator device. The TOC includes an address of global data in a host memory space. The global data is copied from the address in the host memory space to an address in the device memory space. The address in the host memory space is obtained from the received TOC. The received TOC is updated to indicate that global data is stored at the address in the device memory space. A kernel that accesses the global data from the address in the devicemore » memory space is executed. The address in the device memory space is obtained based on contents of the updated TOC. When the executing is completed, the global data from the address in the device memory space is copied to the address in the host memory space.« less
Dual drain MOSFET detector for crosstie memory systems
NASA Astrophysics Data System (ADS)
Bluzer, N.
1985-03-01
This patent application, which discloses a circuit for detecting binary information in crosstie memory systems includes a dual drain MOSFET device having a single channel with a common source and an integrated, thin-film strip of magnetic material suitable for the storage and propagation of Bloch line-crosstie pairs acting as both a shift register and the device's gate. Current flowing through the device, in the absence of a magnetic field, is equally distributed to each drain; however, changing magnetic fields, normal to the plane of the device and generated by Bloch line-crosstie pairs in the strip, interact with the current such that a distribution imbalance exists and one drain or the other receives a disproportionate fraction of the current depending upon the direction of the magnetic field.
Song, Ji-Min; Lee, Jang-Sik
2016-01-01
Metal-oxide-based resistive switching memory device has been studied intensively due to its potential to satisfy the requirements of next-generation memory devices. Active research has been done on the materials and device structures of resistive switching memory devices that meet the requirements of high density, fast switching speed, and reliable data storage. In this study, resistive switching memory devices were fabricated with nano-template-assisted bottom up growth. The electrochemical deposition was adopted to achieve the bottom-up growth of nickel nanodot electrodes. Nickel oxide layer was formed by oxygen plasma treatment of nickel nanodots at low temperature. The structures of fabricated nanoscale memory devices were analyzed with scanning electron microscope and atomic force microscope (AFM). The electrical characteristics of the devices were directly measured using conductive AFM. This work demonstrates the fabrication of resistive switching memory devices using self-assembled nanoscale masks and nanomateirals growth from bottom-up electrochemical deposition. PMID:26739122
Memory hierarchy using row-based compression
Loh, Gabriel H.; O'Connor, James M.
2016-10-25
A system includes a first memory and a device coupleable to the first memory. The device includes a second memory to cache data from the first memory. The second memory includes a plurality of rows, each row including a corresponding set of compressed data blocks of non-uniform sizes and a corresponding set of tag blocks. Each tag block represents a corresponding compressed data block of the row. The device further includes decompression logic to decompress data blocks accessed from the second memory. The device further includes compression logic to compress data blocks to be stored in the second memory.
Materials and other needs for advanced phase change memory (Presentation Recording)
NASA Astrophysics Data System (ADS)
Sosa, Norma E.
2015-09-01
Phase change memory (PCM), with its long history, may now hold its brightest promise to date. This bright future is being fueled by the "push" from big data. PCM is a non-volatile memory technology used to create solid-state random access memory devices that operate based the resistance properties of materials. Employing the electrical resistance differences-as opposed to differences in charge stored-between the amorphous and crystalline phases of the material, PCM can store bits, namely one's and zero's. Indeed, owing to the method of storage, PCM can in fact be designed to hold multiple bits thus leading to a high-density technology twice the storage density and less than half the cost of DRAM, the main kind found in typical personal computers. It has been long known that PCM can fill a need gap that spans 3 decades in performance from DRAM to solid state drive (NAND Flash). Furthermore, PCM devices can lead to performance and reliability improvements essential to enabling significant steps forward to supporting big data centric computing. This talk will focus on the science and challenges of aggressive scaling to realize the density needed, how this scaling challenge is intertwined with materials needs for endurance into the giga-cycles, and the associated forefront research aiming to realizing multi-level functionality into these nanoscale programmable resistor devices.
Federal Register 2010, 2011, 2012, 2013, 2014
2011-09-07
... Access Memory and Nand Flash Memory Devices and Products Containing Same; Notice of Institution of... importation, and the sale within the United States after importation of certain dynamic random access memory and NAND flash memory devices and products containing same by reason of infringement of certain claims...
Nonvolatile Memory Technology for Space Applications
NASA Technical Reports Server (NTRS)
Oldham, Timothy R.; Irom, Farokh; Friendlich, Mark; Nguyen, Duc; Kim, Hak; Berg, Melanie; LaBel, Kenneth A.
2010-01-01
This slide presentation reviews several forms of nonvolatile memory for use in space applications. The intent is to: (1) Determine inherent radiation tolerance and sensitivities, (2) Identify challenges for future radiation hardening efforts, (3) Investigate new failure modes and effects, and technology modeling programs. Testing includes total dose, single event (proton, laser, heavy ion), and proton damage (where appropriate). Test vehicles are expected to be a variety of non-volatile memory devices as available including Flash (NAND and NOR), Charge Trap, Nanocrystal Flash, Magnetic Memory (MRAM), Phase Change--Chalcogenide, (CRAM), Ferroelectric (FRAM), CNT, and Resistive RAM.
Redox driven conductance changes for resistive memory
NASA Astrophysics Data System (ADS)
Shoute, Lian C. T.; Pekas, Nikola; Wu, Yiliang; McCreery, Richard L.
2011-03-01
The relationship between bias-induced redox reactions and resistance switching is considered for memory devices containing TiO2 or a conducting polymer in "molecular heterojunctions" consisting of thin (2-25 nm) films of covalently bonded molecules, polymers, and oxides. Raman spectroscopy was used to monitor changes in the oxidation state of polythiophene in Au/P3HT/SiO2/Au devices, and it was possible to directly determine the formation and stability of the conducting polaron state of P3HT by applied bias pulses [P3HT = poly(3-hexyl thiophene)]. Polaron formation was strongly dependent on junction composition, particularly on the interfaces between the polymer, oxide, and electrodes. In all cases, trace water was required for polaron formation, leading to the proposal that water reduction acts as a redox counter-reaction to polymer oxidation. Polaron stability was longest for the case of a direct contact between Au and SiO2, implying that catalytic water reduction at the Au surface generated hydroxide ions which stabilized the cationic polaron. The spectroscopic information about the dependence of polaron stability on device composition will be useful for designing and monitoring resistive switching memory based on conducting polymers, with or without TiO2 present.
Shape-morphing composites with designed micro-architectures
NASA Astrophysics Data System (ADS)
Rodriguez, Jennifer N.; Zhu, Cheng; Duoss, Eric B.; Wilson, Thomas S.; Spadaccini, Christopher M.; Lewicki, James P.
2016-06-01
Shape memory polymers (SMPs) are attractive materials due to their unique mechanical properties, including high deformation capacity and shape recovery. SMPs are easier to process, lightweight, and inexpensive compared to their metallic counterparts, shape memory alloys. However, SMPs are limited to relatively small form factors due to their low recovery stresses. Lightweight, micro-architected composite SMPs may overcome these size limitations and offer the ability to combine functional properties (e.g., electrical conductivity) with shape memory behavior. Fabrication of 3D SMP thermoset structures via traditional manufacturing methods is challenging, especially for designs that are composed of multiple materials within porous microarchitectures designed for specific shape change strategies, e.g. sequential shape recovery. We report thermoset SMP composite inks containing some materials from renewable resources that can be 3D printed into complex, multi-material architectures that exhibit programmable shape changes with temperature and time. Through addition of fiber-based fillers, we demonstrate printing of electrically conductive SMPs where multiple shape states may induce functional changes in a device and that shape changes can be actuated via heating of printed composites. The ability of SMPs to recover their original shapes will be advantageous for a broad range of applications, including medical, aerospace, and robotic devices.
Logic computation in phase change materials by threshold and memory switching.
Cassinerio, M; Ciocchini, N; Ielmini, D
2013-11-06
Memristors, namely hysteretic devices capable of changing their resistance in response to applied electrical stimuli, may provide new opportunities for future memory and computation, thanks to their scalable size, low switching energy and nonvolatile nature. We have developed a functionally complete set of logic functions including NOR, NAND and NOT gates, each utilizing a single phase-change memristor (PCM) where resistance switching is due to the phase transformation of an active chalcogenide material. The logic operations are enabled by the high functionality of nanoscale phase change, featuring voltage comparison, additive crystallization and pulse-induced amorphization. The nonvolatile nature of memristive states provides the basis for developing reconfigurable hybrid logic/memory circuits featuring low-power and high-speed switching. © 2013 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.
mHealth and memory aids: levels of smartphone ownership in patients.
Migo, Ellen M; Haynes, Becky I; Harris, Lara; Friedner, Kim; Humphreys, Kate; Kopelman, Michael D
2015-01-01
The use of mobile devices to deliver healthcare has not yet been exploited in neuropsychological rehabilitation. Smartphones have the potential to serve as multi-functional memory aids. To investigate whether patients attending a clinic for mixed memory problems own smartphones, to determine whether this could be a widely applicable medium to use as a memory aids device. A questionnaire on smartphone ownership was given to an opportunity sample of consecutive patients attending a neuropsychiatry and memory disorders outpatient clinic. Data were collected in 2012 and repeated 12 months later in 2013 to assess changes over time. Ownership of mobile phones was stable between 2012 (81%) and 2013 (85%), but ownership of smartphones showed a significant increase (from 26% to 40%). Age negatively predicted smartphone ownership. Despite cognitive or psychiatric problems, our patient group are as likely to own a mobile phone as a member of the general population. Ownership levels are at 40% and likely to increase in the future. Exploring how smartphones and their apps could function as memory aids is likely to be useful for a large enough number of patients to be clinically worthwhile.
Kim, Tae-Wook; Choi, Hyejung; Oh, Seung-Hwan; Jo, Minseok; Wang, Gunuk; Cho, Byungjin; Kim, Dong-Yu; Hwang, Hyunsang; Lee, Takhee
2009-01-14
The resistive switching characteristics of polyfluorene-derivative polymer material in a sub-micron scale via-hole device structure were investigated. The scalable via-hole sub-microstructure was fabricated using an e-beam lithographic technique. The polymer non-volatile memory devices varied in size from 40 x 40 microm(2) to 200 x 200 nm(2). From the scaling of junction size, the memory mechanism can be attributed to the space-charge-limited current with filamentary conduction. Sub-micron scale polymer memory devices showed excellent resistive switching behaviours such as a large ON/OFF ratio (I(ON)/I(OFF) approximately 10(4)), excellent device-to-device switching uniformity, good sweep endurance, and good retention times (more than 10,000 s). The successful operation of sub-micron scale memory devices of our polyfluorene-derivative polymer shows promise to fabricate high-density polymer memory devices.
Park, Jun-Ho; Park, Myung-Joo; Lee, Jang-Sik
2017-01-05
The development of paper electronics would enable realization of extremely cheap devices for portable, disposable, and environmentally-benign electronics. Here, we propose a simple dry-writing tool similar to a pencil, which can be used to draw electrically conducting lines on paper for use in paper-based electronic devices. The fabricated pencil is composed of silver nanoparticles decorated on graphene layers to construct layered hybrid nanostructures. This pencil can draw highly conductive lines that are flexible and foldable on conventional papers. Electrodes drawn using this pencil on conventional copy paper are stable during repetitive mechanical folding and highly resistant to moisture/chemicals. This pencil can draw a conductive line where its resistance can be tuned by changing the amount of nanoparticles. A nonvolatile memory device is realized on papers by hand written lines with different resistance. All memory elements are composed of carbons on papers, so complete data security can be achieved by burning the memory papers. This work will provide a new opportunity to fabricate electronic devices on real papers with good conductivity as well as robust mechanical/chemical stability.
Han, Su-Ting; Zhou, Ye; Yang, Qing Dan; Zhou, Li; Huang, Long-Biao; Yan, Yan; Lee, Chun-Sing; Roy, Vellaisamy A L
2014-02-25
Tunable memory characteristics are used in multioperational mode circuits where memory cells with various functionalities are needed in one combined device. It is always a challenge to obtain control over threshold voltage for multimode operation. On this regard, we use a strategy of shifting the work function of reduced graphene oxide (rGO) in a controlled manner through doping gold chloride (AuCl3) and obtained a gradient increase of rGO work function. By inserting doped rGO as floating gate, a controlled threshold voltage (Vth) shift has been achieved in both p- and n-type low voltage flexible memory devices with large memory window (up to 4 times for p-type and 8 times for n-type memory devices) in comparison with pristine rGO floating gate memory devices. By proper energy band engineering, we demonstrated a flexible floating gate memory device with larger memory window and controlled threshold voltage shifts.
Photo-activation of Single Molecule Magnet Behavior in a Manganese-based Complex
NASA Astrophysics Data System (ADS)
Fetoh, Ahmed; Cosquer, Goulven; Morimoto, Masakazu; Irie, Masahiro; El-Gammal, Ola; El-Reash, Gaber Abu; Breedlove, Brian K.; Yamashita, Masahiro
2016-03-01
A major roadblock to fully realizing molecular electronic devices is the ability to control the properties of each molecule in the device. Herein we report the control of the magnetic properties of single-molecule magnets (SMMs), which can be used in memory devices, by using a photo-isomerizable diarthylenthene ligand. Photo-isomerization of the diarylethene ligand bridging two manganese salen complexes with visible light caused a significant change in the SMM behavior due to opening of the six-membered ring of diarylethene ligand, accompanied by reorganization of the entire molecule. The ring-opening activated the frequency-dependent magnetization of the complex. Our results are a major step towards the realization of molecular memory devices composed of SMMs because the SMM behaviour can be turned on and off simply by irradiating the molecule.
Micro devices using shape memory polymer patches for mated connections
Lee, Abraham P.; Fitch, Joseph P.
2000-01-01
A method and micro device for repositioning or retrieving miniature devices located in inaccessible areas, such as medical devices (e.g., stents, embolic coils, etc.) located in a blood vessel. The micro repositioning or retrieving device and method uses shape memory polymer (SMP) patches formed into mating geometries (e.g., a hoop and a hook) for re-attachment of the deposited medical device to a catheter or guidewire. For example, SMP or other material hoops are formed on the medical device to be deposited in a blood vessel, and SMP hooks are formed on the micro device attached to a guidewire, whereby the hooks on the micro device attach to the hoops on the medical device, or vice versa, enabling deposition, movement, re-deposit, or retrieval of the medical device. By changing the temperature of the SMP hooks, the hooks can be attached to or released from the hoops located on the medical device. An exemplary method for forming the hooks and hoops involves depositing a sacrificial thin film on a substrate, patterning and processing the thin film to form openings therethrough, depositing or bonding SMP materials in the openings so as to be attached to the substrate, and removing the sacrificial thin film.
Metal-organic molecular device for non-volatile memory storage
DOE Office of Scientific and Technical Information (OSTI.GOV)
Radha, B., E-mail: radha.boya@manchester.ac.uk, E-mail: kulkarni@jncasr.ac.in; Sagade, Abhay A.; Kulkarni, G. U., E-mail: radha.boya@manchester.ac.uk, E-mail: kulkarni@jncasr.ac.in
Non-volatile memory devices have been of immense research interest for their use in active memory storage in powered off-state of electronic chips. In literature, various molecules and metal compounds have been investigated in this regard. Molecular memory devices are particularly attractive as they offer the ease of storing multiple memory states in a unique way and also represent ubiquitous choice for miniaturized devices. However, molecules are fragile and thus the device breakdown at nominal voltages during repeated cycles hinders their practical applicability. Here, in this report, a synergetic combination of an organic molecule and an inorganic metal, i.e., a metal-organicmore » complex, namely, palladium hexadecylthiolate is investigated for memory device characteristics. Palladium hexadecylthiolate following partial thermolysis is converted to a molecular nanocomposite of Pd(II), Pd(0), and long chain hydrocarbons, which is shown to exhibit non-volatile memory characteristics with exceptional stability and retention. The devices are all solution-processed and the memory action stems from filament formation across the pre-formed cracks in the nanocomposite film.« less
Status and Prospects of ZnO-Based Resistive Switching Memory Devices
NASA Astrophysics Data System (ADS)
Simanjuntak, Firman Mangasa; Panda, Debashis; Wei, Kung-Hwa; Tseng, Tseung-Yuen
2016-08-01
In the advancement of the semiconductor device technology, ZnO could be a prospective alternative than the other metal oxides for its versatility and huge applications in different aspects. In this review, a thorough overview on ZnO for the application of resistive switching memory (RRAM) devices has been conducted. Various efforts that have been made to investigate and modulate the switching characteristics of ZnO-based switching memory devices are discussed. The use of ZnO layer in different structure, the different types of filament formation, and the different types of switching including complementary switching are reported. By considering the huge interest of transparent devices, this review gives the concrete overview of the present status and prospects of transparent RRAM devices based on ZnO. ZnO-based RRAM can be used for flexible memory devices, which is also covered here. Another challenge in ZnO-based RRAM is that the realization of ultra-thin and low power devices. Nevertheless, ZnO not only offers decent memory properties but also has a unique potential to be used as multifunctional nonvolatile memory devices. The impact of electrode materials, metal doping, stack structures, transparency, and flexibility on resistive switching properties and switching parameters of ZnO-based resistive switching memory devices are briefly compared. This review also covers the different nanostructured-based emerging resistive switching memory devices for low power scalable devices. It may give a valuable insight on developing ZnO-based RRAM and also should encourage researchers to overcome the challenges.
Bubble memory module for spacecraft application
NASA Technical Reports Server (NTRS)
Hayes, P. J.; Looney, K. T.; Nichols, C. D.
1985-01-01
Bubble domain technology offers an all-solid-state alternative for data storage in onboard data systems. A versatile modular bubble memory concept was developed. The key module is the bubble memory module which contains all of the storage devices and circuitry for accessing these devices. This report documents the bubble memory module design and preliminary hardware designs aimed at memory module functional demonstration with available commercial bubble devices. The system architecture provides simultaneous operation of bubble devices to attain high data rates. Banks of bubble devices are accessed by a given bubble controller to minimize controller parts. A power strobing technique is discussed which could minimize the average system power dissipation. A fast initialization method using EEPROM (electrically erasable, programmable read-only memory) devices promotes fast access. Noise and crosstalk problems and implementations to minimize these are discussed. Flight memory systems which incorporate the concepts and techniques of this work could now be developed for applications.
Optical Input/Electrical Output Memory Elements based on a Liquid Crystalline Azobenzene Polymer.
Mosciatti, Thomas; Bonacchi, Sara; Gobbi, Marco; Ferlauto, Laura; Liscio, Fabiola; Giorgini, Loris; Orgiu, Emanuele; Samorì, Paolo
2016-03-01
Responsive polymer materials can change their properties when subjected to external stimuli. In this work, thin films of thermotropic poly(metha)acrylate/azobenzene polymers are explored as active layer in light-programmable, electrically readable memories. The memory effect is based on the reversible modifications of the film morphology induced by the photoisomerization of azobenzene mesogenic groups. When the film is in the liquid crystalline phase, the trans → cis isomerization induces a major surface reorganization on the mesoscopic scale that is characterized by a reduction in the effective thickness of the film. The film conductivity is measured in vertical two-terminal devices in which the polymer is sandwiched between a Au contact and a liquid compliant E-GaIn drop. We demonstrate that the trans → cis isomerization is accompanied by a reversible 100-fold change in the film conductance. In this way, the device can be set in a high- or low-resistance state by light irradiation at different wavelengths. This result paves the way toward the potential use of poly(metha)acrylate/azobenzene polymer films as active layer for optical input/electrical output memory elements.
Reconfigurable pipelined processor
DOE Office of Scientific and Technical Information (OSTI.GOV)
Saccardi, R.J.
1989-09-19
This patent describes a reconfigurable pipelined processor for processing data. It comprises: a plurality of memory devices for storing bits of data; a plurality of arithmetic units for performing arithmetic functions with the data; cross bar means for connecting the memory devices with the arithmetic units for transferring data therebetween; at least one counter connected with the cross bar means for providing a source of addresses to the memory devices; at least one variable tick delay device connected with each of the memory devices and arithmetic units; and means for providing control bits to the variable tick delay device formore » variably controlling the input and output operations thereof to selectively delay the memory devices and arithmetic units to align the data for processing in a selected sequence.« less
Van, Ngoc Huynh; Lee, Jae-Hyun; Whang, Dongmok; Kang, Dae Joon
2015-07-21
Nanowire-based ferroelectric-complementary metal-oxide-semiconductor (NW FeCMOS) nonvolatile memory devices were successfully fabricated by utilizing single n- and p-type Si nanowire ferroelectric-gate field effect transistors (NW FeFETs) as individual memory cells. In addition to having the advantages of single channel n- and p-type Si NW FeFET memory, Si NW FeCMOS memory devices exhibit a direct readout voltage and ultralow power consumption. The reading state power consumption of this device is less than 0.1 pW, which is more than 10(5) times lower than the ON-state power consumption of single-channel ferroelectric memory. This result implies that Si NW FeCMOS memory devices are well suited for use in non-volatile memory chips in modern portable electronic devices, especially where low power consumption is critical for energy conservation and long-term use.
An upconverted photonic nonvolatile memory.
Zhou, Ye; Han, Su-Ting; Chen, Xian; Wang, Feng; Tang, Yong-Bing; Roy, V A L
2014-08-21
Conventional flash memory devices are voltage driven and found to be unsafe for confidential data storage. To ensure the security of the stored data, there is a strong demand for developing novel nonvolatile memory technology for data encryption. Here we show a photonic flash memory device, based on upconversion nanocrystals, which is light driven with a particular narrow width of wavelength in addition to voltage bias. With the help of near-infrared light, we successfully manipulate the multilevel data storage of the flash memory device. These upconverted photonic flash memory devices exhibit high ON/OFF ratio, long retention time and excellent rewritable characteristics.
An FPGA-Based Test-Bed for Reliability and Endurance Characterization of Non-Volatile Memory
NASA Technical Reports Server (NTRS)
Rao, Vikram; Patel, Jagdish; Patel, Janak; Namkung, Jeffrey
2001-01-01
Memory technologies are divided into two categories. The first category, nonvolatile memories, are traditionally used in read-only or read-mostly applications because of limited write endurance and slow write speed. These memories are derivatives of read only memory (ROM) technology, which includes erasable programmable ROM (EPROM), electrically-erasable programmable ROM (EEPROM), Flash, and more recent ferroelectric non-volatile memory technology. Nonvolatile memories are able to retain data in the absence of power. The second category, volatile memories, are random access memory (RAM) devices including SRAM and DRAM. Writing to these memories is fast and write endurance is unlimited, so they are most often used to store data that change frequently, but they cannot store data in the absence of power. Nonvolatile memory technologies with better future potential are FRAM, Chalcogenide, GMRAM, Tunneling MRAM, and Silicon-Oxide-Nitride-Oxide-Silicon (SONOS) EEPROM.
Federal Register 2010, 2011, 2012, 2013, 2014
2011-11-29
... INTERNATIONAL TRADE COMMISSION [DN 2859] Certain Dynamic Random Access Memory Devices, and.... International Trade Commission has received a complaint entitled In Re Certain Dynamic Random Access Memory... certain dynamic random access memory devices, and products containing same. The complaint names Elpida...
SnO2-based memristors and the potential synergies of integrating memristors with MEMS
NASA Astrophysics Data System (ADS)
Zubia, David; Almeida, Sergio; Talukdar, Arka; Mireles, Jose; MacDonald, Eric
2012-06-01
Memristors, usually in the form metal/metal-oxide/metal, have attracted much attention due to their potential application for non-volatile memory. Their simple structure and ease of fabrication make them good candidates for dense memory with projections of 22 terabytes per wafer. Excellent switching times of ~10 ns, memory endurance of >109 cycles, and extrapolated retention times of >10 yrs have been reported. Interestingly, memristors use the migration of ions to change their resistance in response to charge flow, and can therefore measure and remember the amount of current that has flowed. This is similar to many MEMS devices in which the motion of mass is an operating principle of the device. Memristors are also similar to MEMS in the sense that they can both be resistant to radiation effects. Memristors are radiation tolerant since information is stored as a structural change and not as electronic charge. Functionally, a MEMS device's sensitivity to radiation is concomitant to the role that the dielectric layers play in the function of the device. This is due to radiation-induced trapped charge in the dielectrics which can alter device performance and in extreme cases cause failure. Although different material systems have been investigated for memristors, SnO2 has received little attention even though it demonstrates excellent electronic properties and a high resistance to displacement damage from radiation due to a large Frenkel defect energy (7 eV) compared its bandgap (3.6 eV). This talk discusses recent research on SnO2-based memristors and the potential synergies of integrating memristors with MEMS.
Cycle accurate and cycle reproducible memory for an FPGA based hardware accelerator
Asaad, Sameh W.; Kapur, Mohit
2016-03-15
A method, system and computer program product are disclosed for using a Field Programmable Gate Array (FPGA) to simulate operations of a device under test (DUT). The DUT includes a device memory having a number of input ports, and the FPGA is associated with a target memory having a second number of input ports, the second number being less than the first number. In one embodiment, a given set of inputs is applied to the device memory at a frequency Fd and in a defined cycle of time, and the given set of inputs is applied to the target memory at a frequency Ft. Ft is greater than Fd and cycle accuracy is maintained between the device memory and the target memory. In an embodiment, a cycle accurate model of the DUT memory is created by separating the DUT memory interface protocol from the target memory storage array.
NASA Astrophysics Data System (ADS)
Olga Gneri, Paula; Jardim, Marcos
Resistive switching memory has been of interest lately not only for its simple metal-insulator-metal (MIM) structure but also for its promising ease of scalability an integration into current CMOS technologies like the Field Programmable Gate Arrays and other non-volatile memory applications. There are several resistive switching MIM combinations but under this scope of research, attention will be paid to the bipolar resistive switching characteristics and fabrication of Tantalum Pentaoxide sandwiched between platinum and copper. By changing the polarity of the voltage bias, this metal-insulator-metal (MIM) device can be switched between a high resistive state (OFF) and low resistive state (ON). The change in states is induced by an electrochemical metallization process, which causes a formation or dissolution of Cu metal filamentary paths in the Tantalum Pentaoxide insulator. There is very little thorough experimental information about the Cu-Ta 2O5-Pt switching characteristics when scaled to nanometer dimensions. In this light, the MIM structure was fabricated in a two-dimensional crossbar format. Also, with the limited available resources, a multi-spacer technique was formulated to localize the active device area in this MIM configuration to less than 20nm. This step is important in understanding the switching characteristics and reliability of this structure when scaled to nanometer dimensions.
Memory and Spin Injection Devices Involving Half Metals
Shaughnessy, M.; Snow, Ryan; Damewood, L.; ...
2011-01-01
We suggest memory and spin injection devices fabricated with half-metallic materials and based on the anomalous Hall effect. Schematic diagrams of the memory chips, in thin film and bulk crystal form, are presented. Spin injection devices made in thin film form are also suggested. These devices do not need any external magnetic field but make use of their own magnetization. Only a gate voltage is needed. The carriers are 100% spin polarized. Memory devices may potentially be smaller, faster, and less volatile than existing ones, and the injection devices may be much smaller and more efficient than existing spin injectionmore » devices.« less
NASA Technical Reports Server (NTRS)
Schwab, Andrew J. (Inventor); Aylor, James (Inventor); Hitchcock, Charles Young (Inventor); Wulf, William A. (Inventor); McKee, Sally A. (Inventor); Moyer, Stephen A. (Inventor); Klenke, Robert (Inventor)
2000-01-01
A data processing system is disclosed which comprises a data processor and memory control device for controlling the access of information from the memory. The memory control device includes temporary storage and decision ability for determining what order to execute the memory accesses. The compiler detects the requirements of the data processor and selects the data to stream to the memory control device which determines a memory access order. The order in which to access said information is selected based on the location of information stored in the memory. The information is repeatedly accessed from memory and stored in the temporary storage until all streamed information is accessed. The information is stored until required by the data processor. The selection of the order in which to access information maximizes bandwidth and decreases the retrieval time.
NASA Astrophysics Data System (ADS)
Aspera, Susan Meñez; Kasai, Hideaki; Kishi, Hirofumi; Awaya, Nobuyoshi; Ohnishi, Shigeo; Tamai, Yukio
2013-01-01
The resistance random access memory (RRAM™) device, with its electrically induced nanoscale resistive switching capacity, has attracted considerable attention as a future nonvolatile memory device. Here, we propose a mechanism of switching based on an oxygen vacancy migration-driven change in the electronic properties of the transition-metal oxide film stimulated by set pulse voltages. We used density functional theory-based calculations to account for the effect of oxygen vacancies and their migration on the electronic properties of HfO2 and Ta/HfO2 systems, thereby providing a complete explanation of the RRAM™ switching mechanism. Furthermore, computational results on the activation energy barrier for oxygen vacancy migration were found to be consistent with the set and reset pulse voltage obtained from experiments. Understanding this mechanism will be beneficial to effectively realizing the materials design in these devices.
Shape-morphing composites with designed micro-architectures
Rodriguez, Jennifer N.; Zhu, Cheng; Duoss, Eric B.; ...
2016-06-15
Shape memory polymers (SMPs) are attractive materials due to their unique mechanical properties, including high deformation capacity and shape recovery. SMPs are easier to process, lightweight, and inexpensive compared to their metallic counterparts, shape memory alloys. However, SMPs are limited to relatively small form factors due to their low recovery stresses. Lightweight, micro-architected composite SMPs may overcome these size limitations and offer the ability to combine functional properties (e.g., electrical conductivity) with shape memory behavior. Fabrication of 3D SMP thermoset structures via traditional manufacturing methods is challenging, especially for designs that are composed of multiple materials within porous microarchitectures designedmore » for specific shape change strategies, e.g. sequential shape recovery. We report thermoset SMP composite inks containing some materials from renewable resources that can be 3D printed into complex, multi-material architectures that exhibit programmable shape changes with temperature and time. Through addition of fiber-based fillers, we demonstrate printing of electrically conductive SMPs where multiple shape states may induce functional changes in a device and that shape changes can be actuated via heating of printed composites. As a result, the ability of SMPs to recover their original shapes will be advantageous for a broad range of applications, including medical, aerospace, and robotic devices.« less
Jung, Ji Hyung; Kim, Sunghwan; Kim, Hyeonjung; Park, Jongnam; Oh, Joon Hak
2015-10-07
Nano-floating gate memory (NFGM) devices are transistor-type memory devices that use nanostructured materials as charge trap sites. They have recently attracted a great deal of attention due to their excellent performance, capability for multilevel programming, and suitability as platforms for integrated circuits. Herein, novel NFGM devices have been fabricated using semiconducting cobalt ferrite (CoFe2O4) nanoparticles (NPs) as charge trap sites and pentacene as a p-type semiconductor. Monodisperse CoFe2O4 NPs with different diameters have been synthesized by thermal decomposition and embedded in NFGM devices. The particle size effects on the memory performance have been investigated in terms of energy levels and particle-particle interactions. CoFe2O4 NP-based memory devices exhibit a large memory window (≈73.84 V), a high read current on/off ratio (read I(on)/I(off)) of ≈2.98 × 10(3), and excellent data retention. Fast switching behaviors are observed due to the exceptional charge trapping/release capability of CoFe2O4 NPs surrounded by the oleate layer, which acts as an alternative tunneling dielectric layer and simplifies the device fabrication process. Furthermore, the NFGM devices show excellent thermal stability, and flexible memory devices fabricated on plastic substrates exhibit remarkable mechanical and electrical stability. This study demonstrates a viable means of fabricating highly flexible, high-performance organic memory devices. © 2015 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.
Extended write combining using a write continuation hint flag
Chen, Dong; Gara, Alan; Heidelberger, Philip; Ohmacht, Martin; Vranas, Pavlos
2013-06-04
A computing apparatus for reducing the amount of processing in a network computing system which includes a network system device of a receiving node for receiving electronic messages comprising data. The electronic messages are transmitted from a sending node. The network system device determines when more data of a specific electronic message is being transmitted. A memory device stores the electronic message data and communicating with the network system device. A memory subsystem communicates with the memory device. The memory subsystem stores a portion of the electronic message when more data of the specific message will be received, and the buffer combines the portion with later received data and moves the data to the memory device for accessible storage.
NASA Astrophysics Data System (ADS)
Shih, Chien-Chung; Lee, Wen-Ya; Chiu, Yu-Cheng; Hsu, Han-Wen; Chang, Hsuan-Chun; Liu, Cheng-Liang; Chen, Wen-Chang
2016-02-01
Nano-floating gate memory devices (NFGM) using metal nanoparticles (NPs) covered with an insulating polymer have been considered as a promising electronic device for the next-generation nonvolatile organic memory applications NPs. However, the transparency of the device with metal NPs is restricted to 60~70% due to the light absorption in the visible region caused by the surface plasmon resonance effects of metal NPs. To address this issue, we demonstrate a novel NFGM using the blends of hole-trapping poly (9-(4-vinylphenyl) carbazole) (PVPK) and electron-trapping ZnO NPs as the charge storage element. The memory devices exhibited a remarkably programmable memory window up to 60 V during the program/erase operations, which was attributed to the trapping/detrapping of charge carriers in ZnO NPs/PVPK composite. Furthermore, the devices showed the long-term retention time (>105 s) and WRER test (>200 cycles), indicating excellent electrical reliability and stability. Additionally, the fabricated transistor memory devices exhibited a relatively high transparency of 90% at the wavelength of 500 nm based on the spray-coated PEDOT:PSS as electrode, suggesting high potential for transparent organic electronic memory devices.
NASA Astrophysics Data System (ADS)
Rehn, Daniel A.; Li, Yao; Pop, Eric; Reed, Evan J.
2018-01-01
Structural phase-change materials are of great importance for applications in information storage devices. Thermally driven structural phase transitions are employed in phase-change memory to achieve lower programming voltages and potentially lower energy consumption than mainstream nonvolatile memory technologies. However, the waste heat generated by such thermal mechanisms is often not optimized, and could present a limiting factor to widespread use. The potential for electrostatically driven structural phase transitions has recently been predicted and subsequently reported in some two-dimensional materials, providing an athermal mechanism to dynamically control properties of these materials in a nonvolatile fashion while achieving potentially lower energy consumption. In this work, we employ DFT-based calculations to make theoretical comparisons of the energy required to drive electrostatically-induced and thermally-induced phase transitions. Determining theoretical limits in monolayer MoTe2 and thin films of Ge2Sb2Te5, we find that the energy consumption per unit volume of the electrostatically driven phase transition in monolayer MoTe2 at room temperature is 9% of the adiabatic lower limit of the thermally driven phase transition in Ge2Sb2Te5. Furthermore, experimentally reported phase change energy consumption of Ge2Sb2Te5 is 100-10,000 times larger than the adiabatic lower limit due to waste heat flow out of the material, leaving the possibility for energy consumption in monolayer MoTe2-based devices to be orders of magnitude smaller than Ge2Sb2Te5-based devices.
NASA Astrophysics Data System (ADS)
Smith, Shawn; Forrest, Stephen R.
2004-06-01
We present a simple, nonvolatile, write-once-read-many-times (WORM) memory device utilizing an organic-on-inorganic heterojunction (OI-HJ) diode with a conductive polymer fuse consisting of polyethylene dioxythiophene:polysterene sulfonic acid (PEDOT:PSS) forming one side of the rectifying junction. Current transients are used to change the fuse from a conducting to a nonconducting state to record a logical "1" or "0", while the nonlinearity of the OI-HJ allows for passive matrix memory addressing. The device switches at 2 and 4 V for 50 nm thick PEDOT:PSS films on p-type Si and n-type Si, respectively. This is significantly lower than the switching voltage used in PEDOT:PSS/p-i-n Si memory elements [J. Appl Phys. 94, 7811 (2003)]. The switching results in a permanent reduction of forward-bias current by approximately five orders of magnitude. These results suggest that the OI-HJ structure has potential for use in low-cost passive matrix WORM memories for archival storage applications.
NASA Technical Reports Server (NTRS)
Thakoor, Sarita (Inventor)
1992-01-01
Thin film ferroelectric capacitors comprising a ferroelectric film sandwiched between electrodes for nonvolatile memory operations are rendered more stable by subjecting the capacitors to an anneal following deposition of the top electrode. The anneal is done so as to form the interface between the ferroelectric film and the top electrode. Heating in an air oven, laser annealing, or electron bombardment may be used to form the interface. Heating in an air oven is done at a temperature at least equal to the crystallization temperature of the ferroelectric film. Where the ferroelectric film comprises lead zirconate titanate, annealing is done at about 550 to 600 C for about 10 to 15 minutes. The formation treatment reduces the magnitude of charge associated with the nonswitching pulse in the thin film ferroelectric capacitors. Reduction of this charge leads to significantly more stable nonvolatile memory operations in both digital and analog memory devices. The formation treatment also reduces the ratio of change of the charge associated with the nonswitching pulse as a function of retention time. These improved memory devices exhibit greater performance in retention and reduced fatigue in memory arrays.
NASA Technical Reports Server (NTRS)
Thakoor, Sarita (Inventor)
1994-01-01
Thin film ferroelectric capacitors (10) comprising a ferroelectric film (18) sandwiched between electrodes (16 and 20) for nonvolatile memory operations are rendered more stable by subjecting the capacitors to an anneal following deposition of the top electrode (20). The anneal is done so as to form the interface (22) between the ferroelectric film and the top electrode. Heating in an air oven, laser annealing, or electron bombardment may be used to form the interface. Heating in an air oven is done at a temperature at least equal to the crystallization temperature of the ferroelectric film. Where the ferroelectric film comprises lead zirconate titanate, annealing is done at about 550.degree. to 600.degree. C. for about 10 to 15 minutes. The formation treatment reduces the magnitude of charge associated with the non-switching pulse in the thin film ferroelectric capacitors. Reduction of this charge leads to significantly more stable nonvolatile memory operations in both digital and analog memory devices. The formation treatment also reduces the ratio of change of the charge associated with the non-switching pulse as a function of retention time. These improved memory devices exhibit greater performance in retention and reduced fatigue in memory arrays.
NASA Astrophysics Data System (ADS)
Aluguri, R.; Kumar, D.; Simanjuntak, F. M.; Tseng, T.-Y.
2017-09-01
A bipolar transistor selector was connected in series with a resistive switching memory device to study its memory characteristics for its application in cross bar array memory. The metal oxide based p-n-p bipolar transistor selector indicated good selectivity of about 104 with high retention and long endurance showing its usefulness in cross bar RRAM devices. Zener tunneling is found to be the main conduction phenomena for obtaining high selectivity. 1BT-1R device demonstrated good memory characteristics with non-linearity of 2 orders, selectivity of about 2 orders and long retention characteristics of more than 105 sec. One bit-line pull-up scheme shows that a 650 kb cross bar array made with this 1BT1R devices works well with more than 10 % read margin proving its ability in future memory technology application.
Satellite Test of Radiation Impact on Ramtron 512K FRAM
NASA Technical Reports Server (NTRS)
MacLeod, Todd C.; Sayyah, Rana; Sims, W. Herb; Varnavas, Kosta A.; Ho, Fat D.
2009-01-01
The Memory Test Experiment is a space test of a ferroelectric memory device on a low Earth orbit satellite. The test consists of writing and reading data with a ferroelectric based memory device. Any errors are detected and are stored on board the satellite. The data is send to the ground through telemetry once a day. Analysis of the data can determine the kind of error that was found and will lead to a better understanding of the effects of space radiation on memory systems. The test will be one of the first flight demonstrations of ferroelectric memory in a near polar orbit which allows testing in a varied radiation environment. The memory devices being tested is a Ramtron Inc. 512K memory device. This paper details the goals and purpose of this experiment as well as the development process. The process for analyzing the data to gain the maximum understanding of the performance of the ferroelectric memory device is detailed.
Thermally driven microfluidic pumping via reversible shape memory polymers
NASA Astrophysics Data System (ADS)
Robertson, J. M.; Rodriguez, R. X.; Holmes, L. R., Jr.; Mather, P. T.; Wetzel, E. D.
2016-08-01
The need exists for autonomous microfluidic pumping systems that utilize environmental cues to transport fluid within a network of channels for such purposes as heat distribution, self-healing, or optical reconfiguration. Here, we report on reversible thermally driven microfluidic pumping enabled by two-way shape memory polymers. After developing a suitable shape memory polymer (SMP) through variation in the crosslink density, thin and flexible microfluidic devices were constructed by lamination of plastic films with channels defined by laser-cutting of double-sided adhesive film. SMP blisters integrated into the devices provide thermally driven pumping, while opposing elastic blisters are used to generate backpressure for reversible operation. Thermal cycling of the device was found to drive reversible fluid flow: upon heating to 60 °C, the SMP rapidly contracted to fill the surface channels with a transparent fluid, and upon cooling to 8 °C the flow reversed and the channel re-filled with black ink. Combined with a metallized backing layer, this device results in refection of incident light at high temperatures and absorption of light (at the portions covered with channels) at low temperatures. We discuss power-free, autonomous applications ranging from thermal regulation of structures to thermal indication via color change.
Electric-field-controlled interface dipole modulation for Si-based memory devices.
Miyata, Noriyuki
2018-05-31
Various nonvolatile memory devices have been investigated to replace Si-based flash memories or emulate synaptic plasticity for next-generation neuromorphic computing. A crucial criterion to achieve low-cost high-density memory chips is material compatibility with conventional Si technologies. In this paper, we propose and demonstrate a new memory concept, interface dipole modulation (IDM) memory. IDM can be integrated as a Si field-effect transistor (FET) based memory device. The first demonstration of this concept employed a HfO 2 /Si MOS capacitor where the interface monolayer (ML) TiO 2 functions as a dipole modulator. However, this configuration is unsuitable for Si-FET-based devices due to its large interface state density (D it ). Consequently, we propose, a multi-stacked amorphous HfO 2 /1-ML TiO 2 /SiO 2 IDM structure to realize a low D it and a wide memory window. Herein we describe the quasi-static and pulse response characteristics of multi-stacked IDM MOS capacitors and demonstrate flash-type and analog memory operations of an IDM FET device.
NASA Astrophysics Data System (ADS)
Muqeet Rehman, Muhammad; Uddin Siddiqui, Ghayas; Kim, Sowon; Choi, Kyung Hyun
2017-08-01
Pursuit of the most appropriate materials and fabrication methods is essential for developing a reliable, rewritable and flexible memory device. In this study, we have proposed an advanced 2D nanocomposite of white graphene (hBN) flakes embedded with graphene quantum dots (GQDs) as the functional layer of a flexible memory device owing to their unique electrical, chemical and mechanical properties. Unlike the typical sandwich type structure of a memory device, we developed a cost effective planar structure, to simplify device fabrication and prevent sneak current. The entire device fabrication was carried out using printing technology followed by encapsulation in an atomically thin layer of aluminum oxide (Al2O3) for protection against environmental humidity. The proposed memory device exhibited attractive bipolar switching characteristics of high switching ratio, large electrical endurance and enhanced lifetime, without any crosstalk between adjacent memory cells. The as-fabricated device showed excellent durability for several bending cycles at various bending diameters without any degradation in bistable resistive states. The memory mechanism was deduced to be conductive filamentary; this was validated by illustrating the temperature dependence of bistable resistive states. Our obtained results pave the way for the execution of promising 2D material based next generation flexible and non-volatile memory (NVM) applications.
Novel conformal organic antireflective coatings for advanced I-line lithography
NASA Astrophysics Data System (ADS)
Deshpande, Shreeram V.; Nowak, Kelly A.; Fowler, Shelly; Williams, Paul; Arjona, Mikko
2001-08-01
Flash memory chips are playing a critical role in semiconductor devices due to increased popularity of hand held electronic communication devices such as cell phones and PDAs (personal Digital Assistants). Flash memory offers two primary advantages in semiconductor devices. First, it offers flexibility of in-circuit programming capability to reduce the loss from programming errors and to significantly reduce commercialization time to market for new devices. Second, flash memory has a double density memory capability through stacked gate structures which increases the memory capability and thus saves significantly on chip real estate. However, due to stacked gate structures the requirements for manufacturing of flash memory devices are significantly different from traditional memory devices. Stacked gate structures also offer unique challenges to lithographic patterning materials such as Bottom Anti-Reflective Coating (BARC) compositions used to achieve CD control and to minimize standing wave effect in photolithography. To be applicable in flash memory manufacturing a BARC should form a conformal coating on high topography of stacked gate features as well as provide the normal anti-reflection properties for CD control. In this paper we report on a new highly conformal advanced i-line BARC for use in design and manufacture of flash memory devices. Conformal BARCs being significantly thinner in trenches than the planarizing BARCs offer the advantage of reducing BARC overetch and thus minimizing resist thickness loss.
Distributed multiport memory architecture
NASA Technical Reports Server (NTRS)
Kohl, W. H. (Inventor)
1983-01-01
A multiport memory architecture is diclosed for each of a plurality of task centers connected to a command and data bus. Each task center, includes a memory and a plurality of devices which request direct memory access as needed. The memory includes an internal data bus and an internal address bus to which the devices are connected, and direct timing and control logic comprised of a 10-state ring counter for allocating memory devices by enabling AND gates connected to the request signal lines of the devices. The outputs of AND gates connected to the same device are combined by OR gates to form an acknowledgement signal that enables the devices to address the memory during the next clock period. The length of the ring counter may be effectively lengthened to any multiple of ten to allow for more direct memory access intervals in one repetitive sequence. One device is a network bus adapter which serially shifts onto the command and data bus, a data word (8 bits plus control and parity bits) during the next ten direct memory access intervals after it has been granted access. The NBA is therefore allocated only one access in every ten intervals, which is a predetermined interval for all centers. The ring counters of all centers are periodically synchronized by DMA SYNC signal to assure that all NBAs be able to function in synchronism for data transfer from one center to another.
Memory device for two-dimensional radiant energy array computers
NASA Technical Reports Server (NTRS)
Schaefer, D. H.; Strong, J. P., III (Inventor)
1977-01-01
A memory device for two dimensional radiant energy array computers was developed, in which the memory device stores digital information in an input array of radiant energy digital signals that are characterized by ordered rows and columns. The memory device contains a radiant energy logic storing device having a pair of input surface locations for receiving a pair of separate radiant energy digital signal arrays and an output surface location adapted to transmit a radiant energy digital signal array. A regenerative feedback device that couples one of the input surface locations to the output surface location in a manner for causing regenerative feedback is also included
NASA Astrophysics Data System (ADS)
Pandey, Shivendra Kumar; Manivannan, Anbarasu
2017-07-01
Prefixing a weak electric field (incubation) might enhance the crystallization speed via pre-structural ordering and thereby achieving faster programming of phase change memory (PCM) devices. We employed a weak electric field, equivalent to a constant small voltage (that is incubation voltage, Vi of 0.3 V) to the applied voltage pulse, VA (main pulse) for a systematic understanding of voltage-dependent rapid threshold switching characteristics and crystallization (set) process of In3SbTe2 (IST) PCM devices. Our experimental results on incubation-assisted switching elucidate strikingly one order faster threshold switching, with an extremely small delay time, td of 300 ps, as compared with no incubation voltage (Vi = 0 V) for the same VA. Also, the voltage dependent characteristics of incubation-assisted switching dynamics confirm that the initiation of threshold switching occurs at a lower voltage of 0.82 times of VA. Furthermore, we demonstrate an incubation assisted ultrafast set process of IST device for a low VA of 1.7 V (˜18 % lesser compared to without incubation) within a short pulse-width of 1.5 ns (full width half maximum, FWHM). These findings of ultrafast switching, yet low power set process would immensely be helpful towards designing high speed PCM devices with low power operation.
Transistor and memory devices based on novel organic and biomaterials
NASA Astrophysics Data System (ADS)
Tseng, Jia-Hung
Organic semiconductor devices have aroused considerable interest because of the enormous potential in many technological applications. Organic electroluminescent devices have been extensively applied in display technology. Rapid progress has also been made in transistor and memory devices. This thesis considers aspects of the transistor based on novel organic single crystals and memory devices using hybrid nanocomposites comprising polymeric/inorganic nanoparticles, and biomolecule/quantum dots. Organic single crystals represent highly ordered structures with much less imperfections compared to amorphous thin films for probing the intrinsic charge transport in transistor devices. We demonstrate that free-standing, thin organic single crystals with natural flexing ability can be fabricated as flexible transistors. We study the surface properties of the organic crystals to determine a nearly perfect surface leading to high performance transistors. The flexible transistors can maintain high performance under reversible bending conditions. Because of the high quality crystal technique, we further develop applications on organic complementary circuits and organic single crystal photovoltaics. In the second part, two aspects of memory devices are studied. We examine the charge transfer process between conjugated polymers and metal nanoparticles. This charge transfer process is essential for the conductance switching in nanoseconds to induce the memory effect. Under the reduction condition, the charge transfer process is eliminated as well as the memory effect, raising the importance of coupling between conjugated systems and nanoparticle accepters. The other aspect of memory devices focuses on the interaction of virus biomolecules with quantum dots or metal nanoparticles in the devices. We investigate the impact of memory function on the hybrid bio-inorganic system. We perform an experimental analysis of the charge storage activation energy in tobacco mosaic virus with platinum nanoparticles. It is established that the effective barrier height in the materials systems needs to be further engineered in order to have sufficiently long retention times. Finally other novel architectures such as negative differential resistance devices and high density memory arrays are investigated for their influence on memory technology.
Modeling and Implementation of HfO2-based Ferroelectric Tunnel Junctions
NASA Astrophysics Data System (ADS)
Pringle, Spencer Allen
HfO2-based ferroelectric tunnel junctions (FTJs) represent a unique opportunity as both a next-generation digital non-volatile memory and as synapse devices in braininspired logic systems, owing to their higher reliability compared to filamentary resistive random-access memory (ReRAM) and higher speed and lower power consumption compared to competing devices, including phase-change memory (PCM) and state-of-the-art FTJ. Ferroelectrics are often easier to deposit and have simpler material structure than films for magnetic tunnel junctions (MTJs). Ferroelectric HfO2 also enables complementary metal-oxide-semiconductor (CMOS) compatibility, since lead zirconate titanate (PZT) and BaTiO3-based FTJs often are not. No other groups have yet demonstrated a HfO2-based FTJ (to best of the author's knowledge) or applied it to a suitable system. For such devices to be useful, system designers require models based on both theoretical physical analysis and experimental results of fabricated devices in order to confidently design control systems. Both the CMOS circuitry and FTJs must then be designed in layout and fabricated on the same die. This work includes modeling of proposed device structures using a custom python script, which calculates theoretical potential barrier heights as a function of material properties and corresponding current densities (ranging from 8x103 to 3x10-2 A/cm 2 with RHRS/RLRS ranging from 5x105 to 6, depending on ferroelectric thickness). These equations were then combined with polynomial fits of experimental timing data and implemented in a Verilog-A behavioral analog model in Cadence Virtuoso. The author proposes tristate CMOS control systems, and circuits, for implementation of FTJ devices as digital memory and presents simulated performance. Finally, a process flow for fabrication of FTJ devices with CMOS is presented. This work has therefore enabled the fabrication of FTJ devices at RIT and the continued investigation of them as applied to any appropriate systems.
Titanium oxide nonvolatile memory device and its application
NASA Astrophysics Data System (ADS)
Wang, Wei
In recent years, the semiconductor memory industry has seen an ever-increasing demand for nonvolatile memory (NVM), which is fueled by portable consumer electronic applications like the mobile phone and MP3 player. FLASH memory has been the most widely used nonvolatile memories in these systems, and has successfully kept up with CMOS scaling for many generations. However, as FLASH memory faces major scaling challenges beyond 22nm, non-charge-based nonvolatile memories are widely researched as candidates to replace FLASH. Titanium oxide (TiOx) nonvolatile memory device is considered to be a promising choice due to its controllable nonvolatile memory switching, good scalability, compatibility with CMOS processing and potential for 3D stacking. However, several major issues need to be overcome before TiOx NVM device can be adopted in manufacturing. First, there exists a highly undesirable high-voltage stress initiation process (FORMING) before the device can switch between high and low resistance states repeatedly. By analyzing the conductive behaviors of the memory device before and after FORMING, we propose that FORMING involves breaking down an interfacial layer between its Pt electrode and the TiOx thin film, and that FORMING is not needed if the Pt-TiOx interface can be kept clean during fabrication. An in-situ fabrication process is developed for cross-point TiOx NVM device, which enables in-situ deposition of the critical layers of the memory device and thus achieves clean interfaces between Pt electrodes and TiOx film. Testing results show that FORMING is indeed eliminated for memory devices made with the in-situ fabrication process. It verifies the significance of in-situ deposition without vacuum break in the fabrication of TiOx NVM devices. Switching parameters statistics of TiOx NVM devices are studied and compared for unipolar and bipolar switching modes. RESET mechanisms are found to be different for the two switching modes: unipolar switching can be explained by thermal dissolution model, and bipolar switching by local redox reaction model. Since it is generally agreed that the memory switching of TiOx NVM devices is based on conductive filaments, reusability of these conductive filaments becomes an intriguing issue to determine the memory device's endurance. A 1X3 cross-point test structure is built to investigate whether conductive filaments can be reused after RESET. It is found that the conductive filament is destroyed during unipolar switching, while can be reused during bipolar switching. The result is a good indication that bipolar switching should have better endurance than unipolar switching. Finally a novel application of the two-terminal resistive switching NVM devices is demonstrated. To reduce SRAM leakage power, we propose a nonvolatile SRAM cell with two back-up NVM devices. This novel cell offers nonvolatile storage, thus allowing selected blocks of SRAM to be powered down during operation. There is no area penalty in this approach. Only a slight performance penalty is expected.
NASA Astrophysics Data System (ADS)
Cordes, Sandra; Kranz, Darius; Maibach, Eduard; Kempf, Maxim; Meerholz, Klaus
2016-09-01
In modern electronic systems memory elements are of fundamental importance for data storage. Especially solution-processable nonvolatile organic memories, which are inexpensive and can be manufactured on flexible substrates, are a promising alternative to brittle inorganic devices. Organic photochromic switchable compounds, mostly dithienylethenes (DTEs), are thermally stable, fatigue resistant and can undergo an electrically- or/and photo-induced ring-opening and -closing reaction which results in a change of energy levels. Due to the energetic difference in the highest occupied molecular orbital (HOMO) between the open and closed isomer, the DTE layer can be exploited as a switchable hole injection barrier that controls the electrical current in the diode. We demonstrated that a light-emitting organic memory (LE-OMEM) device with a perfluoro DTE transduction layer can be switched electrically via high current densities pulses and optically by irradiated light, with impressive current ON/OFF Ratios (OOR) of 10Λ2, 10Λ4 respectively. Currently we aim to minimize the barrier of the ON state and maximize the barrier of the OFF state by designing DTE molecules with larger differences in the HOMO energies of the two isomers yielding improved OOR values. By synthesizing perhydro derivates of DTE we achieved molecules with high HOMO levels and large ΔHOMO energies providing OMEM devices with excellent physical properties (OOR 1.4 x higher than perfluoro DTE). Due to the high HOMO level of the perhydro DTE utilization of hole transport layers (HTLs) is not necessary and thus manufacturing of OMEM devices is simplified.
Bulk heterojunction polymer memory devices with reduced graphene oxide as electrodes.
Liu, Juqing; Yin, Zongyou; Cao, Xiehong; Zhao, Fei; Lin, Anping; Xie, Linghai; Fan, Quli; Boey, Freddy; Zhang, Hua; Huang, Wei
2010-07-27
A unique device structure with a configuration of reduced graphene oxide (rGO) /P3HT:PCBM/Al has been designed for the polymer nonvolatile memory device. The current-voltage (I-V) characteristics of the fabricated device showed the electrical bistability with a write-once-read-many-times (WORM) memory effect. The memory device exhibits a high ON/OFF ratio (10(4)-10(5)) and low switching threshold voltage (0.5-1.2 V), which are dependent on the sheet resistance of rGO electrode. Our experimental results confirm that the carrier transport mechanisms in the OFF and ON states are dominated by the thermionic emission current and ohmic current, respectively. The polarization of PCBM domains and the localized internal electrical field formed among the adjacent domains are proposed to explain the electrical transition of the memory device.
NASA Astrophysics Data System (ADS)
Huffman, James Douglas
2001-11-01
The most important issue facing the future business success of the Digital Micromirror Device or DMD™ produced by Texas Instruments is the cost of the actual device. As the business and consumer markets call for higher resolution displays, the array size will have to be increased to incorporate more pixels. The manufacturing costs associated with building these higher resolution displays follow an exponential relation with the number of pixels due to yield loss and reduced number of chips per silicon wafer. Each pixel is actuated by electrostatics that are provided by a memory cell that is built in the underlying silicon substrate. One way to decrease cost of the wafer is to change the memory cell architecture from a static random access configuration or SRAM to a dynamic random access configuration or DRAM. This change has the benefits of having fewer components per area and a lower metal density. This reduction in the component count and metal density has a dramatic effect on the yield of the memory array by reducing the particle sensitivity of the underlying cell. The main drawback to using a DRAM configuration in a display application is the light sensitivity of a charge storage device built in the silicon substrate. As the photons pass through the mechanical micromirrors and illuminate the DRAM cell, the effective electrostatic potential of the memory element used for the mirror actuation is reduced. This dissertation outlines the issues associated with the light sensitivity of a DRAM memory cell as the actuation element for a micromirror. The concept of charge depletion on a silicon capacitor due to recombination of photogenerated carriers is explored and experimentally verified. The effects of the reduced potential on the capacitor on the micromirror are also explored. Optical modeling is used to determine the incoming photon flux to determine the benefits of adding a charge recombination region as part of the DRAM memory cell. Several options are explored to reduce the effect of the incoming photons on the potential of the memory cell. The results will show that a 1T1C memory cell with N-type recombination regions and maximum light shielding is sufficient for a projector application.
Systems and methods to control multiple peripherals with a single-peripheral application code
Ransom, Ray M.
2013-06-11
Methods and apparatus are provided for enhancing the BIOS of a hardware peripheral device to manage multiple peripheral devices simultaneously without modifying the application software of the peripheral device. The apparatus comprises a logic control unit and a memory in communication with the logic control unit. The memory is partitioned into a plurality of ranges, each range comprising one or more blocks of memory, one range being associated with each instance of the peripheral application and one range being reserved for storage of a data pointer related to each peripheral application of the plurality. The logic control unit is configured to operate multiple instances of the control application by duplicating one instance of the peripheral application for each peripheral device of the plurality and partitioning a memory device into partitions comprising one or more blocks of memory, one partition being associated with each instance of the peripheral application. The method then reserves a range of memory addresses for storage of a data pointer related to each peripheral device of the plurality, and initializes each of the plurality of peripheral devices.
Robust resistive memory devices using solution-processable metal-coordinated azo aromatics
NASA Astrophysics Data System (ADS)
Goswami, Sreetosh; Matula, Adam J.; Rath, Santi P.; Hedström, Svante; Saha, Surajit; Annamalai, Meenakshi; Sengupta, Debabrata; Patra, Abhijeet; Ghosh, Siddhartha; Jani, Hariom; Sarkar, Soumya; Motapothula, Mallikarjuna Rao; Nijhuis, Christian A.; Martin, Jens; Goswami, Sreebrata; Batista, Victor S.; Venkatesan, T.
2017-12-01
Non-volatile memories will play a decisive role in the next generation of digital technology. Flash memories are currently the key player in the field, yet they fail to meet the commercial demands of scalability and endurance. Resistive memory devices, and in particular memories based on low-cost, solution-processable and chemically tunable organic materials, are promising alternatives explored by the industry. However, to date, they have been lacking the performance and mechanistic understanding required for commercial translation. Here we report a resistive memory device based on a spin-coated active layer of a transition-metal complex, which shows high reproducibility (~350 devices), fast switching (<=30 ns), excellent endurance (~1012 cycles), stability (>106 s) and scalability (down to ~60 nm2). In situ Raman and ultraviolet-visible spectroscopy alongside spectroelectrochemistry and quantum chemical calculations demonstrate that the redox state of the ligands determines the switching states of the device whereas the counterions control the hysteresis. This insight may accelerate the technological deployment of organic resistive memories.
Sun, Bai; Zhang, Xuejiao; Zhou, Guangdong; Yu, Tian; Mao, Shuangsuo; Zhu, Shouhui; Zhao, Yong; Xia, Yudong
2018-06-15
In this work, a flexible resistive switching memory device based on ZnO film was fabricated using a foldable Polyethylene terephthalate (PET) film as substrate while Ag and Ti acts top and bottom electrode. Our as-prepared device represents an outstanding nonvolatile memory behavior with good "write-read-erase-read" stability at room temperature. Finally, a physical model of Ag conductive filament is constructed to understanding the observed memory characteristics. The work provides a new way for the preparation of flexible memory devices based on ZnO films, and especially provides an experimental basis for the exploration of high-performance and portable nonvolatile resistance random memory (RRAM). Copyright © 2018 Elsevier Inc. All rights reserved.
NASA Technical Reports Server (NTRS)
Li, Yue (Inventor); Bruck, Jehoshua (Inventor)
2018-01-01
A data device includes a memory having a plurality of memory cells configured to store data values in accordance with a predetermined rank modulation scheme that is optional and a memory controller that receives a current error count from an error decoder of the data device for one or more data operations of the flash memory device and selects an operating mode for data scrubbing in accordance with the received error count and a program cycles count.
Dimensionality effects in chalcogenide-based devices
NASA Astrophysics Data System (ADS)
Kostylev, S. A.
2013-06-01
The multiplicity of fundamental bulk effects with small characteristic dimensions and short times and diversity of their combinations attracts a lot of researcher and industrialist attention in nanoelectronics and photonics to chalcogenide materials. Experimental data presented on dimensional effects of electrical chalcogenide switching (threshold voltage and threshold current dependence on device area and the film thickness), and in phase-change memory (switching, programming and read parameters), are analyzed from the point of view of choice of low dimensional materials with S-NDC and participation of electrical instabilities - high current density filaments. New ways of improving parameters of phase-change devices are proposed together with new criteria of material choice.
Impacts of Co doping on ZnO transparent switching memory device characteristics
DOE Office of Scientific and Technical Information (OSTI.GOV)
Simanjuntak, Firman Mangasa; Wei, Kung-Hwa; Prasad, Om Kumar
2016-05-02
The resistive switching characteristics of indium tin oxide (ITO)/Zn{sub 1−x}Co{sub x}O/ITO transparent resistive memory devices were investigated. An appropriate amount of cobalt dopant in ZnO resistive layer demonstrated sufficient memory window and switching stability. In contrast, pure ZnO devices demonstrated a poor memory window, and using an excessive dopant concentration led to switching instability. To achieve suitable memory performance, relying only on controlling defect concentrations is insufficient; the grain growth orientation of the resistive layer must also be considered. Stable endurance with an ON/OFF ratio of more than one order of magnitude during 5000 cycles confirmed that the Co-doped ZnOmore » device is a suitable candidate for resistive random access memory application. Additionally, fully transparent devices with a high transmittance of up to 90% at wavelength of 550 nm have been fabricated.« less
Flexible non-volatile memory devices based on organic semiconductors
NASA Astrophysics Data System (ADS)
Cosseddu, Piero; Casula, Giulia; Lai, Stefano; Bonfiglio, Annalisa
2015-09-01
The possibility of developing fully organic electronic circuits is critically dependent on the ability to realize a full set of electronic functionalities based on organic devices. In order to complete the scene, a fundamental element is still missing, i.e. reliable data storage. Over the past few years, a considerable effort has been spent on the development and optimization of organic polymer based memory elements. Among several possible solutions, transistor-based memories and resistive switching-based memories are attracting a great interest in the scientific community. In this paper, a route for the fabrication of organic semiconductor-based memory devices with performances beyond the state of the art is reported. Both the families of organic memories will be considered. A flexible resistive memory based on a novel combination of materials is presented. In particular, high retention time in ambient conditions are reported. Complementary, a low voltage transistor-based memory is presented. Low voltage operation is allowed by an hybrid, nano-sized dielectric, which is also responsible for the memory effect in the device. Thanks to the possibility of reproducibly fabricating such device on ultra-thin substrates, high mechanical stability is reported.
NASA Technical Reports Server (NTRS)
MacLeond, Todd C.; Sims, W. Herb; Varnavas,Kosta A.; Ho, Fat D.
2011-01-01
The Memory Test Experiment is a space test of a ferroelectric memory device on a low Earth orbit satellite that launched in November 2010. The memory device being tested is a commercial Ramtron Inc. 512K memory device. The circuit was designed into the satellite avionics and is not used to control the satellite. The test consists of writing and reading data with the ferroelectric based memory device. Any errors are detected and are stored on board the satellite. The data is sent to the ground through telemetry once a day. Analysis of the data can determine the kind of error that was found and will lead to a better understanding of the effects of space radiation on memory systems. The test is one of the first flight demonstrations of ferroelectric memory in a near polar orbit which allows testing in a varied radiation environment. The initial data from the test is presented. This paper details the goals and purpose of this experiment as well as the development process. The process for analyzing the data to gain the maximum understanding of the performance of the ferroelectric memory device is detailed.
Synaptic plasticity functions in an organic electrochemical transistor
NASA Astrophysics Data System (ADS)
Gkoupidenis, Paschalis; Schaefer, Nathan; Strakosas, Xenofon; Fairfield, Jessamyn A.; Malliaras, George G.
2015-12-01
Synaptic plasticity functions play a crucial role in the transmission of neural signals in the brain. Short-term plasticity is required for the transmission, encoding, and filtering of the neural signal, whereas long-term plasticity establishes more permanent changes in neural microcircuitry and thus underlies memory and learning. The realization of bioinspired circuits that can actually mimic signal processing in the brain demands the reproduction of both short- and long-term aspects of synaptic plasticity in a single device. Here, we demonstrate the implementation of neuromorphic functions similar to biological memory, such as short- to long-term memory transition, in non-volatile organic electrochemical transistors (OECTs). Depending on the training of the OECT, the device displays either short- or long-term plasticity, therefore, exhibiting non von Neumann characteristics with merged processing and storing functionalities. These results are a first step towards the implementation of organic-based neuromorphic circuits.
NASA Astrophysics Data System (ADS)
Cui, Ze-Qun; Wang, Shun; Chen, Jian-Mei; Gao, Xu; Dong, Bin; Chi, Li-Feng; Wang, Sui-Dong
2015-03-01
Electron and hole trapping into the nano-floating-gate of a pentacene-based organic field-effect transistor nonvolatile memory is directly probed by Kelvin probe force microscopy. The probing is straightforward and non-destructive. The measured surface potential change can quantitatively profile the charge trapping, and the surface characterization results are in good accord with the corresponding device behavior. Both electrons and holes can be trapped into the nano-floating-gate, with a preference of electron trapping than hole trapping. The trapped charge quantity has an approximately linear relation with the programming/erasing gate bias, indicating that the charge trapping in the device is a field-controlled process.
NASA Astrophysics Data System (ADS)
Gong, Yue-Feng; Song, Zhi-Tang; Ling, Yun; Liu, Yan; Feng, Song-Lin
2009-11-01
A three-dimensional finite element model for phase change random access memory (PCRAM) is established for comprehensive electrical and thermal analysis during SET operation. The SET behaviours of the heater addition structure (HS) and the ring-type contact in bottom electrode (RIB) structure are compared with each other. There are two ways to reduce the RESET current, applying a high resistivity interfacial layer and building a new device structure. The simulation results indicate that the variation of SET current with different power reduction ways is little. This study takes the RESET and SET operation current into consideration, showing that the RIB structure PCRAM cell is suitable for future devices with high heat efficiency and high-density, due to its high heat efficiency in RESET operation.
NASA Technical Reports Server (NTRS)
Hendry, David F. (Inventor)
1993-01-01
In a data system having a memory, plural input/output (I/O) devices and a bus connecting each of the I/O devices to the memory, a direct memory access (DMA) controller regulating access of each of the I/O devices to the bus, including a priority register storing priorities of bus access requests from the I/O devices, an interrupt register storing bus access requests of the I/O devices, a resolver for selecting one of the I/O devices to have access to the bus, a pointer register storing addresses of locations in the memory for communication with the one I/O device via the bus, a sequence register storing an address of a location in the memory containing a channel program instruction which is to be executed next, an ALU for incrementing and decrementing addresses stored in the pointer register, computing the next address to be stored in the sequence register, computing an initial contents of each of the register. The memory contains a sequence of channel program instructions defining a set up operation wherein the contents of each of the registers in the channel register is initialized in accordance with the initial contents computed by the ALU and an access operation wherein data is transferred on the bus between a location in the memory whose address is currently stored in the pointer register and the one I/O device enabled by the resolver.
Memory effects in a Al/Ti:HfO2/CuPc metal-oxide-semiconductor device
NASA Astrophysics Data System (ADS)
Tripathi, Udbhav; Kaur, Ramneek
2016-05-01
Metal oxide semiconductor structured organic memory device has been successfully fabricated. Ti doped hafnium oxide (Ti:HfO2) nanoparticles has been fabricated by precipitation method and further calcinated at 800 °C. Copper phthalocyanine, a hole transporting material has been utilized as an organic semiconductor. The electrical properties of the fabricated device have been studied by measuring the current-voltage and capacitance-voltage characteristics. The amount of charge stored in the nanoparticles has been calculated by using flat band condition. This simple approach for fabricating MOS memory device has opens up opportunities for the development of next generation memory devices.
Materials and methods for the preparation of nanocomposites
Talapin, Dmitri V.; Kovalenko, Maksym V.; Lee, Jong-Soo; Jiang, Chengyang
2016-05-24
Disclosed herein is an isolable colloidal particle comprising a nanoparticle and an inorganic capping agent bound to the surface of the nanoparticle, a solution of the same, a method for making the same from a biphasic solvent mixture, and the formation of structures and solids from the isolable colloidal particle. The process can yield photovoltaic cells, piezoelectric crystals, thermoelectric layers, optoelectronic layers, light emitting diodes, ferroelectric layers, thin film transistors, floating gate memory devices, imaging devices, phase change layers, and sensor devices.
Hwang, Bohee; Lee, Jang-Sik
2017-08-01
The demand for high memory density has increased due to increasing needs of information storage, such as big data processing and the Internet of Things. Organic-inorganic perovskite materials that show nonvolatile resistive switching memory properties have potential applications as the resistive switching layer for next-generation memory devices, but, for practical applications, these materials should be utilized in high-density data-storage devices. Here, nanoscale memory devices are fabricated by sequential vapor deposition of organolead halide perovskite (OHP) CH 3 NH 3 PbI 3 layers on wafers perforated with 250 nm via-holes. These devices have bipolar resistive switching properties, and show low-voltage operation, fast switching speed (200 ns), good endurance, and data-retention time >10 5 s. Moreover, the use of sequential vapor deposition is extended to deposit CH 3 NH 3 PbI 3 as the memory element in a cross-point array structure. This method to fabricate high-density memory devices could be used for memory cells that occupy large areas, and to overcome the scaling limit of existing methods; it also presents a way to use OHPs to increase memory storage capacity. © 2017 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.
NASA Astrophysics Data System (ADS)
Lee, Won-Ho; Yoon, Sung-Min
2017-05-01
The resistive change memory (RCM) devices using amorphous In-Ga-Zn-O (IGZO) and microcrystalline Al-doped ZnO (AZO) thin films were fabricated on plastic substrates and characterized for flexible electronic applications. The device cell sizes were varied to 25 × 25, 50 × 50, 100 × 100, and 200 × 200 μm2 to examine the effects of cell size on the resistive-switching (RS) behaviors at a flat state and under bending conditions. First, it was found that the high-resistance state programmed currents markedly increased with the increase in the cell size. Second, while the AZO RCM devices did not exhibit RESET operations at a curvature radius smaller than 8.0 mm, the IGZO RCM devices showed sound RS behaviors even at a curvature radius of 4.5 mm. Third, for the IGZO RCM devices with the cell size bigger than 100 × 100 μm2, the RESET operation could not be performed at a curvature radius smaller than 6.5 mm. Thus, it was elucidated that the RS characteristics of the flexible RCM devices using oxide semiconductor thin films were closely related to the types of RS materials and the cell size of the device.
High performance nonvolatile memory devices based on Cu2-xSe nanowires
NASA Astrophysics Data System (ADS)
Wu, Chun-Yan; Wu, Yi-Liang; Wang, Wen-Jian; Mao, Dun; Yu, Yong-Qiang; Wang, Li; Xu, Jun; Hu, Ji-Gang; Luo, Lin-Bao
2013-11-01
We report on the rational synthesis of one-dimensional Cu2-xSe nanowires (NWs) via a solution method. Electrical analysis of Cu2-xSe NWs based memory device exhibits a stable and reproducible bipolar resistive switching behavior with a low set voltage (0.3-0.6 V), which can enable the device to write and erase data efficiently. Remarkably, the memory device has a record conductance switching ratio of 108, much higher than other devices ever reported. At last, a conducting filaments model is introduced to account for the resistive switching behavior. The totality of this study suggests that the Cu2-xSe NWs are promising building blocks for fabricating high-performance and low-consumption nonvolatile memory devices.
Pulse width and height modulation for multi-level resistance in bi-layer TaOx based RRAM
NASA Astrophysics Data System (ADS)
Alamgir, Zahiruddin; Beckmann, Karsten; Holt, Joshua; Cady, Nathaniel C.
2017-08-01
Mutli-level switching in resistive memory devices enables a wide range of computational paradigms, including neuromorphic and cognitive computing. To this end, we have developed a bi-layer tantalum oxide based resistive random access memory device using Hf as the oxygen exchange layer. Multiple, discrete resistance levels were achieved by modulating the RESET pulse width and height, ranging from 2 kΩ to several MΩ. For a fixed pulse height, OFF state resistance was found to increase gradually with the increase in the pulse width, whereas for a fixed pulse width, the increase in the pulse height resulted in drastic changes in resistance. Resistive switching in these devices transitioned from Schottky emission in the OFF state to tunneling based conduction in the ON state, based on I-V curve fitting and temperature dependent current measurements. These devices also demonstrated endurance of more than 108 cycles with a satisfactory Roff/Ron ratio and retention greater than 104 s.
Hu, Wei; Qin, Ni; Wu, Guangheng; Lin, Yanting; Li, Shuwei; Bao, Dinghua
2012-09-12
The opportunity of spinel ferrites in nonvolatile memory device applications has been demonstrated by the resistive switching performance characteristics of a Pt/NiFe(2)O(4)/Pt structure, such as low operating voltage, high device yield, long retention time (up to 10(5) s), and good endurance (up to 2.2 × 10(4) cycles). The dominant conduction mechanisms are Ohmic conduction in the low-resistance state and in the lower-voltage region of the high-resistance state and Schottky emission in the higher-voltage region of the high-resistance state. On the basis of measurements of the temperature dependence of the resistances and magnetic properties in different resistance states, we explain the physical mechanism of resistive switching of Pt/NiFe(2)O(4)/Pt devices using the model of formation and rupture of conducting filaments by considering the thermal effect of oxygen vacancies and changes in the valences of cations due to the redox effect.
Acharya, Susant Kumar; Jo, Janghyun; Raveendra, Nallagatlla Venkata; Dash, Umasankar; Kim, Miyoung; Baik, Hionsuck; Lee, Sangik; Park, Bae Ho; Lee, Jae Sung; Chae, Seung Chul; Hwang, Cheol Seong; Jung, Chang Uk
2017-07-27
An oxide-based resistance memory is a leading candidate to replace Si-based flash memory as it meets the emerging specifications for future memory devices. The non-uniformity in the key switching parameters and low endurance in conventional resistance memory devices are preventing its practical application. Here, a novel strategy to overcome the aforementioned challenges has been unveiled by tuning the growth direction of epitaxial brownmillerite SrFeO 2.5 thin films along the SrTiO 3 [111] direction so that the oxygen vacancy channels can connect both the top and bottom electrodes rather directly. The controlled oxygen vacancy channels help reduce the randomness of the conducting filament (CF). The resulting device displayed high endurance over 10 6 cycles, and a short switching time of ∼10 ns. In addition, the device showed very high uniformity in the key switching parameters for device-to-device and within a device. This work demonstrates a feasible example for improving the nanoscale device performance by controlling the atomic structure of a functional oxide layer.
Physical principles and current status of emerging non-volatile solid state memories
NASA Astrophysics Data System (ADS)
Wang, L.; Yang, C.-H.; Wen, J.
2015-07-01
Today the influence of non-volatile solid-state memories on persons' lives has become more prominent because of their non-volatility, low data latency, and high robustness. As a pioneering technology that is representative of non-volatile solidstate memories, flash memory has recently seen widespread application in many areas ranging from electronic appliances, such as cell phones and digital cameras, to external storage devices such as universal serial bus (USB) memory. Moreover, owing to its large storage capacity, it is expected that in the near future, flash memory will replace hard-disk drives as a dominant technology in the mass storage market, especially because of recently emerging solid-state drives. However, the rapid growth of the global digital data has led to the need for flash memories to have larger storage capacity, thus requiring a further downscaling of the cell size. Such a miniaturization is expected to be extremely difficult because of the well-known scaling limit of flash memories. It is therefore necessary to either explore innovative technologies that can extend the areal density of flash memories beyond the scaling limits, or to vigorously develop alternative non-volatile solid-state memories including ferroelectric random-access memory, magnetoresistive random-access memory, phase-change random-access memory, and resistive random-access memory. In this paper, we review the physical principles of flash memories and their technical challenges that affect our ability to enhance the storage capacity. We then present a detailed discussion of novel technologies that can extend the storage density of flash memories beyond the commonly accepted limits. In each case, we subsequently discuss the physical principles of these new types of non-volatile solid-state memories as well as their respective merits and weakness when utilized for data storage applications. Finally, we predict the future prospects for the aforementioned solid-state memories for the next generation of data-storage devices based on a comparison of their performance. [Figure not available: see fulltext.
Nanoscale thermal cross-talk effect on phase-change probe memory.
Wang, Lei; Wen, Jing; Xiong, Bangshu
2018-05-14
Phase-change probe memory is considered as one of the most promising means for next-generation mass storage devices. However, the achievable storage density of phase-change probe memory is drastically affected by the resulting thermal cross-talk effect while previously lacking of detailed study. Therefore, a three dimensional model that couples electrical, thermal, and phase-change processes of the Ge2Sb2Te5 media is developed, and subsequently deployed to assess the thermal cross-talk effect based on Si/TiN/ Ge2Sb2Te5/diamond-like carbon structure by appropriately tailoring the electro-thermal and geometrical properties of the storage media stack for a variety of external excitations. The modeling results show that the diamond-like carbon capping with a thin thickness, a high electrical conductivity, and a low thermal conductivity is desired to minimize the thermal cross-talk, while the TiN underlayer has a slight impact on the thermal cross-talk. Combining the modeling findings with the previous film deposition experience, an optimized phase-change probe memory architecture is presented, and its capability of providing ultra-high recording density simultaneously with a sufficiently low thermal cross-talk is demonstrated. . © 2018 IOP Publishing Ltd.
Nonvolatile infrared memory in MoS2/PbS van der Waals heterostructures
Wen, Yao; Cai, Kaiming; Cheng, Ruiqing; Yin, Lei; Zhang, Yu; Li, Jie; Wang, Zhenxing; Wang, Feng; Wang, Fengmei; Shifa, Tofik Ahmed; Jiang, Chao; Yang, Hyunsoo
2018-01-01
Optoelectronic devices for information storage and processing are at the heart of optical communication technology due to their significant applications in optical recording and computing. The infrared radiations of 850, 1310, and 1550 nm with low energy dissipation in optical fibers are typical optical communication wavebands. However, optoelectronic devices that could convert and store the infrared data into electrical signals, thereby enabling optical data communications, have not yet been realized. We report an infrared memory device using MoS2/PbS van der Waals heterostructures, in which the infrared pulse intrigues a persistent resistance state that hardly relaxes within our experimental time scales (more than 104 s). The device fully retrieves the memory state even after powering off for 3 hours, indicating its potential for nonvolatile storage devices. Furthermore, the device presents a reconfigurable switch of 2000 stable cycles. Supported by a theoretical model with quantitative analysis, we propose that the optical memory and the electrical erasing phenomenon, respectively, originate from the localization of infrared-induced holes in PbS and gate voltage pulse-enhanced tunneling of electrons from MoS2 to PbS. The demonstrated MoS2 heterostructure–based memory devices open up an exciting field for optoelectronic infrared memory and programmable logic devices. PMID:29770356
Resistive switching effect of N-doped MoS2-PVP nanocomposites films for nonvolatile memory devices
NASA Astrophysics Data System (ADS)
Wu, Zijin; Wang, Tongtong; Sun, Changqi; Liu, Peitao; Xia, Baorui; Zhang, Jingyan; Liu, Yonggang; Gao, Daqiang
2017-12-01
Resistive memory technology is very promising in the field of semiconductor memory devices. According to Liu et al, MoS2-PVP nanocomposite can be used as an active layer material for resistive memory devices due to its bipolar resistive switching behavior. Recent studies have also indicated that the doping of N element can reduce the band gap of MoS2 nanosheets, which is conducive to improving the conductivity of the material. Therefore, in this paper, we prepared N-doped MoS2 nanosheets and then fabricated N-doped MoS2-PVP nanocomposite films by spin coating. Finally, the resistive memory [C. Tan et al., Chem. Soc. Rev. 44, 2615 (2015)], device with ITO/N-doped MoS2-PVP/Pt structure was fabricated. Study on the I-V characteristics shows that the device has excellent resistance switching effect. It is worth mentioning that our device possesses a threshold voltage of 0.75 V, which is much better than 3.5 V reported previously for the undoped counterparts. The above research shows that N-doped MoS2-PVP nanocomposite films can be used as the active layer of resistive switching memory devices, and will make the devices have better performance.
Nonvolatile infrared memory in MoS2/PbS van der Waals heterostructures.
Wang, Qisheng; Wen, Yao; Cai, Kaiming; Cheng, Ruiqing; Yin, Lei; Zhang, Yu; Li, Jie; Wang, Zhenxing; Wang, Feng; Wang, Fengmei; Shifa, Tofik Ahmed; Jiang, Chao; Yang, Hyunsoo; He, Jun
2018-04-01
Optoelectronic devices for information storage and processing are at the heart of optical communication technology due to their significant applications in optical recording and computing. The infrared radiations of 850, 1310, and 1550 nm with low energy dissipation in optical fibers are typical optical communication wavebands. However, optoelectronic devices that could convert and store the infrared data into electrical signals, thereby enabling optical data communications, have not yet been realized. We report an infrared memory device using MoS 2 /PbS van der Waals heterostructures, in which the infrared pulse intrigues a persistent resistance state that hardly relaxes within our experimental time scales (more than 10 4 s). The device fully retrieves the memory state even after powering off for 3 hours, indicating its potential for nonvolatile storage devices. Furthermore, the device presents a reconfigurable switch of 2000 stable cycles. Supported by a theoretical model with quantitative analysis, we propose that the optical memory and the electrical erasing phenomenon, respectively, originate from the localization of infrared-induced holes in PbS and gate voltage pulse-enhanced tunneling of electrons from MoS 2 to PbS. The demonstrated MoS 2 heterostructure-based memory devices open up an exciting field for optoelectronic infrared memory and programmable logic devices.
General purpose programmable accelerator board
Robertson, Perry J.; Witzke, Edward L.
2001-01-01
A general purpose accelerator board and acceleration method comprising use of: one or more programmable logic devices; a plurality of memory blocks; bus interface for communicating data between the memory blocks and devices external to the board; and dynamic programming capabilities for providing logic to the programmable logic device to be executed on data in the memory blocks.
Federal Register 2010, 2011, 2012, 2013, 2014
2011-01-25
... INTERNATIONAL TRADE COMMISSION [Investigation No. 337-TA-683] In the Matter of Certain MLC Flash Memory Devices and Products Containing Same; Notice of Commission Determination Not To Review an Initial... the United States after importation of certain MLC flash memory devices and products containing same...
Scalability of voltage-controlled filamentary and nanometallic resistance memory devices.
Lu, Yang; Lee, Jong Ho; Chen, I-Wei
2017-08-31
Much effort has been devoted to device and materials engineering to realize nanoscale resistance random access memory (RRAM) for practical applications, but a rational physical basis to be relied on to design scalable devices spanning many length scales is still lacking. In particular, there is no clear criterion for switching control in those RRAM devices in which resistance changes are limited to localized nanoscale filaments that experience concentrated heat, electric current and field. Here, we demonstrate voltage-controlled resistance switching, always at a constant characteristic critical voltage, for macro and nanodevices in both filamentary RRAM and nanometallic RRAM, and the latter switches uniformly and does not require a forming process. As a result, area-scalability can be achieved under a device-area-proportional current compliance for the low resistance state of the filamentary RRAM, and for both the low and high resistance states of the nanometallic RRAM. This finding will help design area-scalable RRAM at the nanoscale. It also establishes an analogy between RRAM and synapses, in which signal transmission is also voltage-controlled.
NASA Astrophysics Data System (ADS)
Sargentis, Ch.; Giannakopoulos, K.; Travlos, A.; Tsamakis, D.
2007-04-01
Floating gate devices with nanoparticles embedded in dielectrics have recently attracted much attention due to the fact that these devices operate as non-volatile memories with high speed, high density and low power consumption. In this paper, memory devices containing gold (Au) nanoparticles have been fabricated using e-gun evaporation. The Au nanoparticles are deposited on a very thin SiO 2 layer and are then fully covered by a HfO 2 layer. The HfO 2 is a high- k dielectric and gives good scalability to the fabricated devices. We studied the effect of the deposition parameters to the size and the shape of the Au nanoparticles using capacitance-voltage and conductance-voltage measurements, we demonstrated that the fabricated device can indeed operate as a low-voltage memory device.
NASA Astrophysics Data System (ADS)
Ham, Jung Hoon; Oh, Do Hyun; Cho, Sung Hwan; Jung, Jae Hun; Kim, Tae Whan; Ryu, Eui Dock; Kim, Sang Wook
2009-03-01
Current-voltage (I-V) curves at 300 K for Al/InP-ZnS nanoparticles embedded in a polymethyl methacrylate layer/Al devices showed electrical bistability for write-once-read-many-times (WORM) memory devices. From the I-V curves, the ON/OFF ratio for the device with InP-ZnS nanoparticles was significantly larger than that for the device without InP-ZnS nanoparticles, indicative of the existence of charge capture in the InP nanoparticles. The estimated retention time of the ON state for the WORM memory device was more than 10 years. The carrier transport mechanisms for the WORM memory devices are described by using several models to fit the experimental I-V data.
Wide memory window in graphene oxide charge storage nodes
NASA Astrophysics Data System (ADS)
Wang, Shuai; Pu, Jing; Chan, Daniel S. H.; Cho, Byung Jin; Loh, Kian Ping
2010-04-01
Solution-processable, isolated graphene oxide (GO) monolayers have been used as a charge trapping dielectric in TaN gate/Al2O3/isolated GO sheets/SiO2/p-Si memory device (TANOS). The TANOS type structure serves as memory device with the threshold voltage controlled by the amount of charge trapped in the GO sheet. Capacitance-Voltage hysteresis curves reveal a 7.5 V memory window using the sweep voltage of -5-14 V. Thermal reduction in the GO to graphene reduces the memory window to 1.4 V. The unique charge trapping properties of GO points to the potential applications in flexible organic memory devices.
Solution processed molecular floating gate for flexible flash memories
NASA Astrophysics Data System (ADS)
Zhou, Ye; Han, Su-Ting; Yan, Yan; Huang, Long-Biao; Zhou, Li; Huang, Jing; Roy, V. A. L.
2013-10-01
Solution processed fullerene (C60) molecular floating gate layer has been employed in low voltage nonvolatile memory device on flexible substrates. We systematically studied the charge trapping mechanism of the fullerene floating gate for both p-type pentacene and n-type copper hexadecafluorophthalocyanine (F16CuPc) semiconductor in a transistor based flash memory architecture. The devices based on pentacene as semiconductor exhibited both hole and electron trapping ability, whereas devices with F16CuPc trapped electrons alone due to abundant electron density. All the devices exhibited large memory window, long charge retention time, good endurance property and excellent flexibility. The obtained results have great potential for application in large area flexible electronic devices.
Solution processed molecular floating gate for flexible flash memories
Zhou, Ye; Han, Su-Ting; Yan, Yan; Huang, Long-Biao; Zhou, Li; Huang, Jing; Roy, V. A. L.
2013-01-01
Solution processed fullerene (C60) molecular floating gate layer has been employed in low voltage nonvolatile memory device on flexible substrates. We systematically studied the charge trapping mechanism of the fullerene floating gate for both p-type pentacene and n-type copper hexadecafluorophthalocyanine (F16CuPc) semiconductor in a transistor based flash memory architecture. The devices based on pentacene as semiconductor exhibited both hole and electron trapping ability, whereas devices with F16CuPc trapped electrons alone due to abundant electron density. All the devices exhibited large memory window, long charge retention time, good endurance property and excellent flexibility. The obtained results have great potential for application in large area flexible electronic devices. PMID:24172758
Resonant tunneling based graphene quantum dot memristors.
Pan, Xuan; Skafidas, Efstratios
2016-12-08
In this paper, we model two-terminal all graphene quantum dot (GQD) based resistor-type memory devices (memristors). The resistive switching is achieved by resonant electron tunneling. We show that parallel GQDs can be used to create multi-state memory circuits. The number of states can be optimised with additional voltage sources, whilst the noise margin for each state can be controlled by appropriately choosing the branch resistance. A three-terminal GQD device configuration is also studied. The addition of an isolated gate terminal can be used to add further or modify the states of the memory device. The proposed devices provide a promising route towards volatile memory devices utilizing only atomically thin two-dimensional graphene.
NASA Astrophysics Data System (ADS)
Zhou, Xilin; Wu, Liangcai; Song, Zhitang; Rao, Feng; Cheng, Yan; Peng, Cheng; Yao, Dongning; Song, Sannian; Liu, Bo; Feng, Songlin; Chen, Bomy
2011-07-01
The phase change memory with monolayer chalcogenide film (Si18Sb52Te30) is investigated for the feasibility of multilevel data storage. During the annealing of the film, a relatively stable intermediate resistance can be obtained at an appropriate heating rate. The transmission electron microscopy in situ analysis reveals a conversion of crystallization mechanism from nucleation to crystal growth, which leads a continuous reduction in the degree of disorder. It is indicated from the electrical properties of the devices that the fall edge of the voltage pulse is the critical factor that determines a reliable triple-level resistance state of the phase change memory cell.
NASA Astrophysics Data System (ADS)
Zhang, Lei; Xu, Haiyang; Wang, Zhongqiang; Yu, Hao; Ma, Jiangang; Liu, Yichun
2016-01-01
The coexistence of uniform bipolar and unipolar resistive-switching (RS) characteristics was demonstrated in a double-layer Ag/ZnS-Ag/CuAlO2/Pt memory device. By changing the compliance current (CC) from 1 mA to 10 mA, the RS behavior can be converted from the bipolar mode (BRS) to the unipolar mode (URS). The temperature dependence of low resistance states further indicates that the CFs are composed of the Ag atoms and Cu vacancies for the BRS mode and URS mode, respectively. For this double-layer structure device, the thicker conducting filaments (CFs) will be formed in the ZnS-Ag layer, and it can act as tip electrodes. Thus, the formation and rupture of these two different CFs are located in the CuAlO2 layer, realizing the uniform and stable BRS and URS.
Nanoelectronics from the bottom up.
Lu, Wei; Lieber, Charles M
2007-11-01
Electronics obtained through the bottom-up approach of molecular-level control of material composition and structure may lead to devices and fabrication strategies not possible with top-down methods. This review presents a brief summary of bottom-up and hybrid bottom-up/top-down strategies for nanoelectronics with an emphasis on memories based on the crossbar motif. First, we will discuss representative electromechanical and resistance-change memory devices based on carbon nanotube and core-shell nanowire structures, respectively. These device structures show robust switching, promising performance metrics and the potential for terabit-scale density. Second, we will review architectures being developed for circuit-level integration, hybrid crossbar/CMOS circuits and array-based systems, including experimental demonstrations of key concepts such lithography-independent, chemically coded stochastic demultipluxers. Finally, bottom-up fabrication approaches, including the opportunity for assembly of three-dimensional, vertically integrated multifunctional circuits, will be critically discussed.
NASA Astrophysics Data System (ADS)
Hong, Augustin Jinwoo
Non-volatile memory devices have attracted much attention because data can be retained without power consumption more than a decade. Therefore, non-volatile memory devices are essential to mobile electronic applications. Among state of the art non-volatile memory devices, NAND flash memory has earned the highest attention because of its ultra-high scalability and therefore its ultra-high storage capacity. However, human desire as well as market competition requires not only larger storage capacity but also lower power consumption for longer battery life time. One way to meet this human desire and extend the benefits of NAND flash memory is finding out new materials for storage layer inside the flash memory, which is called floating gate in the state of the art flash memory device. In this dissertation, we study new materials for the floating gate that can lower down the power consumption and increase the storage capacity at the same time. To this end, we employ various materials such as metal nanodot, metal thin film and graphene incorporating complementary-metal-oxide-semiconductor (CMOS) compatible processes. Experimental results show excellent memory effects at relatively low operating voltages. Detailed physics and analysis on experimental results are discussed. These new materials for data storage can be promising candidates for future non-volatile memory application beyond the state of the art flash technologies.
A chiral-based magnetic memory device without a permanent magnet
Dor, Oren Ben; Yochelis, Shira; Mathew, Shinto P.; Naaman, Ron; Paltiel, Yossi
2013-01-01
Several technologies are currently in use for computer memory devices. However, there is a need for a universal memory device that has high density, high speed and low power requirements. To this end, various types of magnetic-based technologies with a permanent magnet have been proposed. Recent charge-transfer studies indicate that chiral molecules act as an efficient spin filter. Here we utilize this effect to achieve a proof of concept for a new type of chiral-based magnetic-based Si-compatible universal memory device without a permanent magnet. More specifically, we use spin-selective charge transfer through a self-assembled monolayer of polyalanine to magnetize a Ni layer. This magnitude of magnetization corresponds to applying an external magnetic field of 0.4 T to the Ni layer. The readout is achieved using low currents. The presented technology has the potential to overcome the limitations of other magnetic-based memory technologies to allow fabricating inexpensive, high-density universal memory-on-chip devices. PMID:23922081
A chiral-based magnetic memory device without a permanent magnet.
Ben Dor, Oren; Yochelis, Shira; Mathew, Shinto P; Naaman, Ron; Paltiel, Yossi
2013-01-01
Several technologies are currently in use for computer memory devices. However, there is a need for a universal memory device that has high density, high speed and low power requirements. To this end, various types of magnetic-based technologies with a permanent magnet have been proposed. Recent charge-transfer studies indicate that chiral molecules act as an efficient spin filter. Here we utilize this effect to achieve a proof of concept for a new type of chiral-based magnetic-based Si-compatible universal memory device without a permanent magnet. More specifically, we use spin-selective charge transfer through a self-assembled monolayer of polyalanine to magnetize a Ni layer. This magnitude of magnetization corresponds to applying an external magnetic field of 0.4 T to the Ni layer. The readout is achieved using low currents. The presented technology has the potential to overcome the limitations of other magnetic-based memory technologies to allow fabricating inexpensive, high-density universal memory-on-chip devices.
Performance Measurement of a Multi-Level/Analog Ferroelectric Memory Device Design
NASA Technical Reports Server (NTRS)
MacLeod, Todd C.; Phillips, Thomas A.; Ho, Fat D.
2007-01-01
Increasing the memory density and utilizing the unique characteristics of ferroelectric devices is important in making ferroelectric memory devices more desirable to the consumer. This paper describes the characterization of a design that allows multiple levels to be stored in a ferroelectric based memory cell. It can be used to store multiple bits or analog values in a high speed nonvolatile memory. The design utilizes the hysteresis characteristic of ferroelectric transistors to store an analog value in the memory cell. The design also compensates for the decay of the polarization of the ferroelectric material over time. This is done by utilizing a pair of ferroelectric transistors to store the data. One transistor is used a reference to determinethe amount of decay that has occurred since the pair was programmed. The second transistor stores the analog value as a polarization value between zero and saturated. The design allows digital data to be stored as multiple bits in each memory cell. The number of bits per cell that can be stored will vary with the decay rate of the ferroelectric transistors and the repeatability of polarization between transistors. This paper presents measurements of an actual prototype memory cell. This prototype is not a complete implementation of a device, but instead, a prototype of the storage and retrieval portion of an actual device. The performance of this prototype is presented with the projected performance of the overall device. This memory design will be useful because it allows higher memory density, compensates for the environmental and ferroelectric aging processes, allows analog values to be directly stored in memory, compensates for the thermal and radiation environments associated with space operations, and relies only on existing technologies.
NASA Technical Reports Server (NTRS)
Liu, S. Q.; Wu, N. J.; Ignatiev, A.
2001-01-01
A novel electric pulse-induced resistive change (EPIR) effect has been found in thin film colossal magnetoresistive (CMR) materials, and has shown promise for the development of resistive, nonvolatile memory. The EPIR effect is induced by the application of low voltage (< 4 V) and short duration (< 20 ns) electrical pulses across a thin film sample of a CMR material at room temperature and under no applied magnetic field. The pulse can directly either increase or decrease the resistance of the thin film sample depending on pulse polarity. The sample resistance change has been shown to be over two orders of magnitude, and is nonvolatile after pulsing. The sample resistance can also be changed through multiple levels - as many as 50 have been shown. Such a device can provide a way for the development of a new kind of nonvolatile multiple-valued memory with high density, fast write/read speed, low power-consumption, and potential high radiation-hardness.
Space and power efficient hybrid counters array
Gara, Alan G [Mount Kisco, NY; Salapura, Valentina [Chappaqua, NY
2009-05-12
A hybrid counter array device for counting events. The hybrid counter array includes a first counter portion comprising N counter devices, each counter device for receiving signals representing occurrences of events from an event source and providing a first count value corresponding to a lower order bits of the hybrid counter array. The hybrid counter array includes a second counter portion comprising a memory array device having N addressable memory locations in correspondence with the N counter devices, each addressable memory location for storing a second count value representing higher order bits of the hybrid counter array. A control device monitors each of the N counter devices of the first counter portion and initiates updating a value of a corresponding second count value stored at the corresponding addressable memory location in the second counter portion. Thus, a combination of the first and second count values provide an instantaneous measure of number of events received.
Space and power efficient hybrid counters array
Gara, Alan G.; Salapura, Valentina
2010-03-30
A hybrid counter array device for counting events. The hybrid counter array includes a first counter portion comprising N counter devices, each counter device for receiving signals representing occurrences of events from an event source and providing a first count value corresponding to a lower order bits of the hybrid counter array. The hybrid counter array includes a second counter portion comprising a memory array device having N addressable memory locations in correspondence with the N counter devices, each addressable memory location for storing a second count value representing higher order bits of the hybrid counter array. A control device monitors each of the N counter devices of the first counter portion and initiates updating a value of a corresponding second count value stored at the corresponding addressable memory location in the second counter portion. Thus, a combination of the first and second count values provide an instantaneous measure of number of events received.
Electrical studies of Ge4Sb1Te5 devices for memory applications
NASA Astrophysics Data System (ADS)
Sangeetha, B. G.; Shylashree, N.
2018-05-01
In this paper, the Ge4Sb1Te5 thin film device preparation and electrical studies for memory devices were carried out. The device was deposited using vapor-evaporation technique. RESET to SET state switching was shown using current-voltage characterization. The current-voltage characterization shows the switching between SET to RESET state and it was found that it requires a low energy for transition. Switching between amorphous to crystalline nature was studied using resistance-voltage characteristics. The endurance showed the effective use of this composition for memory device.
NASA Technical Reports Server (NTRS)
Basalayev, G. V.; Kmet, A. B.; Rakov, M. A.; Tarasevich, V. A.
1974-01-01
Several methods of transfer and processing of data whose practical implementation requires operational memory devices are described. Devices incorporating multistable elements are proposed and their main parameters are given. The possibility of using the proposed devices for storing information for transmission in space radio communications channels is examined.
Spectromicroscopic insights for rational design of redox-based memristive devices
Baeumer, Christoph; Schmitz, Christoph; Ramadan, Amr H. H.; Du, Hongchu; Skaja, Katharina; Feyer, Vitaliy; Müller, Philipp; Arndt, Benedikt; Jia, Chun-Lin; Mayer, Joachim; De Souza, Roger A.; Michael Schneider, Claus; Waser, Rainer; Dittmann, Regina
2015-01-01
The demand for highly scalable, low-power devices for data storage and logic operations is strongly stimulating research into resistive switching as a novel concept for future non-volatile memory devices. To meet technological requirements, it is imperative to have a set of material design rules based on fundamental material physics, but deriving such rules is proving challenging. Here, we elucidate both switching mechanism and failure mechanism in the valence-change model material SrTiO3, and on this basis we derive a design rule for failure-resistant devices. Spectromicroscopy reveals that the resistance change during device operation and failure is indeed caused by nanoscale oxygen migration resulting in localized valence changes between Ti4+ and Ti3+. While fast reoxidation typically results in retention failure in SrTiO3, local phase separation within the switching filament stabilizes the retention. Mimicking this phase separation by intentionally introducing retention-stabilization layers with slow oxygen transport improves retention times considerably. PMID:26477940
Charge Carrier Transport Mechanism Based on Stable Low Voltage Organic Bistable Memory Device.
Ramana, V V; Moodley, M K; Kumar, A B V Kiran; Kannan, V
2015-05-01
A solution processed two terminal organic bistable memory device was fabricated utilizing films of polymethyl methacrylate PMMA/ZnO/PMMA on top of ITO coated glass. Electrical characterization of the device structure showed that the two terminal device exhibited favorable switching characteristics with an ON/OFF ratio greater than 1 x 10(4) when the voltage was swept between - 2 V and +3 V. The device maintained its state after removal of the bias voltage. The device did not show degradation after a 1-h retention test at 120 degrees C. The memory functionality was consistent even after fifty cycles of operation. The charge transport switching mechanism is discussed on the basis of carrier transport mechanism and our analysis of the data shows that the charge carrier trans- port mechanism of the device during the writing process can be explained by thermionic emission (TE) and space-charge-limited-current (SCLC) mechanism models while erasing process could be explained by the FN tunneling mechanism. This demonstration provides a class of memory devices with the potential for low-cost, low-power consumption applications, such as a digital memory cell.
High Density Memory Based on Quantum Device Technology
NASA Technical Reports Server (NTRS)
vanderWagt, Paul; Frazier, Gary; Tang, Hao
1995-01-01
We explore the feasibility of ultra-high density memory based on quantum devices. Starting from overall constraints on chip area, power consumption, access speed, and noise margin, we deduce boundaries on single cell parameters such as required operating voltage and standby current. Next, the possible role of quantum devices is examined. Since the most mature quantum device, the resonant tunneling diode (RTD) can easily be integrated vertically, it naturally leads to the issue of 3D integrated memory. We propose a novel method of addressing vertically integrated bistable two-terminal devices, such as resonant tunneling diodes (RTD) and Esaki diodes, that avoids individual physical contacts. The new concept has been demonstrated experimentally in memory cells of field effect transistors (FET's) and stacked RTD's.
A fast and low-power microelectromechanical system-based non-volatile memory device
Lee, Sang Wook; Park, Seung Joo; Campbell, Eleanor E. B.; Park, Yung Woo
2011-01-01
Several new generation memory devices have been developed to overcome the low performance of conventional silicon-based flash memory. In this study, we demonstrate a novel non-volatile memory design based on the electromechanical motion of a cantilever to provide fast charging and discharging of a floating-gate electrode. The operation is demonstrated by using an electromechanical metal cantilever to charge a floating gate that controls the charge transport through a carbon nanotube field-effect transistor. The set and reset currents are unchanged after more than 11 h constant operation. Over 500 repeated programming and erasing cycles were demonstrated under atmospheric conditions at room temperature without degradation. Multinary bit programming can be achieved by varying the voltage on the cantilever. The operation speed of the device is faster than a conventional flash memory and the power consumption is lower than other memory devices. PMID:21364559
Ferroelectric Memory Devices and a Proposed Standardized Test System Design
1992-06-01
positive clock transition. This provides automatic data protection in case of power loss. The device is being evaluated for applications such as automobile ...systems requiring nonvolatile memory and as these systems become more complex, the demand for reprogrammable nonvolatile memory increases. The...complexity and cost in making conventional nonvolatile memory reprogrammable also increases, so the potential for using ferroelectric memory as a replacement
Guide wire extension for shape memory polymer occlusion removal devices
Maitland, Duncan J [Pleasant Hill, CA; Small, IV, Ward; Hartman, Jonathan [Sacramento, CA
2009-11-03
A flexible extension for a shape memory polymer occlusion removal device. A shape memory polymer instrument is transported through a vessel via a catheter. A flexible elongated unit is operatively connected to the distal end of the shape memory polymer instrument to enhance maneuverability through tortuous paths en route to the occlusion.
Federal Register 2010, 2011, 2012, 2013, 2014
2011-12-27
... INTERNATIONAL TRADE COMMISSION [Investigation No. 337-TA-821] Certain Dynamic Random Access Memory... importation, and the sale within the United States after importation of certain dynamic random access memory... certain dynamic random access memory devices, and products containing same that infringe one or more of...
Electronic device aspects of neural network memories
NASA Technical Reports Server (NTRS)
Lambe, J.; Moopenn, A.; Thakoor, A. P.
1985-01-01
The basic issues related to the electronic implementation of the neural network model (NNM) for content addressable memories are examined. A brief introduction to the principles of the NNM is followed by an analysis of the information storage of the neural network in the form of a binary connection matrix and the recall capability of such matrix memories based on a hardware simulation study. In addition, materials and device architecture issues involved in the future realization of such networks in VLSI-compatible ultrahigh-density memories are considered. A possible space application of such devices would be in the area of large-scale information storage without mechanical devices.
Solution-processed flexible NiO resistive random access memory device
NASA Astrophysics Data System (ADS)
Kim, Soo-Jung; Lee, Heon; Hong, Sung-Hoon
2018-04-01
Non-volatile memories (NVMs) using nanocrystals (NCs) as active materials can be applied to soft electronic devices requiring a low-temperature process because NCs do not require a heat treatment process for crystallization. In addition, memory devices can be implemented simply by using a patterning technique using a solution process. In this study, a flexible NiO ReRAM device was fabricated using a simple NC patterning method that controls the capillary force and dewetting of a NiO NC solution at low temperature. The switching behavior of a NiO NC based memory was clearly observed by conductive atomic force microscopy (c-AFM).
NASA Astrophysics Data System (ADS)
Yang, Ji-Hee; Yun, Da-Jeong; Seo, Gi-Ho; Kim, Seong-Min; Yoon, Myung-Han; Yoon, Sung-Min
2018-03-01
For flexible memory device applications, we propose memory thin-film transistors using an organic ferroelectric poly(vinylidene fluoride-trifluoroethylene) [P(VDF-TrFE)] gate insulator and an amorphous In-Ga-Zn-O (a-IGZO) active channel. The effects of electrode materials and their deposition methods on the characteristics of memory devices exploiting the ferroelectric field effect were investigated for the proposed ferroelectric memory thin-film transistors (Fe-MTFTs) at flat and bending states. It was found that the plasma-induced sputtering deposition and mechanical brittleness of the indium-tin oxide (ITO) markedly degraded the ferroelectric-field-effect-driven memory window and bending characteristics of the Fe-MTFTs. The replacement of ITO electrodes with metal aluminum (Al) electrodes prepared by plasma-free thermal evaporation greatly enhanced the memory device characteristics even under bending conditions owing to their mechanical ductility. Furthermore, poly(3,4-ethylenedioxythiophene)-poly(styrene sulfonate) (PEDOT:PSS) was introduced to achieve robust bending performance under extreme mechanical stress. The Fe-MTFTs using PEDOT:PSS source/drain electrodes were successfully fabricated and showed the potential for use as flexible memory devices. The suitable choice of electrode materials employed for the Fe-MTFTs is concluded to be one of the most important control parameters for highly functional flexible Fe-MTFTs.
Li, Wen; Guo, Fengning; Ling, Haifeng; Liu, Hui; Yi, Mingdong; Zhang, Peng; Wang, Wenjun; Xie, Linghai; Huang, Wei
2018-01-01
In this paper, the development of organic field-effect transistor (OFET) memory device based on isolated and ordered nanostructures (NSs) arrays of wide-bandgap (WBG) small-molecule organic semiconductor material [2-(9-(4-(octyloxy)phenyl)-9H-fluoren-2-yl)thiophene]3 (WG 3 ) is reported. The WG 3 NSs are prepared from phase separation by spin-coating blend solutions of WG 3 /trimethylolpropane (TMP), and then introduced as charge storage elements for nonvolatile OFET memory devices. Compared to the OFET memory device with smooth WG 3 film, the device based on WG 3 NSs arrays exhibits significant improvements in memory performance including larger memory window (≈45 V), faster switching speed (≈1 s), stable retention capability (>10 4 s), and reliable switching properties. A quantitative study of the WG 3 NSs morphology reveals that enhanced memory performance is attributed to the improved charge trapping/charge-exciton annihilation efficiency induced by increased contact area between the WG 3 NSs and pentacene layer. This versatile solution-processing approach to preparing WG 3 NSs arrays as charge trapping sites allows for fabrication of high-performance nonvolatile OFET memory devices, which could be applicable to a wide range of WBG organic semiconductor materials. © 2017 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.
NASA Astrophysics Data System (ADS)
Aneesh, J.; Predeep, P.
2011-10-01
Consequent to the fast increase in data storage requirements new materials and device structures are explored in a war footing. Organic memory devices are attracting lot of interest among the researchers and are becoming a hot topic of investigations. This study is an attempt to develop a tri-layer organic memory device using indium tin oxide (ITO) nanoparticles as charge trapping middle layer between tris-8(-hydroxyquinoline)aluminum (Alq3) layers employing spin coating technique. Device switching is studied by applying a current-voltage (I-V) sweep. On increasing the applied bias the device switched from the initial high resistance (OFF) state to a low resistance (ON) state at a switch on voltage of around 4 V. ON/OFF ratio is of the order of 100 at a read voltage of 2 V. The device is found to remain in the low resistance state on further scans, showing the applicability of this device as a write once read many times (WORM) memory.
NASA Astrophysics Data System (ADS)
Han, Su-Ting; Zhou, Ye; Chen, Bo; Zhou, Li; Yan, Yan; Zhang, Hua; Roy, V. A. L.
2015-10-01
Semiconducting two-dimensional materials appear to be excellent candidates for non-volatile memory applications. However, the limited controllability of charge trapping behaviors and the lack of multi-bit storage studies in two-dimensional based memory devices require further improvement for realistic applications. Here, we report a flash memory consisting of metal NPs-molybdenum disulphide (MoS2) as a floating gate by introducing a metal nanoparticle (NP) (Ag, Au, Pt) monolayer underneath the MoS2 nanosheets. Controlled charge trapping and long data retention have been achieved in a metal (Ag, Au, Pt) NPs-MoS2 floating gate flash memory. This controlled charge trapping is hypothesized to be attributed to band bending and a built-in electric field ξbi between the interface of the metal NPs and MoS2. The metal NPs-MoS2 floating gate flash memories were further proven to be multi-bit memory storage devices possessing a 3-bit storage capability and a good retention capability up to 104 s. We anticipate that these findings would provide scientific insight for the development of novel memory devices utilizing an atomically thin two-dimensional lattice structure.Semiconducting two-dimensional materials appear to be excellent candidates for non-volatile memory applications. However, the limited controllability of charge trapping behaviors and the lack of multi-bit storage studies in two-dimensional based memory devices require further improvement for realistic applications. Here, we report a flash memory consisting of metal NPs-molybdenum disulphide (MoS2) as a floating gate by introducing a metal nanoparticle (NP) (Ag, Au, Pt) monolayer underneath the MoS2 nanosheets. Controlled charge trapping and long data retention have been achieved in a metal (Ag, Au, Pt) NPs-MoS2 floating gate flash memory. This controlled charge trapping is hypothesized to be attributed to band bending and a built-in electric field ξbi between the interface of the metal NPs and MoS2. The metal NPs-MoS2 floating gate flash memories were further proven to be multi-bit memory storage devices possessing a 3-bit storage capability and a good retention capability up to 104 s. We anticipate that these findings would provide scientific insight for the development of novel memory devices utilizing an atomically thin two-dimensional lattice structure. Electronic supplementary information (ESI) available: Energy-dispersive X-ray spectroscopy (EDS) spectra of the metal NPs, SEM image of MoS2 on Au NPs, erasing operations of the metal NPs-MoS2 memory device, transfer characteristics of the standard FET devices and Ag NP devices under programming operation, tapping-mode AFM height image of the fabricated MoS2 film for pristine MoS2 flash memory, gate signals used for programming the Au NPs-MoS2 and Pt NPs-MoS2 flash memories, and data levels recorded for 100 sequential cycles. See DOI: 10.1039/c5nr05054e
Development of Next Generation Memory Test Experiment for Deployment on a Small Satellite
NASA Technical Reports Server (NTRS)
MacLeod, Todd; Ho, Fat D.
2012-01-01
The original Memory Test Experiment successfully flew on the FASTSAT satellite launched in November 2010. It contained a single Ramtron 512K ferroelectric memory. The memory device went through many thousands of read/write cycles and recorded any errors that were encountered. The original mission length was schedule to last 6 months but was extended to 18 months. New opportunities exist to launch a similar satellite and considerations for a new memory test experiment should be examined. The original experiment had to be designed and integrated in less than two months, so the experiment was a simple design using readily available parts. The follow-on experiment needs to be more sophisticated and encompass more technologies. This paper lays out the considerations for the design and development of this follow-on flight memory experiment. It also details the results from the original Memory Test Experiment that flew on board FASTSAT. Some of the design considerations for the new experiment include the number and type of memory devices to be used, the kinds of tests that will be performed, other data needed to analyze the results, and best use of limited resources on a small satellite. The memory technologies that are considered are FRAM, FLASH, SONOS, Resistive Memory, Phase Change Memory, Nano-wire Memory, Magneto-resistive Memory, Standard DRAM, and Standard SRAM. The kinds of tests that could be performed are read/write operations, non-volatile memory retention, write cycle endurance, power measurements, and testing Error Detection and Correction schemes. Other data that may help analyze the results are GPS location of recorded errors, time stamp of all data recorded, radiation measurements, temperature, and other activities being perform by the satellite. The resources of power, volume, mass, temperature, processing power, and telemetry bandwidth are extremely limited on a small satellite. Design considerations must be made to allow the experiment to not interfere with the satellite s primary mission.
Ban, Jianfeng; Zhu, Linjiang; Chen, Shaojun; Wang, Yiping
2016-01-01
To better understand shape memory materials and self-healing materials, a new series of liquid-crystalline shape memory polyurethane (LC-SMPU) composites, named SMPU-OOBAm, were successfully prepared by incorporating 4-octyldecyloxybenzoic acid (OOBA) into the PEG-based SMPU. The effect of OOBA on the structure, morphology, and properties of the material has been carefully investigated. The results demonstrate that SMPU-OOBAm has liquid crystalline properties, triple-shape memory properties, and self-healing properties. The incorporated OOBA promotes the crystallizability of both soft and hard segments of SMPU, and the crystallization rate of the hard segment of SMPU decreases when the OOBA-content increases. Additionally, the SMPU-OOBAm forms a two-phase separated structure (SMPU phase and OOBA phase), and it shows two-step modulus changes upon heating. Therefore, the SMPU-OOBAm exhibits triple-shape memory behavior, and the shape recovery ratio decreases with an increase in the OOBA content. Finally, SMPU-OOBAm exhibits self-healing properties. The new mechanism can be ascribed to the heating-induced “bleeding” of OOBA in the liquid crystalline state and the subsequent re-crystallization upon cooling. This successful combination of liquid crystalline properties, triple-shape memory properties, and self-healing properties make the SMPU-OOBAm composites ideal for many promising applications in smart optical devices, smart electronic devices, and smart sensors. PMID:28773914
Materials and methods for the preparation of nanocomposites
Nag, Angshuman; Talapin, Dmitri V.
2018-01-30
Disclosed herein is an isolable colloidal particle comprising a nanoparticle and an inorganic capping agent bound to the surface of the nanoparticle, a method for making the same in a biphasic solvent mixture, and the formation of structures and solids from the isolable colloidal particle. The process can yield photovoltaic cells, piezoelectric crystals, thermoelectric layers, optoelectronic layers, light emitting diodes, ferroelectric layers, thin film transistors, floating gate memory devices, phase change layers, and sensor devices.
Organic memory device with self-assembly monolayered aptamer conjugated nanoparticles
NASA Astrophysics Data System (ADS)
Oh, Sewook; Kim, Minkeun; Kim, Yejin; Jung, Hunsang; Yoon, Tae-Sik; Choi, Young-Jin; Jung Kang, Chi; Moon, Myeong-Ju; Jeong, Yong-Yeon; Park, In-Kyu; Ho Lee, Hyun
2013-08-01
An organic memory structure using monolayered aptamer conjugated gold nanoparticles (Au NPs) as charge storage nodes was demonstrated. Metal-pentacene-insulator-semiconductor device was adopted for the non-volatile memory effect through self assembly monolayer of A10-aptamer conjugated Au NPs, which was formed on functionalized insulator surface with prostate-specific membrane antigen protein. The capacitance versus voltage (C-V) curves obtained for the monolayered Au NPs capacitor exhibited substantial flat-band voltage shift (ΔVFB) or memory window of 3.76 V under (+/-)7 V voltage sweep. The memory device format can be potentially expanded to a highly specific capacitive sensor for the aptamer-specific biomolecule detection.
Terahertz electrical writing speed in an antiferromagnetic memory
Kašpar, Zdeněk; Campion, Richard P.; Baumgartner, Manuel; Sinova, Jairo; Kužel, Petr; Müller, Melanie; Kampfrath, Tobias
2018-01-01
The speed of writing of state-of-the-art ferromagnetic memories is physically limited by an intrinsic gigahertz threshold. Recently, realization of memory devices based on antiferromagnets, in which spin directions periodically alternate from one atomic lattice site to the next has moved research in an alternative direction. We experimentally demonstrate at room temperature that the speed of reversible electrical writing in a memory device can be scaled up to terahertz using an antiferromagnet. A current-induced spin-torque mechanism is responsible for the switching in our memory devices throughout the 12-order-of-magnitude range of writing speeds from hertz to terahertz. Our work opens the path toward the development of memory-logic technology reaching the elusive terahertz band. PMID:29740601
NASA Astrophysics Data System (ADS)
Bhattacharjee, Snigdha; Sarkar, Pranab Kumar; Prajapat, Manoj; Roy, Asim
2017-07-01
Molybdenum disulfide (MoS2) is of great interest for its applicability in various optoelectronic devices. Here we report the resistive switching properties of polymethylmethacrylate embedding MoS2 nano-crystals. The devices are developed on an ITO-coated PET substrate with copper as the top electrode. Systematic evaluation of resistive switching parameters, on the basis of MoS2 content, suggests non-volatile memory characteristics. A decent ON/OFF ratio, high retention time and long endurance of 3 × 103, 105 s and 105 cycles are respectively recorded in a device with 1 weight percent (wt%) of MoS2. The bending cyclic measurements confirm the flexibility of the memory devices with good electrical reliability as well as mechanical stability. In addition, multilevel storage has been demonstrated by controlling the current compliance and span of voltage sweeping in the memory device.
DOE Office of Scientific and Technical Information (OSTI.GOV)
Zhou, Yang; Yun, Dong Yeol; Kim, Tae Whan, E-mail: twk@hanyang.ac.kr
2014-12-08
Nonvolatile memory devices based on CuInS{sub 2} (CIS) quantum dots (QDs) embedded in a polymethylmethacrylate (PMMA) layer were fabricated using spin-coating method. The memory window widths of the capacitance-voltage (C-V) curves for the Al/CIS QDs embedded in PMMA layer/p-Si devices were 0.3, 0.6, and 1.0 V for sweep voltages of ±3, ±5, and ±7 V, respectively. Capacitance-cycle data demonstrated that the charge-trapping capability of the devices with an ON/OFF ratio value of 2.81 × 10{sup −10} was maintained for 8 × 10{sup 3} cycles without significant degradation and that the extrapolation of the ON/OFF ratio value to 1 × 10{sup 6} cycles converged to 2.40 × 10{sup −10}, indicative ofmore » the good stability of the devices. The memory mechanisms for the devices are described on the basis of the C-V curves and the energy-band diagrams.« less
NASA Astrophysics Data System (ADS)
Nishiura, Daisuke; Furuichi, Mikito; Sakaguchi, Hide
2015-09-01
The computational performance of a smoothed particle hydrodynamics (SPH) simulation is investigated for three types of current shared-memory parallel computer devices: many integrated core (MIC) processors, graphics processing units (GPUs), and multi-core CPUs. We are especially interested in efficient shared-memory allocation methods for each chipset, because the efficient data access patterns differ between compute unified device architecture (CUDA) programming for GPUs and OpenMP programming for MIC processors and multi-core CPUs. We first introduce several parallel implementation techniques for the SPH code, and then examine these on our target computer architectures to determine the most effective algorithms for each processor unit. In addition, we evaluate the effective computing performance and power efficiency of the SPH simulation on each architecture, as these are critical metrics for overall performance in a multi-device environment. In our benchmark test, the GPU is found to produce the best arithmetic performance as a standalone device unit, and gives the most efficient power consumption. The multi-core CPU obtains the most effective computing performance. The computational speed of the MIC processor on Xeon Phi approached that of two Xeon CPUs. This indicates that using MICs is an attractive choice for existing SPH codes on multi-core CPUs parallelized by OpenMP, as it gains computational acceleration without the need for significant changes to the source code.
NASA Astrophysics Data System (ADS)
Levy, Pablo
2015-03-01
In the first part of my talk, I will describe the status of the experimental research in Condensed Matter Physics in Argentina, biased towards developments related to micro and nanotechnology. In the second part, I will describe the MeMOSat Project, a consortium aimed at producing non-volatile memory devices to work in aggressive environments, like those found in the aerospace and nuclear industries. Our devices rely on the Resistive Switching mechanism, which produces a permanent but reversible change in the electrical resistance across a metal-insulator-metal structure by means of a pulsed protocol of electrical stimuli. Our project is devoted to the study of Memory Mechanisms in Oxides (MeMO) in order to establish a technological platform that tests the Resistive RAM (ReRAM) technology for aerospace applications. A review of MeMOSat's activities is presented, covering the initial Proof of Concept in ceramic millimeter sized samples; the study of different oxide-metal couples including (LaPr)2/3Ca1/3MnO, La2/3Ca1/3MnO3, YBa2Cu3O7, TiO2, HfO2, MgO and CuO; and recent miniaturized arrays of micrometer sized devices controlled by in-house designed electronics, which were launched with the BugSat01 satellite in June2014 by the argentinian company Satellogic.
MoSbTe for high-speed and high-thermal-stability phase-change memory applications
NASA Astrophysics Data System (ADS)
Liu, Wanliang; Wu, Liangcai; Li, Tao; Song, Zhitang; Shi, Jianjun; Zhang, Jing; Feng, Songlin
2018-04-01
Mo-doped Sb1.8Te materials and electrical devices were investigated for high-thermal-stability and high-speed phase-change memory applications. The crystallization temperature (t c = 185 °C) and 10-year data retention (t 10-year = 112 °C) were greatly enhanced compared with those of Ge2Sb2Te5 (t c = 150 °C, t 10-year = 85 °C) and pure Sb1.8Te (t c = 166 °C, t 10-year = 74 °C). X-ray diffraction and transmission electron microscopy results show that the Mo dopant suppresses crystallization, reducing the crystalline grain size. Mo2.0(Sb1.8Te)98.0-based devices were fabricated to evaluate the reversible phase transition properties. SET/RESET with a large operation window can be realized using a 10 ns pulse, which is considerably better than that required for Ge2Sb2Te5 (∼50 ns). Furthermore, ∼1 × 106 switching cycles were achieved.
Nanogap-Engineerable Electromechanical System for Ultralow Power Memory.
Zhang, Jian; Deng, Ya; Hu, Xiao; Nshimiyimana, Jean Pierre; Liu, Siyu; Chi, Xiannian; Wu, Pei; Dong, Fengliang; Chen, Peipei; Chu, Weiguo; Zhou, Haiqing; Sun, Lianfeng
2018-02-01
Nanogap engineering of low-dimensional nanomaterials has received considerable interest in a variety of fields, ranging from molecular electronics to memories. Creating nanogaps at a certain position is of vital importance for the repeatable fabrication of the devices. Here, a rational design of nonvolatile memories based on sub-5 nm nanogaped single-walled carbon nanotubes (SWNTs) via the electromechanical motion is reported. The nanogaps are readily realized by electroburning in a partially suspended SWNT device with nanoscale region. The SWNT memory devices are applicable for both metallic and semiconducting SWNTs, resolving the challenge of separation of semiconducting SWNTs from metallic ones. Meanwhile, the memory devices exhibit excellent performance: ultralow writing energy (4.1 × 10 -19 J bit -1 ), ON/OFF ratio of 10 5 , stable switching ON operations, and over 30 h retention time in ambient conditions.
Nonvolatile memory behavior of nanocrystalline cellulose/graphene oxide composite films
NASA Astrophysics Data System (ADS)
Valentini, L.; Cardinali, M.; Fortunati, E.; Kenny, J. M.
2014-10-01
With the continuous advance of modern electronics, the demand for nonvolatile memory cells rapidly grows. In order to develop post-silicon electronic devices, it is necessary to find innovative solutions to the eco-sustainability problem of materials for nonvolatile memory cells. In this work, we realized a resistive memory device based on graphene oxide (GO) and GO/cellulose nanocrystals (CNC) thin films. Aqueous solutions of GO and GO with CNC have been prepared and drop cast between two metal electrodes. Such thin-film based devices showed a transition between low and high conductivity states upon the forward and backward sweeping of an external electric field. This reversible current density transition behavior demonstrates a typical memory characteristic. The obtained results open an easy route for electronic information storage based on the integration of nanocrystalline cellulose onto graphene based devices.
Azurin/CdSe-ZnS-Based Bio-Nano Hybrid Structure for Nanoscale Resistive Memory Device.
Yagati, Ajay Kumar; Lee, Taek; Choi, Jeong-Woo
2017-07-15
In the present study, we propose a method for bio-nano hybrid formation by coupling a redox metalloprotein, Azurin, with CdSe-ZnS quantum dot for the development of a nanoscale resistive memory device. The covalent interaction between the two nanomaterials enables a strong and effective binding to form an azurin/CdSe-ZnS hybrid, and also enabled better controllability to couple with electrodes to examine the memory function properties. Morphological and optical properties were performed to confirm both hybrid formations and also their individual components. Current-Voltage (I-V) measurements on the hybrid nanostructures exhibited bistable current levels towards the memory function device, that and those characteristics were unnoticeable on individual nanomaterials. The hybrids showed good retention characteristics with high stability and durability, which is a promising feature for future nanoscale memory devices.
Nanogap‐Engineerable Electromechanical System for Ultralow Power Memory
Zhang, Jian; Deng, Ya; Hu, Xiao; Nshimiyimana, Jean Pierre; Liu, Siyu; Chi, Xiannian; Wu, Pei; Dong, Fengliang; Chen, Peipei
2017-01-01
Abstract Nanogap engineering of low‐dimensional nanomaterials has received considerable interest in a variety of fields, ranging from molecular electronics to memories. Creating nanogaps at a certain position is of vital importance for the repeatable fabrication of the devices. Here, a rational design of nonvolatile memories based on sub‐5 nm nanogaped single‐walled carbon nanotubes (SWNTs) via the electromechanical motion is reported. The nanogaps are readily realized by electroburning in a partially suspended SWNT device with nanoscale region. The SWNT memory devices are applicable for both metallic and semiconducting SWNTs, resolving the challenge of separation of semiconducting SWNTs from metallic ones. Meanwhile, the memory devices exhibit excellent performance: ultralow writing energy (4.1 × 10−19 J bit−1), ON/OFF ratio of 105, stable switching ON operations, and over 30 h retention time in ambient conditions. PMID:29619307
Ordering of guarded and unguarded stores for no-sync I/O
Gara, Alan; Ohmacht, Martin
2013-06-25
A parallel computing system processes at least one store instruction. A first processor core issues a store instruction. A first queue, associated with the first processor core, stores the store instruction. A second queue, associated with a first local cache memory device of the first processor core, stores the store instruction. The first processor core updates first data in the first local cache memory device according to the store instruction. The third queue, associated with at least one shared cache memory device, stores the store instruction. The first processor core invalidates second data, associated with the store instruction, in the at least one shared cache memory. The first processor core invalidates third data, associated with the store instruction, in other local cache memory devices of other processor cores. The first processor core flushing only the first queue.
Fast Initialization of Bubble-Memory Systems
NASA Technical Reports Server (NTRS)
Looney, K. T.; Nichols, C. D.; Hayes, P. J.
1986-01-01
Improved scheme several orders of magnitude faster than normal initialization scheme. State-of-the-art commercial bubble-memory device used. Hardware interface designed connects controlling microprocessor to bubblememory circuitry. System software written to exercise various functions of bubble-memory system in comparison made between normal and fast techniques. Future implementations of approach utilize E2PROM (electrically-erasable programable read-only memory) to provide greater system flexibility. Fastinitialization technique applicable to all bubble-memory devices.
NASA Astrophysics Data System (ADS)
Liu, Guangyu; Wu, Liangcai; Song, Zhitang; Liu, Yan; Li, Tao; Zhang, Sifan; Song, Sannian; Feng, Songlin
2017-12-01
A memory cell composed of a selector device and a storage device is the basic unit of phase change memory. The threshold switching effect, main principle of selectors, is a universal phenomenon in chalcogenide glasses. In this work, we put forward a safe and controllable method to prepare a SiGeAsTeN chalcogenide film by implanting As ions into sputtered SiGeTeN films. For the SiGeAsTeN material, the phase structure maintains the amorphous state, even at high temperature, indicating that no phase transition occurs for this chalcogenide-based material. The electrical test results show that the SiGeAsTeN-based devices exhibit good threshold switching characteristics and the switching voltage decreases with the increasing As content. The decrease in valence alternation pairs, reducing trap state density, may be the physical mechanism for lower switch-on voltage, which makes the SiGeAsTeN material more applicable in selector devices through component optimization.
DOE Office of Scientific and Technical Information (OSTI.GOV)
Evarts, Eric R.; Rippard, William H.; Pufall, Matthew R.
In a small fraction of magnetic-tunnel-junction-based magnetic random-access memory devices with in-plane free layers, the write-error rates (WERs) are higher than expected on the basis of the macrospin or quasi-uniform magnetization reversal models. In devices with increased WERs, the product of effective resistance and area, tunneling magnetoresistance, and coercivity do not deviate from typical device properties. However, the field-swept, spin-torque, ferromagnetic resonance (FS-ST-FMR) spectra with an applied DC bias current deviate significantly for such devices. With a DC bias of 300 mV (producing 9.9 × 10{sup 6} A/cm{sup 2}) or greater, these anomalous devices show an increase in the fraction of the power presentmore » in FS-ST-FMR modes corresponding to higher-order excitations of the free-layer magnetization. As much as 70% of the power is contained in higher-order modes compared to ≈20% in typical devices. Additionally, a shift in the uniform-mode resonant field that is correlated with the magnitude of the WER anomaly is detected at DC biases greater than 300 mV. These differences in the anomalous devices indicate a change in the micromagnetic resonant mode structure at high applied bias.« less
Development of non-volatile semiconductor memory
NASA Technical Reports Server (NTRS)
Heikkila, W. W.
1979-01-01
A 256 word by 8-bit random access memory chip was developed utilizing p channel, metal gate metal-nitride-oxide-silicon (MNOS) technology; with operational characteristics of a 2.5 microsecond read cycle, a 6.0 microsecond write cycle, 800 milliwatts of power dissipation; and retention characteristics of 10 to the 8th power read cycles before data refresh and 5000 hours of no power retention. Design changes were implemented to reduce switching currents that caused parasitic bipolar transistors inherent in the MNOS structure to turn on. Final wafer runs exhibited acceptable yields for a die 250 mils on a side. Evaluation testing was performed on the device in order to determine the maturity of the device. A fixed gate breakdown mechanism was found when operated continuously at high temperature.
Hanh, Nguyen Hong; Jang, Kyungsoo; Yi, Junsin
2016-05-01
We directly deposited amorphous InGaZnO (a-IGZO) nonvolatile memory (NVM) devices with oxynitride-oxide-dioxide (OOO) stack structures on plastic substrate by a DC pulsed magnetron sputtering and inductively coupled plasma chemical vapor deposition (ICPCVD) system, using a low-temperature of 150 degrees C. The fabricated bottom gate a-IGZO NVM devices have a wide memory window with a low operating voltage during programming and erasing, due to an effective control of the gate dielectrics. In addition, after ten years, the memory device retains a memory window of over 73%, with a programming duration of only 1 ms. Moreover, the a-IGZO films show high optical transmittance of over 85%, and good uniformity with a root mean square (RMS) roughness of 0.26 nm. This film is a promising candidate to achieve flexible displays and transparency on plastic substrates because of the possibility of low-temperature deposition, and the high transparent properties of a-IGZO films. These results demonstrate that the a-IGZO NVM devices obtained at low-temperature have a suitable programming and erasing efficiency for data storage under low-voltage conditions, in combination with excellent charge retention characteristics, and thus show great potential application in flexible memory displays.
Data storage technology comparisons
NASA Technical Reports Server (NTRS)
Katti, Romney R.
1990-01-01
The role of data storage and data storage technology is an integral, though conceptually often underestimated, portion of data processing technology. Data storage is important in the mass storage mode in which generated data is buffered for later use. But data storage technology is also important in the data flow mode when data are manipulated and hence required to flow between databases, datasets and processors. This latter mode is commonly associated with memory hierarchies which support computation. VLSI devices can reasonably be defined as electronic circuit devices such as channel and control electronics as well as highly integrated, solid-state devices that are fabricated using thin film deposition technology. VLSI devices in both capacities play an important role in data storage technology. In addition to random access memories (RAM), read-only memories (ROM), and other silicon-based variations such as PROM's, EPROM's, and EEPROM's, integrated devices find their way into a variety of memory technologies which offer significant performance advantages. These memory technologies include magnetic tape, magnetic disk, magneto-optic disk, and vertical Bloch line memory. In this paper, some comparison between selected technologies will be made to demonstrate why more than one memory technology exists today, based for example on access time and storage density at the active bit and system levels.
NASA Astrophysics Data System (ADS)
Zhao, Fei; Cheng, Huhu; Hu, Yue; Song, Long; Zhang, Zhipan; Jiang, Lan; Qu, Liangti
2014-07-01
Graphitic carbon nitride nanosheet (g-C3N4-NS) has layered structure similar with graphene nanosheet and presents unusual physicochemical properties due to the s-triazine fragments. But their electronic and electrochemical applications are limited by the relatively poor conductivity. The current work provides the first example that atomically thick g-C3N4-NSs are the ideal candidate as the active insulator layer with tunable conductivity for achieving the high performance memory devices with electrical bistability. Unlike in conventional memory diodes, the g-C3N4-NSs based devices combined with graphene layer electrodes are flexible, metal-free and low cost. The functionalized g-C3N4-NSs exhibit desirable dispersibility and dielectricity which support the all-solution fabrication and high performance of the memory diodes. Moreover, the flexible memory diodes are conveniently fabricated through the fast laser writing process on graphene oxide/g-C3N4-NSs/graphene oxide thin film. The obtained devices not only have the nonvolatile electrical bistability with great retention and endurance, but also show the rewritable memory effect with a reliable ON/OFF ratio of up to 105, which is the highest among all the metal-free flexible memory diodes reported so far, and even higher than those of metal-containing devices.
NASA Technical Reports Server (NTRS)
Katti, Romney R.
1995-01-01
Random-access memory (RAM) devices of proposed type exploit magneto-optical properties of magnetic garnets exhibiting perpendicular anisotropy. Magnetic writing and optical readout used. Provides nonvolatile storage and resists damage by ionizing radiation. Because of basic architecture and pinout requirements, most likely useful as small-capacity memory devices.
Development of Curie point switching for thin film, random access, memory device
NASA Technical Reports Server (NTRS)
Lewicki, G. W.; Tchernev, D. I.
1967-01-01
Managanese bismuthide films are used in the development of a random access memory device of high packing density and nondestructive readout capability. Memory entry is by Curie point switching using a laser beam. Readout is accomplished by microoptical or micromagnetic scanning.
Li, Yang; Li, Hua; He, Jinghui; Xu, Qingfeng; Li, Najun; Chen, Dongyun; Lu, Jianmei
2016-03-18
The practical application of organic memory devices requires low power consumption and reliable device quality. Herein, we report that inserting thienyl units into D-π-A molecules can improve these parameters by tuning the texture of the film. Theoretical calculations revealed that introducing thienyl π bridges increased the planarity of the molecular backbone and extended the D-A conjugation. Thus, molecules with more thienyl spacers showed improved stacking and orientation in the film state relative to the substrates. The corresponding sandwiched memory devices showed enhanced ternary memory behavior, with lower threshold voltages and better repeatability. The conductive switching and variation in the performance of the memory devices were interpreted by using an extended-charge-trapping mechanism. Our study suggests that judicious molecular engineering can facilitate control of the orientation of the crystallite in the solid state to achieve superior multilevel memory performance. © 2016 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.
NASA Astrophysics Data System (ADS)
Lee, Taek Joon; Chang, Cha-Wen; Hahm, Suk Gyu; Kim, Kyungtae; Park, Samdae; Kim, Dong Min; Kim, Jinchul; Kwon, Won-Sang; Liou, Guey-Sheng; Ree, Moonhor
2009-04-01
We have fabricated electrically programmable memory devices with thermally and dimensionally stable poly(N-(N',N'-diphenyl-N'-1,4-phenyl)-N,N-4,4'-diphenylene hexafluoroisopropylidene-diphthalimide) (6F-2TPA PI) films and investigated their switching characteristics and reliability. 6F-2TPA PI films were found to reveal a conductivity of 1.0 × 10-13-1.0 × 10-14 S cm-1. The 6F-2TPA PI films exhibit versatile memory characteristics that depend on the film thickness. All the PI films are initially present in the OFF state. The PI films with a thickness of >15 to <100 nm exhibit excellent write-once-read-many-times (WORM) (i.e. fuse-type) memory characteristics with and without polarity depending on the thickness. The WORM memory devices are electrically stable, even in air ambient, for a very long time. The devices' ON/OFF current ratio is high, up to 1010. Therefore, these WORM memory devices can provide an efficient, low-cost means of permanent data storage. On the other hand, the 100 nm thick PI films exhibit excellent dynamic random access memory (DRAM) characteristics with polarity. The ON/OFF current ratio of the DRAM devices is as high as 1011. The observed electrical switching behaviors were found to be governed by trap-limited space-charge-limited conduction and local filament formation and further dependent on the differences between the highest occupied molecular orbital and the lowest unoccupied molecular orbital energy levels of the PI film and the work functions of the top and bottom electrodes as well as the PI film thickness. In summary, the excellent memory properties of 6F-2TPA PI make it a promising candidate material for the low-cost mass production of high density and very stable digital nonvolatile WORM and volatile DRAM memory devices.
Lee, Taek Joon; Chang, Cha-Wen; Hahm, Suk Gyu; Kim, Kyungtae; Park, Samdae; Kim, Dong Min; Kim, Jinchul; Kwon, Won-Sang; Liou, Guey-Sheng; Ree, Moonhor
2009-04-01
We have fabricated electrically programmable memory devices with thermally and dimensionally stable poly(N-(N',N'-diphenyl-N'-1,4-phenyl)-N,N-4,4'-diphenylene hexafluoroisopropylidene-diphthalimide) (6F-2TPA PI) films and investigated their switching characteristics and reliability. 6F-2TPA PI films were found to reveal a conductivity of 1.0 x 10(-13)-1.0 x 10(-14) S cm(-1). The 6F-2TPA PI films exhibit versatile memory characteristics that depend on the film thickness. All the PI films are initially present in the OFF state. The PI films with a thickness of >15 to <100 nm exhibit excellent write-once-read-many-times (WORM) (i.e. fuse-type) memory characteristics with and without polarity depending on the thickness. The WORM memory devices are electrically stable, even in air ambient, for a very long time. The devices' ON/OFF current ratio is high, up to 10(10). Therefore, these WORM memory devices can provide an efficient, low-cost means of permanent data storage. On the other hand, the 100 nm thick PI films exhibit excellent dynamic random access memory (DRAM) characteristics with polarity. The ON/OFF current ratio of the DRAM devices is as high as 10(11). The observed electrical switching behaviors were found to be governed by trap-limited space-charge-limited conduction and local filament formation and further dependent on the differences between the highest occupied molecular orbital and the lowest unoccupied molecular orbital energy levels of the PI film and the work functions of the top and bottom electrodes as well as the PI film thickness. In summary, the excellent memory properties of 6F-2TPA PI make it a promising candidate material for the low-cost mass production of high density and very stable digital nonvolatile WORM and volatile DRAM memory devices.
Design and fabrication of memory devices based on nanoscale polyoxometalate clusters
NASA Astrophysics Data System (ADS)
Busche, Christoph; Vilà-Nadal, Laia; Yan, Jun; Miras, Haralampos N.; Long, De-Liang; Georgiev, Vihar P.; Asenov, Asen; Pedersen, Rasmus H.; Gadegaard, Nikolaj; Mirza, Muhammad M.; Paul, Douglas J.; Poblet, Josep M.; Cronin, Leroy
2014-11-01
Flash memory devices--that is, non-volatile computer storage media that can be electrically erased and reprogrammed--are vital for portable electronics, but the scaling down of metal-oxide-semiconductor (MOS) flash memory to sizes of below ten nanometres per data cell presents challenges. Molecules have been proposed to replace MOS flash memory, but they suffer from low electrical conductivity, high resistance, low device yield, and finite thermal stability, limiting their integration into current MOS technologies. Although great advances have been made in the pursuit of molecule-based flash memory, there are a number of significant barriers to the realization of devices using conventional MOS technologies. Here we show that core-shell polyoxometalate (POM) molecules can act as candidate storage nodes for MOS flash memory. Realistic, industry-standard device simulations validate our approach at the nanometre scale, where the device performance is determined mainly by the number of molecules in the storage media and not by their position. To exploit the nature of the core-shell POM clusters, we show, at both the molecular and device level, that embedding [(Se(IV)O3)2]4- as an oxidizable dopant in the cluster core allows the oxidation of the molecule to a [Se(V)2O6]2- moiety containing a {Se(V)-Se(V)} bond (where curly brackets indicate a moiety, not a molecule) and reveals a new 5+ oxidation state for selenium. This new oxidation state can be observed at the device level, resulting in a new type of memory, which we call `write-once-erase'. Taken together, these results show that POMs have the potential to be used as a realistic nanoscale flash memory. Also, the configuration of the doped POM core may lead to new types of electrical behaviour. This work suggests a route to the practical integration of configurable molecules in MOS technologies as the lithographic scales approach the molecular limit.
Kundu, Souvik; Maurya, Deepam; Clavel, Michael; Zhou, Yuan; Halder, Nripendra N.; Hudait, Mantu K.; Banerji, Pallab; Priya, Shashank
2015-01-01
We introduce a novel lead-free ferroelectric thin film (1-x)BaTiO3-xBa(Cu1/3Nb2/3)O3 (x = 0.025) (BT-BCN) integrated on to HfO2 buffered Si for non-volatile memory (NVM) applications. Piezoelectric force microscopy (PFM), x-ray diffraction, and high resolution transmission electron microscopy were employed to establish the ferroelectricity in BT-BCN thin films. PFM study reveals that the domains reversal occurs with 180° phase change by applying external voltage, demonstrating its effectiveness for NVM device applications. X-ray photoelectron microscopy was used to investigate the band alignments between atomic layer deposited HfO2 and pulsed laser deposited BT-BCN films. Programming and erasing operations were explained on the basis of band-alignments. The structure offers large memory window, low leakage current, and high and low capacitance values that were easily distinguishable even after ~106 s, indicating strong charge storage potential. This study explains a new approach towards the realization of ferroelectric based memory devices integrated on Si platform and also opens up a new possibility to embed the system within current complementary metal-oxide-semiconductor processing technology. PMID:25683062
Low latency counter event indication
Gara, Alan G [Mount Kisco, NY; Salapura, Valentina [Chappaqua, NY
2008-09-16
A hybrid counter array device for counting events with interrupt indication includes a first counter portion comprising N counter devices, each for counting signals representing event occurrences and providing a first count value representing lower order bits. An overflow bit device associated with each respective counter device is additionally set in response to an overflow condition. The hybrid counter array includes a second counter portion comprising a memory array device having N addressable memory locations in correspondence with the N counter devices, each addressable memory location for storing a second count value representing higher order bits. An operatively coupled control device monitors each associated overflow bit device and initiates incrementing a second count value stored at a corresponding memory location in response to a respective overflow bit being set. The incremented second count value is compared to an interrupt threshold value stored in a threshold register, and, when the second counter value is equal to the interrupt threshold value, a corresponding "interrupt arm" bit is set to enable a fast interrupt indication. On a subsequent roll-over of the lower bits of that counter, the interrupt will be fired.
Low latency counter event indication
Gara, Alan G.; Salapura, Valentina
2010-08-24
A hybrid counter array device for counting events with interrupt indication includes a first counter portion comprising N counter devices, each for counting signals representing event occurrences and providing a first count value representing lower order bits. An overflow bit device associated with each respective counter device is additionally set in response to an overflow condition. The hybrid counter array includes a second counter portion comprising a memory array device having N addressable memory locations in correspondence with the N counter devices, each addressable memory location for storing a second count value representing higher order bits. An operatively coupled control device monitors each associated overflow bit device and initiates incrementing a second count value stored at a corresponding memory location in response to a respective overflow bit being set. The incremented second count value is compared to an interrupt threshold value stored in a threshold register, and, when the second counter value is equal to the interrupt threshold value, a corresponding "interrupt arm" bit is set to enable a fast interrupt indication. On a subsequent roll-over of the lower bits of that counter, the interrupt will be fired.
A new approach for two-terminal electronic memory devices - Storing information on silicon nanowires
NASA Astrophysics Data System (ADS)
Saranti, Konstantina; Alotaibi, Sultan; Paul, Shashi
2016-06-01
The work described in this paper focuses on the utilisation of silicon nanowires as the information storage element in flash-type memory devices. Silicon nanostructures have attracted attention due to interesting electrical and optical properties, and their potential integration into electronic devices. A detailed investigation of the suitability of silicon nanowires as the charge storage medium in two-terminal non-volatile memory devices are presented in this report. The deposition of the silicon nanostructures was carried out at low temperatures (less than 400 °C) using a previously developed a novel method within our research group. Two-terminal non-volatile (2TNV) memory devices and metal-insulator-semiconductor (MIS) structures containing the silicon nanowires were fabricated and an in-depth study of their characteristics was carried out using current-voltage and capacitance techniques.
NASA Astrophysics Data System (ADS)
Tsao, Hou-Yen; Lin, Yow-Jon
2014-02-01
The fabrication of memory devices based on the Au/pentacene/heavily doped n-type Si (n+-Si), Au/pentacene/Si nanowires (SiNWs)/n+-Si, and Au/pentacene/H2O2-treated SiNWs/n+-Si structures and their resistive switching characteristics were reported. A pentacene memory structure using SiNW arrays as charge storage nodes was demonstrated. The Au/pentacene/SiNWs/n+-Si devices show hysteresis behavior. H2O2 treatment may lead to the hysteresis degradation. However, no hysteresis-type current-voltage characteristics were observed for Au/pentacene/n+-Si devices, indicating that the resistive switching characteristic is sensitive to SiNWs and the charge trapping effect originates from SiNWs. The concept of nanowires within the organic layer opens a promising direction for organic memory devices.
FPGA-based prototype storage system with phase change memory
NASA Astrophysics Data System (ADS)
Li, Gezi; Chen, Xiaogang; Chen, Bomy; Li, Shunfen; Zhou, Mi; Han, Wenbing; Song, Zhitang
2016-10-01
With the ever-increasing amount of data being stored via social media, mobile telephony base stations, and network devices etc. the database systems face severe bandwidth bottlenecks when moving vast amounts of data from storage to the processing nodes. At the same time, Storage Class Memory (SCM) technologies such as Phase Change Memory (PCM) with unique features like fast read access, high density, non-volatility, byte-addressability, positive response to increasing temperature, superior scalability, and zero standby leakage have changed the landscape of modern computing and storage systems. In such a scenario, we present a storage system called FLEET which can off-load partial or whole SQL queries to the storage engine from CPU. FLEET uses an FPGA rather than conventional CPUs to implement the off-load engine due to its highly parallel nature. We have implemented an initial prototype of FLEET with PCM-based storage. The results demonstrate that significant performance and CPU utilization gains can be achieved by pushing selected query processing components inside in PCM-based storage.
Resistive and Capacitive Memory Effects in Oxide Insulator/ Oxide Conductor Hetero-Structures
NASA Astrophysics Data System (ADS)
Meyer, Rene; Miao, Maosheng; Wu, Jian; Chevallier, Christophe
2013-03-01
We report resistive and capacitive memory effects observed in oxide insulator/ oxide conductor hetero-structures. Electronic transport properties of Pt/ZrO2/PCMO/Pt structures with ZrO2 thicknesses ranging from 20A to 40A are studied before and after applying short voltage pulses of positive and negative polarity for set and reset operation. As processed devices display a non-linear IV characteristic which we attribute to trap assisted tunneling through the ZrO2 tunnel oxide. Current scaling with electrode area and tunnel oxide thickness confirms uniform conduction. The set/reset operation cause an up/down shift of the IV characteristic indicating that the conduction mechanism of both states is still dominated by tunneling. A change in the resistance is associated with a capacitance change of the device. An exponential relation between program voltages and set times is found. A model based on electric field mediated non-linear transport of oxygen ions across the ZrO2/PCMO interface is proposed. The change in the tunnel current is explained by ionic charge transfer between tunnel oxide and conductive metal oxide changing both tunnel barrier height and PCMO conductivity. DFT techniques are employed to explain the conductivity change in the PCMO interfacial layer observed through capacitance measurements.
pH Memory Effects of Tunable Block Copolymer Photonic Gels and Their Applications
NASA Astrophysics Data System (ADS)
Kang, Youngjong; Thomas, Edwin L.
2007-03-01
Materials with hysteresis, showing a bistable state to the external stimuli, have been widely investigated due to their potential applications. For example, they could be used as memory devices or optical switches when they have magnetic or optical hysteresis response to the external stimuli. Here we report pH tunable photonic gels which are spontaneously assembled from block copolymers. The general idea of this research is based on the selective swelling of block copolymer lamellar mesogels, where the solubility of one block is responsive to the change of pH. In this system, the domain spacing of the lamellar is varied with the extent of swelling. As a model system, we used protonated polystyrene-b-poly(2-vinly pyridine) (PS-b-P2VP) block copolymers forming lamellar structures. The photonic gel films prepared from protonated PS-b-P2VP show a strong reflectance in aqueous solution and the band position was varied with pH. Interestingly, a very strong optical hysteresis was observed while the reflection band of photonic gels was tuned by changing pH. We anticipate that pH tunable photonic gels with hysteresis can be applicable to novel applications such as a component of memory devices, photonic switches or drug delivery vehicles.
NASA Astrophysics Data System (ADS)
Wang, Xiao Lin; Liu, Zhen; Wen, Chao; Liu, Yang; Wang, Hong Zhe; Chen, T. P.; Zhang, Hai Yan
2018-06-01
With self-prepared nickel acetate based solution, NiO thin films with different thicknesses have been fabricated by spin coating followed by thermal annealing. By forming a two-terminal Ag/NiO/ITO structure on glass, write-once-read-many-times (WORM) memory devices are realized. The WORM memory behavior is based on a permanent switching from an initial high-resistance state (HRS) to an irreversible low-resistance state (LRS) under the application of a writing voltage, due to the formation of a solid bridge across Ag and ITO electrodes by conductive filaments (CFs). The memory performance is investigated as a function of the NiO film thickness, which is determined by the number of spin-coated NiO layers. For devices with 4 and 6 NiO layers, data retention up to 104 s and endurance of 103 reading operations in the measurement range have been obtained with memory window maintained above four orders for both HRS and LRS. Before and after writing, the devices show the hopping and ohmic conduction behaviors, respectively, confirming that the CF formation could be the mechanism responsible for writing in the WORM memory devices.
A wearable multiplexed silicon nonvolatile memory array using nanocrystal charge confinement
Kim, Jaemin; Son, Donghee; Lee, Mincheol; Song, Changyeong; Song, Jun-Kyul; Koo, Ja Hoon; Lee, Dong Jun; Shim, Hyung Joon; Kim, Ji Hoon; Lee, Minbaek; Hyeon, Taeghwan; Kim, Dae-Hyeong
2016-01-01
Strategies for efficient charge confinement in nanocrystal floating gates to realize high-performance memory devices have been investigated intensively. However, few studies have reported nanoscale experimental validations of charge confinement in closely packed uniform nanocrystals and related device performance characterization. Furthermore, the system-level integration of the resulting devices with wearable silicon electronics has not yet been realized. We introduce a wearable, fully multiplexed silicon nonvolatile memory array with nanocrystal floating gates. The nanocrystal monolayer is assembled over a large area using the Langmuir-Blodgett method. Efficient particle-level charge confinement is verified with the modified atomic force microscopy technique. Uniform nanocrystal charge traps evidently improve the memory window margin and retention performance. Furthermore, the multiplexing of memory devices in conjunction with the amplification of sensor signals based on ultrathin silicon nanomembrane circuits in stretchable layouts enables wearable healthcare applications such as long-term data storage of monitored heart rates. PMID:26763827
Nonvolatile memory behavior of nanocrystalline cellulose/graphene oxide composite films
DOE Office of Scientific and Technical Information (OSTI.GOV)
Valentini, L., E-mail: luca.valentini@unipg.it; Cardinali, M.; Fortunati, E.
2014-10-13
With the continuous advance of modern electronics, the demand for nonvolatile memory cells rapidly grows. In order to develop post-silicon electronic devices, it is necessary to find innovative solutions to the eco-sustainability problem of materials for nonvolatile memory cells. In this work, we realized a resistive memory device based on graphene oxide (GO) and GO/cellulose nanocrystals (CNC) thin films. Aqueous solutions of GO and GO with CNC have been prepared and drop cast between two metal electrodes. Such thin-film based devices showed a transition between low and high conductivity states upon the forward and backward sweeping of an external electricmore » field. This reversible current density transition behavior demonstrates a typical memory characteristic. The obtained results open an easy route for electronic information storage based on the integration of nanocrystalline cellulose onto graphene based devices.« less
A wearable multiplexed silicon nonvolatile memory array using nanocrystal charge confinement.
Kim, Jaemin; Son, Donghee; Lee, Mincheol; Song, Changyeong; Song, Jun-Kyul; Koo, Ja Hoon; Lee, Dong Jun; Shim, Hyung Joon; Kim, Ji Hoon; Lee, Minbaek; Hyeon, Taeghwan; Kim, Dae-Hyeong
2016-01-01
Strategies for efficient charge confinement in nanocrystal floating gates to realize high-performance memory devices have been investigated intensively. However, few studies have reported nanoscale experimental validations of charge confinement in closely packed uniform nanocrystals and related device performance characterization. Furthermore, the system-level integration of the resulting devices with wearable silicon electronics has not yet been realized. We introduce a wearable, fully multiplexed silicon nonvolatile memory array with nanocrystal floating gates. The nanocrystal monolayer is assembled over a large area using the Langmuir-Blodgett method. Efficient particle-level charge confinement is verified with the modified atomic force microscopy technique. Uniform nanocrystal charge traps evidently improve the memory window margin and retention performance. Furthermore, the multiplexing of memory devices in conjunction with the amplification of sensor signals based on ultrathin silicon nanomembrane circuits in stretchable layouts enables wearable healthcare applications such as long-term data storage of monitored heart rates.
Investigation of fast initialization of spacecraft bubble memory systems
NASA Technical Reports Server (NTRS)
Looney, K. T.; Nichols, C. D.; Hayes, P. J.
1984-01-01
Bubble domain technology offers significant improvement in reliability and functionality for spacecraft onboard memory applications. In considering potential memory systems organizations, minimization of power in high capacity bubble memory systems necessitates the activation of only the desired portions of the memory. In power strobing arbitrary memory segments, a capability of fast turn on is required. Bubble device architectures, which provide redundant loop coding in the bubble devices, limit the initialization speed. Alternate initialization techniques are investigated to overcome this design limitation. An initialization technique using a small amount of external storage is demonstrated.
Radiation Test Challenges for Scaled Commerical Memories
NASA Technical Reports Server (NTRS)
LaBel, Kenneth A.; Ladbury, Ray L.; Cohn, Lewis M.; Oldham, Timothy
2007-01-01
As sub-100nm CMOS technologies gather interest, the radiation effects performance of these technologies provide a significant challenge. In this talk, we shall discuss the radiation testing challenges as related to commercial memory devices. The focus will be on complex test and failure modes emerging in state-of-the-art Flash non-volatile memories (NVMs) and synchronous dynamic random access memories (SDRAMs), which are volatile. Due to their very high bit density, these device types are highly desirable for use in the natural space environment. In this presentation, we shall discuss these devices with emphasis on considerations for test and qualification methods required.
Recent Advances of Flexible Data Storage Devices Based on Organic Nanoscaled Materials.
Zhou, Li; Mao, Jingyu; Ren, Yi; Han, Su-Ting; Roy, Vellaisamy A L; Zhou, Ye
2018-03-01
Following the trend of miniaturization as per Moore's law, and facing the strong demand of next-generation electronic devices that should be highly portable, wearable, transplantable, and lightweight, growing endeavors have been made to develop novel flexible data storage devices possessing nonvolatile ability, high-density storage, high-switching speed, and reliable endurance properties. Nonvolatile organic data storage devices including memory devices on the basis of floating-gate, charge-trapping, and ferroelectric architectures, as well as organic resistive memory are believed to be favorable candidates for future data storage applications. In this Review, typical information on device structure, memory characteristics, device operation mechanisms, mechanical properties, challenges, and recent progress of the above categories of flexible data storage devices based on organic nanoscaled materials is summarized. © 2018 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.
Role of mechanical stress in the resistance drift of Ge2Sb2Te5 films and phase change memories
NASA Astrophysics Data System (ADS)
Rizzi, M.; Spessot, A.; Fantini, P.; Ielmini, D.
2011-11-01
In a phase change memory (PCM), the device resistance increases slowly with time after the formation of the amorphous phase, thus affecting the stability of stored data. This work investigates the resistance drift in thin films of amorphous Ge2Sb2Te5 and in PCMs, demonstrating a common kinetic of drift in stressed/unstressed films and in the nanometer-size active volume of a PCM with different stress levels developed via stressor layers. It is concluded that stress is not the root cause of PCM drift, which is instead attributed to intrinsic structural relaxation due to the disordered, metastable nature of the amorphous chalcogenide phase.
Yan, Z. B.; Liu, J. -M.
2013-01-01
The Au/DyMnO3/Nb:SrTiO3/Au stack was demonstrated to be not only a high performance memristor but also a good memcapacitor. The switching time is below 10 ns, the retention is longer than 105 s, and the change ratio of resistance (or capacitance) is larger than 100 over the 108 switching cycles. Moreover, this stack has a broad range of intermediate states that are tunable by the operating voltages. It is indicated that the memory effects originate from the Nb:SrTiO3/Au junction where the barrier profile is electrically modulated. The serial connected Au/DyMnO3/Nb:SrTiO3 stack behaves as a high nonlinear resistor paralleling with a capacitor, which raises the capacitance change ratio and enhances the memory stability of the device. PMID:23963467
Zhang, Qiming; Xia, Zhilin; Cheng, Yi-Bing; Gu, Min
2018-03-22
Emerging as an inevitable outcome of the big data era, long data are the massive amount of data that captures changes in the real world over a long period of time. In this context, recording and reading the data of a few terabytes in a single storage device repeatedly with a century-long unchanged baseline is in high demand. Here, we demonstrate the concept of optical long data memory with nanoplasmonic hybrid glass composites. Through the sintering-free incorporation of nanorods into the earth abundant hybrid glass composite, Young's modulus is enhanced by one to two orders of magnitude. This discovery, enabling reshaping control of plasmonic nanoparticles of multiple-length allows for continuous multi-level recording and reading with a capacity over 10 terabytes with no appreciable change of the baseline over 600 years, which opens new opportunities for long data memory that affects the past and future.
Phase-Change Thermoplastic Elastomer Blends for Tunable Shape Memory by Physical Design
DOE Office of Scientific and Technical Information (OSTI.GOV)
Mineart, Kenneth P.; Tallury, Syamal S.; Li, Tao
Shape-memory polymers (SMPs) change shape upon exposure to an environmental stimulus.1-3 They are of considerable importance in the ongoing development of stimuli-responsive biomedical4,5 and deployable6 devices, and their function depends on the presence of two components.7 The first provides mechanical rigidity to ensure retention of one or more temporary strain states and also serves as a switch capable of releasing a temporary strain state. The second, a network-forming component, is required to restore the polymer to a prior strain state upon stimulation. In thermally-activated SMPs, the switching element typically relies on a melting or glass transition temperature,1-3,7 and broad ormore » multiple switches permit several temporary strain states.8-10 Chemical integration of network-forming and switching species endows SMPs with specific properties.8,10,11 Here, we demonstrate that phase-change materials incorporated into network-forming macromolecules yield shape-memory polymer blends (SMPBs) with physically tunable switching temperatures and recovery kinetics for use in multi-responsive laminates and shape-change electronics.« less
Characteristics of Reduced Graphene Oxide Quantum Dots for a Flexible Memory Thin Film Transistor.
Kim, Yo-Han; Lee, Eun Yeol; Lee, Hyun Ho; Seo, Tae Seok
2017-05-17
Reduced graphene oxide quantum dot (rGOQD) devices in formats of capacitor and thin film transistor (TFT) were demonstrated and examined as the first trial to achieve nonambipolar channel property. In addition, through a gold nanoparticle (Au NP) layer embedded between the rGOQD active channel and dielectric layer, memory capacitor and TFT performances were realized by capacitance-voltage (C-V) hysteresis and gate program, erase, and reprogram biases. First, capacitor structure of the rGOQD memory device was constructed to examine memory charging effect featured in hysteretic C-V behavior with a 30 nm dielectric layer of cross-linked poly(vinyl alcohol). For the intervening Au NP charging layer, self-assembled monolayer (SAM) formation of the Au NP was executed to utilize electrostatic interaction by a dip-coating process under ambient environments with a conformal fabrication uniformity. Second, the rGOQD memory TFT device was also constructed in the same format of the Au NPs SAMs on a flexible substrate. Characteristics of the rGOQD TFT output showed novel saturation curves unlike typical graphene-based TFTs. However, The rGOQD TFT device reveals relatively low on/off ratio of 10 1 and mobility of 5.005 cm 2 /V·s. For the memory capacitor, the flat-band voltage shift (ΔV FB ) was measured as 3.74 V for ±10 V sweep, and for the memory TFT, the threshold voltage shift (ΔV th ) by the Au NP charging was detected as 7.84 V. In summary, it was concluded that the rGOQD memory device could accomplish an ideal graphene-based memory performance, which could have provided a wide memory window and saturated output characteristics.
Low-power resistive random access memory by confining the formation of conducting filaments
DOE Office of Scientific and Technical Information (OSTI.GOV)
Huang, Yi-Jen; Lee, Si-Chen, E-mail: sclee@ntu.edu.tw; Shen, Tzu-Hsien
2016-06-15
Owing to their small physical size and low power consumption, resistive random access memory (RRAM) devices are potential for future memory and logic applications in microelectronics. In this study, a new resistive switching material structure, TiO{sub x}/silver nanoparticles/TiO{sub x}/AlTiO{sub x}, fabricated between the fluorine-doped tin oxide bottom electrode and the indium tin oxide top electrode is demonstrated. The device exhibits excellent memory performances, such as low operation voltage (<±1 V), low operation power, small variation in resistance, reliable data retention, and a large memory window. The current-voltage measurement shows that the conducting mechanism in the device at the high resistancemore » state is via electron hopping between oxygen vacancies in the resistive switching material. When the device is switched to the low resistance state, conducting filaments are formed in the resistive switching material as a result of accumulation of oxygen vacancies. The bottom AlTiO{sub x} layer in the device structure limits the formation of conducting filaments; therefore, the current and power consumption of device operation are significantly reduced.« less
DOE Office of Scientific and Technical Information (OSTI.GOV)
Shinde, Sachin M.; Tanemura, Masaki; Kalita, Golap, E-mail: kalita.golap@nitech.ac.jp
2014-12-07
Combination of two dimensional graphene and semi-conducting molybdenum disulfide (MoS{sub 2}) is of great interest for various electronic device applications. Here, we demonstrate fabrication of a hybridized structure with the chemical vapor deposited graphene and MoS{sub 2} crystals to configure a memory device. Elongated hexagonal and rhombus shaped MoS{sub 2} crystals are synthesized by sulfurization of thermally evaporated molybdenum oxide (MoO{sub 3}) thin film. Scanning transmission electron microscope studies reveal atomic level structure of the synthesized high quality MoS{sub 2} crystals. In the prospect of a memory device fabrication, poly(methyl methacrylate) (PMMA) is used as an insulating dielectric material asmore » well as a supporting layer to transfer the MoS{sub 2} crystals. In the fabricated device, PMMA-MoS{sub 2} and graphene layers act as the functional and electrode materials, respectively. Distinctive bistable electrical switching and nonvolatile rewritable memory effect is observed in the fabricated PMMA-MoS{sub 2}/graphene heterostructure. The developed material system and demonstrated memory device fabrication can be significant for next generation data storage applications.« less
NASA Technical Reports Server (NTRS)
Besser, P. J.
1976-01-01
Bubble domain materials and devices are discussed. One of the materials development goals was a materials system suitable for operation of 16 micrometer period bubble domain devices at 150 kHz over the temperature range -10 C to +60 C. Several material compositions and hard bubble suppression techniques were characterized and the most promising candidates were evaluated in device structures. The technique of pulsed laser stroboscopic microscopy was used to characterize bubble dynamic properties and device performance at 150 kHz. Techniques for large area LPE film growth were developed as a separate task. Device studies included detector optimization, passive replicator design and test and on-chip bridge evaluation. As a technology demonstration an 8 chip memory cell was designed, tested and delivered. The memory elements used in the cell were 10 kilobit serial registers.
El Gabaly Marquez, Farid; Talin, Albert Alec
2018-04-17
Devices and methods for non-volatile analog data storage are described herein. In an exemplary embodiment, an analog memory device comprises a potential-carrier source layer, a barrier layer deposited on the source layer, and at least two storage layers deposited on the barrier layer. The memory device can be prepared to write and read data via application of a biasing voltage between the source layer and the storage layers, wherein the biasing voltage causes potential-carriers to migrate into the storage layers. After initialization, data can be written to the memory device by application of a voltage pulse between two storage layers that causes potential-carriers to migrate from one storage layer to another. A difference in concentration of potential carriers caused by migration of potential-carriers between the storage layers results in a voltage that can be measured in order to read the written data.
Yang, Fangxu; Zhao, Qiang; Xu, Chunhui; Zou, Ye; Dong, Huanli; Zheng, Yonggang; Hu, Wenping
2016-09-01
The switching riddle of AgTCNQ is shown to be caused by the solid electrolyte mechanism. Both factors of bulk phase change and contact issue play key roles in the efficient work of the devices. An effective strategy is developed to locate the formation/disruption of Ag conductive filaments using the planar asymmetric configuration of Au/AgTCNQ/AlOx /Al. These novel electrochemical metallization memories demonstrate many promising properties. © 2016 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.
NASA Technical Reports Server (NTRS)
LaBel, Kenneth A.; Cohn, Lewis M.
2008-01-01
At GOMAC 2007, we discussed a selection of the challenges for radiation testing of modern semiconductor devices focusing on state-of-the-art memory technologies. This included FLASH non-volatile memories (NVMs) and synchronous dynamic random access memories (SDRAMs). In this presentation, we extend this discussion in device packaging and complexity as well as single event upset (SEU) mechanisms using several technology areas as examples including: system-on-a-chip (SOC) devices and photonic or fiber optic systems. The underlying goal is intended to provoke thought for understanding the limitations and interpretation of radiation testing results.
From dead leaves to sustainable organic resistive switching memory.
Sun, Bai; Zhu, Shouhui; Mao, Shuangsuo; Zheng, Pingping; Xia, Yudong; Yang, Feng; Lei, Ming; Zhao, Yong
2018-03-01
An environmental-friendly, sustainable, pollution-free, biodegradable, flexible and wearable electronic device hold advanced potential applications. Here, an organic resistive switching memory device with Ag/Leaves/Ti/PET structure on a flexible polyethylene terephthalate (PET) substrate was fabricated for the first time. We observed an obvious resistive switching memory characteristic with large switching resistance ratio and stable cycle performance at room temperature. This work demonstrates that leaves, a useless waste, can be properly treated to make useful devices. Furthermore, the as-fabricated devices can be degraded naturally without damage to the environment. Copyright © 2017 Elsevier Inc. All rights reserved.
NASA Astrophysics Data System (ADS)
Song, Zhiwei; Li, Gang; Xiong, Ying; Cheng, Chuanpin; Zhang, Wanli; Tang, Minghua; Li, Zheng; He, Jiangheng
2018-05-01
A memory device with a Pt/SrBi2Ta2O9(SBT)/Pt(111) structure was shown to have excellent combined ferroelectricity and resistive switching properties, leading to higher multistate storage memory capacity in contrast to ferroelectric memory devices. In this device, SBT polycrystalline thin films with significant (115) orientation were fabricated on Pt(111)/Ti/SiO2/Si(100) substrates using CVD (chemical vapor deposition) method. Measurement results of the electric properties exhibit reproducible and reliable ferroelectricity switching behavior and bipolar resistive switching effects (BRS) without an electroforming process. The ON/OFF ratio of the resistive switching was found to be about 103. Switching mechanisms for the low resistance state (LRS) and high resistance state (HRS) currents are likely attributed to the Ohmic and space charge-limited current (SCLC) behavior, respectively. Moreover, the ferroelectricity and resistive switching effects were found to be mutually independent, and the four logic states were obtained by controlling the periodic sweeping voltage. This work holds great promise for nonvolatile multistate memory devices with high capacity and low cost.
Maiti, Dilip K; Debnath, Sudipto; Nawaz, Sk Masum; Dey, Bapi; Dinda, Enakhi; Roy, Dipanwita; Ray, Sudipta; Mallik, Abhijit; Hussain, Syed A
2017-10-17
A metal-free three component cyclization reaction with amidation is devised for direct synthesis of DFT-designed amido-phenazine derivative bearing noncovalent gluing interactions to fabricate organic nanomaterials. Composition-dependent organic nanoelectronics for nonvolatile memory devices are discovered using mixed phenazine-stearic acid (SA) nanomaterials. We discovered simultaneous two different types of nonmagnetic and non-moisture sensitive switching resistance properties of fabricated devices utilizing mixed organic nanomaterials: (a) sample-1(8:SA = 1:3) is initially off, turning on at a threshold, but it does not turn off again with the application of any voltage, and (b) sample-2 (8:SA = 3:1) is initially off, turning on at a sharp threshold and off again by reversing the polarity. No negative differential resistance is observed in either type. These samples have different device implementations: sample-1 is attractive for write-once-read-many-times memory devices, such as novel non-editable database, archival memory, electronic voting, radio frequency identification, sample-2 is useful for resistive-switching random access memory application.
Zhao, Fei; Cheng, Huhu; Hu, Yue; Song, Long; Zhang, Zhipan; Jiang, Lan; Qu, Liangti
2014-01-01
Graphitic carbon nitride nanosheet (g-C3N4-NS) has layered structure similar with graphene nanosheet and presents unusual physicochemical properties due to the s-triazine fragments. But their electronic and electrochemical applications are limited by the relatively poor conductivity. The current work provides the first example that atomically thick g-C3N4-NSs are the ideal candidate as the active insulator layer with tunable conductivity for achieving the high performance memory devices with electrical bistability. Unlike in conventional memory diodes, the g-C3N4-NSs based devices combined with graphene layer electrodes are flexible, metal-free and low cost. The functionalized g-C3N4-NSs exhibit desirable dispersibility and dielectricity which support the all-solution fabrication and high performance of the memory diodes. Moreover, the flexible memory diodes are conveniently fabricated through the fast laser writing process on graphene oxide/g-C3N4-NSs/graphene oxide thin film. The obtained devices not only have the nonvolatile electrical bistability with great retention and endurance, but also show the rewritable memory effect with a reliable ON/OFF ratio of up to 105, which is the highest among all the metal-free flexible memory diodes reported so far, and even higher than those of metal-containing devices. PMID:25073687
Strategic design and fabrication of acrylic shape memory polymers
NASA Astrophysics Data System (ADS)
Park, Ju Hyuk; Kim, Hansu; Ryoun Youn, Jae; Song, Young Seok
2017-08-01
Modulation of thermomechanics nature is a critical issue for an optimized use of shape memory polymers (SMPs). In this study, a strategic approach was proposed to control the transition temperature of SMPs. Free radical vinyl polymerization was employed for tailoring and preparing acrylic SMPs. Transition temperatures of the shape memory tri-copolymers were tuned by changing the composition of monomers. X-ray photoelectron spectroscopy and Fourier transform infrared spectroscopy analyses were carried out to evaluate the chemical structures and compositions of the synthesized SMPs. The thermomechanical properties and shape memory performance of the SMPs were also examined by performing dynamic mechanical thermal analysis. Numerical simulation based on a finite element method provided consistent results with experimental cyclic shape memory tests of the specimens. Transient shape recovery tests were conducted and optical transparence of the samples was identified. We envision that the materials proposed in this study can help develop a new type of shape-memory devices in biomedical and aerospace engineering applications.
Dynamically Reconfigurable Metadevice Employing Nanostructured Phase-Change Materials
Zhu, Zhihua; Evans, Philip G.; Haglund, Richard F.; ...
2017-07-21
Mastering dynamic free-space spectral control and modulation in the near-infrared (NIR) and optical regimes remains a challenging task that is hindered by the available functional materials at high frequencies. In this work, we have realized an efficient metadevice capable of spectral control by minimizing the thermal mass of a vanadium dioxide phase-change material (PCM) and placing the PCM at the feed gap of a bow-tie field antenna. The device has an experimentally measured tuning range of up to 360 nm in the NIR and a modulation depth of 33% at the resonant wavelength. The metadevice is configured for integrated andmore » local heating, leading to faster switching and more precise spatial control compared with devices based on phase-change thin films. We envisage that the combined advantages of this device will open new opportunities for signal processing, memory, security, and holography at optical frequencies.« less
Dynamically Reconfigurable Metadevice Employing Nanostructured Phase-Change Materials.
Zhu, Zhihua; Evans, Philip G; Haglund, Richard F; Valentine, Jason G
2017-08-09
Mastering dynamic free-space spectral control and modulation in the near-infrared (NIR) and optical regimes remains a challenging task that is hindered by the available functional materials at high frequencies. In this work, we have realized an efficient metadevice capable of spectral control by minimizing the thermal mass of a vanadium dioxide phase-change material (PCM) and placing the PCM at the feed gap of a bow-tie field antenna. The device has an experimentally measured tuning range of up to 360 nm in the NIR and a modulation depth of 33% at the resonant wavelength. The metadevice is configured for integrated and local heating, leading to faster switching and more precise spatial control compared with devices based on phase-change thin films. We envisage that the combined advantages of this device will open new opportunities for signal processing, memory, security, and holography at optical frequencies.
Prakash, Amit; Maikap, Siddheswar; Banerjee, Writam; Jana, Debanjan; Lai, Chao-Sung
2013-09-06
Improved switching characteristics were obtained from high-κ oxides AlOx, GdOx, HfOx, and TaOx in IrOx/high-κx/W structures because of a layer that formed at the IrOx/high-κx interface under external positive bias. The surface roughness and morphology of the bottom electrode in these devices were observed by atomic force microscopy. Device size was investigated using high-resolution transmission electron microscopy. More than 100 repeatable consecutive switching cycles were observed for positive-formatted memory devices compared with that of the negative-formatted devices (only five unstable cycles) because it contained an electrically formed interfacial layer that controlled 'SET/RESET' current overshoot. This phenomenon was independent of the switching material in the device. The electrically formed oxygen-rich interfacial layer at the IrOx/high-κx interface improved switching in both via-hole and cross-point structures. The switching mechanism was attributed to filamentary conduction and oxygen ion migration. Using the positive-formatted design approach, cross-point memory in an IrOx/AlOx/W structure was fabricated. This cross-point memory exhibited forming-free, uniform switching for >1,000 consecutive dc cycles with a small voltage/current operation of ±2 V/200 μA and high yield of >95% switchable with a large resistance ratio of >100. These properties make this cross-point memory particularly promising for high-density applications. Furthermore, this memory device also showed multilevel capability with a switching current as low as 10 μA and a RESET current of 137 μA, good pulse read endurance of each level (>105 cycles), and data retention of >104 s at a low current compliance of 50 μA at 85°C. Our improvement of the switching characteristics of this resistive memory device will aid in the design of memory stacks for practical applications.
NASA Astrophysics Data System (ADS)
Kobayashi, Keisuke; Skelton, Jonathan M.; Saito, Yuta; Shindo, Satoshi; Kobata, Masaaki; Fons, Paul; Kolobov, Alexander V.; Elliott, Stephen; Ando, Daisuke; Sutou, Yuji
2018-05-01
Cu2GeTe3 (CGT) phase-change material, a promising candidate for advanced fast nonvolatile random-access-memory devices, has a chalcopyritelike structure with s p3 bonding in the crystalline phase; thus, the phase-change (PC) mechanism is considered to be essentially different from that of the standard PC materials (e.g., Ge-Sb-Te) with threefold to sixfold p -like bonding. In order to reveal the PC mechanism of CGT, the electronic structure change due to PC has been investigated by laboratory hard x-ray photoelectron spectroscopy and combined first-principles density-functional theory molecular-dynamics simulations. The valence-band spectra, in both crystalline and amorphous phases, are well simulated by the calculations. An inherent tendency of Te 5 s lone-pair formation and an enhanced participation of Cu 3 d orbitals in the bonding are found to play dominant roles in the PC mechanism. The electrical conductivity of as-deposited films and its change during the PC process is investigated in connection with valence-band spectral changes near the Fermi level. The results are successfully analyzed, based on a model proposed by Davis and Mott for chalcogenide amorphous semiconductors. The results suggest that robustness of the defect-band states against thermal stress is a key to the practical application of this material for memory devices.
Scandium doped Ge2Sb2Te5 for high-speed and low-power-consumption phase change memory
NASA Astrophysics Data System (ADS)
Wang, Yong; Zheng, Yonghui; Liu, Guangyu; Li, Tao; Guo, Tianqi; Cheng, Yan; Lv, Shilong; Song, Sannian; Ren, Kun; Song, Zhitang
2018-03-01
To bridge the gap of access time between memories and storage systems, the concept of storage class memory has been put forward based on emerging nonvolatile memory technologies. For all the nonvolatile memory candidates, the unpleasant tradeoff between operation speed and retention seems to be inevitable. To promote both the write speed and the retention of phase change memory (PCM), Sc doped Ge2Sb2Te5 (SGST) has been proposed as the storage medium. Octahedral Sc-Te motifs, acting as crystallization precursors to shorten the nucleation incubation period, are the possible reason for the high write speed of 6 ns in PCM cells, five-times faster than that of Ge2Sb2Te5 (GST) cells. Meanwhile, an enhanced 10-year data retention of 119 °C has been achieved. Benefiting from both the increased crystalline resistance and the inhibited formation of the hexagonal phase, the SGST cell has a 77% reduction in power consumption compared to the GST cell. Adhesion of the SGST/SiO2 interface has been strengthened, attributed to the reduced stress by forming smaller grains during crystallization, guaranteeing the reliability of the device. These improvements have made the SGST material a promising candidate for PCM application.
NASA Astrophysics Data System (ADS)
Younis, Adnan; Chu, Dewei; Li, Sean
2015-09-01
Further progress in high-performance microelectronic devices relies on the development of novel materials and device architectures. However, the components and designs that are currently in use have reached their physical limits. Intensive research efforts, ranging from device fabrication to performance evaluation, are required to surmount these limitations. In this paper, we demonstrate that the superior bipolar resistive switching characteristics of a CeO2:Gd-based memory device can be manipulated by means of UV radiation, serving as a new degree of freedom. Furthermore, the metal oxide-based (CeO2:Gd) memory device was found to possess electrical and neuromorphic multifunctionalities. To investigate the underlying switching mechanism of the device, its plasticity behaviour was studied by imposing weak programming conditions. In addition, a short-term to long-term memory transition analogous to the forgetting process in the human brain, which is regarded as a key biological synaptic function for information processing and data storage, was realized. Based on a careful examination of the device’s retention behaviour at elevated temperatures, the filamentary nature of switching in such devices can be understood from a new perspective.
Younis, Adnan; Chu, Dewei; Li, Sean
2015-01-01
Further progress in high-performance microelectronic devices relies on the development of novel materials and device architectures. However, the components and designs that are currently in use have reached their physical limits. Intensive research efforts, ranging from device fabrication to performance evaluation, are required to surmount these limitations. In this paper, we demonstrate that the superior bipolar resistive switching characteristics of a CeO2:Gd-based memory device can be manipulated by means of UV radiation, serving as a new degree of freedom. Furthermore, the metal oxide-based (CeO2:Gd) memory device was found to possess electrical and neuromorphic multifunctionalities. To investigate the underlying switching mechanism of the device, its plasticity behaviour was studied by imposing weak programming conditions. In addition, a short-term to long-term memory transition analogous to the forgetting process in the human brain, which is regarded as a key biological synaptic function for information processing and data storage, was realized. Based on a careful examination of the device’s retention behaviour at elevated temperatures, the filamentary nature of switching in such devices can be understood from a new perspective. PMID:26324073
Operation mode switchable charge-trap memory based on few-layer MoS2
NASA Astrophysics Data System (ADS)
Hou, Xiang; Yan, Xiao; Liu, Chunsen; Ding, Shijin; Zhang, David Wei; Zhou, Peng
2018-03-01
Ultrathin layered two-dimensional (2D) semiconductors like MoS2 and WSe2 have received a lot of attention because of their excellent electrical properties and potential applications in electronic devices. We demonstrate a charge-trap memory with two different tunable operation modes based on a few-layer MoS2 channel and an Al2O3/HfO2/Al2O3 charge storage stack. Our device shows excellent memory properties under the traditional three-terminal operation mode. More importantly, unlike conventional charge-trap devices, this device can also realize the memory performance with just two terminals (drain and source) because of the unique atomic crystal electrical characteristics. Under the two-terminal operation mode, the erase/program current ratio can reach up to 104 with a stable retention property. Our study indicates that the conventional charge-trap memory cell can also realize the memory performance without the gate terminal based on novel two dimensional materials, which is meaningful for low power consumption and high integration density applications.
Evidence for thermally assisted threshold switching behavior in nanoscale phase-change memory cells
NASA Astrophysics Data System (ADS)
Le Gallo, Manuel; Athmanathan, Aravinthan; Krebs, Daniel; Sebastian, Abu
2016-01-01
In spite of decades of research, the details of electrical transport in phase-change materials are still debated. In particular, the so-called threshold switching phenomenon that allows the current density to increase steeply when a sufficiently high voltage is applied is still not well understood, even though there is wide consensus that threshold switching is solely of electronic origin. However, the high thermal efficiency and fast thermal dynamics associated with nanoscale phase-change memory (PCM) devices motivate us to reassess a thermally assisted threshold switching mechanism, at least in these devices. The time/temperature dependence of the threshold switching voltage and current in doped Ge2Sb2Te5 nanoscale PCM cells was measured over 6 decades in time at temperatures ranging from 40 °C to 160 °C. We observe a nearly constant threshold switching power across this wide range of operating conditions. We also measured the transient dynamics associated with threshold switching as a function of the applied voltage. By using a field- and temperature-dependent description of the electrical transport combined with a thermal feedback, quantitative agreement with experimental data of the threshold switching dynamics was obtained using realistic physical parameters.
DOE Office of Scientific and Technical Information (OSTI.GOV)
Wojahn, Christopher K.
2015-10-20
This HDL code (hereafter referred to as "software") implements circuitry in Xilinx Virtex-5QV Field Programmable Gate Array (FPGA) hardware. This software allows the device to self-check the consistency of its own configuration memory for radiation-induced errors. The software then provides the capability to correct any single-bit errors detected in the memory using the device's inherent circuitry, or reload corrupted memory frames when larger errors occur that cannot be corrected with the device's built-in error correction and detection scheme.
Application of graphene oxide-poly (vinyl alcohol) polymer nanocomposite for memory devices
NASA Astrophysics Data System (ADS)
Kaushal, Jyoti; Kaur, Ravneet; Sharma, Jadab; Tripathi, S. K.
2018-05-01
Significant attention has been gained by polymer nanocomposites because of their possible demands in future electronic memory devices. In the present work, device based on Graphene Oxide (GO) and polyvinyl alcohol (PVA) has been made and examined for the memory device application. The prepared Graphene oxide (GO) and GO-PVA nanocomposite (NC) has been characterized by X-ray Diffraction (XRD). GO nanosheets show the diffraction peak at 2θ = 11.60° and the interlayer spacing of 0.761 nm. The XRD of GO-PVA NC shows the diffraction peak at 2θ =18.56°. The fabricated device shows bipolar switching behavior having ON/OFF current ratio ˜102. The Write-Read-Erase-Read (WRER) cycles test shows that the Al/GO-PVA/Ag device has good stability and repeatability.
Edla, Damodar Reddy; Kuppili, Venkatanareshbabu; Dharavath, Ramesh; Beechu, Nareshkumar Reddy
2017-01-01
Low-power wearable devices for disease diagnosis are used at anytime and anywhere. These are non-invasive and pain-free for the better quality of life. However, these devices are resource constrained in terms of memory and processing capability. Memory constraint allows these devices to store a limited number of patterns and processing constraint provides delayed response. It is a challenging task to design a robust classification system under above constraints with high accuracy. In this Letter, to resolve this problem, a novel architecture for weightless neural networks (WNNs) has been proposed. It uses variable sized random access memories to optimise the memory usage and a modified binary TRIE data structure for reducing the test time. In addition, a bio-inspired-based genetic algorithm has been employed to improve the accuracy. The proposed architecture is experimented on various disease datasets using its software and hardware realisations. The experimental results prove that the proposed architecture achieves better performance in terms of accuracy, memory saving and test time as compared to standard WNNs. It also outperforms in terms of accuracy as compared to conventional neural network-based classifiers. The proposed architecture is a powerful part of most of the low-power wearable devices for the solution of memory, accuracy and time issues. PMID:28868148
Watson, B.L.; Aeby, I.
1980-08-26
An adaptive data compression device for compressing data is described. The device has a frequency content, including a plurality of digital filters for analyzing the content of the data over a plurality of frequency regions, a memory, and a control logic circuit for generating a variable rate memory clock corresponding to the analyzed frequency content of the data in the frequency region and for clocking the data into the memory in response to the variable rate memory clock.
In-memory interconnect protocol configuration registers
DOE Office of Scientific and Technical Information (OSTI.GOV)
Cheng, Kevin Y.; Roberts, David A.
Systems, apparatuses, and methods for moving the interconnect protocol configuration registers into the main memory space of a node. The region of memory used for storing the interconnect protocol configuration registers may also be made cacheable to reduce the latency of accesses to the interconnect protocol configuration registers. Interconnect protocol configuration registers which are used during a startup routine may be prefetched into the host's cache to make the startup routine more efficient. The interconnect protocol configuration registers for various interconnect protocols may include one or more of device capability tables, memory-side statistics (e.g., to support two-level memory data mappingmore » decisions), advanced memory and interconnect features such as repair resources and routing tables, prefetching hints, error correcting code (ECC) bits, lists of device capabilities, set and store base address, capability, device ID, status, configuration, capabilities, and other settings.« less
Opportunities for nonvolatile memory systems in extreme-scale high-performance computing
Vetter, Jeffrey S.; Mittal, Sparsh
2015-01-12
For extreme-scale high-performance computing systems, system-wide power consumption has been identified as one of the key constraints moving forward, where DRAM main memory systems account for about 30 to 50 percent of a node's overall power consumption. As the benefits of device scaling for DRAM memory slow, it will become increasingly difficult to keep memory capacities balanced with increasing computational rates offered by next-generation processors. However, several emerging memory technologies related to nonvolatile memory (NVM) devices are being investigated as an alternative for DRAM. Moving forward, NVM devices could offer solutions for HPC architectures. Researchers are investigating how to integratemore » these emerging technologies into future extreme-scale HPC systems and how to expose these capabilities in the software stack and applications. In addition, current results show several of these strategies could offer high-bandwidth I/O, larger main memory capacities, persistent data structures, and new approaches for application resilience and output postprocessing, such as transaction-based incremental checkpointing and in situ visualization, respectively.« less
A study on carbon nanotube bridge as a electromechanical memory device
NASA Astrophysics Data System (ADS)
Kang, Jeong Won; Ha Lee, Jun; Joo Lee, Hoong; Hwang, Ho Jung
2005-04-01
A nanoelectromechanical (NEM) nanotube random access memory (NRAM) device based on carbon nanotube (CNT) was investigated using atomistic simulations. For the CNT-based NEM memory, the mechanical properties of the CNT-bridge and van der Waals interactions between the CNT-bridge and substrate were very important. The critical amplitude of the CNT-bridge was 16% of the length of the CNT-bridge. As molecular dynamics time increased, the CNT-bridge went to the steady state under the electrostatic force with the damping of the potential and the kinetic energies of the CNT-bridge. The interatomic interaction between the CNT-bridge and substrate, value of the CNT-bridge slack, and damping rate of the CNT-bridge were very important for the operation of the NEM memory device as a nonvolatile memory.
Probing material conductivity in two-terminal devices by resistance difference
NASA Astrophysics Data System (ADS)
Lu, Yang; Chen, I.-Wei
2017-08-01
It is generally impossible in two-terminal devices to separate the resistance of the device material from the parasitic resistance of terminals, interfaces, and serial loads, yet such information is needed to understand device physics. Here, we present an exact resistance-difference analysis, for a library of similarly configured two-terminal devices with self-similar material responses to external perturbations (electric current, temperature, and magnetic field), to obtain the relative conductivity change Δσ/σ in the device material using device-resistance data only. An outstanding example is nanometallic Mo/Si3N4:Pt/Pt resistance memory, in which electrons in Si3N4:Pt—the device material—display entirely different physics from those in the Pt and Mo electrodes. Our method unraveled their individual Δσ/σ, which for Si3N4:Pt exhibits self-similarity over different resistance states and film thicknesses.
Flexible graphene-PZT ferroelectric nonvolatile memory.
Lee, Wonho; Kahya, Orhan; Toh, Chee Tat; Ozyilmaz, Barbaros; Ahn, Jong-Hyun
2013-11-29
We report the fabrication of a flexible graphene-based nonvolatile memory device using Pb(Zr0.35,Ti0.65)O3 (PZT) as the ferroelectric material. The graphene and PZT ferroelectric layers were deposited using chemical vapor deposition and sol–gel methods, respectively. Such PZT films show a high remnant polarization (Pr) of 30 μC cm−2 and a coercive voltage (Vc) of 3.5 V under a voltage loop over ±11 V. The graphene–PZT ferroelectric nonvolatile memory on a plastic substrate displayed an on/off current ratio of 6.7, a memory window of 6 V and reliable operation. In addition, the device showed one order of magnitude lower operation voltage range than organic-based ferroelectric nonvolatile memory after removing the anti-ferroelectric behavior incorporating an electrolyte solution. The devices showed robust operation in bent states of bending radii up to 9 mm and in cycling tests of 200 times. The devices exhibited remarkable mechanical properties and were readily integrated with plastic substrates for the production of flexible circuits.
Monolayer optical memory cells based on artificial trap-mediated charge storage and release
NASA Astrophysics Data System (ADS)
Lee, Juwon; Pak, Sangyeon; Lee, Young-Woo; Cho, Yuljae; Hong, John; Giraud, Paul; Shin, Hyeon Suk; Morris, Stephen M.; Sohn, Jung Inn; Cha, Seungnam; Kim, Jong Min
2017-03-01
Monolayer transition metal dichalcogenides are considered to be promising candidates for flexible and transparent optoelectronics applications due to their direct bandgap and strong light-matter interactions. Although several monolayer-based photodetectors have been demonstrated, single-layered optical memory devices suitable for high-quality image sensing have received little attention. Here we report a concept for monolayer MoS2 optoelectronic memory devices using artificially-structured charge trap layers through the functionalization of the monolayer/dielectric interfaces, leading to localized electronic states that serve as a basis for electrically-induced charge trapping and optically-mediated charge release. Our devices exhibit excellent photo-responsive memory characteristics with a large linear dynamic range of ~4,700 (73.4 dB) coupled with a low OFF-state current (<4 pA), and a long storage lifetime of over 104 s. In addition, the multi-level detection of up to 8 optical states is successfully demonstrated. These results represent a significant step toward the development of future monolayer optoelectronic memory devices.
EDITORIAL: Non-volatile memory based on nanostructures Non-volatile memory based on nanostructures
NASA Astrophysics Data System (ADS)
Kalinin, Sergei; Yang, J. Joshua; Demming, Anna
2011-06-01
Non-volatile memory refers to the crucial ability of computers to store information once the power source has been removed. Traditionally this has been achieved through flash, magnetic computer storage and optical discs, and in the case of very early computers paper tape and punched cards. While computers have advanced considerably from paper and punched card memory devices, there are still limits to current non-volatile memory devices that restrict them to use as secondary storage from which data must be loaded and carefully saved when power is shut off. Denser, faster, low-energy non-volatile memory is highly desired and nanostructures are the critical enabler. This special issue on non-volatile memory based on nanostructures describes some of the new physics and technology that may revolutionise future computers. Phase change random access memory, which exploits the reversible phase change between crystalline and amorphous states, also holds potential for future memory devices. The chalcogenide Ge2Sb2Te5 (GST) is a promising material in this field because it combines a high activation energy for crystallization and a relatively low crystallization temperature, as well as a low melting temperature and low conductivity, which accommodates localized heating. Doping is often used to lower the current required to activate the phase change or 'reset' GST but this often aggravates other problems. Now researchers in Korea report in-depth studies of SiO2-doped GST and identify ways of optimising the material's properties for phase-change random access memory [1]. Resistance switching is an area that has attracted a particularly high level of interest for non-volatile memory technology, and a great deal of research has focused on the potential of TiO2 as a model system in this respect. Researchers at HP labs in the US have made notable progress in this field, and among the work reported in this special issue they describe means to control the switch resistance and show that limiting the current during electroforming leads to the coexistence of two resistance switching modes in TiO2 memristive devices [2]. They also present spectromicroscopic observations and modelling results for the Joule heating during switching, providing insights into the ON/OFF switching process [3]. Researchers in Korea have examined in detail the mechanism of electronic bipolar resistance switching in the Pt/TiO2/Pt structure and show that degradation in switching performance of this system can be explained by the modified distribution of trap densities [4]. The issue also includes studies of TiO2 that demonstrate analog memory, synaptic plasticity, and spike-timing-dependent plasticity functions, work that contributes to the development of neuromorphic devices that have high efficiency and low power consumption [5]. In addition to enabling a wide range of data storage and logic applications, electroresistive non-volatile memories invite us to re-evaluate the long-held paradigms in the condensed matter physics of oxides. In the past three years, much attention has been attracted to polarization-mediated electronic transport [6, 7] and domain wall conduction [8] as the key to the next generation of electronic and spintronic devices based on ferroelectric tunnelling barriers. Typically local probe experiments are performed on an ambient scanning probe microscope platform under conditions of high voltage stresses, conditions highly conducive to electrochemical reactions. Recent experiments [9-13] suggest that ionic motion can heavily contribute to the measured responses and compete with purely physical mechanisms. Electrochemical effects can also be expected in non-ferroelectric materials such as manganites and cobaltites, as well as for thick ferroelectrics under high-field conditions, as in capacitors and tunnelling junctions where the ionic motion could be a major contributor to electric field-induced strain. Such strain, in turn, can affect the effective barrier width in tunnelling experiments, resulting in memristive ionic switching. These phenomena must be differentiated from intrinsic physical polarization switching effects. Similar analysis of solid-state electrochemistry versus physical mechanisms is also important for future research in all areas of oxide materials. In an age where miniaturised computer components can enable GPS tracking, internet access and even the remote operation of machinery from a mobile phone, there is an endearing quaintness associated with images of the large rooms rammed with wires and boxes that comprised early computers. Yet there was a time when these cumbersome devices were state of the art. When the electronic numerical integrator and computer (ENIAC) was developed it achieved speeds one thousand times faster than previous electromechanical machines, a leap in processing power that has not been achieved since. It is easy to imagine future generations looking back on the slow start up and shut down times and high energy consumption of today's computers with a similar wry smile. The articles in this special issue on non-volatile memory based on nanostructures present the very latest research into the next generation's device technology, which may eventually consign today's cutting edge electronics to the history books. References [1] Ryu S W et al 2011 Nanotechnology 22 254005 [2] Miao F, Yang J J, Borghetti J, Medeiros-Ribeiro G and Williams R S 2011 Nanotechnology 22 254007 [3] Strachan J P, Strukov D B, Borghetti J, Yang J J, Medeiros-Ribeiro G and Williams R S 2011 Nanotechnology 22 245015 [4] Kim K M, Choi B J, Lee M H, Kim G H, Song S J, Seok J Y, Yoon J H, Han S and Hwang C S 2011 Nanotechnology 22 254010 [5] Seo K et al 2011 Nanotechnology 22 254023 [6] Garcia V, Fusil S, Bouzehouane K, Enouz-Vedrenne S, Mathur N D, Barthelemy A and Bibes M 2009 Nature 460 81-4 [7] Maksymovych P, Jesse S, Yu P, Ramesh R, Baddorf A P and Kalinin S V 2009 Science 324 1421 [8] Seidel J et al 2009 Nature Mat. 8 229 [9] Tsuruoka T, Terabe K, Hasegawa T, and Aono M 2010 Nanotechnology 21 425205 [10] Waser R and Aono M 2007 Nature Mat. 6 833 [11] Sawa A 2008 Materials Today 11 28 [12] Strukov D B, Snider G S, Stewart D R and Williams R S 2008 Nature 453 80 Changes were made to this Editorial on 16 May 2011. An author was added to the Editorial.
NASA Astrophysics Data System (ADS)
Yamaguchi, Yuichiro; Shouji, Masatsugu; Suda, Yoshiyuki
2012-11-01
We have investigated the dependence of the oxide layer structure of our previously proposed metal/SiO2/SiOx/3C-SiC/n-Si/metal metal-insulator-semiconductor (MIS) resistive memory device on the memory operation characteristics. The current-voltage (I-V) measurement and X-ray photoemission spectroscopy results suggest that SiOx defect states mainly caused by the oxidation of 3C-SiC at temperatures below 1000 °C are related to the hysteresis memory behavior in the I-V curve. By restricting the SiOx interface region, the number of switching cycles and the on/off current ratio are more enhanced. Compared with a memory device formed by one-step or two-step oxidation of 3C-SiC, a memory device formed by one-step oxidation of Si/3C-SiC exhibits a more restrictive SiOx interface with a more definitive SiO2 layer and higher memory performances for both the endurance switching cycle and on/off current ratio.
Novel nano materials for high performance logic and memory devices
NASA Astrophysics Data System (ADS)
Das, Saptarshi
After decades of relentless progress, the silicon CMOS industry is approaching a stall in device performance for both logic and memory devices due to fundamental scaling limitations. In order to reinforce the accelerating pace, novel materials with unique properties are being proposed on an urgent basis. This list includes one dimensional nanotubes, quasi one dimensional nanowires, two dimensional atomistically thin layered materials like graphene, hexagonal boron nitride and the more recently the rich family of transition metal di-chalcogenides comprising of MoS2, WSe2, WS2 and many more for logic applications and organic and inorganic ferroelectrics, phase change materials and magnetic materials for memory applications. Only time will tell who will win, but exploring these novel materials allow us to revisit the fundamentals and strengthen our understanding which will ultimately be beneficial for high performance device design. While there has been growing interest in two-dimensional (2D) crystals other than graphene, evaluating their potential usefulness for electronic applications is still in its infancies due to the lack of a complete picture of their performance potential. The fact that the 2-D layered semiconducting di-chalcogenides need to be connected to the "outside" world in order to capitalize on their ultimate potential immediately emphasizes the importance of a thorough understanding of the contacts. This thesis demonstrate that through a proper understanding and design of source/drain contacts and the right choice of number of MoS2 layers the excellent intrinsic properties of this 2D material can be harvested. A comprehensive experimental study on the dependence of carrier mobility on the layer thickness of back gated multilayer MoS 2 field effect transistors is also provided. A resistor network model that comprises of Thomas-Fermi charge screening and interlayer coupling is used to explain the non-monotonic trend in the extracted field effect mobility with the layer thickness. The non-monotonic trend suggests that in order to harvest the maximum potential of MoS2 for high performance device applications, a layer thickness in the range of 6-12 nm would be ideal. Finally using scandium contacts on 10nm thick exfoliated MoS2 flakes that are covered by a 15nm ALD grown Al2O3 film, record high mobility of 700cm2/Vs is achieved at room-temperature which is extremely encouraging for the design of high performance logic devices. The destructive nature of the readout process in Ferroelectric Random Access Memories (FeRAMs) is one of the major limiting factors for their wide scale commercialization. Utilizing Ferroelectric Field-Effect Transistor RAM (FeTRAM) instead solves the destructive read out problem, but at the expense of introducing crystalline ferroelectrics that are hard to integrate into CMOS. In order to address these challenges a novel, fully functional, CMOS compatible, One-Transistor-One-Transistor (1T1T) memory cell architecture using an organic ferroelectric -- PVDF-TrFE -- as the memory storage unit (gate oxide) and a silicon nanowire as the memory read out unit (channel material) is proposed and experimentally demonstrated. While evaluating the scaling potential of the above mentioned organic FeTRAM, it is found that the switching time and switching voltage of this organic copolymer PVDF-TrFE exhibits an unexpected scaling behavior as a function of the lateral device dimensions. The phenomenological theory, that explains this abnormal scaling trend, involves in-plane interchain and intrachain interaction of the copolymer - resulting in a power-law dependence of the switching field on the device area (ESW alpha ACH0.1) that is ultimately responsible for the decrease in the switching time and switching voltage. These findings are encouraging since they indicate that scaling the switching voltage and switching time without aggressively scaling the copolymer thickness occurs naturally while scaling the device area -- in this way ultimately improving the packing density and leading towards high performance memory devices.
Microscopic origin of resistance drift in the amorphous state of the phase-change compound GeTe
NASA Astrophysics Data System (ADS)
Gabardi, S.; Caravati, S.; Sosso, G. C.; Behler, J.; Bernasconi, M.
2015-08-01
Aging is a common feature of the glassy state. In the case of phase-change chalcogenide alloys the aging of the amorphous state is responsible for an increase of the electrical resistance with time. This phenomenon called drift is detrimental in the application of these materials in phase-change nonvolatile memories, which are emerging as promising candidates for storage class memories. By means of combined molecular dynamics and electronic structure calculations based on density functional theory, we have unraveled the atomistic origin of the resistance drift in the prototypical phase-change compound GeTe. The drift results from a widening of the band gap and a reduction of Urbach tails due to structural relaxations leading to the removal of chains of Ge-Ge homopolar bonds. The same structural features are actually responsible for the high mobility above the glass transition which boosts the crystallization speed exploited in the device.
Mixed-Mode Operation of Hybrid Phase-Change Nanophotonic Circuits.
Lu, Yegang; Stegmaier, Matthias; Nukala, Pavan; Giambra, Marco A; Ferrari, Simone; Busacca, Alessandro; Pernice, Wolfram H P; Agarwal, Ritesh
2017-01-11
Phase change materials (PCMs) are highly attractive for nonvolatile electrical and all-optical memory applications because of unique features such as ultrafast and reversible phase transitions, long-term endurance, and high scalability to nanoscale dimensions. Understanding their transient characteristics upon phase transition in both the electrical and the optical domains is essential for using PCMs in future multifunctional optoelectronic circuits. Here, we use a PCM nanowire embedded into a nanophotonic circuit to study switching dynamics in mixed-mode operation. Evanescent coupling between light traveling along waveguides and a phase-change nanowire enables reversible phase transition between amorphous and crystalline states. We perform time-resolved measurements of the transient change in both the optical transmission and resistance of the nanowire and show reversible switching operations in both the optical and the electrical domains. Our results pave the way toward on-chip multifunctional optoelectronic integrated devices, waveguide integrated memories, and hybrid processing applications.
Analogue spin-orbit torque device for artificial-neural-network-based associative memory operation
NASA Astrophysics Data System (ADS)
Borders, William A.; Akima, Hisanao; Fukami, Shunsuke; Moriya, Satoshi; Kurihara, Shouta; Horio, Yoshihiko; Sato, Shigeo; Ohno, Hideo
2017-01-01
We demonstrate associative memory operations reminiscent of the brain using nonvolatile spintronics devices. Antiferromagnet-ferromagnet bilayer-based Hall devices, which show analogue-like spin-orbit torque switching under zero magnetic fields and behave as artificial synapses, are used. An artificial neural network is used to associate memorized patterns from their noisy versions. We develop a network consisting of a field-programmable gate array and 36 spin-orbit torque devices. An effect of learning on associative memory operations is successfully confirmed for several 3 × 3-block patterns. A discussion on the present approach for realizing spintronics-based artificial intelligence is given.
A High-Performance Optical Memory Array Based on Inhomogeneity of Organic Semiconductors.
Pei, Ke; Ren, Xiaochen; Zhou, Zhiwen; Zhang, Zhichao; Ji, Xudong; Chan, Paddy Kwok Leung
2018-03-01
Organic optical memory devices keep attracting intensive interests for diverse optoelectronic applications including optical sensors and memories. Here, flexible nonvolatile optical memory devices are developed based on the bis[1]benzothieno[2,3-d;2',3'-d']naphtho[2,3-b;6,7-b']dithiophene (BBTNDT) organic field-effect transistors with charge trapping centers induced by the inhomogeneity (nanosprouts) of the organic thin film. The devices exhibit average mobility as high as 7.7 cm 2 V -1 s -1 , photoresponsivity of 433 A W -1 , and long retention time for more than 6 h with a current ratio larger than 10 6 . Compared with the standard floating gate memory transistors, the BBTNDT devices can reduce the fabrication complexity, cost, and time. Based on the reasonable performance of the single device on a rigid substrate, the optical memory transistor is further scaled up to a 16 × 16 active matrix array on a flexible substrate with operating voltage less than 3 V, and it is used to map out 2D optical images. The findings reveal the potentials of utilizing [1]benzothieno[3,2-b][1]benzothiophene (BTBT) derivatives as organic semiconductors for high-performance optical memory transistors with a facile structure. A detailed study on the charge trapping mechanism in the derivatives of BTBT materials is also provided, which is closely related to the nanosprouts formed inside the organic active layer. © 2018 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.
Temperature-driven topological quantum phase transitions in a phase-change material Ge2Sb2Te5.
Eremeev, S V; Rusinov, I P; Echenique, P M; Chulkov, E V
2016-12-13
The Ge 2 Sb 2 Te 5 is a phase-change material widely used in optical memory devices and is a leading candidate for next generation non-volatile random access memory devices which are key elements of various electronics and portable systems. Despite the compound is under intense investigation its electronic structure is currently not fully understood. The present work sheds new light on the electronic structure of the Ge 2 Sb 2 Te 5 crystalline phases. We demonstrate by predicting from first-principles calculations that stable crystal structures of Ge 2 Sb 2 Te 5 possess different topological quantum phases: a topological insulator phase is realized in low-temperature structure and Weyl semimetal phase is a characteristic of the high-temperature structure. Since the structural phase transitions are caused by the temperature the switching between different topologically non-trivial phases can be driven by variation of the temperature. The obtained results reveal the rich physics of the Ge 2 Sb 2 Te 5 compound and open previously unexplored possibility for spintronics applications of this material, substantially expanding its application potential.
NASA Astrophysics Data System (ADS)
Gao, Hui; Lan, Xin; Liu, Liwu; Xiao, Xinli; Liu, Yanju; Leng, Jinsong
2017-09-01
Shape memory polymers with high glass transition temperature (HSMPs) and HSMP-based deployable structures and devices, which can bear harsh operation conditions for durable applications, have attracted more and more interest in recent years. In this article, colorless and transparent shape memory polyimide (SMCTPI) films were subjected to simulated vacuum thermal cycling, atomic oxygen (AO) and ultraviolet (UV) irradiation environments up to 600 h, 556 h and 600 h for accelerated irradiation. The glass transition temperature (Tg) determined by differential scanning calorimetry (DSC) and dynamic mechanical analysis (DMA) had no obvious changes after being irradiated by varying amounts of thermal cycling, AO and UV irradiation dose. After being irradiated by 50 thermal cycles, 10 × 1021 atoms cm-2 AO irradiation and 3000 ESH UV irradiation, shape recovery behaviors of SMCTPI films also had no obvious damage even if they experienced 30 shape memory cycles, while the surface morphologies and optical properties were seriously destroyed by AO irradiation, as compared with thermal cycling and UV irradiation. The tensile strength could separately maintain 122 MPa, 120 MPa and 70 MPa after 50 thermal cycles, 10 × 1021 atoms cm-2 AO irradiation and 3000 ESH UV irradiation, which shows great potential for use in aerospace structures and devices.
NASA Astrophysics Data System (ADS)
O'Brien, Benjamin M.; McKay, Thomas G.; Xie, Sheng Q.; Calius, Emilio P.; Anderson, Iain A.
2011-04-01
Life shows us that the distribution of intelligence throughout flexible muscular networks is a highly successful solution to a wide range of challenges, for example: human hearts, octopi, or even starfish. Recreating this success in engineered systems requires soft actuator technologies with embedded sensing and intelligence. Dielectric Elastomer Actuator(s) (DEA) are promising due to their large stresses and strains, as well as quiet flexible multimodal operation. Recently dielectric elastomer devices were presented with built in sensor, driver, and logic capability enabled by a new concept called the Dielectric Elastomer Switch(es) (DES). DES use electrode piezoresistivity to control the charge on DEA and enable the distribution of intelligence throughout a DEA device. In this paper we advance the capabilities of DES further to form volatile memory elements. A set reset flip-flop with inverted reset line was developed based on DES and DEA. With a 3200V supply the flip-flop behaved appropriately and demonstrated the creation of dielectric elastomer memory capable of changing state in response to 1 second long set and reset pulses. This memory opens up applications such as oscillator, de-bounce, timing, and sequential logic circuits; all of which could be distributed throughout biomimetic actuator arrays. Future work will include miniaturisation to improve response speed, implementation into more complex circuits, and investigation of longer lasting and more sensitive switching materials.
Nonvolatile semiconductor memory having three dimension charge confinement
Dawson, L. Ralph; Osbourn, Gordon C.; Peercy, Paul S.; Weaver, Harry T.; Zipperian, Thomas E.
1991-01-01
A layered semiconductor device with a nonvolatile three dimensional memory comprises a storage channel which stores charge carriers. Charge carriers flow laterally through the storage channel from a source to a drain. Isolation material, either a Schottky barrier or a heterojunction, located in a trench of an upper layer controllably retains the charge within the a storage portion determined by the confining means. The charge is retained for a time determined by the isolation materials' nonvolatile characteristics or until a change of voltage on the isolation material and the source and drain permit a read operation. Flow of charge through an underlying sense channel is affected by the presence of charge within the storage channel, thus the presences of charge in the memory can be easily detected.
NASA Astrophysics Data System (ADS)
Zhou, Ye; Han, Su-Ting; Xu, Zong-Xiang; Roy, V. A. L.
2013-02-01
The strain and temperature dependent memory effect of organic memory transistors on plastic substrates has been investigated under ambient conditions. The gold (Au) nanoparticle monolayer was prepared and embedded in an atomic layer deposited aluminum oxide (Al2O3) as the charge trapping layer. The devices exhibited low operation voltage, reliable memory characteristics and long data retention time. Experimental analysis of the programming and erasing behavior at various bending states showed the relationship between strain and charging capacity. Thermal-induced effects on these memory devices have also been analyzed. The mobility shows ~200% rise and the memory window increases from 1.48 V to 1.8 V when the temperature rises from 20 °C to 80 °C due to thermally activated transport. The retention capability of the devices decreases with the increased working temperature. Our findings provide a better understanding of flexible organic memory transistors under various operating temperatures and validate their applications in various areas such as temperature sensors, temperature memory or advanced electronic circuits. Furthermore, the low temperature processing procedures of the key elements (Au nanoparticle monolayer and Al2O3 dielectric layer) could be potentially integrated with large area flexible electronics.The strain and temperature dependent memory effect of organic memory transistors on plastic substrates has been investigated under ambient conditions. The gold (Au) nanoparticle monolayer was prepared and embedded in an atomic layer deposited aluminum oxide (Al2O3) as the charge trapping layer. The devices exhibited low operation voltage, reliable memory characteristics and long data retention time. Experimental analysis of the programming and erasing behavior at various bending states showed the relationship between strain and charging capacity. Thermal-induced effects on these memory devices have also been analyzed. The mobility shows ~200% rise and the memory window increases from 1.48 V to 1.8 V when the temperature rises from 20 °C to 80 °C due to thermally activated transport. The retention capability of the devices decreases with the increased working temperature. Our findings provide a better understanding of flexible organic memory transistors under various operating temperatures and validate their applications in various areas such as temperature sensors, temperature memory or advanced electronic circuits. Furthermore, the low temperature processing procedures of the key elements (Au nanoparticle monolayer and Al2O3 dielectric layer) could be potentially integrated with large area flexible electronics. Electronic supplementary information (ESI) available: UV-vis spectrum of Au nanoparticle aqueous solution, transfer characteristics of the transistors without inserting an Au nanoparticle monolayer, AFM image of the pentacene layer, transfer characteristics at different program voltages and memory windows with respect to the P/E voltage. See DOI: 10.1039/c2nr32579a
High-performance flexible resistive memory devices based on Al2O3:GeOx composite
NASA Astrophysics Data System (ADS)
Behera, Bhagaban; Maity, Sarmistha; Katiyar, Ajit K.; Das, Samaresh
2018-05-01
In this study a resistive switching random access memory device using Al2O3:GeOx composite thin films on flexible substrate is presented. A bipolar switching characteristic was observed for the co-sputter deposited Al2O3:GeOx composite thin films. Al/Al2O3:GeOx/ITO/PET memory device shows excellent ON/OFF ratio (∼104) and endurance (>500 cycles). GeOx nanocrystals embedded in the Al2O3 matrix have been found to play a significant role in enhancing the switching characteristics by facilitating oxygen vacancy formation. Mechanical endurance was retained even after several bending. The conduction mechanism of the device was qualitatively discussed by considering Ohmic and SCLC conduction. This flexible device is a potential candidate for next-generation electronics device.
4D Printing of Shape Memory-Based Personalized Endoluminal Medical Devices.
Zarek, Matt; Mansour, Nicola; Shapira, Shir; Cohn, Daniel
2017-01-01
The convergence of additive manufacturing and shape-morphing materials is promising for the advancement of personalized medical devices. The capability to transform 3D objects from one shape to another, right off the print bed, is known as 4D printing. Shape memory thermosets can be tailored to have a range of thermomechanical properties favorable to medical devices, but processing them is a challenge because they are insoluble and do not flow at any temperature. This study presents here a strategy to capitalize on a series of medical imaging modalities to construct a printable shape memory endoluminal device, exemplified by a tracheal stent. A methacrylated polycaprolactone precursor with a molecular weight of 10 000 g mol -1 is printed with a UV-LED stereolithography printer based on anatomical data. This approach converges with the zeitgeist of personalized medicine and it is anticipated that it will broadly expand the application of shape memory-exhibiting biomedical devices to myriad clinical indications. © 2016 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.
Kim, Kang Lib; Lee, Wonho; Hwang, Sun Kak; Joo, Se Hun; Cho, Suk Man; Song, Giyoung; Cho, Sung Hwan; Jeong, Beomjin; Hwang, Ihn; Ahn, Jong-Hyun; Yu, Young-Jun; Shin, Tae Joo; Kwak, Sang Kyu; Kang, Seok Ju; Park, Cheolmin
2016-01-13
Enhancing the device performance of organic memory devices while providing high optical transparency and mechanical flexibility requires an optimized combination of functional materials and smart device architecture design. However, it remains a great challenge to realize fully functional transparent and mechanically durable nonvolatile memory because of the limitations of conventional rigid, opaque metal electrodes. Here, we demonstrate ferroelectric nonvolatile memory devices that use graphene electrodes as the epitaxial growth substrate for crystalline poly(vinylidene fluoride-trifluoroethylene) (PVDF-TrFE) polymer. The strong crystallographic interaction between PVDF-TrFE and graphene results in the orientation of the crystals with distinct symmetry, which is favorable for polarization switching upon the electric field. The epitaxial growth of PVDF-TrFE on a graphene layer thus provides excellent ferroelectric performance with high remnant polarization in metal/ferroelectric polymer/metal devices. Furthermore, a fully transparent and flexible array of ferroelectric field effect transistors was successfully realized by adopting transparent poly[bis(4-phenyl)(2,4,6-trimethylphenyl)amine] semiconducting polymer.
NASA Astrophysics Data System (ADS)
Lee, Dong-Hoon; Kim, Jung-Min; Lim, Ki-Tae; Cho, Hyeong Jun; Bang, Jin Ho; Kim, Yong-Sang
2016-03-01
In this paper, we empirically investigate the retention performance of organic non-volatile floating gate memory devices with CdSe nanoparticles (NPs) as charge trapping elements. Core-structured CdSe NPs or core-shell-structured ZnS/CdSe NPs were mixed in PMMA and their performance in pentacene based device was compared. The NPs and self-organized thin tunneling PMMA inside the devices exhibited hysteresis by trapping hole during capacitance-voltage characterization. Despite of core-structured NPs showing a larger memory window, the retention time was too short to be adopted by an industry. By contrast core-shell structured NPs showed an improved retention time of >10000 seconds than core-structure NCs. Based on these results and the energy band structure, we propose the retention mechanism of each NPs. This investigation of retention performance provides a comparative and systematic study of the charging/discharging behaviors of NPs based memory devices. [Figure not available: see fulltext.
Capacitance-voltage measurement in memory devices using ferroelectric polymer
NASA Astrophysics Data System (ADS)
Nguyen, Chien A.; Lee, Pooi See
2006-01-01
Application of thin polymer film as storing mean for non-volatile memory devices is investigated. Capacitance-voltage (C-V) measurement of metal-ferroelectric-metal device using ferroelectric copolymer P(VDF-TrFE) as dielectric layer shows stable 'butter-fly' curve. The two peaks in C-V measurement corresponding to the largest capacitance are coincidental at the coercive voltages that give rise to zero polarization in the polarization hysteresis measurement. By comparing data of C-V and P-E measurement, a correlation between two types of hysteresis is established in which it reveals simultaneous electrical processes occurring inside the device. These processes are caused by the response of irreversible and reversible polarization to the applied electric field that can be used to present a memory window. The memory effect of ferroelectric copolymer is further demonstrated for fabricating polymeric non-volatile memory devices using metal-ferroelectric-insulator-semiconductor structure (MFIS). By applying different sweeping voltages at the gate, bidirectional flat-band voltage shift is observed in the ferroelectric capacitor. The asymmetrical shift after negative sweeping is resulted from charge accumulation at the surface of Si substrate caused by the dipole direction in the polymer layer. The effect is reversed for positive voltage sweeping.
Nanopatterned ferroelectrics for ultrahigh density rad-hard nonvolatile memories.
DOE Office of Scientific and Technical Information (OSTI.GOV)
Brennecka, Geoffrey L.; Stevens, Jeffrey; Scrymgeour, David
2010-09-01
Radiation hard nonvolatile random access memory (NVRAM) is a crucial component for DOE and DOD surveillance and defense applications. NVRAMs based upon ferroelectric materials (also known as FERAMs) are proven to work in radiation-rich environments and inherently require less power than many other NVRAM technologies. However, fabrication and integration challenges have led to state-of-the-art FERAMs still being fabricated using a 130nm process while competing phase-change memory (PRAM) has been demonstrated with a 20nm process. Use of block copolymer lithography is a promising approach to patterning at the sub-32nm scale, but is currently limited to self-assembly directly on Si or SiO{submore » 2} layers. Successful integration of ferroelectrics with discrete and addressable features of {approx}15-20nm would represent a 100-fold improvement in areal memory density and would enable more highly integrated electronic devices required for systems advances. Towards this end, we have developed a technique that allows us to carry out block copolymer self-assembly directly on a huge variety of different materials and have investigated the fabrication, integration, and characterization of electroceramic materials - primarily focused on solution-derived ferroelectrics - with discrete features of {approx}20nm and below. Significant challenges remain before such techniques will be capable of fabricating fully integrated NVRAM devices, but the tools developed for this effort are already finding broader use. This report introduces the nanopatterned NVRAM device concept as a mechanism for motivating the subsequent studies, but the bulk of the document will focus on the platform and technology development.« less
Borghi, Alessandro; Rodgers, Will; Schievano, Silvia; Ponniah, Allan; Jeelani, Owase; Dunaway, David
2018-01-01
Treatment of unicoronal craniosynostosis is a surgically challenging problem, due to the involvement of coronal suture and cranial base, with complex asymmetries of the calvarium and orbit. Several techniques for correction have been described, including surgical bony remodeling, early strip craniotomy with orthotic helmet remodeling and distraction. Current distraction devices provide unidirectional forces and have had very limited success. Nitinol is a shape memory alloy that can be programmed to the shape of a patient-specific anatomy by means of thermal treatment.In this work, a methodology to produce a nitinol patient-specific distractor is presented: computer tomography images of a 16-month-old patient with unicoronal craniosynostosis were processed to create a 3-dimensional model of his skull and define the ideal shape postsurgery. A mesh was produced from a nitinol sheet, formed to the ideal skull shape and heat treated to be malleable at room temperature. The mesh was afterward deformed to be attached to a rapid prototyped plastic skull, replica of the patient initial anatomy. The mesh/skull construct was placed in hot water to activate the mesh shape memory property: the deformed plastic skull was computed tomography scanned for comparison of its shape with the initial anatomy and with the desired shape, showing that the nitinol mesh had been able to distract the plastic skull to a shape close to the desired one.The shape-memory properties of nitinol allow for the design and production of patient-specific devices able to deliver complex, preprogrammable shape changes.
Are Current SEE Test Procedures Adequate for Modern Devices and Electronics Technologies?
NASA Technical Reports Server (NTRS)
LaBel, Kenneth A.; Cohn, Lewis M.; Ladbury, Ray
2008-01-01
Believe it or not, this has been a simplistic look at starting a checklist for SEE testing. Given a memory that has 68 operating modes, when a SEU occurs that changes the mode, just how do you determine what's going on? Laser and microbeam tests can help, but not easily for modern packaged devices. Expanding this approach to other more complex devices such as ADCs or processors as well as analog devices should be considered. The recommendation is to use the existing text standards as the starting point. Just make your own checklist for the device/technology/issues being considered. At HEART 2007, we presented some of the burgeoning challenges associated with single event effect(SEE) testing of modern commercial memories: a) Package, device complexity, test fixture, and data analysis issues were discussed; b) "Complete" SEE Characterization would take 15 years; c) Qualification test costs have a greater than 4 times increase over the last decade. In this talk, we continue to explore the roles of technology with an emphasis on the existing SEE Test Procedures and some of the concerns related to modern devices. The primary objective of the briefing is to provide some overarching guidance concerning the many considerations involved in the formulation of a SEE test plan provided in a " Checklist" format.we note that there is no such thing as a complete check list and that the best approach is to develop a flexible test plan that takes into account the device type and functions, the device technology, circuit and package design, and, of course, test facility and beam characteristics.
Magyari-Köpe, Blanka; Tendulkar, Mihir; Park, Seong-Geon; Lee, Hyung Dong; Nishi, Yoshio
2011-06-24
Resistance change random access memory (RRAM) cells, typically built as MIM capacitor structures, consist of insulating layers I sandwiched between metal layers M, where the insulator performs the resistance switching operation. These devices can be electrically switched between two or more stable resistance states at a speed of nanoseconds, with long retention times, high switching endurance, low read voltage, and large switching windows. They are attractive candidates for next-generation non-volatile memory, particularly as a flash successor, as the material properties can be scaled to the nanometer regime. Several resistance switching models have been suggested so far for transition metal oxide based devices, such as charge trapping, conductive filament formation, Schottky barrier modulation, and electrochemical migration of point defects. The underlying fundamental principles of the switching mechanism still lack a detailed understanding, i.e. how to control and modulate the electrical characteristics of devices incorporating defects and impurities, such as oxygen vacancies, metal interstitials, hydrogen, and other metallic atoms acting as dopants. In this paper, state of the art ab initio theoretical methods are employed to understand the effects that filamentary types of stable oxygen vacancy configurations in TiO(2) and NiO have on the electronic conduction. It is shown that strong electronic interactions between metal ions adjacent to oxygen vacancy sites results in the formation of a conductive path and thus can explain the 'ON' site conduction in these materials. Implication of hydrogen doping on electroforming is discussed for Pr(0.7)Ca(0.3)MnO(3) devices based on electrical characterization and FTIR measurements.
Investigation of resistive switching behaviours in WO3-based RRAM devices
NASA Astrophysics Data System (ADS)
Li, Ying-Tao; Long, Shi-Bing; Lü, Hang-Bing; Liu, Qi; Wang, Qin; Wang, Yan; Zhang, Sen; Lian, Wen-Tai; Liu, Su; Liu, Ming
2011-01-01
In this paper, a WO3-based resistive random access memory device composed of a thin film of WO3 sandwiched between a copper top and a platinum bottom electrodes is fabricated by electron beam evaporation at room temperature. The reproducible resistive switching, low power consumption, multilevel storage possibility, and good data retention characteristics demonstrate that the Cu/WO3/Pt memory device is very promising for future nonvolatile memory applications. The formation and rupture of localised conductive filaments is suggested to be responsible for the observed resistive switching behaviours.
Memristive effects in oxygenated amorphous carbon nanodevices
NASA Astrophysics Data System (ADS)
Bachmann, T. A.; Koelmans, W. W.; Jonnalagadda, V. P.; Le Gallo, M.; Santini, C. A.; Sebastian, A.; Eleftheriou, E.; Craciun, M. F.; Wright, C. D.
2018-01-01
Computing with resistive-switching (memristive) memory devices has shown much recent progress and offers an attractive route to circumvent the von-Neumann bottleneck, i.e. the separation of processing and memory, which limits the performance of conventional computer architectures. Due to their good scalability and nanosecond switching speeds, carbon-based resistive-switching memory devices could play an important role in this respect. However, devices based on elemental carbon, such as tetrahedral amorphous carbon or ta-C, typically suffer from a low cycling endurance. A material that has proven to be capable of combining the advantages of elemental carbon-based memories with simple fabrication methods and good endurance performance for binary memory applications is oxygenated amorphous carbon, or a-CO x . Here, we examine the memristive capabilities of nanoscale a-CO x devices, in particular their ability to provide the multilevel and accumulation properties that underpin computing type applications. We show the successful operation of nanoscale a-CO x memory cells for both the storage of multilevel states (here 3-level) and for the provision of an arithmetic accumulator. We implement a base-16, or hexadecimal, accumulator and show how such a device can carry out hexadecimal arithmetic and simultaneously store the computed result in the self-same a-CO x cell, all using fast (sub-10 ns) and low-energy (sub-pJ) input pulses.
15 CFR 740.19 - Consumer Communications Devices (CCD).
Code of Federal Regulations, 2010 CFR
2010-01-01
...; (11) Memory devices classified under ECCN 5A992 or designated EAR99; (12) “Information security... 5D992 or designated EAR99; (13) Digital cameras and memory cards classified under ECCN 5A992 or...
Varma, Venugopal K.
2001-01-01
An actuator for cycling between first and second positions includes a first shaped memory alloy (SMA) leg, a second SMA leg. At least one heating/cooling device is thermally connected to at least one of the legs, each heating/cooling device capable of simultaneously heating one leg while cooling the other leg. The heating/cooling devices can include thermoelectric and/or thermoionic elements.
Image change detection systems, methods, and articles of manufacture
Jones, James L.; Lassahn, Gordon D.; Lancaster, Gregory D.
2010-01-05
Aspects of the invention relate to image change detection systems, methods, and articles of manufacture. According to one aspect, a method of identifying differences between a plurality of images is described. The method includes loading a source image and a target image into memory of a computer, constructing source and target edge images from the source and target images to enable processing of multiband images, displaying the source and target images on a display device of the computer, aligning the source and target edge images, switching displaying of the source image and the target image on the display device, to enable identification of differences between the source image and the target image.
Magnetic skyrmions on a two-lane racetrack
NASA Astrophysics Data System (ADS)
Müller, Jan
2017-02-01
Magnetic skyrmions are particle-like textures in magnetization, characterized by a topological winding number. Nanometer-scale skyrmions have been observed at room temperature in magnetic multilayer structures. The combination of their small size, topological quantization and their efficient electric manipulation makes them interesting candidates for information carriers in high-performance memory devices. A skyrmion racetrack memory has been suggested, in which information is encoded in the distance between skyrmions moving in a one-dimensional nanostrip. Here, I propose an alternative design where skyrmions move in two (or more) parallel lanes and the information is stored in the lane number of each skyrmion. Such a multilane track can be constructed by controlling the height profile of the nanostrip. Repulsive skyrmion-skyrmion interactions in narrow nanostrips guarantee that skyrmions on different lanes cannot pass each other. Current pulses can be used to induce a lane change, and combining these elements provides a robust, efficient design for skyrmion-based storage devices.
Memcomputing with membrane memcapacitive systems
NASA Astrophysics Data System (ADS)
Pershin, Y. V.; Traversa, F. L.; Di Ventra, M.
2015-06-01
We show theoretically that networks of membrane memcapacitive systems—capacitors with memory made out of membrane materials—can be used to perform a complete set of logic gates in a massively parallel way by simply changing the external input amplitudes, but not the topology of the network. This polymorphism is an important characteristic of memcomputing (computing with memories) that closely reproduces one of the main features of the brain. A practical realization of these membrane memcapacitive systems, using, e.g., graphene or other 2D materials, would be a step forward towards a solid-state realization of memcomputing with passive devices.
Hou, Xiang; Cheng, Xue-Feng; Xiao, Xin; He, Jing-Hui; Xu, Qing-Feng; Li, Hua; Li, Na-Jun; Chen, Dong-Yun; Lu, Jian-Mei
2017-09-05
Organic multilevel random resistive access memory (RRAM) devices with an electrode/organic layer/electrode sandwich-like structure suffer from poor reproducibility, such as low effective ternary device yields and a wide threshold voltage distribution, and improvements through organic material renovation are rather limited. In contrast, engineering of the electrode surfaces rather than molecule design has been demonstrated to boost the performance of organic electronics effectively. Herein, we introduce surface engineering into organic multilevel RRAMs to enhance their ternary memory performance. A new asymmetric conjugated molecule composed of phenothiazine and malononitrile with a side chain (PTZ-PTZO-CN) was fabricated in an indium tin oxide (ITO)/PTZ-PTZO-CN/Al sandwich-like memory device. Modification of the ITO substrate with a phosphonic acid (PA) prior to device fabrication increased the ternary device yield (the ratio of effective ternary device) and narrowed the threshold voltage distribution. The crystallinity analysis revealed that PTZ-PTZO-CN grown on untreated ITO crystallized into two phases. After the surface engineering of ITO, this crystalline ambiguity was eliminated and a sole crystal phase was obtained that was the same as in the powder state. The unified crystal structure and improved grain mosaicity resulted in a lower threshold voltage and, therefore, a higher ternary device yield. Our result demonstrated that PA modification also improved the memory performance of an asymmetric conjugated molecule with a side chain. © 2017 Wiley-VCH Verlag GmbH & Co. KGaA, Weinheim.
A Survey Of Architectural Approaches for Managing Embedded DRAM and Non-volatile On-chip Caches
DOE Office of Scientific and Technical Information (OSTI.GOV)
Mittal, Sparsh; Vetter, Jeffrey S; Li, Dong
Recent trends of CMOS scaling and increasing number of on-chip cores have led to a large increase in the size of on-chip caches. Since SRAM has low density and consumes large amount of leakage power, its use in designing on-chip caches has become more challenging. To address this issue, researchers are exploring the use of several emerging memory technologies, such as embedded DRAM, spin transfer torque RAM, resistive RAM, phase change RAM and domain wall memory. In this paper, we survey the architectural approaches proposed for designing memory systems and, specifically, caches with these emerging memory technologies. To highlight theirmore » similarities and differences, we present a classification of these technologies and architectural approaches based on their key characteristics. We also briefly summarize the challenges in using these technologies for architecting caches. We believe that this survey will help the readers gain insights into the emerging memory device technologies, and their potential use in designing future computing systems.« less
Short-term memory for figure-ground organization in the visual cortex.
O'Herron, Philip; von der Heydt, Rüdiger
2009-03-12
Whether the visual system uses a buffer to store image information and the duration of that storage have been debated intensely in recent psychophysical studies. The long phases of stable perception of reversible figures suggest a memory that persists for seconds. But persistence of similar duration has not been found in signals of the visual cortex. Here, we show that figure-ground signals in the visual cortex can persist for a second or more after the removal of the figure-ground cues. When new figure-ground information is presented, the signals adjust rapidly, but when a figure display is changed to an ambiguous edge display, the signals decay slowly--a behavior that is characteristic of memory devices. Figure-ground signals represent the layout of objects in a scene, and we propose that a short-term memory for object layout is important in providing continuity of perception in the rapid stream of images flooding our eyes.
Mehrabi, Reza; Dorri, Milad; Elahinia, Mohammad
2017-03-12
In this study, an umbrella-shaped device that is used for osteonecrosis treatment is simulated. The femoral head is subjected to various complex loadings as a result of a person's daily movements. Implant devices used in the body are made of shape memory alloy materials because of their remarkable resistance to wear and corrosion, good biocompatibility, and variable mechanical properties. Since this NiTi umbrella-shaped implant is simultaneously under several loadings, a 3-D model of shape memory alloy is utilized to investigate the behavior of the implant under different conditions. Shape memory and pseudo-elasticity behavior of NiTi is analyzed using a numerical model. The simulation is performed within different temperatures and in an isothermal condition with varied and complex loadings. The objective of this study is to evaluate the performance of the device under thermal and multi-axial forces via numerically study. Under tensile loading, the most critical points are on the top part of the implant. It is also shown that changes in temperature have a minor effect on the Von Mises stress. Applied forces and torques have significant influence on the femoral head. Simulations results indicate that the top portion of the umbrella is under the most stress when embedded in the body. Consequently, the middle, curved portion of the umbrella is under the least amount of stress.
Mehrabi, Reza; Dorri, Milad; Elahinia, Mohammad
2017-01-01
In this study, an umbrella-shaped device that is used for osteonecrosis treatment is simulated. The femoral head is subjected to various complex loadings as a result of a person’s daily movements. Implant devices used in the body are made of shape memory alloy materials because of their remarkable resistance to wear and corrosion, good biocompatibility, and variable mechanical properties. Since this NiTi umbrella-shaped implant is simultaneously under several loadings, a 3-D model of shape memory alloy is utilized to investigate the behavior of the implant under different conditions. Shape memory and pseudo-elasticity behavior of NiTi is analyzed using a numerical model. The simulation is performed within different temperatures and in an isothermal condition with varied and complex loadings. The objective of this study is to evaluate the performance of the device under thermal and multi-axial forces via numerically study. Under tensile loading, the most critical points are on the top part of the implant. It is also shown that changes in temperature have a minor effect on the Von Mises stress. Applied forces and torques have significant influence on the femoral head. Simulations results indicate that the top portion of the umbrella is under the most stress when embedded in the body. Consequently, the middle, curved portion of the umbrella is under the least amount of stress. PMID:28952502
NASA Astrophysics Data System (ADS)
Hibbard-Lubow, David Luke
The demands of digital memory have increased exponentially in recent history, requiring faster, smaller and more accurate storage methods. Two promising solutions to this ever-present problem are Bit Patterned Media (BPM) and Spin-Transfer Torque Magnetic Random Access Memory (STT-MRAM). Producing these technologies requires difficult and expensive fabrication techniques. Thus, the production processes must be optimized to allow these storage methods to compete commercially while continuing to increase their information storage density and reliability. I developed a process for the production of nanomagnetic devices (which can take the form of several types of digital memory) embedded in thin silicon nitride films. My focus was on optimizing the reactive ion etching recipe required to embed the device in the film. Ultimately, I found that recipe 37 (Power: 250W, CF4 nominal/actual flow rate: 25/25.4 sccm, O2 nominal/actual flow rate: 3.1/5.2 sccm, which gave a maximum pressure around 400 mTorr) gave the most repeatable and anisotropic results. I successfully used processes described in this thesis to make embedded nanomagnets, which could be used as bit patterned media. Another promising application of this work is to make embedded magnetic tunneling junctions, which are the storage medium used in MRAM. Doing so will require still some tweaks to the fabrication methods. Techniques for making these changes and their potential effects are discussed.
Disorder-induced localization in crystalline phase-change materials.
Siegrist, T; Jost, P; Volker, H; Woda, M; Merkelbach, P; Schlockermann, C; Wuttig, M
2011-03-01
Localization of charge carriers in crystalline solids has been the subject of numerous investigations over more than half a century. Materials that show a metal-insulator transition without a structural change are therefore of interest. Mechanisms leading to metal-insulator transition include electron correlation (Mott transition) or disorder (Anderson localization), but a clear distinction is difficult. Here we report on a metal-insulator transition on increasing annealing temperature for a group of crystalline phase-change materials, where the metal-insulator transition is due to strong disorder usually associated only with amorphous solids. With pronounced disorder but weak electron correlation, these phase-change materials form an unparalleled quantum state of matter. Their universal electronic behaviour seems to be at the origin of the remarkable reproducibility of the resistance switching that is crucial to their applications in non-volatile-memory devices. Controlling the degree of disorder in crystalline phase-change materials might enable multilevel resistance states in upcoming storage devices.
Hou, Xiang; Cheng, Xue-Feng; Zhou, Jin; He, Jing-Hui; Xu, Qing-Feng; Li, Hua; Li, Na-Jun; Chen, Dong-Yun; Lu, Jian-Mei
2017-11-16
Recently, surface engineering of the indium tin oxide (ITO) electrode of sandwich-like organic electric memory devices was found to effectively improve their memory performances. However, there are few methods to modify the ITO substrates. In this paper, we have successfully prepared alkyltrichlorosilane self-assembled monolayers (SAMs) on ITO substrates, and resistive random access memory devices are fabricated on these surfaces. Compared to the unmodified ITO substrates, organic molecules (i.e., 2-((4-butylphenyl)amino)-4-((4-butylphenyl)iminio)-3-oxocyclobut-1-en-1-olate, SA-Bu) grown on these SAM-modified ITO substrates have rougher surface morphologies but a smaller mosaicity. The organic layer on the SAM-modified ITO further aged to eliminate the crystalline phase diversity. In consequence, the ternary memory yields are effectively improved to approximately 40-47 %. Our results suggest that the insertion of alkyltrichlorosilane self-assembled monolayers could be an efficient method to improve the performance of organic memory devices. © 2017 Wiley-VCH Verlag GmbH & Co. KGaA, Weinheim.
Li, Wen; Guo, Fengning; Ling, Haifeng; Zhang, Peng; Yi, Mingdong; Wang, Laiyuan; Wu, Dequn; Xie, Linghai; Huang, Wei
2017-08-01
Nonvolatile organic field-effect transistor (OFET) memory devices based on pentacene/ N , N '-ditridecylperylene-3,4,9,10-tetracarboxylic diimide (P13)/pentacene trilayer organic heterostructures have been proposed. The discontinuous n-type P13 embedded in p-type pentacene layers can not only provide electrons in the semiconductor layer that facilitates electron trapping process; it also works as charge trapping sites, which is attributed to the quantum well-like pentacene/P13/pentacene organic heterostructures. The synergistic effects of charge trapping in the discontinuous P13 and the charge-trapping property of the poly(4-vinylphenol) (PVP) layer remarkably improve the memory performance. In addition, the trilayer organic heterostructures have also been successfully applied to multilevel and flexible nonvolatile memory devices. The results provide a novel design strategy to achieve high-performance nonvolatile OFET memory devices and allow potential applications for different combinations of various organic semiconductor materials in OFET memory.
Li, Wen; Guo, Fengning; Ling, Haifeng; Zhang, Peng; Wang, Laiyuan; Wu, Dequn
2017-01-01
Nonvolatile organic field‐effect transistor (OFET) memory devices based on pentacene/N,N′‐ditridecylperylene‐3,4,9,10‐tetracarboxylic diimide (P13)/pentacene trilayer organic heterostructures have been proposed. The discontinuous n‐type P13 embedded in p‐type pentacene layers can not only provide electrons in the semiconductor layer that facilitates electron trapping process; it also works as charge trapping sites, which is attributed to the quantum well‐like pentacene/P13/pentacene organic heterostructures. The synergistic effects of charge trapping in the discontinuous P13 and the charge‐trapping property of the poly(4‐vinylphenol) (PVP) layer remarkably improve the memory performance. In addition, the trilayer organic heterostructures have also been successfully applied to multilevel and flexible nonvolatile memory devices. The results provide a novel design strategy to achieve high‐performance nonvolatile OFET memory devices and allow potential applications for different combinations of various organic semiconductor materials in OFET memory. PMID:28852619
A graphene integrated highly transparent resistive switching memory device
NASA Astrophysics Data System (ADS)
Dugu, Sita; Pavunny, Shojan P.; Limbu, Tej B.; Weiner, Brad R.; Morell, Gerardo; Katiyar, Ram S.
2018-05-01
We demonstrate the hybrid fabrication process of a graphene integrated highly transparent resistive random-access memory (TRRAM) device. The indium tin oxide (ITO)/Al2O3/graphene nonvolatile memory device possesses a high transmittance of >82% in the visible region (370-700 nm) and exhibits stable and non-symmetrical bipolar switching characteristics with considerably low set and reset voltages (<±1 V). The vertical two-terminal device shows an excellent resistive switching behavior with a high on-off ratio of ˜5 × 103. We also fabricated a ITO/Al2O3/Pt device and studied its switching characteristics for comparison and a better understanding of the ITO/Al2O3/graphene device characteristics. The conduction mechanisms in high and low resistance states were analyzed, and the observed polarity dependent resistive switching is explained based on electro-migration of oxygen ions.
Organic bistable memory devices based on MoO3 nanoparticle embedded Alq3 structures.
Abhijith, T; Kumar, T V Arun; Reddy, V S
2017-03-03
Organic bistable memory devices were fabricated by embedding a thin layer of molybdenum trioxide (MoO 3 ) between two tris-(8-hydroxyquinoline)aluminum (Alq 3 ) layers. The device exhibited excellent switching characteristics with an ON/OFF current ratio of 1.15 × 10 3 at a read voltage of 1 V. The device showed repeatable write-erase capability and good stability in both the conductance states. These conductance states are non-volatile in nature and can be obtained by applying appropriate voltage pulses. The effect of MoO 3 layer thickness and its location in the Alq 3 matrix on characteristics of the memory device was investigated. The field emission scanning electron microscopy (FE-SEM) images of the MoO 3 layer revealed the presence of isolated nanoparticles. Based on the experimental results, a mechanism has been proposed for explaining the conductance switching of fabricated devices.
Organic bistable memory devices based on MoO3 nanoparticle embedded Alq3 structures
NASA Astrophysics Data System (ADS)
Abhijith, T.; Kumar, T. V. Arun; Reddy, V. S.
2017-03-01
Organic bistable memory devices were fabricated by embedding a thin layer of molybdenum trioxide (MoO3) between two tris-(8-hydroxyquinoline)aluminum (Alq3) layers. The device exhibited excellent switching characteristics with an ON/OFF current ratio of 1.15 × 103 at a read voltage of 1 V. The device showed repeatable write-erase capability and good stability in both the conductance states. These conductance states are non-volatile in nature and can be obtained by applying appropriate voltage pulses. The effect of MoO3 layer thickness and its location in the Alq3 matrix on characteristics of the memory device was investigated. The field emission scanning electron microscopy (FE-SEM) images of the MoO3 layer revealed the presence of isolated nanoparticles. Based on the experimental results, a mechanism has been proposed for explaining the conductance switching of fabricated devices.
NASA Astrophysics Data System (ADS)
Peng, Cheng; Wu, Liangcai; Rao, Feng; Song, Zhitang; Yang, Pingxiong; Song, Hongjia; Ren, Kun; Zhou, Xilin; Zhu, Min; Liu, Bo; Chu, Junhao
2012-09-01
W-Sb-Te phase-change material has been proposed to improve the performance of phase-change memory (PCM). Crystallization temperature, crystalline resistance, and 10-year data retention of Sb2Te increase markedly by W doping. The Wx(Sb2Te)1-x films crystallize quickly into a stable hexagonal phase with W uniformly distributing in the crystal lattice, which ensures faster SET speed and better operation stability for the application in practical device. PCM device based on W0.07(Sb2Te)0.93 shows ultrafast SET operation (6 ns) and good endurance (1.8 × 105 cycles). W-Sb-Te material is a promising candidate for the trade-off between programming speed and data retention.
1999-01-01
the previous sortie. 47 Portable Maintenance Data Store (PMDS). The PMDS is a solid state memory device approximately the same size as an...Engine Titanium Consortium Portable Scanner Bridging the gap between rapid imaging and robots is a class of inspection devices called scanners...patterns on the image to change . Thus, a region approximately the size of the sensor element (3 inches in diameter) can be inspected at one time, and an
A multilevel nonvolatile magnetoelectric memory
NASA Astrophysics Data System (ADS)
Shen, Jianxin; Cong, Junzhuang; Shang, Dashan; Chai, Yisheng; Shen, Shipeng; Zhai, Kun; Sun, Young
2016-09-01
The coexistence and coupling between magnetization and electric polarization in multiferroic materials provide extra degrees of freedom for creating next-generation memory devices. A variety of concepts of multiferroic or magnetoelectric memories have been proposed and explored in the past decade. Here we propose a new principle to realize a multilevel nonvolatile memory based on the multiple states of the magnetoelectric coefficient (α) of multiferroics. Because the states of α depends on the relative orientation between magnetization and polarization, one can reach different levels of α by controlling the ratio of up and down ferroelectric domains with external electric fields. Our experiments in a device made of the PMN-PT/Terfenol-D multiferroic heterostructure confirm that the states of α can be well controlled between positive and negative by applying selective electric fields. Consequently, two-level, four-level, and eight-level nonvolatile memory devices are demonstrated at room temperature. This kind of multilevel magnetoelectric memory retains all the advantages of ferroelectric random access memory but overcomes the drawback of destructive reading of polarization. In contrast, the reading of α is nondestructive and highly efficient in a parallel way, with an independent reading coil shared by all the memory cells.
Flight Control Using Distributed Shape-Change Effector Arrays
NASA Technical Reports Server (NTRS)
Raney, David L.; Montgomery, Raymond C.; Green, Lawrence I.; Park, Michael A.
2000-01-01
Recent discoveries in material science and fluidics have been used to create a variety of novel effector devices that offer great potential to enable new approaches to aerospace vehicle flight control. Examples include small inflatable blisters, shape-memory alloy diaphragms, and piezoelectric patches that may be used to produce distortions or bumps on the surface of an airfoil to generate control moments. Small jets have also been used to produce a virtual shape-change through fluidic means by creating a recirculation bubble on the surface of an airfoil. An advanced aerospace vehicle might use distributed arrays of hundreds of such devices to generate moments for stabilization and maneuver control, either augmenting or replacing conventional ailerons, flaps or rudders. This research demonstrates the design and use of shape-change device arrays for a tailless aircraft in a low-rate maneuvering application. A methodology for assessing the control authority of the device arrays is described, and a suite of arrays is used in a dynamic simulation to illustrate allocation and deployment methodologies. Although the authority of the preliminary shape-change array designs studied in this paper appeared quite low, the simulation results indicate that the effector suite possessed sufficient authority to stabilize and maneuver the vehicle in mild turbulence.
Post polymerization cure shape memory polymers
Wilson, Thomas S.; Hearon, II, Michael Keith; Bearinger, Jane P.
2017-01-10
This invention relates to chemical polymer compositions, methods of synthesis, and fabrication methods for devices regarding polymers capable of displaying shape memory behavior (SMPs) and which can first be polymerized to a linear or branched polymeric structure, having thermoplastic properties, subsequently processed into a device through processes typical of polymer melts, solutions, and dispersions and then crossed linked to a shape memory thermoset polymer retaining the processed shape.
Post polymerization cure shape memory polymers
Wilson, Thomas S; Hearon, Michael Keith; Bearinger, Jane P
2014-11-11
This invention relates to chemical polymer compositions, methods of synthesis, and fabrication methods for devices regarding polymers capable of displaying shape memory behavior (SMPs) and which can first be polymerized to a linear or branched polymeric structure, having thermoplastic properties, subsequently processed into a device through processes typical of polymer melts, solutions, and dispersions and then crossed linked to a shape memory thermoset polymer retaining the processed shape.
DOE Office of Scientific and Technical Information (OSTI.GOV)
Lee, Juhee; Lee, Sungpyo; Lee, Moo Hyung
Quasi-unipolar non-volatile organic transistor memory (NOTM) can combine the best characteristics of conventional unipolar and ambipolar NOTMs and, as a result, exhibit improved device performance. Unipolar NOTMs typically exhibit a large signal ratio between the programmed and erased current signals but also require a large voltage to program and erase the memory cells. Meanwhile, an ambipolar NOTM can be programmed and erased at lower voltages, but the resulting signal ratio is small. By embedding a discontinuous n-type fullerene layer within a p-type pentacene film, quasi-unipolar NOTMs are fabricated, of which the signal storage utilizes both electrons and holes while themore » electrical signal relies on only hole conduction. These devices exhibit superior memory performance relative to both pristine unipolar pentacene devices and ambipolar fullerene/pentacene bilayer devices. The quasi-unipolar NOTM exhibited a larger signal ratio between the programmed and erased states while also reducing the voltage required to program and erase a memory cell. This simple approach should be readily applicable for various combinations of advanced organic semiconductors that have been recently developed and thereby should make a significant impact on organic memory research.« less
Organic transistor memory with a charge storage molecular double-floating-gate monolayer.
Tseng, Chiao-Wei; Huang, Ding-Chi; Tao, Yu-Tai
2015-05-13
A flexible, low-voltage, and nonvolatile memory device was fabricated by implanting a functional monolayer on an aluminum oxide dielectric surface in a pentacene-based organic transistor. The monolayer-forming molecule contains a phosphonic acid group as the anchoring moiety and a charge-trapping core group flanked between two alkyl chain spacers as the charge trapping site. The memory characteristics strongly depend on the monolayer used due to the localized charge-trapping capability for different core groups, including the diacetylenic (DA) unit as the hole carrier trap, the naphthalenetetracarboxyldiimide (ND) unit as the electron carrier trap, and the one with both DA and ND units present, respectively. The device with the monolayer carrying both DA and ND groups has a larger memory window than that for the one containing DA only and a longer retention time than that for the one containing DA or ND only, giving a memory window of 1.4 V and a retention time around 10(9) s. This device with hybrid organic monolayer/inorganic dielectrics also exhibited rather stable device characteristics upon bending of the polymeric substrate.
Lyu, Mengjie; Liu, Youwen; Zhi, Yuduo; Xiao, Chong; Gu, Bingchuan; Hua, Xuemin; Fan, Shaojuan; Lin, Yue; Bai, Wei; Tong, Wei; Zou, Youming; Pan, Bicai; Ye, Bangjiao; Xie, Yi
2015-12-02
Fabricating a flexible room-temperature ferromagnetic resistive-switching random access memory (RRAM) device is of fundamental importance to integrate nonvolatile memory and spintronics both in theory and practice for modern information technology and has the potential to bring about revolutionary new foldable information-storage devices. Here, we show that a relatively low operating voltage (+1.4 V/-1.5 V, the corresponding electric field is around 20,000 V/cm) drives the dual vacancies evolution in ultrathin SnO2 nanosheets at room temperature, which causes the reversible transition between semiconductor and half-metal, accompanyied by an abrupt conductivity change up to 10(3) times, exhibiting room-temperature ferromagnetism in two resistance states. Positron annihilation spectroscopy and electron spin resonance results show that the Sn/O dual vacancies in the ultrathin SnO2 nanosheets evolve to isolated Sn vacancy under electric field, accounting for the switching behavior of SnO2 ultrathin nanosheets; on the other hand, the different defect types correspond to different conduction natures, realizing the transition between semiconductor and half-metal. Our result represents a crucial step to create new a information-storage device realizing the reversible transition between semiconductor and half-metal with flexibility and room-temperature ferromagnetism at low energy consumption. The as-obtained half-metal in the low-resistance state broadens the application of the device in spintronics and the semiconductor to half-metal transition on the basis of defects evolution and also opens up a new avenue for exploring random access memory mechanisms and finding new half-metals for spintronics.
Nanoscale superconducting memory based on the kinetic inductance of asymmetric nanowire loops
NASA Astrophysics Data System (ADS)
Murphy, Andrew; Averin, Dmitri V.; Bezryadin, Alexey
2017-06-01
The demand for low-dissipation nanoscale memory devices is as strong as ever. As Moore’s law is staggering, and the demand for a low-power-consuming supercomputer is high, the goal of making information processing circuits out of superconductors is one of the central goals of modern technology and physics. So far, digital superconducting circuits could not demonstrate their immense potential. One important reason for this is that a dense superconducting memory technology is not yet available. Miniaturization of traditional superconducting quantum interference devices is difficult below a few micrometers because their operation relies on the geometric inductance of the superconducting loop. Magnetic memories do allow nanometer-scale miniaturization, but they are not purely superconducting (Baek et al 2014 Nat. Commun. 5 3888). Our approach is to make nanometer scale memory cells based on the kinetic inductance (and not geometric inductance) of superconducting nanowire loops, which have already shown many fascinating properties (Aprili 2006 Nat. Nanotechnol. 1 15; Hopkins et al 2005 Science 308 1762). This allows much smaller devices and naturally eliminates magnetic-field cross-talk. We demonstrate that the vorticity, i.e., the winding number of the order parameter, of a closed superconducting loop can be used for realizing a nanoscale nonvolatile memory device. We demonstrate how to alter the vorticity in a controlled fashion by applying calibrated current pulses. A reliable read-out of the memory is also demonstrated. We present arguments that such memory can be developed to operate without energy dissipation.
NASA Astrophysics Data System (ADS)
Papagianni, Christina
Pr0.7Ca0.3MnO3 (PCMO) manganese oxide belongs in the family of materials known as transition metal oxides. These compounds have received increased attention due to their perplexing properties such as Colossal Magnetoresistance effect, Charge-Ordered phase, existence of phase-separated states etc. In addition, it was recently discovered that short electrical pulses in amplitude and duration are sufficient to induce reversible and non-volatile resistance changes in manganese perovskite oxide thin films at room temperature, known as the EPIR effect. The existence of the EPIR effect in PCMO thin films at room temperature opens a viable way for the realization of fast, high-density, low power non-volatile memory devices in the near future. The purpose of this study is to investigate, optimize and understand the properties of Pr0.7Ca0.3MnO 3 (PCMO) thin film devices and to identify how these properties affect the EPIR effect. PCMO thin films were deposited on various substrates, such as metals, and conducting and insulating oxides, by pulsed laser and radio frequency sputtering methods. Our objective was to understand and compare the induced resistive states. We attempted to identify the induced resistance changes by considering two resistive models to be equivalent to our devices. Impedance spectroscopy was also utilized in a wide temperature range that was extended down to 70K. Fitted results of the temperature dependence of the resistance states were also included in this study. In the same temperature range, we probed the resistance changes in PCMO thin films and we examined whether the phase transitions affect the EPIR effect. In addition, we included a comparison of devices with electrodes consisting of different size and different materials. We demonstrated a direct relation between the EPIR effect and the phase diagram of bulk PCMO samples. A model that could account for the observed EPIR effect is presented.
Lin, Tzu-Shun; Lou, Li-Ren; Lee, Ching-Ting; Tsai, Tai-Cheng
2012-03-01
The memory devices constructed from the Ge-nanoclusters embedded GeO(x) layer deposited by the laser-assisted chemical vapor deposition (LACVD) system were fabricated. The Ge nanoclusters were observed by a high-resolution transmission electron microscopy. Using the capacitance versus voltage (C-V) and the conductance versus voltage (G-V) characteristics measured under various frequencies, the memory effect observed in the C-V curves was dominantly attributed to the charge storage in the Ge nanoclusters. Furthermore, the defects existed in the deposited film and the interface states were insignificant to the memory performances. Capacitance versus time (C-t) measurement was also executed to evaluate the charge retention characteristics. The charge storage and retention behaviors of the devices demonstrated that the Ge nanoclusters grown by the LACVD system at low temperature are promising for memory device applications.
Solution-processed Al-chelated gelatin for highly transparent non-volatile memory applications
DOE Office of Scientific and Technical Information (OSTI.GOV)
Chang, Yu-Chi; Wang, Yeong-Her, E-mail: yhw@ee.ncku.edu.tw
2015-03-23
Using the biomaterial of Al-chelated gelatin (ACG) prepared by sol-gel method in the ITO/ACG/ITO structure, a highly transparent resistive random access memory (RRAM) was obtained. The transmittance of the fabricated device is approximately 83% at 550 nm while that of Al/gelatin/ITO is opaque. As to the ITO/gelatin/ITO RRAM, no resistive switching behavior can be seen. The ITO/ACG/ITO RRAM shows high ON/OFF current ratio (>10{sup 5}), low operation voltage, good uniformity, and retention characteristics at room temperature and 85 °C. The mechanism of the ACG-based memory devices is presented. The enhancement of these electrical properties can be attributed to the chelate effect ofmore » Al ions with gelatin. Results show that transparent ACG-based memory devices possess the potential for next-generation resistive memories and bio-electronic applications.« less
Light programmable organic transistor memory device based on hybrid dielectric
NASA Astrophysics Data System (ADS)
Ren, Xiaochen; Chan, Paddy K. L.
2013-09-01
We have fabricated the transistor memory devices based on SiO2 and polystyrene (PS) hybrid dielectric. The trap states densities with different semiconductors have been investigated and a maximum 160V memory window between programming and erasing is realized. For DNTT based transistor, the trapped electron density is limited by the number of mobile electrons in semiconductor. The charge transport mechanism is verified by light induced Vth shift effect. Furthermore, in order to meet the low operating power requirement of portable electronic devices, we fabricated the organic memory transistor based on AlOx/self-assembly monolayer (SAM)/PS hybrid dielectric, the effective capacitance of hybrid dielectric is 210 nF cm-2 and the transistor can reach saturation state at -3V gate bias. The memory window in transfer I-V curve is around 1V under +/-5V programming and erasing bias.
Hyun, Seung; Kwon, Owoong; Lee, Bom-Yi; Seol, Daehee; Park, Beomjin; Lee, Jae Yong; Lee, Ju Hyun; Kim, Yunseok; Kim, Jin Kon
2016-01-21
Multiple data writing-based multi-level non-volatile memory has gained strong attention for next-generation memory devices to quickly accommodate an extremely large number of data bits because it is capable of storing multiple data bits in a single memory cell at once. However, all previously reported devices have failed to store a large number of data bits due to the macroscale cell size and have not allowed fast access to the stored data due to slow single data writing. Here, we introduce a novel three-dimensional multi-floor cascading polymeric ferroelectric nanostructure, successfully operating as an individual cell. In one cell, each floor has its own piezoresponse and the piezoresponse of one floor can be modulated by the bias voltage applied to the other floor, which means simultaneously written data bits in both floors can be identified. This could achieve multi-level memory through a multiple data writing process.
NASA Astrophysics Data System (ADS)
Guarcello, Claudio; Solinas, Paolo; Braggio, Alessandro; Di Ventra, Massimiliano; Giazotto, Francesco
2018-01-01
We propose a superconducting thermal memory device that exploits the thermal hysteresis in a flux-controlled temperature-biased superconducting quantum-interference device (SQUID). This system reveals a flux-controllable temperature bistability, which can be used to define two well-distinguishable thermal logic states. We discuss a suitable writing-reading procedure for these memory states. The time of the memory writing operation is expected to be on the order of approximately 0.2 ns for a Nb-based SQUID in thermal contact with a phonon bath at 4.2 K. We suggest a noninvasive readout scheme for the memory states based on the measurement of the effective resonance frequency of a tank circuit inductively coupled to the SQUID. The proposed device paves the way for a practical implementation of thermal logic and computation. The advantage of this proposal is that it represents also an example of harvesting thermal energy in superconducting circuits.
Zhao, Jun Hui; Thomson, Douglas J; Pilapil, Matt; Pillai, Rajesh G; Rahman, G M Aminur; Freund, Michael S
2010-04-02
Dynamic resistive memory devices based on a conjugated polymer composite (PPy(0)DBS(-)Li(+) (PPy: polypyrrole; DBS(-): dodecylbenzenesulfonate)), with field-driven ion migration, have been demonstrated. In this work the dynamics of these systems has been investigated and it has been concluded that increasing the applied field can dramatically increase the rate at which information can be 'written' into these devices. A conductance model using space charge limited current coupled with an electric field induced ion reconfiguration has been successfully utilized to interpret the experimentally observed transient conducting behaviors. The memory devices use the rising and falling transient current states for the storage of digital states. The magnitude of these transient currents is controlled by the magnitude and width of the write/read pulse. For the 500 nm length devices used in this work an increase in 'write' potential from 2.5 to 5.5 V decreased the time required to create a transient conductance state that can be converted into the digital signal by 50 times. This work suggests that the scaling of these devices will be favorable and that 'write' times for the conjugated polymer composite memory devices will decrease rapidly as ion driving fields increase with decreasing device size.
NASA Astrophysics Data System (ADS)
Hyun, Seung; Kwon, Owoong; Lee, Bom-Yi; Seol, Daehee; Park, Beomjin; Lee, Jae Yong; Lee, Ju Hyun; Kim, Yunseok; Kim, Jin Kon
2016-01-01
Multiple data writing-based multi-level non-volatile memory has gained strong attention for next-generation memory devices to quickly accommodate an extremely large number of data bits because it is capable of storing multiple data bits in a single memory cell at once. However, all previously reported devices have failed to store a large number of data bits due to the macroscale cell size and have not allowed fast access to the stored data due to slow single data writing. Here, we introduce a novel three-dimensional multi-floor cascading polymeric ferroelectric nanostructure, successfully operating as an individual cell. In one cell, each floor has its own piezoresponse and the piezoresponse of one floor can be modulated by the bias voltage applied to the other floor, which means simultaneously written data bits in both floors can be identified. This could achieve multi-level memory through a multiple data writing process.Multiple data writing-based multi-level non-volatile memory has gained strong attention for next-generation memory devices to quickly accommodate an extremely large number of data bits because it is capable of storing multiple data bits in a single memory cell at once. However, all previously reported devices have failed to store a large number of data bits due to the macroscale cell size and have not allowed fast access to the stored data due to slow single data writing. Here, we introduce a novel three-dimensional multi-floor cascading polymeric ferroelectric nanostructure, successfully operating as an individual cell. In one cell, each floor has its own piezoresponse and the piezoresponse of one floor can be modulated by the bias voltage applied to the other floor, which means simultaneously written data bits in both floors can be identified. This could achieve multi-level memory through a multiple data writing process. Electronic supplementary information (ESI) available. See DOI: 10.1039/c5nr07377d
NASA Astrophysics Data System (ADS)
Gogurla, Narendar; Mondal, Suvra P.; Sinha, Arun K.; Katiyar, Ajit K.; Banerjee, Writam; Kundu, Subhas C.; Ray, Samit K.
2013-08-01
The growing demand for biomaterials for electrical and optical devices is motivated by the need to make building blocks for the next generation of printable bio-electronic devices. In this study, transparent and flexible resistive memory devices with a very high ON/OFF ratio incorporating gold nanoparticles into the Bombyx mori silk protein fibroin biopolymer are demonstrated. The novel electronic memory effect is based on filamentary switching, which leads to the occurrence of bistable states with an ON/OFF ratio larger than six orders of magnitude. The mechanism of this process is attributed to the formation of conductive filaments through silk fibroin and gold nanoparticles in the nanocomposite. The proposed hybrid bio-inorganic devices show promise for use in future flexible and transparent nanoelectronic systems.
Compact modeling of CRS devices based on ECM cells for memory, logic and neuromorphic applications.
Linn, E; Menzel, S; Ferch, S; Waser, R
2013-09-27
Dynamic physics-based models of resistive switching devices are of great interest for the realization of complex circuits required for memory, logic and neuromorphic applications. Here, we apply such a model of an electrochemical metallization (ECM) cell to complementary resistive switches (CRSs), which are favorable devices to realize ultra-dense passive crossbar arrays. Since a CRS consists of two resistive switching devices, it is straightforward to apply the dynamic ECM model for CRS simulation with MATLAB and SPICE, enabling study of the device behavior in terms of sweep rate and series resistance variations. Furthermore, typical memory access operations as well as basic implication logic operations can be analyzed, revealing requirements for proper spike and level read operations. This basic understanding facilitates applications of massively parallel computing paradigms required for neuromorphic applications.
Evidence for thermally assisted threshold switching behavior in nanoscale phase-change memory cells
DOE Office of Scientific and Technical Information (OSTI.GOV)
Le Gallo, Manuel; Athmanathan, Aravinthan; Krebs, Daniel
2016-01-14
In spite of decades of research, the details of electrical transport in phase-change materials are still debated. In particular, the so-called threshold switching phenomenon that allows the current density to increase steeply when a sufficiently high voltage is applied is still not well understood, even though there is wide consensus that threshold switching is solely of electronic origin. However, the high thermal efficiency and fast thermal dynamics associated with nanoscale phase-change memory (PCM) devices motivate us to reassess a thermally assisted threshold switching mechanism, at least in these devices. The time/temperature dependence of the threshold switching voltage and current inmore » doped Ge{sub 2}Sb{sub 2}Te{sub 5} nanoscale PCM cells was measured over 6 decades in time at temperatures ranging from 40 °C to 160 °C. We observe a nearly constant threshold switching power across this wide range of operating conditions. We also measured the transient dynamics associated with threshold switching as a function of the applied voltage. By using a field- and temperature-dependent description of the electrical transport combined with a thermal feedback, quantitative agreement with experimental data of the threshold switching dynamics was obtained using realistic physical parameters.« less
DOE Office of Scientific and Technical Information (OSTI.GOV)
Auciello, O.; Dey, S.; Paz de Araujo, C.
2011-05-01
The science and technology of ferroelectric thin films and their applications have attracted many researchers and experienced tremendous progress in the past 20 years. The recent worldwide increase in commercial applications of ferroelectric devices such as smart cards based on nonvolatile ferroelectric random access memories is a symbol of both the maturity and the acceptance of the technology. The 21st International Symposium on Integrated Ferroelectrics (ISIF 2009), held on September 22 to October 2, 2009 in Colorado Springs, CO, provided a forum for the academic and national laboratories research community and industry to present and share their new findings, achievements,more » and opinions on integrated ferroelectrics and their applications. The International Symposium on Integrated Ferroelectrics hosted the ISIF 2009. This was the first year where the ISIF held the conference in its new format under the name of International Symposium on Integrated Functionalities. The General Chairs of the ISIF in consultation with the Advisory Board and the ISIF community decided to revise the focus of the conference in order to broaden the scope to the science and technology of multifunctional materials and devices. This decision was taken in view that a new paradigm in materials, materials integration, and devices is emerging with a view to the development of a new generation of micro- and nanoscale multifunctional devices. The program included three plenary presentations on diverse topics such as 'The Role of Nonvolatile Memory in Ubiquitous Computing,' 'Ferroelectrics and High Density Memory Technology,' 'Nanoscale Ferroelectrics and Interfaces: Size Effects,' four tutorial lectures on diverse topics, such as 'Magnetic Memory Applications,' 'Ferroelectrics and Ferroelectric Devices,' 'Challenges for High-K Dielectrics on High Mobility Channels,' 'Solar Cell Materials,' one poster session, and eight oral sessions. Thanks to the great efforts made by the ISIF organization committee and the session chairs, the conference successfully achieved its objectives and the work presented reflected very well the most recent advances of integrated ferroelectrics and their applications, as well as advances in other areas related to the new theme of Integrated Functionalities. Many aspects of ferroelectric, piezoelectric, high-K dielectric, magnetic, and phase change materials, including the science and technology of these materials in thin film form, integration with other thin film materials (metals or oxide electrodes), and fabrication of micro- and nanostructures based on these heterostructure layers, and device architecture and physics, were addressed from the experimental point of view. Work on theory and computer simulations of the mentioned materials and devices were discussed also with a view to the promising applications to multifunctional devices. In addition, the ISIF 2009 featured discussions of alternative nonvolatile memory concepts and materials, such as phase change memories, research on multiferroics and magnetoelectric materials, ferroelectric photovoltaics, and new directions on the science of perovskites such as biomolecular/polarizable interfaces, and bio-ferroelectric and other oxide interfaces. Following the standard submission and peer review process of Journal of Applied Physics, the selected papers presented in ISIF 2009 in Colorado Springs are published in this special issue. We believe that the papers in this special issue represent the forefront contributions to ISIF 2009 in the various areas of fundamental and applied science of integrated ferroelectrics and functionalities and their applications. We would like to take this opportunity to thank the following organizations and companies for their support and sponsorship for ISIF 2009, namely: Aixact Systems GMBH, Radiant Technologies, Symetrix Corporation, and Taylor and Francis Publishers. We would also like to thank the conference and session chairs, advisory and organizing committee members for their hard work that resulted in a very successful ISIF 2009, now in its new future-looking modality of Integrated Functionalities.« less
NASA Astrophysics Data System (ADS)
Alamgir, Zahiruddin
RRAM has recently emerged as a strong candidate for non-volatile memory (NVM). Beyond memory applications, RRAM holds promise for use in performing logic functions, mimicking neuromorphic activities, enabling multi-level switching, and as one of the key elements of hardware based encryption or signal processing systems. It has been shown previously that RRAM resistance levels can be changed by adjusting compliance current or voltage level. This characteristic makes RRAM suitable for use in setting the synaptic weight in neuromorphic computing circuits. RRAM is also considered as a key element in hardware encryption systems, to produce unique and reproducible signals. However, a key challenge to implement RRAM in these applications is significant cycle to cycle performance variability. We sought to develop RRAM that can be tuned to different resistance levels gradually, with high reliability, and low variability. To achieve this goal, we focused on elucidating the conduction mechanisms underlying the resistive switching behavior for these devices. Electrical conduction mechanisms were determined by curve fitting I-V data using different current conduction equations. Temperature studies were also performed to corroborate these data. It was found that Schottky barrier height and width modulation was one of the key parameters that could be tuned to achieve different resistance levels, and for switching resistance states, primarily via oxygen vacancy movement. Oxygen exchange layers with different electronegativity were placed between top electrode and the oxide layer of TaOx devices to determine the effect of oxygen vacancy concentrations and gradients in these devices. It was found that devices with OELs with lower electronegativity tend to yield greater separation in the OFF vs. ON state resistance levels. As an extension of this work, TaOx based RRAM with Hf as the OEL was fabricated and could be tuned to different resistance level using pulse width and height modulation, yielding excellent uniformity and reliability. These findings improve our understanding of conduction within TaO x-based RRAM devices, providing a physical basis for switching in these devices. The value of this work lies in the demonstration of devices with excellent performance and demonstrated devices constitute a significant step toward real-world applications.
NASA Astrophysics Data System (ADS)
Lee, Myoung-Jae; Lee, Chang Bum; Lee, Dongsoo; Lee, Seung Ryul; Chang, Man; Hur, Ji Hyun; Kim, Young-Bae; Kim, Chang-Jung; Seo, David H.; Seo, Sunae; Chung, U.-In; Yoo, In-Kyeong; Kim, Kinam
2011-08-01
Numerous candidates attempting to replace Si-based flash memory have failed for a variety of reasons over the years. Oxide-based resistance memory and the related memristor have succeeded in surpassing the specifications for a number of device requirements. However, a material or device structure that satisfies high-density, switching-speed, endurance, retention and most importantly power-consumption criteria has yet to be announced. In this work we demonstrate a TaOx-based asymmetric passive switching device with which we were able to localize resistance switching and satisfy all aforementioned requirements. In particular, the reduction of switching current drastically reduces power consumption and results in extreme cycling endurances of over 1012. Along with the 10 ns switching times, this allows for possible applications to the working-memory space as well. Furthermore, by combining two such devices each with an intrinsic Schottky barrier we eliminate any need for a discrete transistor or diode in solving issues of stray leakage current paths in high-density crossbar arrays.
Role of nanorods insertion layer in ZnO-based electrochemical metallization memory cell
NASA Astrophysics Data System (ADS)
Mangasa Simanjuntak, Firman; Singh, Pragya; Chandrasekaran, Sridhar; Juanda Lumbantoruan, Franky; Yang, Chih-Chieh; Huang, Chu-Jie; Lin, Chun-Chieh; Tseng, Tseung-Yuen
2017-12-01
An engineering nanorod array in a ZnO-based electrochemical metallization device for nonvolatile memory applications was investigated. A hydrothermally synthesized nanorod layer was inserted into a Cu/ZnO/ITO device structure. Another device was fabricated without nanorods for comparison, and this device demonstrated a diode-like behavior with no switching behavior at a low current compliance (CC). The switching became clear only when the CC was increased to 75 mA. The insertion of a nanorods layer induced switching characteristics at a low operation current and improve the endurance and retention performances. The morphology of the nanorods may control the switching characteristics. A forming-free electrochemical metallization memory device having long switching cycles (>104 cycles) with a sufficient memory window (103 times) for data storage application, good switching stability and sufficient retention was successfully fabricated by adjusting the morphology and defect concentration of the inserted nanorod layer. The nanorod layer not only contributed to inducing resistive switching characteristics but also acted as both a switching layer and a cation diffusion control layer.
DOE Office of Scientific and Technical Information (OSTI.GOV)
2015-03-10
DESTINY is a comprehensive tool for modeling 3D and 2D cache designs using SRAM,embedded DRAM (eDRAM), spin transfer torque RAM (STT-RAM), resistive RAM (ReRAM), and phase change RAM (PCN). In its purpose, it is similar to CACTI, CACTI-3DD or NVSim. DESTINY is very useful for performing design-space exploration across several dimensions, such as optimizing for a target (e.g. latency, area or energy-delay product) for agiven memory technology, choosing the suitable memory technology or fabrication method (i.e. 2D v/s 3D) for a given optimization target, etc. DESTINY has been validated against several cache prototypes. DESTINY is expected to boost studies ofmore » next-generation memory architectures used in systems ranging from mobile devices to extreme-scale supercomputers.« less
Lee, Tae Hoon; Loke, Desmond; Elliott, Stephen R
2015-10-07
A comprehensive microscopic mechanism of doping-induced kinetically constrained crystallization in phase-change materials is provided by investigating structural and dynamical dopant characteristics via ab initio molecular dynamics simulations. The information gained from this study may provide a basis for a fast screening of dopant species for electronic memory devices, or for understanding the general physics involved in the crystallization of doped glasses. © 2015 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.
Nanoscale content-addressable memory
NASA Technical Reports Server (NTRS)
Davis, Bryan (Inventor); Principe, Jose C. (Inventor); Fortes, Jose (Inventor)
2009-01-01
A combined content addressable memory device and memory interface is provided. The combined device and interface includes one or more one molecular wire crossbar memories having spaced-apart key nanowires, spaced-apart value nanowires adjacent to the key nanowires, and configurable switches between the key nanowires and the value nanowires. The combination further includes a key microwire-nanowire grid (key MNG) electrically connected to the spaced-apart key nanowires, and a value microwire-nanowire grid (value MNG) electrically connected to the spaced-apart value nanowires. A key or value MNGs selects multiple nanowires for a given key or value.
Scalable printed electronics: an organic decoder addressing ferroelectric non-volatile memory.
Ng, Tse Nga; Schwartz, David E; Lavery, Leah L; Whiting, Gregory L; Russo, Beverly; Krusor, Brent; Veres, Janos; Bröms, Per; Herlogsson, Lars; Alam, Naveed; Hagel, Olle; Nilsson, Jakob; Karlsson, Christer
2012-01-01
Scalable circuits of organic logic and memory are realized using all-additive printing processes. A 3-bit organic complementary decoder is fabricated and used to read and write non-volatile, rewritable ferroelectric memory. The decoder-memory array is patterned by inkjet and gravure printing on flexible plastics. Simulation models for the organic transistors are developed, enabling circuit designs tolerant of the variations in printed devices. We explain the key design rules in fabrication of complex printed circuits and elucidate the performance requirements of materials and devices for reliable organic digital logic.
Bad data packet capture device
Chen, Dong; Gara, Alan; Heidelberger, Philip; Vranas, Pavlos
2010-04-20
An apparatus and method for capturing data packets for analysis on a network computing system includes a sending node and a receiving node connected by a bi-directional communication link. The sending node sends a data transmission to the receiving node on the bi-directional communication link, and the receiving node receives the data transmission and verifies the data transmission to determine valid data and invalid data and verify retransmissions of invalid data as corresponding valid data. A memory device communicates with the receiving node for storing the invalid data and the corresponding valid data. A computing node communicates with the memory device and receives and performs an analysis of the invalid data and the corresponding valid data received from the memory device.
Analysis of a digital RF memory in a signal-delay application
DOE Office of Scientific and Technical Information (OSTI.GOV)
Jelinek, D.A.
1992-03-01
Laboratory simulation of the approach of a radar fuze towards a target is an important factor in our ability to accurately measure the radar's performance. This simulation is achieved, in part, by dynamically delaying and attenuating the radar's transmitted pulse and sending the result back to the radar's receiver. Historically, the device used to perform the dynamic delay has been a limiting factor in the evaluation of a radar's performance and characteristics. A new device has been proposed that appears to have more capability than previous dynamic delay devices. This device is the digital RF memory. This report presents themore » results of an analysis of a digital RF memory used in a signal-delay application. 2 refs.« less
Evolutionary flight and enabling smart actuator devices
NASA Astrophysics Data System (ADS)
Manzo, Justin; Garcia, Ephrahim
2007-04-01
Recent interest in morphing vehicles with multiple, optimized configurations has led to renewed research on biological flight. The flying vertebrates - birds, bats, and pterosaurs - all made or make use of various morphing devices to achieve lift to suit rapidly changing flight demands, including maneuvers as complex as perching and hovering. The first part of this paper will discuss these devices, with a focus on the morphing elements and structural strong suits of each creature. Modern flight correlations to these devices will be discussed and analyzed as valid adaptations of these evolutionary traits. The second part of the paper will focus on the use of active joint structures for use in morphing aircraft devices. Initial work on smart actuator devices focused on NASA Langley's Hyper-Elliptical Cambered Span (HECS) wing platform, which led to development of a discretized spanwise curvature effector. This mechanism uses shape memory alloy (SMA) as the sole morphing actuator, allowing fast rotation with lightweight components at the expense of energy inefficiency. Phase two of morphing actuator development will add an element of active rigidity to the morphing structure, in the form of shape memory polymer (SMP). Employing a composite structure of polymer and alloy, this joint will function as part of a biomimetic morphing actuator system in a more energetically efficient manner. The joint is thermally actuated to allow compliance on demand and rigidity in the nominal configuration. Analytical and experimental joint models are presented, and potential applications on a bat-wing aircraft structure are outlined.
Xie, Hanhan; Shao, Jundong; Ma, Yufei; Wang, Jiahong; Huang, Hao; Yang, Na; Wang, Huaiyu; Ruan, Changshun; Luo, Yanfeng; Wang, Qu-Quan; Chu, Paul K; Yu, Xue-Feng
2018-05-01
In this paper, we propose a new shape memory polymer (SMP) composite with excellent near-infrared (NIR)-photoresponsive shape memory performance and biodegradability. The composite is fabricated by using piperazine-based polyurethane (PU) as thermo-responsive SMP incorporated with black-phosphorus (BP) sheets as NIR photothermal nanofillers. Under 808 nm light irradiation, the incorporated BP sheets with concentration of only 0.08 wt% enable rapid temperature increase over the glass temperature of PU and trigger the shape change of the composite with shape recovery rate of ∼100%. The in vitro and in vivo toxicity examinations demonstrate the good biocompatibility of the PU/BP composite, and it degrades naturally into non-toxic carbon dioxide and water from PU and non-toxic phosphate from BP. By implanting PU/BP columns into back subcutis and vagina of mice, they exhibit excellent shape memory activity to change their shape quickly under moderate 808 nm light irradiaiton. Such SMP composite enable the development of intelligent implantable devices, which can be easily controlled by the remote NIR light and degrade gradually after performing the designed functions in the body. Copyright © 2018 Elsevier Ltd. All rights reserved.
DOE Office of Scientific and Technical Information (OSTI.GOV)
Zhu, Zhihua; Evans, Philip G.; Haglund, Richard F.
Mastering dynamic free-space spectral control and modulation in the near-infrared (NIR) and optical regimes remains a challenging task that is hindered by the available functional materials at high frequencies. In this work, we have realized an efficient metadevice capable of spectral control by minimizing the thermal mass of a vanadium dioxide phase-change material (PCM) and placing the PCM at the feed gap of a bow-tie field antenna. The device has an experimentally measured tuning range of up to 360 nm in the NIR and a modulation depth of 33% at the resonant wavelength. The metadevice is configured for integrated andmore » local heating, leading to faster switching and more precise spatial control compared with devices based on phase-change thin films. We envisage that the combined advantages of this device will open new opportunities for signal processing, memory, security, and holography at optical frequencies.« less
NASA Astrophysics Data System (ADS)
Kindsmüller, A.; Schmitz, C.; Wiemann, C.; Skaja, K.; Wouters, D. J.; Waser, R.; Schneider, C. M.; Dittmann, R.
2018-04-01
The switching mechanism of valence change resistive memory devices is widely accepted to be an ionic movement of oxygen vacancies resulting in a valence change of the metal cations. However, direct experimental proofs of valence changes in memristive devices are scarce. In this work, we have employed hard X-ray photoelectron emission microscopy (PEEM) to probe local valence changes in Pt/ZrOx/Ta memristive devices. The use of hard X-ray radiation increases the information depth, thus providing chemical information from buried layers. By extracting X-ray photoelectron spectra from different locations in the PEEM images, we show that zirconia in the active device area is reduced compared to a neighbouring region, confirming the valence change in the ZrOx film during electroforming. Furthermore, we succeeded in measuring the Ta 4f spectrum for two different resistance states on the same device. In both states, as well as outside the device region, the Ta electrode is composed of different suboxides without any metallic contribution, hinting to the formation of TaOx during the deposition of the Ta thin film. We observed a reduction of the Ta oxidation state in the low resistance state with respect to the high resistive state. This observation is contradictory to the established model, as the internal redistribution of oxygen between ZrOx and the Ta electrode during switching would lead to an oxidation of the Ta layer in the low resistance state. Instead, we have to conclude that the Ta electrode takes an active part in the switching process in our devices and that oxygen is released and reincorporated in the ZrOx/TaOx bilayer during switching. This is confirmed by the degradation of the high resistance state during endurance measurements under vacuum.
2013-01-01
Comparison of resistive switching memory characteristics using copper (Cu) and aluminum (Al) electrodes on GeOx/W cross-points has been reported under low current compliances (CCs) of 1 nA to 50 μA. The cross-point memory devices are observed by high-resolution transmission electron microscopy (HRTEM). Improved memory characteristics are observed for the Cu/GeOx/W structures as compared to the Al/GeOx/W cross-points owing to AlOx formation at the Al/GeOx interface. The RESET current increases with the increase of the CCs varying from 1 nA to 50 μA for the Cu electrode devices, while the RESET current is high (>1 mA) and independent of CCs varying from 1 nA to 500 μA for the Al electrode devices. An extra formation voltage is needed for the Al/GeOx/W devices, while a low operation voltage of ±2 V is needed for the Cu/GeOx/W cross-point devices. Repeatable bipolar resistive switching characteristics of the Cu/GeOx/W cross-point memory devices are observed with CC varying from 1 nA to 50 μA, and unipolar resistive switching is observed with CC >100 μA. High resistance ratios of 102 to 104 for the bipolar mode (CCs of 1 nA to 50 μA) and approximately 108 for the unipolar mode are obtained for the Cu/GeOx/W cross-points. In addition, repeatable switching cycles and data retention of 103 s are observed under a low current of 1 nA for future low-power, high-density, nonvolatile, nanoscale memory applications. PMID:24305116
Origin of negative resistance in anion migration controlled resistive memory
NASA Astrophysics Data System (ADS)
Banerjee, Writam; Wu, Facai; Hu, Yuan; Wu, Quantan; Wu, Zuheng; Liu, Qi; Liu, Ming
2018-03-01
Resistive random access memory (RRAM) is one of the most promising emerging nonvolatile technologies for the futuristic memory devices. Resistive switching behavior often shows negative resistance (NR), either voltage controlled or current controlled. In this work, the origin of a current compliance dependent voltage controlled NR effect during the resetting of anion migration based RRAM devices is discussed. The N-type voltage controlled NR is a high field driven phenomena. The current conduction within the range of a certain negative voltage is mostly dominated by space charge limited current. But with the higher negative voltage, a field induced tunneling effect is generated in the NR region. The voltage controlled NR is strongly dependent on the compliance current. The area independent behavior indicates the filamentary switching. The peak to valley ratio (PVR) is > 5. The variation of PVR as a function of the conduction band offset is achieved. Compared to other reported works, based on the PVR, it is possible to distinguish the RRAM types. Generally, due to the higher electric field effect on the metallic bridge during RESET, the electrochemical metallization type RRAM shows much higher PVR than the valance change type RRAM.
Robak, A N
2008-11-01
A new method for the formation of a compression esophagointestinal anastomosis is proposed. The compression force in the new device for creation of compression circular anastomoses is created by means of a titanium nickelide spring with a "shape memory" effect. Experimental study showed good prospects of the new device and the advantages of the anastomosis compression suture formed by means of this device in comparison with manual ligature suturing.
Fabrication of nylon/fullerene polymer memory
NASA Astrophysics Data System (ADS)
Jayan, Manuvel; Davis, Rosemary; Karthik, M. P.; Devika, K.; Kumar, G. Vijay; Sriraj, B.; Predeep, P.
2017-06-01
Two terminal Organic memories in passive matrix array form with device structure, Al/Nylon/ (Nylon+C60)/Nylon/ Al are fabricated. The current-voltage measurements showed hysteresis and the devices are thoroughly characterized for write-read-erase-read cycles. The control over the dispersion concentration, capacity of fullerene to readily accept electrons and the constant diameter of fullerene made possible uniform device fabrication with reproducible results. Scanning electron micrographs indicated that the device thickness remained uniform in the range of 19 micrometers.
A molecular shift register based on electron transfer
NASA Technical Reports Server (NTRS)
Hopfield, J. J.; Onuchic, Josenelson; Beratan, David N.
1988-01-01
An electronic shift-register memory at the molecular level is described. The memory elements are based on a chain of electron-transfer molecules and the information is shifted by photoinduced electron-transfer reactions. This device integrates designed electronic molecules onto a very large scale integrated (silicon microelectronic) substrate, providing an example of a 'molecular electronic device' that could actually be made. The design requirements for such a device and possible synthetic strategies are discussed. Devices along these lines should have lower energy usage and enhanced storage density.
An Automatic Occlusion Device for Remote Control of Tumor Tissue Ischemia
El-Dahdah, Hamid; Wang, Bei; He, Guanglong; Xu, Ronald X.
2015-01-01
We developed an automatic occlusion device for remote control of tumor tissue ischemia. The device consists of a flexible cannula encasing a shape memory alloy wire with its distal end connected to surgical suture. Regional tissue occlusion was tested on both the benchtop and the animal models. In the benchtop test, the occlusion device introduced quantitative and reproducible changes of blood flow in a tissue simulating phantom embedding a vessel simulator. In the animal test, the device generated a cyclic pattern of reversible ischemia in the right hinder leg tissue of a black male C57BL/6 mouse. We also developed a multimodal detector that integrates near infrared spectroscopy and electron paramagnetic resonance spectroscopy for continuous monitoring of tumor tissue oxygenation, blood content, and oxygen tension changes. The multimodal detector was tested on a cancer xenograft nude mouse undergoing reversible tumor ischemia. The automatic occlusion device and the multi-modal detector can be potentially integrated for closed-loop feedback control of tumor tissue ischemia. Such an integrated occlusion device may be used in multiple clinical applications such as regional hypoperfusion control in tumor resection surgeries and thermal ablation processes. In addition, the proposed occlusion device can also be used as a research tool to understand tumor oxygen transport and hemodynamic characteristics. PMID:20082532
MOSFET analog memory circuit achieves long duration signal storage
NASA Technical Reports Server (NTRS)
1966-01-01
Memory circuit maintains the signal voltage at the output of an analog signal amplifier when the input signal is interrupted or removed. The circuit uses MOSFET /Metal Oxide Semiconductor Field Effect Transistor/ devices as voltage-controlled switches, triggered by an external voltage-sensing device.
Ultra-low power, highly uniform polymer memory by inserted multilayer graphene electrode
NASA Astrophysics Data System (ADS)
Jang, Byung Chul; Seong, Hyejeong; Kim, Jong Yun; Koo, Beom Jun; Kim, Sung Kyu; Yang, Sang Yoon; Gap Im, Sung; Choi, Sung-Yool
2015-12-01
Filament type resistive random access memory (RRAM) based on polymer thin films is a promising device for next generation, flexible nonvolatile memory. However, the resistive switching nonuniformity and the high power consumption found in the general filament type RRAM devices present critical issues for practical memory applications. Here, we introduce a novel approach not only to reduce the power consumption but also to improve the resistive switching uniformity in RRAM devices based on poly(1,3,5-trimethyl-3,4,5-trivinyl cyclotrisiloxane) by inserting multilayer graphene (MLG) at the electrode/polymer interface. The resistive switching uniformity was thereby significantly improved, and the power consumption was markedly reduced by 250 times. Furthermore, the inserted MLG film enabled a transition of the resistive switching operation from unipolar resistive switching to bipolar resistive switching and induced self-compliance behavior. The findings of this study can pave the way toward a new area of application for graphene in electronic devices.
Synergistic High Charge-Storage Capacity for Multi-level Flexible Organic Flash Memory
NASA Astrophysics Data System (ADS)
Kang, Minji; Khim, Dongyoon; Park, Won-Tae; Kim, Jihong; Kim, Juhwan; Noh, Yong-Young; Baeg, Kang-Jun; Kim, Dong-Yu
2015-07-01
Electret and organic floating-gate memories are next-generation flash storage mediums for printed organic complementary circuits. While each flash memory can be easily fabricated using solution processes on flexible plastic substrates, promising their potential for on-chip memory organization is limited by unreliable bit operation and high write loads. We here report that new architecture could improve the overall performance of organic memory, and especially meet high storage for multi-level operation. Our concept depends on synergistic effect of electrical characterization in combination with a polymer electret (poly(2-vinyl naphthalene) (PVN)) and metal nanoparticles (Copper). It is distinguished from mostly organic nano-floating-gate memories by using the electret dielectric instead of general tunneling dielectric for additional charge storage. The uniform stacking of organic layers including various dielectrics and poly(3-hexylthiophene) (P3HT) as an organic semiconductor, followed by thin-film coating using orthogonal solvents, greatly improve device precision despite easy and fast manufacture. Poly(vinylidene fluoride-trifluoroethylene) [P(VDF-TrFE)] as high-k blocking dielectric also allows reduction of programming voltage. The reported synergistic organic memory devices represent low power consumption, high cycle endurance, high thermal stability and suitable retention time, compared to electret and organic nano-floating-gate memory devices.
Zhou, Ye; Han, Su-Ting; Xu, Zong-Xiang; Roy, V A L
2013-03-07
The strain and temperature dependent memory effect of organic memory transistors on plastic substrates has been investigated under ambient conditions. The gold (Au) nanoparticle monolayer was prepared and embedded in an atomic layer deposited aluminum oxide (Al(2)O(3)) as the charge trapping layer. The devices exhibited low operation voltage, reliable memory characteristics and long data retention time. Experimental analysis of the programming and erasing behavior at various bending states showed the relationship between strain and charging capacity. Thermal-induced effects on these memory devices have also been analyzed. The mobility shows ~200% rise and the memory window increases from 1.48 V to 1.8 V when the temperature rises from 20 °C to 80 °C due to thermally activated transport. The retention capability of the devices decreases with the increased working temperature. Our findings provide a better understanding of flexible organic memory transistors under various operating temperatures and validate their applications in various areas such as temperature sensors, temperature memory or advanced electronic circuits. Furthermore, the low temperature processing procedures of the key elements (Au nanoparticle monolayer and Al(2)O(3) dielectric layer) could be potentially integrated with large area flexible electronics.
Synergistic High Charge-Storage Capacity for Multi-level Flexible Organic Flash Memory.
Kang, Minji; Khim, Dongyoon; Park, Won-Tae; Kim, Jihong; Kim, Juhwan; Noh, Yong-Young; Baeg, Kang-Jun; Kim, Dong-Yu
2015-07-23
Electret and organic floating-gate memories are next-generation flash storage mediums for printed organic complementary circuits. While each flash memory can be easily fabricated using solution processes on flexible plastic substrates, promising their potential for on-chip memory organization is limited by unreliable bit operation and high write loads. We here report that new architecture could improve the overall performance of organic memory, and especially meet high storage for multi-level operation. Our concept depends on synergistic effect of electrical characterization in combination with a polymer electret (poly(2-vinyl naphthalene) (PVN)) and metal nanoparticles (Copper). It is distinguished from mostly organic nano-floating-gate memories by using the electret dielectric instead of general tunneling dielectric for additional charge storage. The uniform stacking of organic layers including various dielectrics and poly(3-hexylthiophene) (P3HT) as an organic semiconductor, followed by thin-film coating using orthogonal solvents, greatly improve device precision despite easy and fast manufacture. Poly(vinylidene fluoride-trifluoroethylene) [P(VDF-TrFE)] as high-k blocking dielectric also allows reduction of programming voltage. The reported synergistic organic memory devices represent low power consumption, high cycle endurance, high thermal stability and suitable retention time, compared to electret and organic nano-floating-gate memory devices.
Nintendo Wii™ Versus Xbox Kinect™ for Assisting People With Parkinson's Disease.
Alves, Melissa L M; Mesquita, Beatriz S; Morais, Wenderson S; Leal, Josevan C; Satler, Corina E; Dos Santos Mendes, Felipe A
2018-06-01
This study investigated changes in motor and cognitive skills, anxiety levels, and quality of life perception among patients with Parkinson's Disease (PD) following training with different commercial gaming devices-Nintendo Wii™ and Xbox Kinect™. We used a quasi-experimental, simple blinded clinical trial, dividing 27 patients with PD into three equal groups of nine members: (a) Nintendo Wii™, (b) Xbox Kinect™, and (c) control group. After pretests, experimental group participants spent 10 sessions playing four games of the selected gaming device, while control group participants received no intervention. Only those engaged with the Nintendo Wii™ significantly improved their performance on single and dual task gait tests, decreased anxiety levels, and improved memory, attention, and reversibility. The control group showed no changes on any measures.
Using DMA for copying performance counter data to memory
Gara, Alan; Salapura, Valentina; Wisniewski, Robert W.
2012-09-25
A device for copying performance counter data includes hardware path that connects a direct memory access (DMA) unit to a plurality of hardware performance counters and a memory device. Software prepares an injection packet for the DMA unit to perform copying, while the software can perform other tasks. In one aspect, the software that prepares the injection packet runs on a processing core other than the core that gathers the hardware performance counter data.
Using DMA for copying performance counter data to memory
Gara, Alan; Salapura, Valentina; Wisniewski, Robert W
2013-12-31
A device for copying performance counter data includes hardware path that connects a direct memory access (DMA) unit to a plurality of hardware performance counters and a memory device. Software prepares an injection packet for the DMA unit to perform copying, while the software can perform other tasks. In one aspect, the software that prepares the injection packet runs on a processing core other than the core that gathers the hardware performance data.
VOP memory management in MPEG-4
NASA Astrophysics Data System (ADS)
Vaithianathan, Karthikeyan; Panchanathan, Sethuraman
2001-03-01
MPEG-4 is a multimedia standard that requires Video Object Planes (VOPs). Generation of VOPs for any kind of video sequence is still a challenging problem that largely remains unsolved. Nevertheless, if this problem is treated by imposing certain constraints, solutions for specific application domains can be found. MPEG-4 applications in mobile devices is one such domain where the opposite goals namely low power and high throughput are required to be met. Efficient memory management plays a major role in reducing the power consumption. Specifically, efficient memory management for VOPs is difficult because the lifetimes of these objects vary and these life times may be overlapping. Varying life times of the objects requires dynamic memory management where memory fragmentation is a key problem that needs to be addressed. In general, memory management systems address this problem by following a combination of strategy, policy and mechanism. For MPEG4 based mobile devices that lack instruction processors, a hardware based memory management solution is necessary. In MPEG4 based mobile devices that have a RISC processor, using a Real time operating system (RTOS) for this memory management task is not expected to be efficient because the strategies and policies used by the ROTS is often tuned for handling memory segments of smaller sizes compared to object sizes. Hence, a memory management scheme specifically tuned for VOPs is important. In this paper, different strategies, policies and mechanisms for memory management are considered and an efficient combination is proposed for the case of VOP memory management along with a hardware architecture, which can handle the proposed combination.
Indium-oxide nanoparticles for RRAM devices compatible with CMOS back-end-off-line
NASA Astrophysics Data System (ADS)
León Pérez, Edgar A. A.; Guenery, Pierre-Vincent; Abouzaid, Oumaïma; Ayadi, Khaled; Brottet, Solène; Moeyaert, Jérémy; Labau, Sébastien; Baron, Thierry; Blanchard, Nicholas; Baboux, Nicolas; Militaru, Liviu; Souifi, Abdelkader
2018-05-01
We report on the fabrication and characterization of Resistive Random Access Memory (RRAM) devices based on nanoparticles in MIM structures. Our approach is based on the use of indium oxide (In2O3) nanoparticles embedded in a dielectric matrix using CMOS-full-compatible fabrication processes in view of back-end-off-line integration for non-volatile memory (NVM) applications. A bipolar switching behavior has been observed using current-voltage measurements (I-V) for all devices. Very high ION/IOFF ratios have been obtained up to 108. Our results provide insights for further integration of In2O3 nanoparticles-based devices for NVM applications. He is currently a Postdoctoral Researcher in the Institute of Nanotechnologies of Lyon (INL), INSA de Lyon, France, in the Electronics Department. His current research include indium oxide nanoparticles for non-volatile memory applications, and the integrations of these devices in CMOS BEOL.
Filamentary model in resistive switching materials
NASA Astrophysics Data System (ADS)
Jasmin, Alladin C.
2017-12-01
The need for next generation computer devices is increasing as the demand for efficient data processing increases. The amount of data generated every second also increases which requires large data storage devices. Oxide-based memory devices are being studied to explore new research frontiers thanks to modern advances in nanofabrication. Various oxide materials are studied as active layers for non-volatile memory. This technology has potential application in resistive random-access-memory (ReRAM) and can be easily integrated in CMOS technologies. The long term perspective of this research field is to develop devices which mimic how the brain processes information. To realize such application, a thorough understanding of the charge transport and switching mechanism is important. A new perspective in the multistate resistive switching based on current-induced filament dynamics will be discussed. A simple equivalent circuit of the device gives quantitative information about the nature of the conducting filament at different resistance states.
Adaptive microwave impedance memory effect in a ferromagnetic insulator.
Lee, Hanju; Friedman, Barry; Lee, Kiejin
2016-12-14
Adaptive electronics, which are often referred to as memristive systems as they often rely on a memristor (memory resistor), are an emerging technology inspired by adaptive biological systems. Dissipative systems may provide a proper platform to implement an adaptive system due to its inherent adaptive property that parameters describing the system are optimized to maximize the entropy production for a given environment. Here, we report that a non-volatile and reversible adaptive microwave impedance memory device can be realized through the adaptive property of the dissipative structure of the driven ferromagnetic system. Like the memristive device, the microwave impedance of the device is modulated as a function of excitation microwave passing through the device. This kind of new device may not only helpful to implement adaptive information processing technologies, but also may be useful to investigate and understand the underlying mechanism of spontaneous formation of complex and ordered structures.
Adaptive microwave impedance memory effect in a ferromagnetic insulator
Lee, Hanju; Friedman, Barry; Lee, Kiejin
2016-01-01
Adaptive electronics, which are often referred to as memristive systems as they often rely on a memristor (memory resistor), are an emerging technology inspired by adaptive biological systems. Dissipative systems may provide a proper platform to implement an adaptive system due to its inherent adaptive property that parameters describing the system are optimized to maximize the entropy production for a given environment. Here, we report that a non-volatile and reversible adaptive microwave impedance memory device can be realized through the adaptive property of the dissipative structure of the driven ferromagnetic system. Like the memristive device, the microwave impedance of the device is modulated as a function of excitation microwave passing through the device. This kind of new device may not only helpful to implement adaptive information processing technologies, but also may be useful to investigate and understand the underlying mechanism of spontaneous formation of complex and ordered structures. PMID:27966536
A memristor-based nonvolatile latch circuit
NASA Astrophysics Data System (ADS)
Robinett, Warren; Pickett, Matthew; Borghetti, Julien; Xia, Qiangfei; Snider, Gregory S.; Medeiros-Ribeiro, Gilberto; Williams, R. Stanley
2010-06-01
Memristive devices, which exhibit a dynamical conductance state that depends on the excitation history, can be used as nonvolatile memory elements by storing information as different conductance states. We describe the implementation of a nonvolatile synchronous flip-flop circuit that uses a nanoscale memristive device as the nonvolatile memory element. Controlled testing of the circuit demonstrated successful state storage and restoration, with an error rate of 0.1%, during 1000 power loss events. These results indicate that integration of digital logic devices and memristors could open the way for nonvolatile computation with applications in small platforms that rely on intermittent power sources. This demonstrated feasibility of tight integration of memristors with CMOS (complementary metal-oxide-semiconductor) circuitry challenges the traditional memory hierarchy, in which nonvolatile memory is only available as a large, slow, monolithic block at the bottom of the hierarchy. In contrast, the nonvolatile, memristor-based memory cell can be fast, fine-grained and small, and is compatible with conventional CMOS electronics. This threatens to upset the traditional memory hierarchy, and may open up new architectural possibilities beyond it.
NASA Astrophysics Data System (ADS)
Uk Lee, Dong; Jun Lee, Hyo; Kyu Kim, Eun; You, Hee-Wook; Cho, Won-Ju
2012-02-01
A WSi2 nanocrystal nonvolatile memory device was fabricated with an Al2O3/HfO2/Al2O3 (AHA) tunnel layer and its electrical characteristics were evaluated at 25, 50, 70, 100, and 125 °C. The program/erase (P/E) speed at 125 °C was approximately 500 μs under threshold voltage shifts of 1 V during voltage sweeping of 8 V/-8 V. When the applied pulse voltage was ±9 V for 1 s for the P/E conditions, the memory window at 125 °C was approximately 1.25 V after 105 s. The activation energies for the charge losses of 5%, 10%, 15%, 20%, 25%, 30%, and 35% were approximately 0.05, 0.11, 0.17, 0.21, 0.23, 0.23, and 0.23 eV, respectively. The charge loss mechanisms were direct tunneling and Pool-Frenkel emission between the WSi2 nanocrystals and the AHA barrier engineered tunneling layer. The WSi2 nanocrystal memory device with multi-stacked high-K tunnel layers showed strong potential for applications in nonvolatile memory devices.
Some Improvements in Utilization of Flash Memory Devices
NASA Technical Reports Server (NTRS)
Gender, Thomas K.; Chow, James; Ott, William E.
2009-01-01
Two developments improve the utilization of flash memory devices in the face of the following limitations: (1) a flash write element (page) differs in size from a flash erase element (block), (2) a block must be erased before its is rewritten, (3) lifetime of a flash memory is typically limited to about 1,000,000 erases, (4) as many as 2 percent of the blocks of a given device may fail before the expected end of its life, and (5) to ensure reliability of reading and writing, power must not be interrupted during minimum specified reading and writing times. The first development comprises interrelated software components that regulate reading, writing, and erasure operations to minimize migration of data and unevenness in wear; perform erasures during idle times; quickly make erased blocks available for writing; detect and report failed blocks; maintain the overall state of a flash memory to satisfy real-time performance requirements; and detect and initialize a new flash memory device. The second development is a combination of hardware and software that senses the failure of a main power supply and draws power from a capacitive storage circuit designed to hold enough energy to sustain operation until reading or writing is completed.
Design, processing, and testing of lsi arrays for space station
NASA Technical Reports Server (NTRS)
Lile, W. R.; Hollingsworth, R. J.
1972-01-01
The design of a MOS 256-bit Random Access Memory (RAM) is discussed. Technological achievements comprise computer simulations that accurately predict performance; aluminum-gate COS/MOS devices including a 256-bit RAM with current sensing; and a silicon-gate process that is being used in the construction of a 256-bit RAM with voltage sensing. The Si-gate process increases speed by reducing the overlap capacitance between gate and source-drain, thus reducing the crossover capacitance and allowing shorter interconnections. The design of a Si-gate RAM, which is pin-for-pin compatible with an RCA bulk silicon COS/MOS memory (type TA 5974), is discussed in full. The Integrated Circuit Tester (ICT) is limited to dc evaluation, but the diagnostics and data collecting are under computer control. The Silicon-on-Sapphire Memory Evaluator (SOS-ME, previously called SOS Memory Exerciser) measures power supply drain and performs a minimum number of tests to establish operation of the memory devices. The Macrodata MD-100 is a microprogrammable tester which has capabilities of extensive testing at speeds up to 5 MHz. Beam-lead technology was successfully integrated with SOS technology to make a simple device with beam leads. This device and the scribing are discussed.
Spin-transfer torque switched magnetic tunnel junctions in magnetic random access memory
NASA Astrophysics Data System (ADS)
Sun, Jonathan Z.
2016-10-01
Spin-transfer torque (or spin-torque, or STT) based magnetic tunnel junction (MTJ) is at the heart of a new generation of magnetism-based solid-state memory, the so-called spin-transfer-torque magnetic random access memory, or STT-MRAM. Over the past decades, STT-based switchable magnetic tunnel junction has seen progress on many fronts, including the discovery of (001) MgO as the most favored tunnel barrier, which together with (bcc) Fe or FeCo alloy are yielding best demonstrated tunnel magneto-resistance (TMR); the development of perpendicularly magnetized ultrathin CoFeB-type of thin films sufficient to support high density memories with junction sizes demonstrated down to 11nm in diameter; and record-low spin-torque switching threshold current, giving best reported switching efficiency over 5 kBT/μA. Here we review the basic device properties focusing on the perpendicularly magnetized MTJs, both in terms of switching efficiency as measured by sub-threshold, quasi-static methods, and of switching speed at super-threshold, forced switching. We focus on device behaviors important for memory applications that are rooted in fundamental device physics, which highlights the trade-off of device parameters for best suitable system integration.
NASA Technical Reports Server (NTRS)
Honess, Shawn B. (Inventor); Narvaez, Pablo (Inventor); Mcauley, James M. (Inventor)
1992-01-01
An apparatus for characterizing the magnetic field of a device under test is discussed. The apparatus is comprised of five separate devices: (1) a device for nullifying the ambient magnetic fields in a test environment area with a constant applied magnetic field; (2) a device for rotating the device under test in the test environment area; (3) a device for sensing the magnetic field (to obtain a profile of the magnetic field) at a sensor location which is along the circumference of rotation; (4) a memory for storing the profiles; and (5) a processor coupled to the memory for characterizing the magnetic field of the device from the magnetic field profiles thus obtained.
NASA Astrophysics Data System (ADS)
Chen, Kai-Huang; Cheng, Chien-Min; Kao, Ming-Cheng; Chang, Kuan-Chang; Chang, Ting-Chang; Tsai, Tsung-Ming; Wu, Sean; Su, Feng-Yi
2017-04-01
The bipolar switching properties and electrical conduction mechanism of vanadium oxide thin-film resistive random-access memory (RRAM) devices obtained using a rapid thermal annealing (RTA) process have been investigated in high-resistive status/low-resistive status (HRS/LRS) and are discussed herein. In addition, the resistance switching properties and quality improvement of the vanadium oxide thin-film RRAM devices were measured by x-ray diffraction (XRD) analysis, x-ray photoelectron spectrometry (XPS), scanning electron microscopy (SEM), atomic force microscopy (AFM), and current-voltage ( I- V) measurements. The activation energy of the hopping conduction mechanism in the devices was investigated based on Arrhenius plots in HRS and LRS. The hopping conduction distance and activation energy barrier were obtained as 12 nm and 45 meV, respectively. The thermal annealing process is recognized as a candidate method for fabrication of thin-film RRAM devices, being compatible with integrated circuit technology for nonvolatile memory devices.
3D gate-all-around bandgap-engineered SONOS flash memory in vertical silicon pillar with metal gate
NASA Astrophysics Data System (ADS)
Oh, Jae-Sub; Yang, Seong-Dong; Lee, Sang-Youl; Kim, Young-Su; Kang, Min-Ho; Lim, Sung-Kyu; Lee, Hi-Deok; Lee, Ga-Won
2013-08-01
In this paper, a gate-all-around bandgap-engineered silicon-oxide-nitride-oxide-silicon device with a vertical silicon pillar structure and a Ti metal gate are demonstrated for a potential solution to overcome the scaling-down of flash memory device. The devices were fabricated using CMOS-compatible technology and exhibited well-behaved memory characteristics in terms of the program/erase window, retention, and endurance properties. Moreover, the integration of the Ti metal gate demonstrated a significant improvement in the erase characteristics due to the efficient suppression of the electron back tunneling through the blocking oxide.
NASA Astrophysics Data System (ADS)
Nayak, Pradipta K.; Caraveo-Frescas, J. A.; Bhansali, Unnat. S.; Alshareef, H. N.
2012-06-01
High performance homo-junction field-effect transistor memory devices were prepared using solution processed transparent lithium-doped zinc oxide thin films for both the ferroelectric and semiconducting active layers. A highest field-effect mobility of 8.7 cm2/Vs was obtained along with an Ion/Ioff ratio of 106. The ferroelectric thin film transistors showed a low sub-threshold swing value of 0.19 V/dec and a significantly reduced device operating voltage (±4 V) compared to the reported hetero-junction ferroelectric transistors, which is very promising for low-power non-volatile memory applications.
NASA Astrophysics Data System (ADS)
Efron, Uzi
Recent advances in the technology and applications of spatial light modulators (SLMs) are discussed in review essays by leading experts. Topics addressed include materials for SLMs, SLM devices and device technology, applications to optical data processing, and applications to artificial neural networks. Particular attention is given to nonlinear optical polymers, liquid crystals, magnetooptic SLMs, multiple-quantum-well SLMs, deformable-mirror SLMs, three-dimensional optical memories, applications of photorefractive devices to optical computing, photonic neurocomputers and learning machines, holographic associative memories, SLMs as parallel memories for optoelectronic neural networks, and coherent-optics implementations of neural-network models.
NASA Technical Reports Server (NTRS)
Efron, Uzi (Editor)
1990-01-01
Recent advances in the technology and applications of spatial light modulators (SLMs) are discussed in review essays by leading experts. Topics addressed include materials for SLMs, SLM devices and device technology, applications to optical data processing, and applications to artificial neural networks. Particular attention is given to nonlinear optical polymers, liquid crystals, magnetooptic SLMs, multiple-quantum-well SLMs, deformable-mirror SLMs, three-dimensional optical memories, applications of photorefractive devices to optical computing, photonic neurocomputers and learning machines, holographic associative memories, SLMs as parallel memories for optoelectronic neural networks, and coherent-optics implementations of neural-network models.
Characterization of memory and measurement history in photoconductivity of nanocrystal arrays
NASA Astrophysics Data System (ADS)
Fairfield, Jessamyn A.; Dadosh, Tali; Drndic, Marija
2010-10-01
Photoconductivity in nanocrystal films has been previously characterized, but memory effects have received little attention despite their importance for device applications. We show that the magnitude and temperature dependence of the photocurrent in CdSe/ZnS core-shell nanocrystal arrays depends on the illumination and electric field history. Changes in photoconductivity occur on a few-hour timescale, and subband gap illumination of nanocrystals prior to measurements modifies the photocurrent more than band gap illumination. The observed effects can be explained by charge traps within the band gap that are filled or emptied, which may alter nonradiative recombination processes and affect photocurrent.
New trends in logic synthesis for both digital designing and data processing
NASA Astrophysics Data System (ADS)
Borowik, Grzegorz; Łuba, Tadeusz; Poźniak, Krzysztof
2016-09-01
FPGA devices are equipped with memory-based structures. These memories act as very large logic cells where the number of inputs equals the number of address lines. At the same time, there is a huge demand in the market of Internet of Things for devices implementing virtual routers, intrusion detection systems, etc.; where such memories are crucial for realizing pattern matching circuits, IP address tables, and other. Unfortunately, existing CAD tools are not well suited to utilize capabilities that such large memory blocks offer due to the lack of appropriate synthesis procedures. This paper presents methods which are useful for memory-based implementations: minimization of the number of input variables and functional decomposition.
NASA Astrophysics Data System (ADS)
Wei, Hongqiu; Zhang, Qiwei; Yao, Yongtao; Liu, Liwu; Liu, Yanju; Leng, Jinsong
2017-04-01
Shape memory polymers (SMPs), a typical class of smart materials, have been witnessed significant advances in the past decades. Based on the unique performance to recover the initial shape after going through a shape deformation, the applications of SMPs have aroused growing interests. However, most of the researches are hindered by traditional processing technologies which limit the design space of SMPs-based structures. Three-dimension (3D) printing as an emerging technology endows design freedom to manufacture materials with complex structures. In present article, we show that by employing direct-write printing method; one can realize the printing of SMPs to achieve 4D active shape-changing structures. We first fabricated a kind of 3D printable polylactide (PLA)-based SMPs and characterized the overall properties of such materials. Results demonstrated the prepared PLA-based SMPs presenting excellent shape memory effect. In what follows, the rheological properties of such PLA-based SMP ink during printing process were discussed in detail. Finally, we designed and printed several 3D configurations for investigation. By combining 3D printing with shape memory behavior, these printed structures achieve 4D active shape-changing performance under heat stimuli. This research presents a high flexible method to realize the fabrication of SMP-based 4D active shape-changing structures, which opens the way for further developments and improvements of high-tech fields like 4D printing, soft robotics, micro-systems and biomedical devices.
Reconfigurable Fault Tolerance for FPGAs
NASA Technical Reports Server (NTRS)
Shuler, Robert, Jr.
2010-01-01
The invention allows a field-programmable gate array (FPGA) or similar device to be efficiently reconfigured in whole or in part to provide higher capacity, non-redundant operation. The redundant device consists of functional units such as adders or multipliers, configuration memory for the functional units, a programmable routing method, configuration memory for the routing method, and various other features such as block RAM, I/O (random access memory, input/output) capability, dedicated carry logic, etc. The redundant device has three identical sets of functional units and routing resources and majority voters that correct errors. The configuration memory may or may not be redundant, depending on need. For example, SRAM-based FPGAs will need some type of radiation-tolerant configuration memory, or they will need triple-redundant configuration memory. Flash or anti-fuse devices will generally not need redundant configuration memory. Some means of loading and verifying the configuration memory is also required. These are all components of the pre-existing redundant FPGA. This innovation modifies the voter to accept a MODE input, which specifies whether ordinary voting is to occur, or if redundancy is to be split. Generally, additional routing resources will also be required to pass data between sections of the device created by splitting the redundancy. In redundancy mode, the voters produce an output corresponding to the two inputs that agree, in the usual fashion. In the split mode, the voters select just one input and convey this to the output, ignoring the other inputs. In a dual-redundant system (as opposed to triple-redundant), instead of a voter, there is some means to latch or gate a state update only when both inputs agree. In this case, the invention would require modification of the latch or gate so that it would operate normally in redundant mode, and would separately latch or gate the inputs in non-redundant mode.
Recent trends in hardware security exploiting hybrid CMOS-resistive memory circuits
NASA Astrophysics Data System (ADS)
Sahay, Shubham; Suri, Manan
2017-12-01
This paper provides a comprehensive review and insight of recent trends in the field of random number generator (RNG) and physically unclonable function (PUF) circuits implemented using different types of emerging resistive non-volatile (NVM) memory devices. We present a detailed review of hybrid RNG/PUF implementations based on the use of (i) Spin-Transfer Torque (STT-MRAM), and (ii) metal-oxide based (OxRAM), NVM devices. Various approaches on Hybrid CMOS-NVM RNG/PUF circuits are considered, followed by a discussion on different nanoscale device phenomena. Certain nanoscale device phenomena (variability/stochasticity etc), which are otherwise undesirable for reliable memory and storage applications, form the basis for low power and highly scalable RNG/PUF circuits. Detailed qualitative comparison and benchmarking of all implementations is performed.
Analysis of a digital RF memory in a signal-delay application
DOE Office of Scientific and Technical Information (OSTI.GOV)
Jelinek, D.A.
1992-03-01
Laboratory simulation of the approach of a radar fuze towards a target is an important factor in our ability to accurately measure the radar`s performance. This simulation is achieved, in part, by dynamically delaying and attenuating the radar`s transmitted pulse and sending the result back to the radar`s receiver. Historically, the device used to perform the dynamic delay has been a limiting factor in the evaluation of a radar`s performance and characteristics. A new device has been proposed that appears to have more capability than previous dynamic delay devices. This device is the digital RF memory. This report presents themore » results of an analysis of a digital RF memory used in a signal-delay application. 2 refs.« less
Nonvolatile Ionic Two-Terminal Memory Device
NASA Technical Reports Server (NTRS)
Williams, Roger M.
1990-01-01
Conceptual solid-state memory device nonvolatile and erasable and has only two terminals. Proposed device based on two effects: thermal phase transition and reversible intercalation of ions. Transfer of sodium ions between source of ions and electrical switching element increases or decreases electrical conductance of element, turning switch "on" or "off". Used in digital computers and neural-network computers. In neural networks, many small, densely packed switches function as erasable, nonvolatile synaptic elements.
Sun, Yanmei; Lu, Junguo; Ai, Chunpeng; Wen, Dianzhong; Bai, Xuduo
2016-11-09
Memory devices based on composites of polystyrene (PS) and [6,6]-phenyl-C 61 -butyric acid methyl ester (PCBM) were investigated with bistable resistive switching behavior. Current-voltage (I-V) curves for indium-tin-oxide (ITO)/PS + PCBM/Al devices with 33 wt% PCBM showed non-volatile, rewritable, flash memory properties with a maximum ON/OFF current ratio of 1 × 10 4 , which was 100 times larger than the ON/OFF ratio of the device with 5 wt% PCBM. For ITO/PS + PCBM/Al devices with 33 wt% PCBM, the write-read-erase-read test cycles demonstrated the bistable devices with ON and OFF states at the same voltage. The programmable ON and OFF states endured up to 10 4 read pulses and possessed a retention time of over 10 5 s, indicative of the memory stability of the device. In the OFF state, the I-V curve at lower voltages up to 0.45 V was attributed to the thermionic emission mechanism, and the I-V characteristics in the applied voltage above 0.5 V dominantly followed the space-charge-limited-current behaviors. In the ON state, the curve in the applied voltage range was related to an Ohmic mechanism.
Anatomy of filamentary threshold switching in amorphous niobium oxide.
Li, Shuai; Liu, Xinjun; Nandi, Sanjoy Kumar; Elliman, Robert Glen
2018-06-25
The threshold switching behaviour of Pt/NbOx/TiN devices is investigated as a function device area and NbOx film thickness and shown to reveal important insight into the structure of the self-assembled switching region. The devices exhibit combined selector-memory (1S1R) behavior after an initial voltage-controlled forming process, but exhibit symmetric threshold switching when the RESET and SET currents are kept below a critical value. In this mode, the threshold and hold voltages are independent of the device area and film thickness but the threshold current (power), while independent of device area, decreases with increasing film thickness. These results are shown to be consistent with a structure in which the threshold switching volume is confined, both laterally and vertically, to the region between the residual memory filament and the TiN electrode, and where the memory filament has a core-shell structure comprising a metallic core and a semiconducting shell. The veracity of this structure is demonstrated by comparing experimental results with the predictions of a simple circuit model, and more detailed finite element simulations. These results provide further insight into the structure and operation of NbOx threshold switching devices that have application in emerging memory and neuromorphic computing fields. © 2018 IOP Publishing Ltd.
A Look Inside Argonne's Center for Nanoscale Materials
Divan, Ralu; Rosenthal, Dan; Rose, Volker; Wai Hla
2018-05-23
At a very small, or "nano" scale, materials behave differently. The study of nanomaterials is much more than miniaturization - scientists are discovering how changes in size change a material's properties. From sunscreen to computer memory, the applications of nanoscale materials research are all around us. Researchers at Argonne's Center for Nanoscale Materials are creating new materials, methods and technologies to address some of the world's greatest challenges in energy security, lightweight but durable materials, high-efficiency lighting, information storage, environmental stewardship and advanced medical devices.
Scalable printed electronics: an organic decoder addressing ferroelectric non-volatile memory
Ng, Tse Nga; Schwartz, David E.; Lavery, Leah L.; Whiting, Gregory L.; Russo, Beverly; Krusor, Brent; Veres, Janos; Bröms, Per; Herlogsson, Lars; Alam, Naveed; Hagel, Olle; Nilsson, Jakob; Karlsson, Christer
2012-01-01
Scalable circuits of organic logic and memory are realized using all-additive printing processes. A 3-bit organic complementary decoder is fabricated and used to read and write non-volatile, rewritable ferroelectric memory. The decoder-memory array is patterned by inkjet and gravure printing on flexible plastics. Simulation models for the organic transistors are developed, enabling circuit designs tolerant of the variations in printed devices. We explain the key design rules in fabrication of complex printed circuits and elucidate the performance requirements of materials and devices for reliable organic digital logic. PMID:22900143
Programmable Analog Memory Resistors For Electronic Neural Networks
NASA Technical Reports Server (NTRS)
Ramesham, Rajeshuni; Thakoor, Sarita; Daud, Taher; Thakoor, Anilkumar P.
1990-01-01
Electrical resistance of new solid-state device altered repeatedly by suitable control signals, yet remains at steady value when control signal removed. Resistance set at low value ("on" state), high value ("off" state), or at any convenient intermediate value and left there until new value desired. Circuits of this type particularly useful in nonvolatile, associative electronic memories based on models of neural networks. Such programmable analog memory resistors ideally suited as synaptic interconnects in "self-learning" neural nets. Operation of device depends on electrochromic property of WO3, which when pure is insulator. Potential uses include nonvolatile, erasable, electronically programmable read-only memories.
Resistively heated shape memory polymer device
Marion, III, John E.; Bearinger, Jane P.; Wilson, Thomas S.; Maitland, Duncan J.
2017-09-05
A resistively heated shape memory polymer device is made by providing a rod, sheet or substrate that includes a resistive medium. The rod, sheet or substrate is coated with a first shape memory polymer providing a coated intermediate unit. The coated intermediate unit is in turn coated with a conductive material providing a second intermediate unit. The second coated intermediate unit is in turn coated with an outer shape memory polymer. The rod, sheet or substrate is exposed and an electrical lead is attached to the rod, sheet or substrate. The conductive material is exposed and an electrical lead is attached to the conductive material.
Resistively heated shape memory polymer device
Marion, III, John E.; Bearinger, Jane P.; Wilson, Thomas S.; Maitland, Duncan J.
2016-10-25
A resistively heated shape memory polymer device is made by providing a rod, sheet or substrate that includes a resistive medium. The rod, sheet or substrate is coated with a first shape memory polymer providing a coated intermediate unit. The coated intermediate unit is in turn coated with a conductive material providing a second intermediate unit. The second coated intermediate unit is in turn coated with an outer shape memory polymer. The rod, sheet or substrate is exposed and an electrical lead is attached to the rod, sheet or substrate. The conductive material is exposed and an electrical lead is attached to the conductive material.
Yuan, Weihong; Dudley, Jonathan; Barber Foss, Kim D; Ellis, Jonathan D; Thomas, Staci; Galloway, Ryan T; DiCesare, Christopher A; Leach, James L; Adams, Janet; Maloney, Thomas; Gadd, Brooke; Smith, David; Epstein, Jeff N; Grooms, Dustin R; Logan, Kelsey; Howell, David R; Altaye, Mekibib; Myer, Gregory D
2018-06-01
Recent neuroimaging studies have suggested that repetitive subconcussive head impacts, even after only one sport season, may lead to pre- to post-season structural and functional alterations in male high school football athletes. However, data on female athletes are limited. In the current investigation, we aimed to (1) assess the longitudinal pre- to post-season changes in functional MRI (fMRI) of working memory and working memory performance, (2) quantify the association between the pre- to post-season change in fMRI of working memory and the exposure to head impact and working memory performance, and (3) assess whether wearing a neck collar designed to reduce intracranial slosh via mild compression of the jugular veins can ameliorate the changes in fMRI brain activation observed in the female high school athletes who did not wear collars after a full soccer season. A total of 48 female high school soccer athletes (age range: 14.00-17.97 years) were included in the study. These athletes were assigned to the non-collar group (n = 21) or to the collar group (n = 27). All athletes undewent MRI at both pre-season and post-season. In each session, a fMRI verbal N-Back task was used to engage working memory. A significant pre- to post-season increase in fMRI blood oxygen level dependent (BOLD) signal was demonstrated when performing the N-back working memory task in the non-collar group but not in the collar group, despite the comparable exposure to head impacts during the season between the two groups. The collar group demonstrated significantly smaller pre- to post-season change in fMRI BOLD signal than the non-collar group, suggesting a potential protective effect from the collar device. Significant correlations were also found between the pre- to post-season increase in fMRI brain activation and the decrease in task accuracy in the non-collar group, indicating an association between the compensatory mechanism in underlying neurophysiology and the alteration in the behavioral outcomes.
Varghese, Rini; Majumdar, Anuradha; Kumar, Girish; Shukla, Amit
2018-03-01
In recent years there has been a tremendous increase in use of Wi-Fi devices along with mobile phones, globally. Wi-Fi devices make use of 2.4GHz frequency. The present study evaluated the impact of 2.45GHz radiation exposure for 4h/day for 45days on behavioral and oxidative stress parameters in female Sprague Dawley rats. Behavioral tests of anxiety, learning and memory were started from day 38. Oxidative stress parameters were estimated in brain homogenates after sacrificing the rats on day 45. In morris water maze, elevated plus maze and light dark box test, the 2.45GHz radiation exposed rats elicited memory decline and anxiety behavior. Exposure decreased activities of super oxide dismutase, catalase and reduced glutathione levels whereas increased levels of brain lipid peroxidation was encountered in the radiation exposed rats, showing compromised anti-oxidant defense. Expression of caspase 3 gene in brain samples were quantified which unraveled notable increase in the apoptotic marker caspase 3 in 2.45GHz radiation exposed group as compared to sham exposed group. No significant changes were observed in histopathological examinations and brain levels of TNF-α. Analysis of dendritic arborization of neurons showcased reduction in number of dendritic branching and intersections which corresponds to alteration in dendritic structure of neurons, affecting neuronal signaling. The study clearly indicates that exposure of rats to microwave radiation of 2.45GHz leads to detrimental changes in brain leading to lowering of learning and memory and expression of anxiety behavior in rats along with fall in brain antioxidant enzyme systems. Copyright © 2017 Elsevier B.V. All rights reserved.
Evaluation of 1.5-T Cell Flash Memory Total Ionizing Dose Response
NASA Astrophysics Data System (ADS)
Clark, Lawrence T.; Holbert, Keith E.; Adams, James W.; Navale, Harshad; Anderson, Blake C.
2015-12-01
Flash memory is an essential part of systems used in harsh environments, experienced by both terrestrial and aerospace TID applications. This paper presents studies of COTS flash memory TID hardness. While there is substantial literature on flash memory TID response, this work focuses for the first time on 1.5 transistor per cell flash memory. The experimental results show hardness varying from about 100 krad(Si) to over 250 krad(Si) depending on the usage model. We explore the circuit and device aspects of the results, based on the extensive reliability literature for this flash memory type. Failure modes indicate both device damage and circuit marginalities. Sector erase failure limits, but read only operation allows TID exceeding 200 krad(Si). The failures are analyzed by type.
Yoon, Doe Hyun; Muralimanohar, Naveen; Chang, Jichuan; Ranganthan, Parthasarathy
2017-09-26
A disclosed example method involves performing simultaneous data accesses on at least first and second independently selectable logical sub-ranks to access first data via a wide internal data bus in a memory device. The memory device includes a translation buffer chip, memory chips in independently selectable logical sub-ranks, a narrow external data bus to connect the translation buffer chip to a memory controller, and the wide internal data bus between the translation buffer chip and the memory chips. A data access is performed on only the first independently selectable logical sub-rank to access second data via the wide internal data bus. The example method also involves locating a first portion of the first data, a second portion of the first data, and the second data on the narrow external data bus during separate data transfers.
NASA Astrophysics Data System (ADS)
Yang, Rui; Terabe, Kazuya; Yao, Yiping; Tsuruoka, Tohru; Hasegawa, Tsuyoshi; Gimzewski, James K.; Aono, Masakazu
2013-09-01
A compact neuromorphic nanodevice with inherent learning and memory properties emulating those of biological synapses is the key to developing artificial neural networks rivaling their biological counterparts. Experimental results showed that memorization with a wide time scale from volatile to permanent can be achieved in a WO3-x-based nanoionics device and can be precisely and cumulatively controlled by adjusting the device’s resistance state and input pulse parameters such as the amplitude, interval, and number. This control is analogous to biological synaptic plasticity including short-term plasticity, long-term potentiation, transition from short-term memory to long-term memory, forgetting processes for short- and long-term memory, learning speed, and learning history. A compact WO3-x-based nanoionics device with a simple stacked layer structure should thus be a promising candidate for use as an inorganic synapse in artificial neural networks due to its striking resemblance to the biological synapse.
NASA Astrophysics Data System (ADS)
Shukla, Krishna Dayal; Saxena, Nishant; Durai, Suresh; Manivannan, Anbarasu
2016-11-01
Although phase-change memory (PCM) offers promising features for a ‘universal memory’ owing to high-speed and non-volatility, achieving fast electrical switching remains a key challenge. In this work, a correlation between the rate of applied voltage and the dynamics of threshold-switching is investigated at picosecond-timescale. A distinct characteristic feature of enabling a rapid threshold-switching at a critical voltage known as the threshold voltage as validated by an instantaneous response of steep current rise from an amorphous off to on state is achieved within 250 picoseconds and this is followed by a slower current rise leading to crystallization. Also, we demonstrate that the extraordinary nature of threshold-switching dynamics in AgInSbTe cells is independent to the rate of applied voltage unlike other chalcogenide-based phase change materials exhibiting the voltage dependent transient switching characteristics. Furthermore, numerical solutions of time-dependent conduction process validate the experimental results, which reveal the electronic nature of threshold-switching. These findings of steep threshold-switching of ‘sub-50 ps delay time’, opens up a new way for achieving high-speed non-volatile memory for mainstream computing.
Design and Verification of a Shape Memory Polymer Peripheral Occlusion Device
Landsman, Todd L.; Bush, Ruth L.; Glowczwski, Alan; Horn, John; Jessen, Staci L.; Ungchusri, Ethan; Diguette, Katelin; Smith, Harrison R.; Hasan, Sayyeda M.; Nash, Daniel; Clubb, Fred J.; Maitland, Duncan J.
2017-01-01
Shape memory polymer foams have been previously investigated for their safety and efficacy in treating a porcine aneurysm model. Their biocompatibility, rapid thrombus formation, and ability for endovascular catheter-based delivery to a variety of vascular beds makes these foams ideal candidates for use in numerous embolic applications, particularly within the peripheral vasculature. This study sought to investigate the material properties, safety, and efficacy of a shape memory polymer peripheral embolization device in vitro. The material characteristics of the device were analyzed to show tunability of the glass transition temperature (Tg) and the expansion rate of the polymer to ensure adequate time to deliver the device through a catheter prior to excessive foam expansion. Mechanical analysis and flow migration studies were performed to ensure minimal risk of vessel perforation and undesired thromboembolism upon device deployment. The efficacy of the device was verified by performing blood flow studies that established affinity for thrombus formation and blood penetration throughout the foam and by delivery of the device in an ultrasound phantom that demonstrated flow stagnation and diversion of flow to collateral pathways. PMID:27419615
Lee, Chanwoo; Kim, Inpyo; Choi, Wonsup; Shin, Hyunjung; Cho, Jinhan
2009-04-21
We describe a novel and versatile approach for preparing resistive switching memory devices based on binary transition metal oxides (TMOs). Titanium isopropoxide (TIPP) was spin-coated onto platinum (Pt)-coated silicon substrates using a sol-gel process. The sol-gel-derived layer was converted into a TiO2 film by thermal annealing. A top electrode (Ag electrode) was then coated onto the TiO2 films to complete device fabrication. When an external bias was applied to the devices, a switching phenomenon independent of the voltage polarity (i.e., unipolar switching) was observed at low operating voltages (about 0.6 VRESET and 1.4 VSET). In addition, it was confirmed that the electrical properties (i.e., retention time, cycling test and switching speed) of the sol-gel-derived devices were comparable to those of vacuum deposited devices. This approach can be extended to a variety of binary TMOs such as niobium oxides. The reported approach offers new opportunities for preparing the binary TMO-based resistive switching memory devices allowing a facile solution processing.
Design and verification of a shape memory polymer peripheral occlusion device.
Landsman, Todd L; Bush, Ruth L; Glowczwski, Alan; Horn, John; Jessen, Staci L; Ungchusri, Ethan; Diguette, Katelin; Smith, Harrison R; Hasan, Sayyeda M; Nash, Daniel; Clubb, Fred J; Maitland, Duncan J
2016-10-01
Shape memory polymer foams have been previously investigated for their safety and efficacy in treating a porcine aneurysm model. Their biocompatibility, rapid thrombus formation, and ability for endovascular catheter-based delivery to a variety of vascular beds makes these foams ideal candidates for use in numerous embolic applications, particularly within the peripheral vasculature. This study sought to investigate the material properties, safety, and efficacy of a shape memory polymer peripheral embolization device in vitro. The material characteristics of the device were analyzed to show tunability of the glass transition temperature (Tg) and the expansion rate of the polymer to ensure adequate time to deliver the device through a catheter prior to excessive foam expansion. Mechanical analysis and flow migration studies were performed to ensure minimal risk of vessel perforation and undesired thromboembolism upon device deployment. The efficacy of the device was verified by performing blood flow studies that established affinity for thrombus formation and blood penetration throughout the foam and by delivery of the device in an ultrasound phantom that demonstrated flow stagnation and diversion of flow to collateral pathways. Copyright © 2016 Elsevier Ltd. All rights reserved.
Resistive switching characteristics of HfO2-based memory devices on flexible plastics.
Han, Yong; Cho, Kyoungah; Park, Sukhyung; Kim, Sangsig
2014-11-01
In this study, we examine the characteristics of HfO2-based resistive switching random access memory (ReRAM) devices on flexible plastics. The Pt/HfO2/Au ReRAM devices exhibit the unipolar resistive switching behaviors caused by the conducting filaments. From the Auger depth profiles of the HfO2 thin film, it is confirmed that the relatively lower oxygen content in the interface of the bottom electrode is responsible for the resistive switching by oxygen vacancies. And the unipolar resistive switching behaviors are analyzed from the C-V characteristics in which negative and positive capacitances are measured in the low-resistance state and the high-resistance state, respectively. The devices have a high on/off ratio of 10(4) and the excellent retention properties even after a continuous bending test of two thousand cycles. The correlation between the device size and the memory characteristics is investigated as well. A relatively smaller-sized device having a higher on/off ratio operates at a higher voltage than a relatively larger-sized device.
Spintronic Nanodevices for Bioinspired Computing
Grollier, Julie; Querlioz, Damien; Stiles, Mark D.
2016-01-01
Bioinspired hardware holds the promise of low-energy, intelligent, and highly adaptable computing systems. Applications span from automatic classification for big data management, through unmanned vehicle control, to control for biomedical prosthesis. However, one of the major challenges of fabricating bioinspired hardware is building ultra-high-density networks out of complex processing units interlinked by tunable connections. Nanometer-scale devices exploiting spin electronics (or spintronics) can be a key technology in this context. In particular, magnetic tunnel junctions (MTJs) are well suited for this purpose because of their multiple tunable functionalities. One such functionality, non-volatile memory, can provide massive embedded memory in unconventional circuits, thus escaping the von-Neumann bottleneck arising when memory and processors are located separately. Other features of spintronic devices that could be beneficial for bioinspired computing include tunable fast nonlinear dynamics, controlled stochasticity, and the ability of single devices to change functions in different operating conditions. Large networks of interacting spintronic nanodevices can have their interactions tuned to induce complex dynamics such as synchronization, chaos, soliton diffusion, phase transitions, criticality, and convergence to multiple metastable states. A number of groups have recently proposed bioinspired architectures that include one or several types of spintronic nanodevices. In this paper, we show how spintronics can be used for bioinspired computing. We review the different approaches that have been proposed, the recent advances in this direction, and the challenges toward fully integrated spintronics complementary metal–oxide–semiconductor (CMOS) bioinspired hardware. PMID:27881881
Scoliosis correction with shape-memory metal: results of an experimental study.
Wever, D J; Elstrodt, J A; Veldhuizen, A G; v Horn, J R
2002-04-01
The biocompatibility and functionality of a new scoliosis correction device, based on the properties of the shape-memory metal nickel-titanium alloy, were studied. With this device, the shape recovery forces of a shape-memory metal rod are used to achieve a gradual three-dimensional scoliosis correction. In the experimental study the action of the new device was inverted: the device was used to induce a scoliotic curve instead of correcting one. Surgical procedures were performed in six pigs. An originally curved squared rod, in the cold condition, was straightened and fixed to the spine with pedicle screws. Peroperatively, the memory effect of the rod was activated by heating the rod to 50 degrees C by a low-voltage, high-frequency current. After 3 and after 6 months the animals were sacrificed. The first radiographs, obtained immediately after surgery, showed in all animals an induced curve of about 40 degrees Cobb angle - the original curve of the rod. This curve remained constant during the follow-up. The postoperative serum nickel measurements were around the detection limit, and were not significantly higher compared to the preoperative nickel concentration. Macroscopic inspection after 3 and 6 months showed that the device was almost overgrown with newly formed bone. Corrosion and fretting processes were not observed. Histologic examination of the sections of the surrounding tissues and sections of the lung, liver, spleen and kidney showed no evidence of a foreign body response. In view of the initiation of the scoliotic deformation, it is expected that the shape-memory metal based scoliosis correction device also has the capacity to correct a scoliotic curve. Moreover, it is expected that the new device will show good biocompatibility in clinical application. Extensive fatigue testing of the whole system should be performed before clinical trials are initiated.
CMOS-compatible spintronic devices: a review
NASA Astrophysics Data System (ADS)
Makarov, Alexander; Windbacher, Thomas; Sverdlov, Viktor; Selberherr, Siegfried
2016-11-01
For many decades CMOS devices have been successfully scaled down to achieve higher speed and increased performance of integrated circuits at lower cost. Today’s charge-based CMOS electronics encounters two major challenges: power dissipation and variability. Spintronics is a rapidly evolving research and development field, which offers a potential solution to these issues by introducing novel ‘more than Moore’ devices. Spin-based magnetoresistive random-access memory (MRAM) is already recognized as one of the most promising candidates for future universal memory. Magnetic tunnel junctions, the main elements of MRAM cells, can also be used to build logic-in-memory circuits with non-volatile storage elements on top of CMOS logic circuits, as well as versatile compact on-chip oscillators with low power consumption. We give an overview of CMOS-compatible spintronics applications. First, we present a brief introduction to the physical background considering such effects as magnetoresistance, spin-transfer torque (STT), spin Hall effect, and magnetoelectric effects. We continue with a comprehensive review of the state-of-the-art spintronic devices for memory applications (STT-MRAM, domain wall-motion MRAM, and spin-orbit torque MRAM), oscillators (spin torque oscillators and spin Hall nano-oscillators), logic (logic-in-memory, all-spin logic, and buffered magnetic logic gate grid), sensors, and random number generators. Devices with different types of resistivity switching are analyzed and compared, with their advantages highlighted and challenges revealed. CMOS-compatible spintronic devices are demonstrated beginning with predictive simulations, proceeding to their experimental confirmation and realization, and finalized by the current status of application in modern integrated systems and circuits. We conclude the review with an outlook, where we share our vision on the future applications of the prospective devices in the area.
Design and Implementation of an MC68020-Based Educational Computer Board
1989-12-01
device and the other for a Macintosh personal computer. A stored program can be installed in 8K bytes Programmable Read Only Memory (PROM) to initialize...MHz. It includes four * Static Random Access Memory (SRAM) chips which provide a storage of 32K bytes. Two Programmable Array Logic (PAL) chips...device and the other for a Macintosh personal computer. A stored program can be installed in 8K bytes Programmable Read Only Memory (PROM) to
NASA Astrophysics Data System (ADS)
Alotaibi, Sattam; Nama Manjunatha, Krishna; Paul, Shashi
2017-12-01
Flexible Semi-Transparent electronic memory would be useful in coming years for integrated flexible transparent electronic devices. However, attaining such flexibility and semi-transparency leads to the boundaries in material composition. Thus, impeding processing speed and device performance. In this work, we present the use of inorganic stable selenium nanoparticles (Se-NPs) as a storage element and hydrogenated amorphous carbon (a-C:H) as an insulating layer in two terminal non-volatile physically flexible and semi-transparent capacitive memory devices (2T-NMDs). Furthermore, a-C:H films can be deposited at very low temperature (<40° C) on a variety of substrates (including many kinds of plastic substrates) by an industrial technique called Plasma Enhanced Chemical Vapour Deposition (PECVD) which is available in many existing fabrication labs. Self-assembled Se-NPs has several unique features including deposition at room temperature by simple vacuum thermal evaporation process without the need for further optimisation. This facilitates the fabrication of memory on a flexible substrate. Moreover, the memory behaviour of the Se-NPs was found to be more distinct than those of the semiconductor and metal nanostructures due to higher work function compared to the commonly used semiconductor and metal species. The memory behaviour was observed from the hysteresis of current-voltage (I-V) measurements while the two distinguishable electrical conductivity states (;0; and "1") were studied by current-time (I-t) measurements.
Ultralow Power Consumption Flexible Biomemristors.
Kim, Min-Kyu; Lee, Jang-Sik
2018-03-28
Low power consumption is the important requirement in memory devices for saving energy. In particular, improved energy efficiency is essential in implantable electronic devices for operation under a limited power supply. Here, we demonstrate the use of κ-carrageenan (κ-car) as the resistive switching layer to achieve memory that has low power consumption. A carboxymethyl (CM) group is introduced to the κ-car to increase its ionic conductivity. Ag was doped in CM:κ-car to improve the resistive switching properties of the devices. Memory devices based on Ag-doped CM:κ-car showed electroforming-free resistive switching. This device exhibited low reset voltage (∼0.05 V), fast switching speed (50 ns), and high on/off ratio (>10 3 ) under low compliance current (10 -5 A). Its power consumption (∼0.35 μW) is much lower than those of the previously reported biomemristors. The resistive switching may be a result of an electrochemical redox process and Ag filament formation in the CM:κ-car under an electric field. This biopolymer memory can also be fabricated on flexible substrate. This study verifies the feasibility of using biopolymers for applications to future implantable and biocompatible nanoelectronics.
A polymer/semiconductor write-once read-many-times memory
NASA Astrophysics Data System (ADS)
Möller, Sven; Perlov, Craig; Jackson, Warren; Taussig, Carl; Forrest, Stephen R.
2003-11-01
Organic devices promise to revolutionize the extent of, and access to, electronics by providing extremely inexpensive, lightweight and capable ubiquitous components that are printed onto plastic, glass or metal foils. One key component of an electronic circuit that has thus far received surprisingly little attention is an organic electronic memory. Here we report an architecture for a write-once read-many-times (WORM) memory, based on the hybrid integration of an electrochromic polymer with a thin-film silicon diode deposited onto a flexible metal foil substrate. WORM memories are desirable for ultralow-cost permanent storage of digital images, eliminating the need for slow, bulky and expensive mechanical drives used in conventional magnetic and optical memories. Our results indicate that the hybrid organic/inorganic memory device is a reliable means for achieving rapid, large-scale archival data storage. The WORM memory pixel exploits a mechanism of current-controlled, thermally activated un-doping of a two-component electrochromic conducting polymer.
Liu, Lifeng; Ding, Xiangdong; Li, Ju; Lookman, Turab; Sun, Jun
2014-02-21
Martensitic transformation usually creates hierarchical internal structures beyond mere change of the atomic crystal structure. Multi-stage nucleation is thus required, where nucleation (level-1) of the underlying atomic crystal lattice does not have to be immediately followed by the nucleation of higher-order superstructures (level-2 and above), such as polysynthetic laths. Using in situ transmission electron microscopy (TEM), we directly observe the nucleation of the level-2 superstructure in a Cu-Al-Ni single crystal under compression, with critical super-nuclei size L2c around 500 nm. When the sample size D decreases below L2c, the superelasticity behavior changes from a flat stress plateau to a continuously rising stress-strain curve. Such size dependence definitely would impact the application of shape memory alloys in miniaturized MEMS/NEMS devices.
Design of a Molecular Memory Device: The Electron Transfer Shift Register Memory
NASA Technical Reports Server (NTRS)
Beratan, D.
1993-01-01
A molecular shift register memory at the molecular level is described. The memory elements consist of molecules can exit in either an oxidized or reduced state and the bits are shifted between the cells with photoinduced electron transfer reactions.
Performance Evaluation and Improvement of Ferroelectric Field-Effect Transistor Memory
NASA Astrophysics Data System (ADS)
Yu, Hyung Suk
Flash memory is reaching scaling limitations rapidly due to reduction of charge in floating gates, charge leakage and capacitive coupling between cells which cause threshold voltage fluctuations, short retention times, and interference. Many new memory technologies are being considered as alternatives to flash memory in an effort to overcome these limitations. Ferroelectric Field-Effect Transistor (FeFET) is one of the main emerging candidates because of its structural similarity to conventional FETs and fast switching speed. Nevertheless, the performance of FeFETs have not been systematically compared and analyzed against other competing technologies. In this work, we first benchmark the intrinsic performance of FeFETs and other memories by simulations in order to identify the strengths and weaknesses of FeFETs. To simulate realistic memory applications, we compare memories on an array structure. For the comparisons, we construct an accurate delay model and verify it by benchmarking against exact HSPICE simulations. Second, we propose an accurate model for FeFET memory window since the existing model has limitations. The existing model assumes symmetric operation voltages but it is not valid for the practical asymmetric operation voltages. In this modeling, we consider practical operation voltages and device dimensions. Also, we investigate realistic changes of memory window over time and retention time of FeFETs. Last, to improve memory window and subthreshold swing, we suggest nonplanar junctionless structures for FeFETs. Using the suggested structures, we study the dimensional dependences of crucial parameters like memory window and subthreshold swing and also analyze key interference mechanisms.
Device and method for treatment of openings in vascular and septal walls
DOE Office of Scientific and Technical Information (OSTI.GOV)
Singhal, Pooja; Wilson, Thomas S.; Cosgriff-Hernandez, Elizabeth
A device, system and method for treatment of an opening in vascular and/or septal walls including patent foramen ovale. The device has wings/stops on either end, an axis core covered in a shape memory foam and is deliverable via a catheter to the affected opening, finally expanding into a vascular or septal opening where it is held in place by the expandable shape memory stops or wings.
Functional Performances of CuZnAl Shape Memory Alloy Open-Cell Foams
NASA Astrophysics Data System (ADS)
Biffi, C. A.; Casati, R.; Bassani, P.; Tuissi, A.
2018-01-01
Shape memory alloys (SMAs) with cellular structure offer a unique mixture of thermo-physical-mechanical properties. These characteristics can be tuned by changing the pore size and make the shape memory metallic foams very attractive for developing new devices for structural and functional applications. In this work, CuZnAl SMA foams were produced through the liquid infiltration of space holder method. In comparison, a conventional CuZn brass alloy was foamed trough the same method. Functional performances were studied on both bulk and foamed SMA specimens. Calorimetric response shows similar martensitic transformation (MT) below 0 °C. Compressive response of CuZnAl revealed that mechanical behavior is strongly affected by sample morphology and that damping capacity of metallic foam is increased above the MT temperatures. The shape memory effect was detected in the CuZnAl foams. The conventional brass shows a compressive response similar to that of the martensitic CuZnAl, in which plastic deformation accumulation occurs up to the cellular structure densification after few thermal cycles.
Short-Term Memory for Figure-Ground Organization in the Visual Cortex
O’Herron, Philip; von der Heydt, Rüdiger
2009-01-01
Summary Whether the visual system uses a buffer to store image information and the duration of that storage have been debated intensely in recent psychophysical studies. The long phases of stable perception of reversible figures suggest a memory that persists for seconds. But persistence of similar duration has not been found in signals of the visual cortex. Here we show that figure-ground signals in the visual cortex can persist for a second or more after the removal of the figure-ground cues. When new figure-ground information is presented, the signals adjust rapidly, but when a figure display is changed to an ambiguous edge display, the signals decay slowly – a behavior that is characteristic of memory devices. Figure-ground signals represent the layout of objects in a scene, and we propose that a short-term memory for object layout is important in providing continuity of perception in the rapid stream of images flooding our eyes. PMID:19285475
Response of Caenorhabditis elegans to wireless devices radiation exposure.
Fasseas, Michael K; Fragopoulou, Adamantia F; Manta, Areti K; Skouroliakou, Aikaterini; Vekrellis, Konstantinos; Margaritis, Lukas H; Syntichaki, Popi
2015-03-01
To examine the impact of electromagnetic radiation, produced by GSM (Global System for Mobile communications) mobile phones, Wi-Fi (Wireless-Fidelity) routers and wireless DECT (Digital Enhanced Cordless Telecommunications) phones, on the nematode Caenorhabditis elegans. We exposed synchronized populations, of different developmental stages, to these wireless devices at E-field levels below ICNIRP's (International Commission on Non-Ionizing Radiation Protection) guidelines for various lengths of time. WT (wild-type) and aging- or stress-sensitive mutant worms were examined for changes in growth, fertility, lifespan, chemotaxis, short-term memory, increased ROS (Reactive Oxygen Species) production and apoptosis by using fluorescent marker genes or qRT-PCR (quantitative Reverse Transcription-Polymerase Chain Reaction). No statistically significant differences were found between the exposed and the sham/control animals in any of the experiments concerning lifespan, fertility, growth, memory, ROS, apoptosis or gene expression. The worm appears to be robust to this form of (pulsed) radiation, at least under the exposure conditions used.
Nanoscale cross-point diode array accessing embedded high density PCM
NASA Astrophysics Data System (ADS)
Wang, Heng; Liu, Yan; Liu, Bo; Gao, Dan; Xu, Zhen; Zhan, Yipeng; Song, Zhitang; Feng, Songlin
2017-08-01
The main bottlenecks in the development of current embedded phase change memory (PCM) technology are the current density and data storage density. In this paper, we present a PCM with 4F2 cross-point diode selector and blade-type bottom electrode contact (BEC). A blade TiN BEC with a cross-sectional area of 630 nm2 (10 nm × 63 nm) reduces the reset current down to about 750 μA. The optimized diode array could supply this 750 μA reset current at about 1.7 V and low off-current 1 × 10-4 μA at about -5.05 V. The on-off ratio of this device is 7.5 × 106. The proposed nanoscale PCM device simultaneously exhibits an operation voltage as low as 3 V and a high density drive current with an ultra small cell size of 4F2 (108 nm × 108 nm). Over 106 cycling endurance properties guarantee that it can work effectively on the embedded memory.
Multifunctional Energy Storage and Conversion Devices.
Huang, Yan; Zhu, Minshen; Huang, Yang; Pei, Zengxia; Li, Hongfei; Wang, Zifeng; Xue, Qi; Zhi, Chunyi
2016-10-01
Multifunctional energy storage and conversion devices that incorporate novel features and functions in intelligent and interactive modes, represent a radical advance in consumer products, such as wearable electronics, healthcare devices, artificial intelligence, electric vehicles, smart household, and space satellites, etc. Here, smart energy devices are defined to be energy devices that are responsive to changes in configurational integrity, voltage, mechanical deformation, light, and temperature, called self-healability, electrochromism, shape memory, photodetection, and thermal responsivity. Advisable materials, device designs, and performances are crucial for the development of energy electronics endowed with these smart functions. Integrating these smart functions in energy storage and conversion devices gives rise to great challenges from the viewpoint of both understanding the fundamental mechanisms and practical implementation. Current state-of-art examples of these smart multifunctional energy devices, pertinent to materials, fabrication strategies, and performances, are highlighted. In addition, current challenges and potential solutions from materials synthesis to device performances are discussed. Finally, some important directions in this fast developing field are considered to further expand their application. © 2016 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.
Multi-bit dark state memory: Double quantum dot as an electronic quantum memory
NASA Astrophysics Data System (ADS)
Aharon, Eran; Pozner, Roni; Lifshitz, Efrat; Peskin, Uri
2016-12-01
Quantum dot clusters enable the creation of dark states which preserve electrons or holes in a coherent superposition of dot states for a long time. Various quantum logic devices can be envisioned to arise from the possibility of storing such trapped particles for future release on demand. In this work, we consider a double quantum dot memory device, which enables the preservation of a coherent state to be released as multiple classical bits. Our unique device architecture uses an external gating for storing (writing) the coherent state and for retrieving (reading) the classical bits, in addition to exploiting an internal gating effect for the preservation of the coherent state.
NASA Astrophysics Data System (ADS)
Gandhi, Sahil Sandesh; Kim, Min Su; Hwang, Jeoung-Yeon; Chien, Liang-Chy
2017-02-01
We demonstrate the application of the nanostructured scaffold of BPIII as a resuable EO device that retains the BPIII ordering and sub-millisecond EO switching characteristics, that is, "EO-memory" of the original BPIII even after removal of the cholesteric blue phase liquid crystal (LC) and subsequent refilling with different nematic LCs. We also fabricate scaffolds mimicking the isotropic phase and cubic blue phase I (BPI) to demonstrate the versatility of our material system to nano-engineer EO-memory scaffolds of various structures. We envisage that this work will promote new experimental investigations of the mysterious BPIII and the development of novel device architectures and optically functional nanomaterials.
Stochastic switching of TiO2-based memristive devices with identical initial memory states
2014-01-01
In this work, we show that identical TiO2-based memristive devices that possess the same initial resistive states are only phenomenologically similar as their internal structures may vary significantly, which could render quite dissimilar switching dynamics. We experimentally demonstrated that the resistive switching of practical devices with similar initial states could occur at different programming stimuli cycles. We argue that similar memory states can be transcribed via numerous distinct active core states through the dissimilar reduced TiO2-x filamentary distributions. Our hypothesis was finally verified via simulated results of the memory state evolution, by taking into account dissimilar initial filamentary distribution. PMID:24994953
NASA Astrophysics Data System (ADS)
Sleiman, A.; Rosamond, M. C.; Alba Martin, M.; Ayesh, A.; Al Ghaferi, A.; Gallant, A. J.; Mabrook, M. F.; Zeze, D. A.
2012-01-01
A pentacene-based organic metal-insulator-semiconductor memory device, utilizing single walled carbon nanotubes (SWCNTs) for charge storage is reported. SWCNTs were embedded, between SU8 and polymethylmethacrylate to achieve an efficient encapsulation. The devices exhibit capacitance-voltage clockwise hysteresis with a 6 V memory window at ± 30 V sweep voltage, attributed to charging and discharging of SWCNTs. As the applied gate voltage exceeds the SU8 breakdown voltage, charge leakage is induced in SU8 to allow more charges to be stored in the SWCNT nodes. The devices exhibited high storage density (˜9.15 × 1011 cm-2) and demonstrated 94% charge retention due to the superior encapsulation.
Nonvolatile floating gate organic memory device based on pentacene/CdSe quantum dot heterojuction
NASA Astrophysics Data System (ADS)
Shin, Ik-Soo; Kim, Jung-Min; Jeun, Jun-Ho; Yoo, Seok-Hyun; Ge, Ziyi; Hong, Jong-In; Ho Bang, Jin; Kim, Yong-Sang
2012-04-01
An organic floating-gate memory device using CdSe quantum dots (QDs) as a charge-trapping element was fabricated. CdSe QDs were localized beneath a pentacene without any tunneling insulator, and the QD layer played a role as hole-trapping sites. The band bending formed at the junction between pentacene and QD layers inhibited back-injection of holes trapped in CdSe into pentacene, which appeared as a hysteretic capacitance-voltage response during the operation of the device. Nearly, 60% of trapped charge was sustained even after 104 s in programmed state, and this long retention time can be potentially useful in practical applications of non-volatile memory.
Pearson, Christopher; Bowen, Leon; Lee, Myung Won; Fisher, Alison L.; Linton, Katherine E.; Bryce, Martin R.; Petty, Michael C.
2013-01-01
We report on the mechanism of operation of organic thin film resistive memory architectures based on an ambipolar compound consisting of oxadiazole, carbazole, and fluorene units. Cross-sections of the devices have been imaged by electron microscopy both before and after applying a voltage. The micrographs reveal the growth of filaments, with diameters of 50 nm–100 nm, on the metal cathode. We suggest that these are formed by the drift of aluminium ions from the anode and are responsible for the observed switching and negative differential resistance phenomena in the memory devices.
Light-erasable embedded charge-trapping memory based on MoS2 for system-on-panel applications
NASA Astrophysics Data System (ADS)
He, Long-Fei; Zhu, Hao; Xu, Jing; Liu, Hao; Nie, Xin-Ran; Chen, Lin; Sun, Qing-Qing; Xia, Yang; Wei Zhang, David
2017-11-01
The continuous scaling and challenges in device integrations in modern portable electronic products have aroused many scientific interests, and a great deal of effort has been made in seeking solutions towards a more microminiaturized package assembled with smaller and more powerful components. In this study, an embedded light-erasable charge-trapping memory with a high-k dielectric stack (Al2O3/HfO2/Al2O3) and an atomically thin MoS2 channel has been fabricated and fully characterized. The memory exhibits a sufficient memory window, fast programming and erasing (P/E) speed, and high On/Off current ratio up to 107. Less than 25% memory window degradation is observed after projected 10-year retention, and the device functions perfectly after 8000 P/E operation cycles. Furthermore, the programmed device can be fully erased by incident light without electrical assistance. Such excellent memory performance originates from the intrinsic properties of two-dimensional (2D) MoS2 and the engineered back-gate dielectric stack. Our integration of 2D semiconductors in the infrastructure of light-erasable charge-trapping memory is very promising for future system-on-panel applications like storage of metadata and flexible imaging arrays.
High-speed noise-free optical quantum memory
NASA Astrophysics Data System (ADS)
Kaczmarek, K. T.; Ledingham, P. M.; Brecht, B.; Thomas, S. E.; Thekkadath, G. S.; Lazo-Arjona, O.; Munns, J. H. D.; Poem, E.; Feizpour, A.; Saunders, D. J.; Nunn, J.; Walmsley, I. A.
2018-04-01
Optical quantum memories are devices that store and recall quantum light and are vital to the realization of future photonic quantum networks. To date, much effort has been put into improving storage times and efficiencies of such devices to enable long-distance communications. However, less attention has been devoted to building quantum memories which add zero noise to the output. Even small additional noise can render the memory classical by destroying the fragile quantum signatures of the stored light. Therefore, noise performance is a critical parameter for all quantum memories. Here we introduce an intrinsically noise-free quantum memory protocol based on two-photon off-resonant cascaded absorption (ORCA). We demonstrate successful storage of GHz-bandwidth heralded single photons in a warm atomic vapor with no added noise, confirmed by the unaltered photon-number statistics upon recall. Our ORCA memory meets the stringent noise requirements for quantum memories while combining high-speed and room-temperature operation with technical simplicity, and therefore is immediately applicable to low-latency quantum networks.
Investigation of multilayer magnetic domain lattice file
NASA Technical Reports Server (NTRS)
Torok, E. J.; Kamin, M.; Tolman, C. H.
1980-01-01
The feasibility of the self structured multilayered bubble domain memory as a mass memory medium for satellite applications is examined. Theoretical considerations of multilayer bubble supporting materials are presented, in addition to the experimental evaluation of current accessed circuitry for various memory functions. The design, fabrication, and test of four device designs is described, and a recommended memory storage area configuration is presented. Memory functions which were demonstrated include the current accessed propagation of bubble domains and stripe domains, pinning of stripe domain ends, generation of single and double bubbles, generation of arrays of coexisting strip and bubble domains in a single garnet layer, and demonstration of different values of the strip out field for single and double bubbles indicating adequate margins for data detection. All functions necessary to develop a multilayer self structured bubble memory device were demonstrated in individual experiments.
Qian, Kai; Cai, Guofa; Nguyen, Viet Cuong; Chen, Tupei; Lee, Pooi See
2016-10-05
Transparent nonvolatile memory has great potential in integrated transparent electronics. Here, we present highly transparent resistive switching memory using stoichiometric WO 3 film produced by cathodic electrodeposition with indium tin oxide electrodes. The memory device demonstrates good optical transmittance, excellent operative uniformity, low operating voltages (+0.25 V/-0.42 V), and long retention time (>10 4 s). Conductive atomic force microscopy, ex situ transmission electron microscopy, and X-ray photoelectron spectroscopy experiments directly confirm that the resistive switching effects occur due to the electric field-induced formation and annihilation of the tungsten-rich conductive channel between two electrodes. Information on the physical and chemical nature of conductive filaments offers insightful design strategies for resistive switching memories with excellent performances. Moreover, we demonstrate the promising applicability of the cathodic electrodeposition method for future resistive memory devices.
White-light-controlled resistive switching in ZnO/BaTiO3/C multilayer layer at room temperature
NASA Astrophysics Data System (ADS)
Wang, Junshuai; Liang, Dandan; Wu, Liangchen; Li, Xiaoping; Chen, Peng
2018-07-01
The bipolar resistance switching effect is observed in ZnO/BaTiO3/C structure. The resistance switching behavior can be modulated by white light. The resistance switch states and threshold voltage can be changed when subjected to white light. This research can help explore multi-functional materials and applications in nonvolatile memory device.
Origin of multi-level switching and telegraphic noise in organic nanocomposite memory devices
Song, Younggul; Jeong, Hyunhak; Chung, Seungjun; Ahn, Geun Ho; Kim, Tae-Young; Jang, Jingon; Yoo, Daekyoung; Jeong, Heejun; Javey, Ali; Lee, Takhee
2016-01-01
The origin of negative differential resistance (NDR) and its derivative intermediate resistive states (IRSs) of nanocomposite memory systems have not been clearly analyzed for the past decade. To address this issue, we investigate the current fluctuations of organic nanocomposite memory devices with NDR and the IRSs under various temperature conditions. The 1/f noise scaling behaviors at various temperature conditions in the IRSs and telegraphic noise in NDR indicate the localized current pathways in the organic nanocomposite layers for each IRS. The clearly observed telegraphic noise with a long characteristic time in NDR at low temperature indicates that the localized current pathways for the IRSs are attributed to trapping/de-trapping at the deep trap levels in NDR. This study will be useful for the development and tuning of multi-bit storable organic nanocomposite memory device systems. PMID:27659298
Realization of transient memory-loss with NiO-based resistive switching device
NASA Astrophysics Data System (ADS)
Hu, S. G.; Liu, Y.; Chen, T. P.; Liu, Z.; Yu, Q.; Deng, L. J.; Yin, Y.; Hosaka, Sumio
2012-11-01
A resistive switching device based on a nickel-rich nickel oxide thin film, which exhibits inherent learning and memory-loss abilities, is reported in this work. The conductance of the device gradually increases and finally saturates with the number of voltage pulses (or voltage sweepings), which is analogous to the behavior of the short-term and long-term memory in the human brain. Furthermore, the number of the voltage pulses (or sweeping cycles) required to achieve a given conductance state increases with the interval between two consecutive voltage pulses (or sweeping cycles), which is attributed to the heat diffusion in the material of the conductive filaments formed in the nickel oxide thin film. The phenomenon resembles the behavior of the human brain, i.e., forgetting starts immediately after an impression, a larger interval of the impressions leads to more memory loss, thus the memorization needs more impressions to enhance.
2016-09-01
to the characteristics and extract the non-ideality. These capabilities and calibration results will assist in the characterization of advanced...superconductor-ionic quantum memory and computation devices. iv CONTENTS EXECUTIVE SUMMARY...Josephson effect makes these measurements useful for characterization and calibration of superconducting quantum memory and computational devices
NASA Astrophysics Data System (ADS)
Jiang, Jun; Bai, Zi Long; Chen, Zhi Hui; He, Long; Zhang, David Wei; Zhang, Qing Hua; Shi, Jin An; Park, Min Hyuk; Scott, James F.; Hwang, Cheol Seong; Jiang, An Quan
2018-01-01
Erasable conductive domain walls in insulating ferroelectric thin films can be used for non-destructive electrical read-out of the polarization states in ferroelectric memories. Still, the domain-wall currents extracted by these devices have not yet reached the intensity and stability required to drive read-out circuits operating at high speeds. This study demonstrated non-destructive read-out of digital data stored using specific domain-wall configurations in epitaxial BiFeO3 thin films formed in mesa-geometry structures. Partially switched domains, which enable the formation of conductive walls during the read operation, spontaneously retract when the read voltage is removed, reducing the accumulation of mobile defects at the domain walls and potentially improving the device stability. Three-terminal memory devices produced 14 nA read currents at an operating voltage of 5 V, and operated up to T = 85 °C. The gap length can also be smaller than the film thickness, allowing the realization of ferroelectric memories with device dimensions far below 100 nm.
Bipolar resistive switching in Cu/AlN/Pt nonvolatile memory device
NASA Astrophysics Data System (ADS)
Chen, C.; Yang, Y. C.; Zeng, F.; Pan, F.
2010-08-01
Highly stable and reproducible bipolar resistive switching effects are reported on Cu/AlN/Pt devices. Memory characteristics including large memory window of 103, long retention time of >106 s and good endurance of >103 were demonstrated. It is concluded that the reset current decreases as compliance current decreases, which provides an approach to suppress power consumption. The dominant conduction mechanisms of low resistance state and high resistance state were verified by Ohmic behavior and trap-controlled space charge limited current, respectively. The memory effect is explained by the model concerning redox reaction mediated formation and rupture of the conducting filament in AlN films.
Realization of reliable solid-state quantum memory for photonic polarization qubit.
Zhou, Zong-Quan; Lin, Wei-Bin; Yang, Ming; Li, Chuan-Feng; Guo, Guang-Can
2012-05-11
Faithfully storing an unknown quantum light state is essential to advanced quantum communication and distributed quantum computation applications. The required quantum memory must have high fidelity to improve the performance of a quantum network. Here we report the reversible transfer of photonic polarization states into collective atomic excitation in a compact solid-state device. The quantum memory is based on an atomic frequency comb (AFC) in rare-earth ion-doped crystals. We obtain up to 0.999 process fidelity for the storage and retrieval process of single-photon-level coherent pulse. This reliable quantum memory is a crucial step toward quantum networks based on solid-state devices.
Printing an ITO-free flexible poly (4-vinylphenol) resistive switching device
NASA Astrophysics Data System (ADS)
Ali, Junaid; Rehman, Muhammad Muqeet; Siddiqui, Ghayas Uddin; Aziz, Shahid; Choi, Kyung Hyun
2018-02-01
Resistive switching in a sandwich structure of silver (Ag)/Polyvinyl phenol (PVP)/carbon nanotube (CNTs)-silver nanowires (AgNWs) coated on a flexible PET substrate is reported in this work. Densely populated networks of one dimensional nano materials (1DNM), CNTs-AgNWs have been used as the conductive bottom electrode with the prominent features of high flexibility and low sheet resistance of 90 Ω/sq. Thin, yet uniform active layer of PVP was deposited on top of the spin coated 1DNM thin film through state of the art printing technique of electrohydrodynamic atomization (EHDA) with an average thickness of 170 ± 28 nm. Ag dots with an active area of ∼0.1 mm2 were deposited through roll to plate printing system as the top electrodes to complete the device fabrication of flexible memory device. Our memory device exhibited suitable electrical characteristics with OFF/ON ratio of 100:1, retention time of 60 min and electrical endurance for 100 voltage sweeps without any noticeable decay in performance. The resistive switching characteristics at a low current compliance of 3 nA were also evaluated for the application of low power consumption. This memory device is flexible and can sustain more than 100 bending cycles at a bending diameter of 2 cm with stable HRS and LRS values. Our proposed device shows promise to be used as a future potential nonvolatile memory device in flexible electronics.
NASA Astrophysics Data System (ADS)
Zheng, Zhiwei; Huo, Zongliang; Zhang, Manhong; Zhu, Chenxin; Liu, Jing; Liu, Ming
2011-10-01
This paper reports the simultaneous improvements in erase speed and data retention characteristics in flash memory using a stacked HfO2/Ta2O5 charge-trapping layer. In comparison to a memory capacitor with a single HfO2 trapping layer, the erase speed of a memory capacitor with a stacked HfO2/Ta2O5 charge-trapping layer is 100 times faster and its memory window is enlarged from 2.7 to 4.8 V for the same ±16 V sweeping voltage range. With the same initial window of ΔVFB = 4 V, the device with a stacked HfO2/Ta2O5 charge-trapping layer has a 3.5 V extrapolated 10-year retention window, while the control device with a single HfO2 trapping layer has only 2.5 V for the extrapolated 10-year window. The present results demonstrate that the device with the stacked HfO2/Ta2O5 charge-trapping layer has a strong potential for future high-performance nonvolatile memory application.
Fast, Capacious Disk Memory Device
NASA Technical Reports Server (NTRS)
Muller, Ronald M.
1990-01-01
Device for recording digital data on, and playing back data from, memory disks has high recording or playback rate and utilizes available recording area more fully. Two disks, each with own reading/writing head, used to record data at same time. Head on disk A operates on one of tracks numbered from outside in; head on disk B operates on track of same number in sequence from inside out. Underlying concept of device applicable to magnetic or optical disks.
Transparent resistive switching memory using aluminum oxide on a flexible substrate
NASA Astrophysics Data System (ADS)
Yeom, Seung-Won; Shin, Sang-Chul; Kim, Tan-Young; Ha, Hyeon Jun; Lee, Yun-Hi; Shim, Jae Won; Ju, Byeong-Kwon
2016-02-01
Resistive switching memory (ReRAM) has attracted much attention in recent times owing to its fast switching, simple structure, and non-volatility. Flexible and transparent electronic devices have also attracted considerable attention. We therefore fabricated an Al2O3-based ReRAM with transparent indium-zinc-oxide (IZO) electrodes on a flexible substrate. The device transmittance was found to be higher than 80% in the visible region (400-800 nm). Bended states (radius = 10 mm) of the device also did not affect the memory performance because of the flexibility of the two transparent IZO electrodes and the thin Al2O3 layer. The conduction mechanism of the resistive switching of our device was explained by ohmic conduction and a Poole-Frenkel emission model. The conduction mechanism was proved by oxygen vacancies in the Al2O3 layer, as analyzed by x-ray photoelectron spectroscopy analysis. These results encourage the application of ReRAM in flexible and transparent electronic devices.
Unipolar resistive switching behaviors and mechanisms in an annealed Ni/ZrO2/TaN memory device
NASA Astrophysics Data System (ADS)
Tsai, Tsung-Ling; Ho, Tsung-Han; Tseng, Tseung-Yuen
2015-01-01
The effects of Ni/ZrO2/TaN resistive switching memory devices without and with a 400 °C annealing process on switching properties are investigated. The devices exhibit unipolar resistive switching behaviors with low set and reset voltages because of a large amount of Ni diffusion with no reaction with ZrO2 after the annealing process, which is confirmed by ToF-SIMS and XPS analyses. A physical model based on a Ni filament is constructed to explain such phenomena. The device that undergoes the 400 °C annealing process exhibits an excellent endurance of more than 1.5 × 104 cycles. The improvement can be attributed to the enhancement of oxygen ion migration along grain boundaries, which result in less oxygen ion consumption during the reset process. The device also performs good retention up to 105 s at 150 °C. Therefore, it has great potential for high-density nonvolatile memory applications.
Multistate Memristive Tantalum Oxide Devices for Ternary Arithmetic
Kim, Wonjoo; Chattopadhyay, Anupam; Siemon, Anne; Linn, Eike; Waser, Rainer; Rana, Vikas
2016-01-01
Redox-based resistive switching random access memory (ReRAM) offers excellent properties to implement future non-volatile memory arrays. Recently, the capability of two-state ReRAMs to implement Boolean logic functionality gained wide interest. Here, we report on seven-states Tantalum Oxide Devices, which enable the realization of an intrinsic modular arithmetic using a ternary number system. Modular arithmetic, a fundamental system for operating on numbers within the limit of a modulus, is known to mathematicians since the days of Euclid and finds applications in diverse areas ranging from e-commerce to musical notations. We demonstrate that multistate devices not only reduce the storage area consumption drastically, but also enable novel in-memory operations, such as computing using high-radix number systems, which could not be implemented using two-state devices. The use of high radix number system reduces the computational complexity by reducing the number of needed digits. Thus the number of calculation operations in an addition and the number of logic devices can be reduced. PMID:27834352
Multistate Memristive Tantalum Oxide Devices for Ternary Arithmetic.
Kim, Wonjoo; Chattopadhyay, Anupam; Siemon, Anne; Linn, Eike; Waser, Rainer; Rana, Vikas
2016-11-11
Redox-based resistive switching random access memory (ReRAM) offers excellent properties to implement future non-volatile memory arrays. Recently, the capability of two-state ReRAMs to implement Boolean logic functionality gained wide interest. Here, we report on seven-states Tantalum Oxide Devices, which enable the realization of an intrinsic modular arithmetic using a ternary number system. Modular arithmetic, a fundamental system for operating on numbers within the limit of a modulus, is known to mathematicians since the days of Euclid and finds applications in diverse areas ranging from e-commerce to musical notations. We demonstrate that multistate devices not only reduce the storage area consumption drastically, but also enable novel in-memory operations, such as computing using high-radix number systems, which could not be implemented using two-state devices. The use of high radix number system reduces the computational complexity by reducing the number of needed digits. Thus the number of calculation operations in an addition and the number of logic devices can be reduced.
Multistate Memristive Tantalum Oxide Devices for Ternary Arithmetic
NASA Astrophysics Data System (ADS)
Kim, Wonjoo; Chattopadhyay, Anupam; Siemon, Anne; Linn, Eike; Waser, Rainer; Rana, Vikas
2016-11-01
Redox-based resistive switching random access memory (ReRAM) offers excellent properties to implement future non-volatile memory arrays. Recently, the capability of two-state ReRAMs to implement Boolean logic functionality gained wide interest. Here, we report on seven-states Tantalum Oxide Devices, which enable the realization of an intrinsic modular arithmetic using a ternary number system. Modular arithmetic, a fundamental system for operating on numbers within the limit of a modulus, is known to mathematicians since the days of Euclid and finds applications in diverse areas ranging from e-commerce to musical notations. We demonstrate that multistate devices not only reduce the storage area consumption drastically, but also enable novel in-memory operations, such as computing using high-radix number systems, which could not be implemented using two-state devices. The use of high radix number system reduces the computational complexity by reducing the number of needed digits. Thus the number of calculation operations in an addition and the number of logic devices can be reduced.
Landsman, T L; Touchet, T; Hasan, S M; Smith, C; Russell, B; Rivera, J; Maitland, D J; Cosgriff-Hernandez, E
2017-01-01
Uncontrolled hemorrhage accounts for more than 30% of trauma deaths worldwide. Current hemostatic devices focus primarily on time to hemostasis, but prevention of bacterial infection is also critical for improving survival rates. In this study, we sought to improve on current devices used for hemorrhage control by combining the large volume-filling capabilities and rapid clotting of shape memory polymer (SMP) foams with the swelling capacity of hydrogels. In addition, a hydrogel composition was selected that readily complexes with elemental iodine to impart bactericidal properties to the device. The focus of this work was to verify that the advantages of each respective material (SMP foam and hydrogel) are retained when combined in a composite device. The iodine-doped hydrogel demonstrated an 80% reduction in bacteria viability when cultured with a high bioburden of Staphylococcus aureus. Hydrogel coating of the SMP foam increased fluid uptake by 19× over the uncoated SMP foam. The composite device retained the shape memory behavior of the foam with more than 15× volume expansion after being submerged in 37°C water for 15 min. Finally, the expansion force of the composite was tested to assess potential tissue damage within the wound during device expansion. Expansion forces did not exceed 0.6N, making tissue damage during device expansion unlikely, even when the expanded device diameter is substantially larger than the target wound site. Overall, the enhanced fluid uptake and bactericidal properties of the shape memory foam composite indicate its strong potential as a hemostatic agent to treat non-compressible wounds. No hemostatic device currently used in civilian and combat trauma situations satisfies all the desired criteria for an optimal hemostatic wound dressing. The research presented here sought to improve on current devices by combining the large volume-filling capabilities and rapid clotting of shape memory polymer (SMP) foams with the swelling capacity of hydrogels. In addition, a hydrogel composition was selected that readily complexes with elemental iodine to impart bactericidal properties to the device. The focus of this work was to verify that the advantages of each respective material are retained when combined into a composite device. This research opens the door to generating novel composites with a focus on both hemostasis, as well as wound healing and microbial prevention. Copyright © 2016 Acta Materialia Inc. Published by Elsevier Ltd. All rights reserved.
Radiation-tolerant imaging device
Colella, N.J.; Kimbrough, J.R.
1996-11-19
A barrier at a uniform depth for an entire wafer is used to produce imaging devices less susceptible to noise pulses produced by the passage of ionizing radiation. The barrier prevents charge created in the bulk silicon of a CCD detector or a semiconductor logic or memory device from entering the collection volume of each pixel in the imaging device. The charge barrier is a physical barrier, a potential barrier, or a combination of both. The physical barrier is formed by an SiO{sub 2} insulator. The potential barrier is formed by increasing the concentration of majority carriers (holes) to combine with the electron`s generated by the ionizing radiation. A manufacturer of CCD imaging devices can produce radiation-tolerant devices by merely changing the wafer type fed into his process stream from a standard wafer to one possessing a barrier beneath its surface, thus introducing a very small added cost to his production cost. An effective barrier type is an SiO{sub 2} layer. 7 figs.
Radiation-tolerant imaging device
Colella, Nicholas J.; Kimbrough, Joseph R.
1996-01-01
A barrier at a uniform depth for an entire wafer is used to produce imaging devices less susceptible to noise pulses produced by the passage of ionizing radiation. The barrier prevents charge created in the bulk silicon of a CCD detector or a semiconductor logic or memory device from entering the collection volume of each pixel in the imaging device. The charge barrier is a physical barrier, a potential barrier, or a combination of both. The physical barrier is formed by an SiO.sub.2 insulator. The potential barrier is formed by increasing the concentration of majority carriers (holes) to combine with the electron's generated by the ionizing radiation. A manufacturer of CCD imaging devices can produce radiation-tolerant devices by merely changing the wafer type fed into his process stream from a standard wafer to one possessing a barrier beneath its surface, thus introducing a very small added cost to his production cost. An effective barrier type is an SiO.sub.2 layer.
Liu, Chunsen; Yan, Xiao; Wang, Jianlu; Ding, Shijin; Zhou, Peng; Zhang, David Wei
2017-05-01
Atomic crystal charge trap memory, as a new concept of nonvolatile memory, possesses an atomic level flatness interface, which makes them promising candidates for replacing conventional FLASH memory in the future. Here, a 2D material WSe 2 and a 3D Al 2 O 3 /HfO 2 /Al 2 O 3 charge-trap stack are combined to form a charge-trap memory device with a separation of control gate and memory stack. In this device, the charges are erased/written by built-in electric field, which significantly enhances the write speed to 1 µs. More importantly, owing to the elaborate design of the energy band structure, the memory only captures electrons with a large electron memory window over 20 V and trap selectivity about 13, both of them are the state-of-the-art values ever reported in FLASH memory based on 2D materials. Therefore, it is demonstrated that high-performance charge trap memory based on WSe 2 without the fatal overerase issue in conventional FLASH memory can be realized to practical application. © 2017 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.
NASA Astrophysics Data System (ADS)
Rok Kim, Kyeong; You, Joo Hyung; Dal Kwack, Kae; Kim, Tae Whan
2010-10-01
Unique multibit NAND polycrystalline silicon-oxide-silicon nitride-oxide-silicon (SONOS) memory cells utilizing a separated control gate (SCG) were designed to increase memory density. The proposed NAND SONOS memory device based on a SCG structure was operated as two bits, resulting in an increase in the storage density of the NVM devices in comparison with conventional single-bit memories. The electrical properties of the SONOS memory cells with a SCG were investigated to clarify the charging effects in the SONOS memory cells. When the program voltage was supplied to each gate of the NAND SONOS flash memory cells, the electrons were trapped in the nitride region of the oxide-nitride-oxide layer under the gate to supply the program voltage. The electrons were accumulated without affecting the other gate during the programming operation, indicating the absence of cross-talk between two trap charge regions. It is expected that the inference effect will be suppressed by the lower program voltage than the program voltage of the conventional NAND flash memory. The simulation results indicate that the proposed unique NAND SONOS memory cells with a SCG can be used to increase memory density.
Design of a Multi-Level/Analog Ferroelectric Memory Device
NASA Technical Reports Server (NTRS)
MacLeod, Todd C.; Phillips, Thomas A.; Ho, Fat D.
2006-01-01
Increasing the memory density and utilizing the dove1 characteristics of ferroelectric devices is important in making ferroelectric memory devices more desirable to the consumer. This paper describes a design that allows multiple levels to be stored in a ferroelectric based memory cell. It can be used to store multiple bits or analog values in a high speed nonvolatile memory. The design utilizes the hysteresis characteristic of ferroelectric transistors to store an analog value in the memory cell. The design also compensates for the decay of the polarization of the ferroelectric material over time. This is done by utilizing a pair of ferroelectric transistors to store the data. One transistor is used as a reference to determine the amount of decay that has occurred since the pair was programmed. The second transistor stores the analog value as a polarization value between zero and saturated. The design allows digital data to be stored as multiple bits in each memory cell. The number of bits per cell that can be stored will vary with the decay rate of the ferroelectric transistors and the repeatability of polarization between transistors. It is predicted that each memory cell may be able to store 8 bits or more. The design is based on data taken from actual ferroelectric transistors. Although the circuit has not been fabricated, a prototype circuit is now under construction. The design of this circuit is different than multi-level FLASH or silicon transistor circuits. The differences between these types of circuits are described in this paper. This memory design will be useful because it allows higher memory density, compensates for the environmental and ferroelectric aging processes, allows analog values to be directly stored in memory, compensates for the thermal and radiation environments associated with space operations, and relies only on existing technologies.
NASA Astrophysics Data System (ADS)
Arun, N.; Kumar, K. Vinod; Pathak, A. P.; Avasthi, D. K.; Nageswara Rao, S. V. S.
2018-04-01
Non-volatile memory (NVM) devices were fabricated as a Metal- Insulator-Metal (MIM) structures by sandwiching Hafnium dioxide (HfO2) thin film in between two metal electrodes. The top and bottom metal electrodes were deposited by using the thermal evaporation, and the oxide layer was deposited by using the RF magnetron sputtering technique. The Resistive Random Access Memory (RRAM) device structures such as Ag/HfO2/Au/Si were fabricated and I-V characteristics for the pristine and gamma-irradiated devices with a dose 24 kGy were measured. Further we have studied the thermal annealing effects, in the range of 100°-400°C in a tubular furnace for the HfO2/Au/Si samples. The X-ray diffraction (XRD), Rutherford Backscattering Spectrometry (RBS), field emission-scanning electron microscopy (FESEM) analysis measurements were performed to determine the thickness, crystallinity and stoichiometry of these films. The electrical characteristics such as resistive switching, endurance, retention time and switching speed were measured by a semiconductor device analyser. The effects of gamma irradiation on the switching properties of these RRAM devices have been studied.
Spatial nonuniformity in resistive-switching memory effects of NiO.
Oka, Keisuke; Yanagida, Takeshi; Nagashima, Kazuki; Kanai, Masaki; Kawai, Tomoji; Kim, Jin-Soo; Park, Bae Ho
2011-08-17
Electrically driven resistance change phenomenon in metal/NiO/metal junctions, so-called resistive switching (RS), is a candidate for next-generation universal nonvolatile memories. However, the knowledge as to RS mechanisms is unfortunately far from comprehensive, especially the spatial switching location, which is crucial information to design reliable devices. In this communication, we demonstrate the identification of the spatial switching location of bipolar RS by introducing asymmetrically passivated planar NiO nanowire junctions. We have successfully identified that the bipolar RS in NiO occurs near the cathode rather than the anode. This trend can be interpreted in terms of an electrochemical redox model based on ion migration and p-type conduction.
Gubicza, Agnes; Csontos, Miklós; Halbritter, András; Mihály, György
2015-03-14
The dynamics of resistive switchings in nanometer-scale metallic junctions formed between an inert metallic tip and an Ag film covered by a thin Ag2S layer are investigated. Our thorough experimental analysis and numerical simulations revealed that the resistance change upon a switching bias voltage pulse exhibits a strongly non-exponential behaviour yielding markedly different response times at different bias levels. Our results demonstrate the merits of Ag2S nanojunctions as nanometer-scale non-volatile memory cells with stable switching ratios, high endurance as well as fast response to write/erase, and an outstanding stability against read operations at technologically optimal bias and current levels.
NASA Astrophysics Data System (ADS)
Akhmedova, A. M.
2018-04-01
The behavior of an electronic subsystem is investigated in the course of formation and development of a memory channel in solid solutions of the TlInTe2-TlYbTe2 system. An analysis of the current-voltage characteristics allows getting an insight into the reason for a sharp change in electrical conductance of the specimens under study during their transition from the high-resistance to high-conductance state and the reasons for the well known instability of threshold converters, which makes it possible to design devices with high threshold voltage stability.
Novel Programmable Shape Memory Polystyrene Film: A Thermally Induced Beam-power Splitter.
Li, Peng; Han, Yu; Wang, Wenxin; Liu, Yanju; Jin, Peng; Leng, Jinsong
2017-03-09
Micro/nanophotonic structures that are capable of optical wave-front shaping are implemented in optical waveguides and passive optical devices to alter the phase of the light propagating through them. The beam division directions and beam power distribution depend on the design of the micro/nanostructures. The ultimate potential of advanced micro/nanophotonic structures is limited by their structurally rigid, functional singleness and not tunable against external impact. Here, we propose a thermally induced optical beam-power splitter concept based on a shape memory polystyrene film with programmable micropatterns. The smooth film exhibits excellent transparency with a transmittance of 95% in the visible spectrum and optical stability during a continuous heating process up to 90 °C. By patterning double sided shape memory polystyrene film into erasable and switchable micro-groove gratings, the transmission light switches from one designed light divided directions and beam-power distribution to another because of the optical diffraction effect of the shape changing micro gratings during the whole thermal activated recovery process. The experimental and theoretical results demonstrate a proof-of-principle of the beam-power splitter. Our results can be adapted to further extend the applications of micro/nanophotonic devices and implement new features in the nanophotonics.
Novel Programmable Shape Memory Polystyrene Film: A Thermally Induced Beam-power Splitter
Li, Peng; Han, Yu; Wang, Wenxin; Liu, Yanju; Jin, Peng; Leng, Jinsong
2017-01-01
Micro/nanophotonic structures that are capable of optical wave-front shaping are implemented in optical waveguides and passive optical devices to alter the phase of the light propagating through them. The beam division directions and beam power distribution depend on the design of the micro/nanostructures. The ultimate potential of advanced micro/nanophotonic structures is limited by their structurally rigid, functional singleness and not tunable against external impact. Here, we propose a thermally induced optical beam-power splitter concept based on a shape memory polystyrene film with programmable micropatterns. The smooth film exhibits excellent transparency with a transmittance of 95% in the visible spectrum and optical stability during a continuous heating process up to 90 °C. By patterning double sided shape memory polystyrene film into erasable and switchable micro-groove gratings, the transmission light switches from one designed light divided directions and beam-power distribution to another because of the optical diffraction effect of the shape changing micro gratings during the whole thermal activated recovery process. The experimental and theoretical results demonstrate a proof-of-principle of the beam-power splitter. Our results can be adapted to further extend the applications of micro/nanophotonic devices and implement new features in the nanophotonics. PMID:28276500
Gold fillings unravel the vacancy role in the phase transition of GeTe
NASA Astrophysics Data System (ADS)
Feng, Jinlong; Xu, Meng; Wang, Xiaojie; Lin, Qi; Cheng, Xiaomin; Xu, Ming; Tong, Hao; Miao, Xiangshui
2018-02-01
Phase change memory (PCM) is an important candidate for future memory devices. The crystalline phase of PCM materials contains abundant intrinsic vacancies, which plays an important role in the rapid phase transition upon memory switching. However, few experimental efforts have been invested to study these invisible entities. In this work, Au dopants are alloyed into the crystalline GeTe to fill the intrinsic Ge vacancies so that the role of these vacancies in the amorphization of GeTe can be indirectly studied. As a result, the reduction of Ge vacancies induced by Au dopants hampers the amorphization of GeTe as the activation energy of this process becomes higher. This is because the vacancy-interrupted lattice can be "repaired" by Au dopants with the recovery of bond connectivity. Our results demonstrate the importance of vacancies in the phase transition of chalcogenides, and we employ the percolation theory to explain the impact of these intrinsic defects on this vacancy-ridden crystal quantitatively. Specifically, the threshold of amorphization increases with the decrease in vacancies. The understanding of the vacancy effect sheds light on the long-standing puzzle of the mechanism of ultra-fast phase transition in PCMs. It also paves the way for designing low-power-consumption electronic devices by reducing the threshold of amorphization in chalcogenides.
Novel Programmable Shape Memory Polystyrene Film: A Thermally Induced Beam-power Splitter
NASA Astrophysics Data System (ADS)
Li, Peng; Han, Yu; Wang, Wenxin; Liu, Yanju; Jin, Peng; Leng, Jinsong
2017-03-01
Micro/nanophotonic structures that are capable of optical wave-front shaping are implemented in optical waveguides and passive optical devices to alter the phase of the light propagating through them. The beam division directions and beam power distribution depend on the design of the micro/nanostructures. The ultimate potential of advanced micro/nanophotonic structures is limited by their structurally rigid, functional singleness and not tunable against external impact. Here, we propose a thermally induced optical beam-power splitter concept based on a shape memory polystyrene film with programmable micropatterns. The smooth film exhibits excellent transparency with a transmittance of 95% in the visible spectrum and optical stability during a continuous heating process up to 90 °C. By patterning double sided shape memory polystyrene film into erasable and switchable micro-groove gratings, the transmission light switches from one designed light divided directions and beam-power distribution to another because of the optical diffraction effect of the shape changing micro gratings during the whole thermal activated recovery process. The experimental and theoretical results demonstrate a proof-of-principle of the beam-power splitter. Our results can be adapted to further extend the applications of micro/nanophotonic devices and implement new features in the nanophotonics.
ERIC Educational Resources Information Center
Card, Roger
The properties of an associative memory are examined in this paper from the viewpoint of automata theory. A device called an associative memory acceptor is studied under real-time operation. The family "L" of languages accepted by real-time associative memory acceptors is shown to properly contain the family of languages accepted by one-tape,…
Bae, Yoon Cheol; Lee, Ah Rahm; Baek, Gwang Ho; Chung, Je Bock; Kim, Tae Yoon; Park, Jea Gun; Hong, Jin Pyo
2015-01-01
Three-dimensional (3D) stackable memory devices including nano-scaled crossbar array are central for the realization of high-density non-volatile memory electronics. However, an essential sneak path issue affecting device performance in crossbar array remains a bottleneck and a grand challenge. Therefore, a suitable bidirectional selector as a two-way switch is required to facilitate a major breakthrough in the 3D crossbar array memory devices. Here, we show the excellent selectivity of all oxide p-/n-type semiconductor-based p-n-p open-based bipolar junction transistors as selectors in crossbar memory array. We report that bidirectional nonlinear characteristics of oxide p-n-p junctions can be highly enhanced by manipulating p-/n-type oxide semiconductor characteristics. We also propose an associated Zener tunneling mechanism that explains the unique features of our p-n-p selector. Our experimental findings are further extended to confirm the profound functionality of oxide p-n-p selectors integrated with several bipolar resistive switching memory elements working as storage nodes. PMID:26289565
Single-Event Effect Performance of a Conductive-Bridge Memory EEPROM
NASA Technical Reports Server (NTRS)
Chen, Dakai; Wilcox, Edward; Berg, Melanie; Kim, Hak; Phan, Anthony; Figueiredo, Marco; Seidleck, Christina; LaBel, Kenneth
2015-01-01
We investigated the heavy ion single-event effect (SEE) susceptibility of the industry’s first stand-alone memory based on conductive-bridge memory (CBRAM) technology. The device is available as an electrically erasable programmable read-only memory (EEPROM). We found that single-event functional interrupt (SEFI) is the dominant SEE type for each operational mode (standby, dynamic read, and dynamic write/read). SEFIs occurred even while the device is statically biased in standby mode. Worst case SEFIs resulted in errors that filled the entire memory space. Power cycle did not always clear the errors. Thus the corrupted cells had to be reprogrammed in some cases. The device is also vulnerable to bit upsets during dynamic write/read tests, although the frequency of the upsets are relatively low. The linear energy transfer threshold for cell upset is between 10 and 20 megaelectron volts per square centimeter per milligram, with an upper limit cross section of 1.6 times 10(sup -11) square centimeters per bit (95 percent confidence level) at 10 megaelectronvolts per square centimeter per milligram. In standby mode, the CBRAM array appears invulnerable to bit upsets.
Li, Dong; Chen, Mingyuan; Zong, Qijun; Zhang, Zengxing
2017-10-11
The Schottky junction is an important unit in electronics and optoelectronics. However, its properties greatly degrade with device miniaturization. The fast development of circuits has fueled a rapid growth in the study of two-dimensional (2D) crystals, which may lead to breakthroughs in the semiconductor industry. Here we report a floating-gate manipulated nonvolatile ambipolar Schottky junction memory from stacked all-2D layers of graphene-BP/h-BN/graphene (BP, black phosphorus; h-BN, hexagonal boron nitride) in a designed floating-gate field-effect Schottky barrier transistor configuration. By manipulating the voltage pulse applied to the control gate, the device exhibits ambipolar characteristics and can be tuned to act as graphene-p-BP or graphene-n-BP junctions with reverse rectification behavior. Moreover, the junction exhibits good storability properties of more than 10 years and is also programmable. On the basis of these characteristics, we further demonstrate the application of the device to dual-mode nonvolatile Schottky junction memories, memory inverter circuits, and logic rectifiers.
Zhang, Qi-Jian; Miao, Shi-Feng; Li, Hua; He, Jing-Hui; Li, Na-Jun; Xu, Qing-Feng; Chen, Dong-Yun; Lu, Jian-Mei
2017-06-19
Small-molecule-based multilevel memory devices have attracted increasing attention because of their advantages, such as super-high storage density, fast reading speed, light weight, low energy consumption, and shock resistance. However, the fabrication of small-molecule-based devices always requires expensive vacuum-deposition techniques or high temperatures for spin-coating. Herein, through rational tailoring of a previous molecule, DPCNCANA (4,4'-(6,6'-bis(2-octyl-1,3-dioxo-2,3-dihydro-1H-benzo[de]isoquinolin-6-yl)-9H,9'H-[3,3'-bicarbazole]-9,9'-diyl)dibenzonitrile), a novel bat-shaped A-D-A-type (A-D-A=acceptor-donor-acceptor) symmetric framework has been successfully synthesized and can be dissolved in common solvents at room temperature. Additionally, it has a low-energy bandgap and dense intramolecular stacking in the film state. The solution-processed memory devices exhibited high-performance nonvolatile multilevel data-storage properties with low switching threshold voltages of about -1.3 and -2.7 V, which is beneficial for low power consumption. Our result should prompt the study of highly efficient solution-processed multilevel memory devices in the field of organic electronics. © 2017 Wiley-VCH Verlag GmbH & Co. KGaA, Weinheim.
DOE Office of Scientific and Technical Information (OSTI.GOV)
Islam, Sk Masiul, E-mail: masiulelt@gmail.com; Chowdhury, Sisir; Sarkar, Krishnendu
2015-06-24
Ultra-thin InP passivated GaAs metal-oxide-semiconductor based non-volatile flash memory devices were fabricated using InAs quantum dots (QDs) as charge storing elements by metal organic chemical vapor deposition technique to study the efficacy of the QDs as charge storage elements. The grown QDs were embedded between two high-k dielectric such as HfO{sub 2} and ZrO{sub 2}, which were used for tunneling and control oxide layers, respectively. The size and density of the QDs were found to be 5 nm and 1.8×10{sup 11} cm{sup −2}, respectively. The device with a structure Metal/ZrO{sub 2}/InAs QDs/HfO{sub 2}/GaAs/Metal shows maximum memory window equivalent to 6.87 V. Themore » device also exhibits low leakage current density of the order of 10{sup −6} A/cm{sup 2} and reasonably good charge retention characteristics. The low value of leakage current in the fabricated memory device is attributed to the Coulomb blockade effect influenced by quantum confinement as well as reduction of interface trap states by ultra-thin InP passivation on GaAs prior to HfO{sub 2} deposition.« less
All-spin logic operations: Memory device and reconfigurable computing
NASA Astrophysics Data System (ADS)
Patra, Moumita; Maiti, Santanu K.
2018-02-01
Exploiting spin degree of freedom of electron a new proposal is given to characterize spin-based logical operations using a quantum interferometer that can be utilized as a programmable spin logic device (PSLD). The ON and OFF states of both inputs and outputs are described by spin state only, circumventing spin-to-charge conversion at every stage as often used in conventional devices with the inclusion of extra hardware that can eventually diminish the efficiency. All possible logic functions can be engineered from a single device without redesigning the circuit which certainly offers the opportunities of designing new generation spintronic devices. Moreover, we also discuss the utilization of the present model as a memory device and suitable computing operations with proposed experimental setups.
NASA Astrophysics Data System (ADS)
Ma, Zehao; Ooi, Poh Choon; Li, Fushan; Yun, Dong Yeol; Kim, Tae Whan
2015-10-01
Nonvolatile memory (NVM) devices based on a metal-insulator-metal structure consisting of CdSe/ZnS quantum dots embedded in polymethylsilsesquioxane dielectric layers were fabricated. The current-voltage ( I- V) curves showed a bistable current behavior and the presence of hysteresis. The current-time ( I- t) curves showed that the fabricated NVM memory devices were stable up to 1 × 104 s with a distinct ON/OFF ratio of 104 and were reprogrammable when the endurance test was performed. The extrapolation of the I- t curve to 105 s with corresponding current ON/OFF ratio 1 × 105 indicated a long performance stability of the NVM devices. Schottky emission, Poole-Frenkel emission, trapped-charge limited-current and Child-Langmuir law were proposed as the dominant conduction mechanisms for the fabricated NVM devices based on the obtained I- V characteristics.
Feasibility of self-structured current accessed bubble devices in spacecraft recording systems
NASA Technical Reports Server (NTRS)
Nelson, G. L.; Krahn, D. R.; Dean, R. H.; Paul, M. C.; Lo, D. S.; Amundsen, D. L.; Stein, G. A.
1985-01-01
The self-structured, current aperture approach to magnetic bubble memory is described. Key results include: (1) demonstration that self-structured bubbles (a lattice of strongly interacting bubbles) will slip by one another in a storage loop at spacings of 2.5 bubble diameters, (2) the ability of self-structured bubbles to move past international fabrication defects (missing apertures) in the propagation conductors (defeat tolerance), and (3) moving bubbles at mobility limited speeds. Milled barriers in the epitaxial garnet are discussed for containment of the bubble lattice. Experimental work on input/output tracks, storage loops, gates, generators, and magneto-resistive detectors for a prototype device are discussed. Potential final device architectures are described with modeling of power consumption, data rates, and access times. Appendices compare the self-structured bubble memory from the device and system perspectives with other non-volatile memory technologies.
Modeling and simulation of floating gate nanocrystal FET devices and circuits
NASA Astrophysics Data System (ADS)
Hasaneen, El-Sayed A. M.
The nonvolatile memory market has been growing very fast during the last decade, especially for mobile communication systems. The Semiconductor Industry Association International Technology Roadmap for Semiconductors states that the difficult challenge for nonvolatile semiconductor memories is to achieve reliable, low power, low voltage performance and high-speed write/erase. This can be achieved by aggressive scaling of the nonvolatile memory cells. Unfortunately, scaling down of conventional nonvolatile memory will further degrade the retention time due to the charge loss between the floating gate and drain/source contacts and substrate which makes conventional nonvolatile memory unattractive. Using nanocrystals as charge storage sites reduces dramatically the charge leakage through oxide defects and drain/source contacts. Floating gate nanocrystal nonvolatile memory, FG-NCNVM, is a candidate for future memory because it is advantageous in terms of high-speed write/erase, small size, good scalability, low-voltage, low-power applications, and the capability to store multiple bits per cell. Many studies regarding FG-NCNVMs have been published. Most of them have dealt with fabrication improvements of the devices and device characterizations. Due to the promising FG-NCNVM applications in integrated circuits, there is a need for circuit a simulation model to simulate the electrical characteristics of the floating gate devices. In this thesis, a FG-NCNVM circuit simulation model has been proposed. It is based on the SPICE BSIM simulation model. This model simulates the cell behavior during normal operation. Model validation results have been presented. The SPICE model shows good agreement with experimental results. Current-voltage characteristics, transconductance and unity gain frequency (fT) have been studied showing the effect of the threshold voltage shift (DeltaVth) due to nanocrystal charge on the device characteristics. The threshold voltage shift due to nanocrystal charge has a strong effect on the memory characteristics. Also, the programming operation of the memory cell has been investigated. The tunneling rate from quantum well channel to quantum dot (nanocrystal) gate is calculated. The calculations include various memory parameters, wavefunctions, and energies of quantum well channel and quantum dot gate. The use of floating gate nanocrystal memory as a transistor with a programmable threshold voltage has been demonstrated. The incorporation of FG-NCFETs to design programmable integrated circuit building blocks has been discussed. This includes the design of programmable current and voltage reference circuits. Finally, we demonstrated the design of tunable gain op-amp incorporating FG-NCFETs. Programmable integrated circuit building blocks can be used in intelligent analog and digital systems.
Camera memory study for large space telescope. [charge coupled devices
NASA Technical Reports Server (NTRS)
Hoffman, C. P.; Brewer, J. E.; Brager, E. A.; Farnsworth, D. L.
1975-01-01
Specifications were developed for a memory system to be used as the storage media for camera detectors on the large space telescope (LST) satellite. Detectors with limited internal storage time such as intensities charge coupled devices and silicon intensified targets are implied. The general characteristics are reported of different approaches to the memory system with comparisons made within the guidelines set forth for the LST application. Priority ordering of comparisons is on the basis of cost, reliability, power, and physical characteristics. Specific rationales are provided for the rejection of unsuitable memory technologies. A recommended technology was selected and used to establish specifications for a breadboard memory. Procurement scheduling is provided for delivery of system breadboards in 1976, prototypes in 1978, and space qualified units in 1980.
Combating Memory Corruption Attacks On Scada Devices
NASA Astrophysics Data System (ADS)
Bellettini, Carlo; Rrushi, Julian
Memory corruption attacks on SCADA devices can cause significant disruptions to control systems and the industrial processes they operate. However, despite the presence of numerous memory corruption vulnerabilities, few, if any, techniques have been proposed for addressing the vulnerabilities or for combating memory corruption attacks. This paper describes a technique for defending against memory corruption attacks by enforcing logical boundaries between potentially hostile data and safe data in protected processes. The technique encrypts all input data using random keys; the encrypted data is stored in main memory and is decrypted according to the principle of least privilege just before it is processed by the CPU. The defensive technique affects the precision with which attackers can corrupt control data and pure data, protecting against code injection and arc injection attacks, and alleviating problems posed by the incomparability of mitigation techniques. An experimental evaluation involving the popular Modbus protocol demonstrates the feasibility and efficiency of the defensive technique.
Reducing the stochasticity of crystal nucleation to enable subnanosecond memory writing
NASA Astrophysics Data System (ADS)
Rao, Feng; Ding, Keyuan; Zhou, Yuxing; Zheng, Yonghui; Xia, Mengjiao; Lv, Shilong; Song, Zhitang; Feng, Songlin; Ronneberger, Ider; Mazzarello, Riccardo; Zhang, Wei; Ma, Evan
2017-12-01
Operation speed is a key challenge in phase-change random-access memory (PCRAM) technology, especially for achieving subnanosecond high-speed cache memory. Commercialized PCRAM products are limited by the tens of nanoseconds writing speed, originating from the stochastic crystal nucleation during the crystallization of amorphous germanium antimony telluride (Ge2Sb2Te5). Here, we demonstrate an alloying strategy to speed up the crystallization kinetics. The scandium antimony telluride (Sc0.2Sb2Te3) compound that we designed allows a writing speed of only 700 picoseconds without preprogramming in a large conventional PCRAM device. This ultrafast crystallization stems from the reduced stochasticity of nucleation through geometrically matched and robust scandium telluride (ScTe) chemical bonds that stabilize crystal precursors in the amorphous state. Controlling nucleation through alloy design paves the way for the development of cache-type PCRAM technology to boost the working efficiency of computing systems.
Crystalline phase-stability of tantalum pentoxide
NASA Astrophysics Data System (ADS)
Walton, Santiago; Padilha, Antonio; Dalpian, Gustavo; Guillén, Jorge; Dalpian's Research Group Collaboration; Grupo de Estado Solido Collaboration; Gritad Collaboration
2013-03-01
Memristive devices are attractive candidates to provide a paradigm change in memory devices fabrication. These new devices would be faster, denser and less power consuming than those available today. However, the mechanism of memristance is not yet well understood. It is believed that a voltage/current-driven phase transition occurs in the material, which leads to significant changes in the device's conductivity. In the particular case of tantalum-oxide-based devices the relevant crystalline phases are still a matter of debate. Some of these phases are not even completely known and there is no agreement about which model best explains the crystallographic results. In this work we have performed ab-initio DFT based calculations to study the structural properties of different phases (and models) of Ta2O5 - the structure which is believed to exist inside Tantalum Oxide based devices. The equations of state for this material were constructed through first principles total energy calculations and we have also calculated the phonon frequencies at Γ. These results show that the most stable phase of this oxide (B-Ta2O5) is in fact composed of octahedral, instead of pentagonal (as L-Ta2O5) or hexagonal (as δ-Ta2O5) bipyramids. Fapesp, CNPq, Capes,CODI-UdeA
Soft errors in commercial off-the-shelf static random access memories
NASA Astrophysics Data System (ADS)
Dilillo, L.; Tsiligiannis, G.; Gupta, V.; Bosser, A.; Saigne, F.; Wrobel, F.
2017-01-01
This article reviews state-of-the-art techniques for the evaluation of the effect of radiation on static random access memory (SRAM). We detailed irradiation test techniques and results from irradiation experiments with several types of particles. Two commercial SRAMs, in 90 and 65 nm technology nodes, were considered as case studies. Besides the basic static and dynamic test modes, advanced stimuli for the irradiation tests were introduced, as well as statistical post-processing techniques allowing for deeper analysis of the correlations between bit-flip cross-sections and design/architectural characteristics of the memory device. Further insight is provided on the response of irradiated stacked layer devices and on the use of characterized SRAM devices as particle detectors.
1989-05-12
USA Resonant tunneling transistors and New III-V memory devices for new circuit architectures with reduced complexity F. Capasso, Bell. Murray Hill...the evaporation, or by selective oxidation of As, leaving metallic Ga clusters and b) the interdiffusive deterioration of metal contacts on GaAs...VEB (My) Resonant Tunneling Transistors and New III-V Memory Devices for New Circuit Architectures with Reduced Complexity . Invited: F. Capasso
Crystal that remembers: several ways to utilize nanocrystals in resistive switching memory
NASA Astrophysics Data System (ADS)
Banerjee, Writam; Liu, Qi; Long, Shibing; Lv, Hangbing; Liu, Ming
2017-08-01
The attractive usability of quantum phenomena in futuristic devices is possible by using zero-dimensional systems like nanocrystals (NCs). The performance of nonvolatile flash memory devices has greatly benefited from the use of NCs over recent decades. The quantum abilities of NCs have been used to improve the reliability of flash devices. Its appeal is extended to the design of emerging devices such as resistive random-access memory (RRAM), a technology where the use of silicon is optional. Here, we are going to review the recent progress in the design, characterization, and utilization of NCs in RRAM devices. We will first introduce the physical design of the RRAM devices using NCs and the improvement of electrical performance in NC-RRAM over conventional ones. In particular, special care has been taken to review the ways of development provided by the NCs in the RRAM devices. In a broad sense, the NCs can play a charge trapping role in the NC-RRAM structure or it can be responsible for the localization and improvement of the stability of the conductive filament or it can play a part in the formation of the conductive filament chain by the NC migration under applied bias. Finally, the scope of NCs in the RRAM devices has also been discussed.
Rizvi, Sanam Shahla; Chung, Tae-Sun
2010-01-01
Flash memory has become a more widespread storage medium for modern wireless devices because of its effective characteristics like non-volatility, small size, light weight, fast access speed, shock resistance, high reliability and low power consumption. Sensor nodes are highly resource constrained in terms of limited processing speed, runtime memory, persistent storage, communication bandwidth and finite energy. Therefore, for wireless sensor networks supporting sense, store, merge and send schemes, an efficient and reliable file system is highly required with consideration of sensor node constraints. In this paper, we propose a novel log structured external NAND flash memory based file system, called Proceeding to Intelligent service oriented memorY Allocation for flash based data centric Sensor devices in wireless sensor networks (PIYAS). This is the extended version of our previously proposed PIYA [1]. The main goals of the PIYAS scheme are to achieve instant mounting and reduced SRAM space by keeping memory mapping information to a very low size of and to provide high query response throughput by allocation of memory to the sensor data by network business rules. The scheme intelligently samples and stores the raw data and provides high in-network data availability by keeping the aggregate data for a longer period of time than any other scheme has done before. We propose effective garbage collection and wear-leveling schemes as well. The experimental results show that PIYAS is an optimized memory management scheme allowing high performance for wireless sensor networks.
Boyle, Anthony J.; Landsman, Todd L.; Wierzbicki, Mark A.; Nash, Landon D.; Hwang, Wonjun; Miller, Matthew W.; Tuzun, Egemen; Hasan, Sayyeda M.; Maitland, Duncan J.
2015-01-01
Current endovascular therapies for intracranial saccular aneurysms result in high recurrence rates due to poor tissue healing, coil compaction, and aneurysm growth. We propose treatment of saccular aneurysms using shape memory polymer (SMP) foam to improve clinical outcomes. SMP foam-over-wire (FOW) embolization devices were delivered to in vitro and in vivo porcine saccular aneurysm models to evaluate device efficacy, aneurysm occlusion, and acute clotting. FOW devices demonstrated effective delivery and stable implantation in vitro. In vivo porcine aneurysms were successfully occluded using FOW devices with theoretical volume occlusion values greater than 72% and rapid, stable thrombus formation. PMID:26227115
NASA Astrophysics Data System (ADS)
Beckmann, Karsten
Resistive random access memory (ReRAM or RRAM) is a novel form of non-volatile memory that is expected to play a major role in future computing and memory solutions. It has been shown that the resistance state of ReRAM devices can be precisely tuned by modulating switching voltages, by limiting peak current, and by adjusting the switching pulse properties. This enables the realization of novel applications such as memristive neuromorphic computing and neural network computing. I have developed two processes based on 100 and 300mm wafer platforms to demonstrate functional HfO2 based ReRAM devices. The first process is designed for a rapid materials engineering and device characterization, while the second is an advanced hybrid ReRAM/CMOS combination based on the IBM 65nm 10LPe process technology. The 100mm wafer efforts were used to show impacts of etch processes on ReRAM switching performance and the need for a rigorous structural evaluation of ReRAM devices before starting materials development. After an etch development, a bottom electrode comparison between the inert materials Pt, Ru and W was performed where Ru showed superior results with respect to yield and resilience against environmental impacts such as humidity over a 2-month period. A comparison of amorphous and crystalline devices showed no statistical difference in the performance with respect to random telegraph noise. This demonstrates, that the forming process fundamentally alters the crystallographic structure within and around the filament. The 300mm wafer development efforts were aimed towards implementing ReRAM in the FEOL, combined with CMOS, to yield a seamless process flow of 1 transistor 1 ReRAM structures (1T1R). This technology was customized with custom-developed tungsten metal 1 (M1) and dual tungsten/copper via 1 (V1) structures, within which the ReRAM stack is embedded. The ReRAM itself consists of an inert W bottom electrode, HfO2 based active switching layer, a Ti oxygen scavenger layer, and an inert TiN top electrode. Linear sweep and controlled pulse (down to 5 ns) based electrical characterization of 1 transistor 1 ReRAM (1T1R) elements was performed to determine key properties including endurance, reliability, and threshold voltages. We demonstrated endurance values above 1010 cycles with an average on/off ratio of 10, and pulse voltages for set/reset operation of +/-1.5V. The on-chip 1T1R structures show an excellent controllability with respect to the low and high resistive states by manipulating the peak current from 75 up to 350 mu?A resulting in 10 distinct low resistance states (LRS). Our results demonstrate that the set operation (which shifts the ReRAM device from the high to the low resistance state) is only dependent on the voltage of the switching pulse and the peak current limit. The reset operation, however, occurs in an analog fashion and appears to be dependent on the total energy of the applied switching pulse. Pulse energy was modulated by varying the peak voltage resulting in a larger relative change of the ReRAM device resistance. The incremental resistance changes are ideally suited to emulate synaptic weights for future implementation into neuromorphic architectures. Switching results from these devices were also used to develop a model time-delay physical unclonable function (PUF) circuit, which showed excellent performance when compared to a pure CMOS implementation with significant improvements in uniqueness, size and accuracy.
Bias voltage induced resistance switching effect in single-molecule magnets' tunneling junction.
Zhang, Zhengzhong; Jiang, Liang
2014-09-12
An electric-pulse-induced reversible resistance change effect in a molecular magnetic tunneling junction, consisting of a single-molecule magnet (SMM) sandwiched in one nonmagnetic and one ferromagnetic electrode, is theoretically investigated. By applying a time-varying bias voltage, the SMM's spin orientation can be manipulated with large bias voltage pulses. Moreover, the different magnetic configuration at high-resistance/low-resistance states can be 'read out' by utilizing relative low bias voltage. This device scheme can be implemented with current technologies (Khajetoorians et al 2013 Science 339 55) and has potential application in molecular spintronics and high-density nonvolatile memory devices.
NASA Astrophysics Data System (ADS)
Kim, Young Seok; Park, Ji Woon; Lee, Jong Ho; Choi, In Ah; Heo, Jaeyeong; Kim, Hyeong Joon
2017-10-01
The threshold switching mechanism of Te-SbO thin films with a unique microstructure in which a Te nanocluster is present in the SbO matrix is analyzed. During the electro-forming process, amorphous Te filaments are formed in the Te nanocluster. However, unlike conventional Ovonic threshold switching (TS) selector devices, it has been demonstrated that the off-current flows along the filament. Numerical calculations show that the off-current is due to the trap present in the filament. We also observed changes in TS parameters through controls in the strength or volume of the filaments.
Keles, Hasan O; Radoman, Milena; Pachas, Gladys N; Evins, A Eden; Gilman, Jodi M
2017-01-01
Intoxication from cannabis impairs cognitive performance, in part due to the effects of Δ9-tetrahydrocannabinol (THC, the primary psychoactive compound in cannabis) on prefrontal cortex (PFC) function. However, a relationship between impairment in cognitive functioning with THC administration and THC-induced change in hemodynamic response has not been demonstrated. We explored the feasibility of using functional near-infrared spectroscopy (fNIRS) to examine the functional changes of the human PFC associated with cannabis intoxication and cognitive impairment. Eighteen adult regular cannabis users (final sample, n = 13) performed a working memory task ( n -back) during fNIRS recordings, before and after receiving a single dose of oral synthetic THC (dronabinol; 20-50 mg). Functional data were collected using a continuous-wave NIRS device, in which 8 Sources and 7 detectors were placed on the forehead, resulting in 20 channels covering PFC regions. Physiological changes and subjective intoxication measures were collected. We found a significant increase in the oxygenated hemoglobin (HbO) concentration after THC administration in several channels on the PFC during both the high working memory load (2-back) and the low working memory load (0-back) condition. The increased HbO response was accompanied by a trend toward an increased number of omission errors after THC administration. The current study suggests that cannabis intoxication is associated with increases in hemodynamic blood flow to the PFC, and that this increase can be detected with fNIRS.
Multi-layered nanocomposite dielectrics for high density organic memory devices
NASA Astrophysics Data System (ADS)
Kang, Moonyeong; Chung, Kyungwha; Baeg, Kang-Jun; Kim, Dong Ha; Kim, Choongik
2015-01-01
We fabricated organic memory devices with metal-pentacene-insulator-silicon structure which contain double dielectric layers comprising 3D pattern of Au nanoparticles (Au NPs) and block copolymer (PS-b-P2VP). The role of Au NPs is to charge/discharge carriers upon applied voltage, while block copolymer helps to form highly ordered Au NP patterns in the dielectric layer. Double-layered nanocomposite dielectrics enhanced the charge trap density (i.e., trapped charge per unit area) by Au NPs, resulting in increase of the memory window (ΔVth).
FinFET memory cell improvements for higher immunity against single event upsets
NASA Astrophysics Data System (ADS)
Sajit, Ahmed Sattar
The 21st century is witnessing a tremendous demand for transistors. Life amenities have incorporated the transistor in every aspect of daily life, ranging from toys to rocket science. Day by day, scaling down the transistor is becoming an imperious necessity. However, it is not a straightforward process; instead, it faces overwhelming challenges. Due to these scaling changes, new technologies, such as FinFETs for example, have emerged as alternatives to the conventional bulk-CMOS technology. FinFET has more control over the channel, therefore, leakage current is reduced. FinFET could bridge the gap between silicon devices and non-silicon devices. The semiconductor industry is now incorporating FinFETs in systems and subsystems. For example, Intel has been using them in their newest processors, delivering potential saving powers and increased speeds to memory circuits. Memory sub-systems are considered a vital component in the digital era. In memory, few rows are read or written at a time, while the most rows are static; hence, reducing leakage current increases the performance. However, as a transistor shrinks, it becomes more vulnerable to the effects from radioactive particle strikes. If a particle hits a node in a memory cell, the content might flip; consequently, leading to corrupting stored data. Critical fields, such as medical and aerospace, where there are no second chances and cannot even afford to operate at 99.99% accuracy, has induced me to find a rigid circuit in a radiated working environment. This research focuses on a wide spectrum of memories such as 6T SRAM, 8T SRAM, and DICE memory cells using FinFET technology and finding the best platform in terms of Read and Write delay, susceptibility level of SNM, RSNM, leakage current, energy consumption, and Single Event Upsets (SEUs). This research has shown that the SEU tolerance that 6T and 8T FinFET SRAMs provide may not be acceptable in medical and aerospace applications where there is a very high likelihood of SEUs. Consequently, FinFET DICE memory can be a good candidate due to its high ability to tolerate SEUs of different amplitudes and long periods for both read and hold operations.
Evald, Lars
2015-01-01
Use of assistive devices has been shown to be beneficial as a compensatory memory strategy among brain injury survivors, but little is known about possible advantages and disadvantages of the technology. As part of an intervention study participants were interviewed about their experiences with the use of low-cost, off-the-shelf, unmodified smartphones combined with Internet calendars as a compensatory memory strategy. Thirteen community-dwelling patients with traumatic brain injury (TBI) received a 6-week group-based instruction in the systematic use of a smartphone as a memory compensatory aid followed by a brief structured open-ended interview regarding satisfaction with and advantages and disadvantages of the compensatory strategy. Ten of 13 participants continued to use a smartphone as their primary compensatory strategy. Audible and visual reminders were the most frequently mentioned advantages of the smartphone, and, second, the capability as an all-in-one memory device. In contrast, battery life was the most often mentioned disadvantage, followed by concerns about loss or failure of the device. Use of a smartphone seems to be a satisfactory compensatory memory strategy to many patients with TBI and smartphones come with features that are advantageous to other compensatory strategies. However, some benefits come hand-in-hand with drawbacks, such as the feeling of dependency. These aspects should be taken into account when choosing assistive technology as a memory compensatory strategy.