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Sample records for circuit asic application

  1. ASIC Readout Circuit Architecture for Large Geiger Photodiode Arrays

    NASA Technical Reports Server (NTRS)

    Vasile, Stefan; Lipson, Jerold

    2012-01-01

    The objective of this work was to develop a new class of readout integrated circuit (ROIC) arrays to be operated with Geiger avalanche photodiode (GPD) arrays, by integrating multiple functions at the pixel level (smart-pixel or active pixel technology) in 250-nm CMOS (complementary metal oxide semiconductor) processes. In order to pack a maximum of functions within a minimum pixel size, the ROIC array is a full, custom application-specific integrated circuit (ASIC) design using a mixed-signal CMOS process with compact primitive layout cells. The ROIC array was processed to allow assembly in bump-bonding technology with photon-counting infrared detector arrays into 3-D imaging cameras (LADAR). The ROIC architecture was designed to work with either common- anode Si GPD arrays or common-cathode InGaAs GPD arrays. The current ROIC pixel design is hardwired prior to processing one of the two GPD array configurations, and it has the provision to allow soft reconfiguration to either array (to be implemented into the next ROIC array generation). The ROIC pixel architecture implements the Geiger avalanche quenching, bias, reset, and time to digital conversion (TDC) functions in full-digital design, and uses time domain over-sampling (vernier) to allow high temporal resolution at low clock rates, increased data yield, and improved utilization of the laser beam.

  2. SIDECAR ASIC firmware for astronomy applications

    NASA Astrophysics Data System (ADS)

    Chen, Jing; Loose, Markus; Ricardo, Raphael; Beletic, James; Farris, Mark; Xu, Min; Wong, Andre; Cabelli, Craig

    2014-07-01

    The SIDECAR ASIC is a fully integrated system-on-a-chip focal plane array controller that offers low power and low noise, small size and low weight. It has been widely used to operate different image sensors for ground-based and flightbased astronomy applications. A key mechanism to operating analog detectors is the SIDECAR ASIC's high level of programmability. This paper gives an overview of the SIDECAR ASIC architecture, including its optimized microcontroller featuring a customized instruction set. It describes the firmware components, including timing generation, biasing, commanding, housekeeping and synchronization of multiple detectors. The firmware development tools including compiler and supporting development environment and hardware setup are presented. The firmware capability for ground-based HxRG applications and for flight-based applications like the James Webb Space Telescope (JWST), the repair of the Advanced Camera for Surveys (ACS), and others are also discussed.

  3. Rad-Hard Structured ASIC Body of Knowledge

    NASA Technical Reports Server (NTRS)

    Heidecker, Jason

    2013-01-01

    Structured Application-Specific Integrated Circuit (ASIC) technology is a platform between traditional ASICs and Field-Programmable Gate Arrays (FPGA). The motivation behind structured ASICs is to combine the low nonrecurring engineering costs (NRE) costs of FPGAs with the high performance of ASICs. This report provides an overview of the structured ASIC platforms that are radiation-hardened and intended for space application

  4. ASIC design at Fermilab

    SciTech Connect

    Yarema, R.

    1991-06-01

    In the past few years, ASIC (Application Specific Integrated Circuit) design has become important at Fermilab. The purpose of this paper is to present an overview of the in-house ASIC design activity which has taken place. This design effort has added much value to the high energy physics program and physics capability at Fermilab. The two approaches to ASIC development being pursued at Fermilab are examined by looking at some of the types of projects where ASICs are being used or contemplated. To help estimate the cost of future designs, a cost comparison is given to show the relative development and production expenses for these two ASIC approaches. 5 refs., 14 figs., 7 tabs.

  5. Low-power clock distribution circuits for the Macro Pixel ASIC

    NASA Astrophysics Data System (ADS)

    Gaioni, L.; De Canio, F.; Manghisoni, M.; Ratti, L.; Re, V.; Traversi, G.; Marchioro, A.; Kloukinas, K.

    2015-01-01

    Clock distribution circuits account for a significant fraction of the power dissipation of the Macro Pixel ASIC (MPA), designed for the pixel layer readout of the so-called Pixel-Strip module in the innermost part of the CMS tracker at the HL-LHC. This work reviews different CMOS circuit architectures envisioned for low power clock distribution in the MPA. Two main topologies will be discussed, based on standard supply voltage and on auxiliary, reduced supply. Circuit performance, in terms of power consumption and speed, is evaluated for each of the proposed solutions and compared with that relevant to standard CMOS drivers.

  6. Design and test of clock distribution circuits for the Macro Pixel ASIC

    NASA Astrophysics Data System (ADS)

    Gaioni, L.; De Canio, F.; Manghisoni, M.; Ratti, L.; Re, V.; Traversi, G.

    2016-07-01

    Clock distribution circuits account for a significant fraction of the power dissipation of the Macro Pixel ASIC (MPA), designed for the pixel layer readout of the so-called Pixel-Strip module in the innermost part of the CMS tracker at the High Luminosity LHC. A test chip including low power clock distribution circuits of the MPA has been designed in a 65 nm CMOS technology and thoroughly tested. This work summarizes the experimental results relevant to the prototype chip, focusing particularly on the power and speed performance and compares such results with those coming from circuit simulations.

  7. Accessibility of applications specific integrated circuits

    NASA Astrophysics Data System (ADS)

    Strip, D. R.

    1986-03-01

    Applications specific integrated circuits (ASICs) open new design opportunities in Sandia component applications. ASICs can be used to overcome many of the constraints that reduce system functionality in Sandia systems. Key constraints in our environment are power consumption, volume, weight, speed, and radiation-hardness. In addition, use of ASICs may reduce the costs of system design, acquisition, and life-cycle maintenance. Design tools for integrated circuits are rapidly simplifying the design of integrated circuits. Just as high level computer languages enabled applications-oriented computer users to take control of their own code development after assembly coding had limited the practicality of user design, in ICC design tools and approaches are enabling the applications-oriented user to design an ASIC with modest training and in a short time period. In order to demonstrate the state of the design systems, we have selected a representative application and, without any formal training or experience in IC design, have designed and fabricated an ASIC. This report details the steps that were followed and the time they took. It is important to emphasize that this project was the first chip designed start-to-finish on the Mentor design stations in Organization 2110; therefore most of the problems encountered were typical of a first pass through a new system. Most of the problems were quickly wrung out by the CAD tools staff; future users of the system should not expect to have the problems recur.

  8. An Energy-Efficient ASIC for Wireless Body Sensor Networks in Medical Applications.

    PubMed

    Xiaoyu Zhang; Hanjun Jiang; Lingwei Zhang; Chun Zhang; Zhihua Wang; Xinkai Chen

    2010-02-01

    An energy-efficient application-specific integrated circuit (ASIC) featured with a work-on-demand protocol is designed for wireless body sensor networks (WBSNs) in medical applications. Dedicated for ultra-low-power wireless sensor nodes, the ASIC consists of a low-power microcontroller unit (MCU), a power-management unit (PMU), reconfigurable sensor interfaces, communication ports controlling a wireless transceiver, and an integrated passive radio-frequency (RF) receiver with energy harvesting ability. The MCU, together with the PMU, provides quite flexible communication and power-control modes for energy-efficient operations. The always-on passive RF receiver with an RF energy harvesting block offers the sensor nodes the capability of work-on-demand with zero standby power. Fabricated in standard 0.18-¿m complementary metal-oxide semiconductor technology, the ASIC occupies a die area of 2 mm × 2.5 mm. A wireless body sensor network sensor-node prototype using this ASIC only consumes < 10-nA current under the passive standby mode, and < 10 ¿A under the active standby mode, when supplied by a 3-V battery. PMID:23853305

  9. A Batteryless Sensor ASIC for Implantable Bio-Impedance Applications.

    PubMed

    Rodriguez, Saul; Ollmar, Stig; Waqar, Muhammad; Rusu, Ana

    2016-06-01

    The measurement of the biological tissue's electrical impedance is an active research field that has attracted a lot of attention during the last decades. Bio-impedances are closely related to a large variety of physiological conditions; therefore, they are useful for diagnosis and monitoring in many medical applications. Measuring living tissues, however, is a challenging task that poses countless technical and practical problems, in particular if the tissues need to be measured under the skin. This paper presents a bio-impedance sensor ASIC targeting a battery-free, miniature size, implantable device, which performs accurate 4-point complex impedance extraction in the frequency range from 2 kHz to 2 MHz. The ASIC is fabricated in 150 nm CMOS, has a size of 1.22 mm × 1.22 mm and consumes 165 μA from a 1.8 V power supply. The ASIC is embedded in a prototype which communicates with, and is powered by an external reader device through inductive coupling. The prototype is validated by measuring the impedances of different combinations of discrete components, measuring the electrochemical impedance of physiological solution, and performing ex vivo measurements on animal organs. The proposed ASIC is able to extract complex impedances with around 1 Ω resolution; therefore enabling accurate wireless tissue measurements. PMID:26372646

  10. Full-thickness Backside Circuit Editing for ASICS on Laminated Packages

    NASA Astrophysics Data System (ADS)

    Niles, David W.; Kee, Ronald W.; Rue, Chad

    2010-08-01

    The traditional backside circuit editing strategy on flip chip semiconducting parts comprises approximately 30 min of de-soldering to remove the capacitors and 60 min of polishing to remove 600 μm of bulk Si in preparation for the focused ion beam. Flip chip parts mounted on laminated ball grid array packages have the horrible tendency to crack when polished on a polishing wheel to remove the bulk Si. The formation of cracks has driven the need for a full-thickness backside circuit editing strategy. The authors present a description of the full-thickness backside circuit editing strategy on laminated substrates used for 90/65/40 nm circuit edit work on advanced ASIC circuits at Avago Technologies. In contrast to a part thinning strategy, removal of 600 μm of bulk Si with XeF2-enhanced trenching eliminates the removal of capacitors, the polishing step, and the need for functional testing. The time to remove 600 μm of bulk Si with XeF2-enhanced etching is approximately 150 min, making a full-thickness backside circuit editing process competitive with the traditional backside circuit editing process.

  11. ASIC design of a digital fuzzy system on chip for medical diagnostic applications.

    PubMed

    Roy Chowdhury, Shubhajit; Roy, Aniruddha; Saha, Hiranmay

    2011-04-01

    The paper presents the ASIC design of a digital fuzzy logic circuit for medical diagnostic applications. The system on chip under consideration uses fuzzifier, memory and defuzzifier for fuzzifying the patient data, storing the membership function values and defuzzifying the membership function values to get the output decision. The proposed circuit uses triangular trapezoidal membership functions for fuzzification patients' data. For minimizing the transistor count, the proposed circuit uses 3T XOR gates and 8T adders for its design. The entire work has been carried out using TSMC 0.35 µm CMOS process. Post layout TSPICE simulation of the whole circuit indicates a delay of 31.27 ns and the average power dissipation of the system on chip is 123.49 mW which indicates a less delay and less power dissipation than the comparable embedded systems reported earlier.

  12. A 1.0 V 78 mircoW reconfigurable ASIC embedded in an intelligent electrode for continuous remote ECG applications.

    PubMed

    Yang, Geng; Chen, Jian; Jonsson, Fredrik; Tenhunen, Hannu; Zheng, Li-Rong

    2009-01-01

    In this paper, a reconfigurable, low-power Application Specific Integrated Circuit (ASIC) that extracts and transmits electrocardiograph (ECG) signals is presented. An Intelligent Electrode is introduced which consists of the proposed ASIC and a micro spike array, permitting onsite ECG signal acquisition, processing and transmission. Fabricated in a standard 0.18 microm CMOS process, the ASIC consumes 78 microW with 1.0 V core voltage at 6 MHz operating frequency and only occupies 2.25 mm(2). The tiny silicon size makes it possible and suitable to embed the proposed ASIC into an Intelligent Electrode, and the low power consumption makes it feasible for long term continuous ECG monitoring. PMID:19965175

  13. Development of a CdTe pixel detector with a window comparator ASIC for high energy X-ray applications

    NASA Astrophysics Data System (ADS)

    Hirono, T.; Toyokawa, H.; Furukawa, Y.; Honma, T.; Ikeda, H.; Kawase, M.; Koganezawa, T.; Ohata, T.; Sato, M.; Sato, G.; Takagaki, M.; Takahashi, T.; Watanabe, S.

    2011-09-01

    We have developed a photon-counting-type CdTe pixel detector (SP8-01). SP8-01 was designed as a prototype of a high-energy X-ray imaging detector for experiments using synchrotron radiation. SP8-01 has a CdTe sensor of 500 μm thickness, which has an absorption efficiency of almost 100% up to 50 keV and 45% even at 100 keV. A full-custom application specific integrated circuit (ASIC) was designed as a readout circuit of SP8-01, which is equipped with a window-type discriminator. The upper discriminator realizes a low-background measurement, because X-ray beams from the monochromator contain higher-order components beside the fundamental X-rays in general. ASIC chips were fabricated with a TSMC 0.25 μm CMOS process, and CdTe sensors were bump-bonded to the ASIC chips by a gold-stud bonding technique. Beam tests were performed at SPring-8. SP8-01 detected X-rays up to 120 keV. The capability of SP8-01 as an imaging detector for high-energy X-ray synchrotron radiation was evaluated with its performance characteristics.

  14. SODR Memory Control Buffer Control ASIC

    NASA Technical Reports Server (NTRS)

    Hodson, Robert F.

    1994-01-01

    The Spacecraft Optical Disk Recorder (SODR) is a state of the art mass storage system for future NASA missions requiring high transmission rates and a large capacity storage system. This report covers the design and development of an SODR memory buffer control applications specific integrated circuit (ASIC). The memory buffer control ASIC has two primary functions: (1) buffering data to prevent loss of data during disk access times, (2) converting data formats from a high performance parallel interface format to a small computer systems interface format. Ten 144 p in, 50 MHz CMOS ASIC's were designed, fabricated and tested to implement the memory buffer control function.

  15. Low noise multichannel circuits for physics and biology applications

    NASA Astrophysics Data System (ADS)

    Grybos, Pawel

    2005-09-01

    Experimental techniques in physics, material science, biology and medicine want to gain profit from the advantages of the VLSI technology by using a new generation of electronic measurement systems based on parallel signal processing from the multielement sensors. In most cases key problems for building such system are multichannel mixed-mode Application Specific Integrated Circuits, which are capable to process small amplitude signals from multielement sensor. In this class of integrated circuits several important problems like power limitation, low level of noise, good matching performance and crosstalk effects must be solved simultaneously. This presentation shows two ASICs which, given the original solutions implemented and their universal properties, can be used in different applications and are significant milestones in experimental techniques. The first presented ASIC is the 64-channel charge amplifier with binary readout architecture for a low energy X-ray imaging techniques. This integrated circuit connected to silicon strip detector can be used in powder diffractometry and then it reduces the measurement time by two order of magnitude. The second presented ASIC is multichannel low noise readout for extracellular neural recording, which is able to cope with extracellular neuronal recording for the systems comprising several hundreds of electrodes. Important steps forward in this design are a novel solution for band-pass filters for low frequency range, which follow requirements for good matching, low power and small silicon area. This ASIC can be used to monitor the neural activity of such complicated system like retina or brain.

  16. An Energy efficient application specific integrated circuit for electrocardiogram feature detection and its potential for ambulatory cardiovascular disease detection.

    PubMed

    Jain, Sanjeev Kumar; Bhaumik, Basabi

    2016-03-01

    A novel algorithm based on forward search is developed for real-time electrocardiogram (ECG) signal processing and implemented in application specific integrated circuit (ASIC) for QRS complex related cardiovascular disease diagnosis. The authors have evaluated their algorithm using MIT-BIH database and achieve sensitivity of 99.86% and specificity of 99.93% for QRS complex peak detection. In this Letter, Physionet PTB diagnostic ECG database is used for QRS complex related disease detection. An ASIC for cardiovascular disease detection is fabricated using 130-nm CMOS high-speed process technology. The area of the ASIC is 0.5 mm(2). The power dissipation is 1.73 μW at the operating frequency of 1 kHz with a supply voltage of 0.6 V. The output from the ASIC is fed to their Android application that generates diagnostic report and can be sent to a cardiologist through email. Their ASIC result shows average failed detection rate of 0.16% for six leads data of 290 patients in PTB diagnostic ECG database. They also have implemented a low-leakage version of their ASIC. The ASIC dissipates only 45 pJ with a supply voltage of 0.9 V. Their proposed ASIC is most suitable for energy efficient telemetry cardiovascular disease detection system. PMID:27284458

  17. An Energy efficient application specific integrated circuit for electrocardiogram feature detection and its potential for ambulatory cardiovascular disease detection.

    PubMed

    Jain, Sanjeev Kumar; Bhaumik, Basabi

    2016-03-01

    A novel algorithm based on forward search is developed for real-time electrocardiogram (ECG) signal processing and implemented in application specific integrated circuit (ASIC) for QRS complex related cardiovascular disease diagnosis. The authors have evaluated their algorithm using MIT-BIH database and achieve sensitivity of 99.86% and specificity of 99.93% for QRS complex peak detection. In this Letter, Physionet PTB diagnostic ECG database is used for QRS complex related disease detection. An ASIC for cardiovascular disease detection is fabricated using 130-nm CMOS high-speed process technology. The area of the ASIC is 0.5 mm(2). The power dissipation is 1.73 μW at the operating frequency of 1 kHz with a supply voltage of 0.6 V. The output from the ASIC is fed to their Android application that generates diagnostic report and can be sent to a cardiologist through email. Their ASIC result shows average failed detection rate of 0.16% for six leads data of 290 patients in PTB diagnostic ECG database. They also have implemented a low-leakage version of their ASIC. The ASIC dissipates only 45 pJ with a supply voltage of 0.9 V. Their proposed ASIC is most suitable for energy efficient telemetry cardiovascular disease detection system.

  18. An Energy efficient application specific integrated circuit for electrocardiogram feature detection and its potential for ambulatory cardiovascular disease detection

    PubMed Central

    Bhaumik, Basabi

    2016-01-01

    A novel algorithm based on forward search is developed for real-time electrocardiogram (ECG) signal processing and implemented in application specific integrated circuit (ASIC) for QRS complex related cardiovascular disease diagnosis. The authors have evaluated their algorithm using MIT-BIH database and achieve sensitivity of 99.86% and specificity of 99.93% for QRS complex peak detection. In this Letter, Physionet PTB diagnostic ECG database is used for QRS complex related disease detection. An ASIC for cardiovascular disease detection is fabricated using 130-nm CMOS high-speed process technology. The area of the ASIC is 0.5 mm2. The power dissipation is 1.73 μW at the operating frequency of 1 kHz with a supply voltage of 0.6 V. The output from the ASIC is fed to their Android application that generates diagnostic report and can be sent to a cardiologist through email. Their ASIC result shows average failed detection rate of 0.16% for six leads data of 290 patients in PTB diagnostic ECG database. They also have implemented a low-leakage version of their ASIC. The ASIC dissipates only 45 pJ with a supply voltage of 0.9 V. Their proposed ASIC is most suitable for energy efficient telemetry cardiovascular disease detection system. PMID:27284458

  19. Command Interface ASIC - Analog Interface ASIC Chip Set

    NASA Technical Reports Server (NTRS)

    Ruiz, Baldes; Jaffe, Burton; Burke, Gary; Lung, Gerald; Pixler, Gregory; Plummer, Joe; Katanyoutanant,, Sunant; Whitaker, William

    2003-01-01

    A command interface application-specific integrated circuit (ASIC) and an analog interface ASIC have been developed as a chip set for remote actuation and monitoring of a collection of switches, which can be used to control generic loads, pyrotechnic devices, and valves in a high-radiation environment. The command interface ASIC (CIA) can be used alone or in combination with the analog interface ASIC (AIA). Designed primarily for incorporation into spacecraft control systems, they are also suitable for use in high-radiation terrestrial environments (e.g., in nuclear power plants and facilities that process radioactive materials). The primary role of the CIA within a spacecraft or other power system is to provide a reconfigurable means of regulating the power bus, actuating all valves, firing all pyrotechnic devices, and controlling the switching of power to all switchable loads. The CIA is a mixed-signal (analog and digital) ASIC that includes an embedded microcontroller with supporting fault-tolerant switch control and monitoring circuitry that is capable of connecting to a redundant set of interintegrated circuit (I(sup 2)C) buses. Commands and telemetry requests are communicated to the CIA. Adherence to the I(sup 2)C bus standard helps to reduce development costs by facilitating the use of previously developed, commercially available components. The AIA is a mixed-signal ASIC that includes the analog circuitry needed to connect the CIA to a custom higher powered version of the I(sup 2)C bus. The higher-powered version is designed to enable operation with bus cables longer than those contemplated in the I(sup 2)C standard. If there are multiple higher-power I(sup 2)C-like buses, then there must an AIA between the CIA and each such bus. The AIA includes two identical interface blocks: one for the side-A I(sup 2)C clock and data buses and the other for the side B buses. All the AIAs on each side are powered from a common power converter module (PCM). Sides A and B

  20. Optical link ASICs for LHC upgrades

    NASA Astrophysics Data System (ADS)

    Gan, K. K.; Kagan, H. P.; Kass, R. D.; Moore, J. R.; Smith, D. S.

    2011-05-01

    We have designed three ASICs for possible applications in a new pixel layer (insertable B-layer or IBL) for the ATLAS detector for the first phase of the LHC luminosity upgrade. The ASICs are a high-speed driver for the vertical-cavity surface-emitting laser (VCSEL), a receiver/decoder to decode the signal received at the PIN diode to extract the data and clock, and a clock multiplier to produce a higher frequency clock to serialize the data for transmission. These ASICs were designed using a 130 nm CMOS process to enhance the radiation-hardness. We have characterized the ASICs and the submission has been mostly successful. We irradiated the ASICs with 24 GeV/c protons at CERN to a dosage of 70 Mrad. We observed no significant degradation except the driver circuit in the VCSEL driver fabricated using the thick oxide process in order to provide sufficient voltage to drive a VCSEL. The degradation is due to the radiation induced large threshold shifts in the PMOS transistors used.

  1. STiC — a mixed mode silicon photomultiplier readout ASIC for time-of-flight applications

    NASA Astrophysics Data System (ADS)

    Harion, T.; Briggl, K.; Chen, H.; Fischer, P.; Gil, A.; Kiworra, V.; Ritzert, M.; Schultz-Coulon, H.-C.; Shen, W.; Stankova, V.

    2014-02-01

    STiC is an application specific integrated circuit (ASIC) for the readout of silicon photomultipliers. The chip has been designed to provide a very high timing resolution for time-of-flight applications in medical imaging and particle physics. It is dedicated in particular to the EndoToFPET-US project, which is developing an endoscopic PET detector combined with ultrasound imaging for early pancreas and prostate cancer detection. This PET system aims to provide a spatial resolution of 1 mm and a time-of-flight resolution of 200 ps FWHM. The analog frontend of STiC can use either a differential or single ended connection to the SiPM. The time and energy information of the detector signal is encoded into two time stamps. A special linearized time-over-threshold method is used to obtain a linear relation between the signal charge and the measured signal width, improving the energy resolution. The trigger signals are digitized by an integrated TDC module with a resolution of less than 20 ps. The TDC data is stored in an internal memory and transfered over a 160 MBit/s serial link using 8/10 bit encoding. First coincidence measurements using a 3.1 × 3.1 × 15 mm3 LYSO crystal and a S10362-33-50 Hamamtsu MPPC show a coincidence time resolution of less than 285 ps. We present details on the chip design as well as first characterization measurements.

  2. Multichannel readout ASIC design flow for high energy physics and cosmic rays experiments

    NASA Astrophysics Data System (ADS)

    Voronin, A.; Malankin, E.

    2016-02-01

    In the large-scale high energy physics and astrophysics experiments multi-channel readout application specific integrated circuits (ASICs) are widely used. The ASICs for such experiments are complicated systems, which usually include both analog and digital building blocks. The complexity and large number of channels in such ASICs require the proper methodological approach to their design. The paper represents the mixed-signal design flow of the ASICs for high energy physics and cosmic rays experiments. This flow was successfully embedded to the development of the read-out ASIC prototype for the muon chambers of the CBM experiment. The approach was approved in UMC CMOS MMRF 180 nm process. The design flow enable to analyse the mixed-signal system operation on the different levels: functional, behavioural, schematic and post layout including parasitic elements. The proposed design flow allows reducing the simulation period and eliminating the functionality mismatches on the very early stage of the design.

  3. A 2D 4×4 Channel Readout ASIC for Pixelated CdTe Detectors for Medical Imaging Applications

    PubMed Central

    Macias-Montero, Jose-Gabriel; Sarraj, Maher; Chmeissani, Mokhtar; Martínez, Ricardo; Puigdengoles, Carles

    2015-01-01

    We present a 16-channel readout integrated circuit (ROIC) with nanosecond-resolution time to digital converter (TDC) for pixelated Cadmium Telluride (CdTe) gamma-ray detectors. The 4 × 4 pixel array ROIC is the proof of concept of the 10 × 10 pixel array readout ASIC for positron-emission tomography (PET) scanner, positron-emission mammography (PEM) scanner, and Compton gamma camera. The electronics of each individual pixel integrates an analog front-end with switchable gain, an analog to digital converter (ADC), configuration registers, and a 4-state digital controller. For every detected photon, the pixel electronics provides the energy deposited in the detector with 10-bit resolution, and a fast trigger signal for time stamp. The ASIC contains the 16-pixel matrix electronics, a digital controller, five global voltage references, a TDC, a temperature sensor, and a band-gap based current reference. The ASIC has been fabricated with TSMC 0.25 μm mixed-signal CMOS technology and occupies an area of 5.3 mm × 6.8 mm. The TDC shows a resolution of 95.5 ps, a precision of 600 ps at full width half maximum (FWHM), and a power consumption of 130 μW. In acquisition mode, the total power consumption of every pixel is 200 μW. An equivalent noise charge (ENC) of 160 e−RMS at maximum gain and negative polarity conditions has been measured at room temperature. PMID:26744545

  4. Thermal Radiometer Signal Processing Using Radiation Hard CMOS Application Specific Integrated Circuits for Use in Harsh Planetary Environments

    NASA Technical Reports Server (NTRS)

    Quilligan, G.; DuMonthier, J.; Aslam, S.; Lakew, B.; Kleyner, I.; Katz, R.

    2015-01-01

    Thermal radiometers such as proposed for the Europa Clipper flyby mission require low noise signal processing for thermal imaging with immunity to Total Ionizing Dose (TID) and Single Event Latchup (SEL). Described is a second generation Multi- Channel Digitizer (MCD2G) Application Specific Integrated Circuit (ASIC) that accurately digitizes up to 40 thermopile pixels with greater than 50 Mrad (Si) immunity TID and 174 MeV-sq cm/mg SEL. The MCD2G ASIC uses Radiation Hardened By Design (RHBD) techniques with a 180 nm CMOS process node.

  5. Thermal Radiometer Signal Processing using Radiation Hard CMOS Application Specific Integrated Circuits for use in Harsh Planetary Environments

    NASA Astrophysics Data System (ADS)

    Quilligan, G.; DuMonthier, J.; Aslam, S.; Lakew, B.; Kleyner, I.; Katz, R.

    2015-10-01

    Thermal radiometers such as proposed for the Europa Clipper flyby mission [1] require low noise signal processing for thermal imaging with immunity to Total Ionizing Dose (TID) and Single Event Latchup (SEL). Described is a second generation Multi- Channel Digitizer (MCD2G) Application Specific Integrated Circuit (ASIC) that accurately digitizes up to 40 thermopile pixels with greater than 50 Mrad (Si) immunity TID and 174 MeV-cm2/mg SEL. The MCD2G ASIC uses Radiation Hardened By Design (RHBD) techniques with a 180 nm CMOS process node.

  6. ASIC-enabled High Resolution Optical Time Domain Reflectometer

    NASA Astrophysics Data System (ADS)

    Skendzic, Sandra

    Fiber optics has become the preferred technology in communication systems because of what it has to offer: high data transmission rates, immunity to electromagnetic interference, and lightweight, flexible cables. An optical time domain reflectometer (OTDR) provides a convenient method of locating and diagnosing faults (e.g. break in a fiber) along a fiber that can obstruct crucial optical pathways. Both the ability to resolve the precise location of the fault and distinguish between two discrete, closely spaced faults are figures of merit. This thesis presents an implementation of a high resolution OTDR through the use of a compact and programmable ASIC (application specific integrated circuit). The integration of many essential OTDR functions on a single chip is advantageous over existing commercial instruments because it enables small, lightweight packaging, and offers low power and cost efficiency. Furthermore, its compactness presents the option of placing multiple ASICs in parallel, which can conceivably ease the characterization of densely populated fiber optic networks. The OTDR ASIC consists of a tunable clock, pattern generator, precise timer, electrical receiver, and signal sampling circuit. During OTDR operation, the chip generates narrow electrical pulse, which can then be converted to optical format when coupled with an external laser diode driver. The ASIC also works with an external photodetector to measure the timing and amplitude of optical reflections in a fiber. It has a 1 cm sampling resolution, which allows for a 2 cm spatial resolution. While this OTDR ASIC has been previously demonstrated for multimode fiber fault diagnostics, this thesis focuses on extending its functionality to single mode fiber. To validate this novel approach to OTDR, this thesis is divided into five chapters: (1) introduction, (2) implementation, (3), performance of ASIC-based OTDR, (4) exploration in optical pre-amplification with a semiconductor optical amplifier, and

  7. Development of wide range charge integration application specified integrated circuit for photo-sensor

    NASA Astrophysics Data System (ADS)

    Katayose, Yusaku; Ikeda, Hirokazu; Tanaka, Manobu; Shibata, Makio

    2013-01-01

    A front-end application specified integrated circuit (ASIC) is developed with a wide dynamic range amplifier (WDAMP) to read-out signals from a photo-sensor like a photodiode. The WDAMP ASIC consists of a charge sensitive preamplifier, four wave-shaping circuits with different amplification factors and Wilkinson-type analog-to-digital converter (ADC). To realize a wider range, the integrating capacitor in the preamplifier can be changed from 4 pF to 16 pF by a two-bit switch. The output of a preamplifier is shared by the four wave-shaping circuits with four gains of 1, 4, 16 and 64 to adapt the input range of ADC. A 0.25-μm CMOS process (of UMC electronics CO., LTD) is used to fabricate the ASIC with four-channels. The dynamic range of four orders of magnitude is achieved with the maximum range over 20 pC and the noise performance of 0.46 fC + 6.4×10-4 fC/pF.

  8. A Radiation Hardened by Design CMOS ASIC for Thermopile Readouts

    NASA Technical Reports Server (NTRS)

    Quilligan, G.; Aslam, S.; DuMonthier, J.

    2012-01-01

    A radiation hardened by design (RHBD) mixed-signal application specific integrated circuit (ASIC) has been designed for a thermopile readout for operation in the harsh Jovian orbital environment. The multi-channel digitizer (MCD) ASIC includes 18 low noise amplifier channels which have tunable gain/filtering coefficients, a 16-bit sigma-delta analog-digital converter (SDADC) and an on-chip controller. The 18 channels, SDADC and controller were designed to operate with immunity to single event latchup (SEL) and to at least 10 Mrad total ionizing dose (TID). The ASIC also contains a radiation tolerant 16-bit 20 MHz Nyquist ADC for general purpose instrumentation digitizer needs. The ASIC is currently undergoing fabrication in a commercial 180 nm CMOS process. Although this ASIC was designed specifically for the harsh radiation environment of the NASA led JEO mission it is suitable for integration into instrumentation payloads 011 the ESA JUICE mission where the radiation hardness requirements are slightly less stringent.

  9. Low-power low-noise mixed-mode VLSI ASIC for infinite dynamic range imaging applications

    NASA Astrophysics Data System (ADS)

    Turchetta, Renato; Hu, Y.; Zinzius, Y.; Colledani, C.; Loge, A.

    1998-11-01

    Solid state solutions for imaging are mainly represented by CCDs and, more recently, by CMOS imagers. Both devices are based on the integration of the total charge generated by the impinging radiation, with no processing of the single photon information. The dynamic range of these devices is intrinsically limited by the finite value of noise. Here we present the design of an architecture which allows efficient, in-pixel, noise reduction to a practically zero level, thus allowing infinite dynamic range imaging. A detailed calculation of the dynamic range is worked out, showing that noise is efficiently suppressed. This architecture is based on the concept of single-photon counting. In each pixel, we integrate both the front-end, low-noise, low-power analog part and the digital part. The former consists of a charge preamplifier, an active filter for optimal noise bandwidth reduction, a buffer and a threshold comparator, and the latter is simply a counter, which can be programmed to act as a normal shift register for the readout of the counters' contents. Two different ASIC's based on this concept have been designed for different applications. The first one has been optimized for silicon edge-on microstrips detectors, used in a digital mammography R and D project. It is a 32-channel circuit, with a 16-bit binary static counter.It has been optimized for a relatively large detector capacitance of 5 pF. Noise has been measured to be equal to 100 + 7*Cd (pF) electron rms with the digital part, showing no degradation of the noise performances with respect to the design values. The power consumption is 3.8mW/channel for a peaking time of about 1 microsecond(s) . The second circuit is a prototype for pixel imaging. The total active area is about (250 micrometers )**2. The main differences of the electronic architecture with respect to the first prototype are: i) different optimization of the analog front-end part for low-capacitance detectors, ii) in- pixel 4-bit comparator

  10. In application specific integrated circuit and data acquisition system for digital X-ray imaging

    NASA Astrophysics Data System (ADS)

    Beuville, E.; Cederström, B.; Danielsson, M.; Luo, L.; Nygren, D.; Oltman, E.; Vestlund, J.

    1998-02-01

    We have developed an Application Specific Integrated Circuit (ASIC) and data acquisition system for digital X-ray imaging. The chip consists of 16 parallel channels, each containing preamplifier, shaper, comparator and a 16 bit counter. We have demonstrated noiseless single-photon counting over a threshold of 7.2 keV using Silicon detectors and are presently capable of maximum counting rates of 2 MHz per channel. The ASIC is controlled by a personal computer through a commercial PCI card, which is also used for data acquisition. The content of the 16 bit counters are loaded into a shift register and transferred to the PC at any time at a rate of 20 MHz. The system is non-complicated, low cost and high performance and is optimised for digital X-ray imaging applications.

  11. Radiation-hard ASICs for optical data transmission in the first phase of the LHC upgrade

    NASA Astrophysics Data System (ADS)

    Gan, K. K.; Buchholz, P.; Kagan, H. P.; Kass, R. D.; Moore, J. R.; Smith, D. S.; Wiese, A.; Ziolkowskic, M.

    2010-12-01

    We have designed two ASICs for possible applications in the optical links of a new layer of the pixel detector to be install inside the ATLAS Pixel detector for the first phase of the LHC luminosity upgrade. The ASICs include a high-speed driver for the VCSEL and a receiver/decoder to decode the signal received at the PIN diode to extract the data and clock. Both ASICs contain 4 channels for operation with a VCSEL or PIN array. The ASICs were designed using a 130 nm CMOS process to enhance the radiation-hardness. We have characterized the fabricated ASICs and the performance of the ASICs is satisfactory. The receiver/decoder can properly decode the bi-phase marked input stream with low PIN current and the driver can operate a VCSEL up to ~ 5 Gb/s. The added functionalities are also successful, including redundancy to bypass a broken VCSEL or PIN channel, individual control of VCSEL current, and power-on reset circuit to set all VCSEL currents to a nominal value. The ASICs were irradiated to a dose of 46 Mrad with 24 GeV/c protons. The observed modest degradation is acceptable and the single event upset rate is negligible.

  12. An application specific integrated circuit based multi-anode microchannel array readout system

    NASA Technical Reports Server (NTRS)

    Smeins, Larry G.; Stechman, John M.; Cole, Edward H.

    1991-01-01

    Size reduction of two new multi-anode microchannel array (MAMA) readout systems is described. The systems are based on two analog and one digital application specific integrated circuits (ASICs). The new readout systems reduce volume over previous discrete designs by 80 percent while improving electrical performance on virtually every significant parameter. Emphasis is made on the packaging used to achieve the volume reduction. Surface mount technology (SMT) is combined with modular construction for the analog portion of the readout. SMT reliability concerns and the board area impact of MIL SPEC SMT components is addressed. Package selection for the analog ASIC is discussed. Future sytems will require even denser packaging and the volume reduction progression is shown.

  13. TOFPET2: a high-performance ASIC for time and amplitude measurements of SiPM signals in time-of-flight applications

    NASA Astrophysics Data System (ADS)

    Di Francesco, A.; Bugalho, R.; Oliveira, L.; Pacher, L.; Rivetti, A.; Rolo, M.; Silva, J. C.; Silva, R.; Varela, J.

    2016-03-01

    We present a readout and digitization ASIC featuring low-noise and low-power for time-of flight (TOF) applications using SiPMs. The circuit is designed in standard CMOS 110 nm technology, has 64 independent channels and is optimized for time-of-flight measurement in Positron Emission Tomography (TOF-PET). The input amplifier is a low impedance current conveyor based on a regulated common-gate topology. Each channel has quad-buffered analogue interpolation TDCs (time binning 20 ps) and charge integration ADCs with linear response at full scale (1500 pC). The signal amplitude can also be derived from the measurement of time-over-threshold (ToT). Simulation results show that for a single photo-electron signal with charge 200 (550) fC generated by a SiPM with 320 pF capacitance the circuit has 24 (30) dB SNR, 75(39) ps r.m.s. resolution, and 4(8) mW power consumption. The event rate is 600 kHz per channel, with up to 2 MHz dark counts rejection.

  14. Development of a current-mode ASIC for MRPC detectors

    NASA Astrophysics Data System (ADS)

    Zhou, X.; Deng, Z.; Wang, Y.; Liu, Y. N.

    2014-10-01

    A fully current-mode front-end ASIC, named CAD has been developed for MRPC detectors for TOF applications. It consists of a current mirror preamplifier and a current discriminator for each channel. Current mode circuits can easily achieve high bandwidth and are suitable for low power supply design. A simplified circuit model has been introduced to analyze the timing performance of the current discriminator. 20 ps time jitter can be achieved for 40 fC input signal by simulation. The time jitter dramatically decreases as signal amplitude increases. A 4-channel prototype ASIC has also been designed and fabricated in a 0.35 μm CMOS technology. The chip has been evaluated with MRPC detector. The total time jitter of 184 ps has been measured.

  15. Using advanced microelectronic test chips to qualify ASIC's for space

    NASA Technical Reports Server (NTRS)

    Buehler, M. G.; Blaes, B. R.; Lin, Y-S.

    1990-01-01

    Qualification procedures for complex integrated circuits are being developed under a U.S. government program known as Qualified Manufacturing Lines (QML). This effort is focused on circuits designed by IC manufacturers and has not addressed application specific IC's (ASIC's) designed at system houses. The qualification procedures described here are intended to be responsive to the needs of system houses who design their own ASIC's and have them fabricated at Silicon foundries. A particular focus of this presentation will be the use of the TID (total Ionizing Dose) Chip to evaluate CMOS foundry processes and to provide parameters for circuit simulators. This chip is under development as a standard chip for qualifying the total dose aspects of ASIC's. The benefits of standardization are that the results will be well understood and easy to interpret. Data is presented and compared for 1.6 micron and 3.0 micron CMOS. The data shows that 1.6 micron CMOS is significantly harder than 3.0 micron CMOS. Two failure modes are explored: (1) the radiation-induced degradation of timing delays; and (2) radiation-induced leakage currents.

  16. STIS ASIC charge-amp and voltage discriminator for MAMA detector readout

    NASA Astrophysics Data System (ADS)

    Cole, Edward H.; Smeins, Larry G.; Stechman, John M.

    1993-11-01

    The continuing effort to improve detectors for low light applications has resulted in the development of imaging photon counting detectors. One such device is the MAMA (Multi- Anode Microchannel Array) detector fabricated by Ball Aerospace. This paper provides a brief overview of the STIS (Space Telescope Imaging Spectrograph) MAMA detector and a detailed description of the analog signal processing electronics. The analog signal processing circuit is built using two unique Ball Aerospace and Communications Group (BACG) designed ASICs (application specific integrated circuits). Each MAMA detector analog signal processing channel uses a pair of the ASICs. The first is a charge to voltage amplifier and the second a voltage discriminator. The amplifier has lower noise and higher speed than previous BACG designs. Its first stage gain bandwidth is 10 GHz with an equivalent input noise voltage of about 1 nV per root hertz. It has a single ended input and differential output to drive the voltage discriminator. The voltage discriminator ASIC has differential input and single ended, CMOS compatible, output. The system has a 120 ns pulse pair resolution with 21 ns amplitude dependent timing uncertainty. Calculated false event rate, for prototype devices, is 1 count in 107 sec with 100 pF detector capacitance and a 20,000 electron threshold. Counting rates greater than 1 million per second per channel can be accommodated. Both ASICs have much lower power consumption than previous discrete designs. The ASIC process used allows the fabrication of extremely robust devices while reducing the total number of parts.

  17. Radiation-hard ASICs for optical data transmission in the first phase of the LHC upgrade

    NASA Astrophysics Data System (ADS)

    Gan, K. K.; Buchholz, P.; Kagan, H. P.; Kass, R. D.; Moore, J. R.; Smith, D. S.; Wiese, A.; Ziolkowskic, M.

    2011-06-01

    We have designed two ASICs for possible applications in the optical links of a new layer of the pixel detector to be install inside the ATLAS Pixel detector for the first phase of the LHC luminosity upgrade. The ASICs include a high-speed driver for a VCSEL and a receiver/decoder to decode the signal received at a PIN diode to extract the data and clock. Both ASICs contain 4 channels for operation with a VCSEL or PIN array. The ASICs were designed using a 130 nm CMOS process to enhance the radiation-hardness. We have characterized the fabricated ASICs and the performance of the ASICs is satisfactory. The receiver/decoder properly decodes the bi-phase marked input stream with low PIN current and the driver can operate a VCSEL up to ˜5 Gb/s. The added functionalities are also successful, including redundancy to bypass a broken VCSEL or PIN channel, individual control of VCSEL current, and power-on reset circuit to set all VCSEL currents to a nominal value.

  18. A miniaturized ASIC-based multichannel scaler instrument

    SciTech Connect

    Ericson, M.N.; Turner, G.W.; McMillan, D.E.; Hoffheins, B.S.; Todd, R.A.; Hiller, J.M.

    1993-12-31

    A miniaturized multichannel scaler instrument has been developed to address size and operational constraints for data acquisition in a portable laser-induced luminescence system. The multichannel scaling (MCS) function is implemented as a programmable application specific integrated circuit (ASIC) with standard interfaces for control and data acquisition. The instrument is microcontroller-based with sufficient computing power for data manipulation and algorithmic processing. The unit includes electronics for laser control, and amplification and pulse height discrimination of PMT pulses. Modification of the instrument should allow use in nuclear, chemical, and spectroscopy related applications including Mossbauer experiments. Interfaces are incorporated allowing both computer-controlled and stand alone operation. Implementation of the MCS function as an ASIC and comparison with conventional implementations are discussed. Full characterization of the MCS is presented including differential non-linearity (DNL), bin dead time, and bandwidth measurements.

  19. Development of a low-noise, 4th-order readout ASIC for CdZnTe detectors in gamma spectrometer applications

    NASA Astrophysics Data System (ADS)

    Wang, Jia; Su, Lin; Wei, Xiaomin; Zheng, Ran; Hu, Yann

    2016-09-01

    This paper presents an ASIC readout circuit development, which aims to achieve low noise. In order to compensate the leakage current and improve gain, a dual-stage CSA has been utilized. A 4th-order high-linearity shaper is proposed to obtain a Semi-Gaussian wave and further decrease the noise induced by the leakage current. The ASIC has been designed and fabricated in a standard commercial 2P4M 0.35 μm CMOS process. Die area of one channel is about 1190 μm×147 μm. The input charge range is 1.8 fC. The peaking time can be adjusted from 1 μs to 3 μs. Measured ENC is about 55e- (rms) at input capacitor of 0 F. The gain is 271 mV/fC at the peaking time of 1 μs.

  20. Small Microprocessor for ASIC or FPGA Implementation

    NASA Technical Reports Server (NTRS)

    Kleyner, Igor; Katz, Richard; Blair-Smith, Hugh

    2011-01-01

    A small microprocessor, suitable for use in applications in which high reliability is required, was designed to be implemented in either an application-specific integrated circuit (ASIC) or a field-programmable gate array (FPGA). The design is based on commercial microprocessor architecture, making it possible to use available software development tools and thereby to implement the microprocessor at relatively low cost. The design features enhancements, including trapping during execution of illegal instructions. The internal structure of the design yields relatively high performance, with a significant decrease, relative to other microprocessors that perform the same functions, in the number of microcycles needed to execute macroinstructions. The problem meant to be solved in designing this microprocessor was to provide a modest level of computational capability in a general-purpose processor while adding as little as possible to the power demand, size, and weight of a system into which the microprocessor would be incorporated. As designed, this microprocessor consumes very little power and occupies only a small portion of a typical modern ASIC or FPGA. The microprocessor operates at a rate of about 4 million instructions per second with clock frequency of 20 MHz.

  1. Digital circuits for computer applications: A compilation

    NASA Technical Reports Server (NTRS)

    1972-01-01

    The innovations in this updated series of compilations dealing with electronic technology represent a carefully selected collection of digital circuits which have direct application in computer oriented systems. In general, the circuits have been selected as representative items of each section and have been included on their merits of having universal applications in digital computers and digital data processing systems. As such, they should have wide appeal to the professional engineer and scientist who encounter the fundamentals of digital techniques in their daily activities. The circuits are grouped as digital logic circuits, analog to digital converters, and counters and shift registers.

  2. Radiation-hard ASICs for LHC optical data transmission

    NASA Astrophysics Data System (ADS)

    Gan, K. K.; Kagan, H. P.; Kass, R. D.; Moore, J. R.; Smith, D. S.

    2010-11-01

    We have designed several ASICs for possible applications in a new ATLAS pixel layer for the first phase of the LHC luminosity upgrade. The ASICs include a high-speed driver for the VCSEL, a receiver/decoder to decode the signal received at the PIN diode to extract the data and clock, and a clock multiplier to produce a higher frequency clock to serialize the data for transmission. These chips were designed using a 130 nm CMOS process to enhance the radiation-hardness. We have characterized the fabricated chips and the submission has been mostly successful. We irradiated the chips with 24 GeV/c protons at CERN to a dosage of 70 Mrad. We observed no significant degradation except the driver circuit in the VCSEL driver fabricated using the thick oxide process in order to provide sufficient voltage to drive a VCSEL. The degradation is due to the radiation induced large threshold shifts in the PMOS transistors used.

  3. Automated radiation hard ASIC design tool

    NASA Technical Reports Server (NTRS)

    White, Mike; Bartholet, Bill; Baze, Mark

    1993-01-01

    A commercial based, foundry independent, compiler design tool (ChipCrafter) with custom radiation hardened library cells is described. A unique analysis approach allows low hardness risk for Application Specific IC's (ASIC's). Accomplishments, radiation test results, and applications are described.

  4. A High-Performance Deformable Mirror with Integrated Driver ASIC for Space Based Active Optics

    NASA Astrophysics Data System (ADS)

    Shelton, Chris

    Direct imaging of exoplanets is key to fully understanding these systems through spectroscopy and astrometry. The primary impediment to direct imaging of exoplanets is the extremely high brightness ratio between the planet and its parent star. Direct imaging requires a technique for contrast suppression, which include coronagraphs, and nulling interferometers. Deformable mirrors (DMs) are essential to both of these techniques. With space missions in mind, Microscale is developing a novel DM with direct integration of DM and its electronic control functions in a single small envelope. The Application Specific Integrated Circuit (ASIC) is key to the shrinking of the electronic control functions to a size compatible with direct integration with the DM. Through a NASA SBIR project, Microscale, with JPL oversight, has successfully demonstrated a unique deformable mirror (DM) driver ASIC prototype based on an ultra-low power switch architecture. Microscale calls this the Switch-Mode ASIC, or SM-ASIC, and has characterized it for a key set of performance parameters, and has tested its operation with a variety of actuator loads, such as piezo stack and unimorph, and over a wide temperature range. These tests show the SM-ASIC's capability of supporting active optics in correcting aberrations of a telescope in space. Microscale has also developed DMs to go with the SM-ASIC driver. The latest DM version produced uses small piezo stack elements in an 8x8 array, bonded to a novel silicon facesheet structure fabricated monolithically into a polished mirror on one side and mechanical linkage posts that connect to the piezoelectric stack actuators on the other. In this Supporting Technology proposal we propose to further develop the ASIC-DM and have assembled a very capable team to do so. It will be led by JPL, which has considerable expertise with DMs used in Adaptive Optics systems, with high-contrast imaging systems for exoplanet missions, and with designing DM driver

  5. Front End Spectroscopy ASIC for Germanium Detectors

    NASA Astrophysics Data System (ADS)

    Wulf, Eric

    the anode and cathode of the device to allow the depth of the interaction within the crystal to be determined. Dr. De Geronimo has developed similar timing circuits for CZT detector ASICs. Furthermore, the timing circuitry of the ASIC is at the very end of the analog section, simplifying and mitigating risks in the redesign. In the first year, we propose to tweak the gain settings and to add timing to the silicon ASIC to match the requirements of a germanium detector. The design specifications of the ASIC will include advice from our collaborators Dr. Boggs from COSI and Dr. Shih from GRIPS. By using a master ASIC designer to integrate his proven front-end and back-end with only minor modifications, we are maximizing the probability of success. NRL has a commercial cross-strip germanium detector with 30 pF of capacitance per strip, including the flex circuit from the detector to the outside of the cryostat. The COSI and GRIPS detectors have a similar capacitance per strip on the outside of their mechanically cooled cryostat. The second year of the program will be devoted to testing the newly fabricated germanium cross-strip ASIC with the NRL germanium detector. At the end of the second year, NASA will have a TRL 5 ASIC for germanium detectors, allowing future missions, including COSI, GRX, and GRIPS, to operate within their thermal and electrical envelopes. At the end of the third year, a detector on COSI will be instrumented with the new ASIC allowing for a TRL 6 demonstration during the following COSI balloon flight.

  6. ASIC-based design of NMR system health monitor for mission/safety-critical applications.

    PubMed

    Balasubramanian, P

    2016-01-01

    N-modular redundancy (NMR) is a generic fault tolerance scheme that is widely used in safety-critical circuit/system designs to guarantee the correct operation with enhanced reliability. In passive NMR, at least a majority (N + 1)/2 out of N function modules is expected to operate correctly at any time, where N is odd. Apart from a conventional realization of the NMR system, it would be useful to provide a concurrent indication of the system's health so that an appropriate remedial action may be initiated depending upon an application's safety criticality. In this context, this article presents the novel design of a generic NMR system health monitor which features: (i) early fault warning logic, that is activated upon the production of a conflicting result by even one output of any arbitrary function module, and (ii) error signalling logic, which signals an error when the number of faulty function modules unfortunately attains a majority and the system outputs may no more be reliable. Two sample implementations of NMR systems viz. triple modular redundancy and quintuple modular redundancy with the proposed system health monitoring are presented in this work, with a 4-bit ALU used for the function modules. The simulations are performed using a 32/28 nm CMOS process technology. PMID:27330894

  7. Dedicated multichannel readout ASIC coupled with single crystal diamond for dosimeter application

    NASA Astrophysics Data System (ADS)

    Fabbri, A.; Falco, M. D.; De Notaristefani, F.; Galasso, M.; Marinelli, M.; Orsolini Cencelli, V.; Tortora, L.; Verona, C.; Verona Rinati, G.

    2013-02-01

    This paper reports on the tests of a low-noise, multi-channel readout integrated circuit used as a readout electronic front-end for a diamond multi-pixel dosimeter. The system is developed for dose distribution measurement in radiotherapy applications. The first 10-channel prototype chip was designed and fabricated in a 0.18 um CMOS process. Every channel includes a charge integrator with a 10 pF capacitor and a double slope A/D converter. The diamond multi-pixel detector, based on CVD synthetic single crystal diamond Schottky diodes, is made by a 3 × 3 sensor matrix. The overall device has been tested under irradiation with 6 MeV radio therapeutic photon beams at the Policlinico ``Tor Vergata'' (PTV) hospital. Measurements show a 20 fA RMS leakage current from the front-end input stage and a negligible dark current from the diamond detector, a stable temporal response and a good linear behaviour as a function of both dose and dose rate. These characteristics were common to each tested channel.

  8. A review of recent patents on the ASICs as a key drug target.

    PubMed

    Santos, Priscila L; Guimarães, Adriana G; Barreto, Rosana S S; Serafini, Mairim R; Quintans, Jullyana S S; Quintans-Júnior, Lucindo J

    2015-01-01

    Acid-sensing ion channels (ASICs) are scattered various cells of human body. Drugs like amiloride has demonstrated nonspecific antagonism ASICs. Toxins, such as Psalmotoxin-1, have been used in animal models. There are no drugs available in the market whose action mechanism acts through these channels. We revised all patents relating to pharmaceutical formulations of applicability in ASICs. Drugs acting as antagonist in ASIC1 or ASIC3 channels seem to be the most promising targets. Patent data have suggested a variety of approaches for selective ASICs drugs, such as neuroprotective and analgesic. Studies analysis suggested that ASICs are promising targets for new drugs.

  9. Timing and control requirements for a 32-channel AMU-ADC ASIC for the PHENIX detector

    SciTech Connect

    Emery, M.S.; Ericson, M.N.; Britton, C.L. Jr.

    1998-02-01

    A custom CMOS Application Specific Integrated Circuit (ASIC) has been developed consisting of an analog memory unit (AMU) has been developed consisting of an analog memory unit (AMU) and analog to digital converter (ADC), both of which have been designed for applications in the PHENIX experiment. This IC consists of 32 pipes of analog memory with 64 cells per pipe. Each pipe also has its own ADC channel. Timing and control signal requirements for optimum performance are discussed in this paper.

  10. ASICs Approach for the Implementation of a Symmetric Triangular Fuzzy Coprocessor and Its Application to Adaptive Filtering

    NASA Technical Reports Server (NTRS)

    Starks, Scott; Abdel-Hafeez, Saleh; Usevitch, Bryan

    1997-01-01

    This paper discusses the implementation of a fuzzy logic system using an ASICs design approach. The approach is based upon combining the inherent advantages of symmetric triangular membership functions and fuzzy singleton sets to obtain a novel structure for fuzzy logic system application development. The resulting structure utilizes a fuzzy static RAM to store the rule-base and the end-points of the triangular membership functions. This provides advantages over other approaches in which all sampled values of membership functions for all universes must be stored. The fuzzy coprocessor structure implements the fuzzification and defuzzification processes through a two-stage parallel pipeline architecture which is capable of executing complex fuzzy computations in less than 0.55us with an accuracy of more than 95%, thus making it suitable for a wide range of applications. Using the approach presented in this paper, a fuzzy logic rule-base can be directly downloaded via a host processor to an onchip rule-base memory with a size of 64 words. The fuzzy coprocessor's design supports up to 49 rules for seven fuzzy membership functions associated with each of the chip's two input variables. This feature allows designers to create fuzzy logic systems without the need for additional on-board memory. Finally, the paper reports on simulation studies that were conducted for several adaptive filter applications using the least mean squared adaptive algorithm for adjusting the knowledge rule-base.

  11. ASICs and cardiovascular homeostasis.

    PubMed

    Abboud, François M; Benson, Christopher J

    2015-07-01

    In this review we address primarily the role of ASICs in determining sensory signals from arterial baroreceptors, peripheral chemoreceptors, and cardiopulmonary and somatic afferents. Alterations in these sensory signals during acute cardiovascular stresses result in changes in sympathetic and parasympathetic activities that restore cardiovascular homeostasis. In pathological states, however, chronic dysfunctions of these afferents result in serious sympatho-vagal imbalances with significant increases in mortality and morbidity. We identified a role for ASIC2 in the mechano-sensitivity of aortic baroreceptors and of ASIC3 in the pH sensitivity of carotid bodies. In spontaneously hypertensive rats, we reported decreased expression of ASIC2 in nodose ganglia neurons and overexpression of ASIC3 in carotid bodies. This reciprocal expression of ASIC2 and ASIC3 results in reciprocal changes in sensory sensitivity of baro- and chemoreceptors and a consequential synergistic exaggeration sympathetic nerve activity. A similar reciprocal sensory dysautonomia prevails in heart failure and increases the risk of mortality. There is also evidence that ASIC heteromers in skeletal muscle afferents contribute significantly to the exercise pressor reflex. In cardiac muscle afferents of the dorsal root ganglia, they contribute to nociception and to the detrimental sympathetic activation during ischemia. Finally, we report that an inhibitory influence of ASIC2-mediated baroreceptor activity suppresses the sympatho-excitatory reflexes of the chemoreceptors and skeletal muscle afferents, as well as the ASIC1a-mediated excitation of central neurons during fear, threat, or panic. The translational potential of activation of ASIC2 in cardiovascular disease states may be a beneficial sympatho-inhibition and parasympathetic activation. This article is part of the Special Issue entitled 'Acid-Sensing Ion Channels in the Nervous System'.

  12. Microwave integrated circuits for space applications

    NASA Technical Reports Server (NTRS)

    Leonard, Regis F.; Romanofsky, Robert R.

    1991-01-01

    Monolithic microwave integrated circuits (MMIC), which incorporate all the elements of a microwave circuit on a single semiconductor substrate, offer the potential for drastic reductions in circuit weight and volume and increased reliability, all of which make many new concepts in electronic circuitry for space applications feasible, including phased array antennas. NASA has undertaken an extensive program aimed at development of MMICs for space applications. The first such circuits targeted for development were an extension of work in hybrid (discrete component) technology in support of the Advanced Communication Technology Satellite (ACTS). It focused on power amplifiers, receivers, and switches at ACTS frequencies. More recent work, however, focused on frequencies appropriate for other NASA programs and emphasizes advanced materials in an effort to enhance efficiency, power handling capability, and frequency of operation or noise figure to meet the requirements of space systems.

  13. ASIC design and data communications for the Boston retinal prosthesis.

    PubMed

    Shire, Douglas B; Ellersick, William; Kelly, Shawn K; Doyle, Patrick; Priplata, Attila; Drohan, William; Mendoza, Oscar; Gingerich, Marcus; McKee, Bruce; Wyatt, John L; Rizzo, Joseph F

    2012-01-01

    We report on the design and testing of a custom application-specific integrated circuit (ASIC) that has been developed as a key component of the Boston retinal prosthesis. This device has been designed for patients who are blind due to age-related macular degeneration or retinitis pigmentosa. Key safety and communication features of the low-power ASIC are described, as are the highly configurable neural stimulation current waveforms that are delivered to its greater than 256 output electrodes. The ASIC was created using an 0.18 micron Si fabrication process utilizing standard 1.8 volt CMOS transistors as well as 20 volt lightly doped drain FETs. The communication system receives frequency-shift keyed inputs at 6.78 MHz from an implanted secondary coil, and transmits data back to the control unit through a lower-bandwidth channel that employs load-shift keying. The design's safety is ensured by on-board electrode voltage monitoring, stimulus charge limits, error checking of data transmitted to the implant, and comprehensive self-test and performance monitoring features. Each stimulus cycle is initiated by a transmitted word with a full 32-bit error check code. Taken together, these features allow researchers to safely and wirelessly tailor retinal stimulation and vision recovery for each patient. PMID:23365888

  14. ASIC for High Rate 3D Position Sensitive Detectors

    SciTech Connect

    Vernon, E.; De Geronimo, G.; Ackley, K.; Fried, J.; He, Z.; Herman, C.; Zhang, F.

    2010-06-16

    We report on the development of an application specific integrated circuit (ASIC) for 3D position sensitive detectors (3D PSD). The ASIC is designed to operate with pixelated wide bandgap sensors like Cadmium-Zinc-Telluride (CZT), Mercuric Iodide (Hgl2) and Thallium Bromide (TIBr). It measures the amplitudes and timings associated with an ionizing event on 128 anodes, the anode grid, and the cathode. Each channel provides low-noise charge amplification, high-order shaping with peaking time adjustable from 250 ns to 12 {micro}s, gain adjustable to 20 mV/fC or 120 mV/fC (for a dynamic range of 3.2 MeV and 530 keV in CZT), amplitude discrimination with 5-bit trimming, and positive and negative peak and timing detections. The readout can be full or sparse, based on a flag and single- or multi-cycle token passing. All channels, triggered channels only, or triggered with neighbors can be read out thus increasing the rate capability of the system to more than 10 kcps. The ASIC dissipates 330 mW which corresponds to about 2.5 mW per channel.

  15. Robust Multivariable Optimization and Performance Simulation for ASIC Design

    NASA Technical Reports Server (NTRS)

    DuMonthier, Jeffrey; Suarez, George

    2013-01-01

    Application-specific-integrated-circuit (ASIC) design for space applications involves multiple challenges of maximizing performance, minimizing power, and ensuring reliable operation in extreme environments. This is a complex multidimensional optimization problem, which must be solved early in the development cycle of a system due to the time required for testing and qualification severely limiting opportunities to modify and iterate. Manual design techniques, which generally involve simulation at one or a small number of corners with a very limited set of simultaneously variable parameters in order to make the problem tractable, are inefficient and not guaranteed to achieve the best possible results within the performance envelope defined by the process and environmental requirements. What is required is a means to automate design parameter variation, allow the designer to specify operational constraints and performance goals, and to analyze the results in a way that facilitates identifying the tradeoffs defining the performance envelope over the full set of process and environmental corner cases. The system developed by the Mixed Signal ASIC Group (MSAG) at the Goddard Space Flight Center is implemented as a framework of software modules, templates, and function libraries. It integrates CAD tools and a mathematical computing environment, and can be customized for new circuit designs with only a modest amount of effort as most common tasks are already encapsulated. Customization is required for simulation test benches to determine performance metrics and for cost function computation.

  16. A Framework for Robust Multivariable Optimization of Integrated Circuits in Space Applications

    NASA Technical Reports Server (NTRS)

    DuMonthier, Jeffrey; Suarez, George

    2013-01-01

    Application Specific Integrated Circuit (ASIC) design for space applications involves multiple challenges of maximizing performance, minimizing power and ensuring reliable operation in extreme environments. This is a complex multidimensional optimization problem which must be solved early in the development cycle of a system due to the time required for testing and qualification severely limiting opportunities to modify and iterate. Manual design techniques which generally involve simulation at one or a small number of corners with a very limited set of simultaneously variable parameters in order to make the problem tractable are inefficient and not guaranteed to achieve the best possible results within the performance envelope defined by the process and environmental requirements. What is required is a means to automate design parameter variation, allow the designer to specify operational constraints and performance goals, and to analyze the results in a way which facilitates identifying the tradeoffs defining the performance envelope over the full set of process and environmental corner cases. The system developed by the Mixed Signal ASIC Group (MSAG) at the Goddard Space Flight Center is implemented as framework of software modules, templates and function libraries. It integrates CAD tools and a mathematical computing environment, and can be customized for new circuit designs with only a modest amount of effort as most common tasks are already encapsulated. Customization is required for simulation test benches to determine performance metrics and for cost function computation. Templates provide a starting point for both while toolbox functions minimize the code required. Once a test bench has been coded to optimize a particular circuit, it is also used to verify the final design. The combination of test bench and cost function can then serve as a template for similar circuits or be re-used to migrate the design to different processes by re-running it with the

  17. FRONT-END ASIC FOR HIGH RESOLUTION X-RAY SPECTROMETERS.

    SciTech Connect

    DE GERONIMO,G.; CHEN, W.; FRIED, J.; LI, Z.; PINELLI, D.A.; REHAK, P.; VERNON, E.; GASKIN, J.A.; RAMSEY, B.D.; ANELLI, G.

    2007-10-27

    We present an application specific integrated circuit (ASIC) for high-resolution x-ray spectrometers. The ASIC is designed to read out signals from a pixelated silicon drift detector (SDD). Each hexagonal pixel has an area of 15 mmz and an anode capacitance of less than 100 fF. There is no integrated Field Effect transistor (FET) in the pixel, rather, the readout is done by wirebonding the anodes to the inputs of the ASIC. The ASIC provides 14 channels of low-noise charge amplification, high-order shaping with baseline stabilization, and peak detection with analog memory. The readout is sparse and based on low voltage differential signaling. An interposer provides all the interconnections required to bias and operate the system. The channel dissipates 1.6 mW. The complete 14-pixel unit covers an area of 210 mm{sup 2}, dissipates 12 mW cm{sup -2}, and can be tiled to cover an arbitrarily large detection area. We measured a preliminary resolution of 172 eV at -35 C on the 6 keV peak of a {sup 55}Fe source.

  18. Burst Mode ASIC-Based Modem

    NASA Technical Reports Server (NTRS)

    1997-01-01

    The NASA Lewis Research Center is sponsoring the Advanced Communication Technology Insertion (ACTION) for Commercial Space Applications program. The goal of the program is to expedite the development of new technology with a clear path towards productization and enhancing the competitiveness of U.S. manufacturers. The industry has made significant investment in developing ASIC-based modem technology for continuous-mode applications and has made investigations into East, reliable acquisition of burst-mode digital communication signals. With rapid advances in analog and digital communications ICs, it is expected that more functions will be integrated onto these parts in the near future. In addition custom ASIC's can also be developed to address the areas not covered by the other IC's. Using the commercial chips and custom ASIC's, lower-cost, compact, reliable, and high-performance modems can be built for demanding satellite communication application. This report outlines a frequency-hop burst modem design based on commercially available chips.

  19. NIRCA ASIC for the readout of focal plane arrays

    NASA Astrophysics Data System (ADS)

    Pâhlsson, Philip; Steenari, David; Øya, Petter; Otnes Berge, Hans Kristian; Meier, Dirk; Olsen, Alf; Hasanbegovic, Amir; Altan, Mehmet A.; Najafiuchevler, Bahram; Talebi, Jahanzad; Azman, Suleyman; Gheorghe, Codin; Ackermann, Jörg; Mæhlum, Gunnar; Johansen, Tor Magnus; Stein, Timo

    2016-05-01

    This work is a continuation of our preliminary tests on NIRCA - the Near Infrared Readout and Controller ASIC [1]. The primary application for NIRCA is future astronomical science and Earth observation missions where NIRCA will be used with mercury cadmium telluride image sensors (HgCdTe, or MCT) [2], [3]. Recently we have completed the ASIC tests in the cryogenic environment down to 77 K. We have verified that NIRCA provides to the readout integrated circuit (ROIC) regulated power, bias voltages, and fully programmable digital sequences with sample control of the analogue to digital converters (ADC). Both analog and digital output from the ROIC can be acquired and image data is 8b/10bencoded and delivered via serial interface. The NIRCA also provides temperature measurement, and monitors several analog and digital input channels. The preliminary work confirms that NIRCA is latch-up immune and able to operate down to 77 K. We have tested the performance of the 12-bit ADC with pre-amplifier to have 10.8 equivalent number of bits (ENOB) at 1.4 Msps and maximum sampling speed at 2 Msps. The 1.8-V and 3.3-V output regulators and the 10-bit DACs show good linearity and work as expected. A programmable sequencer is implemented as a micro-controller with a custom instruction set. Here we describe the special operations of the sequencer with regards to the applications and a novel approach to parallel real-time hardware outputs. The test results of the working prototype ASIC show good functionality and performance from room temperature down to 77 K. The versatility of the chip makes the architecture a possible candidate for other research areas, defense or industrial applications that require analog and digital acquisition, voltage regulation, and digital signal generation.

  20. Radio-Frequency Electronics, Circuits and Applications

    NASA Astrophysics Data System (ADS)

    Hagen, Jon B.

    This accessible and comprehensive book provides an introduction to the basic concepts and key circuits of radio frequency systems, covering fundamental principles which apply to all radio devices, from wireless data transceivers on semiconductor chips to high-power broadcast transmitters. Topics covered include filters, amplifiers, oscillators, modulators, low-noise amplifiers, phase-locked loops, and transformers. Applications of radio frequency systems are described in such areas as communications, radio and television broadcasting, radar, and radio astronomy. The book contains many exercises, and assumes only a knowledge of elementary electronics and circuit analysis. It will be an ideal textbook for advanced undergraduate and graduate courses in electrical engineering, as well as an invaluable reference for researchers and professional engineers in this area, or for those moving into the field of wireless communications.

  1. XAMPS Detectors Readout ASIC for LCLS

    SciTech Connect

    Dragone, A; Pratte, J.F.; Rehak, P.; Carini, G.A.; Herbst, R.; O'Connor, P.; Siddons, D.P.; /BNL, NSLS

    2008-12-18

    An ASIC for the readout of signals from X-ray Active Matrix Pixel Sensor (XAMPS) detectors to be used at the Linac Coherent Light Source (LCLS) is presented. The X-ray Pump Probe (XPP) instrument, for which the ASIC has been designed, requires a large input dynamic range on the order of 104 photons at 8 keV with a resolution of half a photon FWHM. Due to the size of the pixel and the length of the readout line, large input capacitance is expected, leading to stringent requirement on the noise optimization. Furthermore, the large number of pixels needed for a good position resolution and the fixed LCLS beam period impose limitations on the time available for the single pixel readout. Considering the periodic nature of the LCLS beam, the ASIC developed for this application is a time-variant system providing low-noise charge integration, filtering and correlated double sampling. In order to cope with the large input dynamic range a charge pump scheme implementing a zero-balance measurement method has been introduced. It provides an on chip 3-bit coarse digital conversion of the integrated charge. The residual charge is sampled using correlated double sampling into analog memory and measured with the required resolution. The first 64 channel prototype of the ASIC has been fabricated in TSMC CMOS 0.25 {micro}m technology. In this paper, the ASIC architecture and performances are presented.

  2. Trigger Data Serializer ASIC chip for the ATLAS New Small Wheel sTGC Detector

    NASA Astrophysics Data System (ADS)

    Meng, Xiangting; Wang, Jinhong; Guan, Liang; Sang, Ziru; Chapman, John; Zhou, Bing; Zhu, Junjie

    2015-04-01

    The small-strip thin-gap chambers (sTGC) will be used as the trigger device for the Phase-I upgrade of the ATLAS new small wheel (nSW) muon detector. An Application-Specific Integrated Circuit (ASIC) chip is needed to collect digital signals from both pad and strip detectors and serialize the outputs to the circuitry located on the rim of the nSW. The large number of input channels (128 differential input channels), short time available to prepare and transmit trigger data (<100 ns), high speed output data rate (4.8 Gbps), harsh radiation environment (about 300 kRad), and low power consumption (<1 W) impose great challenges for the design of this ASIC chip using the IBM 130 nm CMOS process. We will present our design and test results based on the prototype chip we build.

  3. Replication of Space-Shuttle Computers in FPGAs and ASICs

    NASA Technical Reports Server (NTRS)

    Ferguson, Roscoe C.

    2008-01-01

    A document discusses the replication of the functionality of the onboard space-shuttle general-purpose computers (GPCs) in field-programmable gate arrays (FPGAs) and application-specific integrated circuits (ASICs). The purpose of the replication effort is to enable utilization of proven space-shuttle flight software and software-development facilities to the extent possible during development of software for flight computers for a new generation of launch vehicles derived from the space shuttles. The replication involves specifying the instruction set of the central processing unit and the input/output processor (IOP) of the space-shuttle GPC in a hardware description language (HDL). The HDL is synthesized to form a "core" processor in an FPGA or, less preferably, in an ASIC. The core processor can be used to create a flight-control card to be inserted into a new avionics computer. The IOP of the GPC as implemented in the core processor could be designed to support data-bus protocols other than that of a multiplexer interface adapter (MIA) used in the space shuttle. Hence, a computer containing the core processor could be tailored to communicate via the space-shuttle GPC bus and/or one or more other buses.

  4. Front-End ASIC for Liquid Argon TPC

    SciTech Connect

    De Geronimo, G.; Li, S.; D'Andragora, A.; Nambiar, N.; Rescia, S.; Vernon, E.; Chen, H.; Lanni, F.; Makowiecki, D.; Radeka, V.; Thorn, C.; Yu, B.

    2011-06-15

    We present a front-end application-specific integrated circuit (ASIC) for a wire based time-projection-chamber (TPC) operating in liquid Argon (LAr). The LAr TPC will be used for long baseline neutrino oscillation experiments. The ASIC must provide a low-noise readout of the signals induced on the TPC wires, digitization of those signals at 2 MSamples/s, compression, buffering and multiplexing. A resolution of better than 1000 rms electrons at 200 pF input capacitance for an input range of 300 fC is required, along with low power and operation in LAr (at 87 K). We include the characterization of a commercial technology for operation in the cryogenic environment and the first experimental results on the analog front end. The results demonstrate that complementary metal-oxide semiconductor transistors have lower noise and much improved dc characteristics at LAr temperature. Finally, we introduce the concept of '1/f equivalent' to model the low-frequency component of the noise spectral density, for use in the input metal-oxide semiconductor field-effect transistor optimization.

  5. READOUT ASIC FOR 3D POSITION-SENSITIVE DETECTORS.

    SciTech Connect

    DE GERONIMO,G.; VERNON, E.; ACKLEY, K.; DRAGONE, A.; FRIED, J.; OCONNOR, P.; HE, Z.; HERMAN, C.; ZHANG, F.

    2007-10-27

    We describe an application specific integrated circuit (ASIC) for 3D position-sensitive detectors. It was optimized for pixelated CZT sensors, and it measures, corresponding to an ionizing event, the energy and timing of signals from 121 anodes and one cathode. Each channel provides low-noise charge amplification, high-order shaping, along with peak- and timing-detection. The cathode's timing can be measured in three different ways: the first is based on multiple thresholds on the charge amplifier's voltage output; the second uses the threshold crossing of a fast-shaped signal; and the third measures the peak amplitude and timing from a bipolar shaper. With its power of 2 mW per channel the ASIC measures, on a CZT sensor Connected and biased, charges up to 100 fC with an electronic resolution better than 200 e{sup -} rms. Our preliminary spectral measurements applying a simple cathode/mode ratio correction demonstrated a single-pixel resolution of 4.8 keV (0.72 %) at 662 keV, with the electronics and leakage current contributing in total with 2.1 keV.

  6. Integrated circuit cell library

    NASA Technical Reports Server (NTRS)

    Whitaker, Sterling R. (Inventor); Miles, Lowell H. (Inventor)

    2005-01-01

    According to the invention, an ASIC cell library for use in creation of custom integrated circuits is disclosed. The ASIC cell library includes some first cells and some second cells. Each of the second cells includes two or more kernel cells. The ASIC cell library is at least 5% comprised of second cells. In various embodiments, the ASIC cell library could be 10% or more, 20% or more, 30% or more, 40% or more, 50% or more, 60% or more, 70% or more, 80% or more, 90% or more, or 95% or more comprised of second cells.

  7. Evaluation of a front-end ASIC for the readout of PMTs over a large dynamic range

    NASA Astrophysics Data System (ADS)

    Wu, Wei-Hao; Zhao, Lei; Liang, Yu; Yu, Li; Liu, Jian-Feng; Liu, Shu-Bin; An, Qi

    2015-12-01

    The Large High Altitude Air Shower Observatory (LHAASO) project has been proposed for the survey and study of cosmic rays. In the LHAASO project, the Water Cherenkov Detector Array (WCDA) is one of the major detectors for searching for gamma ray sources. A Charge-to-Time Convertor (QTC) ASIC (Application Specification Integrated Circuit), fabricated with Global Foundry 0.35 μm CMOS technology, has been developed for readout of photomultiplier tubes (PMTs) in the WCDA. This ASIC provides both time and charge measurement of PMT signals. The input charge is converted to a pulse width based on the Time-Over-Threshold (TOT) technique and linear discharge method; as for time measurement, leading edge discrimination is employed. This paper focuses on the evaluation of this front-end readout ASIC performance. Test results indicate that the time resolution is better than 400 ps and the charge resolution is better than 1% with large input signals and remains better than 15% @1 photoelectron (P.E.), both beyond the application requirement. Moreover, this ASIC has a weak ambient temperature dependence, low input rate dependence and high channel-to-channel isolation.

  8. 20 CFR 416.1485 - Application of circuit court law.

    Code of Federal Regulations, 2014 CFR

    2014-04-01

    ... 20 Employees' Benefits 2 2014-04-01 2014-04-01 false Application of circuit court law. 416.1485... Determinations and Decisions Court Remand Cases § 416.1485 Application of circuit court law. The procedures which follow apply to administrative determinations or decisions on claims involving the application of...

  9. 20 CFR 416.1485 - Application of circuit court law.

    Code of Federal Regulations, 2012 CFR

    2012-04-01

    ... 20 Employees' Benefits 2 2012-04-01 2012-04-01 false Application of circuit court law. 416.1485... Determinations and Decisions Court Remand Cases § 416.1485 Application of circuit court law. The procedures which follow apply to administrative determinations or decisions on claims involving the application of...

  10. 20 CFR 404.985 - Application of circuit court law.

    Code of Federal Regulations, 2012 CFR

    2012-04-01

    ... 20 Employees' Benefits 2 2012-04-01 2012-04-01 false Application of circuit court law. 404.985... and Decisions Court Remand Cases § 404.985 Application of circuit court law. The procedures which follow apply to administrative determinations or decisions on claims involving the application of...

  11. 20 CFR 404.985 - Application of circuit court law.

    Code of Federal Regulations, 2010 CFR

    2010-04-01

    ... 20 Employees' Benefits 2 2010-04-01 2010-04-01 false Application of circuit court law. 404.985... and Decisions Court Remand Cases § 404.985 Application of circuit court law. The procedures which follow apply to administrative determinations or decisions on claims involving the application of...

  12. 20 CFR 404.985 - Application of circuit court law.

    Code of Federal Regulations, 2014 CFR

    2014-04-01

    ... 20 Employees' Benefits 2 2014-04-01 2014-04-01 false Application of circuit court law. 404.985... and Decisions Court Remand Cases § 404.985 Application of circuit court law. The procedures which follow apply to administrative determinations or decisions on claims involving the application of...

  13. 20 CFR 416.1485 - Application of circuit court law.

    Code of Federal Regulations, 2010 CFR

    2010-04-01

    ... 20 Employees' Benefits 2 2010-04-01 2010-04-01 false Application of circuit court law. 416.1485... Determinations and Decisions Court Remand Cases § 416.1485 Application of circuit court law. The procedures which follow apply to administrative determinations or decisions on claims involving the application of...

  14. 20 CFR 404.985 - Application of circuit court law.

    Code of Federal Regulations, 2011 CFR

    2011-04-01

    ... 20 Employees' Benefits 2 2011-04-01 2011-04-01 false Application of circuit court law. 404.985... and Decisions Court Remand Cases § 404.985 Application of circuit court law. The procedures which follow apply to administrative determinations or decisions on claims involving the application of...

  15. Synthetic mammalian gene circuits for biomedical applications.

    PubMed

    Ye, Haifeng; Aubel, Dominique; Fussenegger, Martin

    2013-12-01

    Synthetic biology is the science of reassembling cataloged and standardized biological items in a systematic and rational manner to create and engineer functional biological designer devices, systems and organisms with novel and useful, preferably therapeutic functions. Synthetic biology has significantly advanced the design of complex genetic networks that can reprogram metabolic activities in mammalian cells and provide novel therapeutic strategies for future gene-based and cell-based therapies. Synthetic biology-inspired therapeutic strategies provide new opportunities for improving human health in the 21st century. This review covers the most recent synthetic mammalian circuits designed for therapy of diseases such as metabolic disorders, cancer, and immune disorders. We conclude by discussing current challenges and future perspectives for biomedical applications of synthetic mammalian gene networks.

  16. Simultaneous Disruption of Mouse ASIC1a, ASIC2 and ASIC3 Genes Enhances Cutaneous Mechanosensitivity

    PubMed Central

    Kang, Sinyoung; Jang, Jun Ho; Price, Margaret P.; Gautam, Mamta; Benson, Christopher J.; Gong, Huiyu; Welsh, Michael J.; Brennan, Timothy J.

    2012-01-01

    Three observations have suggested that acid-sensing ion channels (ASICs) might be mammalian cutaneous mechanoreceptors; they are structurally related to Caenorhabditis elegans mechanoreceptors, they are localized in specialized cutaneous mechanosensory structures, and mechanical displacement generates an ASIC-dependent depolarization in some neurons. However, previous studies of mice bearing a single disrupted ASIC gene showed only subtle or no alterations in cutaneous mechanosensitivity. Because functional redundancy of ASIC subunits might explain limited phenotypic alterations, we hypothesized that disrupting multiple ASIC genes would markedly impair cutaneous mechanosensation. We found the opposite. In behavioral studies, mice with simultaneous disruptions of ASIC1a, -2 and -3 genes (triple-knockouts, TKOs) showed increased paw withdrawal frequencies when mechanically stimulated with von Frey filaments. Moreover, in single-fiber nerve recordings of cutaneous afferents, mechanical stimulation generated enhanced activity in A-mechanonociceptors of ASIC TKOs compared to wild-type mice. Responses of all other fiber types did not differ between the two genotypes. These data indicate that ASIC subunits influence cutaneous mechanosensitivity. However, it is unlikely that ASICs directly transduce mechanical stimuli. We speculate that physical and/or functional association of ASICs with other components of the mechanosensory transduction apparatus contributes to normal cutaneous mechanosensation. PMID:22506072

  17. The expression profile of acid-sensing ion channel (ASIC) subunits ASIC1a, ASIC1b, ASIC2a, ASIC2b, and ASIC3 in the esophageal vagal afferent nerve subtypes

    PubMed Central

    Dusenkova, Svetlana; Ru, Fei; Surdenikova, Lenka; Nassenstein, Christina; Hatok, Jozef; Dusenka, Robert; Banovcin, Peter; Kliment, Jan; Tatar, Milos

    2014-01-01

    Acid-sensing ion channels (ASICs) have been implicated in esophageal acid sensing and mechanotransduction. However, insufficient knowledge of ASIC subunit expression profile in esophageal afferent nerves hampers the understanding of their role. This knowledge is essential because ASIC subunits form heteromultimeric channels with distinct functional properties. We hypothesized that the esophageal putative nociceptive C-fiber nerves (transient receptor potential vanilloid 1, TRPV1-positive) express multiple ASIC subunits and that the ASIC expression profile differs between the nodose TRPV1-positive subtype developmentally derived from placodes and the jugular TRPV1-positive subtype derived from neural crest. We performed single cell RT-PCR on the vagal afferent neurons retrogradely labeled from the esophagus. In the guinea pig, nearly all (90%–95%) nodose and jugular esophageal TRPV1-positive neurons expressed ASICs, most often in a combination (65–75%). ASIC1, ASIC2, and ASIC3 were expressed in 65–75%, 55–70%, and 70%, respectively, of both nodose and jugular TRPV1-positive neurons. The ASIC1 splice variants ASIC1a and ASIC1b and the ASIC2 splice variant ASIC2b were similarly expressed in both nodose and jugular TRPV1-positive neurons. However, ASIC2a was found exclusively in the nodose neurons. In contrast to guinea pig, ASIC3 was almost absent from the mouse vagal esophageal TRPV1-positive neurons. However, ASIC3 was similarly expressed in the nonnociceptive TRPV1-negative (tension mechanoreceptors) neurons in both species. We conclude that the majority of esophageal vagal nociceptive neurons express multiple ASIC subunits. The placode-derived nodose neurons selectively express ASIC2a, known to substantially reduce acid sensitivity of ASIC heteromultimers. ASIC3 is expressed in the guinea pig but not in the mouse vagal esophageal TRPV1-positive neurons, indicating species differences in ASIC expression. PMID:25190475

  18. ASIC design in the KM3NeT detector

    NASA Astrophysics Data System (ADS)

    Gajanana, D.; Gromov, V.; Timmer, P.

    2013-02-01

    In the KM3NeT project [1], Cherenkov light from the muon interactions with transparent matter around the detector, is used to detect neutrinos. Photo multiplier tubes (PMT) used as photon sensor, are housed in a glass sphere (aka Optical Module) to detect single photons from the Cherenkov light. The PMT needs high operational voltage ( ~ 1.5 kV) and is generated by a Cockroft-Walton (CW) multiplier circuit. The electronics required to control the PMT's and collect the signals is integrated in two ASIC's namely: 1) a front-end mixed signal ASIC (PROMiS) for the readout of the PMT and 2) an analog ASIC (CoCo) to generate pulses for charging the CW circuit and to control the feedback of the CW circuit. In this article, we discuss the two integrated circuits and test results of the complete setup. PROMiS amplifies the input charge, converts it to a pulse width and delivers the information via LVDS signals. These LVDS signals carry accurate information on the Time of arrival ( < 2 ns) and Time over Threshold. A PROM block provides unique identification to the chip. The chip communicates with the control electronics via an I2C bus. This unique combination of the ASIC's results in a very cost and power efficient PMT base design.

  19. Improved On-Chip Measurement of Delay in an FPGA or ASIC

    NASA Technical Reports Server (NTRS)

    Chen, Yuan; Burke, Gary; Sheldon, Douglas

    2007-01-01

    An improved design has been devised for on-chip-circuitry for measuring the delay through a chain of combinational logic elements in a field-programmable gate array (FPGA) or application-specific integrated circuit (ASIC). In the improved design, the delay chain does not include input and output buffers and is not configured as an oscillator. Instead, the delay chain is made part of the signal chain of an on-chip pulse generator. The duration of the pulse is measured on-chip and taken to equal the delay.

  20. 20 CFR 405.515 - Application of circuit court law.

    Code of Federal Regulations, 2012 CFR

    2012-04-01

    ... 20 Employees' Benefits 2 2012-04-01 2012-04-01 false Application of circuit court law. 405.515 Section 405.515 Employees' Benefits SOCIAL SECURITY ADMINISTRATION ADMINISTRATIVE REVIEW PROCESS FOR ADJUDICATING INITIAL DISABILITY CLAIMS Judicial Review § 405.515 Application of circuit court law. We...

  1. 20 CFR 405.515 - Application of circuit court law.

    Code of Federal Regulations, 2010 CFR

    2010-04-01

    ... 20 Employees' Benefits 2 2010-04-01 2010-04-01 false Application of circuit court law. 405.515 Section 405.515 Employees' Benefits SOCIAL SECURITY ADMINISTRATION ADMINISTRATIVE REVIEW PROCESS FOR ADJUDICATING INITIAL DISABILITY CLAIMS Judicial Review § 405.515 Application of circuit court law. We...

  2. 20 CFR 405.515 - Application of circuit court law.

    Code of Federal Regulations, 2014 CFR

    2014-04-01

    ... 20 Employees' Benefits 2 2014-04-01 2014-04-01 false Application of circuit court law. 405.515 Section 405.515 Employees' Benefits SOCIAL SECURITY ADMINISTRATION ADMINISTRATIVE REVIEW PROCESS FOR ADJUDICATING INITIAL DISABILITY CLAIMS Judicial Review § 405.515 Application of circuit court law. We...

  3. 20 CFR 405.515 - Application of circuit court law.

    Code of Federal Regulations, 2011 CFR

    2011-04-01

    ... 20 Employees' Benefits 2 2011-04-01 2011-04-01 false Application of circuit court law. 405.515 Section 405.515 Employees' Benefits SOCIAL SECURITY ADMINISTRATION ADMINISTRATIVE REVIEW PROCESS FOR ADJUDICATING INITIAL DISABILITY CLAIMS Judicial Review § 405.515 Application of circuit court law. We...

  4. An analogue front-end ASIC prototype designed for PMT signal readout

    NASA Astrophysics Data System (ADS)

    Liu, Jian-Feng; Zhao, Lei; Yu, Li; Liang, Yu; Qin, Jia-Jun; Yang, Yun-Fan; Wu, Wei-Hao; Liu, Shu-Bin; An, Qi

    2016-06-01

    The Water Cherenkov Detector Array (WCDA) is one of the core detectors in the Large High Altitude Air Shower Observatory (LHAASO), and it consists of 3600 photomultiplier tubes (PMTs). Both high resolution time and charge measurement are required over a large dynamic range from 1 photoelectron (P.E.) to 4000 P.E. The prototype of an analogue front-end Application Specific Integrated Circuit (ASIC) fabricated using Global Foundry 0.35 μm CMOS technology is designed to read out the PMT signal in the WCDA. This ASIC employs leading edge discrimination and an (RC)4 shaping structure. Combined with the following Time-to-Digital Converter (TDC) and Analog-to-Digital Converter (ADC), both the arrival time and charge of the PMT signal can be measured. Initial test results indicate that time resolution is better than 350 ps and charge resolution is better than 10% at 1 P.E. and better than 1% with large input signals (300 P.E. to 4000 P.E.). Besides, this ASIC has a good channel-to-channel isolation of more than 84 dB and the temperature dependency of charge measurement is less than 5% in the range 0–50°C. Supported by Knowledge Innovation Program of Chinese Academy of Sciences (KJCX2-YW-N27), National Natural Science Foundation of China (11175174) and CAS Center for Excellence in Particle Physics (CCEPP)

  5. An analogue front-end ASIC prototype designed for PMT signal readout

    NASA Astrophysics Data System (ADS)

    Liu, Jian-Feng; Zhao, Lei; Yu, Li; Liang, Yu; Qin, Jia-Jun; Yang, Yun-Fan; Wu, Wei-Hao; Liu, Shu-Bin; An, Qi

    2016-06-01

    The Water Cherenkov Detector Array (WCDA) is one of the core detectors in the Large High Altitude Air Shower Observatory (LHAASO), and it consists of 3600 photomultiplier tubes (PMTs). Both high resolution time and charge measurement are required over a large dynamic range from 1 photoelectron (P.E.) to 4000 P.E. The prototype of an analogue front-end Application Specific Integrated Circuit (ASIC) fabricated using Global Foundry 0.35 μm CMOS technology is designed to read out the PMT signal in the WCDA. This ASIC employs leading edge discrimination and an (RC)4 shaping structure. Combined with the following Time-to-Digital Converter (TDC) and Analog-to-Digital Converter (ADC), both the arrival time and charge of the PMT signal can be measured. Initial test results indicate that time resolution is better than 350 ps and charge resolution is better than 10% at 1 P.E. and better than 1% with large input signals (300 P.E. to 4000 P.E.). Besides, this ASIC has a good channel-to-channel isolation of more than 84 dB and the temperature dependency of charge measurement is less than 5% in the range 0-50°C. Supported by Knowledge Innovation Program of Chinese Academy of Sciences (KJCX2-YW-N27), National Natural Science Foundation of China (11175174) and CAS Center for Excellence in Particle Physics (CCEPP)

  6. Monolithic readout circuits for RHIC

    SciTech Connect

    O`Connor, P.; Harder, J.

    1991-12-31

    Several CMOS ASICs have been developed for a proposed RHIC experiment. This paper discusses why ASIC implementation was chosen for certain functions, circuit specifications and the design techniques used to meet them, and results of simulations and early prototypes. By working closely together from an early stage in the planning process, in-house ASIC designers and detector and data acquisition experimenters can achieve optimal use of this important technology.

  7. High performance protection circuit for power electronics applications

    SciTech Connect

    Tudoran, Cristian D. Dădârlat, Dorin N.; Toşa, Nicoleta; Mişan, Ioan

    2015-12-23

    In this paper we present a high performance protection circuit designed for the power electronics applications where the load currents can increase rapidly and exceed the maximum allowed values, like in the case of high frequency induction heating inverters or high frequency plasma generators. The protection circuit is based on a microcontroller and can be adapted for use on single-phase or three-phase power systems. Its versatility comes from the fact that the circuit can communicate with the protected system, having the role of a “sensor” or it can interrupt the power supply for protection, in this case functioning as an external, independent protection circuit.

  8. High performance protection circuit for power electronics applications

    NASA Astrophysics Data System (ADS)

    Tudoran, Cristian D.; Dǎdârlat, Dorin N.; Toşa, Nicoleta; Mişan, Ioan

    2015-12-01

    In this paper we present a high performance protection circuit designed for the power electronics applications where the load currents can increase rapidly and exceed the maximum allowed values, like in the case of high frequency induction heating inverters or high frequency plasma generators. The protection circuit is based on a microcontroller and can be adapted for use on single-phase or three-phase power systems. Its versatility comes from the fact that the circuit can communicate with the protected system, having the role of a "sensor" or it can interrupt the power supply for protection, in this case functioning as an external, independent protection circuit.

  9. Acid-sensing ion channels 1a (ASIC1a) inhibit neuromuscular transmission in female mice.

    PubMed

    Urbano, Francisco J; Lino, Noelia G; González-Inchauspe, Carlota M F; González, Laura E; Colettis, Natalia; Vattino, Lucas G; Wunsch, Amanda M; Wemmie, John A; Uchitel, Osvaldo D

    2014-02-15

    Acid-sensing ion channels (ASIC) open in response to extracellular acidosis. ASIC1a, a particular subtype of these channels, has been described to have a postsynaptic distribution in the brain, being involved not only in ischemia and epilepsy, but also in fear and psychiatric pathologies. High-frequency stimulation of skeletal motor nerve terminals (MNTs) can induce presynaptic pH changes in combination with an acidification of the synaptic cleft, known to contribute to muscle fatigue. Here, we studied the role of ASIC1a channels on neuromuscular transmission. We combined a behavioral wire hanging test with electrophysiology, pharmacological, and immunofluorescence techniques to compare wild-type and ASIC1a lacking mice (ASIC1a (-/-) knockout). Our results showed that 1) ASIC1a (-/-) female mice were weaker than wild type, presenting shorter times during the wire hanging test; 2) spontaneous neurotransmitter release was reduced by ASIC1a activation, suggesting a presynaptic location of these channels at individual MNTs; 3) ASIC1a-mediated effects were emulated by extracellular local application of acid saline solutions (pH = 6.0; HEPES/MES-based solution); and 4) immunofluorescence techniques revealed the presence of ASIC1a antigens on MNTs. These results suggest that ASIC1a channels might be involved in controlling neuromuscular transmission, muscle contraction and fatigue in female mice.

  10. Acid-sensing ion channels 1a (ASIC1a) inhibit neuromuscular transmission in female mice

    PubMed Central

    Lino, Noelia G.; González-Inchauspe, Carlota M. F.; González, Laura E.; Colettis, Natalia; Vattino, Lucas G.; Wunsch, Amanda M.; Wemmie, John A.; Uchitel, Osvaldo D.

    2013-01-01

    Acid-sensing ion channels (ASIC) open in response to extracellular acidosis. ASIC1a, a particular subtype of these channels, has been described to have a postsynaptic distribution in the brain, being involved not only in ischemia and epilepsy, but also in fear and psychiatric pathologies. High-frequency stimulation of skeletal motor nerve terminals (MNTs) can induce presynaptic pH changes in combination with an acidification of the synaptic cleft, known to contribute to muscle fatigue. Here, we studied the role of ASIC1a channels on neuromuscular transmission. We combined a behavioral wire hanging test with electrophysiology, pharmacological, and immunofluorescence techniques to compare wild-type and ASIC1a lacking mice (ASIC1a −/− knockout). Our results showed that 1) ASIC1a −/− female mice were weaker than wild type, presenting shorter times during the wire hanging test; 2) spontaneous neurotransmitter release was reduced by ASIC1a activation, suggesting a presynaptic location of these channels at individual MNTs; 3) ASIC1a-mediated effects were emulated by extracellular local application of acid saline solutions (pH = 6.0; HEPES/MES-based solution); and 4) immunofluorescence techniques revealed the presence of ASIC1a antigens on MNTs. These results suggest that ASIC1a channels might be involved in controlling neuromuscular transmission, muscle contraction and fatigue in female mice. PMID:24336653

  11. Mongoose ASIC microcontroller programming guide

    NASA Technical Reports Server (NTRS)

    Smith, Brian S.

    1993-01-01

    The 'Mongoose' ASIC microcontroller is a radiation-hard implementation of the R3000 microprocessor. This document describes the internals of the microcontroller in a level of detail necessary for someone implementing a software design.

  12. Mongoose ASIC microcontroller programming guide

    NASA Astrophysics Data System (ADS)

    Smith, Brian S.

    1993-09-01

    The 'Mongoose' ASIC microcontroller is a radiation-hard implementation of the R3000 microprocessor. This document describes the internals of the microcontroller in a level of detail necessary for someone implementing a software design.

  13. Design Methodology: ASICs with complex in-pixel processing for Pixel Detectors

    SciTech Connect

    Fahim, Farah

    2014-10-31

    The development of Application Specific Integrated Circuits (ASIC) for pixel detectors with complex in-pixel processing using Computer Aided Design (CAD) tools that are, themselves, mainly developed for the design of conventional digital circuits requires a specialized approach. Mixed signal pixels often require parasitically aware detailed analog front-ends and extremely compact digital back-ends with more than 1000 transistors in small areas below 100μm x 100μm. These pixels are tiled to create large arrays, which have the same clock distribution and data readout speed constraints as in, for example, micro-processors. The methodology uses a modified mixed-mode on-top digital implementation flow to not only harness the tool efficiency for timing and floor-planning but also to maintain designer control over compact parasitically aware layout.

  14. Towards Evolving Electronic Circuits for Autonomous Space Applications

    NASA Technical Reports Server (NTRS)

    Lohn, Jason D.; Haith, Gary L.; Colombano, Silvano P.; Stassinopoulos, Dimitris

    2000-01-01

    The relatively new field of Evolvable Hardware studies how simulated evolution can reconfigure, adapt, and design hardware structures in an automated manner. Space applications, especially those requiring autonomy, are potential beneficiaries of evolvable hardware. For example, robotic drilling from a mobile platform requires high-bandwidth controller circuits that are difficult to design. In this paper, we present automated design techniques based on evolutionary search that could potentially be used in such applications. First, we present a method of automatically generating analog circuit designs using evolutionary search and a circuit construction language. Our system allows circuit size (number of devices), circuit topology, and device values to be evolved. Using a parallel genetic algorithm, we present experimental results for five design tasks. Second, we investigate the use of coevolution in automated circuit design. We examine fitness evaluation by comparing the effectiveness of four fitness schedules. The results indicate that solution quality is highest with static and co-evolving fitness schedules as compared to the other two dynamic schedules. We discuss these results and offer two possible explanations for the observed behavior: retention of useful information, and alignment of problem difficulty with circuit proficiency.

  15. ASIC1a Activation Enhances Inhibition in the Basolateral Amygdala and Reduces Anxiety

    PubMed Central

    Pidoplichko, Volodymyr I.; Aroniadou-Anderjaska, Vassiliki; Prager, Eric M.; Figueiredo, Taiza H.; Almeida-Suhett, Camila P.; Miller, Steven L.

    2014-01-01

    The discovery that even small changes in extracellular acidity can alter the excitability of neuronal networks via activation of acid-sensing ion channels (ASICs) could have therapeutic application in a host of neurological and psychiatric illnesses. Recent evidence suggests that activation of ASIC1a, a subtype of ASICs that is widely distributed in the brain, is necessary for the expression of fear and anxiety. Antagonists of ASIC1a, therefore, have been proposed as a potential treatment for anxiety. The basolateral amygdala (BLA) is central to fear generation, and anxiety disorders are characterized by BLA hyperexcitability. To better understand the role of ASIC1a in anxiety, we attempted to provide a direct assessment of whether ASIC1a activation increases BLA excitability. In rat BLA slices, activation of ASIC1a by low pH or ammonium elicited inward currents in both interneurons and principal neurons, and increased spontaneous IPSCs recorded from principal cells significantly more than spontaneous EPSCs. Epileptiform activity induced by high potassium and low magnesium was suppressed by ammonium. Antagonism of ASIC1a decreased spontaneous IPSCs more than EPSCs, and increased the excitability of the BLA network, as reflected by the pronounced increase of evoked field potentials, suggesting that ASIC1a channels are active in the basal state. In vivo activation or blockade of ASIC1a in the BLA suppressed or increased, respectively, anxiety-like behavior. Thus, in the rat BLA, ASIC1a has an inhibitory and anxiolytic function. The discovery of positive ASIC1a modulators may hold promise for the treatment of anxiety disorders. PMID:24573273

  16. 1998 technology roadmap for integrated circuits used in critical applications

    SciTech Connect

    Dellin, T.A.

    1998-09-01

    Integrated Circuits (ICs) are being extensively used in commercial and government applications that have extreme consequences of failure. The rapid evolution of the commercial microelectronics industry presents serious technical and supplier challenges to this niche critical IC marketplace. This Roadmap was developed in conjunction with the Using ICs in Critical Applications Workshop which was held in Albuquerque, NM, November 11--12, 1997.

  17. Low power RF amplifier circuit for ion trap applications

    NASA Astrophysics Data System (ADS)

    Noriega, J. R.; García-Delgado, L. A.; Gómez-Fuentes, R.; García-Juárez, A.

    2016-09-01

    A low power RF amplifier circuit for ion trap applications is presented and described. The amplifier is based on a class-D half-bridge amplifier with a voltage mirror driver. The RF amplifier is composed of an RF class-D amplifier, an envelope modulator to ramp up the RF voltage during the ion analysis stage, a detector or amplitude demodulation circuit for sensing the output signal amplitude, and a feedback amplifier that linearizes the steady state output of the amplifier. The RF frequency is set by a crystal oscillator and the series resonant circuit is tuned to the oscillator frequency. The resonant circuit components have been chosen, in this case, to operate at 1 MHz. In testings, the class-D stage operated at a maximum of 78 mW at 1.1356 MHz producing 225 V peak.

  18. LEC GaAs for integrated circuit applications

    NASA Technical Reports Server (NTRS)

    Kirkpatrick, C. G.; Chen, R. T.; Homes, D. E.; Asbeck, P. M.; Elliott, K. R.; Fairman, R. D.; Oliver, J. D.

    1984-01-01

    Recent developments in liquid encapsulated Czochralski techniques for the growth of semiinsulating GaAs for integrated circuit applications have resulted in significant improvements in the quality and quantity of GaAs material suitable for device processing. The emergence of high performance GaAs integrated circuit technologies has accelerated the demand for high quality, large diameter semiinsulating GaAs substrates. The new device technologies, including digital integrated circuits, monolithic microwave integrated circuits and charge coupled devices have largely adopted direct ion implantation for the formation of doped layers. Ion implantation lends itself to good uniformity and reproducibility, high yield and low cost; however, this technique also places stringent demands on the quality of the semiinsulating GaAs substrates. Although significant progress was made in developing a viable planar ion implantation technology, the variability and poor quality of GaAs substrates have hindered progress in process development.

  19. Design and performances of a low-noise and radiation-hardened readout ASIC for CdZnTe detectors

    NASA Astrophysics Data System (ADS)

    Bo, Gan; Tingcun, Wei; Wu, Gao; Yongcai, Hu

    2016-06-01

    In this paper, we present the design and performances of a low-noise and radiation-hardened front-end readout application specific integrated circuit (ASIC) dedicated to CdZnTe detectors for a hard X-ray imager in space applications. The readout channel is comprised of a charge sensitive amplifier, a CR-RC shaping amplifier, an analog output buffer, a fast shaper, and a discriminator. An 8-channel prototype ASIC is designed and fabricated in TSMC 0.35-μm mixed-signal CMOS technology, the die size of the prototype chip is 2.2 × 2.2 mm2. The input energy range is from 5 to 350 keV. For this 8-channel prototype ASIC, the measured electrical characteristics are as follows: the overall gain of the readout channel is 210 V/pC, the linearity error is less than 2%, the crosstalk is less than 0.36%, The equivalent noise charge of a typical channel is 52.9 e- at zero farad plus 8.2 e- per picofarad, and the power consumption is less than 2.4 mW/channel. Through the measurement together with a CdZnTe detector, the energy resolution is 5.9% at the 59.5-keV line under the irradiation of the radioactive source 241Am. The radiation effect experiments show that the proposed ASIC can resist the total ionization dose (TID) irradiation of higher than 200 krad(Si). Project supported by the National Key Scientific Instrument and Equipment Development Project (No. 2011YQ040082), the National Natural Science Foundation of China (Nos. 11475136, 11575144, 61176094), and the Shaanxi Natural Science Foundation of China (No. 2015JM1016).

  20. Design and performances of a low-noise and radiation-hardened readout ASIC for CdZnTe detectors

    NASA Astrophysics Data System (ADS)

    Bo, Gan; Tingcun, Wei; Wu, Gao; Yongcai, Hu

    2016-06-01

    In this paper, we present the design and performances of a low-noise and radiation-hardened front-end readout application specific integrated circuit (ASIC) dedicated to CdZnTe detectors for a hard X-ray imager in space applications. The readout channel is comprised of a charge sensitive amplifier, a CR-RC shaping amplifier, an analog output buffer, a fast shaper, and a discriminator. An 8-channel prototype ASIC is designed and fabricated in TSMC 0.35-μm mixed-signal CMOS technology, the die size of the prototype chip is 2.2 × 2.2 mm2. The input energy range is from 5 to 350 keV. For this 8-channel prototype ASIC, the measured electrical characteristics are as follows: the overall gain of the readout channel is 210 V/pC, the linearity error is less than 2%, the crosstalk is less than 0.36%, The equivalent noise charge of a typical channel is 52.9 e‑ at zero farad plus 8.2 e‑ per picofarad, and the power consumption is less than 2.4 mW/channel. Through the measurement together with a CdZnTe detector, the energy resolution is 5.9% at the 59.5-keV line under the irradiation of the radioactive source 241Am. The radiation effect experiments show that the proposed ASIC can resist the total ionization dose (TID) irradiation of higher than 200 krad(Si). Project supported by the National Key Scientific Instrument and Equipment Development Project (No. 2011YQ040082), the National Natural Science Foundation of China (Nos. 11475136, 11575144, 61176094), and the Shaanxi Natural Science Foundation of China (No. 2015JM1016).

  1. A 58 nW ECG ASIC With Motion-Tolerant Heartbeat Timing Extraction for Wearable Cardiovascular Monitoring.

    PubMed

    Da He, David; Sodini, Charles G

    2015-06-01

    An ASIC for wearable cardiovascular monitoring is implemented using a topology that takes advantage of the electrocardiogram's (ECG) waveform to replace the traditional ECG instrumentation amplifier, ADC, and signal processor with a single chip solution. The ASIC can extract heartbeat timings in the presence of baseline drift, muscle artifact, and signal clipping. The circuit can operate with ECGs ranging from the chest location to remote locations where the ECG magnitude is as low as 30 μV. Besides heartbeat detection, a midpoint estimation method can accurately extract the ECG R-wave timing, enabling the calculations of heart rate variability. With 58 nW of power consumption at 0.8 V supply voltage and 0.76 mm (2) of active die area in standard 0.18 μm CMOS technology, the ECG ASIC is sufficiently low power and compact to be suitable for long term and wearable cardiovascular monitoring applications under stringent battery and size constraints. PMID:25252285

  2. Printed circuits and their applications: Which way forward?

    NASA Astrophysics Data System (ADS)

    Cantatore, E.

    2015-09-01

    The continuous advancements in printed electronics make nowadays feasible the design of printed circuits which enable meaningful applications. Examples include ultra-low cost sensors embedded in food packaging, large-area sensing surfaces and biomedical assays. This paper offers an overview of state-of-the-art digital and analog circuit blocks, manufactured with a printed complementary organic TFT technology. An analog to digital converter and an RFID tag implemented exploiting these building blocks are also described. The main remaining drawbacks of the printed technology described are identified, and new approaches to further improve the state of the art, enabling more innovative applications are discussed.

  3. CWICOM: A Highly Integrated & Innovative CCSDS Image Compression ASIC

    NASA Astrophysics Data System (ADS)

    Poupat, Jean-Luc; Vitulli, Raffaele

    2013-08-01

    The space market is more and more demanding in terms of on image compression performances. The earth observation satellites instrument resolution, the agility and the swath are continuously increasing. It multiplies by 10 the volume of picture acquired on one orbit. In parallel, the satellites size and mass are decreasing, requiring innovative electronic technologies reducing size, mass and power consumption. Astrium, leader on the market of the combined solutions for compression and memory for space application, has developed a new image compression ASIC which is presented in this paper. CWICOM is a high performance and innovative image compression ASIC developed by Astrium in the frame of the ESA contract n°22011/08/NLL/LvH. The objective of this ESA contract is to develop a radiation hardened ASIC that implements the CCSDS 122.0-B-1 Standard for Image Data Compression, that has a SpaceWire interface for configuring and controlling the device, and that is compatible with Sentinel-2 interface and with similar Earth Observation missions. CWICOM stands for CCSDS Wavelet Image COMpression ASIC. It is a large dynamic, large image and very high speed image compression ASIC potentially relevant for compression of any 2D image with bi-dimensional data correlation such as Earth observation, scientific data compression… The paper presents some of the main aspects of the CWICOM development, such as the algorithm and specification, the innovative memory organization, the validation approach and the status of the project.

  4. ASIC3 channels in multimodal sensory perception.

    PubMed

    Li, Wei-Guang; Xu, Tian-Le

    2011-01-19

    Acid-sensing ion channels (ASICs), which are members of the sodium-selective cation channels belonging to the epithelial sodium channel/degenerin (ENaC/DEG) family, act as membrane-bound receptors for extracellular protons as well as nonproton ligands. At least five ASIC subunits have been identified in mammalian neurons, which form both homotrimeric and heterotrimeric channels. The highly proton sensitive ASIC3 channels are predominantly distributed in peripheral sensory neurons, correlating with their roles in multimodal sensory perception, including nociception, mechanosensation, and chemosensation. Different from other ASIC subunit composing ion channels, ASIC3 channels can mediate a sustained window current in response to mild extracellular acidosis (pH 7.3-6.7), which often occurs accompanied by many sensory stimuli. Furthermore, recent evidence indicates that the sustained component of ASIC3 currents can be enhanced by nonproton ligands including the endogenous metabolite agmatine. In this review, we first summarize the growing body of evidence for the involvement of ASIC3 channels in multimodal sensory perception and then discuss the potential mechanisms underlying ASIC3 activation and mediation of sensory perception, with a special emphasis on its role in nociception. We conclude that ASIC3 activation and modulation by diverse sensory stimuli represent a new avenue for understanding the role of ASIC3 channels in sensory perception. Furthermore, the emerging implications of ASIC3 channels in multiple sensory dysfunctions including nociception allow the development of new pharmacotherapy. PMID:22778854

  5. LTS junction technology for RSFQ and qubit circuit applications

    NASA Astrophysics Data System (ADS)

    Buchholz, F.-Im.; Balashov, D. V.; Dolata, R.; Hagedorn, D.; Khabipov, M. I.; Kohlmann, J.; Zorin, A. B.; Niemeyer, J.

    2006-10-01

    The potentials of LTS junction technology and electronics offer innovative solutions for the processing of quantum information in RSFQ and qubit circuits. We discuss forthcoming approaches based on standard SIS technology and addressed to the development of new superconducting device concepts. The challenging problem of reducing back action noise of the RSFQ circuits deteriorating coherent properties of the qubit is currently solved by implementing Josephson junctions with non-linear shunts based on LTS SIS-SIN technology. Upgraded NbAlOx trilayer technology enables the fabrication of high-quality mesoscopic Josephson junction transistors down to the nanometer range suitable for a qubit-operation regime. As applications, circuit concepts are presented which combine superconducting devices of different nature.

  6. FRONT-END ASIC FOR A SILICON COMPTON TELESCOPE.

    SciTech Connect

    DE GERONIMO,G.; FRIED, J.; FROST, E.; PHLIPS, B.; VERNON, E.; WULF, E.A.

    2007-10-27

    We describe a front-end application specific integrated circuit (ASIC) developed for a silicon Compton telescope. Composed of 32 channels, it reads out signals in both polarities from each side of a Silicon strip sensor, 2 mm thick 27 cm long, characterized by a strip capacitance of 30 pF. Each front-end channel provides low-noise charge amplification, shaping with a stabilized baseline, discrimination, and peak detection with an analog memory. The channels can process events simultaneously, and the read out is sparsified. The charge amplifier makes uses a dual-cascode configuration and dual-polarity adaptive reset, The low-hysteresis discriminator and the multi-phase peak detector process signals with a dynamic range in excess of four hundred. An equivalent noise charge (ENC) below 200 electrons was measured at 30 pF, with a slope of about 4.5 electrons/pF at a peaking time of 4 {micro}s. With a total dissipated power of 5 mW the channel covers an energy range up to 3.2 MeV.

  7. Airbag accelerometer with a simple switched-capacitor readout ASIC

    NASA Astrophysics Data System (ADS)

    Tsugai, Masahiro; Hirata, Yoshiaki; Tanimoto, Koji; Usami, Teruo; Araki, Toru; Otani, Hiroshi

    1997-09-01

    A bulk micromachined capacitive accelerometer for airbag applications based on (110) silicon anisotropic KOH etching is presented. The sensor is a two-chip accelerometer that consists of a glass-silicon-glass stacked sense element and an interface ASIC containing an impedance converter for capacitance detection, an EPROM and DACs for digital trimming, and a self-test feature for diagnosis. A simple switched-capacitor readout circuit with DC offset error cancellation scheme is proposed as the impedance converter. The dependence of narrow gap etching, surface roughness, and uniformity of the groove depth on the KOH concentration are also investigated for the fabrication of the device, and it is shown that the etch rate of the plane intrinsically controls the depth of the narrow gap with a KOH concentration of over 30 wt. percent, and smooth surface and uniformity of groove depth are obtained at 40 wt. percent KOH. The nonlinearity of the output is about 1.5 percent FS. The temperature coefficient of sensitivity and the off-axis sensitivity are 150 ppm/degree C and 2 percent respectively. The dimensions of the sensor are 10.3 X 10.3 X 3 mm.

  8. Data encryption standard ASIC design and development report.

    SciTech Connect

    Robertson, Perry J.; Pierson, Lyndon George; Witzke, Edward L.

    2003-10-01

    This document describes the design, fabrication, and testing of the SNL Data Encryption Standard (DES) ASIC. This device was fabricated in Sandia's Microelectronics Development Laboratory using 0.6 {micro}m CMOS technology. The SNL DES ASIC was modeled using VHDL, then simulated, and synthesized using Synopsys, Inc. software and finally IC layout was performed using Compass Design Automation's CAE tools. IC testing was performed by Sandia's Microelectronic Validation Department using a HP 82000 computer aided test system. The device is a single integrated circuit, pipelined realization of DES encryption and decryption capable of throughputs greater than 6.5 Gb/s. Several enhancements accommodate ATM or IP network operation and performance scaling. This design is the latest step in the evolution of DES modules.

  9. Driving a CCD with two ASICs: CABAC and ASPIC

    NASA Astrophysics Data System (ADS)

    Juramy, Claire; Antilogus, Pierre; Bailly, Philippe; Baumont, Sylvain; Dhellot, Marc; El Berni, Mowafak; Jeglot, Jimmy; Lebbolo, Hervé; Martin, David; Qureshi, Aftab; Russo, Stefano; Terront, Diego; Tocut, Vanessa; Vallerand, Philippe

    2014-07-01

    We present two lines of ASICs dedicated to the control and readout of CCD sensors. The CABAC (Clocks And Biases ASIC for CCDs) provides all required bias voltages and clocks. The ASPIC (Analog Signal Processing Integrated Circuit) processes 8 CCD output channels: amplification, Correlated Double Sampling, conversion to differential signal. Both chips are highly configurable in order to fulfill a wide range of astronomical CCD readout needs, from fast readout of wide-field imaging arrays to slower speeds and higher gains for spectroscopy. Their sizes and temperature ranges allow to integrate them in-cryostat, close to the sensors, and they offer diagnostic capabilities to assist the integration. In addition to extensive stand-alone tests, these chips are integrated in the LSST REB (Raft Electronics Board), and have been tested driving the E2V prototype CCD for the LSST focal plane.

  10. 3D probe array integrated with a front-end 100-channel neural recording ASIC

    NASA Astrophysics Data System (ADS)

    Cheng, Ming-Yuan; Yao, Lei; Tan, Kwan Ling; Lim, Ruiqi; Li, Peng; Chen, Weiguo

    2014-12-01

    Brain-machine interface technology can improve the lives of spinal cord injury victims and amputees. A neural interface system, consisting of a 3D probe array and a custom low-power (1 mW) 100-channel (100-ch) neural recording application-specific integrated circuit (ASIC), was designed and implemented to monitor neural activity. In this study, a microassembly 3D probe array method using a novel lead transfer technique was proposed to overcome the bonding plane mismatch encountered during orthogonal assembly. The proposed lead transfer technique can be completed using standard micromachining and packaging processes. The ASIC can be stacking-integrated with the probe array, minimizing the form factor of the assembled module. To minimize trauma to brain cells, the profile of the integrated probe array was controlled within 730 μm. The average impedance of the assembled probe was approximately 0.55 MΩ at 1 kHz. To verify the functionality of the integrated neural probe array, bench-top signal acquisitions were performed and discussed.

  11. Applications of the dynamic circuit theory to maglev suspension systems

    SciTech Connect

    He, Jian Liang; Rote, D.M.; Coffey, H.T.

    1993-11-01

    This paper discusses the applications of dynamic circuit theory to electrodynamic suspension EDS systems. In particular, the paper focuses on the loop-shaped coil and the figure-eight-shaped null-flux coil suspension systems. Mathematical models, including very general force expressions that can be used for the development of computer codes, are provided for each of these suspension systems. General applications and advantages of the dynamic circuit model are summarized. The paper emphasizes the transient and dynamic analysis and computer simulation of maglev systems. In general, the method discussed here can be applied to many EDS maglev design concepts. It is also suited for the computation of the performance of maglev propulsion systems. Numerical examples are presented in the paper to demonstrate the capability of the model.

  12. [Flexible print circuit technology application in biomedical engineering].

    PubMed

    Jiang, Lihua; Cao, Yi; Zheng, Xiaolin

    2013-06-01

    Flexible print circuit (FPC) technology has been widely applied in variety of electric circuits with high precision due to its advantages, such as low-cost, high specific fabrication ability, and good flexibility, etc. Recently, this technology has also been used in biomedical engineering, especially in the development of microfluidic chip and microelectrode array. The high specific fabrication can help making microelectrode and other micro-structure equipment. And good flexibility allows the micro devices based on FPC technique to be easily packaged with other parts. In addition, it also reduces the damage of microelectrodes to the tissue. In this paper, the application of FPC technology in biomedical engineering is introduced. Moreover, the important parameters of FPC technique and the development trend of prosperous applications is also discussed.

  13. A Prototype PZT Matrix Transducer With Low-Power Integrated Receive ASIC for 3-D Transesophageal Echocardiography.

    PubMed

    Chen, Chao; Raghunathan, Shreyas B; Yu, Zili; Shabanimotlagh, Maysam; Chen, Zhao; Chang, Zu-yao; Blaak, Sandra; Prins, Christian; Ponte, Jacco; Noothout, Emile; Vos, Hendrik J; Bosch, Johan G; Verweij, Martin D; de Jong, Nico; Pertijs, Michiel A P

    2016-01-01

    This paper presents the design, fabrication, and experimental evaluation of a prototype lead zirconium titanate (PZT) matrix transducer with an integrated receive ASIC, as a proof of concept for a miniature three-dimensional (3-D) transesophageal echocardiography (TEE) probe. It consists of an array of 9 ×12 piezoelectric elements mounted on the ASIC via an integration scheme that involves direct electrical connections between a bond-pad array on the ASIC and the transducer elements. The ASIC addresses the critical challenge of reducing cable count, and includes front-end amplifiers with adjustable gains and micro-beamformer circuits that locally process and combine echo signals received by the elements of each 3 ×3 subarray. Thus, an order-of-magnitude reduction in the number of receive channels is achieved. Dedicated circuit techniques are employed to meet the strict space and power constraints of TEE probes. The ASIC has been fabricated in a standard 0.18-μm CMOS process and consumes only 0.44 mW/channel. The prototype has been acoustically characterized in a water tank. The ASIC allows the array to be presteered across ±37° while achieving an overall dynamic range of 77 dB. Both the measured characteristics of the individual transducer elements and the performance of the ASIC are in good agreement with expectations, demonstrating the effectiveness of the proposed techniques.

  14. A VLSI ASIC front end for the optical module of the NEMO underwater neutrino detector

    NASA Astrophysics Data System (ADS)

    Lo Presti, Domenico

    2006-11-01

    The work described here has been developed in the context of the NEMO Collaboration with the aim of studying and designing a front-end electronics for the Optical Modules, which contains the telescope optical sensors, as a full-custom Very Large Scale Integration (VLSI) Application Specific Integrated Circuit (ASIC). The solution has a multitude of advantages. The most important are low power consumption and the pre-analysis and suitable reduction of data to be transferred to the shore station for acquisition. A detailed description of the chosen architecture and the design principles of the blocks, that carry out the specialized function required by this architecture, will be given. The chips produced will be described and the test measurements performed will be shown.

  15. Capturing a failure of an ASIC in-situ, using infrared radiometry and image processing software

    NASA Technical Reports Server (NTRS)

    Ruiz, Ronald P.

    2003-01-01

    Failures in electronic devices can sometimes be tricky to locate-especially if they are buried inside radiation-shielded containers designed to work in outer space. Such was the case with a malfunctioning ASIC (Application Specific Integrated Circuit) that was drawing excessive power at a specific temperature during temperature cycle testing. To analyze the failure, infrared radiometry (thermography) was used in combination with image processing software to locate precisely where the power was being dissipated at the moment the failure took place. The IR imaging software was used to make the image of the target and background, appear as unity. As testing proceeded and the failure mode was reached, temperature changes revealed the precise location of the fault. The results gave the design engineers the information they needed to fix the problem. This paper describes the techniques and equipment used to accomplish this failure analysis.

  16. A variable inductor for power applications using coupled circuits

    SciTech Connect

    Lashine, A.E. )

    1992-01-01

    In this paper, a variable inductor suitable for power system applications is presented. The inductor variation is based on varying the number of turns in a secondary circuit using triac switches. Unlike thyristor-controlled reactors, the inductance of the proposed reactor is varied in steps but without causing distortion in the inductor current. Mathematical expression for the effective impedance of the reactor is developed. Theoretical results are compared with those obtained experimentally using a test model.

  17. Digital circuits using universal logic gates

    NASA Technical Reports Server (NTRS)

    Whitaker, Sterling R. (Inventor); Miles, Lowell H. (Inventor); Cameron, Eric G. (Inventor); Donohoe, Gregory W. (Inventor); Gambles, Jody W. (Inventor)

    2004-01-01

    According to the invention, a digital circuit design embodied in at least one of a structural netlist, a behavioral netlist, a hardware description language netlist, a full-custom ASIC, a semi-custom ASIC, an IP core, an integrated circuit, a hybrid of chips, one or more masks, a FPGA, and a circuit card assembly is disclosed. The digital circuit design includes first and second sub-circuits. The first sub-circuits comprise a first percentage of the digital circuit design and the second sub-circuits comprise a second percentage of the digital circuit design. Each of the second sub-circuits is substantially comprised of one or more kernel circuits. The kernel circuits are comprised of selection circuits. The second percentage is at least 5%. In various embodiments, the second percentage could be at least 10%, 20%, 30%, 40%, 50%, 60%, 70%, 80%, 90%, or 95%.

  18. Localization and Behaviors in Null Mice Suggest that ASIC1 and ASIC2 Modulate Responses to Aversive Stimuli

    PubMed Central

    Price, Margaret P.; Gong, Huiyu; Parsons, Meredith G.; Kundert, Jacob R.; Reznikov, Leah R.; Bernardinelli, Luisa; Chaloner, Kathryn; Buchanan, Gordon F.; Wemmie, John A.; Richerson, George B.; Cassell, Martin D.; Welsh, Michael J.

    2014-01-01

    Acid sensing ion channels (ASICs) generate H+-gated Na+ currents that contribute to neuronal function and animal behavior. Like ASIC1, ASIC2 subunits are expressed in the brain and multimerize with ASIC1 to influence acid-evoked currents and facilitate ASIC1 localization to dendritic spines. To better understand how ASIC2 contributes to brain function, we localized the protein and tested the behavioral consequences of ASIC2 gene disruption. For comparison, we also localized ASIC1 and studied ASIC1−/− mice. ASIC2 was prominently expressed in areas of high synaptic density, and with a few exceptions, ASIC1 and ASIC2 localization exhibited substantial overlap. Loss of ASIC1 or ASIC2 decreased freezing behavior in contextual and auditory cue fear conditioning assays, in response to predator odor, and in response to CO2 inhalation. In addition, loss of ASIC1 or ASIC2 increased activity in a forced swim assay. These data suggest that ASIC2, like ASIC1, plays a key role in determining the defensive response to aversive stimuli. They also raise the question of whether gene variations in both ASIC1 and ASIC2 might affect fear and panic in humans. PMID:24256442

  19. Engineering Gene Circuits for Mammalian Cell-Based Applications.

    PubMed

    Ausländer, Simon; Fussenegger, Martin

    2016-01-01

    Synthetic gene switches are basic building blocks for the construction of complex gene circuits that transform mammalian cells into useful cell-based machines for next-generation biotechnological and biomedical applications. Ligand-responsive gene switches are cellular sensors that are able to process specific signals to generate gene product responses. Their involvement in complex gene circuits results in sophisticated circuit topologies that are reminiscent of electronics and that are capable of providing engineered cells with the ability to memorize events, oscillate protein production, and perform complex information-processing tasks. Microencapsulated mammalian cells that are engineered with closed-loop gene networks can be implanted into mice to sense disease-related input signals and to process this information to produce a custom, fine-tuned therapeutic response that rebalances animal metabolism. Progress in gene circuit design, in combination with recent breakthroughs in genome engineering, may result in tailored engineered mammalian cells with great potential for future cell-based therapies. PMID:27194045

  20. 20 CFR 410.670c - Application of circuit court law.

    Code of Federal Regulations, 2010 CFR

    2010-04-01

    ... 20 Employees' Benefits 2 2010-04-01 2010-04-01 false Application of circuit court law. 410.670c..., Administrative Review, Finality of Decisions, and Representation of Parties § 410.670c Application of circuit... involving the application of circuit court law. (a) The Administration will apply a holding in a...

  1. 20 CFR 410.670c - Application of circuit court law.

    Code of Federal Regulations, 2011 CFR

    2011-04-01

    ... 20 Employees' Benefits 2 2011-04-01 2011-04-01 false Application of circuit court law. 410.670c..., Administrative Review, Finality of Decisions, and Representation of Parties § 410.670c Application of circuit... involving the application of circuit court law. (a) The Administration will apply a holding in a...

  2. Delay locked loop integrated circuit.

    SciTech Connect

    Brocato, Robert Wesley

    2007-10-01

    This report gives a description of the development of a Delay Locked Loop (DLL) integrated circuit (IC). The DLL was developed and tested as a stand-alone IC test chip to be integrated into a larger application specific integrated circuit (ASIC), the Quadrature Digital Waveform Synthesizer (QDWS). The purpose of the DLL is to provide a digitally programmable delay to enable synchronization between an internal system clock and external peripherals with unknown clock skew. The DLL was designed and fabricated in the IBM 8RF process, a 0.13 {micro}m CMOS process. It was designed to operate with a 300MHz clock and has been tested up to 500MHz.

  3. Acid-Sensing Ion Channel 2a (ASIC2a) Promotes Surface Trafficking of ASIC2b via Heteromeric Assembly

    PubMed Central

    Kweon, Hae-Jin; Kim, Dong-Il; Bae, Yeonju; Park, Jae-Yong; Suh, Byung-Chang

    2016-01-01

    Acid-sensing ion channels (ASICs) are proton-activated cation channels that play important roles as typical proton sensors during pathophysiological conditions and normal synaptic activities. Among the ASIC subunits, ASIC2a and ASIC2b are alternative splicing products from the same gene, ACCN1. It has been shown that ASIC2 isoforms have differential subcellular distribution: ASIC2a targets the cell surface by itself, while ASIC2b resides in the ER. However, the underlying mechanism for this differential subcellular localization remained to be further elucidated. By constructing ASIC2 chimeras, we found that the first transmembrane (TM1) domain and the proximal post-TM1 domain (17 amino acids) of ASIC2a are critical for membrane targeting of the proteins. We also observed that replacement of corresponding residues in ASIC2b by those of ASIC2a conferred proton-sensitivity as well as surface expression to ASIC2b. We finally confirmed that ASIC2b is delivered to the cell surface from the ER by forming heteromers with ASIC2a, and that the N-terminal region of ASIC2a is additionally required for the ASIC2a-dependent membrane targeting of ASIC2b. Together, our study supports an important role of ASIC2a in membrane targeting of ASIC2b. PMID:27477936

  4. Millimeter-wave and optoelectronic applications of heterostructure integrated circuits

    NASA Technical Reports Server (NTRS)

    Pavlidis, Dimitris

    1991-01-01

    The properties are reviewed of heterostructure devices for microwave-monolithic-integrated circuits (MMICs) and optoelectronic integrated circuits (OICs). Specific devices examined include lattice-matched and pseudomorphic InAlAs/InGaAs high-electron mobility transistors (HEMTs), mixer/multiplier diodes, and heterojunction bipolar transistors (HBTs) developed with a number of materials. MMICs are reviewed that can be employed for amplification, mixing, and signal generation, and receiver/transmitter applications are set forth for OICs based on GaAs and InP heterostructure designs. HEMTs, HBTs, and junction-FETs can be utilized in combination with PIN, MSM, and laser diodes to develop novel communication systems based on technologies that combine microwave and photonic capabilities.

  5. Integral Battery Power Limiting Circuit for Intrinsically Safe Applications

    NASA Technical Reports Server (NTRS)

    Burns, Bradley M.; Blalock, Norman N.

    2010-01-01

    A circuit topology has been designed to guarantee the output of intrinsically safe power for the operation of electrical devices in a hazardous environment. This design uses a MOSFET (metal oxide semiconductor field-effect transistor) as a switch to connect and disconnect power to a load. A test current is provided through a separate path to the load for monitoring by a comparator against a preset threshold level. The circuit is configured so that the test current will detect a fault in the load and open the switch before the main current can respond. The main current passes through the switch and then an inductor. When a fault occurs in the load, the current through the inductor cannot change immediately, but the voltage drops immediately to safe levels. The comparator detects this drop and opens the switch before the current in the inductor has a chance to respond. This circuit protects both the current and voltage from exceeding safe levels. Typically, this type of protection is accomplished by a fuse or a circuit breaker, but in order for a fuse or a circuit breaker to blow or trip, the current must exceed the safe levels momentarily, which may be just enough time to ignite anything in a hazardous environment. To prevent this from happening, a fuse is typically current-limited by the addition of the resistor to keep the current within safe levels while the fuse reacts. The use of a resistor is acceptable for non-battery applications where the wasted energy and voltage drop across the resistor can be tolerated. The use of the switch and inductor minimizes the wasted energy. For example, a circuit runs from a 3.6-V battery that must be current-limited to 200 mA. If the circuit normally draws 10 mA, then an 18-ohm resistor would drop 180 mV during normal operation, while a typical switch (0.02 ohm) and inductor (0.97 ohm) would only drop 9.9 mV. From a power standpoint, the current-limiting resistor protection circuit wastes about 18 times more power than the

  6. AMPLITUDE AND TIME MEASUREMENT ASIC WITH ANALOG DERANDOMIZATION.

    SciTech Connect

    O CONNOR,P.; DE GERONIMO,G.; KANDASAMY,A.

    2002-11-10

    We describe a new ASIC for accurate and efficient processing of high-rate pulse signals from highly segmented detectors. In contrast to conventional approaches, this circuit affords a dramatic reduction in data volume through the use of analog techniques (precision peak detectors and time-to-amplitude converters) together with fast arbitration and sequencing logic to concentrate the data before digitization. In operation the circuit functions like a data-driven analog first-in, first-out (FIFO) memory between the preamplifiers and the ADC. Peak amplitudes of pulses arriving at any one of the 32 inputs are sampled, stored, and queued for readout and digitization through a single output port. Hit timing, pulse risetime, and channel address are also available at the output. Prototype chips have been fabricated in 0.35 micron CMOS and tested. First results indicate proper functionality for pulses down to 30 ns peaking time and input rates up to 1.6 MHz/channel. Amplitude accuracy of the peak detect and hold circuit is 0.3% (absolute). TAC accuracy is within 0.3% of full scale. Power consumption is less than 2 mW/channel. Compared with conventional techniques such as track-and-hold and analog memory, this new ASIC will enable efficient pulse height measurement at 20 to 300 times higher rates.

  7. STAR cluster-finder ASIC

    SciTech Connect

    Botlo, M.; LeVine, M.J.; Scheetz, R.A.

    1997-12-31

    The STAR experiment reads out a TPC and an SVT (silicon vertex tracker), both of which require in-line pedestal subtraction, compression of ADC values from 10-bit to 8-bit, and location of time sequences representing responses to charged-particle tracks. The STAR cluster finder ASIC responds to all of these needs. Pedestal subtraction and compression are performed using lookup tables in attached RAM. We describe its design and implementation, as well as testing methodology and results of tests performed on foundry prototypes.

  8. Latest results of SEE measurements obtained by the STRURED demonstrator ASIC

    NASA Astrophysics Data System (ADS)

    Candelori, A.; De Robertis, G.; Gabrielli, A.; Mattiazzo, S.; Pantano, D.; Ranieri, A.; Tessaro, M.

    2011-01-01

    With the perspective to develop a radiation-tolerant circuit for High Energy Physics (HEP) applications, a test digital ASIC VLSI chip, called STRURED, has been designed and fabricated using a standard-cell library of commercial 130 nm CMOS technology by implementing three different radiation-tolerant architectures (Hamming, Triple Modular Redundancy and Triple Time Redundancy) in order to correct circuit malfunctions induced by the occurrence of Soft Errors (SEs). SEs are one of the main reasons of failures affecting electronic digital circuits operating in harsh radiation environments, such as in experiments performed at HEP colliders or in apparatus to be operated in space. In this paper we present and discuss the latest results of SE cross-section measurements performed using the STRURED digital device, exposed to high energy heavy ions at the SIRAD irradiation facility of the INFN National Laboratories of Legnaro (Padova, Italy). In particular the different behaviors of the input part and the core of the three radiation-tolerant architectures are analyzed in detail.

  9. A demonstration of CMOS VLSI circuit prototyping in support of the site facility using the 1.2 micron standard cell library developed by National Security Agency

    NASA Astrophysics Data System (ADS)

    Smith, Edwyn D.

    1991-03-01

    Two silicon CMOS application specific integrated circuits (ASICs), a data generation chip, and a data checker chip were designed. The conversion of the data generator circuitry into a pair of CMOS ASIC chips using the 1.2 micron standard cell library is documented. The logic design of the data checker is discussed. The functions of the control circuitry is described. An accurate estimate of timing relationships is essential to make sure that the logic design performs correctly under practical conditions. Timing and delay information are examined.

  10. A demonstration of CMOS VLSI circuit prototyping in support of the site facility using the 1.2 micron standard cell library developed by National Security Agency

    NASA Technical Reports Server (NTRS)

    Smith, Edwyn D.

    1991-01-01

    Two silicon CMOS application specific integrated circuits (ASICs), a data generation chip, and a data checker chip were designed. The conversion of the data generator circuitry into a pair of CMOS ASIC chips using the 1.2 micron standard cell library is documented. The logic design of the data checker is discussed. The functions of the control circuitry is described. An accurate estimate of timing relationships is essential to make sure that the logic design performs correctly under practical conditions. Timing and delay information are examined.

  11. BAE Systems Radiation Hardened SpaceWire ASIC and Roadmap

    NASA Technical Reports Server (NTRS)

    Berger, Richard; Milliser, Myrna; Kapcio, Paul; Stanley, Dan; Moser, David; Koehler, Jennifer; Rakow, Glenn; Schnurr, Richard

    2006-01-01

    An Application Specific Integrated Circuit (ASIC) that implements the SpaceWire protocol has been developed in a radiation hardened 0.25 micron CMOS, technology. This effort began in March 2003 as a joint development between the NASA Goddard Space Flight Center (GSFC) and BAE Systems. The BAE Systems SpaceWire ASlC is comprised entirely of reusable core elements, many of which are already flight-proven. It incorporates a 4-port SpaceWire router with two local ports, dual PC1 bus interfaces, a microcontroller, 32KB of internal memory, -and a memory controller for additional external memory use. The SpaceWire ASlC is planned for use on both the Geostationary Operational Environmental Satellites (GOES)-R and the Lunar Reconnaissance Orbiter (LRO). Engineering parts have already been delivered to both programs. This paper discusses the SpaceWire protocol and those elements of it that have been built into the current SpaceWire reusable core. There are features within the core that go beyond the current standard that can be enabled or disabled by the user and these will be described. The adaptation of SpaceWire to BAE Systems' On Chip Bus (OCB) for compatibility with the other reusable cores will be discussed. Optional configurations within user systems will be shown. The physical imp!ementation of the design will be described and test results from the hardware will be discussed. Finally, the BAE Systems roadmap for SpaceWire developments will be discussed, including some products already in design as well as longer term plans.

  12. Science Enabling ASICs and FEEs for the JUICE and JEO Missions

    NASA Technical Reports Server (NTRS)

    Paschalidis, Nicholas; Sittler, Ed; Cooper, John; Christian, Eric; Moore, Tom

    2011-01-01

    A family of science enabling radiation hard Application Specific Integrated Circuits (ASICs), Front End Electronics (FEEs) and Event Processing Systems, with flight heritage on many NASA missions, is presented. These technologies play an important role in the miniaturization of instruments -and spacecraft systems- at the same time increasing performance and reducing power. The technologies target time of flight, position sensing, and energy measurements as well as standard housekeeping and telemetry functions for particle and fields instruments, but find applications in other instrument categories too. More specifically the technologies include: the TOF chip, 1D and 2D Delay Lines with MCP detectors, for high precision fast and low power time of flight and position sensing; the Energy chip for multichannel SSD readout with time over threshold and standard voltage read out for TDC and ADC digitization; Fast multi channel read out chip with commandable thresholds; the TRIO chip for multiplexed ADC and housekeeping etc. It should be mentioned that the ASICs include basic trigger capabilities to enable random event processing in a heavy background of penetrators and UV foreground. Typical instruments include time of flight versus energy and look angle particle analyzers such as: plasma composition, energetic particle, neutral atom imaging as well as fast plasma and deltaE/E ion/electron telescopes. Flight missions include: Cassini/LEMMS, IMAGE/HENA, MESSENGER/EPPS/MLA/X-ray/MLA, STEREO, PLUTO-NH/PEPSSI/LORI, IBEX-Lo, JUNO/JEDI, RBSP/RBSPICE, MMS/HPCA/EPD, SO/SIS. Given the proven capability on heavy radiation missions such as JUNO, MMS and RBSB, as well diverse long duration missions such as MESSENGER, PLUTO and Cassini, it is expected that these technologies will play an important role in the particle and fields (at least) instruments on the upcoming JUICE and JEO missions.

  13. ASIC or PIC? Implantable stimulators based on semi-custom CMOS technology or low-power microcontroller architecture.

    PubMed

    Salmons, S; Gunning, G T; Taylor, I; Grainger, S R; Hitchings, D J; Blackhurst, J; Jarvis, J C

    2001-01-01

    To gain a better understanding of the effects of chronic stimulation on mammalian muscles we needed to generate patterns of greater variety and complexity than simple constant-frequency or burst patterns. We describe here two approaches to the design of implantable neuromuscular stimulators that can satisfy these requirements. Devices of both types were developed and used in long-term experiments. The first device was based on a semi-custom Application Specific Integrated Circuit (ASIC). This approach has the advantage that the circuit can be completely tested at every stage of development and production, assuring a high degree of reliability. It has the drawback of inflexibility: the patterns are produced by state machines implemented in silicon, so each new set of patterns requires a fresh production run, which is costly and time-consuming. The second device was based on a commercial microcontroller (Microchip PIC16C84). The functionality of this type of circuit is specified in software rather than in silicon hardware, allowing a single device to be programmed for different functions. With the use of features designed to improve fault-tolerance we found this approach to be as reliable as that based on ASICs. The encapsulated devices can easily be accommodated subcutaneously on the flank of a rabbit and a recent version is small enough to implant into the peritoneal cavity of rats. The current devices are programmed with a predetermined set of 12 patterns before assembly; the desired pattern is selected after implantation with an electronic flash gun. The operating current drain is less than 40 microA.

  14. ASIC for high-speed-gating and free running operation of SPADs

    NASA Astrophysics Data System (ADS)

    Rochas, Alexis; Guillaume-Gentil, Christophe; Gautier, Jean-Daniel; Pauchard, Alexandre; Ribordy, Gregoire; Zbinden, Hugo; Leblebici, Yusuf; Monat, Laurent

    2007-05-01

    Single photon detection at telecom wavelengths is of importance in many industrial applications ranging from quantum cryptography, quantum optics, optical time domain reflectometry, non-invasive testing of VLSI circuits, eye-safe LIDAR to laser ranging. In practical applications, the combination of an InGaAs/InP APD with an appropriate electronic circuit still stands as the best solution in comparison with emerging technologies such as superconducting single photon detectors, MCP-PMTs for the near IR or up-conversion technique. An ASIC dedicated to the operation of InGaAs/InP APDs in both gated mode and free-running mode is presented. The 1.6mm2 chip is fabricated in a CMOS technology. It combines a gate generator, a voltage limiter, a fast comparator, a precise timing circuit for the gate signal processing and an output stage. A pulse amplitude of up to +7V can be achieved, which allows the operation of commercially available APDs at a single photon detection probability larger than 25% at 1.55μm. The avalanche quenching process is extremely fast, thus reducing the afterpulsing effects. The packaging of the diode in close proximity with the quenching circuit enables high speed gating at frequencies larger than 10MHz. The reduced connection lengths combined with impedance adaptation technique provide excellent gate quality, free of oscillations or bumps. The excess bias voltage is thus constant over the gate width leading to a stable single photon detection probability and timing resolution. The CMOS integration guarantees long-term stability, reliability and compactness.

  15. Design and fabrication of an infrared optical pyrometer ASIC as a diagnostic for shock physics experiments

    NASA Astrophysics Data System (ADS)

    Gordon, Jared

    Optical pyrometry is the sensing of thermal radiation emitted from an object using a photoconductive device to convert photons into electrons, and is an important diagnostic tool in shock physics experiments. Data obtained from an optical pyrometer can be used to generate a blackbody curve of the material prior to and after being shocked by a high speed projectile. The sensing element consists of an InGaAs photodiode array, biasing circuitry, and multiple transimpedance amplifiers to boost the weak photocurrent from the noisy dark current into a signal that can eventually be digitized. Once the circuit elements have been defined, more often than not commercial-off-the-shelf (COTS) components are inadequate to satisfy every requirement for the diagnostic, and therefore a custom application specific design has to be considered. This thesis outlines the initial challenges with integrating the photodiode array block with multiple COTS transimpedance amplifiers onto a single chip, and offers a solution to a comparable optical pyrometer that uses the same type of photodiodes in conjunction with a re-designed transimpedance amplifier integrated onto a single chip. The final design includes a thorough analysis of the transimpedance amplifier along with modeling the circuit behavior which entails schematics, simulations, and layout. An alternative circuit is also investigated that incorporates an approach to multiplex the signals from each photodiode onto one data line and not only increases the viable real estate on the chip, but also improves the behavior of the photodiodes as they are subjected to less thermal load. The optical pyrometer application specific integrated circuit (ASIC) for shock physic experiments includes a transimpedance amplifier (TIA) with a 100 kΩ gain operating at bandwidth of 30 MHz, and an input-referred noise RMS current of 50 nA that is capable of driving a 50 Ω load.

  16. Hybrid planar lightwave circuits for defense and aerospace applications

    NASA Astrophysics Data System (ADS)

    Zhang, Hua; Bidnyk, Serge; Yang, Shiquan; Balakrishnan, Ashok; Pearson, Matt; O'Keefe, Sean

    2010-04-01

    We present innovations in Planar Lightwave Circuits (PLCs) that make them ideally suited for use in advanced defense and aerospace applications. We discuss PLCs that contain no micro-optic components, no moving parts, pose no spark or fire hazard, are extremely small and lightweight, and are capable of transporting and processing a range of optical signals with exceptionally high performance. This PLC platform is designed for on-chip integration of active components such as lasers and detectors, along with transimpedance amplifiers and other electronics. These active components are hybridly integrated with our silica-on-silicon PLCs using fully-automated robotics and image recognition technology. This PLC approach has been successfully applied to the design and fabrication of multi-channel transceivers for aerospace applications. The chips contain hybrid DFB lasers and high-efficiency detectors, each capable of running over 10 Gb/s, with mixed digital and analog traffic multiplexed to a single optical fiber. This highlyintegrated functionality is combined onto a silicon chip smaller than 4 x 10 mm, weighing < 5 grams. These chip-based transceivers have been measured to withstand harsh g-forces, including sinusoidal vibrations with amplitude of 20 g acceleration, followed by mechanical shock of 500 g acceleration. The components operate over a wide range of temperatures, with no device failures after extreme temperature cycling through a range of > 125 degC, and more than 2,000 hours operating at 95 degC ambient air temperature. We believe that these recent advancements in planar lightwave circuits are poised to revolutionize optical communications and interconnects in the aerospace and defense industries.

  17. An array of virtual Frisch-grid CdZnTe detectors and a front-end application-specific integrated circuit for large-area position-sensitive gamma-ray cameras

    SciTech Connect

    Bolotnikov, A. E. Ackley, K.; Camarda, G. S.; Cherches, C.; Cui, Y.; De Geronimo, G.; Fried, J.; Hossain, A.; Mahler, G.; Maritato, M.; Roy, U.; Salwen, C.; Vernon, E.; Yang, G.; James, R. B.; Hodges, D.; Lee, W.; Petryk, M.

    2015-07-15

    We developed a robust and low-cost array of virtual Frisch-grid CdZnTe detectors coupled to a front-end readout application-specific integrated circuit (ASIC) for spectroscopy and imaging of gamma rays. The array operates as a self-reliant detector module. It is comprised of 36 close-packed 6 × 6 × 15 mm{sup 3} detectors grouped into 3 × 3 sub-arrays of 2 × 2 detectors with the common cathodes. The front-end analog ASIC accommodates up to 36 anode and 9 cathode inputs. Several detector modules can be integrated into a single- or multi-layer unit operating as a Compton or a coded-aperture camera. We present the results from testing two fully assembled modules and readout electronics. The further enhancement of the arrays’ performance and reduction of their cost are possible by using position-sensitive virtual Frisch-grid detectors, which allow for accurate corrections of the response of material non-uniformities caused by crystal defects.

  18. An array of virtual Frisch-grid CdZnTe detectors and a front-end application-specific integrated circuit for large-area position-sensitive gamma-ray cameras.

    PubMed

    Bolotnikov, A E; Ackley, K; Camarda, G S; Cherches, C; Cui, Y; De Geronimo, G; Fried, J; Hodges, D; Hossain, A; Lee, W; Mahler, G; Maritato, M; Petryk, M; Roy, U; Salwen, C; Vernon, E; Yang, G; James, R B

    2015-07-01

    We developed a robust and low-cost array of virtual Frisch-grid CdZnTe detectors coupled to a front-end readout application-specific integrated circuit (ASIC) for spectroscopy and imaging of gamma rays. The array operates as a self-reliant detector module. It is comprised of 36 close-packed 6 × 6 × 15 mm(3) detectors grouped into 3 × 3 sub-arrays of 2 × 2 detectors with the common cathodes. The front-end analog ASIC accommodates up to 36 anode and 9 cathode inputs. Several detector modules can be integrated into a single- or multi-layer unit operating as a Compton or a coded-aperture camera. We present the results from testing two fully assembled modules and readout electronics. The further enhancement of the arrays' performance and reduction of their cost are possible by using position-sensitive virtual Frisch-grid detectors, which allow for accurate corrections of the response of material non-uniformities caused by crystal defects.

  19. Development of the analog ASIC for multi-channel readout X-ray CCD camera

    NASA Astrophysics Data System (ADS)

    Nakajima, Hiroshi; Matsuura, Daisuke; Idehara, Toshihiro; Anabuki, Naohisa; Tsunemi, Hiroshi; Doty, John P.; Ikeda, Hirokazu; Katayama, Haruyoshi; Kitamura, Hisashi; Uchihori, Yukio

    2011-03-01

    We report on the performance of an analog application-specific integrated circuit (ASIC) developed aiming for the front-end electronics of the X-ray CCD camera system onboard the next X-ray astronomical satellite, ASTRO-H. It has four identical channels that simultaneously process the CCD signals. Distinctive capability of analog-to-digital conversion enables us to construct a CCD camera body that outputs only digital signals. As the result of the front-end electronics test, it works properly with low input noise of ≤30μV at the pixel rate below 100 kHz. The power consumption is sufficiently low of ˜150mW/chip. The input signal range of ±20 mV covers the effective energy range of the typical X-ray photon counting CCD (up to 20 keV). The integrated non-linearity is 0.2% that is similar as those of the conventional CCDs in orbit. We also performed a radiation tolerance test against the total ionizing dose (TID) effect and the single event effect. The irradiation test using 60Co and proton beam showed that the ASIC has the sufficient tolerance against TID up to 200 krad, which absolutely exceeds the expected amount of dose during the period of operating in a low-inclination low-earth orbit. The irradiation of Fe ions with the fluence of 5.2×108 Ion/cm2 resulted in no single event latchup (SEL), although there were some possible single event upsets. The threshold against SEL is higher than 1.68 MeV cm2/mg, which is sufficiently high enough that the SEL event should not be one of major causes of instrument downtime in orbit.

  20. A 290 mV Sub-V(T) ASIC for Real-Time Atrial Fibrillation Detection.

    PubMed

    Andersson, Oskar; Chon, Ki H; Sornmo, Leif; Rodrigues, Joachim Neves

    2015-06-01

    A real-time detector for episodes of atrial fibrillation is fabricated as an application specific integrated circuit (ASIC). The basis for detection is a set of three parameters for characterizing the RR interval series, i.e., turning point ratio, root mean square of successive differences, and Shannon entropy. The developed hardware architecture targets ultra-low voltage operation, suitable for implantable loop recorders with ultra-low energy requirements. Algorithmic and architectural optimizations are performed to minimize area and energy dissipation, with a total area footprint reduction of 44%. The design is fabricated in 65-nm CMOS low-leakage high-threshold technology. Measurements with aggressively scaled supply voltage (VDD) in the subthreshold (sub-VT) region show energy savings of up to 41 X when operating at 1 kHz with a VDD of 300 mV compared to a nominal VDD of 1.2 V. PMID:25343767

  1. Genetic mapping of ASIC4 and contrasting phenotype to ASIC1a in modulating innate fear and anxiety.

    PubMed

    Lin, Shing-Hong; Chien, Ya-Chih; Chiang, Wei-Wei; Liu, Yan-Zhen; Lien, Cheng-Chang; Chen, Chih-Cheng

    2015-06-01

    Although ASIC4 is a member of the acid-sensing ion channel (ASIC) family, we have limited knowledge of its expression and physiological function in vivo. To trace the expression of this ion channel, we generated the ASIC4-knockout/CreERT(2)-knockin (Asic4(Cre) (ERT) (2)) mouse line. After tamoxifen induction in the Asic4(Cre) (ERT)(2)::CAG-STOP(floxed)-Td-tomato double transgenic mice, we mapped the expression of ASIC4 at the cellular level in the central nervous system (CNS). ASIC4 was expressed in many brain regions, including the olfactory bulb, cerebral cortex, striatum, hippocampus, amygdala, thalamus, hypothalamus, brain stem, cerebellum, spinal cord and pituitary gland. Colocalisation studies further revealed that ASIC4 was expressed mainly in three types of cells in the CNS: (i) calretinin (CR)-positive and/or vasoactive intestine peptide (VIP)-positive interneurons; (ii) neural/glial antigen 2 (NG2)-positive glia, also known as oligodendrocyte precursor cells; and (iii) cerebellar granule cells. To probe the possible role of ASIC4, we hypothesised that ASIC4 could modulate the membrane expression of ASIC1a and thus ASIC1a signaling in vivo. We conducted behavioral phenotyping of Asic4(Cre) (ERT)(2) mice by screening many of the known behavioral phenotypes found in Asic1a knockouts and found ASIC4 not involved in shock-evoked fear learning and memory, seizure termination or psychostimulant-induced locomotion/rewarding effects. In contrast, ASIC4 might play an important role in modulating the innate fear response to predator odor and anxious state because ASIC4-mutant mice showed increased freezing response to 2,4,5-trimethylthiazoline and elevated anxiety-like behavior in both the open-field and elevated-plus maze. ASIC4 may modulate fear and anxiety by counteracting ASIC1a activity in the brain. PMID:25828470

  2. Application of telecom planar lightwave circuits for homeland security sensing

    NASA Astrophysics Data System (ADS)

    Veldhuis, Gert J.; Elders, Job; van Weerden, Harm; Amersfoort, Martin

    2004-03-01

    Over the past decade, a massive effort has been made in the development of planar lightwave circuits (PLCs) for application in optical telecommunications. Major advances have been made, on both the technological and functional performance front. Highly sophisticated software tools that are used to tailor designs to required functional performance support these developments. In addition extensive know-how in the field of packaging, testing, and failure mode and effects analysis (FMEA) has been built up in the struggle for meeting the stringent Telcordia requirements that apply to telecom products. As an example, silica-on-silicon is now a mature technology available at several industrial foundries around the world, where, on the performance front, the arrayed-waveguide grating (AWG) has evolved into an off-the-shelf product. The field of optical chemical-biological (CB) sensors for homeland security application can greatly benefit from the advances as described above. In this paper we discuss the currently available technologies, device concepts, and modeling tools that have emerged from the telecommunications arena and that can effectively be applied to the field of homeland security. Using this profound telecom knowledge base, standard telecom components can readily be tailored for detecting CB agents. Designs for telecom components aim at complete isolation from the environment to exclude impact of environmental parameters on optical performance. For sensing applications, the optical path must be exposed to the measurand, in this area additional development is required beyond what has already been achieved in telecom development. We have tackled this problem, and are now in a position to apply standard telecom components for CB sensing. As an example, the application of an AWG as a refractometer is demonstrated, and its performance evaluated.

  3. Design of beam steering electronic circuits for medical applications

    NASA Astrophysics Data System (ADS)

    Safar, Mohammad A. A. A.

    This thesis deals with the theory and design of a hemispherical antenna array circuit that is capable to operate in the intermediate zones. By doing that, this array can be used in Hyperthermia Treatment for Brain Cancer in which the aim is to noninvasively focus the fields at microwave frequencies to the location of the tumor cells in the brain. Another possible application of the array is to offer an alternative means of sustaining Deep Brain Stimulation other than using the traditional (surgical) approach. The new noninvasive technique is accomplished by the use of a hemispherical antenna array placed on the human's head. The array uses a new beamforming technique that achieves 3 dimensional beamforming or focusing of the magnetic field of antennas to desired points in the brain to achieve either cell death by temperature rise (Hyperthermia Application) or to cause brain stimulation and hopefully alleviate the affects of Parkinson's Disease (Deep Brain Stimulation). The main obstacle in this design was that the far field approximation that is usually used when designing antenna arrays does not apply in this case since the hemispherical array is in close proximity to where the magnetic field is desired to be focused. The antenna array problem is approached as a boundary-valued problem with the human head being modeled as a three layered hemisphere. The exact expressions for electromagnetic fields are derived. Health issues such as electric field exposure and specific absorption rate (SAR) are considered. After developing the main antenna and beamforming theory, a neural network is designed to accomplish the beamforming technique used. The radio-frequency (RF) transmitter was designed to transmit the fields at a frequency of 1.8 GHz. The antenna array can also be used as a receiver. The antenna and beamforming theory is presented. A new reception technique is shown which enables the array to receive multiple magnetic field sources from within the hemispherical

  4. Development of an ASIC for the readout and control of near-infrared large array detectors

    NASA Astrophysics Data System (ADS)

    Meier, Dirk; Berge, Hans Kristian Otnes; Hasanbegovic, Amir; Altan, Mehmet A.; Najafiuchevler, Bahram; Azman, Suleyman; Talebi, Jahanzad; Olsen, Alf; Øya, Petter; Paahlsson, Philip; Gheorghe, Codin; Maehlum, Gunnar

    2014-07-01

    The article describes the near infrared readout and controller ASIC (NIRCA) developed by Integrated Detector Electronics AS (IDEAS). The project aims at future astronomical science and Earth observation missions, where the ASIC will be used with image sensors based on mercury cadmium telluride (HgCdTe, or MCT). NIRCA is designed to operate from cryogenic temperatures (77 K) to higher than room temperature (328 K) and in a high radiation environment (LET > 60 MeVcm2/mg). The ASIC connects to the readout integrated circuit (ROIC) and delivers fully digitized data via serial digital output. The ASIC contains an analogue front-end (AFE) with 4 analogue-to-digital converters (ADCs) and programmable gain amplifiers with offset adjustment. The ADCs have a differential input swing of +/-2 V, 12-bit resolution, and a maximum sample rate of 3 MSps. The ASIC contains a programmable sequencer (microcontroller) to generate up to 40 digital signals for the ROIC and to control the analogue front-end and DACs on the chip. The ASIC has two power supply voltage regulators that provide the ROIC with 1.8 V and 3.3 V, and programmable 10-bit DACs to generate 16 independent reference and bias voltages from 0.3 V to 3 V. In addition NIRCA allows one to read 8 external digital signals, and monitor external and internal analogue signals including onchip temperature. NIRCA can be programmed and controlled via SPI interface for all internal functions and allows data forwarding from and to the ROIC SPI interface.

  5. Heterodyne lock-in thermal coupling measurements in integrated circuits: Applications to test and characterization.

    PubMed

    Altet, J; Aldrete-Vidrio, E; Mateo, D; Salhi, A; Grauby, S; Claeys, W; Dilhaire, S; Perpiñà, X; Jordà, X

    2009-02-01

    Heterodyne strategies can be used to characterize thermal coupling in integrated circuits when the electrical bandwidth of the dissipating circuit is beyond the bandwidth of the thermal coupling mechanism. From the characterization of the thermal coupling, two possible applications are described: extraction of characteristics of the dissipating circuit (the determination of the center frequency of a low-noise amplifier) and the extraction of the thermal coupling transfer function. PMID:19256677

  6. ASICs as therapeutic targets for migraine

    PubMed Central

    2015-01-01

    Migraine is the most common neurological disorder and one of the most common chronic pain conditions. Despite its prevalence, the pathophysiology leading to migraine is poorly understood and the identification of new therapeutic targets has been slow. Several processes are currently thought to contribute to migraine including altered activity in the hypothalamus, cortical-spreading depression (CSD), and afferent sensory input from the cranial meninges. Decreased extracellular pH and subsequent activation of acid-sensing ion channels (ASICs) may contribute to each of these processes and may thus play a role in migraine pathophysiology. Although few studies have directly examined a role of ASICs in migraine, studies directly examining a connection have generated promising results including efficacy of ASIC blockers in both preclinical migraine models and in human migraine patients. The purpose of this review is to discuss the pathophysiology thought to contribute to migraine and findings that implicate decreased pH and/or ASICs in these events, as well as propose issues to be resolved in future studies of ASICs and migraine. PMID:25582295

  7. Power-driven FPGA to ASIC conversion

    NASA Astrophysics Data System (ADS)

    Fang, WenHai; Spaanenburg, Lambert

    2007-05-01

    Gate arrays are often presented as a convenient means for ASIC prototyping. Obviously, they can both perform the same function and therefore be built from the same behavioral description. Design development implies a process of subsequent parameter bindings, leaving steadily less freedom for the remaining implementation choices. On the other hand, the ASIC offers more place & route freedom than the gate array. Hence it is commonly suggested that an optimal prototype will always have an acceptable ASIC realization. But this does not make the gate array an easy stepping-stone in ASIC development. Differences in platform technology induce a different structural sugaring to achieve a reasonable implementation. This cannot easily be ported, unless the implementation is developed while keeping the restrictions for the other technology in mind. Such implies a number of scaling rules to be the foundation of the design transformation process. This paper looks into the platform commonalities of Field-Programmable Gate-arrays and standard-cell ASICs from fundamental physical principles. These basic considerations are then related to show how the area and speed restrictions in the logic synthesis can be applied to carry power efficient designs efficiently from prototype to realization. This is illustrated in the design of the SNOW-2 encryption core, where a consistent 38% power reduction is achieved.

  8. Short Circuit Analysis of Induction Machines Wind Power Application

    SciTech Connect

    Starke, Michael R; Smith, Travis M; Howard, Dustin; Harley, Ronald

    2012-01-01

    he short circuit behavior of Type I (fixed speed) wind turbine-generators is analyzed in this paper to aid in the protection coordination of wind plants of this type. A simple network consisting of one wind turbine-generator is analyzed for two network faults: a three phase short circuit and a phase A to ground fault. Electromagnetic transient simulations and sequence network calculations are compared for the two fault scenarios. It is found that traditional sequence network calculations give accurate results for the short circuit currents in the balanced fault case, but are inaccurate for the un-faulted phases in the unbalanced fault case. The time-current behavior of the fundamental frequency component of the short circuit currents for both fault cases are described, and found to differ significantly in the unbalanced and balanced fault cases

  9. Development of integrated thermionic circuits for high-temperature applications

    NASA Technical Reports Server (NTRS)

    Mccormick, J. B.; Wilde, D.; Depp, S.; Hamilton, D. J.; Kerwin, W.; Derouin, C.; Roybal, L.; Wooley, R.

    1981-01-01

    Integrated thermionic circuits (ITC) capable of extended operation in ambient temperatures up to 500 C are studied. A set of practical design and performance equations is demonstrated. Experimental results are discussed in which both devices and simple circuits were successfully operated in 5000 C environments for extended periods. It is suggested that ITC's may become an important technology for high temperature instrumentation and control systems in geothermal and other high temperature environments.

  10. Development of integrated thermionic circuits for high-temperature applications

    SciTech Connect

    McCormick, J.B.; Wilde, D.; Depp, S.; Hamilton, D.J.; Kerwin, W.

    1981-01-01

    This report describes a class of microminiature, thin film devices known as integrated thermionic circuits (ITC) capable of extended operation in ambient temperatures up to 500/sup 0/C. The evolution of the ITC concept is discussed. A set of practical design and performance equations is demonstrated. Recent experimental results are discussed in which both devices and simple circuits have successfully operated in 500/sup 0/C environments for extended periods of time (greater than 11,000 hours).

  11. Development of thermionic integrated circuits for applications in hostile environments

    SciTech Connect

    McCormik, J.B.; Lynn, D.K.; Wilde, D.; Cowan, R.; Hamilton, D.J.; Kerwin, W.; Dooley, R.

    1984-04-10

    This report describes a class of devices known as thermionic integrated circuits (TICs) that are capable of extended operation in ambient temperatures up to 500/sup 0/C and in high radiation environments. The evolution of the TIC concept is discussed. A set of practical design and performance equations is demonstrated. Recent experimental results are discussed in which both devices and simple circuits have successfully operated in 500/sup 0/C environments for extended periods of time.

  12. Driver circuit

    NASA Technical Reports Server (NTRS)

    Matsumoto, Raymond T. (Inventor); Higashi, Stanley T. (Inventor)

    1976-01-01

    A driver circuit which has low power requirements, a relatively small number of components and provides flexibility in output voltage setting. The driver circuit comprises, essentially, two portions which are selectively activated by the application of input signals. The output signal is determined by which of the two circuit portions is activated. While each of the two circuit portions operates in a manner similar to silicon controlled rectifiers (SCR), the circuit portions are on only when an input signal is supplied thereto.

  13. Y-Ba-Cu-O superconducting/GaAs semiconducting hybrid circuits for microwave applications

    NASA Technical Reports Server (NTRS)

    Bhasin, K. B.; Toncich, S. S.; Chorey, C. M.; Rohrer, N. J.; Valco, G. J.

    1993-01-01

    A two pole superconducting bandpass filter was combined with a packaged GaAs low noise amplifier, and a superconducting X-band oscillator was designed, fabricated, and tested. Both circuits were compared to normal metal circuits at 77K. The results of these experiments, technical issues, and potential applications are presented.

  14. Asynchronous data readout system for multichannel ASIC

    NASA Astrophysics Data System (ADS)

    Ivanov, P. Y.; Atkin, E. V.

    2016-02-01

    The data readout system of multichannel data-driven ASIC, requiring high-speed (320 Mb/s) output data serialization is described. Its structure, based on a limited number of FIFO blocks, provides a lossless data transfer. The solution has been realized as a separate test IP block in the prototyped 8 channel ASIC, intended for the muon chamber of CBM experiment at FAIR. The block was developed for the UMC 0.18 μm MMRF CMOS process and prototyped via Europractice. Main parameters of the chip are given.

  15. Sensor-based whole-arm obstacle avoidance utilizing ASIC technology

    NASA Astrophysics Data System (ADS)

    Wintenberg, A. L.; Ericson, M. N.; Babcock, S. M.; Armstrong, G. A.; Britton, C. L., Jr.; Butler, P. L.; Hamel, W. R.; Newport, D. F.

    Operation of manipulator systems in poorly defined work environments often presents a significant hazard to both the robotic assembly and the environment. In applications relating to the Environmental Restoration and Waste Management (ER&WM) Program, many of the environments are considered hazardous, both, in the structure and composition of the environment. Use of a sensing system that provides information to the manipulator control unit regarding obstacles in close proximity will provide protection against collisions. A hierarchical design and implementation of a whole-arm obstacle avoidance system is presented. The system is based on capacitive sensors configured as bracelets for proximity sensing. Each bracelet contains a number of sensor nodes and a processor for sensor node control and readout, and communications with a higher level host, common to all bracelets. The host controls the entire sensing network and communicates proximity information to the manipulator controller. The overall architecture of this system is discussed with detail on the individual system modules. Details of an application specific integrated circuit (ASIC) designed to implement the sensor node electronics are presented. Justifications for the general measurement methods and associated implementation are discussed. Additionally, the current state of development including measured data is presented.

  16. Micropower circuits for bidirectional wireless telemetry in neural recording applications.

    PubMed

    Neihart, Nathan M; Harrison, Reid R

    2005-11-01

    State-of-the art neural recording systems require electronics allowing for transcutaneous, bidirectional data transfer. As these circuits will be implanted near the brain, they must be small and low power. We have developed micropower integrated circuits for recovering clock and data signals over a transcutaneous power link. The data recovery circuit produces a digital data signal from an ac power waveform that has been amplitude modulated. We have also developed an FM transmitter with the lowest power dissipation reported for biosignal telemetry. The FM transmitter consists of a low-noise biopotential amplifier and a voltage controlled oscillator used to transmit amplified neural signals at a frequency near 433 MHz. All circuits were fabricated in a standard 0.5-microm CMOS VLSI process. The resulting chip is powered through a wireless inductive link. The power consumption of the clock and data recovery circuits is measured to be 129 microW; the power consumption of the transmitter is measured to be 465 microW when using an external surface mount inductor. Using a parasitic antenna less than 2 mm long, a received power level was measured to be -59.73 dBm at a distance of one meter. PMID:16285399

  17. Micropower circuits for bidirectional wireless telemetry in neural recording applications.

    PubMed

    Neihart, Nathan M; Harrison, Reid R

    2005-11-01

    State-of-the art neural recording systems require electronics allowing for transcutaneous, bidirectional data transfer. As these circuits will be implanted near the brain, they must be small and low power. We have developed micropower integrated circuits for recovering clock and data signals over a transcutaneous power link. The data recovery circuit produces a digital data signal from an ac power waveform that has been amplitude modulated. We have also developed an FM transmitter with the lowest power dissipation reported for biosignal telemetry. The FM transmitter consists of a low-noise biopotential amplifier and a voltage controlled oscillator used to transmit amplified neural signals at a frequency near 433 MHz. All circuits were fabricated in a standard 0.5-microm CMOS VLSI process. The resulting chip is powered through a wireless inductive link. The power consumption of the clock and data recovery circuits is measured to be 129 microW; the power consumption of the transmitter is measured to be 465 microW when using an external surface mount inductor. Using a parasitic antenna less than 2 mm long, a received power level was measured to be -59.73 dBm at a distance of one meter.

  18. A DSP implementation of lifting based DWT for image processing applications

    NASA Astrophysics Data System (ADS)

    Gholipour, Morteza; Noubari, Hossein A.; Kamarei, Mahmoud

    2011-10-01

    Discrete Wavelet Transform (DWT) is widely used in signal processing applications. In this paper, we describe hardware implementation of a lifting-based DWT, which is used in image compression. The CDF(2,2) lifting-based wavelet transform is modeled and simulated using MATLAB. Based on DSP methodologies, the signal flow graph and dependence graph are derived. The dependence graph is optimized and used to implement the hardware description of the circuit in Verilog. We have synthesized and implemented the circuit using both Field Programmable Gate Array (FPGA) and Application Specific Integrated Circuit (ASIC) design approaches. To confirm the circuit operation, post-synthesis and post-layout simulations were done for FPGA and ASIC designs, respectively.

  19. Circuit for Communication Over Power Lines

    NASA Technical Reports Server (NTRS)

    Krasowski, Michael J.; Prokop, Normal F.; Greer, Lawrence C., III; Nappier, Jennifer

    2011-01-01

    Many distributed systems share common sensors and instruments along with a common power line supplying current to the system. A communication technique and circuit has been developed that allows for the simple inclusion of an instrument, sensor, or actuator node within any system containing a common power bus. Wherever power is available, a node can be added, which can then draw power for itself, its associated sensors, and actuators from the power bus all while communicating with other nodes on the power bus. The technique modulates a DC power bus through capacitive coupling using on-off keying (OOK), and receives and demodulates the signal from the DC power bus through the same capacitive coupling. The circuit acts as serial modem for the physical power line communication. The circuit and technique can be made of commercially available components or included in an application specific integrated circuit (ASIC) design, which allows for the circuit to be included in current designs with additional circuitry or embedded into new designs. This device and technique moves computational, sensing, and actuation abilities closer to the source, and allows for the networking of multiple similar nodes to each other and to a central processor. This technique also allows for reconfigurable systems by adding or removing nodes at any time. It can do so using nothing more than the in situ power wiring of the system.

  20. Small circuits for cryptography.

    SciTech Connect

    Torgerson, Mark Dolan; Draelos, Timothy John; Schroeppel, Richard Crabtree; Miller, Russell D.; Anderson, William Erik

    2005-10-01

    This report examines a number of hardware circuit design issues associated with implementing certain functions in FPGA and ASIC technologies. Here we show circuit designs for AES and SHA-1 that have an extremely small hardware footprint, yet show reasonably good performance characteristics as compared to the state of the art designs found in the literature. Our AES performance numbers are fueled by an optimized composite field S-box design for the Stratix chipset. Our SHA-1 designs use register packing and feedback functionalities of the Stratix LE, which reduce the logic element usage by as much as 72% as compared to other SHA-1 designs.

  1. Development of low-noise high-speed analog ASIC for X-ray CCD cameras and wide-band X-ray imaging sensors

    NASA Astrophysics Data System (ADS)

    Nakajima, Hiroshi; Hirose, Shin-nosuke; Imatani, Ritsuko; Nagino, Ryo; Anabuki, Naohisa; Hayashida, Kiyoshi; Tsunemi, Hiroshi; Doty, John P.; Ikeda, Hirokazu; Kitamura, Hisashi; Uchihori, Yukio

    2016-09-01

    We report on the development and performance evaluation of the mixed-signal Application Specific Integrated Circuit (ASIC) developed for the signal processing of onboard X-ray CCD cameras and various types of X-ray imaging sensors in astrophysics. The quick and low-noise readout is essential for the pile-up free imaging spectroscopy with a future X-ray telescope. Our goal is the readout noise of 5e- r . m . s . at the pixel rate of 1 Mpix/s that is about 10 times faster than those of the currently working detectors. We successfully developed a low-noise ASIC as the front-end electronics of the Soft X-ray Imager onboard Hitomi that was launched on February 17, 2016. However, it has two analog-to-digital converters per chain due to the limited processing speed and hence we need to correct the difference of gain to obtain the X-ray spectra. Furthermore, its input equivalent noise performance is not satisfactory (> 100 μV) at the pixel rate higher than 500 kpix/s. Then we upgrade the design of the ASIC with the fourth-order ΔΣ modulators to enhance its inherent noise-shaping performance. Its performance is measured using pseudo CCD signals with variable processing speed. Although its input equivalent noise is comparable with the conventional one, the integrated non-linearity (0.1%) improves to about the half of that of the conventional one. The radiation tolerance is also measured with regard to the total ionizing dose effect and the single event latch-up using protons and Xenon, respectively. The former experiment shows that all of the performances does not change after imposing the dose corresponding to 590 years in a low earth orbit. We also put the upper limit on the frequency of the latch-up to be once per 48 years.

  2. CLARO-CMOS, a very low power ASIC for fast photon counting with pixellated photodetectors

    NASA Astrophysics Data System (ADS)

    Carniti, P.; De Matteis, M.; Giachero, A.; Gotti, C.; Maino, M.; Pessina, G.

    2012-11-01

    The CLARO-CMOS is an application specific integrated circuit (ASIC) designed for fast photon counting with pixellated photodetectors such as multi-anode photomultiplier tubes (Ma-PMT), micro-channel plates (MCP), and silicon photomultipliers (SiPM). The first prototype has four channels, each with a charge sensitive amplifier with settable gain and a discriminator with settable threshold, providing fast hit information for each channel independently. The design was realized in a long-established, stable and inexpensive 0.35 μm CMOS technology, and provides outstanding performance in terms of speed and power dissipation. The prototype consumes less than 1 mW per channel at low rate, and less than 2 mW at an event rate of 10 MHz per channel. The recovery time after each pulse is less than 25 ns for input signals within a factor of 10 above threshold. Input referred RMS noise is about 7.7 ke- (1.2 fC) with an input capacitance of 3.3 pF. With this value of input capacitance a timing resolution down to 10 ps RMS was measured for pulser signals of a few million electrons, corresponding to the single photon response for these detectors.

  3. The digital ASIC for the digital front end electronics of the SPI astrophysics gamma-ray experiment

    SciTech Connect

    Lafond, E.; Mur, M.; Schanne, S.

    1998-08-01

    The SPI spectrometer is one of the gamma-ray astronomy instruments that will be installed on the ESA INTEGRAL satellite, intended to be launched in 2001 by the European Space Agency. The Digital Front-End Electronics sub-system (DFEE) is in charge of the real time data processing of the various measurements produced by the Germanium (Ge) detectors and the Bismuth Germanate (BGO) anti-coincidence shield. The central processing unit of the DFEE is implemented in a digital ASIC circuit, which provides the real time association of the various time signals, acquires the associated energy measurements, and classifies the various types of physics events. The paper gives the system constraints of the DFEE, the architecture of the ASIC circuit, the technology requirements, and the strategy for test and integration. Emphasis is given to the high level language development and simulation, the automatic circuit synthesis approach, and the performance estimation.

  4. Monolithic Microwave Integrated Circuit (MMIC) technology for space communications applications

    NASA Technical Reports Server (NTRS)

    Connolly, Denis J.; Bhasin, Kul B.; Romanofsky, Robert R.

    1987-01-01

    Future communications satellites are likely to use gallium arsenide (GaAs) monolithic microwave integrated-circuit (MMIC) technology in most, if not all, communications payload subsystems. Multiple-scanning-beam antenna systems are expected to use GaAs MMICs to increase functional capability, to reduce volume, weight, and cost, and to greatly improve system reliability. RF and IF matrix switch technology based on GaAs MMICs is also being developed for these reasons. MMIC technology, including gigabit-rate GaAs digital integrated circuits, offers substantial advantages in power consumption and weight over silicon technologies for high-throughput, on-board baseband processor systems. For the more distant future pseudomorphic indium gallium arsenide (InGaAs) and other advanced III-V materials offer the possibility of MMIC subsystems well up into the millimeter wavelength region. All of these technology elements are in NASA's MMIC program. Their status is reviewed.

  5. Monolithic Microwave Integrated Circuit (MMIC) technology for space communications applications

    NASA Technical Reports Server (NTRS)

    Connolly, Denis J.; Bhasin, Kul B.; Romanofsky, Robert R.

    1987-01-01

    Future communications satellites are likely to use gallium arsenide (GaAs) monolithic microwave integrated-circuit (MMIC) technology in most, if not all, communications payload subsystems. Multiple-scanning-beam antenna systems are expected to use GaAs MMIC's to increase functional capability, to reduce volume, weight, and cost, and to greatly improve system reliability. RF and IF matrix switch technology based on GaAs MMIC's is also being developed for these reasons. MMIC technology, including gigabit-rate GaAs digital integrated circuits, offers substantial advantages in power consumption and weight over silicon technologies for high-throughput, on-board baseband processor systems. For the more distant future pseudomorphic indium gallium arsenide (InGaAs) and other advanced III-V materials offer the possibility of MMIC subsystems well up into the millimeter wavelength region. All of these technology elements are in NASA's MMIC program. Their status is reviewed.

  6. Packaging printed circuit boards: A production application of interactive graphics

    NASA Technical Reports Server (NTRS)

    Perrill, W. A.

    1975-01-01

    The structure and use of an Interactive Graphics Packaging Program (IGPP), conceived to apply computer graphics to the design of packaging electronic circuits onto printed circuit boards (PCB), were described. The intent was to combine the data storage and manipulative power of the computer with the imaginative, intuitive power of a human designer. The hardware includes a CDC 6400 computer and two CDC 777 terminals with CRT screens, light pens, and keyboards. The program is written in FORTRAN 4 extended with the exception of a few functions coded in COMPASS (assembly language). The IGPP performs four major functions for the designer: (1) data input and display, (2) component placement (automatic or manual), (3) conductor path routing (automatic or manual), and (4) data output. The most complex PCB packaged to date measured 16.5 cm by 19 cm and contained 380 components, two layers of ground planes and four layers of conductors mixed with ground planes.

  7. Electrical Devices and Circuits for Low Temperature Space Applications

    NASA Technical Reports Server (NTRS)

    Patterson, R. L.; Hammond, A.; Dickman, J. E.; Gerber, S.; Overton, E.; Elbuluk, M.

    2003-01-01

    The environmental temperature in many NASA missions, such as deep space probes and outer planetary exploration, is significantly below the range for which conventional commercial-off-the-shelf electronics is designed. Presently, spacecraft operating in the cold environment of such deep space missions carry a large number of radioisotope or other heating units in order to maintain the surrounding temperature of the on-board electronics at approximately 20 C. Electronic devices and circuits capable of operation at cryogenic temperatures will not only tolerate the harsh environment of deep space but also will reduce system size and weight by eliminating or reducing the heating units and their associate structures; thereby reducing system development cost as well as launch costs. In addition, power electronic circuits designed for operation at low temperatures are expected to result in more efficient systems than those at room temperature. This improvement results from better behavior in the electrical and thermal properties of some semiconductor and dielectric materials at low temperatures. An on-going research and development program on low temperature electronics at the NASA Glenn Research Center focuses on the development of efficient electrical systems and circuits capable of surviving and exploiting the advantages of low temperature environments. An overview of the program will be presented in this paper. A description of the low temperature test facilities along with selected data obtained from in-house component testing will also be discussed. On-going research activities that are being performed in collaboration with various organizations will also be presented.

  8. Design and application of cotranscriptional non-enzymatic RNA circuits and signal transducers

    PubMed Central

    Bhadra, Sanchita; Ellington, Andrew D.

    2014-01-01

    Nucleic acid circuits are finding increasing real-life applications in diagnostics and synthetic biology. Although DNA has been the main operator in most nucleic acid circuits, transcriptionally produced RNA circuits could provide powerful alternatives for reagent production and their use in cells. Towards these goals, we have implemented a particular nucleic acid circuit, catalytic hairpin assembly, using RNA for both information storage and processing. Our results demonstrated that the design principles developed for DNA circuits could be readily translated to engineering RNA circuits that operated with similar kinetics and sensitivities of detection. Not only could purified RNA hairpins perform amplification reactions but RNA hairpins transcribed in vitro also mediated amplification, even without purification. Moreover, we could read the results of the non-enzymatic amplification reactions using a fluorescent RNA aptamer ‘Spinach’ that was engineered to undergo sequence-specific conformational changes. These advances were applied to the end-point and real-time detection of the isothermal strand displacement amplification reaction that produces single-stranded DNAs as part of its amplification cycle. We were also able to readily engineer gate structures with RNA similar to those that have previously formed the basis of DNA circuit computations. Taken together, these results validate an entirely new chemistry for the implementation of nucleic acid circuits. PMID:24493736

  9. Preliminary validation results of an ASIC for the readout and control of near-infrared large array detectors

    NASA Astrophysics Data System (ADS)

    Pâhlsson, Philip; Meier, Dirk; Otnes Berge, Hans Kristian; Øya, Petter; Steenari, David; Olsen, Alf; Hasanbegovic, Amir; Altan, Mehmet A.; Najafiuchevler, Bahram; Talebi, Jahanzad; Azman, Suleyman; Gheorghe, Codin; Ackermann, Jörg; Mæhlum, Gunnar

    2015-06-01

    In this paper we present initial test results of the Near Infrared Readout and Controller ASIC (NIRCA), designed for large area image sensors under contract from the European Space Agency (ESA) and the Norwegian Space Center. The ASIC is designed to read out image sensors based on mercury cadmium telluride (HgCdTe, or MCT) operating down to 77 K. IDEAS has developed, designed and initiated testing of NIRCA with promising results, showing complete functionality of all ASIC sub-components. The ASIC generates programmable digital signals to clock out the contents of an image array and to amplify, digitize and transfer the resulting pixel charge. The digital signals can be programmed into the ASIC during run-time and allows for windowing and custom readout schemes. The clocked out voltages are amplified by programmable gain amplifiers and digitized by 12-bit, 3-Msps successive approximation register (SAR) analogue-to-digital converters (ADC). Digitized data is encoded using 8-bit to 10-bit encoding and transferred over LVDS to the readout system. The ASIC will give European researchers access to high spectral sensitivity, very low noise and radiation hardened readout electronics for astronomy and Earth observation missions operating at 77 K and room temperature. The versatility of the chip makes the architecture a possible candidate for other research areas, or defense or industrial applications that require analog and digital acquisition, voltage regulation, and digital signal generation.

  10. Custom IC/Embedded IP design for histogram in video processing application

    NASA Astrophysics Data System (ADS)

    Pandey, Manoj; Chaturvedi, Richa; Rai, S. K.

    2016-03-01

    Histogram is an integral part of video processing applications. Either of the design methods ASIC or Embedded, histogram computation is an important functional block. This paper proposes the custom Integrated Circuit (IC) as an ASIC and an embedded IP to compute the colored histogram function. Histogram computation has two features: color and spatial. Color feature has been calculated using find_bin and spatial feature is calculated using kernel function. The design is verified using NCSIM Cadence tool, while it is synthesized using RTL compiler. Finally, the embedded IP has interfaced with Kernel based mean shift algorithm in tracking a moving object and implemented on Xilinx Spartan 6 LX150T FPGA.

  11. High temperature superconducting thin film microwave circuits: Fabrication, characterization, and applications

    NASA Technical Reports Server (NTRS)

    Bhasin, K. B.; Warner, J. D.; Romanofsky, R. R.; Heinen, V. O.; Chorey, C. M.

    1990-01-01

    Epitaxial YBa2Cu3O7 films were grown on several microwave substrates. Surface resistance and penetration depth measurements were performed to determine the quality of these films. Here the properties of these films on key microwave substrates are described. The fabrication and characterization of a microwave ring resonator circuit to determine transmission line losses are presented. Lower losses than those observed in gold resonator circuits were observed at temperatures lower than critical transition temperature. Based on these results, potential applications of microwave superconducting circuits such as filters, resonators, oscillators, phase shifters, and antenna elements in space communication systems are identified.

  12. The development of an uncommitted integrated circuit for combined digital and analogue applications

    NASA Astrophysics Data System (ADS)

    Kemp, A. J.

    1982-06-01

    An uncommmited integrated circuit is a standardized integrated circuit needing only a fraction of the normal processing steps to program it for a required application. The result is a reduction in the time, money and knowledge required to develop an integrated circuit. The development and industrialization of an uncommitted circuit for combined digital and analog applications are described. Integrated Injection Logic (I2L) is used to realize digital functions, and standard analog techniques, based on a bipolar process, are used to realize analog functions. A novel architecture, as well as the use of three masks to realize a required interconnection pattern, results in a very high efficiency in terms of the number of components that was used.

  13. Mixed application MMIC technologies - Progress in combining RF, digital and photonic circuits

    NASA Technical Reports Server (NTRS)

    Swirhun, S.; Bendett, M.; Sokolov, V.; Bauhahn, P.; Sullivan, C.; Mactaggart, R.; Mukherjee, S.; Hibbs-Brenner, M.; Mondal, J.

    1991-01-01

    Approaches for future 'mixed application' monolithic integrated circuits (ICs) employing optical receive/transmit, RF amplification and modulation and digital control functions are discussed. We focus on compatibility of the photonic component fabrication with conventional RF and digital IC technologies. Recent progress at Honeywell in integrating several parts of the desired RF/digital/photonic circuit integration suite required for construction of a future millimeter-wave optically-controlled phased-array element are illustrated.

  14. Basic structures of integrated photonic circuits for smart biosensor applications

    NASA Astrophysics Data System (ADS)

    Germer, S.; Cherkouk, C.; Rebohle, L.; Helm, M.; Skorupa, W.

    2013-05-01

    The breadth of opportunities for applied technologies for optical sensors ranges from environmental and biochemical control, medical diagnostics to process regulation. Thus the specified usage of the optical sensor system requires a particular design and functionalization. Especially biochemical sensors incorporate electronic and photonic devices for the detection of harmful substances e.g. in drinking water. Here we present recent developments in the integration of a Si-based light emitting device (LED) [1-3, 8] into a photonic circuit for an optical waveguide-based biodetection system. This concept includes the design, fabrication and characterization of the dielectric high contrast waveguide as an important component, beside the LED, in the photonic system circuit. First approaches involve simulations of Si3N4/SiO2-waveguides with the finite element method (FEM) and their fabrication by plasma enhanced chemical vapour deposition (PECVD), optical lithography and reactive ion etching (RIE). In addition, we characterized the deposited layers via ellipsometry and the etched structures by scanning electron microscopy (SEM). The obtained results establish a basis for optimized Si-based LED waveguide butt-coupling with adequate coupling efficiency, low attenuation loss and a high optical power throughput.

  15. Characterization results of the JUNGFRAU full scale readout ASIC

    NASA Astrophysics Data System (ADS)

    Mozzanica, A.; Bergamaschi, A.; Brueckner, M.; Cartier, S.; Dinapoli, R.; Greiffenberg, D.; Jungmann-Smith, J.; Maliakal, D.; Mezza, D.; Ramilli, M.; Ruder, C.; Schaedler, L.; Schmitt, B.; Shi, X.; Tinti, G.

    2016-02-01

    The two-dimensional pixel detector JUNGFRAU is designed for high performance photon science applications at free electron lasers and synchrotron light sources. It is developed for the SwissFEL currently under construction at the Paul Scherrer Institut, Switzerland. The detector is a hybrid pixel detector with a charge integration readout ASIC characterized by single photon sensitivity and a low noise performance over a dynamic range of 104 12 keV photons. Geometrically, a JUNGFRAU readout chip consists of 256×256 pixels of 75×75 μm2. The chips are bump bonded to 320 μm thick silicon sensors. Arrays of 2×4 chips are tiled to form modules of 4×8 cm2 area. Several multi-module systems with up to 16 Mpixels per system will be delivered to the two end stations at SwissFEL. The JUNGFRAU full scale readout ASIC and module design are presented along with characterization results of the first systems. Experiments from fluorescence X-ray, visible light illumination, and synchrotron irradiation are shown. The results include an electronic noise of ~50 electrons r.m.s., which enables single photon detection energies below 2 keV and a noise well below the Poisson statistical limit over the entire dynamic range. First imaging experiments are also shown.

  16. Practical applications of digital integrated circuits. Part 2: Minimization techniques, code conversion, flip-flops, and asynchronous circuits

    NASA Technical Reports Server (NTRS)

    1972-01-01

    Here, the 7400 line of transistor to transistor logic (TTL) devices is emphasized almost exclusively where hardware is concerned. However, it should be pointed out that the logic theory contained herein applies to all hardware. Binary numbers, simplification of logic circuits, code conversion circuits, basic flip-flop theory, details about series 54/7400, and asynchronous circuits are discussed.

  17. Microstrip circuit applications of high-Q open microwave resonators

    NASA Astrophysics Data System (ADS)

    Stephan, Karl D.; Young, Song-Lin; Wong, Sai-Chu

    1988-09-01

    An open microwave resonator can be formed above a planar microstrip substrate by suspending a spherical reflector above it. A theory is developed to account for the coupling between such an open resonator mode and a microstrip line. The open resonator is shown to have useful circuit properties similar to a dielectric resonator, but with the potential of efficient operation well into the millimeter-wave range. Experimental confirmation of the theory is demonstrated by a scale model of a microstrip-based single-pole bandpass filter, which shows a loaded Q of 860 and a minimum loss of 0.8 dB +/- 0.4 dB at 10 GHz.

  18. Plasmonic nanopatch array for optical integrated circuit applications

    PubMed Central

    Qu, Shi-Wei; Nie, Zai-Ping

    2013-01-01

    Future plasmonic integrated circuits with the capability of extremely high-speed data processing at optical frequencies will be dominated by the efficient optical emission (excitation) from (of) plasmonic waveguides. Towards this goal, plasmonic nanoantennas, currently a hot topic in the field of plasmonics, have potential to bridge the mismatch between the wave vector of free-space photonics and that of the guided plasmonics. To manipulate light at will, plasmonic nanoantenna arrays will definitely be more efficient than isolated nanoantennas. In this article, the concepts of microwave antenna arrays are applied to efficiently convert plasmonic waves in the plasmonic waveguides into free-space optical waves or vice versa. The proposed plasmonic nanoantenna array, with nanopatch antennas and a coupled wedge plasmon waveguide, can also act as an efficient spectrometer to project different wavelengths into different directions, or as a spatial filter to absorb a specific wavelength at a specified incident angle. PMID:24201454

  19. Plasmonic nanopatch array for optical integrated circuit applications.

    PubMed

    Qu, Shi-Wei; Nie, Zai-Ping

    2013-11-08

    Future plasmonic integrated circuits with the capability of extremely high-speed data processing at optical frequencies will be dominated by the efficient optical emission (excitation) from (of) plasmonic waveguides. Towards this goal, plasmonic nanoantennas, currently a hot topic in the field of plasmonics, have potential to bridge the mismatch between the wave vector of free-space photonics and that of the guided plasmonics. To manipulate light at will, plasmonic nanoantenna arrays will definitely be more efficient than isolated nanoantennas. In this article, the concepts of microwave antenna arrays are applied to efficiently convert plasmonic waves in the plasmonic waveguides into free-space optical waves or vice versa. The proposed plasmonic nanoantenna array, with nanopatch antennas and a coupled wedge plasmon waveguide, can also act as an efficient spectrometer to project different wavelengths into different directions, or as a spatial filter to absorb a specific wavelength at a specified incident angle.

  20. An application of carbon nanotubes for integrated circuit interconnects

    NASA Astrophysics Data System (ADS)

    Coiffic, J. C.; Foa Torres, L. E.; Le Poche, H.; Fayolle, M.; Roche, S.; Maitrejean, S.; Roualdes, S.; Ayral, A.

    2008-08-01

    Integrated circuits fabrication is soon reaching strong limitations. Help could come from using carbon nanotubes as conducting wires for interconnects. Although this solution was proposed six years ago, researchers still come up with many obstacles such as localization, low temperature growth on copper, contacting and reproducibility. The integration processes exposed here intend to meet the industrial requirements. Two approaches are then possibly followed. Either using densely packed single wall (SWCNT) (or very tiny multiwall) nanotubes, or filling up the whole interconnect diameter with a single large multiwall (MWCNT) nanotube. In this work, we focus on the integration of multiwall vertical interconnects. Densely packed MWCNTs are grown in via holes by CVD. Alternatively, we have developed a method to obtain a single large nanofibre grown by PECVD (MWCNF) in each via hole. Electrical measurements are performed on CVD and PECVD grown carbon nanotubes. The role of electron-phonon interaction in these devices is also briefly discussed.

  1. Modeling and simulation of carbon nanotube field effect transistor and its circuit application

    NASA Astrophysics Data System (ADS)

    Singh, Amandeep; Saini, Dinesh Kumar; Agarwal, Dinesh; Aggarwal, Sajal; Khosla, Mamta; Raj, Balwinder

    2016-07-01

    The carbon nanotube field effect transistor (CNTFET) is modelled for circuit application. The model is based on the transport mechanism and it directly relates the transport mechanism with the chirality. Also, it does not consider self consistent equations and thus is used to develop the HSPICE compatible circuit model. For validation of the model, it is applied to the top gate CNTFET structure and the MATLAB simulation results are compared with the simulations of a similar structure created in NanoTCAD ViDES. For demonstrating the circuit compatibility of the model, two circuits viz. inverter and SRAM are designed and simulated in HSPICE. Finally, SRAM performance metrics are compared with those of device simulations from Nano TCAD ViDES.

  2. Low noise preamplifier ASIC for the PANDA experiment

    NASA Astrophysics Data System (ADS)

    Flemming, H.; Wieczorek, P.

    2011-12-01

    For the electromagnetic calorimeter of the PANDA detector a preamplifier ASIC named APFEL (ASIC for Panda Front-end ELectronics) has been developed at GSI. It is optimized for the readout of large area avalanche photodiodes (LAAPDs) with a capacitance of 300 pF and an event rate of 350 kHz. The ASIC has two equivalent analog channels each consisting of a charge sensitive amplifier, a shaper stage and differential output drivers. For operating the ASIC in a wide temperature range programmable voltage references are implemented on chip.

  3. Lignan from Thyme Possesses Inhibitory Effect on ASIC3 Channel Current*

    PubMed Central

    Dubinnyi, Maxim A.; Osmakov, Dmitry I.; Koshelev, Sergey G.; Kozlov, Sergey A.; Andreev, Yaroslav A.; Zakaryan, Naira A.; Dyachenko, Igor A.; Bondarenko, Dmitry A.; Arseniev, Alexander S.; Grishin, Eugene V.

    2012-01-01

    A novel compound was identified in the acidic extract of Thymus armeniacus collected in the Lake Sevan region of Armenia. This compound, named “sevanol,” to our knowledge is the first low molecular weight natural molecule that has a reversible inhibition effect on both the transient and the sustained current of human ASIC3 channels expressed in Xenopus laevis oocytes. Sevanol completely blocked the transient component (IC50 353 ± 23 μm) and partially (∼45%) inhibited the amplitude of the sustained component (IC50 of 234 ± 53 μm). Other types of acid-sensing ion channel (ASIC) channels were intact to sevanol application, except ASIC1a, which showed more than six times less affinity to it as compared with the inhibitory action on the ASIC3 channel. To elucidate the structure of sevanol, the set of NMR spectra in two solvents (d6-DMSO and D2O) was collected, and the complete chemical structure was confirmed by liquid chromatography-mass spectrometry with electrospray ionization (LC-ESI+-MS) fragmentation. This compound is a new lignan built up of epiphyllic acid and two isocitryl esters in positions 9 and 10. In vivo administration of sevanol (1–10 mg/kg) significantly reversed thermal hyperalgesia induced by complete Freund's adjuvant injection and reduced response to acid in a writhing test. Thus, we assume the probable considerable role of sevanol in known analgesic and anti-inflammatory properties of thyme. PMID:22854960

  4. Reconfigurable 2D cMUT-ASIC arrays for 3D ultrasound image

    NASA Astrophysics Data System (ADS)

    Song, Jongkeun; Jung, Sungjin; Kim, Youngil; Cho, Kyungil; Kim, Baehyung; Lee, Seunghun; Na, Junseok; Yang, Ikseok; Kwon, Oh-kyong; Kim, Dongwook

    2012-03-01

    This paper describes the design and implementations of the complete 2D capacitive micromachined ultrasound transducer electronics and its analog front-end module for transmitting high voltage ultrasound pulses and receiving its echo signals to realize 3D ultrasound image. In order to minimize parasitic capacitances and ultimately improve signal-to- noise ratio (SNR), cMUT has to be integrate with Tx/Rx electronics. Additionally, in order to integrate 2D cMUT array module, significant optimized high voltage pulser circuitry, low voltage analog/digital circuit design and packaging challenges are required due to high density of elements and small pitch of each element. We designed 256(16x16)- element cMUT and reconfigurable driving ASIC composed of 120V high voltage pulser, T/R switch, low noise preamplifier and digital control block to set Tx frequency of ultrasound and pulse train in each element. Designed high voltage analog ASIC was successfully bonded with 2D cMUT array by flip-chip bonding process and it connected with analog front-end board to transmit pulse-echo signals. This implementation of reconfigurable cMUT-ASIC-AFE board enables us to produce large aperture 2D transducer array and acquire high quality of 3D ultrasound image.

  5. Application of the DRS4 chip for GHz waveform digitizing circuits

    NASA Astrophysics Data System (ADS)

    Yang, Hai-Bo; Su, Hong; Kong, Jie; Cheng, Ke; Chen, Jin-Da; Du, Cheng-Ming; Zhang, Jing-Zhe

    2015-05-01

    A new fast waveform sampling digitizing circuit based on the domino ring sampler (DRS), a switched capacitor array (SCA) chip, is presented in this paper, which is different from the traditional waveform digitizing circuit constructed with an analog to digital converter (ADC) or time to digital converter. A DRS4 chip is used as a core device in our circuit, which has a fast sampling rate up to five gigabit samples per second (GSPS). Quite satisfactory results are acquired by the preliminary performance test for this circuit board. Eight channels can be provided by one board, which has a 1 V input dynamic range for each channel. The circuit linearity is better than 0.1%, the noise is less than 0.5 mV (root mean square, RMS), and its time resolution is about 50 ps. Several boards can be cascaded to construct a multi-board system. The advantages of high resolution, low cost, low power dissipation, high channel density and small size make the circuit board useful not only for physics experiments, but also for other applications. Supported by National Natural Science Foundation of China (11305233), Specific Fund Research Based on Large-scale Science Instrument Facilities of China (2011YQ12009604)

  6. Development of a dedicated readout ASIC for TPC based X-ray polarimeter

    NASA Astrophysics Data System (ADS)

    Zhang, Hongyan; Deng, Zhi; Li, Hong; Liu, Yinong; Feng, Hua

    2016-07-01

    X-ray polarimetry with time projection chambers was firstly proposed by JK Black in 2007 and has been greatly developed since then. It measured two dimensional photoelectron tracks with one dimensional strip and the other dimension was estimated by the drift time from the signal waveforms. A readout ASIC, APV25, originally developed for CMS silicon trackers was used and has shown some limitations such as waveform sampling depth. A dedicated ASIC was developed for TPC based X-ray polarimeters in this paper. It integrated 32 channel circuits and each channel consisted of an analog front-end and a waveform sampler based on switched capacitor array. The analog front-end has a charge sensitive preamplifier with a gain of 25 mV/fC, a CR-RC shaper with a peaking time of 25 ns, a baseline holder and a discriminator for self-triggering. The SCA has a buffer latency of 3.2 μs with 64 cells operating at 20 MSPS. The ASIC was fabricated in a 0.18 μm CMOS process. The equivalent noise charge (ENC) of the analog front-end was measured to be 274.8 e+34.6 e/pF. The effective resolution of the SCA was 8.8 bits at sampling rate up to 50 MSPS. The total power consumption was 2.8 mW per channel. The ASIC was also tested with real TPC detectors and two dimensional photoelectron tracks have been successfully acquired. More tests and analysis on the sensitivity to the polarimetry are undergoing and will be presented in this paper.

  7. 40 CFR 413.80 - Applicability: Description of the printed circuit board subcategory.

    Code of Federal Regulations, 2010 CFR

    2010-07-01

    ... 40 Protection of Environment 28 2010-07-01 2010-07-01 true Applicability: Description of the printed circuit board subcategory. 413.80 Section 413.80 Protection of Environment ENVIRONMENTAL PROTECTION AGENCY (CONTINUED) EFFLUENT GUIDELINES AND STANDARDS ELECTROPLATING POINT SOURCE CATEGORY...

  8. 40 CFR 413.80 - Applicability: Description of the printed circuit board subcategory.

    Code of Federal Regulations, 2011 CFR

    2011-07-01

    ... 40 Protection of Environment 29 2011-07-01 2009-07-01 true Applicability: Description of the printed circuit board subcategory. 413.80 Section 413.80 Protection of Environment ENVIRONMENTAL PROTECTION AGENCY (CONTINUED) EFFLUENT GUIDELINES AND STANDARDS ELECTROPLATING POINT SOURCE CATEGORY...

  9. 20 CFR 416.1485 - Application of circuit court law.

    Code of Federal Regulations, 2013 CFR

    2013-04-01

    ... Justice, concurs that relitigation of an issue and application of our interpretation of the Social... Section 416.1485 Employees' Benefits SOCIAL SECURITY ADMINISTRATION SUPPLEMENTAL SECURITY INCOME FOR THE... determine conflicts with our interpretation of a provision of the Social Security Act or regulations...

  10. 20 CFR 404.985 - Application of circuit court law.

    Code of Federal Regulations, 2013 CFR

    2013-04-01

    ... Justice, concurs that relitigation of an issue and application of our interpretation of the Social... Section 404.985 Employees' Benefits SOCIAL SECURITY ADMINISTRATION FEDERAL OLD-AGE, SURVIVORS AND... determine conflicts with our interpretation of a provision of the Social Security Act or regulations...

  11. The STAR cluster-finder ASIC

    SciTech Connect

    Botlo, M.; LeVine, M.J.; Scheetz, R.A.; Schulz, M.W.; Short, P.; Woods, J.; Crosetto, D.

    1997-12-01

    STAR is a large TPC-based experiment at RHIC, the relativistic heavy ion collider at Brookhaven National Laboratory. The STAR experiment reads out a TPC and an SVT (silicon vertex tracker), both of which require in-line pedestal subtraction, compression of ADC values from 10-bit to 8-bit, and location of time sequences representing responses to charged-particle tracks. The STAR cluster finder ASIC responds to all of these needs. Pedestal subtraction and compression are performed using lookup tables in attached RAM. The authors describe its design and implementation, as well as testing methodology and results of tests performed on foundry prototypes.

  12. System-level integrated circuit (SLIC) development for phased array antenna applications

    NASA Technical Reports Server (NTRS)

    Shalkhauser, K. A.; Raquet, C. A.

    1991-01-01

    A microwave/millimeter wave system-level integrated circuit (SLIC) being developed for use in phased array antenna applications is described. The program goal is to design, fabricate, test, and deliver an advanced integrated circuit that merges radio frequency (RF) monolithic microwave integrated circuit (MMIC) technologies with digital, photonic, and analog circuitry that provide control, support, and interface functions. As a whole, the SLIC will offer improvements in RF device performance, uniformity, and stability while enabling accurate, rapid, repeatable control of the RF signal. Furthermore, the SLIC program addresses issues relating to insertion of solid state devices into antenna systems, such as the reduction in number of bias, control, and signal lines. Program goals, approach, and status are discussed.

  13. System-Level Integrated Circuit (SLIC) development for phased array antenna applications

    NASA Technical Reports Server (NTRS)

    Shalkhauser, K. A.; Raquet, C. A.

    1991-01-01

    A microwave/millimeter wave system-level integrated circuit (SLIC) being developed for use in phased array antenna applications is described. The program goal is to design, fabricate, test, and deliver an advanced integrated circuit that merges radio frequency (RF) monolithic microwave integrated circuit (MMIC) technologies with digital, photonic, and analog circuitry that provide control, support, and interface functions. As a whole, the SLIC will offer improvements in RF device performance, uniformity, and stability while enabling accurate, rapid, repeatable control of the RF signal. Furthermore, the SLIC program addresses issues relating to insertion of solid state devices into antenna systems, such as the reduction in number of bias, control, and signal lines. Program goals, approach, and status are discussed.

  14. A simple tachometer circuit

    NASA Technical Reports Server (NTRS)

    Dimeff, J.

    1972-01-01

    Electric circuit to measure frequency of repetitive sinusoidal or rectangular wave is presented. Components of electric circuit and method of operation are explained. Application of circuit as tachometer for automobile is discussed.

  15. Development of an ASIC for Si/CdTe detectors in a radioactive substance visualizing system

    NASA Astrophysics Data System (ADS)

    Harayama, Atsushi; Takeda, Shin`ichiro; Sato, Goro; Ikeda, Hirokazu; Watanabe, Shin; Takahashi, Tadayuki

    2014-11-01

    We report on the recent development of a 64-channel analog front-end ASIC for a new gamma-ray imaging system designed to visualize radioactive substances. The imaging system employs a novel Compton camera which consists of silicon (Si) and cadmium telluride (CdTe) detectors. The ASIC is intended for the readout of pixel/pad detectors utilizing Si/CdTe as detector materials, and covers a dynamic range up to 1.4 MeV. The readout chip consists of 64 identical signal channels and was implemented with X-FAB 0.35 μm CMOS technology. Each channel contains a charge-sensitive amplifier, a pole-zero cancellation circuit, a low-pass filter, a comparator, and a sample-hold circuit, along with a Wilkinson-type A-to-D converter. We observed an equivalent noise charge of ~500 e- and a noise slope of ~5 e-/pF (r.m.s.) with a power consumption of 2.1 mW per channel. The chip works well when connected to Schottky CdTe diodes, and delivers spectra with good energy resolution, such as ~12 keV (FWHM) at 662 keV and ~24 keV (FWHM) at 1.33 MeV.

  16. A 2013 Survey on Pressure Monitoring in Adult Cardiopulmonary Bypass Circuits: Modes and Applications

    PubMed Central

    Rigg, Laura; Searles, Bruce; Darling, Edward Morse

    2014-01-01

    Abstract: Pressure data acquired from multiple sites of extracorporeal circuits can be an important parameter to monitor for the safe conduct of cardiopulmonary bypass (CPB). Although previous surveys demonstrate that CPB circuit pressure monitoring is widely used, there are very little data cataloging specific applications of this practice. Therefore, the purpose of this study is to survey the perfusion community to catalog 1) primary CPB circuit site pressure monitoring locations; 2) type of manometers used; 3) pressure monitoring interface and servoregulation with pump console; and 4) the rationale and documentation associated with pressure monitoring during CPB. In June 2013, a validated 27-question online survey was sent directly through an e-mail link to the chief perfusionists in the northeast United States. Completed surveys were received from 75 of 117 surveys deployed yielding a 64% response rate. Arterial line pressure monitoring during CPB is reported by 99% with six distinct circuit site locations identified. Cardioplegia system pressure was monitored by 95% of the centers. For vacuum-assisted venous drainage (VAVD) users, the venous pressure was measured by 72% of the responding centers. Arterial line pressure servoregulation of the arterial pump was indicated by 61% of respondents and 75% of centers record arterial line pressure in their perfusion record. Most centers (77%) report the use of a transducer that is integrated into the pump console providing a digital pressure display, whereas 20% combine an aneroid gauge manometer with the integrated digital transducer. This study demonstrates that the practice of arterial line pressure monitoring during CPB is nearly universal. However, the selection of the pressure monitoring site on the circuit, modes of monitoring pressure, and their applications are highly variable across the perfusion community. PMID:26357797

  17. Hsc70 regulates cell surface ASIC2 expression and vascular smooth muscle cell migration.

    PubMed

    Grifoni, Samira C; McKey, Susan E; Drummond, Heather A

    2008-05-01

    Recent studies suggest members of the degenerin (DEG)/epithelial Na(+) channel (ENaC)/acid-sensing ion channel (ASIC) protein family play an important role in vascular smooth muscle cell (VSMC) migration. In a previous investigation, we found suppression of a certain DEG/ENaC/ASIC member, ASIC2, increased VSMC chemotactic migration, raising the possibility that ASIC2 may play an inhibitory role. Because ASIC2 protein was retained in the cytoplasm, we reasoned increasing surface expression of ASIC2 might unmask the inhibitory role of ASIC2 in VSMC migration so we could test the hypothesis that ASIC2 inhibits VSMC migration. Therefore, we used the chemical chaperone glycerol to enhance ASIC2 expression. Glycerol 1) increased cytoplasm ASIC2 expression, 2) permitted detection of ASIC2 at the cell surface, and 3) inhibited platelet-derived growth factor (PDGF)-bb mediated VSMC migration. Furthermore, ASIC2 silencing completely abolished the inhibitory effect of glycerol on migration, suggesting upregulation of ASIC2 is responsible for glycerol-induced inhibition of VSMC migration. Because other investigators have shown that glycerol regulates ENaC/ASIC via interactions with a certain heat shock protein, heat shock protein 70 (Hsc70), we wanted to determine the importance of Hsc70 on ASIC2 expression in VSMCs. We found that Hsc70 silencing increases ASIC2 cell surface expression and inhibits VSMC migration, which is abolished by cosilencing ASIC2. These data demonstrate that Hsc70 inhibits ASIC2 expression, and, when the inhibitory effect of Hsc70 is removed, ASIC2 expression increases, resulting in reduced VSMC migration. Because VSMC migration contributes to vasculogenesis and remodeling following vascular injury, our findings raise the possibility that ASIC2-Hsc70 interactions may play a role in these processes. PMID:18310515

  18. VHiSSI: Experimental Spacefibre Asic

    NASA Astrophysics Data System (ADS)

    Gonzalez Villafranca, Alberto; Ferrer, Albert; McLaren, David; McClements, Chris; Parkes, Steve

    2015-09-01

    SpaceFibreis the next generation data link and network technology being developed by University of Dundee for the European Space Agency. This high-speed technology runs over both copper and fibre optic cables and is backwards compatible with the ubiquitous SpaceWire technology. SpaceFibre provides 12 times the throughput of a SpW link (2.5 Gbps) with current flight qualified technology together with inbuilt QoS and FDIR capabilities. This paper details the first implementation of SpaceFibre in a radiation tolerant device in the frame of the VHiSSI project. The functionality of this ASIC chip is explained and the results of the functional and Total Ionising Dose and Single Event Effect radiation testing are detailed.

  19. ASICs in nanometer and 3D technologies for readout of hybrid pixel detectors

    NASA Astrophysics Data System (ADS)

    Maj, Piotr; Grybos, Pawel; Kmon, Piotr; Szczygiel, Robert

    2013-07-01

    Hybrid pixel detectors working in a single photon counting mode are very attractive solutions for material science and medical X-ray imaging applications. Readout electronics of these detectors has to match the geometry of pixel detectors with an area of readout channel of 100 μm × 100 μm (or even less) and very small power consumption (a few tens of μW). New solutions of readout ASICs are going into directions of better spatial resolutions, higher data throughput and more advanced functionality. We report on the design and measurement results of two pixel prototype ASICs in nanometer technology and 3D technology which offer fast signal processing, low noise performance and advanced functionality per single readout pixel cell.

  20. SEMICONDUCTOR INTEGRATED CIRCUITS: Accurate metamodels of device parameters and their applications in performance modeling and optimization of analog integrated circuits

    NASA Astrophysics Data System (ADS)

    Tao, Liang; Xinzhang, Jia; Junfeng, Chen

    2009-11-01

    Techniques for constructing metamodels of device parameters at BSIM3v3 level accuracy are presented to improve knowledge-based circuit sizing optimization. Based on the analysis of the prediction error of analytical performance expressions, operating point driven (OPD) metamodels of MOSFETs are introduced to capture the circuit's characteristics precisely. In the algorithm of metamodel construction, radial basis functions are adopted to interpolate the scattered multivariate data obtained from a well tailored data sampling scheme designed for MOSFETs. The OPD metamodels can be used to automatically bias the circuit at a specific DC operating point. Analytical-based performance expressions composed by the OPD metamodels show obvious improvement for most small-signal performances compared with simulation-based models. Both operating-point variables and transistor dimensions can be optimized in our nesting-loop optimization formulation to maximize design flexibility. The method is successfully applied to a low-voltage low-power amplifier.

  1. ASIC2 Subunits Facilitate Expression at the Cell Surface and Confer Regulation by PSD-95

    PubMed Central

    Harding, Anne Marie S.; Kusama, Nobuyoshi; Hattori, Tomonori; Gautam, Mamta; Benson, Christopher J.

    2014-01-01

    Acid-sensing ion channels (ASICs) are Na+ channels activated by changes in pH within the peripheral and central nervous systems. Several different isoforms of ASICs combine to form trimeric channels, and their properties are determined by their subunit composition. ASIC2 subunits are widely expressed throughout the brain, where they heteromultimerize with their partnering subunit, ASIC1a. However, ASIC2 contributes little to the pH sensitivity of the channels, and so its function is not well understood. We found that ASIC2 increased cell surface levels of the channel when it is coexpressed with ASIC1a, and genetic deletion of ASIC2 reduced acid-evoked current amplitude in mouse hippocampal neurons. Additionally, ASIC2a interacted with the neuronal synaptic scaffolding protein PSD-95, and PSD-95 reduced cell surface expression and current amplitude in ASICs that contain ASIC2a. Overexpression of PSD-95 also reduced acid-evoked current amplitude in hippocampal neurons. This result was dependent upon ASIC2 since the effect of PSD-95 was abolished in ASIC2−/− neurons. These results lend support to an emerging role of ASIC2 in the targeting of ASICs to surface membranes, and allows for interaction with PSD-95 to regulate these processes. PMID:24699665

  2. ASIC3 in muscle mediates mechanical, but not heat, hyperalgesia associated with muscle inflammation.

    PubMed

    Sluka, Kathleen A; Radhakrishnan, Rajan; Benson, Christopher J; Eshcol, Jayasheel O; Price, Margaret P; Babinski, Kazimierz; Audette, Katherine M; Yeomans, David C; Wilson, Steven P

    2007-05-01

    Peripheral initiators of muscle pain are virtually unknown, but likely key to development of chronic pain after muscle insult. The current study tested the hypothesis that ASIC3 in muscle is necessary for development of cutaneous mechanical, but not heat, hyperalgesia induced by muscle inflammation. Using mechanical and heat stimuli, we assessed behavioral responses in ASIC3-/- and ASIC3+/+ mice after induction of carrageenan muscle inflammation. ASIC3-/- mice did not develop cutaneous mechanical hyperalgesia after muscle inflammation when compared to ASIC3+/+ mice; heat hyperalgesia developed similarly between groups. We then tested if the phenotype could be rescued in ASIC3-/- mice by using a recombinant herpes virus vector to express ASIC3 in skin (where testing occurred) or muscle (where inflammation occurred). Infection of mouse DRG neurons with ASIC3-encoding virus resulted in functional expression of ASICs. Injection of ASIC3-encoding virus into muscle or skin of ASIC3-/- mice resulted in ASIC3 mRNA in DRG and protein expression in DRG and the peripheral injection site. Injection of ASIC3-encoding virus into muscle, but not skin, resulted in development of mechanical hyperalgesia similar to that observed in ASIC3+/+ mice. Thus, ASIC3 in primary afferent fibers innervating muscle is critical to development of hyperalgesia that results from muscle insult.

  3. Acid-sensing ion channels (ASICs) in the taste buds of adult zebrafish.

    PubMed

    Viña, E; Parisi, V; Cabo, R; Laurà, R; López-Velasco, S; López-Muñiz, A; García-Suárez, O; Germanà, A; Vega, J A

    2013-03-01

    In detecting chemical properties of food, different molecules and ion channels are involved including members of the acid-sensing ion channels (ASICs) family. Consistently ASICs are present in sensory cells of taste buds of mammals. In the present study the presence of ASICs (ASIC1, ASIC2, ASIC3 and ASIC4) was investigated in the taste buds of adult zebrafish (zASICs) using Western blot and immunohistochemistry. zASIC1 and zASIC3 were regularly absent from taste buds, whereas faint zASIC2 and robust zASIC4 immunoreactivities were detected in sensory cells. Moreover, zASIC2 also immunolabelled nerves supplying taste buds. The present results demonstrate for the first time the presence of zASICs in taste buds of teleosts, with different patterns to that occurring in mammals, probably due to the function of taste buds in aquatic environment and feeding. Nevertheless, the role of zASICs in taste remains to be demonstrated.

  4. ASIC3 in muscle mediates mechanical, but not heat, hyperalgesia associated with muscle inflammation

    PubMed Central

    Sluka, Kathleen A.; Radhakrishnan, Rajan; Benson, Christopher J.; Eshcol, Jayasheel O.; Price, Margaret P.; Babinski, Kazimierz; Audette, Katherine M.; Yeomans, David C.; Wilson, Steven P.

    2007-01-01

    Peripheral initiators of muscle pain are virtually unknown, but likely key to development of chronic pain after muscle insult. The current study tested the hypothesis that ASIC3 in muscle is necessary for development of cutaneous mechanical, but not heat hyperalgesia induced by muscle inflammation. Using mechanical and heat stimuli, we assessed behavioral responses in ASIC3−/− and ASIC3+/+ mice after induction of carrageenan muscle inflammation. ASIC3−/−mice did not develop cutaneous mechanical hyperalgesia after muscle inflammation when compared to ASIC3+/+ mice; heat hyperalgesia developed similarly between groups. We then tested if the phenotype could be rescued in ASIC3−/− mice by using a recombinant herpes virus vector to express ASIC3 in skin (where testing occurred) or muscle (where inflammation occurred). Infection of mouse DRG neurons with ASIC3-encoding virus resulted in functional expression of ASICs. Injection of ASIC3-encoding virus into muscle or skin of ASIC3−/− mice resulted in ASIC3 mRNA in DRG and protein expression in DRG and the peripheral injection site. Injection of ASIC3-encoding virus into muscle, but not skin, resulted in development of mechanical hyperalgesia similar to that observed in ASIC3+/+ mice. Thus, ASIC3 in primary afferent fibers innervating muscle is critical to development of hyperalgesia that results from muscle insult. PMID:17134831

  5. Development of a Position Decoding ASIC for SPECT using Silicon Photomultiplier

    NASA Astrophysics Data System (ADS)

    Cho, M.; Kim, H.; Lim, K. T.; Cho, G.

    2016-01-01

    Single Photon Emission Computed Tomography(SPECT) is a widely used diagnosis modality for detecting metabolic diseases. In general, SPECT system is consisted of a sensor, a pre-amplifier, position decoding circuits(PDC) and a data acquisition(DAQ) system. Due to such complexity, it is quite costly to assemble SPECT system by putting discrete components together. Moreover, using discrete components would make the system rather bulky. In this work, we designed a channel module ASIC for SPECT system. This system was composed of a transimpedance amplifier(TIA), comparators and digital logics. In this particular module, a TIA was selected as a preamplifier because the decay time and the rise time are shorter than that of other preamplifier topologies. In the proposed module, the amplified pulse from the TIA was split into two separate signals and each signal was then fed into two comparators with different reference levels, e.g., a low and high level. Then an XOR gate combined the comparator outputs and the output of XOR gate was sent to the suceeding digital logic. Furthermore, the output of each component in the module is composed of a signal packet. The packet includes the information on the energy, the time and the position of the incident photon. The energy and position information of a detected radiation can be derived from the output of the D-flipflop(DFF) in the module via time-over-threshold(TOT). The timing information was measured using a delayed rising edge from the low-level referenced comparator. There are several advantages in developing the channel module ASIC. First of all, the ASIC has only digital outputs and thus a correction circuit for analog signal distortion can be neglected. In addition, it is possible to cut down the system production cost because the volume of the system can be reduced due to the compactness of ASIC. The benefits of channel module is not only limited to SPECT but also beneficial to many other radiation detecting systems.

  6. Neural CMOS-integrated circuit and its application to data classification.

    PubMed

    Göknar, Izzet Cem; Yildiz, Merih; Minaei, Shahram; Deniz, Engin

    2012-05-01

    Implementation and new applications of a tunable complementary metal-oxide-semiconductor-integrated circuit (CMOS-IC) of a recently proposed classifier core-cell (CC) are presented and tested with two different datasets. With two algorithms-one based on Fisher's linear discriminant analysis and the other based on perceptron learning, used to obtain CCs' tunable parameters-the Haberman and Iris datasets are classified. The parameters so obtained are used for hard-classification of datasets with a neural network structured circuit. Classification performance and coefficient calculation times for both algorithms are given. The CC has 6-ns response time and 1.8-mW power consumption. The fabrication parameters used for the IC are taken from CMOS AMS 0.35-μm technology.

  7. Monolithic Active Pixel Matrix with Binary Counters (MAMBO) ASIC

    SciTech Connect

    Khalid, Farah F.; Deptuch, Grzegorz; Shenai, Alpana; Yarema, Raymond J.; /Fermilab

    2010-11-01

    Monolithic Active Matrix with Binary Counters (MAMBO) is a counting ASIC designed for detecting and measuring low energy X-rays from 6-12 keV. Each pixel contains analogue functionality implemented with a charge preamplifier, CR-RC{sup 2} shaper and a baseline restorer. It also contains a window comparator which can be trimmed by 4 bit DACs to remove systematic offsets. The hits are registered by a 12 bit ripple counter which is reconfigured as a shift register to serially output the data from the entire ASIC. Each pixel can be tested individually. Two diverse approaches have been used to prevent coupling between the detector and electronics in MAMBO III and MAMBO IV. MAMBO III is a 3D ASIC, the bottom ASIC consists of diodes which are connected to the top ASIC using {mu}-bump bonds. The detector is decoupled from the electronics by physically separating them on two tiers and using several metal layers as a shield. MAMBO IV is a monolithic structure which uses a nested well approach to isolate the detector from the electronics. The ASICs are being fabricated using the SOI 0.2 {micro}m OKI process, MAMBO III is 3D bonded at T-Micro and MAMBO IV nested well structure was developed in collaboration between OKI and Fermilab.

  8. A 200 C Universal Gate Driver Integrated Circuit for Extreme Environment Applications

    SciTech Connect

    Tolbert, Leon M; Huque, Mohammad A; Islam, Syed K; Blalock, Benjamin J

    2012-01-01

    High-temperature power converters (dc-dc, dc-ac, etc.) have enormous potential in extreme environment applications, including automotive, aerospace, geothermal, nuclear, and well logging. For successful realization of such high-temperature power conversion modules, the associated control electronics also need to perform at high temperature. This paper presents a silicon-on-insulator (SOI) based high-temperature gate driver integrated circuit (IC) incorporating an on-chip low-power temperature sensor and demonstrating an improved peak output current drive over our previously reported work. This driver IC has been primarily designed for automotive applications, where the underhood temperature can reach 200 C. This new gate driver prototype has been designed and implemented in a 0.8 {micro}m, 2-poly, and 3-metal bipolar CMOS-DMOS (Double-Diffused Metal-Oxide Semiconductor) on SOI process and has been successfully tested for up to 200 C ambient temperature driving a SiC MOSFET and a SiC normally-ON JFET. The salient feature of the proposed universal gate driver is its ability to drive power switches over a wide range of gate turn-ON voltages such as MOSFET (0 to 20 V), normally-OFF JFET (-7 to 3 V), and normally-ON JFET (-20 to 0 V). The measured peak output current capability of the driver is around 5 A and is thus capable of driving several power switches connected in parallel. An ultralow-power on-chip temperature supervisory circuit has also been integrated into the die to safeguard the driver circuit against excessive die temperature ({ge}220 C). This approach utilizes increased diode leakage current at higher temperature to monitor the die temperature. The power consumption of the proposed temperature sensor circuit is below 10 {micro}W for operating temperature up to 200 C.

  9. Recovery Act: High-Temperature Circuit Boards for use in Geothermal Well Monitoring Applications

    SciTech Connect

    Hooker, Matthew; Fabian, Paul

    2013-05-01

    The U.S. Department of Energy is leading the development of alternative energy sources that will ensure the long-term energy independence of our nation. One of the key renewable resources currently being advanced is geothermal energy. To tap into the large potential offered by generating power from the heat of the earth, and for geothermal energy to be more widely used, it will be necessary to drill deeper wells to reach the hot, dry rock located up to 10 km beneath the earth’s surface. In this instance, water will be introduced into the well to create a geothermal reservoir. A geothermal well produced in this manner is referred to as an enhanced geothermal system (EGS). EGS reservoirs are typically at depths of 3 to 10 km, and the temperatures at these depths have become a limiting factor in the application of existing downhole technologies. These high temperatures are especially problematic for electronic systems such as downhole data-logging tools, which are used to map and characterize the fractures and high-permeability regions in underground formations. Information provided by these tools is assessed so that underground formations capable of providing geothermal energy can be identified, and the subsequent drilling operations can be accurately directed to those locations. The mapping of geothermal resources involves the design and fabrication of sensor packages, including the electronic control modules, to quantify downhole conditions (300°C temperature, high pressure, seismic activity, etc.). Because of the extreme depths at which these measurements are performed, it is most desirable to perform the sensor signal processing downhole and then transmit the information to the surface. This approach necessitates the use of high-temperature electronics that can operate in the downhole environment. Downhole signal processing in EGS wells will require the development and demonstration of circuit boards that can withstand the elevated temperatures found at these

  10. GATING CIRCUITS

    DOEpatents

    Merrill, L.C.

    1958-10-14

    Control circuits for vacuum tubes are described, and a binary counter having an improved trigger circuit is reported. The salient feature of the binary counter is the application of the input signal to the cathode of each of two vacuum tubes through separate capacitors and the connection of each cathode to ground through separate diodes. The control of the binary counter is achieved in this manner without special pulse shaping of the input signal. A further advantage of the circuit is the simplicity and minimum nuruber of components required, making its use particularly desirable in computer machines.

  11. Review of hybrid pixel detector readout ASICs for spectroscopic X-ray imaging

    NASA Astrophysics Data System (ADS)

    Ballabriga, R.; Alozy, J.; Campbell, M.; Frojdh, E.; Heijne, E. H. M.; Koenig, T.; Llopart, X.; Marchal, J.; Pennicard, D.; Poikela, T.; Tlustos, L.; Valerio, P.; Wong, W.; Zuber, M.

    2016-01-01

    Semiconductor detector readout chips with pulse processing electronics have made possible spectroscopic X-ray imaging, bringing an improvement in the overall image quality and, in the case of medical imaging, a reduction in the X-ray dose delivered to the patient. In this contribution we review the state of the art in semiconductor-detector readout ASICs for spectroscopic X-ray imaging with emphasis on hybrid pixel detector technology. We discuss how some of the key challenges of the technology (such as dealing with high fluxes, maintaining spectral fidelity, power consumption density) are addressed by the various ASICs. In order to understand the fundamental limits of the technology, the physics of the interaction of radiation with the semiconductor detector and the process of signal induction in the input electrodes of the readout circuit are described. Simulations of the process of signal induction are presented that reveal the importance of making use of the small pixel effect to minimize the impact of the slow motion of holes and hole trapping in the induced signal in high-Z sensor materials. This can contribute to preserve fidelity in the measured spectrum with relatively short values of the shaper peaking time. Simulations also show, on the other hand, the distortion in the energy spectrum due to charge sharing and fluorescence photons when the pixel pitch is decreased. However, using recent measurements from the Medipix3 ASIC, we demonstrate that the spectroscopic information contained in the incoming photon beam can be recovered by the implementation in hardware of an algorithm whereby the signal from a single photon is reconstructed and allocated to the pixel with the largest deposition.

  12. Equivalent-circuit modeling of a MEMS phase detector for phase-locked loop applications

    NASA Astrophysics Data System (ADS)

    Han, Juzheng; Liao, Xiaoping

    2016-05-01

    This paper presents an equivalent-circuit model of a MEMS phase detector and deals with its application in phase-locked loops (PLLs). Due to the dc voltage output of the MEMS phase detector, the low-pass filter which is essential in a conventional PLL can be omitted. Thus, the layout area can be miniaturized and the consumed power can be saved. The signal transmission inside the phase detector is realized in circuit model by waveguide modules while the electric-thermal-electric conversion is illustrated in circuit term based on analogies between thermal and electrical variables. Losses are taken into consideration in the modeling. Measurement verifications for the phase detector model are conducted at different input powers 11, 14 and 17 dBm at 10 GHz. The maximum discrepancies between the simulated and measured results are 0.14, 0.42 and 1.13 mV, respectively. A new structure of PLL is constructed by connecting the presented model directly to a VCO module in the simulation platform. It allows to model the transient behaviors of the PLL at both locked and out of lock conditions. The VCO output frequency is revealed to be synchronized with the reference frequency within the hold range. All the modeling and simulation are performed in Advanced Design System (ADS) software.

  13. Terahertz applications of integrated circuits based on intrinsic Josephson junctions in high Tc superconductors

    NASA Astrophysics Data System (ADS)

    Wang, Huabing; Wu, Peiheng; Yamashita, Tsutomu

    2001-10-01

    Using a newly developed double-side fabrication method, an IJJ stack plus a bow-tie antenna and chokes were integrated in a slice 200 nm thick and singled out from inside a bulk Bi2Sr2CaCu2O8+x (BSCCO) single crystal. The junctions in the fabricated stack were very uniform, and the number of junctions involved was rather controllable. In addition to this method, which can be used to fabricate integrated circuits based on intrinsic Josephson junctions in high temperature (Tc) superconductors, also reported will be terahertz responses of IJJs, and the possible applications in quantum voltage standard, spectroscopy, and so on.

  14. Ambipolar MoTe2 transistors and their applications in logic circuits.

    PubMed

    Lin, Yen-Fu; Xu, Yong; Wang, Sheng-Tsung; Li, Song-Lin; Yamamoto, Mahito; Aparecido-Ferreira, Alex; Li, Wenwu; Sun, Huabin; Nakaharai, Shu; Jian, Wen-Bin; Ueno, Keiji; Tsukagoshi, Kazuhito

    2014-05-28

    We report ambipolar charge transport in α-molybdenum ditelluride (MoTe2 ) flakes, whereby the temperature dependence of the electrical characteristics was systematically analyzed. The ambipolarity of the charge transport originated from the formation of Schottky barriers at the metal/MoTe2 contacts. The Schottky barrier heights as well as the current on/off ratio could be modified by modulating the electrostatic fields of the back-gate voltage (Vbg) and drain-source voltage (Vds). Using these ambipolar MoTe2 transistors we fabricated complementary inverters and amplifiers, demonstrating their feasibility for future digital and analog circuit applications. PMID:24692079

  15. Development of arrays of Silicon Drift Detectors and readout ASIC for the SIDDHARTA experiment

    NASA Astrophysics Data System (ADS)

    Quaglia, R.; Schembari, F.; Bellotti, G.; Butt, A. D.; Fiorini, C.; Bombelli, L.; Giacomini, G.; Ficorella, F.; Piemonte, C.; Zorzi, N.

    2016-07-01

    This work deals with the development of new Silicon Drift Detectors (SDDs) and readout electronics for the upgrade of the SIDDHARTA experiment. The detector is based on a SDDs array organized in a 4×2 format with each SDD square shaped with 64 mm2 (8×8) active area. The total active area of the array is therefore 32×16 mm2 while the total area of the detector (including 1 mm border dead area) is 34 × 18mm2. The SIDDHARTA apparatus requires 48 of these modules that are designed and manufactured by Fondazione Bruno Kessler (FBK). The readout electronics is composed by CMOS preamplifiers (CUBEs) and by the new SFERA (SDDs Front-End Readout ASIC) circuit. SFERA is a 16-channels readout ASIC designed in a 0.35 μm CMOS technology, which features in each single readout channel a high order shaping amplifier (9th order Semi-Gaussian complex-conjugate poles) and a high efficiency pile-up rejection logic. The outputs of the channels are connected to an analog multiplexer for the external analog to digital conversion. An on-chip 12-bit SAR ADC is also included. Preliminary measurements of the detectors in the single SDD format are reported. Also measurements of low X-ray energies are reported in order to prove the possible extension to the soft X-ray range.

  16. Performance of an optical encoder based on a nondiffractive beam implemented with a specific photodetection integrated circuit and a diffractive optical element.

    PubMed

    Quintián, Fernando Perez; Calarco, Nicolás; Lutenberg, Ariel; Lipovetzky, José

    2015-09-01

    In this paper, we study the incremental signal produced by an optical encoder based on a nondiffractive beam (NDB). The NDB is generated by means of a diffractive optical element (DOE). The detection system is composed by an application specific integrated circuit (ASIC) sensor. The sensor consists of an array of eight concentric annular photodiodes, each one provided with a programmable gain amplifier. In this way, the system is able to synthesize a nonuniform detectivity. The contrast, amplitude, and harmonic content of the sinusoidal output signal are analyzed. The influence of the cross talk among the annular photodiodes is placed in evidence through the dependence of the signal contrast on the wavelength.

  17. Improving Design Efficiency for Large-Scale Heterogeneous Circuits

    NASA Astrophysics Data System (ADS)

    Gregerson, Anthony

    Despite increases in logic density, many Big Data applications must still be partitioned across multiple computing devices in order to meet their strict performance requirements. Among the most demanding of these applications is high-energy physics (HEP), which uses complex computing systems consisting of thousands of FPGAs and ASICs to process the sensor data created by experiments at particles accelerators such as the Large Hadron Collider (LHC). Designing such computing systems is challenging due to the scale of the systems, the exceptionally high-throughput and low-latency performance constraints that necessitate application-specific hardware implementations, the requirement that algorithms are efficiently partitioned across many devices, and the possible need to update the implemented algorithms during the lifetime of the system. In this work, we describe our research to develop flexible architectures for implementing such large-scale circuits on FPGAs. In particular, this work is motivated by (but not limited in scope to) high-energy physics algorithms for the Compact Muon Solenoid (CMS) experiment at the LHC. To make efficient use of logic resources in multi-FPGA systems, we introduce Multi-Personality Partitioning, a novel form of the graph partitioning problem, and present partitioning algorithms that can significantly improve resource utilization on heterogeneous devices while also reducing inter-chip connections. To reduce the high communication costs of Big Data applications, we also introduce Information-Aware Partitioning, a partitioning method that analyzes the data content of application-specific circuits, characterizes their entropy, and selects circuit partitions that enable efficient compression of data between chips. We employ our information-aware partitioning method to improve the performance of the hardware validation platform for evaluating new algorithms for the CMS experiment. Together, these research efforts help to improve the efficiency

  18. Permeating protons contribute to tachyphylaxis of the acid-sensing ion channel (ASIC) 1a.

    PubMed

    Chen, Xuanmao; Gründer, Stefan

    2007-03-15

    The homomeric acid-sensing ion channel 1a (ASIC1a) is a H+-activated ion channel with important physiological functions and pathophysiological impact in the central nervous system. Here we show that homomeric ASIC1a is distinguished from other ASICs by a reduced response to successive acid stimulations. Such a reduced response is called tachyphylaxis. We show that tachyphylaxis depends on H+ permeating through ASIC1a, that tachyphylaxis is attenuated by extracellular Ca2+, and that tachyphylaxis is probably linked to Ca2+ permeability of ASIC1a. Moreover, we provide evidence that tachyphylaxis is probably due to a long-lived inactive state of ASIC1a. A deeper understanding of ASIC1a tachyphylaxis may lead to pharmacological control of ASIC1a activity that could be of potential benefit for the treatment of stroke.

  19. Synchronous and asynchronous multiplexer circuits for medical imaging realized in CMOS 0.18um technology

    NASA Astrophysics Data System (ADS)

    Długosz, R.; Iniewski, K.

    2007-05-01

    Multiplexers are one of the most important elements in readout front-end ASICs for multi-element detectors in medical imaging. The purpose of these ASICs is to detect signals appearing randomly in many channels and to collect the detected data in an ordered fashion (de-randomization) in order to send it to an external ADC. ASIC output stage functionality can be divided into two: pulse detection and multiplexing. The pulse detection block is responsible for detecting maximum values of signals arriving from the shaper, sending a flag signal indicating that the peak signal has been detected and storing the pulse in an analog memory until read by ADC. The multiplexer in turn is responsible for searching for active flags, controlling the channel that has detected the peak signal and performing reset functions after readout. There are several types of multiplexers proposed in this paper, which can be divided into several classes: synchronous, synchronized and asynchronous. Synchronous circuits require availability of the multiphase clock generator, which increases the power dissipation, but simultaneously provide very convenient mechanism that enables unambiguous choice of the active channel. This characteristics leads to 100% effectiveness in data processing and no data loss. Asynchronous multiplexers do not require clock generators and because of that have simpler structure, are faster and more power efficient, especially when data samples occur seldom at the ASIC's inputs. The main problem of the asynchronous solution is when data on two or more inputs occur almost at the same time, shorter than the multiplexer's reaction time. In this situation some data can be lost. In many applications loss of the order of 1% of the data is acceptable, which makes use of asynchronous multiplexers possible. For applications when the lower loss is desirable a new hierarchy mechanism has been introduced. One of proposed solutions is a synchronized binary tree structure, that uses many

  20. A low-noise 64-channel front-end readout ASIC for CdZnTe detectors aimed to hard X-ray imaging systems

    NASA Astrophysics Data System (ADS)

    Gan, B.; Wei, T.; Gao, W.; Liu, H.; Hu, Y.

    2016-04-01

    In this paper, we report on the recent development of a 64-channel low-noise front-end readout ASIC for CdZnTe detectors aimed to hard X-ray imaging systems. The readout channel is comprised of a charge sensitive amplifier, a leakage current compensation circuit, a CR-RC shaper, two S-K filters, an inverse proportional amplifier, a peak-detect-and-hold circuit, a discriminator and trigger logic, a time sequence control circuit and a driving buffer. The readout ASIC is implemented in TSMC 0.35 μm mixed-signal CMOS technology, the die size of the prototype chip is 2.7 mm×8.0 mm. The overall gain of the readout channel is 200 mV/fC, the power consumption is less than 8 mW/channel, the linearity error is less than 1%, the inconsistency among the channels is less than 2.86%, and the equivalent noise charge of a typical channel is 66 e- at zero farad plus 14 e- per picofarad. By connecting this readout ASIC to an 8×8 pixel CdZnTe detector, we obtained an energy spectrum, the energy resolution of which is 4.5% at the 59.5 keV line of 241Am source.

  1. A Multi-Functional Planar Lightwave Circuit for Optical Signal Processing Applications

    NASA Astrophysics Data System (ADS)

    Samadi, Payman

    Ultrafast optical signal processing is now a necessary tool in several domains of science and technology such as high-speed telecommunication, biomedicine, microscopy and radar systems. Optical arbitrary waveform generation is an optical signal processing function which has applications in optical telecommunication networks, sampling, and photonically-assisted RF waveform generation. Furthermore, performing optical signal processing in photonic integrated circuits is crucial for system integration and overcoming the speed limitations in electrical to optical conversion. In this thesis, we introduce a silica-based planar lightwave circuit which performs several optical signal processing functions. We start by reviewing the material system used to fabricate the device. We justify the choice of the material for our application and explain the fabrication process and the experiments to characterize the device. Then we introduce the fundamental theory of our device which is based on pulse repetition rate multiplication (PRRM) and shaping. We review the theory of direct time-domain approach to perform the PRRM and shaping. Experiments to measure the impulse response of the device, perform PRRM and polarization dependence characterization is shown as well. Three main applications of our device is presented next. First we use the PLC device with non-linear optics to generate multiple pulse trains at different wavelengths and different repetition rates. Second, we use the fundamental of the previous application to perform demultiplexing of optical time division multiplexed signals. Our approach is flexible in a sense that it can demultiplex any tributary channel of lower rate data, also it works for both amplitude and phase modulated data. Finally, using the second generation of our PLC device, we photonically generate radio frequency waveforms. We are able to generate various pulse shapes which are generally hard to generate using electronics at frequencies up to 80 GHz

  2. Acid-sensing ion channel (ASIC) 1a/2a heteromers have a flexible 2:1/1:2 stoichiometry

    PubMed Central

    Bartoi, Tudor; Augustinowski, Katrin; Polleichtner, Georg; Gründer, Stefan; Ulbrich, Maximilian H.

    2014-01-01

    Acid-sensing ion channels (ASICs) are widely expressed proton-gated Na+ channels playing a role in tissue acidosis and pain. A trimeric composition of ASICs has been suggested by crystallization. Upon coexpression of ASIC1a and ASIC2a in Xenopus oocytes, we observed the formation of heteromers and their coexistence with homomers by electrophysiology, but could not determine whether heteromeric complexes have a fixed subunit stoichiometry or whether certain stoichiometries are preferred over others. We therefore imaged ASICs labeled with green and red fluorescent proteins on a single-molecule level, counted bleaching steps from GFP and colocalized them with red tandem tetrameric mCherry for many individual complexes. Combinatorial analysis suggests a model of random mixing of ASIC1a and ASIC2a subunits to yield both 2:1 and 1:2 ASIC1a:ASIC2a heteromers together with ASIC1a and ASIC2a homomers. PMID:24847067

  3. Onboard calibration circuit for the DAMPE BGO calorimeter front-end electronics

    NASA Astrophysics Data System (ADS)

    Zhang, De-Liang; Feng, Chang-Qing; Zhang, Jun-Bin; Wang, Qi; Ma, Si-Yuan; Shen, Zhong-Tao; Jiang, Di; Gao, Shan-Shan; Zhang, Yun-Long; Guo, Jian-Hua; Liu, Shu-Bin; An, Qi

    2016-05-01

    DAMPE (DArk Matter Particle Explorer) is a scientific satellite which is mainly aimed at indirectly searching for dark matter in space. One critical sub-detector of the DAMPE payload is the BGO (bismuth germanium oxide) calorimeter, which contains 1848 PMT (photomultiplier tube) dynodes and 16 FEE (Front-End Electronics) boards. VA160 and VATA160, two 32-channel low power ASICs (Application Specific Integrated Circuits), are adopted as the key components on the FEEs to perform charge measurement for the PMT signals. In order to monitor the parameter drift which may be caused by temperature variation, aging, or other environmental factors, an onboard calibration circuit is designed for the VA160 and VATA160 ASICs. It is mainly composed of a 12-bit DAC (Digital to Analog Converter), an operational amplifier and an analog switch. Test results showed that a dynamic range of 0–30 pC with a precision of 5 fC (Root Meam Square, RMS) was achieved, which covers the VA160’s input range. It can be used to compensate for the temperature drift and test the trigger function of the FEEs. The calibration circuit has been implemented for the front-end electronics of the BGO Calorimeter and verified by all the environmental tests for both Qualification Model and Flight Model of DAMPE. The DAMPE satellite was launched at the end of 2015 and the calibration circuit will operate periodically in space. Supported by Strategic Priority Research Program on Space Science of Chinese Academy of Sciences (XDA04040202-4), and National Basic Research Program (973 Program) of China (2010CB833002) and National Natural Science Foundation of China (11273070)

  4. Architecture of the multichannel data-driven ASIC

    NASA Astrophysics Data System (ADS)

    Normanov, D. D.; Atkin, E. V.

    2016-02-01

    The development architecture of a multichannel data-driven ASIC is presented. It provides the selection of useful events at an early stage of reading out detector signals. The architecture is based on fast cross-point switches of analog signals, followed by their digitization by a limited set of ADCs and high-speed output data serialization. Such approach reduces the number of subsequent ADCs as well as digital processing channels. That leads to lower power consumption and chip area. The results of a prototype ASIC development, based on this architecture and intended for the CBM experiment at FAIR, are given.

  5. Unoxidized porous Si as an isolation material for mixed-signal integrated circuit applications

    NASA Astrophysics Data System (ADS)

    Kim, Han-Su; Xie, Ya-Hong; DeVincentis, Marc; Itoh, Tatsuo; Jenkins, Keith A.

    2003-04-01

    An isolation technology for radio frequency (rf) applications based on unoxidized porous Si (PS) is demonstrated. This study examines all the important issues pertinent to incorporating PS with Si very-large-scale integration (VLSI) technology, where PS is used as a semi-insulating material. Specifically, the issues on rf isolation performance of PS as a function of porosity [from coplanar waveguide (CPW) line measurements] and PS thickness (from on-chip inductors) and the stress generated from incorporating PS regions by anodization are discussed in detail. CPW line measurements show that the relative dielectric constant of PS films decreases from 9 to 3 with increasing porosity from 24% to 78%. PS is a very low loss material with loss tangent <0.001 at 20 GHz when its porosity is above 51%. rf crosstalk through a Si substrate can be reduced to that through air by inserting a PS trench between noise generating circuit and noise sensing circuit. On-chip spiral inductors fabricated on top of PS regions of through-the-wafer thickness have Qmax of about 29 at 7 GHz and resonant frequency higher than 20 GHz. With the additional advantage of planar topography and mechanical integrity, we show that unoxidized PS is an outstanding material for rf isolation in Si VLSI.

  6. Novel Micromachined Coplanar Waveguide Transmission Lines for Application in Millimeter-Wave Circuits

    NASA Astrophysics Data System (ADS)

    Park, Jae-Hyoung; Baek, Chang-Wook; Jung, Sanghwa; Kim, Hong-Teuk; Kwon, Youngwoo; Kim, Yong-Kweon

    2000-12-01

    In this paper, novel micromachined coplanar waveguide(CPW) transmission lines for application in millimeter-wave circuits are proposed. Two types of transmission lines with the length of 1 cm are fabricated and the measured characteristics are compared with those of the conventional CPW transmission line. One is the elevated CPW(ECPW) transmission line and the other is the overlay CPW(OCPW) line. These transmission lines are composed of 3-μm-thick electroplated gold lines with overhanging parts. By elevating the metal lines from the substrate using micromachining technology, the conductor and substrate dielectric loss can be reduced and easily integrated with conventional monolithic microwave integrated circuits. Compared with the conventional CPW line showing 2.65 dB/cm insertion loss at 50 GHz, the loss can be reduced to 1.9 dB/cm and 1.25 dB/cm at 50 GHz in the case of the ECPW and OCPW transmission lines, respectively. Also, the OCPW transmission line shows that the insertion loss does not vary with the change of the characteristic impedance. As shown in the measured and simulated results, the insertion loss is maintained below 1.4 dB/cm over wide impedance ranges.

  7. Carbon Nanotube Self-Gating Diode and Application in Integrated Circuits.

    PubMed

    Si, Jia; Liu, Lijun; Wang, Fanglin; Zhang, Zhiyong; Peng, Lian-Mao

    2016-07-26

    A nano self-gating diode (SGD) based on nanoscale semiconducting material is proposed, simulated, and realized on semiconducting carbon nanotubes (CNTs) through a doping-free fabrication process. The relationships between the performance and material/structural parameters of the SGD are explored through numerical simulation and verified by experiment results. Based on these results, performance optimization strategy is outlined, and high performance CNT SGDs are fabricated and demonstrated to surpass other published CNT diodes. In particular the CNT SGD exhibits high rectifier factor of up to 1.4 × 10(6) while retains large on-state current. Benefiting from high yield and stability, CNT SGDs are used for constructing logic and analog integrated circuits. Two kinds of basic digital gates (AND and OR) have been realized on chip through using CNT SGDs and on-chip Ti wire resistances, and a full wave rectifier circuit has been demonstrated through using two CNT SGDs. Although demonstrated here using CNT SGDs, this device structure may in principle be implemented using other semiconducting nanomaterials, to provide ideas and building blocks for electronic applications based on nanoscale materials. PMID:27322134

  8. Heterostructure-based high-speed/high-frequency electronic circuit applications

    NASA Astrophysics Data System (ADS)

    Zampardi, P. J.; Runge, K.; Pierson, R. L.; Higgins, J. A.; Yu, R.; McDermott, B. T.; Pan, N.

    1999-08-01

    With the growth of wireless and lightwave technologies, heterostructure electronic devices are commodity items in the commercial marketplace [Browne J. Power-amplifier MMICs drive commercial circuits. Microwaves & RF, 1998. p. 116-24.]. In particular, HBTs are an attractive device for handset power amplifiers at 900 MHz and 1.9 GHz for CDMA applications [Lum E. GaAs technology rides the wireless wave. Proceedings of the 1997 GaAs IC Symposium, 1997. p. 11-13; "Rockwell Ramps Up". Compound Semiconductor, May/June 1997.]. At higher frequencies, both HBTs and p-HEMTs are expected to dominate the marketplace. For high-speed lightwave circuit applications, heterostructure based products on the market for OC-48 (2.5 Gb/s) and OC-192 (10 Gb/s) are emerging [http://www.nb.rockwell.com/platforms/network_access/nahome.html#5.; http://www.nortel.com/technology/opto/receivers/ptav2.html.]. Chips that operate at 40 Gb/ have been demonstrated in a number of research laboratories [Zampardi PJ, Pierson RL, Runge K, Yu R, Beccue SM, Yu J, Wang KC. hybrid digital/microwave HBTs for >30 Gb/s optical communications. IEDM Technical Digest, 1995. p. 803-6; Swahn T, Lewin T, Mokhtari M, Tenhunen H, Walden R, Stanchina W. 40 Gb/s 3 Volt InP HBT ICs for a fiber optic demonstrator system. Proceedings of the 1996 GaAs IC Symposium, 1996. p. 125-8; Suzuki H, Watanabe K, Ishikawa K, Masuda H, Ouchi K, Tanoue T, Takeyari R. InP/InGaAs HBT ICs for 40 Gbit/s optical transmission systems. Proceedings of the 1997 GaAs IC Symposium, 1997. p. 215-8]. In addition to these two markets, another area where heterostructure devices are having significant impact is for data conversion [Walden RH. Analog-to digital convertor technology comparison. Proceedings of the 1994 GaAs IC Symposium, 1994. p. 217-9; Poulton K, Knudsen K, Corcoran J, Wang KC, Nubling RB, Chang M-CF, Asbeck PM, Huang RT. A 6-b, 4 GSa/s GaAs HBT ADC. IEEE J Solid-State Circuits 1995;30:1109-18; Nary K, Nubling R, Beccue S, Colleran W

  9. Graphene-based tunable non-foster circuit for VHF applications

    NASA Astrophysics Data System (ADS)

    Tian, Jing; Nagarkoti, Deepak Singh; Rajab, Khalid Z.; Hao, Yang

    2016-06-01

    This paper presents a negative impedance converter (NIC) based on graphene field effect transistors (GFETs) for VHF applications. The NIC is designed following Linvill's open circuit stable (OCS) topology. The DC modelling parameters of GFET are extracted from a device measured by Meric et al. [IEEE Electron Devices Meeting, 23.2.1 (2010)] Estimated parasitics are also taken into account. Simulation results from Keysight Advanced Design System (ADS) show good NIC performance up to 200 MHz and the value of negative capacitance is directly proportional to the capacitive load. In addition, it has been shown that by varying the supply voltage the value of negative capacitance can also be tuned. The NIC stability has been tested up to 2 GHz (10 times the maximum operation frequency) using Nyquist stability criterion to ensure there are no oscillation issues.

  10. The eCDR-PLL, a radiation-tolerant ASIC for clock and data recovery and deterministic phase clock synthesis

    NASA Astrophysics Data System (ADS)

    Leitao, P.; Francisco, R.; Llopart, X.; Tavernier, F.; Baron, S.; Bonacini, S.; Moreira, P.

    2015-03-01

    A radiation-tolerant CDR/PLL ASIC has been developed for the upcoming LHC upgrades, featuring clock Frequency Multiplication (FM) and Clock and Data Recovery (CDR), showing deterministic phase and low jitter. Two FM modes have been implemented: either generating 40, 60, 120 and 240 MHz clock outputs for GBT-FPGA applications or providing 40, 80, 160 and 320 MHz clocks for TTC and e-link applications. The CDR operates with 40, 80, 160 or 320 Mbit/s data rates while always generating clocks at 40, 80, 160 and 320 MHz, regardless of the data rate. All the outputs are phase programmable with a resolution of 195 ps or 260 ps, depending on the selected mode. The ASIC has been designed using radiation-tolerant techniques in a 130 nm CMOS technology and operates at a 1.2 V supply voltage.

  11. ENaCs and ASICs as therapeutic targets

    PubMed Central

    Qadri, Yawar J.; Rooj, Arun K.

    2012-01-01

    The epithelial Na+ channel (ENaC) and acid-sensitive ion channel (ASIC) branches of the ENaC/degenerin superfamily of cation channels have drawn increasing attention as potential therapeutic targets in a variety of diseases and conditions. Originally thought to be solely expressed in fluid absorptive epithelia and in neurons, it has become apparent that members of this family exhibit nearly ubiquitous expression. Therapeutic opportunities range from hypertension, due to the role of ENaC in maintaining whole body salt and water homeostasis, to anxiety disorders and pain associated with ASIC activity. As a physiologist intrigued by the fundamental mechanics of salt and water transport, it was natural that Dale Benos, to whom this series of reviews is dedicated, should have been at the forefront of research into the amiloride-sensitive sodium channel. The cloning of ENaC and subsequently the ASIC channels has revealed a far wider role for this channel family than was previously imagined. In this review, we will discuss the known and potential roles of ENaC and ASIC subunits in the wide variety of pathologies in which these channels have been implicated. Some of these, such as the role of ENaC in Liddle's syndrome are well established, others less so; however, all are related in that the fundamental defect is due to inappropriate channel activity. PMID:22277752

  12. Evidence for the involvement of ASIC3 in sensory mechanotransduction in proprioceptors

    PubMed Central

    Lin, Shing-Hong; Cheng, Yuan-Ren; Banks, Robert W.; Min, Ming-Yuan; Bewick, Guy S.; Chen, Chih-Cheng

    2016-01-01

    Acid-sensing ion channel 3 (ASIC3) is involved in acid nociception, but its possible role in neurosensory mechanotransduction is disputed. We report here the generation of Asic3-knockout/eGFPf-knockin mice and subsequent characterization of heterogeneous expression of ASIC3 in the dorsal root ganglion (DRG). ASIC3 is expressed in parvalbumin (Pv+) proprioceptor axons innervating muscle spindles. We further generate a floxed allele of Asic3 (Asic3f/f) and probe the role of ASIC3 in mechanotransduction in neurite-bearing Pv+ DRG neurons through localized elastic matrix movements and electrophysiology. Targeted knockout of Asic3 disrupts spindle afferent sensitivity to dynamic stimuli and impairs mechanotransduction in Pv+ DRG neurons because of substrate deformation-induced neurite stretching, but not to direct neurite indentation. In behavioural tasks, global knockout (Asic3−/−) and Pv-Cre::Asic3f/f mice produce similar deficits in grid and balance beam walking tasks. We conclude that, at least in mouse, ASIC3 is a molecular determinant contributing to dynamic mechanosensitivity in proprioceptors. PMID:27161260

  13. Evidence for the involvement of ASIC3 in sensory mechanotransduction in proprioceptors.

    PubMed

    Lin, Shing-Hong; Cheng, Yuan-Ren; Banks, Robert W; Min, Ming-Yuan; Bewick, Guy S; Chen, Chih-Cheng

    2016-01-01

    Acid-sensing ion channel 3 (ASIC3) is involved in acid nociception, but its possible role in neurosensory mechanotransduction is disputed. We report here the generation of Asic3-knockout/eGFPf-knockin mice and subsequent characterization of heterogeneous expression of ASIC3 in the dorsal root ganglion (DRG). ASIC3 is expressed in parvalbumin (Pv+) proprioceptor axons innervating muscle spindles. We further generate a floxed allele of Asic3 (Asic3(f/f)) and probe the role of ASIC3 in mechanotransduction in neurite-bearing Pv+ DRG neurons through localized elastic matrix movements and electrophysiology. Targeted knockout of Asic3 disrupts spindle afferent sensitivity to dynamic stimuli and impairs mechanotransduction in Pv+ DRG neurons because of substrate deformation-induced neurite stretching, but not to direct neurite indentation. In behavioural tasks, global knockout (Asic3(-/-)) and Pv-Cre::Asic3(f/f) mice produce similar deficits in grid and balance beam walking tasks. We conclude that, at least in mouse, ASIC3 is a molecular determinant contributing to dynamic mechanosensitivity in proprioceptors. PMID:27161260

  14. A telemetric pressure sensor system for biomedical applications.

    PubMed

    Ginggen, Alec; Tardy, Yanik; Crivelli, Rocco; Bork, Toralf; Renaud, Philippe

    2008-04-01

    A new implantable pressure sensor for long-term monitoring of intracranial pressure is presented. The sensor is powered by telemetry and can be interrogated wirelessly. A capacitive pressure transducer, whose capacitance is converted to a frequency-encoded signal by an application-specific integrated circuit (ASIC), senses the absolute pressure. The pressure-encoded signal, the ASIC input voltage, and onboard calibration parameters are transmitted to an external reading unit. The proposed novel packaging solution is designed for long-term stability and reliability of the sensor. The accuracy of sensor at body temperature is better than 2 mbar across a pressure range of 600-1200 mbar. The sensor is 13 mm in diameter and 4.5 mm in height.

  15. Three-dimensional stacked structured ASIC devices and methods of fabrication thereof

    SciTech Connect

    Shinde, Subhash L.; Teifel, John; Flores, Richard S.; Jarecki Jr., Robert L.; Bauer, Todd

    2015-11-19

    A 3D stacked sASIC is provided that includes a plurality of 2D reconfigurable structured structured ASIC (sASIC) levels interconnected through hard-wired arrays of 3D vias. The 2D sASIC levels may contain logic, memory, analog functions, and device input/output pad circuitry. During fabrication, these 2D sASIC levels are stacked on top of each other and fused together with 3D metal vias. Such 3D vias may be fabricated as through-silicon vias (TSVs). They may connect to the back-side of the 2D sASIC level, or they may be connected to top metal pads on the front-side of the 2D sASIC level.

  16. Printed circuit boards as platform for disposable lab-on-a-chip applications

    NASA Astrophysics Data System (ADS)

    Leiterer, Christian; Urban, Matthias; Fritzsche, Wolfgang; Goldys, Ewa; Inglis, David

    2015-12-01

    An increasing demand in performance from electronic devices has resulted in continuous shrinking of electronic components. This shrinkage has demanded that the primary integration platform, the printed circuit board (PCB), follow this same trend. Today, PCB companies offer ~100 micron sized features (depth and width) which mean they are becoming suitable as physical platforms for Lab-on-a-Chip (LOC) and microfluidic applications. Compared to current lithographic based fluidic approaches; PCB technology offers several advantages that are useful for this technology. These include: Being easily designed and changed using free software, robust structures that can often be reused, chip layouts that can be ordered from commercial PCB suppliers at very low cost (1 AUD each in this work), and integration of electrodes at no additional cost. Here we present the application of PCB technology in connection with microfluidics for several biomedical applications. In case of commercialization the costs for each device can be even further decreased to approximately one tenth of its current cost.

  17. VERITAS 2.0 a multi-channel readout ASIC suitable for the DEPFET arrays of the WFI for Athena

    NASA Astrophysics Data System (ADS)

    Porro, Matteo; Bianchi, Davide; De Vita, Giulio; Herrmann, Sven; Wassatsch, Andreas; Bähr, Alexander; Bergbauer, Bettina; Meidinger, Norbert; Ott, Sabine; Treis, Johannes

    2014-07-01

    VERITAS 2.0 is a multi-channel readout ASIC for pnCCDs and DEPFET arrays. The main chip application is the readout of the DEPFET pixel arrays of the Wide Field Imager for the Athena mission. Every readout channel implements a trapezoidal weighting function and it is based on a fully differential architecture. VERITAS 2.0 is the first ASIC able to readout the DEPFETs both in source follower mode and in drain current mode. The drain readout should make it possible to achieve a processing time of about 2-3 μs/line with an electronics noise <= 5 electrons r.m.s.. The main concept and first measurements are presented.

  18. Silicon-On-Insulator (SOI) Devices and Mixed-Signal Circuits for Extreme Temperature Applications

    NASA Technical Reports Server (NTRS)

    Patterson, Richard; Hammoud, Ahmad; Elbuluk, Malik

    2008-01-01

    Electronic systems in planetary exploration missions and in aerospace applications are expected to encounter extreme temperatures and wide thermal swings in their operational environments. Electronics designed for such applications must, therefore, be able to withstand exposure to extreme temperatures and to perform properly for the duration of the missions. Electronic parts based on silicon-on-insulator (SOI) technology are known, based on device structure, to provide faster switching, consume less power, and offer better radiation-tolerance compared to their silicon counterparts. They also exhibit reduced current leakage and are often tailored for high temperature operation. However, little is known about their performance at low temperature. The performance of several SOI devices and mixed-signal circuits was determined under extreme temperatures, cold-restart, and thermal cycling. The investigations were carried out to establish a baseline on the functionality and to determine suitability of these devices for use in space exploration missions under extreme temperatures. The experimental results obtained on selected SOI devices are presented and discussed in this paper.

  19. Fully Programmable Ring-Resonator-Based Integrated Photonic Circuit for Phase Coherent Applications

    NASA Astrophysics Data System (ADS)

    Agarwal, Anjali; Toliver, Paul; Menendez, Ronald; Etemad, Shahab; Jackel, Janet; Young, Jeffrey; Banwell, Thomas; Little, B. E.; Chu, S. T.; Chen, Wei; Chen, Wenlu; Hryniewicz, J.; Johnson, F.; Gill, D.; King, O.; Davidson, R.; Donovan, K.; Delfyett, Peter J.

    2006-01-01

    A novel ring-resonator-based integrated photonic chip with ultrafine frequency resolution, providing programmable, stable, and accurate optical-phase control is demonstrated. The ability to manipulate the optical phase of the individual frequency components of a signal is a powerful tool for optical communications, signal processing, and RF photonics applications. As a demonstration of the power of these components, we report their use as programmable spectral-phase encoders (SPEs) and decoders for wavelength-division-multiplexing (WDM)-compatible optical code-division multiple access (OCDMA). Most important for the application here, the high resolution of these ring-resonator circuits makes possible the independent control of the optical phase of the individual tightly spaced frequency lines of a mode-locked laser (MLL). This unique approach allows us to limit the coded signal's spectral bandwidth, thereby allowing for high spectral efficiency (compared to other OCDMA systems) and compatibility with existing WDM systems with a rapidly reconfigurable set of codes. A four-user OCDMA system using polarization multiplexing is shown to operate at data rates of 2.5 Gb/s within a 40-GHz transparent optical window with a bit error rate (BER) better than 10-9 and a spectral efficiency of 25%.

  20. System-Level Integrated Circuit (SLIC) Technology Development for Phased Array Antenna Applications

    NASA Technical Reports Server (NTRS)

    Windyka, John A.; Zablocki, Ed G.

    1997-01-01

    This report documents the efforts and progress in developing a 'system-level' integrated circuit, or SLIC, for application in advanced phased array antenna systems. The SLIC combines radio-frequency (RF) microelectronics, digital and analog support circuitry, and photonic interfaces into a single micro-hybrid assembly. Together, these technologies provide not only the amplitude and phase control necessary for electronic beam steering in the phased array, but also add thermally-compensated automatic gain control, health and status feedback, bias regulation, and reduced interconnect complexity. All circuitry is integrated into a compact, multilayer structure configured for use as a two-by-four element phased array module, operating at 20 Gigahertz, using a Microwave High-Density Interconnect (MHDI) process. The resultant hardware is constructed without conventional wirebonds, maintains tight inter-element spacing, and leads toward low-cost mass production. The measured performances and development issues associated with both the two-by-four element module and the constituent elements are presented. Additionally, a section of the report describes alternative architectures and applications supported by the SLIC electronics. Test results show excellent yield and performance of RF circuitry and full automatic gain control for multiple, independent channels. Digital control function, while suffering from lower manufacturing yield, also proved successful.

  1. Leu85 in the beta1-beta2 linker of ASIC1 slows activation and decreases the apparent proton affinity by stabilizing a closed conformation.

    PubMed

    Li, Tianbo; Yang, Youshan; Canessa, Cecilia M

    2010-07-16

    Acid-sensing ion channels (ASICs) are proton-activated channels expressed in neurons of the central and peripheral nervous systems where they modulate neuronal activity in response to external increases in proton concentration. The size of ASIC1 currents evoked by a given local acidification is determined by the number of channels in the plasma membrane and by the apparent proton affinities for activation and steady-state desensitization of the channel. Thus, the magnitude of the pH drop and the value of the baseline pH both are functionally important. Recent characterization of ASIC1s from an increasing number of species has made evident that proton affinities of these channels vary across vertebrates. We found that in species with high baseline plasma pH, e.g. frog, shark, and fish, ASIC1 has high proton affinity compared with the mammalian channel. The beta1-beta2 linker in the extracellular domain, specifically by the substitution M85L, determines the interspecies differences in proton affinities and also the time course of ASIC1 macroscopic currents. The mechanism underlying these observations is a delay in channel opening after application of protons, most likely by stabilizing a closed conformation that decreases the apparent affinity to protons and also slows the rise and decay phases of the current. Together, the results suggest evolutionary adaptation of ASIC1 to match the value of the species-specific plasma pH. At the molecular level, adaptation is achieved by substitutions of nonionizable residues rather than by modification of the channel proton sensor. PMID:20479002

  2. Acid Sensing Ion Channels (ASICs) in NS20Y cells - potential role in neuronal differentiation.

    PubMed

    O'Bryant, Zaven; Leng, Tiandong; Liu, Mingli; Inoue, Koichi; Vann, Kiara T; Xiong, Zhi-Gang

    2016-01-01

    Cultured neuronal cell lines can express properties of mature neurons if properly differentiated. Although the precise mechanisms underlying neuronal differentiation are not fully understood, the expression and activation of ion channels, particularly those of Ca(2+)-permeable channels, have been suggested to play a role. In this study, we explored the presence and characterized the properties of acid-sensing ion channels (ASICs) in NS20Y cells, a neuronal cell line previously used for the study of neuronal differentiation. In addition, the potential role of ASICs in cell differentiation was explored. Reverse Transcription Polymerase Chain Reaction and Western blot revealed the presence of ASIC1 subunits in these cells. Fast drops of extracellular pH activated transient inward currents which were blocked, in a dose dependent manner, by amiloride, a non-selective ASIC blocker, and by Psalmotoxin-1 (PcTX1), a specific inhibitor for homomeric ASIC1a and heteromeric ASIC1a/2b channels. Incubation of cells with PcTX1 significantly reduced the differentiation of NS20Y cells induced by cpt-cAMP, as evidenced by decreased neurite length, dendritic complexity, decreased expression of functional voltage gated Na(+) channels. Consistent with ASIC1a inhibition, ASIC1a knockdown with small interference RNA significantly attenuates cpt-cAMP-induced increase of neurite outgrowth. In summary, we described the presence of functional ASICs in NS20Y cells and demonstrate that ASIC1a plays a role in the differentiation of these cells. PMID:27342076

  3. Fabrication of Ultra-Thin Printed Organic TFT CMOS Logic Circuits Optimized for Low-Voltage Wearable Sensor Applications

    NASA Astrophysics Data System (ADS)

    Takeda, Yasunori; Hayasaka, Kazuma; Shiwaku, Rei; Yokosawa, Koji; Shiba, Takeo; Mamada, Masashi; Kumaki, Daisuke; Fukuda, Kenjiro; Tokito, Shizuo

    2016-05-01

    Ultrathin electronic circuits that can be manufactured by using conventional printing technologies are key elements necessary to realize wearable health sensors and next-generation flexible electronic devices. Due to their low level of power consumption, complementary (CMOS) circuits using both types of semiconductors can be easily employed in wireless devices. Here, we describe ultrathin CMOS logic circuits, for which not only the source/drain electrodes but also the semiconductor layers were printed. Both p-type and n-type organic thin film transistor devices were employed in a D-flip flop circuit in the newly developed stacked structure and exhibited excellent electrical characteristics, including good carrier mobilities of 0.34 and 0.21 cm2 V‑1 sec‑1, and threshold voltages of nearly 0 V with low operating voltages. These printed organic CMOS D-flip flop circuits exhibit operating frequencies of 75 Hz and demonstrate great potential for flexible and printed electronics technology, particularly for wearable sensor applications with wireless connectivity.

  4. Fabrication of Ultra-Thin Printed Organic TFT CMOS Logic Circuits Optimized for Low-Voltage Wearable Sensor Applications.

    PubMed

    Takeda, Yasunori; Hayasaka, Kazuma; Shiwaku, Rei; Yokosawa, Koji; Shiba, Takeo; Mamada, Masashi; Kumaki, Daisuke; Fukuda, Kenjiro; Tokito, Shizuo

    2016-05-09

    Ultrathin electronic circuits that can be manufactured by using conventional printing technologies are key elements necessary to realize wearable health sensors and next-generation flexible electronic devices. Due to their low level of power consumption, complementary (CMOS) circuits using both types of semiconductors can be easily employed in wireless devices. Here, we describe ultrathin CMOS logic circuits, for which not only the source/drain electrodes but also the semiconductor layers were printed. Both p-type and n-type organic thin film transistor devices were employed in a D-flip flop circuit in the newly developed stacked structure and exhibited excellent electrical characteristics, including good carrier mobilities of 0.34 and 0.21 cm(2) V(-1) sec(-1), and threshold voltages of nearly 0 V with low operating voltages. These printed organic CMOS D-flip flop circuits exhibit operating frequencies of 75 Hz and demonstrate great potential for flexible and printed electronics technology, particularly for wearable sensor applications with wireless connectivity.

  5. Energy and Timing Measurement with Time-Based Detector Readout for PET Applications: Principle and Validation with Discrete Circuit Components.

    PubMed

    Sun, Xishan; Lan, Allan K; Bircher, Chad; Deng, Zhi; Liu, Yinong; Shao, Yiping

    2011-06-11

    A new signal processing method for PET application has been developed, with discrete circuit components to measure energy and timing of a gamma interaction based solely on digital timing processing without using an amplitude-to-digital convertor (ADC) or a constant fraction discriminator (CFD). A single channel discrete component time-based readout (TBR) circuit was implemented in a PC board. Initial circuit functionality and performance evaluations have been conducted. Accuracy and linearity of signal amplitude measurement were excellent, as measured with test pulses. The measured timing accuracy from test pulses reached to less than 300 ps, a value limited mainly by the timing jitter of the prototype electronics circuit. Both suitable energy and coincidence timing resolutions (~18% and ~1.0 ns) have been achieved with 3 × 3 × 20 mm(3) LYSO scintillator and photomultiplier tube-based detectors. With its relatively simple circuit and low cost, TBR is expected to be a suitable front-end signal readout electronics for compact PET or other radiation detectors requiring the reading of a large number of detector channels and demanding high performance for energy and timing measurement.

  6. Fabrication of Ultra-Thin Printed Organic TFT CMOS Logic Circuits Optimized for Low-Voltage Wearable Sensor Applications.

    PubMed

    Takeda, Yasunori; Hayasaka, Kazuma; Shiwaku, Rei; Yokosawa, Koji; Shiba, Takeo; Mamada, Masashi; Kumaki, Daisuke; Fukuda, Kenjiro; Tokito, Shizuo

    2016-01-01

    Ultrathin electronic circuits that can be manufactured by using conventional printing technologies are key elements necessary to realize wearable health sensors and next-generation flexible electronic devices. Due to their low level of power consumption, complementary (CMOS) circuits using both types of semiconductors can be easily employed in wireless devices. Here, we describe ultrathin CMOS logic circuits, for which not only the source/drain electrodes but also the semiconductor layers were printed. Both p-type and n-type organic thin film transistor devices were employed in a D-flip flop circuit in the newly developed stacked structure and exhibited excellent electrical characteristics, including good carrier mobilities of 0.34 and 0.21 cm(2) V(-1) sec(-1), and threshold voltages of nearly 0 V with low operating voltages. These printed organic CMOS D-flip flop circuits exhibit operating frequencies of 75 Hz and demonstrate great potential for flexible and printed electronics technology, particularly for wearable sensor applications with wireless connectivity. PMID:27157914

  7. Fabrication of Ultra-Thin Printed Organic TFT CMOS Logic Circuits Optimized for Low-Voltage Wearable Sensor Applications

    PubMed Central

    Takeda, Yasunori; Hayasaka, Kazuma; Shiwaku, Rei; Yokosawa, Koji; Shiba, Takeo; Mamada, Masashi; Kumaki, Daisuke; Fukuda, Kenjiro; Tokito, Shizuo

    2016-01-01

    Ultrathin electronic circuits that can be manufactured by using conventional printing technologies are key elements necessary to realize wearable health sensors and next-generation flexible electronic devices. Due to their low level of power consumption, complementary (CMOS) circuits using both types of semiconductors can be easily employed in wireless devices. Here, we describe ultrathin CMOS logic circuits, for which not only the source/drain electrodes but also the semiconductor layers were printed. Both p-type and n-type organic thin film transistor devices were employed in a D-flip flop circuit in the newly developed stacked structure and exhibited excellent electrical characteristics, including good carrier mobilities of 0.34 and 0.21 cm2 V−1 sec−1, and threshold voltages of nearly 0 V with low operating voltages. These printed organic CMOS D-flip flop circuits exhibit operating frequencies of 75 Hz and demonstrate great potential for flexible and printed electronics technology, particularly for wearable sensor applications with wireless connectivity. PMID:27157914

  8. Compact grating structure for application to filters and resonators in monolithic microwave integrated circuits

    NASA Astrophysics Data System (ADS)

    Wang, Te-Hui; Itoh, Tatsuo

    1987-12-01

    Possible high-Q circuits based on a low-loss crosstie-overlay slow-wave structure are proposed for monolithic microwave integrated circuits (MMICs). Various configurations and results for slow-wave factors are presented. This structure is used for construction of a frequency-selective reflector with a compact size. The effect of conductor loss is considered.

  9. Double-differential recording and AGC using microcontrolled variable gain ASIC.

    PubMed

    Rieger, Robert; Deng, Shin-Liang

    2013-01-01

    Low-power wearable recording of biopotentials requires acquisition front-ends with high common-mode rejection for interference suppression and adjustable gain to provide an optimum signal range to a cascading analogue-to-digital stage. A microcontroller operated double-differential (DD) recording setup and automatic gain control circuit (AGC) are discussed which reject common-mode interference and provide tunable gain, thus compensating for imbalance and variation in electrode interface impedance. Custom-designed variable gain amplifiers (ASIC) are used as part of the recording setup. The circuit gain and balance is set by the timing of microcontroller generated clock signals. Measured results are presented which confirm that improved common-mode rejection is achieved compared to a single differential amplifier in the presence of input network imbalance. Practical measured examples further validate gain control suitable for biopotential recording and power-line rejection for wearable ECG and EMG recording. The prototype front-end consumes 318 μW including amplifiers and microcontroller. PMID:22929480

  10. Design and application of planar inductor-capacitor resonant circuit remote query sensors

    NASA Astrophysics Data System (ADS)

    Ong, Keat Ghee

    The objective of this dissertation is to develop a new remote query sensor technology capable of monitoring different environmental parameters. The sensor presented here is an inductor-capacitor resonant circuit that can be remotely interrogated with a single or pair of antennas via inductance coupling between the sensor and antenna(s). This dissertation describes the operational principle of the sensor technology, mutual inductance coupling, and details a procedure for designing application-specific sensors. The LC sensor is shown to be capable of monitoring environmental parameters such as humidity and pressure, and capable of measuring the complex permittivity of adjacently located materials. The LC sensor has been used to monitor the curing of different epoxies, determine the salt concentration in a solution, and determine the complex permittivity of different live bacteria and yeast cultures. Inherent in the sensor operation is error due to the respective location and orientation between the sensor and antenna(s). Analytic, numerical, and experimental efforts have been used to quantify this error, establishing the operating limits of the technology. Finally this dissertation discusses the possibilities and problems of miniaturizing the sensor technology, and extending the sensor monitoring range as needed.

  11. Discussion of integrated circuit (IC), multichip module (MCM), and MEMS applications fabricated through MOSIS

    NASA Astrophysics Data System (ADS)

    Peltier, Jennifer; Hansford, Wes

    1997-11-01

    Since inception 16 years ago, the MOSIS Service at the Information Sciences Institute of the University of Southern California has processed over thirty thousand IC Designs. Three years ago, it added access to commercial MultiChip Module (MCM) fabrication through MIDAS. To the list of standard offerings, MOSIS now introduces back end processing of MOSIS custom VLSI circuits for both suspended structure and diaphragm style MEMS. MOSIS presents an array of high- end VLSI technologies from various domestic foundries' standard processes for prototype and small volume quantities. Thus designers can develop low-cost IC's, MCM's and MEMS with a one-stop-shopping commerce style service. MOSIS functions as a 'transparent' third party interface between design and fabrication. The service offers ease of use through supported standard cell libraries and design tools, and with Internet design submission.Sharing the costs of NRE, masks and fabrication provides a low cost environment for users. MOSIS handles the front-end foundry tasks of data preparation and mask fabricate with fixed domestic and international price lists. MOSIS utilizes volume production lines at AMI, HP, Orbit, Vitesse, and MicroModule Systems. This paper discusses what MOSIS offers to the VLSI deign community, various applications fabricated through the service, as well as a conceptual design that draws from the various technologies discussed.

  12. Discussion of integrated circuit (IC), multichip module (MCM), and MEMS applications fabricated through MOSIS

    NASA Astrophysics Data System (ADS)

    Peltier, Jennifer; Hansford, Wes

    1997-11-01

    Since inception 16 years ago, the MOSIS Service at the Information Sciences Institute of the University of Southern California has processed over thirty thousand (30 K) IC Designs. Three years ago, it added access to commercial multichip module (MCM) fabrication through MIDAS. To the list of standard offerings, MOSIS now introduces back end processing of MOSIS custom VLSI circuits for both suspended structure and diaphragm style MEMS. MOSIS presents an array of high-end VLSI technologies from various domestic foundries' standard processes for prototype and small volume quantities. Thus designers can develop low-cost ICs, MCMs and (now) MEMS with a one-stop-shopping electronic commerce style service. MOSIS functions as a 'transparent' third party interface between design and fabrication. The service offers ease of use through supported standard cell libraries and design tools, and with Internet design submission. Sharing the costs of NRE, masks and fabrication provides a low cost environment for users. MOSIS handles the front-end foundry tasks of data preparation and mask fabrication with fixed domestic and international price lists. MOSIS utilizes volume production lines at AMI, HP, Orbit, Vitesse, and MicroModule Systems (MMS). This paper discusses what MOSIS offers to the VLSI design community, various applications fabricated through the service, as well as a conceptual design that draws from the various technologies discussed.

  13. Si-based light emitter in an integrated photonic circuit for smart biosensor applications

    NASA Astrophysics Data System (ADS)

    Germer, S.; Cherkouk, C.; Rebohle, L.; Helm, M.; Skorupa, W.

    2013-05-01

    The motivation for integrated Silicon-based optoelectronics is the creation of low-cost photonics for mass-market applications. Especially, the growing demand for sensitive biochemical sensors in the environmental control or medicine leads to the development of integrated high resolution sensors. Here we present initial results in the integration and butt-coupling of a Si-based light emitting device (LED) [1-3] to a waveguide into a photonic circuit. Our first approach deals with the design, fabrication and characterization of the dielectric high contrast waveguide as an important component, beside the LED, for the development of a Si-based biodetection system. In this work we demonstrate design examples of Si3N4/SiO2-waveguides, which were calculated using MATLAB, the effective index method (EIM) and the finite element method (FEM), with a 0.45μm thick and 0.7μm wide core which shows a high confinement factor of ~74% and coupling efficiency of ~66% at 1.55μm, respectively. The fabrication was done by plasma enhanced chemical vapour deposition (PECVD), optical lithography and reactive ion etching (RIE). Additionally, we characterized the deposited layers via ellipsometry and the etched structures by scanning electron microscopy (SEM). The obtained results establish principles for Si-based LED butt-coupling to a powerful optical waveguide-based interconnect with effective light absorption and an adequate coupling efficiency.

  14. Development of the read-out ASIC for muon chambers

    NASA Astrophysics Data System (ADS)

    Atkin, E.; Bulbakov, I.; Gusev, A.; Malankin, E.; Normanov, D.; Sagdiev, I.; Shumikhin, V.; Shumkin, O.; Ivanov, P.; Vinogradov, S.; Voronin, A.; Samsonov, V.; Ivanov, V.

    2016-02-01

    A front-end prototype ASIC for muon chambers is presented. ASIC was designed and prototyped in the CMOS UMC MMRF 180 nm process via Europractice. The chip includes 8 analog processing channels, each consisting of a preamplifier, two shapers (fast and slow), differential comparator and an area efficient 6 bit SAR ADC with 1.2 mW power consumption at 50 Msps. The chip also includes the threshold DAC and digital serializer. The design has the following features: dynamic range of 100 fC, channel hit rate of 2 MHz, ENC of 1000 e- at 50 pF, power consumption of 10 mW per channel, 6 bit SAR ADC.

  15. Implementation of the Timepix ASIC in the Scalable Readout System

    NASA Astrophysics Data System (ADS)

    Lupberger, M.; Desch, K.; Kaminski, J.

    2016-09-01

    We report on the development of electronics hardware, FPGA firmware and software to provide a flexible multi-chip readout of the Timepix ASIC within the framework of the Scalable Readout System (SRS). The system features FPGA-based zero-suppression and the possibility to read out up to 4×8 chips with a single Front End Concentrator (FEC). By operating several FECs in parallel, in principle an arbitrary number of chips can be read out, exploiting the scaling features of SRS. Specifically, we tested the system with a setup consisting of 160 Timepix ASICs, operated as GridPix devices in a large TPC field cage in a 1 T magnetic field at a DESY test beam facility providing an electron beam of up to 6 GeV. We discuss the design choices, the dedicated hardware components, the FPGA firmware as well as the performance of the system in the test beam.

  16. Design and characterization of the ePix10k: a high dynamic range integrating pixel ASIC for LCLS detectors

    NASA Astrophysics Data System (ADS)

    Caragiulo, P.; Dragone, A.; Markovic, B.; Herbst, R.; Nishimura, K.; Reese, B.; Herrmann, S.; Hart, P.; Blaj, G.; Segal, J.; Tomada, A.; Hasi, J.; Carini, G.; Kenney, C.; Haller, G.

    2015-05-01

    ePix10k is a variant of a novel class of integrating pixel ASICs architectures optimized for the processing of signals in second generation LINAC Coherent Light Source (LCLS) X-Ray cameras. The ASIC is optimized for high dynamic range application requiring high spatial resolution and fast frame rates. ePix ASICs are based on a common platform composed of a random access analog matrix of pixel with global shutter, fast parallel column readout, and dedicated sigma-delta analog to digital converters per column. The ePix10k variant has 100um×100um pixels arranged in a 176×192 matrix, a resolution of 140e- r.m.s. and a signal range of 3.5pC (10k photons at 8keV). In its final version it will be able to sustain a frame rate of 2kHz. A first prototype has been fabricated and characterized. Performance in terms of noise, linearity, uniformity, cross-talk, together with preliminary measurements with bump bonded sensors are reported here.

  17. Ciliated neurons lining the central canal sense both fluid movement and pH through ASIC3.

    PubMed

    Jalalvand, Elham; Robertson, Brita; Wallén, Peter; Grillner, Sten

    2016-01-01

    Cerebrospinal fluid-contacting (CSF-c) cells are found in all vertebrates but their function has remained elusive. We recently identified one type of laterally projecting CSF-c cell in lamprey spinal cord with neuronal properties that expresses GABA and somatostatin. We show here that these CSF-c neurons respond to both mechanical stimulation and to lowered pH. These effects are most likely mediated by ASIC3-channels, since APETx2, a specific antagonist of ASIC3, blocks them both. Furthermore, lowering of pH as well as application of somatostatin will reduce the locomotor burst rate. The somatostatin receptor antagonist counteracts the effects of both a decrease in pH and of somatostatin. Lateral bending movement imposed on the spinal cord, as would occur during natural swimming, activates CSF-c neurons. Taken together, we show that CSF-c neurons act both as mechanoreceptors and as chemoreceptors through ASIC3 channels, and their action may protect against pH-changes resulting from excessive neuronal activity. PMID:26743691

  18. Ciliated neurons lining the central canal sense both fluid movement and pH through ASIC3

    PubMed Central

    Jalalvand, Elham; Robertson, Brita; Wallén, Peter; Grillner, Sten

    2016-01-01

    Cerebrospinal fluid-contacting (CSF-c) cells are found in all vertebrates but their function has remained elusive. We recently identified one type of laterally projecting CSF-c cell in lamprey spinal cord with neuronal properties that expresses GABA and somatostatin. We show here that these CSF-c neurons respond to both mechanical stimulation and to lowered pH. These effects are most likely mediated by ASIC3-channels, since APETx2, a specific antagonist of ASIC3, blocks them both. Furthermore, lowering of pH as well as application of somatostatin will reduce the locomotor burst rate. The somatostatin receptor antagonist counteracts the effects of both a decrease in pH and of somatostatin. Lateral bending movement imposed on the spinal cord, as would occur during natural swimming, activates CSF-c neurons. Taken together, we show that CSF-c neurons act both as mechanoreceptors and as chemoreceptors through ASIC3 channels, and their action may protect against pH-changes resulting from excessive neuronal activity. PMID:26743691

  19. Ultra-Low Loss Waveguides with Application to Photonic Integrated Circuits

    NASA Astrophysics Data System (ADS)

    Bauters, Jared F.

    The integration of photonic components using a planar platform promises advantages in cost, size, weight, and power consumption for optoelectronic systems. Yet, the typical propagation loss of 5-10 dB/m in a planar silica waveguide is nearly five orders-of-magnitude larger than that in low loss optical fibers. For some applications, the miniaturization of the photonic system and resulting smaller propagation lengths from integration are enough to overcome the increase in propagation loss. For other more demanding systems or applications, such as those requiring long optical time delays or high-quality-factor (Q factor) resonators, the high propagation loss can degrade system performance to a degree that trumps the potential advantages offered by integration. Thus, the reduction of planar waveguide propagation loss in a Si3-N4 based waveguide platform is a primary focus of this dissertation. The ultra-low loss stoichiometric Si3-N4 waveguide platform offers the additional advantages of fabrication process stability and repeatability. Yet, active devices such as lasers, amplifiers, and photodetectors have not been monolithically integrated with ultra-low loss waveguides due to the incompatibility of the active and ultra-low loss processing thermal budgets (ultra-low loss waveguides are annealed at temperatures exceeding 1000 °C in order to drive out impurities). So a platform that enables the integration of active devices with the ultra-low losses of the Si3- N4 waveguide platform is this dissertation's second focus. The work enables the future fabrication of sensor, gyroscope, true time delay, and low phase noise oscillator photonic integrated circuits.

  20. Digital-circuit analysis of short-gate tunnel FETs for low-voltage applications

    NASA Astrophysics Data System (ADS)

    Zhuge, Jing; Verhulst, Anne S.; Vandenberghe, William G.; Dehaene, Wim; Huang, Ru; Wang, Yangyuan; Groeseneken, Guido

    2011-08-01

    This paper investigates the potential of tunnel field-effect transistors (TFETs), with emphasis on short-gate TFETs, by simulation for low-power digital applications having a supply voltage lower than 0.5 V. A transient study shows that the tunneling current has a negligible contribution in charging and discharging the gate capacitance of TFETs. In spite of a higher resistance region in the short-gate TFET, the gate (dis)charging speed still meets low-voltage application requirements. A circuit analysis is performed on short-gate TFETs with different materials, such as Si, Ge and heterostructures in terms of voltage overshoot, delay, static power, energy consumption and energy delay product (EDP). These results are compared to MOSFET and full-gate TFET performance. It is concluded that short-gate heterostructure TFETs (Ge-source for nTFET, In0.6Ga0.4As-source for pTFET) are promising candidates to extend the supply voltage to lower than 0.5 V because they combine the advantage of a low Miller capacitance, due to the short-gate structures, and strong drive current in TFETs, due to the narrow bandgap material in the source. At a supply voltage of 0.4 V and for an EOT and channel length of 0.6 nm and 40 nm, respectively, a three-stage inverter chain based on short-gate heterostructure TFETs saves 40% energy consumption per cycle at the same delay and shows 60%-75% improvement of EDP at the same static power, compared to its full-gate counterpart. When compared to the MOSFET, better EDP can be achieved in the heterostructure TFET especially at low static power consumption.

  1. The Ion Channel ASIC2 is Required for Baroreceptor and Autonomic Control of the Circulation

    PubMed Central

    Lu, Yongjun; Ma, Xiuying; Sabharwal, Rasna; Snitsarev, Vladislav; Morgan, Donald; Rahmouni, Kamal; Drummond, Heather A.; Whiteis, Carol A.; Costa, Vivian; Price, Margaret; Benson, Christopher; Welsh, Michael J.; Chapleau, Mark W.; Abboud, François M.

    2009-01-01

    SUMMARY Arterial baroreceptors provide a neural sensory input that reflexly regulates the autonomic drive of the circulation. Our goal was to test the hypothesis that a member of the acid sensing ion channel (ASIC) subfamily of the DEG/ENaC superfamily is an important determinant of the arterial baroreceptor reflex. We found that aortic baroreceptor neurons in the nodose ganglia and their terminals express ASIC2. Conscious ASIC2 null mice developed hypertension, had exaggerated sympathetic and depressed parasympathetic control of the circulation, and a decreased gain of the baroreflex, all indicative of an impaired baroreceptor reflex. Multiple measures of baroreceptor activity each suggests that mechanosensitivity is diminished in ASIC2- null mice. The results define ASIC2 as an important determinant of autonomic circulatory control and of baroreceptor sensitivity. The genetic disruption of ASIC2 recapitulates the pathological dysautonomia seen in heart failure and hypertension and defines a molecular defect that may be relevant to its development. PMID:20064394

  2. The ion channel ASIC2 is required for baroreceptor and autonomic control of the circulation.

    PubMed

    Lu, Yongjun; Ma, Xiuying; Sabharwal, Rasna; Snitsarev, Vladislav; Morgan, Donald; Rahmouni, Kamal; Drummond, Heather A; Whiteis, Carol A; Costa, Vivian; Price, Margaret; Benson, Christopher; Welsh, Michael J; Chapleau, Mark W; Abboud, François M

    2009-12-24

    Arterial baroreceptors provide a neural sensory input that reflexly regulates the autonomic drive of circulation. Our goal was to test the hypothesis that a member of the acid-sensing ion channel (ASIC) subfamily of the DEG/ENaC superfamily is an important determinant of the arterial baroreceptor reflex. We found that aortic baroreceptor neurons in the nodose ganglia and their terminals express ASIC2. Conscious ASIC2 null mice developed hypertension, had exaggerated sympathetic and depressed parasympathetic control of the circulation, and a decreased gain of the baroreflex, all indicative of an impaired baroreceptor reflex. Multiple measures of baroreceptor activity each suggest that mechanosensitivity is diminished in ASIC2 null mice. The results define ASIC2 as an important determinant of autonomic circulatory control and of baroreceptor sensitivity. The genetic disruption of ASIC2 recapitulates the pathological dysautonomia seen in heart failure and hypertension and defines a molecular defect that may be relevant to its development. PMID:20064394

  3. PMGA and its application in area and power optimization for ternary FPRM circuit

    NASA Astrophysics Data System (ADS)

    Pengjun, Wang; Kangping, Li; Huihong, Zhang

    2016-01-01

    Based on the research of population migration algorithms (PMAs), a population migration genetic algorithm (PMGA) is proposed, combining a PMA with a genetic algorithm. A scheme of area and power optimization for a ternary FPRM circuit is proposed by using the PMGA. Firstly, according to the ternary FPRM logic function expression, area and power estimation models are established. Secondly, the PMGA is used to search for the best area and power polarity. Finally, 10 MCNC Benchmark circuits are used to verify the effectiveness of the proposed method. The results show that the ternary FPRM circuits optimized by the PMGA saved 13.33% area and 20.00% power on average than the corresponding FPRM circuits optimized by a whole annealing genetic algorithm. Project supported by the Natural Science Foundation of Zhejiang Province (No. LY13F040003), the National Natural Science Foundation of China (Nos. 61234002, 61306041), and the K. C. Wong Magna Fund in Ningbo University.

  4. Acid-sensing ion channel 2 (asic 2) and trkb interrelationships within the intervertebral disc

    PubMed Central

    Cuesta, Antonio; Viña, Eliseo; Cabo, Roberto; Vázquez, Gorka; Cobo, Ramón; García-Suárez, Olivia; García-Cosamalón, José; Vega, José A

    2015-01-01

    The cells of the intervertebral disc (IVD) have an unusual acidic and hyperosmotic microenvironment. They express acid-sensing ion channels (ASICs), gated by extracellular protons and mechanical forces, as well as neurotrophins and their signalling receptors. In the nervous tissues some neurotrophins regulate the expression of ASICs. The expression of ASIC2 and TrkB in human normal and degenerated IVD was assessed using quantitative-PCR, Western blot, and immunohistochemistry. Moreover, we investigated immunohistochemically the expression of ASIC2 in the IVD of TrkB-deficient mice. ASIC2 and TrkB mRNAs were found in normal human IVD and both increased significantly in degenerated IVD. ASIC2 and TrkB proteins were also found co-localized in a variable percentage of cells, being significantly higher in degenerated IVD than in controls. The murine IVD displayed ASIC2 immunoreactivity which was absent in the IVD of TrkB-deficient mice. Present results demonstrate the occurrence of ASIC2 and TrkB in the human IVD, and the increased expression of both in pathological IVD suggest their involvement in IVD degeneration. These data also suggest that TrkB-ligands might be involved in the regulation of ASIC2 expression, and therefore in mechanisms by which the IVD cells accommodate to low pH and hypertonicity. PMID:26617738

  5. Amiloride suppresses pilocarpine-induced seizures via ASICs other than NHE in rats

    PubMed Central

    Liang, Jing-Jing; Huang, Li-Fang; Chen, Xu-Ming; Pan, Song-Qing; Lu, Zu-Neng; Xiao, Zhe-Man

    2015-01-01

    Background and Purpose: Although recent studies have indicated that acid-sensing ion channels (ASICs) may play an important role in suppressing status epilepticus (SE) in rats, the precise mechanism is unclear. We attempted to investigate the antiepileptic effect of amiloride in SE rats and its mechanism. Methods: Rats with seizures induced by Li-pilocarpine were randomly divided into four groups, phosphate buffer saline (PBS) group, amiloride group, levetiracetam group and acidic liquid group, respectively. The electroencephalogram (EEG) of each group was recorded. Then rats treated with different drugs (2 h after amiloride or PBS injection or 1 h after PBS injection) and a normal control group was selected for reverse transcription-polymerase chain reaction (RT-PCR). The expression of ASIC1a, ASIC3 and sodium-hydrogen exchanger (NHE) in each group was detected. Results: Amiloride reduced the frequency of discharge in 60~90 min after injection significantly. In acidic liquid group, the epileptic discharge was increased in 0~30 min. Moreover, the expression of ASIC1a, ASIC3 and NHE was obviously increased in the SE groups. Compared with SE groups, the expression of ASIC1a and ASIC3 mRNA in amiloride group decreased significantly. While NHE mRNA expression in the SE groups showed no significant difference. Conclusion: Amiloride inhibited pilocarpine-induced SE and the anti-epileptic mechanism was associated with deactivation of the ASIC1a and ASIC3 instead of NHE in rats. PMID:26823770

  6. Systematic analysis of CMOS-micromachined inductors with application to mixer matching circuits

    NASA Astrophysics Data System (ADS)

    Wu, Jerry Chun-Li

    The growing demand for consumer voice and data communication systems and military communication applications has created a need for low-power, low-cost, high-performance radio-frequency (RF) front-end. To achieve this goal, bringing passive components, especially inductors, to silicon is imperative. On-chip passive components such as inductors and capacitors generally enhance the reliability and efficiency of silicon-integrated RF cells. They can provide circuit solutions with superior performance and contribute to a higher level of integration. With passive components on chip, there is a great opportunity to have transformers, filters, and matching networks on chip. However, inductors on silicon have a low quality factor (Q) due to both substrate and metal loss. This dissertation demonstrates the systematic analysis of inductors fabricated using standard complementary metal-oxide-semiconductor (CMOS) and micro-electro-mechanical (MEMS) system technologies. We report system-on-chip inductor modeling, simulation, and measurements of effective inductance and quality factors. In this analysis methodology, a number of systematic simulations are performed on regular and micromachined inductors with different parameters such as spiral topology, number of turns, outer diameter, thickness, and percentage of substrate removed by using micromachining technologies. Three different novel support structures of the micromachined spiral inductor are proposed, analyzed, and implemented for larger size suspended inductors. The sensitivity of the structure support and different degree of substrate etching by post-processing is illustrated. The results provide guidelines for the selection of inductor parameters, post-processing methodologies, and its spiral supports to meet the RF design specifications and the stability requirements for mobile communication. The proposed CMOS-micromachined inductor is used in a low cost-effective double-balanced Gilbert mixer with on-chip matching

  7. Measuring circuit

    DOEpatents

    Sun, Shan C.; Chaprnka, Anthony G.

    1977-01-11

    An automatic gain control circuit functions to adjust the magnitude of an input signal supplied to a measuring circuit to a level within the dynamic range of the measuring circuit while a log-ratio circuit adjusts the magnitude of the output signal from the measuring circuit to the level of the input signal and optimizes the signal-to-noise ratio performance of the measuring circuit.

  8. A new sea anemone peptide, APETx2, inhibits ASIC3, a major acid-sensitive channel in sensory neurons.

    PubMed

    Diochot, Sylvie; Baron, Anne; Rash, Lachlan D; Deval, Emmanuel; Escoubas, Pierre; Scarzello, Sabine; Salinas, Miguel; Lazdunski, Michel

    2004-04-01

    From a systematic screening of animal venoms, we isolated a new toxin (APETx2) from the sea anemone Anthopleura elegantissima, which inhibits ASIC3 homomeric channels and ASIC3-containing heteromeric channels both in heterologous expression systems and in primary cultures of rat sensory neurons. APETx2 is a 42 amino-acid peptide crosslinked by three disulfide bridges, with a structural organization similar to that of other sea anemone toxins that inhibit voltage-sensitive Na+ and K+ channels. APETx2 reversibly inhibits rat ASIC3 (IC50=63 nM), without any effect on ASIC1a, ASIC1b, and ASIC2a. APETx2 directly inhibits the ASIC3 channel by acting at its external side, and it does not modify the channel unitary conductance. APETx2 also inhibits heteromeric ASIC2b+3 current (IC50=117 nM), while it has less affinity for ASIC1b+3 (IC50=0.9 microM), ASIC1a+3 (IC50=2 microM), and no effect on the ASIC2a+3 current. The ASIC3-like current in primary cultured sensory neurons is partly and reversibly inhibited by APETx2 with an IC50 of 216 nM, probably due to the mixed inhibitions of various co-expressed ASIC3-containing channels. PMID:15044953

  9. Measuring user similarity using electric circuit analysis: application to collaborative filtering.

    PubMed

    Yang, Joonhyuk; Kim, Jinwook; Kim, Wonjoon; Kim, Young Hwan

    2012-01-01

    We propose a new technique of measuring user similarity in collaborative filtering using electric circuit analysis. Electric circuit analysis is used to measure the potential differences between nodes on an electric circuit. In this paper, by applying this method to transaction networks comprising users and items, i.e., user-item matrix, and by using the full information about the relationship structure of users in the perspective of item adoption, we overcome the limitations of one-to-one similarity calculation approach, such as the Pearson correlation, Tanimoto coefficient, and Hamming distance, in collaborative filtering. We found that electric circuit analysis can be successfully incorporated into recommender systems and has the potential to significantly enhance predictability, especially when combined with user-based collaborative filtering. We also propose four types of hybrid algorithms that combine the Pearson correlation method and electric circuit analysis. One of the algorithms exceeds the performance of the traditional collaborative filtering by 37.5% at most. This work opens new opportunities for interdisciplinary research between physics and computer science and the development of new recommendation systems.

  10. Measuring User Similarity Using Electric Circuit Analysis: Application to Collaborative Filtering

    PubMed Central

    Yang, Joonhyuk; Kim, Jinwook; Kim, Wonjoon; Kim, Young Hwan

    2012-01-01

    We propose a new technique of measuring user similarity in collaborative filtering using electric circuit analysis. Electric circuit analysis is used to measure the potential differences between nodes on an electric circuit. In this paper, by applying this method to transaction networks comprising users and items, i.e., user–item matrix, and by using the full information about the relationship structure of users in the perspective of item adoption, we overcome the limitations of one-to-one similarity calculation approach, such as the Pearson correlation, Tanimoto coefficient, and Hamming distance, in collaborative filtering. We found that electric circuit analysis can be successfully incorporated into recommender systems and has the potential to significantly enhance predictability, especially when combined with user-based collaborative filtering. We also propose four types of hybrid algorithms that combine the Pearson correlation method and electric circuit analysis. One of the algorithms exceeds the performance of the traditional collaborative filtering by 37.5% at most. This work opens new opportunities for interdisciplinary research between physics and computer science and the development of new recommendation systems PMID:23145095

  11. New Generation Power System for Space Applications

    NASA Technical Reports Server (NTRS)

    Jones, Loren; Carr, Greg; Deligiannis, Frank; Lam, Barbara; Nelson, Ron; Pantaleon, Jose; Ruiz, Ian; Treicler, John; Wester, Gene; Sauers, Jim; Giampoli, Paul; Haskell, Russ; Mulvey, Jim; Repp, John

    2004-01-01

    The Deep Space Avionics (DSA) Project is developing a new generation of power system building blocks. Using application specific integrated circuits (ASICs) and power switching modules a scalable power system can be constructed for use on multiple deep space missions including future missions to Mars, comets, Jupiter and its moons. The key developments of the DSA power system effort are five power ASICs and a mod ule for power switching. These components enable a modular and scalab le design approach, which can result in a wide variety of power syste m architectures to meet diverse mission requirements and environments . Each component is radiation hardened to one megarad) total dose. The power switching module can be used for power distribution to regular spacecraft loads, to propulsion valves and actuation of pyrotechnic devices. The number of switching elements per load, pyrotechnic firin gs and valve drivers can be scaled depending on mission needs. Teleme try data is available from the switch module via an I2C data bus. The DSA power system components enable power management and distribution for a variety of power buses and power system architectures employing different types of energy storage and power sources. This paper will describe each power ASIC#s key performance characteristics as well a s recent prototype test results. The power switching module test results will be discussed and will demonstrate its versatility as a multip urpose switch. Finally, the combination of these components will illu strate some of the possible power system architectures achievable fro m small single string systems to large fully redundant systems.

  12. Module failure isolation circuit for paralleled inverters. [preventing system failure during power conditioning for spacecraft applications

    NASA Technical Reports Server (NTRS)

    Nagano, S. (Inventor)

    1979-01-01

    A module failure isolation circuit is described which senses and averages the collector current of each paralled inverter power transistor and compares the collector current of each power transistor the average collector current of all power transistors to determine when the sensed collector current of a power transistor in any one inverter falls below a predetermined ratio of the average collector current. The module associated with any transistor that fails to maintain a current level above the predetermined radio of the average collector current is then shut off. A separate circuit detects when there is no load, or a light load, to inhibit operation of the isolation circuit during no load or light load conditions.

  13. Decomposition of unitary matrices for finding quantum circuits: application to molecular Hamiltonians.

    PubMed

    Daskin, Anmer; Kais, Sabre

    2011-04-14

    Constructing appropriate unitary matrix operators for new quantum algorithms and finding the minimum cost gate sequences for the implementation of these unitary operators is of fundamental importance in the field of quantum information and quantum computation. Evolution of quantum circuits faces two major challenges: complex and huge search space and the high costs of simulating quantum circuits on classical computers. Here, we use the group leaders optimization algorithm to decompose a given unitary matrix into a proper-minimum cost quantum gate sequence. We test the method on the known decompositions of Toffoli gate, the amplification step of the Grover search algorithm, the quantum Fourier transform, and the sender part of the quantum teleportation. Using this procedure, we present the circuit designs for the simulation of the unitary propagators of the Hamiltonians for the hydrogen and the water molecules. The approach is general and can be applied to generate the sequence of quantum gates for larger molecular systems. PMID:21495747

  14. Photonic Integrated Circuit (PIC) Device Structures: Background, Fabrication Ecosystem, Relevance to Space Systems Applications, and Discussion of Related Radiation Effects

    NASA Technical Reports Server (NTRS)

    Alt, Shannon

    2016-01-01

    Electronic integrated circuits are considered one of the most significant technological advances of the 20th century, with demonstrated impact in their ability to incorporate successively higher numbers transistors and construct electronic devices onto a single CMOS chip. Photonic integrated circuits (PICs) exist as the optical analog to integrated circuits; however, in place of transistors, PICs consist of numerous scaled optical components, including such "building-block" structures as waveguides, MMIs, lasers, and optical ring resonators. The ability to construct electronic and photonic components on a single microsystems platform offers transformative potential for the development of technologies in fields including communications, biomedical device development, autonomous navigation, and chemical and atmospheric sensing. Developing on-chip systems that provide new avenues for integration and replacement of bulk optical and electro-optic components also reduces size, weight, power and cost (SWaP-C) limitations, which are important in the selection of instrumentation for specific flight projects. The number of applications currently emerging for complex photonics systems-particularly in data communications-warrants additional investigations when considering reliability for space systems development. This Body of Knowledge document seeks to provide an overview of existing integrated photonics architectures; the current state of design, development, and fabrication ecosystems in the United States and Europe; and potential space applications, with emphasis given to associated radiation effects and reliability.

  15. The application of standardized control and interface circuits to three dc to dc power converters.

    NASA Technical Reports Server (NTRS)

    Yu, Y.; Biess, J. J.; Schoenfeld, A. D.; Lalli, V. R.

    1973-01-01

    Standardized control and interface circuits were applied to the three most commonly used dc to dc converters: the buck-boost converter, the series-switching buck regulator, and the pulse-modulated parallel inverter. The two-loop ASDTIC regulation control concept was implemented by using a common analog control signal processor and a novel digital control signal processor. This resulted in control circuit standardization and superior static and dynamic performance of the three dc-to-dc converters. Power components stress control, through active peak current limiting and recovery of switching losses, was applied to enhance reliability and converter efficiency.

  16. SEMICONDUCTOR INTEGRATED CIRCUITS: A high-performance, low-power σ Δ ADC for digital audio applications

    NASA Astrophysics Data System (ADS)

    Hao, Luo; Yan, Han; Cheung, Ray C. C.; Xiaoxia, Han; Shaoyu, Ma; Peng, Ying; Dazhong, Zhu

    2010-05-01

    A high-performance low-power σ Δ analog-to-digital converter (ADC) for digital audio applications is described. It consists of a 2-1 cascaded σ Δ modulator and a decimation filter. Various design optimizations are implemented in the system design, circuit implementation and layout design, including a high-overload-level coefficient-optimized modulator architecture, a power-efficient class A/AB operational transconductance amplifier, as well as a multi-stage decimation filter conserving area and power consumption. The ADC is implemented in the SMIC 0.18-μm CMOS mixed-signal process. The experimental chip achieves a peak signal-to-noise-plus-distortion ratio of 90 dB and a dynamic range of 94 dB over 22.05-kHz audio band and occupies 2.1 mm2, which dissipates only 2.1 mA quiescent current in the analog circuits.

  17. Scalable Sensor Data Processor: A Multi-Core Payload Data Processor ASIC

    NASA Astrophysics Data System (ADS)

    Berrojo, L.; Moreno, R.; Regada, R.; Garcia, E.; Trautner, R.; Rauwerda, G.; Sunesen, K.; He, Y.; Redant, S.; Thys, G.; Andersson, J.; Habinc, S.

    2015-09-01

    The Scalable Sensor Data Processor (SSDP) project, under ESA contract and with TAS-E as prime contractor, targets the development of a multi-core ASIC for payload data processing to be used, among other terrestrial and space application areas, in future scientific and exploration missions with harsh radiation environments. The SSDP is a mixed-signal heterogeneous multi-core System-on-Chip (SoC). It combines GPP and NoC-based DSP subsystems with on-chip ADCs and several standard space I/Fs to make a flexible, configurable and scalable device. The NoC comprises two state-of-the-art fixed point Xentium® DSP processors, providing the device with high data processing capabilities.

  18. VeloPix: the pixel ASIC for the LHCb upgrade

    NASA Astrophysics Data System (ADS)

    Poikela, T.; De Gaspari, M.; Plosila, J.; Westerlund, T.; Ballabriga, R.; Buytaert, J.; Campbell, M.; Llopart, X.; Wyllie, K.; Gromov, V.; van Beuzekom, M.; Zivkovic, V.

    2015-01-01

    The LHCb Vertex Detector (VELO) will be upgraded in 2018 along with the other subsystems of LHCb in order to enable full readout at 40 MHz, with the data fed directly to the software triggering algorithms. The upgraded VELO is a lightweight hybrid pixel detector operating in vacuum in close proximity to the LHC beams. The readout will be provided by a dedicated front-end ASIC, dubbed VeloPix, matched to the LHCb readout requirements and the 55 × 55 μm VELO pixel dimensions. The chip is closely related to the Timepix3, from the Medipix family of ASICs. The principal challenge that the chip has to meet is a hit rate of up to 900 Mhits/s, resulting in a required output bandwidth of more than 16 Gbit/s. The occupancy across the chip is also very non-uniform, and the radiation levels reach an integrated 400 Mrad over the lifetime of the detector.VeloPix is a binary pixel readout chip with a data driven readout, designed in 130 nm CMOS technology. The pixels are combined into groups of 2 × 4 super pixels, enabling a shared logic and a reduction of bandwidth due to combined address and time stamp information. The pixel hits are combined with other simultaneous hits in the same super pixel, time stamped, and immediately driven off-chip. The analog front-end must be sufficiently fast to accurately time stamp the data, with a small enough dead time to minimize data loss in the most occupied regions of the chip. The data is driven off chip with a custom designed high speed serialiser. The current status of the ASIC design, the chip architecture and the simulations will be described.

  19. Application of Input-State of the System Transformation for Linearization of Selected Electrical Circuits

    NASA Astrophysics Data System (ADS)

    Zawadzki, Andrzej; Różowicz, Sebastian

    2016-05-01

    The paper presents a transformation of nonlinear electric circuit into linear one through changing coordinates (local diffeomorphism) with the use of closed feedback loop. The necessary conditions that must be fulfilled by nonlinear system to enable carrying out linearizing procedures are presented. Numerical solutions of state equations for the nonlinear system and equivalent linearized system are included.

  20. Analysis of Wave Propagation in Stratified Structures Using Circuit Analogues, with Application to Electromagnetic Absorbers

    ERIC Educational Resources Information Center

    Sjoberg, Daniel

    2008-01-01

    This paper presents an overview of how circuit models can be used for analysing wave propagation in stratified structures. Relatively complex structures can be analysed using models which are accessible to undergraduate students. Homogeneous slabs are modelled as transmission lines, and thin sheets between the slabs are modelled as lumped…

  1. Performance of 2nd generation CALICE/EUDET ASICs

    NASA Astrophysics Data System (ADS)

    de La Taille, C.; CALICE Collaboration; EUDET Collaboration

    2011-04-01

    The paper reviews the performance of the three ASICs : HARDROC2, SPIROC2 and SKIROC2 developed to readout the ILC calorimeter prototypes. The chips integrate 36 to 64 channels of front-end, digitization and backend electronics in SiGe 0.35 μm technology. This second version was found mature enough to be produced in several hundreds to equip large scale technological prototypes and establish the feasibility of these highly granular "imaging" calorimeters as required for particle flow algorithms at the ILC. The low noise and low power sequential readout as well as power-pulsing operation at detector level and in magnetic field are proven.

  2. The Human Acid-Sensing Ion Channel ASIC1a: Evidence for a Homotetrameric Assembly State at the Cell Surface

    PubMed Central

    Gautschi, Ivan; Schild, Laurent

    2015-01-01

    The chicken acid-sensing ion channel ASIC1 has been crystallized as a homotrimer. We address here the oligomeric state of the functional ASIC1 in situ at the cell surface. The oligomeric states of functional ASIC1a and mutants with additional cysteines introduced in the extracellular pore vestibule were resolved on SDS-PAGE. The functional ASIC1 complexes were stabilized at the cell surface of Xenopus laevis oocytes or CHO cells either using the sulfhydryl crosslinker BMOE, or sodium tetrathionate (NaTT). Under these different crosslinking conditions ASIC1a migrates as four distinct oligomeric states that correspond by mass to multiples of a single ASIC1a subunit. The relative importance of each of the four ASIC1a oligomers was critically dependent on the availability of cysteines in the transmembrane domain for crosslinking, consistent with the presence of ASIC1a homo-oligomers. The expression of ASIC1a monomers, trimeric or tetrameric concatemeric cDNA constructs resulted in functional channels. The resulting ASIC1a complexes are resolved as a predominant tetramer over the other oligomeric forms, after stabilization with BMOE or NaTT and SDS-PAGE/western blot analysis. Our data identify a major ASIC1a homotetramer at the surface membrane of the cell expressing functional ASIC1a channel. PMID:26252376

  3. The TDCpix readout ASIC: A 75 ps resolution timing front-end for the NA62 Gigatracker hybrid pixel detector

    NASA Astrophysics Data System (ADS)

    Kluge, A.; Aglieri Rinella, G.; Bonacini, S.; Jarron, P.; Kaplon, J.; Morel, M.; Noy, M.; Perktold, L.; Poltorak, K.

    2013-12-01

    The TDCpix is a novel pixel readout ASIC for the NA62 Gigatracker detector. NA62 is a new experiment being installed at the CERN Super Proton Synchrotron. Its Gigatracker detector shall provide on-beam tracking and time stamping of individual particles with a time resolution of 150 ps rms. It will consist of three tracking stations, each with one hybrid pixel sensor. The peak flow of particles crossing the detector modules reaches 1.27 MHz/mm2 for a total rate of about 0.75 GHz. Ten TDCpix chips will be bump-bonded to every silicon pixel sensor. Each chip shall perform time stamping of 100 M particle hits per second with a detection efficiency above 99% and a timing accuracy better than 200 ps rms for an overall three-station-setup time resolution of better than 150 ps. The TDCpix chip has been designed in a 130 nm CMOS technology. It will feature 45×40 square pixels of 300×300 μm2 and a complex End of Column peripheral region including an array of TDCs based on DLLs, four high speed serializers, a low-jitter PLL, readout and control circuits. This contribution will describe the complete design of the final TDCpix ASIC. It will discuss design choices, the challenges faced and some of the lessons learned. Furthermore, experimental results from the testing of circuit prototypes will be presented. These demonstrate the achievement of key performance figures such as a time resolution of the processing chain of 75 ps rms with a laser sent to the center of the pixel and the capability of time stamping charged particles with an overall resolution below 200 ps rms.

  4. ASIC3 Contributes to the Blunted Muscle Metaboreflex in Heart Failure

    PubMed Central

    Xing, Jihong; Lu, Jian; Li, Jianhua

    2014-01-01

    Introduction During exercise, the sympathetic nervous system is activated and blood pressure and heart rate increase. In heart failure (HF), the muscle metaboreceptor contribution to sympathetic outflow is attenuated and the mechanoreceptor contribution is accentuated. Previous studies suggest that lactic acid stimulates acid sensing channel subtype 3 (ASIC3), inducing a neurally mediated pressor response. Thus, we hypothesized that the pressor response to ASIC3 stimulation is smaller in HF rats due to attenuation in expression and function of ASIC3 in sensory nerves. Methods Lactic acid was injected into the arterial blood supply of the hindlimb to stimulate ASIC3 in muscle afferent nerves and evoke the muscle metaboreceptor response in control rats and HF rats. Also, western blot analysis was employed to examine expression of ASIC3 in dorsal root ganglion (DRG) and patch clamp to examine current response with ASIC3 activation. Results Lactic acid (4 µmol/kg) increased mean arterial pressure by 28±5 mmHg in controls (n=6) but only by 16±3 mmHg (P<0.05 vs. control) in HF (n=8). In addition, HF decreased the protein levels of ASIC3 in DRG (optical density: 1.03±0.02 in control vs. 0.79±0.03 in HF, P<0.05; n=6 in each group). The peak current amplitude of dorsal DRG neuron in response to ASIC3 stimulation is smaller in HF rats than that in control rats. Conclusions Compared with controls, cardiovascular responses to lactic acid administered into the hindlimb muscles are blunted in HF rats owing to attenuated ASIC3. This suggests that ASIC3 plays a role in engagement in the attenuated metaboreceptor component of the exercise pressor reflex in HF. PMID:24983337

  5. Towards practical application of paper based printed circuits: capillarity effectively enhances conductivity of the thermoplastic electrically conductive adhesives.

    PubMed

    Wu, Haoyi; Chiang, Sum Wai; Lin, Wei; Yang, Cheng; Li, Zhuo; Liu, Jingping; Cui, Xiaoya; Kang, Feiyu; Wong, Ching Ping

    2014-09-03

    Direct printing nanoparticle-based conductive inks onto paper substrates has encountered difficulties e.g. the nanoparticles are prone to penetrate into the pores of the paper and become partially segmented, and the necessary low-temperature-sintering process is harmful to the dimension-stability of paper. Here we prototyped the paper-based circuit substrate in combination with printed thermoplastic electrically conductive adhesives (ECA), which takes the advantage of the capillarity of paper and thus both the conductivity and mechanical robustness of the printed circuits were drastically improved without sintering process. For instance, the electrical resistivity of the ECA specimen on a pulp paper (6 × 10(-5)Ω · cm, with 50 wt% loading of Ag) was only 14% of that on PET film than that on PET film. This improvement has been found directly related to the sizing degree of paper, in agreement with the effective medium approximation simulation results in this work. The thermoplastic nature also enables excellent mechanical strength of the printed ECA to resist repeated folding. Considering the generality of the process and the wide acceptance of ECA technique in the modern electronic packages, this method may find vast applications in e.g. circuit boards, capacitive touch pads, and radio frequency identification antennas, which have been prototyped in the manuscript.

  6. Implementation of nanoscale circuits using dual metal gate engineered nanowire MOSFET with high-k dielectrics for low power applications

    NASA Astrophysics Data System (ADS)

    Charles Pravin, J.; Nirmal, D.; Prajoon, P.; Ajayan, J.

    2016-09-01

    This work covers the impact of dual metal gate engineered Junctionless MOSFET with various high-k dielectric in Nanoscale circuits for low power applications. Due to gate engineering in junctionless MOSFET, graded potential is obtained and results in higher electron velocity of about 31% for HfO2 than SiO2 in the channel region, which in turn improves the carrier transport efficiency. The simulation is done using sentaurus TCAD, ON current, OFF current, ION/IOFF ratio, DIBL, gain, transconductance and transconductance generation factor parameters are analysed. When using HfO2, DIBL shows a reduction of 61.5% over SiO2. The transconductance and transconductance generation factor shows an improvement of 44% and 35% respectively. The gain and output resistance also shows considerable improvement with high-k dielectrics. Using this device, inverter circuit is implemented with different high-k dielectric material and delay have been decreased by 4% with HfO2 when compared to SiO2. In addition, a significant reduction in power dissipation of the inverter circuit is obtained with high-k dielectric Dual Metal Surround Gate Junctionless Transistor than SiO2 based device. From the analysis, it is found that HfO2 will be a better alternative for the future nanoscale device.

  7. Methods of fabricating applique circuits

    DOEpatents

    Dimos, Duane B.; Garino, Terry J.

    1999-09-14

    Applique circuits suitable for advanced packaging applications are introduced. These structures are particularly suited for the simple integration of large amounts (many nanoFarads) of capacitance into conventional integrated circuit and multichip packaging technology. In operation, applique circuits are bonded to the integrated circuit or other appropriate structure at the point where the capacitance is required, thereby minimizing the effects of parasitic coupling. An immediate application is to problems of noise reduction and control in modern high-frequency circuitry.

  8. Investigation on critical breakdown electric field of hot carbon dioxide for gas circuit breaker applications

    NASA Astrophysics Data System (ADS)

    Sun, Hao; Rong, Mingzhe; Wu, Yi; Chen, Zhexin; Yang, Fei; Murphy, Anthony B.; Zhang, Hantian

    2015-02-01

    Sulfur hexafluoride (SF6) gas is widely used in high-voltage circuit breakers, but due to its high global warming potential, substitutes are being sought. CO2 has been investigated as a candidate based on its arc interruption performance. The hot gas in the circuit breaker after current zero, with a complicated species composition caused by the dissociation and many other reactions, will lead to the electrical breakdown, which is one of the major concerns in assessing the arc interruption performance. Despite this, little research has been reported on the dielectric strength of hot CO2. In this paper, the dielectric properties of hot CO2 related to the dielectric recovery phase of the circuit breaker were investigated in the temperature range from 300 to 4000 K and in the pressure range from 0.01 to 1.0 MPa. Under the assumptions of local thermodynamic equilibrium (LTE) and local chemical equilibrium (LCE), the equilibrium compositions of hot CO2 were obtained based on Gibbs free energy minimization. The cross sections for interactions between electrons and the species are presented. The critical reduced electric field strength of CO2 was determined by balancing electron generation and loss. These were evaluated using the electron energy distribution function (EEDF) derived from the two-term Boltzmann transport equation. The result indicates that unlike SF6 or air, in hot CO2 the reduced critical electric field strength does not change monotonically with increasing heavy-particle temperature from 300 to 4000 K. CO2 has a superior dielectric strength to pure SF6 above 2500 K at 0.5 MPa, which means it has the potential to improve the interruption performance of the circuit breakers, while reducing the global warming effect. Good agreement was found with published experimental results and calculations for CO2 at room temperature, and with previous calculations for hot CO2.

  9. Preparation of graphite conductive paint and its application to the construction of RC circuits on paper

    NASA Astrophysics Data System (ADS)

    Grisales, C.; Herrera, N.; Fajardo, F.

    2016-09-01

    We describe a simple procedure for the preparation of graphite-based conductive paint and determine its basic transport properties when applied, comparing them to those of pencil strokes. Ohm’s law was fulfilled on the applied paint, which makes it an ideal strategy to teach the relations between a resistor’s length, width and resistance. The conductive paint was used in the construction of RC circuits on paper in a simple and didactic format. Using only the paint and a piece of cardboard, a completely functional parallel plate capacitor can be constructed with different plate geometries; in particular, we painted circular and rectangular plates. The charge and discharge cycles of the two RC circuits painted were observed in the oscilloscope. We obtained characteristic times and estimated the value of the dielectric constant of paper, which serves as a dielectric between the plates of the capacitors. We found conductive paint to be a useful and easy method to teach basic electricity and circuit concepts in fundamental courses and lab practices because it allows one to visualise properties such as the dependence of resistance and capacitance with geometric factors using a specific material.

  10. Clinical application of circuit training for subacute stroke patients: a preliminary study.

    PubMed

    Kim, Sun Mi; Han, Eun Young; Kim, Bo Ryun; Hyun, Chul Woong

    2016-01-01

    [Purpose] To investigate how task-oriented circuit training for the recovery motor control of the lower-extremity, balance and walking endurance could be clinically applied to subacute stroke inpatient group therapy. [Subjects and Methods] Twenty subacute stroke patients were randomly assigned to the intervention group (n=10) or the control group (n=10). The intervention consisted of a structured, progressive, inpatient circuit training program focused on mobility and gait training as well as physical fitness training that was performed for 90 minutes, 5 days a week for 4 weeks. The control group received individual physiotherapy of neurodevelopmental treatment for 60 minutes, 5 days a week for 4 weeks. Outcome measures were lower-extremity motor control, balance, gait endurance and activities of daily living before and after 4 weeks. [Results] There were no significant differences at baseline between the two groups. After 4 weeks, both groups showed significant improvements in all outcome measures, but there were no significant differences between the two groups during the invention period. [Conclusion] In spite of the small sample size, these findings suggest that task-oriented circuit training might be used as a cost-effective and alternative method of individual physiotherapy for the motor recovery of lower-extremity, balance and walking endurance of subacute stroke patients.

  11. Clinical application of circuit training for subacute stroke patients: a preliminary study

    PubMed Central

    Kim, Sun Mi; Han, Eun Young; Kim, Bo Ryun; Hyun, Chul Woong

    2016-01-01

    [Purpose] To investigate how task-oriented circuit training for the recovery motor control of the lower-extremity, balance and walking endurance could be clinically applied to subacute stroke inpatient group therapy. [Subjects and Methods] Twenty subacute stroke patients were randomly assigned to the intervention group (n=10) or the control group (n=10). The intervention consisted of a structured, progressive, inpatient circuit training program focused on mobility and gait training as well as physical fitness training that was performed for 90 minutes, 5 days a week for 4 weeks. The control group received individual physiotherapy of neurodevelopmental treatment for 60 minutes, 5 days a week for 4 weeks. Outcome measures were lower-extremity motor control, balance, gait endurance and activities of daily living before and after 4 weeks. [Results] There were no significant differences at baseline between the two groups. After 4 weeks, both groups showed significant improvements in all outcome measures, but there were no significant differences between the two groups during the invention period. [Conclusion] In spite of the small sample size, these findings suggest that task-oriented circuit training might be used as a cost-effective and alternative method of individual physiotherapy for the motor recovery of lower-extremity, balance and walking endurance of subacute stroke patients. PMID:26957751

  12. Characterization of bandgap reference circuits designed for high energy physics applications

    NASA Astrophysics Data System (ADS)

    Traversi, G.; De Canio, F.; Gaioni, L.; Manghisoni, M.; Mattiazzo, S.; Ratti, L.; Re, V.; Riceputi, E.

    2016-07-01

    The objective of this work is to design a high performance bandgap voltage reference circuit in a standard commercial 65 nm CMOS technology capable of operating in harsh radiation environments. A prototype circuit based on three different devices (diode, bipolar transistor and MOSFET) was fabricated and tested. Measurement results show a temperature variation as low as ±3.4 mV over a temperature range of 170 ° C (-30 °C to 140 °C) and a line regulation at room temperature of 5.2%/V. Measured VREF is 690 mV±15 mV (3σ) for 26 samples on the same wafer. Circuits correctly operate with supply voltages in the range from 1.32 V down to 0.78 V. A reference voltage shift of only 7.6 mV (around 1.1%) was measured after irradiation with 10 keV X-rays up to an integrated dose of 225 Mrad (SiO2).

  13. Application of the leak-before-break concept to the primary circuit piping of the Leningrad NPP

    SciTech Connect

    Eperin, A.P.; Zakharzhevsky, Yu.O.; Arzhaev, A.I.

    1997-04-01

    A two-year Finnish-Russian cooperation program has been initiated in 1995 to demonstrate the applicability of the leak-before-break concept (LBB) to the primary circuit piping of the Leningrad NPP. The program includes J-R curve testing of authentic pipe materials at full operating temperature, screening and computational LBB analyses complying with the USNRC Standard Review Plan 3.6.3, and exchange of LBB-related information with emphasis on NDE. Domestic computer codes are mainly used, and all tests and analyses are independently carried out by each party. The results are believed to apply generally to RBMK type plants of the first generation.

  14. ChromAIX: a high-rate energy-resolving photon-counting ASIC for spectal computed tomography

    NASA Astrophysics Data System (ADS)

    Steadman, Roger; Herrmann, Christoph; Mülhens, Oliver; Maeding, Dale G.; Colley, James; Firlit, Ted; Luhta, Randy; Chappo, Marc; Harwood, Brian; Kosty, Doug

    2010-04-01

    In Computed Tomography applications a major opportunity has been identified in the exploitation of the spectral information inherently available due to the polychromatic emission of the X-ray tube. Current CT technology based on indirect-conversion and integrating-mode detection can be used to some extent to distinguish the two predominant physical causes of energy-dependent attenuation (photo-electric effect and Compton effect) by using dual-energy techniques, e.g. kVp switching, dual-source or detector stacking. Further improvements can be achieved by transitioning to direct-conversion technologies and counting-mode detection, which inherently exhibits a better signal-to-noise ratio. Further including energy discrimination, enables new applications, which are not feasible with dual-energy techniques, e.g. the possibility to discriminate K-edge features (contrast agents, e.g. Gadolinium) from the other contributions to the x-ray attenuation of a human body. The capability of providing energy-resolved information with more than two different measurements is referred to as Spectral CT. To study the feasibility of Spectral CT, an energy-resolving proprietary photon counting ASIC (ChromAIX) has been designed to provide high count-rate capabilities while offering energy discrimination. The ChromAIX ASIC consists of an arrangement of 4 by 16 pixels with an isotropic pitch of 300 μm. Each pixel contains a number of independent energy discriminators with their corresponding 12-bit counters with continuous read-out capability. Observed Poissonian count-rates exceeding 10 Mcps (corresponding to approximately 27 Mcps incident mean Poisson rate) have been experimentally validated through electrical characterization. The measured noise of 2.6 mVRMS (4 keV FWHM) adheres to specifications. The ChromAIX ASIC has been specifically designed to support direct-converting materials CdZnTe and CdTe.

  15. Tissue acidosis induces neuronal necroptosis via ASIC1a channel independent of its ionic conduction

    PubMed Central

    Wang, Yi-Zhi; Wang, Jing-Jing; Huang, Yu; Liu, Fan; Zeng, Wei-Zheng; Li, Ying; Xiong, Zhi-Gang; Zhu, Michael X; Xu, Tian-Le

    2015-01-01

    Acidotoxicity is common among neurological disorders, such as ischemic stroke. Traditionally, Ca2+ influx via homomeric acid-sensing ion channel 1a (ASIC1a) was considered to be the leading cause of ischemic acidotoxicity. Here we show that extracellular protons trigger a novel form of neuronal necroptosis via ASIC1a, but independent of its ion-conducting function. We identified serine/threonine kinase receptor interaction protein 1 (RIP1) as a critical component of this form of neuronal necroptosis. Acid stimulation recruits RIP1 to the ASIC1a C-terminus, causing RIP1 phosphorylation and subsequent neuronal death. In a mouse model of focal ischemia, middle cerebral artery occlusion causes ASIC1a-RIP1 association and RIP1 phosphorylation in affected brain areas. Deletion of the Asic1a gene significantly prevents RIP1 phosphorylation and brain damage, suggesting ASIC1a-mediated RIP1 activation has an important role in ischemic neuronal injury. Our findings indicate that extracellular protons function as a novel endogenous ligand that triggers neuronal necroptosis during ischemia via ASIC1a independent of its channel function. DOI: http://dx.doi.org/10.7554/eLife.05682.001 PMID:26523449

  16. The application of a polypyrrole precoat for the metallization of printed circuit boards

    SciTech Connect

    Gottesfeld, S.; Uribe, F.A.; Armes, P. )

    1992-01-01

    This paper describes a printed circuit board metallization process starting with the formation of a percent of polypyrrole (PPY) on the board, followed by the direct electrodeposition of copper onto the polypyrrole-coated substrate. The polypyrrole film is applied to the insulating substrate by a single chemical polymerization step from an aqueous solution. The sheet resistance of the polypyrrole precoat is typically of the order of a few hundred {Omega}/{open square} which is a sufficiently low resistance to enable direct metal electrodeposition onto the PPY-coated substrate.

  17. A novel boost circuit design and in situ electricity application for elemental sulfur recovery

    NASA Astrophysics Data System (ADS)

    Liu, Jia; Feng, Yujie; He, Weihua; Gong, Yuanyuan; Qu, Youpeng; Ren, Nanqi

    2014-02-01

    A novel system containing a microbial electrochemical system (MES) for electricity generation and sulfate conversion, a novel boost circuit (NBC) for in situ utilization of the electrical energy and an electrochemical deposition cell (ECD) to recover sulfur in water is designed and established. This combined system has a higher energy utilization efficiency of 63.6% than that of conventional sulfate reduction reactors with an elemental sulfur recovery efficiency up to 46.5 ± 1.5% without net energy input. This system offers a promising, and cost-effective approach for sulfate wastewater treatment.

  18. Direct visualization of the trimeric structure of the ASIC1a channel, using AFM imaging

    SciTech Connect

    Carnally, Stewart M.; Dev, Harveer S.; Stewart, Andrew P.; Barrera, Nelson P.; Van Bemmelen, Miguel X.; Schild, Laurent; Henderson, Robert M.; Edwardson, J.Michael

    2008-08-08

    There has been confusion about the subunit stoichiometry of the degenerin family of ion channels. Recently, a crystal structure of acid-sensing ion channel (ASIC) 1a revealed that it assembles as a trimer. Here, we used atomic force microscopy (AFM) to image unprocessed ASIC1a bound to mica. We detected a mixture of subunit monomers, dimers and trimers. In some cases, triple-subunit clusters were clearly visible, confirming the trimeric structure of the channel, and indicating that the trimer sometimes disaggregated after adhesion to the mica surface. This AFM-based technique will now enable us to determine the subunit arrangement within heteromeric ASICs.

  19. ADDER CIRCUIT

    DOEpatents

    Jacobsohn, D.H.; Merrill, L.C.

    1959-01-20

    An improved parallel addition unit is described which is especially adapted for use in electronic digital computers and characterized by propagation of the carry signal through each of a plurality of denominationally ordered stages within a minimum time interval. In its broadest aspects, the invention incorporates a fast multistage parallel digital adder including a plurality of adder circuits, carry-propagation circuit means in all but the most significant digit stage, means for conditioning each carry-propagation circuit during the time period in which information is placed into the adder circuits, and means coupling carry-generation portions of thc adder circuit to the carry propagating means.

  20. Investigation of measurement distortion and application of finite element modeling to magnetic material characterization in a closed-circuit

    NASA Astrophysics Data System (ADS)

    Pugh, Barry Kevin

    becomes statistically significant at the t-test risk level of alpha = 0.05 significance level at approximately a 14° gap. The successful use of FEM in determining the closed circuit corrective methodology has led to the identification of the potential for a similar open circuit application. The calculation of the demagnetizing factor, N, required for open circuit measurements is a difficult exercise and, in the past, could only be precisely calculated for an ellipsoidal sample. For other regular geometries N was determined experimentally or calculated using certain assumptions. Either method introduces errors. This application used FEM to calculate the spherical demagnetizing factor of a magnetic sphere within a long solenoid. The FEM results indicated a demagnetizing factor N = 0.333 in all three axis. This result is in agreement with widely published and accepted results for such an arrangement. The hysteresis distortion complicates identifying and developing new magnetic materials. Only a comprehensive understanding of the phenomenon can help to establish effective correction methods, which is important for infrastructure enhancement in scientific research and for development of advanced modern technology to accurately characterize new magnetic materials.

  1. Experimental determination of circuit equations

    NASA Astrophysics Data System (ADS)

    Shulman, Jason; Malatino, Frank; Widjaja, Matthew; Gunaratne, Gemunu H.

    2015-01-01

    Kirchhoff's laws offer a general, straightforward approach to circuit analysis. Unfortunately, their application becomes impractical for all but the simplest of circuits. This work presents an alternative procedure, based on an approach developed to analyze complex networks, thus making it appropriate for use on large, complicated circuits. The procedure is unusual in that it is not an analytic method but is based on experiment. Yet, this approach produces the same circuit equations obtained by more traditional means.

  2. Effect of polymer aggregation on the open circuit voltage in organic photovoltaic cells: aggregation-induced conjugated polymer gel and its application for preventing open circuit voltage drop.

    PubMed

    Kim, Bong-Gi; Jeong, Eun Jeong; Park, Hui Joon; Bilby, David; Guo, L Jay; Kim, Jinsang

    2011-03-01

    To investigate the structure-dependent aggregation behavior of conjugated polymers and the effect of aggregation on the device performance of conjugated polymer photovoltaic cells, new conjugated polymers (PVTT and CN-PVTT) having the same regioregularity but different intermolecular packing were prepared and characterized by means of UV-vis spectroscopy and atomic force microscopy (AFM). Photovoltaic devices were prepared with these polymers under different polymer-aggregate conditions. Polymer aggregation induced by thermal annealing increases the short circuit current but provides no advantage in the overall power conversion efficiency because of a decrease in the open circuit voltage. The device fabricated from a pre-aggregated polymer suspension, acquired from ultrasonic agitation of a conjugated polymer gel, showed enhanced performance because of better phase separation and reduced recombination between polymer/PCBM.

  3. The universal fuzzy logical framework of neural circuits and its application in modeling primary visual cortex.

    PubMed

    Hu, Hong; Li, Su; Wang, YunJiu; Qi, XiangLin; Shi, ZhongZhi

    2008-10-01

    Analytical study of large-scale nonlinear neural circuits is a difficult task. Here we analyze the function of neural systems by probing the fuzzy logical framework of the neural cells' dynamical equations. Although there is a close relation between the theories of fuzzy logical systems and neural systems and many papers investigate this subject, most investigations focus on finding new functions of neural systems by hybridizing fuzzy logical and neural system. In this paper, the fuzzy logical framework of neural cells is used to understand the nonlinear dynamic attributes of a common neural system by abstracting the fuzzy logical framework of a neural cell. Our analysis enables the educated design of network models for classes of computation. As an example, a recurrent network model of the primary visual cortex has been built and tested using this approach.

  4. Application of printed circuit board technology to FT-ICR MS analyzer cell construction and prototyping.

    PubMed

    Leach, Franklin E; Norheim, Randolph; Anderson, Gordon; Pasa-Tolic, Ljiljana

    2014-12-01

    Although Fourier transform ion cyclotron resonance mass spectrometry (FT-ICR MS) remains the mass spectrometry platform that provides the highest levels of performance for mass accuracy and resolving power, there is room for improvement in analyzer cell design as the ideal quadrupolar trapping potential has yet to be generated for a broadband MS experiment. To this end, analyzer cell designs have improved since the field's inception, yet few research groups participate in this area because of the high cost of instrumentation efforts. As a step towards reducing this barrier to participation and allowing for more designs to be physically tested, we introduce a method of FT-ICR analyzer cell prototyping utilizing printed circuit boards at modest vacuum conditions. This method allows for inexpensive devices to be readily fabricated and tested over short intervals and should open the field to laboratories lacking or unable to access high performance machine shop facilities because of the required financial investment.

  5. Application of Printed Circuit Board Technology to FT-ICR MS Analyzer Cell Construction and Prototyping

    SciTech Connect

    Leach, Franklin E.; Norheim, Randolph V.; Anderson, Gordon A.; Pasa-Tolic, Ljiljana

    2014-12-01

    Although Fourier transform ion cyclotron resonance mass spectrometry (FT-ICRMS) remains themass spectrometry platform that provides the highest levels of performance for mass accuracy and resolving power, there is room for improvement in analyzer cell design as the ideal quadrupolar trapping potential has yet to be generated for a broadband MS experiment. To this end, analyzer cell designs have improved since the field’s inception, yet few research groups participate in this area because of the high cost of instrumentation efforts. As a step towards reducing this barrier to participation and allowing for more designs to be physically tested, we introduce a method of FT-ICR analyzer cell prototyping utilizing printed circuit boards at modest vacuum conditions. This method allows for inexpensive devices to be readily fabricated and tested over short intervals and should open the field to laboratories lacking or unable to access high performance machine shop facilities because of the required financial investment.

  6. New Breakdown Electric Field Calculation for SF6 High Voltage Circuit Breaker Applications

    NASA Astrophysics Data System (ADS)

    Robin-Jouan, Ph.; Yousfi, M.

    2007-12-01

    The critical electric fields of hot SF6 are calculated including both electron and ion kinetics in wide ranges of temperature and pressure, namely from 300 K up to 4000 K and 2 atmospheres up to 32 atmospheres respectively. Based on solving a multi-term electron Boltzmann equation the calculations use improved electron-gas collision cross sections for twelve SF6 dissociation products with a particular emphasis on the electron-vibrating molecule interactions. The ion kinetics is also considered and its role on the critical field becomes non negligible as the temperature is above 2000 K. These critical fields are then used in hydrodynamics simulations which correctly predict the circuit breaker behaviours observed in the case of breaking tests.

  7. A technique for evaluating the application of the pin-level stuck-at fault model to VLSI circuits

    NASA Technical Reports Server (NTRS)

    Palumbo, Daniel L.; Finelli, George B.

    1987-01-01

    Accurate fault models are required to conduct the experiments defined in validation methodologies for highly reliable fault-tolerant computers (e.g., computers with a probability of failure of 10 to the -9 for a 10-hour mission). Described is a technique by which a researcher can evaluate the capability of the pin-level stuck-at fault model to simulate true error behavior symptoms in very large scale integrated (VLSI) digital circuits. The technique is based on a statistical comparison of the error behavior resulting from faults applied at the pin-level of and internal to a VLSI circuit. As an example of an application of the technique, the error behavior of a microprocessor simulation subjected to internal stuck-at faults is compared with the error behavior which results from pin-level stuck-at faults. The error behavior is characterized by the time between errors and the duration of errors. Based on this example data, the pin-level stuck-at fault model is found to deliver less than ideal performance. However, with respect to the class of faults which cause a system crash, the pin-level, stuck-at fault model is found to provide a good modeling capability.

  8. Towards Practical Application of Paper based Printed Circuits: Capillarity Effectively Enhances Conductivity of the Thermoplastic Electrically Conductive Adhesives

    PubMed Central

    Wu, Haoyi; Chiang, Sum Wai; Lin, Wei; Yang, Cheng; Li, Zhuo; Liu, Jingping; Cui, Xiaoya; Kang, Feiyu; Wong, Ching Ping

    2014-01-01

    Direct printing nanoparticle-based conductive inks onto paper substrates has encountered difficulties e.g. the nanoparticles are prone to penetrate into the pores of the paper and become partially segmented, and the necessary low-temperature-sintering process is harmful to the dimension-stability of paper. Here we prototyped the paper-based circuit substrate in combination with printed thermoplastic electrically conductive adhesives (ECA), which takes the advantage of the capillarity of paper and thus both the conductivity and mechanical robustness of the printed circuitsweredrastically improved without sintering process. For instance, the electrical resistivity of the ECA specimen on a pulp paper (6 × 10−5Ω·cm, with 50 wt% loading of Ag) was only 14% of that on PET film than that on PET film. This improvement has been found directly related to the sizing degree of paper, in agreement with the effective medium approximation simulation results in this work. The thermoplastic nature also enables excellent mechanical strength of the printed ECA to resist repeated folding. Considering the generality of the process and the wide acceptance of ECA technique in the modern electronic packages, this method may find vast applications in e.g. circuit boards, capacitive touch pads, and radio frequency identification antennas, which have been prototyped in the manuscript. PMID:25182052

  9. Programmable Differential Delay Circuit With Fine Delay Adjustment

    DOEpatents

    DeRyckere, John F.; Jenkins, Philip Nord; Cornett, Frank Nolan

    2002-07-09

    Circuitry that provides additional delay to early arriving signals such that all data signals arrive at a receiving latch with same path delay. The delay of a forwarded clock reference is also controlled such that the capturing clock edge will be optimally positioned near quadrature (depending on latch setup/hold requirements). The circuitry continuously adapts to data and clock path delay changes and digital filtering of phase measurements reduce errors brought on by jittering data edges. The circuitry utilizes only the minimum amount of delay necessary to achieve objective thereby limiting any unintended jitter. Particularly, this programmable differential delay circuit with fine delay adjustment is designed to allow the skew between ASICS to be minimized. This includes skew between data bits, between data bits and clocks as well as minimizing the overall skew in a channel between ASICS.

  10. ASIC2 is present in human mechanosensory neurons of the dorsal root ganglia and in mechanoreceptors of the glabrous skin.

    PubMed

    Cabo, R; Alonso, P; Viña, E; Vázquez, G; Gago, A; Feito, J; Pérez-Moltó, F J; García-Suárez, O; Vega, J A

    2015-03-01

    Mechanosensory neurons lead to the central nervous system touch, vibration and pressure sensation. They project to the periphery and form different kinds of mechanoreceptors. The manner in which they sense mechanical signals is still not fully understood, but electrophysiological experiments have suggested that this may occur through the activation of ion channels that gate in response to mechanical stimuli. The acid-sensing ion channels (ASICs), especially ASIC2, may function as mechanosensors or are required for mechanosensation, and they are expressed in both mechanosensory neurons and mechanoreceptors. Here, we have used double immunohistochemistry for ASIC2 together with neuronal and glial markers associated with laser confocal microscopy and image analysis, to investigate the distribution of ASIC2 in human lumbar dorsal root ganglia, as well as in mechanoreceptors of the hand and foot glabrous skin. In lumbar dorsal root ganglia, ASIC2 immunoreactive neurons were almost all intermediate or large sized (mean diameter ≥20-70 µm), and no ASIC2 was detected in the satellite glial. ASIC2-positive axons were observed in Merkel cell-neurite complexes, Meissner and Pacinian corpuscles, all of them regarded as low-threshold mechanoreceptors. Moreover, a variable percent of Meissner (8 %) and Pacinian corpuscles (27 %) also displayed ASIC2 immunoreactivity in the Schwann-related cells. These results demonstrate the distribution of ASIC2 in the human cutaneous mechanosensory system and suggest the involvement of ASIC2 in mechanosensation.

  11. Tailored benzoxazines as novel resin systems for printed circuit boards in high temperature e-mobility applications

    SciTech Connect

    Troeger, K. Darka, R. Khanpour Neumeyer, T. Altstaedt, V.

    2014-05-15

    This study focuses on the development of Bisphenol-F-benzoxazine resins blended with different ratios of a trifunctional epoxy resin suitable as matrix for substrates for high temperature printed circuit board (HT-PCB) applications. With the benzoxazine blends glass transition temperatures of more than 190 °C could be achieved in combination with a coefficient of thermal expansion in thickness direction (z-CTE) of less than 60 ppm/K without adding any fillers. This shows the high potential of the benzoxazine-epoxy blend systems as substrate materials for HT-PCBs. To understand the thermal behavior of the different formulations, the apparent crosslink density was calculated based on data from Dynamic Mechanical Analysis. Laminates in laboratory scale were prepared and characterized to demonstrate the transformation of the neat resin properties into real electronic substrate properties. The produced laminates exhibit a z-CTE below 40 ppm/K.

  12. CAD-II: the second version current-mode readout ASIC for high-resolution timing measurements

    NASA Astrophysics Data System (ADS)

    Yuan, Z. X.; Deng, Z.; Wang, Y.; Liu, Y. N.

    2016-07-01

    This paper presents the second version of a fully current-mode front-end ASIC, CAD (Current Amplifier and Discriminator), for MRPC detectors for TOF applications. Several upgrades have been made in this new version, including: 1). Using differential input stages with input impedance down to 30 Ω and LVDS compatible outputs; 2). Much higher current gain and bandwidth of 4.5 A/A and 380 MHz 3). Fabricated in 0.18 μ m CMOS process instead of 0.35 μ m CMOS technology used in CAD-I. The detailed design of the ASIC will be described as well as the measurement results. The single-ended input impedance could be as low as 32 Ω and the power consumption was measured to be 15 mW per channel. Input referred RMS noise current was about 0.56 μ A. The threshold could be set as low as 4.5 μ A referred to input, corresponding to 9 fC for the typical MRPC detector signal with 2 ns width. Sub-10 ps resolution has been measured for input signal above 200 μ A.

  13. Application of glass-nonmetals of waste printed circuit boards to produce phenolic moulding compound.

    PubMed

    Guo, Jie; Rao, Qunli; Xu, Zhenming

    2008-05-01

    The aim of this study was to investigate the feasibility of using glass-nonmetals, a byproduct of recycling waste printed circuit boards (PCBs), to replace wood flour in production of phenolic moulding compound (PMC). Glass-nonmetals were attained by two-step crushing and corona electrostatic separating processes. Glass-nonmetals with particle size shorter than 0.07 mm were in the form of single fibers and resin powder, with the biggest portion (up to 34.6 wt%). Properties of PMC with glass-nonmetals (PMCGN) were compared with reference PMC and the national standard of PMC (PF2C3). When the adding content of glass-nonmetals was 40 wt%, PMCGN exhibited flexural strength of 82 MPa, notched impact strength of 2.4 kJ/m(2), heat deflection temperature of 175 degrees C, and dielectric strength of 4.8 MV/m, all of which met the national standard. Scanning electron microscopy (SEM) showed strong interfacial bonding between glass fibers and the phenolic resin. All the results showed that the use of glass-nonmetals as filler in PMC represented a promising method for resolving the environmental pollutions and reducing the cost of PMC, thus attaining both environmental and economic benefits.

  14. TOFPET 2: A high-performance circuit for PET time-of-flight

    NASA Astrophysics Data System (ADS)

    Di Francesco, Agostino; Bugalho, Ricardo; Oliveira, Luis; Rivetti, Angelo; Rolo, Manuel; Silva, Jose C.; Varela, Joao

    2016-07-01

    We present a readout and digitization ASIC featuring low-noise and low-power for time-of flight (TOF) applications using SiPMs. The circuit is designed in standard CMOS 110 nm technology, has 64 independent channels and is optimized for time-of-flight measurement in Positron Emission Tomography (TOF-PET). The input amplifier is a low impedance current conveyor based on a regulated common-gate topology. Each channel has quad-buffered analogue interpolation TDCs (time binning 20 ps) and charge integration ADCs with linear response at full scale (1500 pC). The signal amplitude can also be derived from the measurement of time-over-threshold (ToT). Simulation results show that for a single photo-electron signal with charge 200 (550) fC generated by a SiPM with (320 pF) capacitance the circuit has 24 (30) dB SNR, 75 (39) ps r.m.s. resolution, and 4 (8) mW power consumption. The event rate is 600 kHz per channel, with up to 2 MHz dark counts rejection.

  15. Monolithic microwave integrated circuits

    NASA Astrophysics Data System (ADS)

    Pucel, R. A.

    Monolithic microwave integrated circuits (MMICs), a new microwave technology which is expected to exert a profound influence on microwave circuit designs for future military systems as well as for the commercial and consumer markets, is discussed. The book contains an historical discussion followed by a comprehensive review presenting the current status in the field. The general topics of the volume are: design considerations, materials and processing considerations, monolithic circuit applications, and CAD, measurement, and packaging techniques. All phases of MMIC technology are covered, from design to testing.

  16. Immunohistochemical localization of acid-sensing ion channel 2 (ASIC2) in cutaneous Meissner and Pacinian corpuscles of Macaca fascicularis.

    PubMed

    Cabo, R; Gálvez, M A; San José, I; Laurà, R; López-Muñiz, A; García-Suárez, O; Cobo, T; Insausti, R; Vega, J A

    2012-05-16

    Acid-sensing ion channel 2 (ASIC2) is a member of the degenerin/epithelial sodium channel superfamily, presumably involved mechanosensation. Expression of ASIC2 has been detected in mechanosensory neurons as well as in both axons and Schwann-like cells of cutaneous mechanoreceptors. In these studies we analysed expression of ASIC2 in the cutaneous sensory corpuscles of Macaca fascicularis using immunohistochemistry and laser confocal-scanner microscopy. ASIC2 immunoreactivity was detected in both Meissner and Pacinian corpuscles. It was found to co-localize with neuron-specific enolase and RT-97, but not with S100 protein, demonstrating that ASIC2 expression is restricted to axons supplying mechanoreceptors. These results demonstrate for the first time the presence of the protein ASIC2 in cutaneous rapidly adapting low-threshold mechanoreceptors of monkey, suggesting a role of this ion channel in touch sense.

  17. PICK1/calcineurin suppress ASIC1-mediated Ca2+ entry in rat pulmonary arterial smooth muscle cells.

    PubMed

    Herbert, Lindsay M; Nitta, Carlos H; Yellowhair, Tracylyn R; Browning, Carly; Gonzalez Bosc, Laura V; Resta, Thomas C; Jernigan, Nikki L

    2016-03-01

    Acid-sensing ion channel 1 (ASIC1) contributes to Ca(2+) influx and contraction in pulmonary arterial smooth muscle cells (PASMC). ASIC1 binds the PDZ (PSD-95/Dlg/ZO-1) domain of the protein interacting with C kinase 1 (PICK1), and this interaction is important for the subcellular localization and/or activity of ASIC1. Therefore, we first hypothesized that PICK1 facilitates ASIC1-dependent Ca(2+) influx in PASMC by promoting plasma membrane localization. Using Duolink to determine protein-protein interactions and a biotinylation assay to assess membrane localization, we demonstrated that the PICK1 PDZ domain inhibitor FSC231 diminished the colocalization of PICK1 and ASIC1 but did not limit ASIC1 plasma membrane localization. Although stimulation of store-operated Ca(2+) entry (SOCE) greatly enhanced colocalization between ASIC1 and PICK1, both FSC231 and shRNA knockdown of PICK1 largely augmented SOCE. These data suggest PICK1 imparts a basal inhibitory effect on ASIC1 Ca(2+) entry in PASMC and led to an alternative hypothesis that PICK1 facilitates the interaction between ASIC1 and negative intracellular modulators, namely PKC and/or the calcium-calmodulin-activated phosphatase calcineurin. FSC231 limited PKC-mediated inhibition of SOCE, supporting a potential role for PICK1 in this response. Additionally, we found PICK1 inhibits ASIC1-mediated SOCE through an effect of calcineurin to dephosphorylate the channel. Furthermore, it appears PICK1/calcineurin-mediated regulation of SOCE opposes PKA phosphorylation and activation of ASIC1. Together our data suggest PKA and PICK1/calcineurin differentially regulate ASIC1-mediated SOCE and these modulatory complexes are important in determining downstream Ca(2+) signaling. PMID:26702130

  18. VeloPix ASIC development for LHCb VELO upgrade

    NASA Astrophysics Data System (ADS)

    van Beuzekom, M.; Buytaert, J.; Campbell, M.; Collins, P.; Gromov, V.; Kluit, R.; Llopart, X.; Poikela, T.; Wyllie, K.; Zivkovic, V.

    2013-12-01

    The upgrade of the LHCb experiment, planned for 2018, will transform the readout of the entire experiment to a triggerless system operating at 40 MHz. All data reduction algorithms will be run in a high level software farm, and will have access to event information from all subdetectors. This approach will give great power and flexibility in accessing the physics channels of interest in the future, in particular the identification of flavour tagged events with displaced vertices. The data acquisition and front end electronics systems require significant modification to cope with the enormous throughput of data. For the silicon vertex locator (VELO) a dedicated development is underway for a new ASIC, VeloPix, which will be a derivative of the Timepix/Medipix family of chips. The chip will be radiation hard and be able to cope with pixel hit rates of above 500 MHz, highly non-uniformly distributed over the 2 cm2 chip area. The chip will incorporate local intelligence in the pixels for time-over-threshold measurements, time-stamping and sparse readout. It must in addition be low power, radiation hard, and immune to single event upsets. In order to cope with the datarates and use the pixel area most effectively, an on-chip data compression scheme will integrated. This paper will describe the requirements of the LHCb VELO upgrade, and give an overview of the digital architecture being developed specifically for the readout chip.

  19. Transient Performance Improvement Circuit (TPIC)s for DC-DC converter applications

    NASA Astrophysics Data System (ADS)

    Lim, Sungkeun

    of the slow inductor current slew rate which is determined by the input voltage, output voltage, and the inductance. The remaining inductor current in the power delivery path will charge the output capacitors and develop a voltage across the ESR. As a result, large output voltage spikes occur during load current transients. Due to their limited control bandwidth, traditional VRs can not sufficiently respond rapidly to certain load transients. As a result, a large output voltage spike can occur during load transients, hence requiring a large amount of bulk capacitance to decouple the VR from the load [2]. If the remaining inductor current is removed from the power stage or the inductor current slew rate is changed, the output voltage spikes can be clamped, allowing the output capacitance to be reduced. A new design methodology for a Transient Performance Improvement Circuit(TPIC) based on controlling the output impedance of a regulator is presented. The TPIC works in parallel with a voltage regulator (VR)'s ceramic capacitors to achieve faster voltage regulation without the need for a large bulk capacitance, and can serve as a replacement for bulk capacitors. The specific function of the TPIC is to mimic the behavior of the bulk capacitance in a traditional VRM by sinking and sourcing large currents during transients, allowing the VR to respond quickly to current transients without the need for a large bulk capacitance. This will allow fast transient response without the need for a large bulk capacitor. The main challenge in applying the TPIC is creating a design which will not interfere with VR operation. A TPIC for a 4 Switch Buck-Boost (4SBB) converter is presented which functions by con- trolling the inductor current slew rate during load current transients. By increasing the inductor current slew rate, the remaining inductor current can be removed from the 4SBB power delivery path and the output voltage spike can be clamped. A second TPIC is presented which is

  20. Sensor readout detector circuit

    DOEpatents

    Chu, D.D.; Thelen, D.C. Jr.

    1998-08-11

    A sensor readout detector circuit is disclosed that is capable of detecting sensor signals down to a few nanoamperes or less in a high (microampere) background noise level. The circuit operates at a very low standby power level and is triggerable by a sensor event signal that is above a predetermined threshold level. A plurality of sensor readout detector circuits can be formed on a substrate as an integrated circuit (IC). These circuits can operate to process data from an array of sensors in parallel, with only data from active sensors being processed for digitization and analysis. This allows the IC to operate at a low power level with a high data throughput for the active sensors. The circuit may be used with many different types of sensors, including photodetectors, capacitance sensors, chemically-sensitive sensors or combinations thereof to provide a capability for recording transient events or for recording data for a predetermined period of time following an event trigger. The sensor readout detector circuit has applications for portable or satellite-based sensor systems. 6 figs.

  1. Sensor readout detector circuit

    DOEpatents

    Chu, Dahlon D.; Thelen, Jr., Donald C.

    1998-01-01

    A sensor readout detector circuit is disclosed that is capable of detecting sensor signals down to a few nanoamperes or less in a high (microampere) background noise level. The circuit operates at a very low standby power level and is triggerable by a sensor event signal that is above a predetermined threshold level. A plurality of sensor readout detector circuits can be formed on a substrate as an integrated circuit (IC). These circuits can operate to process data from an array of sensors in parallel, with only data from active sensors being processed for digitization and analysis. This allows the IC to operate at a low power level with a high data throughput for the active sensors. The circuit may be used with many different types of sensors, including photodetectors, capacitance sensors, chemically-sensitive sensors or combinations thereof to provide a capability for recording transient events or for recording data for a predetermined period of time following an event trigger. The sensor readout detector circuit has applications for portable or satellite-based sensor systems.

  2. Interaction of ASIC1 and ENaC subunits in human glioma cells and rat astrocytes.

    PubMed

    Kapoor, Niren; Lee, William; Clark, Edlira; Bartoszewski, Rafal; McNicholas, Carmel M; Latham, Cecelia B; Bebok, Zsuzsanna; Parpura, Vladimir; Fuller, Catherine M; Palmer, Cheryl A; Benos, Dale J

    2011-06-01

    Glioblastoma multiforme (GBM) is the most common and aggressive of the primary brain tumors. These tumors express multiple members of the epithelial sodium channel (ENaC)/degenerin (Deg) family and are associated with a basally active amiloride-sensitive cation current. We hypothesize that this glioma current is mediated by a hybrid channel composed of a mixture of ENaC and acid-sensing ion channel (ASIC) subunits. To test the hypothesis that ASIC1 interacts with αENaC and γENaC at the cellular level, we have used total internal reflection fluorescence microscopy (TIRFM) in live rat astrocytes transiently cotransfected with cDNAs for ASIC1-DsRed plus αENaC-yellow fluorescent protein (YFP) or ASIC1-DsRed plus γENaC-YFP. TIRFM images show colocalization of ASIC1 with both αENaC and γENaC. Furthermore, using TIRFM in stably transfected D54-MG cells, we also found that ASIC1 and αENaC both localize to a submembrane region following exposure to pH 6.0, similar to the acidic conditions found in the core of a glioblastoma lesion. Using high-resolution clear native gel electrophoresis, we found that ASIC1 forms a complex with ENaC subunits which migrates at ≈480 kDa in D54-MG glioma cells. These data suggest that different ENaC/Deg subunits interact and could combine to form a hybrid channel that likely underlies the amiloride-sensitive current seen in human glioma cells. PMID:21346156

  3. Extremely bendable, high-performance integrated circuits using semiconducting carbon nanotube networks for digital, analog, and radio-frequency applications.

    PubMed

    Wang, Chuan; Chien, Jun-Chau; Takei, Kuniharu; Takahashi, Toshitake; Nah, Junghyo; Niknejad, Ali M; Javey, Ali

    2012-03-14

    Solution-processed thin-films of semiconducting carbon nanotubes as the channel material for flexible electronics simultaneously offers high performance, low cost, and ambient stability, which significantly outruns the organic semiconductor materials. In this work, we report the use of semiconductor-enriched carbon nanotubes for high-performance integrated circuits on mechanically flexible substrates for digital, analog and radio frequency applications. The as-obtained thin-film transistors (TFTs) exhibit highly uniform device performance with on-current and transconductance up to 15 μA/μm and 4 μS/μm. By performing capacitance-voltage measurements, the gate capacitance of the nanotube TFT is precisely extracted and the corresponding peak effective device mobility is evaluated to be around 50 cm(2)V(-1)s(-1). Using such devices, digital logic gates including inverters, NAND, and NOR gates with superior bending stability have been demonstrated. Moreover, radio frequency measurements show that cutoff frequency of 170 MHz can be achieved in devices with a relatively long channel length of 4 μm, which is sufficient for certain wireless communication applications. This proof-of-concept demonstration indicates that our platform can serve as a foundation for scalable, low-cost, high-performance flexible electronics.

  4. An optimized design of 10-nm-scale dual-material surrounded gate MOSFETs for digital circuit applications

    NASA Astrophysics Data System (ADS)

    Djeffal, F.; Lakhdar, N.; Yousfi, A.

    2011-10-01

    In this paper, we have proposed and simulated a new 10-nm Dual-Material Surrounded Gate MOSFETs (DMSG) MOSFETs for nanoscale digital circuit applications. The subthreshold electrical properties such as subthreshold current-voltage characteristics, subthreshold swing factor, threshold voltage and drain induced barrier lowering (DIBL) of the device have been ascertained and mathematical models have been developed. It has been observed that the DM design can effectively suppress short-channel effects as compared to single material gate structure. The proposed analytical expressions are used to formulate the objective functions, which are the pre-requisite of genetic algorithm computation. The problem is then presented as a multi-objective optimization one where the subthreshold electrical parameters are considered simultaneously. Therefore, the proposed technique is used to search of the optimal electrical and geometrical parameters to obtain better electrical performance of the 10-nm-scale transistor. These characteristics make the optimized 10-nm transistors potentially suitable for deep nanoscale logic and memory applications.

  5. MULTIPLIER CIRCUIT

    DOEpatents

    Thomas, R.E.

    1959-01-20

    An electronic circuit is presented for automatically computing the product of two selected variables by multiplying the voltage pulses proportional to the variables. The multiplier circuit has a plurality of parallel resistors of predetermined values connected through separate gate circults between a first input and the output terminal. One voltage pulse is applied to thc flrst input while the second voltage pulse is applied to control circuitry for the respective gate circuits. Thc magnitude of the second voltage pulse selects the resistors upon which the first voltage pulse is imprcssed, whereby the resultant output voltage is proportional to the product of the input voltage pulses

  6. Bioinspired Polarization Imaging Sensors: From Circuits and Optics to Signal Processing Algorithms and Biomedical Applications

    PubMed Central

    York, Timothy; Powell, Samuel B.; Gao, Shengkui; Kahan, Lindsey; Charanya, Tauseef; Saha, Debajit; Roberts, Nicholas W.; Cronin, Thomas W.; Marshall, Justin; Achilefu, Samuel; Lake, Spencer P.; Raman, Baranidharan; Gruev, Viktor

    2015-01-01

    In this paper, we present recent work on bioinspired polarization imaging sensors and their applications in biomedicine. In particular, we focus on three different aspects of these sensors. First, we describe the electro–optical challenges in realizing a bioinspired polarization imager, and in particular, we provide a detailed description of a recent low-power complementary metal–oxide–semiconductor (CMOS) polarization imager. Second, we focus on signal processing algorithms tailored for this new class of bioinspired polarization imaging sensors, such as calibration and interpolation. Third, the emergence of these sensors has enabled rapid progress in characterizing polarization signals and environmental parameters in nature, as well as several biomedical areas, such as label-free optical neural recording, dynamic tissue strength analysis, and early diagnosis of flat cancerous lesions in a murine colorectal tumor model. We highlight results obtained from these three areas and discuss future applications for these sensors. PMID:26538682

  7. Functional and pharmacological characterization of two different ASIC1a/2a heteromers reveals their sensitivity to the spider toxin PcTx1

    PubMed Central

    Joeres, Niko; Augustinowski, Katrin; Neuhof, Andreas; Assmann, Marc; Gründer, Stefan

    2016-01-01

    Acid Sensing Ion Channels (ASICs) detect extracellular proton signals and are involved in synaptic transmission and pain sensation. ASIC subunits assemble into homo- and heteromeric channels composed of three subunits. Single molecule imaging revealed that heteromers composed of ASIC1a and ASIC2a, which are widely expressed in the central nervous system, have a flexible 2:1/1:2 stoichiometry. It was hitherto not possible, however, to functionally differentiate these two heteromers. To have a homogenous population of ASIC1a/2a heteromers with either 2:1 or 1:2 stoichiometry, we covalently linked subunits in the desired configuration and characterized their functional properties in Xenopus oocytes. We show that the two heteromers have slightly different proton affinity, with an additional ASIC1a subunit increasing apparent affinity. Moreover, we found that zinc, which potentiates ASIC2a-containing ASICs but not homomeric ASIC1a, potentiates both heteromers. Finally, we show that PcTx1, which binds at subunit-subunit interfaces of homomeric ASIC1a, inhibits both heteromers suggesting that ASIC2a can also contribute to a PcTx1 binding site. Using this functional fingerprint, we show that rat cortical neurons predominantly express the ASIC1a/2a heteromer with a 2:1 stoichiometry. Collectively, our results reveal the contribution of individual subunits to the functional properties of ASIC1a/2a heteromers. PMID:27277303

  8. Functional and pharmacological characterization of two different ASIC1a/2a heteromers reveals their sensitivity to the spider toxin PcTx1.

    PubMed

    Joeres, Niko; Augustinowski, Katrin; Neuhof, Andreas; Assmann, Marc; Gründer, Stefan

    2016-01-01

    Acid Sensing Ion Channels (ASICs) detect extracellular proton signals and are involved in synaptic transmission and pain sensation. ASIC subunits assemble into homo- and heteromeric channels composed of three subunits. Single molecule imaging revealed that heteromers composed of ASIC1a and ASIC2a, which are widely expressed in the central nervous system, have a flexible 2:1/1:2 stoichiometry. It was hitherto not possible, however, to functionally differentiate these two heteromers. To have a homogenous population of ASIC1a/2a heteromers with either 2:1 or 1:2 stoichiometry, we covalently linked subunits in the desired configuration and characterized their functional properties in Xenopus oocytes. We show that the two heteromers have slightly different proton affinity, with an additional ASIC1a subunit increasing apparent affinity. Moreover, we found that zinc, which potentiates ASIC2a-containing ASICs but not homomeric ASIC1a, potentiates both heteromers. Finally, we show that PcTx1, which binds at subunit-subunit interfaces of homomeric ASIC1a, inhibits both heteromers suggesting that ASIC2a can also contribute to a PcTx1 binding site. Using this functional fingerprint, we show that rat cortical neurons predominantly express the ASIC1a/2a heteromer with a 2:1 stoichiometry. Collectively, our results reveal the contribution of individual subunits to the functional properties of ASIC1a/2a heteromers. PMID:27277303

  9. Heterogeneous photonic integrated circuits and their applications in computing, networking, and imaging

    NASA Astrophysics Data System (ADS)

    Yoo, S. J. Ben

    2014-03-01

    We discuss heterogeneous integrations and their impacts on computing, networking, and imaging applications. We will review photonic integration technologies including silicon, InP, GaAs, SiO2, Si3N4, and magneto-optical materials such as YIG and BIG. We will address new architectures, new capabilities, and performance enhancement brought into computing, networking, and imaging architectures through heterogeneous photonic integration.

  10. Reading a GEM with a VLSI pixel ASIC used as a direct charge collecting anode

    NASA Astrophysics Data System (ADS)

    Bellazzini, R.; Angelini, F.; Baldini, L.; Bitti, F.; Brez, A.; Ceccanti, M.; Latronico, L.; Massai, M. M.; Minuti, M.; Omodei, N.; Razzano, M.; Sgro, C.; Spandre, G.; Costa, E.; Soffitta, P.

    2004-12-01

    In MicroPattern Gas Detectors (MPGD) when the pixel size is below 100 micron and the number of pixels is large (above 1000) it is virtually impossible to use the conventional PCB read-out approach to bring the signal charge from the individual pixel to the external electronics chain. For this reason a custom CMOS array of 2101 active pixels with 80 micron pitch, directly used as the charge collecting anode of a GEM amplifying structure, has been developed and built. Each charge collecting pad, hexagonally shaped, realized using the top metal layer of a deep submicron VLSI technology is individually connected to a full electronics chain (pre-amplifier, shaping-amplifier, sample and hold, multiplexer) which is built immediately below it by using the remaining five active layers. The GEM and the drift electrode window are assembled directly over the chip so the ASIC itself becomes the pixelized anode of a MicroPattern Gas Detector. With this approach, for the first time, gas detectors have reached the level of integration and resolution typical of solid state pixel detectors. Results from the first tests of this new read-out concept are presented. An Astronomical X-Ray Polarimetry application is also discussed.

  11. Transmission lines implementation on HDI flex circuits for the CMS tracker upgrade

    NASA Astrophysics Data System (ADS)

    Blanchot, G.; De Canio, F.; Gadek, T.; Honma, A.; Kovacs, M.; Rose, P.; Traversi, G.

    2016-01-01

    The upgrade of the CMS tracker at the HL-LHC relies on hybrid modules built on high density interconnecting flexible circuits. They contain several flip chip readout ASICs having high speed digital ports required for configuration and data readout, implemented as customized Scalable Low-Voltage Signalling (SLVS) differential pairs. This paper presents the connectivity requirements on the CMS tracker hybrids; it compares several transmission line implementations in terms of board area, achievable impedances and expected crosstalk. The properties obtained by means of simulations are compared with measurements made on a dedicated test circuit. The different transmission line implementations are also tested using a custom 65nm SLVS driver and receiver prototype ASIC.

  12. Compact Si photonic multimode interference-based optical circuit for mode division multiplexing applications

    NASA Astrophysics Data System (ADS)

    El-Sabban, Salwa; Khalil, Diaa

    2016-07-01

    A design for a compact Si photonic two mode demultiplexer for mode division multiplexing (MDM) applications is presented. The design uses the self-imaging in multimode interference structures to achieve MDM with an insertion loss less than 0.5 dB and a cross talk better than 20 dB over the C band. The imaging is achieved within a length that is half the length reported in the literature, and its overall dimensions are 42 μm×3 μm. The minimum cross talk is affected by the structure geometry. The tolerance of the design to variations in the dimensions is also studied.

  13. TRIPPING CIRCUIT

    DOEpatents

    Lees, G.W.; McCormick, E.D.

    1962-05-22

    A tripping circuit employing a magnetic amplifier for tripping a reactor in response to power level, period, or instrument failure is described. A reference winding and signal winding are wound in opposite directions on the core. Current from an ion chamber passes through both windings. If the current increases at too fast a rate, a shunt circuit bypasses one or the windings and the amplifier output reverses polarity. (AEC)

  14. Application of non-cyanide gold for selective plating of microelectronic circuits

    SciTech Connect

    Worobey, W.; Rieger, D.

    1991-01-01

    With the current trends towards miniaturization, high performance, high quality and cost competiveness, the electrodeposition process has become an important manufacturing technology in many new microelectronic applications. Gold electrodeposition plays an increasing role in processes that require this noble metal. Added to these trends is the continuing and increasing emphasis on manufacturing processes which are less damaging to the environment and potentially less hazardous to the operator and personnel in the vicinity of the operation. The present standard gold plating solutions are based on cyanide salts and are considered acutely hazardous solutions. The trend away from their use is gaining momentum as new non-hazardous gold plating solutions and manufacturing processes making use of them are developed. 2 refs.

  15. Powering an Implantable Minipump with a Multi-layered Printed Circuit Coil for Drug Infusion Applications in Rodents

    PubMed Central

    Givrad, Tina K.; Maarek, Jean-Michel I.; Moore, William H.; Holschneider, Daniel P.

    2014-01-01

    We report the use of a multi-layer printed coil circuit for powering (36–94 mW) an implantable microbolus infusion pump (MIP) that can be activated remotely for use in drug infusion in nontethered, freely moving small animals. This implantable device provides a unique experimental tool with applications in the fields of animal behavior, pharmacology, physiology, and functional brain imaging. Two different designs are described: a battery-less pump usable when the animal is inside a home-cage surrounded by a primary inductive coil and a pump powered by a rechargeable battery that can be used for studies outside the homecage. The use of printed coils for powering of small devices by inductive power transfer presents significant advantages over similar approaches using hand-wound coils in terms of ease of manufacturing and uniformity of design. The high efficiency of a class-E oscillator allowed powering of the minipumps without the need for close physical contact of the primary and secondary coils, as is currently the case for most devices powered by inductive power transfer. PMID:20033778

  16. Electronic control circuits: A compilation

    NASA Technical Reports Server (NTRS)

    1973-01-01

    A compilation of technical R and D information on circuits and modular subassemblies is presented as a part of a technology utilization program. Fundamental design principles and applications are given. Electronic control circuits discussed include: anti-noise circuit; ground protection device for bioinstrumentation; temperature compensation for operational amplifiers; hybrid gatling capacitor; automatic signal range control; integrated clock-switching control; and precision voltage tolerance detector.

  17. Atomic force microscopy imaging reveals the formation of ASIC/ENaC cross-clade ion channels

    SciTech Connect

    Jeggle, Pia; Smith, Ewan St. J.; Stewart, Andrew P.; Haerteis, Silke; Korbmacher, Christoph; Edwardson, J. Michael

    2015-08-14

    ASIC and ENaC are co-expressed in various cell types, and there is evidence for a close association between them. Here, we used atomic force microscopy (AFM) to determine whether ASIC1a and ENaC subunits are able to form cross-clade hybrid ion channels. ASIC1a and ENaC could be co-isolated from detergent extracts of tsA 201 cells co-expressing the two subunits. Isolated proteins were incubated with antibodies against ENaC and Fab fragments against ASIC1a. AFM imaging revealed proteins that were decorated by both an antibody and a Fab fragment with an angle of ∼120° between them, indicating the formation of ASIC1a/ENaC heterotrimers. - Highlights: • There is evidence for a close association between ASIC and ENaC. • We used AFM to test whether ASIC1a and ENaC subunits form cross-clade ion channels. • Isolated proteins were incubated with subunit-specific antibodies and Fab fragments. • Some proteins were doubly decorated at ∼120° by an antibody and a Fab fragment. • Our results indicate the formation of ASIC1a/ENaC heterotrimers.

  18. A Low-Power ASIC Signal Processor for a Vestibular Prosthesis.

    PubMed

    Töreyin, Hakan; Bhatti, Pamela T

    2016-06-01

    A low-power ASIC signal processor for a vestibular prosthesis (VP) is reported. Fabricated with TI 0.35 μm CMOS technology and designed to interface with implanted inertial sensors, the digitally assisted analog signal processor operates extensively in the CMOS subthreshold region. During its operation the ASIC encodes head motion signals captured by the inertial sensors as electrical pulses ultimately targeted for in-vivo stimulation of vestibular nerve fibers. To achieve this, the ASIC implements a coordinate system transformation to correct for misalignment between natural sensors and implanted inertial sensors. It also mimics the frequency response characteristics and frequency encoding mappings of angular and linear head motions observed at the peripheral sense organs, semicircular canals and otolith. Overall the design occupies an area of 6.22 mm (2) and consumes 1.24 mW when supplied with ± 1.6 V.

  19. Novel Low Loss Wide-Band Multi-Port Integrated Circuit Technology for RF/Microwave Applications

    NASA Technical Reports Server (NTRS)

    Simons, Rainee N.; Goverdhanam, Kavita; Katehi, Linda P. B.; Burke, Thomas P. (Technical Monitor)

    2001-01-01

    In this paper, novel low loss, wide-band coplanar stripline technology for radio frequency (RF)/microwave integrated circuits is demonstrated on high resistivity silicon wafer. In particular, the fabrication process for the deposition of spin-on-glass (SOG) as a dielectric layer, the etching of microvias for the vertical interconnects, the design methodology for the multiport circuits and their measured/simulated characteristics are graphically illustrated. The study shows that circuits with very low loss, large bandwidth, and compact size are feasible using this technology. This multilayer planar technology has potential to significantly enhance RF/microwave IC performance when combined with semi-conductor devices and microelectromechanical systems (MEMS).

  20. A 10 cm × 10 cm CdTe Spectroscopic Imaging Detector based on the HEXITEC ASIC

    NASA Astrophysics Data System (ADS)

    Wilson, M. D.; Dummott, L.; Duarte, D. D.; Green, F. H.; Pani, S.; Schneider, A.; Scuffham, J. W.; Seller, P.; Veale, M. C.

    2015-10-01

    The 250 μ m pitch 80x80 pixel HEXITEC detector systems have shown that spectroscopic imaging with an energy resolution of <1 keV FWHM per pixel can be readily achieved in the range of 5-200 keV with Al-pixel CdTe biased to -500 V. This level of spectroscopic imaging has a variety of applications but the ability to produce large area detectors remains a barrier to the adoption of this technology. The limited size of ASICs and defect free CdTe wafers dictates that building large area monolithic detectors is not presently a viable option. A 3-side buttable detector module has been developed to cover large areas with arrays of smaller detectors. The detector modules are 20.35 × 20.45 mm with CdTe bump bonded to the HEXITEC ASIC with coverage up to the edge of the module on three sides. The fourth side has a space of 3 mm to allow I/O wire bonds to be made between the ASIC and the edge of a PCB that routes the signals to a connector underneath the active area of the module. The detector modules have been assembled in rows of five modules with a dead space of 170 μ m between each module. Five rows of modules have been assembled in a staggered height array where the wire bonds of one row of modules are covered by the active detector area of a neighboring row. A data acquisition system has been developed to digitise, store and output the 24 Gbit/s data that is generated by the array. The maximum bias magnitude that could be applied to the CdTe detectors from the common voltage source was limited by the worst performing detector module. In this array of detectors a bias of -400 V was used and the detector modules had 93 % of pixels with better than 1.2 keV FWHM at 59.5 keV. An example of K-edge enhanced imaging for mammography was demonstrated. Subtracting images from the events directly above and below the K-edge of the Iodine contrast agent was able to extract the Iodine information from the image of a breast phantom and improve the contrast of the images. This is just

  1. Atomic force microscopy imaging reveals the formation of ASIC/ENaC cross-clade ion channels.

    PubMed

    Jeggle, Pia; Smith, Ewan St J; Stewart, Andrew P; Haerteis, Silke; Korbmacher, Christoph; Edwardson, J Michael

    2015-08-14

    ASIC and ENaC are co-expressed in various cell types, and there is evidence for a close association between them. Here, we used atomic force microscopy (AFM) to determine whether ASIC1a and ENaC subunits are able to form cross-clade hybrid ion channels. ASIC1a and ENaC could be co-isolated from detergent extracts of tsA 201 cells co-expressing the two subunits. Isolated proteins were incubated with antibodies against ENaC and Fab fragments against ASIC1a. AFM imaging revealed proteins that were decorated by both an antibody and a Fab fragment with an angle of ∼120° between them, indicating the formation of ASIC1a/ENaC heterotrimers. PMID:26032502

  2. Design and performance of the ABCD3TA ASIC for readout of silicon strip detectors in the ATLAS semiconductor tracker

    NASA Astrophysics Data System (ADS)

    Campabadal, F.; Fleta, C.; Key, M.; Lozano, M.; Martinez, C.; Pellegrini, G.; Rafi, J. M.; Ullan, M.; Johansen, L. G.; Mohn, B.; Oye, O.; Solberg, A. O.; Stugu, B.; Ciocio, A.; Ely, R.; Fadeyev, V.; Gilchriese, M.; Haber, C.; Siegrist, J.; Spieler, H.; Vu, C.; Bell, P. J.; Charlton, D. G.; Dowell, J. D.; Gallop, B. J.; Homer, R. J.; Jovanovic, P.; Mahout, G.; McMahon, T. J.; Wilson, J. A.; Barr, A. J.; Carter, J. R.; Goodrick, M. J.; Hill, J. C.; Lester, C. G.; Parker, M. A.; Robinson, D.; Anghinolfi, F.; Chesi, E.; Jarron, P.; Kaplon, J.; Macpherson, A.; Pernegger, H.; Pritchard, T.; Roe, S.; Rudge, A.; Weilhammer, P.; Bialas, W.; Dabrowski, W.; Dwuznik, M.; Toczek, B.; Koperny, S.; Bruckman, P.; Gadomski, S.; Gornicki, E.; Malecki, P.; Moszczynski, A.; Stanecka, E.; Szczygiel, R.; Turala, M.; Wolter, M.; Feld, L.; Ketterer, C.; Ludwig, J.; Meinhardt, J.; Runge, K.; Clark, A. G.; Donega, M.; D'Onofrio, M.; Ferrere, D.; La Marra, D.; Macina, D.; Mangin-Brinet, M.; Mikulec, B.; Zsenei, A.; Bates, R. L.; Cheplakov, A.; Iwata, Y.; Ohsugi, T.; Ikegami, Y.; Kohriki, T.; Kondo, T.; Terada, S.; Ujiie, N.; Unno, Y.; Takashima, R.; Allport, P. P.; Greenall, A.; Jackson, J. N.; Jones, T. J.; Smith, N. A.; Beck, G. A.; Carter, A. A.; Morris, J.; Morin, J.; Cindro, V.; Kramberger, G.; Mandić, I.; Mikuž, M.; Duerdoth, I. P.; Foster, J. M.; Pater, J.; Snow, S. W.; Thompson, R. J.; Atkinson, T. M.; Dick, B.; Fares, F.; Moorhead, G. F.; Taylor, G. N.; Andricek, L.; Bethke, S.; Hauff, D.; Kudlaty, J.; Lutz, G.; Moser, H.-G.; Nisius, R.; Richter, R.; Schieck, J.; Colijn, A.-P.; Cornelissen, T.; Gorfine, G. W.; Hartjes, F. G.; Hessey, N. P.; de Jong, P.; Kluit, R.; Koffeman, E.; Muijs, A. J. M.; Peeters, S. J. M.; van Eijk, B.; Nakano, I.; Tanaka, R.; Dorholt, O.; Danielsen, K. M.; Huse, T.; Sandaker, H.; Stapnes, S.; Kundu, N.; Nickerson, R. B.; Weidberg, A.; Bohm, J.; Mikestikova, M.; Stastny, J.; Broklova, Z.; Broz, J.; Dolezal, Z.; Kodys, P.; Kubik, P.; Reznicek, P.; Vorobel, V.; Wilhelm, I.; Cermák, P.; Chren, D.; Horazdovský, T.; Linhart, V.; Pospísil, S.; Sinor, M.; Solar, M.; Sopko, B.; Stekl, I.; Apsimon, R. J.; Batchelor, L. E.; Bizzell, J. P.; Falconer, N. G.; French, M. J.; Gibson, M. D.; Haywood, S. J.; Matson, R. M.; McMahon, S. J.; Morrissey, M.; Murray, W. J.; Phillips, P. W.; Tyndel, M.; Villani, E. G.; Cosgrove, D. P.; Dorfan, D. E.; Grillo, A. A.; Kachiguine, S.; Rosenbaum, F.; Sadrozinski, H. F.-W.; Seiden, A.; Spencer, E.; Wilder, M.; Akimoto, T.; Hara, K.; Tanizaki, K.; Bingefors, N.; Brenner, R.; Ekelof, T.; Eklund, L.; Bernabeu, J.; Civera, J. V.; Costa, M. J.; Fuster, J.; Garcia, C.; Garcia-Navarro, J. E.; Gonzalez-Sevilla, S.; Lacasta, C.; Llosa, G.; Marti-Garcia, S.; Modesto, P.; Sanchez, F. J.; Sospedra, L.; Vos, M.

    2005-11-01

    The ABCD3TA is a 128-channel ASIC with binary architecture for the readout of silicon strip particle detectors in the Semiconductor Tracker of the ATLAS experiment at the Large Hadron Collider (LHC). The chip comprises fast front-end and amplitude discriminator circuits using bipolar devices, a binary pipeline for first level trigger latency, a second level derandomising buffer and data compression circuitry based on CMOS devices. It has been designed and fabricated in a BiCMOS radiation resistant process. Extensive testing of the ABCD3TA chips assembled into detector modules show that the design meets the specifications and maintains the required performance after irradiation up to a total ionising dose of 10 Mrad and a 1-MeV neutron equivalent fluence of 2×10 14 n/cm 2, corresponding to 10 years of operation of the LHC at its design luminosity. Wafer screening and quality assurance procedures have been developed and implemented in large volume production to ensure that the chips assembled into modules meet the rigorous acceptance criteria.

  3. Design and performance of a custom ASIC digitizer for wire chamber readout in 65 nm CMOS technology

    NASA Astrophysics Data System (ADS)

    Lee, M. J.; Brown, D. N.; Chang, J. K.; Ding, D.; Gnani, D.; Grace, C. R.; Jones, J. A.; Kolomensky, Y. G.; von der Lippe, H.; Mcvittie, P. J.; Stettler, M. W.; Walder, J.-P.

    2015-06-01

    We present the design and performance of a prototype ASIC digitizer for integrated wire chamber readout, implemented in 65 nm commercial CMOS technology. Each channel of the 4-channel prototype is composed of two 16-bit Time-to-Digital Converters (TDCs), one 8-bit Analog-to-Digital Converter (ADC), a front-end preamplifier and shaper, plus digital and analog buffers that support a variety of digitization chains. The prototype has a multiplexed digital backend that executes a state machine, distributes control and timing signals, and buffers data for serial output. Laboratory bench tests measure the absolute TDC resolution between 74 ps and 480 ps, growing with the absolute delay, and a relative time resolution of 19 ps. Resolution outliers due to cross-talk between clock signals and supply or reference voltages are seen. After calibration, the ADC displays good linearity and noise performance, with an effective number of bits of 6.9. Under normal operating conditions the circuit consumes 32 mW per channel. Potential design improvements to address the resolution drift and tails are discussed.

  4. A Simple Circuit to Investigate Threshold Voltage Variation and Its Application in Monitoring Negative Bias Temperature Instability Degradation

    NASA Astrophysics Data System (ADS)

    Hong, Jie; He, Yandong; Zhang, Ganggang; Zhang, Xing

    2013-04-01

    This paper presents a test circuit which can be used to analyze the p-MOSFET threshold voltage (VT) shift and fluctuation. The proposed circuit includes two p-MOSFETs, series connection. Using the circuit, we can directly measure threshold voltage shift on the output side and gather fluctuation statistics of p-MOSFET devices. The principle and the sensitivity of this method are demonstrated, followed by simulation and experimental results. A predictive model of negative bias temperature instability (NBTI) is introduced to analyze the PMOS degradation under constant stress. The NBTI stress experimental results have shown that this circuit can monitor NBTI degradation accurately, and offer a significant improvement in efficiency over existing Id-Vg methods.

  5. MULTIPLIER CIRCUIT

    DOEpatents

    Chase, R.L.

    1963-05-01

    An electronic fast multiplier circuit utilizing a transistor controlled voltage divider network is presented. The multiplier includes a stepped potentiometer in which solid state or transistor switches are substituted for mechanical wipers in order to obtain electronic switching that is extremely fast as compared to the usual servo-driven mechanical wipers. While this multiplier circuit operates as an approximation and in steps to obtain a voltage that is the product of two input voltages, any desired degree of accuracy can be obtained with the proper number of increments and adjustment of parameters. (AEC)

  6. Facile fabrication of networked patterns and their superior application to realize the virus immobilized networked pattern circuit.

    PubMed

    Choi, Kyung Min; Lee, Seok Jae; Choi, Jung Hoon; Park, Tae Jung; Park, Jong Wan; Shin, Weon Ho; Kang, Jeung Ku

    2010-12-01

    A facile route to fabricate a protein-immobilized network pattern circuit for rapid and highly sensitive diagnosis was developed via the evaporation directed impromptu patterning method and selective avian influenza virus (AIV) immobilization. The response to the 10 fg mL(-1) anti-AI antibody demonstrates that this easy and simple circuit has about 1000 times higher sensitivity compared to those of conventional approaches.

  7. PETA4: a multi-channel TDC/ADC ASIC for SiPM readout

    NASA Astrophysics Data System (ADS)

    Sacco, I.; Fischer, P.; Ritzert, M.

    2013-12-01

    The PETA4 ASIC is the latest member of a family of chips targeted mainly at the readout of Silicon Photomultipliers in PET, with possible use in other detector applications. PETA4 houses 36 channels on a 5 × 5mm2 die and is fabricated in the UMC 180nm technology. It uses bump bonds with a convenient pitch of ≈ 270μm to allow the construction of very compact modules at moderate substrate cost. The chip requires nearly no external components by integrating everything (PLL loop filter, bandgap reference, bias DACs,...) on chip. Power consumption is <= 40mW per channel, depending on digital speed and bias settings. Every channel has two independent frontends: an established differential amplifier which has shown to be insensitive to pickup in the target application of PET/MRI, and a single-ended frontend with very low input impedance (Zin ≈ 7Ω) for high channel count operation. A fast discriminator with tunable threshold and a noise of <= 300μV self-triggers time stamping with a bin width of 50ps as well as an integrator with programmable integration time. The amplitude signal is converted by a ≈ 9-bit SAR ADC. After conversion, events with sufficient amplitude are queued for serial readout. The previous chip version PETA3 has achieved a CRT time resolution of ≈ 200ps when reading out scintillation light from a 3 × 3×5mm3 LYSO crystal coupled at room temperature to a 3 × 3mm2 SiPM from FBK. Energy resolution for LYSO is ≈ 12.5%FWHM. LYSO crystals of 1.3mm size could be clearly identified with SiPMs of 4 × 4mm2 when using a light spreader. The architecture of PETA4 and its performance in the lab and with SiPMs will be presented.

  8. Transistorized circuit clamps voltage with 0.1 percent error

    NASA Technical Reports Server (NTRS)

    1965-01-01

    Transistorized clamping circuit clamps either of two voltage levels to input of digital-to-analog resistive matrix with 0.1 percent error. Clamping circuit technique has analog, digital, and hybrid circuit applications.

  9. Wein bridge oscillator circuit

    NASA Technical Reports Server (NTRS)

    Lipoma, P. C.

    1971-01-01

    Circuit with minimum number of components provides stable outputs of 2 to 8 volts at frequencies of .001 to 100 kHz. Oscillator exhibits low power consumption, portability, simplicity, and drive capability, it has application as loudspeaker tester and audible alarm, as well as in laboratory and test generators.

  10. Circuit Training.

    ERIC Educational Resources Information Center

    Nelson, Jane B.

    1998-01-01

    Describes a research-based activity for high school physics students in which they build an LC circuit and find its resonant frequency of oscillation using an oscilloscope. Includes a diagram of the apparatus and an explanation of the procedures. (DDR)

  11. Fabrication and integration of micro/nano-scale optical wire circuit arrays and devices for high-speed and compact optical printed circuit board (O-PCB) and VLSI photonic applications

    NASA Astrophysics Data System (ADS)

    Lee, El-Hang; Lee, S. G.; O, B. H.; Park, S. G.; Kim, K. H.; Kang, J. K.; Choi, Y. W.; Song, S. H.

    2005-09-01

    We report on the design, fabrication and integration of micro/nano-scale optical wire circuit arrays and devices for high-speed, compact, light-weight, low power optical printed circuit boards (O-PCBs) and VLSI photonic applications. The optical wires are formed in the form of waveguides by thermal embossing and ultraviolet (UV) radiated embossing of polymer materials. The photonic devices include vertically coupled surface emitting laser (VCSEL) microlasers, microlenses, 45-degree reflection couplers, directional couplers, arrayed waveguide grating structures, multimode interference (MMI) devices and photodetectors. These devices are optically interconnected and integrated for O-PCB assembly and VLSI micro/nano-photonics. The O-PCBs are to perform the functions of transporting, switching, routing and distributing optical signals on flat modular boards or substrates. We report on the result of the optical transmission performances of these assembled O-PCBs. For the design, fabrication, and VLSI integration of nano-scale photonic devices, we used photonic crystal structures and plasmonic metallic waveguide structures. We examined the bandwidth, power dissipation, thermal stability, weight, and the miniaturization and density of optical wires and the O-PCB module. Characteristics of these devices are also described.

  12. Heavy-Ions induced SEE effects measurements for the STRURED ASIC

    NASA Astrophysics Data System (ADS)

    De Robertis, G.; Ranieri, A.; Gabrielli, A.; Candelori, A.; Mattiazzo, S.; Pantano, D.; Tessaro, M.

    2011-06-01

    With the aim of developing a radiation-tolerant circuit, a digital test microelectronic device has been designed and fabricated by using a standard-cell library of a 130-nm CMOS technology, including three different architectures to correct circuit malfunctions induced by the occurrence of Single-Event Effects (SEE's). SEE's are one of the main reasons of failures affecting electronic circuits operating in harsh radiation environments, such as in experiments performed at High Energy Physics (HEP) colliders or in apparatus to be operated in Space. On the same digital circuit specifically designed, three redundant architectures added to a basic scheme have been implemented in order to evaluate their effectiveness to prevent SEE. This may give an indication on their usage in future digital circuits specifically designed for the above mentioned applications. We present the results of SEE cross section measurements performed on a test digital device exposed to a high energy heavy ion beam at the SIRAD irradiation facility of the INFN National Laboratories of Legnaro (Padova Italy).

  13. ELECTRONIC PHASE CONTROL CIRCUIT

    DOEpatents

    Salisbury, J.D.; Klein, W.W.; Hansen, C.F.

    1959-04-21

    An electronic circuit is described for controlling the phase of radio frequency energy applied to a multicavity linear accelerator. In one application of the circuit two cavities are excited from a single radio frequency source, with one cavity directly coupled to the source and the other cavity coupled through a delay line of special construction. A phase detector provides a bipolar d-c output signal proportional to the difference in phase between the voltage in the two cavities. This d-c signal controls a bias supply which provides a d-c output for varying the capacitnce of voltage sensitive capacitors in the delay line. The over-all operation of the circuit is completely electronic, overcoming the time response limitations of the electromechanical control systems, and the relative phase relationship of the radio frequency voltages in the two caviiies is continuously controlled to effect particle acceleration.

  14. Characterisation of the NA62 GigaTracker end of column readout ASIC

    NASA Astrophysics Data System (ADS)

    Noy, M.; Aglieri Rinella, G.; Fiorini, M.; Jarron, P.; Kaplon, J.; Kluge, A.; Martin, E.; Morel, M.; Perktold, L.; Riedler, P.

    2011-01-01

    The architecture and characterisation of the End Of Column demonstrator readout ASIC for the NA62 GigaTracker hybrid pixel detector is presented. This ASIC serves as a proof of principle for a pixel chip with 1800 pixels which must perform time stamping to better than 200 ps (RMS), provide 300 μm pitch position information and operate with a dead-time of 1% or less for 800 MHz-1 GHz beam rate. The demonstrator ASIC comprises a full test column with 45 pixels alongside other test structures. The timewalk correction mechanism employed is measurement of the time-over-threshold, coupled with an off-detector look-up table. The time to digital converter is a delay locked loop with 32 contributing delay cells fed with a 320 MHz to yield a nominal bin size of 97 ps. Recently, P-in-N sensors have been bump-bonded to the ASIC and characterisation of these assemblies has begun.

  15. Down-regulation of ASICs current and the calcium transients by disrupting PICK1 protects primary cultured mouse cortical neurons from OGD-Rep insults.

    PubMed

    Cheng, Jin; Chen, Yu; Xing, Hui; Jiang, Hua; Ye, Xihong

    2015-01-01

    Acid sensing ion channels (ASICs), activated by lowering extracellular pH, play an important role in normal synaptic transmission in brain and in the pathology of brain ischemia. ASICs activation involving in glutamate receptor-independent ischemic brain injury has been generally accepted, and PICK1 is recently shown to be one of partner proteins interacting with ASICs through its PDZ domain. Here we showed that ASICs and PICK1 played key roles in OGD-Rep process. In wild-type cultured cortical neurons, not only the amplitude of ASICs current and the calcium transients induced by acidosis were both increased after OGD-Rep, but also the total protein levels of ASIC1 and ASIC2a were up-regulated progressively after ischemia insults, indicating that ASICs play a vital role in neuronal ischemia. However, these activities were reversed with PICK1-knockout after OGD-Rep, accompanied with the dramatically down-regulating the protein abundances of ASIC1 and ASIC2a, which suggested the neuroprotection activity in brain ischemia by PICK1-knockout. These results indicate that knocking-out PICK1 gene casts the neuroprotection effect by reducing ASICs current and the calcium transients in OGD-Rep neuronal cells, which will offer a promising strategy in the therapy of brain ischemia.

  16. A power management system for energy harvesting and wireless sensor networks application based on a novel charge pump circuit

    NASA Astrophysics Data System (ADS)

    Aloulou, R.; De Peslouan, P.-O. Lucas; Mnif, H.; Alicalapa, F.; Luk, J. D. Lan Sun; Loulou, M.

    2016-05-01

    Energy Harvesting circuits are developed as an alternative solution to supply energy to autonomous sensor nodes in Wireless Sensor Networks. In this context, this paper presents a micro-power management system for multi energy sources based on a novel design of charge pump circuit to allow the total autonomy of self-powered sensors. This work proposes a low-voltage and high performance charge pump (CP) suitable for implementation in standard complementary metal oxide semiconductor (CMOS) technologies. The CP design was implemented using Cadence Virtuoso with AMS 0.35μm CMOS technology parameters. Its active area is 0.112 mm2. Consistent results were obtained between the measured findings of the chip testing and the simulation results. The circuit can operate with an 800 mV supply and generate a boosted output voltage of 2.835 V with 1 MHz as frequency.

  17. Hybrid integration of synthesized dielectric image waveguides in substrate integrated circuit technology and its millimeter wave applications

    NASA Astrophysics Data System (ADS)

    Patrovsky, Andreas

    This thesis deals with a novel type of integrated dielectric waveguide which is synthesized on a planar grounded substrate by perforation of the zones adjacent to a guiding channel in the center. The resulting Substrate Integrated Image Guide (SIIG) not only allows for low-loss guidance of electromagnetic waves in a similar way as the standard image guide, but also meets the requirements of low cost and ease of integration. A first objective was the detailed analysis of the propagation properties of fundamental and higher order modes in this waveguide structure, regarding attenuation, dispersion behavior, bandwidth, leakage effects, and the impact of fabrication tolerances. For this purpose, specifically adapted techniques of analysis are presented, since established methods for the conventional image guide can not be applied to the more complex periodic SIIG. Commercial electromagnetic full-wave software is used along with a dual-line approach involving a subsequent extraction of the propagation constant from simulated S-parameters. Alternatively, the solution of the eigenmode problem of a single SIIG unit cell also performs the task. Both techniques are in good agreement and provide accurate results, which is supported by measurements on laser-fabricated prototypes. It is shown that the achievable attenuation is much lower than in the standard integrated technologies and that losses mainly depend on the chosen dielectric material. As a consequence, the SIIG also is an attractive technology for applications beyond the mmW band, i. e. in the terahertz range. Design recommendations for the geometric parameters of the SIIG are discussed and a simplified equivalent model with homogeneous dielectric regions is introduced to speed up the design of passive components. Low-loss transitions between dissimilar waveguide structures are indispensable key components for a hybrid integrated platform. In order to enable the connection of standard measurement equipment in the W

  18. LARC-SI Flatwire Twin Conduction Circuits

    NASA Technical Reports Server (NTRS)

    1995-01-01

    Eight 2-line, L-shaped gold flex circuits have been imprinted on 1-mil LARC-SI. Each circuit was embedded in a space-applications trapezoidal truss made of carbon fiber reinforced resin composite (with protruding ends) to facilitate electrical connection of electronic devices mounted on the truss. LARC-SI is an advanced polymer highly suitable for multi layered electrical circuits.

  19. Method of boundary testing of the electric circuits and its application for calculating electric tolerances. [electric equipment tests

    NASA Technical Reports Server (NTRS)

    Redkina, N. P.

    1974-01-01

    Boundary testing of electric circuits includes preliminary and limiting tests. Preliminary tests permit determination of the critical parameters causing the greatest deviation of the output parameter of the system. The boundary tests offer the possibility of determining the limits of the fitness of the system with simultaneous variation of its critical parameters.

  20. Electronic circuits for communications systems: A compilation

    NASA Technical Reports Server (NTRS)

    1972-01-01

    The compilation of electronic circuits for communications systems is divided into thirteen basic categories, each representing an area of circuit design and application. The compilation items are moderately complex and, as such, would appeal to the applications engineer. However, the rationale for the selection criteria was tailored so that the circuits would reflect fundamental design principles and applications, with an additional requirement for simplicity whenever possible.

  1. Effect of the class and individual applications of task-oriented circuit training on gait ability in patients with chronic stroke.

    PubMed

    Song, Hyun Seung; Kim, Jin Young; Park, Seong Doo

    2015-01-01

    [Purpose] This study aimed to determine differences in gait abilities by comparing class-based task-oriented circuit training (CTCT) and individual-based task-oriented circuit training (ITCT). [Subjects and Methods] The subjects were 30 patients who were diagnosed with hemiplegia due to stroke more than six months previously. They were divided into Group I (n=10), which received conventional physiotherapy, Group II (n=10), which received conventional physiotherapy and ITCT, and Group III (n=10), which received conventional physiotherapy and CTCT. To determine the qualitative aspect of gait ability, a GAITRite (CIR Systems Inc., Sparta NJ, USA) was employed, while a two-minute walking test (2MWT) was conducted to determine the quantitative aspect. [Results] The gait ability showed significant differences in velocity, cadence, and 2MWT between groups in the significance test. As a result, the Bonferroni post test showed that gait velocity was significantly different between Groups I and II and between Groups I and III, while cadence showed a significant difference between Groups I and III. In the 2MWT, Groups I and II and Groups I and III also showed significant differences. [Conclusion] Both the individual and class applications task-oriented circuit training were effective for improving gait ability. This result indicates that CTCT can improve the physical ability of stroke patients as much as ITCT.

  2. Principles of genetic circuit design.

    PubMed

    Brophy, Jennifer A N; Voigt, Christopher A

    2014-05-01

    Cells navigate environments, communicate and build complex patterns by initiating gene expression in response to specific signals. Engineers seek to harness this capability to program cells to perform tasks or create chemicals and materials that match the complexity seen in nature. This Review describes new tools that aid the construction of genetic circuits. Circuit dynamics can be influenced by the choice of regulators and changed with expression 'tuning knobs'. We collate the failure modes encountered when assembling circuits, quantify their impact on performance and review mitigation efforts. Finally, we discuss the constraints that arise from circuits having to operate within a living cell. Collectively, better tools, well-characterized parts and a comprehensive understanding of how to compose circuits are leading to a breakthrough in the ability to program living cells for advanced applications, from living therapeutics to the atomic manufacturing of functional materials.

  3. Neuromorphic Silicon Neuron Circuits

    PubMed Central

    Indiveri, Giacomo; Linares-Barranco, Bernabé; Hamilton, Tara Julia; van Schaik, André; Etienne-Cummings, Ralph; Delbruck, Tobi; Liu, Shih-Chii; Dudek, Piotr; Häfliger, Philipp; Renaud, Sylvie; Schemmel, Johannes; Cauwenberghs, Gert; Arthur, John; Hynna, Kai; Folowosele, Fopefolu; Saighi, Sylvain; Serrano-Gotarredona, Teresa; Wijekoon, Jayawan; Wang, Yingxue; Boahen, Kwabena

    2011-01-01

    Hardware implementations of spiking neurons can be extremely useful for a large variety of applications, ranging from high-speed modeling of large-scale neural systems to real-time behaving systems, to bidirectional brain–machine interfaces. The specific circuit solutions used to implement silicon neurons depend on the application requirements. In this paper we describe the most common building blocks and techniques used to implement these circuits, and present an overview of a wide range of neuromorphic silicon neurons, which implement different computational models, ranging from biophysically realistic and conductance-based Hodgkin–Huxley models to bi-dimensional generalized adaptive integrate and fire models. We compare the different design methodologies used for each silicon neuron design described, and demonstrate their features with experimental results, measured from a wide range of fabricated VLSI chips. PMID:21747754

  4. LOGIC CIRCUIT

    DOEpatents

    Strong, G.H.; Faught, M.L.

    1963-12-24

    A device for safety rod counting in a nuclear reactor is described. A Wheatstone bridge circuit is adapted to prevent de-energizing the hopper coils of a ball backup system if safety rods, sufficient in total control effect, properly enter the reactor core to effect shut down. A plurality of resistances form one arm of the bridge, each resistance being associated with a particular safety rod and weighted in value according to the control effect of the particular safety rod. Switching means are used to switch each of the resistances in and out of the bridge circuit responsive to the presence of a particular safety rod in its effective position in the reactor core and responsive to the attainment of a predetermined velocity by a particular safety rod enroute to its effective position. The bridge is unbalanced in one direction during normal reactor operation prior to the generation of a scram signal and the switching means and resistances are adapted to unbalance the bridge in the opposite direction if the safety rods produce a predetermined amount of control effect in response to the scram signal. The bridge unbalance reversal is then utilized to prevent the actuation of the ball backup system, or, conversely, a failure of the safety rods to produce the predetermined effect produces no unbalance reversal and the ball backup system is actuated. (AEC)

  5. Monolithic Optoelectronic Integrated Circuit

    NASA Technical Reports Server (NTRS)

    Bhasin, Kul B.; Walters, Wayne; Gustafsen, Jerry; Bendett, Mark

    1990-01-01

    Monolithic optoelectronic integrated circuit (OEIC) receives single digitally modulated input light signal via optical fiber and converts it into 16-channel electrical output signal. Potentially useful in any system in which digital data must be transmitted serially at high rates, then decoded into and used in parallel format at destination. Applications include transmission and decoding of control signals to phase shifters in phased-array antennas and also communication of data between computers and peripheral equipment in local-area networks.

  6. SU-E-E-08: Applications of the Quantization of Coupled Circuits in Radiation Physics (design of Klystron, Bremsstrahlung, Synchrotron)

    SciTech Connect

    Ulmer, W

    2015-06-15

    Purpose: During the past decade the quantization of coupled/forced electromagnetic circuits with or without Ohm’s resistance has gained the subject of some fundamental studies, since even problems of quantum electrodynamics can be solved in an elegant manner, e.g. the creation of quantized electromagnetic fields. In this communication, we shall use these principles to describe optimization procedures in the design of klystrons, synchrotron irradiation and high energy bremsstrahlung. Methods: The base is the Hamiltonian of an electromagnetic circuit and the extension to coupled circuits, which allow the study of symmetries and perturbed symmetries in a very apparent way (SU2, SU3, SU4). The introduction resistance and forced oscillators for the emission and absorption in such coupled systems provides characteristic resonance conditions, and atomic orbitals can be described by that. The extension to virtual orbitals leads to creation of bremsstrahlung, if the incident electron (velocity v nearly c) is described by a current, which is associated with its inductivitance and the virtual orbital to the charge distribution (capacitance). Coupled systems with forced oscillators can be used to amplify drastically the resonance frequencies to describe klystrons and synchrotron radiation. Results: The cross-section formula for bremsstrahlung given by the propagator method of Feynman can readily be derived. The design of klystrons and synchrotrons inclusive the radiation outcome can be described and optimized by the determination of the mutual magnetic couplings between the oscillators induced by the currents. Conclusions: The presented methods of quantization of circuits inclusive resistance provide rather a straightforward way to understand complex technical processes such as creation of bremsstrahlung or creation of radiation by klystrons and synchrotrons. They can either be used for optimization procedures and, last but not least, for pedagogical purposes with regard to

  7. Energy dispersive CdTe and CdZnTe detectors for spectral clinical CT and NDT applications

    NASA Astrophysics Data System (ADS)

    Barber, W. C.; Wessel, J. C.; Nygard, E.; Iwanczyk, J. S.

    2015-06-01

    We are developing room temperature compound semiconductor detectors for applications in energy-resolved high-flux single x-ray photon-counting spectral computed tomography (CT), including functional imaging with nanoparticle contrast agents for medical applications and non-destructive testing (NDT) for security applications. Energy-resolved photon-counting can provide reduced patient dose through optimal energy weighting for a particular imaging task in CT, functional contrast enhancement through spectroscopic imaging of metal nanoparticles in CT, and compositional analysis through multiple basis function material decomposition in CT and NDT. These applications produce high input count rates from an x-ray generator delivered to the detector. Therefore, in order to achieve energy-resolved single photon counting in these applications, a high output count rate (OCR) for an energy-dispersive detector must be achieved at the required spatial resolution and across the required dynamic range for the application. The required performance in terms of the OCR, spatial resolution, and dynamic range must be obtained with sufficient field of view (FOV) for the application thus requiring the tiling of pixel arrays and scanning techniques. Room temperature cadmium telluride (CdTe) and cadmium zinc telluride (CdZnTe) compound semiconductors, operating as direct conversion x-ray sensors, can provide the required speed when connected to application specific integrated circuits (ASICs) operating at fast peaking times with multiple fixed thresholds per pixel provided the sensors are designed for rapid signal formation across the x-ray energy ranges of the application at the required energy and spatial resolutions, and at a sufficiently high detective quantum efficiency (DQE). We have developed high-flux energy-resolved photon-counting x-ray imaging array sensors using pixellated CdTe and CdZnTe semiconductors optimized for clinical CT and security NDT. We have also fabricated high

  8. Energy dispersive CdTe and CdZnTe detectors for spectral clinical CT and NDT applications

    PubMed Central

    Barber, W. C.; Wessel, J. C.; Nygard, E.; Iwanczyk, J. S.

    2014-01-01

    We are developing room temperature compound semiconductor detectors for applications in energy-resolved high-flux single x-ray photon-counting spectral computed tomography (CT), including functional imaging with nanoparticle contrast agents for medical applications and non destructive testing (NDT) for security applications. Energy-resolved photon-counting can provide reduced patient dose through optimal energy weighting for a particular imaging task in CT, functional contrast enhancement through spectroscopic imaging of metal nanoparticles in CT, and compositional analysis through multiple basis function material decomposition in CT and NDT. These applications produce high input count rates from an x-ray generator delivered to the detector. Therefore, in order to achieve energy-resolved single photon counting in these applications, a high output count rate (OCR) for an energy-dispersive detector must be achieved at the required spatial resolution and across the required dynamic range for the application. The required performance in terms of the OCR, spatial resolution, and dynamic range must be obtained with sufficient field of view (FOV) for the application thus requiring the tiling of pixel arrays and scanning techniques. Room temperature cadmium telluride (CdTe) and cadmium zinc telluride (CdZnTe) compound semiconductors, operating as direct conversion x-ray sensors, can provide the required speed when connected to application specific integrated circuits (ASICs) operating at fast peaking times with multiple fixed thresholds per pixel provided the sensors are designed for rapid signal formation across the x-ray energy ranges of the application at the required energy and spatial resolutions, and at a sufficiently high detective quantum efficiency (DQE). We have developed high-flux energy-resolved photon-counting x-ray imaging array sensors using pixellated CdTe and CdZnTe semiconductors optimized for clinical CT and security NDT. We have also fabricated high

  9. Four-way junction-driven DNA strand displacement and its application in building majority logic circuit.

    PubMed

    Zhu, Jinbo; Zhang, Libing; Dong, Shaojun; Wang, Erkang

    2013-11-26

    We introduced a four-way DNA junction-driven toehold-mediated strand displacement method. Separation of the different functional domains on different strands in the four-way junction structure and usage of glue strand to recombine them for different logic gates make the design more flexible. On the basis of this mechanism, a majority logic circuit fabricated by DNA strands was designed and constructed by assembling three AND gates and one OR gate together. The output strand drew the G-rich segments together to form a split G-quadruplex, which could specifically bind PPIX and enhance its fluorescence. Just like a poll with three voters, the high fluorescence signal would be given off only when two or three voters vote in favor. Upon slight modification, the majority circuit was utilized to select the composite number from 0 to 9 represented by excess-three code. It is a successful attempt to integrate the logic gates into a circuit and to achieve desired functions.

  10. Dynamics of coupled simplest chaotic two-component electronic circuits and its potential application to random bit generation

    SciTech Connect

    Modeste Nguimdo, Romain; Tchitnga, Robert; Woafo, Paul

    2013-12-15

    We numerically investigate the possibility of using a coupling to increase the complexity in simplest chaotic two-component electronic circuits operating at high frequency. We subsequently show that complex behaviors generated in such coupled systems, together with the post-processing are suitable for generating bit-streams which pass all the NIST tests for randomness. The electronic circuit is built up by unidirectionally coupling three two-component (one active and one passive) oscillators in a ring configuration through resistances. It turns out that, with such a coupling, high chaotic signals can be obtained. By extracting points at fixed interval of 10 ns (corresponding to a bit rate of 100 Mb/s) on such chaotic signals, each point being simultaneously converted in 16-bits (or 8-bits), we find that the binary sequence constructed by including the 10(or 2) least significant bits pass statistical tests of randomness, meaning that bit-streams with random properties can be achieved with an overall bit rate up to 10×100 Mb/s =1Gbit/s (or 2×100 Mb/s =200 Megabit/s). Moreover, by varying the bias voltages, we also investigate the parameter range for which more complex signals can be obtained. Besides being simple to implement, the two-component electronic circuit setup is very cheap as compared to optical and electro-optical systems.

  11. Dynamics of coupled simplest chaotic two-component electronic circuits and its potential application to random bit generation.

    PubMed

    Nguimdo, Romain Modeste; Tchitnga, Robert; Woafo, Paul

    2013-12-01

    We numerically investigate the possibility of using a coupling to increase the complexity in simplest chaotic two-component electronic circuits operating at high frequency. We subsequently show that complex behaviors generated in such coupled systems, together with the post-processing are suitable for generating bit-streams which pass all the NIST tests for randomness. The electronic circuit is built up by unidirectionally coupling three two-component (one active and one passive) oscillators in a ring configuration through resistances. It turns out that, with such a coupling, high chaotic signals can be obtained. By extracting points at fixed interval of 10 ns (corresponding to a bit rate of 100 Mb/s) on such chaotic signals, each point being simultaneously converted in 16-bits (or 8-bits), we find that the binary sequence constructed by including the 10(or 2) least significant bits pass statistical tests of randomness, meaning that bit-streams with random properties can be achieved with an overall bit rate up to 10×100 Mb/s = 1 Gbit/s (or 2×100 Mb/s =200 Megabit/s). Moreover, by varying the bias voltages, we also investigate the parameter range for which more complex signals can be obtained. Besides being simple to implement, the two-component electronic circuit setup is very cheap as compared to optical and electro-optical systems.

  12. Radiation hardness tests and characterization of the CLARO-CMOS, a low power and fast single-photon counting ASIC in 0.35 micron CMOS technology

    NASA Astrophysics Data System (ADS)

    Fiorini, M.; Andreotti, M.; Baldini, W.; Calabrese, R.; Carniti, P.; Cassina, L.; Cotta Ramusino, A.; Giachero, A.; Gotti, C.; Luppi, E.; Maino, M.; Malaguti, R.; Pessina, G.; Tomassetti, L.

    2014-12-01

    The CLARO-CMOS is a prototype ASIC that allows fast photon counting with 5 ns peaking time, a recovery time to baseline smaller than 25 ns, and a power consumption of less than 1 mW per channel. This chip is capable of single-photon counting with multi-anode photomultipliers and finds applications also in the read-out of silicon photomultipliers and microchannel plates. The prototype is realized in AMS 0.35 micron CMOS technology. In the LHCb RICH environment, assuming 10 years of operation at the nominal luminosity expected after the upgrade in Long Shutdown 2 (LS2), the ASIC must withstand a total fluence of about 6×1012 1 MeV neq /cm2 and a total ionizing dose of 400 krad. A systematic evaluation of the radiation effects on the CLARO-CMOS performance is therefore crucial to ensure long term stability of the electronics front-end. The results of multi-step irradiation tests with neutrons and X-rays up to the fluence of 1014 cm-2 and a dose of 4 Mrad, respectively, are presented, including measurement of single event effects during irradiation and chip performance evaluation before and after each irradiation step.

  13. Irradiation of the CLARO-CMOS chip, a fast ASIC for single-photon counting

    NASA Astrophysics Data System (ADS)

    Andreotti, M.; Baldini, W.; Calabrese, R.; Carniti, P.; Cassina, L.; Cotta Ramusino, A.; Fiorini, M.; Giachero, A.; Gotti, C.; Luppi, E.; Maino, M.; Malaguti, R.; Pessina, G.; Tomassetti, L.

    2015-07-01

    The CLARO-CMOS is a prototype ASIC that allows fast photon counting with low power consumption, built in AMS 0.35 μm CMOS technology. It is intended to be used as a front-end readout for the upgraded LHCb RICH detectors. In this environment, assuming 10 years of operation at the nominal luminosity expected after the upgrade, the ASIC must withstand a total fluence of about 6×1012 1 MeV neq/cm2 and a total ionising dose of 400 krad. Long term stability of the electronics front-end is essential and the effects of radiation damage on the CLARO-CMOS performance must be carefully studied. This paper describes results of multi-step irradiation tests with protons up to the dose of ~8 Mrad, including measurement of single event effects during irradiation and chip performance evaluation before and after each irradiation step.

  14. An ASIC memory buffer controller for a high speed disk system

    NASA Technical Reports Server (NTRS)

    Hodson, Robert F.; Campbell, Steve

    1993-01-01

    The need for large capacity, high speed mass memory storage devices has become increasingly evident at NASA during the past decade. High performance mass storage systems are crucial to present and future NASA systems. Spaceborne data storage system requirements have grown in response to the increasing amounts of data generated and processed by orbiting scientific experiments. Predictions indicate increases in the volume of data by orders of magnitude during the next decade. Current predictions are for storage capacities on the order of terabits (Tb), with data rates exceeding one gigabit per second (Gbps). As part of the design effort for a state of the art mass storage system, NASA Langley has designed a 144 CMOS ASIC to support high speed data transfers. This paper discusses the system architecture, ASIC design and some of the lessons learned in the development process.

  15. Hypervelocity impact on carbon nanotube reinforced a-SiC composite targets: An atomistic simulation study

    NASA Astrophysics Data System (ADS)

    Makeev, Maxim; Srivastava, Deepak

    2007-03-01

    Atomistic simulation studies, employing the Tersoff many-body reactive potential, have been performed to investigate the hypersonic velocity impact protection properties of carbon nanotube (CNT) reinforced a-SiC composites, for a diamond spherical projectile velocities ranging from 1 km/s to 20 km/s. The scaling relations and analytical forms are derived to describe the penetration depth as a function of the velocity and radius of the projectile. A theoretical framework has been developed to describe the penetration depth behavior in the case of impact of hard projectile on hard target material. The atomistic simulation results are found to compare well with the obtained analytical forms. The effects of diamond nanoparticle impact on the a-SiC composites, with CNTs aligned parallel and perpendicular to the impact direction, caused by impact induced shock absorption and damage creation, will be described in this presentation.

  16. Surface expression of ASIC2 inhibits the amiloride-sensitive current and migration of glioma cells.

    PubMed

    Vila-Carriles, Wanda H; Kovacs, Gergely Gy; Jovov, Biljana; Zhou, Zhen-Hong; Pahwa, Amit K; Colby, Garrett; Esimai, Ogenna; Gillespie, G Yancey; Mapstone, Timothy B; Markert, James M; Fuller, Catherine M; Bubien, James K; Benos, Dale J

    2006-07-14

    Gliomas are primary brain tumors with a complex biology characterized by antigenic and genomic heterogeneity and a propensity for invasion into normal brain tissue. High grade glioma cells possess a voltage-independent, amiloride-inhibitable, inward Na+ current. This current does not exist in normal astrocytes or low grade tumor cells. Inhibition of this conductance decreases glioma growth and cell migration making it a potential therapeutic target. Our previous results have shown that the acid-sensing ion channels (ASICs), members of the epithelial Na+ channel (ENaC)/degenerin (DEG) family of ion channels are part of this current pathway. We hypothesized that one member of the ENaC/DEG family, ASIC2, is retained intracellularly and that it is the lack of functional expression of ASIC2 at the cell surface that results in hyperactivity of this conductance in high grade gliomas. In this study we show that the chemical chaperone, glycerol, and the transcriptional regulator, sodium 4-phenylbutyrate, inhibit the constitutively activated inward current and reduce cell growth and migration in glioblastoma multiforme. The results suggest that these compounds induce the movement of ASIC2 to the plasma membrane, and once there, the basally active inward current characteristic of glioma cells is abolished by inherent negative regulatory mechanisms. This in turn compromises the ability of the glioma cell to migrate and proliferate. These results support the hypothesis that the conductance pathway in high grade glioma cells is comprised of ENaC/DEG subunits and that abolishing this channel activity promotes a reversion of a high grade glioma cell to a phenotype resembling that of normal astrocytes. PMID:16704974

  17. α-Dendrotoxin inhibits the ASIC current in dorsal root ganglion neurons from rat.

    PubMed

    Báez, Adriana; Salceda, Emilio; Fló, Martín; Graña, Martín; Fernández, Cecilia; Vega, Rosario; Soto, Enrique

    2015-10-01

    Dendrotoxins are a group of peptide toxins purified from the venom of several mamba snakes. α-Dendrotoxin (α-DTx, from the Eastern green mamba Dendroaspis angusticeps) is a well-known blocker of voltage-gated K(+) channels and specifically of K(v)1.1, K(v)1.2 and K(v)1.6. In this work we show that α-DTx inhibited the ASIC currents in DRG neurons (IC50=0.8 μM) when continuously perfused during 25 s (including a 5 s pulse to pH 6.1), but not when co-applied with the pH drop. Additionally, we show that α-DTx abolished a transient component of the outward current that, in some experiments, appeared immediately after the end of the acid pulse. Our data indicate that α-DTx inhibits ASICs in the high nM range while some Kv are inhibited in the low nM range. The α-DTx selectivity and its potential interaction with ASICs should be taken in consideration when DTx is used in the high nM range.

  18. Monolithic Active Pixel Matrix with Binary Counters ASIC with nested wells

    NASA Astrophysics Data System (ADS)

    Fahim, F.; Deptuch, G.; Holm, S.; Shenai, A.; Lipton, R.

    2013-04-01

    Monolithic Active Matrix with Binary Counters (MAMBO) V ASIC has been designed for detecting and measuring low energy X-rays. A nested well structure with a buried n-well (BNW) and a deeper buried p-well (BPW) is used to electrically isolate the detector from the electronics. BNW acts as an AC ground to electrical signals and behaves as a shield. BPW allows for a homogenous electric field in the entire detector volume. The ASIC consists of a matrix of 50 × 52 pixels, each of 105x105μm2. Each pixel contains analog functionality accomplished by a charge preamplifier, CR-RC2 shaper and a baseline restorer. It also contains a window comparator with Upper and Lower thresholds which can be individually trimmed by 4 bit DACs to remove systematic offsets. The hits are registered by a 12 bit counter which is reconfigured as a shift register to serially output the data from the entire ASIC.

  19. A new front-end ASIC for GEM detectors with time and charge measurement capabilities

    NASA Astrophysics Data System (ADS)

    Ciciriello, F.; Corsi, F.; De Robertis, G.; Felici, G.; Loddo, F.; Marzocca, C.; Matarrese, G.; Ranieri, A.

    2016-07-01

    A 32 channel CMOS front-end ASIC has been designed to read out the GEM detectors intended to be used for beam monitoring in a new proton-therapy facility currently under construction. In order to improve the spatial resolution by exploiting charge centroid algorithms, the analog channels, based on the classic CSA+shaper architecture, are equipped with a peak detector (PD) which works as an analog memory during the read-out phase. The outputs of the PDs are multiplexed towards an integrated 8-bit subranging ADC. An accurate trigger signal marks the arrival of a valid event and is generated by fast-ORing the outputs of 32 voltage discriminators which compare the shaper outputs with a programmable threshold. The digital part of the ASIC manages the read-out of the channels, the A/D conversion and the configuration of the ASIC. A 100 Mbit/s LVDS serial link is used for data communication. The sensitivity of the analog channel is 15 mV/fC and the dynamic range is 80 fC. The simulated ENC is about 650 e- for a detector capacitance of 10 pF.

  20. α-Dendrotoxin inhibits the ASIC current in dorsal root ganglion neurons from rat.

    PubMed

    Báez, Adriana; Salceda, Emilio; Fló, Martín; Graña, Martín; Fernández, Cecilia; Vega, Rosario; Soto, Enrique

    2015-10-01

    Dendrotoxins are a group of peptide toxins purified from the venom of several mamba snakes. α-Dendrotoxin (α-DTx, from the Eastern green mamba Dendroaspis angusticeps) is a well-known blocker of voltage-gated K(+) channels and specifically of K(v)1.1, K(v)1.2 and K(v)1.6. In this work we show that α-DTx inhibited the ASIC currents in DRG neurons (IC50=0.8 μM) when continuously perfused during 25 s (including a 5 s pulse to pH 6.1), but not when co-applied with the pH drop. Additionally, we show that α-DTx abolished a transient component of the outward current that, in some experiments, appeared immediately after the end of the acid pulse. Our data indicate that α-DTx inhibits ASICs in the high nM range while some Kv are inhibited in the low nM range. The α-DTx selectivity and its potential interaction with ASICs should be taken in consideration when DTx is used in the high nM range. PMID:26314509

  1. A new front-end ASIC for GEM detectors with time and charge measurement capabilities

    NASA Astrophysics Data System (ADS)

    Ciciriello, F.; Corsi, F.; De Robertis, G.; Felici, G.; Loddo, F.; Marzocca, C.; Matarrese, G.; Ranieri, A.

    2016-07-01

    A 32 channel CMOS front-end ASIC has been designed to read out the GEM detectors intended to be used for beam monitoring in a new proton-therapy facility currently under construction. In order to improve the spatial resolution by exploiting charge centroid algorithms, the analog channels, based on the classic CSA+shaper architecture, are equipped with a peak detector (PD) which works as an analog memory during the read-out phase. The outputs of the PDs are multiplexed towards an integrated 8-bit subranging ADC. An accurate trigger signal marks the arrival of a valid event and is generated by fast-ORing the outputs of 32 voltage discriminators which compare the shaper outputs with a programmable threshold. The digital part of the ASIC manages the read-out of the channels, the A/D conversion and the configuration of the ASIC. A 100 Mbit/s LVDS serial link is used for data communication. The sensitivity of the analog channel is 15 mV/fC and the dynamic range is 80 fC. The simulated ENC is about 650 e- for a detector capacitance of 10 pF. © 2001 Elsevier Science. All rights reserved

  2. Commutation circuit for an HVDC circuit breaker

    DOEpatents

    Premerlani, W.J.

    1981-11-10

    A commutation circuit for a high voltage DC circuit breaker incorporates a resistor capacitor combination and a charging circuit connected to the main breaker, such that a commutating capacitor is discharged in opposition to the load current to force the current in an arc after breaker opening to zero to facilitate arc interruption. In a particular embodiment, a normally open commutating circuit is connected across the contacts of a main DC circuit breaker to absorb the inductive system energy trapped by breaker opening and to limit recovery voltages to a level tolerable by the commutating circuit components. 13 figs.

  3. Commutation circuit for an HVDC circuit breaker

    DOEpatents

    Premerlani, William J.

    1981-01-01

    A commutation circuit for a high voltage DC circuit breaker incorporates a resistor capacitor combination and a charging circuit connected to the main breaker, such that a commutating capacitor is discharged in opposition to the load current to force the current in an arc after breaker opening to zero to facilitate arc interruption. In a particular embodiment, a normally open commutating circuit is connected across the contacts of a main DC circuit breaker to absorb the inductive system energy trapped by breaker opening and to limit recovery voltages to a level tolerable by the commutating circuit components.

  4. Development of Formulations for a-SiC and Manganese CMP and Post-CMP Cleaning of Cobalt

    NASA Astrophysics Data System (ADS)

    Lagudu, Uma Rames Krishna

    We have investigated the chemical mechanical polishing (CMP) of amorphous SiC (a-SiC) and Mn and Post CMP cleaning of cobalt for various device applications. During the manufacture of copper interconnects using the damascene process the polishing of copper is followed by the polishing of the barrier material (Co, Mn, Ru and their alloys) and its post CMP cleaning. This is followed by the a-SiC hard mask CMP. Silicon carbide thin films, though of widespread use in microelectronic engineering, are difficult to process by CMP because of their hardness and chemical inertness. The earlier part of the SiC work discusses the development of slurries based on silica abrasives that resulted in high a-SiC removal rates (RRs). The ionic strength of the silica dispersion was found to play a significant role in enhancing material removal rate, while also providing very good post-polish surface-smoothness. For example, the addition of 50 mM potassium nitrate to a pH 8 aqueous slurry consisting of 10 wt % of silica abrasives and 1.47 M hydrogen peroxide increased the RR from about 150 nm/h to about 2100 nm/h. The role of ionic strength in obtaining such high RRs was investigated using surface zeta-potentials measurements and X-ray photoelectron spectroscopy (XPS). Evidently, hydrogen peroxide promoted the oxidation of Si and C to form weakly adhered species that were subsequently removed by the abrasive action of the silica particles. The effect of potassium nitrate in increasing material removal is attributed to the reduction in the electrostatic repulsion between the abrasive particles and the SiC surface because of screening of surface charges by the added electrolyte. We also show that transition metal compounds when used as additives to silica dispersions enhance a-SiC removal rates (RRs). Silica slurries containing potassium permanganate gave RRs as high as 2000 nm/h at pH 4. Addition of copper sulfate to this slurry further enhanced the RRs to ˜3500 nm/h at pH 6

  5. ChromAIX: Fast photon-counting ASIC for Spectral Computed Tomography

    NASA Astrophysics Data System (ADS)

    Steadman, Roger; Herrmann, Christoph; Mülhens, Oliver; Maeding, Dale G.

    2011-08-01

    X-ray attenuation properties of matter (i.e. human body in medical Computed Tomography) are energy and material dependent. This dependency is largely neglected in conventional CT techniques, which require the introduction of correction algorithms in order to prevent image artefacts. The exploitation of the inherent energy information contained in the X-ray spectrum allows distinguishing the two main physical causes of energy-dependent attenuation (photo-electric effect and Compton effect). Currently a number of methods exist that allow assessing the energy-dependent attenuation in conventional systems. These methods consist of using two distinct spectra (kVp switching or dual source) or of discriminating low and high energy photons by means of stacking two detectors. Further improvements can be achieved by transitioning to direct-conversion technologies and counting-mode detection, which inherently exhibits a better signal-to-noise ratio. Further including energy discrimination enables new applications, which are not feasible with dual-energy techniques, e.g. the possibility to discriminate K-edge features (contrast agents, e.g. gadolinium) from other contributions to the X-ray attenuation of a human body. The capability of providing energy-resolved information with two or more independent measurements is referred to as Spectral CT.A new proprietary photon-counting ASIC (ChromAIX) has been developed to provide high count-rate capabilities while offering energy discrimination. ChromAIX consists of a pixel array with an isotropic pitch of 300 μm. Each pixel contains independent discriminators that enable the possibility to discretize the incoming photons into a number of energy levels. Extensive electrical characterization has been carried out to assess the performance in terms of count-rate performance and noise. Observed rates exceed 10 Mcps/pixel (Poissonian, mean incoming rates >27 Mcps). The energy resolution is better than 4.1 keV FWHM and has been shown to be

  6. Engineered gene circuits

    NASA Astrophysics Data System (ADS)

    Hasty, Jeff; McMillen, David; Collins, J. J.

    2002-11-01

    A central focus of postgenomic research will be to understand how cellular phenomena arise from the connectivity of genes and proteins. This connectivity generates molecular network diagrams that resemble complex electrical circuits, and a systematic understanding will require the development of a mathematical framework for describing the circuitry. From an engineering perspective, the natural path towards such a framework is the construction and analysis of the underlying submodules that constitute the network. Recent experimental advances in both sequencing and genetic engineering have made this approach feasible through the design and implementation of synthetic gene networks amenable to mathematical modelling and quantitative analysis. These developments have signalled the emergence of a gene circuit discipline, which provides a framework for predicting and evaluating the dynamics of cellular processes. Synthetic gene networks will also lead to new logical forms of cellular control, which could have important applications in functional genomics, nanotechnology, and gene and cell therapy.

  7. GAS PHOTOTUBE CIRCUIT

    DOEpatents

    Richardson, J.H.

    1958-03-01

    This patent pertains to electronic circuits for measuring the intensity of light and is especially concerned with measurement between preset light thresholds. Such a circuit has application in connection with devices for reading-out information stored on punch cards or tapes where the cards and tapes are translucent. By the novel arrangement of this invention thc sensitivity of a gas phototube is maintained at a low value when the light intensity is below a first threshold level. If the light level rises above the first threshold level, the tube is rendered highly sensitive and an output signal will vary in proportion to the light intensity change. When the light level decreases below a second threshold level, the gas phototube is automatically rendered highly insensitive. Each of these threshold points is adjustable.

  8. Electronic circuits: A compilation. [for electronic equipment in telecommunication

    NASA Technical Reports Server (NTRS)

    1976-01-01

    A compilation containing articles on newly developed electronic circuits and systems is presented. It is divided into two sections: (1) section 1 on circuits and techniques of particular interest in communications technology, and (2) section 2 on circuits designed for a variety of specific applications. The latest patent information available is also given. Circuit diagrams are shown.

  9. Sheath expansion and plasma dynamics in the presence of electrode evaporation: Application to a vacuum circuit breaker

    SciTech Connect

    Sarrailh, P.; Garrigues, L.; Hagelaar, G. J. M.; Boeuf, J. P.; Sandolache, G.; Rowe, S.

    2009-09-01

    During the postarc dielectric recovery phase in a vacuum circuit breaker, a cathode sheath forms and expels the plasma from the electrode gap. The success or failure of current breaking depends on how efficiently the plasma is expelled from the electrode gap. The sheath expansion in the postarc phase can be compared to sheath expansion in plasma immersion ion implantation except that collisions between charged particles and atoms generated by electrode evaporation may become important in a vacuum circuit breaker. In this paper, we show that electrode evaporation plays a significant role in the dynamics of the sheath expansion in this context not only because charged particle transport is no longer collisionless but also because the neutral flow due to evaporation and temperature gradients may push the plasma toward one of the electrodes. Using a hybrid model of the nonequilibrium postarc plasma and cathode sheath coupled with a direct simulation Monte Carlo method to describe collisions between heavy species, we present a parametric study of the sheath and plasma dynamics and of the time needed for the sheath to expel the plasma from the gap for different values of plasma density and electrode temperatures at the beginning of the postarc phase. This work constitutes a preliminary step toward understanding and quantifying the risk of current breaking failure of a vacuum arc.

  10. Upflow bio-filter circuit (UBFC): biocatalyst microbial fuel cell (MFC) configuration and application to biodiesel wastewater treatment.

    PubMed

    Sukkasem, Chontisa; Laehlah, Sunee; Hniman, Adilan; O'thong, Sompong; Boonsawang, Piyarat; Rarngnarong, Athirat; Nisoa, Mudtorlep; Kirdtongmee, Pansak

    2011-11-01

    A biodiesel wastewater treatment technology was investigated for neutral alkalinity and COD removal by microbial fuel cell. An upflow bio-filter circuit (UBFC), a kind of biocatalyst MFC was renovated and reinvented. The developed system was combined with a pre-fermented (PF) and an influent adjusted (IA) procedure. The optimal conditions were operated with an organic loading rate (OLR) of 30.0 g COD/L-day, hydraulic retention time (HRT) of 1.04 day, maintained at pH level 6.5-7.5 and aerated at 2.0 L/min. An external resistance of circuit was set at 10 kΩ. The purposed process could improve the quality of the raw wastewater and obtained high efficiency of COD removal of 15.0 g COD/L-day. Moreover, the cost of UBFC system was only US$1775.7/m3 and the total power consumption was 0.152 kW/kg treated COD. The overall advantages of this invention are suitable for biodiesel wastewater treatment.

  11. Upflow bio-filter circuit (UBFC): biocatalyst microbial fuel cell (MFC) configuration and application to biodiesel wastewater treatment.

    PubMed

    Sukkasem, Chontisa; Laehlah, Sunee; Hniman, Adilan; O'thong, Sompong; Boonsawang, Piyarat; Rarngnarong, Athirat; Nisoa, Mudtorlep; Kirdtongmee, Pansak

    2011-11-01

    A biodiesel wastewater treatment technology was investigated for neutral alkalinity and COD removal by microbial fuel cell. An upflow bio-filter circuit (UBFC), a kind of biocatalyst MFC was renovated and reinvented. The developed system was combined with a pre-fermented (PF) and an influent adjusted (IA) procedure. The optimal conditions were operated with an organic loading rate (OLR) of 30.0 g COD/L-day, hydraulic retention time (HRT) of 1.04 day, maintained at pH level 6.5-7.5 and aerated at 2.0 L/min. An external resistance of circuit was set at 10 kΩ. The purposed process could improve the quality of the raw wastewater and obtained high efficiency of COD removal of 15.0 g COD/L-day. Moreover, the cost of UBFC system was only US$1775.7/m3 and the total power consumption was 0.152 kW/kg treated COD. The overall advantages of this invention are suitable for biodiesel wastewater treatment. PMID:21955877

  12. Development of Radiation-Tolerant, Low Mass, High Bandwidth Flexible Printed Circuit Cables for Particle Detection Applications

    NASA Astrophysics Data System (ADS)

    McFadden, Neil

    2016-03-01

    Design options for meter long flexible printed circuit cables required for low mass ultra-high speed signal transmission in the high radiation environment at the High Luminosity run of the Large Hadron Collider (LHC) are described. Two dielectric materials were considered in this study, Kapton and a Kapton/Teflon mixture. The design geometry is a differential embedded microstrip with nominal 100 Ω impedance. Minimal mass and maximal radiation hardness are pre-eminent considerations. The long flexible printed circuit cables are characterized in bit error rate tests (BERT), attenuation versus frequency, mechanical response to stress and temperature change, and RLC decomposition. These tests are performed before and after irradiation with 1 MeV neutrons to 2x1016/cm 2 and 800 MeV protons to 2x1016 1 MeV-neq/cm2. A 1.0 m Kapton cable, with bandwidth of 6.22 gigabits per second, 0.03% of a radiation length, and no radiation induced mechanical or electrical degradation is obtained.

  13. Acid-sensing ion channel 2 (ASIC2) is selectively localized in the cilia of the non-sensory olfactory epithelium of adult zebrafish.

    PubMed

    Viña, E; Parisi, V; Abbate, F; Cabo, R; Guerrera, M C; Laurà, R; Quirós, L M; Pérez-Varela, J C; Cobo, T; Germanà, A; Vega, J A; García-Suárez, O

    2015-01-01

    Ionic channels play key roles in the sensory cells, such as transducing specific stimuli into electrical signals. The acid-sensing ion channel (ASIC) family is voltage-insensitive, amiloride-sensitive, proton-gated cation channels involved in several sensory functions. ASIC2, in particular, has a dual function as mechano- and chemo-sensor. In this study, we explored the possible role of zebrafish ASIC2 in olfaction. RT-PCR, Western blot, chromogenic in situ hybridization and immunohistochemistry, as well as ultrastructural analysis, were performed on the olfactory rosette of adult zebrafish. ASIC2 mRNA and protein were detected in homogenates of olfactory rosettes. Specific ASIC2 hybridization was observed in the luminal pole of the non-sensory epithelium, especially in the cilia basal bodies, and immunoreactivity for ASIC2 was restricted to the cilia of the non-sensory cells where it was co-localized with the cilia marker tubulin. ASIC2 expression was always absent in the olfactory cells. These findings demonstrate for the first time the expression of ASIC2 in the olfactory epithelium of adult zebrafish and suggest that it is not involved in olfaction. Since the cilium sense and transduce mechanical and chemical stimuli, ASIC2 expression in this location might be related to detection of aquatic environment pH variations or to detection of water movement through the nasal cavity.

  14. Photomultiplier blanking circuit

    NASA Technical Reports Server (NTRS)

    Mcclenahan, J. O.

    1972-01-01

    Circuit for protecting photomultiplier equipment from current surges which occur when exposed to brilliant illumination is discussed. Components of circuit and details of operation are provided. Circuit diagram to show action of blanking pulse on zener diode is included.

  15. High-speed readout solution for single-photon counting ASICs

    NASA Astrophysics Data System (ADS)

    Kmon, P.; Szczygiel, R.; Maj, P.; Grybos, P.; Kleczek, R.

    2016-02-01

    We report on the analysis, simulations and measurements of both noise and high-count rate performance of a single photon counting integrated circuit called UFXC32k designed for hybrid pixel detectors for various applications in X-ray imaging. The dimensions of the UFCX32k designed in CMOS 130 nm technology are 9.63 mm × 20.15 mm. The integrated circuit core is a matrix of 128 × 256 squared readout pixels with a pitch of 75 μm. Each readout pixel contains a charge sensitive amplifier (CSA), a shaper, two discriminators and two 14-bit ripple counters. The UFXC32k was bump-bonded to a silicon pixel detector with the thickness of 320 μm and characterized with the X-ray radiation source. The CSA feedback based on the Krummenacher circuit determines both the count rate performance and the noise of the readout front-end electronics. For the default setting of the CSA feedback, the measured front-end electronics dead time is 232 ns (paralyzable model) and the equivalent noise charge (ENC) is equal to 123 el. rms. For the high count rate setting of the CSA feedback, the dead time is only 101 ns and the ENC is equal to 163 el. rms.

  16. Monitoring of bacteria growth using a wireless, remote query resonant-circuit sensor: application to environmental sensing

    NASA Technical Reports Server (NTRS)

    Ong, K. G.; Wang, J.; Singh, R. S.; Bachas, L. G.; Grimes, C. A.; Daunert, S. (Principal Investigator)

    2001-01-01

    A new technique is presented for in-vivo remote query measurement of the complex permittivity spectra of a biological culture solution. A sensor comprised of a printed inductor-capacitor resonant-circuit is placed within the culture solution of interest, with the impedance spectrum of the sensor measured using a remotely located loop antenna; the complex permittivity spectra of the culture is calculated from the measured impedance spectrum. The remote query nature of the sensor platform enables, for example, the in-vivo real-time monitoring of bacteria or yeast growth from within sealed opaque containers. The wireless monitoring technique does not require a specific alignment between sensor and antenna. Results are presented for studies conducted on laboratory strains of Bacillus subtilis, Escherichia coli JM109, Pseudomonas putida and Saccharomyces cerevisiae.

  17. Monitoring of bacteria growth using a wireless, remote query resonant-circuit sensor: application to environmental sensing.

    PubMed

    Ong, K G; Wang, J; Singh, R S; Bachas, L G; Grimes, C A

    2001-06-01

    A new technique is presented for in-vivo remote query measurement of the complex permittivity spectra of a biological culture solution. A sensor comprised of a printed inductor-capacitor resonant-circuit is placed within the culture solution of interest, with the impedance spectrum of the sensor measured using a remotely located loop antenna; the complex permittivity spectra of the culture is calculated from the measured impedance spectrum. The remote query nature of the sensor platform enables, for example, the in-vivo real-time monitoring of bacteria or yeast growth from within sealed opaque containers. The wireless monitoring technique does not require a specific alignment between sensor and antenna. Results are presented for studies conducted on laboratory strains of Bacillus subtilis, Escherichia coli JM109, Pseudomonas putida and Saccharomyces cerevisiae. PMID:11390218

  18. Prototype of a front-end readout ASIC designed for the Water Cherenkov Detector Array in LHAASO

    NASA Astrophysics Data System (ADS)

    Zhao, L.; Wu, W.; Liu, J.; Liang, Y.; Qin, J.; Yu, L.; Liu, S.; An, Q.

    2015-03-01

    The Large High Altitude Air Shower Observatory is in the R&D phase, in which the Water Cherenkov Detector Array is an important part. The signals of Photo-Multiplier Tubes would vary from single photo electron to 4000 photo electrons, and both high precision charge and time measurement is required. To simplify the signal processing chain, the charge-to-time conversion method is employed. A prototype of the front-end readout ASIC is designed and fabricated in Chartered 0.35 μ m CMOS technology, which integrates time disctrimination and converts the input charge information to pulse widths. With Time-to-Digital Converters, both time and charge can be digitized at the same time. We have conducted initial tests on this chip, and the results indicate that a time resolution better than 0.5 ns is achieved over the full dynamic range (1 ~ 4000 photo electrons, corresponding to 0.75 ~ 3000 pC with the threshold of 0.188 pC); the charge resolution is better than 1% with large input amplitudes (500 ~ 4000 photo electrons), and remains better than 15% with a 1 photo electron input amplitude, which is beyond the application requirement.

  19. Principles of Genetic Circuit Design

    PubMed Central

    Brophy, Jennifer A.N.; Voigt, Christopher A.

    2014-01-01

    Cells are able to navigate environments, communicate, and build complex patterns by initiating gene expression in response to specific signals. Engineers need to harness this capability to program cells to perform tasks or build chemicals and materials that match the complexity seen in nature. This review describes new tools that aid the construction of genetic circuits. We show how circuit dynamics can be influenced by the choice of regulators and changed with expression “tuning knobs.” We collate the failure modes encountered when assembling circuits, quantify their impact on performance, and review mitigation efforts. Finally, we discuss the constraints that arise from operating within a living cell. Collectively, better tools, well-characterized parts, and a comprehensive understanding of how to compose circuits are leading to a breakthrough in the ability to program living cells for advanced applications, from living therapeutics to the atomic manufacturing of functional materials. PMID:24781324

  20. Coxsackievirus and Adenovirus Receptor (CAR) Mediates Trafficking of Acid-Sensing Ion Channel 3 (ASIC3) via PSD-95

    PubMed Central

    Excoffon, Katherine J.D.A.; Kolawole, Abimbola O.; Kusama, Nobuyoshi; Gansemer, Nicholas D.; Sharma, Priyanka; Hruska-Hageman, Alesia M.; Petroff, Elena; Benson, Christopher J.

    2012-01-01

    We have previously shown that the Coxsackievirus and adenovirus receptor (CAR) can interact with post-synaptic density 95 (PSD-95) and localize PSD-95 to cell-cell junctions. We have also shown that activity of the acid-sensing ion channel (ASIC3), a H+-gated cation channel that plays a role in mechanosensation and pain signaling, is negatively modulated by PSD-95 through a PDZ-based interaction. We asked whether CAR and ASIC3 simultaneously interact with PSD-95, and if so, whether co-expression of these proteins alters their cellular distribution and localization. Results indicate that CAR and ASIC3 co-immunoprecipitate only when co-expressed with PSD-95. CAR also brings both PSD-95 and ASIC3 to the junctions of heterologous cells. Moreover, CAR rescues PSD-95-mediated inhibition of ASIC3 currents. These data suggest that, in addition to activity as a viral receptor and adhesion molecule, CAR can play a role in trafficking proteins, including ion channels, in a PDZ-based scaffolding complex. PMID:22809504

  1. A Low Cost Single Chip VDL Compatible Transceiver ASIC

    NASA Technical Reports Server (NTRS)

    Becker, Robert

    2004-01-01

    Recent trends in commercial communications system components have focussed almost exclusively on cellular telephone technology. As many of the traditional sources of receiver components have discontinued non-cellular telephone products, the designers of avionics and other low volume radio applications find themselves increasingly unable to find highly integrated components. This is particularly true for low power, low cost applications which cannot afford the lavish current consumption of the software defined radio approach increasingly taken by certified device manufacturers. In this paper, we describe a low power transceiver chip targeting applications from low VHF to low UHF frequencies typical of avionics systems. The chip encompasses a selectable single or double conversion design for the receiver and a low power IF upconversion transmitter. All local oscillators are synthesized and integrated into the chip. An on-chip I-Q modulator and demodulator provide baseband modulation and demodulation capability allowing the use of low power, fixed point signal processing components for signal demodulation. The goal of this program is to demonstrate a low cost VDL mode-3 transceiver using this chip to receive text weather information sent using 4-slot TDMA with no support for voice. The data will be sent from an experimental ground station. This work is funded by NASA Glenn Research Center.

  2. Photonic Integrated Circuits

    NASA Technical Reports Server (NTRS)

    Merritt, Scott; Krainak, Michael

    2016-01-01

    Integrated photonics generally is the integration of multiple lithographically defined photonic and electronic components and devices (e.g. lasers, detectors, waveguides passive structures, modulators, electronic control and optical interconnects) on a single platform with nanometer-scale feature sizes. The development of photonic integrated circuits permits size, weight, power and cost reductions for spacecraft microprocessors, optical communication, processor buses, advanced data processing, and integrated optic science instrument optical systems, subsystems and components. This is particularly critical for small spacecraft platforms. We will give an overview of some NASA applications for integrated photonics.

  3. Application of vacuum metallurgy to separate pure metal from mixed metallic particles of crushed waste printed circuit board scraps.

    PubMed

    Zhan, Lu; Xu, Zhenming

    2008-10-15

    The principle of separating pure metal from mixed metallic particles (MMPs) byvacuum metallurgy is that the vapor pressures of various metals at the same temperature are different As a result, the metal with high vapor pressure and low boiling point can be separated from the mixed metals through distillation or sublimation, and then it can be recycled through condensation under a certain condition. The vacuum metallurgy separation (VMS) of MMPs of crushed waste printed circuit boards (WPCBs) has been studied in this paper. Theoretical analyses show that the MMPs (copper, zinc, bismuth, lead, and indium, for example) can be separated by vacuum metallurgy. The copper particles (0.15-0.20 mm) and zinc particles (<0.30 mm) were chosen to simulate the MMPs of crushed WPCBs. Experimental results show that the separated efficiency of zinc in the copper-rich particles achieves 96.19 wt % when the vacuum pressure is 0.01-0.10 Pa, the heating temperature is 1123 K, and the heating time is 105 min. Under this operation condition, the separated efficiency of zinc in the copper-rich particles from crushed WPCBs achieves 97.00 wt % and the copper purity increases from 90.68 to 99.84 wt %.

  4. Chemical inertness of UV-cured optical elastomers within the printed circuit board manufacturing process for embedded waveguide applications

    NASA Astrophysics Data System (ADS)

    Kruse, Kevin; Walczak, Karl; Thomas, Nicholas; Swatowski, Brandon; Demars, Casey; Middlebrook, Christopher

    2014-03-01

    Embedding polymer optical waveguides (WGs) into printed circuit boards (PCBs) for intra-board or board-to-board high speed data communications requires polymer materials that are compatible and inert when exposed to common PCB manufacturing processes. Ensuring both WG functionality after chemical exposure and maintaining PCB manufacturing integrities within the production process is crucial for successful implementation. The PCB manufacturing flow is analyzed to expose major requirements that would be required for the successful implementation of polymer materials for embedded WG development. Chemical testing and analysis were performed on Dow Corning ® OE-4140 UV-Cured Optical Elastomer Core and Dow Corning® OE-4141 UV-Cured Optical Elastomer Cladding which are designed for low loss embedded optical WGs. Contamination testing was conducted to demonstrate polymer compatibility in both cured and uncured form. Various PCB chemicals were treated with uncured polymer material and tested for effective contamination. Fully polymerized multimode WGs were fabricated and exposed to PCB chemicals at temperatures and durations comparable to PCB manufacturing conditions. Chemical analysis shows that the chosen polymer is compatible and inert with most common PCB manufacturing processes.

  5. Novel Application of Glass Fibers Recovered From Waste Printed Circuit Boards as Sound and Thermal Insulation Material

    NASA Astrophysics Data System (ADS)

    Sun, Zhixing; Shen, Zhigang; Ma, Shulin; Zhang, Xiaojing

    2013-10-01

    The aim of this study is to investigate the feasibility of using glass fibers, a recycled material from waste printed circuit boards (WPCB), as sound absorption and thermal insulation material. Glass fibers were obtained through a fluidized-bed recycling process. Acoustic properties of the recovered glass fibers (RGF) were measured and compared with some commercial sound absorbing materials, such as expanded perlite (EP), expanded vermiculite (EV), and commercial glass fiber. Results show that RGF have good sound absorption ability over the whole tested frequency range (100-6400 Hz). The average sound absorption coefficient of RGF is 0.86, which is prior to those of EP (0.81) and EV (0.73). Noise reduction coefficient analysis indicates that the absorption ability of RGF can meet the requirement of II rating for sound absorbing material according to national standard. The thermal insulation results show that RGF has a fair low thermal conductivity (0.046 W/m K), which is comparable to those of some insulation materials (i.e., EV, EP, and rock wool). Besides, an empirical dependence of thermal conductivity on material temperature was determined for RGF. All the results showed that the reuse of RGF for sound and thermal insulation material provided a promising way for recycling WPCB and obtaining high beneficial products.

  6. PACIFIC: the readout ASIC for the SciFi Tracker of the upgraded LHCb detector

    NASA Astrophysics Data System (ADS)

    Mazorra, J.; Chanal, H.; Comerma, A.; Gascón, D.; Gómez, S.; Han, X.; Pillet, N.; Vandaele, R.

    2016-02-01

    The LHCb detector will be upgraded during the Long Shutdown 2 (LS2) of the LHC in order to cope with higher instantaneous luminosities and will switch to a 40 MHz readout rate using a trigger-less software based system. All front-end electronics will be replaced and several sub-detectors must be redesigned to cope with the higher detector occupancy and radiation damage. The current tracking detectors downstream of the LHCb dipole magnet will be replaced by the Scintillating Fibre (SciFi) Tracker. The SciFi Tracker will use scintillating fibres read out by Silicon Photomultipliers (SiPMs). State-of-the-art multi-channel SiPM arrays are being developed and a custom ASIC, called the low-Power ASIC for the sCIntillating FIbres traCker (PACIFIC), will be used to digitise the signals from the SiPMs. This article presents an overview of the R&D for the PACIFIC. It is a 64-channel ASIC implemented in 130 nm CMOS technology, aiming at a radiation tolerant design with a power consumption below 10 mW per channel. It interfaces directly with the SiPM anode through a current mode input, and provides a configurable non-linear 2-bit per channel digital output. The SiPM signal is acquired by a current conveyor and processed with a fast shaper and a gated integrator. The digitization is performed using a three threshold non-linear flash ADC operating at 40 MHz. Simulation and test results show the PACIFIC chip prototypes functioning well.

  7. Cost optimization in low volume VLSI circuits

    NASA Technical Reports Server (NTRS)

    Cook, K. B., Jr.; Kerns, D. V., Jr.

    1982-01-01

    The relationship of integrated circuit (IC) cost to electronic system cost is developed using models for integrated circuit cost which are based on design/fabrication approach. Emphasis is on understanding the relationship between cost and volume for custom circuits suitable for NASA applications. In this report, reliability is a major consideration in the models developed. Results are given for several typical IC designs using off the shelf, full custom, and semicustom IC's with single and double level metallization.

  8. CLARO-CMOS, an ASIC for single photon counting with Ma-PMTs, MCPs and SiPMs

    NASA Astrophysics Data System (ADS)

    Carniti, P.; Cibinetto, G.; Cotta Ramusino, A.; Giachero, A.; Gotti, C.; Maino, M.; Malaguti, R.; Pessina, G.

    2013-01-01

    An ASIC named CLARO-CMOS was designed for fast photon counting with MaPMTs, MCPs and SiPMs. The prototype was realized in a .35 μm CMOS technology and has four channels, each with a fast amplifier and a discriminator. The main features of the design are the high speed of operation and the low power dissipation, below 1 mW per channel. This paper focuses on the use of the CLARO for SiPM readout. The ASIC was tested with several SiPMs of various sizes, connected to the input of the chip both directly and through a coaxial cable about one meter long. In the latter case the ASIC is still fully functional although the speed of response is affected by the cable capacitance. The threshold could be set just above the single photoelectron level, and with 1 ×1 mm2 SiPMs the discrete photoelectron peaks could be well resolved.

  9. A 0.18 micrometer CMOS Thermopile Readout ASIC Immune to 50 MRAD Total Ionizing Dose (SI) and Single Event Latchup to 174MeV-cm(exp 2)/mg

    NASA Technical Reports Server (NTRS)

    Quilligan, Gerard T.; Aslam, Shahid; Lakew, Brook; DuMonthier, Jeffery J.; Katz, Richard B.; Kleyner, Igor

    2014-01-01

    Radiation hardened by design (RHBD) techniques allow commercial CMOS circuits to operate in high total ionizing dose and particle fluence environments. Our radiation hard multi-channel digitizer (MCD) ASIC (Figure 1) is a versatile analog system on a chip (SoC) fabricated in 180nm CMOS. It provides 18 chopper stabilized amplifier channels, a 16- bit sigma-delta analog-digital converter (SDADC) and an on-chip controller. The MCD was evaluated at Goddard Space Flight Center and Texas A&M University's radiation effects facilities and found to be immune to single event latchup (SEL) and total ionizing dose (TID) at 174 MeV-cm(exp 2)/mg and 50 Mrad (Si) respectively.

  10. Performance and Calibration of H2RG Detectors and SIDECAR ASICs for the RATIR Camera

    NASA Technical Reports Server (NTRS)

    Fox, Ori D.; Kutyrev, Alexander S.; Rapchun, David A.; Klein, Christopher R.; Butler, Nathaniel R.; Bloom, Josh; de Diego, Jos A.; Simn Farah, Alejandro D.; Gehrels, Neil A.; Georgiev, Leonid; Gonzlez-Hernandez, J. Jess; Lee, William H.; Loose, Markus; Lotkin, Gennadiy; Moseley, Samuel H.; Prochaska, J. Xavier; Ramirez-Ruiz, Enrico; Richer, Michael G.; Robinson, Frederick D.; Romn-Zuniga, Carols; Samuel, Mathew V.; Sparr, Leroy M.; Watson, Alan M.

    2012-01-01

    The Reionization And Transient Infra,.Red (RATIR) camera has been built for rapid Gamma,.Ray Burst (GRE) followup and will provide simultaneous optical and infrared photometric capabilities. The infrared portion of this camera incorporates two Teledyne HgCdTe HAWAII-2RG detectors, controlled by Teledyne's SIDECAR ASICs. While other ground-based systems have used the SIDECAR before, this system also utilizes Teledyne's JADE2 interface card and IDE development environment. Together, this setup comprises Teledyne's Development Kit, which is a bundled solution that can be efficiently integrated into future ground-based systems. In this presentation, we characterize the system's read noise, dark current, and conversion gain.

  11. A 64ch readout module for PPD/MPPC/SiPM using EASIROC ASIC

    NASA Astrophysics Data System (ADS)

    Nakamura, Isamu; Ishijima, N.; Hanagaki, K.; Yoshimura, K.; Nakai, Y.; Ueno, K.

    2015-07-01

    A readout module for PPD/MPPC/GAPD/SiPM is developed using EASIROC ASIC. The module can handle 64 PPDs and has on-board bias power supply, ADC for energy measurement, 1 ns TDC on FPGA as well as 64ch Logic output for external trigger. Controls and data transfer are through SiTCP technology implemented in FPGA. The module has NIM format for convenience, but can be operated without crate with 5 V AC/DC converter. Basic performance of production module was tested and the results are presented in the poster.

  12. Operational Studies of Cadmium Zinc Telluride Microstrip Detectors using SVX ASIC Electronics

    NASA Astrophysics Data System (ADS)

    Krizmanic, John; Barbier, L. M.; Barthelmy, S.; Bartlett, L.; Birsa, F.; Gehrels, N.; Hanchak, C.; Kurczynski, P.; Odom, J.; Parsons, A.; Palmer, D.; Sheppard, D.; Snodgrass, S.; Stahle, C. M.; Teegarden, B.; Tueller, J.

    1997-04-01

    We have been investigating the operational properties of cadmium zinc telluride (CZT) microstrip detectors by using SVX ASIC readout electronics. This research is in conjunction with the development of a CZT-based, next generation gamma-ray telescope for use in the gamma-ray Burst ArcSecond Imaging and Spectroscopy (BASIS) experiment. CZT microstrip detectors with 128 channels and 100 micron strip pitch have been fabricated and were interfaced to SVX electronics at Goddard Space Flight Center. Experimental results involving position sensing, spectroscopy, and CZT operational properties will be presented.

  13. A wireless 64-channel ECoG recording electronic for implantable monitoring and BCI applications: WIMAGINE.

    PubMed

    Charvet, G; Foerster, M; Chatalic, G; Michea, A; Porcherot, J; Bonnet, S; Filipe, S; Audebert, P; Robinet, S; Josselin, V; Reverdy, J; D'Errico, R; Sauter, F; Mestais, C; Benabid, A L

    2012-01-01

    A wireless, low power, 64-channel data acquisition system named WIMAGINE has been designed for ElectroCorticoGram (ECoG) recording. This system is based on a custom integrated circuit (ASIC) for amplification and digitization on 64 channels. It allows the RF transmission (in the MICS band) of 32 ECoG recording channels (among 64 channels available) sampled at 1 kHz per channel with a 12-bit resolution. The device is powered wirelessly through an inductive link at 13.56 MHz able to provide 100mW (30mA at 3.3V). This integration is a first step towards an implantable device for brain activity monitoring and Brain-Computer Interface (BCI) applications. The main features of the WIMAGINE platform and its architecture will be presented, as well as its performances and in vivo studies. PMID:23366009

  14. Knockdown of ASIC1 and epithelial sodium channel subunits inhibits glioblastoma whole cell current and cell migration.

    PubMed

    Kapoor, Niren; Bartoszewski, Rafal; Qadri, Yawar J; Bebok, Zsuzsanna; Bubien, James K; Fuller, Catherine M; Benos, Dale J

    2009-09-01

    High grade gliomas such as glioblastoma multiforme express multiple members of the epithelial sodium channel (ENaC)/Degenerin family, characteristically displaying a basally active amiloride-sensitive cation current not seen in normal human astrocytes or lower grade gliomas. Using quantitative real time PCR, we have shown higher expression of ASIC1, alphaENaC, and gammaENaC in D54-MG human glioblastoma multiforme cells compared with primary human astrocytes. We hypothesize that this glioma current is mediated by a hybrid channel composed of a mixture of ENaC and acid-sensing ion channel (ASIC) subunits. To test this hypothesis we made dominant negative cDNAs for ASIC1, alphaENaC, gammaENaC, and deltaENaC. D54-MG cells transfected with the dominant negative constructs for ASIC1, alphaENaC, or gammaENaC showed reduced protein expression and a significant reduction in the amiloride-sensitive whole cell current as compared with untransfected D54-MG cells. Knocking down alphaENaC or gammaENaC also abolished the high P(K)(+)/P(Na)(+) of D54-MG cells. Knocking down deltaENaC in D54-MG cells reduced deltaENaC protein expression but had no effect on either the whole cell current or K(+) permeability. Using co-immunoprecipitation we show interactions between ASIC1, alphaENaC, and gammaENaC, consistent with these subunits interacting with each other to form an ion channel in glioma cells. We also found a significant inhibition of D54-MG cell migration after ASIC1, alphaENaC, or gammaENaC knockdown, consistent with the hypothesis that ENaC/Degenerin subunits play an important role in glioma cell biology. PMID:19561078

  15. Open Circuit Resonant (SansEC) Sensor Technology for Lightning Mitigation and Damage Detection and Diagnosis for Composite Aircraft Applications

    NASA Technical Reports Server (NTRS)

    Szatkowski, George N.; Dudley, Kenneth L.; Smith, Laura J.; Wang, Chuantong; Ticatch, Larry A.

    2014-01-01

    Traditional methods to protect composite aircraft from lightning strike damage rely on a conductive layer embedded on or within the surface of the aircraft composite skin. This method is effective at preventing major direct effect damage and minimizes indirect effects to aircraft systems from lightning strike attachment, but provides no additional benefit for the added parasitic weight from the conductive layer. When a known lightning strike occurs, the points of attachment and detachment on the aircraft surface are visually inspected and checked for damage by maintenance personnel to ensure continued safe flight operations. A new multi-functional lightning strike protection (LSP) method has been developed to provide aircraft lightning strike protection, damage detection and diagnosis for composite aircraft surfaces. The method incorporates a SansEC sensor array on the aircraft exterior surfaces forming a "Smart skin" surface for aircraft lightning zones certified to withstand strikes up to 100 kiloamperes peak current. SansEC sensors are open-circuit devices comprised of conductive trace spiral patterns sans (without) electrical connections. The SansEC sensor is an electromagnetic resonator having specific resonant parameters (frequency, amplitude, bandwidth & phase) which when electromagnetically coupled with a composite substrate will indicate the electrical impedance of the composite through a change in its resonant response. Any measureable shift in the resonant characteristics can be an indication of damage to the composite caused by a lightning strike or from other means. The SansEC sensor method is intended to diagnose damage for both in-situ health monitoring or ground inspections. In this paper, the theoretical mathematical framework is established for the use of open circuit sensors to perform damage detection and diagnosis on carbon fiber composites. Both computational and experimental analyses were conducted to validate this new method and system for

  16. Properties and application of a multichannel integrated circuit for low-artifact, patterned electrical stimulation of neural tissue

    PubMed Central

    Hottowy, Paweł; Skoczeń, Andrzej; Gunning, Deborah E.; Kachiguine, Sergei; Mathieson, Keith; Sher, Alexander; Wiącek, Piotr; Litke, Alan M.; Dąbrowski, Władysław

    2012-01-01

    Objective Modern multielectrode array (MEA) systems can record the neuronal activity from thousands of electrodes, but their ability to provide spatio-temporal patterns of electrical stimulation is very limited. Furthermore, the stimulus-related artifacts significantly limit the ability to record the neuronal responses to the stimulation. To address these issues, we designed a multichannel integrated circuit for patterned MEA-based electrical stimulation and evaluated its performance in experiments with isolated mouse and rat retina. Approach The Stimchip includes 64 independent stimulation channels. Each channel comprises an internal digital-to-analog converter that can be configured as a current or voltage source. The shape of the stimulation waveform is defined independently for each channel by the real-time data stream. In addition, each channel is equipped with circuitry for reduction of the stimulus artifact. Main results Using a high-density MEA stimulation/recording system, we effectively stimulated individual retinal ganglion cells (RGCs) and recorded the neuronal responses with minimal distortion, even on the stimulating electrodes. We independently stimulated a population of RGCs in rat retina and, using a complex spatio-temporal pattern of electrical stimulation pulses, we replicated visually-evoked spiking activity of a subset of these cells with high fidelity. Significance Compared with current state-of-the-art MEA systems, the Stimchip is able to stimulate neuronal cells with much more complex sequences of electrical pulses and with significantly reduced artifacts. This opens up new possibilities for studies of neuronal responses to electrical stimulation, both in the context of neuroscience research and in the development of neuroprosthetic devices. PMID:23160018

  17. Phase-rotation based receive-beamformer for miniaturized volumetric ultrasound imaging scanners using 2-D CMUT-on-ASIC arrays

    NASA Astrophysics Data System (ADS)

    Kim, Bae-Hyung; Lee, Seunghun; Song, Jongkeun; Kim, Youngil; Jeon, Taeho; Cho, Kyungil

    2013-03-01

    Up-to-date capacitive micromachined ultrasonic transducer (CMUT) technologies provide us unique opportunities to minimize the size and cost of ultrasound scanners by integrating front-end circuits into CMUT arrays. We describe a design prototype of a portable ultrasound scan-head probe using 2-D phased CMUT-on-ASIC arrays of 3-MHz 250 micrometer-pitch by fabricating and integrating front-end electronics with 2-D CMUT array elements. One of the objectives of our work is to design a receive beamformer architecture for the smart probe with compact size and comparable performance. In this work, a phase-rotation based receive beamformer using the sampling frequency of 4 times the center frequency and a hybrid beamforming to reduce the channel counts of the system-side are introduced. Parallel beamforming is considered for the purpose of saving power consumption of battery (by firing fewer times per image frame). This architecture has the advantage of directly obtaining I and Q components. By using the architecture, the interleaved I/Q data from the storage is acquired and I/Q demodulation for baseband processing is directly achieved without demodulators including sin and cosine lookup tables and mixers. Currently, we are extending the presented architecture to develop a true smart probe by including lower power devices and cooling systems, and bringing wireless data transmission into consideration.

  18. Hidden circuits and argumentation

    NASA Astrophysics Data System (ADS)

    Leinonen, Risto; Kesonen, Mikko H. P.; Hirvonen, Pekka E.

    2016-11-01

    Despite the relevance of DC circuits in everyday life and schools, they have been shown to cause numerous learning difficulties at various school levels. In the course of this article, we present a flexible method for teaching DC circuits at lower secondary level. The method is labelled as hidden circuits, and the essential idea underlying hidden circuits is in hiding the actual wiring of DC circuits, but to make their behaviour evident for pupils. Pupils are expected to find out the wiring of the circuit which should enhance their learning of DC circuits. We present two possible ways to utilise hidden circuits in a classroom. First, they can be used to test and enhance pupils’ conceptual understanding when pupils are expected to find out which one of the offered circuit diagram options corresponds to the actual circuit shown. This method aims to get pupils to evaluate the circuits holistically rather than locally, and as a part of that aim this method highlights any learning difficulties of pupils. Second, hidden circuits can be used to enhance pupils’ argumentation skills with the aid of argumentation sheet that illustrates the main elements of an argument. Based on the findings from our co-operating teachers and our own experiences, hidden circuits offer a flexible and motivating way to supplement teaching of DC circuits.

  19. No-warp potted circuits

    NASA Technical Reports Server (NTRS)

    Robinson, W. W.

    1979-01-01

    Sponge inserts compensate for potting-compound expansion and relieve thermal stresses on circuit boards. Technique quality of production runs on PC boards intended for applications in environments less severe than those for aerospace equipment. Pads reduce weight of modules because they weigh far less than potting compound they displace.

  20. Synchronous transfer circuits for redundant systems

    NASA Technical Reports Server (NTRS)

    Nagano, S.

    1978-01-01

    Circuit arrangements for flip-flops, counters, and clock drivers in redundant systems ensure that control is synchronously transferred to surviving components when failure occurs. In addition to original application to spacecraft systems, redundant circuits have terrestrial uses in power generators, solar-energy converters, computers, vehicle controllers, and other systems demanding high reliability.

  1. Q-switched laser prelase detection circuit

    NASA Technical Reports Server (NTRS)

    Lockard, George E.

    1991-01-01

    A compact electronic circuit was developed to detect prelasing in Q-swithed pulsed laser systems and once detected to shut down the laser before the next laser pulse occurs. The circuit is small, compact, and uses a minimum of components which makes it quite economical, thus readily lending itself to commercial applications. It can easily be incorporated into virtually any Q-switched laser system or reliability of a laser system by reducing a source of possible costly optical damage. The circuit operation and instrument requirements necessary to incorporate the circuit into a laser system are discussed.

  2. Spacecraft optical disk recorder memory buffer control

    NASA Technical Reports Server (NTRS)

    Hodson, Robert F.

    1992-01-01

    The goal of this project is to develop an Application Specific Integrated Circuit (ASIC) for use in the control electronics of the Spacecraft Optical Disk Recorder (SODR). Specifically, this project is to design an extendable memory buffer controller ASIC for rate matching between a system Input/Output port and the SODR's device interface. The aforementioned goal can be partitioned into the following sub-goals: (1) completion of ASIC design and simulation (on-going via ASEE fellowship); (2) ASIC Fabrication (at ASIC manufacturer); and (3) ASIC Testing (NASA/LaRC, Christopher Newport University).

  3. Conversed mutagenesis of an inactive peptide to ASIC3 inhibitor for active sites determination.

    PubMed

    Osmakov, Dmitry I; Koshelev, Sergey G; Andreev, Yaroslav A; Dyachenko, Igor A; Bondarenko, Dmitry A; Murashev, Arkadii N; Grishin, Eugene V; Kozlov, Sergey A

    2016-06-15

    Peptide Ugr9-1 from the venom of sea anemone Urticina grebelnyi selectively inhibits the ASIC3 channel and significantly reverses inflammatory and acid-induced pain in vivo. A close homolog peptide Ugr 9-2 does not have these features. To find the pharmacophore residues and explore structure-activity relationships of Ugr 9-1, we performed site-directed mutagenesis of Ugr 9-2 and replaced several positions by the corresponding residues from Ugr 9-1. Mutant peptides Ugr 9-2 T9F and Ugr 9-2 Y12H were able to inhibit currents of the ASIC3 channels 2.2 times and 1.3 times weaker than Ugr 9-1, respectively. Detailed analysis of the spatial models of Ugr 9-1, Ugr 9-2 and both mutant peptides revealed the presence of the basic-aromatic clusters on opposite sides of the molecule, each of which is responsible for the activity. Additionally, Ugr9-1 mutant with truncated N- and C-termini retained similar with the Ugr9-1 action in vitro and was equally potent in vivo model of thermal hypersensitivity. All together, these results are important for studying the structure-activity relationships of ligand-receptor interaction and for the future development of peptide drugs from animal toxins. PMID:26686983

  4. Immunohistochemical detection of the putative mechanoproteins ASIC2 and TRPV4 in avian herbst sensory corpuscles.

    PubMed

    Cabo, R; Gálvez, A; Laurà, R; San José, I; Pastor, J F; López-Muñiz, A; García-Suárez, O; Vega, J A

    2013-01-01

    The avian Herbst corpuscles are the equivalent of the Pacinian corpuscles in mammals, and detect vibration and the movement of joints and feathers. Therefore, they can be regarded as rapidly adapting low-threshold mechanoreceptors. In recent years, it has been establish that some ion channels are involved in mechanosensation and are present in both mechanosensory neurons and mechanoreceptors. Here we have used immunohistochemistry to localize some putative mechanoproteins in the Herbst corpuscles from the rictus of Columba livia. The proteins investigated were the subunits of the epithelial Na(+) channel (ENaC), the transient-receptor potential vanilloid 4 (TRPV4), and the acid-sensing ion channel 2 (ASIC2). Immunoreactivity for ENaC subunits was never found in Herbst corpuscles, while the axon expressed ASIC2 and TRPV4 immunoreactivity. Moreover, TRPV4 was also detected in the cell forming the inner core. The present results demonstrate for the first time the occurrence of mechanoproteins in avian low-threshold mechanoreceptors and provide further evidence for a possible role of the ion channels in mechanosensation.

  5. A low power biomedical signal processor ASIC based on hardware software codesign.

    PubMed

    Nie, Z D; Wang, L; Chen, W G; Zhang, T; Zhang, Y T

    2009-01-01

    A low power biomedical digital signal processor ASIC based on hardware and software codesign methodology was presented in this paper. The codesign methodology was used to achieve higher system performance and design flexibility. The hardware implementation included a low power 32bit RISC CPU ARM7TDMI, a low power AHB-compatible bus, and a scalable digital co-processor that was optimized for low power Fast Fourier Transform (FFT) calculations. The co-processor could be scaled for 8-point, 16-point and 32-point FFTs, taking approximate 50, 100 and 150 clock circles, respectively. The complete design was intensively simulated using ARM DSM model and was emulated by ARM Versatile platform, before conducted to silicon. The multi-million-gate ASIC was fabricated using SMIC 0.18 microm mixed-signal CMOS 1P6M technology. The die area measures 5,000 microm x 2,350 microm. The power consumption was approximately 3.6 mW at 1.8 V power supply and 1 MHz clock rate. The power consumption for FFT calculations was less than 1.5 % comparing with the conventional embedded software-based solution.

  6. Automatic generation of signal processing integrated circuits

    SciTech Connect

    Pope, S.P.

    1985-01-01

    A system for the automated design of signal processing integrated circuits is described in this thesis. The system is based on a library of circuit cells, and a software package that can configure the cells into complete integrated circuits. The architecture of the cell library is optimized for low and medium bandwidth digital signal processing applications. Circuits designed with the system use a multiprocessor architecture. Input to the system is a design file written in a specialized programming language. Software emulation from the design file is used to verify performance. A two-pass silicon compiler is used to translate the design file into a mask-level description of an integrated circuit. A major goal of the project is to make the system useable by those with little or no formal training in integrated circuits. A second goal is to reduce the time and cost associated with performing an integrated circuit design, while still producing designs which are reasonably efficient in their use of the technology. Development of the system was guided by basic research on appropriate architectures and circuit constructs for signal processors. As part of this research an integrated circuit was designed which performs speech analysis and synthesis. This vocoder circuit is intended for use in low-bit-rate digital speech transmission systems.

  7. MULTI-ELECTRODE TUBE PULSE MEMORY CIRCUIT

    DOEpatents

    Gundlach, J.C.; Reeves, J.B.

    1958-05-20

    Control circuits are described for pulse memory devices for scalers and the like, and more particularly to a driving or energizing circuit for a polycathode gaseous discharge tube having an elongated anode and a successive series of cathodes spaced opposite the anode along its length. The circuit is so arranged as to utilize an arc discharge between the anode and a cathode to count a series of pulses. Upon application of an input pulse the discharge is made to occur between the anode and the next successive cathode, and an output pulse is produced when a particular subsequent cathode is reached. The circuit means for transfering the discharge by altering the anode potential and potential of the cathodes and interconnecting the cathodes constitutes the novel aspects of the invention. A low response time and reduced number of circuit components are the practical advantages of the described circuit.

  8. Realizing a supercapacitor in an electrical circuit

    NASA Astrophysics Data System (ADS)

    Fukuhara, Mikio; Kuroda, Tomoyuki; Hasegawa, Fumihiko

    2014-11-01

    Capacitors are commonly used in electronic resonance circuits; however, capacitors have not been used for storing large amounts of electrical energy in electrical circuits. Here, we report a superior RC circuit which serves as an electrical storage system characterized by quick charging and long-term discharging of electricity. The improved energy storage characteristics in this mixed electric circuit (R1 + R2C1) with small resistor R1, large resistor R2, and large capacitor C1 are derived from the damming effect by large R2 in simple parallel R2C1 circuit. However, no research work has been carried out previously on the use of capacitors as electrical energy storage devices in circuits. Combined with nanotechnology, we hope that our finding will play a remarkable role in a variety of applications such as hybrid electric vehicles and backup power supplies.

  9. Microminiature radio frequency transmitter for communication and tracking applications

    NASA Astrophysics Data System (ADS)

    Crutcher, Richard I.; Emery, Mike S.; Falter, Kelly G.; Nowlin, C. H.; Rochelle, Jim M.; Clonts, Lloyd G.

    1997-02-01

    A micro-miniature radio frequency (rf) transmitter has been developed and demonstrated by the Oak Ridge National Laboratory. The objective of the rf transmitter development was to maximize the transmission distance while drastically shrinking the overall transmitter size, including antenna. Based on analysis and testing, an application-specific integrated circuit (ASIC) with a 16-GHz gallium arsenide (GaAs) oscillator and integrated on-chip antenna was designed and fabricated using microwave monolithic integrated circuit (MMIC) technology. Details of the development and the results of various field tests are discussed. The rf transmitter is applicable to covert surveillance and tracking scenarios due to its small size of 2.2 multiplied by 2.2 mm, including the antenna. Additionally, the 16-GHz frequency is well above the operational range of consumer-grade radio scanners, providing a degree of protection from unauthorized interception. Variations of the transmitter design have been demonstrated for tracking and tagging beacons, transmission of digital data, and transmission of real-time analog video from a surveillance camera. Preliminary laboratory measurements indicate adaptability to direct-sequence spread-spectrum transmission, providing a low probability of intercept and/or detection. Concepts related to law enforcement applications are presented.

  10. Protection circuits for superconducting magnets

    SciTech Connect

    Parsons, W.M.; Wood, R.J.

    1980-01-01

    As the technology of controlled nuclear fusion progresses, plans for new experimental reactors include much longer duty cycles than those of earlier experiments. Many of the magnet systems for these reactors must be superconducting due to the prolonged or continuous high current levels required. The large initial investment of a superconducting magnet system justifies a protective dump circuit. This circuit must operate if the magnet goes normal or in the event of failure of some of the critical auxiliary equipment. This paper examines two applications of superconducting magnet protection for fusion experiments. A novel dc interrupter being developed especially for this purpose is also discussed.

  11. Vertically Integrated Circuits at Fermilab

    SciTech Connect

    Deptuch, Grzegorz; Demarteau, Marcel; Hoff, James; Lipton, Ronald; Shenai, Alpana; Trimpl, Marcel; Yarema, Raymond; Zimmerman, Tom; /Fermilab

    2009-01-01

    The exploration of the vertically integrated circuits, also commonly known as 3D-IC technology, for applications in radiation detection started at Fermilab in 2006. This paper examines the opportunities that vertical integration offers by looking at various 3D designs that have been completed by Fermilab. The emphasis is on opportunities that are presented by through silicon vias (TSV), wafer and circuit thinning and finally fusion bonding techniques to replace conventional bump bonding. Early work by Fermilab has led to an international consortium for the development of 3D-IC circuits for High Energy Physics. The consortium has submitted over 25 different designs for the Fermilab organized MPW run organized for the first time.

  12. Charge regulation circuit

    DOEpatents

    Ball, Don G.

    1992-01-01

    A charge regulation circuit provides regulation of an unregulated voltage supply in the range of 0.01%. The charge regulation circuit is utilized in a preferred embodiment in providing regulated voltage for controlling the operation of a laser.

  13. Electrical Circuits and Water Analogies

    ERIC Educational Resources Information Center

    Smith, Frederick A.; Wilson, Jerry D.

    1974-01-01

    Briefly describes water analogies for electrical circuits and presents plans for the construction of apparatus to demonstrate these analogies. Demonstrations include series circuits, parallel circuits, and capacitors. (GS)

  14. Simple Cell Balance Circuit

    NASA Technical Reports Server (NTRS)

    Johnson, Steven D.; Byers, Jerry W.; Martin, James A.

    2012-01-01

    A method has been developed for continuous cell voltage balancing for rechargeable batteries (e.g. lithium ion batteries). A resistor divider chain is provided that generates a set of voltages representing the ideal cell voltage (the voltage of each cell should be as if the cells were perfectly balanced). An operational amplifier circuit with an added current buffer stage generates the ideal voltage with a very high degree of accuracy, using the concept of negative feedback. The ideal voltages are each connected to the corresponding cell through a current- limiting resistance. Over time, having the cell connected to the ideal voltage provides a balancing current that moves the cell voltage very close to that ideal level. In effect, it adjusts the current of each cell during charging, discharging, and standby periods to force the cell voltages to be equal to the ideal voltages generated by the resistor divider. The device also includes solid-state switches that disconnect the circuit from the battery so that it will not discharge the battery during storage. This solution requires relatively few parts and is, therefore, of lower cost and of increased reliability due to the fewer failure modes. Additionally, this design uses very little power. A preliminary model predicts a power usage of 0.18 W for an 8-cell battery. This approach is applicable to a wide range of battery capacities and voltages.

  15. Bioluminescent bioreporter integrated circuits (BBICs)

    NASA Astrophysics Data System (ADS)

    Simpson, Michael L.; Sayler, Gary S.; Nivens, David; Ripp, Steve; Paulus, Michael J.; Jellison, Gerald E.

    1998-07-01

    As the workhorse of the integrated circuit (IC) industry, the capabilities of CMOS have been expanded well beyond the original applications. The full spectrum of analog circuits from switched-capacitor filters to microwave circuit blocks, and from general-purpose operational amplifiers to sub- nanosecond analog timing circuits for nuclear physics experiments have been implemented in CMOS. This technology has also made in-roads into the growing area of monolithic sensors with devices such as active-pixel sensors and other electro-optical detection devices. While many of the processes used for MEMS fabrication are not compatible with the CMOS IC process, depositing a sensor material onto a previously fabricated CMOS circuit can create a very useful category of sensors. In this work we report a chemical sensor composed of bioluminescent bioreporters (genetically engineered bacteria) deposited onto a micro-luminometer fabricated in a standard CMOS IC process. The bioreporter used for this work emitted 490-nm light when exposed to toluene. This luminescence was detected by the micro- luminometer giving an indication of the concentration of toluene. Other bioluminescent bioreporters sensitive to explosives, mercury, and other organic chemicals and heavy metals have been reported. These could be incorporated (individually or in combination) with the micro-luminometer reported here to form a variety of chemical sensors.

  16. Low power Analog Digital Converter for a silicon photomultiplier readout ASIC

    NASA Astrophysics Data System (ADS)

    Briggl, K.; Chen, H.; Shen, W.; Schultz-Coulon, H. C.

    2015-04-01

    We present an ADC designed in the UMC 0.18um CMOS technology. It will be used in the SiPM analog front-end ``KLauS" developed for the analog hadronic calorimeter at ILD. Key parameter in this application is an extremely low power consumption of the front-end electronics. For quantization of the energy depositions, a 10-bit ADC resolution is required. For calibration purposes, a 12-bit quantization is used. A successive approximation register split capacitor array structure is chosen to minimize the DC power consumption. A peak sensing block is used to minimize the required sampling rate. We present design details and simulation results of the ADC, as well as the peak sensing track & hold circuit.

  17. Electrical Circuit Simulation Code

    SciTech Connect

    Wix, Steven D.; Waters, Arlon J.; Shirley, David

    2001-08-09

    Massively-Parallel Electrical Circuit Simulation Code. CHILESPICE is a massively-arallel distributed-memory electrical circuit simulation tool that contains many enhanced radiation, time-based, and thermal features and models. Large scale electronic circuit simulation. Shared memory, parallel processing, enhance convergence. Sandia specific device models.

  18. Piezoelectric drive circuit

    DOEpatents

    Treu, C.A. Jr.

    1999-08-31

    A piezoelectric motor drive circuit is provided which utilizes the piezoelectric elements as oscillators and a Meacham half-bridge approach to develop feedback from the motor ground circuit to produce a signal to drive amplifiers to power the motor. The circuit automatically compensates for shifts in harmonic frequency of the piezoelectric elements due to pressure and temperature changes. 7 figs.

  19. Piezoelectric drive circuit

    DOEpatents

    Treu, Jr., Charles A.

    1999-08-31

    A piezoelectric motor drive circuit is provided which utilizes the piezoelectric elements as oscillators and a Meacham half-bridge approach to develop feedback from the motor ground circuit to produce a signal to drive amplifiers to power the motor. The circuit automatically compensates for shifts in harmonic frequency of the piezoelectric elements due to pressure and temperature changes.

  20. The receptor site of the spider toxin PcTx1 on the proton-gated cation channel ASIC1a

    PubMed Central

    Salinas, Miguel; Rash, Lachlan D; Baron, Anne; Lambeau, Gérard; Escoubas, Pierre; Lazdunski, Michel

    2006-01-01

    Acid-sensing ion channels (ASICs) are excitatory neuronal cation channels, involved in physiopathological processes related to extracellular pH fluctuation such as nociception, ischaemia, perception of sour taste and synaptic transmission. The spider peptide toxin psalmotoxin 1 (PcTx1) has previously been shown to inhibit specifically the proton-gated cation channel ASIC1a. To identify the binding site of PcTx1, we produced an iodinated form of the toxin (125I-PcTx1YN) and developed a set of binding and electrophysiological experiments on several chimeras of ASIC1a and the PcTx1-insensitive channels ASIC1b and ASIC2a. We show that 125I-PcTx1YN binds specifically to ASIC1a at a single site, with an IC50 of 128 pm, distinct from the amiloride blocking site. Results obtained from chimeras indicate that PcTx1 does not bind to ASIC1a transmembrane domains (M1 and M2), involved in formation of the ion pore, but binds principally on both cysteine-rich domains I and II (CRDI and CRDII) of the extracellular loop. The post-M1 and pre-M2 regions, although not involved in the binding site, are crucial for the ability of PcTx1 to inhibit ASIC1a current. The linker domain between CRDI and CRDII is important for their correct spatial positioning to form the PcTx1 binding site. These results will be useful for the future identification or design of new molecules acting on ASICs. PMID:16284080

  1. CIRCUITS FOR CURRENT MEASUREMENTS

    DOEpatents

    Cox, R.J.

    1958-11-01

    Circuits are presented for measurement of a logarithmic scale of current flowing in a high impedance. In one form of the invention the disclosed circuit is in combination with an ionization chamber to measure lonization current. The particular circuit arrangement lncludes a vacuum tube having at least one grid, an ionization chamber connected in series with a high voltage source and the grid of the vacuum tube, and a d-c amplifier feedback circuit. As the ionization chamber current passes between the grid and cathode of the tube, the feedback circuit acts to stabilize the anode current, and the feedback voltage is a measure of the logaritbm of the ionization current.

  2. Tool for Crimping Flexible Circuit Leads

    NASA Technical Reports Server (NTRS)

    Hulse, Aaron; Diftler, Myron A.

    2009-01-01

    A hand tool has been developed for crimping leads in flexible tails that are parts of some electronic circuits -- especially some sensor circuits. The tool is used to cut the tails to desired lengths and attach solder tabs to the leads. For tailoring small numbers of circuits for special applications, this hand tool is a less expensive alternative to a commercially available automated crimping tool. The crimping tool consists of an off-the-shelf hand crimping tool plus a specialized crimping insert designed specifically for the intended application.

  3. Twin Neurons for Efficient Real-World Data Distribution in Networks of Neural Cliques: Applications in Power Management in Electronic Circuits.

    PubMed

    Boguslawski, Bartosz; Gripon, Vincent; Seguin, Fabrice; Heitzmann, Frédéric

    2016-02-01

    Associative memories are data structures that allow retrieval of previously stored messages given part of their content. They, thus, behave similarly to the human brain's memory that is capable, for instance, of retrieving the end of a song, given its beginning. Among different families of associative memories, sparse ones are known to provide the best efficiency (ratio of the number of bits stored to that of the bits used). Recently, a new family of sparse associative memories achieving almost optimal efficiency has been proposed. Their structure, relying on binary connections and neurons, induces a direct mapping between input messages and stored patterns. Nevertheless, it is well known that nonuniformity of the stored messages can lead to a dramatic decrease in performance. In this paper, we show the impact of nonuniformity on the performance of this recent model, and we exploit the structure of the model to improve its performance in practical applications, where data are not necessarily uniform. In order to approach the performance of networks with uniformly distributed messages presented in theoretical studies, twin neurons are introduced. To assess the adapted model, twin neurons are used with the real-world data to optimize power consumption of electronic circuits in practical test cases.

  4. SEMICONDUCTOR INTEGRATED CIRCUITS: Noise-canceling and IP3 improved CMOS RF front-end for DRM/DAB/DVB-H applications

    NASA Astrophysics Data System (ADS)

    Keping, Wang; Zhigong, Wang; Xuemei, Lei

    2010-02-01

    A CMOS RF (radio frequency) front-end for digital radio broadcasting applications is presented that contains a wideband LNA, I/Q-mixers and VGAs, supporting other various wireless communication standards in the ultra-wide frequency band from 200 kHz to 2 GHz as well. Improvement of the NF (noise figure) and IP3 (third-order intermodulation distortion) is attained without significant degradation of other performances like voltage gain and power consumption. The NF is minimized by noise-canceling technology, and the IP3 is improved by using differential multiple gate transistors (DMGTR). The dB-in-linear VGA (variable gain amplifier) exploits a single PMOS to achieve exponential gain control. The circuit is fabricated in 0.18-μm CMOS technology. The S11 of the RF front-end is lower than -11.4 dB over the whole band of 200 kHz-2 GHz. The variable gain range is 12-42 dB at 0.25 GHz and 4-36 dB at 2 GHz. The DSB NF at maximum gain is 3.1-6.1 dB. The IIP3 at middle gain is -4.7 to 0.2 dBm. It consumes a DC power of only 36 mW at 1.8 V supply.

  5. Teaching RLC Parallel Circuits in High-School Physics Class

    ERIC Educational Resources Information Center

    Simon, Alpár

    2015-01-01

    This paper will try to give an alternative treatment of the subject "parallel RLC circuits" and "resonance in parallel RLC circuits" from the Physics curricula for the XIth grade from Romanian high-schools, with an emphasis on practical type circuits and their possible applications, and intends to be an aid for both Physics…

  6. Tarantula toxins use common surfaces for interacting with Kv and ASIC ion channels.

    PubMed

    Gupta, Kanchan; Zamanian, Maryam; Bae, Chanhyung; Milescu, Mirela; Krepkiy, Dmitriy; Tilley, Drew C; Sack, Jon T; Yarov-Yarovoy, Vladimir; Kim, Jae Il; Swartz, Kenton J

    2015-01-01

    Tarantula toxins that bind to voltage-sensing domains of voltage-activated ion channels are thought to partition into the membrane and bind to the channel within the bilayer. While no structures of a voltage-sensor toxin bound to a channel have been solved, a structural homolog, psalmotoxin (PcTx1), was recently crystalized in complex with the extracellular domain of an acid sensing ion channel (ASIC). In the present study we use spectroscopic, biophysical and computational approaches to compare membrane interaction properties and channel binding surfaces of PcTx1 with the voltage-sensor toxin guangxitoxin (GxTx-1E). Our results show that both types of tarantula toxins interact with membranes, but that voltage-sensor toxins partition deeper into the bilayer. In addition, our results suggest that tarantula toxins have evolved a similar concave surface for clamping onto α-helices that is effective in aqueous or lipidic physical environments. PMID:25948544

  7. SAMPA chip: a new ASIC for the ALICE TPC and MCH upgrades

    NASA Astrophysics Data System (ADS)

    Barboza, S. H. I.; Bregant, M.; Chambert, V.; Espagnon, B.; Hernandez Herrera, H. D.; Mahmood, S. M.; Moraes, D.; Munhoz, M. G.; Noël, G.; Pilyar, A.; Russo, P.; Sanches, B. C. S.; Tambave, G. J.; Tun-Lanoë, K. M. M.; van Noije, W.; Velure, A.; Vereschagin, S.; Weber, T. O.; Zaporozhets, S.

    2016-02-01

    This paper presents the SAMPA, an ASIC designed for the upgrade of read-out front end electronics of the ALICE Time Projection Chamber (TPC) and Muon Chambers (MCH). SAMPA is made in a 130 nm CMOS technology with 1.25 V nominal voltage supply and includes 32 channels, with selectable input polarity, and five possible combinations of shaping time and sensitivity. Each channel comprises a Charge Sensitive Amplifier, a semi-Gaussian shaper and a 10-bit ADC, followed by a Digital Signal Processor. A prototype in a multi project run was submitted to evaluate the performance of each of these blocks. The experimental results of the tests on these building blocks are presented, showing a substantial agreement with requirements.

  8. Charge integrator and encoder ASIC for readout of the CMS hadron calorimeter photodetectors

    SciTech Connect

    A. Baumbaugh et al.

    1998-11-01

    A charge integrator and encoder ASIC is being developed at Fermilab for readout of the CMS hadron calorimeter photodetectors. The chip provides eight nonoverlapping ranges and is pipelined for deadtimeless operation. It is intended to be used with an FADC to digitize hybrid photodiode current pulses at 40 MHz. For each clock period, one range is selected depending on the signal magnitude, and the output of that range is fed to the FADC to form the mantissa. The selected range is encoded and output as a 3-bit digital exponent. Previous versions of this device have been designed for use with photomultipliers which can have high gain. Hybrid photodiodes have gains of only a few thousand so that a new version of the chip is needed which includes a current-mode preamplifier. The principle of the device is described and early results from a demonstrator project are presented.

  9. Parallel algorithm strategies for circuit simulation.

    SciTech Connect

    Thornquist, Heidi K.; Schiek, Richard Louis; Keiter, Eric Richard

    2010-01-01

    Circuit simulation tools (e.g., SPICE) have become invaluable in the development and design of electronic circuits. However, they have been pushed to their performance limits in addressing circuit design challenges that come from the technology drivers of smaller feature scales and higher integration. Improving the performance of circuit simulation tools through exploiting new opportunities in widely-available multi-processor architectures is a logical next step. Unfortunately, not all traditional simulation applications are inherently parallel, and quickly adapting mature application codes (even codes designed to parallel applications) to new parallel paradigms can be prohibitively difficult. In general, performance is influenced by many choices: hardware platform, runtime environment, languages and compilers used, algorithm choice and implementation, and more. In this complicated environment, the use of mini-applications small self-contained proxies for real applications is an excellent approach for rapidly exploring the parameter space of all these choices. In this report we present a multi-core performance study of Xyce, a transistor-level circuit simulation tool, and describe the future development of a mini-application for circuit simulation.

  10. Design methodology: edgeless 3D ASICs with complex in-pixel processing for pixel detectors

    SciTech Connect

    Fahim Farah, Fahim Farah; Deptuch, Grzegorz W.; Hoff, James R.; Mohseni, Hooman

    2015-08-28

    The design methodology for the development of 3D integrated edgeless pixel detectors with in-pixel processing using Electronic Design Automation (EDA) tools is presented. A large area 3 tier 3D detector with one sensor layer and two ASIC layers containing one analog and one digital tier, is built for x-ray photon time of arrival measurement and imaging. A full custom analog pixel is 65μm x 65μm. It is connected to a sensor pixel of the same size on one side, and on the other side it has approximately 40 connections to the digital pixel. A 32 x 32 edgeless array without any peripheral functional blocks constitutes a sub-chip. The sub-chip is an indivisible unit, which is further arranged in a 6 x 6 array to create the entire 1.248cm x 1.248cm ASIC. Each chip has 720 bump-bond I/O connections, on the back of the digital tier to the ceramic PCB. All the analog tier power and biasing is conveyed through the digital tier from the PCB. The assembly has no peripheral functional blocks, and hence the active area extends to the edge of the detector. This was achieved by using a few flavors of almost identical analog pixels (minimal variation in layout) to allow for peripheral biasing blocks to be placed within pixels. The 1024 pixels within a digital sub-chip array have a variety of full custom, semi-custom and automated timing driven functional blocks placed together. The methodology uses a modified mixed-mode on-top digital implementation flow to not only harness the tool efficiency for timing and floor-planning but also to maintain designer control over compact parasitically aware layout. The methodology uses the Cadence design platform, however it is not limited to this tool.

  11. Wireless miniature implantable devices and ASICs for monitoring, treatment, and study of glaucoma and cardiac disease

    NASA Astrophysics Data System (ADS)

    Chow, Eric Y.

    Glaucoma affects about 65 million people and is the second leading cause of blindness in the world. Although the condition is irreversible and incurable, early detection is vital to slowing and even stopping the progression of the disease. Our work focuses on the design, fabrication, and assembly of a continuous active glaucoma intraocular pressure (IOP) monitor that provides clinicians with the necessary data to more accurately diagnose and treat patients. Major benefits of an active monitoring device include the potential to develop a closed-loop treatment system and to operate independently for extended periods of time. The fully wireless operation uses gigahertzfrequency electromagnetic wave propagation, which allows for an orientation independent transfer of power and data over reasonable distances. Our system is comprised of a MEMS capacitive sensor, capacitive power storage array, ASIC, and monopole antenna assembled into a biocompatible liquid crystal polymer (LCP) package. We have performed in vivo trials on rabbits, both chronic and acute, to validate system functionality, fully wireless feasibility, and biocompatibility. Heart failure (HF) affects approximately 2% of the adult population in developed countries and 6-10% of people over the age of 65. Continuous monitoring of blood pressure, flow, and chemistry from a minimally invasive device can serve as a diagnostic and early-warning system for cardiac health. We developed a miniaturized system attached to the outer surface of an FDA approved stent, used as both the antenna for wireless telemetry/powering and structural support. The system comprises of a MEMS pressure sensor, ASIC for the sensor interface and wireless capabilities, LCP substrate, and FDA approved stent. In vivo studies on pigs validated functionality and fully wireless operation and demonstrate the feasibility of a stent-based wireless implant for continuous monitoring of blood pressure as well as other parameters including oxygen, flow

  12. Simple circuit for pacing hearts of experimental animals.

    PubMed

    Freeman, G L; Colston, J T

    1992-06-01

    In this paper we describe a simple pacing circuit which can be used to drive the heart over a wide range of rates. The circuit is an astable multivibrator, based on an LM555 integrated circuit. It is powered by a 9-V battery and is small enough for use in rabbits. The circuit is easily constructed and inexpensive, making it attractive for numerous applications in cardiovascular research.

  13. Method for analyzing radiation sensitivity of integrated circuits

    NASA Technical Reports Server (NTRS)

    Gauthier, M. K.; Stanley, A. G. (Inventor)

    1979-01-01

    A method for analyzing the radiation sensitivity of an integrated circuit is described to determine the components. The application of a narrow radiation beam to portions of the circuit is considered. The circuit is operated under normal bias conditions during the application of radiation in a dosage that is likely to cause malfunction of at least some transistors, while the circuit is monitored for failure of the irradiated transistor. When a radiation sensitive transistor is found, then the radiation beam is further narrowed and, using a fresh integrated circuit, a very narrow beam is applied to different parts of the transistor, such as its junctions, to locate the points of greatest sensitivity.

  14. A Spacecraft Housekeeping System-on-Chip in a Radiation Hardened Structured ASIC

    NASA Technical Reports Server (NTRS)

    Suarez, George; DuMonthier, Jeffrey J.; Sheikh, Salman S.; Powell, Wesley A.; King, Robyn L.

    2012-01-01

    Housekeeping systems are essential to health monitoring of spacecraft and instruments. Typically, sensors are distributed across various sub-systems and data is collected using components such as analog-to-digital converters, analog multiplexers and amplifiers. In most cases programmable devices are used to implement the data acquisition control and storage, and the interface to higher level systems. Such discrete implementations require additional size, weight, power and interconnect complexity versus an integrated circuit solution, as well as the qualification of multiple parts. Although commercial devices are readily available, they are not suitable for space applications due the radiation tolerance and qualification requirements. The Housekeeping System-o n-A-Chip (HKSOC) is a low power, radiation hardened integrated solution suitable for spacecraft and instrument control and data collection. A prototype has been designed and includes a wide variety of functions including a 16-channel analog front-end for driving and reading sensors, analog-to-digital and digital-to-analog converters, on-chip temperature sensor, power supply current sense circuits, general purpose comparators and amplifiers, a 32-bit processor, digital I/O, pulse-width modulation (PWM) generators, timers and I2C master and slave serial interfaces. In addition, the device can operate in a bypass mode where the processor is disabled and external logic is used to control the analog and mixed signal functions. The device is suitable for stand-alone or distributed systems where multiple chips can be deployed across different sub-systems as intelligent nodes with computing and processing capabilities.

  15. Source circuit design considerations

    NASA Technical Reports Server (NTRS)

    Noel, G. T.

    1983-01-01

    The cost of several circuit configurations for large (5MW) array fields were investigated to assess the relative costs of high and low voltage configurations. Three source circuit NOC voltages were evaluated: 400V (ungrounded), 800V (+ or 400V center grounded), and 2000V (+ or - 1000V center grounded). Four source circuit configurations were considered for each of the three NOC voltages. The configurations correspond to source circuit currents of 15, 30, 45, and 60 amperes, respectively. Conceptual layouts for 5MW building blocks for each of the above configurations were developed. The designs were optimized to minimize BOS electrical and structural costs. Only the BOS electrical costs were evaluated. The designs were broken down into the following elements for cost: (1) basic source circuit intermodule wiring, bypass diodes and associated hardware, source circuit to J-Box wiring, etc; (2) J-Box blocking diodes, varistors, heat sinks, and housing; (3) disconnects source circuit disconnects, fuses, and housing; (4) bus cabling J-Box to PCU interface wiring, and trenching; (5) interface bus bar, group disconnects, and fuses; and (6) fault detection shunts, signal wire, electronics, and alarm. It is concluded that high voltage low current circuits are not economical, at higher currents high and low voltage circuit costs approach each other, high voltage circuits are not likely to offer near term advantage, and development work/manufacturer stimulation is needed to develop low cost high voltage hardware.

  16. An infrastructure for accurate characterization of single-event transients in digital circuits.

    PubMed

    Savulimedu Veeravalli, Varadan; Polzer, Thomas; Schmid, Ulrich; Steininger, Andreas; Hofbauer, Michael; Schweiger, Kurt; Dietrich, Horst; Schneider-Hornstein, Kerstin; Zimmermann, Horst; Voss, Kay-Obbe; Merk, Bruno; Hajek, Michael

    2013-11-01

    We present the architecture and a detailed pre-fabrication analysis of a digital measurement ASIC facilitating long-term irradiation experiments of basic asynchronous circuits, which also demonstrates the suitability of the general approach for obtaining accurate radiation failure models developed in our FATAL project. Our ASIC design combines radiation targets like Muller C-elements and elastic pipelines as well as standard combinational gates and flip-flops with an elaborate on-chip measurement infrastructure. Major architectural challenges result from the fact that the latter must operate reliably under the same radiation conditions the target circuits are exposed to, without wasting precious die area for a rad-hard design. A measurement architecture based on multiple non-rad-hard counters is used, which we show to be resilient against double faults, as well as many triple and even higher-multiplicity faults. The design evaluation is done by means of comprehensive fault injection experiments, which are based on detailed Spice models of the target circuits in conjunction with a standard double-exponential current injection model for single-event transients (SET). To be as accurate as possible, the parameters of this current model have been aligned with results obtained from 3D device simulation models, which have in turn been validated and calibrated using micro-beam radiation experiments at the GSI in Darmstadt, Germany. For the latter, target circuits instrumented with high-speed sense amplifiers have been used for analog SET recording. Together with a probabilistic analysis of the sustainable particle flow rates, based on a detailed area analysis and experimental cross-section data, we can conclude that the proposed architecture will indeed sustain significant target hit rates, without exceeding the resilience bound of the measurement infrastructure. PMID:24748694

  17. An infrastructure for accurate characterization of single-event transients in digital circuits.

    PubMed

    Savulimedu Veeravalli, Varadan; Polzer, Thomas; Schmid, Ulrich; Steininger, Andreas; Hofbauer, Michael; Schweiger, Kurt; Dietrich, Horst; Schneider-Hornstein, Kerstin; Zimmermann, Horst; Voss, Kay-Obbe; Merk, Bruno; Hajek, Michael

    2013-11-01

    We present the architecture and a detailed pre-fabrication analysis of a digital measurement ASIC facilitating long-term irradiation experiments of basic asynchronous circuits, which also demonstrates the suitability of the general approach for obtaining accurate radiation failure models developed in our FATAL project. Our ASIC design combines radiation targets like Muller C-elements and elastic pipelines as well as standard combinational gates and flip-flops with an elaborate on-chip measurement infrastructure. Major architectural challenges result from the fact that the latter must operate reliably under the same radiation conditions the target circuits are exposed to, without wasting precious die area for a rad-hard design. A measurement architecture based on multiple non-rad-hard counters is used, which we show to be resilient against double faults, as well as many triple and even higher-multiplicity faults. The design evaluation is done by means of comprehensive fault injection experiments, which are based on detailed Spice models of the target circuits in conjunction with a standard double-exponential current injection model for single-event transients (SET). To be as accurate as possible, the parameters of this current model have been aligned with results obtained from 3D device simulation models, which have in turn been validated and calibrated using micro-beam radiation experiments at the GSI in Darmstadt, Germany. For the latter, target circuits instrumented with high-speed sense amplifiers have been used for analog SET recording. Together with a probabilistic analysis of the sustainable particle flow rates, based on a detailed area analysis and experimental cross-section data, we can conclude that the proposed architecture will indeed sustain significant target hit rates, without exceeding the resilience bound of the measurement infrastructure.

  18. PcTx1 affords neuroprotection in a conscious model of stroke in hypertensive rats via selective inhibition of ASIC1a.

    PubMed

    McCarthy, Claudia A; Rash, Lachlan D; Chassagnon, Irène R; King, Glenn F; Widdop, Robert E

    2015-12-01

    Acid-sensing ion channel 1a (ASIC1a) is the primary acid sensor in mammalian brain and plays a major role in neuronal injury following cerebral ischemia. Evidence that inhibition of ASIC1a might be neuroprotective following stroke was previously obtained using "PcTx1 venom" from the tarantula Psalmopeous cambridgei. We show here that the ASIC1a-selective blocker PcTx1 is present at only 0.4% abundance in this venom, leading to uncertainty as to whether the observed neuroprotective effects were due to PcTx1 blockade of ASIC1a or inhibition of other ion channels and receptors by the hundreds of peptides and small molecules present in the venom. We therefore examined whether pure PcTx1 is neuroprotective in a conscious model of stroke via direct inhibition of ASIC1a. A focal reperfusion model of stroke was induced in conscious spontaneously hypertensive rats (SHR) by administering endothelin-1 to the middle cerebral artery via a surgically implanted cannula. Two hours later, SHR were treated with a single intracerebroventricular (i.c.v.) dose of PcTx1 (1 ng/kg), an ASIC1a-inactive mutant of PcTx1 (1 ng/kg), or saline, and ledged beam and neurological tests were used to assess the severity of symptomatic changes. PcTx1 markedly reduced cortical and striatal infarct volumes measured 72 h post-stroke, which correlated with improvements in neurological score, motor function and preservation of neuronal architecture. In contrast, the inactive PcTx1 analogue had no effect on stroke outcome. This is the first demonstration that selective pharmacological inhibition of ASIC1a is neuroprotective in conscious SHRs, thus validating inhibition of ASIC1a as a potential treatment for stroke. PMID:26320544

  19. The function and regulation of acid-sensing ion channels (ASICs) and the epithelial Na(+) channel (ENaC): IUPHAR Review 19.

    PubMed

    Boscardin, Emilie; Alijevic, Omar; Hummler, Edith; Frateschi, Simona; Kellenberger, Stephan

    2016-09-01

    Acid-sensing ion channels (ASICs) and the epithelial Na(+) channel (ENaC) are both members of the ENaC/degenerin family of amiloride-sensitive Na(+) channels. ASICs act as proton sensors in the nervous system where they contribute, besides other roles, to fear behaviour, learning and pain sensation. ENaC mediates Na(+) reabsorption across epithelia of the distal kidney and colon and of the airways. ENaC is a clinically used drug target in the context of hypertension and cystic fibrosis, while ASIC is an interesting potential target. Following a brief introduction, here we will review selected aspects of ASIC and ENaC function. We discuss the origin and nature of pH changes in the brain and the involvement of ASICs in synaptic signalling. We expose how in the peripheral nervous system, ASICs cover together with other ion channels a wide pH range as proton sensors. We introduce the mechanisms of aldosterone-dependent ENaC regulation and the evidence for an aldosterone-independent control of ENaC activity, such as regulation by dietary K(+) . We then provide an overview of the regulation of ENaC by proteases, a topic of increasing interest over the past few years. In spite of the profound differences in the physiological and pathological roles of ASICs and ENaC, these channels share many basic functional and structural properties. It is likely that further research will identify physiological contexts in which ASICs and ENaC have similar or overlapping roles. PMID:27278329

  20. Regenerative feedback resonant circuit

    DOEpatents

    Jones, A. Mark; Kelly, James F.; McCloy, John S.; McMakin, Douglas L.

    2014-09-02

    A regenerative feedback resonant circuit for measuring a transient response in a loop is disclosed. The circuit includes an amplifier for generating a signal in the loop. The circuit further includes a resonator having a resonant cavity and a material located within the cavity. The signal sent into the resonator produces a resonant frequency. A variation of the resonant frequency due to perturbations in electromagnetic properties of the material is measured.

  1. Remote reset circuit

    DOEpatents

    Gritzo, Russell E.

    1987-01-01

    A remote reset circuit acts as a stand-alone monitor and controller by clocking in each character sent by a terminal to a computer and comparing it to a given reference character. When a match occurs, the remote reset circuit activates the system's hardware reset line. The remote reset circuit is hardware based centered around monostable multivibrators and is unaffected by system crashes, partial serial transmissions, or power supply transients.

  2. Remote reset circuit

    DOEpatents

    Gritzo, R.E.

    1985-09-12

    A remote reset circuit acts as a stand-along monitor and controller by clocking in each character sent by a terminal to a computer and comparing it to a given reference character. When a match occurs, the remote reset circuit activates the system's hardware reset line. The remote reset circuit is hardware based centered around monostable multivibrators and is unaffected by system crashes, partial serial transmissions, or power supply transients. 4 figs.

  3. Continuous, Full-Circle Arctangent Circuit

    NASA Technical Reports Server (NTRS)

    Alhorn, Dean C.; Howard, David E.; Smith, Dennis A.

    2005-01-01

    A circuit generates an analog voltage proportional to an angle, in response to two sinusoidal input voltages having magnitudes proportional to the sine and cosine of the angle, respectively. That is to say, given input voltages proportional to sin(Omega(t))sin(Theta) and sin(Omega(t))cos(Theta) [where Theta denotes the angle, mega denotes 2(pi) x a carrier frequency, and t denotes time], the circuit generates a steady voltage proportional to Theta. The output voltage varies continuously from its minimum to its maximum value as Theta varies from -180deg to 180deg. While the circuit could accept input modulated sine and cosine signals from any source, it must be noted that such signals are typical of the outputs of shaft-angle resolvers in electromagnetic actuators used to measure and control shaft angles for diverse purposes like aiming scientific instruments and adjusting valve openings. In effect, the circuit is an analog computer that calculates the arctangent of the ratio between the sine and cosine signals. The full-circle angular range of this arctangent circuit stands in contrast to the range of prior analog arctangent circuits, which is from slightly greater than -90deg to slightly less than +90deg. Moreover, for applications in which continuous variation of output is preferred to discrete increments of output, this circuit offers a clear advantage over resolver- to-digital integrated circuits.

  4. Fast Overcurrent Tripping Circuit

    NASA Technical Reports Server (NTRS)

    Sullender, Craig C.; Davies, Bryan L.; Osborn, Stephen H.

    1993-01-01

    Fast overcurrent tripping circuit designed for incorporation into power metal oxide/semiconductor field-effect transistor (MOSFET) switching circuit. Serves as fast electronic circuit breaker by sensing voltage across MOSFET's during conduction and switching MOSFET's off within 1 microsecond after voltage exceeds reference value corresponding to tripping current. Acts more quickly than Hall-effect current sensor and, in comparison with shunt current-measuring circuits, smaller and consumes less power. Also ignores initial transient overcurrents during first 5 microseconds of switching cycle.

  5. Printed circuit board industry.

    PubMed

    LaDou, Joseph

    2006-05-01

    The printed circuit board is the platform upon which microelectronic components such as semiconductor chips and capacitors are mounted. It provides the electrical interconnections between components and is found in virtually all electronics products. Once considered low technology, the printed circuit board is evolving into a high-technology product. Printed circuit board manufacturing is highly complicated, requiring large equipment investments and over 50 process steps. Many of the high-speed, miniaturized printed circuit boards are now manufactured in cleanrooms with the same health and safety problems posed by other microelectronics manufacturing. Asia produces three-fourths of the world's printed circuit boards. In Asian countries, glycol ethers are the major solvents used in the printed circuit board industry. Large quantities of hazardous chemicals such as formaldehyde, dimethylformamide, and lead are used by the printed circuit board industry. For decades, chemically intensive and often sloppy manufacturing processes exposed tens of thousands of workers to a large number of chemicals that are now known to be reproductive toxicants and carcinogens. The printed circuit board industry has exposed workers to high doses of toxic metals, solvents, acids, and photolithographic chemicals. Only recently has there been any serious effort to diminish the quantity of lead distributed worldwide by the printed circuit board industry. Billions of electronics products have been discarded in every region of the world. This paper summarizes recent regulatory and enforcement efforts. PMID:16580876

  6. Micro-miniature radio frequency transmitter for communication and tracking applications

    SciTech Connect

    Crutcher, R.I.; Emery, M.S.; Falter, K.G.; Nowlin, C.H.; Rochelle, J.M.; Clonts, L.G.

    1996-12-31

    A micro-miniature radio frequency (rf) transmitter has been developed and demonstrated by the Oak Ridge National Laboratory. The objective of the rf transmitter development was to maximize the transmission distance while drastically shrinking the overall transmitter size, including antenna. Based on analysis and testing, an application-specific integrated circuit (ASIC) with a 16-GHz gallium arsenide (GaAs) oscillator and integrated on-chip antenna was designed and fabricated using microwave monolithic integrated circuit (MMIC) technology. Details of the development and the results of various field tests will be discussed. The rf transmitter is applicable to covert surveillance and tracking scenarios due to its small size of 2.2 x 2.2 mm, including the antenna. Additionally, the 16-GHz frequency is well above the operational range of consumer-grade radio scanners, providing a degree of protection from unauthorized interception. Variations of the transmitter design have been demonstrated for tracking and tagging beacons, transmission of digital data, and transmission of real-time analog video from a surveillance camera. Preliminary laboratory measurements indicate adaptability to direct-sequence spread-spectrum transmission, providing a low probability of intercept and/or detection. Concepts related to law enforcement applications will be presented.

  7. Matched filter design optimisation for UWB receiver for sensor network application

    NASA Astrophysics Data System (ADS)

    Naik, Rohit; Singh, Jugdutt; Veljanovski, Ronny

    2005-12-01

    Ultra Wideband (UWB) communications is one of the possible solutions for future wireless personal area network (WPAN) applications. The Federal Communications Commission (FCC), in the USA, allocated 7.5 GHz of unlicensed frequency bandwidth from 3.1 GHz to 10.6 GHz for UWB communication. It is an available spectrum which can be utilised for data communication using different technologies complying with FCC regulations. This paper presents a brief overview of the world wide regulations and Institute of Electrical and Electronic Engineers (IEEE) standardisation updates for UWB. It also focuses on the wireless sensor network application and the use of UWB communications in biomedical sensor networks. The paper aims at the design and implementation of an optimised pulsed matched filter (OPMF) used in the digital backend of a UWB radio. The optimisations are performed at the architectural and circuit level in order to reduce hardware complexity and reduced power. The OPMF is successfully implemented using the application specific integrated circuit (ASIC) design methodology and the results are compared with those obtained in previous implementation. The OPMF implementation presented in this paper yields improved characteristics such as reduction in area, almost 25% power reduction and better timing.

  8. Fluence Uniformity Measurements in an Electron Accelerator Used for Irradiation of Extended Area Solar Cells and Electronic Circuits for Space Applications

    NASA Technical Reports Server (NTRS)

    Uribe, Roberto M.; Filppi, Ed; Zhang, Shubo

    2007-01-01

    It is common to have liquid crystal displays and electronic circuit boards with area sizes of the order of 20x20 sq cm on board of satellites and space vehicles. Usually irradiating them at different fluence values assesses the radiation damage in these types of devices. As a result, there is a need for a radiation source with large spatial fluence uniformity for the study of the damage by radiation from space in those devices. Kent State University s Program on Electron Beam Technology has access to an electron accelerator used for both research and industrial applications. The electron accelerator produces electrons with energies in the interval from 1 to 5 MeV and a maximum beam power of 150 kW. At such high power levels, the electron beam is continuously scanned back and forth in one dimension in order to provide uniform irradiation and to prevent damage to the sample. This allows for the uniform irradiation of samples with an area of up to 1.32 sq m. This accelerator has been used in the past for the study of radiation damage in solar cells (1). However in order to irradiate extended area solar cells there was a need to measure the uniformity of the irradiation zone in terms of fluence. In this paper the methodology to measure the fluence uniformity on a sample handling system (linear motion system), used for the irradiation of research samples, along the irradiation zone of the above-mentioned facility is described and the results presented. We also illustrate the use of the electron accelerator for the irradiation of large area solar cells (of the order of 156 sq cm) and include in this paper the electrical characterization of these types of solar cells irradiated with 5 MeV electrons to a total fluence of 2.6 x 10(exp 15) e/sq cm.

  9. Piezo-optomechanical circuits

    NASA Astrophysics Data System (ADS)

    Coimbatore Balram, Krishna; Davanco, Marcelo; Ilic, B. Robert; Srinivasan, Kartik

    Coherent links between the optical, radio frequency (RF), and mechanical domains are critical for applications ranging from quantum state transfer between the RF and optical domains to signal processing in the acoustic domain for microwave photonics. We develop such a piezo optomechanical circuit platform in GaAs, in which localized and interacting 1550 nm photons and 2.4 GHz phonons are combined with photonic and phononic waveguides. GaAs allows us to exploit the photoelastic effect to engineer cavities with strong optomechanical coupling (g0/2 π ~ 1.1 MHz) and the piezoelectric effect to couple RF fields to mechanical motion through surface acoustic waves, which are routed on-chip using phononic crystal waveguides. This platform enables optical readout of electrically-injected mechanical states with an average coherent intracavity phonon number as small as ~0.05 and the ability to drive mechanical motion with equal facility through either the optical or electrical channel. This is used to demonstrate a novel acoustic wave interference effect in which optically-driven motion is completely cancelled by electrically-driven motion, and vice versa. As an application of this, we present time-domain measurements of optically-controlled acoustic pulse propagation. Secondary Affiliation is Maryland Nanocenter, University of Maryland, College Park, MD.

  10. Noise isolation system for high-speed circuits

    DOEpatents

    McNeilly, David R.

    1986-01-01

    A noise isolation circuit is provided that consists of a dual function bypass which confines high-speed switching noise to the component or circuit which generates it and isolates the component or circuit from high-frequency noise transients which may be present on the ground and power supply busses. A local circuit ground is provided which is coupled to the system ground by sufficient impedance to force the dissipation of the noise signal in the local circuit or component generating the noise. The dual function bypass network couples high-frequency noise signals generated in the local component or circuit through a capacitor to the local ground while isolating the component or circuit from noise signals which may be present on the power supply busses or system ground. The network is an effective noise isolating system and is applicable to both high-speed analog and digital circuits.

  11. Noise isolation system for high-speed circuits

    DOEpatents

    McNeilly, D.R.

    1983-12-29

    A noise isolation circuit is provided that consists of a dual function bypass which confines high-speed switching noise to the component or circuit which generates it and isolates the component or circuit from high-frequency noise transients which may be present on the ground and power supply busses. A local circuit ground is provided which is coupled to the system ground by sufficient impedance to force the dissipation of the noise signal in the local circuit or component generating the noise. The dual function bypass network couples high-frequency noise signals generated in the local component or circuit through a capacitor to the local ground while isolating the component or circuit from noise signals which may be present on the power supply busses or system ground. The network is an effective noise isolating system and is applicable to both high-speed analog and digital circuits.

  12. Development of New European VLIW Space DSP ASICS, IP Cores and Related Software via ESA Contracts in 2015 and Beyond

    NASA Astrophysics Data System (ADS)

    Trautner, R.

    2015-09-01

    European space industry needs a new generation of payload data processors in order to cope with in-creasing payload data processing requirements. ESA has defined a roadmap for the development of future payload processor hardware which is being implemented. A key part of this roadmap addresses the development of VLIW Digital Signal Processor (DSP) ASICs, IP cores and associated software. In this paper, we first present an overview of the ESA roadmap and the key development routes. We recapitulate the activities that have created the technology base for the ongoing DSP development, and present the ASIC development and several accompanying activities that will lead to the availability of a new space qualified DSP - the Scalable Sensor Data Processor (SSDP) - in the near future. We then present the expected future evolution of this technology area, and summarize the corresponding ESA roadmap part on VLIW DSPs and related IP and software.

  13. Tensor network characterization of superconducting circuits

    NASA Astrophysics Data System (ADS)

    Duclos-Cianci, Guillaume; Poulin, David; Najafi-Yazdi, Alireza

    Superconducting circuits are promising candidates in the development of reliable quantum computing devices. In principle, one can obtain the Hamiltonian of a generic superconducting circuit and solve for its eigenvalues to obtain its energy spectrum. In practice, however, the computational cost of calculating eigenvalues of a complex device with many degrees of freedom can become prohibitively expensive. In the present work, we investigate the application of tensor network algorithms to enable efficient and accurate characterization of superconducting circuits comprised of many components. Suitable validation test cases are performed to study the accuracy, computational efficiency and limitations of the proposed approach.

  14. Overload protection circuit for output driver

    DOEpatents

    Stewart, Roger G.

    1982-05-11

    A protection circuit for preventing excessive power dissipation in an output transistor whose conduction path is connected between a power terminal and an output terminal. The protection circuit includes means for sensing the application of a turn on signal to the output transistor and the voltage at the output terminal. When the turn on signal is maintained for a period of time greater than a given period without the voltage at the output terminal reaching a predetermined value, the protection circuit decreases the turn on signal to, and the current conduction through, the output transistor.

  15. DC isolation and protection system and circuit

    NASA Technical Reports Server (NTRS)

    Wagner, Charles A. (Inventor); Kellogg, Gary V. (Inventor)

    1991-01-01

    A precision analog electronic circuit that is capable of sending accurate signals to an external device that has hostile electric characteristics, including the presence of very large common mode voltages. The circuit is also capable of surviving applications of normal mode overvoltages of up to 120 VAC/VDC for unlimited periods of time without damage or degradation. First, the circuit isolates the DC signal output from the computer. Means are then provided for amplifying the isolated DC signal. Further means are provided for stabilizing and protecting the isolating and amplifying means, and the isolated and amplified DC signal which is output to the external device, against overvoltages and overcurrents.

  16. Application-specific coarse-grained reconfigurable array: architecture and design methodology

    NASA Astrophysics Data System (ADS)

    Zhou, Li; Liu, Dongpei; Zhang, Jianfeng; Liu, Hengzhu

    2015-06-01

    Coarse-grained reconfigurable arrays (CGRAs) have shown potential for application in embedded systems in recent years. Numerous reconfigurable processing elements (PEs) in CGRAs provide flexibility while maintaining high performance by exploring different levels of parallelism. However, a difference remains between the CGRA and the application-specific integrated circuit (ASIC). Some application domains, such as software-defined radios (SDRs), require flexibility with performance demand increases. More effective CGRA architectures are expected to be developed. Customisation of a CGRA according to its application can improve performance and efficiency. This study proposes an application-specific CGRA architecture template composed of generic PEs (GPEs) and special PEs (SPEs). The hardware of the SPE can be customised to accelerate specific computational patterns. An automatic design methodology that includes pattern identification and application-specific function unit generation is also presented. A mapping algorithm based on ant colony optimisation is provided. Experimental results on the SDR target domain show that compared with other ordinary and application-specific reconfigurable architectures, the CGRA generated by the proposed method performs more efficiently for given applications.

  17. A Radiation Hard Multi-Channel Digitizer ASIC for Operation in the Harsh Jovian Environment

    NASA Technical Reports Server (NTRS)

    Aslam, Shahid; Aslam, S.; Akturk, A.; Quilligan, G.

    2011-01-01

    ultimately impact the surface of Europa after the mission is completed. The current JEO mission concept includes a range of instruments on the payload, to monitor dynamic phenomena (such as Io's volcanoes and Jupiters atmosphere), map the Jovian magnetosphere and its interactions with the Galilean satellites, and characterize water oceans beneath the ice shells of Europa and Ganymede. The payload includes a low mass (3.7 Kg) and low power (< 5 W) Thermal Instrument (TI) concept for measuring possible warm thermal anomalies on Europa s cold surface caused by recent (< 10,000 years) eruptive activity. Regions of anomalously high heat flow will be identified by thermal mapping using a nadir pointing, push-broom filter radiometer that provides far-IR imagery in two broad band spectral wavelength regions, 8-20 m and 20-100 m, for surface temperature measurements with better than a 2 K accuracy and a spatial resolution of 250 m/pixel obtained from a 100 Km orbit. The temperature accuracy permits a search for elevated temperatures when combined with albedo information. The spatial resolution is sufficient to resolve Europa's larger cracks and ridge axial valleys. In order to accomplish the thermal mapping, the TI uses sensitive thermopile arrays that are readout by a custom designed low-noise Multi-Channel Digitizer (MCD) ASIC that resides very close to the thermopile linear array outputs. Both the thermopile array and the MCD ASIC will need to show full functionality within the harsh Jovian radiation environment, operating at cryogenic temperatures, typically 150 K to 170 K. In the following, a radiation mitigation strategy together with a low risk Radiation-Hardened-By-Design (RHBD) methodology using commercial foundry processes is given for the design and manufacture of a MCD ASIC that will meet this challenge.

  18. Simple digital pulse-programing circuit

    NASA Technical Reports Server (NTRS)

    Langston, J. L.

    1979-01-01

    Pulse-sequencing circuit uses only shift register and Exclusive-OR gates. Circuit also serves as date-transition edge detector (for rising or falling edges). It is used in sample-and-hold, analog-to-digital conversion sequence control, multiphase clock logic, precise delay control computer control logic, edge detectors, other timing applications, and provides simple means to generate timing and control signals for data transfer, addressing, or mode control in microprocessors and minicomputers.

  19. A Virtual Circuits Lab

    ERIC Educational Resources Information Center

    Vick, Matthew E.

    2010-01-01

    The University of Colorado's Physics Education Technology (PhET) website offers free, high-quality simulations of many physics experiments that can be used in the classroom. The Circuit Construction Kit, for example, allows students to safely and constructively play with circuit components while learning the mathematics behind many circuit…

  20. Genetic circuit design automation.

    PubMed

    Nielsen, Alec A K; Der, Bryan S; Shin, Jonghyeon; Vaidyanathan, Prashant; Paralanov, Vanya; Strychalski, Elizabeth A; Ross, David; Densmore, Douglas; Voigt, Christopher A

    2016-04-01

    Computation can be performed in living cells by DNA-encoded circuits that process sensory information and control biological functions. Their construction is time-intensive, requiring manual part assembly and balancing of regulator expression. We describe a design environment, Cello, in which a user writes Verilog code that is automatically transformed into a DNA sequence. Algorithms build a circuit diagram, assign and connect gates, and simulate performance. Reliable circuit design requires the insulation of gates from genetic context, so that they function identically when used in different circuits. We used Cello to design 60 circuits forEscherichia coli(880,000 base pairs of DNA), for which each DNA sequence was built as predicted by the software with no additional tuning. Of these, 45 circuits performed correctly in every output state (up to 10 regulators and 55 parts), and across all circuits 92% of the output states functioned as predicted. Design automation simplifies the incorporation of genetic circuits into biotechnology projects that require decision-making, control, sensing, or spatial organization.

  1. Computer circuit card puller

    NASA Technical Reports Server (NTRS)

    Sawyer, R. V.; Szuwalski, B. (Inventor)

    1981-01-01

    The invention generally relates to hand tools, and more particularly to an improved device for facilitating removal of printed circuit cards from a card rack characterized by longitudinal side rails arranged in a mutually spaced parallelism and a plurality of printed circuit cards extended between the rails of the rack.

  2. Genetic circuit design automation.

    PubMed

    Nielsen, Alec A K; Der, Bryan S; Shin, Jonghyeon; Vaidyanathan, Prashant; Paralanov, Vanya; Strychalski, Elizabeth A; Ross, David; Densmore, Douglas; Voigt, Christopher A

    2016-04-01

    Computation can be performed in living cells by DNA-encoded circuits that process sensory information and control biological functions. Their construction is time-intensive, requiring manual part assembly and balancing of regulator expression. We describe a design environment, Cello, in which a user writes Verilog code that is automatically transformed into a DNA sequence. Algorithms build a circuit diagram, assign and connect gates, and simulate performance. Reliable circuit design requires the insulation of gates from genetic context, so that they function identically when used in different circuits. We used Cello to design 60 circuits forEscherichia coli(880,000 base pairs of DNA), for which each DNA sequence was built as predicted by the software with no additional tuning. Of these, 45 circuits performed correctly in every output state (up to 10 regulators and 55 parts), and across all circuits 92% of the output states functioned as predicted. Design automation simplifies the incorporation of genetic circuits into biotechnology projects that require decision-making, control, sensing, or spatial organization. PMID:27034378

  3. Completing a Simple Circuit.

    ERIC Educational Resources Information Center

    Slater, Timothy F.; Adams, Jeffrey P.; Brown, Thomas R.

    2000-01-01

    Students have problems successfully arranging an electric circuit to make the bulb produce light. Investigates the percentage of students able to complete a circuit with a given apparatus, and the effects of prior experience on student success. Recommends hands-on activities at the elementary and secondary school levels. (Contains 14 references.)…

  4. Understanding Simple Circuits

    ERIC Educational Resources Information Center

    Mant, Jenny; Wilson, Helen

    2007-01-01

    Many envisage electricity as the "power" to "do things." They know that electricity needs "circuits" and that something is "flowing" in the circuits, but they are not sure what or why. Words such as "current" and "voltage" are part of electricity but their meaning, and the difference between them, is not always clear. In this article, the authors…

  5. Interconnections for fluidic circuits

    NASA Technical Reports Server (NTRS)

    Mangion, C.

    1972-01-01

    Circuit elements are grouped on functional basis in rectangular two-dimensional planar arrays or modules. Another interconnection method brings all connections out to module edge. For smaller fluidic circuits, manifold and interconnections are fabricated as single blocks. Advantages of methods are given.

  6. Liquid detection circuit

    DOEpatents

    Regan, Thomas O.

    1987-01-01

    Herein is a circuit which is capable of detecting the presence of liquids, especially cryogenic liquids, and whose sensor will not overheat in a vacuum. The circuit parameters, however, can be adjusted to work with any liquid over a wide range of temperatures.

  7. Feed array metrology and correction layer for large antenna systems in ASIC mixed signal technology

    NASA Astrophysics Data System (ADS)

    Centureli, F.; Scotti, G.; Tommasino, P.; Trifiletti, A.; Romano, F.; Cimmino, R.; Saitto, A.

    2014-08-01

    The paper deals with a possible use of the feed array present in a large antenna system, as a layer for measuring the antenna performance with a self-test procedure and a possible way to correct residual errors of the Antenna geometry and of the antenna distortions. Focus has been concentrated on a few key critical elements of a possible feed array metrology program. In particular, a preliminary contribution to the design and development of the feed array from one side, and the subsystem dedicated to antenna distortion monitoring and control from the other, have been chosen as the first areas of investigation. Scalability and flexibility principles and synergic approach with other coexistent technologies have been assumed of paramount importance to ensure ease of integrated operation and therefore allowing in principle increased performance and efficiency. The concept is based on the use of an existing feed array grid to measure antenna distortion with respect to the nominal configuration. Measured data are then processed to develop a multilayer strategy to control the mechanical movable devices (when existing) and to adjust the residual fine errors through a software controlled phase adjustment of the existing phase shifter The signal from the feed array is converted passing through a FPGA/ASIC level to digital data channels. The kind of those typically used for the scientific experiments. One additional channel is used for monitoring the antenna distortion status. These data are processed to define the best correction strategy, based on a software managed control system capable of operating at three different levels of the antenna system: reflector rotation layer, sub reflector rotation and translation layer (assuming the possibility of controlling a Stewart machine), phase shifter of the phased array layer. The project is at present in the design phase, a few elements necessary for a sound software design of the control subsystem have been developed at a

  8. Compensated gain control circuit for buck regulator command charge circuit

    DOEpatents

    Barrett, D.M.

    1996-11-05

    A buck regulator command charge circuit includes a compensated-gain control signal for compensating for changes in the component values in order to achieve optimal voltage regulation. The compensated-gain control circuit includes an automatic-gain control circuit for generating a variable-gain control signal. The automatic-gain control circuit is formed of a precision rectifier circuit, a filter network, an error amplifier, and an integrator circuit. 5 figs.

  9. Compensated gain control circuit for buck regulator command charge circuit

    DOEpatents

    Barrett, David M.

    1996-01-01

    A buck regulator command charge circuit includes a compensated-gain control signal for compensating for changes in the component values in order to achieve optimal voltage regulation. The compensated-gain control circuit includes an automatic-gain control circuit for generating a variable-gain control signal. The automatic-gain control circuit is formed of a precision rectifier circuit, a filter network, an error amplifier, and an integrator circuit.

  10. A programmable, low noise, multichannel asic for readout of pixelated amorphous silicon arrays

    SciTech Connect

    Yarema, R. J.

    1998-08-01

    Pixelated amorphous silicon arrays used for detecting X-rays have a number of special requirements for the readout electronics. Because the pixel detector is a high density array, custom integrated circuits are very desirable for reading out the column signals and addressing the rows of pixels to be read out. In practice, separate chips are used for readout and addressing. This paper discusses a custom integrated circuit for processing the analog column signals. The chip has 32 channels of low noise integrators followed by sample and hold circuits which perform a correlated double sample. The chip has several programmable features including gain, bandwidth, and readout configuration.

  11. Approximate circuits for increased reliability

    DOEpatents

    Hamlet, Jason R.; Mayo, Jackson R.

    2015-12-22

    Embodiments of the invention describe a Boolean circuit having a voter circuit and a plurality of approximate circuits each based, at least in part, on a reference circuit. The approximate circuits are each to generate one or more output signals based on values of received input signals. The voter circuit is to receive the one or more output signals generated by each of the approximate circuits, and is to output one or more signals corresponding to a majority value of the received signals. At least some of the approximate circuits are to generate an output value different than the reference circuit for one or more input signal values; however, for each possible input signal value, the majority values of the one or more output signals generated by the approximate circuits and received by the voter circuit correspond to output signal result values of the reference circuit.

  12. Approximate circuits for increased reliability

    DOEpatents

    Hamlet, Jason R.; Mayo, Jackson R.

    2015-08-18

    Embodiments of the invention describe a Boolean circuit having a voter circuit and a plurality of approximate circuits each based, at least in part, on a reference circuit. The approximate circuits are each to generate one or more output signals based on values of received input signals. The voter circuit is to receive the one or more output signals generated by each of the approximate circuits, and is to output one or more signals corresponding to a majority value of the received signals. At least some of the approximate circuits are to generate an output value different than the reference circuit for one or more input signal values; however, for each possible input signal value, the majority values of the one or more output signals generated by the approximate circuits and received by the voter circuit correspond to output signal result values of the reference circuit.

  13. Equivalent Circuits as Related to Ionic Systems

    PubMed Central

    Finkelstein, Alan; Mauro, Alexander

    1963-01-01

    The purpose of this paper is to clarify the relationship between certain “equivalent circuits” and the fundamental flux equations of Nernst and Planck. It is shown that as a direct algebraic consequence of these equations one may construct two types of equivalent circuits for a homogeneous (charged or uncharged) membrane. The one, which we term the “pure electrical equivalent circuit,” correctly predicts all of the electrical properties of the membrane for both steady and transient states. The other, which we call the “mixed equivalent circuit,” predicts the steady state I, Ψ characteristics of the membrane and the steady state ionic fluxes; it is not applicable to non-steady state properties or measurements. We emphasize that with regard to the portrayal of the physical basis of the properties of a homogeneous membrane, the mixed equivalent circuit can be misleading. This is particularly significant because this same circuit can also be used to depict a mosaic membrane, in which case the circuit gives a realistic pictorialization of the physical origin of the membrane properties. It is hoped that our analysis will be of aid to workers in electrophysiology who make use of equivalent circuit terminology in discussing the behavior of the plasma membrane. PMID:19431324

  14. A programmable heater control circuit for spacecraft

    NASA Technical Reports Server (NTRS)

    Nguyen, D. D.; Owen, J. W.; Smith, D. A.; Lewter, W. J.

    1994-01-01

    Spacecraft thermal control is accomplished for many components through use of multilayer insulation systems, electrical heaters, and radiator systems. The heaters are commanded to maintain component temperatures within design specifications. The programmable heater control circuit (PHCC) was designed to obtain an effective and efficient means of spacecraft thermal control. The hybrid circuit provides use of control instrumentation as temperature data, available to the spacecraft central data system, reprogramming capability of the local microprocessor during the spacecraft's mission, and the elimination of significant spacecraft wiring. The hybrid integrated circuit has a temperature sensing and conditioning circuit, a microprocessor, and a heater power and control circuit. The device is miniature and housed in a volume which allows physical integration with the component to be controlled. Applications might include alternate battery-powered logic-circuit configurations. A prototype unit with appropriate physical and functional interfaces was procured for testing. The physical functionality and the feasibility of fabrication of the hybrid integrated circuit were successfully verified. The remaining work to develop a flight-qualified device includes fabrication and testing of a Mil-certified part. An option for completing the PHCC flight qualification testing is to enter into a joint venture with industry.

  15. ASIC Wafer Test System for the ATLAS Semiconductor Tracker Front-End Chip

    SciTech Connect

    Anghinolfi, F.; Bialas, W.; Busek, N.; Ciocio, A.; Cosgrove, D.; Fadeyev, V.; Flacco, C.; Gilchriese, M.; Grillo, A.A.; Haber, C.; Kaplon, J.; Lacasta, C.; Murray, W.; Niggli, H.; Pritchard, T.; Rosenbaum, F.; Spieler, H.; Stezelberger, T.; Vu, C.; Wilder, M.; Yaver, H.; Zetti, F.

    2002-03-19

    An ASIC wafer test system has been developed to provide comprehensive production screening of the ATLAS Semiconductor Tracker front-end chip (ABCD3T). The ABCD3T[1] features a 128-channel analog front-end, a digital pipeline, and communication circuitry, clocked at 40 MHz, which is the bunch crossing frequency at the LHC (Large Hadron Collider). The tester measures values and tolerance ranges of all critical IC parameters, including DC parameters, electronic noise, time resolution, clock levels and clock timing. The tester is controlled by an FPGA (ORCA3T) programmed to issue the input commands to the IC and to interpret the output data. This allows the high-speed wafer-level IC testing necessary to meet the production schedule. To characterize signal amplitudes and phase margins, the tester utilizes pin-driver, delay, and DAC chips, which control the amplitudes and delays of signals sent to the IC under test. Output signals from the IC under test go through window comparator chips to measure their levels. A probe card has been designed specifically to reduce pick-up noise that can affect the measurements. The system can operate at frequencies up to 100 MHz to study the speed limits of the digital circuitry before and after radiation damage. Testing requirements and design solutions are presented.

  16. Tarantula toxins use common surfaces for interacting with Kv and ASIC ion channels

    PubMed Central

    Gupta, Kanchan; Zamanian, Maryam; Bae, Chanhyung; Milescu, Mirela; Krepkiy, Dmitriy; Tilley, Drew C; Sack, Jon T; Yarov-Yarovoy, Vladimir; Kim, Jae Il; Swartz, Kenton J

    2015-01-01

    Tarantula toxins that bind to voltage-sensing domains of voltage-activated ion channels are thought to partition into the membrane and bind to the channel within the bilayer. While no structures of a voltage-sensor toxin bound to a channel have been solved, a structural homolog, psalmotoxin (PcTx1), was recently crystalized in complex with the extracellular domain of an acid sensing ion channel (ASIC). In the present study we use spectroscopic, biophysical and computational approaches to compare membrane interaction properties and channel binding surfaces of PcTx1 with the voltage-sensor toxin guangxitoxin (GxTx-1E). Our results show that both types of tarantula toxins interact with membranes, but that voltage-sensor toxins partition deeper into the bilayer. In addition, our results suggest that tarantula toxins have evolved a similar concave surface for clamping onto α-helices that is effective in aqueous or lipidic physical environments. DOI: http://dx.doi.org/10.7554/eLife.06774.001 PMID:25948544

  17. Polymorphic Electronic Circuits

    NASA Technical Reports Server (NTRS)

    Stoica, Adrian

    2004-01-01

    Polymorphic electronics is a nascent technological discipline that involves, among other things, designing the same circuit to perform different analog and/or digital functions under different conditions. For example, a circuit can be designed to function as an OR gate or an AND gate, depending on the temperature (see figure). Polymorphic electronics can also be considered a subset of polytronics, which is a broader technological discipline in which optical and possibly other information- processing systems could also be designed to perform multiple functions. Polytronics is an outgrowth of evolvable hardware (EHW). The basic concepts and some specific implementations of EHW were described in a number of previous NASA Tech Briefs articles. To recapitulate: The essence of EHW is to design, construct, and test a sequence of populations of circuits that function as incrementally better solutions of a given design problem through the selective, repetitive connection and/or disconnection of capacitors, transistors, amplifiers, inverters, and/or other circuit building blocks. The evolution is guided by a search-and-optimization algorithm (in particular, a genetic algorithm) that operates in the space of possible circuits to find a circuit that exhibits an acceptably close approximation of the desired functionality. The evolved circuits can be tested by computational simulation (in which case the evolution is said to be extrinsic), tested in real hardware (in which case the evolution is said to be intrinsic), or tested in random sequences of computational simulation and real hardware (in which case the evolution is said to be mixtrinsic).

  18. The Application of the FDTD Method to Millimeter-Wave Filter Circuits Including the Design and Analysis of a Compact Coplanar

    NASA Technical Reports Server (NTRS)

    Oswald, J. E.; Siegel, P. H.

    1994-01-01

    The finite difference time domain (FDTD) method is applied to the analysis of microwave, millimeter-wave and submillimeter-wave filter circuits. In each case, the validity of this method is confirmed by comparison with measured data. In addition, the FDTD calculations are used to design a new ultra-thin coplanar-strip filter for feeding a THz planar-antenna mixer.

  19. Digital system provides superregulation of nanosecond amplifier-discriminator circuit

    NASA Technical Reports Server (NTRS)

    Forges, K. G.

    1966-01-01

    Feedback system employing a digital logic comparator to detect and correct amplifier drift provides stable gain characteristics for nanosecond amplifiers used in counting applications. Additional anticoincidence logic enables application of the regulation circuit to the amplifier and discriminator while they are mounted in an operable circuit.

  20. Gallium Arsenide Domino Circuit

    NASA Technical Reports Server (NTRS)

    Yang, Long; Long, Stephen I.

    1990-01-01

    Advantages include reduced power and high speed. Experimental gallium arsenide field-effect-transistor (FET) domino circuit replicated in large numbers for use in dynamic-logic systems. Name of circuit denotes mode of operation, which logic signals propagate from each stage to next when successive stages operated at slightly staggered clock cycles, in manner reminiscent of dominoes falling in a row. Building block of domino circuit includes input, inverter, and level-shifting substages. Combinational logic executed in input substage. During low half of clock cycle, result of logic operation transmitted to following stage.