circuit design method: Topics by Science.gov

Sample records for circuit design method

Automated Design of Quantum Circuits

NASA Technical Reports Server (NTRS)

Williams, Colin P.; Gray, Alexander G.

2000-01-01

In order to design a quantum circuit that performs a desired quantum computation, it is necessary to find a decomposition of the unitary matrix that represents that computation in terms of a sequence of quantum gate operations. To date, such designs have either been found by hand or by exhaustive enumeration of all possible circuit topologies. In this paper we propose an automated approach to quantum circuit design using search heuristics based on principles abstracted from evolutionary genetics, i.e. using a genetic programming algorithm adapted specially for this problem. We demonstrate the method on the task of discovering quantum circuit designs for quantum teleportation. We show that to find a given known circuit design (one which was hand-crafted by a human), the method considers roughly an order of magnitude fewer designs than naive enumeration. In addition, the method finds novel circuit designs superior to those previously known.
A New Automated Design Method Based on Machine Learning for CMOS Analog Circuits

NASA Astrophysics Data System (ADS)

Moradi, Behzad; Mirzaei, Abdolreza

2016-11-01

A new simulation based automated CMOS analog circuit design method which applies a multi-objective non-Darwinian-type evolutionary algorithm based on Learnable Evolution Model (LEM) is proposed in this article. The multi-objective property of this automated design of CMOS analog circuits is governed by a modified Strength Pareto Evolutionary Algorithm (SPEA) incorporated in the LEM algorithm presented here. LEM includes a machine learning method such as the decision trees that makes a distinction between high- and low-fitness areas in the design space. The learning process can detect the right directions of the evolution and lead to high steps in the evolution of the individuals. The learning phase shortens the evolution process and makes remarkable reduction in the number of individual evaluations. The expert designer's knowledge on circuit is applied in the design process in order to reduce the design space as well as the design time. The circuit evaluation is made by HSPICE simulator. In order to improve the design accuracy, bsim3v3 CMOS transistor model is adopted in this proposed design method. This proposed design method is tested on three different operational amplifier circuits. The performance of this proposed design method is verified by comparing it with the evolutionary strategy algorithm and other similar methods.
Expediting analog design retargeting by design knowledge re-use and circuit synthesis: a practical example on a Delta-Sigma modulator

NASA Astrophysics Data System (ADS)

Webb, Matthew; Tang, Hua

2016-08-01

In the past decade or two, due to constant and rapid technology changes, analog design re-use or design retargeting to newer technologies has been brought to the table in order to expedite the design process and improve time-to-market. If properly conducted, analog design retargeting could significantly cut down design cycle compared to designs starting from the scratch. In this article, we present an empirical and general method for efficient analog design retargeting by design knowledge re-use and circuit synthesis (CS). The method first identifies circuit blocks that compose the source system and extracts the performance parameter specifications of each circuit block. Then, for each circuit block, it scales the values of design variables (DV) from the source design to derive an initial design in the target technology. Depending on the performance of this initial target design, a design space is defined for synthesis. Subsequently, each circuit block is automatically synthesised using state-of-art analog synthesis tools based on a combination of global and local optimisation techniques to achieve comparable performance specifications to those extracted from the source system. Finally, the overall system is composed of those synthesised circuit blocks in the target technology. We illustrate the method using a practical example of a complex Delta-Sigma modulator (DSM) circuit.
Parameters Design of Series Resonant Inverter Circuit

NASA Astrophysics Data System (ADS)

Qi, Xingkun; Peng, Yonglong; Li, Yabin

This paper analyzes the main circuit structure of series resonant inverter, and designs the components parameters of the main circuit.That provides a theoretical method for the design of series resonant inverter.
Faster Evolution of More Multifunctional Logic Circuits

NASA Technical Reports Server (NTRS)

Stoica, Adrian; Zebulum, Ricardo

2005-01-01

A modification in a method of automated evolutionary synthesis of voltage-controlled multifunctional logic circuits makes it possible to synthesize more circuits in less time. Prior to the modification, the computations for synthesizing a four-function logic circuit by this method took about 10 hours. Using the method as modified, it is possible to synthesize a six-function circuit in less than half an hour. The concepts of automated evolutionary synthesis and voltage-controlled multifunctional logic circuits were described in a number of prior NASA Tech Briefs articles. To recapitulate: A circuit is designed to perform one of several different logic functions, depending on the value of an applied control voltage. The circuit design is synthesized following an automated evolutionary approach that is so named because it is modeled partly after the repetitive trial-and-error process of biological evolution. In this process, random populations of integer strings that encode electronic circuits play a role analogous to that of chromosomes. An evolved circuit is tested by computational simulation (prior to testing in real hardware to verify a final design). Then, in a fitness-evaluation step, responses of the circuit are compared with specifications of target responses and circuits are ranked according to how close they come to satisfying specifications. The results of the evaluation provide guidance for refining designs through further iteration.
Fast and Accurate Circuit Design Automation through Hierarchical Model Switching.

PubMed

Huynh, Linh; Tagkopoulos, Ilias

2015-08-21

In computer-aided biological design, the trifecta of characterized part libraries, accurate models and optimal design parameters is crucial for producing reliable designs. As the number of parts and model complexity increase, however, it becomes exponentially more difficult for any optimization method to search the solution space, hence creating a trade-off that hampers efficient design. To address this issue, we present a hierarchical computer-aided design architecture that uses a two-step approach for biological design. First, a simple model of low computational complexity is used to predict circuit behavior and assess candidate circuit branches through branch-and-bound methods. Then, a complex, nonlinear circuit model is used for a fine-grained search of the reduced solution space, thus achieving more accurate results. Evaluation with a benchmark of 11 circuits and a library of 102 experimental designs with known characterization parameters demonstrates a speed-up of 3 orders of magnitude when compared to other design methods that provide optimality guarantees.
Swarm intelligence-based approach for optimal design of CMOS differential amplifier and comparator circuit using a hybrid salp swarm algorithm

NASA Astrophysics Data System (ADS)

Asaithambi, Sasikumar; Rajappa, Muthaiah

2018-05-01

In this paper, an automatic design method based on a swarm intelligence approach for CMOS analog integrated circuit (IC) design is presented. The hybrid meta-heuristics optimization technique, namely, the salp swarm algorithm (SSA), is applied to the optimal sizing of a CMOS differential amplifier and the comparator circuit. SSA is a nature-inspired optimization algorithm which mimics the navigating and hunting behavior of salp. The hybrid SSA is applied to optimize the circuit design parameters and to minimize the MOS transistor sizes. The proposed swarm intelligence approach was successfully implemented for an automatic design and optimization of CMOS analog ICs using Generic Process Design Kit (GPDK) 180 nm technology. The circuit design parameters and design specifications are validated through a simulation program for integrated circuit emphasis simulator. To investigate the efficiency of the proposed approach, comparisons have been carried out with other simulation-based circuit design methods. The performances of hybrid SSA based CMOS analog IC designs are better than the previously reported studies.
Swarm intelligence-based approach for optimal design of CMOS differential amplifier and comparator circuit using a hybrid salp swarm algorithm.

PubMed

Asaithambi, Sasikumar; Rajappa, Muthaiah

2018-05-01

In this paper, an automatic design method based on a swarm intelligence approach for CMOS analog integrated circuit (IC) design is presented. The hybrid meta-heuristics optimization technique, namely, the salp swarm algorithm (SSA), is applied to the optimal sizing of a CMOS differential amplifier and the comparator circuit. SSA is a nature-inspired optimization algorithm which mimics the navigating and hunting behavior of salp. The hybrid SSA is applied to optimize the circuit design parameters and to minimize the MOS transistor sizes. The proposed swarm intelligence approach was successfully implemented for an automatic design and optimization of CMOS analog ICs using Generic Process Design Kit (GPDK) 180 nm technology. The circuit design parameters and design specifications are validated through a simulation program for integrated circuit emphasis simulator. To investigate the efficiency of the proposed approach, comparisons have been carried out with other simulation-based circuit design methods. The performances of hybrid SSA based CMOS analog IC designs are better than the previously reported studies.
On the SCTC-OCTC Method for the Analysis and Design of Circuits

ERIC Educational Resources Information Center

Salvatori, S.; Conte, G.

2009-01-01

This paper discusses guidelines that emphasize the relevance of short-circuit- and open-circuit-time constant (SCTC and OCTC, respectively) methods in the analysis and design of electronic amplifiers. It is demonstrated that it is only necessary to grasp a few concepts in order to understand that the two short- and open-circuit cases fall into a…
A procedural method for the efficient implementation of full-custom VLSI designs

NASA Technical Reports Server (NTRS)

Belk, P.; Hickey, N.

1987-01-01

An imbedded language system for the layout of very large scale integration (VLSI) circuits is examined. It is shown that through the judicious use of this system, a large variety of circuits can be designed with circuit density and performance comparable to traditional full-custom design methods, but with design costs more comparable to semi-custom design methods. The high performance of this methodology is attributable to the flexibility of procedural descriptions of VLSI layouts and to a number of automatic and semi-automatic tools within the system.
Design of low loss helix circuits for interference fitted and brazed circuits

NASA Technical Reports Server (NTRS)

Jacquez, A.

1983-01-01

The RF loss properties and thermal capability of brazed helix circuits and interference fitted circuits were evaluated. The objective was to produce design circuits with minimum RF loss and maximum heat transfer. These circuits were to be designed to operate at 10 kV and at 20 GHz using a gamma a approximately equal to 1.0. This represents a circuit diameter of only 0.75 millimeters. The fabrication of this size circuit and the 0.48 millimeter high support rods required considerable refinements in the assembly techniques and fixtures used on lower frequency circuits. The transition from the helices to the waveguide was designed and the circuits were matched from 20 to 40 GHz since the helix design is a broad band circuit and at a gamma a of 1.0 will operate over this band. The loss measurement was a transmission measurement and therefore had two such transitions. This resulting double-ended match required tuning elements to achieve the broad band match and external E-H tuners at each end to optimize the match for each frequency where the loss measurement was made. The test method used was a substitution method where the test fixture was replaced by a calibrated attenuator.
Automatic Design of Digital Synthetic Gene Circuits

PubMed Central

Marchisio, Mario A.; Stelling, Jörg

2011-01-01

De novo computational design of synthetic gene circuits that achieve well-defined target functions is a hard task. Existing, brute-force approaches run optimization algorithms on the structure and on the kinetic parameter values of the network. However, more direct rational methods for automatic circuit design are lacking. Focusing on digital synthetic gene circuits, we developed a methodology and a corresponding tool for in silico automatic design. For a given truth table that specifies a circuit's input–output relations, our algorithm generates and ranks several possible circuit schemes without the need for any optimization. Logic behavior is reproduced by the action of regulatory factors and chemicals on the promoters and on the ribosome binding sites of biological Boolean gates. Simulations of circuits with up to four inputs show a faithful and unequivocal truth table representation, even under parametric perturbations and stochastic noise. A comparison with already implemented circuits, in addition, reveals the potential for simpler designs with the same function. Therefore, we expect the method to help both in devising new circuits and in simplifying existing solutions. PMID:21399700
HDL to verification logic translator

NASA Technical Reports Server (NTRS)

Gambles, J. W.; Windley, P. J.

1992-01-01

The increasingly higher number of transistors possible in VLSI circuits compounds the difficulty in insuring correct designs. As the number of possible test cases required to exhaustively simulate a circuit design explodes, a better method is required to confirm the absence of design faults. Formal verification methods provide a way to prove, using logic, that a circuit structure correctly implements its specification. Before verification is accepted by VLSI design engineers, the stand alone verification tools that are in use in the research community must be integrated with the CAD tools used by the designers. One problem facing the acceptance of formal verification into circuit design methodology is that the structural circuit descriptions used by the designers are not appropriate for verification work and those required for verification lack some of the features needed for design. We offer a solution to this dilemma: an automatic translation from the designers' HDL models into definitions for the higher-ordered logic (HOL) verification system. The translated definitions become the low level basis of circuit verification which in turn increases the designer's confidence in the correctness of higher level behavioral models.
Automatic design of synthetic gene circuits through mixed integer non-linear programming.

PubMed

Huynh, Linh; Kececioglu, John; Köppe, Matthias; Tagkopoulos, Ilias

2012-01-01

Automatic design of synthetic gene circuits poses a significant challenge to synthetic biology, primarily due to the complexity of biological systems, and the lack of rigorous optimization methods that can cope with the combinatorial explosion as the number of biological parts increases. Current optimization methods for synthetic gene design rely on heuristic algorithms that are usually not deterministic, deliver sub-optimal solutions, and provide no guaranties on convergence or error bounds. Here, we introduce an optimization framework for the problem of part selection in synthetic gene circuits that is based on mixed integer non-linear programming (MINLP), which is a deterministic method that finds the globally optimal solution and guarantees convergence in finite time. Given a synthetic gene circuit, a library of characterized parts, and user-defined constraints, our method can find the optimal selection of parts that satisfy the constraints and best approximates the objective function given by the user. We evaluated the proposed method in the design of three synthetic circuits (a toggle switch, a transcriptional cascade, and a band detector), with both experimentally constructed and synthetic promoter libraries. Scalability and robustness analysis shows that the proposed framework scales well with the library size and the solution space. The work described here is a step towards a unifying, realistic framework for the automated design of biological circuits.
Design principles for elementary gene circuits: Elements, methods, and examples

NASA Astrophysics Data System (ADS)

Savageau, Michael A.

2001-03-01

The control of gene expression involves complex circuits that exhibit enormous variation in design. For years the most convenient explanation for these variations was historical accident. According to this view, evolution is a haphazard process in which many different designs are generated by chance; there are many ways to accomplish the same thing, and so no further meaning can be attached to such different but equivalent designs. In recent years a more satisfying explanation based on design principles has been found for at least certain aspects of gene circuitry. By design principle we mean a rule that characterizes some biological feature exhibited by a class of systems such that discovery of the rule allows one not only to understand known instances but also to predict new instances within the class. The central importance of gene regulation in modern molecular biology provides strong motivation to search for more of these underlying design principles. The search is in its infancy and there are undoubtedly many design principles that remain to be discovered. The focus of this three-part review will be the class of elementary gene circuits in bacteria. The first part reviews several elements of design that enter into the characterization of elementary gene circuits in prokaryotic organisms. Each of these elements exhibits a variety of realizations whose meaning is generally unclear. The second part reviews mathematical methods used to represent, analyze, and compare alternative designs. Emphasis is placed on particular methods that have been used successfully to identify design principles for elementary gene circuits. The third part reviews four design principles that make specific predictions regarding (1) two alternative modes of gene control, (2) three patterns of coupling gene expression in elementary circuits, (3) two types of switches in inducible gene circuits, and (4) the realizability of alternative gene circuits and their response to phased environmental cues. In each case, the predictions are supported by experimental evidence. These results are important for understanding the function, design, and evolution of elementary gene circuits.
Automatic Design of Synthetic Gene Circuits through Mixed Integer Non-linear Programming

PubMed Central

Huynh, Linh; Kececioglu, John; Köppe, Matthias; Tagkopoulos, Ilias

2012-01-01

Automatic design of synthetic gene circuits poses a significant challenge to synthetic biology, primarily due to the complexity of biological systems, and the lack of rigorous optimization methods that can cope with the combinatorial explosion as the number of biological parts increases. Current optimization methods for synthetic gene design rely on heuristic algorithms that are usually not deterministic, deliver sub-optimal solutions, and provide no guaranties on convergence or error bounds. Here, we introduce an optimization framework for the problem of part selection in synthetic gene circuits that is based on mixed integer non-linear programming (MINLP), which is a deterministic method that finds the globally optimal solution and guarantees convergence in finite time. Given a synthetic gene circuit, a library of characterized parts, and user-defined constraints, our method can find the optimal selection of parts that satisfy the constraints and best approximates the objective function given by the user. We evaluated the proposed method in the design of three synthetic circuits (a toggle switch, a transcriptional cascade, and a band detector), with both experimentally constructed and synthetic promoter libraries. Scalability and robustness analysis shows that the proposed framework scales well with the library size and the solution space. The work described here is a step towards a unifying, realistic framework for the automated design of biological circuits. PMID:22536398
Algorithms and architecture for multiprocessor based circuit simulation

DOE Office of Scientific and Technical Information (OSTI.GOV)

Deutsch, J.T.

Accurate electrical simulation is critical to the design of high performance integrated circuits. Logic simulators can verify function and give first-order timing information. Switch level simulators are more effective at dealing with charge sharing than standard logic simulators, but cannot provide accurate timing information or discover DC problems. Delay estimation techniques and cell level simulation can be used in constrained design methods, but must be tuned for each application, and circuit simulation must still be used to generate the cell models. None of these methods has the guaranteed accuracy that many circuit designers desire, and none can provide detailed waveformmore » information. Detailed electrical-level simulation can predict circuit performance if devices and parasitics are modeled accurately. However, the computational requirements of conventional circuit simulators make it impractical to simulate current large circuits. In this dissertation, the implementation of Iterated Timing Analysis (ITA), a relaxation-based technique for accurate circuit simulation, on a special-purpose multiprocessor is presented. The ITA method is an SOR-Newton, relaxation-based method which uses event-driven analysis and selective trace to exploit the temporal sparsity of the electrical network. Because event-driven selective trace techniques are employed, this algorithm lends itself to implementation on a data-driven computer.« less
A behavioral-level HDL description of SFQ logic circuits for quantitative performance analysis of large-scale SFQ digital systems

NASA Astrophysics Data System (ADS)

Matsuzaki, F.; Yoshikawa, N.; Tanaka, M.; Fujimaki, A.; Takai, Y.

2003-10-01

Recently many single flux quantum (SFQ) logic circuits containing several thousands of Josephson junctions have been designed successfully by using digital domain simulation based on the hard ware description language (HDL). In the present HDL-based design of SFQ circuits, a structure-level HDL description has been used, where circuits are made up of basic gate cells. However, in order to analyze large-scale SFQ digital systems, such as a microprocessor, more higher-level circuit abstraction is necessary to reduce the circuit simulation time. In this paper we have investigated the way to describe functionality of the large-scale SFQ digital circuits by a behavior-level HDL description. In this method, the functionality and the timing of the circuit block is defined directly by describing their behavior by the HDL. Using this method, we can dramatically reduce the simulation time of large-scale SFQ digital circuits.
Assessing Design Activity in Complex CMOS Circuit Design.

ERIC Educational Resources Information Center

Biswas, Gautam; And Others

This report characterizes human problem solving in digital circuit design. Protocols of 11 different designers with varying degrees of training were analyzed by identifying the designers' problem solving strategies and discussing activity patterns that differentiate the designers. These methods are proposed as a tentative basis for assessing…
Fundamentals handbook of electrical and computer engineering. Volume 1 Circuits fields and electronics

NASA Astrophysics Data System (ADS)

Chang, S. S. L.

State of the art technology in circuits, fields, and electronics is discussed. The principles and applications of these technologies to industry, digital processing, microwave semiconductors, and computer-aided design are explained. Important concepts and methodologies in mathematics and physics are reviewed, and basic engineering sciences and associated design methods are dealt with, including: circuit theory and the design of magnetic circuits and active filter synthesis; digital signal processing, including FIR and IIR digital filter design; transmission lines, electromagnetic wave propagation and surface acoustic wave devices. Also considered are: electronics technologies, including power electronics, microwave semiconductors, GaAs devices, and magnetic bubble memories; digital circuits and logic design.

Analog integrated circuits design for processing physiological signals.

PubMed

Li, Yan; Poon, Carmen C Y; Zhang, Yuan-Ting

2010-01-01

Analog integrated circuits (ICs) designed for processing physiological signals are important building blocks of wearable and implantable medical devices used for health monitoring or restoring lost body functions. Due to the nature of physiological signals and the corresponding application scenarios, the ICs designed for these applications should have low power consumption, low cutoff frequency, and low input-referred noise. In this paper, techniques for designing the analog front-end circuits with these three characteristics will be reviewed, including subthreshold circuits, bulk-driven MOSFETs, floating gate MOSFETs, and log-domain circuits to reduce power consumption; methods for designing fully integrated low cutoff frequency circuits; as well as chopper stabilization (CHS) and other techniques that can be used to achieve a high signal-to-noise performance. Novel applications using these techniques will also be discussed.
Design of pressure-driven microfluidic networks using electric circuit analogy.

PubMed

Oh, Kwang W; Lee, Kangsun; Ahn, Byungwook; Furlani, Edward P

2012-02-07

This article reviews the application of electric circuit methods for the analysis of pressure-driven microfluidic networks with an emphasis on concentration- and flow-dependent systems. The application of circuit methods to microfluidics is based on the analogous behaviour of hydraulic and electric circuits with correlations of pressure to voltage, volumetric flow rate to current, and hydraulic to electric resistance. Circuit analysis enables rapid predictions of pressure-driven laminar flow in microchannels and is very useful for designing complex microfluidic networks in advance of fabrication. This article provides a comprehensive overview of the physics of pressure-driven laminar flow, the formal analogy between electric and hydraulic circuits, applications of circuit theory to microfluidic network-based devices, recent development and applications of concentration- and flow-dependent microfluidic networks, and promising future applications. The lab-on-a-chip (LOC) and microfluidics community will gain insightful ideas and practical design strategies for developing unique microfluidic network-based devices to address a broad range of biological, chemical, pharmaceutical, and other scientific and technical challenges.
Simple photometer circuits using modular electronic components

NASA Technical Reports Server (NTRS)

Wampler, J. E.

1975-01-01

Operational and peak holding amplifiers are discussed as useful circuits for bioluminescence assays. Circuit diagrams are provided. While analog methods can give a good integration on short time scales, digital methods were found best for long term integration in bioluminescence assays. Power supplies, a general photometer circuit with ratio capability, and variations in the basic photometer design are also considered.
Computer-Aided Design of Low-Noise Microwave Circuits

NASA Astrophysics Data System (ADS)

Wedge, Scott William

1991-02-01

Devoid of most natural and manmade noise, microwave frequencies have detection sensitivities limited by internally generated receiver noise. Low-noise amplifiers are therefore critical components in radio astronomical antennas, communications links, radar systems, and even home satellite dishes. A general technique to accurately predict the noise performance of microwave circuits has been lacking. Current noise analysis methods have been limited to specific circuit topologies or neglect correlation, a strong effect in microwave devices. Presented here are generalized methods, developed for computer-aided design implementation, for the analysis of linear noisy microwave circuits comprised of arbitrarily interconnected components. Included are descriptions of efficient algorithms for the simultaneous analysis of noisy and deterministic circuit parameters based on a wave variable approach. The methods are therefore particularly suited to microwave and millimeter-wave circuits. Noise contributions from lossy passive components and active components with electronic noise are considered. Also presented is a new technique for the measurement of device noise characteristics that offers several advantages over current measurement methods.
Robust Design of Biological Circuits: Evolutionary Systems Biology Approach

PubMed Central

Chen, Bor-Sen; Hsu, Chih-Yuan; Liou, Jing-Jia

2011-01-01

Artificial gene circuits have been proposed to be embedded into microbial cells that function as switches, timers, oscillators, and the Boolean logic gates. Building more complex systems from these basic gene circuit components is one key advance for biologic circuit design and synthetic biology. However, the behavior of bioengineered gene circuits remains unstable and uncertain. In this study, a nonlinear stochastic system is proposed to model the biological systems with intrinsic parameter fluctuations and environmental molecular noise from the cellular context in the host cell. Based on evolutionary systems biology algorithm, the design parameters of target gene circuits can evolve to specific values in order to robustly track a desired biologic function in spite of intrinsic and environmental noise. The fitness function is selected to be inversely proportional to the tracking error so that the evolutionary biological circuit can achieve the optimal tracking mimicking the evolutionary process of a gene circuit. Finally, several design examples are given in silico with the Monte Carlo simulation to illustrate the design procedure and to confirm the robust performance of the proposed design method. The result shows that the designed gene circuits can robustly track desired behaviors with minimal errors even with nontrivial intrinsic and external noise. PMID:22187523
Robust design of biological circuits: evolutionary systems biology approach.

PubMed

Chen, Bor-Sen; Hsu, Chih-Yuan; Liou, Jing-Jia

2011-01-01

Artificial gene circuits have been proposed to be embedded into microbial cells that function as switches, timers, oscillators, and the Boolean logic gates. Building more complex systems from these basic gene circuit components is one key advance for biologic circuit design and synthetic biology. However, the behavior of bioengineered gene circuits remains unstable and uncertain. In this study, a nonlinear stochastic system is proposed to model the biological systems with intrinsic parameter fluctuations and environmental molecular noise from the cellular context in the host cell. Based on evolutionary systems biology algorithm, the design parameters of target gene circuits can evolve to specific values in order to robustly track a desired biologic function in spite of intrinsic and environmental noise. The fitness function is selected to be inversely proportional to the tracking error so that the evolutionary biological circuit can achieve the optimal tracking mimicking the evolutionary process of a gene circuit. Finally, several design examples are given in silico with the Monte Carlo simulation to illustrate the design procedure and to confirm the robust performance of the proposed design method. The result shows that the designed gene circuits can robustly track desired behaviors with minimal errors even with nontrivial intrinsic and external noise.
Three-phase short circuit calculation method based on pre-computed surface for doubly fed induction generator

NASA Astrophysics Data System (ADS)

Ma, J.; Liu, Q.

2018-02-01

This paper presents an improved short circuit calculation method, based on pre-computed surface to determine the short circuit current of a distribution system with multiple doubly fed induction generators (DFIGs). The short circuit current, injected into power grid by DFIG, is determined by low voltage ride through (LVRT) control and protection under grid fault. However, the existing methods are difficult to calculate the short circuit current of DFIG in engineering practice due to its complexity. A short circuit calculation method, based on pre-computed surface, was proposed by developing the surface of short circuit current changing with the calculating impedance and the open circuit voltage. And the short circuit currents were derived by taking into account the rotor excitation and crowbar activation time. Finally, the pre-computed surfaces of short circuit current at different time were established, and the procedure of DFIG short circuit calculation considering its LVRT was designed. The correctness of proposed method was verified by simulation.
Comprehensive photonics-electronics convergent simulation and its application to high-speed electronic circuit integration on a Si/Ge photonic chip

NASA Astrophysics Data System (ADS)

Takeda, Kotaro; Honda, Kentaro; Takeya, Tsutomu; Okazaki, Kota; Hiraki, Tatsurou; Tsuchizawa, Tai; Nishi, Hidetaka; Kou, Rai; Fukuda, Hiroshi; Usui, Mitsuo; Nosaka, Hideyuki; Yamamoto, Tsuyoshi; Yamada, Koji

2015-01-01

We developed a design technique for a photonics-electronics convergence system by using an equivalent circuit of optical devices in an electrical circuit simulator. We used the transfer matrix method to calculate the response of an optical device. This method used physical parameters and dimensions of optical devices as calculation parameters to design a device in the electrical circuit simulator. It also used an intermediate frequency to express the wavelength dependence of optical devices. By using both techniques, we simulated bit error rates and eye diagrams of optical and electrical integrated circuits and calculated influences of device structure change and wavelength shift penalty.
Fundamentals of Digital Engineering: Designing for Reliability

NASA Technical Reports Server (NTRS)

Katz, R.; Day, John H. (Technical Monitor)

2001-01-01

The concept of designing for reliability will be introduced along with a brief overview of reliability, redundancy and traditional methods of fault tolerance is presented, as applied to current logic devices. The fundamentals of advanced circuit design and analysis techniques will be the primary focus. The introduction will cover the definitions of key device parameters and how analysis is used to prove circuit correctness. Basic design techniques such as synchronous vs asynchronous design, metastable state resolution time/arbiter design, and finite state machine structure/implementation will be reviewed. Advanced topics will be explored such as skew-tolerant circuit design, the use of triple-modular redundancy and circuit hazards, device transients and preventative circuit design, lock-up states in finite state machines generated by logic synthesizers, device transient characteristics, radiation mitigation techniques. worst-case analysis, the use of timing analyzer and simulators, and others. Case studies and lessons learned from spaceflight designs will be given as examples
Towards Evolving Electronic Circuits for Autonomous Space Applications

NASA Technical Reports Server (NTRS)

Lohn, Jason D.; Haith, Gary L.; Colombano, Silvano P.; Stassinopoulos, Dimitris

2000-01-01

The relatively new field of Evolvable Hardware studies how simulated evolution can reconfigure, adapt, and design hardware structures in an automated manner. Space applications, especially those requiring autonomy, are potential beneficiaries of evolvable hardware. For example, robotic drilling from a mobile platform requires high-bandwidth controller circuits that are difficult to design. In this paper, we present automated design techniques based on evolutionary search that could potentially be used in such applications. First, we present a method of automatically generating analog circuit designs using evolutionary search and a circuit construction language. Our system allows circuit size (number of devices), circuit topology, and device values to be evolved. Using a parallel genetic algorithm, we present experimental results for five design tasks. Second, we investigate the use of coevolution in automated circuit design. We examine fitness evaluation by comparing the effectiveness of four fitness schedules. The results indicate that solution quality is highest with static and co-evolving fitness schedules as compared to the other two dynamic schedules. We discuss these results and offer two possible explanations for the observed behavior: retention of useful information, and alignment of problem difficulty with circuit proficiency.
Waveguide design, modeling, and optimization: from photonic nanodevices to integrated photonic circuits

NASA Astrophysics Data System (ADS)

Bordovsky, Michal; Catrysse, Peter; Dods, Steven; Freitas, Marcio; Klein, Jackson; Kotacka, Libor; Tzolov, Velko; Uzunov, Ivan M.; Zhang, Jiazong

2004-05-01

We present the state of the art for commercial design and simulation software in the 'front end' of photonic circuit design. One recent advance is to extend the flexibility of the software by using more than one numerical technique on the same optical circuit. There are a number of popular and proven techniques for analysis of photonic devices. Examples of these techniques include the Beam Propagation Method (BPM), the Coupled Mode Theory (CMT), and the Finite Difference Time Domain (FDTD) method. For larger photonic circuits, it may not be practical to analyze the whole circuit by any one of these methods alone, but often some smaller part of the circuit lends itself to at least one of these standard techniques. Later the whole problem can be analyzed on a unified platform. This kind of approach can enable analysis for cases that would otherwise be cumbersome, or even impossible. We demonstrate solutions for more complex structures ranging from the sub-component layout, through the entire device characterization, to the mask layout and its editing. We also present recent advances in the above well established techniques. This includes the analysis of nano-particles, metals, and non-linear materials by FDTD, photonic crystal design and analysis, and improved models for high concentration Er/Yb co-doped glass waveguide amplifiers.
Dynamical Systems in Circuit Designer's Eyes

DOE Office of Scientific and Technical Information (OSTI.GOV)

Odyniec, M.

Examples of nonlinear circuit design are given. Focus of the design process is on theory and engineering methods (as opposed to numerical analysis). Modeling is related to measurements It is seen that the phase plane is still very useful with proper models Harmonic balance/describing function offers powerful insight (via the combination of simulation with circuit and ODE theory). Measurement and simulation capabilities increased, especially harmonics measurements (since sinusoids are easy to generate)
Nonlinear relaxation algorithms for circuit simulation

DOE Office of Scientific and Technical Information (OSTI.GOV)

Saleh, R.A.

Circuit simulation is an important Computer-Aided Design (CAD) tool in the design of Integrated Circuits (IC). However, the standard techniques used in programs such as SPICE result in very long computer-run times when applied to large problems. In order to reduce the overall run time, a number of new approaches to circuit simulation were developed and are described. These methods are based on nonlinear relaxation techniques and exploit the relative inactivity of large circuits. Simple waveform-processing techniques are described to determine the maximum possible speed improvement that can be obtained by exploiting this property of large circuits. Three simulation algorithmsmore » are described, two of which are based on the Iterated Timing Analysis (ITA) method and a third based on the Waveform-Relaxation Newton (WRN) method. New programs that incorporate these techniques were developed and used to simulate a variety of industrial circuits. The results from these simulations are provided. The techniques are shown to be much faster than the standard approach. In addition, a number of parallel aspects of these algorithms are described, and a general space-time model of parallel-task scheduling is developed.« less
The Application of the FDTD Method to Millimeter-Wave Filter Circuits Including the Design and Analysis of a Compact Coplanar

NASA Technical Reports Server (NTRS)

Oswald, J. E.; Siegel, P. H.

1994-01-01

The finite difference time domain (FDTD) method is applied to the analysis of microwave, millimeter-wave and submillimeter-wave filter circuits. In each case, the validity of this method is confirmed by comparison with measured data. In addition, the FDTD calculations are used to design a new ultra-thin coplanar-strip filter for feeding a THz planar-antenna mixer.
Representation and design of wavelets using unitary circuits

NASA Astrophysics Data System (ADS)

Evenbly, Glen; White, Steven R.

2018-05-01

The representation of discrete, compact wavelet transformations (WTs) as circuits of local unitary gates is discussed. We employ a similar formalism as used in the multiscale representation of quantum many-body wave functions using unitary circuits, further cementing the relation established in the literature between classical and quantum multiscale methods. An algorithm for constructing the circuit representation of known orthogonal, dyadic, discrete WTs is presented, and the explicit representation for Daubechies wavelets, coiflets, and symlets is provided. Furthermore, we demonstrate the usefulness of the circuit formalism in designing WTs, including various classes of symmetric wavelets and multiwavelets, boundary wavelets, and biorthogonal wavelets.
Automated Design Tools for Integrated Mixed-Signal Microsystems (NeoCAD)

DTIC Science & Technology

2005-02-01

method, Model Order Reduction (MOR) tools, system-level, mixed-signal circuit synthesis and optimization tools, and parsitic extraction tools. A unique...Mission Area: Command and Control mixed signal circuit simulation parasitic extraction time-domain simulation IC design flow model order reduction... Extraction 1.2 Overall Program Milestones CHAPTER 2 FAST TIME DOMAIN MIXED-SIGNAL CIRCUIT SIMULATION 2.1 HAARSPICE Algorithms 2.1.1 Mathematical Background
A novel surrogate-based approach for optimal design of electromagnetic-based circuits

NASA Astrophysics Data System (ADS)

Hassan, Abdel-Karim S. O.; Mohamed, Ahmed S. A.; Rabie, Azza A.; Etman, Ahmed S.

2016-02-01

A new geometric design centring approach for optimal design of central processing unit-intensive electromagnetic (EM)-based circuits is introduced. The approach uses norms related to the probability distribution of the circuit parameters to find distances from a point to the feasible region boundaries by solving nonlinear optimization problems. Based on these normed distances, the design centring problem is formulated as a max-min optimization problem. A convergent iterative boundary search technique is exploited to find the normed distances. To alleviate the computation cost associated with the EM-based circuits design cycle, space-mapping (SM) surrogates are used to create a sequence of iteratively updated feasible region approximations. In each SM feasible region approximation, the centring process using normed distances is implemented, leading to a better centre point. The process is repeated until a final design centre is attained. Practical examples are given to show the effectiveness of the new design centring method for EM-based circuits.
Exact Synthesis of Reversible Circuits Using A* Algorithm

NASA Astrophysics Data System (ADS)

Datta, K.; Rathi, G. K.; Sengupta, I.; Rahaman, H.

2015-06-01

With the growing emphasis on low-power design methodologies, and the result that theoretical zero power dissipation is possible only if computations are information lossless, design and synthesis of reversible logic circuits have become very important in recent years. Reversible logic circuits are also important in the context of quantum computing, where the basic operations are reversible in nature. Several synthesis methodologies for reversible circuits have been reported. Some of these methods are termed as exact, where the motivation is to get the minimum-gate realization for a given reversible function. These methods are computationally very intensive, and are able to synthesize only very small functions. There are other methods based on function transformations or higher-level representation of functions like binary decision diagrams or exclusive-or sum-of-products, that are able to handle much larger circuits without any guarantee of optimality or near-optimality. Design of exact synthesis algorithms is interesting in this context, because they set some kind of benchmarks against which other methods can be compared. This paper proposes an exact synthesis approach based on an iterative deepening version of the A* algorithm using the multiple-control Toffoli gate library. Experimental results are presented with comparisons with other exact and some heuristic based synthesis approaches.
Design of high-linear CMOS circuit using a constant transconductance method for gamma-ray spectroscopy system

NASA Astrophysics Data System (ADS)

Jung, I. I.; Lee, J. H.; Lee, C. S.; Choi, Y.-W.

2011-02-01

We propose a novel circuit to be applied to the front-end integrated circuits of gamma-ray spectroscopy systems. Our circuit is designed as a type of current conveyor (ICON) employing a constant- gm (transconductance) method which can significantly improve the linearity in the amplified signals by using a large time constant and the time-invariant characteristics of an amplifier. The constant- gm method is obtained by a feedback control which keeps the transconductance of the input transistor constant. To verify the performance of the propose circuit, the time constant variations for the channel resistances are simulated with the TSMC 0.18 μm transistor parameters using HSPICE, and then compared with those of a conventional ICON. As a result, the proposed ICON shows only 0.02% output linearity variation and 0.19% time constant variation for the input amplitude up to 100 mV. These are significantly small values compared to a conventional ICON's 1.39% and 19.43%, respectively, for the same conditions.
Design of An Energy Efficient Hydraulic Regenerative circuit

NASA Astrophysics Data System (ADS)

Ramesh, S.; Ashok, S. Denis; Nagaraj, Shanmukha; Adithyakumar, C. R.; Reddy, M. Lohith Kumar; Naulakha, Niranjan Kumar

2018-02-01

Increasing cost and power demand, leads to evaluation of new method to increase through productivity and help to solve the power demands. Many researchers have break through to increase the efficiency of a hydraulic power pack, one of the promising methods is the concept of regenerative. The objective of this research work is to increase the efficiency of a hydraulic circuit by introducing a concept of regenerative circuit. A Regenerative circuit is a system that is used to speed up the extension stroke of the double acting single rod hydraulic cylinder. The output is connected to the input in the directional control value. By this concept, increase in velocity of the piston and decrease the cycle time. For the research, a basic hydraulic circuit and a regenerative circuit are designated and compared both with their results. The analysis was based on their time taken for extension and retraction of the piston. From the detailed analysis of both the hydraulic circuits, it is found that the efficiency by introducing hydraulic regenerative circuit increased by is 5.3%. The obtained results conclude that, implementing hydraulic regenerative circuit in a hydraulic power pack decreases power consumption, reduces cycle time and increases productivity in a longer run.

Scalable, Lightweight, Integrated and Quick-to-Assemble (SLIQ) Hyperdrives for Functional Circuit Dissection.

PubMed

Liang, Li; Oline, Stefan N; Kirk, Justin C; Schmitt, Lukas Ian; Komorowski, Robert W; Remondes, Miguel; Halassa, Michael M

2017-01-01

Independently adjustable multielectrode arrays are routinely used to interrogate neuronal circuit function, enabling chronic in vivo monitoring of neuronal ensembles in freely behaving animals at a single-cell, single spike resolution. Despite the importance of this approach, its widespread use is limited by highly specialized design and fabrication methods. To address this, we have developed a Scalable, Lightweight, Integrated and Quick-to-assemble multielectrode array platform. This platform additionally integrates optical fibers with independently adjustable electrodes to allow simultaneous single unit recordings and circuit-specific optogenetic targeting and/or manipulation. In current designs, the fully assembled platforms are scalable from 2 to 32 microdrives, and yet range 1-3 g, light enough for small animals. Here, we describe the design process starting from intent in computer-aided design, parameter testing through finite element analysis and experimental means, and implementation of various applications across mice and rats. Combined, our methods may expand the utility of multielectrode recordings and their continued integration with other tools enabling functional dissection of intact neural circuits.
Circuit Methods for VLF Antenna Couplers. [for use in Loran or Omega receiver systems

NASA Technical Reports Server (NTRS)

Burhans, R. W.

1977-01-01

The limitations of different E-field antenna coupler or preamplifier circuits are presented. All circuits were evaluated using actual Loran or Omega signals. Electric field whip or wire antennas are the simplest types which can be used for reception of VLF signals in the 10 to 100 kHz range. JFET or MOSFET transistors provide impedance transformation and some voltage gain in simple circuits where the power for operating the preamplifier uses the same coaxial cable that feeds the signal back to the receiver. The circuit techniques provide useful alternative methods for Loran-Omega receiver system designers.
Design and simulation of the circuit of SWIR hyper-spectral imaging spectrometer

NASA Astrophysics Data System (ADS)

Ren, Bin; Li, Zi-tian; Meng, Nan

2009-07-01

With the requirement of the SWIR Hyper-spectral Imaging Spectrometer, this article describes a project of SWIR image circuit based on IRFPA detector. First, the structure of the SWIR Hyper-spectral Imaging Spectrometer is introduced in this paper, and then the infrared imaging circuit design is proposed, which is based on MCT SWIR FPA with 500*256 pixels, the detector NEPTURN, in Safradir Company. According to the scheme, several key technologies have been studied in particular, such as driving circuit, time control circuit, high-speed A/D converter, LVDS (Low Voltage Differential Signaling) transmission circuit. At last, An improved two-point Correction Method was chosen to correct the Non-uniformity of image. The simulation results demonstrate that the proposed method can effectively suppress noises and work with low power consumption. The electric system not only has the advantages of simplicity and compactness but also can work stably, providing 500×256 image at the frame frequency of 200 Hz in good quality.
Compiler-aided systematic construction of large-scale DNA strand displacement circuits using unpurified components

NASA Astrophysics Data System (ADS)

Thubagere, Anupama J.; Thachuk, Chris; Berleant, Joseph; Johnson, Robert F.; Ardelean, Diana A.; Cherry, Kevin M.; Qian, Lulu

2017-02-01

Biochemical circuits made of rationally designed DNA molecules are proofs of concept for embedding control within complex molecular environments. They hold promise for transforming the current technologies in chemistry, biology, medicine and material science by introducing programmable and responsive behaviour to diverse molecular systems. As the transformative power of a technology depends on its accessibility, two main challenges are an automated design process and simple experimental procedures. Here we demonstrate the use of circuit design software, combined with the use of unpurified strands and simplified experimental procedures, for creating a complex DNA strand displacement circuit that consists of 78 distinct species. We develop a systematic procedure for overcoming the challenges involved in using unpurified DNA strands. We also develop a model that takes synthesis errors into consideration and semi-quantitatively reproduces the experimental data. Our methods now enable even novice researchers to successfully design and construct complex DNA strand displacement circuits.
TEACHING ENGINEERING DESIGN, A STUDY OF JOBSHOP.

ERIC Educational Resources Information Center

ENTWISLE, DORIS R.; HUGGINS, W.H.

THE USE OF A COMPUTER PROGRAM BY ENGINEERING STUDENTS TO SIMULATE A JOB SHOP THAT MANUFACTURES ELECTRONIC DEVICES HAS INDICATED THAT SIMULATION METHODS OFFER REALISTIC ASSISTANCE IN TEACHING. EACH STUDENT IN THE STUDY SUBMITTED SPECIFICATIONS FOR A CIRCUIT DESIGN AND, FROM THE COMPUTER, RECEIVED PERFORMANCE ASSESSMENTS OF THE CIRCUIT WHICH…
Making Complex Electrically Conductive Patterns on Cloth

NASA Technical Reports Server (NTRS)

Chu, Andrew; Fink, Patrick W.; Dobbins, Justin A.; Lin, Greg Y.; Scully, Robert C.; Trevino, Robert

2008-01-01

A method for automated fabrication of flexible, electrically conductive patterns on cloth substrates has been demonstrated. Products developed using this method, or related prior methods, are instances of a technology known as 'e-textiles,' in which electrically conductive patterns ar formed in, and on, textiles. For many applications, including high-speed digital circuits, antennas, and radio frequency (RF) circuits, an e-textile method should be capable of providing high surface conductivity, tight tolerances for control of characteristic impedances, and geometrically complex conductive patterns. Unlike prior methods, the present method satisfies all three of these criteria. Typical patterns can include such circuit structures as RF transmission lines, antennas, filters, and other conductive patterns equivalent to those of conventional printed circuits. The present method overcomes the limitations of the prior methods for forming the equivalent of printed circuits on cloth. A typical fabrication process according to the present method involves selecting the appropriate conductive and non-conductive fabric layers to build the e-textile circuit. The present method uses commercially available woven conductive cloth with established surface conductivity specifications. Dielectric constant, loss tangent, and thickness are some of the parameters to be considered for the non-conductive fabric layers. The circuit design of the conductive woven fabric is secured onto a non-conductive fabric layer using sewing, embroidery, and/or adhesive means. The portion of the conductive fabric that is not part of the circuit is next cut from the desired circuit using an automated machine such as a printed-circuit-board milling machine or a laser cutting machine. Fiducials can be used to align the circuit and the cutting machine. Multilayer circuits can be built starting with the inner layer and using conductive thread to make electrical connections between layers.
Testing and Qualifying Linear Integrated Circuits for Radiation Degradation in Space

NASA Technical Reports Server (NTRS)

Johnston, Allan H.; Rax, Bernard G.

2006-01-01

This paper discusses mechanisms and circuit-related factors that affect the degradation of linear integrated circuits from radiation in space. For some circuits there is sufficient degradation to affect performance at total dose levels below 4 krad(Si) because the circuit design techniques require higher gain for the pnp transistors that are the most sensitive to radiation. Qualification methods are recommended that include displacement damage as well as ionization damage.
Removal of Gross Air Embolization from Cardiopulmonary Bypass Circuits with Integrated Arterial Line Filters: A Comparison of Circuit Designs.

PubMed

Reagor, James A; Holt, David W

2016-03-01

Advances in technology, the desire to minimize blood product transfusions, and concerns relating to inflammatory mediators have lead many practitioners and manufacturers to minimize cardiopulmonary bypass (CBP) circuit designs. The oxygenator and arterial line filter (ALF) have been integrated into one device as a method of attaining a reduction in prime volume and surface area. The instructions for use of a currently available oxygenator with integrated ALF recommends incorporating a recirculation line distal to the oxygenator. However, according to an unscientific survey, 70% of respondents utilize CPB circuits incorporating integrated ALFs without a path of recirculation distal to the oxygenator outlet. Considering this circuit design, the ability to quickly remove a gross air bolus in the blood path distal to the oxygenator may be compromised. This in vitro study was designed to determine if the time required to remove a gross air bolus from a CPB circuit without a path of recirculation distal to the oxygenator will be significantly longer than that of a circuit with a path of recirculation distal to the oxygenator. A significant difference was found in the mean time required to remove a gross air bolus between the circuit designs (p = .0003). Additionally, There was found to be a statistically significant difference in the mean time required to remove a gross air bolus between Trial 1 and Trials 4 (p = .015) and 5 (p =.014) irrespective of the circuit design. Under the parameters of this study, a recirculation line distal to an oxygenator with an integrated ALF significantly decreases the time it takes to remove an air bolus from the CPB circuit and may be safer for clinical use than the same circuit without a recirculation line.
Analog self-powered harvester achieving switching pause control to increase harvested energy

NASA Astrophysics Data System (ADS)

Makihara, Kanjuro; Asahina, Kei

2017-05-01

In this paper, we propose a self-powered analog controller circuit to increase the efficiency of electrical energy harvesting from vibrational energy using piezoelectric materials. Although the existing synchronized switch harvesting on inductor (SSHI) method is designed to produce efficient harvesting, its switching operation generates a vibration-suppression effect that reduces the harvested levels of electrical energy. To solve this problem, the authors proposed—in a previous paper—a switching method that takes this vibration-suppression effect into account. This method temporarily pauses the switching operation, allowing the recovery of the mechanical displacement and, therefore, of the piezoelectric voltage. In this paper, we propose a self-powered analog circuit to implement this switching control method. Self-powered vibration harvesting is achieved in this study by attaching a newly designed circuit to an existing analog controller for SSHI. This circuit aims to effectively implement the aforementioned new switching control strategy, where switching is paused in some vibration peaks, in order to allow motion recovery and a consequent increase in the harvested energy. Harvesting experiments performed using the proposed circuit reveal that the proposed method can increase the energy stored in the storage capacitor by a factor of 8.5 relative to the conventional SSHI circuit. This proposed technique is useful to increase the harvested energy especially for piezoelectric systems having large coupling factor.
Maximum Temperature Detection System for Integrated Circuits

NASA Astrophysics Data System (ADS)

Frankiewicz, Maciej; Kos, Andrzej

2015-03-01

The paper describes structure and measurement results of the system detecting present maximum temperature on the surface of an integrated circuit. The system consists of the set of proportional to absolute temperature sensors, temperature processing path and a digital part designed in VHDL. Analogue parts of the circuit where designed with full-custom technique. The system is a part of temperature-controlled oscillator circuit - a power management system based on dynamic frequency scaling method. The oscillator cooperates with microprocessor dedicated for thermal experiments. The whole system is implemented in UMC CMOS 0.18 μm (1.8 V) technology.
Circuit-based versus full-wave modelling of active microwave circuits

NASA Astrophysics Data System (ADS)

Bukvić, Branko; Ilić, Andjelija Ž.; Ilić, Milan M.

2018-03-01

Modern full-wave computational tools enable rigorous simulations of linear parts of complex microwave circuits within minutes, taking into account all physical electromagnetic (EM) phenomena. Non-linear components and other discrete elements of the hybrid microwave circuit are then easily added within the circuit simulator. This combined full-wave and circuit-based analysis is a must in the final stages of the circuit design, although initial designs and optimisations are still faster and more comfortably done completely in the circuit-based environment, which offers real-time solutions at the expense of accuracy. However, due to insufficient information and general lack of specific case studies, practitioners still struggle when choosing an appropriate analysis method, or a component model, because different choices lead to different solutions, often with uncertain accuracy and unexplained discrepancies arising between the simulations and measurements. We here design a reconfigurable power amplifier, as a case study, using both circuit-based solver and a full-wave EM solver. We compare numerical simulations with measurements on the manufactured prototypes, discussing the obtained differences, pointing out the importance of measured parameters de-embedding, appropriate modelling of discrete components and giving specific recipes for good modelling practices.
A method for identifying EMI critical circuits during development of a large C3

NASA Astrophysics Data System (ADS)

Barr, Douglas H.

The circuit analysis methods and process Boeing Aerospace used on a large, ground-based military command, control, and communications (C3) system are described. This analysis was designed to help identify electromagnetic interference (EMI) critical circuits. The methodology used the MIL-E-6051 equipment criticality categories as the basis for defining critical circuits, relational database technology to help sort through and account for all of the approximately 5000 system signal cables, and Macintosh Plus personal computers to predict critical circuits based on safety margin analysis. The EMI circuit analysis process systematically examined all system circuits to identify which ones were likely to be EMI critical. The process used two separate, sequential safety margin analyses to identify critical circuits (conservative safety margin analysis, and detailed safety margin analysis). These analyses used field-to-wire and wire-to-wire coupling models using both worst-case and detailed circuit parameters (physical and electrical) to predict circuit safety margins. This process identified the predicted critical circuits that could then be verified by test.
The Design and Assessment of a Hypermedia Course on Semiconductor Manufacturing.

ERIC Educational Resources Information Center

Schank, Patrick K.; Rowe, Lawrence A.

1993-01-01

Describes the design and evaluation of a multimedia course on integrated circuit manufacturing that was developed at the University of California at Berkeley using IC-HIP (Integrated Circuit-Hypermedia in PICASSO), a hypermedia-based instructional system. Learning effects based on prior knowledge, methods of navigation, and other factors are…
Integrated circuit electrometer and sweep circuitry for an atmospheric probe

NASA Technical Reports Server (NTRS)

Zimmerman, L. E.

1971-01-01

The design of electrometer circuitry using an integrated circuit operational amplifier with a MOSFET input is described. Input protection against static voltages is provided by a dual ultra low leakage diode or a neon lamp. Factors affecting frequency response leakage resistance, and current stability are discussed, and methods are suggested for increasing response speed and for eliminating leakage resistance and current instabilities. Based on the above, two practical circuits, one having a linear response and the other a logarithmic response, were designed and evaluated experimentally. The design of a sweep circuit to implement mobility measurements using atmospheric probes is presented. A triangular voltage waveform is generated and shaped to contain a step in voltage from zero volts in both positive and negative directions.
Design and engineering of intracellular-metabolite-sensing/regulation gene circuits in Saccharomyces cerevisiae.

PubMed

Wang, Meng; Li, Sijin; Zhao, Huimin

2016-01-01

The development of high-throughput phenotyping tools is lagging far behind the rapid advances of genotype generation methods. To bridge this gap, we report a new strategy for design, construction, and fine-tuning of intracellular-metabolite-sensing/regulation gene circuits by repurposing bacterial transcription factors and eukaryotic promoters. As proof of concept, we systematically investigated the design and engineering of bacterial repressor-based xylose-sensing/regulation gene circuits in Saccharomyces cerevisiae. We demonstrated that numerous properties, such as induction ratio and dose-response curve, can be fine-tuned at three different nodes, including repressor expression level, operator position, and operator sequence. By applying these gene circuits, we developed a cell sorting based, rapid and robust high-throughput screening method for xylose transporter engineering and obtained a sugar transporter HXT14 mutant with 6.5-fold improvement in xylose transportation capacity. This strategy should be generally applicable and highly useful for evolutionary engineering of proteins, pathways, and genomes in S. cerevisiae. © 2015 Wiley Periodicals, Inc.
Negative Difference Resistance and Its Application to Construct Boolean Logic Circuits

NASA Astrophysics Data System (ADS)

Nikodem, Maciej; Bawiec, Marek A.; Surmacz, Tomasz R.

Electronic circuits based on nanodevices and quantum effect are the future of logic circuits design. Today's technology allows constructing resonant tunneling diodes, quantum cellular automata and nanowires/nanoribbons that are the elementary components of threshold gates. However, synthesizing a threshold circuit for an arbitrary logic function is still a challenging task where no efficient algorithms exist. This paper focuses on Generalised Threshold Gates (GTG), giving the overview of threshold circuit synthesis methods and presenting an algorithm that considerably simplifies the task in case of GTG circuits.
Multiplier less high-speed squaring circuit for binary numbers

NASA Astrophysics Data System (ADS)

Sethi, Kabiraj; Panda, Rutuparna

2015-03-01

The squaring operation is important in many applications in signal processing, cryptography etc. In general, squaring circuits reported in the literature use fast multipliers. A novel idea of a squaring circuit without using multipliers is proposed in this paper. Ancient Indian method used for squaring decimal numbers is extended here for binary numbers. The key to our success is that no multiplier is used. Instead, one squaring circuit is used. The hardware architecture of the proposed squaring circuit is presented. The design is coded in VHDL and synthesised and simulated in Xilinx ISE Design Suite 10.1 (Xilinx Inc., San Jose, CA, USA). It is implemented in Xilinx Vertex 4vls15sf363-12 device (Xilinx Inc.). The results in terms of time delay and area is compared with both modified Booth's algorithm and squaring circuit using Vedic multipliers. Our proposed squaring circuit seems to have better performance in terms of both speed and area.
A gradient system solution to Potts mean field equations and its electronic implementation.

PubMed

Urahama, K; Ueno, S

1993-03-01

A gradient system solution method is presented for solving Potts mean field equations for combinatorial optimization problems subject to winner-take-all constraints. In the proposed solution method the optimum solution is searched by using gradient descent differential equations whose trajectory is confined within the feasible solution space of optimization problems. This gradient system is proven theoretically to always produce a legal local optimum solution of combinatorial optimization problems. An elementary analog electronic circuit implementing the presented method is designed on the basis of current-mode subthreshold MOS technologies. The core constituent of the circuit is the winner-take-all circuit developed by Lazzaro et al. Correct functioning of the presented circuit is exemplified with simulations of the circuits implementing the scheme for solving the shortest path problems.
A quantitative framework for the forward design of synthetic miRNA circuits.

PubMed

Bloom, Ryan J; Winkler, Sally M; Smolke, Christina D

2014-11-01

Synthetic genetic circuits incorporating regulatory components based on RNA interference (RNAi) have been used in a variety of systems. A comprehensive understanding of the parameters that determine the relationship between microRNA (miRNA) and target expression levels is lacking. We describe a quantitative framework supporting the forward engineering of gene circuits that incorporate RNAi-based regulatory components in mammalian cells. We developed a model that captures the quantitative relationship between miRNA and target gene expression levels as a function of parameters, including mRNA half-life and miRNA target-site number. We extended the model to synthetic circuits that incorporate protein-responsive miRNA switches and designed an optimized miRNA-based protein concentration detector circuit that noninvasively measures small changes in the nuclear concentration of β-catenin owing to induction of the Wnt signaling pathway. Our results highlight the importance of methods for guiding the quantitative design of genetic circuits to achieve robust, reliable and predictable behaviors in mammalian cells.
Detection of circuit-board components with an adaptive multiclass correlation filter

NASA Astrophysics Data System (ADS)

Diaz-Ramirez, Victor H.; Kober, Vitaly

2008-08-01

A new method for reliable detection of circuit-board components is proposed. The method is based on an adaptive multiclass composite correlation filter. The filter is designed with the help of an iterative algorithm using complex synthetic discriminant functions. The impulse response of the filter contains information needed to localize and classify geometrically distorted circuit-board components belonging to different classes. Computer simulation results obtained with the proposed method are provided and compared with those of known multiclass correlation based techniques in terms of performance criteria for recognition and classification of objects.

[Modeling and analysis of volume conduction based on field-circuit coupling].

PubMed

Tang, Zhide; Liu, Hailong; Xie, Xiaohui; Chen, Xiufa; Hou, Deming

2012-08-01

Numerical simulations of volume conduction can be used to analyze the process of energy transfer and explore the effects of some physical factors on energy transfer efficiency. We analyzed the 3D quasi-static electric field by the finite element method, and developed A 3D coupled field-circuit model of volume conduction basing on the coupling between the circuit and the electric field. The model includes a circuit simulation of the volume conduction to provide direct theoretical guidance for energy transfer optimization design. A field-circuit coupling model with circular cylinder electrodes was established on the platform of the software FEM3.5. Based on this, the effects of electrode cross section area, electrode distance and circuit parameters on the performance of volume conduction system were obtained, which provided a basis for optimized design of energy transfer efficiency.
A Test Methodology for Determining Space-Readiness of Xilinx SRAM-Based FPGA Designs

DOE Office of Scientific and Technical Information (OSTI.GOV)

Quinn, Heather M; Graham, Paul S; Morgan, Keith S

2008-01-01

Using reconfigurable, static random-access memory (SRAM) based field-programmable gate arrays (FPGAs) for space-based computation has been an exciting area of research for the past decade. Since both the circuit and the circuit's state is stored in radiation-tolerant memory, both could be alterd by the harsh space radiation environment. Both the circuit and the circuit's state can be prote cted by triple-moduler redundancy (TMR), but applying TMR to FPGA user designs is often an error-prone process. Faulty application of TMR could cause the FPGA user circuit to output incorrect data. This paper will describe a three-tiered methodology for testing FPGA usermore » designs for space-readiness. We will describe the standard approach to testing FPGA user designs using a particle accelerator, as well as two methods using fault injection and a modeling tool. While accelerator testing is the current 'gold standard' for pre-launch testing, we believe the use of fault injection and modeling tools allows for easy, cheap and uniform access for discovering errors early in the design process.« less
Design techniques for low-voltage analog integrated circuits

NASA Astrophysics Data System (ADS)

Rakús, Matej; Stopjaková, Viera; Arbet, Daniel

2017-08-01

In this paper, a review and analysis of different design techniques for (ultra) low-voltage integrated circuits (IC) are performed. This analysis shows that the most suitable design methods for low-voltage analog IC design in a standard CMOS process include techniques using bulk-driven MOS transistors, dynamic threshold MOS transistors and MOS transistors operating in weak or moderate inversion regions. The main advantage of such techniques is that there is no need for any modification of standard CMOS structure or process. Basic circuit building blocks like differential amplifiers or current mirrors designed using these approaches are able to operate with the power supply voltage of 600 mV (or even lower), which is the key feature towards integrated systems for modern portable applications.
A polynomial-chaos-expansion-based building block approach for stochastic analysis of photonic circuits

NASA Astrophysics Data System (ADS)

Waqas, Abi; Melati, Daniele; Manfredi, Paolo; Grassi, Flavia; Melloni, Andrea

2018-02-01

The Building Block (BB) approach has recently emerged in photonic as a suitable strategy for the analysis and design of complex circuits. Each BB can be foundry related and contains a mathematical macro-model of its functionality. As well known, statistical variations in fabrication processes can have a strong effect on their functionality and ultimately affect the yield. In order to predict the statistical behavior of the circuit, proper analysis of the uncertainties effects is crucial. This paper presents a method to build a novel class of Stochastic Process Design Kits for the analysis of photonic circuits. The proposed design kits directly store the information on the stochastic behavior of each building block in the form of a generalized-polynomial-chaos-based augmented macro-model obtained by properly exploiting stochastic collocation and Galerkin methods. Using this approach, we demonstrate that the augmented macro-models of the BBs can be calculated once and stored in a BB (foundry dependent) library and then used for the analysis of any desired circuit. The main advantage of this approach, shown here for the first time in photonics, is that the stochastic moments of an arbitrary photonic circuit can be evaluated by a single simulation only, without the need for repeated simulations. The accuracy and the significant speed-up with respect to the classical Monte Carlo analysis are verified by means of classical photonic circuit example with multiple uncertain variables.
Rational Design of an Ultrasensitive Quorum-Sensing Switch.

PubMed

Zeng, Weiqian; Du, Pei; Lou, Qiuli; Wu, Lili; Zhang, Haoqian M; Lou, Chunbo; Wang, Hongli; Ouyang, Qi

2017-08-18

One of the purposes of synthetic biology is to develop rational methods that accelerate the design of genetic circuits, saving time and effort spent on experiments and providing reliably predictable circuit performance. We applied a reverse engineering approach to design an ultrasensitive transcriptional quorum-sensing switch. We want to explore how systems biology can guide synthetic biology in the choice of specific DNA sequences and their regulatory relations to achieve a targeted function. The workflow comprises network enumeration that achieves the target function robustly, experimental restriction of the obtained candidate networks, global parameter optimization via mathematical analysis, selection and engineering of parts based on these calculations, and finally, circuit construction based on the principles of standardization and modularization. The performance of realized quorum-sensing switches was in good qualitative agreement with the computational predictions. This study provides practical principles for the rational design of genetic circuits with targeted functions.
Enhacement of intrafield overlay using a design based metrology system

NASA Astrophysics Data System (ADS)

Jo, Gyoyeon; Ji, Sunkeun; Kim, Shinyoung; Kang, Hyunwoo; Park, Minwoo; Kim, Sangwoo; Kim, Jungchan; Park, Chanha; Yang, Hyunjo; Maruyama, Kotaro; Park, Byungjun

2016-03-01

As the scales of the semiconductor devices continue to shrink, accurate measurement and control of the overlay have been emphasized for securing more overlay margin. Conventional overlay analysis methods are based on the optical measurement of the overlay mark. However, the overlay data obtained from these optical methods cannot represent the exact misregistration between two layers at the circuit level. The overlay mismatch may arise from the size or pitch difference between the overlay mark and the real pattern. Pattern distortion, caused by CMP or etching, could be a source of the overlay mismatch as well. Another issue is the overlay variation in the real circuit pattern which varies depending on its location. The optical overlay measurement methods, such as IBO and DBO that use overlay mark on the scribeline, are not capable of defining the exact overlay values of the real circuit. Therefore, the overlay values of the real circuit need to be extracted to integrate the semiconductor device properly. The circuit level overlay measurement using CDSEM is time-consuming in extracting enough data to indicate overall trend of the chip. However DBM tool is able to derive sufficient data to display overlay tendency of the real circuit region with high repeatability. An E-beam based DBM(Design Based Metrology) tool can be an alternative overlay measurement method. In this paper, we are going to certify that the overlay values extracted from optical measurement cannot represent the circuit level overlay values. We will also demonstrate the possibility to correct misregistration between two layers using the overlay data obtained from the DBM system.
Prototyping and implementing flight qualifiable semicustom CMOS P-well bulk integrated circuits in the JPL environment

NASA Technical Reports Server (NTRS)

Olson, E. M.

1986-01-01

Presently, there are many difficulties associated with implementing application specific custom or semi-custom (standard cell based) integrated circuits (ICs) into JPL flight projects. One of the primary difficulties is developing prototype semi-custom integrated circuits for use and evaluation in engineering prototype flight hardware. The prototype semi-custom ICs must be extremely cost-effective and yet still representative of flight qualifiable versions of the design. A second difficulty is encountered in the transport of the design from engineering prototype quality to flight quality. Normally, flight quality integrated circuits have stringent quality standards, must be radiation resistant and should consume minimal power. It is often not necessary or cost effective, however, to impose such stringent quality standards on engineering models developed for systems analysis in controlled lab environments. This article presents work originally initiated for ground based applications that also addresses these two problems. Furthermore, this article suggests a method that has been shown successful in prototyping flight quality semi-custom ICs through the Metal Oxide Semiconductor Implementation Service (MOSIS) program run by the University of Southern California's Information Sciences Institute. The method has been used successfully to design and fabricate through the MOSIS three different semi-custom prototype CMOS p-well chips. The three designs make use of the work presented and were designed consistent with design techniques and structures that are flight qualifiable, allowing one hour transfer of the design from engineering model status to flight qualifiable foundry-ready status through methods outlined in this article.
Off-Line Quality Control In Integrated Circuit Fabrication Using Experimental Design

NASA Astrophysics Data System (ADS)

Phadke, M. S.; Kackar, R. N.; Speeney, D. V.; Grieco, M. J.

1987-04-01

Off-line quality control is a systematic method of optimizing production processes and product designs. It is widely used in Japan to produce high quality products at low cost. The method was introduced to us by Professor Genichi Taguchi who is a Deming-award winner and a former Director of the Japanese Academy of Quality. In this paper we will i) describe the off-line quality control method, and ii) document our efforts to optimize the process for forming contact windows in 3.5 Aim CMOS circuits fabricated in the Murray Hill Integrated Circuit Design Capability Laboratory. In the fabrication of integrated circuits it is critically important to produce contact windows of size very near the target dimension. Windows which are too small or too large lead to loss of yield. The off-line quality control method has improved both the process quality and productivity. The variance of the window size has been reduced by a factor of four. Also, processing time for window photolithography has been substantially reduced. The key steps of off-line quality control are: i) Identify important manipulatable process factors and their potential working levels. ii) Perform fractional factorial experiments on the process using orthogonal array designs. iii) Analyze the resulting data to determine the optimum operating levels of the factors. Both the process mean and the process variance are considered in this analysis. iv) Conduct an additional experiment to verify that the new factor levels indeed give an improvement.
An Integrated Magnetic Circuit Model and Finite Element Model Approach to Magnetic Bearing Design

NASA Technical Reports Server (NTRS)

Provenza, Andrew J.; Kenny, Andrew; Palazzolo, Alan B.

2003-01-01

A code for designing magnetic bearings is described. The code generates curves from magnetic circuit equations relating important bearing performance parameters. Bearing parameters selected from the curves by a designer to meet the requirements of a particular application are input directly by the code into a three-dimensional finite element analysis preprocessor. This means that a three-dimensional computer model of the bearing being developed is immediately available for viewing. The finite element model solution can be used to show areas of magnetic saturation and make more accurate predictions of the bearing load capacity, current stiffness, position stiffness, and inductance than the magnetic circuit equations did at the start of the design process. In summary, the code combines one-dimensional and three-dimensional modeling methods for designing magnetic bearings.
Flexible circuits with integrated switches for robotic shape sensing

NASA Astrophysics Data System (ADS)

Harnett, C. K.

2016-05-01

Digital switches are commonly used for detecting surface contact and limb-position limits in robotics. The typical momentary-contact digital switch is a mechanical device made from metal springs, designed to connect with a rigid printed circuit board (PCB). However, flexible printed circuits are taking over from the rigid PCB in robotics because the circuits can bend while carrying signals and power through moving joints. This project is motivated by a previous work where an array of surface-mount momentary contact switches on a flexible circuit acted as an all-digital shape sensor compatible with the power resources of energy harvesting systems. Without a rigid segment, the smallest commercially-available surface-mount switches would detach from the flexible circuit after several bending cycles, sometimes violently. This report describes a low-cost, conductive fiber based method to integrate electromechanical switches into flexible circuits and other soft, bendable materials. Because the switches are digital (on/off), they differ from commercially-available continuous-valued bend/flex sensors. No amplification or analog-to-digital conversion is needed to read the signal, but the tradeoff is that the digital switches only give a threshold curvature value. Boundary conditions on the edges of the flexible circuit are key to setting the threshold curvature value for switching. This presentation will discuss threshold-setting, size scaling of the design, automation for inserting a digital switch into the flexible circuit fabrication process, and methods for reconstructing a shape from an array of digital switch states.
Fully chip-embedded automation of a multi-step lab-on-a-chip process using a modularized timer circuit.

PubMed

Kang, Junsu; Lee, Donghyeon; Heo, Young Jin; Chung, Wan Kyun

2017-11-07

For highly-integrated microfluidic systems, an actuation system is necessary to control the flow; however, the bulk of actuation devices including pumps or valves has impeded the broad application of integrated microfluidic systems. Here, we suggest a microfluidic process control method based on built-in microfluidic circuits. The circuit is composed of a fluidic timer circuit and a pneumatic logic circuit. The fluidic timer circuit is a serial connection of modularized timer units, which sequentially pass high pressure to the pneumatic logic circuit. The pneumatic logic circuit is a NOR gate array designed to control the liquid-controlling process. By using the timer circuit as a built-in signal generator, multi-step processes could be done totally inside the microchip without any external controller. The timer circuit uses only two valves per unit, and the number of process steps can be extended without limitation by adding timer units. As a demonstration, an automation chip has been designed for a six-step droplet treatment, which entails 1) loading, 2) separation, 3) reagent injection, 4) incubation, 5) clearing and 6) unloading. Each process was successfully performed for a pre-defined step-time without any external control device.
Design and Performance Analysis of an Intrinsically Safe Ultrasonic Ranging Sensor

PubMed Central

Zhang, Hongjuan; Wang, Yu; Zhang, Xu; Wang, Dong; Jin, Baoquan

2016-01-01

In flammable or explosive environments, an ultrasonic sensor for distance measurement poses an important engineering safety challenge, because the driving circuit uses an intermediate frequency transformer as an impedance transformation element, in which the produced heat or spark is available for ignition. In this paper, an intrinsically safe ultrasonic ranging sensor is designed and implemented. The waterproof piezoelectric transducer with integrated transceiver is chosen as an energy transducing element. Then a novel transducer driving circuit is designed based on an impedance matching method considering safety spark parameters to replace an intermediate frequency transformer. Then, an energy limiting circuit is developed to achieve dual levels of over-voltage and over-current protection. The detail calculation and evaluation are executed and the electrical characteristics are analyzed to verify the intrinsic safety of the driving circuit. Finally, an experimental platform of the ultrasonic ranging sensor system is constructed, which involves short-circuit protection. Experimental results show that the proposed ultrasonic ranging sensor is excellent in both ranging performance and intrinsic safety. PMID:27304958
Design and Performance Analysis of an Intrinsically Safe Ultrasonic Ranging Sensor.

PubMed

Zhang, Hongjuan; Wang, Yu; Zhang, Xu; Wang, Dong; Jin, Baoquan

2016-06-13

In flammable or explosive environments, an ultrasonic sensor for distance measurement poses an important engineering safety challenge, because the driving circuit uses an intermediate frequency transformer as an impedance transformation element, in which the produced heat or spark is available for ignition. In this paper, an intrinsically safe ultrasonic ranging sensor is designed and implemented. The waterproof piezoelectric transducer with integrated transceiver is chosen as an energy transducing element. Then a novel transducer driving circuit is designed based on an impedance matching method considering safety spark parameters to replace an intermediate frequency transformer. Then, an energy limiting circuit is developed to achieve dual levels of over-voltage and over-current protection. The detail calculation and evaluation are executed and the electrical characteristics are analyzed to verify the intrinsic safety of the driving circuit. Finally, an experimental platform of the ultrasonic ranging sensor system is constructed, which involves short-circuit protection. Experimental results show that the proposed ultrasonic ranging sensor is excellent in both ranging performance and intrinsic safety.
A clocking discipline for two-phase digital integrated circuits

NASA Astrophysics Data System (ADS)

Noice, D. C.

1983-09-01

Sooner or later a designer of digital circuits must face the problem of timing verification so he can avoid errors caused by clock skew, critical races, and hazards. Unlike previous verification methods, such as timing simulation and timing analysis, the approach presented here guarantees correct operation despite uncertainty about delays in the circuit. The result is a clocking discipline that deals with timing abstractions only. It is not based on delay calculations; it is only concerned with the correct, synchronous operation at some clock rate. Accordingly, it may be used earlier in the design cycle, which is particularly important to integrated circuit designs. The clocking discipline consists of a notation of clocking types, and composition rules for using the types. Together, the notation and rules define a formal theory of two phase clocking. The notation defines the names and exact characteristics for different signals that are used in a two phase digital system. The notation makes it possible to develop rules for propagating the clocking types through particular circuits.
Stability of the Baseline Holder in Readout Circuits For Radiation Detectors

PubMed Central

Chen, Y.; Cui, Y.; O’Connor, P.; Seo, Y.; Camarda, G. S.; Hossain, A.; Roy, U.; Yang, G.; James, R. B.

2016-01-01

Baseline holder (BLH) circuits are used widely to stabilize the analog output of application-specific integrated circuits (ASICs) for high-count-rate applications. The careful design of BLH circuits is vital to the overall stability of the analog-signal-processing chain in ASICs. Recently, we observed self-triggered fluctuations in an ASIC in which the shaping circuits have a BLH circuit in the feedback loop. In fact, further investigations showed that methods of enhancing small-signal stabilities cause an even worse situation. To resolve this problem, we used large-signal analyses to study the circuit’s stability. We found that a relatively small gain for the error amplifier and a small current in the non-linear stage of the BLH are required to enhance stability in large-signal analysis, which will compromise the properties of the BLH. These findings were verified by SPICE simulations. In this paper, we present our detailed analysis of the BLH circuits, and propose an improved version of them that have only minimal self-triggered fluctuations. We summarize the design considerations both for the stability and the properties of the BLH circuits. PMID:27182081
Sunlight and Solar Cells: Teaching Digital Design and Communication through the Development of a Simple Monitoring Station

ERIC Educational Resources Information Center

Downs, Nathan; Parisi, Alfio

2010-01-01

A method is described for building a cost effective digital circuit capable of monitoring the solar radiation incident upon a remote solar cell. The circuit is built in two sections, the first, digitises the analogue voltage produced by the solar cell at a remote location and transmits the received signal to the second receiver circuit which…
Error correcting circuit design with carbon nanotube field effect transistors

NASA Astrophysics Data System (ADS)

Liu, Xiaoqiang; Cai, Li; Yang, Xiaokuo; Liu, Baojun; Liu, Zhongyong

2018-03-01

In this work, a parallel error correcting circuit based on (7, 4) Hamming code is designed and implemented with carbon nanotube field effect transistors, and its function is validated by simulation in HSpice with the Stanford model. A grouping method which is able to correct multiple bit errors in 16-bit and 32-bit application is proposed, and its error correction capability is analyzed. Performance of circuits implemented with CNTFETs and traditional MOSFETs respectively is also compared, and the former shows a 34.4% decrement of layout area and a 56.9% decrement of power consumption.
Novel high-gain, improved-bandwidth, finned-ladder V-band Traveling-Wave Tube slow-wave circuit design

NASA Technical Reports Server (NTRS)

Kory, Carol L.; Wilson, Jeffrey D.

1994-01-01

The V-band frequency range of 59-64 GHz is a region of the millimeter-wave spectrum that has been designated for inter-satellite communications. As a first effort to develop a high-efficiency V-band Traveling-Wave Tube (TWT), variations on a ring-plane slow-wave circuit were computationally investigated to develop an alternative to the more conventional ferruled coupled-cavity circuit. The ring-plane circuit was chosen because of its high interaction impedance, large beam aperture, and excellent thermal dissipation properties. Despite these advantages, however, low bandwidth and high voltage requirements have, until now, prevented its acceptance outside the laboratory. In this paper, the three-dimensional electrodynamic simulation code MAFIA (solution of MAxwell's Equation by the Finite-Integration-Algorithm) is used to investigate methods of increasing the bandwidth and lowering the operating voltage of the ring-plane circuit. Calculations of frequency-phase dispersion, beam on-axis interaction impedance, attenuation and small-signal gain per wavelength were performed for various geometric variations and loading distributions of the ring-plane TWT slow-wave circuit. Based on the results of the variations, a circuit termed the finned-ladder TWT slow-wave circuit was designed and is compared here to the scaled prototype ring-plane and a conventional ferruled coupled-cavity TWT circuit over the V-band frequency range. The simulation results indicate that this circuit has a much higher gain, significantly wider bandwidth, and a much lower voltage requirement than the scaled ring-plane prototype circuit, while retaining its excellent thermal dissipation properties. The finned-ladder circuit has a much larger small-signal gain per wavelength than the ferruled coupled-cavity circuit, but with a moderate sacrifice in bandwidth.
Electromagnetic Compatibility Design of the Computer Circuits

NASA Astrophysics Data System (ADS)

Zitai, Hong

2018-02-01

Computers and the Internet have gradually penetrated into every aspect of people’s daily work. But with the improvement of electronic equipment as well as electrical system, the electromagnetic environment becomes much more complex. Electromagnetic interference has become an important factor to hinder the normal operation of electronic equipment. In order to analyse the computer circuit compatible with the electromagnetic compatibility, this paper starts from the computer electromagnetic and the conception of electromagnetic compatibility. And then, through the analysis of the main circuit and system of computer electromagnetic compatibility problems, we can design the computer circuits in term of electromagnetic compatibility. Finally, the basic contents and methods of EMC test are expounded in order to ensure the electromagnetic compatibility of equipment.
Building synthetic gene circuits from combinatorial libraries: screening and selection strategies.

PubMed

Schaerli, Yolanda; Isalan, Mark

2013-07-01

The promise of wide-ranging biotechnology applications inspires synthetic biologists to design novel genetic circuits. However, building such circuits rationally is still not straightforward and often involves painstaking trial-and-error. Mimicking the process of natural selection can help us to bridge the gap between our incomplete understanding of nature's design rules and our desire to build functional networks. By adopting the powerful method of directed evolution, which is usually applied to protein engineering, functional networks can be obtained through screening or selecting from randomised combinatorial libraries. This review first highlights the practical options to introduce combinatorial diversity into gene circuits and then examines strategies for identifying the potentially rare library members with desired functions, either by screening or selection.

Compact self-powered synchronous energy extraction circuit design with enhanced performance

NASA Astrophysics Data System (ADS)

Liu, Weiqun; Zhao, Caiyou; Badel, Adrien; Formosa, Fabien; Zhu, Qiao; Hu, Guangdi

2018-04-01

Synchronous switching circuit is viewed as an effective solution of enhancing the generator’s performance and providing better adaptability for load variations. A critical issue for these synchronous switching circuits is the self-powered realization. In contrast with other methods, the electronic breaker possesses the advantage of simplicity and reliability. However, beside the energy consumption of the electronic breakers, the parasitic capacitance decreases the available piezoelectric voltage. In this technical note, a new compact design of the self-powered switching circuit using electronic breaker is proposed. The envelope diodes are excluded and only a single envelope capacitor is used. The parasitic capacitance is reduced to half with boosted performance while the components are reduced with cost saved.
Mise en oeuvre et caracterisation d'une methode d'injection de pannes a haut niveau d'abstraction

NASA Astrophysics Data System (ADS)

Robache, Remi

Nowadays, the effects of cosmic rays on electronics are well known. Different studies have demonstrated that neutrons are the main cause of non-destructive errors in embedded circuits on airplanes. Moreover, the reduction of transistor sizes is making all circuits more sensitive to those effects. Radiation tolerant circuits are sometimes used in order to improve the robustness of circuits. However, those circuits are expensive and their technologies often lag a few generations behind compared to non-tolerant circuits. Designers prefer to use conventional circuits with mitigation techniques to improve the tolerance to soft errors. It is necessary to analyse and verify the dependability of a circuit throughout its design process. Conventional design methodologies need to be adapted in order to evaluate the tolerance to non-destructive errors caused by radiations. Nowadays, designers need new tools and new methodologies to validate their mitigation strategies if they are to meet system requirements. In this thesis, we are proposing a new methodology allowing to capture the faulty behavior of a circuit at a low level of abstraction and to apply it at a higher level. In order to do that, we are introducing the new concept of faulty behavior Signatures that allows creating, at a high level of abstraction (system level) models that reflect with high fidelity the faulty behavior of a circuit learned at a low level of abstraction, at gate level. We successfully replicated the faulty behavior of an 8 bit adder and multiplier with Simulink, with respectively a correlation coefficient of 98.53% and 99.86%. We are proposing a methodology that permits to generate a library of faulty components, with Simulink, allowing designers to verify the dependability of their models early in the design flow. We are presenting and analyzing our results obtained for three different circuits throughout this thesis. Within the framework of this project a paper was published at the NEWCAS 2013 conference (Robache et al., 2013). This works presents the new concept of faulty behavior Signature, the methodology for generating Signatures we developed and also our experiments with an 8bit multiplier.
Design and implementation of a RF powering circuit for RFID tags or other batteryless embedded devices.

PubMed

Liu, Dongsheng; Wang, Rencai; Yao, Ke; Zou, Xuecheng; Guo, Liang

2014-08-13

A RF powering circuit used in radio-frequency identification (RFID) tags and other batteryless embedded devices is presented in this paper. The RF powering circuit harvests energy from electromagnetic waves and converts the RF energy to a stable voltage source. Analysis of a NMOS gate-cross connected bridge rectifier is conducted to demonstrate relationship between device sizes and power conversion efficiency (PCE) of the rectifier. A rectifier with 38.54% PCE under normal working conditions is designed. Moreover, a stable voltage regulator with a temperature and voltage optimizing strategy including adoption of a combination resistor is developed, which is able to accommodate a large input range of 4 V to 12 V and be immune to temperature variations. Latch-up prevention and noise isolation methods in layout design are also presented. Designed with the HJTC 0.25 μm process, this regulator achieves 0.04 mV/°C temperature rejection ratio (TRR) and 2.5 mV/V voltage rejection ratio (VRR). The RF powering circuit is also fabricated in the HJTC 0.25 μm process. The area of the RF powering circuit is 0.23 × 0.24 mm². The RF powering circuit is successfully integrated with ISO/IEC 15693-compatible and ISO/IEC 14443-compatible RFID tag chips.
Design and Implementation of a RF Powering Circuit for RFID Tags or Other Batteryless Embedded Devices

PubMed Central

Liu, Dongsheng; Wang, Rencai; Yao, Ke; Zou, Xuecheng; Guo, Liang

2014-01-01

A RF powering circuit used in radio-frequency identification (RFID) tags and other batteryless embedded devices is presented in this paper. The RF powering circuit harvests energy from electromagnetic waves and converts the RF energy to a stable voltage source. Analysis of a NMOS gate-cross connected bridge rectifier is conducted to demonstrate relationship between device sizes and power conversion efficiency (PCE) of the rectifier. A rectifier with 38.54% PCE under normal working conditions is designed. Moreover, a stable voltage regulator with a temperature and voltage optimizing strategy including adoption of a combination resistor is developed, which is able to accommodate a large input range of 4 V to 12 V and be immune to temperature variations. Latch-up prevention and noise isolation methods in layout design are also presented. Designed with the HJTC 0.25 μm process, this regulator achieves 0.04 mV/°C temperature rejection ratio (TRR) and 2.5 mV/V voltage rejection ratio (VRR). The RF powering circuit is also fabricated in the HJTC 0.25 μm process. The area of the RF powering circuit is 0.23 × 0.24 mm2. The RF powering circuit is successfully integrated with ISO/IEC 15693-compatible and ISO/IEC 14443-compatible RFID tag chips. PMID:25123466
Sequence-invariant state machines

NASA Technical Reports Server (NTRS)

Whitaker, Sterling R.; Manjunath, Shamanna K.; Maki, Gary K.

1991-01-01

A synthesis method and an MOS VLSI architecture are presented to realize sequential circuits that have the ability to implement any state machine having N states and m inputs, regardless of the actual sequence specified in the flow table. The design method utilizes binary tree structured (BTS) logic to implement regular and dense circuits. The desired state sequence can be hardwired with power supply connections or can be dynamically reallocated if stored in a register. This allows programmable VLSI controllers to be designed with a compact size and performance approaching that of dedicated logic. Results of ICV implementations are reported and an example sequence-invariant state machine is contrasted with implementations based on traditional methods.
Implementation of Complex Biological Logic Circuits Using Spatially Distributed Multicellular Consortia

PubMed Central

Urrios, Arturo; de Nadal, Eulàlia; Solé, Ricard; Posas, Francesc

2016-01-01

Engineered synthetic biological devices have been designed to perform a variety of functions from sensing molecules and bioremediation to energy production and biomedicine. Notwithstanding, a major limitation of in vivo circuit implementation is the constraint associated to the use of standard methodologies for circuit design. Thus, future success of these devices depends on obtaining circuits with scalable complexity and reusable parts. Here we show how to build complex computational devices using multicellular consortia and space as key computational elements. This spatial modular design grants scalability since its general architecture is independent of the circuit’s complexity, minimizes wiring requirements and allows component reusability with minimal genetic engineering. The potential use of this approach is demonstrated by implementation of complex logical functions with up to six inputs, thus demonstrating the scalability and flexibility of this method. The potential implications of our results are outlined. PMID:26829588
Further Development of an Optimal Design Approach Applied to Axial Magnetic Bearings

NASA Technical Reports Server (NTRS)

Bloodgood, V. Dale, Jr.; Groom, Nelson J.; Britcher, Colin P.

2000-01-01

Classical design methods involved in magnetic bearings and magnetic suspension systems have always had their limitations. Because of this, the overall effectiveness of a design has always relied heavily on the skill and experience of the individual designer. This paper combines two approaches that have been developed to aid the accuracy and efficiency of magnetostatic design. The first approach integrates classical magnetic circuit theory with modern optimization theory to increase design efficiency. The second approach uses loss factors to increase the accuracy of classical magnetic circuit theory. As an example, an axial magnetic thrust bearing is designed for minimum power.
Design of rapid prototype of UAV line-of-sight stabilized control system

NASA Astrophysics Data System (ADS)

Huang, Gang; Zhao, Liting; Li, Yinlong; Yu, Fei; Lin, Zhe

2018-01-01

The line-of-sight (LOS) stable platform is the most important technology of UAV (unmanned aerial vehicle), which can reduce the effect to imaging quality from vibration and maneuvering of the aircraft. According to the requirement of LOS stability system (inertial and optical-mechanical combined method) and UAV's structure, a rapid prototype is designed using based on industrial computer using Peripheral Component Interconnect (PCI) and Windows RTX to exchange information. The paper shows the control structure, and circuit system including the inertial stability control circuit with gyro and voice coil motor driven circuit, the optical-mechanical stability control circuit with fast-steering-mirror (FSM) driven circuit and image-deviation-obtained system, outer frame rotary follower, and information-exchange system on PC. Test results show the stability accuracy reaches 5μrad, and prove the effectiveness of the combined line-of-sight stabilization control system, and the real-time rapid prototype runs stable.
Cable Crosstalk Suppression with Two-Wire Voltage Feedback Method for Resistive Sensor Array

PubMed Central

Wu, Jianfeng; He, Shangshang; Li, Jianqing; Song, Aiguo

2016-01-01

Using a long, flexible test cable connected with a one-wire voltage feedback circuit, a resistive tactile sensor in a shared row-column fashion exhibited flexibility in robotic operations but suffered from crosstalk caused by the connected cable due to its wire resistances and its contacted resistances. Firstly, we designed a new non-scanned driving-electrode (VF-NSDE) circuit using two wires for every row line and every column line to reduce the crosstalk caused by the connected cables in the circuit. Then, an equivalent resistance expression of the element being tested (EBT) for the two-wire VF-NSDE circuit was analytically derived. Following this, the one-wire VF-NSDE circuit and the two-wire VF-NSDE circuit were evaluated by simulation experiments. Finally, positive features of the proposed method were verified with the experiments of a two-wire VF-NSDE prototype circuit. The experiment results show that the two-wire VF-NSDE circuit can greatly reduce the crosstalk error caused by the cables in the 2-D networked resistive sensor array. PMID:26907279
E-learning platform for automated testing of electronic circuits using signature analysis method

NASA Astrophysics Data System (ADS)

Gherghina, Cǎtǎlina; Bacivarov, Angelica; Bacivarov, Ioan C.; Petricǎ, Gabriel

2016-12-01

Dependability of electronic circuits can be ensured only through testing of circuit modules. This is done by generating test vectors and their application to the circuit. Testability should be viewed as a concerted effort to ensure maximum efficiency throughout the product life cycle, from conception and design stage, through production to repairs during products operating. In this paper, is presented the platform developed by authors for training for testability in electronics, in general and in using signature analysis method, in particular. The platform allows highlighting the two approaches in the field namely analog and digital signature of circuits. As a part of this e-learning platform, it has been developed a database for signatures of different electronic components meant to put into the spotlight different techniques implying fault detection, and from this there were also self-repairing techniques of the systems with this kind of components. An approach for realizing self-testing circuits based on MATLAB environment and using signature analysis method is proposed. This paper analyses the benefits of signature analysis method and simulates signature analyzer performance based on the use of pseudo-random sequences, too.
Design of the NDUV detection circuit for the NO concentration of the vehicle exhaust emissions

NASA Astrophysics Data System (ADS)

Zhang, Kai; Zhang, Yujun; He, Ying; You, Kun; Gao, Yanwei; Chen, Chen; Liu, Guohua; He, Chungui; Lu, Yibing; Liu, Wenqing

2016-10-01

With the increasing number of vehicles, the harm from NO to the environment becomes more and more prominent. So the monitoring of the NO concentration of the vehicle exhaust emissions is very important to assess the emission levels. In this paper, the NO detection system designing for vehicle exhaust emissions based on the non-dispersive ultraviolet principle (NDUV) has been researched. The technical indexes of the two-way modulation UV signal detection circuit are discussed in detail. And then a precision detection circuit is designed, which is composed of a trans-impedance amplifier and a lock-in amplifier, with which the output of the UV photoelectric detector can be amplified to a suitable voltage range, and the DC noise of the pre-stage amplifier is effectively removed by the lock-in amplifier. An experimental system was set up to test the designed circuit. To ensure the consistency of the two channels, the method of exchange calibration was adopted in the test. It's drawn that the designed circuit is of high SNR, measuring accuracy and a large dynamic range from the test results. The NO concentration detection limit of vehicle emissions can reach 1ppm, and the detection precision is +/-15ppm.
The design of preamplifier and ADC circuit base on weak e-optical signal

NASA Astrophysics Data System (ADS)

Fen, Leng; Ying-ping, Yang; Ya-nan, Yu; Xiao-ying, Xu

2011-02-01

Combined with the demand of the process of weak e-optical signal in QPD detection system, the article introduced the circuit principle of deigning preamplifier and ADC circuit with I/V conversion, instrumentation amplifier, low-pass filter and 16-bit A/D transformation. At the same time the article discussed the circuit's noise suppression and isolation according to the characteristics of the weak signal, and gave the method of software rectification. Finally, tested the weak signal with keithley2000, and got a good effect.
Magnetic force microscopy method and apparatus to detect and image currents in integrated circuits

DOEpatents

Campbell, Ann. N.; Anderson, Richard E.; Cole, Jr., Edward I.

1995-01-01

A magnetic force microscopy method and improved magnetic tip for detecting and quantifying internal magnetic fields resulting from current of integrated circuits. Detection of the current is used for failure analysis, design verification, and model validation. The interaction of the current on the integrated chip with a magnetic field can be detected using a cantilevered magnetic tip. Enhanced sensitivity for both ac and dc current and voltage detection is achieved with voltage by an ac coupling or a heterodyne technique. The techniques can be used to extract information from analog circuits.
Magnetic force microscopy method and apparatus to detect and image currents in integrated circuits

DOEpatents

Campbell, A.N.; Anderson, R.E.; Cole, E.I. Jr.

1995-11-07

A magnetic force microscopy method and improved magnetic tip for detecting and quantifying internal magnetic fields resulting from current of integrated circuits are disclosed. Detection of the current is used for failure analysis, design verification, and model validation. The interaction of the current on the integrated chip with a magnetic field can be detected using a cantilevered magnetic tip. Enhanced sensitivity for both ac and dc current and voltage detection is achieved with voltage by an ac coupling or a heterodyne technique. The techniques can be used to extract information from analog circuits. 17 figs.
A new method of radio frequency links by coplanar coils for implantable medical devices.

PubMed

Xue, L; Hao, H W; Li, L; Ma, B Z

2005-01-01

A new method based on coplanar coils for the design of radio frequency links has been developed, to realize the communication between the programming wand and the implantable medical devices with shielding container simply and reliably. With the analysis of electronic and magnetic field theory, the communication model has been established and simulated, and the circuit has been designed and tested. The experimental results are consistent with the simulation fairly well. The voltage transfer ratio of the typical circuit with present parameters can reach as high as 0.02, which can fulfill the requirements of communication.
DOE Office of Scientific and Technical Information (OSTI.GOV)

Bolme, David S; Mikkilineni, Aravind K; Rose, Derek C

Analog computational circuits have been demonstrated to provide substantial improvements in power and speed relative to digital circuits, especially for applications requiring extreme parallelism but only modest precision. Deep machine learning is one such area and stands to benefit greatly from analog and mixed-signal implementations. However, even at modest precisions, offsets and non-linearity can degrade system performance. Furthermore, in all but the simplest systems, it is impossible to directly measure the intermediate outputs of all sub-circuits. The result is that circuit designers are unable to accurately evaluate the non-idealities of computational circuits in-situ and are therefore unable to fully utilizemore » measurement results to improve future designs. In this paper we present a technique to use deep learning frameworks to model physical systems. Recently developed libraries like TensorFlow make it possible to use back propagation to learn parameters in the context of modeling circuit behavior. Offsets and scaling errors can be discovered even for sub-circuits that are deeply embedded in a computational system and not directly observable. The learned parameters can be used to refine simulation methods or to identify appropriate compensation strategies. We demonstrate the framework using a mixed-signal convolution operator as an example circuit.« less
Generating multi-double-scroll attractors via nonautonomous approach.

PubMed

Hong, Qinghui; Xie, Qingguo; Shen, Yi; Wang, Xiaoping

2016-08-01

It is a common phenomenon that multi-scroll attractors are realized by introducing the various nonlinear functions with multiple breakpoints in double scroll chaotic systems. Differently, we present a nonautonomous approach for generating multi-double-scroll attractors (MDSA) without changing the original nonlinear functions. By using the multi-level-logic pulse excitation technique in double scroll chaotic systems, MDSA can be generated. A Chua's circuit, a Jerk circuit, and a modified Lorenz system are given as designed example and the Matlab simulation results are presented. Furthermore, the corresponding realization circuits are designed. The Pspice results are in agreement with numerical simulation results, which verify the availability and feasibility of this method.
Extra high speed modified Lundell alternator parameters and open/short-circuit characteristics from global 3D-FE magnetic field solutions

NASA Astrophysics Data System (ADS)

Wang, R.; Demerdash, N. A.

1992-06-01

The combined magnetic vector potential - magnetic scalar potential method of computation of 3D magnetic fields by finite elements, introduced in a companion paper, is used for global 3D field analysis and machine performance computations under open-circuit and short-circuit conditions for an example 14.3 kVA modified Lundell alternator, whose magnetic field is of intrinsic 3D nature. The computed voltages and currents under these machine test conditions were verified and found to be in very good agreement with corresponding test data. Results of use of this modelling and computation method in the study of a design alteration example, in which the stator stack length of the example alternator is stretched in order to increase voltage and volt-ampere rating, are given here. These results demonstrate the inadequacy of conventional 2D-based design concepts and the imperative of use of this type of 3D magnetic field modelling in the design and investigation of such machines.
Extra high speed modified Lundell alternator parameters and open/short-circuit characteristics from global 3D-FE magnetic field solutions

NASA Technical Reports Server (NTRS)

Wang, R.; Demerdash, N. A.

1992-01-01

The combined magnetic vector potential - magnetic scalar potential method of computation of 3D magnetic fields by finite elements, introduced in a companion paper, is used for global 3D field analysis and machine performance computations under open-circuit and short-circuit conditions for an example 14.3 kVA modified Lundell alternator, whose magnetic field is of intrinsic 3D nature. The computed voltages and currents under these machine test conditions were verified and found to be in very good agreement with corresponding test data. Results of use of this modelling and computation method in the study of a design alteration example, in which the stator stack length of the example alternator is stretched in order to increase voltage and volt-ampere rating, are given here. These results demonstrate the inadequacy of conventional 2D-based design concepts and the imperative of use of this type of 3D magnetic field modelling in the design and investigation of such machines.
Circuit Riding: A Method for Providing Reference Services.

ERIC Educational Resources Information Center

Plunket, Linda; And Others

1983-01-01

Discussion of the design and implementation of the Circuit Rider Librarian Program, a shared services project for delivering reference services to eight hospitals in Maine, includes a cost analysis of services and description of user evaluation survey. Five references, composite results of the survey, and postgrant options proposal are appended.…

Accurate time delay technology in simulated test for high precision laser range finder

NASA Astrophysics Data System (ADS)

Chen, Zhibin; Xiao, Wenjian; Wang, Weiming; Xue, Mingxi

2015-10-01

With the continuous development of technology, the ranging accuracy of pulsed laser range finder (LRF) is higher and higher, so the maintenance demand of LRF is also rising. According to the dominant ideology of "time analog spatial distance" in simulated test for pulsed range finder, the key of distance simulation precision lies in the adjustable time delay. By analyzing and comparing the advantages and disadvantages of fiber and circuit delay, a method was proposed to improve the accuracy of the circuit delay without increasing the count frequency of the circuit. A high precision controllable delay circuit was designed by combining the internal delay circuit and external delay circuit which could compensate the delay error in real time. And then the circuit delay accuracy could be increased. The accuracy of the novel circuit delay methods proposed in this paper was actually measured by a high sampling rate oscilloscope actual measurement. The measurement result shows that the accuracy of the distance simulated by the circuit delay is increased from +/- 0.75m up to +/- 0.15m. The accuracy of the simulated distance is greatly improved in simulated test for high precision pulsed range finder.
A Formalized Design Process for Bacterial Consortia That Perform Logic Computing

PubMed Central

Sun, Rui; Xi, Jingyi; Wen, Dingqiao; Feng, Jingchen; Chen, Yiwei; Qin, Xiao; Ma, Yanrong; Luo, Wenhan; Deng, Linna; Lin, Hanchi; Yu, Ruofan; Ouyang, Qi

2013-01-01

The concept of microbial consortia is of great attractiveness in synthetic biology. Despite of all its benefits, however, there are still problems remaining for large-scaled multicellular gene circuits, for example, how to reliably design and distribute the circuits in microbial consortia with limited number of well-behaved genetic modules and wiring quorum-sensing molecules. To manage such problem, here we propose a formalized design process: (i) determine the basic logic units (AND, OR and NOT gates) based on mathematical and biological considerations; (ii) establish rules to search and distribute simplest logic design; (iii) assemble assigned basic logic units in each logic operating cell; and (iv) fine-tune the circuiting interface between logic operators. We in silico analyzed gene circuits with inputs ranging from two to four, comparing our method with the pre-existing ones. Results showed that this formalized design process is more feasible concerning numbers of cells required. Furthermore, as a proof of principle, an Escherichia coli consortium that performs XOR function, a typical complex computing operation, was designed. The construction and characterization of logic operators is independent of “wiring” and provides predictive information for fine-tuning. This formalized design process provides guidance for the design of microbial consortia that perform distributed biological computation. PMID:23468999
BPF Theory-Based Design Method for Wireless Power Transfer System by Use of Magnetically Coupled Resonators

NASA Astrophysics Data System (ADS)

Awai, Ikuo

A wireless power transfer system based on two coupled resonators is analyzed by the filter design theory. Many useful relations between the equivalent circuit components are derived to comply with the change of power transfer condition along with the basic design of the system. Some design examples are given to deepen understanding of the theory and thus to stimulate using it for the system design. The effect of the resonator losses is also addressed to show the robustness of the theory, indicating the circuit loss of almost 10 dB does not deteriorate the matching condition too much.
Single Day Construction of Multigene Circuits with 3G Assembly.

PubMed

Halleran, Andrew D; Swaminathan, Anandh; Murray, Richard M

2018-05-18

The ability to rapidly design, build, and test prototypes is of key importance to every engineering discipline. DNA assembly often serves as a rate limiting step of the prototyping cycle for synthetic biology. Recently developed DNA assembly methods such as isothermal assembly and type IIS restriction enzyme systems take different approaches to accelerate DNA construction. We introduce a hybrid method, Golden Gate-Gibson (3G), that takes advantage of modular part libraries introduced by type IIS restriction enzyme systems and isothermal assembly's ability to build large DNA constructs in single pot reactions. Our method is highly efficient and rapid, facilitating construction of entire multigene circuits in a single day. Additionally, 3G allows generation of variant libraries enabling efficient screening of different possible circuit constructions. We characterize the efficiency and accuracy of 3G assembly for various construct sizes, and demonstrate 3G by characterizing variants of an inducible cell-lysis circuit.
A Parallel Genetic Algorithm for Automated Electronic Circuit Design

NASA Technical Reports Server (NTRS)

Lohn, Jason D.; Colombano, Silvano P.; Haith, Gary L.; Stassinopoulos, Dimitris; Norvig, Peter (Technical Monitor)

2000-01-01

We describe a parallel genetic algorithm (GA) that automatically generates circuit designs using evolutionary search. A circuit-construction programming language is introduced and we show how evolution can generate practical analog circuit designs. Our system allows circuit size (number of devices), circuit topology, and device values to be evolved. We present experimental results as applied to analog filter and amplifier design tasks.
Voltage Drop Compensation Method for Active Matrix Organic Light Emitting Diode Displays

NASA Astrophysics Data System (ADS)

Choi, Sang-moo; Ryu, Do-hyung; Kim, Keum-nam; Choi, Jae-beom; Kim, Byung-hee; Berkeley, Brian

2011-03-01

In this paper, the conventional voltage drop compensation methods are reviewed and the novel design and driving scheme, the advanced power de-coupled (aPDC) driving method, is proposed to effectively compensate the voltage IR drop of active matrix light emitting diode (AMOLED) displays. The advanced PDC driving scheme can be applied to general AMOLED pixel circuits that have been developed with only minor modification or without requiring modification in pixel circuit. A 14-in. AMOLED panel with the aPDC driving scheme was fabricated. Long range uniformity (LRU) of the 14-in. AMOLED panel was improved from 43% without the aPDC driving scheme, to over 87% at the same brightness by using the scheme and the layout complexity of the panel with new design scheme is less than that of the panel with the conventional design scheme.
Digital circuits using universal logic gates

NASA Technical Reports Server (NTRS)

Whitaker, Sterling R. (Inventor); Miles, Lowell H. (Inventor); Cameron, Eric G. (Inventor); Donohoe, Gregory W. (Inventor); Gambles, Jody W. (Inventor)

2004-01-01

According to the invention, a digital circuit design embodied in at least one of a structural netlist, a behavioral netlist, a hardware description language netlist, a full-custom ASIC, a semi-custom ASIC, an IP core, an integrated circuit, a hybrid of chips, one or more masks, a FPGA, and a circuit card assembly is disclosed. The digital circuit design includes first and second sub-circuits. The first sub-circuits comprise a first percentage of the digital circuit design and the second sub-circuits comprise a second percentage of the digital circuit design. Each of the second sub-circuits is substantially comprised of one or more kernel circuits. The kernel circuits are comprised of selection circuits. The second percentage is at least 5%. In various embodiments, the second percentage could be at least 10%, 20%, 30%, 40%, 50%, 60%, 70%, 80%, 90%, or 95%.
Efficient Digital Implementation of The Sigmoidal Function For Artificial Neural Network

NASA Astrophysics Data System (ADS)

Pratap, Rana; Subadra, M.

2011-10-01

An efficient piecewise linear approximation of a nonlinear function (PLAN) is proposed. This uses simulink environment design to perform a direct transformation from X to Y, where X is the input and Y is the approximated sigmoidal output. This PLAN is then used within the outputs of an artificial neural network to perform the nonlinear approximation. In This paper, is proposed a method to implement in FPGA (Field Programmable Gate Array) circuits different approximation of the sigmoid function.. The major benefit of the proposed method resides in the possibility to design neural networks by means of predefined block systems created in System Generator environment and the possibility to create a higher level design tools used to implement neural networks in logical circuits.
Chaos in the fractional order logistic delay system: Circuit realization and synchronization

DOE Office of Scientific and Technical Information (OSTI.GOV)

Baskonus, Haci Mehmet; Hammouch, Zakia; Mekkaoui, Toufik

2016-06-08

In this paper, we present a numerical study and a circuit design to prove existence of chaos in the fractional order Logistic delay system. In addition, we investigate an active control synchronization scheme in this system. Numerical and cicruit simulations show the effectiveness and feasibility of this method.
"Glitch Logic" and Applications to Computing and Information Security

NASA Technical Reports Server (NTRS)

Stoica, Adrian; Katkoori, Srinivas

2009-01-01

This paper introduces a new method of information processing in digital systems, and discusses its potential benefits to computing and information security. The new method exploits glitches caused by delays in logic circuits for carrying and processing information. Glitch processing is hidden to conventional logic analyses and undetectable by traditional reverse engineering techniques. It enables the creation of new logic design methods that allow for an additional controllable "glitch logic" processing layer embedded into a conventional synchronous digital circuits as a hidden/covert information flow channel. The combination of synchronous logic with specific glitch logic design acting as an additional computing channel reduces the number of equivalent logic designs resulting from synthesis, thus implicitly reducing the possibility of modification and/or tampering with the design. The hidden information channel produced by the glitch logic can be used: 1) for covert computing/communication, 2) to prevent reverse engineering, tampering, and alteration of design, and 3) to act as a channel for information infiltration/exfiltration and propagation of viruses/spyware/Trojan horses.
Modelling, analyses and design of switching converters

NASA Technical Reports Server (NTRS)

Cuk, S. M.; Middlebrook, R. D.

1978-01-01

A state-space averaging method for modelling switching dc-to-dc converters for both continuous and discontinuous conduction mode is developed. In each case the starting point is the unified state-space representation, and the end result is a complete linear circuit model, for each conduction mode, which correctly represents all essential features, namely, the input, output, and transfer properties (static dc as well as dynamic ac small-signal). While the method is generally applicable to any switching converter, it is extensively illustrated for the three common power stages (buck, boost, and buck-boost). The results for these converters are then easily tabulated owing to the fixed equivalent circuit topology of their canonical circuit model. The insights that emerge from the general state-space modelling approach lead to the design of new converter topologies through the study of generic properties of the cascade connection of basic buck and boost converters.
Quantitative characterization of genetic parts and circuits for plant synthetic biology.

PubMed

Schaumberg, Katherine A; Antunes, Mauricio S; Kassaw, Tessema K; Xu, Wenlong; Zalewski, Christopher S; Medford, June I; Prasad, Ashok

2016-01-01

Plant synthetic biology promises immense technological benefits, including the potential development of a sustainable bio-based economy through the predictive design of synthetic gene circuits. Such circuits are built from quantitatively characterized genetic parts; however, this characterization is a significant obstacle in work with plants because of the time required for stable transformation. We describe a method for rapid quantitative characterization of genetic plant parts using transient expression in protoplasts and dual luciferase outputs. We observed experimental variability in transient-expression assays and developed a mathematical model to describe, as well as statistical normalization methods to account for, this variability, which allowed us to extract quantitative parameters. We characterized >120 synthetic parts in Arabidopsis and validated our method by comparing transient expression with expression in stably transformed plants. We also tested >100 synthetic parts in sorghum (Sorghum bicolor) protoplasts, and the results showed that our method works in diverse plant groups. Our approach enables the construction of tunable gene circuits in complex eukaryotic organisms.
Sequence invariant state machines

NASA Technical Reports Server (NTRS)

Whitaker, S.; Manjunath, S.

1990-01-01

A synthesis method and new VLSI architecture are introduced to realize sequential circuits that have the ability to implement any state machine having N states and m inputs, regardless of the actual sequence specified in the flow table. A design method is proposed that utilizes BTS logic to implement regular and dense circuits. A given state sequence can be programmed with power supply connections or dynamically reallocated if stored in a register. Arbitrary flow table sequences can be modified or programmed to dynamically alter the function of the machine. This allows VLSI controllers to be designed with the programmability of a general purpose processor but with the compact size and performance of dedicated logic.
Apparatus and methods for packaging integrated circuit chips with antenna modules providing closed electromagnetic environment for integrated antennas

NASA Technical Reports Server (NTRS)

Gaucher, Brian P. (Inventor); Grzyb, Janusz (Inventor); Liu, Duixian (Inventor); Pfeiffer, Ullrich R. (Inventor)

2008-01-01

Apparatus and methods are provided for packaging IC chips together with integrated antenna modules designed to provide a closed EM (electromagnetic) environment for antenna radiators, thereby allowing antennas to be designed independent from the packaging technology.
Generating multi-double-scroll attractors via nonautonomous approach

DOE Office of Scientific and Technical Information (OSTI.GOV)

Hong, Qinghui; Xie, Qingguo, E-mail: qgxie@mail.hust.edu.cn; Shen, Yi

It is a common phenomenon that multi-scroll attractors are realized by introducing the various nonlinear functions with multiple breakpoints in double scroll chaotic systems. Differently, we present a nonautonomous approach for generating multi-double-scroll attractors (MDSA) without changing the original nonlinear functions. By using the multi-level-logic pulse excitation technique in double scroll chaotic systems, MDSA can be generated. A Chua's circuit, a Jerk circuit, and a modified Lorenz system are given as designed example and the Matlab simulation results are presented. Furthermore, the corresponding realization circuits are designed. The Pspice results are in agreement with numerical simulation results, which verify themore » availability and feasibility of this method.« less
Air-Gapped Structures as Magnetic Elements for Use in Power Processing Systems. Ph.D. Thesis

NASA Technical Reports Server (NTRS)

Ohri, A. K.

1977-01-01

Methodical approaches to the design of inductors for use in LC filters and dc-to-dc converters using air gapped magnetic structures are presented. Methods for the analysis and design of full wave rectifier LC filter circuits operating with the inductor current in both the continuous conduction and the discontinuous conduction modes are also described. In the continuous conduction mode, linear circuit analysis techniques are employed, while in the case of the discontinuous mode, the method of analysis requires computer solutions of the piecewise linear differential equations which describe the filter in the time domain. Procedures for designing filter inductors using air gapped cores are presented. The first procedure requires digital computation to yield a design which is optimized in the sense of minimum core volume and minimum number of turns. The second procedure does not yield an optimized design as defined above, but the design can be obtained by hand calculations or with a small calculator. The third procedure is based on the use of specially prepared magnetic core data and provides an easy way to quickly reach a workable design.
Experimental Verification of Guided-Wave Lumped Circuits Using Waveguide Metamaterials

NASA Astrophysics Data System (ADS)

Li, Yue; Zhang, Zhijun

2018-04-01

Through the construction and characterization in microwave frequencies, we experimentally demonstrate our recently developed theory of waveguide lumped circuits, i.e., waveguide metatronics [Sci. Adv. 2, e1501790 (2016), 10.1126/sciadv.1501790], as a method to design subwavelength-scaled analog circuits. In the paradigm of waveguide metatronics, numbers of lumped inductors and capacitors are easily integrated functionally inside the waveguide, which is an irreplaceable transmission line in millimeter-wave and terahertz systems with the advantages of low radiation loss and low crosstalk. An example of multiple-ordered metatronic filters with layered structures is fabricated utilizing the technique of substrate integrated waveguides, which can be easily constructed by the printed-circuit-board process. The materials used in the construction are also typical microwave materials with positive permittivity, low loss, and negligible dispersion, imitating the plasmonic materials with negative permittivity in the optical domain. The results verify the theory of waveguide metatronics, which provides an efficient platform of functional lumped circuit design for guided-wave processing.
Smart Phase Tuning in Microwave Photonic Integrated Circuits Toward Automated Frequency Multiplication by Design

NASA Astrophysics Data System (ADS)

Nabavi, N.

2018-07-01

The author investigates the monitoring methods for fine adjustment of the previously proposed on-chip architecture for frequency multiplication and translation of harmonics by design. Digital signal processing (DSP) algorithms are utilized to create an optimized microwave photonic integrated circuit functionality toward automated frequency multiplication. The implemented DSP algorithms are formed on discrete Fourier transform and optimization-based algorithms (Greedy and gradient-based algorithms), which are analytically derived and numerically compared based on the accuracy and speed of convergence criteria.
Design and implementation of grid multi-scroll fractional-order chaotic attractors

DOE Office of Scientific and Technical Information (OSTI.GOV)

Chen, Liping, E-mail: lip-chenhut@126.com; Pan, Wei; Wu, Ranchao

2016-08-15

This paper proposes a novel approach for generating multi-scroll chaotic attractors in multi-directions for fractional-order (FO) systems. The stair nonlinear function series and the saturated nonlinear function are combined to extend equilibrium points with index 2 in a new FO linear system. With the help of stability theory of FO systems, stability of its equilibrium points is analyzed, and the chaotic behaviors are validated through phase portraits, Lyapunov exponents, and Poincaré section. Choosing the order 0.96 as an example, a circuit for generating 2-D grid multiscroll chaotic attractors is designed, and 2-D 9 × 9 grid FO attractors are observed at most.more » Numerical simulations and circuit experimental results show that the method is feasible and the designed circuit is correct.« less
Local Random Quantum Circuits are Approximate Polynomial-Designs

NASA Astrophysics Data System (ADS)

Brandão, Fernando G. S. L.; Harrow, Aram W.; Horodecki, Michał

2016-09-01

We prove that local random quantum circuits acting on n qubits composed of O( t 10 n 2) many nearest neighbor two-qubit gates form an approximate unitary t-design. Previously it was unknown whether random quantum circuits were a t-design for any t > 3. The proof is based on an interplay of techniques from quantum many-body theory, representation theory, and the theory of Markov chains. In particular we employ a result of Nachtergaele for lower bounding the spectral gap of frustration-free quantum local Hamiltonians; a quasi-orthogonality property of permutation matrices; a result of Oliveira which extends to the unitary group the path-coupling method for bounding the mixing time of random walks; and a result of Bourgain and Gamburd showing that dense subgroups of the special unitary group, composed of elements with algebraic entries, are ∞-copy tensor-product expanders. We also consider pseudo-randomness properties of local random quantum circuits of small depth and prove that circuits of depth O( t 10 n) constitute a quantum t-copy tensor-product expander. The proof also rests on techniques from quantum many-body theory, in particular on the detectability lemma of Aharonov, Arad, Landau, and Vazirani. We give applications of the results to cryptography, equilibration of closed quantum dynamics, and the generation of topological order. In particular we show the following pseudo-randomness property of generic quantum circuits: Almost every circuit U of size O( n k ) on n qubits cannot be distinguished from a Haar uniform unitary by circuits of size O( n ( k-9)/11) that are given oracle access to U.

Waveguide metatronics: Lumped circuitry based on structural dispersion.

PubMed

Li, Yue; Liberal, Iñigo; Della Giovampaola, Cristian; Engheta, Nader

2016-06-01

Engineering optical nanocircuits by exploiting modularization concepts and methods inherited from electronics may lead to multiple innovations in optical information processing at the nanoscale. We introduce the concept of "waveguide metatronics," an advanced form of optical metatronics that uses structural dispersion in waveguides to obtain the materials and structures required to construct this class of circuitry. Using numerical simulations, we demonstrate that the design of a metatronic circuit can be carried out by using a waveguide filled with materials with positive permittivity. This includes the implementation of all "lumped" circuit elements and their assembly in a single circuit board. In doing so, we extend the concepts of optical metatronics to frequency ranges where there are no natural plasmonic materials available. The proposed methodology could be exploited as a platform to experimentally validate optical metatronic circuits in other frequency regimes, such as microwave frequency setups, and/or to provide a new route to design optical nanocircuitry.
Fault tolerant system based on IDDQ testing

NASA Astrophysics Data System (ADS)

Guibane, Badi; Hamdi, Belgacem; Mtibaa, Abdellatif; Bensalem, Brahim

2018-06-01

Offline test is essential to ensure good manufacturing quality. However, for permanent or transient faults that occur during the use of the integrated circuit in an application, an online integrated test is needed as well. This procedure should ensure the detection and possibly the correction or the masking of these faults. This requirement of self-correction is sometimes necessary, especially in critical applications that require high security such as automotive, space or biomedical applications. We propose a fault-tolerant design for analogue and mixed-signal design complementary metal oxide (CMOS) circuits based on the quiescent current supply (IDDQ) testing. A defect can cause an increase in current consumption. IDDQ testing technique is based on the measurement of power supply current to distinguish between functional and failed circuits. The technique has been an effective testing method for detecting physical defects such as gate-oxide shorts, floating gates (open) and bridging defects in CMOS integrated circuits. An architecture called BICS (Built In Current Sensor) is used for monitoring the supply current (IDDQ) of the connected integrated circuit. If the measured current is not within the normal range, a defect is signalled and the system switches connection from the defective to a functional integrated circuit. The fault-tolerant technique is composed essentially by a double mirror built-in current sensor, allowing the detection of abnormal current consumption and blocks allowing the connection to redundant circuits, if a defect occurs. Spices simulations are performed to valid the proposed design.
Electronic circuits and systems: A compilation. [including integrated circuits, logic circuits, varactor diode circuits, low pass filters, and optical equipment circuits

NASA Technical Reports Server (NTRS)

1975-01-01

Technological information is presented electronic circuits and systems which have potential utility outside the aerospace community. Topics discussed include circuit components such as filters, converters, and integrators, circuits designed for use with specific equipment or systems, and circuits designed primarily for use with optical equipment or displays.
49 CFR 236.5 - Design of control circuits on closed circuit principle.

Code of Federal Regulations, 2014 CFR

2014-10-01

... 49 Transportation 4 2014-10-01 2014-10-01 false Design of control circuits on closed circuit... THE INSTALLATION, INSPECTION, MAINTENANCE, AND REPAIR OF SIGNAL AND TRAIN CONTROL SYSTEMS, DEVICES, AND APPLIANCES Rules and Instructions: All Systems General § 236.5 Design of control circuits on...
49 CFR 236.5 - Design of control circuits on closed circuit principle.

Code of Federal Regulations, 2011 CFR

2011-10-01

... 49 Transportation 4 2011-10-01 2011-10-01 false Design of control circuits on closed circuit... THE INSTALLATION, INSPECTION, MAINTENANCE, AND REPAIR OF SIGNAL AND TRAIN CONTROL SYSTEMS, DEVICES, AND APPLIANCES Rules and Instructions: All Systems General § 236.5 Design of control circuits on...
49 CFR 236.5 - Design of control circuits on closed circuit principle.

Code of Federal Regulations, 2012 CFR

2012-10-01

... 49 Transportation 4 2012-10-01 2012-10-01 false Design of control circuits on closed circuit... THE INSTALLATION, INSPECTION, MAINTENANCE, AND REPAIR OF SIGNAL AND TRAIN CONTROL SYSTEMS, DEVICES, AND APPLIANCES Rules and Instructions: All Systems General § 236.5 Design of control circuits on...
49 CFR 236.5 - Design of control circuits on closed circuit principle.

Code of Federal Regulations, 2010 CFR

2010-10-01

... 49 Transportation 4 2010-10-01 2010-10-01 false Design of control circuits on closed circuit... THE INSTALLATION, INSPECTION, MAINTENANCE, AND REPAIR OF SIGNAL AND TRAIN CONTROL SYSTEMS, DEVICES, AND APPLIANCES Rules and Instructions: All Systems General § 236.5 Design of control circuits on...
49 CFR 236.5 - Design of control circuits on closed circuit principle.

Code of Federal Regulations, 2013 CFR

2013-10-01

... 49 Transportation 4 2013-10-01 2013-10-01 false Design of control circuits on closed circuit... THE INSTALLATION, INSPECTION, MAINTENANCE, AND REPAIR OF SIGNAL AND TRAIN CONTROL SYSTEMS, DEVICES, AND APPLIANCES Rules and Instructions: All Systems General § 236.5 Design of control circuits on...
Design of laser diode driver with constant current and temperature control system

NASA Astrophysics Data System (ADS)

Wang, Ming-cai; Yang, Kai-yong; Wang, Zhi-guo; Fan, Zhen-fang

2017-10-01

A laser Diode (LD) driver with constant current and temperature control system is designed according to the LD working characteristics. We deeply researched the protection circuit and temperature control circuit based on thermos-electric cooler(TEC) cooling circuit and PID algorithm. The driver could realize constant current output and achieve stable temperature control of LD. Real-time feedback control method was adopted in the temperature control system to make LD work on its best temperature point. The output power variety and output wavelength shift of LD caused by current and temperature instability were decreased. Furthermore, the driving current and working temperature is adjustable according to specific requirements. The experiment result showed that the developed LD driver meets the characteristics of LD.
Joule-Thief Circuit Performance for Electricity Energy Saving of Emergency Lamps

NASA Astrophysics Data System (ADS)

Nuryanto Budisusila, Eka; Arifin, Bustanul

2017-04-01

The alternative energy such as battery as power source is required as energy source failures. The other need is outdoor lighting. The electrical power source is expected to be a power saving, optimum and has long life operating. The Joule-Thief circuit is one of solution method for energy saving by using raised electromagnetic force on cored coil when there is back-current. This circuit has a transistor operated as a switch to cut voltage and current flowing along the coils. The present of current causing magnetic induction and generates energy. Experimental prototype was designed by using battery 1.5V to activate Light Emitting Diode or LED as load. The LED was connected in parallel or serial circuit configuration. The result show that the joule-thief circuit able to supply LED circuits up to 40 LEDs.
PUZZLE - A program for computer-aided design of printed circuit artwork

NASA Technical Reports Server (NTRS)

Harrell, D. A. W.; Zane, R.

1971-01-01

Program assists in solving spacing problems encountered in printed circuit /PC/ design. It is intended to have maximum use for two-sided PC boards carrying integrated circuits, and also aids design of discrete component circuits.
An Electronics Course Emphasizing Circuit Design

ERIC Educational Resources Information Center

Bergeson, Haven E.

1975-01-01

Describes a one-quarter introductory electronics course in which the students use a variety of inexpensive integrated circuits to design and construct a large number of useful circuits. Presents the subject matter of the course in three parts: linear circuits, digital circuits, and more complex circuits. (GS)
Multilayer graphene-based metasurfaces: robust design method for extremely broadband, wide-angle, and polarization-insensitive terahertz absorbers.

PubMed

Rahmanzadeh, Mahdi; Rajabalipanah, Hamid; Abdolali, Ali

2018-02-01

In this study, by using an equivalent circuit method, a polarization-insensitive terahertz (THz) absorber based on multilayer graphene-based metasurfaces (MGBMs) is systematically designed, providing an extremely broad absorption bandwidth (BW). The proposed absorber is a compact, three-layer structure, comprising square-, cross-, and circular-shaped graphene metasurfaces embedded between three separator dielectrics. The equivalent-conductivity method serves as a parameter retrieval technique to characterize the graphene metasurfaces as the components of the proposed circuit model. Good agreement is observed between the full-wave simulations and the equivalent-circuit predictions. The optimum MGBM absorber exhibits >90% absorbance in an extremely broad frequency band of 0.55-3.12 THz (BW=140%). The results indicate a significant BW enhancement compared with both the previous metal- and graphene-based THz absorbers, highlighting the capability of the designed MGBM absorber. To clarify the physical mechanism of absorption, the surface current and the electric-field distributions, as well as the power loss density of each graphene metasurface, are monitored and discussed. The MGBM functionality is evaluated under a wide range of incident wave angles to prove that the proposed absorber is omnidirectional and polarization-insensitive. These superior performances guarantee the applicability of the MGBM structure as an ultra-broadband absorber for various THz applications.
A capacitive CMOS-MEMS sensor designed by multi-physics simulation for integrated CMOS-MEMS technology

NASA Astrophysics Data System (ADS)

Konishi, Toshifumi; Yamane, Daisuke; Matsushima, Takaaki; Masu, Kazuya; Machida, Katsuyuki; Toshiyoshi, Hiroshi

2014-01-01

This paper reports the design and evaluation results of a capacitive CMOS-MEMS sensor that consists of the proposed sensor circuit and a capacitive MEMS device implemented on the circuit. To design a capacitive CMOS-MEMS sensor, a multi-physics simulation of the electromechanical behavior of both the MEMS structure and the sensing LSI was carried out simultaneously. In order to verify the validity of the design, we applied the capacitive CMOS-MEMS sensor to a MEMS accelerometer implemented by the post-CMOS process onto a 0.35-µm CMOS circuit. The experimental results of the CMOS-MEMS accelerometer exhibited good agreement with the simulation results within the input acceleration range between 0.5 and 6 G (1 G = 9.8 m/s2), corresponding to the output voltages between 908.6 and 915.4 mV, respectively. Therefore, we have confirmed that our capacitive CMOS-MEMS sensor and the multi-physics simulation will be beneficial method to realize integrated CMOS-MEMS technology.
Design of a specialized computer for on-line monitoring of cardiac stroke volume

NASA Technical Reports Server (NTRS)

Webb, J. A., Jr.; Gebben, V. D.

1972-01-01

The design of a specialized analog computer for on-line determination of cardiac stroke volume by means of a modified version of the pressure pulse contour method is presented. The design consists of an analog circuit for computation and a timing circuit for detecting necessary events on the pressure waveform. Readouts of arterial pressures, systolic duration, heart rate, percent change in stroke volume, and percent change in cardiac output are provided for monitoring cardiac patients. Laboratory results showed that computational accuracy was within 3 percent, while animal experiments verified the operational capability of the computer. Patient safety considerations are also discussed.
Development of a breadboard design of a high-performance, high-reliability switching regulator

NASA Technical Reports Server (NTRS)

Lindena, S. J.

1975-01-01

A comparison of two potential conversion methods, the series inverter and the inductive energy transfer (IET) conversion technique, is presented. The investigations showed that a characteristic of the series inverter circuit (high equalizing current values in each half cycle) could not be accomplished with available components, and the investigations continued with the IET circuit only. An IET circuit system was built with the use of computer-aided design in a 2, 4, and 8 stage configuration, and these stages were staggered 180, 90, and 45 degrees, respectively. All stages were pulsewidth modulated to regulate over an input voltage range from 200 to 400 volts dc at a regulated output voltage of 56 volts. The output power capability was 100 to 500 watts for the 2 and 8 stage configuration and 50 to 250 watts for the 4 stage configuration. Equal control of up to eight 45 degree staggered stages was accomplished through the use of a digital-to-analog control circuit. Equal power sharing of all stages was achieved through a new technique using an inductively coupled balancing circuit. Conclusions are listed.
Improvement in Brightness Uniformity by Compensating for the Threshold Voltages of Both the Driving Thin-Film Transistor and the Organic Light-Emitting Diode for Active-Matrix Organic Light-Emitting Diode Displays

NASA Astrophysics Data System (ADS)

Ching-Lin Fan,; Hui-Lung Lai,; Jyu-Yu Chang,

2010-05-01

In this paper, we propose a novel pixel design and driving method for active-matrix organic light-emitting diode (AM-OLED) displays using low-temperature polycrystalline silicon thin-film transistors (LTPS-TFTs). The proposed threshold voltage compensation circuit, which comprised five transistors and two capacitors, has been verified to supply uniform output current by simulation work using the automatic integrated circuit modeling simulation program with integrated circuit emphasis (AIM-SPICE) simulator. The driving scheme of this voltage programming method includes four periods: precharging, compensation, data input, and emission. The simulated results demonstrate excellent properties such as low error rate of OLED anode voltage variation (<1%) and high output current. The proposed pixel circuit shows high immunity to the threshold voltage deviation characteristics of both the driving poly-Si TFT and the OLED.
Design guidelines for advanced LSI microcircuit packaging using thick film multilayer technology

NASA Technical Reports Server (NTRS)

Peckinpaugh, C. J.

1974-01-01

Ceramic multilayer circuitry results from the sequential build-up of two or more layers of pre-determined conductive interconnections separated by dielectric layers and fired at an elevated temperature to form a solidly fused structure. The resultant ceramic interconnect matrix is used as a base to mount active and passive devices and provide the necessary electrical interconnection to accomplish the desired electrical circuit. Many methods are known for developing multilevel conductor mechanisms such as multilayer printed circuits, welded wire matrices, flexible copper tape conductors, and thin and thick-film ceramic multilayers. Each method can be considered as a specialized field with each possessing its own particular set of benefits and problems. This design guide restricts itself to the art of design, fabrication and assembly of ceramic multilayer circuitry and the reliability of the end product.
Universal programmable quantum circuit schemes to emulate an operator

DOE Office of Scientific and Technical Information (OSTI.GOV)

Daskin, Anmer; Grama, Ananth; Kollias, Giorgos

Unlike fixed designs, programmable circuit designs support an infinite number of operators. The functionality of a programmable circuit can be altered by simply changing the angle values of the rotation gates in the circuit. Here, we present a new quantum circuit design technique resulting in two general programmable circuit schemes. The circuit schemes can be used to simulate any given operator by setting the angle values in the circuit. This provides a fixed circuit design whose angles are determined from the elements of the given matrix-which can be non-unitary-in an efficient way. We also give both the classical and quantummore » complexity analysis for these circuits and show that the circuits require a few classical computations. For the electronic structure simulation on a quantum computer, one has to perform the following steps: prepare the initial wave function of the system; present the evolution operator U=e{sup -iHt} for a given atomic and molecular Hamiltonian H in terms of quantum gates array and apply the phase estimation algorithm to find the energy eigenvalues. Thus, in the circuit model of quantum computing for quantum chemistry, a crucial step is presenting the evolution operator for the atomic and molecular Hamiltonians in terms of quantum gate arrays. Since the presented circuit designs are independent from the matrix decomposition techniques and the global optimization processes used to find quantum circuits for a given operator, high accuracy simulations can be done for the unitary propagators of molecular Hamiltonians on quantum computers. As an example, we show how to build the circuit design for the hydrogen molecule.« less
Scaling of Topologically Similar Functional Modules Defines Mouse Primary Auditory and Somatosensory Microcircuitry

PubMed Central

Sadovsky, Alexander J.

2013-01-01

Mapping the flow of activity through neocortical microcircuits provides key insights into the underlying circuit architecture. Using a comparative analysis we determined the extent to which the dynamics of microcircuits in mouse primary somatosensory barrel field (S1BF) and auditory (A1) neocortex generalize. We imaged the simultaneous dynamics of up to 1126 neurons spanning multiple columns and layers using high-speed multiphoton imaging. The temporal progression and reliability of reactivation of circuit events in both regions suggested common underlying cortical design features. We used circuit activity flow to generate functional connectivity maps, or graphs, to test the microcircuit hypothesis within a functional framework. S1BF and A1 present a useful test of the postulate as both regions map sensory input anatomically, but each area appears organized according to different design principles. We projected the functional topologies into anatomical space and found benchmarks of organization that had been previously described using physiology and anatomical methods, consistent with a close mapping between anatomy and functional dynamics. By comparing graphs representing activity flow we found that each region is similarly organized as highlighted by hallmarks of small world, scale free, and hierarchical modular topologies. Models of prototypical functional circuits from each area of cortex were sufficient to recapitulate experimentally observed circuit activity. Convergence to common behavior by these models was accomplished using preferential attachment to scale from an auditory up to a somatosensory circuit. These functional data imply that the microcircuit hypothesis be framed as scalable principles of neocortical circuit design. PMID:23986241

Photonic crystal ring resonator based optical filters for photonic integrated circuits

DOE Office of Scientific and Technical Information (OSTI.GOV)

Robinson, S., E-mail: mail2robinson@gmail.com

In this paper, a two Dimensional (2D) Photonic Crystal Ring Resonator (PCRR) based optical Filters namely Add Drop Filter, Bandpass Filter, and Bandstop Filter are designed for Photonic Integrated Circuits (PICs). The normalized output response of the filters is obtained using 2D Finite Difference Time Domain (FDTD) method and the band diagram of periodic and non-periodic structure is attained by Plane Wave Expansion (PWE) method. The size of the device is minimized from a scale of few tens of millimeters to the order of micrometers. The overall size of the filters is around 11.4 μm × 11.4 μm which ismore » highly suitable of photonic integrated circuits.« less
Modeling and analysis of cascade solar cells

NASA Technical Reports Server (NTRS)

Ho, F. D.

1986-01-01

A brief review is given of the present status of the development of cascade solar cells. It is known that photovoltaic efficiencies can be improved through this development. The designs and calculations of the multijunction cells, however, are quite complicated. The main goal is to find a method which is a compromise between accuracy and simplicity for modeling a cascade solar cell. Three approaches are presently under way, among them (1) equivalent circuit approach, (2) numerical approach, and (3) analytical approach. Here, the first and the second approaches are discussed. The equivalent circuit approach using SPICE (Simulation Program, Integrated Circuit Emphasis) to the cascade cells and the cascade-cell array is highlighted. The methods of extracting parameters for modeling are discussed.
Genetic circuit design automation.

PubMed

Nielsen, Alec A K; Der, Bryan S; Shin, Jonghyeon; Vaidyanathan, Prashant; Paralanov, Vanya; Strychalski, Elizabeth A; Ross, David; Densmore, Douglas; Voigt, Christopher A

2016-04-01

Computation can be performed in living cells by DNA-encoded circuits that process sensory information and control biological functions. Their construction is time-intensive, requiring manual part assembly and balancing of regulator expression. We describe a design environment, Cello, in which a user writes Verilog code that is automatically transformed into a DNA sequence. Algorithms build a circuit diagram, assign and connect gates, and simulate performance. Reliable circuit design requires the insulation of gates from genetic context, so that they function identically when used in different circuits. We used Cello to design 60 circuits forEscherichia coli(880,000 base pairs of DNA), for which each DNA sequence was built as predicted by the software with no additional tuning. Of these, 45 circuits performed correctly in every output state (up to 10 regulators and 55 parts), and across all circuits 92% of the output states functioned as predicted. Design automation simplifies the incorporation of genetic circuits into biotechnology projects that require decision-making, control, sensing, or spatial organization. Copyright © 2016, American Association for the Advancement of Science.
Design and implementation of GaAs HBT circuits with ACME

NASA Technical Reports Server (NTRS)

Hutchings, Brad L.; Carter, Tony M.

1993-01-01

GaAs HBT circuits offer high performance (5-20 GHz) and radiation hardness (500 Mrad) that is attractive for space applications. ACME is a CAD tool specifically developed for HBT circuits. ACME implements a novel physical schematic-capture design technique where designers simultaneously view the structure and physical organization of a circuit. ACME's design interface is similar to schematic capture; however, unlike conventional schematic capture, designers can directly control the physical placement of both function and interconnect at the schematic level. In addition, ACME provides design-time parasitic extraction, complex wire models, and extensions to Multi-Chip Modules (MCM's). A GaAs HBT gate-array and semi-custom circuits have been developed with ACME; several circuits have been fabricated and found to be fully functional .
Quantum realization of the nearest-neighbor interpolation method for FRQI and NEQR

NASA Astrophysics Data System (ADS)

Sang, Jianzhi; Wang, Shen; Niu, Xiamu

2016-01-01

This paper is concerned with the feasibility of the classical nearest-neighbor interpolation based on flexible representation of quantum images (FRQI) and novel enhanced quantum representation (NEQR). Firstly, the feasibility of the classical image nearest-neighbor interpolation for quantum images of FRQI and NEQR is proven. Then, by defining the halving operation and by making use of quantum rotation gates, the concrete quantum circuit of the nearest-neighbor interpolation for FRQI is designed for the first time. Furthermore, quantum circuit of the nearest-neighbor interpolation for NEQR is given. The merit of the proposed NEQR circuit lies in their low complexity, which is achieved by utilizing the halving operation and the quantum oracle operator. Finally, in order to further improve the performance of the former circuits, new interpolation circuits for FRQI and NEQR are presented by using Control-NOT gates instead of a halving operation. Simulation results show the effectiveness of the proposed circuits.
Educational Support System for Experiments Involving Construction of Sound Processing Circuits

ERIC Educational Resources Information Center

Takemura, Atsushi

2012-01-01

This paper proposes a novel educational support system for technical experiments involving the production of practical electronic circuits for sound processing. To support circuit design and production, each student uses a computer during the experiments, and can learn circuit design, virtual circuit making, and real circuit making. In the…
OBIST methodology incorporating modified sensitivity of pulses for active analogue filter components

NASA Astrophysics Data System (ADS)

Khade, R. H.; Chaudhari, D. S.

2018-03-01

In this paper, oscillation-based built-in self-test method is used to diagnose catastrophic and parametric faults in integrated circuits. Sallen-Key low pass filter and high pass filter circuits with different gains are used to investigate defects. Variation in seven parameters of operational amplifier (OP-AMP) like gain, input impedance, output impedance, slew rate, input bias current, input offset current, input offset voltage and catastrophic as well as parametric defects in components outside OP-AMP are introduced in the circuit and simulation results are analysed. Oscillator output signal is converted to pulses which are used to generate a signature of the circuit. The signature and pulse count changes with the type of fault present in the circuit under test (CUT). The change in oscillation frequency is observed for fault detection. Designer has flexibility to predefine tolerance band of cut-off frequency and range of pulses for which circuit should be accepted. The fault coverage depends upon the required tolerance band of the CUT. We propose a modification of sensitivity of parameter (pulses) to avoid test escape and enhance yield. Result shows that the method provides 100% fault coverage for catastrophic faults.
Characterization of near-terahertz complementary metal-oxide semiconductor circuits using a Fourier-transform interferometer

DOE PAGES

Arenas, D. J.; Shim, Dongha; Koukis, D. I.; ...

2011-10-24

Optical methods for measuring of the emission spectra of oscillator circuits operating in the 400-600 GHz range are described. The emitted power from patch antennas included in the circuits is measured by placing the circuit in the source chamber of a Fourier-transform interferometric spectrometer. The results show that this optical technique is useful for measuring circuits pushing the frontier in operating frequency. The technique also allows the characterization of the circuit by measuring the power radiated in the fundamental and in the harmonics. This capability is useful for oscillator architectures designed to cancel the fundamental and use higher harmonics. Themore » radiated power was measured using two techniques: direct measurement of the power by placing the device in front of a bolometer of known responsivity, and by comparison to the estimated power from blackbody sources. The latter technique showed that these circuits have higher emission than blackbody sources at the operating frequencies, and, therefore, offer potential spectroscopy applications.« less
30 CFR 75.907 - Design of trailing cables for medium-voltage circuits.

Code of Federal Regulations, 2010 CFR

2010-07-01

... 30 Mineral Resources 1 2010-07-01 2010-07-01 false Design of trailing cables for medium-voltage... Medium-Voltage Alternating Current Circuits § 75.907 Design of trailing cables for medium-voltage circuits. [Statutory Provisions] Trailing cables for medium-voltage circuits shall include grounding...
30 CFR 75.907 - Design of trailing cables for medium-voltage circuits.

Code of Federal Regulations, 2011 CFR

2011-07-01

... 30 Mineral Resources 1 2011-07-01 2011-07-01 false Design of trailing cables for medium-voltage... Medium-Voltage Alternating Current Circuits § 75.907 Design of trailing cables for medium-voltage circuits. [Statutory Provisions] Trailing cables for medium-voltage circuits shall include grounding...
30 CFR 75.907 - Design of trailing cables for medium-voltage circuits.

Code of Federal Regulations, 2013 CFR

2013-07-01

... 30 Mineral Resources 1 2013-07-01 2013-07-01 false Design of trailing cables for medium-voltage... Medium-Voltage Alternating Current Circuits § 75.907 Design of trailing cables for medium-voltage circuits. [Statutory Provisions] Trailing cables for medium-voltage circuits shall include grounding...
30 CFR 75.907 - Design of trailing cables for medium-voltage circuits.

Code of Federal Regulations, 2012 CFR

2012-07-01

... 30 Mineral Resources 1 2012-07-01 2012-07-01 false Design of trailing cables for medium-voltage... Medium-Voltage Alternating Current Circuits § 75.907 Design of trailing cables for medium-voltage circuits. [Statutory Provisions] Trailing cables for medium-voltage circuits shall include grounding...
30 CFR 75.907 - Design of trailing cables for medium-voltage circuits.

Code of Federal Regulations, 2014 CFR

2014-07-01

... 30 Mineral Resources 1 2014-07-01 2014-07-01 false Design of trailing cables for medium-voltage... Medium-Voltage Alternating Current Circuits § 75.907 Design of trailing cables for medium-voltage circuits. [Statutory Provisions] Trailing cables for medium-voltage circuits shall include grounding...
Design of parity generator and checker circuit using electro-optic effect of Mach-Zehnder interferometers

NASA Astrophysics Data System (ADS)

Kumar, Santosh; Chanderkanta; Amphawan, Angela

2016-04-01

Parity is an extra bit which is used to add in digital information to detect error at the receiver end. It can be even and odd parity. In case of even parity, the number of one's will be even included the parity and reverse in the case of odd parity. The circuit which is used to generate the parity at the transmitter side, called the parity generator and the circuit which is used to detect the parity at receiver side is called as parity checker. In this paper, an even and odd parity generator and checker circuits are designed using electro-optic effect inside lithium niobate based Mach-Zehnder Interferometers (MZIs). The MZIs structures collectively show powerful capability in switching an input optical signal to a desired output port from a collection of output ports. The paper constitutes a mathematical description of the proposed device and thereafter simulation using MATLAB. The study is verified using beam propagation method (BPM).
Waveguide metatronics: Lumped circuitry based on structural dispersion

PubMed Central

Li, Yue; Liberal, Iñigo; Della Giovampaola, Cristian; Engheta, Nader

2016-01-01

Engineering optical nanocircuits by exploiting modularization concepts and methods inherited from electronics may lead to multiple innovations in optical information processing at the nanoscale. We introduce the concept of “waveguide metatronics,” an advanced form of optical metatronics that uses structural dispersion in waveguides to obtain the materials and structures required to construct this class of circuitry. Using numerical simulations, we demonstrate that the design of a metatronic circuit can be carried out by using a waveguide filled with materials with positive permittivity. This includes the implementation of all “lumped” circuit elements and their assembly in a single circuit board. In doing so, we extend the concepts of optical metatronics to frequency ranges where there are no natural plasmonic materials available. The proposed methodology could be exploited as a platform to experimentally validate optical metatronic circuits in other frequency regimes, such as microwave frequency setups, and/or to provide a new route to design optical nanocircuitry. PMID:27386566
Documentation of Stainless Steel Lithium Circuit Test Section Design. Suppl

NASA Technical Reports Server (NTRS)

Godfroy, Thomas J. (Compiler); Martin, James J.

2010-01-01

The Early Flight Fission-Test Facilities (EFF-TF) team was tasked by Naval Reactors Prime Contract Team (NRPCT) to design, fabricate, and test an actively pumped lithium (Li) flow circuit. This Li circuit takes advantage of work in progress at the EFF TF on a stainless steel sodium/potassium (NaK) circuit. The effort involved modifying the original stainless steel NaK circuit such that it could be operated with Li in place of NaK. This new design considered freeze/thaw issues and required the addition of an expansion tank and expansion/extrusion volumes in the circuit plumbing. Instrumentation has been specified for Li and circuit heaters have been placed throughout the design to ensure adequate operational temperatures and no uncontrolled freezing of the Li. All major components have been designed and fabricated prior to circuit redesign for Li and were not modified. Basic circuit components include: reactor segment, Li to gas heat exchanger, electromagnetic liquid metal pump, load/drain reservoir, expansion reservoir, instrumentation, and trace heaters. The reactor segment, based on a Los Alamos National Laboratory 100-kW design study with 120 fuel pins, is the only prototypic component in the circuit. However, due to earlier funding constraints, a 37-pin partial-array of the core, including the central three rings of fuel pins (pin and flow path dimensions are the same as those in the full design), was selected for fabrication and test. This Technical Publication summarizes the design and integration of the pumped liquid metal Li flow circuit as of May 1, 2005. This supplement contains drawings, analysis, and calculations
Documentation of Stainless Steel Lithium Circuit Test Section Design

NASA Technical Reports Server (NTRS)

Godfroy, T. J.; Martin, J. J.; Stewart, E. T.; Rhys, N. O.

2010-01-01

The Early Flight Fission-Test Facilities (EFF-TF) team was tasked by Naval Reactors Prime Contract Team (NRPCT) to design, fabricate, and test an actively pumped lithium (Li) flow circuit. This Li circuit takes advantage of work in progress at the EFF TF on a stainless steel sodium/potassium (NaK) circuit. The effort involved modifying the original stainless steel NaK circuit such that it could be operated with Li in place of NaK. This new design considered freeze/thaw issues and required the addition of an expansion tank and expansion/extrusion volumes in the circuit plumbing. Instrumentation has been specified for Li and circuit heaters have been placed throughout the design to ensure adequate operational temperatures and no uncontrolled freezing of the Li. All major components have been designed and fabricated prior to circuit redesign for Li and were not modified. Basic circuit components include: reactor segment, Li to gas heat exchanger, electromagnetic liquid metal pump, load/drain reservoir, expansion reservoir, instrumentation, and trace heaters. The reactor segment, based on a Los Alamos National Laboratory 100-kW design study with 120 fuel pins, is the only prototypic component in the circuit. However, due to earlier funding constraints, a 37-pin partial-array of the core, including the central three rings of fuel pins (pin and flow path dimensions are the same as those in the full design), was selected for fabrication and test. This Technical Publication summarizes the design and integration of the pumped liquid metal Li flow circuit as of May 1, 2005.
The Effects of Pressure on Gases in Solution: Possible Insights to Improve Microbubble Filtration for Extracorporeal Circulation

PubMed Central

Herbst, Daniel P.

2013-01-01

Abstract: Improvements in micropore arterial line filter designs used for extracorporeal circulation are still needed because microbubbles larger than the rated pore sizes are being detected beyond the filter outlet. Linked to principles governing the function of micropore filters, fluid pressures contained in extracorporeal circuits also influence the behavior of gas bubbles and the extent to which they are carried in a fluid flow. To better understand the relationship between pressure and microbubble behavior, two ex vivo test circuits with and without inline resistance were designed to assess changes in microbubble load with changes in pressure. Ultrasound Doppler probes were used to measure and compare the quality and quantity of microbubbles generated in each test circuit. Analysis of microbubble load was separated into two distinct phases, the time periods during and immediately after bubble generation. Although microbubble number decreased similarly in both test circuits, changes in microbubble volume were significant only in the test circuit with inline resistance. The test circuit with inline resistance also showed a decrease in the rate of volume transferred across each ultrasound Doppler probe and the microbubble number and size range measured in the postbubble generation period. The present research proposes that fluid pressures contained in extracorporeal circuits may be used to affect gases in solution as a possible method to improve microbubble filtration during extracorporeal circulation. PMID:23930378
The effects of pressure on gases in solution: possible insights to improve microbubble filtration for extracorporeal circulation.

PubMed

Herbst, Daniel P

2013-06-01

Improvements in micropore arterial line filter designs used for extracorporeal circulation are still needed because microbubbles larger than the rated pore sizes are being detected beyond the filter outlet. Linked to principles governing the function of micropore filters, fluid pressures contained in extracorporeal circuits also influence the behavior of gas bubbles and the extent to which they are carried in a fluid flow. To better understand the relationship between pressure and microbubble behavior, two ex vivo test circuits with and without inline resistance were designed to assess changes in microbubble load with changes in pressure. Ultrasound Doppler probes were used to measure and compare the quality and quantity of microbubbles generated in each test circuit. Analysis of microbubble load was separated into two distinct phases, the time periods during and immediately after bubble generation. Although microbubble number decreased similarly in both test circuits, changes in microbubble volume were significant only in the test circuit with inline resistance. The test circuit with inline resistance also showed a decrease in the rate of volume transferred across each ultrasound Doppler probe and the microbubble number and size range measured in the postbubble generation period. The present research proposes that fluid pressures contained in extracorporeal circuits may be used to affect gases in solution as a possible method to improve microbubble filtration during extracorporeal circulation.
Design and experiment of vehicular charger AC/DC system based on predictive control algorithm

NASA Astrophysics Data System (ADS)

He, Guangbi; Quan, Shuhai; Lu, Yuzhang

2018-06-01

For the car charging stage rectifier uncontrollable system, this paper proposes a predictive control algorithm of DC/DC converter based on the prediction model, established by the state space average method and its prediction model, obtained by the optimal mathematical description of mathematical calculation, to analysis prediction algorithm by Simulink simulation. The design of the structure of the car charging, at the request of the rated output power and output voltage adjustable control circuit, the first stage is the three-phase uncontrolled rectifier DC voltage Ud through the filter capacitor, after by using double-phase interleaved buck-boost circuit with wide range output voltage required value, analyzing its working principle and the the parameters for the design and selection of components. The analysis of current ripple shows that the double staggered parallel connection has the advantages of reducing the output current ripple and reducing the loss. The simulation experiment of the whole charging circuit is carried out by software, and the result is in line with the design requirements of the system. Finally combining the soft with hardware circuit to achieve charging of the system according to the requirements, experimental platform proved the feasibility and effectiveness of the proposed predictive control algorithm based on the car charging of the system, which is consistent with the simulation results.

Reduced-order modeling of piezoelectric energy harvesters with nonlinear circuits under complex conditions

NASA Astrophysics Data System (ADS)

Xiang, Hong-Jun; Zhang, Zhi-Wei; Shi, Zhi-Fei; Li, Hong

2018-04-01

A fully coupled modeling approach is developed for piezoelectric energy harvesters in this work based on the use of available robust finite element packages and efficient reducing order modeling techniques. At first, the harvester is modeled using finite element packages. The dynamic equilibrium equations of harvesters are rebuilt by extracting system matrices from the finite element model using built-in commands without any additional tools. A Krylov subspace-based scheme is then applied to obtain a reduced-order model for improving simulation efficiency but preserving the key features of harvesters. Co-simulation of the reduced-order model with nonlinear energy harvesting circuits is achieved in a system level. Several examples in both cases of harmonic response and transient response analysis are conducted to validate the present approach. The proposed approach allows to improve the simulation efficiency by several orders of magnitude. Moreover, the parameters used in the equivalent circuit model can be conveniently obtained by the proposed eigenvector-based model order reduction technique. More importantly, this work establishes a methodology for modeling of piezoelectric energy harvesters with any complicated mechanical geometries and nonlinear circuits. The input load may be more complex also. The method can be employed by harvester designers to optimal mechanical structures or by circuit designers to develop novel energy harvesting circuits.
An Approach for Practical Use of Common-Mode Noise Reduction Technique for In-Vehicle Electronic Equipment

NASA Astrophysics Data System (ADS)

Uno, Takanori; Ichikawa, Kouji; Mabuchi, Yuichi; Nakamura, Atsushi; Okazaki, Yuji; Asai, Hideki

In this paper, we studied the use of common-mode noise reduction technique for in-vehicle electronic equipment in an actual instrument design. We have improved the circuit model of the common-mode noise that flows to the wire harness to add the effect of a bypass capacitor located near the LSI. We analyzed the improved circuit model using a circuit simulator and verified the effectiveness of the noise reduction condition derived from the circuit model. It was also confirmed that offsetting the impedance mismatch in the PCB section requires to make a circuit constant larger than that necessary for doing the impedance mismatch in the LSI section. An evaluation circuit board comprising an automotive microcomputer was prototyped to experiment on the common-mode noise reduction effect of the board. The experimental results showed the noise reduction effect of the board. The experimental results also revealed that the degree of impedance mismatch in the LSI section can be estimated by using a PCB having a known impedance. We further inquired into the optimization of impedance parameters, which is difficult for actual products at present. To satisfy the noise reduction condition composed of numerous parameters, we proposed a design method using an optimization algorithm and an electromagnetic field simulator, and confirmed its effectiveness.
Computer Simulation of Microwave Devices

NASA Technical Reports Server (NTRS)

Kory, Carol L.

1997-01-01

The accurate simulation of cold-test results including dispersion, on-axis beam interaction impedance, and attenuation of a helix traveling-wave tube (TWT) slow-wave circuit using the three-dimensional code MAFIA (Maxwell's Equations Solved by the Finite Integration Algorithm) was demonstrated for the first time. Obtaining these results is a critical step in the design of TWT's. A well-established procedure to acquire these parameters is to actually build and test a model or a scale model of the circuit. However, this procedure is time-consuming and expensive, and it limits freedom to examine new variations to the basic circuit. These limitations make the need for computational methods crucial since they can lower costs, reduce tube development time, and lessen limitations on novel designs. Computer simulation has been used to accurately obtain cold-test parameters for several slow-wave circuits. Although the helix slow-wave circuit remains the mainstay of the TWT industry because of its exceptionally wide bandwidth, until recently it has been impossible to accurately analyze a helical TWT using its exact dimensions because of the complexity of its geometrical structure. A new computer modeling technique developed at the NASA Lewis Research Center overcomes these difficulties. The MAFIA three-dimensional mesh for a C-band helix slow-wave circuit is shown.
Investigation for connecting waveguide in off-planar integrated circuits.

PubMed

Lin, Jie; Feng, Zhifang

2017-09-01

The transmission properties of a vertical waveguide connected by different devices in off-planar integrated circuits are designed, investigated, and analyzed in detail by the finite-difference time-domain method. The results show that both guide bandwidth and transmission efficiency can be adjusted effectively by shifting the vertical waveguide continuously. Surprisingly, the wide guide band (0.385[c/a]∼0.407[c/a]) and well transmission (-6 dB) are observed simultaneously in several directions when the vertical waveguide is located at a specific location. The results are very important for all-optical integrated circuits, especially in compact integration.
Design of Low Power CMOS Read-Out with TDI Function for Infrared Linear Photodiode Array Detectors

NASA Technical Reports Server (NTRS)

Vizcaino, Paul; Ramirez-Angulo, Jaime; Patel, Umesh D.

2007-01-01

A new low voltage CMOS infrared readout circuit using the buffer-direct injection method is presented. It uses a single supply voltage of 1.8 volts and a bias current of 1uA. The time-delay integration technique is used to increase the signal to noise ratio. A current memory circuit with faulty diode detection is used to remove dark current for background compensation and to disable a photodiode in a cell if detected as faulty. Simulations are shown that verify the circuit that is currently in fabrication in 0.5ym CMOS technology.
Non-unitary probabilistic quantum computing

NASA Technical Reports Server (NTRS)

Gingrich, Robert M.; Williams, Colin P.

2004-01-01

We present a method for designing quantum circuits that perform non-unitary quantum computations on n-qubit states probabilistically, and give analytic expressions for the success probability and fidelity.
A Simple Picaxe Microcontroller Pulse Source for Juxtacellular Neuronal Labelling.

PubMed

Verberne, Anthony J M

2016-10-19

Juxtacellular neuronal labelling is a method which allows neurophysiologists to fill physiologically-identified neurons with small positively-charged marker molecules. Labelled neurons are identified by histochemical processing of brain sections along with immunohistochemical identification of neuropeptides, neurotransmitters, neurotransmitter transporters or biosynthetic enzymes. A microcontroller-based pulser circuit and associated BASIC software script is described for incorporation into the design of a commercially-available intracellular electrometer for use in juxtacellular neuronal labelling. Printed circuit board construction has been used for reliability and reproducibility. The current design obviates the need for a separate digital pulse source and simplifies the juxtacellular neuronal labelling procedure.
Methods of high current magnetic field generator for transcranial magnetic stimulation application

NASA Astrophysics Data System (ADS)

Bouda, N. R.; Pritchard, J.; Weber, R. J.; Mina, M.

2015-05-01

This paper describes the design procedures and underlying concepts of a novel High Current Magnetic Field Generator (HCMFG) with adjustable pulse width for transcranial magnetic stimulation applications. This is achieved by utilizing two different switching devices, the MOSFET and insulated gate bipolar transistor (IGBT). Results indicate that currents as high as ±1200 A can be generated with inputs of +/-20 V. Special attention to tradeoffs between field generators utilizing IGBT circuits (HCMFG1) and MOSFET circuits (HCMFG2) was considered. The theory of operation, design, experimental results, and electronic setup are presented and analyzed.
Photovoltaic module hot spot durability design and test methods

NASA Technical Reports Server (NTRS)

Arnett, J. C.; Gonzalez, C. C.

1981-01-01

As part of the Jet Propulsion Laboratory's Low-Cost Solar Array Project, the susceptibility of fat-plate modules to hot-spot problems is investigated. Hot-spot problems arise in modules when the cells become back-biased and operate in the negative-voltage quadrant, as a result of short-circuit current mismatch, cell cracking or shadowing. The details of a qualification test for determining the capability of modules of surviving field hot-spot problems and typical results of this test are presented. In addition, recommended circuit-design techniques for improving the module and array reliability with respect to hot-spot problems are presented.
Methods of high current magnetic field generator for transcranial magnetic stimulation application

DOE Office of Scientific and Technical Information (OSTI.GOV)

Bouda, N. R., E-mail: nybouda@iastate.edu; Pritchard, J.; Weber, R. J.

This paper describes the design procedures and underlying concepts of a novel High Current Magnetic Field Generator (HCMFG) with adjustable pulse width for transcranial magnetic stimulation applications. This is achieved by utilizing two different switching devices, the MOSFET and insulated gate bipolar transistor (IGBT). Results indicate that currents as high as ±1200 A can be generated with inputs of +/−20 V. Special attention to tradeoffs between field generators utilizing IGBT circuits (HCMFG{sub 1}) and MOSFET circuits (HCMFG{sub 2}) was considered. The theory of operation, design, experimental results, and electronic setup are presented and analyzed.
Nuevas tecnicas basadas en redes neuronales para el diseno de filtros de microondas multicapa apantallados

NASA Astrophysics Data System (ADS)

Pascual Garcia, Juan

In this PhD thesis one method of shielded multilayer circuit neural network based analysis has been developed. One of the most successful analysis procedures of these kind of structures is the Integral Equation technique (IE) solved by the Method of Moments (MoM). In order to solve the IE, in the version which uses the media relevant potentials, it is necessary to have a formulation of the Green's functions associated to the mentioned potentials. The main computational burden in the IE resolution lies on the numerical evaluation of the Green's functions. In this work, the circuit analysis has been drastically accelerated thanks to the approximation of the Green's functions by means of neural networks. Once trained, the neural networks substitute the Green's functions in the IE. Two different types of neural networks have been used: the Radial basis function neural networks (RBFNN) and the Chebyshev neural networks. Thanks mainly to two distinct operations the correct approximation of the Green's functions has been possible. On the one hand, a very effective input space division has been developed. On the other hand, the elimination of the singularity makes feasible the approximation of slow variation functions. Two different singularity elimination strategies have been developed. The first one is based on the multiplication by the source-observation points distance (rho). The second one outperforms the first one. It consists of the extraction of two layers of spatial images from the whole summation of images. With regard to the Chebyshev neural networks, the OLS training algorithm has been applied in a novel fashion. This method allows the optimum design in this kind of neural networks. In this way, the performance of these neural networks outperforms greatly the RBFNNs one. In both networks, the time gain reached makes the neural method profitable. The time invested in the input space division and in the neural training is negligible with only few circuit analysis. To show, in a practical way, the ability of the neural based analysis method, two new design procedures have been developed. The first method uses the Genetic Algorithms to optimize an initial filter which does not fulfill the established specifications. A new fitness function, specially well suited to design filters, has been defined in order to assure the correct convergence of the optimization process. This new function measures the fulfillment of the specifications and it also prevents the appearance of the premature convergence problem. The second method is found on the approximation, by means of neural networks, of the relations between the electrical parameters, which defined the circuit response, and the physical dimensions that synthesize the aforementioned parameters. The neural networks trained with these data can be used in the design of many circuits in a given structure. Both methods had been show their ability in the design of practical filters.
In Vitro Simulation and Validation of the Circulation with Congenital Heart Defects

PubMed Central

Figliola, Richard S.; Giardini, Alessandro; Conover, Tim; Camp, Tiffany A.; Biglino, Giovanni; Chiulli, John; Hsia, Tain-Yen

2010-01-01

Despite the recent advances in computational modeling, experimental simulation of the circulation with congenital heart defect using mock flow circuits remains an important tool for device testing, and for detailing the probable flow consequences resulting from surgical and interventional corrections. Validated mock circuits can be applied to qualify the results from novel computational models. New mathematical tools, coupled with advanced clinical imaging methods, allow for improved assessment of experimental circuit performance relative to human function, as well as the potential for patient-specific adaptation. In this review, we address the development of three in vitro mock circuits specific for studies of congenital heart defects. Performance of an in vitro right heart circulation circuit through a series of verification and validation exercises is described, including correlations with animal studies, and quantifying the effects of circuit inertiance on test results. We present our experience in the design of mock circuits suitable for investigations of the characteristics of the Fontan circulation. We use one such mock circuit to evaluate the accuracy of Doppler predictions in the presence of aortic coarctation. PMID:21218147
A Parallel Genetic Algorithm for Automated Electronic Circuit Design

NASA Technical Reports Server (NTRS)

Long, Jason D.; Colombano, Silvano P.; Haith, Gary L.; Stassinopoulos, Dimitris

2000-01-01

Parallelized versions of genetic algorithms (GAs) are popular primarily for three reasons: the GA is an inherently parallel algorithm, typical GA applications are very compute intensive, and powerful computing platforms, especially Beowulf-style computing clusters, are becoming more affordable and easier to implement. In addition, the low communication bandwidth required allows the use of inexpensive networking hardware such as standard office ethernet. In this paper we describe a parallel GA and its use in automated high-level circuit design. Genetic algorithms are a type of trial-and-error search technique that are guided by principles of Darwinian evolution. Just as the genetic material of two living organisms can intermix to produce offspring that are better adapted to their environment, GAs expose genetic material, frequently strings of 1s and Os, to the forces of artificial evolution: selection, mutation, recombination, etc. GAs start with a pool of randomly-generated candidate solutions which are then tested and scored with respect to their utility. Solutions are then bred by probabilistically selecting high quality parents and recombining their genetic representations to produce offspring solutions. Offspring are typically subjected to a small amount of random mutation. After a pool of offspring is produced, this process iterates until a satisfactory solution is found or an iteration limit is reached. Genetic algorithms have been applied to a wide variety of problems in many fields, including chemistry, biology, and many engineering disciplines. There are many styles of parallelism used in implementing parallel GAs. One such method is called the master-slave or processor farm approach. In this technique, slave nodes are used solely to compute fitness evaluations (the most time consuming part). The master processor collects fitness scores from the nodes and performs the genetic operators (selection, reproduction, variation, etc.). Because of dependency issues in the GA, it is possible to have idle processors. However, as long as the load at each processing node is similar, the processors are kept busy nearly all of the time. In applying GAs to circuit design, a suitable genetic representation 'is that of a circuit-construction program. We discuss one such circuit-construction programming language and show how evolution can generate useful analog circuit designs. This language has the desirable property that virtually all sets of combinations of primitives result in valid circuit graphs. Our system allows circuit size (number of devices), circuit topology, and device values to be evolved. Using a parallel genetic algorithm and circuit simulation software, we present experimental results as applied to three analog filter and two amplifier design tasks. For example, a figure shows an 85 dB amplifier design evolved by our system, and another figure shows the performance of that circuit (gain and frequency response). In all tasks, our system is able to generate circuits that achieve the target specifications.
Macromodels of digital integrated circuits for program packages of circuit engineering design

NASA Astrophysics Data System (ADS)

Petrenko, A. I.; Sliusar, P. B.; Timchenko, A. P.

1984-04-01

Various aspects of the generation of macromodels of digital integrated circuits are examined, and their effective application in program packages of circuit engineering design is considered. Three levels of macromodels are identified, and the application of such models to the simulation of circuit outputs is discussed.
Capacitive transducers

NASA Technical Reports Server (NTRS)

Lucifredi, A. L.

1970-01-01

The theory, applications, and possible structural designs of capacitive transducers are presented. Emphasis is placed on the circuits used in connection with the sensors, such as AM, FM, resonant circuits, mode circuits, direct current circuits, and special circuits. Some criteria for selection of a design or the purchase of a commercial device are given.
High-flux ionic diodes, ionic transistors and ionic amplifiers based on external ion concentration polarization by an ion exchange membrane: a new scalable ionic circuit platform.

PubMed

Sun, Gongchen; Senapati, Satyajyoti; Chang, Hsueh-Chia

2016-04-07

A microfluidic ion exchange membrane hybrid chip is fabricated using polymer-based, lithography-free methods to achieve ionic diode, transistor and amplifier functionalities with the same four-terminal design. The high ionic flux (>100 μA) feature of the chip can enable a scalable integrated ionic circuit platform for micro-total-analytical systems.
Petri-net-based 2D design of DNA walker circuits.

PubMed

Gilbert, David; Heiner, Monika; Rohr, Christian

2018-01-01

We consider localised DNA computation, where a DNA strand walks along a binary decision graph to compute a binary function. One of the challenges for the design of reliable walker circuits consists in leakage transitions, which occur when a walker jumps into another branch of the decision graph. We automatically identify leakage transitions, which allows for a detailed qualitative and quantitative assessment of circuit designs, design comparison, and design optimisation. The ability to identify leakage transitions is an important step in the process of optimising DNA circuit layouts where the aim is to minimise the computational error inherent in a circuit while minimising the area of the circuit. Our 2D modelling approach of DNA walker circuits relies on coloured stochastic Petri nets which enable functionality, topology and dimensionality all to be integrated in one two-dimensional model. Our modelling and analysis approach can be easily extended to 3-dimensional walker systems.
Computer-aided design of large-scale integrated circuits - A concept

NASA Technical Reports Server (NTRS)

Schansman, T. T.

1971-01-01

Circuit design and mask development sequence are improved by using general purpose computer with interactive graphics capability establishing efficient two way communications link between design engineer and system. Interactive graphics capability places design engineer in direct control of circuit development.
Printed Circuit Board Quality Assurance

NASA Technical Reports Server (NTRS)

Sood, Bhanu

2016-01-01

PCB Assurance Summary: PCB assurance actives are informed by risk in context of the Project. Lessons are being applied across Projects for continuous improvements. Newer component technologies, smaller/high pitch devices: tighter and more demanding PCB designs: Identifying new research areas. New materials, designs, structures and test methods.
Functional Laser Trimming Of Thin Film Resistors On Silicon ICs

NASA Astrophysics Data System (ADS)

Mueller, Michael J.; Mickanin, Wes

1986-07-01

Modern Laser Wafer Trimming (LWT) technology achieves exceptional analog circuit performance and precision while maintain-ing the advantages of high production throughput and yield. Microprocessor-driven instrumentation has both emphasized the role of data conversion circuits and demanded sophisticated signal conditioning functions. Advanced analog semiconductor circuits with bandwidths over 1 GHz, and high precision, trimmable, thin-film resistors meet many of todays emerging circuit requirements. Critical to meeting these requirements are optimum choices of laser characteristics, proper materials, trimming process control, accurate modeling of trimmed resistor performance, and appropriate circuit design. Once limited exclusively to hand-crafted, custom integrated circuits, designs are now available in semi-custom circuit configurations. These are similar to those provided for digital designs and supported by computer-aided design (CAD) tools. Integrated with fully automated measurement and trimming systems, these quality circuits can now be produced in quantity to meet the requirements of communications, instrumentation, and signal processing markets.

CMOS analogue amplifier circuits optimisation using hybrid backtracking search algorithm with differential evolution

NASA Astrophysics Data System (ADS)

Mallick, S.; Kar, R.; Mandal, D.; Ghoshal, S. P.

2016-07-01

This paper proposes a novel hybrid optimisation algorithm which combines the recently proposed evolutionary algorithm Backtracking Search Algorithm (BSA) with another widely accepted evolutionary algorithm, namely, Differential Evolution (DE). The proposed algorithm called BSA-DE is employed for the optimal designs of two commonly used analogue circuits, namely Complementary Metal Oxide Semiconductor (CMOS) differential amplifier circuit with current mirror load and CMOS two-stage operational amplifier (op-amp) circuit. BSA has a simple structure that is effective, fast and capable of solving multimodal problems. DE is a stochastic, population-based heuristic approach, having the capability to solve global optimisation problems. In this paper, the transistors' sizes are optimised using the proposed BSA-DE to minimise the areas occupied by the circuits and to improve the performances of the circuits. The simulation results justify the superiority of BSA-DE in global convergence properties and fine tuning ability, and prove it to be a promising candidate for the optimal design of the analogue CMOS amplifier circuits. The simulation results obtained for both the amplifier circuits prove the effectiveness of the proposed BSA-DE-based approach over DE, harmony search (HS), artificial bee colony (ABC) and PSO in terms of convergence speed, design specifications and design parameters of the optimal design of the analogue CMOS amplifier circuits. It is shown that BSA-DE-based design technique for each amplifier circuit yields the least MOS transistor area, and each designed circuit is shown to have the best performance parameters such as gain, power dissipation, etc., as compared with those of other recently reported literature.
Theoretical and experimental investigation of a rectenna element for microwave power transmission

NASA Technical Reports Server (NTRS)

Mcspadden, James O.; Yoo, Taewhan; Chang, Kai

1992-01-01

A microstrip measurement system has been designed to analyze packaged GaAs Schottky barrier diodes under small and large signal conditions. The nonlinear equivalent circuit parameters of the diode are determined using a small signal test method that analyzes the diode's scattering parameters at various bias levels. The experimental results of a 2.45 GHz diode are verified using a nonlinear circuit simulation program based on a multireflection algorithm. A 35 GHz rectenna has been built using a microstrip patch antenna and Ka-band mixer diode. The measured efficiency was 29 percent at 120 mW input power. A frequency selective surface is designed using an equivalent circuit model to reduce the second harmonic radiations for a 2.45 GHz rectenna. Theoretical results are found to be in fairly good agreement with experiments.
A low complexity, low spur digital IF conversion circuit for high-fidelity GNSS signal playback

NASA Astrophysics Data System (ADS)

Su, Fei; Ying, Rendong

2016-01-01

A low complexity high efficiency and low spur digital intermediate frequency (IF) conversion circuit is discussed in the paper. This circuit is key element in high-fidelity GNSS signal playback instrument. We analyze the spur performance of a finite state machine (FSM) based numerically controlled oscillators (NCO), by optimization of the control algorithm, a FSM based NCO with 3 quantization stage can achieves 65dB SFDR in the range of the seventh harmonic. Compare with traditional lookup table based NCO design with the same Spurious Free Dynamic Range (SFDR) performance, the logic resource require to implemented the NCO is reduced to 1/3. The proposed design method can be extended to the IF conversion system with good SFDR in the range of higher harmonic components by increasing the quantization stage.
Experimental simulation of internal short circuit in Li-ion and Li-ion-Polymer cells

DOE Office of Scientific and Technical Information (OSTI.GOV)

Cai, Wei; Wang, Hsin; Maleki, Hossein

A multi-parameter controlled pinch test was developed to study the occurrence of internal short circuits in Li-ion and Li-ion-polymer cells. By tuning the control parameters (i.e., cell voltage as well as pinching area, load, and speed), the pinch test can reproducibly create ~1 to 2 mm wide internal short between a cell jelly-roll s inner layer electrodes. This recreates conditions similar to those that may occur during service. Furthermore, the pinch test is used to determine thermal stability of two Li-ion-polymer cells of different designs built by the same manufacturer. The pinch test method can be used to help distinguishmore » cells with design features or characteristics that lower risk of potential thermal events created by internal short circuits.« less
A miniature transformer/dc-dc converter for implantable medical devices

NASA Astrophysics Data System (ADS)

Mohammed, Osama A.; Jones, W. Kinzy

1988-11-01

This paper presents a new technique for the design of a miniature dc-dc converter used in energy producing implantable devices such as defibrillators and advanced pacemakers. This converter is inserted in such a device and is used to boost the voltage from a low voltage implanted battery to high voltage energy storage capacitors in a short period of time. The stored energy is then delivered, when needed, through an energy delivery circuit in order to stimulate or defibrillate the heart. The converter takes the form of a flyback topology which includes a miniature transformer and a specialized control circuit. The transformer was designed using a new numerical synthesis method which utilizes finite elements and dynamic programming for predicting the geometries of the transformer's magnetic circuit. The final transformer design satisfied the performance criteria and provided means for selecting the converter components. The obtained performance results for the transformer and the dc-dc converter were in excellent agreement with laboratory performance tests.
The Effectiveness of TAG or Guard-Gates in SET Suppression Using Delay and Dual-Rail Configurations at 0.35 microns

NASA Technical Reports Server (NTRS)

Shuler, Robert L.; Balasubramanian, Anupama; Narasimham, Balaji; Bhuva, Bharat; O'Neill, Patrick M.; Kouba, Coy

2006-01-01

Design options for decreasing the susceptibility of integrated circuits to Single Event Upset (SEU) fall into two categories: (1) increasing the critical charge to cause an upset at a particular node, and (2) employing redundancy to mask or correct errors. With decreasing device sizes on an Integrated Circuit (IC), the amount of charge required to represent a logic state has steadily reduced. Critical charge methods such as increasing drive strength or increasing the time required to change state as in capacitive or resistive hardening or delay based approaches extract a steadily increasing penalty as a percentage of device resources and performance. Dual redundancy is commonly assumed only to provide error detection with Triple Modular Redundancy (TMR) required for correction, but less well known methods employ dual redundancy to achieve full error correction by voting two inputs with a prior state to resolve ambiguity. This requires special circuits such as the Whitaker latch [1], or the guard-gate [2] which some of us have called a Transition AND Gate (TAG) [3]. A 2-input guard gate is shown in Figure 1. It is similar to a Muller Completion Element [4] and relies on capacitance at node "out" to retain the prior state when inputs disagree, while eliminating any output buffer which would be susceptible to radiation strikes. This paper experimentally compares delay based and dual rail flip-flop designs wherein both types of circuits employ guard-gates to optimize layout and performance, and draws conclusions about design criteria and suitability of each option. In both cases a design goal is protection against Single Event Transients (SET) in combinational logic as well as SEU in the storage elements. For the delay based design, it is also a goal to allow asynchronous clear or preset inputs on the storage elements, which are often not available in radiation tolerant designs.
DESIGN METHODOLOGIES AND TOOLS FOR SINGLE-FLUX QUANTUM LOGIC CIRCUITS

DTIC Science & Technology

2017-10-01

DESIGN METHODOLOGIES AND TOOLS FOR SINGLE-FLUX QUANTUM LOGIC CIRCUITS UNIVERSITY OF SOUTHERN CALIFORNIA OCTOBER 2017 FINAL...SUBTITLE DESIGN METHODOLOGIES AND TOOLS FOR SINGLE-FLUX QUANTUM LOGIC CIRCUITS 5a. CONTRACT NUMBER FA8750-15-C-0203 5b. GRANT NUMBER N/A 5c. PROGRAM...of this project was to investigate the state-of-the-art in design and optimization of single-flux quantum (SFQ) logic circuits, e.g., RSFQ and ERSFQ
Circuit design tool. User's manual, revision 2

NASA Technical Reports Server (NTRS)

Miyake, Keith M.; Smith, Donald E.

1992-01-01

The CAM chip design was produced in a UNIX software environment using a design tool that supports definition of digital electronic modules, composition of these modules into higher level circuits, and event-driven simulation of these circuits. Our design tool provides an interface whose goals include straightforward but flexible primitive module definition and circuit composition, efficient simulation, and a debugging environment that facilitates design verification and alteration. The tool provides a set of primitive modules which can be composed into higher level circuits. Each module is a C-language subroutine that uses a set of interface protocols understood by the design tool. Primitives can be altered simply by recoding their C-code image; in addition new primitives can be added allowing higher level circuits to be described in C-code rather than as a composition of primitive modules--this feature can greatly enhance the speed of simulation.
The theory and design of piezoelectric/pyroelectric polymer film sensors for biomedical engineering applications.

PubMed

Brown, L F

1989-01-01

The unique properties of piezoelectric/pyroelectric polymers offer many new opportunities for biomedical engineering sensor applications. Since their discovery nearly 20 years ago, the polymer films have been used for many novel switching and sensor applications. Despite the prodigious exposure from many recent publications describing piezo film applications, methods of sensor fabrication and circuit interfacing still elude most engineers. This paper is presented as a tutorial guide to applying piezo polymers to biomedical engineering applications. A review of the fundamentals of piezoelectricity/pyroelectricity in piezo polymers is first presented. Their material properties are contrasted with piezoelectric ceramic materials. Some advantages and disadvantages of the films for biomedical sensors are discussed. Specific details on the fabrication of piezo film sensors are presented. Methods are described for forming, cutting, and mounting film sensors, and making lead connections. A brief discussion of equivalent circuit models for the design and simulation of piezoelectric/pyroelectric sensors is included, as well as common circuit interface techniques. Finally, several sources are recommended for further information on a variety of biomedical sensor applications.
A More Accurate and Efficient Technique Developed for Using Computational Methods to Obtain Helical Traveling-Wave Tube Interaction Impedance

NASA Technical Reports Server (NTRS)

Kory, Carol L.

1999-01-01

The phenomenal growth of commercial communications has created a great demand for traveling-wave tube (TWT) amplifiers. Although the helix slow-wave circuit remains the mainstay of the TWT industry because of its exceptionally wide bandwidth, until recently it has been impossible to accurately analyze a helical TWT using its exact dimensions because of the complexity of its geometrical structure. For the first time, an accurate three-dimensional helical model was developed that allows accurate prediction of TWT cold-test characteristics including operating frequency, interaction impedance, and attenuation. This computational model, which was developed at the NASA Lewis Research Center, allows TWT designers to obtain a more accurate value of interaction impedance than is possible using experimental methods. Obtaining helical slow-wave circuit interaction impedance is an important part of the design process for a TWT because it is related to the gain and efficiency of the tube. This impedance cannot be measured directly; thus, conventional methods involve perturbing a helical circuit with a cylindrical dielectric rod placed on the central axis of the circuit and obtaining the difference in resonant frequency between the perturbed and unperturbed circuits. A mathematical relationship has been derived between this frequency difference and the interaction impedance (ref. 1). However, because of the complex configuration of the helical circuit, deriving this relationship involves several approximations. In addition, this experimental procedure is time-consuming and expensive, but until recently it was widely accepted as the most accurate means of determining interaction impedance. The advent of an accurate three-dimensional helical circuit model (ref. 2) made it possible for Lewis researchers to fully investigate standard approximations made in deriving the relationship between measured perturbation data and interaction impedance. The most prominent approximations made in the analysis were addressed and fully investigated for their accuracy by using the three-dimensional electromagnetic simulation code MAFIA (Solution of Maxwell's Equations by the Finite Integration Algorithm) (refs. 3 and 4). We found that several approximations introduced significant error (ref. 5).
Design, fabrication and analysis of integrated optical waveguide devices

NASA Astrophysics Data System (ADS)

Sikorski, Yuri

Throughout the present dissertation, the main effort has been to develop the set of design rules for optical integrated circuits (OIC). At the present time, when planar optical integrated circuits seem to be the leading technology, and industry is heading towards much higher levels of integration, such design rules become necessary. It is known that analysis of light propagation in rectangular waveguides can not be carried out exactly. Various approximations become necessary, and their validity is discussed in this text. Various methods are used in the text for calculating the same problems, and results are compared. A few new concepts have been suggested to avoid approximations used elsewhere. The second part of this dissertation is directed to the development of a new technique for the fabrication of optical integrated circuits inside optical glass. This technique is based on the use of ultrafast laser pulses to alter the properties of glasses. Using this method we demonstrated the possibility of changing the refractive index of various passive and active optical glasses as well as ablating the material on the surface in a controlled fashion. A number of optical waveguide devices (e.g. waveguides, directional couplers, diffraction gratings, fiber Bragg gratings, V-grooves in dual-clad optical fibers, optical waveguide amplifiers) were fabricated and tested. Testing included measurements of loss/throughput, near-field mode profiles, efficiency and thermal stability. All of the experimental setup and test results are reported in the dissertation. We also demonstrated the possibility of using this technique to fabricate future bio-optical devices that will incorporate an OIC and a microfluidic circuit on a single substrate. Our results are expected to serve as a guide for the design and fabrication of a new generation of integrated optical and bio-optical devices.
A three-dimensional finite element evaluation of magnetic attachment attractive force and the influence of the magnetic circuit.

PubMed

Kumano, Hirokazu; Nakamura, Yoshinori; Kanbara, Ryo; Takada, Yukyo; Ochiai, Kent T; Tanaka, Yoshinobu

2014-01-01

The finite element method has been considered to be excellent evaluative technique to study magnetic circuit optimization. The present study analyzed and quantitatively evaluated the different effects of magnetic circuit on attractive force and magnetic flux density using a three-dimensional finite element method for comparative evaluation. The diameter of a non-magnetic material in the shield disk of a magnetic assembly was variably increased by 0.1 mm to a maximum 2.0 mm in this study design. The analysis results demonstrate that attractive force increases until the diameter of the non-magnetic spacing material reaches a diameter of 0.5 mm where it peaks and then decreases as the overall diameter increases over 0.5 mm. The present analysis suggested that the attractive force for a magnetic attachment is optimized with an appropriate magnetic assembly shield disk diameter using a non-magnetic material to effectively change the magnetic circuit efficiency and resulting retention.
[Design of High Frequency Signal Detecting Circuit of Human Body Impedance Used for Ultrashort Wave Diathermy Apparatus].

PubMed

Fan, Xu; Wang, Yunguang; Cheng, Haiping; Chong, Xiaochen

2016-02-01

The present circuit was designed to apply to human tissue impedance tuning and matching device in ultra-short wave treatment equipment. In order to judge if the optimum status of circuit parameter between energy emitter circuit and accepter circuit is in well syntony, we designed a high frequency envelope detect circuit to coordinate with automatic adjust device of accepter circuit, which would achieve the function of human tissue impedance matching and tuning. Using the sampling coil to receive the signal of amplitude-modulated wave, we compared the voltage signal of envelope detect circuit with electric current of energy emitter circuit. The result of experimental study was that the signal, which was transformed by the envelope detect circuit, was stable and could be recognized by low speed Analog to Digital Converter (ADC) and was proportional to the electric current signal of energy emitter circuit. It could be concluded that the voltage, transformed by envelope detect circuit can mirror the real circuit state of syntony and realize the function of human tissue impedance collecting.
Design and Application of a Circuit for Measuring Frequency and Duty Cycle of Stimulated Bioelectrical Signal

NASA Astrophysics Data System (ADS)

Tang, Li-Ming; Chang, Ben-Kang; Liu, Tie-Bing; Wu, Min; Ling, Gang

2002-12-01

To design a new type of circuit for measuring frequency & duty cycle of stimulated bioelectrical signal for the project of 'the map of neuron-threshold in human brain and its clinical application'. This circuit was designed according to the character of stimulated bioelectrical signals. It was tested and improved and then used in the neuron -threshold stimulator. The circuit was found to be very accurate for measuring frequency and the error for measuring duty cycle was below 0.2%. This circuit is well-designed, simple, easy to use, and can be applied in many systems.
Large Signal Modeling and Analysis of the GaAs MESFET.

DTIC Science & Technology

1986-07-09

various dimensions and physical parameters. A powerful computer aided design system can be developed by automating the circuit element and parameter...circuit model of the GaAs MESFET to aid in the designs of microwave MESFET circuits. The circuit elements of this model are obtained either directly...34. -. ’ Abstract The purpose of this work is to develop a large signal signal lumped circuit model of the GaAs MESFET to aid In the designs of microwave MESFET
High-flux ionic diodes, ionic transistors and ionic amplifiers based on external ion concentration polarization by an ion exchange membrane: a new scalable ionic circuit platform†

PubMed Central

Sun, Gongchen; Senapati, Satyajyoti

2016-01-01

A microfluidic-ion exchange membrane hybrid chip is fabricated by polymer-based, lithography-free methods to achieve ionic diode, transistor and amplifier functionalities with the same four-terminal design. The high ionic flux (> 100 μA) feature of the chip can enable a scalable integrated ionic circuit platform for micro-total-analytical systems. PMID:26960551
Signal processing method of the diameter measurement system based on CCD parallel light projection method

NASA Astrophysics Data System (ADS)

Song, Qing; Zhu, Sijia; Yan, Han; Wu, Wenqian

2008-03-01

Parallel light projection method for the diameter measurement is to project the workpiece to be measured on the photosensitive units of CCD, but the original signal output from CCD cannot be directly used for counting or measurement. The weak signal with high-frequency noise should be filtered and amplified firstly. This paper introduces RC low-pass filter and multiple feed-back second-order low-pass filter with infinite gain. Additionally there is always dispersion on the light band and the output signal has a transition between the irradiant area and the shadow, because of the instability of the light source intensity and the imperfection of the light system adjustment. To obtain exactly the shadow size related to the workpiece diameter, binary-value processing is necessary to achieve a square wave. Comparison method and differential method can be adopted for binary-value processing. There are two ways to decide the threshold value when using voltage comparator: the fixed level method and the floated level method. The latter has a high accuracy. Deferential method is to output two spike pulses with opposite pole by the rising edge and the failing edge of the video signal related to the differential circuit firstly, then the rising edge of the signal output from the differential circuit is acquired by half-wave rectifying circuit. After traveling through the zero passing comparator and the maintain- resistance edge trigger, the square wave which indicates the measured size is acquired at last. And then it is used for filling through standard pulses and for counting through the counter. Data acquisition and information processing is accomplished by the computer and the control software. This paper will introduce in detail the design and analysis of the filter circuit, binary-value processing circuit and the interface circuit towards the computer.
A ROIC for Mn(TPP)Cl-DOP-THF-Polyhema PVC membrane modified n-channel Si3N4 ISFET sensitive to histamine.

PubMed

Samah, N L M A; Lee, Khuan Y; Sulaiman, S A; Jarmin, R

2017-07-01

Intolerance of histamine could lead to scombroid poisoning with fatal consequences. Current detection methods for histamine are wet laboratory techniques which employ expensive equipment that depends on skills of seasoned technicians and produces delayed test analysis result. Previous works from our group has established that ISFETs can be adapted for detecting histamine with the use of a novel membrane. However, work to integrate ISFETs with a readout interfacing circuit (ROIC) circuit to display the histamine concentration has not been reported so far. This paper concerns the development of a ROIC specifically to integrate with a Mn(TPP)Cl-DOP-THF-Polyhema PVC membrane modified n-channel Si3N4 ISFET to display the histamine concentration. It embodies the design of constant voltage constant current (CVCC) circuit, amplification circuit and micro-controller based display circuit. A DC millivolt source is used to substitute the membrane modified ISFET as preliminary work. Input is histamine concentration corresponding to the safety level designated by the Food and Drugs Administration (FDA). Results show the CVCC circuit makes the output follows the input and keeps VDS constant. The amplification circuit amplifies the output from the CVCC circuit to the range 2.406-4.888V to integrate with the microcontroller, which is programmed to classify and display the histamine safety level and its corresponding voltage on a LCD panel. The ROIC could be used to produce direct output voltages corresponding to histamine concentrations, for in-situ applications.
DOE Office of Scientific and Technical Information (OSTI.GOV)

Hasan, Iftekhar; Husain, Tausif; Sozer, Yilmaz

This paper proposes an analytical machine design tool using magnetic equivalent circuit (MEC)-based particle swarm optimization (PSO) for a double-sided, flux-concentrating transverse flux machine (TFM). The magnetic equivalent circuit method is applied to analytically establish the relationship between the design objective and the input variables of prospective TFM designs. This is computationally less intensive and more time efficient than finite element solvers. A PSO algorithm is then used to design a machine with the highest torque density within the specified power range along with some geometric design constraints. The stator pole length, magnet length, and rotor thickness are the variablesmore » that define the optimization search space. Finite element analysis (FEA) was carried out to verify the performance of the MEC-PSO optimized machine. The proposed analytical design tool helps save computation time by at least 50% when compared to commercial FEA-based optimization programs, with results found to be in agreement with less than 5% error.« less
Analog Computation by DNA Strand Displacement Circuits.

PubMed

Song, Tianqi; Garg, Sudhanshu; Mokhtar, Reem; Bui, Hieu; Reif, John

2016-08-19

DNA circuits have been widely used to develop biological computing devices because of their high programmability and versatility. Here, we propose an architecture for the systematic construction of DNA circuits for analog computation based on DNA strand displacement. The elementary gates in our architecture include addition, subtraction, and multiplication gates. The input and output of these gates are analog, which means that they are directly represented by the concentrations of the input and output DNA strands, respectively, without requiring a threshold for converting to Boolean signals. We provide detailed domain designs and kinetic simulations of the gates to demonstrate their expected performance. On the basis of these gates, we describe how DNA circuits to compute polynomial functions of inputs can be built. Using Taylor Series and Newton Iteration methods, functions beyond the scope of polynomials can also be computed by DNA circuits built upon our architecture.

RADC SCAT automated sneak circuit analysis tool

NASA Astrophysics Data System (ADS)

Depalma, Edward L.

The sneak circuit analysis tool (SCAT) provides a PC-based system for real-time identification (during the design phase) of sneak paths and design concerns. The tool utilizes an expert system shell to assist the analyst so that prior experience with sneak analysis is not necessary for performance. Both sneak circuits and design concerns are targeted by this tool, with both digital and analog circuits being examined. SCAT focuses the analysis at the assembly level, rather than the entire system, so that most sneak problems can be identified and corrected by the responsible design engineer in a timely manner. The SCAT program identifies the sneak circuits to the designer, who then decides what course of action is necessary.
DESIGN OF CIRCUITS FOR THE PATTERN ARTICULATION UNIT. Report No. 127

DOE Office of Scientific and Technical Information (OSTI.GOV)

Smith, K.C.

1962-08-31

The Pattern Articulation Unit embodies a central core of 1024 identical processing modules called stalactites'' arranged in a two-dimensional array with only local connectivity. Two possible complete circuit realizations of the stalactite are described. Stalactites of either design contain about 50 transistors, 250 diodes, 250 resistors, and 50 capacitors. Stalactite organization, signal flow, the bubbling register connection, the requirements of a working register, design of stacking logic, mode of operation, circuit design, direct and conditional input, design of bubbling logic, complement circuits, output and circuit, up and down drivers, and cable diivers and terminators are described. Experimental verification of variousmore » components is discussed. (M.C.G.)« less
Plug-and-Play Multicellular Circuits with Time-Dependent Dynamic Responses.

PubMed

Urrios, Arturo; Gonzalez-Flo, Eva; Canadell, David; de Nadal, Eulàlia; Macia, Javier; Posas, Francesc

2018-04-20

Synthetic biology studies aim to develop cellular devices for biomedical applications. These devices, based on living instead of electronic or electromechanic technology, might provide alternative treatments for a wide range of diseases. However, the feasibility of these devices depends, in many cases, on complex genetic circuits that must fulfill physiological requirements. In this work, we explored the potential of multicellular architectures to act as an alternative to complex circuits for implementation of new devices. As a proof of concept, we developed specific circuits for insulin or glucagon production in response to different glucose levels. Here, we show that fundamental features, such as circuit's affinity or sensitivity, are dependent on the specific configuration of the multicellular consortia, providing a method for tuning these properties without genetic engineering. As an example, we have designed and built circuits with an incoherent feed-forward loop architecture (FFL) that can be easily adjusted to generate single pulse responses. Our results might serve as a blueprint for future development of cellular devices for glycemia regulation in diabetic patients.
Design structure for in-system redundant array repair in integrated circuits

DOEpatents

Bright, Arthur A.; Crumley, Paul G.; Dombrowa, Marc; Douskey, Steven M.; Haring, Rudolf A.; Oakland, Steven F.; Quellette, Michael R.; Strissel, Scott A.

2008-11-25

A design structure for repairing an integrated circuit during operation of the integrated circuit. The integrated circuit comprising of a multitude of memory arrays and a fuse box holding control data for controlling redundancy logic of the arrays. The design structure provides the integrated circuit with a control data selector for passing the control data from the fuse box to the memory arrays; providing a source of alternate control data, external of the integrated circuit; and connecting the source of alternate control data to the control data selector. The design structure further passes the alternate control data from the source thereof, through the control data selector and to the memory arrays to control the redundancy logic of the memory arrays.
A Novel Analog Integrated Circuit Design Course Covering Design, Layout, and Resulting Chip Measurement

ERIC Educational Resources Information Center

Lin, Wei-Liang; Cheng, Wang-Chuan; Wu, Chen-Hao; Wu, Hai-Ming; Wu, Chang-Yu; Ho, Kuan-Hsuan; Chan, Chueh-An

2010-01-01

This work describes a novel, first-year graduate-level analog integrated circuit (IC) design course. The course teaches students analog circuit design; an external manufacturer then produces their designs in three different silicon chips. The students, working in pairs, then test these chips to verify their success. All work is completed within…
Comparison of heavy-ion- and electron-beam upset data for GaAS SRAMS. Technical report

DOE Office of Scientific and Technical Information (OSTI.GOV)

Flesner, L.D.; Zuleeg, R.; Kolasinski, W.A.

1992-07-16

We report the results of experiments designed to evaluate the extent to which focused electron-beam pulses simulate energetic ion upset phenomena in GaAs memory circuits fabricated by the McDonnell Douglas Astronautics Company. The results of two experimental methods were compared, irradiation by heavy-ion particle beams, and upset mapping using focused electron pulses. Linear energy transfer (LET) thresholds and upset cross sections are derived from the data for both methods. A comparison of results shows good agreement, indicating that for these circuits electron-beam pulse mapping is a viable simulation technique.
Magnetic Random Access Memory for Embedded Computing

DTIC Science & Technology

2007-10-29

layer, w he free layer hose resistan . ce 2. Develop and model data storage circuits based on the MTJ cells. 3. Integrated the MTJ cells into a CMOS...suggested the two methods shown in Fig. 4.5 [95]. The circuit shown at the top of the figure uses NMOS pass transistors to load data , which is the simplest... method but requires careful design to avoid charge sharing and accommodate the data -dependent loading seen at the DATA input. With additional
Conductive surge testing of circuits and systems

NASA Technical Reports Server (NTRS)

Richman, P.

1980-01-01

Techniques are given for conductive surge testing of powered electronic equipment. The correct definitions of common and normal mode are presented. Testing requires not only spike-surge generators with a suitable range of open-circuit voltage and short-circuit current waveshapes, but also appropriate means, termed couplers, for connecting test surges to the equipment under test. Key among coupler design considerations is minimization of fail positives resulting from reduction in delivered surge energy due to the coupler. Back-filters and the lines on which they are necessary, are considered as well as ground-fault and ground potential rise. A method for monitoring delivered and resulting surge waves is mentioned.
Accurate Cold-Test Model of Helical TWT Slow-Wave Circuits

NASA Technical Reports Server (NTRS)

Kory, Carol L.; Dayton, James A., Jr.

1997-01-01

Recently, a method has been established to accurately calculate cold-test data for helical slow-wave structures using the three-dimensional electromagnetic computer code, MAFIA. Cold-test parameters have been calculated for several helical traveling-wave tube (TWT) slow-wave circuits possessing various support rod configurations, and results are presented here showing excellent agreement with experiment. The helical models include tape thickness, dielectric support shapes and material properties consistent with the actual circuits. The cold-test data from this helical model can be used as input into large-signal helical TWT interaction codes making it possible, for the first time, to design a complete TWT via computer simulation.
Analysis of the capability to effectively design complementary metal oxide semiconductor integrated circuits

NASA Astrophysics Data System (ADS)

McConkey, M. L.

1984-12-01

A complete CMOS/BULK design cycle has been implemented and fully tested to evaluate its effectiveness and a viable set of computer-aided design tools for the layout, verification, and simulation of CMOS/BULK integrated circuits. This design cycle is good for p-well, n-well, or twin-well structures, although current fabrication technique available limit this to p-well only. BANE, an integrated layout program from Stanford, is at the center of this design cycle and was shown to be simple to use in the layout of CMOS integrated circuits (it can be also used to layout NMOS integrated circuits). A flowchart was developed showing the design cycle from initial layout, through design verification, and to circuit simulation using NETLIST, PRESIM, and RNL from the University of Washington. A CMOS/BULK library was designed and includes logic gates that were designed and completely tested by following this flowchart. Also designed was an arithmetic logic unit as a more complex test of the CMOS/BULK design cycle.
Silica Integrated Optical Circuits Based on Glass Photosensitivity

NASA Technical Reports Server (NTRS)

Abushagur, Mustafa A. G.

1999-01-01

Integrated optical circuits play a major rule in the new photonics technology both in communication and sensing due to their small size and compatibility with integrated circuits. Currently integrated optical circuits (IOCs) are fabricated using similar manufacturing to those used in the semiconductor industry. In this study we are considering a new technique to fabricate IOCs which does not require layers of photolithography, depositing and etching. This method is based on the photosensitivity of germanosilicate glasses. Waveguides and other IOC devises can be patterned in these glasses by exposing them using UV lasers. This exposure by UV light changes the index of refraction of the germanosilicate glass. This technique enjoys both the simplicity and flexibility of design and fabrication with also the potential of being fast and low cost.
The technology on noise reduction of the APD detection circuit

NASA Astrophysics Data System (ADS)

Wu, Xue-ying; Zheng, Yong-chao; Cui, Jian-yong

2013-09-01

The laser pulse detection is widely used in the field of laser range finders, laser communications, laser radar, laser Identification Friend or Foe, et al, for the laser pulse detection has the advantage of high accuracy, high sensitivity and strong anti-interference. The avalanche photodiodes (APD) has the advantage of high quantum efficiency, high response speed and huge gain. The APD is particularly suitable for weak signal detection. The technology that APD acts as the photodetector for weak signal reception and amplification is widely used in laser pulse detection. The APD will convert the laser signal to weak electrical signal. The weak signal is amplified, processed and exported by the circuit. In the circuit design, the optimal signal detection is one key point in photoelectric detection system. The issue discusses how to reduce the noise of the photoelectric signal detection circuit and how to improve the signal-to-noise ratio, related analysis and practice included. The essay analyzes the mathematical model of the signal-to-noise ratio for photoelectric conversion and the noise of the APD photoelectric detection system. By analysis the bandwidth of the detection system is determined, and the circuit devices are selected that match the APD. In the circuit design separated devices with low noise are combined with integrated operational amplifier for the purpose of noise reduction. The methods can effectively suppress the noise, and improve the detection sensitivity.
Computer aided design of monolithic microwave and millimeter wave integrated circuits and subsystems

NASA Astrophysics Data System (ADS)

Ku, Walter H.

1989-05-01

The objectives of this research are to develop analytical and computer aided design techniques for monolithic microwave and millimeter wave integrated circuits (MMIC and MIMIC) and subsystems and to design and fabricate those ICs. Emphasis was placed on heterojunction-based devices, especially the High Electron Mobility Transition (HEMT), for both low noise and medium power microwave and millimeter wave applications. Circuits to be considered include monolithic low noise amplifiers, power amplifiers, and distributed and feedback amplifiers. Interactive computer aided design programs were developed, which include large signal models of InP MISFETs and InGaAs HEMTs. Further, a new unconstrained optimization algorithm POSM was developed and implemented in the general Analysis and Design program for Integrated Circuit (ADIC) for assistance in the design of largesignal nonlinear circuits.
A Simple Picaxe Microcontroller Pulse Source for Juxtacellular Neuronal Labelling †

PubMed Central

Verberne, Anthony J. M.

2016-01-01

Juxtacellular neuronal labelling is a method which allows neurophysiologists to fill physiologically-identified neurons with small positively-charged marker molecules. Labelled neurons are identified by histochemical processing of brain sections along with immunohistochemical identification of neuropeptides, neurotransmitters, neurotransmitter transporters or biosynthetic enzymes. A microcontroller-based pulser circuit and associated BASIC software script is described for incorporation into the design of a commercially-available intracellular electrometer for use in juxtacellular neuronal labelling. Printed circuit board construction has been used for reliability and reproducibility. The current design obviates the need for a separate digital pulse source and simplifies the juxtacellular neuronal labelling procedure. PMID:28952589
Voltages induced by lightning strokes and ground-faults on a coaxial telecom circuit enclosed inside a composite earthwire. Part II: lightning induced voltages ant composite earthwire tehnical design

DOE Office of Scientific and Technical Information (OSTI.GOV)

Anzanel, P.; Kouteynikoff, P.

1985-02-01

This Part II presents theorical and experimental work about interference generated by lightning strokes in a telecommunication coaxial circuit enclosed inside a composite earthwire for overhead transmission lines. Sinusoidal steady state and surge measurements of the composite earthwire susceptibility to interference (transfer impedance) have been carried out. Induced voltages have been calculated using an original double sampling FFT method whose validity has been checked by measurements on a test line. Finally, it is shown how the cable design can be improved and maximum induced voltage values are given.
Complex modulation using tandem polarization modulators

NASA Astrophysics Data System (ADS)

Hasan, Mehedi; Hall, Trevor

2017-11-01

A novel photonic technique for implementing frequency up-conversion or complex modulation is proposed. The proposed circuit consists of a sandwich of a quarter-wave plate between two polarization modulators, driven, respectively, by an in-phase and quadrature-phase signals. The operation of the circuit is modelled using a transmission matrix method. The theoretical prediction is then validated by simulation using an industry-standard software tool. The intrinsic conversion efficiency of the architecture is improved by 6 dB over a functionally equivalent design based on dual parallel Mach-Zehnder modulators. Non-ideal scenarios such as imperfect alignment of the optical components and power imbalances and phase errors in the electric drive signals are also analysed. As light travels, along one physical path, the proposed design can be implemented using discrete components with greater control of relative optical path length differences. The circuit can further be integrated in any material platform that offers electro-optic polarization modulators.
A pump driving liquid cooling circuit method for the aperture of an infrared cold optical system

NASA Astrophysics Data System (ADS)

Xie, RongJian

2017-06-01

To enhance the optical recognition and wavelength filtering of an infrared cold optical system, some lens need to be maintained within a certain temperature range, which requires specific thermal management of the aperture. A 250K liquid cooling circuit designed for this purpose is introduced, and the experimental results established and operated in a vacuum environmental simulation chamber is carried out and analyzed. A practical cooling power source of radiation cooling equipment is adopted and the sun exposure heat load is imitated by array of planar membrane heaters attached on the specific designed structure of the aperture. Controlling the aperture temperature and improving the optical system performance are proved effective. Numerical optimization of the cooling circuit and simulation of the aperture are performed , and the factors affect the optical system performance in the mean time are also investigated.
Integration of a photonic crystal polarization beam splitter and waveguide bend.

PubMed

Zheng, Wanhua; Xing, Mingxin; Ren, Gang; Johnson, Steven G; Zhou, Wenjun; Chen, Wei; Chen, Lianghui

2009-05-11

In this work, we present the design of an integrated photonic-crystal polarization beam splitter (PC-PBS) and a low-loss photonic-crystal 60 degrees waveguide bend. Firstly, the modal properties of the PC-PBS and the mechanism of the low-loss waveguide bend are investigated by the two-dimensional finite-difference time-domain (FDTD) method, and then the integration of the two devices is studied. It shows that, although the individual devices perform well separately, the performance of the integrated circuit is poor due to the multi-mode property of the PC-PBS. By introducing deformed airhole structures, a single-mode PC-PBS is proposed, which significantly enhance the performance of the circuit with the extinction ratios remaining above 20 dB for both transverse-electric (TE) and transverse-magnetic (TM) polarizations. Both the specific result and the general idea of integration design are promising in the photonic crystal integrated circuits in the future.
Power Efficient Hardware Architecture of SHA-1 Algorithm for Trusted Mobile Computing

NASA Astrophysics Data System (ADS)

Kim, Mooseop; Ryou, Jaecheol

The Trusted Mobile Platform (TMP) is developed and promoted by the Trusted Computing Group (TCG), which is an industry standard body to enhance the security of the mobile computing environment. The built-in SHA-1 engine in TMP is one of the most important circuit blocks and contributes the performance of the whole platform because it is used as key primitives supporting platform integrity and command authentication. Mobile platforms have very stringent limitations with respect to available power, physical circuit area, and cost. Therefore special architecture and design methods for low power SHA-1 circuit are required. In this paper, we present a novel and efficient hardware architecture of low power SHA-1 design for TMP. Our low power SHA-1 hardware can compute 512-bit data block using less than 7,000 gates and has a power consumption about 1.1 mA on a 0.25μm CMOS process.
A real time status monitor for transistor bank driver power limit resistor in boost injection kicker power supply

DOE Office of Scientific and Technical Information (OSTI.GOV)

Mi, J.; Tan, Y.; Zhang, W.

2011-03-28

For years suffering of Booster Injection Kicker transistor bank driver regulator troubleshooting, a new real time monitor system has been developed. A simple and floating circuit has been designed and tested. This circuit monitor system can monitor the driver regulator power limit resistor status in real time and warn machine operator if the power limit resistor changes values. This paper will mainly introduce the power supply and the new designed monitoring system. This real time resistor monitor circuit shows a useful method to monitor some critical parts in the booster pulse power supply. After two years accelerator operation, it showsmore » that this monitor works well. Previously, we spent a lot of time in booster machine trouble shooting. We will reinstall all 4 PCB into Euro Card Standard Chassis when the power supply system will be updated.« less

Three-dimensional simulation of helix traveling-wave tube cold-test characteristics using MAFIA

DOE Office of Scientific and Technical Information (OSTI.GOV)

Kory, C.L.

1996-12-31

A critically important step in the traveling-wave tube (TWT) design process is the cold-testing of the slow-wave circuit for dispersion, beam interaction impedance and RF losses. Experimental cold-tests can be very time-consuming and expensive, thus limiting the freedom to examine numerous variations to the test circuit. This makes the need for computational methods crucial as they can lower cost, reduce tube development time and allow the freedom to introduce novel and improved designs. The cold-test parameters have been calculated for a C-Band Northrop-Grumman helix TWT slow-wave circuit using MAFIA, the three-dimensional electromagnetic finite-integration computer code. Measured and simulated cold-test datamore » for the Northrop-Grumman helix TWT including dispersion, impedance and attenuation will be presented. Close agreement between simulated and measured values of the dispersion, impedance and attenuation has been obtained.« less
Bridging ultrahigh-Q devices and photonic circuits

NASA Astrophysics Data System (ADS)

Yang, Ki Youl; Oh, Dong Yoon; Lee, Seung Hoon; Yang, Qi-Fan; Yi, Xu; Shen, Boqiang; Wang, Heming; Vahala, Kerry

2018-05-01

Optical microresonators are essential to a broad range of technologies and scientific disciplines. However, many of their applications rely on discrete devices to attain challenging combinations of ultra-low-loss performance (ultrahigh Q) and resonator design requirements. This prevents access to scalable fabrication methods for photonic integration and lithographic feature control. Indeed, finding a microfabrication bridge that connects ultrahigh-Q device functions with photonic circuits is a priority of the microcavity field. Here, an integrated resonator having a record Q factor over 200 million is presented. Its ultra-low-loss and flexible cavity design brings performance to integrated systems that has been the exclusive domain of discrete silica and crystalline microcavity devices. Two distinctly different devices are demonstrated: soliton sources with electronic repetition rates and high-coherence/low-threshold Brillouin lasers. This multi-device capability and performance from a single integrated cavity platform represents a critical advance for future photonic circuits and systems.
Designing Novel Quaternary Quantum Reversible Subtractor Circuits

NASA Astrophysics Data System (ADS)

Haghparast, Majid; Monfared, Asma Taheri

2018-01-01

Reversible logic synthesis is an important area of current research because of its ability to reduce energy dissipation. In recent years, multiple valued logic has received great attention due to its ability to reduce the width of the reversible circuit which is a main requirement in quantum technology. Subtractor circuits are between major components used in quantum computers. In this paper, we will discuss the design of a quaternary quantum reversible half subtractor circuit using quaternary 1-qudit, 2-qudit Muthukrishnan-Stroud and 3-qudit controlled gates and a 2-qudit Generalized quaternary gate. Then a design of a quaternary quantum reversible full subtractor circuit based on the quaternary half subtractor will be presenting. The designs shall then be evaluated in terms of quantum cost, constant input, garbage output, and hardware complexity. The proposed quaternary quantum reversible circuits are the first attempt in the designing of the aforementioned subtractor.
Design and test of a flat-top magnetic field system driven by capacitor banks.

PubMed

Jiang, Fan; Peng, Tao; Xiao, Houxiu; Zhao, Jianlong; Pan, Yuan; Herlach, Fritz; Li, Liang

2014-04-01

An innovative method for generating a flat-top pulsed magnetic field by means of capacitor banks is developed at the Wuhan National High Magnetic Field Center (WHMFC). The system consists of two capacitor banks as they are normally used to generate a pulsed field. The two discharge circuits (the magnet circuit and the auxiliary circuit) are coupled by a pulse transformer such that the electromotive force (EMF) induced via the transformer in the magnet circuit containing the magnet coil is opposed to the EMF of the capacitor bank. At a certain point before the current pulse in the coil reaches its peak, the auxiliary circuit is triggered. With optimized parameters for charging voltage and trigger delay, the current in the magnet circuit can be approximately kept constant to obtain a flat-top. A prototype was developed at the WHMFC; the magnet circuit was energized by seven 1 MJ (3.2 mF/25 kV) capacitor modules and the auxiliary circuit by four 1 MJ modules. Fields up to 41 T with 6 ms flat-top have been obtained with a conventional user magnet used at the WHMFC.
A design of driving circuit for star sensor imaging camera

NASA Astrophysics Data System (ADS)

Li, Da-wei; Yang, Xiao-xu; Han, Jun-feng; Liu, Zhao-hui

2016-01-01

The star sensor is a high-precision attitude sensitive measuring instruments, which determine spacecraft attitude by detecting different positions on the celestial sphere. Imaging camera is an important portion of star sensor. The purpose of this study is to design a driving circuit based on Kodak CCD sensor. The design of driving circuit based on Kodak KAI-04022 is discussed, and the timing of this CCD sensor is analyzed. By the driving circuit testing laboratory and imaging experiments, it is found that the driving circuits can meet the requirements of Kodak CCD sensor.
Design and construction of a high frame rate imaging system

NASA Astrophysics Data System (ADS)

Wang, Jing; Waugaman, John L.; Liu, Anjun; Lu, Jian-Yu

2002-05-01

A new high frame rate imaging method has been developed recently [Jian-yu Lu, ``2D and 3D high frame rate imaging with limited diffraction beams,'' IEEE Trans. Ultrason. Ferroelectr. Freq. Control 44, 839-856 (1997)]. This method may have a clinical application for imaging of fast moving objects such as human hearts, velocity vector imaging, and low-speckle imaging. To implement the method, an imaging system has been designed. The system consists of one main printed circuit board (PCB) and 16 channel boards (each channel board contains 8 channels), in addition to a set-top box for connections to a personal computer (PC), a front panel board for user control and message display, and a power control and distribution board. The main board contains a field programmable gate array (FPGA) and controls all channels (each channel has also an FPGA). We will report the analog and digital circuit design and simulations, multiplayer PCB designs with commercial software (Protel 99), PCB signal integrity testing and system RFI/EMI shielding, and the assembly and construction of the entire system. [Work supported in part by Grant 5RO1 HL60301 from NIH.
Computer-aided linear-circuit design.

NASA Technical Reports Server (NTRS)

Penfield, P.

1971-01-01

Usually computer-aided design (CAD) refers to programs that analyze circuits conceived by the circuit designer. Among the services such programs should perform are direct network synthesis, analysis, optimization of network parameters, formatting, storage of miscellaneous data, and related calculations. The program should be embedded in a general-purpose conversational language such as BASIC, JOSS, or APL. Such a program is MARTHA, a general-purpose linear-circuit analyzer embedded in APL.
30 CFR 18.54 - High-voltage continuous mining machines.

Code of Federal Regulations, 2010 CFR

2010-07-01

... and Design Requirements § 18.54 High-voltage continuous mining machines. (a) Separation of high... removed. (c) Circuit-interrupting devices. Circuit-interrupting devices must be designed and installed to... ground. (e) Onboard ungrounded, three-phase power circuit. A continuous mining machine designed with an...
30 CFR 18.54 - High-voltage continuous mining machines.

Code of Federal Regulations, 2013 CFR

2013-07-01

... and Design Requirements § 18.54 High-voltage continuous mining machines. (a) Separation of high... removed. (c) Circuit-interrupting devices. Circuit-interrupting devices must be designed and installed to... ground. (e) Onboard ungrounded, three-phase power circuit. A continuous mining machine designed with an...
30 CFR 18.54 - High-voltage continuous mining machines.

Code of Federal Regulations, 2014 CFR

2014-07-01

... and Design Requirements § 18.54 High-voltage continuous mining machines. (a) Separation of high... removed. (c) Circuit-interrupting devices. Circuit-interrupting devices must be designed and installed to... ground. (e) Onboard ungrounded, three-phase power circuit. A continuous mining machine designed with an...
30 CFR 18.54 - High-voltage continuous mining machines.

Code of Federal Regulations, 2012 CFR

2012-07-01

... and Design Requirements § 18.54 High-voltage continuous mining machines. (a) Separation of high... removed. (c) Circuit-interrupting devices. Circuit-interrupting devices must be designed and installed to... ground. (e) Onboard ungrounded, three-phase power circuit. A continuous mining machine designed with an...
30 CFR 18.54 - High-voltage continuous mining machines.

Code of Federal Regulations, 2011 CFR

2011-07-01

... and Design Requirements § 18.54 High-voltage continuous mining machines. (a) Separation of high... removed. (c) Circuit-interrupting devices. Circuit-interrupting devices must be designed and installed to... ground. (e) Onboard ungrounded, three-phase power circuit. A continuous mining machine designed with an...
The digital compensation technology system for automotive pressure sensor

NASA Astrophysics Data System (ADS)

Guo, Bin; Li, Quanling; Lu, Yi; Luo, Zai

2011-05-01

Piezoresistive pressure sensor be made of semiconductor silicon based on Piezoresistive phenomenon, has many characteristics. But since the temperature effect of semiconductor, the performance of silicon sensor is also changed by temperature, and the pressure sensor without temperature drift can not be produced at present. This paper briefly describe the principles of sensors, the function of pressure sensor and the various types of compensation method, design the detailed digital compensation program for automotive pressure sensor. Simulation-Digital mixed signal conditioning is used in this dissertation, adopt signal conditioning chip MAX1452. AVR singlechip ATMEGA128 and other apparatus; fulfill the design of digital pressure sensor hardware circuit and singlechip hardware circuit; simultaneously design the singlechip software; Digital pressure sensor hardware circuit is used to implementing the correction and compensation of sensor; singlechip hardware circuit is used to implementing to controll the correction and compensation of pressure sensor; singlechip software is used to implementing to fulfill compensation arithmetic. In the end, it implement to measure the output of sensor, and contrast to the data of non-compensation, the outcome indicates that the compensation precision of compensated sensor output is obviously better than non-compensation sensor, not only improving the compensation precision but also increasing the stabilization of pressure sensor.
Geometric dependence of the parasitic components and thermal properties of HEMTs

NASA Astrophysics Data System (ADS)

Vun, Peter V.; Parker, Anthony E.; Mahon, Simon J.; Fattorini, Anthony

2007-12-01

For integrated circuit design up to 50GHz and beyond accurate models of the transistor access structures and intrinsic structures are necessary for prediction of circuit performance. The circuit design process relies on optimising transistor geometry parameters such as unit gate width, number of gates, number of vias and gate-to-gate spacing. So the relationship between electrical and thermal parasitic components in transistor access structures, and transistor geometry is important to understand when developing models for transistors of differing geometries. Current approaches to describing the geometric dependence of models are limited to empirical methods which only describe a finite set of geometries and only include unit gate width and number of gates as variables. A better understanding of the geometric dependence is seen as a way to provide scalable models that remain accurate for continuous variation of all geometric parameters. Understanding the distribution of parasitic elements between the manifold, the terminal fingers, and the reference plane discontinuities is an issue identified as important in this regard. Examination of dc characteristics and thermal images indicates that gate-to-gate thermal coupling and increased thermal conductance at the gate ends, affects the device total thermal conductance. Consequently, a distributed thermal model is proposed which accounts for these effects. This work is seen as a starting point for developing comprehensive scalable models that will allow RF circuit designers to optimise circuit performance parameters such as total die area, maximum output power, power-added-efficiency (PAE) and channel temperature/lifetime.
Constant-current control method of multi-function electromagnetic transmitter.

PubMed

Xue, Kaichang; Zhou, Fengdao; Wang, Shuang; Lin, Jun

2015-02-01

Based on the requirements of controlled source audio-frequency magnetotelluric, DC resistivity, and induced polarization, a constant-current control method is proposed. Using the required current waveforms in prospecting as a standard, the causes of current waveform distortion and current waveform distortion's effects on prospecting are analyzed. A cascaded topology is adopted to achieve 40 kW constant-current transmitter. The responsive speed and precision are analyzed. According to the power circuit of the transmitting system, the circuit structure of the pulse width modulation (PWM) constant-current controller is designed. After establishing the power circuit model of the transmitting system and the PWM constant-current controller model, analyzing the influence of ripple current, and designing an open-loop transfer function according to the amplitude-frequency characteristic curves, the parameters of the PWM constant-current controller are determined. The open-loop transfer function indicates that the loop gain is no less than 28 dB below 160 Hz, which assures the responsive speed of the transmitting system; the phase margin is 45°, which assures the stabilization of the transmitting system. Experimental results verify that the proposed constant-current control method can keep the control error below 4% and can effectively suppress load change caused by the capacitance of earth load.
Constant-current control method of multi-function electromagnetic transmitter

NASA Astrophysics Data System (ADS)

Xue, Kaichang; Zhou, Fengdao; Wang, Shuang; Lin, Jun

2015-02-01

Based on the requirements of controlled source audio-frequency magnetotelluric, DC resistivity, and induced polarization, a constant-current control method is proposed. Using the required current waveforms in prospecting as a standard, the causes of current waveform distortion and current waveform distortion's effects on prospecting are analyzed. A cascaded topology is adopted to achieve 40 kW constant-current transmitter. The responsive speed and precision are analyzed. According to the power circuit of the transmitting system, the circuit structure of the pulse width modulation (PWM) constant-current controller is designed. After establishing the power circuit model of the transmitting system and the PWM constant-current controller model, analyzing the influence of ripple current, and designing an open-loop transfer function according to the amplitude-frequency characteristic curves, the parameters of the PWM constant-current controller are determined. The open-loop transfer function indicates that the loop gain is no less than 28 dB below 160 Hz, which assures the responsive speed of the transmitting system; the phase margin is 45°, which assures the stabilization of the transmitting system. Experimental results verify that the proposed constant-current control method can keep the control error below 4% and can effectively suppress load change caused by the capacitance of earth load.
EMG circuit design and AR analysis of EMG signs.

PubMed

Hardalaç, Firat; Canal, Rahmi

2004-12-01

In this study, electromyogram (EMG) circuit was designed and tested on 27 people. Autoregressive (AR) analysis of EMG signals recorded on the ulnar nerve region of the right hand in resting position was performed. AR method, especially in the calculation of the spectrums of stable signs, is used for frequency analysis of signs, which give frequency response as sharp peaks and valleys. In this study, as the result of AR method analysis of EMG signals frequency-time domain, frequency spectrum curves (histogram curves) were obtained. As the images belonging to these histograms were evaluated, fibrillation potential widths of the muscle fibers of the ulnar nerve region of the people (material of the study) were examined. According to the degeneration degrees of the motor nerves, nine people had myopathy, nine had neuropathy, and nine were normal.
Methode unifiee de simulation et de conception des convertisseurs de puissance

NASA Astrophysics Data System (ADS)

Fortin Blanchette, Handy

High frequency power converters are now master piece in emerging new renewable energy applications such as hybrid vehicules. These new technologies merge the power of electrical machine with the thermal motor power. The power converters used to control those electrical machines are embeded technologies with high efficiency conversion and a high reliability. More than ground vehicule applications, embeded power converters are now present in aeronautic and aerospace domains. In this sense, high reliability and high efficiency are now important characteristics that are not only suitable but needed. In spite of this progression, power converters development remains today a complex science. Even if advanced complex techniques are now available to increase the converter stability, there are no systemic rules to design the converter physical assembly. Very often, an artistic approach is used to place the components inside the converter in the more convenient places. This lack of rigor about EMI problems is not so surprising because this kind of analysis is costly and risky. In general, to solve this type of problems, one designs a second and a third printed circuit generation which is not necessarily a quick and systematic approach. To overcome these difficulties, the main goal of this thesis is to provide simple and improved tools for power converter circuit designers. The key point are to solve EMI and reliability problems at the earlier design stage and not during the prototyping phase. Many solutions are exposed in this text about the magnetic field orientation, leakage inductances identification, power semiconductors modeling and electromagnetic modeling of power converters. The exactness of these methods is proved by using it to develop a matrix converter. The printed circuits are designed to orient properly the magnetic field enabling to introduce low power sensing circuits directly inside the converter. This application is one of the numerous possibilities offered by the techniques presented in this document. Keywords: power converters, modeling, electromagnetic interferences.
Quadrature demodulation based circuit implementation of pulse stream for ultrasonic signal FRI sparse sampling

NASA Astrophysics Data System (ADS)

Shoupeng, Song; Zhou, Jiang

2017-03-01

Converting ultrasonic signal to ultrasonic pulse stream is the key step of finite rate of innovation (FRI) sparse sampling. At present, ultrasonic pulse-stream-forming techniques are mainly based on digital algorithms. No hardware circuit that can achieve it has been reported. This paper proposes a new quadrature demodulation (QD) based circuit implementation method for forming an ultrasonic pulse stream. Elaborating on FRI sparse sampling theory, the process of ultrasonic signal is explained, followed by a discussion and analysis of ultrasonic pulse-stream-forming methods. In contrast to ultrasonic signal envelope extracting techniques, a quadrature demodulation method (QDM) is proposed. Simulation experiments were performed to determine its performance at various signal-to-noise ratios (SNRs). The circuit was then designed, with mixing module, oscillator, low pass filter (LPF), and root of square sum module. Finally, application experiments were carried out on pipeline sample ultrasonic flaw testing. The experimental results indicate that the QDM can accurately convert ultrasonic signal to ultrasonic pulse stream, and reverse the original signal information, such as pulse width, amplitude, and time of arrival. This technique lays the foundation for ultrasonic signal FRI sparse sampling directly with hardware circuitry.
The Principle of the Micro-Electronic Neural Bridge and a Prototype System Design.

PubMed

Huang, Zong-Hao; Wang, Zhi-Gong; Lu, Xiao-Ying; Li, Wen-Yuan; Zhou, Yu-Xuan; Shen, Xiao-Yan; Zhao, Xin-Tai

2016-01-01

The micro-electronic neural bridge (MENB) aims to rebuild lost motor function of paralyzed humans by routing movement-related signals from the brain, around the damage part in the spinal cord, to the external effectors. This study focused on the prototype system design of the MENB, including the principle of the MENB, the neural signal detecting circuit and the functional electrical stimulation (FES) circuit design, and the spike detecting and sorting algorithm. In this study, we developed a novel improved amplitude threshold spike detecting method based on variable forward difference threshold for both training and bridging phase. The discrete wavelet transform (DWT), a new level feature coefficient selection method based on Lilliefors test, and the k-means clustering method based on Mahalanobis distance were used for spike sorting. A real-time online spike detecting and sorting algorithm based on DWT and Euclidean distance was also implemented for the bridging phase. Tested by the data sets available at Caltech, in the training phase, the average sensitivity, specificity, and clustering accuracies are 99.43%, 97.83%, and 95.45%, respectively. Validated by the three-fold cross-validation method, the average sensitivity, specificity, and classification accuracy are 99.43%, 97.70%, and 96.46%, respectively.

Qualitative models and experimental investigation of chaotic NOR gates and set/reset flip-flops

NASA Astrophysics Data System (ADS)

Rahman, Aminur; Jordan, Ian; Blackmore, Denis

2018-01-01

It has been observed through experiments and SPICE simulations that logical circuits based upon Chua's circuit exhibit complex dynamical behaviour. This behaviour can be used to design analogues of more complex logic families and some properties can be exploited for electronics applications. Some of these circuits have been modelled as systems of ordinary differential equations. However, as the number of components in newer circuits increases so does the complexity. This renders continuous dynamical systems models impractical and necessitates new modelling techniques. In recent years, some discrete dynamical models have been developed using various simplifying assumptions. To create a robust modelling framework for chaotic logical circuits, we developed both deterministic and stochastic discrete dynamical models, which exploit the natural recurrence behaviour, for two chaotic NOR gates and a chaotic set/reset flip-flop. This work presents a complete applied mathematical investigation of logical circuits. Experiments on our own designs of the above circuits are modelled and the models are rigorously analysed and simulated showing surprisingly close qualitative agreement with the experiments. Furthermore, the models are designed to accommodate dynamics of similarly designed circuits. This will allow researchers to develop ever more complex chaotic logical circuits with a simple modelling framework.
Qualitative models and experimental investigation of chaotic NOR gates and set/reset flip-flops.

PubMed

Rahman, Aminur; Jordan, Ian; Blackmore, Denis

2018-01-01

It has been observed through experiments and SPICE simulations that logical circuits based upon Chua's circuit exhibit complex dynamical behaviour. This behaviour can be used to design analogues of more complex logic families and some properties can be exploited for electronics applications. Some of these circuits have been modelled as systems of ordinary differential equations. However, as the number of components in newer circuits increases so does the complexity. This renders continuous dynamical systems models impractical and necessitates new modelling techniques. In recent years, some discrete dynamical models have been developed using various simplifying assumptions. To create a robust modelling framework for chaotic logical circuits, we developed both deterministic and stochastic discrete dynamical models, which exploit the natural recurrence behaviour, for two chaotic NOR gates and a chaotic set/reset flip-flop. This work presents a complete applied mathematical investigation of logical circuits. Experiments on our own designs of the above circuits are modelled and the models are rigorously analysed and simulated showing surprisingly close qualitative agreement with the experiments. Furthermore, the models are designed to accommodate dynamics of similarly designed circuits. This will allow researchers to develop ever more complex chaotic logical circuits with a simple modelling framework.
Electrostatic separation for recycling waste printed circuit board: a study on external factor and a robust design for optimization.

PubMed

Hou, Shibing; Wu, Jiang; Qin, Yufei; Xu, Zhenming

2010-07-01

Electrostatic separation is an effective and environmentally friendly method for recycling waste printed circuit board (PCB) by several kinds of electrostatic separators. However, some notable problems have been detected in its applications and cannot be efficiently resolved by optimizing the separation process. Instead of the separator itself, these problems are mainly caused by some external factors such as the nonconductive powder (NP) and the superficial moisture of feeding granule mixture. These problems finally lead to an inefficient separation. In the present research, the impacts of these external factors were investigated and a robust design was built to optimize the process and to weaken the adverse impact. A most robust parameter setting (25 kv, 80 rpm) was concluded from the experimental design. In addition, some theoretical methods, including cyclone separation, were presented to eliminate these problems substantially. This will contribute to efficient electrostatic separation of waste PCB and make remarkable progress for industrial applications.
Application of Printed Circuit Board Technology to FT-ICR MS Analyzer Cell Construction and Prototyping

DOE Office of Scientific and Technical Information (OSTI.GOV)

Leach, Franklin E.; Norheim, Randolph V.; Anderson, Gordon A.

Although Fourier transform ion cyclotron resonance mass spectrometry (FT-ICRMS) remains themass spectrometry platform that provides the highest levels of performance for mass accuracy and resolving power, there is room for improvement in analyzer cell design as the ideal quadrupolar trapping potential has yet to be generated for a broadband MS experiment. To this end, analyzer cell designs have improved since the field’s inception, yet few research groups participate in this area because of the high cost of instrumentation efforts. As a step towards reducing this barrier to participation and allowing for more designs to be physically tested, we introduce amore » method of FT-ICR analyzer cell prototyping utilizing printed circuit boards at modest vacuum conditions. This method allows for inexpensive devices to be readily fabricated and tested over short intervals and should open the field to laboratories lacking or unable to access high performance machine shop facilities because of the required financial investment.« less
Sequential circuit design for radiation hardened multiple voltage integrated circuits

DOEpatents

Clark, Lawrence T [Phoenix, AZ; McIver, III, John K.

2009-11-24

The present invention includes a radiation hardened sequential circuit, such as a bistable circuit, flip-flop or other suitable design that presents substantial immunity to ionizing radiation while simultaneously maintaining a low operating voltage. In one embodiment, the circuit includes a plurality of logic elements that operate on relatively low voltage, and a master and slave latches each having storage elements that operate on a relatively high voltage.
14 CFR 25.1357 - Circuit protective devices.

Code of Federal Regulations, 2013 CFR

2013-01-01

... designed to de-energize and disconnect faulty power sources and power transmission equipment from their... malfunctioning. (c) Each resettable circuit protective device must be designed so that, when an overload or... must be designed so that circuit breakers are not the primary means to remove or reset system power...
14 CFR 25.1357 - Circuit protective devices.

Code of Federal Regulations, 2012 CFR

2012-01-01

... designed to de-energize and disconnect faulty power sources and power transmission equipment from their... malfunctioning. (c) Each resettable circuit protective device must be designed so that, when an overload or... must be designed so that circuit breakers are not the primary means to remove or reset system power...
14 CFR 25.1357 - Circuit protective devices.

Code of Federal Regulations, 2014 CFR

2014-01-01

... designed to de-energize and disconnect faulty power sources and power transmission equipment from their... malfunctioning. (c) Each resettable circuit protective device must be designed so that, when an overload or... must be designed so that circuit breakers are not the primary means to remove or reset system power...
14 CFR 25.1357 - Circuit protective devices.

Code of Federal Regulations, 2011 CFR

2011-01-01

... designed to de-energize and disconnect faulty power sources and power transmission equipment from their... malfunctioning. (c) Each resettable circuit protective device must be designed so that, when an overload or... must be designed so that circuit breakers are not the primary means to remove or reset system power...
Design and Analysis of Hydrostatic Transmission System

NASA Astrophysics Data System (ADS)

Mistry, Kayzad A.; Patel, Bhaumikkumar A.; Patel, Dhruvin J.; Parsana, Parth M.; Patel, Jitendra P.

2018-02-01

This study develops a hydraulic circuit to drive a conveying system dealing with heavy and delicate loads. Various safety circuits have been added in order to ensure stable working at high pressure and precise controlling. Here we have shown the calculation procedure based on an arbitrarily selected load. Also the circuit design and calculations of various components used is depicted along with the system simulation. The results show that the system is stable and efficient enough to transmit heavy loads by functioning of the circuit. By this information, one can be able to design their own hydrostatic circuits for various heavy loading conditions.
Kick Stick Hands-on Challenge: Discover Circuits with PBS's "Design Squad Nation"[TM

ERIC Educational Resources Information Center

Feinberg, Lauren

2011-01-01

This article describes the "Kick Stick" activity from Design Squad Nation, in which kids turn a wooden paint stirrer and circuit into a motorized, spinning arm--then use it to kick a Ping-Pong[R] ball across the floor. Teachers can enrich their students' exploration of circuits and emphasize the engineering design process with "Design Squad…
Analytical Model-Based Design Optimization of a Transverse Flux Machine

DOE Office of Scientific and Technical Information (OSTI.GOV)

Hasan, Iftekhar; Husain, Tausif; Sozer, Yilmaz

This paper proposes an analytical machine design tool using magnetic equivalent circuit (MEC)-based particle swarm optimization (PSO) for a double-sided, flux-concentrating transverse flux machine (TFM). The magnetic equivalent circuit method is applied to analytically establish the relationship between the design objective and the input variables of prospective TFM designs. This is computationally less intensive and more time efficient than finite element solvers. A PSO algorithm is then used to design a machine with the highest torque density within the specified power range along with some geometric design constraints. The stator pole length, magnet length, and rotor thickness are the variablesmore » that define the optimization search space. Finite element analysis (FEA) was carried out to verify the performance of the MEC-PSO optimized machine. The proposed analytical design tool helps save computation time by at least 50% when compared to commercial FEA-based optimization programs, with results found to be in agreement with less than 5% error.« less
Power efficient, clock gated multiplexer based full adder cell using 28 nm technology

NASA Astrophysics Data System (ADS)

Gupta, Ashutosh; Murgai, Shruti; Gulati, Anmol; Kumar, Pradeep

2016-03-01

Clock gating is a leading technique used for power saving. Full adders is one of the basic circuit that can be found in maximum VLSI circuits. In this paper clock gated multiplexer based full adder cell is implemented on 28 nm technology. We have designed a full adder cell using a multiplexer with a gated clock without degrading its performance of the cell. We have negative latch circuit for generating gated clock. This gated clock is used to control the multiplexer based full adder cell. The circuit has been synthesized on kintex FPGA through Xilinx ISE Design Suite 14.7 using 28 nm technology in Verilog HDL. The circuit has been simulated on Modelsim 10.3c. The design is verified using System Verilog on QuestaSim in UVM environment. The total power of the circuit has been reduced by 7.41% without degrading the performance of original circuit. The power has been calculated using XPower Analyzer tool of XILINX ISE DESIGN SUITE 14.3.
Integrated circuit amplifiers for multi-electrode intracortical recording.

PubMed

Jochum, Thomas; Denison, Timothy; Wolf, Patrick

2009-02-01

Significant progress has been made in systems that interpret the electrical signals of the brain in order to control an actuator. One version of these systems senses neuronal extracellular action potentials with an array of up to 100 miniature probes inserted into the cortex. The impedance of each probe is high, so environmental electrical noise is readily coupled to the neuronal signal. To minimize this noise, an amplifier is placed close to each probe. Thus, the need has arisen for many amplifiers to be placed near the cortex. Commercially available integrated circuits do not satisfy the area, power and noise requirements of this application, so researchers have designed custom integrated-circuit amplifiers. This paper presents a comprehensive survey of the neural amplifiers described in publications prior to 2008. Methods to achieve high input impedance, low noise and a large time-constant high-pass filter are reviewed. A tutorial on the biological, electrochemical, mechanical and electromagnetic phenomena that influence amplifier design is provided. Areas for additional research, including sub-nanoampere electrolysis and chronic cortical heating, are discussed. Unresolved design concerns, including teraohm circuitry, electrical overstress and component failure, are identified.
Shape memory alloy wire for self-sensing servo actuation

NASA Astrophysics Data System (ADS)

Josephine Selvarani Ruth, D.; Dhanalakshmi, K.

2017-01-01

This paper reports on the development of a straightforward approach to realise self-sensing shape memory alloy (SMA) wire actuated control. A differential electrical resistance measurement circuit (the sensorless signal conditioning (SSC) circuit) is designed; this sensing signal is directly used as the feedback for control. Antagonistic SMA wire actuators designed for servo actuation is realized in self-sensing actuation (SSA) mode for direct control with the differential electrical resistance feedback. The self-sensing scheme is established on a 1-DOF manipulator with the discrete time sliding mode controls which demonstrates good control performance, whatever be the disturbance and loading conditions. The uniqueness of this work is the design of the generic electronic SSC circuit for SMA actuated system, for measurement and control. With a concern to the implementation of self-sensing technique in SMA, this scheme retains the systematic control architecture by using the sensing signal (self-sensed, electrical resistance corresponding to the system position) for feedback, without requiring any processing as that of the methods adopted and reported previously for SSA techniques of SMA.
An Efficient and Effective Design of InP Nanowires for Maximal Solar Energy Harvesting.

PubMed

Wu, Dan; Tang, Xiaohong; Wang, Kai; He, Zhubing; Li, Xianqiang

2017-11-25

Solar cells based on subwavelength-dimensions semiconductor nanowire (NW) arrays promise a comparable or better performance than their planar counterparts by taking the advantages of strong light coupling and light trapping. In this paper, we present an accurate and time-saving analytical design for optimal geometrical parameters of vertically aligned InP NWs for maximal solar energy absorption. Short-circuit current densities are calculated for each NW array with different geometrical dimensions under solar illumination. Optimal geometrical dimensions are quantitatively presented for single, double, and multiple diameters of the NW arrays arranged both squarely and hexagonal achieving the maximal short-circuit current density of 33.13 mA/cm 2 . At the same time, intensive finite-difference time-domain numerical simulations are performed to investigate the same NW arrays for the highest light absorption. Compared with time-consuming simulations and experimental results, the predicted maximal short-circuit current densities have tolerances of below 2.2% for all cases. These results unambiguously demonstrate that this analytical method provides a fast and accurate route to guide high performance InP NW-based solar cell design.
An Efficient and Effective Design of InP Nanowires for Maximal Solar Energy Harvesting

NASA Astrophysics Data System (ADS)

Wu, Dan; Tang, Xiaohong; Wang, Kai; He, Zhubing; Li, Xianqiang

2017-11-01

Solar cells based on subwavelength-dimensions semiconductor nanowire (NW) arrays promise a comparable or better performance than their planar counterparts by taking the advantages of strong light coupling and light trapping. In this paper, we present an accurate and time-saving analytical design for optimal geometrical parameters of vertically aligned InP NWs for maximal solar energy absorption. Short-circuit current densities are calculated for each NW array with different geometrical dimensions under solar illumination. Optimal geometrical dimensions are quantitatively presented for single, double, and multiple diameters of the NW arrays arranged both squarely and hexagonal achieving the maximal short-circuit current density of 33.13 mA/cm2. At the same time, intensive finite-difference time-domain numerical simulations are performed to investigate the same NW arrays for the highest light absorption. Compared with time-consuming simulations and experimental results, the predicted maximal short-circuit current densities have tolerances of below 2.2% for all cases. These results unambiguously demonstrate that this analytical method provides a fast and accurate route to guide high performance InP NW-based solar cell design.
Design and implementation of a simple acousto optic dual control circuit

NASA Astrophysics Data System (ADS)

Li, Biqing; Li, Zhao

2017-04-01

This page proposed a simple light control circuit which designed by using power supply circuit, sonic circuits, electric circuit and delay circuit four parts. The main chip for CD4011, have inside of the four and to complete the sonic or circuit, electric, delay logic circuit. During the day, no matter how much a pedestrian voice, is ever shine light bulb. Dark night, circuit in a body to make the microphone as long as testing noise, and will automatically be bright for pedestrians lighting, several minutes after the automatic and put out, effective energy saving. Applicable scope and the working principle of the circuit principle diagram and given device parameters selection, power saving effect is obvious, at the same time greatly reduce the maintenance quantity, saving money, use effect is good.
The Application of the EIS in Li-ion Batteries Measurement

NASA Astrophysics Data System (ADS)

Zhai, N. S.; Li, M. W.; Wang, W. L.; Zhang, D. L.; Xu, D. G.

2006-10-01

The measurement and determination of the lithium ion battery's electrochemical impedance spectroscopy (EIS) and the application of EIS to battery classification are researched in this paper. The lithium ion battery gets extensive applications due to its inherent advantages over other batteries. For proper and sustainable performance, it is very necessary to check the uniformity of the lithium ion batteries. In this paper, the equivalent circuit of the lithium ion battery is analyzed; the design of hardware circuit based on DSP and software that calculates the EIS of the lithium ion battery is critically done and evaluated. The parameters of the lithium ion equivalent circuit are determined, the parameter values of li-ion equivalent circuit are achieved by least square method, and the application of Principal Component Analysis (CPA) to the battery classification is analyzed.
Fabric circuits and method of manufacturing fabric circuits

NASA Technical Reports Server (NTRS)

Chu, Andrew W. (Inventor); Dobbins, Justin A. (Inventor); Scully, Robert C. (Inventor); Trevino, Robert C. (Inventor); Lin, Greg Y. (Inventor); Fink, Patrick W. (Inventor)

2011-01-01

A flexible, fabric-based circuit comprises a non-conductive flexible layer of fabric and a conductive flexible layer of fabric adjacent thereto. A non-conductive thread, an adhesive, and/or other means may be used for attaching the conductive layer to the non-conductive layer. In some embodiments, the layers are attached by a computer-driven embroidery machine at pre-determined portions or locations in accordance with a pre-determined attachment layout before automated cutting. In some other embodiments, an automated milling machine or a computer-driven laser using a pre-designed circuit trace as a template cuts the conductive layer so as to separate an undesired portion of the conductive layer from a desired portion of the conductive layer. Additional layers of conductive fabric may be attached in some embodiments to form a multi-layer construct.

Recent progress in low-temperature-process monolithic three dimension technology

NASA Astrophysics Data System (ADS)

Yang, Chih-Chao; Hsieh, Tung-Ying; Huang, Wen-Hsien; Shen, Chang-Hong; Shieh, Jia-Min; Yeh, Wen-Kuan; Wu, Meng-Chyi

2018-04-01

Monolithic three-dimension (3D) integration is an ultimate alternative method of fabricating high density, high performance, and multi-functional integrated circuits. It offers the promise of being a new approach to increase system performance. How to manage the thermal impact of multi-tiered processes, such as dopant activation, source/drain silicidation, and channel formation, and to prevent the degradation of pre-existing devices/circuits become key challenges. In this paper, we provide updates on several important monolithic 3D works, particularly in sequentially stackable channels, and our recent achievements in monolithic 3D integrated circuit (3D-IC). These results indicate that the advanced 3D architecture with novel design tools enables ultrahigh-density stackable circuits to have superior performance and low power consumption for future artificial intelligence (AI) and internet of things (IoTs) application.
Design of optical seven-segment decoder using Pockel's effect inside lithium niobate-based waveguide

NASA Astrophysics Data System (ADS)

Pal, Amrindra; Kumar, Santosh; Sharma, Sandeep

2017-01-01

Seven-segment decoder is a device that allows placing digital information from many inputs to many outputs optically, having 11 Mach-Zehnder interferometers (MZIs) for their implementation. The layout of the circuit is implemented to fit the electrical method on an optical logic circuit based on the beam propagation method (BPM). Seven-segment decoder is proposed using electro-optic effect inside lithium niobate-based MZIs. MZI structures are able to switch an optical signal to a desired output port. It consists of a mathematical explanation about the proposed device. The BPM is also used to analyze the study.
RADIATION DAMAGE TO SATELLITE ELECTRONIC SYSTEMS

DOE Office of Scientific and Technical Information (OSTI.GOV)

Rogers, S.C.

The radiation sensitivity of satellite electronic systems was examined in order to determine the limitations they place on satellite life. The effects of radiation on components are briefly reviewed. Methods are presented and illustrated for determining the minimum radiation level at which circuit failure could occur. The effects of shielding on the radiation belt levels are discussed. It is shown that the effects of space radiation on satellite circuits, in general, can be made negligible by using good design practices. (M.C.G.)
Analysis of the Characteristics of a Rotary Stepper Micromotor

NASA Astrophysics Data System (ADS)

Sone, Junji; Mizuma, Toshinari; Masunaga, Masakazu; Mochizuki, Shunsuke; Sarajic, Edin; Yamahata, Christophe; Fujita, Hiroyuki

A 3-phase electrostatic stepper micromotor was developed. To improve its performance for actual use, we have conducted numerical simulation to optimize the design. An improved simulation method is needed for calculation of various cases. To conduct circuit simulation of this micromotor, its structure is simplified, and a function for computing the force excited by the electrostatic field is added to the circuit simulator. We achieved a reasonably accurate simulation. We also considered an optimal drive waveform to achieve low-voltage operation.
Graphical approach for multiple values logic minimization

NASA Astrophysics Data System (ADS)

Awwal, Abdul Ahad S.; Iftekharuddin, Khan M.

1999-03-01

Multiple valued logic (MVL) is sought for designing high complexity, highly compact, parallel digital circuits. However, the practical realization of an MVL-based system is dependent on optimization of cost, which directly affects the optical setup. We propose a minimization technique for MVL logic optimization based on graphical visualization, such as a Karnaugh map. The proposed method is utilized to solve signed-digit binary and trinary logic minimization problems. The usefulness of the minimization technique is demonstrated for the optical implementation of MVL circuits.
NREL/NASA Internal Short-Circuit Instigator in Lithium Ion Cells; NREL (National Renewable Energy Laboratory)

DOE Office of Scientific and Technical Information (OSTI.GOV)

Long, Dirk; Ireland, John; Pesaran, Ahmad

NREL has developed a device to test one of the most challenging failure mechanisms of lithium-ion (Li-ion) batteries -- a battery internal short circuit. Many members of the technical community believe that this type of failure is caused by a latent flaw that results in a short circuit between electrodes during use. As electric car manufacturers turn to Li-ion batteries for energy storage, solving the short circuit problem becomes more important. To date, no reliable and practical method exists to create on-demand internal shorts in Li-ion cells that produce a response that is relevant to the ones produced by fieldmore » failures. NREL and NASA have worked to establish an improved ISC cell-level test method that simulates an emergent internal short circuit, is capable of triggering the four types of cell internal shorts, and produces consistent and reproducible results. Internal short circuit device design is small, low-profile and implantable into Li-ion cells, preferably during assembly. The key component is an electrolyte-compatible phase change material (PCM). The ISC is triggered by heating the cell above PCM melting temperature (presently 40 degrees C – 60 degrees C). In laboratory testing, the activated device can handle currents in excess of 300 A to simulate hard shorts (< 2 mohms). Phase change from non-conducting to conducting has been 100% successful during trigger tests.« less
Smaller-loss planar SPP transmission line than conventional microstrip in microwave frequencies.

PubMed

Zhang, Hao Chi; Zhang, Qian; Liu, Jun Feng; Tang, Wenxuan; Fan, Yifeng; Cui, Tie Jun

2016-03-17

Transmission line is a basic component in all passive devices, integrated circuits, and systems. Microstrip is the most popular transmission line in the microwave and millimeter-wave frequencies, and has been widely used in current electronic devices, circuits, and systems. One of the important issues to be solved in such applications is the relatively large transmission loss of microstrip. Here, we propose a method to reduce the loss of microwave transmission line based on the designable wavenumber of spoof surface plasmon polaritons (SPPs). Using this characteristic, we analyze and experimentally demonstrate the low-loss feature of the SPP transmission line through the perturbation method and S-parameter measurements, respectively. Both simulation and experimental results show that the SPP transmission line has much smaller transmission loss than traditional microstrip with the same size in the microwave frequencies. Hence, the spoof SPP transmission line may make a big step forward in the low-loss circuits and systems.
Technical Study on Improvement of Endurance Capability of Limit Short-circuit Current of Charge Control SMART Meter

NASA Astrophysics Data System (ADS)

Li, W. W.; Du, Z. Z.; Yuan, R. m.; Xiong, D. Z.; Shi, E. W.; Lu, G. N.; Dai, Z. Y.; Chen, X. Q.; Jiang, Z. Y.; Lv, Y. G.

2017-10-01

Smart meter represents the development direction of energy-saving smart grid in the future. The load switch, one of the core parts of smart meter, should be of high reliability, safety and endurance capability of limit short-circuit current. For this reason, this paper discusses the quick simulation of relationship between attraction and counterforce of load switch without iteration, establishes dual response surface model of attraction and counterforce and optimizes the design scheme of load switch for charge control smart meter, thus increasing electromagnetic attraction and spring counterforce. In this way, this paper puts forward a method to improve the withstand capacity of limit short-circuit current.
Self-shielding flex-circuit drift tube, drift tube assembly and method of making

DOEpatents

Jones, David Alexander

2016-04-26

The present disclosure is directed to an ion mobility drift tube fabricated using flex-circuit technology in which every other drift electrode is on a different layer of the flex-circuit and each drift electrode partially overlaps the adjacent electrodes on the other layer. This results in a self-shielding effect where the drift electrodes themselves shield the interior of the drift tube from unwanted electro-magnetic noise. In addition, this drift tube can be manufactured with an integral flex-heater for temperature control. This design will significantly improve the noise immunity, size, weight, and power requirements of hand-held ion mobility systems such as those used for explosive detection.
An Optimized 2.4GHz RF Power Amplifier Performance for WLAN System

NASA Astrophysics Data System (ADS)

Ali, Mohammed H.; Chakrabarty, C. K.; Abdalla, Ahmed N.; Hock, Goh C.

2013-06-01

Recently, the design of RF power amplifiers (PAs) for modern wireless systems are faced with a difficult tradeoff for example, cellphone; battery lifetime is largely determined by the power efficiency of the PA and high spectral efficiency which have ability to transmit data at the highest possible rate for a given channel bandwidth. This paper presents the design a multi stage class AB power Amplifier with high power added efficiency (PAE) and acceptable linearity for the WLAN applications. The open-circuited third harmonic control circuit enhances the efficiency of the PA without deteriorating the linearity of class-AB mode of the PA. The voltage and current waveforms are simulated to evaluate the appropriate operation for the modes. The effectiveness of the proposed controller has been verified by comparing proposed method with another methods using simulation study under a variety of conditions. The proposed circuit operation for a WLAN signals delivers a power-added efficiency (PAE) of 37.6% is measured at 31.6-dBm output power while dissipating 34.61 mA from a 1.8V supply. Finally, the proposed PA is show a good and acceptable result for the WLAN system.
Design of Low-Complexity and High-Speed Coplanar Four-Bit Ripple Carry Adder in QCA Technology

NASA Astrophysics Data System (ADS)

Balali, Moslem; Rezai, Abdalhossein

2018-07-01

Quantum-dot Cellular Automata (QCA) technology is a suitable technology to replace CMOS technology due to low-power consumption, high-speed and high-density devices. Full adder has an important role in the digital circuit design. This paper presents and evaluates a novel single-layer four-bit QCA Ripple Carry Adder (RCA) circuit. The developed four-bit QCA RCA circuit is based on novel QCA full adder circuit. The developed circuits are simulated using QCADesigner tool version 2.0.3. The simulation results show that the developed circuits have advantages in comparison with existing single-layer and multilayer circuits in terms of cell count, area occupation and circuit latency.
Design of Low-Complexity and High-Speed Coplanar Four-Bit Ripple Carry Adder in QCA Technology

NASA Astrophysics Data System (ADS)

Balali, Moslem; Rezai, Abdalhossein

2018-03-01

Quantum-dot Cellular Automata (QCA) technology is a suitable technology to replace CMOS technology due to low-power consumption, high-speed and high-density devices. Full adder has an important role in the digital circuit design. This paper presents and evaluates a novel single-layer four-bit QCA Ripple Carry Adder (RCA) circuit. The developed four-bit QCA RCA circuit is based on novel QCA full adder circuit. The developed circuits are simulated using QCADesigner tool version 2.0.3. The simulation results show that the developed circuits have advantages in comparison with existing single-layer and multilayer circuits in terms of cell count, area occupation and circuit latency.
Designable DNA-binding domains enable construction of logic circuits in mammalian cells.

PubMed

Gaber, Rok; Lebar, Tina; Majerle, Andreja; Šter, Branko; Dobnikar, Andrej; Benčina, Mojca; Jerala, Roman

2014-03-01

Electronic computer circuits consisting of a large number of connected logic gates of the same type, such as NOR, can be easily fabricated and can implement any logic function. In contrast, designed genetic circuits must employ orthogonal information mediators owing to free diffusion within the cell. Combinatorial diversity and orthogonality can be provided by designable DNA- binding domains. Here, we employed the transcription activator-like repressors to optimize the construction of orthogonal functionally complete NOR gates to construct logic circuits. We used transient transfection to implement all 16 two-input logic functions from combinations of the same type of NOR gates within mammalian cells. Additionally, we present a genetic logic circuit where one input is used to select between an AND and OR function to process the data input using the same circuit. This demonstrates the potential of designable modular transcription factors for the construction of complex biological information-processing devices.
Circuit analysis method for thin-film solar cell modules

NASA Technical Reports Server (NTRS)

Burger, D. R.

1985-01-01

The design of a thin-film solar cell module is dependent on the probability of occurrence of pinhole shunt defects. Using known or assumed defect density data, dichotomous population statistics can be used to calculate the number of defects expected in a module. Probability theory is then used to assign the defective cells to individual strings in a selected series-parallel circuit design. Iterative numerical calculation is used to calcuate I-V curves using cell test values or assumed defective cell values as inputs. Good and shunted cell I-V curves are added to determine the module output power and I-V curve. Different levels of shunt resistance can be selected to model different defect levels.
Calculation and Analysis of Dynamic Characteristics of Multilink Permanent Magnetic Actuator in Vacuum Circuit Breaker

NASA Astrophysics Data System (ADS)

Liu, Yingyi; Yuan, Haiwen; Zhang, Qingjie; Chen, Degui; Yuan, Haibin

The dynamic characteristics are the key issues in the optimum design of a permanent magnetic actuator (PMA). A new approach to forecast the dynamic characteristics of the multilink PMA is proposed. By carrying out further developments of ADAMS and ANSOFT, a mathematic calculation model describing the coupling of mechanical movement, electric circuit and magnetic field considering eddy current effect, is constructed. With this model, the dynamic characteristics of the multilink PMA are calculated and compared with the experimental results. Factors that affect the opening time of the multilink PMA are analyzed with the model as well. The method is capable of providing a reference for the design of the PMA.
Development of Electromagnetically Actuated Vacuum Circuit Breaker for 72kV Rated Switchgear

NASA Astrophysics Data System (ADS)

Kim, Tae-Hyun; Tsukima, Mitsuru; Maruyama, Akihiko; Takahara, Osamu; Haruna, Kazushi; Yano, Tomotaka; Matsunaga, Toshihiro; Imamura, Kazuaki; Arioka, Masahiro; Takeuchi, Toshie

A new electromagnetically actuated vacuum circuit breaker (VCB) has been developed for a 72kV rated switchgear. Each phase of this VCB has a plurality of compact electromagnetic actuators linked mechanically providing the required driving energy. The mechanical linkage working as a lever magnifies an actuator stroke to the required stroke of a 72kV rated vacuum interrupter. An electromagnetic analysis coupled with motion, which considers the mechanical linkage of the plural actuators, has been developed for designing the driving behavior of this VCB. Using this analytical method and a quality engineering method known as the Taguchi method, we have clarified effective parameters to reduce the time difference of the driving behavior for tolerance specifications. Moreover, analyzing the oscillatory behavior closing the contacts, a structure of this VCB has been designed to reduce the bounce duration. The developed new VCB has been confirmed that a time difference is short enough and bounce duration is reduced. This VCB is highly reliable against variations in manufacturing and environment.
Space shuttle main engine controller assembly, phase C-D. [with lagging system design and analysis

NASA Technical Reports Server (NTRS)

1973-01-01

System design and system analysis and simulation are slightly behind schedule, while design verification testing has improved. Input/output circuit design has improved, but digital computer unit (DCU) and mechanical design continue to lag. Part procurement was impacted by delays in printed circuit board, assembly drawing releases. These are the result of problems in generating suitable printed circuit artwork for the very complex and high density multilayer boards.
Analysis and Design of Power Factor Pre-Regulator Based on a Symmetrical Charge Pump Circuit Applied to Electronic Ballast

NASA Astrophysics Data System (ADS)

Lazcano Olea, Miguel; Ramos Astudillo, Reynaldo; Sanhueza Robles, René; Rodriguez Rubke, Leopoldo; Ruiz-Caballero, Domingo Antonio

This paper presents the analysis and design of a power factor pre-regulator based on a symmetrical charge pump circuit applied to electronic ballast. The operation stages of the circuit are analyzed and its main design equations are obtained. Simulation and experimental results are presented in order to show the design methodology feasibility.
Vibration analysis of printed circuit boards: Effect of boundary condition

NASA Astrophysics Data System (ADS)

Prashanth, M. D.

2018-04-01

A spacecraft consists of a number of electronic packages to meet the functional requirements. An electronic package is generally an assembly of printed circuit boards placed in a mechanical housing. A number of electronic components are mounted on the printed circuit board (PCB). A spacecraft experiences various types of loads during its launch such as vibration, acoustic and shock loads. Prediction of response for printed circuit boards due to vibration loads is important for mechanical design and reliability of electronic packages. The modeling and analysis of printed circuit boards is required for accurate prediction of response due to vibration loads. The response of PCB is highly dependent on the mounting configuration of PCB. In addition, anti-vibration mounts or stiffeners are used to reduce the PCB response. Vibration analysis of printed circuit boards is carried out using finite element method. The objective of this paper is to determine the dynamic characteristics of a printed circuit board. Modeling and analysis of PCB shall be carried out to study the effect of boundary conditions on the vibration response. The modeling of stiffeners or ribs shall also be considered in detail. The analysis results shall be validated using vibration tests of PCB.
Electromagnetic Compatibility in the Defense Systems of Future Years

DTIC Science & Technology

2002-06-01

Technology activities. Its mission is to conduct and promote cooperative research and information exchange . The objective is to support the development...testing CLEARANCE PRODUCTION AND IN-SERVICE SUPPORT Modelling in support of conceptual design (structure & installation design) EMH Design guides for the... marketed by Advanced Electromagnetics [6-1]. Transmission Line Matrix Method The link between field theory and circuit theory, the major theories on

System Modeling of a MEMS Vibratory Gyroscope and Integration to Circuit Simulation.

PubMed

Kwon, Hyukjin J; Seok, Seyeong; Lim, Geunbae

2017-11-18

Recently, consumer applications have dramatically created the demand for low-cost and compact gyroscopes. Therefore, on the basis of microelectromechanical systems (MEMS) technology, many gyroscopes have been developed and successfully commercialized. A MEMS gyroscope consists of a MEMS device and an electrical circuit for self-oscillation and angular-rate detection. Since the MEMS device and circuit are interactively related, the entire system should be analyzed together to design or test the gyroscope. In this study, a MEMS vibratory gyroscope is analyzed based on the system dynamic modeling; thus, it can be mathematically expressed and integrated into a circuit simulator. A behavioral simulation of the entire system was conducted to prove the self-oscillation and angular-rate detection and to determine the circuit parameters to be optimized. From the simulation, the operating characteristic according to the vacuum pressure and scale factor was obtained, which indicated similar trends compared with those of the experimental results. The simulation method presented in this paper can be generalized to a wide range of MEMS devices.
A New Low Temperature Polycrystalline Silicon Thin Film Transistor Pixel Circuit for Active Matrix Organic Light Emitting Diode

NASA Astrophysics Data System (ADS)

Ching-Lin Fan,; Yi-Yan Lin,; Jyu-Yu Chang,; Bo-Jhang Sun,; Yan-Wei Liu,

2010-06-01

This study presents one novel compensation pixel design and driving method for active matrix organic light-emitting diode (AMOLED) displays that use low-temperature polycrystalline silicon thin-film transistors (LTPS-TFTs) with a voltage feed-back method and the simulation results are proposed and verified by SPICE simulator. The measurement and simulation of LTPS TFT characteristics demonstrate the good fitting result. The proposed circuit consists of four TFTs and two capacitors with an additional signal line. The error rates of OLED anode voltage variation are below 0.3% under the threshold voltage deviation of driving TFT (Δ VTH = ± 0.33 V). The simulation results show that the pixel design can improve the display image non-uniformity by compensating the threshold voltage deviation of driving TFT and the degradation of OLED threshold voltage at the same time.
A New Low Temperature Polycrystalline Silicon Thin Film Transistor Pixel Circuit for Active Matrix Organic Light Emitting Diode

NASA Astrophysics Data System (ADS)

Fan, Ching-Lin; Lin, Yi-Yan; Chang, Jyu-Yu; Sun, Bo-Jhang; Liu, Yan-Wei

2010-06-01

This study presents one novel compensation pixel design and driving method for active matrix organic light-emitting diode (AMOLED) displays that use low-temperature polycrystalline silicon thin-film transistors (LTPS-TFTs) with a voltage feed-back method and the simulation results are proposed and verified by SPICE simulator. The measurement and simulation of LTPS TFT characteristics demonstrate the good fitting result. The proposed circuit consists of four TFTs and two capacitors with an additional signal line. The error rates of OLED anode voltage variation are below 0.3% under the threshold voltage deviation of driving TFT (ΔVTH = ±0.33 V). The simulation results show that the pixel design can improve the display image non-uniformity by compensating the threshold voltage deviation of driving TFT and the degradation of OLED threshold voltage at the same time.
Low Temperature Polycrystalline Silicon Thin Film Transistor Pixel Circuits for Active Matrix Organic Light Emitting Diodes

NASA Astrophysics Data System (ADS)

Fan, Ching-Lin; Lin, Yu-Sheng; Liu, Yan-Wei

A new pixel design and driving method for active matrix organic light emitting diode (AMOLED) displays that use low-temperature polycrystalline silicon thin-film transistors (LTPS-TFTs) with a voltage programming method are proposed and verified using the SPICE simulator. We had employed an appropriate TFT model in SPICE simulation to demonstrate the performance of the pixel circuit. The OLED anode voltage variation error rates are below 0.35% under driving TFT threshold voltage deviation (Δ Vth =± 0.33V). The OLED current non-uniformity caused by the OLED threshold voltage degradation (Δ VTO =+0.33V) is significantly reduced (below 6%). The simulation results show that the pixel design can improve the display image non-uniformity by compensating for the threshold voltage deviation in the driving TFT and the OLED threshold voltage degradation at the same time.
Electronic Circuit Analysis Language (ECAL)

NASA Astrophysics Data System (ADS)

Chenghang, C.

1983-03-01

The computer aided design technique is an important development in computer applications and it is an important component of computer science. The special language for electronic circuit analysis is the foundation of computer aided design or computer aided circuit analysis (abbreviated as CACD and CACA) of simulated circuits. Electronic circuit analysis language (ECAL) is a comparatively simple and easy to use circuit analysis special language which uses the FORTRAN language to carry out the explanatory executions. It is capable of conducting dc analysis, ac analysis, and transient analysis of a circuit. Futhermore, the results of the dc analysis can be used directly as the initial conditions for the ac and transient analyses.
Hardware implementation of an adaptive resonance theory (ART) neural network using compensated operational amplifiers

NASA Astrophysics Data System (ADS)

Ho, Ching S.; Liou, Juin J.; Georgiopoulos, Michael; Christodoulou, Christos G.

1994-03-01

This paper presents an analog circuit design and implementation for an adaptive resonance theory neural network architecture called the augmented ART1 neural network (AART1-NN). Practical monolithic operational amplifiers (Op-Amps) LM741 and LM318 are selected to implement the circuit, and a simple compensation scheme is developed to adjust the Op-Amp electrical characteristics to meet the design requirement. A 7-node prototype circuit has been designed and verified using the Pspice circuit simulator run on a Sun workstation. Results simulated from the AART1-NN circuit using the LM741, LM318, and ideal Op-Amps are presented and compared.
Modeling and Analysis of Power Processing Systems (MAPPS), initial phase 2

NASA Technical Reports Server (NTRS)

Yu, Y.; Lee, F. C.; Wangenheim, H.; Warren, D.

1977-01-01

The overall objective of the program is to provide the engineering tools to reduce the analysis, design, and development effort, and thus the cost, in achieving the required performances for switching regulators and dc-dc converter systems. The program was both tutorial and application oriented. Various analytical methods were described in detail and supplemented with examples, and those with standardization appeals were reduced into computer-based subprograms. Major program efforts included those concerning small and large signal control-dependent performance analysis and simulation, control circuit design, power circuit design and optimization, system configuration study, and system performance simulation. Techniques including discrete time domain, conventional frequency domain, Lagrange multiplier, nonlinear programming, and control design synthesis were employed in these efforts. To enhance interactive conversation between the modeling and analysis subprograms and the user, a working prototype of the Data Management Program was also developed to facilitate expansion as future subprogram capabilities increase.
Design of energy harvesting systems for harnessing vibrational motion from human and vehicular motion

NASA Astrophysics Data System (ADS)

Wickenheiser, Adam; Garcia, Ephrahim

2010-04-01

In much of the vibration-based energy harvesting literature, devices are modeled, designed, and tested for dissipating energy across a resistive load at a single base excitation frequency. This paper presents several practical scenarios germane to tracking, sensing, and wireless communication on humans and land vehicles. Measured vibrational data from these platforms are used to provide a time-varying, broadband input to the energy harvesting system. Optimal power considerations are given for several circuit topologies, including a passive rectifier circuit and active, switching methods. Under various size and mass constraints, the optimal design is presented for two scenarios: walking and idling a car. The frequency response functions are given alongside time histories of the power harvested using the experimental base accelerations recorded. The issues involved in designing an energy harvester for practical (i.e. timevarying, non-sinusoidal) applications are discussed.
Design and Experimental Results for the S407 Airfoil

DTIC Science & Technology

2010-08-01

reduced to the inverse problem of transforming the pressure distributions into an airfoil shape. The Eppler Airfoil Design and Analysis Code (refs. 3 and...Circuit Wind Tunnel. M. S. Thesis, Pennsylvania State Univ., 1993. 3. Eppler , Richard: Airfoil Design and Data. Springer-Verlag (Berlin), 1990. 4. Eppler ...Richard: Airfoil Program System “PROFIL07.” User’s Guide. Richard Eppler , c.2007. 5. Drela, M.: Design and Optimization Method for Multi-Element
SEU hardened memory cells for a CCSDS Reed Solomon encoder

DOE Office of Scientific and Technical Information (OSTI.GOV)

Whitaker, S.; Canaris, J.; Liu, K.

This paper reports on design technique to harden CMOS memory circuits against Single Event Upset (SEU) in the space environment. The design technique provides a recovery mechanism which is independent of the shape of the upsetting event. A RAM cell and Flip Flop design are presented to demonstrate the method. The Flip Flop was used in the control circuitry for a Reed Solomon encoder designed for the Space Station and Explorer platforms.
A spatially localized architecture for fast and modular DNA computing

NASA Astrophysics Data System (ADS)

Chatterjee, Gourab; Dalchau, Neil; Muscat, Richard A.; Phillips, Andrew; Seelig, Georg

2017-09-01

Cells use spatial constraints to control and accelerate the flow of information in enzyme cascades and signalling networks. Synthetic silicon-based circuitry similarly relies on spatial constraints to process information. Here, we show that spatial organization can be a similarly powerful design principle for overcoming limitations of speed and modularity in engineered molecular circuits. We create logic gates and signal transmission lines by spatially arranging reactive DNA hairpins on a DNA origami. Signal propagation is demonstrated across transmission lines of different lengths and orientations and logic gates are modularly combined into circuits that establish the universality of our approach. Because reactions preferentially occur between neighbours, identical DNA hairpins can be reused across circuits. Co-localization of circuit elements decreases computation time from hours to minutes compared to circuits with diffusible components. Detailed computational models enable predictive circuit design. We anticipate our approach will motivate using spatial constraints for future molecular control circuit designs.
Battery Cell By-Pass Circuit

NASA Technical Reports Server (NTRS)

Mumaw, Susan J. (Inventor); Evers, Jeffrey (Inventor); Craig, Calvin L., Jr. (Inventor); Walker, Stuart D. (Inventor)

2001-01-01

The invention is a circuit and method of limiting the charging current voltage from a power supply net work applied to an individual cell of a plurality of cells making up a battery being charged in series. It is particularly designed for use with batteries that can be damaged by overcharging, such as Lithium-ion type batteries. In detail. the method includes the following steps: 1) sensing the actual voltage level of the individual cell; 2) comparing the actual voltage level of the individual cell with a reference value and providing an error signal representative thereof; and 3) by-passing the charging current around individual cell necessary to keep the individual cell voltage level generally equal a specific voltage level while continuing to charge the remaining cells. Preferably this is accomplished by by-passing the charging current around the individual cell if said actual voltage level is above the specific voltage level and allowing the charging current to the individual cell if the actual voltage level is equal or less than the specific voltage level. In the step of bypassing the charging current, the by-passed current is transferred at a proper voltage level to the power supply. The by-pass circuit a voltage comparison circuit is used to compare the actual voltage level of the individual cell with a reference value and to provide an error signal representative thereof. A third circuit, designed to be responsive to the error signal, is provided for maintaining the individual cell voltage level generally equal to the specific voltage level. Circuitry is provided in the third circuit for bypassing charging current around the individual cell if the actual voltage level is above the specific voltage level and transfers the excess charging current to the power supply net work. The circuitry also allows charging of the individual cell if the actual voltage level is equal or less than the specific voltage level.
Body Bias usage in UTBB FDSOI designs: A parametric exploration approach

NASA Astrophysics Data System (ADS)

Puschini, Diego; Rodas, Jorge; Beigne, Edith; Altieri, Mauricio; Lesecq, Suzanne

2016-03-01

Some years ago, UTBB FDSOI has appeared in the horizon of low-power circuit designers. With the 14 nm and 10 nm nodes in the road-map, the industrialized 28 nm platform promises highly efficient designs with Ultra-Wide Voltage Range (UWVR) thanks to extended Body Bias properties. From the power management perspective, this new opportunity is considered as a new degree of freedom in addition to the classic Dynamic Voltage Scaling (DVS), increasing the complexity of the power optimization problem at design time. However, so far no formal or empiric tool allows to early evaluate the real need for a Dynamic Body Bias (DBB) mechanism on future designs. This paper presents a parametric exploration approach that analyzes the benefits of using Body Bias in 28 nm UTBB FDSOI circuits. The exploration is based on electrical simulations of a ring-oscillator structure. These experiences show that a Body Bias strategy is not always required but, they underline the large power reduction that can be achieved when mandatory. Results are summarized in order to help designers to analyze how to choose the best dynamic power management strategy for a given set of operating conditions in terms of temperature, circuit activity and process choice. This exploration contributes to the identification of conditions that make DBB more efficient than DVS, and vice versa, and when both methods are mandatory to optimize power consumption.
Design for low-power and reliable flexible electronics

NASA Astrophysics Data System (ADS)

Huang, Tsung-Ching (Jim)

Flexible electronics are emerging as an alternative to conventional Si electronics for large-area low-cost applications such as e-paper, smart sensors, and disposable RFID tags. By utilizing inexpensive manufacturing methods such as ink-jet printing and roll-to-roll imprinting, flexible electronics can be made on low-cost plastics just like printing a newspaper. However, the key elements of exible electronics, thin-film transistors (TFTs), have slower operating speeds and less reliability than their Si electronics counterparts. Furthermore, depending on the material property, TFTs are usually mono-type -- either p- or n-type -- devices. Making air-stable complementary TFT circuits is very challenging and not applicable to most TFT technologies. Existing design methodologies for Si electronics, therefore, cannot be directly applied to exible electronics. Other inhibiting factors such as high supply voltage, large process variation, and lack of trustworthy device modeling also make designing larger-scale and robust TFT circuits a significant challenge. The major goal of this dissertation is to provide a viable solution for robust circuit design in exible electronics. I will first introduce a reliability simulation framework that can predict the degraded TFT circuits' performance under bias-stress. This framework has been validated using the amorphous-silicon (a-Si) TFT scan driver for TFT-LCD displays. To reuse the existing CMOS design ow for exible electronics, I propose a Pseudo-CMOS cell library that can make TFT circuits operable under low supply voltage and which has post-fabrication tunability for reliability and performance enhancement. This cell library has been validated using 2V self-assembly-monolayer (SAM) organic TFTs with a low-cost shadow-mask deposition process. I will also demonstrate a 3-bit 1.25KS/s Flash ADC in a-Si TFTs, which is based on the proposed Pseudo-CMOS cell library, and explore more possibilities in display, energy, and sensing applications.
Engineering dynamical control of cell fate switching using synthetic phospho-regulons

PubMed Central

Gordley, Russell M.; Williams, Reid E.; Bashor, Caleb J.; Toettcher, Jared E.; Yan, Shude; Lim, Wendell A.

2016-01-01

Many cells can sense and respond to time-varying stimuli, selectively triggering changes in cell fate only in response to inputs of a particular duration or frequency. A common motif in dynamically controlled cells is a dual-timescale regulatory network: although long-term fate decisions are ultimately controlled by a slow-timescale switch (e.g., gene expression), input signals are first processed by a fast-timescale signaling layer, which is hypothesized to filter what dynamic information is efficiently relayed downstream. Directly testing the design principles of how dual-timescale circuits control dynamic sensing, however, has been challenging, because most synthetic biology methods have focused solely on rewiring transcriptional circuits, which operate at a single slow timescale. Here, we report the development of a modular approach for flexibly engineering phosphorylation circuits using designed phospho-regulon motifs. By then linking rapid phospho-feedback with slower downstream transcription-based bistable switches, we can construct synthetic dual-timescale circuits in yeast in which the triggering dynamics and the end-state properties of the ON state can be selectively tuned. These phospho-regulon tools thus open up the possibility to engineer cells with customized dynamical control. PMID:27821768
Rapid construction of insulated genetic circuits via synthetic sequence-guided isothermal assembly

DOE Office of Scientific and Technical Information (OSTI.GOV)

Torella, JP; Boehm, CR; Lienert, F

2013-12-28

In vitro recombination methods have enabled one-step construction of large DNA sequences from multiple parts. Although synthetic biological circuits can in principle be assembled in the same fashion, they typically contain repeated sequence elements such as standard promoters and terminators that interfere with homologous recombination. Here we use a computational approach to design synthetic, biologically inactive unique nucleotide sequences (UNSes) that facilitate accurate ordered assembly. Importantly, our designed UNSes make it possible to assemble parts with repeated terminator and insulator sequences, and thereby create insulated functional genetic circuits in bacteria and mammalian cells. Using UNS-guided assembly to construct repeating promoter-gene-terminatormore » parts, we systematically varied gene expression to optimize production of a deoxychromoviridans biosynthetic pathway in Escherichia coli. We then used this system to construct complex eukaryotic AND-logic gates for genomic integration into embryonic stem cells. Construction was performed by using a standardized series of UNS-bearing BioBrick-compatible vectors, which enable modular assembly and facilitate reuse of individual parts. UNS-guided isothermal assembly is broadly applicable to the construction and optimization of genetic circuits and particularly those requiring tight insulation, such as complex biosynthetic pathways, sensors, counters and logic gates.« less
The Art of Electronics - 2nd Edition

NASA Astrophysics Data System (ADS)

Horowitz, Paul; Hill, Winfield

1989-09-01

This is the thoroughly revised and updated second edition of the hugely successful The Art of Electronics. Widely accepted as the single authoritative text and reference on electronic circuit design, both analog and digital, the original edition sold over 125,000 copies worldwide and was translated into eight languages. The book revolutionized the teaching of electronics by emphasizing the methods actually used by citcuit designers - a combination of some basic laws, rules to thumb, and a large nonmathematical treatment that encourages circuit values and performance. The new Art of Electronics retains the feeling of informality and easy access that helped make the first edition so successful and popular. It is an ideal first textbook on electronics for scientists and engineers and an indispensable reference for anyone, professional or amateur, who works with electronic circuits. The best self-teaching book and reference book in electronics Simply indispensable, packed with essential information for all scientists and engineers who build electronic circuits Totally rewritten chapters on microcomputers and microprocessors The first edition of this book has sold over 100,000 copies in seven years, it has a market in virtually all research centres where electronics is important
Stainless Steel NaK-Cooled Circuit (SNaKC) Fabrication and Assembly

NASA Technical Reports Server (NTRS)

Godfroy, Thomas J.

2007-01-01

An actively pumped Stainless Steel NaK Circuit (SNaKC) has been designed and fabricated by the Early Flight Fission Test Facility (EFF-TF) team at NASA's Marshall Space Flight Center. This circuit uses the eutectic mixture of sodium and potassium (NaK) as the working fluid building upon the experience and accomplishments of the SNAP reactor program from the late 1960's The SNaKC enables valuable experience and liquid metal test capability to be gained toward the goal of designing and building an affordable surface power reactor. The basic circuit components include a simulated reactor core a NaK to gas heat exchanger, an electromagnetic (EM) liquid metal pump, a liquid metal flow meter, an expansion reservoir and a drain/fill reservoir To maintain an oxygen free environment in the presence of NaK, an argon system is utilized. A helium and nitrogen system are utilized for core, pump, and heat exchanger operation. An additional rest section is available to enable special component testing m an elevated temperature actively pumped liquid metal environment. This paper summarizes the physical build of the SNaKC the gas and pressurization systems, vacuum systems, as well as instrumentation and control methods.
Using crosscorrelation techniques to determine the impulse response of linear systems

NASA Technical Reports Server (NTRS)

Dallabetta, Michael J.; Li, Harry W.; Demuth, Howard B.

1993-01-01

A crosscorrelation method of measuring the impulse response of linear systems is presented. The technique, implementation, and limitations of this method are discussed. A simple system is designed and built using discrete components and the impulse response of a linear circuit is measured. Theoretical and software simulation results are presented.
Integrated Circuit Design of 3 Electrode Sensing System Using Two-Stage Operational Amplifier

NASA Astrophysics Data System (ADS)

Rani, S.; Abdullah, W. F. H.; Zain, Z. M.; N, Aqmar N. Z.

2018-03-01

This paper presents the design of a two-stage operational amplifier(op amp) for 3-electrode sensing system readout circuits. The designs have been simulated using 0.13μm CMOS technology from Silterra (Malaysia) with Mentor graphics tools. The purpose of this projects is mainly to design a miniature interfacing circuit to detect the redox reaction in the form of current using standard analog modules. The potentiostat consists of several op amps combined together in order to analyse the signal coming from the 3-electrode sensing system. This op amp design will be used in potentiostat circuit device and to analyse the functionality for each module of the system.

Design Space Toolbox V2: Automated Software Enabling a Novel Phenotype-Centric Modeling Strategy for Natural and Synthetic Biological Systems

PubMed Central

Lomnitz, Jason G.; Savageau, Michael A.

2016-01-01

Mathematical models of biochemical systems provide a means to elucidate the link between the genotype, environment, and phenotype. A subclass of mathematical models, known as mechanistic models, quantitatively describe the complex non-linear mechanisms that capture the intricate interactions between biochemical components. However, the study of mechanistic models is challenging because most are analytically intractable and involve large numbers of system parameters. Conventional methods to analyze them rely on local analyses about a nominal parameter set and they do not reveal the vast majority of potential phenotypes possible for a given system design. We have recently developed a new modeling approach that does not require estimated values for the parameters initially and inverts the typical steps of the conventional modeling strategy. Instead, this approach relies on architectural features of the model to identify the phenotypic repertoire and then predict values for the parameters that yield specific instances of the system that realize desired phenotypic characteristics. Here, we present a collection of software tools, the Design Space Toolbox V2 based on the System Design Space method, that automates (1) enumeration of the repertoire of model phenotypes, (2) prediction of values for the parameters for any model phenotype, and (3) analysis of model phenotypes through analytical and numerical methods. The result is an enabling technology that facilitates this radically new, phenotype-centric, modeling approach. We illustrate the power of these new tools by applying them to a synthetic gene circuit that can exhibit multi-stability. We then predict values for the system parameters such that the design exhibits 2, 3, and 4 stable steady states. In one example, inspection of the basins of attraction reveals that the circuit can count between three stable states by transient stimulation through one of two input channels: a positive channel that increases the count, and a negative channel that decreases the count. This example shows the power of these new automated methods to rapidly identify behaviors of interest and efficiently predict parameter values for their realization. These tools may be applied to understand complex natural circuitry and to aid in the rational design of synthetic circuits. PMID:27462346
Synergistic Synthetic Biology: Units in Concert

PubMed Central

Trosset, Jean-Yves; Carbonell, Pablo

2013-01-01

Synthetic biology aims at translating the methods and strategies from engineering into biology in order to streamline the design and construction of biological devices through standardized parts. Modular synthetic biology devices are designed by means of an adequate elimination of cross-talk that makes circuits orthogonal and specific. To that end, synthetic constructs need to be adequately optimized through in silico modeling by choosing the right complement of genetic parts and by experimental tuning through directed evolution and craftsmanship. In this review, we consider an additional and complementary tool available to the synthetic biologist for innovative design and successful construction of desired circuit functionalities: biological synergies. Synergy is a prevalent emergent property in biological systems that arises from the concerted action of multiple factors producing an amplification or cancelation effect compared with individual actions alone. Synergies appear in domains as diverse as those involved in chemical and protein activity, polypharmacology, and metabolic pathway complementarity. In conventional synthetic biology designs, synergistic cross-talk between parts and modules is generally attenuated in order to verify their orthogonality. Synergistic interactions, however, can induce emergent behavior that might prove useful for synthetic biology applications, like in functional circuit design, multi-drug treatment, or in sensing and delivery devices. Synergistic design principles are therefore complementary to those coming from orthogonal design and may provide added value to synthetic biology applications. The appropriate modeling, characterization, and design of synergies between biological parts and units will allow the discovery of yet unforeseeable, novel synthetic biology applications. PMID:25022769
Synergistic Synthetic Biology: Units in Concert.

PubMed

Trosset, Jean-Yves; Carbonell, Pablo

2013-01-01

Synthetic biology aims at translating the methods and strategies from engineering into biology in order to streamline the design and construction of biological devices through standardized parts. Modular synthetic biology devices are designed by means of an adequate elimination of cross-talk that makes circuits orthogonal and specific. To that end, synthetic constructs need to be adequately optimized through in silico modeling by choosing the right complement of genetic parts and by experimental tuning through directed evolution and craftsmanship. In this review, we consider an additional and complementary tool available to the synthetic biologist for innovative design and successful construction of desired circuit functionalities: biological synergies. Synergy is a prevalent emergent property in biological systems that arises from the concerted action of multiple factors producing an amplification or cancelation effect compared with individual actions alone. Synergies appear in domains as diverse as those involved in chemical and protein activity, polypharmacology, and metabolic pathway complementarity. In conventional synthetic biology designs, synergistic cross-talk between parts and modules is generally attenuated in order to verify their orthogonality. Synergistic interactions, however, can induce emergent behavior that might prove useful for synthetic biology applications, like in functional circuit design, multi-drug treatment, or in sensing and delivery devices. Synergistic design principles are therefore complementary to those coming from orthogonal design and may provide added value to synthetic biology applications. The appropriate modeling, characterization, and design of synergies between biological parts and units will allow the discovery of yet unforeseeable, novel synthetic biology applications.
Phase-lock-loop application for fiber optic receiver

NASA Astrophysics Data System (ADS)

Ruggles, Stephen L.; Wills, Robert W.

1991-02-01

Phase-locked loop circuits are frequently employed in communication systems. In recent years, digital phase-locked loop circuits were utilized in optical communications systems. In an optical transceiver system, the digital phase-locked loop circuit is connected to the output of the receiver to extract a clock signal from the received coded data (NRZ, Bi-Phase, or Manchester). The clock signal is then used to reconstruct or recover the original data from the coded data. A theoretical approach to the design of a digital phase-locked loop circuit operation at 1 and 50 MHz is described. Hardware implementation of a breadboard design to function at 1 MHz and a printed-circuit board designed to function at 50 MHz were assembled using emitter coupled logic (ECL) to verify experimentally the theoretical design.
Phase-lock-loop application for fiber optic receiver

NASA Technical Reports Server (NTRS)

Ruggles, Stephen L.; Wills, Robert W.

1991-01-01

Phase-locked loop circuits are frequently employed in communication systems. In recent years, digital phase-locked loop circuits were utilized in optical communications systems. In an optical transceiver system, the digital phase-locked loop circuit is connected to the output of the receiver to extract a clock signal from the received coded data (NRZ, Bi-Phase, or Manchester). The clock signal is then used to reconstruct or recover the original data from the coded data. A theoretical approach to the design of a digital phase-locked loop circuit operation at 1 and 50 MHz is described. Hardware implementation of a breadboard design to function at 1 MHz and a printed-circuit board designed to function at 50 MHz were assembled using emitter coupled logic (ECL) to verify experimentally the theoretical design.
The design of high dynamic range ROIC for IRFPAs

NASA Astrophysics Data System (ADS)

Jiang, Dazhao; Liang, Qinghua; Zhang, Qiwen; Chen, Honglei; Ding, Ruijun

2015-10-01

The charge packet readout integrated circuit (ROIC) technology for the IRFPAs is introduced, which can realize that every pixel achieves a very high capacity of the electrons storage, and it also improves the performance of the SNR and reduces the saturation possibility of the pixels. The ROIC for the LWIR requires ability that obtaining high capacity for storing electrons. For the conventional ROIC, the maximum charge capacity is determined by the integration capacitance and the operating voltage, it can achieve a high charge capacity through increasing the area of the integration capacitor or raising the operating voltage. And this paper would introduce a digital method of ROIC that can achieve a very high charge capacity. The circuit architecture of this approach includes the following parts, a preamplifier, a comparator, a counter, and memory arrays. And the maximum charge capacity of the pixel is determined by the counter bits. This new method can achieve a high charge capacity more than 1Ge- every pixel and output the digital signal directly, while that of conventional ROIC is less than 50Me- and output the analog signal from the pixel. In this new circuit, the comparator is a important module, as the integration voltage value need compare with threshold voltage through the comparator all the time during the integration period, and we will discuss the influence of the comparator. This work design the circuit with the CSMC 0.35um CMOS technology, and the simulation use the spectre model.
Artwork Interactive Design System (AIDS) program description

NASA Technical Reports Server (NTRS)

Johnson, B. T.; Taylor, J. F.

1976-01-01

An artwork interactive design system is described which provides the microelectronic circuit designer/engineer a tool to perform circuit design, automatic layout modification, standard cell design, and artwork verification at a graphics computer terminal using a graphics tablet at the designer/computer interface.
Investigation of short-circuit failure mechanisms of SiC MOSFETs by varying DC bus voltage

NASA Astrophysics Data System (ADS)

Namai, Masaki; An, Junjie; Yano, Hiroshi; Iwamuro, Noriyuki

2018-07-01

In this study, the experimental evaluation and numerical analysis of short-circuit mechanisms of 1200 V SiC planar and trench MOSFETs were conducted at various DC bus voltages from 400 to 800 V. Investigation of the impact of DC bus voltage on short-circuit capability yielded results that are extremely useful for many existing power electronics applications. Three failure mechanisms were identified in this study: thermal runaway, MOS channel current following device turn-off, and rupture of the gate oxide layer (gate oxide layer damage). The SiC MOSFETs experienced lattice temperatures exceeding 1000 K during the short-circuit transient; as Si insulated gate bipolar transistors (IGBTs) are not typically subject to such temperatures, the MOSFETs experienced distinct failure modes, and the mode experienced was significantly influenced by the DC bus voltage. In conclusion, suggestions regarding the SiC MOSFET design and operation methods that would enhance device robustness are proposed.
Direct Desktop Printed-Circuits-on-Paper Flexible Electronics

PubMed Central

Zheng, Yi; He, Zhizhu; Gao, Yunxia; Liu, Jing

2013-01-01

There currently lacks of a way to directly write out electronics, just like printing pictures on paper by an office printer. Here we show a desktop printing of flexible circuits on paper via developing liquid metal ink and related working mechanisms. Through modifying adhesion of the ink, overcoming its high surface tension by dispensing machine and designing a brush like porous pinhead for printing alloy and identifying matched substrate materials among different papers, the slightly oxidized alloy ink was demonstrated to be flexibly printed on coated paper, which could compose various functional electronics and the concept of Printed-Circuits-on-Paper was thus presented. Further, RTV silicone rubber was adopted as isolating inks and packaging material to guarantee the functional stability of the circuit, which suggests an approach for printing 3D hybrid electro-mechanical device. The present work paved the way for a low cost and easygoing method in directly printing paper electronics.
An Electromagnetically Actuated Vacuum Circuit Breaker Developed by Electromagnetic Analysis Coupled with Motion

NASA Astrophysics Data System (ADS)

Takeuchi, Toshie; Nakagawa, Takafumi; Tsukima, Mitsuru; Koyama, Kenichi; Tohya, Nobumoto; Yano, Tomotaka

A new electromagnetically actuated vacuum circuit breaker (VCB) has been designed and developed on the basis of the transient electromagnetic analysis coupled with motion. The VCB has three advanced bi-stable electromagnetic actuators, which control each phase independently. The VCB serves as a synchronous circuit breaker as well as a standard circuit breaker. In this work, the flux delay due to the eddy current is analytically formulated using the delay time constant of the actuator coil current, thereby leading to accurate driving behavior. With this analytical method, the electromagnetic mechanism for a 24kV rated VCB has been optimized; and as a result, the driving energy is reduced to one fifth of that of a conventional VCB employing spring mechanism, and the number of parts is significantly decreased. Therefore, the developed VCB becomes compact, highly reliable and highly durable.
Chemical Detection using Electrically Open Circuits having no Electrical Connections

NASA Technical Reports Server (NTRS)

Woodward, Stanley E.; Olgesby, Donald M.; Taylor, Bryant D.; Shams, Qamar A.

2008-01-01

This paper presents investigations to date on chemical detection using a recently developed method for designing, powering and interrogating sensors as electrically open circuits having no electrical connections. In lieu of having each sensor from a closed circuit with multiple electrically connected components, an electrically conductive geometric pattern that is powered using oscillating magnetic fields and capable of storing an electric field and a magnetic field without the need of a closed circuit or electrical connections is used. When electrically active, the patterns respond with their own magnetic field whose frequency, amplitude and bandwidth can be correlated with the magnitude of the physical quantities being measured. Preliminary experimental results of using two different detection approaches will be presented. In one method, a thin film of a reactant is deposited on the surface of the open-circuit sensor. Exposure to a specific targeted reactant shifts the resonant frequency of the sensor. In the second method, a coating of conductive material is placed on a thin non-conductive plastic sheet that is placed over the surface of the sensor. There is no physical contact between the sensor and the electrically conductive material. When the conductive material is exposed to a targeted reactant, a chemical reaction occurs that renders the material non-conductive. The change in the material s electrical resistance within the magnetic field of the sensor alters the sensor s response bandwidth and amplitude, allowing detection of the reaction without having the reactants in physical contact with the sensor.
DOE Office of Scientific and Technical Information (OSTI.GOV)

Ulmer, W

Purpose: During the past decade the quantization of coupled/forced electromagnetic circuits with or without Ohm’s resistance has gained the subject of some fundamental studies, since even problems of quantum electrodynamics can be solved in an elegant manner, e.g. the creation of quantized electromagnetic fields. In this communication, we shall use these principles to describe optimization procedures in the design of klystrons, synchrotron irradiation and high energy bremsstrahlung. Methods: The base is the Hamiltonian of an electromagnetic circuit and the extension to coupled circuits, which allow the study of symmetries and perturbed symmetries in a very apparent way (SU2, SU3, SU4).more » The introduction resistance and forced oscillators for the emission and absorption in such coupled systems provides characteristic resonance conditions, and atomic orbitals can be described by that. The extension to virtual orbitals leads to creation of bremsstrahlung, if the incident electron (velocity v nearly c) is described by a current, which is associated with its inductivitance and the virtual orbital to the charge distribution (capacitance). Coupled systems with forced oscillators can be used to amplify drastically the resonance frequencies to describe klystrons and synchrotron radiation. Results: The cross-section formula for bremsstrahlung given by the propagator method of Feynman can readily be derived. The design of klystrons and synchrotrons inclusive the radiation outcome can be described and optimized by the determination of the mutual magnetic couplings between the oscillators induced by the currents. Conclusions: The presented methods of quantization of circuits inclusive resistance provide rather a straightforward way to understand complex technical processes such as creation of bremsstrahlung or creation of radiation by klystrons and synchrotrons. They can either be used for optimization procedures and, last but not least, for pedagogical purposes with regard to a qualified understanding of radiation physics for students.« less
Analysis and optimization of hybrid excitation permanent magnet synchronous generator for stand-alone power system

NASA Astrophysics Data System (ADS)

Wang, Huijun; Qu, Zheng; Tang, Shaofei; Pang, Mingqi; Zhang, Mingju

2017-08-01

In this paper, electromagnetic design and permanent magnet shape optimization for permanent magnet synchronous generator with hybrid excitation are investigated. Based on generator structure and principle, design outline is presented for obtaining high efficiency and low voltage fluctuation. In order to realize rapid design, equivalent magnetic circuits for permanent magnet and iron poles are developed. At the same time, finite element analysis is employed. Furthermore, by means of design of experiment (DOE) method, permanent magnet is optimized to reduce voltage waveform distortion. Finally, the validity of proposed design methods is validated by the analytical and experimental results.
A study of microwave downcoverters operating in the K sub u band

NASA Technical Reports Server (NTRS)

Fellers, R. G.; Simpson, T. L.; Tseng, B.

1982-01-01

A computer program for parametric amplifier design is developed with special emphasis on practical design considerations for microwave integrated circuit degenerate amplifiers. Precision measurement techniques are developed to obtain a more realistic varactor equivalent circuit. The existing theory of a parametric amplifier is modified to include the equivalent circuit, and microwave properties, such as loss characteristics and circuit discontinuities are investigated.
Electronic circuits for communications systems: A compilation

NASA Technical Reports Server (NTRS)

1972-01-01

The compilation of electronic circuits for communications systems is divided into thirteen basic categories, each representing an area of circuit design and application. The compilation items are moderately complex and, as such, would appeal to the applications engineer. However, the rationale for the selection criteria was tailored so that the circuits would reflect fundamental design principles and applications, with an additional requirement for simplicity whenever possible.
Advances in genetic circuit design: novel biochemistries, deep part mining, and precision gene expression.

PubMed

Nielsen, Alec A K; Segall-Shapiro, Thomas H; Voigt, Christopher A

2013-12-01

Cells use regulatory networks to perform computational operations to respond to their environment. Reliably manipulating such networks would be valuable for many applications in biotechnology; for example, in having genes turn on only under a defined set of conditions or implementing dynamic or temporal control of expression. Still, building such synthetic regulatory circuits remains one of the most difficult challenges in genetic engineering and as a result they have not found widespread application. Here, we review recent advances that address the key challenges in the forward design of genetic circuits. First, we look at new design concepts, including the construction of layered digital and analog circuits, and new approaches to control circuit response functions. Second, we review recent work to apply part mining and computational design to expand the number of regulators that can be used together within one cell. Finally, we describe new approaches to obtain precise gene expression and to reduce context dependence that will accelerate circuit design by more reliably balancing regulators while reducing toxicity. Copyright © 2013. Published by Elsevier Ltd.
Simulative method for determining the optimal operating conditions for a cooling plate for lithium-ion battery cell modules

NASA Astrophysics Data System (ADS)

Smith, Joshua; Hinterberger, Michael; Hable, Peter; Koehler, Juergen

2014-12-01

Extended battery system lifetime and reduced costs are essential to the success of electric vehicles. An effective thermal management strategy is one method of enhancing system lifetime increasing vehicle range. Vehicle-typical space restrictions favor the minimization of battery thermal management system (BTMS) size and weight, making their production and subsequent vehicle integration extremely difficult and complex. Due to these space requirements, a cooling plate as part of a water-glycerol cooling circuit is commonly implemented. This paper presents a computational fluid dynamics (CFD) model and multi-objective analysis technique for determining the thermal effect of coolant flow rate and inlet temperature in a cooling plate-at a range of vehicle operating conditions-on a battery system, thereby providing a dynamic input for one-dimensional models. Traditionally, one-dimensional vehicular thermal management system models assume a static heat input from components such as a battery system: as a result, the components are designed for a set coolant input (flow rate and inlet temperature). Such a design method is insufficient for dynamic thermal management models and control strategies, thereby compromising system efficiency. The presented approach allows for optimal BMTS design and integration in the vehicular coolant circuit.
Construction of an easy-to-use CRISPR-Cas9 system by patching a newly designed EXIT circuit.

PubMed

Tang, Qiang; Lou, Chunbo; Liu, Shuang-Jiang

2017-01-01

Plasmid-borne genetic editing tools, including the widely used CRISPR-Cas9 system, have greatly facilitated bacterial programming to obtain novel functionalities. However, the lack of effective post-editing plasmid elimination methods impedes follow-up genetic manipulation or application. Conventional strategies including exposure to physical and chemical treatments, or exploiting temperature-sensitive replication origins have several drawbacks (e.g., they are limited for efficiency and are time-consuming). Therefore, the demand is apparent for easy and rapid elimination of the tool plasmids from their bacterial hosts after genetic manipulation. To bridge this gap, we designed a novel EXIT circuit with the homing endonuclease, which can be exploited for rapid and efficient elimination of various plasmids with diverse replication origins. As a proof of concept, we validated the EXIT circuit in Escherichia coli by harnessing homing endonuclease I- Sce I and its cleavage site. When integrated into multiple plasmids with different origins, the EXIT circuit allowed them to be eliminated from the host cells, simultaneously. By combining the widely used plasmid-borne CRISPR-Cas9 system and the EXIT circuit, we constructed an easy-to-use CRISPR-Cas9 system that eliminated the Cas9- and the single-guide RNA (sgRNA)-encoding plasmids in one-step. Within 3 days, we successfully constructed an atrazine-degrading E. coli strain, thus further demonstrating the advantage of this new CRISPR-Cas9 system for bacterial genome editing. Our novel EXIT circuit, which exploits the homing endonuclease I- Sce I, enables plasmid(s) with different replication origins to be eliminated from their host cells rapidly and efficiently. We also developed an easy-to-use CRISPR-Cas9 system with the EXIT circuit, and this new system can be widely applied to bacterial genome editing.
Fast 4-2 Compressor of Booth Multiplier Circuits for High-Speed RISC Processor

NASA Astrophysics Data System (ADS)

Yuan, S. C.

2008-11-01

We use different XOR circuits to optimize the XOR structure 4-2 compressor, and design the transmission gates(TG) 4-2 compressor use single to dual rail circuit configurations. The maximum propagation delay, the power consumption and the layout area of the designed 4-2 compressors are simulated with 0.35μm and 0.25μm CMOS process parameters and compared with results of the synthesized 4-2 circuits, and show that the designed 4-2 compressors are faster and area smaller than the synthesized one.
An Undergraduate Design Experience in Digital Logic Design Course of Special Purpose Arithmetic Logic Unit Using Multisim, Ultiboard and Print Circuit Board

ERIC Educational Resources Information Center

Al-Haija, Qasem Abu; Al-Amri, Hasan; Al-Nashri, Mohamed; Al-Muhaisen, Sultan

2013-01-01

Project-Based Curriculum (PBC) is considered one of the most powerful methods in the engineering education where each course or courses-cluster is assigned a design project which considers a series of inter-related concepts that have been shown theoretically for the students. Using this approach, the student will gain the required knowledge in an…

Multifunctional Logic Gate Controlled by Temperature

NASA Technical Reports Server (NTRS)

Stoica, Adrian; Zebulum, Ricardo

2005-01-01

A complementary metal oxide/semiconductor (CMOS) electronic circuit has been designed to function as a NAND gate at a temperature between 0 and 80 deg C and as a NOR gate at temperatures from 120 to 200 C. In the intermediate temperature range of 80 to 120 C, this circuit is expected to perform a function intermediate between NAND and NOR with degraded noise margin. The process of designing the circuit and the planned fabrication and testing of the circuit are parts of demonstration of polymorphic electronics a technological discipline that emphasizes designing the same circuit to perform different analog and/or digital functions under different conditions. In this case, the different conditions are different temperatures.
Design and Hardware Implementation of a New Chaotic Secure Communication Technique

PubMed Central

Xiong, Li; Lu, Yan-Jun; Zhang, Yong-Fang; Zhang, Xin-Guo; Gupta, Parag

2016-01-01

In this paper, a scheme for chaotic modulation secure communication is proposed based on chaotic synchronization of an improved Lorenz system. For the first time, the intensity limit and stability of the transmitted signal, the characteristics of broadband and the requirements for accuracy of electronic components are presented by Multisim simulation. In addition, some improvements are made on the measurement method and the proposed experimental circuit in order to facilitate the experiments of chaotic synchronization, chaotic non-synchronization, experiment without signal and experiment with signal. To illustrate the effectiveness of the proposed scheme, some numerical simulations are presented. Then, the proposed chaotic secure communication circuit is implemented through analog electronic circuit, which is characterized by its high accuracy and good robustness. PMID:27548385
Design and Hardware Implementation of a New Chaotic Secure Communication Technique.

PubMed

Xiong, Li; Lu, Yan-Jun; Zhang, Yong-Fang; Zhang, Xin-Guo; Gupta, Parag

2016-01-01

In this paper, a scheme for chaotic modulation secure communication is proposed based on chaotic synchronization of an improved Lorenz system. For the first time, the intensity limit and stability of the transmitted signal, the characteristics of broadband and the requirements for accuracy of electronic components are presented by Multisim simulation. In addition, some improvements are made on the measurement method and the proposed experimental circuit in order to facilitate the experiments of chaotic synchronization, chaotic non-synchronization, experiment without signal and experiment with signal. To illustrate the effectiveness of the proposed scheme, some numerical simulations are presented. Then, the proposed chaotic secure communication circuit is implemented through analog electronic circuit, which is characterized by its high accuracy and good robustness.
Computation of magnetic suspension of maglev systems using dynamic circuit theory

NASA Technical Reports Server (NTRS)

He, J. L.; Rote, D. M.; Coffey, H. T.

1992-01-01

Dynamic circuit theory is applied to several magnetic suspensions associated with maglev systems. These suspension systems are the loop-shaped coil guideway, the figure-eight-shaped null-flux coil guideway, and the continuous sheet guideway. Mathematical models, which can be used for the development of computer codes, are provided for each of these suspension systems. The differences and similarities of the models in using dynamic circuit theory are discussed in the paper. The paper emphasizes the transient and dynamic analysis and computer simulation of maglev systems. In general, the method discussed here can be applied to many electrodynamic suspension system design concepts. It is also suited for the computation of the performance of maglev propulsion systems. Numerical examples are presented in the paper.
A novel instrumentation circuit for electrochemical measurements.

PubMed

Yin, Li-Te; Wang, Hung-Yu; Lin, Yang-Chiuan; Huang, Wen-Chung

2012-01-01

In this paper, a novel signal processing circuit which can be used for the measurement of H(+) ion and urea concentration is presented. A potentiometric method is used to detect the concentrations of H(+) ions and urea by using H(+) ion-selective electrodes and urea electrodes, respectively. The experimental data shows that this measuring structure has a linear pH response for the concentration range within pH 2 and 12, and the dynamic range for urea concentration measurement is in the range of 0.25 to 64 mg/dL. The designed instrumentation circuit possesses a calibration function and it can be applied to different sensing electrodes for electrochemical analysis. It possesses the advantageous properties of being multi-purpose, easy calibration and low cost.
Design, Modeling, and Fabrication of Chemical Vapor Deposition Grown MoS2 Circuits with E-Mode FETs for Large-Area Electronics.

PubMed

Yu, Lili; El-Damak, Dina; Radhakrishna, Ujwal; Ling, Xi; Zubair, Ahmad; Lin, Yuxuan; Zhang, Yuhao; Chuang, Meng-Hsi; Lee, Yi-Hsien; Antoniadis, Dimitri; Kong, Jing; Chandrakasan, Anantha; Palacios, Tomas

2016-10-12

Two-dimensional electronics based on single-layer (SL) MoS 2 offers significant advantages for realizing large-scale flexible systems owing to its ultrathin nature, good transport properties, and stable crystalline structure. In this work, we utilize a gate first process technology for the fabrication of highly uniform enhancement mode FETs with large mobility and excellent subthreshold swing. To enable large-scale MoS 2 circuit, we also develop Verilog-A compact models that accurately predict the performance of the fabricated MoS 2 FETs as well as a parametrized layout cell for the FET to facilitate the design and layout process using computer-aided design (CAD) tools. Using this CAD flow, we designed combinational logic gates and sequential circuits (AND, OR, NAND, NOR, XNOR, latch, edge-triggered register) as well as switched capacitor dc-dc converter, which were then fabricated using the proposed flow showing excellent performance. The fabricated integrated circuits constitute the basis of a standard cell digital library that is crucial for electronic circuit design using hardware description languages. The proposed design flow provides a platform for the co-optimization of the device fabrication technology and circuits design for future ubiquitous flexible and transparent electronics using two-dimensional materials.
Analog design optimization methodology for ultralow-power circuits using intuitive inversion-level and saturation-level parameters

NASA Astrophysics Data System (ADS)

Eimori, Takahisa; Anami, Kenji; Yoshimatsu, Norifumi; Hasebe, Tetsuya; Murakami, Kazuaki

2014-01-01

A comprehensive design optimization methodology using intuitive nondimensional parameters of inversion-level and saturation-level is proposed, especially for ultralow-power, low-voltage, and high-performance analog circuits with mixed strong, moderate, and weak inversion metal-oxide-semiconductor transistor (MOST) operations. This methodology is based on the synthesized charge-based MOST model composed of Enz-Krummenacher-Vittoz (EKV) basic concepts and advanced-compact-model (ACM) physics-based equations. The key concept of this methodology is that all circuit and system characteristics are described as some multivariate functions of inversion-level parameters, where the inversion level is used as an independent variable representative of each MOST. The analog circuit design starts from the first step of inversion-level design using universal characteristics expressed by circuit currents and inversion-level parameters without process-dependent parameters, followed by the second step of foundry-process-dependent design and the last step of verification using saturation-level criteria. This methodology also paves the way to an intuitive and comprehensive design approach for many kinds of analog circuit specifications by optimization using inversion-level log-scale diagrams and saturation-level criteria. In this paper, we introduce an example of our design methodology for a two-stage Miller amplifier.
Variability-aware double-patterning layout optimization for analog circuits

NASA Astrophysics Data System (ADS)

Li, Yongfu; Perez, Valerio; Tripathi, Vikas; Lee, Zhao Chuan; Tseng, I.-Lun; Ong, Jonathan Yoong Seang

2018-03-01

The semiconductor industry has adopted multi-patterning techniques to manage the delay in the extreme ultraviolet lithography technology. During the design process of double-patterning lithography layout masks, two polygons are assigned to different masks if their spacing is less than the minimum printable spacing. With these additional design constraints, it is very difficult to find experienced layout-design engineers who have a good understanding of the circuit to manually optimize the mask layers in order to minimize color-induced circuit variations. In this work, we investigate the impact of double-patterning lithography on analog circuits and provide quantitative analysis for our designers to select the optimal mask to minimize the circuit's mismatch. To overcome the problem and improve the turn-around time, we proposed our smart "anchoring" placement technique to optimize mask decomposition for analog circuits. We have developed a software prototype that is capable of providing anchoring markers in the layout, allowing industry standard tools to perform automated color decomposition process.
A miniature microcontroller curve tracing circuit for space flight testing transistors.

PubMed

Prokop, N; Greer, L; Krasowski, M; Flatico, J; Spina, D

2015-02-01

This paper describes a novel miniature microcontroller based curve tracing circuit, which was designed to monitor the environmental effects on Silicon Carbide Junction Field Effect Transistor (SiC JFET) device performance, while exposed to the low earth orbit environment onboard the International Space Station (ISS) as a resident experiment on the 7th Materials on the International Space Station Experiment (MISSE7). Specifically, the microcontroller circuit was designed to operate autonomously and was flown on the external structure of the ISS for over a year. This curve tracing circuit is capable of measuring current vs. voltage (I-V) characteristics of transistors and diodes. The circuit is current limited for low current devices and is specifically designed to test high temperature, high drain-to-source resistance SiC JFETs. The results of each I-V data set are transmitted serially to an external telemetered communication interface. This paper discusses the circuit architecture, its design, and presents example results.
DOE Office of Scientific and Technical Information (OSTI.GOV)

Marchisio, Mario Andrea, E-mail: marchisio@hit.edu.cn

Published in 2008, Parts & Pools represents one of the first attempts to conceptualize the modular design of bacterial synthetic gene circuits with Standard Biological Parts (DNA segments) and Pools of molecules referred to as common signal carriers (e.g., RNA polymerases and ribosomes). The original framework for modeling bacterial components and designing prokaryotic circuits evolved over the last years and brought, first, to the development of an algorithm for the automatic design of Boolean gene circuits. This is a remarkable achievement since gene digital circuits have a broad range of applications that goes from biosensors for health and environment caremore » to computational devices. More recently, Parts & Pools was enabled to give a proper formal description of eukaryotic biological circuit components. This was possible by employing a rule-based modeling approach, a technique that permits a faithful calculation of all the species and reactions involved in complex systems such as eukaryotic cells and compartments. In this way, Parts & Pools is currently suitable for the visual and modular design of synthetic gene circuits in yeast and mammalian cells too.« less
Research of vibration control based on current mode piezoelectric shunt damping circuit

NASA Astrophysics Data System (ADS)

Liu, Weiwei; Mao, Qibo

2017-12-01

The piezoelectric shunt damping circuit using current mode approach is imposed to control the vibration of a cantilever beam. Firstly, the simulated inductance with large values are designed for the corresponding RL series shunt circuits. Moreover, with an example of cantilever beam, the second natural frequency of the beam is targeted to control for experiment. By adjusting the values of the equivalent inductance and equivalent resistance of the shunt circuit, the optimal damping of the shunt circuit is obtained. Meanwhile, the designed piezoelectric shunt damping circuit stability is experimental verified. Experimental results show that the proposed piezoelectric shunt damping circuit based on current mode circuit has good vibration control performance. However, the control performance will be reduced if equivalent inductance and equivalent resistance values deviate from optimal values.
Design of 2.5 GHz broad bandwidth microwave bandpass filter at operating frequency of 10 GHz using HFSS

NASA Astrophysics Data System (ADS)

Jasim, S. E.; Jusoh, M. A.; Mahmud, S. N. S.; Zamani, A. H.

2018-04-01

Development of low losses, small size and broad bandwidth microwave bandpass filter operating at higher frequencies is an active area of research. This paper presents a new route used to design and simulate microwave bandpass filter using finite element modelling and realized broad bandwidth, low losses, small dimension microwave bandpass filter operating at 10 GHz frequency using return loss method. The filter circuit has been carried out using Computer Aid Design (CAD), Ansoft HFSS software and designed with four parallel couple line model and small dimension (10 × 10 mm2) using LaAlO3 substrate. The response of the microwave filter circuit showed high return loss -50 dB at operating frequency at 10.4 GHz and broad bandwidth of 2.5 GHz from 9.5 to 12 GHz. The results indicate the filter design and simulation using HFSS is reliable and have the opportunity to transfer from lab potential experiments to the industry.
Nano-engineered Multiwall Carbon Nanotube-copper Composite Thermal Interface Material for Efficient Heat Conduction

NASA Technical Reports Server (NTRS)

Ngo, Quoc; Cruden, Brett A.; Cassell, Alan M.; Sims, Gerard; Li, Jun; Meyyappa, M.; Yang, Cary Y.

2005-01-01

Efforts in integrated circuit (IC) packaging technologies have recently been focused on management of increasing heat density associated with high frequency and high density circuit designs. While current flip-chip package designs can accommodate relatively high amounts of heat density, new materials need to be developed to manage thermal effects of next-generation integrated circuits. Multiwall carbon nanotubes (MWNT) have been shown to significantly enhance thermal conduction in the axial direction and thus can be considered to be a candidate for future thermal interface materials by facilitating efficient thermal transport. This work focuses on fabrication and characterization of a robust MWNT-copper composite material as an element in IC package designs. We show that using vertically aligned MWNT arrays reduces interfacial thermal resistance by increasing conduction surface area, and furthermore, the embedded copper acts as a lateral heat spreader to efficiently disperse heat, a necessary function for packaging materials. In addition, we demonstrate reusability of the material, and the absence of residue on the contacting material, both novel features of the MWNT-copper composite that are not found in most state-of-the-art thermal interface materials. Electrochemical methods such as metal deposition and etch are discussed for the creation of the MWNT-Cu composite, detailing issues and observations with using such methods. We show that precise engineering of the composite surface affects the ability of this material to act as an efficient thermal interface material. A thermal contact resistance measurement has been designed to obtain a value of thermal contact resistance for a variety of different thermal contact materials.
System Guidelines for EMC Safety-Critical Circuits: Design, Selection, and Margin Demonstration

NASA Technical Reports Server (NTRS)

Lawton, R. M.

1996-01-01

Demonstration of required safety margins on critical electrical/electronic circuits in large complex systems has become an implementation and cost problem. These margins are the difference between the activation level of the circuit and the electrical noise on the circuit in the actual operating environment. This document discusses the origin of the requirement and gives a detailed process flow for the identification of the system electromagnetic compatibility (EMC) critical circuit list. The process flow discusses the roles of engineering disciplines such as systems engineering, safety, and EMC. Design and analysis guidelines are provided to assist the designer in assuring the system design has a high probability of meeting the margin requirements. Examples of approaches used on actual programs (Skylab and Space Shuttle Solid Rocket Booster) are provided to show how variations of the approach can be used successfully.
Design and analysis of an automatic method of measuring silicon-controlled-rectifier holding current

NASA Technical Reports Server (NTRS)

Maslowski, E. A.

1971-01-01

The design of an automated SCR holding-current measurement system is described. The circuits used in the measurement system were designed to meet the major requirements of automatic data acquisition, reliability, and repeatability. Performance data are presented and compared with calibration data. The data verified the accuracy of the measurement system. Data taken over a 48-hr period showed that the measurement system operated satisfactorily and met all the design requirements.
Methods for the design and analysis of power optimized finite-state machines using clock gating

NASA Astrophysics Data System (ADS)

Chodorowski, Piotr

2017-11-01

The paper discusses two methods of design of power optimized FSMs. Both methods use clock gating techniques. The main objective of the research was to write a program capable of generating automatic hardware description of finite-state machines in VHDL and testbenches to help power analysis. The creation of relevant output files is detailed step by step. The program was tested using the LGSynth91 FSM benchmark package. An analysis of the generated circuits shows that the second method presented in this paper leads to significant reduction of power consumption.
Flexible Packaging by Film-Assisted Molding for Microintegration of Inertia Sensors

PubMed Central

Hera, Daniel; Berndt, Armin; Günther, Thomas; Schmiel, Stephan; Harendt, Christine; Zimmermann, André

2017-01-01

Packaging represents an important part in the microintegration of sensors based on microelectromechanical system (MEMS). Besides miniaturization and integration density, functionality and reliability in combination with flexibility in packaging design at moderate costs and consequently high-mix, low-volume production are the main requirements for future solutions in packaging. This study investigates possibilities employing printed circuit board (PCB-)based assemblies to provide high flexibility for circuit designs together with film-assisted transfer molding (FAM) to package sensors. The feasibility of FAM in combination with PCB and MEMS as a packaging technology for highly sensitive inertia sensors is being demonstrated. The results prove the technology to be a viable method for damage-free packaging of stress- and pressure-sensitive MEMS. PMID:28653992
Effect of design variables on irreversible magnet demagnetization in brushless dc motor

NASA Astrophysics Data System (ADS)

Kim, Tae Heoung; Lee, Ju

2005-05-01

The large demagnetizing currents in brushless dc (BLdc) motor are generated by the short-circuited stator windings and the fault of a drive circuit. So, irreversible magnet demagnetization occurs due to the external demagnetizing field by these currents. In this paper, we deal with the effect of design variables on irreversible magnet demagnetization in BLdc motor through the modeling approach using a two-dimensional finite-element method (2D FEM). The nonlinear analysis of a permanent magnet is added to 2D FEM to consider irreversible demagnetization. As a result, it is shown that magnet thickness, teeth surface width, and rotor back yoke thickness are the most important geometrical dimensions of BLdc motor in terms of irreversible magnet demagnetization.
A Method to have Multi-Layer Thermal Insulation Provide Damage Detection

NASA Technical Reports Server (NTRS)

Woodward, Stanley E.; Taylor, Bryant D.; Jones, Thomas W.; Shams, Qamar A.; Lyons, Frankel; Henderson, Donald

2007-01-01

Design and testing of a multi-layer thermal insulation system that also provides debris and micrometeorite damage detection is presented. One layer of the insulation is designed as an array of passive open-circuit electrically conductive spiral trace sensors. The sensors are a new class of sensors that are electrically open-circuits that have no electrical connections thereby eliminating one cause of failure to circuits. The sensors are powered using external oscillating magnetic fields. Once electrically active, they produce their own harmonic magnetic fields. The responding field frequency changes if any sensor is damaged. When the sensors are used together in close proximity, the inductive coupling between sensors provides a means of telemetry. The spiral trace design using reflective electrically conductive material provides sufficient area coverage for the sensor array to serves as a layer of thermal insulation. The other insulation layers are designed to allow the sensor s magnetic field to permeate the insulation layers while having total reflective surface area to reduce thermal energy transfer. Results of characterizing individual sensors and the sensor array s response to punctures are presented. Results of hypervelocity impact testing using projectiles of 1-3.6 millimeter diameter having speeds ranging from 6.7-7.1 kilometers per second are also presented.
Design of magnetic Circuit Simulation for Curing Device of Anisotropic MRE

NASA Astrophysics Data System (ADS)

Hapipi, N.; Ubaidillah; Mazlan, S. A.; Widodo, P. J.

2018-03-01

The strength of magnetic field during fabrication of magnetorheological elastomer (MRE) plays a crucial role in order to form a pre-structured MRE. So far, gaussmeter were used to determine the magnetic intensity subjected to the MRE during curing. However, the magnetic flux reading through that measurement considered less accurate. Therefore, a simulation should be done to figure out the magnetic flux concentration around the sample. This paper investigates the simulation of magnetic field distribution in a curing device used during curing stage of anisotropic magnetorheological elastomer (MRE). The target in designing the magnetic circuit is to ensure a sufficient and uniform magnetic field to all the MRE surfaces during the curing process. The magnetic circuit design for the curing device was performed using Finite Element Method Magnetic (FEMM) to examine the magnetic flux density distribution in the device. The material selection was first done instantaneously during a magnetic simulation process. Then, the experimental validation of simulation was performed by measuring and comparing the actual flux generated within the specimen type and the one from the FEMM simulation. İt apparent that the data from FEMM simulation shows an agreement with the actual measurement. Furthermore, the FEMM results showed that the magnetic design is able to provide sufficient and uniform magnetic field all over the surfaces of the MRE.

Monolithic circuits for barium fluoride detectors used in nuclear physics experiments. CRADA final report

DOE Office of Scientific and Technical Information (OSTI.GOV)

Varner, R.L.; Blankenship, J.L.; Beene, J.R.

1998-02-01

Custom monolithic electronic circuits have been developed recently for large detector applications in high energy physics where subsystems require tens of thousands of channels of signal processing and data acquisition. In the design and construction of these enormous detectors, it has been found that monolithic circuits offer significant advantages over discrete implementations through increased performance, flexible packaging, lower power and reduced cost per channel. Much of the integrated circuit design for the high energy physics community is directly applicable to intermediate energy heavy-ion and electron physics. This STTR project conducted in collaboration with researchers at the Holifield Radioactive Ion Beammore » Facility (HRIBF) at Oak Ridge National Laboratory, sought to develop a new integrated circuit chip set for barium fluoride (BaF{sub 2}) detector arrays based upon existing CMOS monolithic circuit designs created for the high energy physics experiments. The work under the STTR Phase 1 demonstrated through the design, simulation, and testing of several prototype chips the feasibility of using custom CMOS integrated circuits for processing signals from BaF{sub 2} detectors. Function blocks including charge-sensitive amplifiers, comparators, one shots, time-to-amplitude converters, analog memory circuits and buffer amplifiers were implemented during Phase 1 effort. Experimental results from bench testing and laboratory testing with sources were documented.« less
Advanced Numerical Methods for Simulating Nonlinear Multirate Lumped Parameter Models

DTIC Science & Technology

1991-05-01

defining a Waveform: typedef struct Waveform char *name; /* character string of the name of the variable */ double tn; /* time of the beginning of the...A State-Space Approach, Reprinted from Proc. Third Ann. Allerton Conf. Circuits and Systems Thoery , 659-668, in Computer-Aided Circuit Design...kg/n 3) 1025.9 kg/m3 @ 15* C. v Kinematic Viscosity of Water (m2/sec) 1.19x10-6 m2/sec @ 15* C. G Acceleration of Gravity (m/sec2) 9.80665 m/sec 2 L
[Smart therapeutics based on synthetic gene circuits].

PubMed

Peng, Shuguang; Xie, Zhen

2017-03-25

Synthetic biology has an important impact on biology research since its birth. Applying the thought and methods that reference from electrical engineering, synthetic biology uncovers many regulatory mechanisms of life systems, transforms and expands a series of biological components. Therefore, it brings a wide range of biomedical applications, including providing new ideas for disease diagnosis and treatment. This review describes the latest advances in the field of disease diagnosis and therapy based on mammalian cell or bacterial synthetic gene circuits, and provides new ideas for future smart therapy design.
IEEE 1990 International Symposium on Electromagnetic Compatibility, Washington, DC, Aug. 21-23, 1990, Record

NASA Astrophysics Data System (ADS)

The present conference discusses topics in EM shielding effectiveness, system-level EMC, EMP effects, circuit-level EMI testing, EMI control, analysis techniques for system-level EMC, EMP protective measures, EMI test methods, electrostatic-discharge testing, printed circuit-board design for EMC, and EM environment effects. Also discussed are EMI measurement procedures, EM spectrum-management issues for the 21st century, antenna and propagation effects on EMI testing, EMI control in cables, socioeconomic aspects of EMC, systemwide EMI controls, and EM radiation and coupling.
Fluid Power Multi-actuator Circuit Board with Microcomputer Control Option.

ERIC Educational Resources Information Center

McKechnie, R. E.; Vickers, G. W.

1981-01-01

Describes a portable fluid power engineering laboratory and class demonstration apparatus designed to enable students to design, build, and test multi-actuator circuits. Features a variety of standard pneumatic values and actuators fitted with quick disconnect couplings. Discusses sequencing circuit boards, microcomputer control, cost, and…
14 CFR 29.1357 - Circuit protective devices.

Code of Federal Regulations, 2013 CFR

2013-01-01

... devices in the generating system must be designed to de-energize and disconnect faulty power sources and power transmission equipment from their associated buses with sufficient rapidity to provide protection... be designed so that, when an overload or circuit fault exists, it will open the circuit regardless of...
14 CFR 29.1357 - Circuit protective devices.

Code of Federal Regulations, 2014 CFR

2014-01-01

... devices in the generating system must be designed to de-energize and disconnect faulty power sources and power transmission equipment from their associated buses with sufficient rapidity to provide protection... be designed so that, when an overload or circuit fault exists, it will open the circuit regardless of...
14 CFR 29.1357 - Circuit protective devices.

Code of Federal Regulations, 2011 CFR

2011-01-01

... devices in the generating system must be designed to de-energize and disconnect faulty power sources and power transmission equipment from their associated buses with sufficient rapidity to provide protection... be designed so that, when an overload or circuit fault exists, it will open the circuit regardless of...
14 CFR 29.1357 - Circuit protective devices.

Code of Federal Regulations, 2012 CFR

2012-01-01

... devices in the generating system must be designed to de-energize and disconnect faulty power sources and power transmission equipment from their associated buses with sufficient rapidity to provide protection... be designed so that, when an overload or circuit fault exists, it will open the circuit regardless of...
Propagation of eigenmodes and transfer functions in waveguide WDM structures

NASA Astrophysics Data System (ADS)

Mashkov, Vladimir A.; Francoeur, S.; Geuss, U.; Neiser, K.; Temkin, Henryk

1998-02-01

A method of propagation functions and transfer amplitudes suitable for the design of integrated optical circuits is presented. The method is based on vectorial formulation of electrodynamics: the distributions and propagation of electromagnetic fields in optical circuits is described by equivalent surface sources. This approach permits a division of complex optical waveguide structures into sets of primitive blocks and to separately calculate the transfer function and the transfer amplitude for each block. The transfer amplitude of the entire optical system is represented by a convolution of transfer amplitudes of its primitive blocks. The eigenvalues and eigenfunctions of arbitrary waveguide structure are obtained in the WKB approximation and compared with other methods. The general approach is illustrated with the transfer amplitude calculations for Dragone's star coupler and router.
Design and Analysis of Broad-Band Fixed-Tuned Submillimeter-Waveguide Multipliers using MMIC Style Circuit Topology

NASA Technical Reports Server (NTRS)

Bruston, J.; Kim, M.; Martin, S. C.; Mehdi, I.; Smith, R. P.; Siegel, P. H.

1996-01-01

The design and analysis of varactor diode doubler, quadrupler and cascaded doubler circuits for 320 and 640 GHz have been completed. A new approach has been employed to produce a tunerless waveguide mount with a very flexible, frequency scaleable, MMIC style multiplier circuit. The concept, design, predicted performance and measurements on some of the constituent mount elements are presented.
Design of high precision temperature control system for TO packaged LD

NASA Astrophysics Data System (ADS)

Liang, Enji; Luo, Baoke; Zhuang, Bin; He, Zhengquan

2017-10-01

Temperature is an important factor affecting the performance of TO package LD. In order to ensure the safe and stable operation of LD, a temperature control circuit for LD based on PID technology is designed. The MAX1978 and an external PID circuit are used to form a control circuit that drives the thermoelectric cooler (TEC) to achieve control of temperature and the external load can be changed. The system circuit has low power consumption, high integration and high precision,and the circuit can achieve precise control of the LD temperature. Experiment results show that the circuit can achieve effective and stable control of the laser temperature.
A programming language for composable DNA circuits

PubMed Central

Phillips, Andrew; Cardelli, Luca

2009-01-01

Recently, a range of information-processing circuits have been implemented in DNA by using strand displacement as their main computational mechanism. Examples include digital logic circuits and catalytic signal amplification circuits that function as efficient molecular detectors. As new paradigms for DNA computation emerge, the development of corresponding languages and tools for these paradigms will help to facilitate the design of DNA circuits and their automatic compilation to nucleotide sequences. We present a programming language for designing and simulating DNA circuits in which strand displacement is the main computational mechanism. The language includes basic elements of sequence domains, toeholds and branch migration, and assumes that strands do not possess any secondary structure. The language is used to model and simulate a variety of circuits, including an entropy-driven catalytic gate, a simple gate motif for synthesizing large-scale circuits and a scheme for implementing an arbitrary system of chemical reactions. The language is a first step towards the design of modelling and simulation tools for DNA strand displacement, which complements the emergence of novel implementation strategies for DNA computing. PMID:19535415
A programming language for composable DNA circuits.

PubMed

Phillips, Andrew; Cardelli, Luca

2009-08-06

Recently, a range of information-processing circuits have been implemented in DNA by using strand displacement as their main computational mechanism. Examples include digital logic circuits and catalytic signal amplification circuits that function as efficient molecular detectors. As new paradigms for DNA computation emerge, the development of corresponding languages and tools for these paradigms will help to facilitate the design of DNA circuits and their automatic compilation to nucleotide sequences. We present a programming language for designing and simulating DNA circuits in which strand displacement is the main computational mechanism. The language includes basic elements of sequence domains, toeholds and branch migration, and assumes that strands do not possess any secondary structure. The language is used to model and simulate a variety of circuits, including an entropy-driven catalytic gate, a simple gate motif for synthesizing large-scale circuits and a scheme for implementing an arbitrary system of chemical reactions. The language is a first step towards the design of modelling and simulation tools for DNA strand displacement, which complements the emergence of novel implementation strategies for DNA computing.
Design and characterization of a 20 Gbit/s clock recovery circuit

NASA Astrophysics Data System (ADS)

Monteiro, Paulo M.; Matos, J. N.; Gameiro, Atilio M. S.; da Rocha, Jose F.

1995-02-01

In this communication we report the design of a clock recovery circuit produced for the 20 Gbit/s demonstrator of the RACE 2011 project `TRAVEL' of the European Community. The clock recovery circuit is based on an open loop structure using a dielectric resonator narrow bandpass filter with a high quality factor. A detailed electrical characterization of the circuit and also its sensitivity to temperature and detuning variations are presented. The experimental results show that the circuit is a very attractive solution for the forthcoming STM-128 optical links.
Four-terminal circuit element with photonic core

DOE Office of Scientific and Technical Information (OSTI.GOV)

Sampayan, Stephen

A four-terminal circuit element is described that includes a photonic core inside of the circuit element that uses a wide bandgap semiconductor material that exhibits photoconductivity and allows current flow through the material in response to the light that is incident on the wide bandgap material. The four-terminal circuit element can be configured based on various hardware structures using a single piece or multiple pieces or layers of a wide bandgap semiconductor material to achieve various designed electrical properties such as high switching voltages by using the photoconductive feature beyond the breakdown voltages of semiconductor devices or circuits operated basedmore » on electrical bias or control designs. The photonic core aspect of the four-terminal circuit element provides unique features that enable versatile circuit applications to either replace the semiconductor transistor-based circuit elements or semiconductor diode-based circuit elements.« less
Design of Energy Storage Reactors for Dc-To-Dc Converters. Ph.D. Thesis

NASA Technical Reports Server (NTRS)

Chen, D. Y.

1975-01-01

Two methodical approaches to the design of energy-storage reactors for a group of widely used dc-to-dc converters are presented. One of these approaches is based on a steady-state time-domain analysis of piecewise-linearized circuit models of the converters, while the other approach is based on an analysis of the same circuit models, but from an energy point of view. The design procedure developed from the first approach includes a search through a stored data file of magnetic core characteristics and results in a list of usable reactor designs which meet a particular converter's requirements. Because of the complexity of this procedure, a digital computer usually is used to implement the design algorithm. The second approach, based on a study of the storage and transfer of energy in the magnetic reactors, leads to a straightforward design procedure which can be implemented with hand calculations. An equation to determine the lower-bound volume of workable cores for given converter design specifications is derived. Using this computer lower-bound volume, a comparative evaluation of various converter configurations is presented.
The design of a small flow optical sensor of particle counter

NASA Astrophysics Data System (ADS)

Zhan, Yongbo; zhang, Jianwei; Zeng, Jianxiong; Li, Bin; Chen, Lu

2018-01-01

Based on the principle of Mie scattering, we design a small flow optical sensor of particle counter. Firstly, laser illumination system was simulated and designed by ZEMAX optical design software, and the uniform light intensity of photosensitive area was obtained. The gas circuit structure was also designed according to the related theory of fluid mechanics. Then, the method of combining with MIST scattering calculation software and geometric modeling was firstly used to design spherical reflection system, on the basis of the formula of object-image distance. Finally, the test was conducted after the optical sensor placed in self-designed pre-amplification and high-speed processing circuit. The test results show that the counting efficiency of 0.3 μm gear is above 70%, 0.5 μm gear and 1.0 μm gear are both reached more than 90%, and the dispersion coefficient of each gear is very nearly the same, compared with the standard machine of Kanomax 3886 under the particle spraying flow of 2.5SCFH, 3.0SCFH, 3.5SCFH.
49 CFR 236.786 - Principle, closed circuit.

Code of Federal Regulations, 2010 CFR

2010-10-01

... 49 Transportation 4 2010-10-01 2010-10-01 false Principle, closed circuit. 236.786 Section 236.786 Transportation Other Regulations Relating to Transportation (Continued) FEDERAL RAILROAD ADMINISTRATION... Principle, closed circuit. The principle of circuit design where a normally energized electric circuit which...
Optimal design of leak-proof SRAM cell using MCDM method

NASA Astrophysics Data System (ADS)

Wang, Qi; Kang, Sung-Mo

2003-04-01

As deep-submicron CMOS technology advances, on-chip cache has become a bottleneck on microprocessor's performance. Meanwhile, it also occupies a big percentage of processor area and consumes large power. Speed, power and area of SRAM are mutually contradicting, and not easy to be met simultaneously. Many existent leakage suppression techniques have been proposed, but they limit the circuit's performance. We apply a Multi-Criteria Decision Making strategy to perform a minimum delay-power-area optimization on SRAM circuit under some certain constraints. Based on an integrated device and circuit-level approach, we search for a process that yields a targeted composite performance. In consideration of the huge amount of simulation workload involved in the optimal design-seeking process, most of this process is automated to facilitate our goal-pursuant. With varying emphasis put on delay, power or area, different optimal SRAM designs are derived and a gate-oxide thickness scaling limit is projected. The result seems to indicate that a better composite performance could be achieved under a thinner oxide thickness. Under the derived optimal oxide thickness, the static leakage power consumption contributes less than 1% in the total power dissipation.

Design, experiments and simulation of voltage transformers on the basis of a differential input D-dot sensor.

PubMed

Wang, Jingang; Gao, Can; Yang, Jie

2014-07-17

Currently available traditional electromagnetic voltage sensors fail to meet the measurement requirements of the smart grid, because of low accuracy in the static and dynamic ranges and the occurrence of ferromagnetic resonance attributed to overvoltage and output short circuit. This work develops a new non-contact high-bandwidth voltage measurement system for power equipment. This system aims at the miniaturization and non-contact measurement of the smart grid. After traditional D-dot voltage probe analysis, an improved method is proposed. For the sensor to work in a self-integrating pattern, the differential input pattern is adopted for circuit design, and grounding is removed. To prove the structure design, circuit component parameters, and insulation characteristics, Ansoft Maxwell software is used for the simulation. Moreover, the new probe was tested on a 10 kV high-voltage test platform for steady-state error and transient behavior. Experimental results ascertain that the root mean square values of measured voltage are precise and that the phase error is small. The D-dot voltage sensor not only meets the requirement of high accuracy but also exhibits satisfactory transient response. This sensor can meet the intelligence, miniaturization, and convenience requirements of the smart grid.
Technical support for digital systems technology development. Task order 1: ISP contention analysis and control

NASA Technical Reports Server (NTRS)

Stehle, Roy H.; Ogier, Richard G.

1993-01-01

Alternatives for realizing a packet-based network switch for use on a frequency division multiple access/time division multiplexed (FDMA/TDM) geostationary communication satellite were investigated. Each of the eight downlink beams supports eight directed dwells. The design needed to accommodate multicast packets with very low probability of loss due to contention. Three switch architectures were designed and analyzed. An output-queued, shared bus system yielded a functionally simple system, utilizing a first-in, first-out (FIFO) memory per downlink dwell, but at the expense of a large total memory requirement. A shared memory architecture offered the most efficiency in memory requirements, requiring about half the memory of the shared bus design. The processing requirement for the shared-memory system adds system complexity that may offset the benefits of the smaller memory. An alternative design using a shared memory buffer per downlink beam decreases circuit complexity through a distributed design, and requires at most 1000 packets of memory more than the completely shared memory design. Modifications to the basic packet switch designs were proposed to accommodate circuit-switched traffic, which must be served on a periodic basis with minimal delay. Methods for dynamically controlling the downlink dwell lengths were developed and analyzed. These methods adapt quickly to changing traffic demands, and do not add significant complexity or cost to the satellite and ground station designs. Methods for reducing the memory requirement by not requiring the satellite to store full packets were also proposed and analyzed. In addition, optimal packet and dwell lengths were computed as functions of memory size for the three switch architectures.
Multi-Layer E-Textile Circuits

NASA Technical Reports Server (NTRS)

Dunne, Lucy E.; Bibeau, Kaila; Mulligan, Lucie; Frith, Ashton; Simon, Cory

2012-01-01

Stitched e-textile circuits facilitate wearable, flexible, comfortable wearable technology. However, while stitched methods of e-textile circuits are common, multi-layer circuit creation remains a challenge. Here, we present methods of stitched multi-layer circuit creation using accessible tools and techniques.
Double buffer circuit for the characterization of piezoelectric nanogenerators based on ZnO nanowires

NASA Astrophysics Data System (ADS)

Nadaud, Kevin; Morini, François; Dahiya, Abhishek S.; Justeau, Camille; Boubenia, Sarah; Rajeev, Kiron P.; Alquier, Daniel; Poulin-Vittrant, Guylaine

2018-02-01

The accurate and precise measurements of voltage and current output generated by a nanogenerator (NG) are crucial to design the rectifying/harvesting circuit and to evaluate correctly the amount of energy provided by a NG. High internal impedance of the NGs (several MΩ) is the main limiting factor for designing circuits to measure the open circuit voltage. In this paper, we present the influence of the characterization circuit used to measure the generated voltage of piezoelectric NGs. The proposed circuit consists of a differential amplifier which permits us to measure the voltage provided by the NG without applying any parasitic bias to it. The proposed circuit is compared to a commercial electrometer and a homemade buffer circuit based on a voltage follower circuit to show its interest. For the proposed double buffer circuit, no asymmetric behavior has been noticed contrary to the measurements made using a simple buffer circuit and a Keithley electrometer. The proposed double buffer circuit is thus suitable to measure the NG voltage in a transparent way, as an ideal voltage probe should do.
Polymorphic Electronic Circuits

NASA Technical Reports Server (NTRS)

Stoica, Adrian

2004-01-01

Polymorphic electronics is a nascent technological discipline that involves, among other things, designing the same circuit to perform different analog and/or digital functions under different conditions. For example, a circuit can be designed to function as an OR gate or an AND gate, depending on the temperature (see figure). Polymorphic electronics can also be considered a subset of polytronics, which is a broader technological discipline in which optical and possibly other information- processing systems could also be designed to perform multiple functions. Polytronics is an outgrowth of evolvable hardware (EHW). The basic concepts and some specific implementations of EHW were described in a number of previous NASA Tech Briefs articles. To recapitulate: The essence of EHW is to design, construct, and test a sequence of populations of circuits that function as incrementally better solutions of a given design problem through the selective, repetitive connection and/or disconnection of capacitors, transistors, amplifiers, inverters, and/or other circuit building blocks. The evolution is guided by a search-and-optimization algorithm (in particular, a genetic algorithm) that operates in the space of possible circuits to find a circuit that exhibits an acceptably close approximation of the desired functionality. The evolved circuits can be tested by computational simulation (in which case the evolution is said to be extrinsic), tested in real hardware (in which case the evolution is said to be intrinsic), or tested in random sequences of computational simulation and real hardware (in which case the evolution is said to be mixtrinsic).
Nucleic acids for the rational design of reaction circuits.

PubMed

Padirac, Adrien; Fujii, Teruo; Rondelez, Yannick

2013-08-01

Nucleic acid-based circuits are rationally designed in vitro assemblies that can perform complex preencoded programs. They can be used to mimic in silico computations. Recent works emphasized the modularity and robustness of these circuits, which allow their scaling-up. Another new development has led to dynamic, time-responsive systems that can display emergent behaviors like oscillations. These are closely related to biological architectures and provide an in vitro model of in vivo information processing. Nucleic acid circuits have already been used to handle various processes for technological or biotechnological purposes. Future applications of these chemical smart systems will benefit from the rapidly growing ability to design, construct, and model nucleic acid circuits of increasing size. Copyright © 2012 Elsevier Ltd. All rights reserved.
Engineering self-contained DNA circuit for proximity recognition and localized signal amplification of target biomolecules

PubMed Central

Ang, Yan Shan; Yung, Lin-Yue Lanry

2014-01-01

Biomolecular interactions have important cellular implications, however, a simple method for the sensing of such proximal events is lacking in the current molecular toolbox. We designed a dynamic DNA circuit capable of recognizing targets in close proximity to initiate a pre-programmed signal transduction process resulting in localized signal amplification. The entire circuit was engineered to be self-contained, i.e. it can self-assemble onto individual target molecules autonomously and form localized signal with minimal cross-talk. α-thrombin was used as a model protein to evaluate the performance of the individual modules and the overall circuit for proximity interaction under physiologically relevant buffer condition. The circuit achieved good selectivity in presence of non-specific protein and interfering serum matrix and successfully detected for physiologically relevant α-thrombin concentration (50 nM–5 μM) in a single mixing step without any further washing. The formation of localized signal at the interaction site can be enhanced kinetically through the control of temperature and probe concentration. This work provides a basic general framework from which other circuit modules can be adapted for the sensing of other biomolecular or cellular interaction of interest. PMID:25056307
Artificial immune system algorithm in VLSI circuit configuration

NASA Astrophysics Data System (ADS)

Mansor, Mohd. Asyraf; Sathasivam, Saratha; Kasihmuddin, Mohd Shareduwan Mohd

2017-08-01

In artificial intelligence, the artificial immune system is a robust bio-inspired heuristic method, extensively used in solving many constraint optimization problems, anomaly detection, and pattern recognition. This paper discusses the implementation and performance of artificial immune system (AIS) algorithm integrated with Hopfield neural networks for VLSI circuit configuration based on 3-Satisfiability problems. Specifically, we emphasized on the clonal selection technique in our binary artificial immune system algorithm. We restrict our logic construction to 3-Satisfiability (3-SAT) clauses in order to outfit with the transistor configuration in VLSI circuit. The core impetus of this research is to find an ideal hybrid model to assist in the VLSI circuit configuration. In this paper, we compared the artificial immune system (AIS) algorithm (HNN-3SATAIS) with the brute force algorithm incorporated with Hopfield neural network (HNN-3SATBF). Microsoft Visual C++ 2013 was used as a platform for training, simulating and validating the performances of the proposed network. The results depict that the HNN-3SATAIS outperformed HNN-3SATBF in terms of circuit accuracy and CPU time. Thus, HNN-3SATAIS can be used to detect an early error in the VLSI circuit design.
Analytical design equations for self-tuned Class-E power amplifier.

PubMed

Hu, Zhe; Troyk, Philip

2011-01-01

For many emerging neural prosthesis designs that are powered by inductive coupling, their small physical size requires large current in the extracorporeal transmitter coil, and the Class-E power amplifier topology is often used for the transmitter design. Tuning of Class-E circuits for efficient operation is difficult and a self-tuned circuit can facilitate the tuning. The coil current is sensed and used to tune the switching of the transistor switch in the Class-E circuit in order to maintain its high-efficiency operation. Although mathematically complex, the analysis and design procedure for the self-tuned Class-E circuit can be simplified due to the current feedback control, which makes the phase angle between the switching pulse and the coil current predetermined. In this paper explicit analytical design equations are derived and a detailed design procedure is presented and compared with the conventional Class-E design approaches.
Research on the EDM Technology for Micro-holes at Complex Spatial Locations

NASA Astrophysics Data System (ADS)

Y Liu, J.; Guo, J. M.; Sun, D. J.; Cai, Y. H.; Ding, L. T.; Jiang, H.

2017-12-01

For the demands on machining micro-holes at complex spatial location, several key technical problems are conquered such as micro-Electron Discharge Machining (micro-EDM) power supply system’s development, the host structure’s design and machining process technical. Through developing low-voltage power supply circuit, high-voltage circuit, micro and precision machining circuit and clearance detection system, the narrow pulse and high frequency six-axis EDM machining power supply system is developed to meet the demands on micro-hole discharging machining. With the method of combining the CAD structure design, CAE simulation analysis, modal test, ODS (Operational Deflection Shapes) test and theoretical analysis, the host construction and key axes of the machine tool are optimized to meet the position demands of the micro-holes. Through developing the special deionized water filtration system to make sure that the machining process is stable enough. To verify the machining equipment and processing technical developed in this paper through developing the micro-hole’s processing flow and test on the real machine tool. As shown in the final test results: the efficient micro-EDM machining pulse power supply system, machine tool host system, deionized filtration system and processing method developed in this paper meet the demands on machining micro-holes at complex spatial locations.
Flat-Passband 3 × 3 Interleaving Filter Designed With Optical Directional Couplers in Lattice Structure

NASA Astrophysics Data System (ADS)

Wang, Qi Jie; Zhang, Ying; Soh, Yeng Chai

2005-12-01

This paper presents a novel lattice optical delay-line circuit using 3 × 3 directional couplers to implement three-port optical interleaving filters. It is shown that the proposed circuit can deliver three channels of 2pi/3 phase-shifted interleaving transmission spectra if the coupling ratios of the last two directional couplers are selected appropriately. The other performance requirements of an optical interleaver can be achieved by designing the remaining part of the lattice circuit. A recursive synthesis design algorithm is developed to calculate the design parameters of the lattice circuit that will yield the desired filter response. As illustrative examples, interleavers with maximally flat-top passband transmission and with given transmission performance on passband ripples and passband bandwidth, respectively, are designed to verify the effectiveness of the proposed design scheme.
Design synthesis and optimization of permanent magnet synchronous machines based on computationally-efficient finite element analysis

NASA Astrophysics Data System (ADS)

Sizov, Gennadi Y.

In this dissertation, a model-based multi-objective optimal design of permanent magnet ac machines, supplied by sine-wave current regulated drives, is developed and implemented. The design procedure uses an efficient electromagnetic finite element-based solver to accurately model nonlinear material properties and complex geometric shapes associated with magnetic circuit design. Application of an electromagnetic finite element-based solver allows for accurate computation of intricate performance parameters and characteristics. The first contribution of this dissertation is the development of a rapid computational method that allows accurate and efficient exploration of large multi-dimensional design spaces in search of optimum design(s). The computationally efficient finite element-based approach developed in this work provides a framework of tools that allow rapid analysis of synchronous electric machines operating under steady-state conditions. In the developed modeling approach, major steady-state performance parameters such as, winding flux linkages and voltages, average, cogging and ripple torques, stator core flux densities, core losses, efficiencies and saturated machine winding inductances, are calculated with minimum computational effort. In addition, the method includes means for rapid estimation of distributed stator forces and three-dimensional effects of stator and/or rotor skew on the performance of the machine. The second contribution of this dissertation is the development of the design synthesis and optimization method based on a differential evolution algorithm. The approach relies on the developed finite element-based modeling method for electromagnetic analysis and is able to tackle large-scale multi-objective design problems using modest computational resources. Overall, computational time savings of up to two orders of magnitude are achievable, when compared to current and prevalent state-of-the-art methods. These computational savings allow one to expand the optimization problem to achieve more complex and comprehensive design objectives. The method is used in the design process of several interior permanent magnet industrial motors. The presented case studies demonstrate that the developed finite element-based approach practically eliminates the need for using less accurate analytical and lumped parameter equivalent circuit models for electric machine design optimization. The design process and experimental validation of the case-study machines are detailed in the dissertation.
Selection of wires and circuit protective devices for STS Orbiter vehicle payload electrical circuits

NASA Technical Reports Server (NTRS)

Gaston, Darilyn M.

1991-01-01

Electrical designers of Orbiter payloads face the challenge of determining proper circuit protection/wire size parameters to satisfy Orbiter engineering and safety requirements. This document is the result of a program undertaken to review test data from all available aerospace sources and perform additional testing to eliminate extrapolation errors. The resulting compilation of data was used to develop guidelines for the selection of wire sizes and circuit protection ratings. The purpose is to provide guidance to the engineering to ensure a design which meets Orbiter standards and which should be applicable to any aerospace design.
Sensing circuits for multiwire proportional chambers

NASA Technical Reports Server (NTRS)

Peterson, H. T.; Worley, E. R.

1977-01-01

Integrated sensing circuits were designed, fabricated, and packaged for use in determining the direction and fluence of ionizing radiation passing through a multiwire proportional chamber. CMOS on sapphire was selected because of its high speed and low power capabilities. The design of the proposed circuits is described and the results of computer simulations are presented. The fabrication processes for the CMOS on sapphire sensing circuits and hybrid substrates are outlined. Several design options are described and the cost implications of each discussed. To be most effective, each chip should handle not more than 32 inputs, and should be mounted on its own hybrid substrate.
A new method for wideband characterization of resonator-based sensing platforms

NASA Astrophysics Data System (ADS)

Munir, Farasat; Wathen, Adam; Hunt, William D.

2011-03-01

A new approach to the electronic instrumentation for extracting data from resonator-based sensing devices (e.g., microelectromechanical, piezoelectric, electrochemical, and acoustic) is suggested and demonstrated here. Traditionally, oscillator-based circuitry is employed to monitor shift in the resonance frequency of the resonator. These circuits give a single point measurement at the frequency where the oscillation criterion is met. However, the resonator response itself is broadband and contains much more information than a single point measurement. Here, we present a method for the broadband characterization of a resonator using white noise as an excitation signal. The resonator is used in a two-port filter configuration, and the resonator output is subjected to frequency spectrum analysis. The result is a wideband spectral map analogous to the magnitude of the S21 parameters of a conventional filter. Compared to other sources for broadband excitation (e.g., frequency chirp, multisine, or narrow time domain pulse), the white noise source requires no design of the input signal and is readily available for very wide bandwidths (1 MHz-3 GHz). Moreover, it offers simplicity in circuit design as it does not require precise impedance matching; whereas such requirements are very strict for oscillator-based circuit systems, and can be difficult to fulfill. This results in a measurement system that does not require calibration, which is a significant advantage over oscillator circuits. Simulation results are first presented for verification of the proposed system, followed by measurement results with a prototype implementation. A 434 MHz surface acoustic wave (SAW) resonator and a 5 MHz quartz crystal microbalance (QCM) are measured using the proposed method, and the results are compared to measurements taken by a conventional bench-top network analyzer. Maximum relative differences in the measured resonance frequencies of the SAW and QCM resonators are 0.0004% and 0.002%, respectively. The ability to track a changing sensor response is demonstrated by inducing temperature variations and measuring resonance frequency simultaneously using the proposed technique in parallel with a network analyzer. The relative difference between the two measurements is about 5.53 ppm, highlighting the impressive accuracy of the proposed system. Using commercially available digital signal processors (DSPs), we believe that this technique can be implemented as a system-on-a-chip solution resulting in a very low cost, easy to use, portable, and customizable sensing system. In addition, given the simplicity of the signal and circuit design, and its immunity to other common interface concerns (injection locking, oscillator interference, and drift, etc.), this method is better suited to accommodating array-based systems.
Biomedically relevant circuit-design strategies in mammalian synthetic biology

PubMed Central

Bacchus, William; Aubel, Dominique; Fussenegger, Martin

2013-01-01

The development and progress in synthetic biology has been remarkable. Although still in its infancy, synthetic biology has achieved much during the past decade. Improvements in genetic circuit design have increased the potential for clinical applicability of synthetic biology research. What began as simple transcriptional gene switches has rapidly developed into a variety of complex regulatory circuits based on the transcriptional, translational and post-translational regulation. Instead of compounds with potential pharmacologic side effects, the inducer molecules now used are metabolites of the human body and even members of native cell signaling pathways. In this review, we address recent progress in mammalian synthetic biology circuit design and focus on how novel designs push synthetic biology toward clinical implementation. Groundbreaking research on the implementation of optogenetics and intercellular communications is addressed, as particularly optogenetics provides unprecedented opportunities for clinical application. Along with an increase in synthetic network complexity, multicellular systems are now being used to provide a platform for next-generation circuit design. PMID:24061539
A Single Phase 7-Level Cascade Inverter Topology with Reduced Number of Switches on Resistive Load by Using PWM

NASA Astrophysics Data System (ADS)

Hamzah, H. H.; Ponniran, A.; Kasiran, A. N.; Harimon, M. A.; Gendum, D. A.; Yatim, M. H.

2018-04-01

This paper discussing design principles of inverter structure with reduced number of semiconductor devices of seven levels symmetric H-bridge multilevel inverter (MLI) topology. The aim of this paper is to design an inverter circuit with reduction of semiconductor losses, converter size and development cost. The H-bridge and auxiliary structures were considered in order to achieve seven levels output voltage. The performance of design circuit is compared with conventional seven levels structure in terms of voltage output. The circuit development consists of seven switches and three diode. A basic modulation technique is used to confirm the designed circuit. The results show that the designed circuit is able to convert seven level output voltage with low total harmonics distortion (THD) in voltage fundamental output. According to the results, fundamental output voltage is increased up to 8.314%, and the THD is decreased up to 0.81% compared to the conventional seven level inverter.
Analysis of microstrip dipoles and slots transversely coupled to a microstrip line using the FDTD method

NASA Technical Reports Server (NTRS)

Tulintseff, A. N.

1993-01-01

Printed dipole elements and their complement, linear slots, are elementary radiators that have found use in low-profile antenna arrays. Low-profile antenna arrays, in addition to their small size and low weight characteristics, offer the potential advantage of low-cost, high-volume production with easy integration with active integrated circuit components. The design of such arrays requires that the radiation and impedance characteristics of the radiating elements be known. The FDTD (Finite-Difference Time-Domain) method is a general, straight-forward implementation of Maxwell's equations and offers a relatively simple way of analyzing both printed dipole and slot elements. Investigated in this work is the application of the FDTD method to the analysis of printed dipole and slot elements transversely coupled to an infinite transmission line in a multilayered configuration. Such dipole and slot elements may be used in dipole and slot series-fed-type linear arrays, where element offsets and interelement line lengths are used to obtain the desired amplitude distribution and beam direction, respectively. The design of such arrays is achieved using transmission line theory with equivalent circuit models for the radiating elements. In an equivalent circuit model, the dipole represents a shunt impedance to the transmission line, where the impedance is a function of dipole offset, length, and width. Similarly, the slot represents a series impedance to the transmission line. The FDTD method is applied to single dipole and slot elements transversely coupled to an infinite microstrip line using a fixed rectangular grid with Mur's second order absorbing boundary conditions. Frequency-dependent circuit and scattering parameters are obtained by saving desired time-domain quantities and using the Fourier transform. A Gaussian pulse excitation is applied to the microstrip transmission line, where the resulting reflected signal due to the presence of the radiating element is used to determine the equivalent element impedance.
Design and implementation of an efficient single layer five input majority voter gate in quantum-dot cellular automata.

PubMed

Bahar, Ali Newaz; Waheed, Sajjad

2016-01-01

The fundamental logical element of a quantum-dot cellular automata (QCA) circuit is majority voter gate (MV). The efficiency of a QCA circuit is depends on the efficiency of the MV. This paper presents an efficient single layer five-input majority voter gate (MV5). The structure of proposed MV5 is very simple and easy to implement in any logical circuit. This proposed MV5 reduce number of cells and use conventional QCA cells. However, using MV5 a multilayer 1-bit full-adder (FA) is designed. The functional accuracy of the proposed MV5 and FA are confirmed by QCADesigner a well-known QCA layout design and verification tools. Furthermore, the power dissipation of proposed circuits are estimated, which shows that those circuits dissipate extremely small amount of energy and suitable for reversible computing. The simulation outcomes demonstrate the superiority of the proposed circuit.
Understanding Biological Regulation Through Synthetic Biology.

PubMed

Bashor, Caleb J; Collins, James J

2018-05-20

Engineering synthetic gene regulatory circuits proceeds through iterative cycles of design, building, and testing. Initial circuit designs must rely on often-incomplete models of regulation established by fields of reductive inquiry-biochemistry and molecular and systems biology. As differences in designed and experimentally observed circuit behavior are inevitably encountered, investigated, and resolved, each turn of the engineering cycle can force a resynthesis in understanding of natural network function. Here, we outline research that uses the process of gene circuit engineering to advance biological discovery. Synthetic gene circuit engineering research has not only refined our understanding of cellular regulation but furnished biologists with a toolkit that can be directed at natural systems to exact precision manipulation of network structure. As we discuss, using circuit engineering to predictively reorganize, rewire, and reconstruct cellular regulation serves as the ultimate means of testing and understanding how cellular phenotype emerges from systems-level network function.

Engineering Bacteria to Search for Specific Concentrations of Molecules by a Systematic Synthetic Biology Design Method

PubMed Central

Chen, Bor-Sen

2016-01-01

Bacteria navigate environments full of various chemicals to seek favorable places for survival by controlling the flagella’s rotation using a complicated signal transduction pathway. By influencing the pathway, bacteria can be engineered to search for specific molecules, which has great potential for application to biomedicine and bioremediation. In this study, genetic circuits were constructed to make bacteria search for a specific molecule at particular concentrations in their environment through a synthetic biology method. In addition, by replacing the “brake component” in the synthetic circuit with some specific sensitivities, the bacteria can be engineered to locate areas containing specific concentrations of the molecule. Measured by the swarm assay qualitatively and microfluidic techniques quantitatively, the characteristics of each “brake component” were identified and represented by a mathematical model. Furthermore, we established another mathematical model to anticipate the characteristics of the “brake component”. Based on this model, an abundant component library can be established to provide adequate component selection for different searching conditions without identifying all components individually. Finally, a systematic design procedure was proposed. Following this systematic procedure, one can design a genetic circuit for bacteria to rapidly search for and locate different concentrations of particular molecules by selecting the most adequate “brake component” in the library. Moreover, following simple procedures, one can also establish an exclusive component library suitable for other cultivated environments, promoter systems, or bacterial strains. PMID:27096615
Servo Platform Circuit Design of Pendulous Gyroscope Based on DSP

NASA Astrophysics Data System (ADS)

Tan, Lilong; Wang, Pengcheng; Zhong, Qiyuan; Zhang, Cui; Liu, Yunfei

2018-03-01

In order to solve the problem when a certain type of pendulous gyroscope in the initial installation deviation more than 40 degrees, that the servo platform can not be up to the speed of the gyroscope in the rough north seeking phase. This paper takes the digital signal processor TMS320F28027 as the core, uses incremental digital PID algorithm, carries out the circuit design of the servo platform. Firstly, the hardware circuit is divided into three parts: DSP minimum system, motor driving circuit and signal processing circuit, then the mathematical model of incremental digital PID algorithm is established, based on the model, writes the PID control program in CCS3.3, finally, the servo motor tracking control experiment is carried out, it shows that the design can significantly improve the tracking ability of the servo platform, and the design has good engineering practice.
Tunable Low Energy, Compact and High Performance Neuromorphic Circuit for Spike-Based Synaptic Plasticity

PubMed Central

Rahimi Azghadi, Mostafa; Iannella, Nicolangelo; Al-Sarawi, Said; Abbott, Derek

2014-01-01

Cortical circuits in the brain have long been recognised for their information processing capabilities and have been studied both experimentally and theoretically via spiking neural networks. Neuromorphic engineers are primarily concerned with translating the computational capabilities of biological cortical circuits, using the Spiking Neural Network (SNN) paradigm, into in silico applications that can mimic the behaviour and capabilities of real biological circuits/systems. These capabilities include low power consumption, compactness, and relevant dynamics. In this paper, we propose a new accelerated-time circuit that has several advantages over its previous neuromorphic counterparts in terms of compactness, power consumption, and capability to mimic the outcomes of biological experiments. The presented circuit simulation results demonstrate that, in comparing the new circuit to previous published synaptic plasticity circuits, reduced silicon area and lower energy consumption for processing each spike is achieved. In addition, it can be tuned in order to closely mimic the outcomes of various spike timing- and rate-based synaptic plasticity experiments. The proposed circuit is also investigated and compared to other designs in terms of tolerance to mismatch and process variation. Monte Carlo simulation results show that the proposed design is much more stable than its previous counterparts in terms of vulnerability to transistor mismatch, which is a significant challenge in analog neuromorphic design. All these features make the proposed design an ideal circuit for use in large scale SNNs, which aim at implementing neuromorphic systems with an inherent capability that can adapt to a continuously changing environment, thus leading to systems with significant learning and computational abilities. PMID:24551089
Tunable low energy, compact and high performance neuromorphic circuit for spike-based synaptic plasticity.

PubMed

Rahimi Azghadi, Mostafa; Iannella, Nicolangelo; Al-Sarawi, Said; Abbott, Derek

2014-01-01

Cortical circuits in the brain have long been recognised for their information processing capabilities and have been studied both experimentally and theoretically via spiking neural networks. Neuromorphic engineers are primarily concerned with translating the computational capabilities of biological cortical circuits, using the Spiking Neural Network (SNN) paradigm, into in silico applications that can mimic the behaviour and capabilities of real biological circuits/systems. These capabilities include low power consumption, compactness, and relevant dynamics. In this paper, we propose a new accelerated-time circuit that has several advantages over its previous neuromorphic counterparts in terms of compactness, power consumption, and capability to mimic the outcomes of biological experiments. The presented circuit simulation results demonstrate that, in comparing the new circuit to previous published synaptic plasticity circuits, reduced silicon area and lower energy consumption for processing each spike is achieved. In addition, it can be tuned in order to closely mimic the outcomes of various spike timing- and rate-based synaptic plasticity experiments. The proposed circuit is also investigated and compared to other designs in terms of tolerance to mismatch and process variation. Monte Carlo simulation results show that the proposed design is much more stable than its previous counterparts in terms of vulnerability to transistor mismatch, which is a significant challenge in analog neuromorphic design. All these features make the proposed design an ideal circuit for use in large scale SNNs, which aim at implementing neuromorphic systems with an inherent capability that can adapt to a continuously changing environment, thus leading to systems with significant learning and computational abilities.
Design of two-channel oscilloscope and basic circuit simulations in LabView

NASA Astrophysics Data System (ADS)

Balzhiev, Plamen; Makal, Jaroslaw

2008-01-01

The project is realized as a diploma thesis in Bialystok Technical University, Poland). The main aim is to develop a useful educational tool which presents the time and frequency characteristics in basic electrical circuits. It is designed as a helpful instrument for lectures and laboratory classes. The predominant audience will be students of electrical engineering from first semester of the higher education. Therefore the level of knowledge at this stage of education is not high enough and different techniques are necessary to increase the students' interest and the efficiency of teaching process. This educational instrument provides the needed knowledge concerning the basic circuits and its parameters. Graphics and animations of the general processes in the electrical circuits make the problems more interesting, comprehensive and easier to understand. For designing such an instrument the National Instruments' programming environment LabView is used. It is preferred to the other simulation software because of its simplicity flexibility and also availability (the free demo version is sufficient to make a simple virtual instrument). LabView uses graphical programming language and has powerful mathematical functions for analysis and simulations. The useful visualization tools for presenting different diagrams are worth recommending, too. It is also specialized in measurement and control and it supports a wide variety of hardware. Therefore this software is suitable for laboratory classes to present the dependencies between the simulated characteristics in basic electrical circuits and the real one measured with the hardware device. For this purpose a two-channel oscilloscope is designed as part of the described project. The main purpose of this instrument as part of the educational process is to present the desired characteristics of the electrical circuits and to become familiar with the general functions of the oscilloscope. This project combines several important features appropriate for teaching purposes: well presented information with graphics, easy to operate with and giving the necessary knowledge. This method of teaching is more interesting and attractive to the audience. Also the information is assimilated more quickly, with less effort.
QUARTERLY TECHNICAL PROGRESS REPORT, JULY, AUGUST, SEPTEMBER 1966.

DTIC Science & Technology

Contents: Circuit research program; Hardware systems research; Software systems research program; Numerical methods, computer arithmetic and...artificial languages; Library automation; Illiac II service , use, and program development; IBM service , use, and program development; Problem specifications; Switching theory and logical design; General laboratory information.
Color adjustable LED driver design based on PWM

NASA Astrophysics Data System (ADS)

Du, Yiying; Yu, Caideng; Que, Longcheng; Zhou, Yun; Lv, Jian

2012-10-01

Light-emitting diode (LED) is a liquid cold source light source that rapidly develops in recent years. The merits of high brightness efficiency, long duration, high credibility and no pollution make it satisfy our demands for consumption and natural life, and gradually replace the traditional lamp-house-incandescent light and fluorescent light. However, because of the high cost and unstable drive circuit, the application range is restricted. To popularize the applications of the LED, we focus on improving the LED driver circuit to change this phenomenon. Basing on the traditional LED drive circuit, we adopt pre-setup constant current model and introduce pulse width modulation (PWM) control method to realize adjustable 256 level-grays display. In this paper, basing on human visual characteristics and the traditional PWM control method, we propose a new PWM control timing clock to alter the duty cycle of PWM signal to realize the simple gamma correction. Consequently, the brightness can accord with our visual characteristics.
Integrated circuits, and design and manufacture thereof

DOEpatents

Auracher, Stefan; Pribbernow, Claus; Hils, Andreas

2006-04-18

A representation of a macro for an integrated circuit layout. The representation may define sub-circuit cells of a module. The module may have a predefined functionality. The sub-circuit cells may include at least one reusable circuit cell. The reusable circuit cell may be configured such that when the predefined functionality of the module is not used, the reusable circuit cell is available for re-use.
Engineering Design Handbook: Reliable Military Electronics

DTIC Science & Technology

1976-01-15

p. 30. CBS-Hytron: "I..ow-o::stPower Trall8istors," E1a::Drnic Design, 1 Nov. 1956, p. 24. Chang, C. M.: "An NPN High-Power Fast Germanium Col:e...34Monovibrator Has Fast Recovery Time," Electronics, Dec. 1957, p. 158. Carlson, A W. : "Junction Transistor Counters," EledronicDesign, 1 March 1957, p. 28...Method Makes Fast Pulses in Transistor Circuits," Electronic Design, 28 May 1958, p. 44. Stassior, R. A : "Pulse Applications cf a Diffused-Meltback
Design and Characterization of DNA Strand-Displacement Circuits in Serum-Supplemented Cell Medium.

PubMed

Fern, Joshua; Schulman, Rebecca

2017-09-15

The functional stability and lifetimes of synthetic molecular circuits in biological environments are important for long-term, stable sensors or controllers of cell or tissue behavior. DNA-based molecular circuits, in particular DNA strand-displacement circuits, provide simple and effective biocompatible control mechanisms and sensors, but are vulnerable to digestion by nucleases present in living tissues and serum-supplemented cell culture. The stability of double-stranded and single-stranded DNA circuit components in serum-supplemented cell medium and the corresponding effect of nuclease-mediated degradation on circuit performance were characterized to determine the major routes of degradation and DNA strand-displacement circuit failure. Simple circuit design choices, such as the use of 5' toeholds within the DNA complexes used as reactants in the strand-displacement reactions and the termination of single-stranded components with DNA hairpin domains at the 3' termini, significantly increase the functional lifetime of the circuit components in the presence of nucleases. Simulations of multireaction circuits, guided by the experimentally measured operation of single-reaction circuits, enable predictive realization of multilayer and competitive-reaction circuit behavior. Together, these results provide a basic route to increased DNA circuit stability in cell culture environments.
Design and Characterization of DNA Strand-Displacement Circuits in Serum-Supplemented Cell Medium

DOE PAGES

Fern, Joshua; Schulman, Rebecca

2017-05-30

The functional stability and lifetimes of synthetic molecular circuits in biological environments are important for long-term, stable sensors or controllers of cell or tissue behavior. DNA-based molecular circuits, particularly DNA strand-displacement circuits, provide simple and effective biocompatible control mechanisms and sensors, but are vulnerable to digestion by nucleases present in living tissues and serum-supplemented cell culture. The stability of double-stranded and single-stranded DNA circuit components in serum-supplemented cell medium and the corresponding effect of nuclease-mediated degradation on circuit performance were characterized to determine the major routes of degradation and DNA strand-displacement circuit failure. Simple circuit design choices, such as themore » use of 5' toeholds within the DNA complexes used as reactants in the strand-displacement reactions and the termination of single-stranded components with DNA hairpin domains at the 3' termini, significantly increase the functional lifetime of the circuit components in the presence of nucleases. Furthermore, simulations of multireaction circuits, guided by the experimentally measured operation of single-reaction circuits, enable predictive realization of multilayer and competitive-reaction circuit behavior. Altogether, these results provide a basic route to increased DNA circuit stability in cell culture environments.« less
Design and Characterization of DNA Strand-Displacement Circuits in Serum-Supplemented Cell Medium

DOE Office of Scientific and Technical Information (OSTI.GOV)

Fern, Joshua; Schulman, Rebecca

The functional stability and lifetimes of synthetic molecular circuits in biological environments are important for long-term, stable sensors or controllers of cell or tissue behavior. DNA-based molecular circuits, particularly DNA strand-displacement circuits, provide simple and effective biocompatible control mechanisms and sensors, but are vulnerable to digestion by nucleases present in living tissues and serum-supplemented cell culture. The stability of double-stranded and single-stranded DNA circuit components in serum-supplemented cell medium and the corresponding effect of nuclease-mediated degradation on circuit performance were characterized to determine the major routes of degradation and DNA strand-displacement circuit failure. Simple circuit design choices, such as themore » use of 5' toeholds within the DNA complexes used as reactants in the strand-displacement reactions and the termination of single-stranded components with DNA hairpin domains at the 3' termini, significantly increase the functional lifetime of the circuit components in the presence of nucleases. Furthermore, simulations of multireaction circuits, guided by the experimentally measured operation of single-reaction circuits, enable predictive realization of multilayer and competitive-reaction circuit behavior. Altogether, these results provide a basic route to increased DNA circuit stability in cell culture environments.« less
A design of high-precision BLDCM drive with bus voltage protection

NASA Astrophysics Data System (ADS)

Lian, Xuezheng; Wang, Haitao; Xie, Meilin; Huang, Wei; Li, Dawei; Jing, Feng

2017-11-01

In the application of space satellite turntable, the design of balance wheel is very necessary. To solve the acquisition precision of Brushless DC motor speed is low, and the encoder is also more complex, this paper improves the original hall signal measurement methods. Using the logic device to achieve the six frequency multiplication of hall signal, the signal is used as speed feedback to achieve speed closed-loop control and improve the speed stability. At the same time, in order to prevent the E.M.F of BLDC motor to raise the voltage of the bus bar when reversing or braking, and affect the normal operation of other circuit modules, the analog circuit is used to protect the bus bar voltage by the way of energy consumption braking. The experimental results are consistent with the theoretical design, and the rationality and feasibility of the frequency multiplication scheme and bus voltage protection scheme are verified.
Flow-enhanced solution printing of all-polymer solar cells

DOE PAGES

Diao, Ying; Zhou, Yan; Kurosawa, Tadanori; ...

2015-08-12

Morphology control of solution coated solar cell materials presents a key challenge limiting their device performance and commercial viability. Here we present a new concept for controlling phase separation during solution printing using an all-polymer bulk heterojunction solar cell as a model system. The key aspect of our method lies in the design of fluid flow using a microstructured printing blade, on the basis of the hypothesis of flow-induced polymer crystallization. Our flow design resulted in a similar to 90% increase in the donor thin film crystallinity and reduced microphase separated donor and acceptor domain sizes. The improved morphology enhancedmore » all metrics of solar cell device performance across various printing conditions, specifically leading to higher short-circuit current, fill factor, open circuit voltage and significantly reduced device-to-device variation. However, we expect our design concept to have broad applications beyond all-polymer solar cells because of its simplicity and versatility.« less
Flow-enhanced solution printing of all-polymer solar cells

PubMed Central

Diao, Ying; Zhou, Yan; Kurosawa, Tadanori; Shaw, Leo; Wang, Cheng; Park, Steve; Guo, Yikun; Reinspach, Julia A.; Gu, Kevin; Gu, Xiaodan; Tee, Benjamin C. K.; Pang, Changhyun; Yan, Hongping; Zhao, Dahui; Toney, Michael F.; Mannsfeld, Stefan C. B.; Bao, Zhenan

2015-01-01

Morphology control of solution coated solar cell materials presents a key challenge limiting their device performance and commercial viability. Here we present a new concept for controlling phase separation during solution printing using an all-polymer bulk heterojunction solar cell as a model system. The key aspect of our method lies in the design of fluid flow using a microstructured printing blade, on the basis of the hypothesis of flow-induced polymer crystallization. Our flow design resulted in a ∼90% increase in the donor thin film crystallinity and reduced microphase separated donor and acceptor domain sizes. The improved morphology enhanced all metrics of solar cell device performance across various printing conditions, specifically leading to higher short-circuit current, fill factor, open circuit voltage and significantly reduced device-to-device variation. We expect our design concept to have broad applications beyond all-polymer solar cells because of its simplicity and versatility. PMID:26264528
Digital MOS integrated circuits

NASA Astrophysics Data System (ADS)

Elmasry, M. I.

MOS in digital circuit design is considered along with aspects of digital VLSI, taking into account a comparison of MOSFET logic circuits, 1-micrometer MOSFET VLSI technology, a generalized guide for MOSFET miniaturization, processing technologies, novel circuit structures for VLSI, and questions of circuit and system design for VLSI. MOS memory cells and circuits are discussed, giving attention to a survey of high-density dynamic RAM cell concepts, one-device cells for dynamic random-access memories, variable resistance polysilicon for high density CMOS Ram, high performance MOS EPROMs using a stacked-gate cell, and the optimization of the latching pulse for dynamic flip-flop sensors. Programmable logic arrays are considered along with digital signal processors, microprocessors, static RAMs, and dynamic RAMs.
Identification of material constants for piezoelectric transformers by three-dimensional, finite-element method and a design-sensitivity method.

PubMed

Joo, Hyun-Woo; Lee, Chang-Hwan; Rho, Jong-Seok; Jung, Hyun-Kyo

2003-08-01

In this paper, an inversion scheme for piezoelectric constants of piezoelectric transformers is proposed. The impedance of piezoelectric transducers is calculated using a three-dimensional finite element method. The validity of this is confirmed experimentally. The effects of material coefficients on piezoelectric transformers are investigated numerically. Six material coefficient variables for piezoelectric transformers were selected, and a design sensitivity method was adopted as an inversion scheme. The validity of the proposed method was confirmed by step-up ratio calculations. The proposed method is applied to the analysis of a sample piezoelectric transformer, and its resonance characteristics are obtained by numerically combined equivalent circuit method.
An enhanced high-speed multi-digit BCD adder using quantum-dot cellular automata

NASA Astrophysics Data System (ADS)

Ajitha, D.; Ramanaiah, K. V.; Sumalatha, V.

2017-02-01

The advent of development of high-performance, low-power digital circuits is achieved by a suitable emerging nanodevice called quantum-dot cellular automata (QCA). Even though many efficient arithmetic circuits were designed using QCA, there is still a challenge to implement high-speed circuits in an optimized manner. Among these circuits, one of the essential structures is a parallel multi-digit decimal adder unit with significant speed which is very attractive for future environments. To achieve high speed, a new correction logic formulation method is proposed for single and multi-digit BCD adder. The proposed enhanced single-digit BCD adder (ESDBA) is 26% faster than the carry flow adder (CFA)-based BCD adder. The multi-digit operations are also performed using the proposed ESDBA, which is cascaded innovatively. The enhanced multi-digit BCD adder (EMDBA) performs two 4-digit and two 8-digit BCD addition 50% faster than the CFA-based BCD adder with the nominal overhead of the area. The EMDBA performs two 4-digit BCD addition 24% faster with 23% decrease in the area, similarly for 8-digit operation the EMDBA achieves 36% increase in speed with 21% less area compared to the existing carry look ahead (CLA)-based BCD adder design. The proposed multi-digit adder produces significantly less delay of (N –1) + 3.5 clock cycles compared to the N* One digit BCD adder delay required by the conventional BCD adder method. It is observed that as per our knowledge this is the first innovative proposal for multi-digit BCD addition using QCA.
Design and analysis of APD photoelectric detecting circuit

NASA Astrophysics Data System (ADS)

Fang, R.; Wang, C.

2015-11-01

In LADAR system, photoelectric detecting circuit is the key part in photoelectric conversion, which determines speed of respond, sensitivity and fidelity of the system. This paper presents the design of a matched APD Photoelectric detecting circuit. The circuit accomplishes low-noise readout and high-gain amplification of the weak photoelectric signal. The main performances, especially noise and transient response of the circuit are analyzed. In order to obtain large bandwidth, decompensated operational amplifiers are applied. Circuit simulations allow the architecture validation and the global performances to be predicted. The simulation results show that the gain of the detecting circuit is 630kΩ while the bandwidth is 100MHz, and 28dB dynamic range is achieved. Furthermore, the variation of the output pulse width is less than 0.9ns.
Functional design criteria for interim stabilization safety class 1 trip circuit

DOE Office of Scientific and Technical Information (OSTI.GOV)

Larson, R.E., Westinghouse Hanford

1996-06-10

This Functional Design Criteria document outlines the basic requirements for the Safety Class 1 Trip Circuit. The objective of the Safety Class 1 Trip Circuit is to isolate the power circuitry to the Class 1 Division 2, Group B or lesser grade electrically fed loads located in the pump pit. The electrically fed load circuits need to have power isolated to them upon receipt of the following conditions, loss of flammable gases being released (above a predetermined threshold), and seismic(greater than 0.12g acceleration) activity. The two circuits requiring power isolation are the pump and heat trace power circuits. The Safetymore » Class 1 Trip Circuit will be used to support salt well pumping in SST`s containing potentially flammable gas-bearing / gas-producing radioactive waste.« less

Design of a front-end integrated circuit for 3D acoustic imaging using 2D CMUT arrays.

PubMed

Ciçek, Ihsan; Bozkurt, Ayhan; Karaman, Mustafa

2005-12-01

Integration of front-end electronics with 2D capacitive micromachined ultrasonic transducer (CMUT) arrays has been a challenging issue due to the small element size and large channel count. We present design and verification of a front-end drive-readout integrated circuit for 3D ultrasonic imaging using 2D CMUT arrays. The circuit cell dedicated to a single CMUT array element consists of a high-voltage pulser and a low-noise readout amplifier. To analyze the circuit cell together with the CMUT element, we developed an electrical CMUT model with parameters derived through finite element analysis, and performed both the pre- and postlayout verification. An experimental chip consisting of 4 X 4 array of the designed circuit cells, each cell occupying a 200 X 200 microm2 area, was formed for the initial test studies and scheduled for fabrication in 0.8 microm, 50 V CMOS technology. The designed circuit is suitable for integration with CMUT arrays through flip-chip bonding and the CMUT-on-CMOS process.
Computer-aided engineering of semiconductor integrated circuits

NASA Astrophysics Data System (ADS)

Meindl, J. D.; Dutton, R. W.; Gibbons, J. F.; Helms, C. R.; Plummer, J. D.; Tiller, W. A.; Ho, C. P.; Saraswat, K. C.; Deal, B. E.; Kamins, T. I.

1980-07-01

Economical procurement of small quantities of high performance custom integrated circuits for military systems is impeded by inadequate process, device and circuit models that handicap low cost computer aided design. The principal objective of this program is to formulate physical models of fabrication processes, devices and circuits to allow total computer-aided design of custom large-scale integrated circuits. The basic areas under investigation are (1) thermal oxidation, (2) ion implantation and diffusion, (3) chemical vapor deposition of silicon and refractory metal silicides, (4) device simulation and analytic measurements. This report discusses the fourth year of the program.
Cost optimization in low volume VLSI circuits

NASA Technical Reports Server (NTRS)

Cook, K. B., Jr.; Kerns, D. V., Jr.

1982-01-01

The relationship of integrated circuit (IC) cost to electronic system cost is developed using models for integrated circuit cost which are based on design/fabrication approach. Emphasis is on understanding the relationship between cost and volume for custom circuits suitable for NASA applications. In this report, reliability is a major consideration in the models developed. Results are given for several typical IC designs using off the shelf, full custom, and semicustom IC's with single and double level metallization.
Design and optimization of LCL-VSC grid-tied converter having short circuit fault current limiting ability

NASA Astrophysics Data System (ADS)

Liu, Mengqi; Liu, Haijun; Wang, Zhikai

2017-01-01

Traditional LCL grid-tied converters haven't the ability to limit the short-circuit fault current and only remove grid-connected converter using the breaker. However, the VSC converters become uncontrollable after the short circuit fault cutting off and the power switches may be damaged if the circuit breaker removes slowly. Compared to the filter function of the LCL passive components in traditional VSC converters, the novel LCL-VSC converter has the ability of limiting the short circuit fault current using the reasonable designed LCL parameters. In this paper the mathematical model of the LCL converter is established and the characteristics of the short circuit fault current generated by the ac side and dc side are analyzed. Thus one design and optimization scheme of the reasonable LCL passive parameter is proposed for the LCL-VSC converter having short circuit fault current limiting ability. In addition to ensuring the LCL passive components filtering the high-frequency harmonic, this scheme also considers the impedance characteristics to limit the fault current of AC and DC short circuit fault respectively flowing through the power switch no more than the maximum allowable operating current, in order to make the LCL converter working continuously. Finally, the 200kW simulation system is set up to prove the validity and feasibility of the theoretical analysis using the proposed design and optimization scheme.
Design and damping force characterization of a new magnetorheological damper activated by permanent magnet flux dispersion

NASA Astrophysics Data System (ADS)

Lee, Tae-Hoon; Han, Chulhee; Choi, Seung-Bok

2018-01-01

This work proposes a novel type of tunable magnetorheological (MR) damper operated based solely on the location of a permanent magnet incorporated into the piston. To create a larger damping force variation in comparison with the previous model, a different design configuration of the permanent-magnet-based MR (PMMR) damper is introduced to provide magnetic flux dispersion in two magnetic circuits by utilizing two materials with different magnetic reluctance. After discussing the design configuration and some advantages of the newly designed mechanism, the magnetic dispersion principle is analyzed through both the formulated analytical model of the magnetic circuit and the computer simulation based on the magnetic finite element method. Sequentially, the principal design parameters of the damper are determined and fabricated. Then, experiments are conducted to evaluate the variation in damping force depending on the location of the magnet. It is demonstrated that the new design and magnetic dispersion concept are valid showing higher damping force than the previous model. In addition, a curved structure of the two materials is further fabricated and tested to realize the linearity of the damping force variation.
A molecular-sized optical logic circuit for digital modulation of a fluorescence signal

NASA Astrophysics Data System (ADS)

Nishimura, Takahiro; Tsuchida, Karin; Ogura, Yusuke; Tanida, Jun

2018-03-01

Fluorescence measurement allows simultaneous detection of multiple molecular species by using spectrally distinct fluorescence probes. However, due to the broad spectra of fluorescence emission, the multiplicity of fluorescence measurement is generally limited. To overcome this limitation, we propose a method to digitally modulate fluorescence output signals with a molecular-sized optical logic circuit by using optical control of fluorescence resonance energy transfer (FRET). The circuit receives a set of optical inputs represented with different light wavelengths, and then it switches high and low fluorescence intensity from a reporting molecule according to the result of the logic operation. By using combinational optical inputs in readout of fluorescence signals, the number of biomolecular species that can be identified is increased. To implement the FRET-based circuits, we designed two types of basic elements, YES and NOT switches. An YES switch produces a high-level output intensity when receiving a designated light wavelength input and a low-level intensity without the light irradiation. A NOT switch operates inversely to the YES switch. In experiments, we investigated the operation of the YES and NOT switches that receive a 532-nm light input and modulate the fluorescence intensity of Alexa Fluor 488. The experimental result demonstrates that the switches can modulate fluorescence signals according to the optical input.
Lumped-parameters equivalent circuit for condenser microphones modeling.

PubMed

Esteves, Josué; Rufer, Libor; Ekeom, Didace; Basrour, Skandar

2017-10-01

This work presents a lumped parameters equivalent model of condenser microphone based on analogies between acoustic, mechanical, fluidic, and electrical domains. Parameters of the model were determined mainly through analytical relations and/or finite element method (FEM) simulations. Special attention was paid to the air gap modeling and to the use of proper boundary condition. Corresponding lumped-parameters were obtained as results of FEM simulations. Because of its simplicity, the model allows a fast simulation and is readily usable for microphone design. This work shows the validation of the equivalent circuit on three real cases of capacitive microphones, including both traditional and Micro-Electro-Mechanical Systems structures. In all cases, it has been demonstrated that the sensitivity and other related data obtained from the equivalent circuit are in very good agreement with available measurement data.
Implementation and initial test result of a prototype solid state modulator for pulsed magnetron

DOE Office of Scientific and Technical Information (OSTI.GOV)

Dake, Vishal; Mangalvedekar, H.A., E-mail: vishaldake90@gmail.com; Tillu, Abhijit

2014-07-01

A solid-state modulator rated for 50 kV, 120A, 4μs and 250 Hz has been designed. The discharging circuit of the modulator is being tested at ∼ 33 kV, 40-80A, at a maximum pulse repetition rate of 30 pps. The paper discusses development and testing of prototype discharging circuit on resistive load and magnetron. The technique used for measurement of pulse transformer leakage inductance, distributed capacitance and stray primary circuit series inductance will also be discussed in detail. It is necessary to have Energy Storage Capacitors with low ESL for these applications (ESL < 40 nH). The method used for evaluatingmore » the ESL of locally available metalized polypropylene capacitors will also be presented. (author)« less
Liquid on Paper: Rapid Prototyping of Soft Functional Components for Paper Electronics.

PubMed

Han, Yu Long; Liu, Hao; Ouyang, Cheng; Lu, Tian Jian; Xu, Feng

2015-07-01

This paper describes a novel approach to fabricate paper-based electric circuits consisting of a paper matrix embedded with three-dimensional (3D) microchannels and liquid metal. Leveraging the high electric conductivity and good flowability of liquid metal, and metallophobic property of paper, it is possible to keep electric and mechanical functionality of the electric circuit even after a thousand cycles of deformation. Embedding liquid metal into paper matrix is a promising method to rapidly fabricate low-cost, disposable, and soft electric circuits for electronics. As a demonstration, we designed a programmable displacement transducer and applied it as variable resistors and pressure sensors. The unique metallophobic property, combined with softness, low cost and light weight, makes paper an attractive alternative to other materials in which liquid metal are currently embedded.
Direct current hybrid breakers: A design and its realization

NASA Astrophysics Data System (ADS)

Atmadji, Ali Mahfudz Surya

2000-12-01

The use of semiconductors for electric power circuit breakers instead of conventional breakers remains a utopia when designing fault current interrupters for high power networks. The major problems concerning power semiconductor circuit breakers are the excessive heat losses and their sensitivity to transients. However, conventional breakers are capable of dealing with such matters. A combination of the two methods, or so-called `hybrid breakers', would appear to be a solution; however, hybrid breakers use separate parallel branches for conducting the main current and interrupting the short-circuit current. Such breakers are intended for protecting direct current (DC) traction systems. In this thesis hybrid switching techniques for current limitation and purely solidstate current interruption are investigated for DC breakers. This work analyzes the transient behavior of hybrid breakers and compares their operations with conventional breakers and similar solid-state devices in DC systems. Therefore a hybrid breaker was constructed and tested in a specially designed high power test circuit. A vacuum breaker was chosen as the main breaker in the main conducting path; then a commutation path was connected across the vacuum breaker where it provided current limitation and interruption. The commutation path operated only during any current interruption and the process required additional circuits. These included a certain energy storage, overvoltage suppressor and commutation switch. So that when discharging this energy, a controlled counter-current injection could be produced. That counter-current opposed the main current in the breaker by superposition in order to create a forced current-zero. One-stage and two-stage commutation circuits have been treated extensively. This study project contains both theoretical and experimental investigations. A direct current shortcircuit source was constructed capable of delivering power equivalent to a fault. It supplied a direct voltage of 1kVDC which was rectified having been obtained from a 3-phase lOkV/380V supply. The source was successfully tested to deliver a fault current of 7kA with a time constant of 5ms. The hybrid breaker that was developed could provide protection for 750VDC traction systems. The breaker was equipped with a fault- recognizing circuit based on a current level triggering. An electronic circuit was built for this need and was included in the system. It monitored the system continuously and took action by generating trip signals when a fault was recognized. Interruption was followed by a suitable timing of the fast contact separation in the main breaker and the current-zero creation. An electrodynamically driven mechanism was successfully tested having a dead-time of 300μs to separate the main breaker contacts. Furthermore, a maximum peak current injection of RA at a frequency of 500Hz could be obtained in order to produce an artificial current-zero in the vacuum breaker. A successful current interruption with a prospective value of RA was achieved by the hybrid switching technique. In addition, measures were taken to prevent overvoltages. Experimentally, the concept of a hybrid breaker was compared with the functioning of all mechanical (air breaker) and all electronical (IGCT breaker) versions. Although a single stage interrupting method was verified experimentally, two two-stage interrupting methods were analyzed theoretically.
46 CFR 169.670 - Circuit breakers.

Code of Federal Regulations, 2010 CFR

2010-10-01

... Gross Tons § 169.670 Circuit breakers. Each circuit breaker must be of the manually reset type designed for— (a) Inverse time delay; (b) Instantaneous short circuit protection; and (c) Repeated opening of... 46 Shipping 7 2010-10-01 2010-10-01 false Circuit breakers. 169.670 Section 169.670 Shipping COAST...
Toward Wireless Health Monitoring via an Analog Signal Compression-Based Biosensing Platform.

PubMed

Zhao, Xueyuan; Sadhu, Vidyasagar; Le, Tuan; Pompili, Dario; Javanmard, Mehdi

2018-06-01

Wireless all-analog biosensor design for the concurrent microfluidic and physiological signal monitoring is presented in this paper. The key component is an all-analog circuit capable of compressing two analog sources into one analog signal by the analog joint source-channel coding (AJSCC). Two circuit designs are discussed, including the stacked-voltage-controlled voltage source (VCVS) design with the fixed number of levels, and an improved design, which supports a flexible number of AJSCC levels. Experimental results are presented on the wireless biosensor prototype, composed of printed circuit board realizations of the stacked-VCVS design. Furthermore, circuit simulation and wireless link simulation results are presented on the improved design. Results indicate that the proposed wireless biosensor is well suited for sensing two biological signals simultaneously with high accuracy, and can be applied to a wide variety of low-power and low-cost wireless continuous health monitoring applications.
Optimizing MOS-gated thyristor using voltage-based equivalent circuit model for designing steep-subthreshold-slope PN-body-tied silicon-on-insulator FET

NASA Astrophysics Data System (ADS)

Ueda, Daiki; Takeuchi, Kiyoshi; Kobayashi, Masaharu; Hiramoto, Toshiro

2018-04-01

A new circuit model that provides a clear guide on designing a MOS-gated thyristor (MGT) is reported. MGT plays a significant role in achieving a steep subthreshold slope of a PN-body tied silicon-on-insulator (SOI) FET (PNBTFET), which is an SOI MOSFET merged with an MGT. The effects of design parameters on MGT and the proposed equivalent circuit model are examined to determine how to regulate the voltage response of MGT and how to suppress power dissipation. It is demonstrated that MGT with low threshold voltages, small hysteresis widths, and small power dissipation can be designed by tuning design parameters. The temperature dependence of MGT is also examined, and it is confirmed that hysteresis width decreases with the average threshold voltage kept nearly constant as temperature rises. The equivalent circuit model can be conveniently used to design low-power PNBTFET.
Design of a gap tunable flux qubit with FastHenry

NASA Astrophysics Data System (ADS)

Akhtar, Naheed; Zheng, Yarui; Nazir, Mudassar; Wu, Yulin; Deng, Hui; Zheng, Dongning; Zhu, Xiaobo

2016-12-01

In the preparations of superconducting qubits, circuit design is a vital process because the parameters and layout of the circuit not only determine the way we address the qubits, but also strongly affect the qubit coherence properties. One of the most important circuit parameters, which needs to be carefully designed, is the mutual inductance among different parts of a superconducting circuit. In this paper we demonstrate how to design a gap-tunable flux qubit by layout design and inductance extraction using a fast field solver FastHenry. The energy spectrum of the gap-tunable flux qubit shows that the measured parameters are close to the design values. Project supported by the National Natural Science Foundation of China (Grant Nos. 11374344, 11404386, and 91321208), the National Basic Research Program of China (Grant No. 2014CB921401), and the Strategic Priority Research Program of the Chinese Academy of Sciences (Grant No. XDB07010300).
Reduced Power Laer Designation Systems

DTIC Science & Technology

2008-06-20

200KD, Ri = = 60Kfl, and R 2 = R4 = 2K yields an overall transimpedance gain of 200K x 30 x 30 = 180MV/A. Figure 3. Three stage photodiode amplifier ...transistor circuit for bootstrap buffering of the input stage, comparing the noise performance of the candidate amplifier designs, selecting the two...transistor bootstrap design as the circuit of choice, and comparing the performance of this circuit against that of a basic transconductance amplifier
Circuit Design Features of a Stable Two-Cell System.

PubMed

Zhou, Xu; Franklin, Ruth A; Adler, Miri; Jacox, Jeremy B; Bailis, Will; Shyer, Justin A; Flavell, Richard A; Mayo, Avi; Alon, Uri; Medzhitov, Ruslan

2018-02-08

Cell communication within tissues is mediated by multiple paracrine signals including growth factors, which control cell survival and proliferation. Cells and the growth factors they produce and receive constitute a circuit with specific properties that ensure homeostasis. Here, we used computational and experimental approaches to characterize the features of cell circuits based on growth factor exchange between macrophages and fibroblasts, two cell types found in most mammalian tissues. We found that the macrophage-fibroblast cell circuit is stable and robust to perturbations. Analytical screening of all possible two-cell circuit topologies revealed the circuit features sufficient for stability, including environmental constraint and negative-feedback regulation. Moreover, we found that cell-cell contact is essential for the stability of the macrophage-fibroblast circuit. These findings illustrate principles of cell circuit design and provide a quantitative perspective on cell interactions. Copyright © 2018 Elsevier Inc. All rights reserved.
The design of high performance, low power triple-track magnetic sensor chip.

PubMed

Wu, Xiulong; Li, Minghua; Lin, Zhiting; Xi, Mengyuan; Chen, Junning

2013-07-09

This paper presents a design of a high performance and low power consumption triple-track magnetic sensor chip which was fabricated in TSMC 0.35 μm CMOS process. This chip is able to simultaneously sense, decode and read out the information stored in triple-track magnetic cards. A reference voltage generating circuit, a low-cost filter circuit, a power-on reset circuit, an RC oscillator, and a pre-decoding circuit are utilized as the basic modules. The triple-track magnetic sensor chip has four states, i.e., reset, sleep, swiping card and data read-out. In sleep state, the internal RC oscillator is closed, which means that the digital part does not operate to optimize energy consumption. In order to improve decoding accuracy and expand the sensing range of the signal, two kinds of circuit are put forward, naming offset correction circuit, and tracking circuit. With these two circuits, the sensing function of this chip can be more efficiently and accurately. We simulated these circuit modules with TSMC technology library. The results showed that these modules worked well within wide range input signal. Based on these results, the layout and tape-out were carried out. The measurement results showed that the chip do function well within a wide swipe speed range, which achieved the design target.
The Design of High Performance, Low Power Triple-Track Magnetic Sensor Chip

PubMed Central

Wu, Xiulong; Li, Minghua; Lin, Zhiting; Xi, Mengyuan; Chen, Junning

2013-01-01

This paper presents a design of a high performance and low power consumption triple-track magnetic sensor chip which was fabricated in TSMC 0.35 μm CMOS process. This chip is able to simultaneously sense, decode and read out the information stored in triple-track magnetic cards. A reference voltage generating circuit, a low-cost filter circuit, a power-on reset circuit, an RC oscillator, and a pre-decoding circuit are utilized as the basic modules. The triple-track magnetic sensor chip has four states, i.e., reset, sleep, swiping card and data read-out. In sleep state, the internal RC oscillator is closed, which means that the digital part does not operate to optimize energy consumption. In order to improve decoding accuracy and expand the sensing range of the signal, two kinds of circuit are put forward, naming offset correction circuit, and tracking circuit. With these two circuits, the sensing function of this chip can be more efficiently and accurately. We simulated these circuit modules with TSMC technology library. The results showed that these modules worked well within wide range input signal. Based on these results, the layout and tape-out were carried out. The measurement results showed that the chip do function well within a wide swipe speed range, which achieved the design target. PMID:23839231
Predicting the behavior of microfluidic circuits made from discrete elements

PubMed Central

Bhargava, Krisna C.; Thompson, Bryant; Iqbal, Danish; Malmstadt, Noah

2015-01-01

Microfluidic devices can be used to execute a variety of continuous flow analytical and synthetic chemistry protocols with a great degree of precision. The growing availability of additive manufacturing has enabled the design of microfluidic devices with new functionality and complexity. However, these devices are prone to larger manufacturing variation than is typical of those made with micromachining or soft lithography. In this report, we demonstrate a design-for-manufacturing workflow that addresses performance variation at the microfluidic element and circuit level, in context of mass-manufacturing and additive manufacturing. Our approach relies on discrete microfluidic elements that are characterized by their terminal hydraulic resistance and associated tolerance. Network analysis is employed to construct simple analytical design rules for model microfluidic circuits. Monte Carlo analysis is employed at both the individual element and circuit level to establish expected performance metrics for several specific circuit configurations. A protocol based on osmometry is used to experimentally probe mixing behavior in circuits in order to validate these approaches. The overall workflow is applied to two application circuits with immediate use at on the bench-top: series and parallel mixing circuits that are modularly programmable, virtually predictable, highly precise, and operable by hand. PMID:26516059
A simple filter circuit for denoising biomechanical impact signals.

PubMed

Subramaniam, Suba R; Georgakis, Apostolos

2009-01-01

We present a simple scheme for denoising non-stationary biomechanical signals with the aim of accurately estimating their second derivative (acceleration). The method is based on filtering in fractional Fourier domains using well-known low-pass filters in a way that amounts to a time-varying cut-off threshold. The resulting algorithm is linear and its design is facilitated by the relationship between the fractional Fourier transform and joint time-frequency representations. The implemented filter circuit employs only three low-order filters while its efficiency is further supported by the low computational complexity of the fractional Fourier transform. The results demonstrate that the proposed method can denoise the signals effectively and is more robust against noise as compared to conventional low-pass filters.

AMICAL: An aid for architectural synthesis and exploration of control circuits

NASA Astrophysics Data System (ADS)

Park, Inhag

AMICAL is an architectural synthesis system for control flow dominated circuits. A behavioral finite state machine specification, where the scheduling and register allocation were performed, is presented. An abstract architecture specification that may feed existing silicon compilers acting at the logic and register transfer levels is described. AMICAL consists of five main functions allowing automatic, interactive and manual synthesis, as well as the combination of these methods. These functions are a synthesizer, a graphics editor, a verifier, an evaluator, and a documentor. Automatic synthesis is achieved by algorithms that allocate both functional units, stored in an expandable user defined library, and connections. AMICAL also allows the designer to interrupt the synthesis process at any stage and make interactive modifications via a specially designed graphics editor. The user's modifications are verified and evaluated to ensure that no design rules are broken and that any imposed constraints are still met. A documentor provides the designer with status and feedback reports from the synthesis process.
[Application of microelectronics CAD tools to synthetic biology].

PubMed

Madec, Morgan; Haiech, Jacques; Rosati, Élise; Rezgui, Abir; Gendrault, Yves; Lallement, Christophe

2017-02-01

Synthetic biology is an emerging science that aims to create new biological functions that do not exist in nature, based on the knowledge acquired in life science over the last century. Since the beginning of this century, several projects in synthetic biology have emerged. The complexity of the developed artificial bio-functions is relatively low so that empirical design methods could be used for the design process. Nevertheless, with the increasing complexity of biological circuits, this is no longer the case and a large number of computer aided design softwares have been developed in the past few years. These tools include languages for the behavioral description and the mathematical modelling of biological systems, simulators at different levels of abstraction, libraries of biological devices and circuit design automation algorithms. All of these tools already exist in other fields of engineering sciences, particularly in microelectronics. This is the approach that is put forward in this paper. © 2017 médecine/sciences – Inserm.
A Micromechanical RF Channelizer

NASA Astrophysics Data System (ADS)

Akgul, Mehmet

The power consumption of a radio generally goes as the number and strength of the RF signals it must process. In particular, a radio receiver would consume much less power if the signal presented to its electronics contained only the desired signal in a tiny percent bandwidth frequency channel, rather than the typical mix of signals containing unwanted energy outside the desired channel. Unfortunately, a lack of filters capable of selecting single channel bandwidths at RF forces the front-ends of contemporary receivers to accept unwanted signals, and thus, to operate with sub-optimal efficiency. This dissertation focuses on the degree to which capacitive-gap transduced micromechanical resonators can achieve the aforementioned RF channel-selecting filters. It aims to first show theoretically that with appropriate scaling capacitive-gap transducers are strong enough to meet the needed coupling requirements; and second, to fully detail an architecture and design procedure needed to realize said filters. Finally, this dissertation provides an actual experimentally demonstrated RF channel-select filter designed using the developed procedures and confirming theoretical predictions. Specifically, this dissertation introduces four methods that make possible the design and fabrication of RF channel-select filters. The first of these introduces a small-signal equivalent circuit for parallel-plate capacitive-gap transduced micromechanical resonators that employs negative capacitance to model the dependence of resonance frequency on electrical stiffness in a way that facilitates the analysis of micromechanical circuits loaded with arbitrary electrical impedances. The new circuit model not only correctly predicts the dependence of electrical stiffness on the impedances loading the input and output electrodes of parallel-plate capacitive-gap transduced micromechanical device, but does so in a visually intuitive way that identifies current drive as most appropriate for applications that must be stable against environmental perturbations, such as acceleration or power supply variations. Measurements on fabricated devices in fact confirm predictions by the new model of up to 4x improvement in frequency stability against DC-bias voltage variations for contour-mode disk resonators as the resistance loading their ports increases. By enhancing circuit visualization, this circuit model makes more obvious the circuit design procedures and topologies most beneficial for certain mechanical circuits, e.g., filters and oscillators. The second method enables simultaneous low motional resistance ( Rx 70,000) at 61 MHz using an improved ALD-partial electrode-to-resonator gap filling technique that reduces the Q-limiting surface losses of previous renditions by adding an alumina pre-coating before ALD of the gap-filling high-k dielectric. This effort increases the Q over the ˜10,000 of previous renditions by more than 6x towards demonstration of the first VHF micromechanical resonators in any material, piezoelectric or not, to meet the simultaneous high Q (>50,000) and low motional resistance Rx (< 200O) specs highly desired for front-end frequency channelizer requirements in cognitive and software-defined radio architectures. The methods presented in this chapter finally overcome the high impedance bottleneck that has plagued capacitively transduced micro-mechanical resonators over the past decade. The third method introduces a capacitively transduced micromechanical resonator constructed in hot filament CVD boron-doped microcrystalline diamond (MCD) structural material that posts a measured Q of 146,580 at 232.441 kHz, which is 3x higher than the previous high for conductive polydiamond. Moreover, radial-contour mode disk resonators fabricated in the same MCD film and using material mismatched stems exhibit a Q of 71,400 at 299.86 MHz. The material used here further exhibits an acoustic velocity of 18,516 m/s, which is now the highest to date among available surface micromachinable materials. For many potential applications, the hot filament CVD method demonstrated in this work is quite enabling, since it provides a much less expensive method than microwave CVD based alternatives for depositing doped CVD diamond over large wafers (e.g., 8") for batch fabrication. The first three methods described so far focus on a single vibrating disk resonator and improve its electrical equivalent modeling, C x/Co, and Q. Once we craft the resonator that meets the challenging design requirements of RF channel-select filters, the last method presents a design hierarchy that achieves the desired filter response with a specific center frequency, bandwidth, and filter termination resistance. The design procedure culminates in specific values for all mechanical geometry variables necessary for the filter layout, such as disk radii, and beam widths; and process design variables such as resonator material thickness and capacitive actuation gap spacing. Finally, the experimental results introduce a 39nm-gap capacitive transducer, voltage-controlled frequency tuning, and a stress relieving coupled array design that enable a 0.09% bandwidth 223.4 MHz channel-select filter with only 2.7dB of in-band insertion loss and 50dB rejection of out-of-band interferers. This amount of rejection is more than 23dB better than previous capacitive-gap transduced filter designs that did not benefit from sub-50nm gaps. It also comes in tandem with a 20dB shape factor of 2.7 realized by a hierarchical mechanical circuit design utilizing 206 micromechanical circuit elements, all contained in an area footprint of only 600mumx420mum. The key to such low insertion loss for this tiny percent bandwidth is Q's>8,800 supplied by polysilicon disk resonators employing for the first time capacitive transducer gaps small enough to generate coupling strengths of C x/Co ˜0.1%, which is a 6.1x improvement over previous efforts. The filter structure utilizes electrical tuning to correct frequency mismatches due to process variations, where a dc tuning voltage of 12.1 V improves the filter insertion loss by 1.8 dB and yields the desired equiripple passband shape. An electrical equivalent circuit is presented that captures not only the ideal filter response, but also parasitic non-idealities that create electrical feed-through, where simulation of the derived equivalent circuit matches the measured filter spectrum closely both in-band and out-of-band. The combined 2.7dB passband insertion loss and 50dB stopband rejection of the demonstrated 206-element 0.09% bandwidth 223.4-MHz differential micromechanical disk filter represents a landmark for capacitive-gap transduced micromechanical resonator technology. This demonstration proves that the mere introduction of small gaps, on the order of 39 nm, goes a long way towards moving this technology from a research curiosity to practical performance specs commensurate with the needs of actual RF channel-selecting receiver front-ends. It also emphasizes the need for tuning and defensive stress-relieving structural design when percent bandwidths and gaps shrink, all demonstrated by the work herein. Perhaps most encouraging is that the models presented in dissertation used to design the filter and predict its behavior seem to be all be spot on. This means that predictions using these models foretelling 1-GHz filters with sub-200O impedances enabled by 20nm-gaps might soon come true, bringing this technology ever closer to someday realizing the ultra-low power channel-selecting communication front-ends targeted for autonomous set-and-forget sensor networks. Work towards these goals continues.
RAD hard PROM design study

NASA Technical Reports Server (NTRS)

1981-01-01

The results of a preliminary study on the design of a radiation hardened fusible link programmable read-only memory (PROM) are presented. Various fuse technologies and the effects of radiation on MOS integrated circuits are surveyed. A set of design rules allowing the fabrication of a radiation hardened PROM using a Si-gate CMOS process is defined. A preliminary cell layout was completed and the programming concept defined. A block diagram is used to describe the circuit components required for a 4 K design. A design goal data sheet giving target values for the AC, DC, and radiation parameters of the circuit is presented.
Electromagnetic phenomena analysis in brushless DC motor with speed control using PWM method

NASA Astrophysics Data System (ADS)

Ciurys, Marek Pawel

2017-12-01

Field-circuit model of a brushless DC motor with speed control using PWM method was developed. Waveforms of electrical and mechanical quantities of the designed motor with a high pressure vane pump built in a rotor of the motor were computed. Analysis of electromagnetic phenomena in the system: single phase AC network - converter - BLDC motor was carried out.
Graphene-on-silicon hybrid plasmonic-photonic integrated circuits.

PubMed

Xiao, Ting-Hui; Cheng, Zhenzhou; Goda, Keisuke

2017-06-16

Graphene surface plasmons (GSPs) have shown great potential in biochemical sensing, thermal imaging, and optoelectronics. To excite GSPs, several methods based on the near-field optical microscope and graphene nanostructures have been developed in the past few years. However, these methods suffer from their bulky setups and low GSP-excitation efficiency due to the short interaction length between free-space vertical excitation light and the atomic layer of graphene. Here we present a CMOS-compatible design of graphene-on-silicon hybrid plasmonic-photonic integrated circuits that achieve the in-plane excitation of GSP polaritons as well as localized surface plasmon (SP) resonance. By employing a suspended membrane slot waveguide, our design is able to excite GSP polaritons on a chip. Moreover, by utilizing a graphene nanoribbon array, we engineer the transmission spectrum of the waveguide by excitation of localized SP resonance. Our theoretical and computational study paves a new avenue to enable, modulate, and monitor GSPs on a chip, potentially applicable for the development of on-chip electro-optic devices.
Interrogating the topological robustness of gene regulatory circuits by randomization

PubMed Central

Levine, Herbert; Onuchic, Jose N.

2017-01-01

One of the most important roles of cells is performing their cellular tasks properly for survival. Cells usually achieve robust functionality, for example, cell-fate decision-making and signal transduction, through multiple layers of regulation involving many genes. Despite the combinatorial complexity of gene regulation, its quantitative behavior has been typically studied on the basis of experimentally verified core gene regulatory circuitry, composed of a small set of important elements. It is still unclear how such a core circuit operates in the presence of many other regulatory molecules and in a crowded and noisy cellular environment. Here we report a new computational method, named random circuit perturbation (RACIPE), for interrogating the robust dynamical behavior of a gene regulatory circuit even without accurate measurements of circuit kinetic parameters. RACIPE generates an ensemble of random kinetic models corresponding to a fixed circuit topology, and utilizes statistical tools to identify generic properties of the circuit. By applying RACIPE to simple toggle-switch-like motifs, we observed that the stable states of all models converge to experimentally observed gene state clusters even when the parameters are strongly perturbed. RACIPE was further applied to a proposed 22-gene network of the Epithelial-to-Mesenchymal Transition (EMT), from which we identified four experimentally observed gene states, including the states that are associated with two different types of hybrid Epithelial/Mesenchymal phenotypes. Our results suggest that dynamics of a gene circuit is mainly determined by its topology, not by detailed circuit parameters. Our work provides a theoretical foundation for circuit-based systems biology modeling. We anticipate RACIPE to be a powerful tool to predict and decode circuit design principles in an unbiased manner, and to quantitatively evaluate the robustness and heterogeneity of gene expression. PMID:28362798
Placement of clock gates in time-of-flight optoelectronic circuits

NASA Astrophysics Data System (ADS)

Feehrer, John R.; Jordan, Harry F.

1995-12-01

Time-of-flight synchronized optoelectronic circuits capitalize on the highly controllable delays of optical waveguides. Circuits have no latches; synchronization is achieved by adjustment of the lengths of waveguides that connect circuit elements. Clock gating and pulse stretching are used to restore timing and power. A functional circuit requires that every feedback loop contain at least one clock gate to prevent cumulative timing drift and power loss. A designer specifies an ideal circuit, which contains no or very few clock gates. To make the circuit functional, we must identify locations in which to place clock gates. Because clock gates are expensive, add area, and increase delay, a minimal set of locations is desired. We cast this problem in graph-theoretical form as the minimum feedback edge set problem and solve it by using an adaptation of an algorithm proposed in 1966 [IEEE Trans. Circuit Theory CT-13, 399 (1966)]. We discuss a computer-aided-design implementation of the algorithm that reduces computational complexity and demonstrate it on a set of circuits.
Synthetic Biology: A Unifying View and Review Using Analog Circuits.

PubMed

Teo, Jonathan J Y; Woo, Sung Sik; Sarpeshkar, Rahul

2015-08-01

We review the field of synthetic biology from an analog circuits and analog computation perspective, focusing on circuits that have been built in living cells. This perspective is well suited to pictorially, symbolically, and quantitatively representing the nonlinear, dynamic, and stochastic (noisy) ordinary and partial differential equations that rigorously describe the molecular circuits of synthetic biology. This perspective enables us to construct a canonical analog circuit schematic that helps unify and review the operation of many fundamental circuits that have been built in synthetic biology at the DNA, RNA, protein, and small-molecule levels over nearly two decades. We review 17 circuits in the literature as particular examples of feedforward and feedback analog circuits that arise from special topological cases of the canonical analog circuit schematic. Digital circuit operation of these circuits represents a special case of saturated analog circuit behavior and is automatically incorporated as well. Many issues that have prevented synthetic biology from scaling are naturally represented in analog circuit schematics. Furthermore, the deep similarity between the Boltzmann thermodynamic equations that describe noisy electronic current flow in subthreshold transistors and noisy molecular flux in biochemical reactions has helped map analog circuit motifs in electronics to analog circuit motifs in cells and vice versa via a `cytomorphic' approach. Thus, a body of knowledge in analog electronic circuit design, analysis, simulation, and implementation may also be useful in the robust and efficient design of molecular circuits in synthetic biology, helping it to scale to more complex circuits in the future.
Design and implementation of improved LsCpLp resonant circuit for power supply for high-power electromagnetic acoustic transducer excitation

NASA Astrophysics Data System (ADS)

Zao, Yongming; Ouyang, Qi; Chen, Jiawei; Zhang, Xinglan; Hou, Shuaicheng

2017-08-01

This paper investigates the design and implementation of an improved series-parallel inductor-capacitor-inductor (LsCpLp) resonant circuit power supply for excitation of electromagnetic acoustic transducers (EMATs). The main advantage of the proposed resonant circuit is the absence of a high-permeability dynamic transformer. A high-frequency pulsating voltage gain can be achieved through a double resonance phenomenon. Both resonant tailing behavior and higher harmonics are suppressed by the improved resonant circuit, which also contributes to the generation of ultrasonic waves. Additionally, the proposed circuit can realize impedance matching and can also optimize the transduction efficiency. The complete design and implementation procedure for the power supply is described and has been validated by implementation of the proposed power supply to drive a portable EMAT. The circuit simulation results show close agreement with the experimental results and thus confirm the validity of the proposed topology. The proposed circuit is suitable for use as a portable EMAT excitation power supply that is fed by a low-voltage source.
FAST: a framework for simulation and analysis of large-scale protein-silicon biosensor circuits.

PubMed

Gu, Ming; Chakrabartty, Shantanu

2013-08-01

This paper presents a computer aided design (CAD) framework for verification and reliability analysis of protein-silicon hybrid circuits used in biosensors. It is envisioned that similar to integrated circuit (IC) CAD design tools, the proposed framework will be useful for system level optimization of biosensors and for discovery of new sensing modalities without resorting to laborious fabrication and experimental procedures. The framework referred to as FAST analyzes protein-based circuits by solving inverse problems involving stochastic functional elements that admit non-linear relationships between different circuit variables. In this regard, FAST uses a factor-graph netlist as a user interface and solving the inverse problem entails passing messages/signals between the internal nodes of the netlist. Stochastic analysis techniques like density evolution are used to understand the dynamics of the circuit and estimate the reliability of the solution. As an example, we present a complete design flow using FAST for synthesis, analysis and verification of our previously reported conductometric immunoassay that uses antibody-based circuits to implement forward error-correction (FEC).
Design of integrated laser initiator

NASA Astrophysics Data System (ADS)

Cao, Chunqiang; He, Aifeng; Jing, Bo; Ma, Yue

2018-03-01

This paper analyzes the design principle of integrated laser detonator, introduces the design method of integrated laser Detonators. Based on the integrated laser detonator, structure, laser energy -exchange device, circuit design and the energetic material properties and the charge parameters, developed a high level of integration Antistatic ability Small size of the integrated laser prototype Detonator. The laser detonator prototype antistatic ability of 25 kV. The research of this paper can solve the key design of laser detonator miniaturization and integration of weapons and equipment, satisfy the electromagnetic safety and micro weapons development of explosive demand.
On Polymorphic Circuits and Their Design Using Evolutionary Algorithms

NASA Technical Reports Server (NTRS)

Stoica, Adrian; Zebulum, Ricardo; Keymeulen, Didier; Lohn, Jason; Clancy, Daniel (Technical Monitor)

2002-01-01

This paper introduces the concept of polymorphic electronics (polytronics) - referring to electronics with superimposed built-in functionality. A function change does not require switches/reconfiguration as in traditional approaches. Instead the change comes from modifications in the characteristics of devices involved in the circuit, in response to controls such as temperature, power supply voltage (VDD), control signals, light, etc. The paper illustrates polytronic circuits in which the control is done by temperature, morphing signals, and VDD respectively. Polytronic circuits are obtained by evolutionary design/evolvable hardware techniques. These techniques are ideal for the polytronics design, a new area that lacks design guidelines, know-how,- yet the requirements/objectives are easy to specify and test. The circuits are evolved/synthesized in two different modes. The first mode explores an unstructured space, in which transistors can be interconnected freely in any arrangement (in simulations only). The second mode uses a Field Programmable Transistor Array (FPTA) model, and the circuit topology is sought as a mapping onto a programmable architecture (these experiments are performed both in simulations and on FPTA chips). The experiments demonstrated the synthesis. of polytronic circuits by evolution. The capacity of storing/hiding "extra" functions provides for watermark/invisible functionality, thus polytronics may find uses in intelligence/security applications.
Determining distinct circuit in complete graphs using permutation

NASA Astrophysics Data System (ADS)

Karim, Sharmila; Ibrahim, Haslinda; Darus, Maizon Mohd

2017-11-01

A Half Butterfly Method (HBM) is a method introduced to construct the distinct circuits in complete graphs where used the concept of isomorphism. The Half Butterfly Method was applied in the field of combinatorics such as in listing permutations of n elements. However the method of determining distinct circuit using HBM for n > 4 is become tedious. Thus, in this paper, we present the method of generating distinct circuit using permutation.
A 10kW series resonant converter design, transistor characterization, and base-drive optimization

NASA Technical Reports Server (NTRS)

Robson, R.; Hancock, D.

1981-01-01

Transistors are characterized for use as switches in resonant circuit applications. A base drive circuit to provide the optimal base drive to these transistors under resonant circuit conditions is developed and then used in the design, fabrication and testing of a breadboard, spaceborne type 10 kW series resonant converter.
Simulated Laboratory in Digital Logic.

ERIC Educational Resources Information Center

Cleaver, Thomas G.

Design of computer circuits used to be a pencil and paper task followed by laboratory tests, but logic circuit design can now be done in half the time as the engineer accesses a program which simulates the behavior of real digital circuits, and does all the wiring and testing on his computer screen. A simulated laboratory in digital logic has been…
Experiences in Digital Circuit Design Courses: A Self-Study Platform for Learning Support

ERIC Educational Resources Information Center

Bañeres, David; Clarisó, Robert; Jorba, Josep; Serra, Montse

2014-01-01

The synthesis of digital circuits is a basic skill in all the bachelor programmes around the ICT area of knowledge, such as Computer Science, Telecommunication Engineering or Electrical Engineering. An important hindrance in the learning process of this skill is that the existing educational tools for the design of circuits do not allow the…
Circuit Sense for Elementary Teachers and Students: Understanding and Building Simple Logic Circuits.

ERIC Educational Resources Information Center

Houghton, Janaye Matteson; Houghton, Robert S.

Today and in the future, critical toolmaking advances will need to be made in the area of circuit design, construction, and implementation. Traditional school curriculum has sidestepped the area of tool design, especially at the elementary level. This publication addresses a calling for a new curriculum direction, based not only on the study of…
Computer-Aided Design Package for Designers of Digital Optical Computers

DTIC Science & Technology

1991-02-01

circuit depth and in circuit breadth. It appears, from initial studies by PhD students Gupta and Majidi using the newly modified tools, that a few irregular...Gupta, which is based on an earlier tool developed by Majidi . The tool allows logic gates to have fan-ins and fan-outs that vary, and allows circuits
Schematic driven silicon photonics design

NASA Astrophysics Data System (ADS)

Chrostowski, Lukas; Lu, Zeqin; Flückiger, Jonas; Pond, James; Klein, Jackson; Wang, Xu; Li, Sarah; Tai, Wei; Hsu, En Yao; Kim, Chan; Ferguson, John; Cone, Chris

2016-03-01

Electronic circuit designers commonly start their design process with a schematic, namely an abstract representation of the physical circuit. In integrated photonics on the other hand, it is very common for the design to begin at the physical component level. In order to build large integrated photonic systems, it is crucial to design using a schematic-driven approach. This includes simulations based on schematics, schematic-driven layout, layout versus schematic verification, and post-layout simulations. This paper describes such a design framework implemented using Mentor Graphics and Lumerical Solutions design tools. In addition, we describe challenges in silicon photonics related to manufacturing, and how these can be taken into account in simulations and how these impact circuit performance.

Broadband complex permeability characterization of magnetic thin films using shorted microstrip transmission-line perturbation

NASA Astrophysics Data System (ADS)

Liu, Yan; Chen, Linfeng; Tan, C. Y.; Liu, H. J.; Ong, C. K.

2005-06-01

A brief review of the methods used for broadband complex permeability measurement of magnetic thin films up to microwave frequencies is given. In particular, the working principles of the transmission-line perturbation methods for the characterization of magnetic thin films are discussed, with emphasis on short-circuited planar transmission-line perturbation methods. The algorithms for calculating the complex permeability of magnetic thin films for short-circuited planar transmission-line perturbation methods are analyzed. A shorted microstrip line is designed and fabricated as a prototype measurement fixture. The structure of the microstrip fixture and the corresponding measurement procedure are discussed in detail. A piece of 340 nm thick FeTaN thin film deposited on Si substrate using sputtering method is characterized using the microstrip fixture. An improved technique for obtaining permeability by using a saturation magnetization field is demonstrated here, and the results fit well with the Landau-Lifchitz-Gilbert theory. Approaches to extending this method to other aspects in the investigation of magnetic thin film are also discussed.
A Integrated Circuit for a Biomedical Capacitive Pressure Transducer

NASA Astrophysics Data System (ADS)

Smith, Michael John Sebastian

Medical research has an urgent need for a small, accurate, stable, low-power, biocompatible and inexpensive pressure sensor with a zero to full-scale range of 0-300 mmHg. An integrated circuit (IC) for use with a capacitive pressure transducer was designed, built and tested. The random pressure measurement error due to resolution and non-linearity is (+OR-)0.4 mmHg (at mid-range with a full -scale of 300 mmHg). The long-term systematic error due to falling battery voltage is (+OR-)0.6 mmHg. These figures were calculated from measurements of temperature, supply dependence and non-linearity on completed integrated circuits. The sensor IC allows measurement of temperature to (+OR-)0.1(DEGREES)C to allow for temperature compensation of the transducer. Novel micropower circuit design of the system components enabled these levels of accuracy to be reached. Capacitance is measured by a new ratiometric scheme employing an on -chip reference capacitor. This method greatly reduces the effects of voltage supply, temperature and manufacturing variations on the sensor circuit performance. The limits on performance of the bandgap reference circuit fabricated with a standard bipolar process using ion-implanted resistors were determined. Measurements confirm the limits of temperature stability as approximately (+OR-)300 ppm/(DEGREES)C. An exact analytical expression for the period of the Schmitt trigger oscillator, accounting for non-constant capacitor charging current, was formulated. Experiments to test agreement with theory showed that prediction of the oscillator period was very accurate. The interaction of fundamental and practical limits on the scaling of the transducer size was investigated including a correction to previous theoretical analysis of jitter in an RC oscillator. An areal reduction of 4 times should be achievable.
Modeling, numerical simulation, and nonlinear dynamic behavior analysis of PV microgrid-connected inverter with capacitance catastrophe

NASA Astrophysics Data System (ADS)

Li, Sichen; Liao, Zhixian; Luo, Xiaoshu; Wei, Duqu; Jiang, Pinqun; Jiang, Qinghong

2018-02-01

The value of the output capacitance (C) should be carefully considered when designing a photovoltaic (PV) inverter since it can cause distortion in the working state of the circuit, and the circuit produces nonlinear dynamic behavior. According to Kirchhoff’s laws and the characteristics of an ideal operational amplifier for a strict piecewise linear state equation, a circuit simulation model is constructed to study the system parameters (time, C) for the current passing through an inductor with an inductance of L and the voltage across the capacitor with a capacitance of C. The developed simulation model uses Runge-Kutta methods to solve the state equations. This study focuses on predicting the fault of the circuit from the two aspects of the harmonic distortion and simulation results. Moreover, the presented model is also used to research the working state of the system in the case of a load capacitance catastrophe. The nonlinear dynamic behaviors in the inverter are simulated and verified.
Analyzing the dynamics of brain circuits with temperature: design and implementation of a miniature thermoelectric device.

PubMed

Aronov, Dmitriy; Fee, Michale S

2011-04-15

Traditional lesion or inactivation methods are useful for determining if a given brain area is involved in the generation of a behavior, but not for determining if circuit dynamics in that area control the timing of the behavior. In contrast, localized mild cooling or heating of a brain area alters the speed of neuronal and circuit dynamics and can reveal the role of that area in the control of timing. It has been shown that miniaturized solid-state heat pumps based on the Peltier effect can be useful for analyzing brain dynamics in small freely behaving animals (Long and Fee, 2008). Here we present a theoretical analysis of these devices and a procedure for optimizing their design. We describe the construction and implementation of one device for cooling surface brain areas, such as cortex, and another device for cooling deep brain regions. We also present measurements of the magnitude and localization of the brain temperature changes produced by these two devices. Copyright © 2011 Elsevier B.V. All rights reserved.
Packaging Of Control Circuits In A Robot Arm

NASA Technical Reports Server (NTRS)

Kast, William

1994-01-01

Packaging system houses and connects control circuitry mounted on circuit boards within shoulder, upper section, and lower section of seven-degree-of-freedom robot arm. Has modular design that incorporates surface-mount technology, multilayer circuit boards, large-scale integrated circuits, and multi-layer flat cables between sections for compactness. Three sections of robot arm contain circuit modules in form of stardardized circuit boards. Each module contains two printed-circuit cards, one of each face.
Pulse Detecting Genetic Circuit – A New Design Approach

PubMed Central

Inniss, Mara; Iba, Hitoshi; Way, Jeffrey C.

2016-01-01

A robust cellular counter could enable synthetic biologists to design complex circuits with diverse behaviors. The existing synthetic-biological counters, responsive to the beginning of the pulse, are sensitive to the pulse duration. Here we present a pulse detecting circuit that responds only at the falling edge of a pulse–analogous to negative edge triggered electric circuits. As biological events do not follow precise timing, use of such a pulse detector would enable the design of robust asynchronous counters which can count the completion of events. This transcription-based pulse detecting circuit depends on the interaction of two co-expressed lambdoid phage-derived proteins: the first is unstable and inhibits the regulatory activity of the second, stable protein. At the end of the pulse the unstable inhibitor protein disappears from the cell and the second protein triggers the recording of the event completion. Using stochastic simulation we showed that the proposed design can detect the completion of the pulse irrespective to the pulse duration. In our simulation we also showed that fusing the pulse detector with a phage lambda memory element we can construct a counter which can be extended to count larger numbers. The proposed design principle is a new control mechanism for synthetic biology which can be integrated in different circuits for identifying the completion of an event. PMID:27907045
Pulse Detecting Genetic Circuit - A New Design Approach.

PubMed

Noman, Nasimul; Inniss, Mara; Iba, Hitoshi; Way, Jeffrey C

2016-01-01

A robust cellular counter could enable synthetic biologists to design complex circuits with diverse behaviors. The existing synthetic-biological counters, responsive to the beginning of the pulse, are sensitive to the pulse duration. Here we present a pulse detecting circuit that responds only at the falling edge of a pulse-analogous to negative edge triggered electric circuits. As biological events do not follow precise timing, use of such a pulse detector would enable the design of robust asynchronous counters which can count the completion of events. This transcription-based pulse detecting circuit depends on the interaction of two co-expressed lambdoid phage-derived proteins: the first is unstable and inhibits the regulatory activity of the second, stable protein. At the end of the pulse the unstable inhibitor protein disappears from the cell and the second protein triggers the recording of the event completion. Using stochastic simulation we showed that the proposed design can detect the completion of the pulse irrespective to the pulse duration. In our simulation we also showed that fusing the pulse detector with a phage lambda memory element we can construct a counter which can be extended to count larger numbers. The proposed design principle is a new control mechanism for synthetic biology which can be integrated in different circuits for identifying the completion of an event.
Microstrip Yagi array for MSAT vehicle antenna application

NASA Technical Reports Server (NTRS)

Huang, John; Densmore, Arthur; Pozar, David

1990-01-01

A microstrip Yagi array was developed for the MSAT system as a low-cost mechanically steered medium-gain vehicle antenna. Because its parasitic reflector and director patches are not connected to any of the RF power distributing circuit, while still contributing to achieve the MSAT required directional beam, the antenna becomes a very efficient radiating system. With the complete monopulse beamforming circuit etched on a thin stripline board, the planar microstrip Yagi array is capable of achieving a very low profile. A theoretical model using the Method of Moments was developed to facilitate the ease of design and understanding of this antenna.
Capacitance discharge system for ignition of Single Bridge Apollo Standard Initiators (SBASI)

NASA Technical Reports Server (NTRS)

Ward, R. D.

1974-01-01

The design support data developed during the single bridge Apollo standard initiator (SBASI) program are presented. A circuit was designed and bread-board tested to verify operational capabilities of the circuit. Test data, design criteria, weight, and reliability trade-off considerations, and final design recommendations are reported.
Synthesizing a novel genetic sequential logic circuit: a push-on push-off switch

PubMed Central

Lou, Chunbo; Liu, Xili; Ni, Ming; Huang, Yiqi; Huang, Qiushi; Huang, Longwen; Jiang, Lingli; Lu, Dan; Wang, Mingcong; Liu, Chang; Chen, Daizhuo; Chen, Chongyi; Chen, Xiaoyue; Yang, Le; Ma, Haisu; Chen, Jianguo; Ouyang, Qi

2010-01-01

Design and synthesis of basic functional circuits are the fundamental tasks of synthetic biologists. Before it is possible to engineer higher-order genetic networks that can perform complex functions, a toolkit of basic devices must be developed. Among those devices, sequential logic circuits are expected to be the foundation of the genetic information-processing systems. In this study, we report the design and construction of a genetic sequential logic circuit in Escherichia coli. It can generate different outputs in response to the same input signal on the basis of its internal state, and ‘memorize' the output. The circuit is composed of two parts: (1) a bistable switch memory module and (2) a double-repressed promoter NOR gate module. The two modules were individually rationally designed, and they were coupled together by fine-tuning the interconnecting parts through directed evolution. After fine-tuning, the circuit could be repeatedly, alternatively triggered by the same input signal; it functions as a push-on push-off switch. PMID:20212522
Synthesizing a novel genetic sequential logic circuit: a push-on push-off switch.

PubMed

Lou, Chunbo; Liu, Xili; Ni, Ming; Huang, Yiqi; Huang, Qiushi; Huang, Longwen; Jiang, Lingli; Lu, Dan; Wang, Mingcong; Liu, Chang; Chen, Daizhuo; Chen, Chongyi; Chen, Xiaoyue; Yang, Le; Ma, Haisu; Chen, Jianguo; Ouyang, Qi

2010-01-01

Design and synthesis of basic functional circuits are the fundamental tasks of synthetic biologists. Before it is possible to engineer higher-order genetic networks that can perform complex functions, a toolkit of basic devices must be developed. Among those devices, sequential logic circuits are expected to be the foundation of the genetic information-processing systems. In this study, we report the design and construction of a genetic sequential logic circuit in Escherichia coli. It can generate different outputs in response to the same input signal on the basis of its internal state, and 'memorize' the output. The circuit is composed of two parts: (1) a bistable switch memory module and (2) a double-repressed promoter NOR gate module. The two modules were individually rationally designed, and they were coupled together by fine-tuning the interconnecting parts through directed evolution. After fine-tuning, the circuit could be repeatedly, alternatively triggered by the same input signal; it functions as a push-on push-off switch.
Directly Writing Resistor, Inductor and Capacitor to Composite Functional Circuits: A Super-Simple Way for Alternative Electronics

PubMed Central

Gao, Yunxia; Li, Haiyan; Liu, Jing

2013-01-01

Background The current strategies for making electronic devices are generally time, water, material and energy consuming. Here, the direct writing of composite functional circuits through comprehensive use of GaIn10-based liquid metal inks and matching material is proposed and investigated, which is a rather easy going and cost effective electronics fabrication way compared with the conventional approaches. Methods Owing to its excellent adhesion and electrical properties, the liquid metal ink was demonstrated as a generalist in directly making various basic electronic components such as planar resistor, inductor and capacitor or their combination and thus composing circuits with expected electrical functions. For a precise control of the geometric sizes of the writing, a mask with a designed pattern was employed and demonstrated. Mechanisms for justifying the chemical components of the inks and the magnitudes of the target electronic elements so as to compose various practical circuits were disclosed. Results Fundamental tests on the electrical components including capacitor and inductor directly written on paper with working time up to 48 h and elevated temperature demonstrated their good stability and potential widespread adaptability especially when used in some high frequency circuits. As the first proof-of-concept experiment, a typical functional oscillating circuit including an integrated chip of 74HC04 with a supply voltage of 5 V, a capacitor of 10 nF and two resistors of 5 kΩ and 1 kΩ respectively was directly composed on paper through integrating specific electrical elements together, which presented an oscillation frequency of 8.8 kHz. Conclusions The present method significantly extends the roles of the metal ink in recent works serving as only a single electrical conductor or interconnecting wires. It opens the way for directly writing out complex functional circuits or devices on different substrates. Such circuit composition strategy has generalized purpose and can be extended to more areas, even daily pervasive electronics. PMID:23936349
Area efficient layout design of CMOS circuit for high-density ICs

NASA Astrophysics Data System (ADS)

Mishra, Vimal Kumar; Chauhan, R. K.

2018-01-01

Efficient layouts have been an active area of research to accommodate the greater number of devices fabricated on a given chip area. In this work a new layout of CMOS circuit is proposed, with an aim to improve its electrical performance and reduce the chip area consumed. The study shows that the design of CMOS circuit and SRAM cells comprising tapered body reduced source fully depleted silicon on insulator (TBRS FD-SOI)-based n- and p-type MOS devices. The proposed TBRS FD-SOI n- and p-MOSFET exhibits lower sub-threshold slope and higher Ion to Ioff ratio when compared with FD-SOI MOSFET and FinFET technology. Other parameters like power dissipation, delay time and signal-to-noise margin of CMOS inverter circuits show improvement when compared with available inverter designs. The above device design is used in 6-T SRAM cell so as to see the effect of proposed layout on high density integrated circuits (ICs). The SNM obtained from the proposed SRAM cell is 565 mV which is much better than any other SRAM cell designed at 50 nm gate length MOS device. The Sentaurus TCAD device simulator is used to design the proposed MOS structure.
Improving dynamic performances of PWM-driven servo-pneumatic systems via a novel pneumatic circuit.

PubMed

Taghizadeh, Mostafa; Ghaffari, Ali; Najafi, Farid

2009-10-01

In this paper, the effect of pneumatic circuit design on the input-output behavior of PWM-driven servo-pneumatic systems is investigated and their control performances are improved using linear controllers instead of complex and costly nonlinear ones. Generally, servo-pneumatic systems are well known for their nonlinear behavior. However, PWM-driven servo-pneumatic systems have the advantage of flexibility in the design of pneumatic circuits which affects the input-output linearity of the whole system. A simple pneumatic circuit with only one fast switching valve is designed which leads to a quasi-linear input-output relation. The quasi-linear behavior of the proposed circuit is verified both experimentally and by simulations. Closed loop position control experiments are then carried out using linear P- and PD-controllers. Since the output position is noisy and cannot be directly differentiated, a Kalman filter is designed to estimate the velocity of the cylinder. Highly improved tracking performances are obtained using these linear controllers, compared to previous works with nonlinear controllers.
Benchmarking of TALE- and CRISPR/dCas9-Based Transcriptional Regulators in Mammalian Cells for the Construction of Synthetic Genetic Circuits.

PubMed

Lebar, Tina; Jerala, Roman

2016-10-21

Transcriptional activator-like effector (TALE)- and CRISPR/Cas9-based designable recognition domains represent a technological breakthrough not only for genome editing but also for building designed genetic circuits. Both platforms are able to target rarely occurring DNA segments, even within complex genomes. TALE and dCas9 domains, genetically fused to transcriptional regulatory domains, can be used for the construction of engineered logic circuits. Here we benchmarked the performance of the two platforms, targeting the same DNA sequences, to compare their advantages for the construction of designed circuits in mammalian cells. Optimal targeting strands for repression and activation of dCas9-based designed transcription factors were identified; both platforms exhibited good orthogonality and were used to construct functionally complete NOR gates. Although the CRISPR/dCas9 system is clearly easier to construct, TALE-based activators were significantly stronger, and the TALE-based platform performed better, especially for the construction of layered circuits.
Exploration and design of smart home circuit based on ZigBee

NASA Astrophysics Data System (ADS)

Luo, Huirong

2018-05-01

To apply ZigBee technique in smart home circuit design, in the hardware design link of ZigBee node, TI Company's ZigBee wireless communication chip CC2530 was used to complete the design of ZigBee RF module circuit and peripheral circuit. In addition, the function demand and the overall scheme of the intelligent system based on smart home furnishing were proposed. Finally, the smart home system was built by combining ZigBee network and intelligent gateway. The function realization, reliability and power consumption of ZigBee network were tested. The results showed that ZigBee technology was applied to smart home system, making it have some advantages in terms of flexibility, scalability, power consumption and indoor aesthetics. To sum up, the system has high application value.
Lithium Circuit Test Section Design and Fabrication

NASA Technical Reports Server (NTRS)

Godfroy, Thomas; Garber, Anne

2006-01-01

The Early Flight Fission - Test Facilities (EFF-TF) team has designed and built an actively pumped lithium flow circuit. Modifications were made to a circuit originally designed for NaK to enable the use of lithium that included application specific instrumentation and hardware. Component scale freeze/thaw tests were conducted to both gain experience with handling and behavior of lithium in solid and liquid form and to supply anchor data for a Generalized Fluid System Simulation Program (GFSSP) model that was modified to include the physics for freeze/thaw transitions. Void formation was investigated. The basic circuit components include: reactor segment, lithium to gas heat exchanger, electromagnetic (EM) liquid metal pump, load/drain reservoir, expansion reservoir, instrumentation, and trace heaters. This paper will discuss the overall system design and build and the component testing findings.
Design of Compact Wilkinson Power Divider with Harmonic Suppression using T-Shaped Resonators

NASA Astrophysics Data System (ADS)

Siahkamari, Hesam; Yasoubi, Zahra; Jahanbakhshi, Maryam; Mousavi, Seyed Mohammad Hadi; Siahkamari, Payam; Nouri, Mohammad Ehsan; Azami, Sajad; Azadi, Rasoul

2018-04-01

A novel scheme of a shrunken Wilkinson power divider with harmonic suppression, using two identical resonators in the conventional Wilkinson power divider is designed. Moreover, the LC equivalent circuit and its relevant formulas are provided. To substantiate the functionality and soundness of design, a microstrip implementation of this design operating at 1 GHz with the second to eighth harmonic suppression, is developed. The proposed circuit is relatively smaller than the conventional circuit, (roughly 55% of the conventional circuit). Simulation and measurement results for the proposed scheme, which are highly consistent with one another, indicate a good insertion loss about 3.1 dB, input return loss of 20 dB and isolation of 20 dB, while sustaining high-power handling capability over the Wilkinson power divider.
Lithium Circuit Test Section Design and Fabrication

NASA Astrophysics Data System (ADS)

Godfroy, Thomas; Garber, Anne; Martin, James

2006-01-01

The Early Flight Fission - Test Facilities (EFF-TF) team has designed and built an actively pumped lithium flow circuit. Modifications were made to a circuit originally designed for NaK to enable the use of lithium that included application specific instrumentation and hardware. Component scale freeze/thaw tests were conducted to both gain experience with handling and behavior of lithium in solid and liquid form and to supply anchor data for a Generalized Fluid System Simulation Program (GFSSP) model that was modified to include the physics for freeze/thaw transitions. Void formation was investigated. The basic circuit components include: reactor segment, lithium to gas heat exchanger, electromagnetic (EM) liquid metal pump, load/drain reservoir, expansion reservoir, instrumentation, and trace heaters. This paper discusses the overall system design and build and the component testing findings.
Improving Design Efficiency for Large-Scale Heterogeneous Circuits

NASA Astrophysics Data System (ADS)

Gregerson, Anthony

Despite increases in logic density, many Big Data applications must still be partitioned across multiple computing devices in order to meet their strict performance requirements. Among the most demanding of these applications is high-energy physics (HEP), which uses complex computing systems consisting of thousands of FPGAs and ASICs to process the sensor data created by experiments at particles accelerators such as the Large Hadron Collider (LHC). Designing such computing systems is challenging due to the scale of the systems, the exceptionally high-throughput and low-latency performance constraints that necessitate application-specific hardware implementations, the requirement that algorithms are efficiently partitioned across many devices, and the possible need to update the implemented algorithms during the lifetime of the system. In this work, we describe our research to develop flexible architectures for implementing such large-scale circuits on FPGAs. In particular, this work is motivated by (but not limited in scope to) high-energy physics algorithms for the Compact Muon Solenoid (CMS) experiment at the LHC. To make efficient use of logic resources in multi-FPGA systems, we introduce Multi-Personality Partitioning, a novel form of the graph partitioning problem, and present partitioning algorithms that can significantly improve resource utilization on heterogeneous devices while also reducing inter-chip connections. To reduce the high communication costs of Big Data applications, we also introduce Information-Aware Partitioning, a partitioning method that analyzes the data content of application-specific circuits, characterizes their entropy, and selects circuit partitions that enable efficient compression of data between chips. We employ our information-aware partitioning method to improve the performance of the hardware validation platform for evaluating new algorithms for the CMS experiment. Together, these research efforts help to improve the efficiency and decrease the cost of the developing large-scale, heterogeneous circuits needed to enable large-scale application in high-energy physics and other important areas.

Finding False Paths in Sequential Circuits

NASA Astrophysics Data System (ADS)

Matrosova, A. Yu.; Andreeva, V. V.; Chernyshov, S. V.; Rozhkova, S. V.; Kudin, D. V.

2018-02-01

Method of finding false paths in sequential circuits is developed. In contrast with heuristic approaches currently used abroad, the precise method based on applying operations on Reduced Ordered Binary Decision Diagrams (ROBDDs) extracted from the combinational part of a sequential controlling logic circuit is suggested. The method allows finding false paths when transfer sequence length is not more than the given value and obviates the necessity of investigation of combinational circuit equivalents of the given lengths. The possibilities of using of the developed method for more complicated circuits are discussed.
DOE Office of Scientific and Technical Information (OSTI.GOV)

Pierson, L.G.; Witzke, E.L.

This effort studied the integration of innovative methods of key management crypto synchronization, and key agility while scaling encryption speed. Viability of these methods for encryption of ATM cell payloads at the SONET OC- 192 data rate (10 Gb/s), and for operation at OC-48 rates (2.5 Gb/s) was shown. An SNL-Developed pipelined DES design was adapted for the encryption of ATM cells. A proof-of-principle prototype circuit board containing 11 Electronically Programmable Logic Devices (each holding the equivalent of 100,000 gates) was designed, built, and used to prototype a high speed encryptor.
Path programmable logic: A structured design method for digital and/or mixed analog integrated circuits

NASA Technical Reports Server (NTRS)

Taylor, B.

1990-01-01

The design of Integrated Circuits has evolved past the black art practiced by a few semiconductor companies to a world wide community of users. This was basically accomplished by the development of computer aided design tools which were made available to this community. As the tools matured into different components of the design task they were accepted into the community at large. However, the next step in this evolution is being ignored by the large tool vendors hindering the continuation of this process. With system level definition and simulation through the logic specification well understood, why is the physical generation so blatantly ignored. This portion of the development is still treated as an isolated task with information being passed from the designer to the layout function. Some form of result given back but it severely lacks full definition of what has transpired. The level of integration in I.C.'s for tomorrow, whether through new processes or applications will require higher speeds, increased transistor density, and non-digital performance which can only be achieved through attention to the physical implementation.
Method and Circuit for Injecting a Precise Amount of Charge onto a Circuit Node

NASA Technical Reports Server (NTRS)

Hancock, Bruce R. (Inventor)

2016-01-01

A method and circuit for injecting charge into a circuit node, comprising (a) resetting a capacitor's voltage through a first transistor; (b) after the resetting, pre-charging the capacitor through the first transistor; and (c) after the pre-charging, further charging the capacitor through a second transistor, wherein the second transistor is connected between the capacitor and a circuit node, and the further charging draws charge through the second transistor from the circuit node, thereby injecting charge into the circuit node.
An analog silicon retina with multichip configuration.

PubMed

Kameda, Seiji; Yagi, Tetsuya

2006-01-01

The neuromorphic silicon retina is a novel analog very large scale integrated circuit that emulates the structure and the function of the retinal neuronal circuit. We fabricated a neuromorphic silicon retina, in which sample/hold circuits were embedded to generate fluctuation-suppressed outputs in the previous study [1]. The applications of this silicon retina, however, are limited because of a low spatial resolution and computational variability. In this paper, we have fabricated a multichip silicon retina in which the functional network circuits are divided into two chips: the photoreceptor network chip (P chip) and the horizontal cell network chip (H chip). The output images of the P chip are transferred to the H chip with analog voltages through the line-parallel transfer bus. The sample/hold circuits embedded in the P and H chips compensate for the pattern noise generated on the circuits, including the analog communication pathway. Using the multichip silicon retina together with an off-chip differential amplifier, spatial filtering of the image with an odd- and an even-symmetric orientation selective receptive fields was carried out in real time. The analog data transfer method in the present multichip silicon retina is useful to design analog neuromorphic multichip systems that mimic the hierarchical structure of neuronal networks in the visual system.
[Design of blood-pressure parameter auto-acquisition circuit].

PubMed

Chen, Y P; Zhang, D L; Bai, H W; Zhang, D A

2000-02-01

This paper presents the realization and design of a kind of blood-pressure parameter auto-acquisition circuit. The auto-acquisition of blood-pressure parameter controlled by 89C2051 single chip microcomputer is accomplished by collecting and processing the driving signal of LCD. The circuit that is successfully applied in the home unit of telemedicine system has the simple and reliable properties.
75 FR 60863 - Safety Advisory 2010-02

Federal Register 2010, 2011, 2012, 2013, 2014

2010-10-01

... equipped, railroads should ensure that the circuit plan shows the actual interconnection and the designed... detection device (or equivalent) is programmed or equipped to provide the appropriate designed pre-emption... circuit and as designed. By conducting comprehensive periodic joint inspections, the railroad and State...
Analog Module Architecture for Space-Qualified Field-Programmable Mixed-Signal Arrays

NASA Technical Reports Server (NTRS)

Edwards, R. Timothy; Strohbehn, Kim; Jaskulek, Steven E.; Katz, Richard

1999-01-01

Spacecraft require all manner of both digital and analog circuits. Onboard digital systems are constructed almost exclusively from field-programmable gate array (FPGA) circuits providing numerous advantages over discrete design including high integration density, high reliability, fast turn-around design cycle time, lower mass, volume, and power consumption, and lower parts acquisition and flight qualification costs. Analog and mixed-signal circuits perform tasks ranging from housekeeping to signal conditioning and processing. These circuits are painstakingly designed and built using discrete components due to a lack of options for field-programmability. FPAA (Field-Programmable Analog Array) and FPMA (Field-Programmable Mixed-signal Array) parts exist but not in radiation-tolerant technology and not necessarily in an architecture optimal for the design of analog circuits for spaceflight applications. This paper outlines an architecture proposed for an FPAA fabricated in an existing commercial digital CMOS process used to make radiation-tolerant antifuse-based FPGA devices. The primary concerns are the impact of the technology and the overall array architecture on the flexibility of programming, the bandwidth available for high-speed analog circuits, and the accuracy of the components for high-performance applications.
A Quatro-Based 65-nm Flip-Flop Circuit for Soft-Error Resilience

NASA Astrophysics Data System (ADS)

Li, Y.-Q.; Wang, H.-B.; Liu, R.; Chen, L.; Nofal, I.; Shi, S.-T.; He, A.-L.; Guo, G.; Baeg, S. H.; Wen, S.-J.; Wong, R.; Chen, M.; Wu, Q.

2017-06-01

A flip-flop circuit hardened against soft errors is presented in this paper. This design is an improved version of Quatro for further enhanced soft-error resilience by integrating the guard-gate technique. The proposed design, as well as reference Quatro and regular flip-flops, was implemented and manufactured in a 65-nm CMOS bulk technology. Experimental characterization results of their alpha and heavy ions soft-error rates verified the superior hardening performance of the proposed design over the other two circuits.
Analytical Study on Thermal and Mechanical Design of Printed Circuit Heat Exchanger

DOE Office of Scientific and Technical Information (OSTI.GOV)

Yoon, Su-Jong; Sabharwall, Piyush; Kim, Eung-Soo

2013-09-01

The analytical methodologies for the thermal design, mechanical design and cost estimation of printed circuit heat exchanger are presented in this study. In this study, three flow arrangements of parallel flow, countercurrent flow and crossflow are taken into account. For each flow arrangement, the analytical solution of temperature profile of heat exchanger is introduced. The size and cost of printed circuit heat exchangers for advanced small modular reactors, which employ various coolants such as sodium, molten salts, helium, and water, are also presented.
Millimeter And Submillimeter-Wave Integrated Circuits On Quartz

NASA Technical Reports Server (NTRS)

Mehdi, Imran; Mazed, Mohammad; Siegel, Peter; Smith, R. Peter

1995-01-01

Proposed Quartz substrate Upside-down Integrated Device (QUID) relies on UV-curable adhesive to bond semiconductor with quartz. Integrated circuits including planar GaAs Schottky diodes and passive circuit elements (such as bandpass filters) fabricated on quartz substrates. Circuits designed to operate as mixers in waveguide circuit at millimeter and submillimeter wavelengths. Integrated circuits mechanically more robust, larger, and easier to handle than planar Schottky diode chips. Quartz substrate more suitable for waveguide circuits than GaAs substrate.
Optimized structural designs for stretchable silicon integrated circuits.

PubMed

Kim, Dae-Hyeong; Liu, Zhuangjian; Kim, Yun-Soung; Wu, Jian; Song, Jizhou; Kim, Hoon-Sik; Huang, Yonggang; Hwang, Keh-Chih; Zhang, Yongwei; Rogers, John A

2009-12-01

Materials and design strategies for stretchable silicon integrated circuits that use non-coplanar mesh layouts and elastomeric substrates are presented. Detailed experimental and theoretical studies reveal many of the key underlying aspects of these systems. The results shpw, as an example, optimized mechanics and materials for circuits that exhibit maximum principal strains less than 0.2% even for applied strains of up to approximately 90%. Simple circuits, including complementary metal-oxide-semiconductor inverters and n-type metal-oxide-semiconductor differential amplifiers, validate these designs. The results suggest practical routes to high-performance electronics with linear elastic responses to large strain deformations, suitable for diverse applications that are not readily addressed with conventional wafer-based technologies.
Generation of electromagnetic energy in a magnetic cumulation generator with the use of inductively coupled circuits with a variable coupling coefficient

NASA Astrophysics Data System (ADS)

Gilev, S. D.; Prokopiev, V. S.

2017-07-01

A method of generation of electromagnetic energy and magnetic flux in a magnetic cumulation generator is proposed. The method is based on dynamic variation of the circuit coupling coefficient. This circuit is compared with other available circuits of magnetic energy generation with the help of magnetic cumulation (classical magnetic cumulation generator, generator with transformer coupling, and generator with a dynamic transformer). It is demonstrated that the proposed method allows obtaining high values of magnetic energy. The proposed circuit is found to be more effective than the known transformer circuit. Experiments on electromagnetic energy generation are performed, which demonstrate the efficiency of the proposed method.
On stethoscope design: a challenge for biomedical circuit designers.

PubMed

Hahn, A W

2001-01-01

Most clinicians learned the art and science of auscultation using an acoustic stethoscope. While many models of electronic stethoscopes have been marketed over the years, none of them seem to do a very good job of emulating the most common forms of acoustic stethoscopes available. This paper is an appeal to biomedical circuit designers to learn more about the acoustics of commonly used stethoscopes and to develop an appropriate group of circuits which would emulate them much like music synthesizers can emulate almost any musical instrument. The implications are for creative designers to move toward a rational and acceptable design for both personal physician use and for telemedicine.
Banning standard cell engineering notebook

NASA Technical Reports Server (NTRS)

1976-01-01

A family of standardized thick-oxide P-MOS building blocks (standard cells) is described. The information is presented in a form useful for systems designs, logic design, and the preparation of inputs to both sets of Design Automation programs for array design and analysis. A data sheet is provided for each cell and gives the cell name, the cell number, its logic symbol, Boolean equation, truth table, circuit schematic circuit composite, input-output capacitances, and revision date. The circuit type file, also given for each cell, together with the logic drawing contained on the data sheet provides all the information required to prepare input data files for the Design Automation Systems. A detailed description of the electrical design procedure is included.
Electronic circuits: A compilation. [for electronic equipment in telecommunication

NASA Technical Reports Server (NTRS)

1976-01-01

A compilation containing articles on newly developed electronic circuits and systems is presented. It is divided into two sections: (1) section 1 on circuits and techniques of particular interest in communications technology, and (2) section 2 on circuits designed for a variety of specific applications. The latest patent information available is also given. Circuit diagrams are shown.
Differential transimpedance amplifier circuit for correlated differential amplification

DOEpatents

Gresham, Christopher A [Albuquerque, NM; Denton, M Bonner [Tucson, AZ; Sperline, Roger P [Tucson, AZ

2008-07-22

A differential transimpedance amplifier circuit for correlated differential amplification. The amplifier circuit increase electronic signal-to-noise ratios in charge detection circuits designed for the detection of very small quantities of electrical charge and/or very weak electromagnetic waves. A differential, integrating capacitive transimpedance amplifier integrated circuit comprising capacitor feedback loops performs time-correlated subtraction of noise.
Defense Small Business Innovation Research Program (SBIR), Volume 4, Defense Agencies Abstracts of Phase 1 Awards 1991

DTIC Science & Technology

1991-01-01

EXPERIENCE IN DEVELOPING INTEGRATED OPTICAL DEVICES, NONLINEAR MAGNETIC-OPTIC MATERIALS, HIGH FREQUENCY MODULATORS, COMPUTER-AIDED MODELING AND SOPHISTICATED... HIGH -LEVEL PRESENTATION AND DISTRIBUTED CONTROL MODELS FOR INTEGRATING HETEROGENEOUS MECHANICAL ENGINEERING APPLICATIONS AND TOOLS. THE DESIGN IS FOCUSED...STATISTICALLY ACCURATE WORST CASE DEVICE MODELS FOR CIRCUIT SIMULATION. PRESENT METHODS OF WORST CASE DEVICE DESIGN ARE AD HOC AND DO NOT ALLOW THE
The use of mathematics and electric circuit simulator software in the learning process of wireless power transfer for electrical engineering students

NASA Astrophysics Data System (ADS)

Habibi, Muhammad Afnan; Fall, Cheikh; Setiawan, Eko; Hodaka, Ichijo; Wijono, Hasanah, Rini Nur

2017-09-01

Wireless Power Transfer (WPT) isa technique to deliver the electrical power from the source to the load without using wires or conductors. The physics of WPT is well known and basically learned as a course in high school. However, it is very recent that WPT is useful in practical situation: it should be able to transfer electric power in a significant efficiency. It means that WPT requires not much knowledge to university students but may attract students because of cutting edge technique of WPT. On the other hand, phenomena of WPT is invisible and sometimes difficult to imagine. The objective of this paper is to demonstrate the use of mathematics and an electric circuit simulator using MATHEMATICA software and LT-SPICE software in designing a WPT system application. It brings to a conclusion that the students as well the designer can take the benefit of the proposed method. By giving numerical values to circuit parameters, students acquires the power output and efficiency of WPT system. The average power output as well as the efficiency of the designed WPT which resonance frequency set on the system,leads it to produce high output power and better efficiency.
Design, Experiments and Simulation of Voltage Transformers on the Basis of a Differential Input D-dot Sensor

PubMed Central

Wang, Jingang; Gao, Can; Yang, Jie

2014-01-01

Currently available traditional electromagnetic voltage sensors fail to meet the measurement requirements of the smart grid, because of low accuracy in the static and dynamic ranges and the occurrence of ferromagnetic resonance attributed to overvoltage and output short circuit. This work develops a new non-contact high-bandwidth voltage measurement system for power equipment. This system aims at the miniaturization and non-contact measurement of the smart grid. After traditional D-dot voltage probe analysis, an improved method is proposed. For the sensor to work in a self-integrating pattern, the differential input pattern is adopted for circuit design, and grounding is removed. To prove the structure design, circuit component parameters, and insulation characteristics, Ansoft Maxwell software is used for the simulation. Moreover, the new probe was tested on a 10 kV high-voltage test platform for steady-state error and transient behavior. Experimental results ascertain that the root mean square values of measured voltage are precise and that the phase error is small. The D-dot voltage sensor not only meets the requirement of high accuracy but also exhibits satisfactory transient response. This sensor can meet the intelligence, miniaturization, and convenience requirements of the smart grid. PMID:25036333

Analysis and design of negative resistance oscillators using surface transverse wave-based single port resonators.

PubMed

Avramov, Ivan D

2003-03-01

This practically oriented paper presents the fundamentals for analysis, optimization, and design of negative resistance oscillators (NRO) stabilized with surface transverse wave (STW)-based single-port resonators (SPR). Data on a variety of high-Q, low-loss SPR devices in the 900- to 2000-MHz range, suitable for NRO applications, are presented, and a simple method for SPR parameter extraction through Pi-circuit measurements is outlined. Negative resistance analysis, based on S-parameter data of the active device, is performed on a tuned-base, grounded collector transistor NRO, known for its good stability and tuning at microwave frequencies. By adding a SPR in the emitter network, the static transducer capacitance is absorbed by the circuit and is used to generate negative resistance only over the narrow bandwidth of the acoustic device, eliminating the risk of spurious oscillations. The analysis allows exact prediction of the oscillation frequency, tuning range, loaded Q, and excess gain. Simulation and experimental data on a 915-MHz fixed-frequency NRO and a wide tuning range, voltage-controlled STW oscillator, built and tested experimentally, are presented. Practical design aspects including the choice of transistor, negative feedback circuits, load coupling, and operation at the highest phase slope for minimum phase noise are discussed.
A simple structure wavelet transform circuit employing function link neural networks and SI filters

NASA Astrophysics Data System (ADS)

Mu, Li; Yigang, He

2016-12-01

Signal processing by means of analog circuits offers advantages from a power consumption viewpoint. Implementing wavelet transform (WT) using analog circuits is of great interest when low-power consumption becomes an important issue. In this article, a novel simple structure WT circuit in analog domain is presented by employing functional link neural network (FLNN) and switched-current (SI) filters. First, the wavelet base is approximated using FLNN algorithms for giving a filter transfer function that is suitable for simple structure WT circuit implementation. Next, the WT circuit is constructed with the wavelet filter bank, whose impulse response is the approximated wavelet and its dilations. The filter design that follows is based on a follow-the-leader feedback (FLF) structure with multiple output bilinear SI integrators and current mirrors as the main building blocks. SI filter is well suited for this application since the dilation constant across different scales of the transform can be precisely implemented and controlled by the clock frequency of the circuit with the same system architecture. Finally, to illustrate the design procedure, a seventh-order FLNN-approximated Gaussian wavelet is implemented as an example. Simulations have successfully verified that the designed simple structure WT circuit has low sensitivity, low-power consumption and litter effect to the imperfections.
Failure analysis of electronic parts: Laboratory methods. [for destructive and nondestructive testing

NASA Technical Reports Server (NTRS)

Anstead, R. J. (Editor); Goldberg, E. (Editor)

1975-01-01

Failure analysis test methods are presented for use in analyzing candidate electronic parts and in improving future design reliability. Each test is classified as nondestructive, semidestructive, or destructive. The effects upon applicable part types (i.e. integrated circuit, transitor) are discussed. Methodology is given for performing the following: immersion tests, radio graphic tests, dewpoint tests, gas ambient analysis, cross sectioning, and ultraviolet examination.
Interface Circuit Board For Space-Shuttle Communications

NASA Technical Reports Server (NTRS)

Parrish, Brett T.

1995-01-01

Report describes interface electronic circuit developed to enable ground controllers to send commands and data via Ku-band radio uplink to multiple circuits connected to standard IEEE-488 general-purpose interface bus in space shuttle. Design of circuit extends data-throughput capability of communication system.
Spatial Control of Bacteria Using Screen Printing

PubMed Central

Moon, Soonhee; Fritz, Ian L.; Singer, Zakary S.

2016-01-01

Abstract Synthetic biology has led to advances in both our understanding and engineering of genetic circuits that affect spatial and temporal behaviors in living cells. A growing array of native and synthetic circuits such as oscillators, pattern generators, and cell–cell communication systems has been studied, which exhibit spatiotemporal properties. To better understand the design principles of these genetic circuits, there is a need for versatile and precise methods for patterning cell populations in various configurations. In this study, we develop a screen printing methodology to pattern bacteria on agar, glass, and paper surfaces. Initially, we tested three biocompatible resuspension media with appropriate rheological properties for screen printing. Using microscopy, we characterized the resolution and bleed of bacteria screen prints on agar and glass surfaces, obtaining resolutions as low as 188 μm. Next, we engineered bacterial strains producing visible chromoproteins analogous to the cyan, magenta, and yellow subtractive color system for the creation of multicolored bacteria images. Using this system, we printed distinct populations in overlapping or interlocking designs on both paper and agar substrates. These proof-of-principle experiments demonstrated how the screen printing method could be used to study microbial community interactions and pattern formation of biofilms at submillimeter length scales. Overall, our approach allows for rapid and precise prototyping of patterned bacteria species that will be useful in the understanding and engineering of spatiotemporal behaviors in microbial communities. PMID:29577061
Model annotation for synthetic biology: automating model to nucleotide sequence conversion

PubMed Central

Misirli, Goksel; Hallinan, Jennifer S.; Yu, Tommy; Lawson, James R.; Wimalaratne, Sarala M.; Cooling, Michael T.; Wipat, Anil

2011-01-01

Motivation: The need for the automated computational design of genetic circuits is becoming increasingly apparent with the advent of ever more complex and ambitious synthetic biology projects. Currently, most circuits are designed through the assembly of models of individual parts such as promoters, ribosome binding sites and coding sequences. These low level models are combined to produce a dynamic model of a larger device that exhibits a desired behaviour. The larger model then acts as a blueprint for physical implementation at the DNA level. However, the conversion of models of complex genetic circuits into DNA sequences is a non-trivial undertaking due to the complexity of mapping the model parts to their physical manifestation. Automating this process is further hampered by the lack of computationally tractable information in most models. Results: We describe a method for automatically generating DNA sequences from dynamic models implemented in CellML and Systems Biology Markup Language (SBML). We also identify the metadata needed to annotate models to facilitate automated conversion, and propose and demonstrate a method for the markup of these models using RDF. Our algorithm has been implemented in a software tool called MoSeC. Availability: The software is available from the authors' web site http://research.ncl.ac.uk/synthetic_biology/downloads.html. Contact: anil.wipat@ncl.ac.uk Supplementary information: Supplementary data are available at Bioinformatics online. PMID:21296753
Systematic design methodology for robust genetic transistors based on I/O specifications via promoter-RBS libraries.

PubMed

Lee, Yi-Ying; Hsu, Chih-Yuan; Lin, Ling-Jiun; Chang, Chih-Chun; Cheng, Hsiao-Chun; Yeh, Tsung-Hsien; Hu, Rei-Hsing; Lin, Che; Xie, Zhen; Chen, Bor-Sen

2013-10-27

Synthetic genetic transistors are vital for signal amplification and switching in genetic circuits. However, it is still problematic to efficiently select the adequate promoters, Ribosome Binding Sides (RBSs) and inducer concentrations to construct a genetic transistor with the desired linear amplification or switching in the Input/Output (I/O) characteristics for practical applications. Three kinds of promoter-RBS libraries, i.e., a constitutive promoter-RBS library, a repressor-regulated promoter-RBS library and an activator-regulated promoter-RBS library, are constructed for systematic genetic circuit design using the identified kinetic strengths of their promoter-RBS components.According to the dynamic model of genetic transistors, a design methodology for genetic transistors via a Genetic Algorithm (GA)-based searching algorithm is developed to search for a set of promoter-RBS components and adequate concentrations of inducers to achieve the prescribed I/O characteristics of a genetic transistor. Furthermore, according to design specifications for different types of genetic transistors, a look-up table is built for genetic transistor design, from which we could easily select an adequate set of promoter-RBS components and adequate concentrations of external inducers for a specific genetic transistor. This systematic design method will reduce the time spent using trial-and-error methods in the experimental procedure for a genetic transistor with a desired I/O characteristic. We demonstrate the applicability of our design methodology to genetic transistors that have desirable linear amplification or switching by employing promoter-RBS library searching.
Systematic design methodology for robust genetic transistors based on I/O specifications via promoter-RBS libraries

PubMed Central

2013-01-01

Background Synthetic genetic transistors are vital for signal amplification and switching in genetic circuits. However, it is still problematic to efficiently select the adequate promoters, Ribosome Binding Sides (RBSs) and inducer concentrations to construct a genetic transistor with the desired linear amplification or switching in the Input/Output (I/O) characteristics for practical applications. Results Three kinds of promoter-RBS libraries, i.e., a constitutive promoter-RBS library, a repressor-regulated promoter-RBS library and an activator-regulated promoter-RBS library, are constructed for systematic genetic circuit design using the identified kinetic strengths of their promoter-RBS components. According to the dynamic model of genetic transistors, a design methodology for genetic transistors via a Genetic Algorithm (GA)-based searching algorithm is developed to search for a set of promoter-RBS components and adequate concentrations of inducers to achieve the prescribed I/O characteristics of a genetic transistor. Furthermore, according to design specifications for different types of genetic transistors, a look-up table is built for genetic transistor design, from which we could easily select an adequate set of promoter-RBS components and adequate concentrations of external inducers for a specific genetic transistor. Conclusion This systematic design method will reduce the time spent using trial-and-error methods in the experimental procedure for a genetic transistor with a desired I/O characteristic. We demonstrate the applicability of our design methodology to genetic transistors that have desirable linear amplification or switching by employing promoter-RBS library searching. PMID:24160305
Integrated source of tunable nonmaximally mode-entangled photons in a domain-engineered lithium niobate waveguide

DOE Office of Scientific and Technical Information (OSTI.GOV)

Ming, Yang; Wu, Zi-jian; Xu, Fei, E-mail: feixu@nju.edu.cn

The nonmaximally entangled state is a special kind of entangled state, which has important applications in quantum information processing. It has been generated in quantum circuits based on bulk optical elements. However, corresponding schemes in integrated quantum circuits have been rarely considered. In this Letter, we propose an effective solution for this problem. An electro-optically tunable nonmaximally mode-entangled photon state is generated in an on-chip domain-engineered lithium niobate (LN) waveguide. Spontaneous parametric down-conversion and electro-optic interaction are effectively combined through suitable domain design to transform the entangled state into our desired formation. Moreover, this is a flexible approach to entanglementmore » architectures. Other kinds of reconfigurable entanglements are also achievable through this method. LN provides a very promising platform for future quantum circuit integration.« less
Liquid on Paper: Rapid Prototyping of Soft Functional Components for Paper Electronics

PubMed Central

Long Han, Yu; Liu, Hao; Ouyang, Cheng; Jian Lu, Tian; Xu, Feng

2015-01-01

This paper describes a novel approach to fabricate paper-based electric circuits consisting of a paper matrix embedded with three-dimensional (3D) microchannels and liquid metal. Leveraging the high electric conductivity and good flowability of liquid metal, and metallophobic property of paper, it is possible to keep electric and mechanical functionality of the electric circuit even after a thousand cycles of deformation. Embedding liquid metal into paper matrix is a promising method to rapidly fabricate low-cost, disposable, and soft electric circuits for electronics. As a demonstration, we designed a programmable displacement transducer and applied it as variable resistors and pressure sensors. The unique metallophobic property, combined with softness, low cost and light weight, makes paper an attractive alternative to other materials in which liquid metal are currently embedded. PMID:26129723
Universal programmable logic gate and routing method

NASA Technical Reports Server (NTRS)

Vatan, Farrokh (Inventor); Akarvardar, Kerem (Inventor); Mojarradi, Mohammad M. (Inventor); Fijany, Amir (Inventor); Cristoloveanu, Sorin (Inventor); Kolawa, Elzbieta (Inventor); Blalock, Benjamin (Inventor); Chen, Suheng (Inventor); Toomarian, Nikzad (Inventor)

2009-01-01

An universal and programmable logic gate based on G.sup.4-FET technology is disclosed, leading to the design of more efficient logic circuits. A new full adder design based on the G.sup.4-FET is also presented. The G.sup.4-FET can also function as a unique router device offering coplanar crossing of signal paths that are isolated and perpendicular to one another. This has the potential of overcoming major limitations in VLSI design where complex interconnection schemes have become increasingly problematic.
Design of the micro pressure multi-node measuring system for micro-fluidic chip

NASA Astrophysics Data System (ADS)

Mu, Lili; Guo, Shuheng; Rong, Li; Yin, Ke

2016-01-01

An online multi-node microfludic pressure measuring system was designed in the paper. The research focused on the design of pressure test circuit system and methods on dealing with pressure data collecting. The MPXV7002 micro-pressure sensor was selected to measure the chip inside channel pressure and installed by a silicone tube on different micro-channel measured nodes. The pressure transmission loss was estimated in the paper, and corrected by the filtering and smoothing method. The pressure test experiment was carried out and the data were analyzed. Finally, the measuring system was calibrated. The results showed that the measuring system had high testing precision.
A Novel Designed Bioreactor for Recovering Precious Metals from Waste Printed Circuit Boards

PubMed Central

Jujun, Ruan; Jie, Zheng; Jian, Hu; Zhang, Jianwen

2015-01-01

For recovering precious metals from waste printed circuit boards (PCBs), a novel hybrid technology including physical and biological methods was developed. It consisted of crushing, corona-electrostatic separation, and bioleaching. Bioleaching process is the focus of this paper. A novel bioreactor for bioleaching was designed. Bioleaching was carried out using Pseudomonas chlororaphis. Bioleaching experiments using mixed particles of Au and Cu were performed and leachate contained 0.006 mg/L, 2823 mg/L Au+ and Cu2+ respectively. It showed when Cu existed, the concentrations of Au were extremely small. This provided the feasibility to separate Cu from Au. The method of orthogonal experimental design was employed in the simulation bioleaching experiments. Experimental results showed the optimized parameters for separating Cu from Au particles were pH 7.0, temperature 22.5 °C, and rotation speed 80 r/min. Based on the optimized parameters obtained, the bioreactor was operated for recovering mixed Au and Cu particles. 88.1 wt.% of Cu and 76.6 wt.% of Au were recovered. The paper contributed important information to recover precious metals from waste PCBs. PMID:26316021
Design automation for integrated nonlinear logic circuits (Conference Presentation)

NASA Astrophysics Data System (ADS)

Van Vaerenbergh, Thomas; Pelc, Jason; Santori, Charles; Bose, Ranojoy; Kielpinski, Dave; Beausoleil, Raymond G.

2016-05-01

A key enabler of the IT revolution of the late 20th century was the development of electronic design automation (EDA) tools allowing engineers to manage the complexity of electronic circuits with transistor counts now reaching into the billions. Recently, we have been developing large-scale nonlinear photonic integrated logic circuits for next generation all-optical information processing. At this time a sufficiently powerful EDA-style software tool chain to design this type of complex circuits does not yet exist. Here we describe a hierarchical approach to automating the design and validation of photonic integrated circuits, which can scale to several orders of magnitude higher complexity than the state of the art. Most photonic integrated circuits developed today consist of a small number of components, and only limited hierarchy. For example, a simple photonic transceiver may contain on the order of 10 building-block components, consisting of grating couplers for photonic I/O, modulators, and signal splitters/combiners. Because this is relatively easy to lay out by hand (or simple script) existing photonic design tools have relatively little automation in comparison to electronics tools. But demonstrating all-optical logic will require significantly more complex photonic circuits containing up to 1,000 components, hence becoming infeasible to design manually. Our design framework is based off Python-based software from Luceda Photonics which provides an environment to describe components, simulate their behavior, and export design files (GDS) to foundries for fabrication. At a fundamental level, a photonic component is described as a parametric cell (PCell) similarly to electronics design. PCells are described by geometric characteristics of their layout. A critical part of the design framework is the implementation of PCells as Python objects. PCell objects can then use inheritance to simplify design, and hierarchical designs can be made by creating composite PCells (modules) which consist of primitive building-block PCells (components). To automatically produce layouts, we built on a construct provided by Luceda called a PlaceAndAutoRoute cell: we create a module component by supplying a list of child cells, and a list of the desired connections between the cells (e.g. the out0 port of a microring is connected to a grating coupler). This functionality allowed us to write algorithms to automatically lay out the components: for instance, by laying out the first component and walking through the list of connections to check to see if the next component is already placed or not. The placement and orientation of the new component is determined by minimizing the length of a connecting waveguide. Our photonic circuits also utilize electrical signals to tune the photonic elements (setting propagation phases or microring resonant frequencies via thermo-optical tuning): the algorithm also routes the contacts for the metal heaters to contact pads at the edge of the circuit being designed where it can be contacted by electrical probes. We are currently validating a test run fabricated over the summer, and will use detailed characterization results to prepare our final design cycle in which we aim to demonstrate complex operational logic circuits containing ~50-100 nonlinear resonators.
Modular chassis simplifies packaging and interconnecting of circuit boards

NASA Technical Reports Server (NTRS)

Arens, W. E.; Boline, K. G.

1964-01-01

A system of modular chassis structures has simplified the design for mounting a number of printed circuit boards. This design is structurally adaptable to computer and industrial control system applications.
Circuit-level optimisation of a:Si TFT-based AMOLED pixel circuits for maximum hold current

NASA Astrophysics Data System (ADS)

Foroughi, Aidin; Mehrpoo, Mohammadreza; Ashtiani, Shahin J.

2013-11-01

Design of AMOLED pixel circuits has manifold constraints and trade-offs which provides incentive for circuit designers to seek optimal solutions for different objectives. In this article, we present a discussion on the viability of an optimal solution to achieve the maximum hold current. A compact formula for component sizing in a conventional 2T1C pixel is, therefore, derived. Compared to SPICE simulation results, for several pixel sizes, our predicted optimum sizing yields maximum currents with errors less than 0.4%.
Design of synthetic biological logic circuits based on evolutionary algorithm.

PubMed

Chuang, Chia-Hua; Lin, Chun-Liang; Chang, Yen-Chang; Jennawasin, Tanagorn; Chen, Po-Kuei

2013-08-01

The construction of an artificial biological logic circuit using systematic strategy is recognised as one of the most important topics for the development of synthetic biology. In this study, a real-structured genetic algorithm (RSGA), which combines general advantages of the traditional real genetic algorithm with those of the structured genetic algorithm, is proposed to deal with the biological logic circuit design problem. A general model with the cis-regulatory input function and appropriate promoter activity functions is proposed to synthesise a wide variety of fundamental logic gates such as NOT, Buffer, AND, OR, NAND, NOR and XOR. The results obtained can be extended to synthesise advanced combinational and sequential logic circuits by topologically distinct connections. The resulting optimal design of these logic gates and circuits are established via the RSGA. The in silico computer-based modelling technology has been verified showing its great advantages in the purpose.
Four-to-one power combiner for 20 GHz phased array antenna using RADC MMIC phase shifters

NASA Technical Reports Server (NTRS)

1991-01-01

The design and microwave simulation of two-to-one microstrip power combiners is described. The power combiners were designed for use in a four element phase array receive antenna subarray at 20 GHz. Four test circuits are described which were designed to enable testing of the power combiner and the four element phased array antenna. Test Circuit 1 enables measurement of the two-to-one power combiner. Test Circuit 2 enables measurement of the four-to-one power combiner. Test Circuit 3 enables measurement of a four element antenna array without phase shifting MMIC's in order to characterize the power combiner with the antenna patch-to-microstrip coaxial feedthroughs. Test circuit 4 is the four element phased array antenna including the RADC MMIC phase shifters and appropriate interconnects to provide bias voltages and control phase bits.
SBROME: a scalable optimization and module matching framework for automated biosystems design.

PubMed

Huynh, Linh; Tsoukalas, Athanasios; Köppe, Matthias; Tagkopoulos, Ilias

2013-05-17

The development of a scalable framework for biodesign automation is a formidable challenge given the expected increase in part availability and the ever-growing complexity of synthetic circuits. To allow for (a) the use of previously constructed and characterized circuits or modules and (b) the implementation of designs that can scale up to hundreds of nodes, we here propose a divide-and-conquer Synthetic Biology Reusable Optimization Methodology (SBROME). An abstract user-defined circuit is first transformed and matched against a module database that incorporates circuits that have previously been experimentally characterized. Then the resulting circuit is decomposed to subcircuits that are populated with the set of parts that best approximate the desired function. Finally, all subcircuits are subsequently characterized and deposited back to the module database for future reuse. We successfully applied SBROME toward two alternative designs of a modular 3-input multiplexer that utilize pre-existing logic gates and characterized biological parts.
Parallel-plate Flow Chamber and Continuous Flow Circuit to Evaluate Endothelial Progenitor Cells under Laminar Flow Shear Stress

PubMed Central

Lane, Whitney O.; Jantzen, Alexandra E.; Carlon, Tim A.; Jamiolkowski, Ryan M.; Grenet, Justin E.; Ley, Melissa M.; Haseltine, Justin M.; Galinat, Lauren J.; Lin, Fu-Hsiung; Allen, Jason D.; Truskey, George A.; Achneck, Hardean E.

2012-01-01

The overall goal of this method is to describe a technique to subject adherent cells to laminar flow conditions and evaluate their response to well quantifiable fluid shear stresses1. Our flow chamber design and flow circuit (Fig. 1) contains a transparent viewing region that enables testing of cell adhesion and imaging of cell morphology immediately before flow (Fig. 11A, B), at various time points during flow (Fig. 11C), and after flow (Fig. 11D). These experiments are illustrated with human umbilical cord blood-derived endothelial progenitor cells (EPCs) and porcine EPCs2,3. This method is also applicable to other adherent cell types, e.g. smooth muscle cells (SMCs) or fibroblasts. The chamber and all parts of the circuit are easily sterilized with steam autoclaving. In contrast to other chambers, e.g. microfluidic chambers, large numbers of cells (> 1 million depending on cell size) can be recovered after the flow experiment under sterile conditions for cell culture or other experiments, e.g. DNA or RNA extraction, or immunohistochemistry (Fig. 11E), or scanning electron microscopy5. The shear stress can be adjusted by varying the flow rate of the perfusate, the fluid viscosity, or the channel height and width. The latter can reduce fluid volume or cell needs while ensuring that one-dimensional flow is maintained. It is not necessary to measure chamber height between experiments, since the chamber height does not depend on the use of gaskets, which greatly increases the ease of multiple experiments. Furthermore, the circuit design easily enables the collection of perfusate samples for analysis and/or quantification of metabolites secreted by cells under fluid shear stress exposure, e.g. nitric oxide (Fig. 12)6. PMID:22297325

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