On-clip high frequency reliability and failure test structures

DOEpatents

Snyder, Eric S.; Campbell, David V.

1997-01-01

Self-stressing test structures for realistic high frequency reliability characterizations. An on-chip high frequency oscillator, controlled by DC signals from off-chip, provides a range of high frequency pulses to test structures. The test structures provide information with regard to a variety of reliability failure mechanisms, including hot-carriers, electromigration, and oxide breakdown. The system is normally integrated at the wafer level to predict the failure mechanisms of the production integrated circuits on the same wafer.

A miniature microcontroller curve tracing circuit for space flight testing transistors.

PubMed

Prokop, N; Greer, L; Krasowski, M; Flatico, J; Spina, D

2015-02-01

This paper describes a novel miniature microcontroller based curve tracing circuit, which was designed to monitor the environmental effects on Silicon Carbide Junction Field Effect Transistor (SiC JFET) device performance, while exposed to the low earth orbit environment onboard the International Space Station (ISS) as a resident experiment on the 7th Materials on the International Space Station Experiment (MISSE7). Specifically, the microcontroller circuit was designed to operate autonomously and was flown on the external structure of the ISS for over a year. This curve tracing circuit is capable of measuring current vs. voltage (I-V) characteristics of transistors and diodes. The circuit is current limited for low current devices and is specifically designed to test high temperature, high drain-to-source resistance SiC JFETs. The results of each I-V data set are transmitted serially to an external telemetered communication interface. This paper discusses the circuit architecture, its design, and presents example results.

On-clip high frequency reliability and failure test structures

DOEpatents

Snyder, E.S.; Campbell, D.V.

1997-04-29

Self-stressing test structures for realistic high frequency reliability characterizations. An on-chip high frequency oscillator, controlled by DC signals from off-chip, provides a range of high frequency pulses to test structures. The test structures provide information with regard to a variety of reliability failure mechanisms, including hot-carriers, electromigration, and oxide breakdown. The system is normally integrated at the wafer level to predict the failure mechanisms of the production integrated circuits on the same wafer. 22 figs.

Conception et realisation d'un echantillonneur de grande vitesse en technologie HIGFET (transistor a effet de champ avec heterostructure et grille isolee)

NASA Astrophysics Data System (ADS)

Tazlauanu, Mihai

The research work reported in this thesis details a new fabrication technology for high speed integrated circuits in the broadest sense, including original contributions to device modeling, circuit simulation, integrated circuit design, wafer fabrication, micro-physical and electrical characterization, process flow and final device testing as part of an electrical system. The primary building block of this technology is the heterostructure insulated gate field effect transistor, HIGFET. We used an InP/InGaAs epitaxial heterostructure to ensure a high charge carrier mobility and hence obtain a higher operating frequency than that currently possible for silicon devices. We designed and built integrated circuits with two system architectures. The first architecture integrates the clock signal generator with the sample and hold circuitry on the InP die, while the second is a hybrid architecture of an InP sample and hold assembled with an external clock signal generator made with ECL circuits on GaAs. To generate the clock signals on the same die with the sample and hold circuits, we developed a digital circuit family based on an original inverter, appropriate for depletion mode NMOS technology. We used this circuit to design buffer amplifiers and ring oscillators. Four mask sets produced in a Cadence environment, have permitted the fabrication of test and working devices. Each new mask generation has reflected the previous achievements and has implemented new structures and circuit techniques. The fabrication technology has undergone successive modifications and refinements to optimize device manufacturing. Particular attention has been paid to the technological robustness. The plasma enhanced etching process (RIE) had been used for an exhaustive study for the statistical simulation of the technological steps. Electrical measurements, performed on the experimental samples, have permitted the modeling of the devices, technological processing to be adjusted and circuit design improved. Electrical measurements performed on dedicated test structures, during the fabrication cycle, allowed the identification and correction of some technological problems (ohmic contacts, current leakage, interconnection integrity, and thermal instabilities). Feedback corrections were validated by dedicated experiments with the experimental effort optimized by statistical techniques (factorial fractional design). (Abstract shortened by UMI.)

Reliability Assessment of GaN Power Switches

DTIC Science & Technology

2015-04-17

Possibilities for single event burnout testing were examined as well. Device simulation under the conditions of some of the testing was performed on...reverse-bias (HTRB) and single electron burnout (SEE) tests. 8. Refine test structures, circuits, and procedures, and, if possible, develop

HDL to verification logic translator

NASA Technical Reports Server (NTRS)

Gambles, J. W.; Windley, P. J.

1992-01-01

The increasingly higher number of transistors possible in VLSI circuits compounds the difficulty in insuring correct designs. As the number of possible test cases required to exhaustively simulate a circuit design explodes, a better method is required to confirm the absence of design faults. Formal verification methods provide a way to prove, using logic, that a circuit structure correctly implements its specification. Before verification is accepted by VLSI design engineers, the stand alone verification tools that are in use in the research community must be integrated with the CAD tools used by the designers. One problem facing the acceptance of formal verification into circuit design methodology is that the structural circuit descriptions used by the designers are not appropriate for verification work and those required for verification lack some of the features needed for design. We offer a solution to this dilemma: an automatic translation from the designers' HDL models into definitions for the higher-ordered logic (HOL) verification system. The translated definitions become the low level basis of circuit verification which in turn increases the designer's confidence in the correctness of higher level behavioral models.

Study on the characteristics of a two gap capillary discharge

DOE Office of Scientific and Technical Information (OSTI.GOV)

Huang, D.; Yang, L. J., E-mail: yanglj@mail.xjtu.edu.cn; Huo, P.

2015-02-15

The paper presents a new two-gap capillary (TGC) discharge structure. The prominent innovation is the introduction of the middle electrode, which divides the capillary into the trigger gap and the main gap. The discharge circuit of the TGC comprises the trigger circuit and the main circuit. The two circuits are used for the pre-ionization of the trigger gap and providing energy of 450 J for the main gap arc discharging, respectively. When the discharge initiates, the trigger gap is pre-ionized under high voltage pulse produced by trigger circuit, and meanwhile, the weakly ionized plasma is generated. The main circuit then maintainsmore » the expansion of the plasma, which is called soft capillary discharge. Afterwards, the main gap is shorted and discharges under a relatively low voltage. With the optimization of the circuit parameter, both the energy deposition ratio in main gap and the degree of plasma ionization are enhanced. The efficiency of the energy deposition is almost twice higher compared with that of the conventional capillary structure. The life performance test indicates that the erosion of the middle electrode and the trigger gap carbonization are the key factors that limit the life performance of the TGC.« less

Optimal design of a shear magnetorheological damper for turning vibration suppression

NASA Astrophysics Data System (ADS)

Zhou, Y.; Zhang, Y. L.

2013-09-01

The intelligent material, so-called magnetorheological (MR) fluid, is utilized to control turning vibration. According to the structure of a common lathe CA6140, a shear MR damper is conceived by designing its structure and magnetic circuit. The vibration suppression effect of the damper is proved with dynamic analysis and simulation. Further, the magnetic circuit of the damper is optimized with the ANSYS parametric design language (APDL). In the optimization course, the area of the magnetic circuit and the damping force are considered. After optimization, the damper’s structure and its efficiency of electrical energy consumption are improved. Additionally, a comparative study on damping forces acquired from the initial and optimal design is conducted. A prototype of the developed MR damper is fabricated and magnetic tests are performed to measure the magnetic flux intensities and the residual magnetism in four damping gaps. Then, the testing results are compared with the simulated results. Finally, the suppressing vibration experimental system is set up and cylindrical turning experiments are performed to investigate the working performance of the MR damper.

Antenna-coupled Superconducting Bolometers for Observations of the Cosmic Microwave Background Polarization

NASA Astrophysics Data System (ADS)

Myers, Michael James

We describe the development of a novel millimeter-wave cryogenic detector. The device integrates a planar antenna, superconducting transmission line, bandpass filter, and bolometer onto a single silicon wafer. The bolometer uses a superconducting Transition-Edge Sensor (TES) thermistor, which provides substantial advantages over conventional semiconductor bolometers. The detector chip is fabricated using standard micro-fabrication techniques. This highly-integrated detector architecture is particularly well-suited for use in the de- velopment of polarization-sensitive cryogenic receivers with thousands of pixels. Such receivers are needed to meet the sensitivity requirements of next-generation cosmic microwave background polarization experiments. The design, fabrication, and testing of prototype array pixels are described. Preliminary considerations for a full array design are also discussed. A set of on-chip millimeter-wave test structures were developed to help understand the performance of our millimeter-wave microstrip circuits. These test structures produce a calibrated transmission measurement for an arbitrary two-port circuit using optical techniques, rather than a network analyzer. Some results of fabricated test structures are presented.

Computer Simulation of Microwave Devices

NASA Technical Reports Server (NTRS)

Kory, Carol L.

1997-01-01

The accurate simulation of cold-test results including dispersion, on-axis beam interaction impedance, and attenuation of a helix traveling-wave tube (TWT) slow-wave circuit using the three-dimensional code MAFIA (Maxwell's Equations Solved by the Finite Integration Algorithm) was demonstrated for the first time. Obtaining these results is a critical step in the design of TWT's. A well-established procedure to acquire these parameters is to actually build and test a model or a scale model of the circuit. However, this procedure is time-consuming and expensive, and it limits freedom to examine new variations to the basic circuit. These limitations make the need for computational methods crucial since they can lower costs, reduce tube development time, and lessen limitations on novel designs. Computer simulation has been used to accurately obtain cold-test parameters for several slow-wave circuits. Although the helix slow-wave circuit remains the mainstay of the TWT industry because of its exceptionally wide bandwidth, until recently it has been impossible to accurately analyze a helical TWT using its exact dimensions because of the complexity of its geometrical structure. A new computer modeling technique developed at the NASA Lewis Research Center overcomes these difficulties. The MAFIA three-dimensional mesh for a C-band helix slow-wave circuit is shown.

Integrated circuit test-port architecture and method and apparatus of test-port generation

DOE Office of Scientific and Technical Information (OSTI.GOV)

Teifel, John

A method and apparatus are provided for generating RTL code for a test-port interface of an integrated circuit. In an embodiment, a test-port table is provided as input data. A computer automatically parses the test-port table into data structures and analyzes it to determine input, output, local, and output-enable port names. The computer generates address-detect and test-enable logic constructed from combinational functions. The computer generates one-hot multiplexer logic for at least some of the output ports. The one-hot multiplexer logic for each port is generated so as to enable the port to toggle between data signals and test signals. Themore » computer then completes the generation of the RTL code.« less

Long-term stability of microcrystalline silicon p-i-n solar cells exposed to sun light

DOE Office of Scientific and Technical Information (OSTI.GOV)

Sanguino, P.; Koynov, S.; Schwarz, R.

1999-07-01

The performance of an entirely microcrystalline p-i-n solar cell was monitored during a long-term outdoor test in Lisbon starting in September 1998. A small decrease of the short circuit current was observed after 5 months of operation. The open-circuit voltage remained stable around 400 mV. From the analysis of the I-V characteristic in dark and under illumination they could identify the weak points of the test structure, like large series resistance, high recombination rate, and intensity-dependent collection efficiency.

Method for characterizing the upset response of CMOS circuits using alpha-particle sensitive test circuits

NASA Technical Reports Server (NTRS)

Buehler, Martin G. (Inventor); Nixon, Robert H. (Inventor); Soli, George A. (Inventor); Blaes, Brent R. (Inventor)

1995-01-01

A method for predicting the SEU susceptibility of a standard-cell D-latch using an alpha-particle sensitive SRAM, SPICE critical charge simulation results, and alpha-particle interaction physics. A technique utilizing test structures to quickly and inexpensively characterize the SEU sensitivity of standard cell latches intended for use in a space environment. This bench-level approach utilizes alpha particles to induce upsets in a low LET sensitive 4-k bit test SRAM. This SRAM consists of cells that employ an offset voltage to adjust their upset sensitivity and an enlarged sensitive drain junction to enhance the cell's upset rate.

The oil pressure test of the hydraulic impeller blade

NASA Astrophysics Data System (ADS)

Ye, Wen-bo; Jia, Li-tao

2017-12-01

This article introduced the structure of the Kaplan runner in hydropower station and the operating process of the oil pressure test has been described. What’s more, the whole process, including filling oil to the runner hub, the movement of the runner blade, the oil circuit, have been presented in detail.Since the manipulation of the oil circuit which controlled by three Valve groups consisting of six valves was complicated, the author is planning to replace them with 3-position 3-way electromagnetic valves, so we can simplify the operation procedure.The author hopes this article can provide technical reference for the oil pressure test.

Broad Beam and Ion Microprobe Studies of Single-Event Upsets in High Speed 0.18micron Silicon Germanium Heterojunction Bipolar Transistors and Circuits

NASA Technical Reports Server (NTRS)

Reed, Robert A.; Marshall, Paul W.; Pickel, Jim; Carts, Martin A.; Irwin, TIm; Niu, Guofu; Cressler, John; Krithivasan, Ramkumar; Fritz, Karl; Riggs, Pam

2003-01-01

SiGe based technology is widely recognized for its tremendous potential to impact the high speed microelectronic industry, and therefore the space industry, by monolithic incorporation of low power complementary logic with extremely high speed SiGe Heterojunction Bipolar Transistor (HBT) logic. A variety of studies have examined the ionizing dose, displacement damage and single event characteristics, and are reported. Accessibility to SiGe through an increasing number of manufacturers adds to the importance of understanding its intrinsic radiation characteristics, and in particular the single event effect (SEE) characteristics of the high bandwidth HBT based circuits. IBM is now manufacturing in its 3rd generation of their commercial SiGe processes, and access is currently available to the first two generations (known as and 6HP) through the MOSIS shared mask services with anticipated future release of the latest (7HP) process. The 5 HP process is described and is characterized by a emitter spacing of 0.5 micron and a cutoff frequency ff of 50 GHz, whereas the fully scaled 7HP HBT employs a 0.18 micron emitter and has an fT of 120 GHz. Previous investigations have the examined SEE response of 5 HP HBT circuits through both circuit testing and modeling. Charge collection modeling studies in the 5 H P process have also been conducted, but to date no measurements have been reported of charge collection in any SiGe HBT structures. Nor have circuit models for charge collection been developed in any version other than the 5 HP HBT structure. Our investigation reports the first indications of both charge collection and circuit response in IBM s 7HP-based SiGe process. We compare broad beam heavy ion SEU test results in a fully function Pseudo-Random Number (PRN) sequence generator up to frequencies of 12 Gbps versus effective LET, and also report proton test results in the same circuit. In addition, we examine the charge collection characteristics of individual 7HP HBT structures and map out the spatial sensitivities using the Sandia Focused Heavy Ion Microprobe Facility s Ion Beam Induced Charge Collection (IBICC) technique. Combining the two data sets offers insights into the charge collection mechanisms responsible for circuit level response and provides the first insights into the SEE characteristics of this latest version of IBM s commercial SiGe process.

Function does not follow form in gene regulatory circuits.

PubMed

Payne, Joshua L; Wagner, Andreas

2015-08-20

Gene regulatory circuits are to the cell what arithmetic logic units are to the chip: fundamental components of information processing that map an input onto an output. Gene regulatory circuits come in many different forms, distinct structural configurations that determine who regulates whom. Studies that have focused on the gene expression patterns (functions) of circuits with a given structure (form) have examined just a few structures or gene expression patterns. Here, we use a computational model to exhaustively characterize the gene expression patterns of nearly 17 million three-gene circuits in order to systematically explore the relationship between circuit form and function. Three main conclusions emerge. First, function does not follow form. A circuit of any one structure can have between twelve and nearly thirty thousand distinct gene expression patterns. Second, and conversely, form does not follow function. Most gene expression patterns can be realized by more than one circuit structure. And third, multifunctionality severely constrains circuit form. The number of circuit structures able to drive multiple gene expression patterns decreases rapidly with the number of these patterns. These results indicate that it is generally not possible to infer circuit function from circuit form, or vice versa.

PSpice Model of Lightning Strike to a Steel Reinforced Structure

NASA Astrophysics Data System (ADS)

Koone, Neil; Condren, Brian

2003-12-01

Surges and arcs from lightning can pose hazards to personnel and sensitive equipment, and processes. Steel reinforcement in structures can act as a Faraday cage mitigating lightning effects. Knowing a structure's response to a lightning strike allows hazards associated with lightning to be analyzed. A model of lightning's response in a steel reinforced structure has been developed using PSpice (a commercial circuit simulation). Segments of rebar are modeled as inductors and resistors in series. A program has been written to take architectural information of a steel reinforced structure and "build" a circuit network that is analogous to the network of reinforcement in a facility. A severe current waveform (simulating a 99th percentile lightning strike), modeled as a current source, is introduced in the circuit network, and potential differences within the structure are determined using PSpice. A visual three-dimensional model of the facility displays the voltage distribution across the structure using color to indicate the potential difference relative to the floor. Clear air arcing distances can be calculated from the voltage distribution using a conservative value for the dielectric breakdown strength of air. Potential validation tests for the model will be presented.

Addressable Inverter Matrix Tests Integrated-Circuit Wafer

NASA Technical Reports Server (NTRS)

Buehler, Martin G.

1988-01-01

Addressing elements indirectly through shift register reduces number of test probes. With aid of new technique, complex test structure on silicon wafer tested with relatively small number of test probes. Conserves silicon area by reduction of area devoted to pads. Allows thorough evaluation of test structure characteristics and of manufacturing process parameters. Test structure consists of shift register and matrix of inverter/transmission-gate cells connected to two-by-ten array of probe pads. Entire pattern contained in square area having only 1.6-millimeter sides. Shift register is conventional static CMOS device using inverters and transmission gates in master/slave D flip-flop configuration.

Performance of the high speed anechoic wind tunnel at Lyon University

NASA Technical Reports Server (NTRS)

Sunyach, M.; Brunel, B.; Comte-Bellot, G.

1986-01-01

The characteristics of the feed duct, the wind tunnel, and the experiments run in the convergent-divergent anechoic wind tunnel at Lyon University are described. The wind tunnel was designed to eliminate noise from the entrance of air or from flow interactions with the tunnel walls so that noise caused by the flow-test structure interactions can be studied. The channel contains 1 x 1 x 0.2 m glass and metal foil baffles spaced 0.2 m apart. The flow is forced by a 350 kW fan in the primary circuit, and a 110 kW blower in the secondary circuit. The primary circuit features a factor of four throat reductions, followed by a 1.6 reduction before the test section. Upstream and downstream sensors permit monitoring of the anechoic effectiveness of the channel. Other sensors allow modeling of the flow structures in the tunnel. The tunnel was used to examine turbulent boundary layers in flows up to 140 m/sec, tubulence-excited vibrations in walls, and the effects of laminar and turbulent flows on the appearance and locations of noise sources.

Characterization of pixel sensor designed in 180 nm SOI CMOS technology

NASA Astrophysics Data System (ADS)

Benka, T.; Havranek, M.; Hejtmanek, M.; Jakovenko, J.; Janoska, Z.; Marcisovska, M.; Marcisovsky, M.; Neue, G.; Tomasek, L.; Vrba, V.

2018-01-01

A new type of X-ray imaging Monolithic Active Pixel Sensor (MAPS), X-CHIP-02, was developed using a 180 nm deep submicron Silicon On Insulator (SOI) CMOS commercial technology. Two pixel matrices were integrated into the prototype chip, which differ by the pixel pitch of 50 μm and 100 μm. The X-CHIP-02 contains several test structures, which are useful for characterization of individual blocks. The sensitive part of the pixel integrated in the handle wafer is one of the key structures designed for testing. The purpose of this structure is to determine the capacitance of the sensitive part (diode in the MAPS pixel). The measured capacitance is 2.9 fF for 50 μm pixel pitch and 4.8 fF for 100 μm pixel pitch at -100 V (default operational voltage). This structure was used to measure the IV characteristics of the sensitive diode. In this work, we report on a circuit designed for precise determination of sensor capacitance and IV characteristics of both pixel types with respect to X-ray irradiation. The motivation for measurement of the sensor capacitance was its importance for the design of front-end amplifier circuits. The design of pixel elements, as well as circuit simulation and laboratory measurement techniques are described. The experimental results are of great importance for further development of MAPS sensors in this technology.

End-of-fabrication CMOS process monitor

NASA Technical Reports Server (NTRS)

Buehler, M. G.; Allen, R. A.; Blaes, B. R.; Hannaman, D. J.; Lieneweg, U.; Lin, Y.-S.; Sayah, H. R.

1990-01-01

A set of test 'modules' for verifying the quality of a complementary metal oxide semiconductor (CMOS) process at the end of the wafer fabrication is documented. By electrical testing of specific structures, over thirty parameters are collected characterizing interconnects, dielectrics, contacts, transistors, and inverters. Each test module contains a specification of its purpose, the layout of the test structure, the test procedures, the data reduction algorithms, and exemplary results obtained from 3-, 2-, or 1.6-micrometer CMOS/bulk processes. The document is intended to establish standard process qualification procedures for Application Specific Integrated Circuits (ASIC's).

Apparatus for and method of testing an electrical ground fault circuit interrupt device

DOEpatents

Andrews, L.B.

1998-08-18

An apparatus for testing a ground fault circuit interrupt device includes a processor, an input device connected to the processor for receiving input from an operator, a storage media connected to the processor for storing test data, an output device connected to the processor for outputting information corresponding to the test data to the operator, and a calibrated variable load circuit connected between the processor and the ground fault circuit interrupt device. The ground fault circuit interrupt device is configured to trip a corresponding circuit breaker. The processor is configured to receive signals from the calibrated variable load circuit and to process the signals to determine a trip threshold current and/or a trip time. A method of testing the ground fault circuit interrupt device includes a first step of providing an identification for the ground fault circuit interrupt device. Test data is then recorded in accordance with the identification. By comparing test data from an initial test with test data from a subsequent test, a trend of performance for the ground fault circuit interrupt device is determined. 17 figs.

Apparatus for and method of testing an electrical ground fault circuit interrupt device

DOEpatents

Andrews, Lowell B.

1998-01-01

An apparatus for testing a ground fault circuit interrupt device includes a processor, an input device connected to the processor for receiving input from an operator, a storage media connected to the processor for storing test data, an output device connected to the processor for outputting information corresponding to the test data to the operator, and a calibrated variable load circuit connected between the processor and the ground fault circuit interrupt device. The ground fault circuit interrupt device is configured to trip a corresponding circuit breaker. The processor is configured to receive signals from the calibrated variable load circuit and to process the signals to determine a trip threshold current and/or a trip time. A method of testing the ground fault circuit interrupt device includes a first step of providing an identification for the ground fault circuit interrupt device. Test data is then recorded in accordance with the identification. By comparing test data from an initial test with test data from a subsequent test, a trend of performance for the ground fault circuit interrupt device is determined.

Microchannel cooling of face down bonded chips

DOEpatents

Bernhardt, Anthony F.

1993-01-01

Microchannel cooling is applied to flip-chip bonded integrated circuits, in a manner which maintains the advantages of flip-chip bonds, while overcoming the difficulties encountered in cooling the chips. The technique is suited to either multichip integrated circuit boards in a plane, or to stacks of circuit boards in a three dimensional interconnect structure. Integrated circuit chips are mounted on a circuit board using flip-chip or control collapse bonds. A microchannel structure is essentially permanently coupled with the back of the chip. A coolant delivery manifold delivers coolant to the microchannel structure, and a seal consisting of a compressible elastomer is provided between the coolant delivery manifold and the microchannel structure. The integrated circuit chip and microchannel structure are connected together to form a replaceable integrated circuit module which can be easily decoupled from the coolant delivery manifold and the circuit board. The coolant supply manifolds may be disposed between the circuit boards in a stack and coupled to supplies of coolant through a side of the stack.

Microchannel cooling of face down bonded chips

DOEpatents

Bernhardt, A.F.

1993-06-08

Microchannel cooling is applied to flip-chip bonded integrated circuits, in a manner which maintains the advantages of flip-chip bonds, while overcoming the difficulties encountered in cooling the chips. The technique is suited to either multi chip integrated circuit boards in a plane, or to stacks of circuit boards in a three dimensional interconnect structure. Integrated circuit chips are mounted on a circuit board using flip-chip or control collapse bonds. A microchannel structure is essentially permanently coupled with the back of the chip. A coolant delivery manifold delivers coolant to the microchannel structure, and a seal consisting of a compressible elastomer is provided between the coolant delivery manifold and the microchannel structure. The integrated circuit chip and microchannel structure are connected together to form a replaceable integrated circuit module which can be easily decoupled from the coolant delivery manifold and the circuit board. The coolant supply manifolds may be disposed between the circuit boards in a stack and coupled to supplies of coolant through a side of the stack.

Addressable test matrix for measuring analog transfer characteristics of test elements used for integrated process control and device evaluation

NASA Technical Reports Server (NTRS)

Buehler, Martin G. (Inventor)

1988-01-01

A set of addressable test structures, each of which uses addressing schemes to access individual elements of the structure in a matrix, is used to test the quality of a wafer before integrated circuits produced thereon are diced, packaged and subjected to final testing. The electrical characteristic of each element is checked and compared to the electrical characteristic of all other like elements in the matrix. The effectiveness of the addressable test matrix is in readily analyzing the electrical characteristics of the test elements and in providing diagnostic information.

Thermometry and thermal management of carbon nanotube circuits

NASA Astrophysics Data System (ADS)

Mayle, Scott; Gupta, Tanuj; Davis, Sam; Chandrasekhar, Venkat; Shafraniuk, Serhii

2015-05-01

Monitoring of the intrinsic temperature and the thermal management is discussed for the carbon nanotube nano-circuits. The experimental results concerning fabricating and testing of a thermometer able to monitor the intrinsic temperature on nanoscale are reported. We also suggest a model which describes a bi-metal multilayer system able to filter the heat flow, based on separating the electron and phonon components one from another. The bi-metal multilayer structure minimizes the phonon component of the heat flow, while retaining the electronic part. The method allows one to improve the overall performance of the electronic nano-circuits due to minimizing the energy dissipation.

Secure TRNG with random phase stimulation

NASA Astrophysics Data System (ADS)

Wieczorek, Piotr Z.

2017-08-01

In this paper a novel TRNG concept is proposed which is a vital part of cryptographic systems. The proposed TRNG involves phase variability of a pair of ring oscillators (ROs) to force the multiple metastable events in a flip-flop (FF). In the solution, the ROs are periodically activated to ensure the violation of the FF timing and resultant state randomness, while the TRNG circuit adapts the structure of ROs to obtain the maximum entropy and circuit security. The TRNG can be implemented in inexpensive re-programmable devices (CPLDs or FPGAs) without the use of Digital Clock Managers (DCMs). Preliminary test results proved the circuit's immunity to the intentional frequency injection attacks.

Selection of test paths for solder joint intermittent connection faults under DC stimulus

NASA Astrophysics Data System (ADS)

Huakang, Li; Kehong, Lv; Jing, Qiu; Guanjun, Liu; Bailiang, Chen

2018-06-01

The test path of solder joint intermittent connection faults under direct-current stimulus is examined in this paper. According to the physical structure of the circuit, a network model is established first. A network node is utilised to represent the test node. The path edge refers to the number of intermittent connection faults in the path. Then, the selection criteria of the test path based on the node degree index are proposed and the solder joint intermittent connection faults are covered using fewer test paths. Finally, three circuits are selected to verify the method. To test if the intermittent fault is covered by the test paths, the intermittent fault is simulated by a switch. The results show that the proposed method can detect the solder joint intermittent connection fault using fewer test paths. Additionally, the number of detection steps is greatly reduced without compromising fault coverage.

Electronic test and calibration circuits, a compilation

NASA Technical Reports Server (NTRS)

1972-01-01

A wide variety of simple test calibration circuits are compiled for the engineer and laboratory technician. The majority of circuits were found inexpensive to assemble. Testing electronic devices and components, instrument and system test, calibration and reference circuits, and simple test procedures are presented.

A device for testing cables

NASA Technical Reports Server (NTRS)

Hayhurst, Arthur Ray (Inventor)

1993-01-01

A device for testing current paths is attachable to a conductor. The device automatically checks the current paths of the conductor for continuity of a center conductor, continuity of a shield, and a short circuit between the shield and the center conductor. The device includes a pair of connectors and a circuit to provide for testing of the conductive paths of a cable to be tested with the circuit paths of the circuit. The circuit paths in the circuit include indicators to simultaneously indicate the results of the testing.

Off-line, built-in test techniques for VLSI circuits

NASA Technical Reports Server (NTRS)

Buehler, M. G.; Sievers, M. W.

1982-01-01

It is shown that the use of redundant on-chip circuitry improves the testability of an entire VLSI circuit. In the study described here, five techniques applied to a two-bit ripple carry adder are compared. The techniques considered are self-oscillation, self-comparison, partition, scan path, and built-in logic block observer. It is noted that both classical stuck-at faults and nonclassical faults, such as bridging faults (shorts), stuck-on x faults where x may be 0, 1, or vary between the two, and parasitic flip-flop faults occur in IC structures. To simplify the analysis of the testing techniques, however, a stuck-at fault model is assumed.

Device for testing continuity and/or short circuits in a cable

NASA Technical Reports Server (NTRS)

Hayhurst, Arthur R. (Inventor)

1995-01-01

A device for testing current paths is attachable to a conductor. The device automatically checks the current paths of the conductor for continuity of a center conductor, continuity of a shield and a short circuit between the shield and the center conductor. The device includes a pair of connectors and a circuit to provide for testing of the conductive paths of the cable. The pair of connectors electrically connects the conductive paths of a cable to be tested with the circuit paths of the circuit. The circuit paths in the circuit include indicators to simultaneously indicate the results of the testing.

Digitally controlled chirped pulse laser for sub-terahertz-range fiber structure interrogation.

PubMed

Chen, Zhen; Hefferman, Gerald; Wei, Tao

2017-03-01

This Letter reports a sweep velocity-locked laser pulse generator controlled using a digital phase-locked loop (DPLL) circuit. This design is used for the interrogation of sub-terahertz-range fiber structures for sensing applications that require real-time data collection with millimeter-level spatial resolution. A distributed feedback laser was employed to generate chirped laser pulses via injection current modulation. A DPLL circuit was developed to lock the optical frequency sweep velocity. A high-quality linearly chirped laser pulse with a frequency excursion of 117.69 GHz at an optical communication band was demonstrated. The system was further adopted to interrogate a continuously distributed sub-terahertz-range fiber structure (sub-THz-fs) for sensing applications. A strain test was conducted in which the sub-THz-fs showed a linear response to longitudinal strain change with predicted sensitivity. Additionally, temperature testing was conducted in which a heat source was used to generate a temperature distribution along the fiber structure to demonstrate its distributed sensing capability. A Gaussian temperature profile was measured using the described system and tracked in real time, as the heat source was moved.

On Demand Internal Short Circuit Device Enables Verification of Safer, Higher Performing Battery Designs

DOE Office of Scientific and Technical Information (OSTI.GOV)

Darcy, Eric; Keyser, Matthew

The Internal Short Circuit (ISC) device enables critical battery safety verification. With the aluminum interstitial heat sink between the cells, normal trigger cells cannot be driven into thermal runaway without excessive temperature bias of adjacent cells. With an implantable, on-demand ISC device, thermal runaway tests show that the conductive heat sinks protected adjacent cells from propagation. High heat dissipation and structural support of Al heat sinks show high promise for safer, higher performing batteries.

The test of VLSI circuits

NASA Astrophysics Data System (ADS)

Baviere, Ph.

Tests which have proven effective for evaluating VLSI circuits for space applications are described. It is recommended that circuits be examined after each manfacturing step to gain fast feedback on inadequacies in the production system. Data from failure modes which occur during operational lifetimes of circuits also permit redefinition of the manufacturing and quality control process to eliminate the defects identified. Other tests include determination of the operational envelope of the circuits, examination of the circuit response to controlled inputs, and the performance and functional speeds of ROM and RAM memories. Finally, it is desirable that all new circuits be designed with testing in mind.

Shunted Piezoelectric Vibration Damping Analysis Including Centrifugal Loading Effects

NASA Technical Reports Server (NTRS)

Min, James B.; Duffy, Kirsten P.; Provenza, Andrew J.

2011-01-01

Excessive vibration of turbomachinery blades causes high cycle fatigue problems which require damping treatments to mitigate vibration levels. One method is the use of piezoelectric materials as passive or active dampers. Based on the technical challenges and requirements learned from previous turbomachinery rotor blades research, an effort has been made to investigate the effectiveness of a shunted piezoelectric for the turbomachinery rotor blades vibration control, specifically for a condition with centrifugal rotation. While ample research has been performed on the use of a piezoelectric material with electric circuits to attempt to control the structural vibration damping, very little study has been done regarding rotational effects. The present study attempts to fill this void. Specifically, the objectives of this study are: (a) to create and analyze finite element models for harmonic forced response vibration analysis coupled with shunted piezoelectric circuits for engine blade operational conditions, (b) to validate the experimental test approaches with numerical results and vice versa, and (c) to establish a numerical modeling capability for vibration control using shunted piezoelectric circuits under rotation. Study has focused on a resonant damping control using shunted piezoelectric patches on plate specimens. Tests and analyses were performed for both non-spinning and spinning conditions. The finite element (FE) shunted piezoelectric circuit damping simulations were performed using the ANSYS Multiphysics code for the resistive and inductive circuit piezoelectric simulations of both conditions. The FE results showed a good correlation with experimental test results. Tests and analyses of shunted piezoelectric damping control, demonstrating with plate specimens, show a great potential to reduce blade vibrations under centrifugal loading.

A Cost-Effective Energy-Recovering Sustain Driving Circuit for ac Plasma Display Panels

NASA Astrophysics Data System (ADS)

Lim, Jae Kwang; Tae, Heung-Sik; Choi, Byungcho; Kim, Seok Gi

A new sustain driving circuit, featuring an energy-recovering function with simple structure and minimal component count, is proposed as a cost-effective solution for driving plasma display panels during the sustaining period. Compared with existing solutions, the proposed circuit reduces the number of semiconductor switches and reactive circuit components without compromising the circuit performance and gas-discharging characteristics. In addition, the proposed circuit utilizes the harness wire as an inductive circuit component, thereby further simplifying the circuit structure. The performance of the proposed circuit is confirmed with a 42-inch plasma display panel.

Thermal stress cycling of GaAs solar cells

NASA Technical Reports Server (NTRS)

Janousek, B. K.; Francis, R. W.; Wendt, J. P.

1985-01-01

A thermal cycling experiment was performed on GaAs solar cells to establish the electrical and structural integrity of these cells under the temperature conditions of a simulated low-Earth orbit of 3-year duration. Thirty single junction GaAs cells were obtained and tests were performed to establish the beginning-of-life characteristics of these cells. The tests consisted of cell I-V power output curves, from which were obtained short-circuit current, open circuit voltage, fill factor, and cell efficiency, and optical micrographs, spectral response, and ion microprobe mass analysis (IMMA) depth profiles on both the front surfaces and the front metallic contacts of the cells. Following 5,000 thermal cycles, the performance of the cells was reexamined in addition to any factors which might contribute to performance degradation. It is established that, after 5,000 thermal cycles, the cells retain their power output with no loss of structural integrity or change in physical appearance.

Single crystal CVD diamond membranes for betavoltaic cells

NASA Astrophysics Data System (ADS)

Delfaure, C.; Pomorski, M.; de Sanoit, J.; Bergonzo, P.; Saada, S.

2016-06-01

A single crystal diamond large area thin membrane was assembled as a p-doped/Intrinsic/Metal (PIM) structure and used in a betavoltaic configuration. When tested with a 20 keV electron beam from a high resolution scanning electron microscope, we measured an open circuit voltage (Voc) of 1.85 V, a charge collection efficiency (CCE) of 98%, a fill-factor of 80%, and a total conversion efficiency of 9.4%. These parameters are inherently linked to the diamond membrane PIM structure that allows full device depletion even at 0 V and are among the highest reported up to now for any other material tested for betavoltaic devices. It enables to drive a high short-circuit current Isc up to 7.12 μA, to reach a maximum power Pmax of 10.48 μW, a remarkable value demonstrating the high-benefit of diamond for the realization of long-life radioisotope based micro-batteries.

30 CFR 77.800-1 - Testing, examination, and maintenance of circuit breakers; procedures.

Code of Federal Regulations, 2010 CFR

2010-07-01

..., examination, and maintenance of circuit breakers; procedures. (a) Circuit breakers and their auxiliary devices protecting high-voltage circuits to portable or mobile equipment shall be tested and examined at least once... circuit breaker and its auxiliary devices, and such repairs or adjustments as are indicated by such tests...

49 CFR 236.577 - Test, acknowledgement, and cut-in circuits.

Code of Federal Regulations, 2010 CFR

2010-10-01

... 49 Transportation 4 2010-10-01 2010-10-01 false Test, acknowledgement, and cut-in circuits. 236.577 Section 236.577 Transportation Other Regulations Relating to Transportation (Continued) FEDERAL..., acknowledgement, and cut-in circuits. Test, acknowledgement, and cut-in circuits shall be tested at least once...

Mechanisms of Hierarchical Reinforcement Learning in Corticostriatal Circuits 1: Computational Analysis

PubMed Central

Badre, David

2012-01-01

Growing evidence suggests that the prefrontal cortex (PFC) is organized hierarchically, with more anterior regions having increasingly abstract representations. How does this organization support hierarchical cognitive control and the rapid discovery of abstract action rules? We present computational models at different levels of description. A neural circuit model simulates interacting corticostriatal circuits organized hierarchically. In each circuit, the basal ganglia gate frontal actions, with some striatal units gating the inputs to PFC and others gating the outputs to influence response selection. Learning at all of these levels is accomplished via dopaminergic reward prediction error signals in each corticostriatal circuit. This functionality allows the system to exhibit conditional if–then hypothesis testing and to learn rapidly in environments with hierarchical structure. We also develop a hybrid Bayesian-reinforcement learning mixture of experts (MoE) model, which can estimate the most likely hypothesis state of individual participants based on their observed sequence of choices and rewards. This model yields accurate probabilistic estimates about which hypotheses are attended by manipulating attentional states in the generative neural model and recovering them with the MoE model. This 2-pronged modeling approach leads to multiple quantitative predictions that are tested with functional magnetic resonance imaging in the companion paper. PMID:21693490

Design structure for in-system redundant array repair in integrated circuits

DOEpatents

Bright, Arthur A.; Crumley, Paul G.; Dombrowa, Marc; Douskey, Steven M.; Haring, Rudolf A.; Oakland, Steven F.; Quellette, Michael R.; Strissel, Scott A.

2008-11-25

A design structure for repairing an integrated circuit during operation of the integrated circuit. The integrated circuit comprising of a multitude of memory arrays and a fuse box holding control data for controlling redundancy logic of the arrays. The design structure provides the integrated circuit with a control data selector for passing the control data from the fuse box to the memory arrays; providing a source of alternate control data, external of the integrated circuit; and connecting the source of alternate control data to the control data selector. The design structure further passes the alternate control data from the source thereof, through the control data selector and to the memory arrays to control the redundancy logic of the memory arrays.

3D Printed Shock Mitigating Structures

NASA Astrophysics Data System (ADS)

Schrand, Amanda; Elston, Edwin; Dennis, Mitzi; Metroke, Tammy; Chen, Chenggang; Patton, Steven; Ganguli, Sabyasachi; Roy, Ajit

Here we explore the durability, and shock mitigating potential, of solid and cellular 3D printed polymers and conductive inks under high strain rate, compressive shock wave and high g acceleration conditions. Our initial designs include a simple circuit with 4 resistors embedded into circular discs and a complex cylindrical gyroid shape. A novel ink consisting of silver-coated carbon black nanoparticles in a thermoplastic polyurethane was used as the trace material. One version of the disc structural design has the advantage of allowing disassembly after testing for direct failure analysis. After increasing impacts, printed and traditionally potted circuits were examined for functionality. Additionally, in the open disc design, trace cracking and delamination of resistors were able to be observed. In a parallel study, we examined the shock mitigating behavior of 3D printed cellular gyroid structures on a Split Hopkinson Pressure Bar (SHPB). We explored alterations to the classic SHPB setup for testing the low impedance, cellular samples to most accurately reflect the stress state inside the sample (strain rates from 700 to 1750 s-1). We discovered that the gyroid can effectively absorb the impact of the test resulting in crushing the structure. Future studies aim to tailor the unit cell dimensions for certain frequencies, increase print accuracy and optimize material compositions for conductivity and adhesion to manufacture more durable devices.

Extended behavioural device modelling and circuit simulation with Qucs-S

NASA Astrophysics Data System (ADS)

Brinson, M. E.; Kuznetsov, V.

2018-03-01

Current trends in circuit simulation suggest a growing interest in open source software that allows access to more than one simulation engine while simultaneously supporting schematic drawing tools, behavioural Verilog-A and XSPICE component modelling, and output data post-processing. This article introduces a number of new features recently implemented in the 'Quite universal circuit simulator - SPICE variant' (Qucs-S), including structure and fundamental schematic capture algorithms, at the same time highlighting their use in behavioural semiconductor device modelling. Particular importance is placed on the interaction between Qucs-S schematics, equation-defined devices, SPICE B behavioural sources and hardware description language (HDL) scripts. The multi-simulator version of Qucs is a freely available tool that offers extended modelling and simulation features compared to those provided by legacy circuit simulators. The performance of a number of Qucs-S modelling extensions are demonstrated with a GaN HEMT compact device model and data obtained from tests using the Qucs-S/Ngspice/Xyce ©/SPICE OPUS multi-engine circuit simulator.

Development, Integration and Testing of Automated Triggering Circuit for Hybrid DC Circuit Breaker

NASA Astrophysics Data System (ADS)

Kanabar, Deven; Roy, Swati; Dodiya, Chiragkumar; Pradhan, Subrata

2017-04-01

A novel concept of Hybrid DC circuit breaker having combination of mechanical switch and static switch provides arc-less current commutation into the dump resistor during quench in superconducting magnet operation. The triggering of mechanical and static switches in Hybrid DC breaker can be automatized which can effectively reduce the overall current commutation time of hybrid DC circuit breaker and make the operation independent of opening time of mechanical switch. With this view, a dedicated control circuit (auto-triggering circuit) has been developed which can decide the timing and pulse duration for mechanical switch as well as static switch from the operating parameters. This circuit has been tested with dummy parameters and thereafter integrated with the actual test set up of hybrid DC circuit breaker. This paper deals with the conceptual design of the auto-triggering circuit, its control logic and operation. The test results of Hybrid DC circuit breaker using this circuit have also been discussed.

Design of a signal conditioner for the Fermilab Magnet Test Facility

DOE Office of Scientific and Technical Information (OSTI.GOV)

Giannelli, Pietro

2012-01-01

This thesis describes the design of a remotely-programmable signal conditioner for the harmonic measurement of accelerator magnets. A 10-channel signal conditioning circuit featuring bucking capabilities was designed from scratch and implemented to the level of the printed circuit board layout. Other system components were chosen from those available on the market. Software design was started with the definition of routine procedures. This thesis is part of an upgrade project for replacing obsolescent automated test equipment belonging to the Fermilab Magnet Test Facility. The design started with a given set of requirements. Using a top-down approach, all the circuits were designedmore » and their expected performances were theoretically predicted and simulated. A limited prototyping phase followed. The printed circuit boards were laid out and routed using a CAD software and focusing the design on maximum electromagnetic interference immunity. An embedded board was selected for controlling and interfacing the signal conditioning circuitry with the instrumentation network. Basic low level routines for hardware access were defined. This work covered the entire design process of the signal conditioner, resulting in a project ready for manufacturing. The expected performances are in line with the requirements and, in the cases where this was not possible, approval of trade-offs was sought and received from the end users. Part I deals with the global structure of the signal conditioner and the subdivision in functional macro-blocks. Part II treats the hardware design phase in detail, covering the analog and digital circuits, the printed circuit layouts, the embedded controller and the power supply selection. Part III deals with the basic hardware-related routines to be implemented in the final software.« less

49 CFR 234.269 - Cut-out circuits.

Code of Federal Regulations, 2011 CFR

2011-10-01

... 49 Transportation 4 2011-10-01 2011-10-01 false Cut-out circuits. 234.269 Section 234.269..., Inspection, and Testing Inspections and Tests § 234.269 Cut-out circuits. Each cut-out circuit shall be... of this section, a cut-out circuit is any circuit which overrides the operation of automatic warning...

49 CFR 234.269 - Cut-out circuits.

Code of Federal Regulations, 2010 CFR

2010-10-01

... 49 Transportation 4 2010-10-01 2010-10-01 false Cut-out circuits. 234.269 Section 234.269..., Inspection, and Testing Inspections and Tests § 234.269 Cut-out circuits. Each cut-out circuit shall be... of this section, a cut-out circuit is any circuit which overrides the operation of automatic warning...

Testing interconnected VLSI circuits in the Big Viterbi Decoder

NASA Technical Reports Server (NTRS)

Onyszchuk, I. M.

1991-01-01

The Big Viterbi Decoder (BVD) is a powerful error-correcting hardware device for the Deep Space Network (DSN), in support of the Galileo and Comet Rendezvous Asteroid Flyby (CRAF)/Cassini Missions. Recently, a prototype was completed and run successfully at 400,000 or more decoded bits per second. This prototype is a complex digital system whose core arithmetic unit consists of 256 identical very large scale integration (VLSI) gate-array chips, 16 on each of 16 identical boards which are connected through a 28-layer, printed-circuit backplane using 4416 wires. Special techniques were developed for debugging, testing, and locating faults inside individual chips, on boards, and within the entire decoder. The methods are based upon hierarchical structure in the decoder, and require that chips or boards be wired themselves as Viterbi decoders. The basic procedure consists of sending a small set of known, very noisy channel symbols through a decoder, and matching observables against values computed by a software simulation. Also, tests were devised for finding open and short-circuited wires which connect VLSI chips on the boards and through the backplane.

Analysis of High Power IGBT Short Circuit Failures

DOE Office of Scientific and Technical Information (OSTI.GOV)

Pappas, G.

2005-02-11

The Next Linear Collider (NLC) accelerator proposal at SLAC requires a highly efficient and reliable, low cost, pulsed-power modulator to drive the klystrons. A solid-state induction modulator has been developed at SLAC to power the klystrons; this modulator uses commercial high voltage and high current Insulated Gate Bipolar Transistor (IGBT) modules. Testing of these IGBT modules under pulsed conditions was very successful; however, the IGBTs failed when tests were performed into a low inductance short circuit. The internal electrical connections of a commercial IGBT module have been analyzed to extract self and mutual partial inductances for the main current pathsmore » as well as for the gate structure. The IGBT module, together with the partial inductances, has been modeled using PSpice. Predictions for electrical paths that carry the highest current correlate with the sites of failed die under short circuit tests. A similar analysis has been carried out for a SLAC proposal for an IGBT module layout. This paper discusses the mathematical model of the IGBT module geometry and presents simulation results.« less

Electrical short circuit and current overload tests on aircraft wiring

NASA Technical Reports Server (NTRS)

Cahill, Patricia

1995-01-01

The findings of electrical short circuit and current overload tests performed on commercial aircraft wiring are presented. A series of bench-scale tests were conducted to evaluate circuit breaker response to overcurrent and to determine if the wire showed any visible signs of thermal degradation due to overcurrent. Three types of wire used in commercial aircraft were evaluated: MIL-W-22759/34 (150 C rated), MIL-W-81381/12 (200 C rated), and BMS 1360 (260 C rated). A second series of tests evaluated circuit breaker response to short circuits and ticking faults. These tests were also meant to determine if the three test wires behaved differently under these conditions and if a short circuit or ticking fault could start a fire. It is concluded that circuit breakers provided reliable overcurrent protection. Circuit breakers may not protect wire from ticking faults but can protect wire from direct shorts. These tests indicated that the appearance of a wire subjected to a current that totally degrades the insulation looks identical to a wire subjected to a fire; however the 'fire exposed' conductor was more brittle than the conductor degraded by overcurrent. Preliminary testing indicates that direct short circuits are not likely to start a fire. Preliminary testing indicated that direct short circuits do not erode insulation and conductor to the extent that ticking faults did. Circuit breakers may not safeguard against the ignition of flammable materials by ticking faults. The flammability of materials near ticking faults is far more important than the rating of the wire insulation material.

Built-in-test by signature inspection (bitsi)

DOEpatents

Bergeson, Gary C.; Morneau, Richard A.

1991-01-01

A system and method for fault detection for electronic circuits. A stimulus generator sends a signal to the input of the circuit under test. Signature inspection logic compares the resultant signal from test nodes on the circuit to an expected signal. If the signals do not match, the signature inspection logic sends a signal to the control logic for indication of fault detection in the circuit. A data input multiplexer between the test nodes of the circuit under test and the signature inspection logic can provide for identification of the specific node at fault by the signature inspection logic. Control logic responsive to the signature inspection logic conveys information about fault detection for use in determining the condition of the circuit. When used in conjunction with a system test controller, the built-in test by signature inspection system and method can be used to poll a plurality of circuits automatically and continuous for faults and record the results of such polling in the system test controller.

Total ionizing dose effect and damage mechanism on saturation output voltage of charge coupled device

NASA Astrophysics Data System (ADS)

Wen, Lin; Li, Yu-dong; Guo, Qi; Wang, Chao-min

2018-02-01

Total ionizing dose effect is a major threat to space applications of CCD, which leads to the decrease of CCD saturation output voltage and the increase of dark signal. This paper investigated CCD and its readout circuit for experimental samples of different channel width to length ratio of MOSFET, and readout circuit amplifier, and CCD. The irradiation source was 60Co- gamma ray. through testing the parameters degradation of MOSFET and amplifier degradation, the generation and annealing law of irradiation induced defects in MOS single tube are analyzed. Combined with the radiation effect of amplifier and CCD, The correlation of radiation damage of the MOSFET and the readout circuit amplifier and CCD parameter degradation is established. Finally, this paper reveals the physical mechanism of ionizing radiation damage of the readout circuit. The research results provide a scientific basis for the selection of anti-radiation technology and structure optimization of domestic CCD.

Bidirectional Causal Connectivity in the Cortico-Limbic-Cerebellar Circuit Related to Structural Alterations in First-Episode, Drug-Naive Somatization Disorder

PubMed Central

Li, Ranran; Liu, Feng; Su, Qinji; Zhang, Zhikun; Zhao, Jin; Wang, Ying; Wu, Renrong; Zhao, Jingping; Guo, Wenbin

2018-01-01

Background: Anatomical and functional deficits in the cortico-limbic-cerebellar circuit are involved in the neurobiology of somatization disorder (SD). The present study was performed to examine causal connectivity of the cortico-limbic-cerebellar circuit related to structural deficits in first-episode, drug-naive patients with SD at rest. Methods: A total of 25 first-episode, drug-naive patients with SD and 28 healthy controls underwent structural and resting-state functional magnetic resonance imaging. Voxel-based morphometry and Granger causality analysis (GCA) were used to analyze the data. Results: Results showed that patients with SD exhibited decreased gray matter volume (GMV) in the right cerebellum Crus I, and increased GMV in the left anterior cingulate cortex (ACC), right middle frontal gyrus (MFG), and left angular gyrus. Causal connectivity of the cortico-limbic-cerebellar circuit was partly affected by structural alterations in the patients. Patients with SD showed bidirectional cortico-limbic connectivity abnormalities and bidirectional cortico-cerebellar and limbic-cerebellar connectivity abnormalities. The mean GMV of the right MFG was negatively correlated with the scores of the somatization subscale of the symptom checklist-90 and persistent error response of the Wisconsin Card Sorting Test (WCST) in the patients. A negative correlation was observed between increased driving connectivity from the right MFG to the right fusiform gyrus/cerebellum IV, V and the scores of the Eysenck Personality Questionnaire extraversion subscale. The mean GMV of the left ACC was negatively correlated with the WCST number of errors and persistent error response. Negative correlation was found between the causal effect from the left ACC to the right middle temporal gyrus and the scores of WCST number of categories achieved. Conclusions: Our findings show the partial effects of structural alterations on the cortico-limbic-cerebellar circuit in first-episode, drug-naive patients with SD. Correlations are observed between anatomical alterations or causal effects and clinical variables in patients with SD, and bear clinical significance. The present study emphasizes the importance of the cortico-limbic-cerebellar circuit in the neurobiology of SD. PMID:29755373

42 CFR 84.93 - Gas flow test; open-circuit apparatus.

Code of Federal Regulations, 2011 CFR

2011-10-01

... 42 Public Health 1 2011-10-01 2011-10-01 false Gas flow test; open-circuit apparatus. 84.93...-Contained Breathing Apparatus § 84.93 Gas flow test; open-circuit apparatus. (a) A static-flow test will be performed on all open-circuit apparatus. (b) The flow from the apparatus shall be greater than 200 liters...

42 CFR 84.93 - Gas flow test; open-circuit apparatus.

Code of Federal Regulations, 2010 CFR

2010-10-01

... 42 Public Health 1 2010-10-01 2010-10-01 false Gas flow test; open-circuit apparatus. 84.93...-Contained Breathing Apparatus § 84.93 Gas flow test; open-circuit apparatus. (a) A static-flow test will be performed on all open-circuit apparatus. (b) The flow from the apparatus shall be greater than 200 liters...

A way to improve dose rate laser simulation adequacy

DOE Office of Scientific and Technical Information (OSTI.GOV)

Skorobogatov, P.K.; Nikiforov, A.Y.; Demidov, A.A.

1998-12-01

A method for improving laser simulation of dose rate radiation in silicon IC`s (Integrated Circuit) is analyzed based on the application of noncoherent laser radiation. Experimental validation was performed using test structures with up to 90% surface metallization coverage.

Integrated testing system FiTest for diagnosis of PCBA

NASA Astrophysics Data System (ADS)

Bogdan, Arkadiusz; Lesniak, Adam

2016-12-01

This article presents the innovative integrated testing system FiTest for automatic, quick inspection of printed circuit board assemblies (PCBA) manufactured in Surface Mount Technology (SMT). Integration of Automatic Optical Inspection (AOI), In-Circuit Tests (ICT) and Functional Circuit Tests (FCT) resulted in universal hardware platform for testing variety of electronic circuits. The platform provides increased test coverage, decreased level of false calls and optimization of test duration. The platform is equipped with powerful algorithms performing tests in a stable and repetitive way and providing effective management of diagnosis.

First-year university Physics students’ knowledge about direct current circuits: probing improvement in understanding as a function of teaching and learning interventions

NASA Astrophysics Data System (ADS)

Newman, Richard; van der Ventel, Brandon; Hanekom, Crischelle

2017-07-01

Probing university students’ understanding of direct-current (DC) resistive circuits is still a field of active physics education research. We report here on a study we conducted of this understanding, where the cohort consisted of students in a large-enrollment first-year physics module. This is a non-calculus based physics module for students in the life sciences stream. The study involved 366 students enrolled in the physics (bio) 154 module at Stellenbosch University in 2015. Students’ understanding of DC resistive circuits was probed by means of a standardized test instrument. The instrument comprises 29 multiple choice questions that students have to answer in ~40 min. Students were required to first complete the standardized test at the start of semester (July 2015). For ease of reference we call this test the pre-test. Students answered the pre-test having no university-level formal exposure to DC circuits in theory or practice. The pre-test therefore served to probe students’ school level knowledge of DC circuits. As the semester progressed students were exposed to a practical (E1), lectures, a prescribed textbook, a tutorial and online videos focusing on DC circuits. The E1 practical required students to solve DC circuit problems by means of physically constructing circuits, algebraically using Kirchhoff's Rules and Ohm’s Law, and by means of simulating circuits using the app iCircuit running on iPads (iOS platform). Each E1 practical involved ~50 students in a three hour session. The practical was repeated three afternoons per week over an eight week period. Twenty three iPads were distributed among students on a practical afternoon in order for them to do the circuit simulations in groups (of 4-5 students). At the end of the practical students were again required to do the standardized test on circuits and complete a survey on their experience of the use of the iPad and iCircuit app. For ease of reference we refer to this second test as the post-test. The students’ average score on the post-test was found to be ~25% higher than their pre-test score. The results of the iPad use survey show that the majority of students felt that the iCircuit app enhanced their learning of DC circuits.

Neural CMOS-integrated circuit and its application to data classification.

PubMed

Göknar, Izzet Cem; Yildiz, Merih; Minaei, Shahram; Deniz, Engin

2012-05-01

Implementation and new applications of a tunable complementary metal-oxide-semiconductor-integrated circuit (CMOS-IC) of a recently proposed classifier core-cell (CC) are presented and tested with two different datasets. With two algorithms-one based on Fisher's linear discriminant analysis and the other based on perceptron learning, used to obtain CCs' tunable parameters-the Haberman and Iris datasets are classified. The parameters so obtained are used for hard-classification of datasets with a neural network structured circuit. Classification performance and coefficient calculation times for both algorithms are given. The CC has 6-ns response time and 1.8-mW power consumption. The fabrication parameters used for the IC are taken from CMOS AMS 0.35-μm technology.

30 CFR 75.800-3 - Testing, examination and maintenance of circuit breakers; procedures.

Code of Federal Regulations, 2010 CFR

2010-07-01

... High-Voltage Distribution § 75.800-3 Testing, examination and maintenance of circuit breakers; procedures. (a) Circuit breakers and their auxiliary devices protecting underground high-voltage circuits...

A representative-sandwich model for simultaneously coupled mechanical-electrical-thermal simulation of a lithium-ion cell under quasi-static indentation tests

DOE PAGES

Zhang, Chao; Santhanagopalan, Shriram; Sprague, Michael A.; ...

2015-08-29

The safety behavior of lithium-ion batteries under external mechanical crush is a critical concern, especially during large scale deployment. We previously presented a sequentially coupled mechanical-electrical-thermal modeling approach for studying mechanical abuse induced short circuit. Here in this work, we study different mechanical test conditions and examine the interaction between mechanical failure and electrical-thermal responses, by developing a simultaneous coupled mechanical-electrical-thermal model. The present work utilizes a single representative-sandwich (RS) to model the full pouch cell with explicit representations for each individual component such as the active material, current collector, separator, etc. Anisotropic constitutive material models are presented to describemore » the mechanical properties of active materials and separator. The model predicts accurately the force-strain response and fracture of battery structure, simulates the local failure of separator layer, and captures the onset of short circuit for lithium-ion battery cell under sphere indentation tests with three different diameters. Electrical-thermal responses to the three different indentation tests are elaborated and discussed. Lastly, numerical studies are presented to show the potential impact of test conditions on the electrical-thermal behavior of the cell after the occurrence of short circuit.« less

A representative-sandwich model for simultaneously coupled mechanical-electrical-thermal simulation of a lithium-ion cell under quasi-static indentation tests

DOE Office of Scientific and Technical Information (OSTI.GOV)

Zhang, Chao; Santhanagopalan, Shriram; Sprague, Michael A.

The safety behavior of lithium-ion batteries under external mechanical crush is a critical concern, especially during large scale deployment. We previously presented a sequentially coupled mechanical-electrical-thermal modeling approach for studying mechanical abuse induced short circuit. Here in this work, we study different mechanical test conditions and examine the interaction between mechanical failure and electrical-thermal responses, by developing a simultaneous coupled mechanical-electrical-thermal model. The present work utilizes a single representative-sandwich (RS) to model the full pouch cell with explicit representations for each individual component such as the active material, current collector, separator, etc. Anisotropic constitutive material models are presented to describemore » the mechanical properties of active materials and separator. The model predicts accurately the force-strain response and fracture of battery structure, simulates the local failure of separator layer, and captures the onset of short circuit for lithium-ion battery cell under sphere indentation tests with three different diameters. Electrical-thermal responses to the three different indentation tests are elaborated and discussed. Lastly, numerical studies are presented to show the potential impact of test conditions on the electrical-thermal behavior of the cell after the occurrence of short circuit.« less

Product assurance technology for procuring reliable, radiation-hard, custom LSI/VLSI electronics

NASA Technical Reports Server (NTRS)

Buehler, M. G.; Allen, R. A.; Blaes, B. R.; Hicks, K. A.; Jennings, G. A.; Lin, Y.-S.; Pina, C. A.; Sayah, H. R.; Zamani, N.

1989-01-01

Advanced measurement methods using microelectronic test chips are described. These chips are intended to be used in acquiring the data needed to qualify Application Specific Integrated Circuits (ASIC's) for space use. Efforts were focused on developing the technology for obtaining custom IC's from CMOS/bulk silicon foundries. A series of test chips were developed: a parametric test strip, a fault chip, a set of reliability chips, and the CRRES (Combined Release and Radiation Effects Satellite) chip, a test circuit for monitoring space radiation effects. The technical accomplishments of the effort include: (1) development of a fault chip that contains a set of test structures used to evaluate the density of various process-induced defects; (2) development of new test structures and testing techniques for measuring gate-oxide capacitance, gate-overlap capacitance, and propagation delay; (3) development of a set of reliability chips that are used to evaluate failure mechanisms in CMOS/bulk: interconnect and contact electromigration and time-dependent dielectric breakdown; (4) development of MOSFET parameter extraction procedures for evaluating subthreshold characteristics; (5) evaluation of test chips and test strips on the second CRRES wafer run; (6) two dedicated fabrication runs for the CRRES chip flight parts; and (7) publication of two papers: one on the split-cross bridge resistor and another on asymmetrical SRAM (static random access memory) cells for single-event upset analysis.

Electric Circuit Model Analogy for Equilibrium Lattice Relaxation in Semiconductor Heterostructures

NASA Astrophysics Data System (ADS)

Kujofsa, Tedi; Ayers, John E.

2018-01-01

The design and analysis of semiconductor strained-layer device structures require an understanding of the equilibrium profiles of strain and dislocations associated with mismatched epitaxy. Although it has been shown that the equilibrium configuration for a general semiconductor strained-layer structure may be found numerically by energy minimization using an appropriate partitioning of the structure into sublayers, such an approach is computationally intense and non-intuitive. We have therefore developed a simple electric circuit model approach for the equilibrium analysis of these structures. In it, each sublayer of an epitaxial stack may be represented by an analogous circuit configuration involving an independent current source, a resistor, an independent voltage source, and an ideal diode. A multilayered structure may be built up by the connection of the appropriate number of these building blocks, and the node voltages in the analogous electric circuit correspond to the equilibrium strains in the original epitaxial structure. This enables analysis using widely accessible circuit simulators, and an intuitive understanding of electric circuits can easily be extended to the relaxation of strained-layer structures. Furthermore, the electrical circuit model may be extended to continuously-graded epitaxial layers by considering the limit as the individual sublayer thicknesses are diminished to zero. In this paper, we describe the mathematical foundation of the electrical circuit model, demonstrate its application to several representative structures involving In x Ga1- x As strained layers on GaAs (001) substrates, and develop its extension to continuously-graded layers. This extension allows the development of analytical expressions for the strain, misfit dislocation density, critical layer thickness and widths of misfit dislocation free zones for a continuously-graded layer having an arbitrary compositional profile. It is similar to the transition from circuit theory, using lumped circuit elements, to electromagnetics, using distributed electrical quantities. We show this development using first principles, but, in a more general sense, Maxwell's equations of electromagnetics could be applied.

42 CFR 84.96 - Service time test; closed-circuit apparatus.

Code of Federal Regulations, 2011 CFR

2011-10-01

... 42 Public Health 1 2011-10-01 2011-10-01 false Service time test; closed-circuit apparatus. 84.96...-Contained Breathing Apparatus § 84.96 Service time test; closed-circuit apparatus. (a) The closed-circuit apparatus will be classified according to the length of time it supplies adequate breathing gas to the...

42 CFR 84.96 - Service time test; closed-circuit apparatus.

Code of Federal Regulations, 2010 CFR

2010-10-01

... 42 Public Health 1 2010-10-01 2010-10-01 false Service time test; closed-circuit apparatus. 84.96...-Contained Breathing Apparatus § 84.96 Service time test; closed-circuit apparatus. (a) The closed-circuit apparatus will be classified according to the length of time it supplies adequate breathing gas to the...

30 CFR 75.800-4 - Testing, examination, and maintenance of circuit breakers; record.

Code of Federal Regulations, 2010 CFR

2010-07-01

... Underground High-Voltage Distribution § 75.800-4 Testing, examination, and maintenance of circuit breakers... adjustment of all circuit breakers protecting high-voltage circuits which enter any underground area of the...

A simple structure wavelet transform circuit employing function link neural networks and SI filters

NASA Astrophysics Data System (ADS)

Mu, Li; Yigang, He

2016-12-01

Signal processing by means of analog circuits offers advantages from a power consumption viewpoint. Implementing wavelet transform (WT) using analog circuits is of great interest when low-power consumption becomes an important issue. In this article, a novel simple structure WT circuit in analog domain is presented by employing functional link neural network (FLNN) and switched-current (SI) filters. First, the wavelet base is approximated using FLNN algorithms for giving a filter transfer function that is suitable for simple structure WT circuit implementation. Next, the WT circuit is constructed with the wavelet filter bank, whose impulse response is the approximated wavelet and its dilations. The filter design that follows is based on a follow-the-leader feedback (FLF) structure with multiple output bilinear SI integrators and current mirrors as the main building blocks. SI filter is well suited for this application since the dilation constant across different scales of the transform can be precisely implemented and controlled by the clock frequency of the circuit with the same system architecture. Finally, to illustrate the design procedure, a seventh-order FLNN-approximated Gaussian wavelet is implemented as an example. Simulations have successfully verified that the designed simple structure WT circuit has low sensitivity, low-power consumption and litter effect to the imperfections.

Recent advance in high manufacturing readiness level and high temperature CMOS mixed-signal integrated circuits on silicon carbide

NASA Astrophysics Data System (ADS)

Weng, M. H.; Clark, D. T.; Wright, S. N.; Gordon, D. L.; Duncan, M. A.; Kirkham, S. J.; Idris, M. I.; Chan, H. K.; Young, R. A. R.; Ramsay, E. P.; Wright, N. G.; Horsfall, A. B.

2017-05-01

A high manufacturing readiness level silicon carbide (SiC) CMOS technology is presented. The unique process flow enables the monolithic integration of pMOS and nMOS transistors with passive circuit elements capable of operation at temperatures of 300 °C and beyond. Critical to this functionality is the behaviour of the gate dielectric and data for high temperature capacitance-voltage measurements are reported for SiO2/4H-SiC (n and p type) MOS structures. In addition, a summary of the long term reliability for a range of structures including contact chains to both n-type and p-type SiC, as well as simple logic circuits is presented, showing function after 2000 h at 300 °C. Circuit data is also presented for the performance of digital logic devices, a 4 to 1 analogue multiplexer and a configurable timer operating over a wide temperature range. A high temperature micro-oven system has been utilised to enable the high temperature testing and stressing of units assembled in ceramic dual in line packages, including a high temperature small form-factor SiC based bridge leg power module prototype, operated for over 1000 h at 300 °C. The data presented show that SiC CMOS is a key enabling technology in high temperature integrated circuit design. In particular it provides the ability to realise sensor interface circuits capable of operating above 300 °C, accommodate shifts in key parameters enabling deployment in applications including automotive, aerospace and deep well drilling.

Considerations on Circuit Design and Data Acquisition of a Portable Surface Plasmon Resonance Biosensing System.

PubMed

Chang, Keke; Chen, Ruipeng; Wang, Shun; Li, Jianwei; Hu, Xinran; Liang, Hao; Cao, Baiqiong; Sun, Xiaohui; Ma, Liuzheng; Zhu, Juanhua; Jiang, Min; Hu, Jiandong

2015-08-19

The aim of this study was to develop a circuit for an inexpensive portable biosensing system based on surface plasmon resonance spectroscopy. This portable biosensing system designed for field use is characterized by a special structure which consists of a microfluidic cell incorporating a right angle prism functionalized with a biomolecular identification membrane, a laser line generator and a data acquisition circuit board. The data structure, data memory capacity and a line charge-coupled device (CCD) array with a driving circuit for collecting the photoelectric signals are intensively focused on and the high performance analog-to-digital (A/D) converter is comprehensively evaluated. The interface circuit and the photoelectric signal amplifier circuit are first studied to obtain the weak signals from the line CCD array in this experiment. Quantitative measurements for validating the sensitivity of the biosensing system were implemented using ethanol solutions of various concentrations indicated by volume fractions of 5%, 8%, 15%, 20%, 25%, and 30%, respectively, without a biomembrane immobilized on the surface of the SPR sensor. The experiments demonstrated that it is possible to detect a change in the refractive index of an ethanol solution with a sensitivity of 4.99838 × 10(5) ΔRU/RI in terms of the changes in delta response unit with refractive index using this SPR biosensing system, whereby the theoretical limit of detection of 3.3537 × 10(-5) refractive index unit (RIU) and a high linearity at the correlation coefficient of 0.98065. The results obtained from a series of tests confirmed the practicality of this cost-effective portable SPR biosensing system.

76 FR 9374 - Proposed Extension of Existing Information Collection; Examinations and Testing of Electrical...

Federal Register 2010, 2011, 2012, 2013, 2014

2011-02-17

... related detached components; 75.800-4 Testing, examination and maintenance of circuit breakers; record; 75...-4 Testing, examination and maintenance of circuit breakers; record; 75.1001-1 Devices for..., testing, and maintenance; 77.800-2 Testing, examination and maintenance of circuit breakers; record; and...

42 CFR 84.95 - Service time test; open-circuit apparatus.

Code of Federal Regulations, 2011 CFR

2011-10-01

... 42 Public Health 1 2011-10-01 2011-10-01 false Service time test; open-circuit apparatus. 84.95...-Contained Breathing Apparatus § 84.95 Service time test; open-circuit apparatus. (a) Service time will be measured with a breathing machine as described in § 84.88. (b) The open-circuit apparatus will be...

42 CFR 84.95 - Service time test; open-circuit apparatus.

Code of Federal Regulations, 2010 CFR

2010-10-01

... 42 Public Health 1 2010-10-01 2010-10-01 false Service time test; open-circuit apparatus. 84.95...-Contained Breathing Apparatus § 84.95 Service time test; open-circuit apparatus. (a) Service time will be measured with a breathing machine as described in § 84.88. (b) The open-circuit apparatus will be...

Capacitive charge generation apparatus and method for testing circuits

DOEpatents

Cole, E.I. Jr.; Peterson, K.A.; Barton, D.L.

1998-07-14

An electron beam apparatus and method for testing a circuit are disclosed. The electron beam apparatus comprises an electron beam incident on an outer surface of an insulating layer overlying one or more electrical conductors of the circuit for generating a time varying or alternating current electrical potential on the surface; and a measurement unit connected to the circuit for measuring an electrical signal capacitively coupled to the electrical conductors to identify and map a conduction state of each of the electrical conductors, with or without an electrical bias signal being applied to the circuit. The electron beam apparatus can further include a secondary electron detector for forming a secondary electron image for registration with a map of the conduction state of the electrical conductors. The apparatus and method are useful for failure analysis or qualification testing to determine the presence of any open-circuits or short-circuits, and to verify the continuity or integrity of electrical conductors buried below an insulating layer thickness of 1-100 {micro}m or more without damaging or breaking down the insulating layer. The types of electrical circuits that can be tested include integrated circuits, multi-chip modules, printed circuit boards and flexible printed circuits. 7 figs.

Capacitive charge generation apparatus and method for testing circuits

DOEpatents

Cole, Jr., Edward I.; Peterson, Kenneth A.; Barton, Daniel L.

1998-01-01

An electron beam apparatus and method for testing a circuit. The electron beam apparatus comprises an electron beam incident on an outer surface of an insulating layer overlying one or more electrical conductors of the circuit for generating a time varying or alternating current electrical potential on the surface; and a measurement unit connected to the circuit for measuring an electrical signal capacitively coupled to the electrical conductors to identify and map a conduction state of each of the electrical conductors, with or without an electrical bias signal being applied to the circuit. The electron beam apparatus can further include a secondary electron detector for forming a secondary electron image for registration with a map of the conduction state of the electrical conductors. The apparatus and method are useful for failure analysis or qualification testing to determine the presence of any open-circuits or short-circuits, and to verify the continuity or integrity of electrical conductors buried below an insulating layer thickness of 1-100 .mu.m or more without damaging or breaking down the insulating layer. The types of electrical circuits that can be tested include integrated circuits, multi-chip modules, printed circuit boards and flexible printed circuits.

In-line Microwave Warmer for Blood and Intravenous Fluids.

DTIC Science & Technology

1989-12-14

circuit was designed and tested. This circuit uses a digitally controlled optically coupled Triac , a thyristor device, which acts as a switch to allow...three sites of the circuit : Inlet Port of Heating Chamber Interior Path of Heating Chamber Outlet Port of Heating Chamber 4) Feedback Control Mechanism...accomplished through use of a closed loop test circuit depicted in Figure 1-2. This test circuit can be used to heat iv fluids or blood on a continuous

Functional test generation for digital circuits described with a declarative language: LUSTRE

NASA Astrophysics Data System (ADS)

Almahrous, Mazen

1990-08-01

A functional approach to the test generation problem starting from a high level description is proposed. The circuit tested is modeled, using the LUSTRE high level data flow description language. The different LUSTRE primitives are translated to a SATAN format graph in order to evaluate the testability of the circuit and to generate test sequences. Another method of testing the complex circuits comprising an operative part and a control part is defined. It consists of checking experiments for the control part observed through the operative part. It was applied to the automata generated from a LUSTRE description of the circuit.

Methods of fabricating applique circuits

DOEpatents

Dimos, Duane B.; Garino, Terry J.

1999-09-14

Applique circuits suitable for advanced packaging applications are introduced. These structures are particularly suited for the simple integration of large amounts (many nanoFarads) of capacitance into conventional integrated circuit and multichip packaging technology. In operation, applique circuits are bonded to the integrated circuit or other appropriate structure at the point where the capacitance is required, thereby minimizing the effects of parasitic coupling. An immediate application is to problems of noise reduction and control in modern high-frequency circuitry.

Printed Circuit Board Quality Assurance

NASA Technical Reports Server (NTRS)

Sood, Bhanu

2016-01-01

PCB Assurance Summary: PCB assurance actives are informed by risk in context of the Project. Lessons are being applied across Projects for continuous improvements. Newer component technologies, smaller/high pitch devices: tighter and more demanding PCB designs: Identifying new research areas. New materials, designs, structures and test methods.

Single crystal CVD diamond membranes for betavoltaic cells

DOE Office of Scientific and Technical Information (OSTI.GOV)

Delfaure, C.; Pomorski, M., E-mail: michal.pomorski@cea.fr; Sanoit, J. de

2016-06-20

A single crystal diamond large area thin membrane was assembled as a p-doped/Intrinsic/Metal (PIM) structure and used in a betavoltaic configuration. When tested with a 20 keV electron beam from a high resolution scanning electron microscope, we measured an open circuit voltage (V{sub oc}) of 1.85 V, a charge collection efficiency (CCE) of 98%, a fill-factor of 80%, and a total conversion efficiency of 9.4%. These parameters are inherently linked to the diamond membrane PIM structure that allows full device depletion even at 0 V and are among the highest reported up to now for any other material tested for betavoltaic devices. Itmore » enables to drive a high short-circuit current I{sub sc} up to 7.12 μA, to reach a maximum power P{sub max} of 10.48 μW, a remarkable value demonstrating the high-benefit of diamond for the realization of long-life radioisotope based micro-batteries.« less

An Equivalent Circuit of Longitudinal Vibration for a Piezoelectric Structure with Losses.

PubMed

Yuan, Tao; Li, Chaodong; Fan, Pingqing

2018-03-22

Equivalent circuits of piezoelectric structures such as bimorphs and unimorphs conventionally focus on the bending vibration modes. However, the longitudinal vibration modes are rarely considered even though they also play a remarkable role in piezoelectric devices. Losses, especially elastic loss in the metal substrate, are also generally neglected, which leads to discrepancies compared with experiments. In this paper, a novel equivalent circuit with four kinds of losses is proposed for a beamlike piezoelectric structure under the longitudinal vibration mode. This structure consists of a slender beam as the metal substrate, and a piezoelectric patch which covers a partial length of the beam. In this approach, first, complex numbers are used to deal with four kinds of losses-elastic loss in the metal substrate, and piezoelectric, dielectric, and elastic losses in the piezoelectric patch. Next in this approach, based on Mason's model, a new equivalent circuit is developed. Using MATLAB, impedance curves of this structure are simulated by the equivalent circuit method. Experiments are conducted and good agreements are revealed between experiments and equivalent circuit results. It is indicated that the introduction of four losses in an equivalent circuit can increase the result accuracy considerably.

An Equivalent Circuit of Longitudinal Vibration for a Piezoelectric Structure with Losses

PubMed Central

Yuan, Tao; Li, Chaodong; Fan, Pingqing

2018-01-01

Equivalent circuits of piezoelectric structures such as bimorphs and unimorphs conventionally focus on the bending vibration modes. However, the longitudinal vibration modes are rarely considered even though they also play a remarkable role in piezoelectric devices. Losses, especially elastic loss in the metal substrate, are also generally neglected, which leads to discrepancies compared with experiments. In this paper, a novel equivalent circuit with four kinds of losses is proposed for a beamlike piezoelectric structure under the longitudinal vibration mode. This structure consists of a slender beam as the metal substrate, and a piezoelectric patch which covers a partial length of the beam. In this approach, first, complex numbers are used to deal with four kinds of losses—elastic loss in the metal substrate, and piezoelectric, dielectric, and elastic losses in the piezoelectric patch. Next in this approach, based on Mason’s model, a new equivalent circuit is developed. Using MATLAB, impedance curves of this structure are simulated by the equivalent circuit method. Experiments are conducted and good agreements are revealed between experiments and equivalent circuit results. It is indicated that the introduction of four losses in an equivalent circuit can increase the result accuracy considerably. PMID:29565825

Delay test generation for synchronous sequential circuits

NASA Astrophysics Data System (ADS)

Devadas, Srinivas

1989-05-01

We address the problem of generating tests for delay faults in non-scan synchronous sequential circuits. Delay test generation for sequential circuits is a considerably more difficult problem than delay testing of combinational circuits and has received much less attention. In this paper, we present a method for generating test sequences to detect delay faults in sequential circuits using the stuck-at fault sequential test generator STALLION. The method is complete in that it will generate a delay test sequence for a targeted fault given sufficient CPU time, if such a sequence exists. We term faults for which no delay test sequence exists, under out test methodology, sequentially delay redundant. We describe means of eliminating sequential delay redundancies in logic circuits. We present a partial-scan methodology for enhancing the testability of difficult-to-test of untestable sequential circuits, wherein a small number of flip-flops are selected and made controllable/observable. The selection process guarantees the elimination of all sequential delay redundancies. We show that an intimate relationship exists between state assignment and delay testability of a sequential machine. We describe a state assignment algorithm for the synthesis of sequential machines with maximal delay fault testability. Preliminary experimental results using the test generation, partial-scan and synthesis algorithm are presented.

DOE Office of Scientific and Technical Information (OSTI.GOV)

Li, Menglu; Tu, K. N., E-mail: kntu@ucla.edu; Kim, Dong Wook

Thermal-crosstalk induced thermomigration failure in un-powered microbumps has been found in 2.5D integrated circuit (IC) circuit. In 2.5D IC, a Si interposer was used between a polymer substrate and a device chip which has transistors. The interposer has no transistors. If transistors are added to the interposer chip, it becomes 3D IC. In our test structure, there are two Si chips placed horizontally on a Si interposer. The vertical connections between the interposer and the Si chips are through microbumps. We powered one daisy chain of the microbumps under one Si chip; however, the un-powered microbumps in the neighboring chipmore » are failed with big holes in the solder layer. We find that Joule heating from the powered microbumps is transferred horizontally to the bottom of the neighboring un-powered microbumps, and creates a large temperature gradient, in the order of 1000 °C/cm, through the un-powered microbumps in the neighboring chip, so the latter failed by thermomigration. In addition, we used synchrotron radiation tomography to compare three sets of microbumps in the test structure: microbumps under electromigration, microbumps under thermomigration, and microbumps under a constant temperature thermal annealing. The results show that the microbumps under thermomigration have the largest damage. Furthermore, simulation of temperature distribution in the test structure supports the finding of thermomigration.« less

High density electronic circuit and process for making

DOEpatents

Morgan, William P.

1999-01-01

High density circuits with posts that protrude beyond one surface of a substrate to provide easy mounting of devices such as integrated circuits. The posts also provide stress relief to accommodate differential thermal expansion. The process allows high interconnect density with fewer alignment restrictions and less wasted circuit area than previous processes. The resulting substrates can be test platforms for die testing and for multi-chip module substrate testing. The test platform can contain active components and emulate realistic operational conditions, replacing shorts/opens net testing.

System and Method for Detecting Cracks and their Location

NASA Technical Reports Server (NTRS)

Woodward, Stanley E. (Inventor); Shams, Qamar A. (Inventor)

2007-01-01

A system and method are provided for detecting cracks and their location in a structure. A circuit coupled to a structure has capacitive strain sensors coupled sequentially and in parallel to one another. When excited by a variable magnetic field, the circuit has a resonant frequency that is different for unstrained and strained states. In terms of strained states, the resonant frequency is indicative of a region of the circuit that is experiencing strain induced by strain in a region of the structure in proximity to the region of the circuit. An inductor is electrically coupled to one end of each circuit. A magnetic field response recorder wirelessly transmits the variable magnetic field to the inductor and senses the resonant frequency of the circuit so-excited by the variable magnetic field.

Power converter having improved terminal structure

DOEpatents

Radosevich, Lawrence D.; Kannenberg, Daniel G.; Phillips, Mark G.; Kaishian, Steven C.

2007-03-06

A terminal structure for power electronics circuits reduces the need for a DC bus and thereby the incidence of parasitic inductance. The structure is secured to a support that may receive one or more power electronic circuits. The support may aid in removing heat from the circuits through fluid circulating through the support. The support may form a shield from both external EMI/RFI and from interference generated by operation of the power electronic circuits. Features may be provided to permit and enhance connection of the circuitry to external circuitry, such as by direct contact between the terminal assembly and AC and DC circuit components. Modular units may be assembled that may be coupled to electronic circuitry via plug-in arrangements or through interface with a backplane or similar mounting and interconnecting structures.

Validation of an Accurate Three-Dimensional Helical Slow-Wave Circuit Model

NASA Technical Reports Server (NTRS)

Kory, Carol L.

1997-01-01

The helical slow-wave circuit embodies a helical coil of rectangular tape supported in a metal barrel by dielectric support rods. Although the helix slow-wave circuit remains the mainstay of the traveling-wave tube (TWT) industry because of its exceptionally wide bandwidth, a full helical circuit, without significant dimensional approximations, has not been successfully modeled until now. Numerous attempts have been made to analyze the helical slow-wave circuit so that the performance could be accurately predicted without actually building it, but because of its complex geometry, many geometrical approximations became necessary rendering the previous models inaccurate. In the course of this research it has been demonstrated that using the simulation code, MAFIA, the helical structure can be modeled with actual tape width and thickness, dielectric support rod geometry and materials. To demonstrate the accuracy of the MAFIA model, the cold-test parameters including dispersion, on-axis interaction impedance and attenuation have been calculated for several helical TWT slow-wave circuits with a variety of support rod geometries including rectangular and T-shaped rods, as well as various support rod materials including isotropic, anisotropic and partially metal coated dielectrics. Compared with experimentally measured results, the agreement is excellent. With the accuracy of the MAFIA helical model validated, the code was used to investigate several conventional geometric approximations in an attempt to obtain the most computationally efficient model. Several simplifications were made to a standard model including replacing the helical tape with filaments, and replacing rectangular support rods with shapes conforming to the cylindrical coordinate system with effective permittivity. The approximate models are compared with the standard model in terms of cold-test characteristics and computational time. The model was also used to determine the sensitivity of various circuit parameters including typical manufacturing dimensional tolerances and support rod permittivity. By varying the circuit parameters of an accurate model using MAFIA, these sensitivities can be computed for manufacturing concerns, and design optimization previous to fabrication, thus eliminating the need for costly experimental iterations. Several variations were made to a standard helical circuit using MAFIA to investigate the effect that variations on helical tape and support rod width, metallized loading height and support rod permittivity, have on TWT cold-test characteristics.

Instrumentation Cables Test Plan

DOE Office of Scientific and Technical Information (OSTI.GOV)

Muna, Alice Baca; LaFleur, Chris Bensdotter

A fire at a nuclear power plant (NPP) has the potential to damage structures, systems, and components important to safety, if not promptly detected and suppressed. At Browns Ferry Nuclear Power Plant on March 22, 1975, a fire in the reactor building damaged electrical power and control systems. Damage to instrumentation cables impeded the function of both normal and standby reactor coolant systems, and degraded the operators’ plant monitoring capability. This event resulted in additional NRC involvement with utilities to ensure that NPPs are properly protected from fire as intended by the NRC principle design criteria (i.e., general design criteriamore » 3, Fire Protection). Current guidance and methods for both deterministic and performance based approaches typically make conservative (bounding) assumptions regarding the fire-induced failure modes of instrumentation cables and those failure modes effects on component and system response. Numerous fire testing programs have been conducted in the past to evaluate the failure modes and effects of electrical cables exposed to severe thermal conditions. However, that testing has primarily focused on control circuits with only a limited number of tests performed on instrumentation circuits. In 2001, the Nuclear Energy Institute (NEI) and the Electric Power Research Institute (EPRI) conducted a series of cable fire tests designed to address specific aspects of the cable failure and circuit fault issues of concern1. The NRC was invited to observe and participate in that program. The NRC sponsored Sandia National Laboratories to support this participation, whom among other things, added a 4-20 mA instrumentation circuit and instrumentation cabling to six of the tests. Although limited, one insight drawn from those instrumentation circuits tests was that the failure characteristics appeared to depend on the cable insulation material. The results showed that for thermoset insulated cables, the instrument reading tended to drift and fluctuate, while the thermoplastic insulated cables, the instrument reading fell off-scale rapidly. From an operational point of view, the latter failure characteristics would likely be identified as a failure from the effects of fire, while the former may result in inaccurate readings.« less

Research on the EDM Technology for Micro-holes at Complex Spatial Locations

NASA Astrophysics Data System (ADS)

Y Liu, J.; Guo, J. M.; Sun, D. J.; Cai, Y. H.; Ding, L. T.; Jiang, H.

2017-12-01

For the demands on machining micro-holes at complex spatial location, several key technical problems are conquered such as micro-Electron Discharge Machining (micro-EDM) power supply system’s development, the host structure’s design and machining process technical. Through developing low-voltage power supply circuit, high-voltage circuit, micro and precision machining circuit and clearance detection system, the narrow pulse and high frequency six-axis EDM machining power supply system is developed to meet the demands on micro-hole discharging machining. With the method of combining the CAD structure design, CAE simulation analysis, modal test, ODS (Operational Deflection Shapes) test and theoretical analysis, the host construction and key axes of the machine tool are optimized to meet the position demands of the micro-holes. Through developing the special deionized water filtration system to make sure that the machining process is stable enough. To verify the machining equipment and processing technical developed in this paper through developing the micro-hole’s processing flow and test on the real machine tool. As shown in the final test results: the efficient micro-EDM machining pulse power supply system, machine tool host system, deionized filtration system and processing method developed in this paper meet the demands on machining micro-holes at complex spatial locations.

Vacuum Microelectronic Field Emission Array Devices for Microwave Amplification.

NASA Astrophysics Data System (ADS)

Mancusi, Joseph Edward

This dissertation presents the design, analysis, and measurement of vacuum microelectronic devices which use field emission to extract an electron current from arrays of silicon cones. The arrays of regularly-spaced silicon cones, the field emission cathodes or emitters, are fabricated with an integrated gate electrode which controls the electric field at the tip of the cone, and thus the electron current. An anode or collector electrode is placed above the array to collect the emission current. These arrays, which are fabricated in a standard silicon processing facility, are developed for use as high power microwave amplifiers. Field emission has been studied extensively since it was first characterized in 1928, however due to the large electric fields required practical field emission devices are difficult to make. With the development of the semiconductor industry came the development of fabrication equipment and techniques which allow for the manufacture of the precision micron-scale structures necessary for practical field emission devices. The active region of a field emission device is a vacuum, therefore the electron travel is ballistic. This analysis of field emission devices includes electric field and electron emission modeling, development of a device equivalent circuit, analysis of the parameters in the equivalent circuit, and device testing. Variations in device structure are taken into account using a statistical model based upon device measurements. Measurements of silicon field emitter arrays at DC and RF are presented and analyzed. In this dissertation, the equivalent circuit is developed from the analysis of the device structure. The circuit parameters are calculated from geometrical considerations and material properties, or are determined from device measurements. It is necessary to include the emitter resistance in the equivalent circuit model since relatively high resistivity silicon wafers are used. As is demonstrated, the circuit model accurately predicts the magnitude of the emission current at a number of typical bias current levels when the device is operating at frequencies within the range of 10 MHz to 1 GHz. At low frequencies and at high frequencies within this range, certain parameters are negligible, and simplifications may be made in the equivalent circuit model.

DOE Office of Scientific and Technical Information (OSTI.GOV)

Mayle, Scott; Gupta, Tanuj; Davis, Sam

Monitoring of the intrinsic temperature and the thermal management is discussed for the carbon nanotube nano-circuits. The experimental results concerning fabricating and testing of a thermometer able to monitor the intrinsic temperature on nanoscale are reported. We also suggest a model which describes a bi-metal multilayer system able to filter the heat flow, based on separating the electron and phonon components one from another. The bi-metal multilayer structure minimizes the phonon component of the heat flow, while retaining the electronic part. The method allows one to improve the overall performance of the electronic nano-circuits due to minimizing the energy dissipation.

Embedded electronics for intelligent structures

NASA Astrophysics Data System (ADS)

Warkentin, David J.; Crawley, Edward F.

The signal, power, and communications provisions for the distributed control processing, sensing, and actuation of an intelligent structure could benefit from a method of physically embedding some electronic components. The preliminary feasibility of embedding electronic components in load-bearing intelligent composite structures is addressed. A technique for embedding integrated circuits on silicon chips within graphite/epoxy composite structures is presented which addresses the problems of electrical, mechanical, and chemical isolation. The mechanical and chemical isolation of test articles manufactured by this technique are tested by subjecting them to static and cyclic mechanical loads and a temperature/humidity/bias environment. The likely failure modes under these conditions are identified, and suggestions for further improvements in the technique are discussed.

Capabilities and Testing of the Fission Surface Power Primary Test Circuit (FSP-PTC)

NASA Technical Reports Server (NTRS)

Garber, Anne E.

2007-01-01

An actively pumped alkali metal flow circuit, designed and fabricated at the NASA Marshall Space Flight Center, is currently undergoing testing in the Early Flight Fission Test Facility (EFF-TF). Sodium potassium (NaK), which was used in the SNAP-10A fission reactor, was selected as the primary coolant. Basic circuit components include: simulated reactor core, NaK to gas heat exchanger, electromagnetic (EM) liquid metal pump, liquid metal flowmeter, load/drain reservoir, expansion reservoir, test section, and instrumentation. Operation of the circuit is based around a 37-pin partial-array core (pin and flow path dimensions are the same as those in a full core), designed to operate at 33 kWt. NaK flow rates of greater than 1 kg/sec may be achieved, depending upon the power applied to the EM pump. The heat exchanger provides for the removal of thermal energy from the circuit, simulating the presence of an energy conversion system. The presence of the test section increases the versatility of the circuit. A second liquid metal pump, an energy conversion system, and highly instrumented thermal simulators are all being considered for inclusion within the test section. This paper summarizes the capabilities and ongoing testing of the Fission Surface Power Primary Test Circuit (FSP-PTC).

Product assurance technology for custom LSI/VLSI electronics

NASA Technical Reports Server (NTRS)

Buehler, M. G.; Blaes, B. R.; Jennings, G. A.; Moore, B. T.; Nixon, R. H.; Pina, C. A.; Sayah, H. R.; Sievers, M. W.; Stahlberg, N. F.

1985-01-01

The technology for obtaining custom integrated circuits from CMOS-bulk silicon foundries using a universal set of layout rules is presented. The technical efforts were guided by the requirement to develop a 3 micron CMOS test chip for the Combined Release and Radiation Effects Satellite (CRRES). This chip contains both analog and digital circuits. The development employed all the elements required to obtain custom circuits from silicon foundries, including circuit design, foundry interfacing, circuit test, and circuit qualification.

High density electronic circuit and process for making

DOEpatents

Morgan, W.P.

1999-06-29

High density circuits with posts that protrude beyond one surface of a substrate to provide easy mounting of devices such as integrated circuits are disclosed. The posts also provide stress relief to accommodate differential thermal expansion. The process allows high interconnect density with fewer alignment restrictions and less wasted circuit area than previous processes. The resulting substrates can be test platforms for die testing and for multi-chip module substrate testing. The test platform can contain active components and emulate realistic operational conditions, replacing shorts/opens net testing. 8 figs.

Conformal Thin Film Packaging for SiC Sensor Circuits in Harsh Environments

NASA Technical Reports Server (NTRS)

Scardelletti, Maximilian C.; Karnick, David A.; Ponchak, George E.; Zorman, Christian A.

2011-01-01

In this investigation sputtered silicon carbide annealed at 300 C for one hour is used as a conformal thin film package. A RF magnetron sputterer was used to deposit 500 nm silicon carbide films on gold metal structures on alumina wafers. To determine the reliability and resistance to immersion in harsh environments, samples were submerged in gold etchant for 24 hours, in BOE for 24 hours, and in an O2 plasma etch for one hour. The adhesion strength of the thin film was measured by a pull test before and after the chemical immersion, which indicated that the film has an adhesion strength better than 10(exp 8) N/m2; this is similar to the adhesion of the gold layer to the alumina wafer. MIM capacitors are used to determine the dielectric constant, which is dependent on the SiC anneal temperature. Finally, to demonstrate that the SiC, conformal, thin film may be used to package RF circuits and sensors, an LC resonator circuit was fabricated and tested with and without the conformal SiC thin film packaging. The results indicate that the SiC coating adds no appreciable degradation to the circuits RF performance. Index Terms Sputter, silicon carbide, MIM capacitors, LC resonators, gold etchants, BOE, O2 plasma

Characterization of radiation effects in 65 nm digital circuits with the DRAD digital radiation test chip

NASA Astrophysics Data System (ADS)

Jara Casas, L. M.; Ceresa, D.; Kulis, S.; Miryala, S.; Christiansen, J.; Francisco, R.; Gnani, D.

2017-02-01

A Digital RADiation (DRAD) test chip has been specifically designed to study the impact of Total Ionizing Dose (TID) (<1 Grad) and Single Event Upset (SEU) on digital logic gates in a 65 nm CMOS technology. Nine different versions of standard cell libraries are studied in this chip, basically differing in the device dimensions, Vt flavor and layout of the device. Each library has eighteen test structures specifically designed to characterize delay degradation and power consumption of the standard cells. For SEU study, a dedicated test structure based on a shift register is designed for each library. TID results up to 500 Mrad are reported.

Traveling-Wave Tube Cold-Test Circuit Optimization Using CST MICROWAVE STUDIO

NASA Technical Reports Server (NTRS)

Chevalier, Christine T.; Kory, Carol L.; Wilson, Jeffrey D.; Wintucky, Edwin G.; Dayton, James A., Jr.

2003-01-01

The internal optimizer of CST MICROWAVE STUDIO (MWS) was used along with an application-specific Visual Basic for Applications (VBA) script to develop a method to optimize traveling-wave tube (TWT) cold-test circuit performance. The optimization procedure allows simultaneous optimization of circuit specifications including on-axis interaction impedance, bandwidth or geometric limitations. The application of Microwave Studio to TWT cold-test circuit optimization is described.

Initial Testing of the Stainless Steel NaK-Cooled Circuit (SNaKC)

NASA Technical Reports Server (NTRS)

Garber, Anne; Godfroy, Thomas

2007-01-01

An actively pumped alkali metal flow circuit, designed and fabricated at the NASA Marshall Space Flight Center, is currently undergoing testing in the Early Flight Fission Test Facility (EFF-TF). Sodium potassium (NaK) was selected as the primary coolant. Basic circuit components include: simulated reactor core, NaK to gas heat exchanger, electromagnetic liquid metal pump, liquid metal flowmeter, load/drain reservoir, expansion reservoir, test section, and instrumentation. Operation of the circuit is based around the 37-pin partial-array core (pin and flow path dimensions are the same as those in a full core), designed to operate at 33 kWt. This presentation addresses the construction, fill and initial testing of the Stainless Steel NaK-Cooled Circuit (SNaKC).

Altered structural and effective connectivity in anorexia and bulimia nervosa in circuits that regulate energy and reward homeostasis.

PubMed

Frank, G K W; Shott, M E; Riederer, J; Pryor, T L

2016-11-01

Anorexia and bulimia nervosa are severe eating disorders that share many behaviors. Structural and functional brain circuits could provide biological links that those disorders have in common. We recruited 77 young adult women, 26 healthy controls, 26 women with anorexia and 25 women with bulimia nervosa. Probabilistic tractography was used to map white matter connectivity strength across taste and food intake regulating brain circuits. An independent multisample greedy equivalence search algorithm tested effective connectivity between those regions during sucrose tasting. Anorexia and bulimia nervosa had greater structural connectivity in pathways between insula, orbitofrontal cortex and ventral striatum, but lower connectivity from orbitofrontal cortex and amygdala to the hypothalamus (P<0.05, corrected for comorbidity, medication and multiple comparisons). Functionally, in controls the hypothalamus drove ventral striatal activity, but in anorexia and bulimia nervosa effective connectivity was directed from anterior cingulate via ventral striatum to the hypothalamus. Across all groups, sweetness perception was predicted by connectivity strength in pathways connecting to the middle orbitofrontal cortex. This study provides evidence that white matter structural as well as effective connectivity within the energy-homeostasis and food reward-regulating circuitry is fundamentally different in anorexia and bulimia nervosa compared with that in controls. In eating disorders, anterior cingulate cognitive-emotional top down control could affect food reward and eating drive, override hypothalamic inputs to the ventral striatum and enable prolonged food restriction.

Vibration attenuations induced by periodic arrays of piezoelectric patches connected by enhanced resonant shunting circuits

NASA Astrophysics Data System (ADS)

Wang, Gang; Wang, Jianwei; Chen, Shengbing; Wen, Jihong

2011-12-01

Periodic arrays of piezoelectric patches connected by enhanced resonant shunting circuits are attached to a slender beam to control the propagation of vibration. Numerical models based on the transfer matrix methodology are constructed to predict the band structure, attenuation factors and the transmission of vibration in the proposed smart structure. The vibration attenuations of the proposed smart structure and that with the passive resonant shunting circuits are compared in order to verify the efficiency of the enhanced resonant shunting circuits. Vibration experiments are conducted in order to validate the theoretical predictions. The specimen with a combination of different types of resonant shunting circuits is also studied in order to gain wider attenuation frequency ranges.

Effects of /spl gamma/-rays on JFET devices and circuits fabricated in a detector-compatible Process

NASA Astrophysics Data System (ADS)

Betta, G. F. D.; Manghisoni, M.; Ratti, L.; Re, V.; Speziali, V.; Traversi, G.

2003-12-01

This work is concerned with the effects of /spl gamma/-rays on the static, signal and noise characteristics of JFET-based circuits belonging to a fabrication technology made available by the Istituto per la Ricerca Scientifica e Tecnologica (ITC-IRST), Trento, Italy. Such a process has been tuned with the aim of monolithically integrating the readout electronics on the same highly resistive substrate as multielectrode silicon detectors. The radiation tolerance of some test structures, including single devices and charge sensitive amplifiers, was studied in view of low-noise applications in industrial and medical imaging, X- and /spl gamma/-ray astronomy and high energy physics experiments. This paper intends to fill the gap in the study of gamma radiation effects on JFET devices and circuits belonging to detector-compatible technologies.

An electronic circuit for sensing malfunctions in test instrumentation

NASA Technical Reports Server (NTRS)

Miller, W. M., Jr.

1969-01-01

Monitoring device differentiates between malfunctions occurring in the system undergoing test and malfunctions within the test instrumentation itself. Electronic circuits in the monitor use transistors to commutate silicon controlled rectifiers by removing the drive voltage, display circuits are then used to monitor multiple discrete lines.

An approach to determination of shunt circuits parameters for damping vibrations

NASA Astrophysics Data System (ADS)

Matveenko; Iurlova; Oshmarin; Sevodina; Iurlov

2018-04-01

This paper considers the problem of natural vibrations of a deformable structure containing elements made of piezomaterials. The piezoelectric elements are connected through electrodes to an external electric circuit, which consists of resistive, inductive and capacitive elements. Based on the solution of this problem, the parameters of external electric circuits are searched for to allow optimal passive control of the structural vibrations. The solution to the problem is complex natural vibration frequencies, the real part of which corresponds to the circular eigenfrequency of vibrations and the imaginary part corresponds to its damping rate (damping ratio). The analysis of behaviour of the imaginary parts of complex eigenfrequencies in the space of external circuit parameters allows one to damp given modes of structure vibrations. The effectiveness of the proposed approach is demonstrated using a cantilever-clamped plate and a shell structure in the form of a semi-cylinder connected to series resonant ? circuits.

Modular electronics packaging system

NASA Technical Reports Server (NTRS)

Hunter, Don J. (Inventor)

2001-01-01

A modular electronics packaging system includes multiple packaging slices that are mounted horizontally to a base structure. The slices interlock to provide added structural support. Each packaging slice includes a rigid and thermally conductive housing having four side walls that together form a cavity to house an electronic circuit. The chamber is enclosed on one end by an end wall, or web, that isolates the electronic circuit from a circuit in an adjacent packaging slice. The web also provides a thermal path between the electronic circuit and the base structure. Each slice also includes a mounting bracket that connects the packaging slice to the base structure. Four guide pins protrude from the slice into four corresponding receptacles in an adjacent slice. A locking element, such as a set screw, protrudes into each receptacle and interlocks with the corresponding guide pin. A conduit is formed in the slice to allow electrical connection to the electronic circuit.

A real-time spectrum acquisition system design based on quantum dots-quantum well detector

NASA Astrophysics Data System (ADS)

Zhang, S. H.; Guo, F. M.

2016-01-01

In this paper, we studied the structure characteristics of quantum dots-quantum well photodetector with response wavelength range from 400 nm to 1000 nm. It has the characteristics of high sensitivity, low dark current and the high conductance gain. According to the properties of the quantum dots-quantum well photodetectors, we designed a new type of capacitive transimpedence amplifier (CTIA) readout circuit structure with the advantages of adjustable gain, wide bandwidth and high driving ability. We have implemented the chip packaging between CTIA-CDS structure readout circuit and quantum dots detector and tested the readout response characteristics. According to the timing signals requirements of our readout circuit, we designed a real-time spectral data acquisition system based on FPGA and ARM. Parallel processing mode of programmable devices makes the system has high sensitivity and high transmission rate. In addition, we realized blind pixel compensation and smoothing filter algorithm processing to the real time spectrum data by using C++. Through the fluorescence spectrum measurement of carbon quantum dots and the signal acquisition system and computer software system to realize the collection of the spectrum signal processing and analysis, we verified the excellent characteristics of detector. It meets the design requirements of quantum dot spectrum acquisition system with the characteristics of short integration time, real-time and portability.

30 CFR 56.6407 - Circuit testing.

Code of Federal Regulations, 2010 CFR

2010-07-01

... blasting circuits shall be used to test each of the following: (a) Continuity of each electric detonator in... 30 Mineral Resources 1 2010-07-01 2010-07-01 false Circuit testing. 56.6407 Section 56.6407... SAFETY AND HEALTH SAFETY AND HEALTH STANDARDS-SURFACE METAL AND NONMETAL MINES Explosives Electric...

30 CFR 75.900-3 - Testing, examination, and maintenance of circuit breakers; procedures.

Code of Federal Regulations, 2010 CFR

2010-07-01

... current circuits serving three-phase alternating current equipment and their auxiliary devices shall be... Underground Low- and Medium-Voltage Alternating Current Circuits § 75.900-3 Testing, examination, and...

30 CFR 75.900-3 - Testing, examination, and maintenance of circuit breakers; procedures.

Code of Federal Regulations, 2011 CFR

2011-07-01

... current circuits serving three-phase alternating current equipment and their auxiliary devices shall be... Underground Low- and Medium-Voltage Alternating Current Circuits § 75.900-3 Testing, examination, and...

Capacitive transducers

NASA Technical Reports Server (NTRS)

Lucifredi, A. L.

1970-01-01

The theory, applications, and possible structural designs of capacitive transducers are presented. Emphasis is placed on the circuits used in connection with the sensors, such as AM, FM, resonant circuits, mode circuits, direct current circuits, and special circuits. Some criteria for selection of a design or the purchase of a commercial device are given.

Vehicle drive module having improved terminal design

DOEpatents

Beihoff, Bruce C.; Radosevich, Lawrence D.; Phillips, Mark G.; Kehl, Dennis L.; Kaishian, Steven C.; Kannenberg, Daniel G.

2006-04-25

A terminal structure for vehicle drive power electronics circuits reduces the need for a DC bus and thereby the incidence of parasitic inductance. The structure is secured to a support that may receive one or more power electronic circuits. The support may aid in removing heat from the circuits through fluid circulating through the support. The support may form a shield from both external EMI/RFI and from interference generated by operation of the power electronic circuits. Features may be provided to permit and enhance connection of the circuitry to external circuitry, such as by direct contact between the terminal assembly and AC and DC circuit components. Modular units may be assembled that may be coupled to electronic circuitry via plug-in arrangements or through interface with a backplane or similar mounting and interconnecting structures.

A Comparison of Three-Dimensional Simulations of Traveling-Wave Tube Cold-Test Characteristics Using CST MICROWAVE STUDIO and MAFIA

NASA Technical Reports Server (NTRS)

Chevalier, C. T.; Herrmann, K. A.; Kory, C. L.; Wilson, J. D.; Cross, A. W.; Williams, W. D. (Technical Monitor)

2001-01-01

Previously, it was shown that MAFIA (solutions of Maxwell's equations by the Finite Integration Algorithm), a three-dimensional simulation code, can be used to produce accurate cold-test characteristics including frequency-phase dispersion, interaction impedance, and attenuation for traveling-wave tube (TWT) slow-wave structures. In an effort to improve user-friendliness and simulation time, a model was developed to compute the cold-test parameters using the electromagnetic field simulation software package CST MICROWAVE STUDIO (MWS). Cold-test parameters were calculated for several slow-wave circuits including a ferruled coupled-cavity, a folded waveguide, and a novel finned-ladder circuit using both MWS and MAFIA. Comparisons indicate that MWS provides more accurate cold-test data with significantly reduced simulation times. Both MAFIA and MWS are based on the finite integration (FI) method; however, MWS has several advantages over MAFIA. First, it has a Windows based interface for PC operation, making it very user-friendly, whereas MAFIA is UNIX based. MWS uses a new Perfect Boundary Approximation (PBA), which increases the accuracy of the simulations by avoiding stair step approximations associated with MAFIA's representation of structures. Finally, MWS includes a Visual Basic for Applications (VBA) compatible macro language that enables the simulation process to be automated and allows for the optimization of user-defined goal functions, such as interaction impedance.

Four-to-one power combiner for 20 GHz phased array antenna using RADC MMIC phase shifters

NASA Technical Reports Server (NTRS)

1991-01-01

The design and microwave simulation of two-to-one microstrip power combiners is described. The power combiners were designed for use in a four element phase array receive antenna subarray at 20 GHz. Four test circuits are described which were designed to enable testing of the power combiner and the four element phased array antenna. Test Circuit 1 enables measurement of the two-to-one power combiner. Test Circuit 2 enables measurement of the four-to-one power combiner. Test Circuit 3 enables measurement of a four element antenna array without phase shifting MMIC's in order to characterize the power combiner with the antenna patch-to-microstrip coaxial feedthroughs. Test circuit 4 is the four element phased array antenna including the RADC MMIC phase shifters and appropriate interconnects to provide bias voltages and control phase bits.

Note: cryogenic microstripline-on-Kapton microwave interconnects.

PubMed

Harris, A I; Sieth, M; Lau, J M; Church, S E; Samoska, L A; Cleary, K

2012-08-01

Simple broadband microwave interconnects are needed for increasing the size of focal plane heterodyne radiometer arrays. We have measured loss and crosstalk for arrays of microstrip transmission lines in flex circuit technology at 297 and 77 K, finding good performance to at least 20 GHz. The dielectric constant of Kapton substrates changes very little from 297 to 77 K, and the electrical loss drops. The small cross-sectional area of metal in a printed circuit structure yields overall thermal conductivities similar to stainless steel coaxial cable. Operationally, the main performance tradeoffs are between crosstalk and thermal conductivity. We tested a patterned ground plane to reduce heat flux.

Test results for SEU and SEL immune memory circuits

NASA Technical Reports Server (NTRS)

Wiseman, D.; Canaris, J.; Whitaker, S.; Gambles, J.; Arave, K.; Arave, L.

1993-01-01

Test results for three SEU logic/circuit hardened CMOS memory circuits verify upset and latch-up immunity for two configurations to be in excess of 120 MeV cm(exp 2)/mg using a commercial, non-radiation hardened CMOS process. Test chips from three separate fabrication runs in two different process were evaluated.

42 CFR 84.94 - Gas flow test; closed-circuit apparatus.

Code of Federal Regulations, 2011 CFR

2011-10-01

... 42 Public Health 1 2011-10-01 2011-10-01 false Gas flow test; closed-circuit apparatus. 84.94...-Contained Breathing Apparatus § 84.94 Gas flow test; closed-circuit apparatus. (a) Where oxygen is supplied... rated service time of the apparatus. (b) Where constant flow is used in conjunction with demand flow...

42 CFR 84.94 - Gas flow test; closed-circuit apparatus.

Code of Federal Regulations, 2010 CFR

2010-10-01

... 42 Public Health 1 2010-10-01 2010-10-01 false Gas flow test; closed-circuit apparatus. 84.94...-Contained Breathing Apparatus § 84.94 Gas flow test; closed-circuit apparatus. (a) Where oxygen is supplied... rated service time of the apparatus. (b) Where constant flow is used in conjunction with demand flow...

30 CFR 75.800-3 - Testing, examination and maintenance of circuit breakers; procedures.

Code of Federal Regulations, 2014 CFR

2014-07-01

... 30 Mineral Resources 1 2014-07-01 2014-07-01 false Testing, examination and maintenance of circuit breakers; procedures. 75.800-3 Section 75.800-3 Mineral Resources MINE SAFETY AND HEALTH ADMINISTRATION... High-Voltage Distribution § 75.800-3 Testing, examination and maintenance of circuit breakers...

A novel high performance ESD power clamp circuit with a small area

NASA Astrophysics Data System (ADS)

Zhaonian, Yang; Hongxia, Liu; Li, Li; Qingqing, Zhuo

2012-09-01

A MOSFET-based electrostatic discharge (ESD) power clamp circuit with only a 10 ns RC time constant for a 0.18-μm process is proposed. A diode-connected NMOSFET is used to maintain a long delay time and save area. The special structure overcomes other shortcomings in this clamp circuit. Under fast power-up events, the gate voltage of the clamp MOSFET does not rise as quickly as under ESD events, the special structure can keep the clamp MOSFET thoroughly off. Under a falsely triggered event, the special structure can turn off the clamp MOSFET in a short time. The clamp circuit can also reject the power supply noise effectively. Simulation results show that the clamp circuit avoids fast false triggering events such as a 30 ns/1.8 V power-up, maintains a 1.2 μs delay time and a 2.14 μs turn-off time, and reduces to about 70% of the RC time constant. It is believed that the proposed clamp circuit can be widely used in high-speed integrated circuits.

Polynomial time blackbox identity testers for depth-3 circuits : the field doesn't matter.

DOE Office of Scientific and Technical Information (OSTI.GOV)

Seshadhri, Comandur; Saxena, Nitin

Let C be a depth-3 circuit with n variables, degree d and top fanin k (called {Sigma}{Pi}{Sigma}(k, d, n) circuits) over base field F. It is a major open problem to design a deterministic polynomial time blackbox algorithm that tests if C is identically zero. Klivans & Spielman (STOC 2001) observed that the problem is open even when k is a constant. This case has been subjected to a serious study over the past few years, starting from the work of Dvir & Shpilka (STOC 2005). We give the first polynomial time blackbox algorithm for this problem. Our algorithm runsmore » in time poly(n)d{sup k}, regardless of the base field. The only field for which polynomial time algorithms were previously known is F = Q (Kayal & Saraf, FOCS 2009, and Saxena & Seshadhri, FOCS 2010). This is the first blackbox algorithm for depth-3 circuits that does not use the rank based approaches of Karnin & Shpilka (CCC 2008). We prove an important tool for the study of depth-3 identities. We design a blackbox polynomial time transformation that reduces the number of variables in a {Sigma}{Pi}{Sigma}(k, d, n) circuit to k variables, but preserves the identity structure. Polynomial identity testing (PIT) is a major open problem in theoretical computer science. The input is an arithmetic circuit that computes a polynomial p(x{sub 1}, x{sub 2},..., x{sub n}) over a base field F. We wish to check if p is the zero polynomial, or in other words, is identically zero. We may be provided with an explicit circuit, or may only have blackbox access. In the latter case, we can only evaluate the polynomial p at various domain points. The main goal is to devise a deterministic blackbox polynomial time algorithm for PIT.« less

Precision Tests of a Quantum Hall Effect Device DC Equivalent Circuit Using Double-Series and Triple-Series Connections

PubMed Central

Jeffery, A.; Elmquist, R. E.; Cage, M. E.

1995-01-01

Precision tests verify the dc equivalent circuit used by Ricketts and Kemeny to describe a quantum Hall effect device in terms of electrical circuit elements. The tests employ the use of cryogenic current comparators and the double-series and triple-series connection techniques of Delahaye. Verification of the dc equivalent circuit in double-series and triple-series connections is a necessary step in developing the ac quantum Hall effect as an intrinsic standard of resistance. PMID:29151768

30 CFR 75.900-4 - Testing, examination, and maintenance of circuit breakers; record.

Code of Federal Regulations, 2011 CFR

2011-07-01

... circuits serving three-phase alternating current equipment used in the mine. Such record shall be kept in a... Underground Low- and Medium-Voltage Alternating Current Circuits § 75.900-4 Testing, examination, and...

30 CFR 75.900-4 - Testing, examination, and maintenance of circuit breakers; record.

Code of Federal Regulations, 2010 CFR

2010-07-01

... circuits serving three-phase alternating current equipment used in the mine. Such record shall be kept in a... Underground Low- and Medium-Voltage Alternating Current Circuits § 75.900-4 Testing, examination, and...

Digital Systems Validation Handbook. Volume 2

DTIC Science & Technology

1989-02-01

power. 2. A grid of wires, solid sheet, or foil. 3. A wire from circuit to grounding block or case. 4. A wire from circuit to structure. 5. Shield...RETURN. (11) 1. Structure, for power, fault, and "discrete" circuits. 2. A grid of wires, solid sheet, or foil. 3. A wire from circuit load back to...TV (14) Television TWTD (13) Thin Wire Time Domain TX (5) Transmit U.K. (13,141 United Kingdom U.S. (14) United States UART (15) Universal Asynchronous

Design and implementation of JOM-3 Overhauser magnetometer analog circuit

NASA Astrophysics Data System (ADS)

Zhang, Xiao; Jiang, Xue; Zhao, Jianchang; Zhang, Shuang; Guo, Xin; Zhou, Tingting

2017-09-01

Overhauser magnetometer, a kind of static-magnetic measurement system based on the Overhauser effect, has been widely used in archaeological exploration, mineral resources exploration, oil and gas basin structure detection, prediction of engineering exploration environment, earthquakes and volcanic eruotions, object magnetic measurement and underground buried booty exploration. Overhauser magnetometer plays an important role in the application of magnetic field measurement for its characteristics of small size, low power consumption and high sensitivity. This paper researches the design and the application of the analog circuit of JOM-3 Overhauser magnetometer. First, the Larmor signal output by the probe is very weak. In order to obtain the signal with high signal to noise rstio(SNR), the design of pre-amplifier circuit is the key to improve the quality of the system signal. Second, in this paper, the effectual step which could improve the frequency characters of bandpass filter amplifier circuit were put forward, and theoretical analysis was made for it. Third, the shaping circuit shapes the amplified sine signal into a square wave signal which is suitable for detecting the rising edge. Fourth, this design elaborated the optimized choice of tuning circuit, so the measurement range of the magnetic field can be covered. Last, integrated analog circuit testing system was formed to detect waveform of each module. By calculating the standard deviation, the sensitivity of the improved Overhauser magnetometer is 0.047nT for Earth's magnetic field observation. Experimental results show that the new magnetometer is sensitive to earth field measurement.

42 CFR 84.95 - Service time test; open-circuit apparatus.

Code of Federal Regulations, 2013 CFR

2013-10-01

... classified according to the length of time it supplies air or oxygen to the breathing machine. (c) The... 42 Public Health 1 2013-10-01 2013-10-01 false Service time test; open-circuit apparatus. 84.95...-Contained Breathing Apparatus § 84.95 Service time test; open-circuit apparatus. (a) Service time will be...

42 CFR 84.95 - Service time test; open-circuit apparatus.

Code of Federal Regulations, 2012 CFR

2012-10-01

... classified according to the length of time it supplies air or oxygen to the breathing machine. (c) The... 42 Public Health 1 2012-10-01 2012-10-01 false Service time test; open-circuit apparatus. 84.95...-Contained Breathing Apparatus § 84.95 Service time test; open-circuit apparatus. (a) Service time will be...

42 CFR 84.95 - Service time test; open-circuit apparatus.

Code of Federal Regulations, 2014 CFR

2014-10-01

... classified according to the length of time it supplies air or oxygen to the breathing machine. (c) The... 42 Public Health 1 2014-10-01 2014-10-01 false Service time test; open-circuit apparatus. 84.95...-Contained Breathing Apparatus § 84.95 Service time test; open-circuit apparatus. (a) Service time will be...

Solid state remote circuit selector switch

NASA Technical Reports Server (NTRS)

Peterson, V. S.

1970-01-01

Remote switching circuit utilizes voltage logic to switch on desired circuit. Circuit controls rotating multi-range pressure transducers in jet engine testing and can be used in coded remote circuit activator where sequence of switching has to occur in defined length of time to prevent false or undesired circuit activation.

Retractable pin dual in-line package test clip

DOEpatents

Bandzuch, Gregory S.; Kosslow, William J.

1996-01-01

This invention is a Dual In-Line Package (DIP) test clip for use when troubleshooting circuits containing DIP integrated circuits. This test clip is a significant improvement over existing DIP test clips in that it has retractable pins which will permit troubleshooting without risk of accidentally shorting adjacent pins together when moving probes to different pins on energized circuits or when the probe is accidentally bumped while taking measurements.

SMART Tubing Presents an Increased Risk of Disconnection During Extracorporeal Circulation

PubMed Central

Newling, Ross; Morris, Richard

2005-01-01

Abstract: A number of products exhibiting biocompatible features have been developed for use in extracorporeal blood circuits during cardiopulmonary bypass procedures. While attention has been focused on biocompatibility features of the blood-circuit interface, a number of issues applicable in clinical use of these circuits have arisen. Surface Modifying Additive Technology (SMART; Cobe Cardiovascular, Arvarda, CO) is one such technology. In this product, the structure of normal polyvinylchloride (PVC) tubing is altered through the blending of two copolymers to give a more biocompatible blood to plastic interface. In this study, we examined the in vitro mechanical ability of random samples (n = 10) of SMART and standard PVC tubing to withstand axial tension when the tubing was placed over a single barb of a connector. The tension required to remove the SMART tubing from the connector (83.3 ± 7.3 [SD] N), was significantly less than standard PVC tubing (115.6 ± 15.9 N; p < .0001, unpaired t test). The SMART tubing exhibited a 28% reduction in tubing to connector adhesion, which may have a significant effect on extracorporeal circuit disconnection and overall patient safety. PMID:16524161

ac Modeling and impedance spectrum tests of the superconducting magnetic field coils for the Wendelstein 7-X fusion experiment.

PubMed

Ehmler, Hartmut; Köppen, Matthias

2007-10-01

The impedance spectrum test was employed for detection of short circuits within Wendelstein 7-X (W7-X) superconducting magnetic field coils. This test is based on measuring the complex impedance over several decades of frequency. The results are compared to predictions of appropriate electrical equivalent circuits of coils in different production states or during cold test. When the equivalent circuit is not too complicated the impedance can be represented by an analytic function. A more detailed analysis is performed with a network simulation code. The overall agreement of measured and calculated or simulated spectra is good. Two types of short circuits which appeared are presented and analyzed. The detection limit of the method is discussed. It is concluded that combined high-voltage ac and low-voltage impedance spectrum tests are ideal means to rule out short circuits in the W7-X coils.

Documentation of Stainless Steel Lithium Circuit Test Section Design. Suppl

NASA Technical Reports Server (NTRS)

Godfroy, Thomas J. (Compiler); Martin, James J.

2010-01-01

The Early Flight Fission-Test Facilities (EFF-TF) team was tasked by Naval Reactors Prime Contract Team (NRPCT) to design, fabricate, and test an actively pumped lithium (Li) flow circuit. This Li circuit takes advantage of work in progress at the EFF TF on a stainless steel sodium/potassium (NaK) circuit. The effort involved modifying the original stainless steel NaK circuit such that it could be operated with Li in place of NaK. This new design considered freeze/thaw issues and required the addition of an expansion tank and expansion/extrusion volumes in the circuit plumbing. Instrumentation has been specified for Li and circuit heaters have been placed throughout the design to ensure adequate operational temperatures and no uncontrolled freezing of the Li. All major components have been designed and fabricated prior to circuit redesign for Li and were not modified. Basic circuit components include: reactor segment, Li to gas heat exchanger, electromagnetic liquid metal pump, load/drain reservoir, expansion reservoir, instrumentation, and trace heaters. The reactor segment, based on a Los Alamos National Laboratory 100-kW design study with 120 fuel pins, is the only prototypic component in the circuit. However, due to earlier funding constraints, a 37-pin partial-array of the core, including the central three rings of fuel pins (pin and flow path dimensions are the same as those in the full design), was selected for fabrication and test. This Technical Publication summarizes the design and integration of the pumped liquid metal Li flow circuit as of May 1, 2005. This supplement contains drawings, analysis, and calculations

Documentation of Stainless Steel Lithium Circuit Test Section Design

NASA Technical Reports Server (NTRS)

Godfroy, T. J.; Martin, J. J.; Stewart, E. T.; Rhys, N. O.

2010-01-01

The Early Flight Fission-Test Facilities (EFF-TF) team was tasked by Naval Reactors Prime Contract Team (NRPCT) to design, fabricate, and test an actively pumped lithium (Li) flow circuit. This Li circuit takes advantage of work in progress at the EFF TF on a stainless steel sodium/potassium (NaK) circuit. The effort involved modifying the original stainless steel NaK circuit such that it could be operated with Li in place of NaK. This new design considered freeze/thaw issues and required the addition of an expansion tank and expansion/extrusion volumes in the circuit plumbing. Instrumentation has been specified for Li and circuit heaters have been placed throughout the design to ensure adequate operational temperatures and no uncontrolled freezing of the Li. All major components have been designed and fabricated prior to circuit redesign for Li and were not modified. Basic circuit components include: reactor segment, Li to gas heat exchanger, electromagnetic liquid metal pump, load/drain reservoir, expansion reservoir, instrumentation, and trace heaters. The reactor segment, based on a Los Alamos National Laboratory 100-kW design study with 120 fuel pins, is the only prototypic component in the circuit. However, due to earlier funding constraints, a 37-pin partial-array of the core, including the central three rings of fuel pins (pin and flow path dimensions are the same as those in the full design), was selected for fabrication and test. This Technical Publication summarizes the design and integration of the pumped liquid metal Li flow circuit as of May 1, 2005.

SEMICONDUCTOR INTEGRATED CIRCUITS: A quasi-3-dimensional simulation method for a high-voltage level-shifting circuit structure

NASA Astrophysics Data System (ADS)

Jizhi, Liu; Xingbi, Chen

2009-12-01

A new quasi-three-dimensional (quasi-3D) numeric simulation method for a high-voltage level-shifting circuit structure is proposed. The performances of the 3D structure are analyzed by combining some 2D device structures; the 2D devices are in two planes perpendicular to each other and to the surface of the semiconductor. In comparison with Davinci, the full 3D device simulation tool, the quasi-3D simulation method can give results for the potential and current distribution of the 3D high-voltage level-shifting circuit structure with appropriate accuracy and the total CPU time for simulation is significantly reduced. The quasi-3D simulation technique can be used in many cases with advantages such as saving computing time, making no demands on the high-end computer terminals, and being easy to operate.

Electromagnetic optimisation of a 2.45 GHz microwave plasma source operated at atmospheric pressure and designed for hydrogen production

NASA Astrophysics Data System (ADS)

Miotk, R.; Jasiński, M.; Mizeraczyk, J.

2018-03-01

This paper presents the partial electromagnetic optimisation of a 2.45 GHz cylindrical-type microwave plasma source (MPS) operated at atmospheric pressure. The presented device is designed for hydrogen production from liquid fuels, e.g. hydrocarbons and alcohols. Due to industrial requirements regarding low costs for hydrogen produced in this way, previous testing indicated that improvements were required to the electromagnetic performance of the MPS. The MPS has a duct discontinuity region, which is a result of the cylindrical structure located within the device. The microwave plasma is generated in this discontinuity region. Rigorous analysis of the region requires solving a set of Maxwell equations, which is burdensome for complicated structures. Furthermore, the presence of the microwave plasma increases the complexity of this task. To avoid calculating the complex Maxwell equations, we suggest the use of the equivalent circuit method. This work is based upon the idea of using a Weissfloch circuit to characterize the area of the duct discontinuity and the plasma. The resulting MPS equivalent circuit allowed the calculation of a capacitive metallic diaphragm, through which an improvement in the electromagnetic performance of the plasma source was obtained.

Altered structural and effective connectivity in anorexia and bulimia nervosa in circuits that regulate energy and reward homeostasis

PubMed Central

Frank, G K W; Shott, M E; Riederer, J; Pryor, T L

2016-01-01

Anorexia and bulimia nervosa are severe eating disorders that share many behaviors. Structural and functional brain circuits could provide biological links that those disorders have in common. We recruited 77 young adult women, 26 healthy controls, 26 women with anorexia and 25 women with bulimia nervosa. Probabilistic tractography was used to map white matter connectivity strength across taste and food intake regulating brain circuits. An independent multisample greedy equivalence search algorithm tested effective connectivity between those regions during sucrose tasting. Anorexia and bulimia nervosa had greater structural connectivity in pathways between insula, orbitofrontal cortex and ventral striatum, but lower connectivity from orbitofrontal cortex and amygdala to the hypothalamus (P<0.05, corrected for comorbidity, medication and multiple comparisons). Functionally, in controls the hypothalamus drove ventral striatal activity, but in anorexia and bulimia nervosa effective connectivity was directed from anterior cingulate via ventral striatum to the hypothalamus. Across all groups, sweetness perception was predicted by connectivity strength in pathways connecting to the middle orbitofrontal cortex. This study provides evidence that white matter structural as well as effective connectivity within the energy-homeostasis and food reward-regulating circuitry is fundamentally different in anorexia and bulimia nervosa compared with that in controls. In eating disorders, anterior cingulate cognitive–emotional top down control could affect food reward and eating drive, override hypothalamic inputs to the ventral striatum and enable prolonged food restriction. PMID:27801897

Improving depiction of temporal bone anatomy with low-radiation dose CT by an integrated circuit detector in pediatric patients: a preliminary study.

PubMed

He, Jingzhen; Zu, Yuliang; Wang, Qing; Ma, Xiangxing

2014-12-01

The purpose of this study was to determine the performance of low-dose computed tomography (CT) scanning with integrated circuit (IC) detector in defining fine structures of temporal bone in children by comparing with the conventional detector. The study was performed with the approval of our institutional review board and the patients' anonymity was maintained. A total of 86 children<3 years of age underwent imaging of temporal bone with low-dose CT (80 kV/150 mAs) equipped with either IC detector or conventional discrete circuit (DC) detector. The image noise was measured for quantitative analysis. Thirty-five structures of temporal bone were further assessed and rated by 2 radiologists for qualitative analysis. κ Statistics were performed to determine the agreement reached between the 2 radiologists on each image. Mann-Whitney U test was used to determine the difference in image quality between the 2 detector systems. Objective analysis showed that the image noise was significantly lower (P<0.001) with the IC detector than with the DC detector. The κ values for qualitative assessment of the 35 fine anatomical structures revealed high interobserver agreement. The delineation for 30 of the 35 landmarks (86%) with the IC detector was superior to that with the conventional DC detector (P<0.05) although there were no differences in the delineation of the remaining 5 structures (P>0.05). The low-dose CT images acquired with the IC detector provide better depiction of fine osseous structures of temporal bone than that with the conventional DC detector.

Accurate time delay technology in simulated test for high precision laser range finder

NASA Astrophysics Data System (ADS)

Chen, Zhibin; Xiao, Wenjian; Wang, Weiming; Xue, Mingxi

2015-10-01

With the continuous development of technology, the ranging accuracy of pulsed laser range finder (LRF) is higher and higher, so the maintenance demand of LRF is also rising. According to the dominant ideology of "time analog spatial distance" in simulated test for pulsed range finder, the key of distance simulation precision lies in the adjustable time delay. By analyzing and comparing the advantages and disadvantages of fiber and circuit delay, a method was proposed to improve the accuracy of the circuit delay without increasing the count frequency of the circuit. A high precision controllable delay circuit was designed by combining the internal delay circuit and external delay circuit which could compensate the delay error in real time. And then the circuit delay accuracy could be increased. The accuracy of the novel circuit delay methods proposed in this paper was actually measured by a high sampling rate oscilloscope actual measurement. The measurement result shows that the accuracy of the distance simulated by the circuit delay is increased from +/- 0.75m up to +/- 0.15m. The accuracy of the simulated distance is greatly improved in simulated test for high precision pulsed range finder.

EHF Test-Bed Subharmonic Mixer.

DTIC Science & Technology

1981-07-14

work undertaken between June 1979 and April 1981 to develop a low noise, subharmonically pumped mixer f or a satel- lite receiver. A further objective is...waveguide with LO filter, of structure in Fig. 7a. 27 LO( J FILTER VRF TWT - Cj C10 RF SOURCE Fig. 8. Mixer equivalent circuit at RP. zo 9 VRF j Fig. 9

Modular chassis simplifies packaging and interconnecting of circuit boards

NASA Technical Reports Server (NTRS)

Arens, W. E.; Boline, K. G.

1964-01-01

A system of modular chassis structures has simplified the design for mounting a number of printed circuit boards. This design is structurally adaptable to computer and industrial control system applications.

Research, Development and Testing of a Fault-Tolerant FPGA-Based Sequencer for CubeSat Launching Applications

DTIC Science & Technology

2013-03-01

amounts of time and effort to implement. Future testing with commercial, fault-tolerant synthesis software, under a radiation environment, will yield ...initial viewpoint of the author is to take the flash-based FPGA route. This will yield a simple, reconfigurable circuit while providing the added...structure seen in Figure 30. Each of these full adder blocks were replaced in subsequent iterations to yield proper comparison with this baseline

Power converter having improved fluid cooling

DOEpatents

Meyer, Andreas A.; Radosevich, Lawrence D.; Beihoff, Bruce C.; Kehl, Dennis L.; Kannenberg, Daniel G.

2007-03-06

A thermal support may receive one or more power electronic circuits. The support may aid in removing heat from the circuits through fluid circulating through the support, which may be controlled in a closed-loop manner. Interfacing between circuits, circuit mounting structure, and the support provide for greatly enhanced cooling. The support may form a shield from both external EMI/RFI and from interference generated by operation of the power electronic circuits. Features may be provided to permit and enhance connection of the circuitry to external circuitry, such as improved terminal configurations. Modular units may be assembled that may be coupled to electronic circuitry via plug-in arrangements or through interface with a backplane or similar mounting and interconnecting structures.

30 CFR 57.6407 - Circuit testing.

Code of Federal Regulations, 2010 CFR

2010-07-01

... connection of electric detonator series; and (4) Total blasting circuit resistance prior to connection to the... 30 Mineral Resources 1 2010-07-01 2010-07-01 false Circuit testing. 57.6407 Section 57.6407... SAFETY AND HEALTH SAFETY AND HEALTH STANDARDS-UNDERGROUND METAL AND NONMETAL MINES Explosives Electric...

30 CFR 75.824 - Electrical protection.

Code of Federal Regulations, 2010 CFR

2010-07-01

... transformer and over-current relay in the neutral grounding resistor circuit. (vi) A single window-type current transformer that encircles all three-phase conductors must be used to activate the ground-fault... current transformer. (vii) A test circuit for the ground-fault device must be provided. The test circuit...

30 CFR 75.824 - Electrical protection.

Code of Federal Regulations, 2012 CFR

2012-07-01

... transformer and over-current relay in the neutral grounding resistor circuit. (vi) A single window-type current transformer that encircles all three-phase conductors must be used to activate the ground-fault... current transformer. (vii) A test circuit for the ground-fault device must be provided. The test circuit...

30 CFR 75.824 - Electrical protection.

Code of Federal Regulations, 2014 CFR

2014-07-01

... transformer and over-current relay in the neutral grounding resistor circuit. (vi) A single window-type current transformer that encircles all three-phase conductors must be used to activate the ground-fault... current transformer. (vii) A test circuit for the ground-fault device must be provided. The test circuit...

30 CFR 75.824 - Electrical protection.

Code of Federal Regulations, 2011 CFR

2011-07-01

... transformer and over-current relay in the neutral grounding resistor circuit. (vi) A single window-type current transformer that encircles all three-phase conductors must be used to activate the ground-fault... current transformer. (vii) A test circuit for the ground-fault device must be provided. The test circuit...

30 CFR 75.824 - Electrical protection.

Code of Federal Regulations, 2013 CFR

2013-07-01

... transformer and over-current relay in the neutral grounding resistor circuit. (vi) A single window-type current transformer that encircles all three-phase conductors must be used to activate the ground-fault... current transformer. (vii) A test circuit for the ground-fault device must be provided. The test circuit...

Steam cycle of the FR2 (in German)

DOE Office of Scientific and Technical Information (OSTI.GOV)

Perinic, D.; Schmidt, T.

1973-01-01

Following a brief explanation of the requirement of the experimental circuit, the use of irradiation and the circuit are described in detail. The installed experimental equipment within the test circuit is described and the safety problems discussed. The operation of the test equipment is summarized. (GE)

Design, experiments and simulation of voltage transformers on the basis of a differential input D-dot sensor.

PubMed

Wang, Jingang; Gao, Can; Yang, Jie

2014-07-17

Currently available traditional electromagnetic voltage sensors fail to meet the measurement requirements of the smart grid, because of low accuracy in the static and dynamic ranges and the occurrence of ferromagnetic resonance attributed to overvoltage and output short circuit. This work develops a new non-contact high-bandwidth voltage measurement system for power equipment. This system aims at the miniaturization and non-contact measurement of the smart grid. After traditional D-dot voltage probe analysis, an improved method is proposed. For the sensor to work in a self-integrating pattern, the differential input pattern is adopted for circuit design, and grounding is removed. To prove the structure design, circuit component parameters, and insulation characteristics, Ansoft Maxwell software is used for the simulation. Moreover, the new probe was tested on a 10 kV high-voltage test platform for steady-state error and transient behavior. Experimental results ascertain that the root mean square values of measured voltage are precise and that the phase error is small. The D-dot voltage sensor not only meets the requirement of high accuracy but also exhibits satisfactory transient response. This sensor can meet the intelligence, miniaturization, and convenience requirements of the smart grid.

Microwave Power for Smart Membrane Actuators

NASA Technical Reports Server (NTRS)

Choi, Sang H.; Song, Kyo D.; Golembiewski, Walter T.; Chu, Sang-Hyon; King, Glen C.

2002-01-01

The concept of microwave-driven smart membrane actuators is envisioned as the best option to alleviate the complexity associated with hard-wired control circuitry. A large, ultra-light space structure, such as solar sails and Gossamer spacecrafts, requires a distribution of power into individual membrane actuators to control them in an effective way. A patch rectenna array with a high voltage output was developed to drive smart membrane actuators. Networked patch rectenna array receives and converts microwave power into a DC power for an array of smart actuators. To use microwave power effectively, the concept of a power allocation and distribution (PAD) circuit is developed and tested for networking a rectenna/actuator patch array. For the future development, the PAD circuit could be imbedded into a single embodiment of rectenna and actuator array with the thin-film microcircuit embodiment. Preliminary design and fabrication of PAD circuitry that consists of a sixteen nodal elements were made for laboratory testing.

Characterization of low loss microstrip resonators as a building block for circuit QED in a 3D waveguide

NASA Astrophysics Data System (ADS)

Zoepfl, D.; Muppalla, P. R.; Schneider, C. M. F.; Kasemann, S.; Partel, S.; Kirchmair, G.

2017-08-01

Here we present the microwave characterization of microstrip resonators, made from aluminum and niobium, inside a 3D microwave waveguide. In the low temperature, low power limit internal quality factors of up to one million were reached. We found a good agreement to models predicting conductive losses and losses to two level systems for increasing temperature. The setup presented here is appealing for testing materials and structures, as it is free of wire bonds and offers a well controlled microwave environment. In combination with transmon qubits, these resonators serve as a building block for a novel circuit QED architecture inside a rectangular waveguide.

A disorder-based strategy for tunable, broadband wave attenuation

NASA Astrophysics Data System (ADS)

Zhang, Weiting; Celli, Paolo; Cardella, Davide; Gonella, Stefano

2017-04-01

One of the most daunting limitations of phononic crystals and acoustic/elastic metamaterials is their passivity: a given configuration is bound to display its phononic properties only around its design point, i.e., working at some pre-determined operating conditions. In the past decade, this shortcoming has inspired the design of phononic media with tunable wave characteristics; noteworthy results have been obtained through a family of methodologies involving shunted piezoelectric elements. Shunting a piezoelectric element means connecting it to a passive electric circuit; tunability stems from the ability to modify the effective mechanical properties of the piezoelectric medium by modifying the circuit characteristics. One of the most popular shunting circuits is the resistor-inductor, which allows the patch-and-shunt system to behave as an electromechanical resonator. A common motif among the works employing shunted piezos for phononic control is periodicity: the patches are typically periodically placed in the domain and the circuits are identically tuned. The objective of this work is to demonstrate that the wave attenuation performance of structures with shunted piezoelectric patches can be improved by leveraging notions of organized disorder. Based on the idea of rainbow trapping broadband wave attenuation obtained by tuning an array of resonators at distinct neighboring frequencies we design and test an electromechanical waveguide structure capable of attenuating waves over broad frequency ranges. In order to emphasize the fact that periodicity is not a binding requirement when working with RL shunts (which induce locally resonant bandgaps), we report on the performance of random arrangements of patches. In an attempt to demonstrate the tunability attribute of our strategy, we take advantage of the reconfigurability of the circuits to show how a single waveguide can attenuate both waves and vibrations over different frequency ranges.

Parameters Design of Series Resonant Inverter Circuit

NASA Astrophysics Data System (ADS)

Qi, Xingkun; Peng, Yonglong; Li, Yabin

This paper analyzes the main circuit structure of series resonant inverter, and designs the components parameters of the main circuit.That provides a theoretical method for the design of series resonant inverter.

Elements configuration of the open lead test circuit

DOE Office of Scientific and Technical Information (OSTI.GOV)

Fukuzaki, Yumi, E-mail: 14514@sr.kagawa-nct.ac.jp; Ono, Akira

In the field of electronics, small electronic devices are widely utilized because they are easy to carry. The devices have various functions by user’s request. Therefore, the lead’s pitch or the ball’s pitch have been narrowed and high-density printed circuit board has been used in the devices. Use of the ICs which have narrow lead pitch makes normal connection difficult. When logic circuits in the devices are fabricated with the state-of-the-art technology, some faults have occurred more frequently. It can be divided into types of open faults and short faults. We have proposed a new test method using a testmore » circuit in the past. This paper propose elements configuration of the test circuit.« less

Nonlinear interface between the piezoelectric harvesting structure and the modulating circuit of an energy harvester with a real storage battery.

PubMed

Hu, Yuantai; Xue, Huan; Hu, Ting; Hu, Hongping

2008-01-01

This paper studies the performance of an energy harvester with a piezoelectric bimorph (PB) and a real electrochemical battery (ECB), both are connected as an integrated system through a rectified dc-dc converter (DDC). A vibrating PB can scavenge energy from the operating environment by the electromechanical coupling. A DDC can effectively match the optimal output voltage of the harvesting structure to the battery voltage. To raise the output power density of PB, a synchronized switch harvesting inductor (SSHI) is used in parallel with the harvesting structure to reverse the voltage through charge transfer between the output electrodes at the transition moments from closed-to open-circuit. Voltage reversal results in earlier arrival of rectifier conduction because the output voltage phases of any two adjacent closed-circuit states are just opposite each other. In principle, a PB is with a smaller, flexural stiffness under closed-circuit condition than under open-circuit condition. Thus, the PB subjected to longer closed-circuit condition will be easier to be accelerated. A larger flexural velocity makes the PB to deflect with larger amplitude, which implies that more mechanical energy will be converted into an electric one. Nonlinear interface between the vibrating PB and the modulating circuit is analyzed in detail, and the effects of SSHI and DDC on the charging efficiency of the storage battery are researched numerically. It was found that the introduction of a DDC in the modulating circuit and an SSHI in the harvesting structure can raise the charging efficiency by several times.

Circuit reliability boosted by soldering pins of disconnect plugs to sockets

NASA Technical Reports Server (NTRS)

Pierce, W. B.

1964-01-01

Where disconnect pins must be used for wiring and testing a circuit, improved system reliability is obtained by making a permanent joint between pins and sockets of the disconnect plug. After the circuit has been tested, contact points may be fused through soldering, brazing, or welding.

49 CFR 234.269 - Cut-out circuits.

Code of Federal Regulations, 2013 CFR

2013-10-01

... EMERGENCY NOTIFICATION SYSTEMS Maintenance, Inspection, and Testing Inspections and Tests § 234.269 Cut-out... overrides the operation of automatic warning systems. This includes both switch cut-out circuits and devices... 49 Transportation 4 2013-10-01 2013-10-01 false Cut-out circuits. 234.269 Section 234.269...

49 CFR 234.269 - Cut-out circuits.

Code of Federal Regulations, 2014 CFR

2014-10-01

... EMERGENCY NOTIFICATION SYSTEMS Maintenance, Inspection, and Testing Inspections and Tests § 234.269 Cut-out... overrides the operation of automatic warning systems. This includes both switch cut-out circuits and devices... 49 Transportation 4 2014-10-01 2014-10-01 false Cut-out circuits. 234.269 Section 234.269...

49 CFR 234.269 - Cut-out circuits.

Code of Federal Regulations, 2012 CFR

2012-10-01

... EMERGENCY NOTIFICATION SYSTEMS Maintenance, Inspection, and Testing Inspections and Tests § 234.269 Cut-out... overrides the operation of automatic warning systems. This includes both switch cut-out circuits and devices... 49 Transportation 4 2012-10-01 2012-10-01 false Cut-out circuits. 234.269 Section 234.269...

Automatic circuit interrupter

NASA Technical Reports Server (NTRS)

Dwinell, W. S.

1979-01-01

In technique, voice circuits connecting crew's cabin to launch station through umbilical connector disconnect automatically unused, or deadened portion of circuits immediately after vehicle is launched, eliminating possibility that unused wiring interferes with voice communications inside vehicle or need for manual cutoff switch and its associated wiring. Technique is applied to other types of electrical actuation circuits, also launch of mapped vehicles, such as balloons, submarines, test sleds, and test chambers-all requiring assistance of ground crew.

RF Energy Interaction With Electro-Optic Materials (Single Investigator Award Proposed to Address Research Topic Area 6.4. Electromagnetics and RF Circuit Integration)

DTIC Science & Technology

2015-12-27

demonstration vehicles. Test and measurement of fabricated structures will be conducted to experimentally quantify RF and optical performance. Measurement...the development of coupled RF and optical structures. Both the graduate student and the undergraduate student were trained in conducting precision...research conducted for this project. The journal paper citations are: 1. L. Chen, J. Nagy, and R. M. Reano, "Patterned ion-sliced lithium niobate for

Ground and CHAMP observations of field-aligned current circuits generated by lower atmospheric disturbances and expectations to the SWARM to clarify their three dimensional structure

NASA Astrophysics Data System (ADS)

Iyemori, Toshihiko; Nakanishi, Kunihito; Aoyama, Tadashi; Lühr, Hermann

2014-05-01

Acoustic gravity waves propagated to the ionosphere cause dynamo currents in the ionosphere. They divert along geomagnetic field lines of force to another hemisphere accompanying electric field and then flow in the ionosphere of another hemisphere by the electric field forming closed current circuits. The oscillating current circuits with the period of acoustic waves generate magnetic variations on the ground, and they are observed as long period geomagnetic pulsations. This effect has been detected during big earthquakes, strong typhoons, tornados etc. On a low-altitude satellite orbit, the spatial distribution (i.e., structure) of the current circuits along the satellite orbit should be detected as temporal magnetic oscillations, and the effect is confirmed by a CHAMP data analysis. On the spatial structure, in particular, in the longitudinal direction, it has been difficult to examine by a single satellite or from ground magnetic observations. The SWARM satellites will provide an unique opportunity to clarify the three dimensional structure of the field-aligned current circuits.

Digital circuits using universal logic gates

NASA Technical Reports Server (NTRS)

Whitaker, Sterling R. (Inventor); Miles, Lowell H. (Inventor); Cameron, Eric G. (Inventor); Donohoe, Gregory W. (Inventor); Gambles, Jody W. (Inventor)

2004-01-01

According to the invention, a digital circuit design embodied in at least one of a structural netlist, a behavioral netlist, a hardware description language netlist, a full-custom ASIC, a semi-custom ASIC, an IP core, an integrated circuit, a hybrid of chips, one or more masks, a FPGA, and a circuit card assembly is disclosed. The digital circuit design includes first and second sub-circuits. The first sub-circuits comprise a first percentage of the digital circuit design and the second sub-circuits comprise a second percentage of the digital circuit design. Each of the second sub-circuits is substantially comprised of one or more kernel circuits. The kernel circuits are comprised of selection circuits. The second percentage is at least 5%. In various embodiments, the second percentage could be at least 10%, 20%, 30%, 40%, 50%, 60%, 70%, 80%, 90%, or 95%.

Advanced Space Suit PLSS 2.0 Cooling Loop Evaluation and PLSS 2.5 Recommendations

NASA Technical Reports Server (NTRS)

Steele, John; Quinn, Greg; Campbell, Colin; Makinen, Janice; Watts, Carly; Westheimer, Dave

2016-01-01

From 2012 to 2015 The NASA/JSC AdvSS (Advanced Space Suit) PLSS (Primary Life Support Subsystem) team, with support from UTC Aerospace Systems, performed the build-up, packaging and testing of PLSS 2.0. A key aspect of that testing was the evaluation of the long-term health of the water cooling circuit and the interfacing components. Intermittent and end-of-test water, residue and hardware analyses provided valuable information on the status of the water cooling circuit, and the approaches that would be necessary to enhance water cooling circuit health in the future. The evaluated data has been consolidated, interpreted and woven into an action plan for the maintenance of water cooling circuit health for the planned FY (fiscal year) 2016 through FY 2018 PLSS 2.5 testing. This paper provides an overview of the PLSS 2.0 water cooling circuit findings and the associated steps to be taken in that regard for the PLSS 2.5 testing.

Submicrosecond Power-Switching Test Circuit

NASA Technical Reports Server (NTRS)

Folk, Eric N.

2006-01-01

A circuit that changes an electrical load in a switching time shorter than 0.3 microsecond has been devised. This circuit can be used in testing the regulation characteristics of power-supply circuits . especially switching power-converter circuits that are supposed to be able to provide acceptably high degrees of regulation in response to rapid load transients. The combination of this power-switching circuit and a known passive constant load could be an attractive alternative to a typical commercially available load-bank circuit that can be made to operate in nominal constant-voltage, constant-current, and constant-resistance modes. The switching provided by a typical commercial load-bank circuit in the constant-resistance mode is not fast enough for testing of regulation in response to load transients. Moreover, some test engineers do not trust the test results obtained when using commercial load-bank circuits because the dynamic responses of those circuits are, variously, partly unknown and/or excessively complex. In contrast, the combination of this circuit and a passive constant load offers both rapid switching and known (or at least better known) load dynamics. The power-switching circuit (see figure) includes a signal-input section, a wide-hysteresis Schmitt trigger that prevents false triggering in the event of switch-contact bounce, a dual-bipolar-transistor power stage that drives the gate of a metal oxide semiconductor field-effect transistor (MOSFET), and the MOSFET, which is the output device that performs the switching of the load. The MOSFET in the specific version of the circuit shown in the figure is rated to stand off a potential of 100 V in the "off" state and to pass a current of 20 A in the "on" state. The switching time of this circuit (the characteristic time of rise or fall of the potential at the drain of the MOSFET) is .300 ns. The circuit can accept any of three control inputs . which one depending on the test that one seeks to perform: a repetitive waveform from a signal generator, momentary closure of a push-button switch, or closure or opening of a manually operated on/off switch. In the case of a signal generator, one can adjust the frequency and duty cycle as needed to obtain the desired AC power-supply response, which one could display on an oscilloscope. Momentary switch closure could be useful for obtaining (and, if desired, displaying on an oscilloscope set to trigger on an event) the response of a power supply to a single load transient. The on/off switch can be used to switch between load states in which static-load regulation measurements are performed.

Fault tolerant system based on IDDQ testing

NASA Astrophysics Data System (ADS)

Guibane, Badi; Hamdi, Belgacem; Mtibaa, Abdellatif; Bensalem, Brahim

2018-06-01

Offline test is essential to ensure good manufacturing quality. However, for permanent or transient faults that occur during the use of the integrated circuit in an application, an online integrated test is needed as well. This procedure should ensure the detection and possibly the correction or the masking of these faults. This requirement of self-correction is sometimes necessary, especially in critical applications that require high security such as automotive, space or biomedical applications. We propose a fault-tolerant design for analogue and mixed-signal design complementary metal oxide (CMOS) circuits based on the quiescent current supply (IDDQ) testing. A defect can cause an increase in current consumption. IDDQ testing technique is based on the measurement of power supply current to distinguish between functional and failed circuits. The technique has been an effective testing method for detecting physical defects such as gate-oxide shorts, floating gates (open) and bridging defects in CMOS integrated circuits. An architecture called BICS (Built In Current Sensor) is used for monitoring the supply current (IDDQ) of the connected integrated circuit. If the measured current is not within the normal range, a defect is signalled and the system switches connection from the defective to a functional integrated circuit. The fault-tolerant technique is composed essentially by a double mirror built-in current sensor, allowing the detection of abnormal current consumption and blocks allowing the connection to redundant circuits, if a defect occurs. Spices simulations are performed to valid the proposed design.

The plastic scintillator detector calibration circuit for DAMPE

NASA Astrophysics Data System (ADS)

Yang, Haibo; Kong, Jie; Zhao, Hongyun; Su, Hong

2016-07-01

The Dark Matter Particle Explorer (DAMPE) is being constructed as a scientific satellite to observe high energy cosmic rays in space. Plastic scintillator detector array (PSD), developed by Institute of Modern Physics, Chinese Academy of Sciences (IMPCAS), is one of the most important parts in the payload of DAMPE which is mainly used for the study of dark matter. As an anti-coincidence detector, and a charged-particle identification detector, the PSD has a total of 360 electronic readout channels, which are distributed at four sides of PSD using four identical front end electronics (FEE). Each FEE reads out 90 charge signals output by the detector. A special calibration circuit is designed in FEE. FPGA is used for on-line control, enabling the calibration circuit to generate the pulse signal with known charge. The generated signal is then sent to the FEE for calibration and self-test. This circuit mainly consists of DAC, operation amplifier, analog switch, capacitance and resistance. By using controllable step pulse, the charge can be coupled to the charge measuring chip using the small capacitance. In order to fulfill the system's objective of large dynamic range, the FEE is required to have good linearity. Thus, the charge-controllable signal is needed to do sweep test on all channels in order to obtain the non-linear parameters for off-line correction. On the other hand, the FEE will run on the satellite for three years. The changes of the operational environment and the aging of devices will lead to parameter variation of the FEE, highlighting the need for regular calibration. The calibration signal generation circuit also has a compact structure and the ability to work normally, with the PSD system's voltage resolution being higher than 0.6%.

A high reliability module with thermoelectric device by molding technology for M2M wireless sensor network

NASA Astrophysics Data System (ADS)

Nakagawa, K.; Tanaka, T.; Suzuki, T.

2015-10-01

This paper presents the fabrication of a new energy harvesting module that uses a thermoelectric device (TED) by using molding technology. Through molding technology, the TED and circuit board can be properly protected and a heat-radiating fin structure can be simultaneously constructed. The output voltage per heater temperature of the TED module at 20 °C ambient temperature is 8 mV K-1, similar to the result with the aluminum heat sink which is almost the same fin size as the TED module. The accelerated environmental tests are performed on a damp heat test, which is an aging test under high temperature and high humidity, highly accelerated temperature, and humidity stress test (HAST) for the purpose of evaluating the electrical reliability in harsh environments, cold test and thermal cycle test to evaluate degrading characteristics by cycling through two temperatures. All test results indicate that the TED and circuit board can be properly protected from harsh temperature and humidity by using molding technology because the output voltage of after-tested modules is reduced by less than 5%. This study presents a novel fabrication method for a high reliability TED-installed module appropriate for Machine to Machine wireless sensor networks.

Compact vehicle drive module having improved thermal control

DOEpatents

Meyer, Andreas A.; Radosevich, Lawrence D.; Beihoff, Bruce C.; Kehl, Dennis L.; Kannenberg, Daniel G.

2006-01-03

An electric vehicle drive includes a thermal support may receive one or more power electronic circuits. The support may aid in removing heat from the circuits through fluid circulating through the support, which may be controlled in a closed-loop manner. Interfacing between circuits, circuit mounting structure, and the support provide for greatly enhanced cooling. The support may form a shield from both external EMI/RFI and from interference generated by operation of the power electronic circuits. Features may be provided to permit and enhance connection of the circuitry to external circuitry, such as improved terminal configurations. Modular units may be assembled that may be coupled to electronic circuitry via plug-in arrangements or through interface with a backplane or similar mounting and interconnecting structures.

EHW Approach to Temperature Compensation of Electronics

NASA Technical Reports Server (NTRS)

Stoica, Adrian

2004-01-01

Efforts are under way to apply the concept of evolvable hardware (EHW) to compensate for variations, with temperature, in the operational characteristics of electronic circuits. To maintain the required functionality of a given circuit at a temperature above or below the nominal operating temperature for which the circuit was originally designed, a new circuit would be evolved; moreover, to obtain the required functionality over a very wide temperature range, there would be evolved a number of circuits, each of which would satisfy the performance requirements over a small part of the total temperature range. The basic concepts and some specific implementations of EHW were described in a number of previous NASA Tech Briefs articles, namely, "Reconfigurable Arrays of Transistors for Evolvable Hardware" (NPO-20078), Vol. 25, No. 2 (February 2001), page 36; Evolutionary Automated Synthesis of Electronic Circuits (NPO- 20535), Vol. 26, No. 7 (July 2002), page 37; "Designing Reconfigurable Antennas Through Hardware Evolution" (NPO-20666), Vol. 26, No. 7 (July 2002), page 38; "Morphing in Evolutionary Synthesis of Electronic Circuits" (NPO-20837), Vol. 26, No. 8 (August 2002), page 31; "Mixtrinsic Evolutionary Synthesis of Electronic Circuits" (NPO-20773) Vol. 26, No. 8 (August 2002), page 32; and "Synthesis of Fuzzy-Logic Circuits in Evolvable Hardware" (NPO-21095) Vol. 26, No. 11 (November 2002), page 38. To recapitulate from the cited prior articles: EHW is characterized as evolutionary in a quasi-genetic sense. The essence of EHW is to construct and test a sequence of populations of circuits that function as incrementally better solutions of a given design problem through the selective, repetitive connection and/or disconnection of capacitors, transistors, amplifiers, inverters, and/or other circuit building blocks. The connection and disconnection can be effected by use of field-programmable transistor arrays (FPTAs). The evolution is guided by a search-andoptimization algorithm (in particular, a genetic algorithm) that operates in the space of possible circuits to find a circuit that exhibits an acceptably close approximation of the desired functionality. The evolved circuits can be tested by mathematical modeling (that is, computational simulation) only, tested in real hardware, or tested in combinations of computational simulation and real hardware.

The Effects of Pressure on Gases in Solution: Possible Insights to Improve Microbubble Filtration for Extracorporeal Circulation

PubMed Central

Herbst, Daniel P.

2013-01-01

Abstract: Improvements in micropore arterial line filter designs used for extracorporeal circulation are still needed because microbubbles larger than the rated pore sizes are being detected beyond the filter outlet. Linked to principles governing the function of micropore filters, fluid pressures contained in extracorporeal circuits also influence the behavior of gas bubbles and the extent to which they are carried in a fluid flow. To better understand the relationship between pressure and microbubble behavior, two ex vivo test circuits with and without inline resistance were designed to assess changes in microbubble load with changes in pressure. Ultrasound Doppler probes were used to measure and compare the quality and quantity of microbubbles generated in each test circuit. Analysis of microbubble load was separated into two distinct phases, the time periods during and immediately after bubble generation. Although microbubble number decreased similarly in both test circuits, changes in microbubble volume were significant only in the test circuit with inline resistance. The test circuit with inline resistance also showed a decrease in the rate of volume transferred across each ultrasound Doppler probe and the microbubble number and size range measured in the postbubble generation period. The present research proposes that fluid pressures contained in extracorporeal circuits may be used to affect gases in solution as a possible method to improve microbubble filtration during extracorporeal circulation. PMID:23930378

The effects of pressure on gases in solution: possible insights to improve microbubble filtration for extracorporeal circulation.

PubMed

Herbst, Daniel P

2013-06-01

Improvements in micropore arterial line filter designs used for extracorporeal circulation are still needed because microbubbles larger than the rated pore sizes are being detected beyond the filter outlet. Linked to principles governing the function of micropore filters, fluid pressures contained in extracorporeal circuits also influence the behavior of gas bubbles and the extent to which they are carried in a fluid flow. To better understand the relationship between pressure and microbubble behavior, two ex vivo test circuits with and without inline resistance were designed to assess changes in microbubble load with changes in pressure. Ultrasound Doppler probes were used to measure and compare the quality and quantity of microbubbles generated in each test circuit. Analysis of microbubble load was separated into two distinct phases, the time periods during and immediately after bubble generation. Although microbubble number decreased similarly in both test circuits, changes in microbubble volume were significant only in the test circuit with inline resistance. The test circuit with inline resistance also showed a decrease in the rate of volume transferred across each ultrasound Doppler probe and the microbubble number and size range measured in the postbubble generation period. The present research proposes that fluid pressures contained in extracorporeal circuits may be used to affect gases in solution as a possible method to improve microbubble filtration during extracorporeal circulation.

Re-using biological devices: a model-aided analysis of interconnected transcriptional cascades designed from the bottom-up.

PubMed

Pasotti, Lorenzo; Bellato, Massimo; Casanova, Michela; Zucca, Susanna; Cusella De Angelis, Maria Gabriella; Magni, Paolo

2017-01-01

The study of simplified, ad-hoc constructed model systems can help to elucidate if quantitatively characterized biological parts can be effectively re-used in composite circuits to yield predictable functions. Synthetic systems designed from the bottom-up can enable the building of complex interconnected devices via rational approach, supported by mathematical modelling. However, such process is affected by different, usually non-modelled, unpredictability sources, like cell burden. Here, we analyzed a set of synthetic transcriptional cascades in Escherichia coli . We aimed to test the predictive power of a simple Hill function activation/repression model (no-burden model, NBM) and of a recently proposed model, including Hill functions and the modulation of proteins expression by cell load (burden model, BM). To test the bottom-up approach, the circuit collection was divided into training and test sets, used to learn individual component functions and test the predicted output of interconnected circuits, respectively. Among the constructed configurations, two test set circuits showed unexpected logic behaviour. Both NBM and BM were able to predict the quantitative output of interconnected devices with expected behaviour, but only the BM was also able to predict the output of one circuit with unexpected behaviour. Moreover, considering training and test set data together, the BM captures circuits output with higher accuracy than the NBM, which is unable to capture the experimental output exhibited by some of the circuits even qualitatively. Finally, resource usage parameters, estimated via BM, guided the successful construction of new corrected variants of the two circuits showing unexpected behaviour. Superior descriptive and predictive capabilities were achieved considering resource limitation modelling, but further efforts are needed to improve the accuracy of models for biological engineering.

Cell short circuit, preshort signature

NASA Technical Reports Server (NTRS)

Lurie, C.

1980-01-01

Short-circuit events observed in ground test simulations of DSCS-3 battery in-orbit operations are analyzed. Voltage signatures appearing in the data preceding the short-circuit event are evaluated. The ground test simulation is briefly described along with performance during reconditioning discharges. Results suggest that a characteristic signature develops prior to a shorting event.

42 CFR 84.97 - Test for carbon dioxide in inspired gas; open- and closed-circuit apparatus; maximum allowable...

Code of Federal Regulations, 2010 CFR

2010-10-01

... closed-circuit apparatus; maximum allowable limits. 84.97 Section 84.97 Public Health PUBLIC HEALTH... ACTIVITIES APPROVAL OF RESPIRATORY PROTECTIVE DEVICES Self-Contained Breathing Apparatus § 84.97 Test for carbon dioxide in inspired gas; open- and closed-circuit apparatus; maximum allowable limits. (a) Open...

42 CFR 84.97 - Test for carbon dioxide in inspired gas; open- and closed-circuit apparatus; maximum allowable...

Code of Federal Regulations, 2011 CFR

2011-10-01

... closed-circuit apparatus; maximum allowable limits. 84.97 Section 84.97 Public Health PUBLIC HEALTH... ACTIVITIES APPROVAL OF RESPIRATORY PROTECTIVE DEVICES Self-Contained Breathing Apparatus § 84.97 Test for carbon dioxide in inspired gas; open- and closed-circuit apparatus; maximum allowable limits. (a) Open...

A programmable heater control circuit for spacecraft

NASA Technical Reports Server (NTRS)

Nguyen, D. D.; Owen, J. W.; Smith, D. A.; Lewter, W. J.

1994-01-01

Spacecraft thermal control is accomplished for many components through use of multilayer insulation systems, electrical heaters, and radiator systems. The heaters are commanded to maintain component temperatures within design specifications. The programmable heater control circuit (PHCC) was designed to obtain an effective and efficient means of spacecraft thermal control. The hybrid circuit provides use of control instrumentation as temperature data, available to the spacecraft central data system, reprogramming capability of the local microprocessor during the spacecraft's mission, and the elimination of significant spacecraft wiring. The hybrid integrated circuit has a temperature sensing and conditioning circuit, a microprocessor, and a heater power and control circuit. The device is miniature and housed in a volume which allows physical integration with the component to be controlled. Applications might include alternate battery-powered logic-circuit configurations. A prototype unit with appropriate physical and functional interfaces was procured for testing. The physical functionality and the feasibility of fabrication of the hybrid integrated circuit were successfully verified. The remaining work to develop a flight-qualified device includes fabrication and testing of a Mil-certified part. An option for completing the PHCC flight qualification testing is to enter into a joint venture with industry.

Polymer solar cells with enhanced open-circuit voltage and efficiency

NASA Astrophysics Data System (ADS)

Chen, Hsiang-Yu; Hou, Jianhui; Zhang, Shaoqing; Liang, Yongye; Yang, Guanwen; Yang, Yang; Yu, Luping; Wu, Yue; Li, Gang

2009-11-01

Following the development of the bulk heterojunction structure, recent years have seen a dramatic improvement in the efficiency of polymer solar cells. Maximizing the open-circuit voltage in a low-bandgap polymer is one of the critical factors towards enabling high-efficiency solar cells. Study of the relation between open-circuit voltage and the energy levels of the donor/acceptor in bulk heterojunction polymer solar cells has stimulated interest in modifying the open-circuit voltage by tuning the energy levels of polymers. Here, we show that the open-circuit voltage of polymer solar cells constructed based on the structure of a low-bandgap polymer, PBDTTT, can be tuned, step by step, using different functional groups, to achieve values as high as 0.76 V. This increased open-circuit voltage combined with a high short-circuit current density results in a polymer solar cell with a power conversion efficiency as high as 6.77%, as certified by the National Renewable Energy Laboratory.

Tester Detects Steady-Short Or Intermittent-Open Circuits

NASA Technical Reports Server (NTRS)

Anderson, Bobby L.

1990-01-01

Momentary open circuits or steady short circuits trigger buzzer. Simple, portable, lightweight testing circuit sounds long-duration alarm when it detects steady short circuit or momentary open circuit in coaxial cable or other two-conductor transmission line. Tester sensitive to discontinuities lasting 10 microseconds or longer. Used extensively for detecting intermittent open shorts in accelerometer and extensometer cables. Also used as ordinary buzzer-type continuity checker to detect steady short or open circuits.

Formula Gives Better Contact-Resistance Values

NASA Technical Reports Server (NTRS)

Lieneweg, Udo; Hannaman, David J.

1988-01-01

Lateral currents in contact strips taken into account. Four-terminal test structures added to intergrated circuits to enable measurement of interfacial resistivities of contacts between thin conducting layers. Thin-film model simplified quasi-two-dimensional potential model that accounts adequately for complicated three-dimensional, nonuniform current densitites. Effects of nonuniformity caused by lateral current flow in strips summarized in equivalent resistance Rs and voltage Vs.

Rupture testing for the quality control of electrodeposited copper interconnections in high-speed, high-density circuits

NASA Technical Reports Server (NTRS)

Zakraysek, Louis

1987-01-01

Printed Wiring Multilayer Board (PWMLB) structures for high speed, high density circuits are prone to failure due to the microcracking of electrolytic copper interconnections. The failure can occur in the foil that makes up the inner layer traces or in the plated through holes (PTH) deposit that forms the layer to layer interconnections. It is shown that there are some distinctive differences in the quality of Type E copper and that these differences can be detected before its use in a PWMLB. It is suggested that the strength of some Type E copper can be very low when the material is hot and that it is the use of this poor quality material in a PWMLB that results in PTH and inner layer microcracking. Since the PWMLB failure in question are induced by a thermal stress, and since the poorer grades of Type E materials used in these structures are susceptible to premature failure under thermal stress, the use of elevated temperature rupture and creep rupture testing is proposed as a means for screening copper foil, or its PTH equivalent, in order to eliminate the problem of Type E copper microcracking in advanced PWMLBs.

Plasticity in single neuron and circuit computations

NASA Astrophysics Data System (ADS)

Destexhe, Alain; Marder, Eve

2004-10-01

Plasticity in neural circuits can result from alterations in synaptic strength or connectivity, as well as from changes in the excitability of the neurons themselves. To better understand the role of plasticity in the brain, we need to establish how brain circuits work and the kinds of computations that different circuit structures achieve. By linking theoretical and experimental studies, we are beginning to reveal the consequences of plasticity mechanisms for network dynamics, in both simple invertebrate circuits and the complex circuits of mammalian cerebral cortex.

Synthesis of energy-efficient FSMs implemented in PLD circuits

NASA Astrophysics Data System (ADS)

Nawrot, Radosław; Kulisz, Józef; Kania, Dariusz

2017-11-01

The paper presents an outline of a simple synthesis method of energy-efficient FSMs. The idea consists in using local clock gating to selectively block the clock signal, if no transition of a state of a memory element is required. The research was dedicated to logic circuits using Programmable Logic Devices as the implementation platform, but the conclusions can be applied to any synchronous circuit. The experimental section reports a comparison of three methods of implementing sequential circuits in PLDs with respect to clock distribution: the classical fully synchronous structure, the structure exploiting the Enable Clock inputs of memory elements, and the structure using clock gating. The results show that the approach based on clock gating is the most efficient one, and it leads to significant reduction of dynamic power consumed by the FSM.

A millimeter-wave tunneladder TWT

NASA Technical Reports Server (NTRS)

Wilson, D.

1988-01-01

A millimeter-wave traveling wave tube (TWT) was developed using a dispersive, high-impedance forward wave interaction structure based on a ladder, with non-space-harmonic interaction, for a tube with high gain per inch and high efficiency. The 'TunneLadder' interaction structure combines ladder properties modified to accommodate Pierce gun beam optics in a radially magnetized PM focusing structure. The development involved the fabrication of chemically milled, shaped ladders diffusion brazed to diamond cubes which are in turn active diffusion brazed to each ridge of a doubly ridged waveguide. Cold-test data, representing the (omega)(beta) and and impedance characteristics of the modified ladder circuit, were used in small and large-signal computer programs to predict TWT gain and efficiency. The structural design emphasizes ruggedness and reliability. Actual data from tested tubes verify the predicted performance while providing broader bandwidth than expected.

Physics Notes.

ERIC Educational Resources Information Center

School Science Review, 1980

1980-01-01

Outlines a variety of laboratory procedures, discussions, and demonstrations including a no-solder circuit board, damped to maintained oscillations with L-C circuits, polaroid strobe photos, resistive putty, soldering and circuit checking exercise, electromagnetic radiation, square pulses in C-R circuits, and testing an oscillating system. (GS)

49 CFR 234.203 - Control circuits.

Code of Federal Regulations, 2011 CFR

2011-10-01

... 49 Transportation 4 2011-10-01 2011-10-01 false Control circuits. 234.203 Section 234.203 Transportation Other Regulations Relating to Transportation (Continued) FEDERAL RAILROAD ADMINISTRATION..., Inspection, and Testing Maintenance Standards § 234.203 Control circuits. All control circuits that affect...

49 CFR 234.203 - Control circuits.

Code of Federal Regulations, 2010 CFR

2010-10-01

... 49 Transportation 4 2010-10-01 2010-10-01 false Control circuits. 234.203 Section 234.203 Transportation Other Regulations Relating to Transportation (Continued) FEDERAL RAILROAD ADMINISTRATION..., Inspection, and Testing Maintenance Standards § 234.203 Control circuits. All control circuits that affect...

HEMT Amplifiers and Equipment for their On-Wafer Testing

NASA Technical Reports Server (NTRS)

Fung, King man; Gaier, Todd; Samoska, Lorene; Deal, William; Radisic, Vesna; Mei, Xiaobing; Lai, Richard

2008-01-01

Power amplifiers comprising InP-based high-electron-mobility transistors (HEMTs) in coplanar-waveguide (CPW) circuits designed for operation at frequencies of hundreds of gigahertz, and a test set for onwafer measurement of their power levels have been developed. These amplifiers utilize an advanced 35-nm HEMT monolithic microwave integrated-circuit (MMIC) technology and have potential utility as local-oscillator drivers and power sources in future submillimeter-wavelength heterodyne receivers and imaging systems. The test set can reduce development time by enabling rapid output power characterization, not only of these and similar amplifiers, but also of other coplanar-waveguide power circuits, without the necessity of packaging the circuits.

Dietary triglycerides act on mesolimbic structures to regulate the rewarding and motivational aspects of feeding

PubMed Central

Cansell, Céline; Castel, Julien; Denis, Raphaël G. P.; Rouch, Claude; Delbes, Anne-Sophie; Martinez, Sarah; Mestivier, Denis; Finan, Brian; Maldonado-Aviles, Jaime G.; Rijnsburger, Merel; Tschöp, Matthias H.; DiLeone, Ralph J.; Eckel, Robert H.; la Fleur, Susanne E.; Magnan, Christophe; Hnasko, Thomas S.; Luquet, Serge

2014-01-01

Circulating triglycerides (TG) normally increase after a meal but are altered in pathophysiological conditions such as obesity. Although TG metabolism in the brain remains poorly understood, several brain structures express enzymes that process TG-enriched particles, including mesolimbic structures. For this reason, and because consumption of high fat diet alters dopamine signaling, we tested the hypothesis that TG might directly target mesolimbic reward circuits to control reward-seeking behaviors. We found that the delivery of small amounts of TG to the brain through the carotid artery rapidly reduced both spontaneous and amphetamine-induced locomotion, abolished preference for palatable food, and reduced the motivation to engage in food-seeking behavior. Conversely, targeted disruption of the TG-hydrolyzing enzyme lipoprotein lipase specifically in the nucleus accumbens increased palatable food preference and food seeking behavior. Finally, prolonged TG perfusion resulted in a return to normal palatable food preference despite continued locomotor suppression, suggesting that adaptive mechanisms occur. These findings reveal new mechanisms by which dietary fat may alter mesolimbic circuit function and reward seeking. PMID:24732670

Programmable Low-Voltage Circuit Breaker and Tester

NASA Technical Reports Server (NTRS)

Greenfield, Terry

2008-01-01

An instrumentation system that would comprise a remotely controllable and programmable low-voltage circuit breaker plus several electric-circuit-testing subsystems has been conceived, originally for use aboard a spacecraft during all phases of operation from pre-launch testing through launch, ascent, orbit, descent, and landing. The system could also be adapted to similar use aboard aircraft. In comparison with remotely controllable circuit breakers heretofore commercially available, this system would be smaller, less massive, and capable of performing more functions, as needed for aerospace applications.

A Single Phase 7-Level Cascade Inverter Topology with Reduced Number of Switches on Resistive Load by Using PWM

NASA Astrophysics Data System (ADS)

Hamzah, H. H.; Ponniran, A.; Kasiran, A. N.; Harimon, M. A.; Gendum, D. A.; Yatim, M. H.

2018-04-01

This paper discussing design principles of inverter structure with reduced number of semiconductor devices of seven levels symmetric H-bridge multilevel inverter (MLI) topology. The aim of this paper is to design an inverter circuit with reduction of semiconductor losses, converter size and development cost. The H-bridge and auxiliary structures were considered in order to achieve seven levels output voltage. The performance of design circuit is compared with conventional seven levels structure in terms of voltage output. The circuit development consists of seven switches and three diode. A basic modulation technique is used to confirm the designed circuit. The results show that the designed circuit is able to convert seven level output voltage with low total harmonics distortion (THD) in voltage fundamental output. According to the results, fundamental output voltage is increased up to 8.314%, and the THD is decreased up to 0.81% compared to the conventional seven level inverter.

Design of low loss helix circuits for interference fitted and brazed circuits

NASA Technical Reports Server (NTRS)

Jacquez, A.

1983-01-01

The RF loss properties and thermal capability of brazed helix circuits and interference fitted circuits were evaluated. The objective was to produce design circuits with minimum RF loss and maximum heat transfer. These circuits were to be designed to operate at 10 kV and at 20 GHz using a gamma a approximately equal to 1.0. This represents a circuit diameter of only 0.75 millimeters. The fabrication of this size circuit and the 0.48 millimeter high support rods required considerable refinements in the assembly techniques and fixtures used on lower frequency circuits. The transition from the helices to the waveguide was designed and the circuits were matched from 20 to 40 GHz since the helix design is a broad band circuit and at a gamma a of 1.0 will operate over this band. The loss measurement was a transmission measurement and therefore had two such transitions. This resulting double-ended match required tuning elements to achieve the broad band match and external E-H tuners at each end to optimize the match for each frequency where the loss measurement was made. The test method used was a substitution method where the test fixture was replaced by a calibrated attenuator.

Hazard-Free Pyrotechnic Simulator

NASA Technical Reports Server (NTRS)

Mcalister, William B., Jr.

1988-01-01

Simulator evaluates performance of firing circuits for electroexplosive devices (EED's) safely and inexpensively. Tests circuits realistically when pyrotechnic squibs not connected and eliminates risks of explosions. Used to test such devices as batteries where test conditions might otherwise degrade them.

A systematic review of lumped-parameter equivalent circuit models for real-time estimation of lithium-ion battery states

NASA Astrophysics Data System (ADS)

Nejad, S.; Gladwin, D. T.; Stone, D. A.

2016-06-01

This paper presents a systematic review for the most commonly used lumped-parameter equivalent circuit model structures in lithium-ion battery energy storage applications. These models include the Combined model, Rint model, two hysteresis models, Randles' model, a modified Randles' model and two resistor-capacitor (RC) network models with and without hysteresis included. Two variations of the lithium-ion cell chemistry, namely the lithium-ion iron phosphate (LiFePO4) and lithium nickel-manganese-cobalt oxide (LiNMC) are used for testing purposes. The model parameters and states are recursively estimated using a nonlinear system identification technique based on the dual Extended Kalman Filter (dual-EKF) algorithm. The dynamic performance of the model structures are verified using the results obtained from a self-designed pulsed-current test and an electric vehicle (EV) drive cycle based on the New European Drive Cycle (NEDC) profile over a range of operating temperatures. Analysis on the ten model structures are conducted with respect to state-of-charge (SOC) and state-of-power (SOP) estimation with erroneous initial conditions. Comparatively, both RC model structures provide the best dynamic performance, with an outstanding SOC estimation accuracy. For those cell chemistries with large inherent hysteresis levels (e.g. LiFePO4), the RC model with only one time constant is combined with a dynamic hysteresis model to further enhance the performance of the SOC estimator.

Modifications to the Fission Surface Power Primary Test Circuit (FSP-PTC)

NASA Technical Reports Server (NTRS)

Garber, Anne E.

2008-01-01

An actively pumped alkali metal flow circuit, designed and fabricated at the NASA Marshall Space Flight Center, underwent a range of tests at MSFC in early 2007. During this period, system transient responses and the performance of the liquid metal pump were evaluated. In May of 2007, the circuit was drained and cleaned to prepare for multiple modifications: the addition of larger upper and lower reservoirs, the installation of an annular linear induction pump (ALIP), and the inclusion of a closeable orifice in the test section. Modifications are now complete and testing has resumed. Performance of the ALIp, provided by Idaho National Laboratory (INL), is the subject of the first round ofexperimentation. This paper provides a summary of the tests conducted on the original circuit, details the physical changes that have since been made to it, and describes the current test program.

Simulated Laboratory in Digital Logic.

ERIC Educational Resources Information Center

Cleaver, Thomas G.

Design of computer circuits used to be a pencil and paper task followed by laboratory tests, but logic circuit design can now be done in half the time as the engineer accesses a program which simulates the behavior of real digital circuits, and does all the wiring and testing on his computer screen. A simulated laboratory in digital logic has been…

Discrete Semiconductor Device Reliability

DTIC Science & Technology

1988-03-25

array or alphanumeric display. "--" indicates unknown diode count. Voc Open circuit voltage for photovoltaic modules . indicates unknown. Isc Short... circuit current for photovoltaic modules . "--" indicates unknown. Number Tested Quantity of parts under the described test or field conditions for that...information pertaining to electronic systems and parts used therein. The present scope includes integrated circuits , hybrids, discrete semiconductors

Collector/collector guard ring balancing circuit eliminates edge effects

NASA Technical Reports Server (NTRS)

Lieb, D. P.

1966-01-01

Circuit in which an emitter is maintained opposite a concentric collector and guard structure is achieved by matching the temperature and potential of the guard with that of the collector over the operating range. This control system is capable of handling up to 100 amperes in the guard circuit and 200 amperes in the collectors circuit.

Assembly and Thermal Hydraulic Test of a Stainless Steel Sodium-Potassium Circuit

NASA Technical Reports Server (NTRS)

Garber, A.; Godfroy, T.; Webster, K.

2007-01-01

Early Flight Fission Test Facilities (EFF-TF) team has been tasked by the NASA Marshall Space Flight Center Nuclear Systems Office to design, fabricate, and test an actively pumped alkali metal flow circuit. The system was originally built for use with lithium, but due to a shift in focus, it was redesigned for use with a eutectic mixture of sodium potassium (NaK). Basic circuit components include: reactor segment, NaK to gas heat exchanger, electromagnetic (EM) liquid metal pump, load/drain reservoir, expansion reservoir, instrumentation, and a spill reservoir. A 37-pin partial-array core (pin and flow path dimensions are the same as those in a full design) was selected for fabrication and test. This paper summarizes the first fill and checkout testing of the Stainless Steel NaK-Cooled Circuit (SNaKC).

Circuit design of an EMCCD camera

NASA Astrophysics Data System (ADS)

Li, Binhua; Song, Qian; Jin, Jianhui; He, Chun

2012-07-01

EMCCDs have been used in the astronomical observations in many ways. Recently we develop a camera using an EMCCD TX285. The CCD chip is cooled to -100°C in an LN2 dewar. The camera controller consists of a driving board, a control board and a temperature control board. Power supplies and driving clocks of the CCD are provided by the driving board, the timing generator is located in the control board. The timing generator and an embedded Nios II CPU are implemented in an FPGA. Moreover the ADC and the data transfer circuit are also in the control board, and controlled by the FPGA. The data transfer between the image workstation and the camera is done through a Camera Link frame grabber. The software of image acquisition is built using VC++ and Sapera LT. This paper describes the camera structure, the main components and circuit design for video signal processing channel, clock driver, FPGA and Camera Link interfaces, temperature metering and control system. Some testing results are presented.

Periodic shunted arrays for the control of noise radiation in an enclosure

NASA Astrophysics Data System (ADS)

Casadei, Filippo; Dozio, Lorenzo; Ruzzene, Massimo; Cunefare, Kenneth A.

2010-08-01

This work presents numerical and experimental investigations of the application of a periodic array of resistive-inductive (RL) shunted piezoelectric patches for the attenuation of broadband noise radiated by a flexible plate in an enclosed cavity. A 4×4 lay-out of piezoelectric patches is bonded to the surface of a rectangular plate fully clamped to the top face of a rectangular cavity. Each piezo-patch is shunted through a single RL circuit, and all shunting circuits are tuned at the same frequency. The response of the resulting periodic structure is characterized by frequency bandgaps where vibrations and associated noise are strongly attenuated. The location and extent of induced bandgaps are predicted by the application of Bloch theorem on a unit cell of the periodic assembly, and they are controlled by proper selection of the shunting circuit impedance. A coupled piezo-structural-acoustic finite element model is developed to evaluate the noise reduction performance. Strong attenuation of multiple panel-controlled modes is observed over broad frequency bands. The proposed concept is tested on an aluminum plate mounted in a wooden box and driven by a shaker. Experimental results are presented in terms of pressure responses recorded using a grid of microphones placed inside the acoustic box.

Power dissipation in fractal AC circuits

NASA Astrophysics Data System (ADS)

Chen, Joe P.; Rogers, Luke G.; Anderson, Loren; Andrews, Ulysses; Brzoska, Antoni; Coffey, Aubrey; Davis, Hannah; Fisher, Lee; Hansalik, Madeline; Loew, Stephen; Teplyaev, Alexander

2017-08-01

We extend Feynman’s analysis of an infinite ladder circuit to fractal circuits, providing examples in which fractal circuits constructed with purely imaginary impedances can have characteristic impedances with positive real part. Using (weak) self-similarity of our fractal structures, we provide algorithms for studying the equilibrium distribution of energy on these circuits. This extends the analysis of self-similar resistance networks introduced by Fukushima, Kigami, Kusuoka, and more recently studied by Strichartz et al.

Parallel LC circuit model for multi-band absorption and preliminary design of radiative cooling.

PubMed

Feng, Rui; Qiu, Jun; Liu, Linhua; Ding, Weiqiang; Chen, Lixue

2014-12-15

We perform a comprehensive analysis of multi-band absorption by exciting magnetic polaritons in the infrared region. According to the independent properties of the magnetic polaritons, we propose a parallel inductance and capacitance(PLC) circuit model to explain and predict the multi-band resonant absorption peaks, which is fully validated by using the multi-sized structure with identical dielectric spacing layer and the multilayer structure with the same strip width. More importantly, we present the application of the PLC circuit model to preliminarily design a radiative cooling structure realized by merging several close peaks together. This omnidirectional and polarization insensitive structure is a good candidate for radiative cooling application.

Faster Evolution of More Multifunctional Logic Circuits

NASA Technical Reports Server (NTRS)

Stoica, Adrian; Zebulum, Ricardo

2005-01-01

A modification in a method of automated evolutionary synthesis of voltage-controlled multifunctional logic circuits makes it possible to synthesize more circuits in less time. Prior to the modification, the computations for synthesizing a four-function logic circuit by this method took about 10 hours. Using the method as modified, it is possible to synthesize a six-function circuit in less than half an hour. The concepts of automated evolutionary synthesis and voltage-controlled multifunctional logic circuits were described in a number of prior NASA Tech Briefs articles. To recapitulate: A circuit is designed to perform one of several different logic functions, depending on the value of an applied control voltage. The circuit design is synthesized following an automated evolutionary approach that is so named because it is modeled partly after the repetitive trial-and-error process of biological evolution. In this process, random populations of integer strings that encode electronic circuits play a role analogous to that of chromosomes. An evolved circuit is tested by computational simulation (prior to testing in real hardware to verify a final design). Then, in a fitness-evaluation step, responses of the circuit are compared with specifications of target responses and circuits are ranked according to how close they come to satisfying specifications. The results of the evaluation provide guidance for refining designs through further iteration.

Multiconductor Short/Open Cable Tester

NASA Technical Reports Server (NTRS)

Eichenberg, Dennis

1994-01-01

Frequent or regular testing of multiconductor cables terminated in multipin conductors tedious, if not impossible, task. This inexpensive circuit simplifies open/short testing and is amenable to automation. In operation, pair of connectors selected to match pair of connectors installed on each of cables to be tested. As many connectors accommodated as required, and each can have as many conductors as required. Testing technique implemented with this circuit automated easily with electronic controls and computer interface. Printout provides status of each conductor in cable, indicating which, if any, of conductors has open or short circuit.

[Development and test of a wheat chlorophyll, nitrogen and water content meter].

PubMed

Yu, Bo; Sun, Ming; Han, Shu-Qing; Xia, Jin-Wen

2011-08-01

A portable meter was developed which can detect chlorophyll, nitrogen and moisture content of wheat leaf simultaneously, and can supply enough data for guiding fertilization and irrigation. This meter is composed of light path and electronic circuit. And this meter uses 660, 940 and 1450 nm LED together with narrow band filters as the active light source. The hardware circuit consists of micro-controller, LED drive circuit, detector, communication circuit, keyboard and LCD circuit. The meter was tested in the field and performed well with good repeatability and accuracy. The relative errors of chlorophyll and nitrogen test were about 10%, relative error for water content was 4%. The coefficients of variation of the three indices were all below 1.5%. All of these prove that the meter can be applied under the field condition to guide the wheat production.

Integrated Cryogenic Electronics Testbed (ICE-T) for Evaluation of Superconductor and Cryo-Semiconductor Integrated Circuits

NASA Astrophysics Data System (ADS)

Dotsenko, V. V.; Sahu, A.; Chonigman, B.; Tang, J.; Lehmann, A. E.; Gupta, V.; Talalevskii, A.; Ruotolo, S.; Sarwana, S.; Webber, R. J.; Gupta, D.

2017-02-01

Research and development of cryogenic application-specific integrated circuits (ASICs), such as high-frequency (tens of GHz) semiconductor and superconductor mixed-signal circuits and large-scale (>10,000 Josephson Junctions) superconductor digital circuits, have long been hindered by the absence of specialized cryogenic test apparatus. During their iterative development phase, most ASICs require many additional input-output lines for applying independent bias controls, injecting test signals, and monitoring outputs of different sub-circuits. We are developing a full suite of modular test apparatus based on cryocoolers that do not consume liquid helium, and support extensive electrical interfaces to standard and custom test equipment. Our design separates the cryogenics from electrical connections, allowing even inexperienced users to conduct testing by simply mounting their ASIC on a removable electrical insert. Thermal connections between the cold stages and the inserts are made with robust thermal links. ICE-T accommodates two independent electrical inserts at the same time. We have designed various inserts, such as universal ones with all 40 or 80 coaxial cables and those with customized wiring and temperature-controlled stages. ICE-T features fast thermal cycling for rapid testing, enables detailed testing over long periods (days to months, if necessary), and even supports automated testing of digital ICs with modular additions.

Polymorphic Electronic Circuits

NASA Technical Reports Server (NTRS)

Stoica, Adrian

2004-01-01

Polymorphic electronics is a nascent technological discipline that involves, among other things, designing the same circuit to perform different analog and/or digital functions under different conditions. For example, a circuit can be designed to function as an OR gate or an AND gate, depending on the temperature (see figure). Polymorphic electronics can also be considered a subset of polytronics, which is a broader technological discipline in which optical and possibly other information- processing systems could also be designed to perform multiple functions. Polytronics is an outgrowth of evolvable hardware (EHW). The basic concepts and some specific implementations of EHW were described in a number of previous NASA Tech Briefs articles. To recapitulate: The essence of EHW is to design, construct, and test a sequence of populations of circuits that function as incrementally better solutions of a given design problem through the selective, repetitive connection and/or disconnection of capacitors, transistors, amplifiers, inverters, and/or other circuit building blocks. The evolution is guided by a search-and-optimization algorithm (in particular, a genetic algorithm) that operates in the space of possible circuits to find a circuit that exhibits an acceptably close approximation of the desired functionality. The evolved circuits can be tested by computational simulation (in which case the evolution is said to be extrinsic), tested in real hardware (in which case the evolution is said to be intrinsic), or tested in random sequences of computational simulation and real hardware (in which case the evolution is said to be mixtrinsic).

A Test Methodology for Determining Space-Readiness of Xilinx SRAM-Based FPGA Designs

DOE Office of Scientific and Technical Information (OSTI.GOV)

Quinn, Heather M; Graham, Paul S; Morgan, Keith S

2008-01-01

Using reconfigurable, static random-access memory (SRAM) based field-programmable gate arrays (FPGAs) for space-based computation has been an exciting area of research for the past decade. Since both the circuit and the circuit's state is stored in radiation-tolerant memory, both could be alterd by the harsh space radiation environment. Both the circuit and the circuit's state can be prote cted by triple-moduler redundancy (TMR), but applying TMR to FPGA user designs is often an error-prone process. Faulty application of TMR could cause the FPGA user circuit to output incorrect data. This paper will describe a three-tiered methodology for testing FPGA usermore » designs for space-readiness. We will describe the standard approach to testing FPGA user designs using a particle accelerator, as well as two methods using fault injection and a modeling tool. While accelerator testing is the current 'gold standard' for pre-launch testing, we believe the use of fault injection and modeling tools allows for easy, cheap and uniform access for discovering errors early in the design process.« less

Analysis of Wave Propagation in Stratified Structures Using Circuit Analogues, with Application to Electromagnetic Absorbers

ERIC Educational Resources Information Center

Sjoberg, Daniel

2008-01-01

This paper presents an overview of how circuit models can be used for analysing wave propagation in stratified structures. Relatively complex structures can be analysed using models which are accessible to undergraduate students. Homogeneous slabs are modelled as transmission lines, and thin sheets between the slabs are modelled as lumped…

49 CFR 234.203 - Control circuits.

Code of Federal Regulations, 2013 CFR

2013-10-01

... 49 Transportation 4 2013-10-01 2013-10-01 false Control circuits. 234.203 Section 234.203... EMERGENCY NOTIFICATION SYSTEMS Maintenance, Inspection, and Testing Maintenance Standards § 234.203 Control circuits. All control circuits that affect the safe operation of a highway-rail grade crossing warning...

49 CFR 234.203 - Control circuits.

Code of Federal Regulations, 2014 CFR

2014-10-01

... 49 Transportation 4 2014-10-01 2014-10-01 false Control circuits. 234.203 Section 234.203... EMERGENCY NOTIFICATION SYSTEMS Maintenance, Inspection, and Testing Maintenance Standards § 234.203 Control circuits. All control circuits that affect the safe operation of a highway-rail grade crossing warning...

Advanced Space Suit PLSS 2.0 Cooling Loop Evaluation and PLSS 2.5 Recommendations

NASA Technical Reports Server (NTRS)

Steele, John; Quinn, Greg; Campbell, Colin; Makinen, Janice; Watts, Carly; Westheimer, David

2016-01-01

From 2012 to 2015 The NASA/JSC AdvSS (Advanced Space Suit) PLSS (Portable Life Support Subsystem) team, with support from UTC Aerospace Systems, performed the build-up, packaging and testing of PLSS 2.0. One aspect of that testing was the evaluation of the long-term health of the water cooling circuit and the interfacing components. Periodic and end-of-test water, residue and hardware analyses provided valuable information on the status of the water cooling circuit, and the approaches that would be necessary to enhance water cooling circuit health in the future. The evaluated data has been consolidated, interpreted and woven into an action plan for the maintenance of water cooling circuit health for the planned FY (fiscal year) 2016 through FY 2018 PLSS 2.5 testing. This paper provides an overview of the PLSS 2.0 water cooling circuit findings and the associated steps to be taken in that regard for the PLSS 2.5.

Testing Services

NASA Technical Reports Server (NTRS)

1993-01-01

Trace Laboratories is an independent testing laboratory specializing in testing printed circuit boards, automotive products and military hardware. Technical information from NASA Tech Briefs and two subsequent JPL Technical Support packages have assisted Trace in testing surface insulation resistance on printed circuit board materials. Testing time was reduced and customer service was improved because of Jet Propulsion Laboratory technical support packages.

Monolithic circuits for barium fluoride detectors used in nuclear physics experiments. CRADA final report

DOE Office of Scientific and Technical Information (OSTI.GOV)

Varner, R.L.; Blankenship, J.L.; Beene, J.R.

1998-02-01

Custom monolithic electronic circuits have been developed recently for large detector applications in high energy physics where subsystems require tens of thousands of channels of signal processing and data acquisition. In the design and construction of these enormous detectors, it has been found that monolithic circuits offer significant advantages over discrete implementations through increased performance, flexible packaging, lower power and reduced cost per channel. Much of the integrated circuit design for the high energy physics community is directly applicable to intermediate energy heavy-ion and electron physics. This STTR project conducted in collaboration with researchers at the Holifield Radioactive Ion Beammore » Facility (HRIBF) at Oak Ridge National Laboratory, sought to develop a new integrated circuit chip set for barium fluoride (BaF{sub 2}) detector arrays based upon existing CMOS monolithic circuit designs created for the high energy physics experiments. The work under the STTR Phase 1 demonstrated through the design, simulation, and testing of several prototype chips the feasibility of using custom CMOS integrated circuits for processing signals from BaF{sub 2} detectors. Function blocks including charge-sensitive amplifiers, comparators, one shots, time-to-amplitude converters, analog memory circuits and buffer amplifiers were implemented during Phase 1 effort. Experimental results from bench testing and laboratory testing with sources were documented.« less

Triple Hybrid Energy Harvesting Interface Electronics

NASA Astrophysics Data System (ADS)

Uluşan, H.; Chamanian, S.; Pathirana, W. M. P. R.; Zorlu, Ö.; Muhtaroğlu, A.; Külah, H.

2016-11-01

This study presents a novel triple hybrid system that combines simultaneously generated power from thermoelectric (TE), vibration-based electromagnetic (EM) and piezoelectric (PZT) harvesters for a relatively high power supply capability. In the proposed solution each harvesting source utilizes a distinct power management circuit that generates a DC voltage suitable for combining the three parallel supplies. The circuits are designed and implemented in 180 nm standard CMOS technology, and are terminated with a schottky diode to avoid reverse current flow. The harvested AC signal from the EM harvester is rectified with a self-powered AC-DC doubler, which utilizes active diode structures to minimize the forward- bias voltage drop. The PZT interface electronics utilizes a negative voltage converter as the first stage, followed by synchronous power extraction and DC-to-DC conversion through internal switches, and an external inductor. The ultra-low voltage DC power harvested by the TE generator is stepped up through a charge-pump driven by an LC oscillator with fully- integrated center-tapped differential inductors. Test results indicate that hybrid energy harvesting circuit provides more than 1 V output for load resistances higher than 100 kΩ (10 μW) where the stand-alone harvesting circuits are not able to reach 1 V output. This is the first hybrid harvester circuit that simultaneously extracts energy from three independent sources, and delivers a single DC output.

Adaptive piezoelectric sensoriactuators for active structural acoustic control

NASA Astrophysics Data System (ADS)

Vipperman, Jeffrey Stuart

1997-09-01

A new transducer technology with application to active control systems, modal analysis, and autonomous system health monitoring, is brought to fruition in this work. It has the advantages of being lightweight, potentially cost-effective, self-tuning, has negligible dynamics, and most importantly (from a robustness perspective), it provides a colocated sensor/actuator pair. The transducer consists of a piezoceramic element which serves as both an actuator and a sensor and will be referred to in this work as a sensoriactuator. Simple, adaptive signal processing in conjunction with a voltage controlled amplifier, reference capacitor, and a common-mode rejection circuit extract the mechanical response from the total response of the piezoelectric sensoriactuator for sensing. The digital portion of the adaptive piezoelectric sensoriactuator merely serves to tune the circuit, avoiding the potentially destabilizing effects of introducing a digital delay in the signal path, when used for feedback control applications. Adaptive compensation of the sensoriactuator is necessary since the signal to noise ratio is typically greater than 40 dB, making it prohibitive to tune the circuit manually. In addition, the constitutive properties of piezoceramics vary with time and environment, necessitating that the circuit be periodically re-tuned. The analog portion of the hardware is based upon op-amp circuits and an AD632 analog multiplier chip, which serves as both a voltage controlled amplifier (VCA) and a common mode rejection (CMR) circuit. A single coefficient least-mean square (LMS) adaptive filter continuously adjusts the gain of the VCA circuit as necessary. Nonideal behavior of piezoceramics is discussed along with methods to counter the consequential deterioration in circuit performance. A multiple input multiple output (MIMO) implementation of the adaptive piezoelectric sensoriactuator is developed using orthogonal white noise training signals for each sensoriactuator. Two piezostructures were used to demonstrate and verify the adaptive piezoelectric sensoriactuator, a cantilevered beam and a simply-supported plate. The experimental open- loop results compare well with theory. A preliminary closed-loop rate controller applied to the cantilevered beam demonstrates simultaneous control and adaptation of the piezoelectric sensoriactuator. Lastly, [/cal H]2 optimal feedback Active Structural Acoustic Control (ASAC) is demonstrated using the adaptive piezoelectric sensoriactuators and the simply- supported plate test bed. A cost function is formulated based upon control effort and predicted radiated acoustic power. Radiation filters are created to predict acoustic power based on the self and mutual radiation efficiencies of the plate modes to be controlled. Both static output feedback and state-feedback compensation as well as dynamic (Linear Quadratic Gaussian) compensation are investigated and compared analytically. The importance of choosing an appropriate spatial aperture for the piezoceramic transducer for static compensation is discussed. Finally, multivariable Active Vibration Control (AVC) and ASAC are implemented experimentally on a simply-supported plate test bed using an array of four Adaptive Piezoelectric Sensoriactuators as the control sensors and actuators. Unfavorable high-frequency response from the given piezoceramic transducers required that dynamic, Linear Quadratic Gaussian (LQG) compensation be used to achieve good control performance.

Passively Shunted Piezoelectric Damping of Centrifugally-Loaded Plates

NASA Technical Reports Server (NTRS)

Duffy, Kirsten P.; Provenza, Andrew J.; Trudell, Jeffrey J.; Min, James B.

2009-01-01

Researchers at NASA Glenn Research Center have been investigating shunted piezoelectric circuits as potential damping treatments for turbomachinery rotor blades. This effort seeks to determine the effects of centrifugal loading on passively-shunted piezoelectric - damped plates. Passive shunt circuit parameters are optimized for the plate's third bending mode. Tests are performed both non-spinning and in the Dynamic Spin Facility to verify the analysis, and to determine the effectiveness of the damping under centrifugal loading. Results show that a resistive shunt circuit will reduce resonant vibration for this configuration. However, a tuned shunt circuit will be required to achieve the desired damping level. The analysis and testing address several issues with passive shunt circuit implementation in a rotating system, including piezoelectric material integrity under centrifugal loading, shunt circuit implementation, and tip mode damping.

Lithium Circuit Test Section Design and Fabrication

NASA Technical Reports Server (NTRS)

Godfroy, Thomas; Garber, Anne

2006-01-01

The Early Flight Fission - Test Facilities (EFF-TF) team has designed and built an actively pumped lithium flow circuit. Modifications were made to a circuit originally designed for NaK to enable the use of lithium that included application specific instrumentation and hardware. Component scale freeze/thaw tests were conducted to both gain experience with handling and behavior of lithium in solid and liquid form and to supply anchor data for a Generalized Fluid System Simulation Program (GFSSP) model that was modified to include the physics for freeze/thaw transitions. Void formation was investigated. The basic circuit components include: reactor segment, lithium to gas heat exchanger, electromagnetic (EM) liquid metal pump, load/drain reservoir, expansion reservoir, instrumentation, and trace heaters. This paper will discuss the overall system design and build and the component testing findings.

Lithium Circuit Test Section Design and Fabrication

NASA Astrophysics Data System (ADS)

Godfroy, Thomas; Garber, Anne; Martin, James

2006-01-01

The Early Flight Fission - Test Facilities (EFF-TF) team has designed and built an actively pumped lithium flow circuit. Modifications were made to a circuit originally designed for NaK to enable the use of lithium that included application specific instrumentation and hardware. Component scale freeze/thaw tests were conducted to both gain experience with handling and behavior of lithium in solid and liquid form and to supply anchor data for a Generalized Fluid System Simulation Program (GFSSP) model that was modified to include the physics for freeze/thaw transitions. Void formation was investigated. The basic circuit components include: reactor segment, lithium to gas heat exchanger, electromagnetic (EM) liquid metal pump, load/drain reservoir, expansion reservoir, instrumentation, and trace heaters. This paper discusses the overall system design and build and the component testing findings.

E-learning platform for automated testing of electronic circuits using signature analysis method

NASA Astrophysics Data System (ADS)

Gherghina, Cǎtǎlina; Bacivarov, Angelica; Bacivarov, Ioan C.; Petricǎ, Gabriel

2016-12-01

Dependability of electronic circuits can be ensured only through testing of circuit modules. This is done by generating test vectors and their application to the circuit. Testability should be viewed as a concerted effort to ensure maximum efficiency throughout the product life cycle, from conception and design stage, through production to repairs during products operating. In this paper, is presented the platform developed by authors for training for testability in electronics, in general and in using signature analysis method, in particular. The platform allows highlighting the two approaches in the field namely analog and digital signature of circuits. As a part of this e-learning platform, it has been developed a database for signatures of different electronic components meant to put into the spotlight different techniques implying fault detection, and from this there were also self-repairing techniques of the systems with this kind of components. An approach for realizing self-testing circuits based on MATLAB environment and using signature analysis method is proposed. This paper analyses the benefits of signature analysis method and simulates signature analyzer performance based on the use of pseudo-random sequences, too.

DISTRIBUTED RC NETWORKS WITH RATIONAL TRANSFER FUNCTIONS,

DTIC Science & Technology

A distributed RC circuit analogous to a continuously tapped transmission line can be made to have a rational short-circuit transfer admittance and...one rational shortcircuit driving-point admittance. A subcircuit of the same structure has a rational open circuit transfer impedance and one rational ...open circuit driving-point impedance. Hence, rational transfer functions may be obtained while considering either generator impedance or load

Radiated Susceptibility Test Procedure and Setup Exploiting Crosstalk

NASA Astrophysics Data System (ADS)

Grassi, F.; Pignari, S. A.; Spadacini, G.; Bisognin, P.; Pelissou, P.; Marra, S.

2016-05-01

In this work, basic principles of an alternative test procedure exploiting crosstalk to reproduce in the terminal loads of a wiring structure the same disturbances that would be induced by traditional radiated susceptibility (RS) tests are presented. Equivalence with radiation is achieved by the use of a generator circuit properly fed with two synchronized RF generators, and holds for whatever loads (even not linear) connected to the terminations of the cable harness. The proposed procedure is here tailored to the specific conditions of incidence foreseen by aerospace Standards on RS. Its effectiveness is validated by measurements carried out in an ad hoc test setup.

Information Flow through a Model of the C. elegans Klinotaxis Circuit.

PubMed

Izquierdo, Eduardo J; Williams, Paul L; Beer, Randall D

2015-01-01

Understanding how information about external stimuli is transformed into behavior is one of the central goals of neuroscience. Here we characterize the information flow through a complete sensorimotor circuit: from stimulus, to sensory neurons, to interneurons, to motor neurons, to muscles, to motion. Specifically, we apply a recently developed framework for quantifying information flow to a previously published ensemble of models of salt klinotaxis in the nematode worm Caenorhabditis elegans. Despite large variations in the neural parameters of individual circuits, we found that the overall information flow architecture circuit is remarkably consistent across the ensemble. This suggests structural connectivity is not necessarily predictive of effective connectivity. It also suggests information flow analysis captures general principles of operation for the klinotaxis circuit. In addition, information flow analysis reveals several key principles underlying how the models operate: (1) Interneuron class AIY is responsible for integrating information about positive and negative changes in concentration, and exhibits a strong left/right information asymmetry. (2) Gap junctions play a crucial role in the transfer of information responsible for the information symmetry observed in interneuron class AIZ. (3) Neck motor neuron class SMB implements an information gating mechanism that underlies the circuit's state-dependent response. (4) The neck carries more information about small changes in concentration than about large ones, and more information about positive changes in concentration than about negative ones. Thus, not all directions of movement are equally informative for the worm. Each of these findings corresponds to hypotheses that could potentially be tested in the worm. Knowing the results of these experiments would greatly refine our understanding of the neural circuit underlying klinotaxis.

Electromagnetic Compatibility in the Defense Systems of Future Years

DTIC Science & Technology

2002-06-01

Technology activities. Its mission is to conduct and promote cooperative research and information exchange . The objective is to support the development...testing CLEARANCE PRODUCTION AND IN-SERVICE SUPPORT Modelling in support of conceptual design (structure & installation design) EMH Design guides for the... marketed by Advanced Electromagnetics [6-1]. Transmission Line Matrix Method The link between field theory and circuit theory, the major theories on

30 CFR 57.6402 - Deenergized circuits near detonators.

Code of Federal Regulations, 2010 CFR

2010-07-01

... Electric Blasting-Surface and Underground § 57.6402 Deenergized circuits near detonators. Electrical distribution circuits within 50 feet of electric detonators at the blast site shall be deenergized. Such circuits need not be deenergized between 25 to 50 feet of the electric detonators if stray current tests...

The Cerebellum and Neurodevelopmental Disorders.

PubMed

Stoodley, Catherine J

2016-02-01

Cerebellar dysfunction is evident in several developmental disorders, including autism, attention deficit-hyperactivity disorder (ADHD), and developmental dyslexia, and damage to the cerebellum early in development can have long-term effects on movement, cognition, and affective regulation. Early cerebellar damage is often associated with poorer outcomes than cerebellar damage in adulthood, suggesting that the cerebellum is particularly important during development. Differences in cerebellar development and/or early cerebellar damage could impact a wide range of behaviors via the closed-loop circuits connecting the cerebellum with multiple cerebral cortical regions. Based on these anatomical circuits, behavioral outcomes should depend on which cerebro-cerebellar circuits are affected. Here, we briefly review cerebellar structural and functional differences in autism, ADHD, and developmental dyslexia, and discuss clinical outcomes following pediatric cerebellar damage. These data confirm the prediction that abnormalities in different cerebellar subregions produce behavioral symptoms related to the functional disruption of specific cerebro-cerebellar circuits. These circuits might also be crucial to structural brain development, as peri-natal cerebellar lesions have been associated with impaired growth of the contralateral cerebral cortex. The specific contribution of the cerebellum to typical development may therefore involve the optimization of both the structure and function of cerebro-cerebellar circuits underlying skill acquisition in multiple domains; when this process is disrupted, particularly in early development, there could be long-term alterations of these neural circuits, with significant impacts on behavior.

The cerebellum and neurodevelopmental disorders

PubMed Central

Stoodley, Catherine J.

2015-01-01

Cerebellar dysfunction is evident in several developmental disorders, including autism, attention deficit hyperactivity disorder (ADHD), and developmental dyslexia, and damage to the cerebellum early in development can have long-term effects on movement, cognition, and affective regulation. Early cerebellar damage is often associated with poorer outcomes than cerebellar damage in adulthood, suggesting that the cerebellum is particularly important during development. Differences in cerebellar development and/or early cerebellar damage could impact a wide range of behaviors via the closed-loop circuits connecting the cerebellum with multiple cerebral cortical regions. Based on these anatomical circuits, behavioral outcomes should depend on which cerebro-cerebellar circuits are affected. Here, we briefly review cerebellar structural and functional differences in autism, ADHD, and developmental dyslexia, and discuss clinical outcomes following pediatric cerebellar damage. These data confirm the prediction that abnormalities in different cerebellar subregions produce behavioral symptoms related to the functional disruption of specific cerebro-cerebellar circuits. These circuits might also be crucial to structural brain development, as peri-natal cerebellar lesions have been associated with impaired growth of the contralateral cerebral cortex. The specific contribution of the cerebellum to typical development may therefore involve the optimization of both the structure and function of cerebro-cerebellar circuits underlying skill acquisition in multiple domains; when this process is disrupted, particularly in early development, there could be long-term alterations of these neural circuits, with significant impacts on behavior. PMID:26298473

A search for optimal parameters of resonance circuits ensuring damping of electroelastic structure vibrations based on the solution of natural vibration problem

NASA Astrophysics Data System (ADS)

Oshmarin, D.; Sevodina, N.; Iurlov, M.; Iurlova, N.

2017-06-01

In this paper, with the aim of providing passive control of structure vibrations a new approach has been proposed for selecting optimal parameters of external electric shunt circuits connected to piezoelectric elements located on the surface of the structure. The approach is based on the mathematical formulation of the natural vibration problem. The results of solution of this problem are the complex eigenfrequencies, the real part of which represents the vibration frequency and the imaginary part corresponds to the damping ratio, characterizing the rate of damping. A criterion of search for optimal parameters of the external passive shunt circuits, which can provide the system with desired dissipative properties, has been derived based on the analysis of responses of the real and imaginary parts of different complex eigenfrequencies to changes in the values of the parameters of the electric circuit. The efficiency of this approach has been verified in the context of natural vibration problem of rigidly clamped plate and semi-cylindrical shell, which is solved for series-connected and parallel -connected external resonance (consisting of resistive and inductive elements) R-L circuits. It has been shown that at lower (more energy-intensive) frequencies, a series-connected external circuit has the advantage of providing lower values of the circuit parameters, which renders it more attractive in terms of practical applications.

Three-dimensionally deformable, highly stretchable, permeable, durable and washable fabric circuit boards.

PubMed

Li, Qiao; Tao, Xiao Ming

2014-11-08

This paper reports fabric circuit boards (FCBs), a new type of circuit boards, that are three-dimensionally deformable, highly stretchable, durable and washable ideally for wearable electronic applications. Fabricated by using computerized knitting technologies at ambient dry conditions, the resultant knitted FCBs exhibit outstanding electrical stability with less than 1% relative resistance change up to 300% strain in unidirectional tensile test or 150% membrane strain in three-dimensional ball punch test, extraordinary fatigue life of more than 1 000 000 loading cycles at 20% maximum strain, and satisfactory washing capability up to 30 times. To the best of our knowledge, the performance of new FCBs has far exceeded those of previously reported metal-coated elastomeric films or other organic materials in terms of changes in electrical resistance, stretchability, fatigue life and washing capability as well as permeability. Theoretical analysis and numerical simulation illustrate that the structural conversion of knitted fabrics is attributed to the effective mitigation of strain in the conductive metal fibres, hence the outstanding mechanical and electrical properties. Those distinctive features make the FCBs particularly suitable for next-to-skin electronic devices. This paper has further demonstrated the application potential of the knitted FCBs in smart protective apparel for in situ measurement during ballistic impact.

Design, Experiments and Simulation of Voltage Transformers on the Basis of a Differential Input D-dot Sensor

PubMed Central

Wang, Jingang; Gao, Can; Yang, Jie

2014-01-01

Currently available traditional electromagnetic voltage sensors fail to meet the measurement requirements of the smart grid, because of low accuracy in the static and dynamic ranges and the occurrence of ferromagnetic resonance attributed to overvoltage and output short circuit. This work develops a new non-contact high-bandwidth voltage measurement system for power equipment. This system aims at the miniaturization and non-contact measurement of the smart grid. After traditional D-dot voltage probe analysis, an improved method is proposed. For the sensor to work in a self-integrating pattern, the differential input pattern is adopted for circuit design, and grounding is removed. To prove the structure design, circuit component parameters, and insulation characteristics, Ansoft Maxwell software is used for the simulation. Moreover, the new probe was tested on a 10 kV high-voltage test platform for steady-state error and transient behavior. Experimental results ascertain that the root mean square values of measured voltage are precise and that the phase error is small. The D-dot voltage sensor not only meets the requirement of high accuracy but also exhibits satisfactory transient response. This sensor can meet the intelligence, miniaturization, and convenience requirements of the smart grid. PMID:25036333

Three-dimensionally deformable, highly stretchable, permeable, durable and washable fabric circuit boards

PubMed Central

Li, Qiao; Tao, Xiao Ming

2014-01-01

This paper reports fabric circuit boards (FCBs), a new type of circuit boards, that are three-dimensionally deformable, highly stretchable, durable and washable ideally for wearable electronic applications. Fabricated by using computerized knitting technologies at ambient dry conditions, the resultant knitted FCBs exhibit outstanding electrical stability with less than 1% relative resistance change up to 300% strain in unidirectional tensile test or 150% membrane strain in three-dimensional ball punch test, extraordinary fatigue life of more than 1 000 000 loading cycles at 20% maximum strain, and satisfactory washing capability up to 30 times. To the best of our knowledge, the performance of new FCBs has far exceeded those of previously reported metal-coated elastomeric films or other organic materials in terms of changes in electrical resistance, stretchability, fatigue life and washing capability as well as permeability. Theoretical analysis and numerical simulation illustrate that the structural conversion of knitted fabrics is attributed to the effective mitigation of strain in the conductive metal fibres, hence the outstanding mechanical and electrical properties. Those distinctive features make the FCBs particularly suitable for next-to-skin electronic devices. This paper has further demonstrated the application potential of the knitted FCBs in smart protective apparel for in situ measurement during ballistic impact. PMID:25383032

Electrical Circuit Tester

DOEpatents

Love, Frank

2006-04-18

An electrical circuit testing device is provided, comprising a case, a digital voltage level testing circuit with a display means, a switch to initiate measurement using the device, a non-shorting switching means for selecting pre-determined electrical wiring configurations to be tested in an outlet, a terminal block, a five-pole electrical plug mounted on the case surface and a set of adapters that can be used for various multiple-pronged electrical outlet configurations for voltages from 100 600 VAC from 50 100 Hz.

Reconstructions of parameters of radiophysical chaotic generator with delayed feedback from short time series

NASA Astrophysics Data System (ADS)

Ishbulatov, Yu. M.; Karavaev, A. S.; Kiselev, A. R.; Semyachkina-Glushkovskaya, O. V.; Postnov, D. E.; Bezruchko, B. P.

2018-04-01

A method for the reconstruction of time-delayed feedback system is investigated, which is based on the detection of synchronous response of a slave time-delay system with respect to the driving from the master system under study. The structure of the driven system is similar to the structure of the studied time-delay system, but the feedback circuit is broken in the driven system. The method efficiency is tested using short and noisy data gained from an electronic chaotic oscillator with time-delayed feedback.

49 CFR 236.342 - Switch circuit controller.

Code of Federal Regulations, 2012 CFR

2012-10-01

... 49 Transportation 4 2012-10-01 2012-10-01 false Switch circuit controller. 236.342 Section 236.342... Instructions § 236.342 Switch circuit controller. Switch circuit controller connected at the point to switch... corresponding to switch point closure when switch point is open one-fourth inch or more. Inspection and Tests ...

49 CFR 236.342 - Switch circuit controller.

Code of Federal Regulations, 2011 CFR

2011-10-01

... 49 Transportation 4 2011-10-01 2011-10-01 false Switch circuit controller. 236.342 Section 236.342... Instructions § 236.342 Switch circuit controller. Switch circuit controller connected at the point to switch... corresponding to switch point closure when switch point is open one-fourth inch or more. Inspection and Tests ...

49 CFR 236.342 - Switch circuit controller.

Code of Federal Regulations, 2010 CFR

2010-10-01

... 49 Transportation 4 2010-10-01 2010-10-01 false Switch circuit controller. 236.342 Section 236.342... Instructions § 236.342 Switch circuit controller. Switch circuit controller connected at the point to switch... corresponding to switch point closure when switch point is open one-fourth inch or more. Inspection and Tests ...

49 CFR 236.342 - Switch circuit controller.

Code of Federal Regulations, 2013 CFR

2013-10-01

... 49 Transportation 4 2013-10-01 2013-10-01 false Switch circuit controller. 236.342 Section 236.342... Instructions § 236.342 Switch circuit controller. Switch circuit controller connected at the point to switch... corresponding to switch point closure when switch point is open one-fourth inch or more. Inspection and Tests ...

49 CFR 236.342 - Switch circuit controller.

Code of Federal Regulations, 2014 CFR

2014-10-01

... 49 Transportation 4 2014-10-01 2014-10-01 false Switch circuit controller. 236.342 Section 236.342... Instructions § 236.342 Switch circuit controller. Switch circuit controller connected at the point to switch... corresponding to switch point closure when switch point is open one-fourth inch or more. Inspection and Tests ...

Conductive surge testing of circuits and systems

NASA Technical Reports Server (NTRS)

Richman, P.

1980-01-01

Techniques are given for conductive surge testing of powered electronic equipment. The correct definitions of common and normal mode are presented. Testing requires not only spike-surge generators with a suitable range of open-circuit voltage and short-circuit current waveshapes, but also appropriate means, termed couplers, for connecting test surges to the equipment under test. Key among coupler design considerations is minimization of fail positives resulting from reduction in delivered surge energy due to the coupler. Back-filters and the lines on which they are necessary, are considered as well as ground-fault and ground potential rise. A method for monitoring delivered and resulting surge waves is mentioned.

Evaluation of test equipment for the detection of contamination on electronic circuits

NASA Astrophysics Data System (ADS)

Bergendahl, C. G.; Dunn, B. D.

1984-08-01

The reproducibility, sensitivity and ease of operation of test equipment for the detection of ionizable contaminants on the surface of printed circuit assemblies were assessed. The characteristics of the test equipment are described. Soldering fluxes were chosen as contaminants and were applied in controlled amounts to printed-circuit board assemblies possessing two different component populations. Results show that the relationship between equipment readings varies with flux type. Each kind of test equipment gives a good measure of board cleanliness, although reservations exist concerning the interpretation of such results. A test method for the analysis of total (organic and inorganic) halides in solder fluxes is presented.

Evaluation of an enhanced gravity-based fine-coal circuit for high-sulfur coal

DOE Office of Scientific and Technical Information (OSTI.GOV)

Mohanty, M.K.; Samal, A.R.; Palit, A.

One of the main objectives of this study was to evaluate a fine-coal cleaning circuit using an enhanced gravity separator specifically for a high sulfur coal application. The evaluation not only included testing of individual unit operations used for fine-coal classification, cleaning and dewatering, but also included testing of the complete circuit simultaneously. At a scale of nearly 2 t/h, two alternative circuits were evaluated to clean a minus 0.6-mm coal stream utilizing a 150-mm-diameter classifying cyclone, a linear screen having a projected surface area of 0.5 m{sup 2}, an enhanced gravity separator having a bowl diameter of 250 mmmore » and a screen-bowl centrifuge having a bowl diameter of 500 mm. The cleaning and dewatering components of both circuits were the same; however, one circuit used a classifying cyclone whereas the other used a linear screen as the classification device. An industrial size coal spiral was used to clean the 2- x 0.6-mm coal size fraction for each circuit to estimate the performance of a complete fine-coal circuit cleaning a minus 2-mm particle size coal stream. The 'linear screen + enhanced gravity separator + screen-bowl circuit' provided superior sulfur and ash-cleaning performance to the alternative circuit that used a classifying cyclone in place of the linear screen. Based on these test data, it was estimated that the use of the recommended circuit to treat 50 t/h of minus 2-mm size coal having feed ash and sulfur contents of 33.9% and 3.28%, respectively, may produce nearly 28.3 t/h of clean coal with product ash and sulfur contents of 9.15% and 1.61 %, respectively.« less

Method of boundary testing of the electric circuits and its application for calculating electric tolerances. [electric equipment tests

NASA Technical Reports Server (NTRS)

Redkina, N. P.

1974-01-01

Boundary testing of electric circuits includes preliminary and limiting tests. Preliminary tests permit determination of the critical parameters causing the greatest deviation of the output parameter of the system. The boundary tests offer the possibility of determining the limits of the fitness of the system with simultaneous variation of its critical parameters.

Power converter having improved EMI shielding

DOEpatents

Beihoff, Bruce C.; Kehl, Dennis L.; Gettelfinger, Lee A.; Kaishian, Steven C.; Phillips, Mark G.; Radosevich, Lawrence D.

2006-06-13

EMI shielding is provided for power electronics circuits and the like via a direct-mount reference plane support and shielding structure. The thermal support may receive one or more power electronic circuits. The support may aid in removing heat from the circuits through fluid circulating through the support. The support forms a shield from both external EMI/RFI and from interference generated by operation of the power electronic circuits. Features may be provided to permit and enhance connection of the circuitry to external circuitry, such as improved terminal configurations. Modular units may be assembled that may be coupled to electronic circuitry via plug-in arrangements or through interface with a backplane or similar mounting and interconnecting structures.

Power converter connection configuration

DOEpatents

Beihoff, Bruce C.; Kehl, Dennis L.; Gettelfinger, Lee A.; Kaishian, Steven C.; Phillips, Mark G.; Radosevich, Lawrence D.

2008-11-11

EMI shielding is provided for power electronics circuits and the like via a direct-mount reference plane support and shielding structure. The thermal support may receive one or more power electronic circuits. The support may aid in removing heat from the circuits through fluid circulating through the support. The support forms a shield from both external EMI/RFI and from interference generated by operation of the power electronic circuits. Features may be provided to permit and enhance connection of the circuitry to external circuitry, such as improved terminal configurations. Modular units may be assembled that may be coupled to electronic circuitry via plug-in arrangements or through interface with a backplane or similar mounting and interconnecting structures.

Comparing the Robustness of High-Frequency Traveling-Wave Tube Slow-Wave Circuits

NASA Technical Reports Server (NTRS)

Chevalier, Christine T.; Wilson, Jeffrey D.; Kory, Carol L.

2007-01-01

A three-dimensional electromagnetic field simulation software package was used to compute the cold-test parameters, phase velocity, on-axis interaction impedance, and attenuation, for several high-frequency traveling-wave tube slow-wave circuit geometries. This research effort determined the effects of variations in circuit dimensions on cold-test performance. The parameter variations were based on the tolerances of conventional micromachining techniques.

Use of vacuum tubes in test instrumentation for measuring characteristics of fast high-voltage semiconductor devices

NASA Technical Reports Server (NTRS)

Berning, D.

1981-01-01

Circuits are described that permit measurement of fast events occurring in power semiconductors. These circuits were developed for the dynamic characterization of transistors used in inductive-load switching applications. Fast voltage clamping using vacuum diodes is discussed, and reference is made to a unique circuit that was built for performing nondestructive, reverse-bias, second-breakdown tests on transistors.

Experimental investigation of internal short circuits in lithium-ion batteries

NASA Astrophysics Data System (ADS)

Poramapojana, Poowanart

With outstanding performance of Lithium-ion batteries, they have been widely used in many applications. For hybrid electric vehicles and electric vehicles, customer concerns of battery safety have been raised as a number of car accidents were reported. To evaluate safety performance of these batteries, a nail penetration test is used to simulate and induce internal short circuits instantaneously. Efforts to explain failure mechanisms of the penetration using electrochemical-thermal coupled models have been proposed. However, there is no experimental validation because researchers lack of a diagnostic tool to acquire important cell characteristics at a shorting location, such as shorting current and temperature. In this present work, diagnostic nails have been developed to acquire nail center temperatures and shorting current flow through the nails during nail penetration tests. Two types of cylindrical wall structures are used to construct the nails: a double-layered stainless steel wall and a composite cylindrical wall. An inner hollow cylinder functions as a sensor holder where two wires and one thermocouple are installed. To study experimental reproducibility and repeatability of experimental results, two nail penetration tests are conducted using two diagnostic nails with the double-layered wall. Experimental data shows that the shorting resistance at the initial stage is a critical parameter to obtain repeatable results. The average shorting current for both tests is approximately 40 C-rate. The fluctuation of the shorting current is due to random sparks and fire caused loose contacts between the nail and the cell components. Moreover, comparative experimental results between the two wall structures reveal that the wall structure does not affect the cell characteristics and Ohmic heat generation of the nail. The wall structure effects to current measurements inside the nail. With the composite wall, the actual current redistribution into the inner wall is found to be a sinusoidal waveform.

Algebraic method for parameter identification of circuit models for batteries under non-zero initial condition

NASA Astrophysics Data System (ADS)

Devarakonda, Lalitha; Hu, Tingshu

2014-12-01

This paper presents an algebraic method for parameter identification of Thevenin's equivalent circuit models for batteries under non-zero initial condition. In traditional methods, it was assumed that all capacitor voltages have zero initial conditions at the beginning of each charging/discharging test. This would require a long rest time between two tests, leading to very lengthy tests for a charging/discharging cycle. In this paper, we propose an algebraic method which can extract the circuit parameters together with initial conditions. This would theoretically reduce the rest time to 0 and substantially accelerate the testing cycles.

Energy-efficient neuron, synapse and STDP integrated circuits.

PubMed

Cruz-Albrecht, Jose M; Yung, Michael W; Srinivasa, Narayan

2012-06-01

Ultra-low energy biologically-inspired neuron and synapse integrated circuits are presented. The synapse includes a spike timing dependent plasticity (STDP) learning rule circuit. These circuits have been designed, fabricated and tested using a 90 nm CMOS process. Experimental measurements demonstrate proper operation. The neuron and the synapse with STDP circuits have an energy consumption of around 0.4 pJ per spike and synaptic operation respectively.

49 CFR 236.107 - Ground tests.

Code of Federal Regulations, 2012 CFR

2012-10-01

... alternating current power distribution circuits grounded in the interest of safety. [49 FR 3384, Jan. 26, 1984] ... paragraph (b) of this section, a test for grounds on each energy bus furnishing power to circuits, the...

49 CFR 236.107 - Ground tests.

Code of Federal Regulations, 2013 CFR

2013-10-01

... alternating current power distribution circuits grounded in the interest of safety. [49 FR 3384, Jan. 26, 1984] ... paragraph (b) of this section, a test for grounds on each energy bus furnishing power to circuits, the...

Thermal research of infrared sight thermoelectric cooler control circuit under temperature environment

NASA Astrophysics Data System (ADS)

Gao, Youtang; Ding, Huan; Xue, Xiao; Xu, Yuan; Chang, Benkang

2010-10-01

Testing device TST-05B, which is suitable for adaptability test of semiconductor devices, electronic products and other military equipment under the condition of the surrounding air temperature rapidly changing, is used here for temperature shock test.Thermal stability technology of thermoelectric cooler control circuit infrared sight under temperature shock is studied in this paper. Model parameters and geometry is configured for ADI devices (ADN8830), welding material and PCB which are used in system. Thermoelectric cooler control circuit packaged by CSP32 distribution are simulated and analyzed by thermal shock and waveform through engineering finite element analysis software ANSYYS. Because solders of the whole model have much stronger stress along X direction than that of other directions, initial stress constraints along X direction are primarily considered when the partial model of single solder is imposed by thermal load. When absolute thermal loads stresses of diagonal nodes with maximum strains are separated from the whole model, interpolation is processed according to thermal loads circulation. Plastic strains and thermal stresses of nodes in both sides of partial model are obtained. The analysis results indicates that with thermal load circulation, maximum forces of each circulation along X direction are increasingly enlarged and with the accumulation of plastic strains of danger point, at the same time structural deformation and the location of maximum equivalent plastic strain in the solder joints at the first and eighth, the composition will become invalid in the end.

Conserved neural circuit structure across Drosophila larval development revealed by comparative connectomics.

PubMed

Gerhard, Stephan; Andrade, Ingrid; Fetter, Richard D; Cardona, Albert; Schneider-Mizell, Casey M

2017-10-23

During postembryonic development, the nervous system must adapt to a growing body. How changes in neuronal structure and connectivity contribute to the maintenance of appropriate circuit function remains unclear. Previously , we measured the cellular neuroanatomy underlying synaptic connectivity in Drosophila (Schneider-Mizell et al., 2016). Here, we examined how neuronal morphology and connectivity change between first instar and third instar larval stages using serial section electron microscopy. We reconstructed nociceptive circuits in a larva of each stage and found consistent topographically arranged connectivity between identified neurons. Five-fold increases in each size, number of terminal dendritic branches, and total number of synaptic inputs were accompanied by cell type-specific connectivity changes that preserved the fraction of total synaptic input associated with each pre-synaptic partner. We propose that precise patterns of structural growth act to conserve the computational function of a circuit, for example determining the location of a dangerous stimulus.

Waveguide metatronics: Lumped circuitry based on structural dispersion.

PubMed

Li, Yue; Liberal, Iñigo; Della Giovampaola, Cristian; Engheta, Nader

2016-06-01

Engineering optical nanocircuits by exploiting modularization concepts and methods inherited from electronics may lead to multiple innovations in optical information processing at the nanoscale. We introduce the concept of "waveguide metatronics," an advanced form of optical metatronics that uses structural dispersion in waveguides to obtain the materials and structures required to construct this class of circuitry. Using numerical simulations, we demonstrate that the design of a metatronic circuit can be carried out by using a waveguide filled with materials with positive permittivity. This includes the implementation of all "lumped" circuit elements and their assembly in a single circuit board. In doing so, we extend the concepts of optical metatronics to frequency ranges where there are no natural plasmonic materials available. The proposed methodology could be exploited as a platform to experimentally validate optical metatronic circuits in other frequency regimes, such as microwave frequency setups, and/or to provide a new route to design optical nanocircuitry.

NASA wiring for space applications program test results

NASA Astrophysics Data System (ADS)

Stavnes, Mark; Hammoud, Ahmad

1995-11-01

The electrical power wiring tests results from the NASA Wiring for Space Applications program are presented. The goal of the program was to develop a base for the building of a lightweight, arc track-resistant electrical wiring system for aerospace applications. This new wiring system would be applied to such structures as pressurized modules, trans-atmospheric vehicles, LEO/GEO environments, and lunar and Martian environments. Technological developments from this program include the fabrication of new insulating materials, the production of new wiring constructions, an improved system design, and an advanced circuit protection design.

Effect of Helical Slow-Wave Circuit Variations on TWT Cold-Test Characteristics

NASA Technical Reports Server (NTRS)

Kory, Carol L.; Dayton, J. A., Jr.

1998-01-01

Recent advances in the state of the art of computer modeling offer the possibility for the first time to evaluate the effect that slow-wave structure parameter variations, such as manufacturing tolerances, have on the cold-test characteristics of helical traveling-wave tubes (TWT's). This will enable manufacturers to determine the cost effectiveness of controlling the dimensions of the component parts of the TWT, which is almost impossible to do experimentally without building a large number of tubes and controlling several parameters simultaneously. The computer code MAFIA is used in this analysis to determine the effect on dispersion and on-axis interaction impedance of several helical slow-wave circuit parameter variations, including thickness and relative dielectric constant of the support rods, tape width, and height of the metallized films deposited on the dielectric rods. Previous computer analyzes required so many approximations that accurate determinations of the effect of many relevant dimensions on tube performance were practically impossible.

Effect of Helical Slow-Wave Circuit Variations on TWT Cold-Test Characteristics

NASA Technical Reports Server (NTRS)

Kory, Carol L.; Dayton, James A., Jr.

1997-01-01

Recent advances in the state of the art of computer modeling offer the possibility for the first time to evaluate the effect that slow-wave structure parameter variations, such as manufacturing tolerances, have on the cold-test characteristics of helical traveling-wave tubes (TWT's). This will enable manufacturers to determine the cost effectiveness of controlling the dimensions of the component parts of the TWT, which is almost impossible to do experimentally without building a large number of tubes and controlling several parameters simultaneously. The computer code MAFIA is used in this analysis to determine the effect on dispersion and on-axis interaction impedance of several helical slow-wave circuit parameter variations, including thickness and relative dielectric constant of the support rods, tape width, and height of the metallized films deposited on the dielectric rods. Previous computer analyses required so many approximations that accurate determinations of the effect of many relevant dimensions on tube performance were practically impossible.

Effect of Helical Slow-Wave Circuit Variations on TWT Cold-Test Characteristics

NASA Technical Reports Server (NTRS)

Kory, Carol L.; Dayton, James A., Jr.

1998-01-01

Recent advances in the state of the art of computer modeling offer the possibility for the first time to evaluate the effect that slow-wave structure parameter variations, such'as manufacturing tolerances, have on the cold-test characteristics of helical traveling-wave tubes (TWT's). This will enable manufacturers to determine the cost effectiveness of controlling the dimensions of the component parts of the TWT, which is almost impossible to do experimentally without building a large number of tubes and controlling several parameters simultaneously. The computer code MAxwell's equations by the Finite Integration Algorithm (MAFIA) is used in this analysis to determine the effect on dispersion and on-axis interaction impedance of several helical slow-wave circuit parameter variations, including thickness and relative dielectric constant of the support rods, tape width, and height of the metallized films deposited on the dielectric rods. Previous computer analyzes required so many approximations that accurate determinations of the effect of many relevant dimensions on tube performance were practically impossible.

Three-Dimensional Simulation of Traveling-Wave Tube Cold-Test Characteristics Using MAFIA

NASA Technical Reports Server (NTRS)

Kory, Carol L.; Wilson, Jeffrey D.

1995-01-01

The three-dimensional simulation code MAFIA was used to compute the cold-test parameters - frequency-phase dispersion, beam on-axis interaction impedance, and attenuation - for two types of traveling-wave tube (TWT) slow-wave circuits. The potential for this electromagnetic computer modeling code to reduce the time and cost of TWT development is demonstrated by the high degree of accuracy achieved in calculating these parameters. Generalized input files were developed for ferruled coupled-cavity and TunneLadder slow-wave circuits. These files make it easy to model circuits of arbitrary dimensions. The utility of these files was tested by applying each to a specific TWT slow-wave circuit and comparing the results with experimental data. Excellent agreement was obtained.

Prolonged 500 C Operation of 100+ Transistor Silicon Carbide Integrated Circuits

NASA Technical Reports Server (NTRS)

Spry, David J.; Neudeck, Philip G.; Lukco, Dorothy; Chen, Liangyu; Krasowski, Michael J.; Prokop, Norman F.; Chang, Carl W.; Beheim, Glenn M.

2017-01-01

This report describes more than 5000 hours of successful 500 C operation of semiconductor integrated circuits (ICs) with more than 100 transistors. Multiple packaged chips with two different 4H-SiC junction field effect transistor (JFET) technology demonstrator circuits have surpassed thousands of hours of oven-testing at 500 C. After 100 hours of 500 C burn-in, the circuits (except for 2 failures) exhibit less than 10% change in output characteristics for the remainder of 500 C testing. We also describe the observation of important differences in IC materials durability when subjected to the first nine constituents of Venus-surface atmosphere at 9.4 MPa and 460 C in comparison to what is observed for Earth-atmosphere oven testing at 500 C.

Prolonged 500 C Operation of 100+ Transistor Silicon Carbide Integrated Circuits

NASA Technical Reports Server (NTRS)

Spry, David J.; Neudeck, Philip G.; Lukco, Dorothy; Chen, Liangyu; Krasowski, Michael J.; Prokop, Norman F.; Chang, Carl W.; Beheim, Glenn M.

2017-01-01

This report describes more than 5000 hours of successful 500 C operation of semiconductor integrated circuits (ICs) with more than 100 transistors. Multiple packaged chips with two different 4H-SiC junction field effect transistor (JFET) technology demonstrator circuits have surpassed thousands of hours of oven-testing at 500 C. After 100 hours of 500 C burn-in, the circuits (except for 2 failures) exhibit less than 10 change in output characteristics for the remainder of 500C testing. We also describe the observation of important differences in IC materials durability when subjected to the first nine constituents of Venus-surface atmosphere at 9.4 MPa and 460C in comparison to what is observed for Earth-atmosphere oven testing at 500 C.

Molecular Signaling Network Motifs Provide a Mechanistic Basis for Cellular Threshold Responses

PubMed Central

Bhattacharya, Sudin; Conolly, Rory B.; Clewell, Harvey J.; Kaminski, Norbert E.; Andersen, Melvin E.

2014-01-01

Background: Increasingly, there is a move toward using in vitro toxicity testing to assess human health risk due to chemical exposure. As with in vivo toxicity testing, an important question for in vitro results is whether there are thresholds for adverse cellular responses. Empirical evaluations may show consistency with thresholds, but the main evidence has to come from mechanistic considerations. Objectives: Cellular response behaviors depend on the molecular pathway and circuitry in the cell and the manner in which chemicals perturb these circuits. Understanding circuit structures that are inherently capable of resisting small perturbations and producing threshold responses is an important step towards mechanistically interpreting in vitro testing data. Methods: Here we have examined dose–response characteristics for several biochemical network motifs. These network motifs are basic building blocks of molecular circuits underpinning a variety of cellular functions, including adaptation, homeostasis, proliferation, differentiation, and apoptosis. For each motif, we present biological examples and models to illustrate how thresholds arise from specific network structures. Discussion and Conclusion: Integral feedback, feedforward, and transcritical bifurcation motifs can generate thresholds. Other motifs (e.g., proportional feedback and ultrasensitivity)produce responses where the slope in the low-dose region is small and stays close to the baseline. Feedforward control may lead to nonmonotonic or hormetic responses. We conclude that network motifs provide a basis for understanding thresholds for cellular responses. Computational pathway modeling of these motifs and their combinations occurring in molecular signaling networks will be a key element in new risk assessment approaches based on in vitro cellular assays. Citation: Zhang Q, Bhattacharya S, Conolly RB, Clewell HJ III, Kaminski NE, Andersen ME. 2014. Molecular signaling network motifs provide a mechanistic basis for cellular threshold responses. Environ Health Perspect 122:1261–1270; http://dx.doi.org/10.1289/ehp.1408244 PMID:25117432

LC Circuits for Diagnosing Embedded Piezoelectric Devices

NASA Technical Reports Server (NTRS)

Chattin, Richard L.; Fox, Robert Lee; Moses, Robert W.; Shams, Qamar A.

2005-01-01

A recently invented method of nonintrusively detecting faults in piezoelectric devices involves measurement of the resonance frequencies of inductor capacitor (LC) resonant circuits. The method is intended especially to enable diagnosis of piezoelectric sensors, actuators, and sensor/actuators that are embedded in structures and/or are components of multilayer composite material structures.

47 CFR 80.867 - Ship station tools, instruction books, circuit diagrams and testing equipment.

Code of Federal Regulations, 2013 CFR

2013-10-01

... 47 Telecommunication 5 2013-10-01 2013-10-01 false Ship station tools, instruction books, circuit... Requirements for Cargo Vessels Not Subject to Subpart W § 80.867 Ship station tools, instruction books, circuit..., instruction books and circuit diagrams to enable the radiotelephone installation to be maintained in efficient...

47 CFR 80.867 - Ship station tools, instruction books, circuit diagrams and testing equipment.

Code of Federal Regulations, 2012 CFR

2012-10-01

... 47 Telecommunication 5 2012-10-01 2012-10-01 false Ship station tools, instruction books, circuit... Requirements for Cargo Vessels Not Subject to Subpart W § 80.867 Ship station tools, instruction books, circuit..., instruction books and circuit diagrams to enable the radiotelephone installation to be maintained in efficient...

47 CFR 80.867 - Ship station tools, instruction books, circuit diagrams and testing equipment.

Code of Federal Regulations, 2014 CFR

2014-10-01

... 47 Telecommunication 5 2014-10-01 2014-10-01 false Ship station tools, instruction books, circuit... Requirements for Cargo Vessels Not Subject to Subpart W § 80.867 Ship station tools, instruction books, circuit..., instruction books and circuit diagrams to enable the radiotelephone installation to be maintained in efficient...

47 CFR 80.867 - Ship station tools, instruction books, circuit diagrams and testing equipment.

Code of Federal Regulations, 2010 CFR

2010-10-01

... 47 Telecommunication 5 2010-10-01 2010-10-01 false Ship station tools, instruction books, circuit... Requirements for Cargo Vessels Not Subject to Subpart W § 80.867 Ship station tools, instruction books, circuit..., instruction books and circuit diagrams to enable the radiotelephone installation to be maintained in efficient...

In Vitro Simulation and Validation of the Circulation with Congenital Heart Defects

PubMed Central

Figliola, Richard S.; Giardini, Alessandro; Conover, Tim; Camp, Tiffany A.; Biglino, Giovanni; Chiulli, John; Hsia, Tain-Yen

2010-01-01

Despite the recent advances in computational modeling, experimental simulation of the circulation with congenital heart defect using mock flow circuits remains an important tool for device testing, and for detailing the probable flow consequences resulting from surgical and interventional corrections. Validated mock circuits can be applied to qualify the results from novel computational models. New mathematical tools, coupled with advanced clinical imaging methods, allow for improved assessment of experimental circuit performance relative to human function, as well as the potential for patient-specific adaptation. In this review, we address the development of three in vitro mock circuits specific for studies of congenital heart defects. Performance of an in vitro right heart circulation circuit through a series of verification and validation exercises is described, including correlations with animal studies, and quantifying the effects of circuit inertiance on test results. We present our experience in the design of mock circuits suitable for investigations of the characteristics of the Fontan circulation. We use one such mock circuit to evaluate the accuracy of Doppler predictions in the presence of aortic coarctation. PMID:21218147

Cable Crosstalk Suppression with Two-Wire Voltage Feedback Method for Resistive Sensor Array

PubMed Central

Wu, Jianfeng; He, Shangshang; Li, Jianqing; Song, Aiguo

2016-01-01

Using a long, flexible test cable connected with a one-wire voltage feedback circuit, a resistive tactile sensor in a shared row-column fashion exhibited flexibility in robotic operations but suffered from crosstalk caused by the connected cable due to its wire resistances and its contacted resistances. Firstly, we designed a new non-scanned driving-electrode (VF-NSDE) circuit using two wires for every row line and every column line to reduce the crosstalk caused by the connected cables in the circuit. Then, an equivalent resistance expression of the element being tested (EBT) for the two-wire VF-NSDE circuit was analytically derived. Following this, the one-wire VF-NSDE circuit and the two-wire VF-NSDE circuit were evaluated by simulation experiments. Finally, positive features of the proposed method were verified with the experiments of a two-wire VF-NSDE prototype circuit. The experiment results show that the two-wire VF-NSDE circuit can greatly reduce the crosstalk error caused by the cables in the 2-D networked resistive sensor array. PMID:26907279

30 CFR 77.900-2 - Testing, examination, and maintenance of circuit breakers; record.

Code of Federal Regulations, 2011 CFR

2011-07-01

... protecting low- and medium-voltage circuits serving three-phase alternating current equipment and such record... AND SURFACE WORK AREAS OF UNDERGROUND COAL MINES Low- and Medium-Voltage Alternating Current Circuits...

30 CFR 77.900-1 - Testing, examination, and maintenance of circuit breakers; procedures.

Code of Federal Regulations, 2011 CFR

2011-07-01

... protecting low- and medium-voltage circuits serving portable or mobile three-phase alternating current... AND SURFACE WORK AREAS OF UNDERGROUND COAL MINES Low- and Medium-Voltage Alternating Current Circuits...

30 CFR 77.900-2 - Testing, examination, and maintenance of circuit breakers; record.

Code of Federal Regulations, 2010 CFR

2010-07-01

... protecting low- and medium-voltage circuits serving three-phase alternating current equipment and such record... AND SURFACE WORK AREAS OF UNDERGROUND COAL MINES Low- and Medium-Voltage Alternating Current Circuits...

30 CFR 77.900-1 - Testing, examination, and maintenance of circuit breakers; procedures.

Code of Federal Regulations, 2010 CFR

2010-07-01

... protecting low- and medium-voltage circuits serving portable or mobile three-phase alternating current... AND SURFACE WORK AREAS OF UNDERGROUND COAL MINES Low- and Medium-Voltage Alternating Current Circuits...

47 CFR 15.32 - Test procedures for CPU boards and computer power supplies.

Code of Federal Regulations, 2011 CFR

2011-10-01

... result in a complete personal computer system. If the oscillator and the microprocessor circuits are... microprocessor circuits are contained on separate circuit boards, both boards, typical of the combination that...

47 CFR 15.32 - Test procedures for CPU boards and computer power supplies.

Code of Federal Regulations, 2013 CFR

2013-10-01

... result in a complete personal computer system. If the oscillator and the microprocessor circuits are... microprocessor circuits are contained on separate circuit boards, both boards, typical of the combination that...

47 CFR 15.32 - Test procedures for CPU boards and computer power supplies.

Code of Federal Regulations, 2014 CFR

2014-10-01

... result in a complete personal computer system. If the oscillator and the microprocessor circuits are... microprocessor circuits are contained on separate circuit boards, both boards, typical of the combination that...

47 CFR 15.32 - Test procedures for CPU boards and computer power supplies.

Code of Federal Regulations, 2012 CFR

2012-10-01

... result in a complete personal computer system. If the oscillator and the microprocessor circuits are... microprocessor circuits are contained on separate circuit boards, both boards, typical of the combination that...

47 CFR 15.32 - Test procedures for CPU boards and computer power supplies.

Code of Federal Regulations, 2010 CFR

2010-10-01

... result in a complete personal computer system. If the oscillator and the microprocessor circuits are... microprocessor circuits are contained on separate circuit boards, both boards, typical of the combination that...

Compiling quantum circuits to realistic hardware architectures using temporal planners

NASA Astrophysics Data System (ADS)

Venturelli, Davide; Do, Minh; Rieffel, Eleanor; Frank, Jeremy

2018-04-01

To run quantum algorithms on emerging gate-model quantum hardware, quantum circuits must be compiled to take into account constraints on the hardware. For near-term hardware, with only limited means to mitigate decoherence, it is critical to minimize the duration of the circuit. We investigate the application of temporal planners to the problem of compiling quantum circuits to newly emerging quantum hardware. While our approach is general, we focus on compiling to superconducting hardware architectures with nearest neighbor constraints. Our initial experiments focus on compiling Quantum Alternating Operator Ansatz (QAOA) circuits whose high number of commuting gates allow great flexibility in the order in which the gates can be applied. That freedom makes it more challenging to find optimal compilations but also means there is a greater potential win from more optimized compilation than for less flexible circuits. We map this quantum circuit compilation problem to a temporal planning problem, and generated a test suite of compilation problems for QAOA circuits of various sizes to a realistic hardware architecture. We report compilation results from several state-of-the-art temporal planners on this test set. This early empirical evaluation demonstrates that temporal planning is a viable approach to quantum circuit compilation.

A millimeter-wave tunneLadder TWT

NASA Technical Reports Server (NTRS)

Jacquez, A.; Karp, A.; Wilson, D.; Scott, A.

1988-01-01

A millimeter wave traveling wave tube was developed using a dispersive, high impedance forward interaction structure based on a ladder, with non-space harmonic interaction, for a tube with high gain per unit length and high efficiency. The TunneLadder interaction structure combines ladder properties modified to accommodate Pierce gun beam optics in a radially magnetized permanent magnet focusing structure. The development involved the fabrication of chemically milled, shaped ladders diffusion brazed to diamond cubes which are in turn active-diffusion brazed to each ridge of a doubly ridged waveguide. Cold test data are presented, representing the omega-beta and impedance characteristics of the modified ladder circuit. These results were used in small and large signal computer programs to predict TWT gain and efficiency. Actual data from tested tubes verify the predicted performance while providing broader bandwidth than expected.

Modular control subsystems for use in solar heating systems for multi-family dwellings

NASA Technical Reports Server (NTRS)

1977-01-01

Progress in the development of solar heating modular control subsystems is reported. Circuit design, circuit drawings, and printed circuit board layout are discussed along with maintenance manuals, installation instructions, and verification and acceptance tests. Calculations made to determine the predicted performance of the differential thermostat are given including details and results of tests for the offset temperature, and boil and freeze protect points.

Selection of wires and circuit protective devices for STS Orbiter vehicle payload electrical circuits

NASA Technical Reports Server (NTRS)

Gaston, Darilyn M.

1991-01-01

Electrical designers of Orbiter payloads face the challenge of determining proper circuit protection/wire size parameters to satisfy Orbiter engineering and safety requirements. This document is the result of a program undertaken to review test data from all available aerospace sources and perform additional testing to eliminate extrapolation errors. The resulting compilation of data was used to develop guidelines for the selection of wire sizes and circuit protection ratings. The purpose is to provide guidance to the engineering to ensure a design which meets Orbiter standards and which should be applicable to any aerospace design.

Method for producing a hybridization of detector array and integrated circuit for readout

NASA Technical Reports Server (NTRS)

Fossum, Eric R. (Inventor); Grunthaner, Frank J. (Inventor)

1993-01-01

A process is explained for fabricating a detector array in a layer of semiconductor material on one substrate and an integrated readout circuit in a layer of semiconductor material on a separate substrate in order to select semiconductor material for optimum performance of each structure, such as GaAs for the detector array and Si for the integrated readout circuit. The detector array layer is lifted off its substrate, laminated on the metallized surface on the integrated surface, etched with reticulating channels to the surface of the integrated circuit, and provided with interconnections between the detector array pixels and the integrated readout circuit through the channels. The adhesive material for the lamination is selected to be chemically stable to provide electrical and thermal insulation and to provide stress release between the two structures fabricated in semiconductor materials that may have different coefficients of thermal expansion.

Design of synthetic biological logic circuits based on evolutionary algorithm.

PubMed

Chuang, Chia-Hua; Lin, Chun-Liang; Chang, Yen-Chang; Jennawasin, Tanagorn; Chen, Po-Kuei

2013-08-01

The construction of an artificial biological logic circuit using systematic strategy is recognised as one of the most important topics for the development of synthetic biology. In this study, a real-structured genetic algorithm (RSGA), which combines general advantages of the traditional real genetic algorithm with those of the structured genetic algorithm, is proposed to deal with the biological logic circuit design problem. A general model with the cis-regulatory input function and appropriate promoter activity functions is proposed to synthesise a wide variety of fundamental logic gates such as NOT, Buffer, AND, OR, NAND, NOR and XOR. The results obtained can be extended to synthesise advanced combinational and sequential logic circuits by topologically distinct connections. The resulting optimal design of these logic gates and circuits are established via the RSGA. The in silico computer-based modelling technology has been verified showing its great advantages in the purpose.

Design, Simulation and Characteristics Research of the Interface Circuit based on nano-polysilicon thin films pressure sensor

NASA Astrophysics Data System (ADS)

Zhao, Xiaosong; Zhao, Xiaofeng; Yin, Liang

2018-03-01

This paper presents a interface circuit for nano-polysilicon thin films pressure sensor. The interface circuit includes consist of instrument amplifier and Analog-to-Digital converter (ADC). The instrumentation amplifier with a high common mode rejection ratio (CMRR) is implemented by three stages current feedback structure. At the same time, in order to satisfy the high precision requirements of pressure sensor measure system, the 1/f noise corner of 26.5 mHz can be achieved through chopping technology at a noise density of 38.2 nV/sqrt(Hz).Ripple introduced by chopping technology adopt continuous ripple reduce circuit (RRL), which achieves the output ripple level is lower than noise. The ADC achieves 16 bits significant digit by adopting sigma-delta modulator with fourth-order single-bit structure and digital decimation filter, and finally achieves high precision integrated pressure sensor interface circuit.

General technique for the integration of MIC/MMIC'S with waveguides

NASA Technical Reports Server (NTRS)

Geller, Bernard D. (Inventor); Zaghloul, Amir I. (Inventor)

1987-01-01

A technique for packaging and integrating of a microwave integrated circuit (MIC) or monolithic microwave integrated circuit (MMIC) with a waveguide uses a printed conductive circuit pattern on a dielectric substrate to transform impedance and mode of propagation between the MIC/MMIC and the waveguide. The virtually coplanar circuit pattern lies on an equipotential surface within the waveguide and therefore makes possible single or dual polarized mode structures.

Subsurface microscopy of interconnect layers of an integrated circuit.

PubMed

Köklü, F Hakan; Unlü, M Selim

2010-01-15

We apply the NA-increasing lens technique to confocal and wide-field backside microscopy of integrated circuits. We demonstrate 325 nm (lambda(0)/4) lateral spatial resolution while imaging metal structures located inside the interconnect layer of an integrated circuit. Vectorial field calculations are presented justifying our findings.

Gas electron multiplier (GEM) foil test, repair and effective gain calculation

NASA Astrophysics Data System (ADS)

Tahir, Muhammad; Zubair, Muhammad; Khan, Tufail A.; Khan, Ashfaq; Malook, Asad

2018-06-01

The focus of my research is based on the gas electron multiplier (GEM) foil test, repairing and effective gain calculation of GEM detector. During my research work define procedure of GEM foil testing short-circuit, detection short-circuits in the foil. Study different ways to remove the short circuits in the foils. Set and define the GEM foil testing procedures in the open air, and with nitrogen gas. Measure the leakage current of the foil and applying different voltages with specified step size. Define the Quality Control (QC) tests and different components of GEM detectors before assembly. Calculate the effective gain of GEM detectors using 109Cd and 55Fe radioactive source.

Computational Simulation of the Pulmonary Arteries and its Role in the Study of Pediatric Pulmonary Hypertension

PubMed Central

Hunter, Kendall S.; Feinstein, Jeffrey A.; Ivy, D. Dunbar; Shandas, Robin

2010-01-01

The hemodynamic state of the pulmonary arteries is challenging to routinely measure in children due to the vascular circuit's position in the lungs. The resulting relative scarcity of quantitative clinical diagnostic and prognostic information impairs management of diseases such as pulmonary hypertension, or high blood pressure of the pulmonary circuit, and invites new techniques of measurement. Here we examine recent applications of macro-scale computational mechanics methods for fluids and solids – traditionally used by engineers in the design and virtual testing of complex metal and composite structures – applied to study the pulmonary vasculature, both in healthy and diseased states. In four subject areas, we briefly outline advances in computational methodology and provide examples of clinical relevance. PMID:21499523

Development of design, qualification, screening, and application requirements for plastic encapsulated solid-state devices for space applications

NASA Astrophysics Data System (ADS)

1981-12-01

Test data were collected on 1035 plastic encapsulated devices and 75 hermetically scaled control group devices that were purchased from each of five different manufacturers in the categories of (1) low power Schottsky TTL (bipolar) digital circuits; (2) CMOS digital circuits; (3) operational amplifier linear circuits; and (4) NPN transistors. These parts were subjected to three different initial screening conditions, then to extended life testing, to determine any possible advantages or trends for any particular screen. Several tests were carried out in the areas of flammability testing, humidity testing, high pressure steam (auroclave) testing, and high temperature storage testing. Test results are presented. Procurement and application considerations for use of plastic encapsulated semiconductors are presented and a statistical analysis program written to study the log normal distributions resulting from life testing is concluded.

Development of design, qualification, screening, and application requirements for plastic encapsulated solid-state devices for space applications

NASA Technical Reports Server (NTRS)

1981-01-01

Test data were collected on 1035 plastic encapsulated devices and 75 hermetically scaled control group devices that were purchased from each of five different manufacturers in the categories of (1) low power Schottsky TTL (bipolar) digital circuits; (2) CMOS digital circuits; (3) operational amplifier linear circuits; and (4) NPN transistors. These parts were subjected to three different initial screening conditions, then to extended life testing, to determine any possible advantages or trends for any particular screen. Several tests were carried out in the areas of flammability testing, humidity testing, high pressure steam (auroclave) testing, and high temperature storage testing. Test results are presented. Procurement and application considerations for use of plastic encapsulated semiconductors are presented and a statistical analysis program written to study the log normal distributions resulting from life testing is concluded.

Cooled electrical terminal assembly and device incorporating same

DOEpatents

Beihoff, Bruce C.; Radosevich, Lawrence D.; Phillips, Mark G.; Kehl, Dennis L.; Kaishian, Steven C.; Kannenberg, Daniel G.

2006-08-22

A terminal structure provides interfacing with power electronics circuitry and external circuitry. The thermal support may receive one or more power electronic circuits. The support may aid in removing heat from the terminal structure and the circuits through fluid circulating through the support. The support may form a shield from both external EMI/RFI and from interference generated by operation of the power electronic circuits. Features may be provided to permit and enhance connection of the circuitry to external circuitry, such as improved terminal configurations. Modular units may be assembled that may be coupled to electronic circuitry via plug-in arrangements or through interface with a backplane or similar mounting and interconnecting structures.

Cooled electrical terminal assembly and device incorporating same

DOEpatents

Beihoff, Bruce C.; Radosevich, Lawrence D.; Phillips, Mark G.; Kehl, Dennis L.; Kaishian, Steven C.; Kannenberg, Daniel G.

2005-05-24

A terminal structure provides interfacing with power electronics circuitry and external circuitry. The thermal support may receive one or more power electronic circuits. The support may aid in removing heat from the terminal structure and the circuits through fluid circulating through the support. The support may form a shield from both external EMI/RFI and from interference generated by operation of the power electronic circuits. Features may be provided to permit and enhance connection of the circuitry to external circuitry, such as improved terminal configurations. Modular units may be assembled that may be coupled to electronic circuitry via plug-in arrangements or through interface with a backplane or similar mounting and interconnecting structures.

Adaptive neuro fuzzy inference system-based power estimation method for CMOS VLSI circuits

NASA Astrophysics Data System (ADS)

Vellingiri, Govindaraj; Jayabalan, Ramesh

2018-03-01

Recent advancements in very large scale integration (VLSI) technologies have made it feasible to integrate millions of transistors on a single chip. This greatly increases the circuit complexity and hence there is a growing need for less-tedious and low-cost power estimation techniques. The proposed work employs Back-Propagation Neural Network (BPNN) and Adaptive Neuro Fuzzy Inference System (ANFIS), which are capable of estimating the power precisely for the complementary metal oxide semiconductor (CMOS) VLSI circuits, without requiring any knowledge on circuit structure and interconnections. The ANFIS to power estimation application is relatively new. Power estimation using ANFIS is carried out by creating initial FIS modes using hybrid optimisation and back-propagation (BP) techniques employing constant and linear methods. It is inferred that ANFIS with the hybrid optimisation technique employing the linear method produces better results in terms of testing error that varies from 0% to 0.86% when compared to BPNN as it takes the initial fuzzy model and tunes it by means of a hybrid technique combining gradient descent BP and mean least-squares optimisation algorithms. ANFIS is the best suited for power estimation application with a low RMSE of 0.0002075 and a high coefficient of determination (R) of 0.99961.

A novel analytical description of periodic volume coil geometries in MRI

NASA Astrophysics Data System (ADS)

Koh, D.; Felder, J.; Shah, N. J.

2018-03-01

MRI volume coils can be represented by equivalent lumped element circuits and for a variety of these circuit configurations analytical design equations have been presented. The unification of several volume coil topologies results in a two-dimensional gridded equivalent lumped element circuit which compromises the birdcage resonator, its multiple endring derivative but also novel structures like the capacitive coupled ring resonator. The theory section analyzes a general two-dimensional circuit by noting that its current distribution can be decomposed into a longitudinal and an azimuthal dependency. This can be exploited to compare the current distribution with a transfer function of filter circuits along one direction. The resonances of the transfer function coincide with the resonance of the volume resonator and the simple analytical solution can be used as a design equation. The proposed framework is verified experimentally against a novel capacitive coupled ring structure which was derived from the general circuit formulation and is proven to exhibit a dominant homogeneous mode. In conclusion, a unified analytical framework is presented that allows determining the resonance frequency of any volume resonator that can be represented by a two dimensional meshed equivalent circuit.

Vehicle drive module having improved EMI shielding

DOEpatents

Beihoff, Bruce C.; Kehl, Dennis L.; Gettelfinger, Lee A.; Kaishian, Steven C.; Phillips, Mark G.; Radosevich, Lawrence D.

2006-11-28

EMI shielding in an electric vehicle drive is provided for power electronics circuits and the like via a direct-mount reference plane support and shielding structure. The thermal support may receive one or more power electronic circuits. The support may aid in removing heat from the circuits through fluid circulating through the support. The support forms a shield from both external EMI/RFI and from interference generated by operation of the power electronic circuits. Features may be provided to permit and enhance connection of the circuitry to external circuitry, such as improved terminal configurations. Modular units may be assembled that may be coupled to electronic circuitry via plug-in arrangements or through interface with a backplane or similar mounting and interconnecting structures.

Life test of a nickel cadmium battery with a protection/reconditioning circuit

NASA Technical Reports Server (NTRS)

Lanier, J. R., Jr.; Bush, J. R., Jr.

1981-01-01

Results are discussed for a Ni-Cd battery test over a period of 8 years, 2 months and 44,213 simulated low Earth orbits. The battery cells were protected against overdischarge and reversal at discharge rates up to 25 amperes (1.25C) by a battery protection and reconditioning circuit. The circuit performed flawlessly during the test, and proved its value, both as a battery reconditioner and a cell protection device. Battery cell failures are also discussed. The test demonstrated the viability of using Ni-Cd batteries at depth-of-discharge up to 25 percent for over 5 years in a low Earth orbit.

Analysis and elimination method of the effects of cables on LVRT testing for offshore wind turbines

NASA Astrophysics Data System (ADS)

Jiang, Zimin; Liu, Xiaohao; Li, Changgang; Liu, Yutian

2018-02-01

The current state, characteristics and necessity of the low voltage ride through (LVRT) on-site testing for grid-connected offshore wind turbines are introduced firstly. Then the effects of submarine cables on the LVRT testing are analysed based on the equivalent circuit of the testing system. A scheme for eliminating the effects of cables on the proposed LVRT testing method is presented. The specified voltage dips are guaranteed to be in compliance with the testing standards by adjusting the ratio between the current limiting impedance and short circuit impedance according to the steady voltage relationship derived from the equivalent circuit. Finally, simulation results demonstrate that the voltage dips at the high voltage side of wind turbine transformer satisfy the requirements of testing standards.

A new structure design and the basic radiation characteristics test of the intense current tube

NASA Astrophysics Data System (ADS)

Li, Zhiyuan; Ai, Xianyun; Fu, Li; Cui, Hui

2018-02-01

As a kind of special G-M counter, the intense current tube (ICT) is characterized by small ratio of cathode to anode radius, high working current or count rate, and can be used as the detection units of ultra-high range radiation instruments. In this paper, a new design of ICT structure is introduced, not only does it have a minimum ratio of cathode to anode but it also has a cathode which directly sticks out from the sensitive gas. Using COMSOL Multiphysics, we simulated the electric field between the anode and cathode and finalized the optimal structure. The results of processes and experiments show that the structure has better properties, with plateau slope reaching up to 7.4% within 100V, and it also has a wider range of dose rate. The linear data between the bottom limit of 0.2mGy/h and the upper limit of 1Gy/h is quite accurate but it becomes less reliable beyond 1Gy/h. By using Paralyzable model, we deduce that the dead time of the said ICT is less than 13.4 µs, and we will further optimize the readout circuit in order to reduce the resolution time of the circuit in the near future.

Design and characterization of a 20 Gbit/s clock recovery circuit

NASA Astrophysics Data System (ADS)

Monteiro, Paulo M.; Matos, J. N.; Gameiro, Atilio M. S.; da Rocha, Jose F.

1995-02-01

In this communication we report the design of a clock recovery circuit produced for the 20 Gbit/s demonstrator of the RACE 2011 project `TRAVEL' of the European Community. The clock recovery circuit is based on an open loop structure using a dielectric resonator narrow bandpass filter with a high quality factor. A detailed electrical characterization of the circuit and also its sensitivity to temperature and detuning variations are presented. The experimental results show that the circuit is a very attractive solution for the forthcoming STM-128 optical links.

Parallel reduced-instruction-set-computer architecture for real-time symbolic pattern matching

NASA Astrophysics Data System (ADS)

Parson, Dale E.

1991-03-01

This report discusses ongoing work on a parallel reduced-instruction- set-computer (RISC) architecture for automatic production matching. The PRIOPS compiler takes advantage of the memoryless character of automatic processing by translating a program's collection of automatic production tests into an equivalent combinational circuit-a digital circuit without memory, whose outputs are immediate functions of its inputs. The circuit provides a highly parallel, fine-grain model of automatic matching. The compiler then maps the combinational circuit onto RISC hardware. The heart of the processor is an array of comparators capable of testing production conditions in parallel, Each comparator attaches to private memory that contains virtual circuit nodes-records of the current state of nodes and busses in the combinational circuit. All comparator memories hold identical information, allowing simultaneous update for a single changing circuit node and simultaneous retrieval of different circuit nodes by different comparators. Along with the comparator-based logic unit is a sequencer that determines the current combination of production-derived comparisons to try, based on the combined success and failure of previous combinations of comparisons. The memoryless nature of automatic matching allows the compiler to designate invariant memory addresses for virtual circuit nodes, and to generate the most effective sequences of comparison test combinations. The result is maximal utilization of parallel hardware, indicating speed increases and scalability beyond that found for course-grain, multiprocessor approaches to concurrent Rete matching. Future work will consider application of this RISC architecture to the standard (controlled) Rete algorithm, where search through memory dominates portions of matching.

Testing and Qualifying Linear Integrated Circuits for Radiation Degradation in Space

NASA Technical Reports Server (NTRS)

Johnston, Allan H.; Rax, Bernard G.

2006-01-01

This paper discusses mechanisms and circuit-related factors that affect the degradation of linear integrated circuits from radiation in space. For some circuits there is sufficient degradation to affect performance at total dose levels below 4 krad(Si) because the circuit design techniques require higher gain for the pnp transistors that are the most sensitive to radiation. Qualification methods are recommended that include displacement damage as well as ionization damage.

Development of the automatic test pattern generation for NPP digital electronic circuits using the degree of freedom concept

DOE Office of Scientific and Technical Information (OSTI.GOV)

Kim, D.S.; Seong, P.H.

1995-08-01

In this paper, an improved algorithm for automatic test pattern generation (ATG) for nuclear power plant digital electronic circuits--the combinational type of logic circuits is presented. For accelerating and improving the ATG process for combinational circuits the presented ATG algorithm has the new concept--the degree of freedom (DF). The DF, directly computed from the system descriptions such as types of gates and their interconnections, is the criterion to decide which among several alternate lines` logic values required along each path promises to be the most effective in order to accelerate and improve the ATG process. Based on the DF themore » proposed ATG algorithm is implemented in the automatic fault diagnosis system (AFDS) which incorporates the advanced fault diagnosis method of artificial intelligence technique, it is shown that the AFDS using the ATG algorithm makes Universal Card (UV Card) testing much faster than the present testing practice or by using exhaustive testing sets.« less

Extinction Partially Reverts Structural Changes Associated with Remote Fear Memory

ERIC Educational Resources Information Center

Vetere, Gisella; Restivo, Leonardo; Novembre, Giovanni; Aceti, Massimiliano; Lumaca, Massimo; Ammassari-Teule, Martine

2011-01-01

Structural synaptic changes occur in medial prefrontal cortex circuits during remote memory formation. Whether extinction reverts or further reshapes these circuits is, however, unknown. Here we show that the number and the size of spines were enhanced in anterior cingulate (aCC) and infralimbic (ILC) cortices 36 d following contextual fear…

Equivalent circuit modeling of a piezo-patch energy harvester on a thin plate with AC-DC conversion

NASA Astrophysics Data System (ADS)

Bayik, B.; Aghakhani, A.; Basdogan, I.; Erturk, A.

2016-05-01

As an alternative to beam-like structures, piezoelectric patch-based energy harvesters attached to thin plates can be readily integrated to plate-like structures in automotive, marine, and aerospace applications, in order to directly exploit structural vibration modes of the host system without mass loading and volumetric occupancy of cantilever attachments. In this paper, a multi-mode equivalent circuit model of a piezo-patch energy harvester integrated to a thin plate is developed and coupled with a standard AC-DC conversion circuit. Equivalent circuit parameters are obtained in two different ways: (1) from the modal analysis solution of a distributed-parameter analytical model and (2) from the finite-element numerical model of the harvester by accounting for two-way coupling. After the analytical modeling effort, multi-mode equivalent circuit representation of the harvester is obtained via electronic circuit simulation software SPICE. Using the SPICE software, electromechanical response of the piezoelectric energy harvester connected to linear and nonlinear circuit elements are computed. Simulation results are validated for the standard AC-AC and AC-DC configurations. For the AC input-AC output problem, voltage frequency response functions are calculated for various resistive loads, and they show excellent agreement with modal analysis-based analytical closed-form solution and with the finite-element model. For the standard ideal AC input-DC output case, a full-wave rectifier and a smoothing capacitor are added to the harvester circuit for conversion of the AC voltage to a stable DC voltage, which is also validated against an existing solution by treating the single-mode plate dynamics as a single-degree-of-freedom system.

Design and implementation of a simple acousto optic dual control circuit

NASA Astrophysics Data System (ADS)

Li, Biqing; Li, Zhao

2017-04-01

This page proposed a simple light control circuit which designed by using power supply circuit, sonic circuits, electric circuit and delay circuit four parts. The main chip for CD4011, have inside of the four and to complete the sonic or circuit, electric, delay logic circuit. During the day, no matter how much a pedestrian voice, is ever shine light bulb. Dark night, circuit in a body to make the microphone as long as testing noise, and will automatically be bright for pedestrians lighting, several minutes after the automatic and put out, effective energy saving. Applicable scope and the working principle of the circuit principle diagram and given device parameters selection, power saving effect is obvious, at the same time greatly reduce the maintenance quantity, saving money, use effect is good.

A New Test Method of Circuit Breaker Spring Telescopic Characteristics Based Image Processing

NASA Astrophysics Data System (ADS)

Huang, Huimin; Wang, Feifeng; Lu, Yufeng; Xia, Xiaofei; Su, Yi

2018-06-01

This paper applied computer vision technology to the fatigue condition monitoring of springs, and a new telescopic characteristics test method is proposed for circuit breaker operating mechanism spring based on image processing technology. High-speed camera is utilized to capture spring movement image sequences when high voltage circuit breaker operated. Then the image-matching method is used to obtain the deformation-time curve and speed-time curve, and the spring expansion and deformation parameters are extracted from it, which will lay a foundation for subsequent spring force analysis and matching state evaluation. After performing simulation tests at the experimental site, this image analyzing method could solve the complex problems of traditional mechanical sensor installation and monitoring online, status assessment of the circuit breaker spring.

Test Bench for Coupling and Shielding Magnetic Fields

NASA Astrophysics Data System (ADS)

Jordan, J.; Esteve, V.; Dede, E.; Sanchis, E.; Maset, E.; Ferreres, A.; Ejea, J. B.; Cases, C.

2016-05-01

This paper describes a test bench for training purposes, which uses a magnetic field generator to couple this magnetic field to a victim circuit. It can be very useful to test for magnetic susceptibility as well. The magnetic field generator consists of a board, which generates a variable current that flows into a printed circuit board with spiral tracks (noise generator). The victim circuit consists of a coaxial cable concentric with the spiral tracks and its generated magnetic field. The coaxial cable is part of a circuit which conducts a signal produced by a signal generator and a resistive load. In the paper three cases are studied. First, the transmitted signal from the signal generator uses the central conductor of the coaxial cable and the shield is floating. Second, the shield is short circuited at its ends (and thus forming a loop). Third, when connecting the shield in series with the inner conductor and therefore having the current flowing into the coax via the inner conductor and returning via the shield.

The Relationship between the Current Waveform just before the Current Zero and the Interruption Ability in the High-speed VCB

NASA Astrophysics Data System (ADS)

Niwa, Yoshimitsu; Matsuzaki, Jun; Yokokura, Kunio

The high-speed vacuum circuit breaker, which forced the fault current to zero was investigated. The test circuit breaker consisted of a vacuum interrupter and a high frequency current source. The vacuum interrupter, which had the axial magnetic field electrode and the disk shape electrode, was tested. The arcing period of the high-speed vacuum circuit breaker is much shorter than that of conventional circuit breaker. The arc behavior of the test electrodes immediately after the contact separation was observed by a high-speed video camcorder. The relation between the current waveform just before the current zero and the interruption ability by varying the high frequency current source was investigated experimentally. The results demonstrate the interruption ability and the arc behavior of the high-speed vacuum circuit breaker. The high current interruption was made possible by the low current period just before the current zero, although the arcing time is short and the arc is concentrated.

Hearing-aid tester

NASA Technical Reports Server (NTRS)

Kessinger, R.; Polhemus, J. T.; Waring, J. G.

1977-01-01

Hearing aids are automatically checked by circuit that applies half-second test signal every thirty minutes. If hearing-aid output is distorted, too small, or if battery is too low, a warning lamp is activated. Test circuit is incorporated directly into hearing-aid package.

Redundancy approaches in bubble domain memories

NASA Technical Reports Server (NTRS)

Almasi, G. S.; Schuster, S. E.

1972-01-01

Fabrication of integrated circuit chips to compensate for faulty memory elements is discussed. Procedure for testing chips to determine extent of redundancy and faults is described. Mathematical model to define operation is presented. Schematic circuit diagram of test equipment is provided.

Electronic Components and Circuits for Extreme Temperature Environments

NASA Technical Reports Server (NTRS)

Patterson, Richard L.; Hammoud, Ahmad; Dickman, John E.; Gerber, Scott

2003-01-01

Planetary exploration missions and deep space probes require electrical power management and control systems that are capable of efficient and reliable operation in very low temperature environments. Presently, spacecraft operating in the cold environment of deep space carry a large number of radioisotope heating units in order to maintain the surrounding temperature of the on-board electronics at approximately 20 C. Electronics capable of operation at cryogenic temperatures will not only tolerate the hostile environment of deep space but also reduce system size and weight by eliminating or reducing the radioisotope heating units and their associate structures; thereby reducing system development as well as launch costs. In addition, power electronic circuits designed for operation at low temperatures are expected to result in more efficient systems than those at room temperature. This improvement results from better behavior and tolerance in the electrical and thermal properties of semiconductor and dielectric materials at low temperatures. The Low Temperature Electronics Program at the NASA Glenn Research Center focuses on research and development of electrical components, circuits, and systems suitable for applications in the aerospace environment and deep space exploration missions. Research is being conducted on devices and systems for reliable use down to cryogenic temperatures. Some of the commercial-off-the-shelf as well as developed components that are being characterized include switching devices, resistors, magnetics, and capacitors. Semiconductor devices and integrated circuits including digital-to-analog and analog-to-digital converters, DC/DC converters, operational amplifiers, and oscillators are also being investigated for potential use in low temperature applications. An overview of the NASA Glenn Research Center Low Temperature Electronic Program will be presented in this paper. A description of the low temperature test facilities along with selected data obtained through in-house component and circuit testing will also be discussed. Ongoing research activities that are being performed in collaboration with various organizations will also be presented.

Cerebro-cerebellar circuits in autism spectrum disorder.

PubMed

D'Mello, Anila M; Stoodley, Catherine J

2015-01-01

The cerebellum is one of the most consistent sites of abnormality in autism spectrum disorder (ASD) and cerebellar damage is associated with an increased risk of ASD symptoms, suggesting that cerebellar dysfunction may play a crucial role in the etiology of ASD. The cerebellum forms multiple closed-loop circuits with cerebral cortical regions that underpin movement, language, and social processing. Through these circuits, cerebellar dysfunction could impact the core ASD symptoms of social and communication deficits and repetitive and stereotyped behaviors. The emerging topography of sensorimotor, cognitive, and affective subregions in the cerebellum provides a new framework for interpreting the significance of regional cerebellar findings in ASD and their relationship to broader cerebro-cerebellar circuits. Further, recent research supports the idea that the integrity of cerebro-cerebellar loops might be important for early cortical development; disruptions in specific cerebro-cerebellar loops in ASD might impede the specialization of cortical regions involved in motor control, language, and social interaction, leading to impairments in these domains. Consistent with this concept, structural, and functional differences in sensorimotor regions of the cerebellum and sensorimotor cerebro-cerebellar circuits are associated with deficits in motor control and increased repetitive and stereotyped behaviors in ASD. Further, communication and social impairments are associated with atypical activation and structure in cerebro-cerebellar loops underpinning language and social cognition. Finally, there is converging evidence from structural, functional, and connectivity neuroimaging studies that cerebellar right Crus I/II abnormalities are related to more severe ASD impairments in all domains. We propose that cerebellar abnormalities may disrupt optimization of both structure and function in specific cerebro-cerebellar circuits in ASD.

Cerebro-cerebellar circuits in autism spectrum disorder

PubMed Central

D'Mello, Anila M.; Stoodley, Catherine J.

2015-01-01

The cerebellum is one of the most consistent sites of abnormality in autism spectrum disorder (ASD) and cerebellar damage is associated with an increased risk of ASD symptoms, suggesting that cerebellar dysfunction may play a crucial role in the etiology of ASD. The cerebellum forms multiple closed-loop circuits with cerebral cortical regions that underpin movement, language, and social processing. Through these circuits, cerebellar dysfunction could impact the core ASD symptoms of social and communication deficits and repetitive and stereotyped behaviors. The emerging topography of sensorimotor, cognitive, and affective subregions in the cerebellum provides a new framework for interpreting the significance of regional cerebellar findings in ASD and their relationship to broader cerebro-cerebellar circuits. Further, recent research supports the idea that the integrity of cerebro-cerebellar loops might be important for early cortical development; disruptions in specific cerebro-cerebellar loops in ASD might impede the specialization of cortical regions involved in motor control, language, and social interaction, leading to impairments in these domains. Consistent with this concept, structural, and functional differences in sensorimotor regions of the cerebellum and sensorimotor cerebro-cerebellar circuits are associated with deficits in motor control and increased repetitive and stereotyped behaviors in ASD. Further, communication and social impairments are associated with atypical activation and structure in cerebro-cerebellar loops underpinning language and social cognition. Finally, there is converging evidence from structural, functional, and connectivity neuroimaging studies that cerebellar right Crus I/II abnormalities are related to more severe ASD impairments in all domains. We propose that cerebellar abnormalities may disrupt optimization of both structure and function in specific cerebro-cerebellar circuits in ASD. PMID:26594140

Rectenna Technology Program: Ultra light 2.45 GHz rectenna 20 GHz rectenna

NASA Technical Reports Server (NTRS)

Brown, William C.

1987-01-01

The program had two general objectives. The first objective was to develop the two plane rectenna format for space application at 2.45 GHz. The resultant foreplane was a thin-film, etched-circuit format fabricated from a laminate composed of 2 mil Kapton F sandwiched between sheets of 1 oz copper. The thin-film foreplane contains half wave dipoles, filter circuits, rectifying Schottky diode, and dc bussing lead. It weighs 160 grams per square meter. Efficiency and dc power output density were measured at 85% and 1 kw/sq m, respectively. Special testing techniques to measure temperature of circuit and diode without perturbing microwave operation using the fluoroptic thermometer were developed. A second objective was to investigate rectenna technology for use at 20 GHz and higher frequencies. Several fabrication formats including the thin-film scaled from 2.45 GHz, ceramic substrate and silk-screening, and monolithic were investigated, with the conclusion that the monolithic approach was the best. A preliminary design of the monolithic rectenna structure and the integrated Schottky diode were made.

Adaptive synchronized switch damping on an inductor: a self-tuning switching law

NASA Astrophysics Data System (ADS)

Kelley, Christopher R.; Kauffman, Jeffrey L.

2017-03-01

Synchronized switch damping (SSD) techniques exploit low-power switching between passive circuits connected to piezoelectric material to reduce structural vibration. In the classical implementation of SSD, the piezoelectric material remains in an open circuit for the majority of the vibration cycle and switches briefly to a shunt circuit at every displacement extremum. Recent research indicates that this switch timing is only optimal for excitation exactly at resonance and points to more general optimal switch criteria based on the phase of the displacement and the system parameters. This work proposes a self-tuning approach that implements the more general optimal switch timing for synchronized switch damping on an inductor (SSDI) without needing any knowledge of the system parameters. The law involves a gradient-based search optimization that is robust to noise and uncertainties in the system. Testing of a physical implementation confirms this law successfully adapts to the frequency and parameters of the system. Overall, the adaptive SSDI controller provides better off-resonance steady-state vibration reduction than classical SSDI while matching performance at resonance.

Improvement of Surge Protection by Using an AlGaN/GaN-Based Metal-Semiconductor-Metal Two-Dimensional Electron Gas Varactor

NASA Astrophysics Data System (ADS)

Ferng, Yi-Cherng; Chang, Liann-Be; Das, Atanu; Lin, Ching-Chi; Cheng, Chun-Yu; Kuei, Ping-Yu; Chow, Lee

2012-12-01

In this paper, a varactor with metal-semiconductor-metal diodes on top of the (NH4)2S/P2S5-treated AlGaN/GaN two-dimensional electron gas epitaxial structure (MSM-2DEG) is proposed to the surge protection for the first time. The sulfur-treated MSM-2DEG varactor properties, including current-voltage (I-V), capacitance-voltage (C-V), and frequency response of the proposed surge protection circuit, are presented. To verify its capability of surge protection, we replace the metal oxide varistor (MOV) and resistor (R) in a state-of-the-art surge protection circuit with the sulfur-treated MSM-2DEG varactor under the application conditions of system-level surge tests. The measured results show that the proposed surge protection circuit, consisted of a gas discharge arrester (GDA) and a sulfur-treated MSM-2DEG varactor, can suppress an electromagnetic pulse (EMP) voltage of 4000 to 360 V, a reduction of 91%, whereas suppression is to 1780 V, a reduction of 55%, when using only a GDA.

Remote control circuit breaker evaluation testing. [for space shuttles

NASA Technical Reports Server (NTRS)

Bemko, L. M.

1974-01-01

Engineering evaluation tests were performed on several models/types of remote control circuit breakers marketed in an attempt to gain some insight into their potential suitability for use on the space shuttle vehicle. Tests included the measurement of several electrical and operational performance parameters under laboratory ambient, space simulation, acceleration and vibration environmental conditions.

Structure theorems and the dynamics of nitrogen catabolite repression in yeast

PubMed Central

Boczko, Erik M.; Cooper, Terrance G.; Gedeon, Tomas; Mischaikow, Konstantin; Murdock, Deborah G.; Pratap, Siddharth; Wells, K. Sam

2005-01-01

By using current biological understanding, a conceptually simple, but mathematically complex, model is proposed for the dynamics of the gene circuit responsible for regulating nitrogen catabolite repression (NCR) in yeast. A variety of mathematical “structure” theorems are described that allow one to determine the asymptotic dynamics of complicated systems under very weak hypotheses. It is shown that these theorems apply to several subcircuits of the full NCR circuit, most importantly to the URE2–GLN3 subcircuit that is independent of the other constituents but governs the switching behavior of the full NCR circuit under changes in nitrogen source. Under hypotheses that are fully consistent with biological data, it is proven that the dynamics of this subcircuit is simple periodic behavior in synchrony with the cell cycle. Although the current mathematical structure theorems do not apply to the full NCR circuit, extensive simulations suggest that the dynamics is constrained in much the same way as that of the URE2–GLN3 subcircuit. This finding leads to the proposal that mathematicians study genetic circuits to find new geometries for which structure theorems may exist. PMID:15814615

Four-terminal circuit element with photonic core

DOE Office of Scientific and Technical Information (OSTI.GOV)

Sampayan, Stephen

A four-terminal circuit element is described that includes a photonic core inside of the circuit element that uses a wide bandgap semiconductor material that exhibits photoconductivity and allows current flow through the material in response to the light that is incident on the wide bandgap material. The four-terminal circuit element can be configured based on various hardware structures using a single piece or multiple pieces or layers of a wide bandgap semiconductor material to achieve various designed electrical properties such as high switching voltages by using the photoconductive feature beyond the breakdown voltages of semiconductor devices or circuits operated basedmore » on electrical bias or control designs. The photonic core aspect of the four-terminal circuit element provides unique features that enable versatile circuit applications to either replace the semiconductor transistor-based circuit elements or semiconductor diode-based circuit elements.« less

A behavioral-level HDL description of SFQ logic circuits for quantitative performance analysis of large-scale SFQ digital systems

NASA Astrophysics Data System (ADS)

Matsuzaki, F.; Yoshikawa, N.; Tanaka, M.; Fujimaki, A.; Takai, Y.

2003-10-01

Recently many single flux quantum (SFQ) logic circuits containing several thousands of Josephson junctions have been designed successfully by using digital domain simulation based on the hard ware description language (HDL). In the present HDL-based design of SFQ circuits, a structure-level HDL description has been used, where circuits are made up of basic gate cells. However, in order to analyze large-scale SFQ digital systems, such as a microprocessor, more higher-level circuit abstraction is necessary to reduce the circuit simulation time. In this paper we have investigated the way to describe functionality of the large-scale SFQ digital circuits by a behavior-level HDL description. In this method, the functionality and the timing of the circuit block is defined directly by describing their behavior by the HDL. Using this method, we can dramatically reduce the simulation time of large-scale SFQ digital circuits.

Behaviour of F82H mod. stainless steel in lead-bismuth under temperature gradient

NASA Astrophysics Data System (ADS)

Gómez Briceño, D.; Martín Muñoz, F. J.; Soler Crespo, L.; Esteban, F.; Torres, C.

2001-07-01

Austenitic steels can be used in a hybrid system in contact with liquid lead-bismuth eutectic if the region of operating temperatures is not beyond 400°C. For higher temperatures, martensitic steels are recommended. However, at long times, the interaction between the structural material and the eutectic leads to the dissolution of some elements of the steel (Ni, Cr and Fe, mainly) in the liquid metal. In a non-isothermal lead-bismuth loop, the material dissolution takes place at the hot leg of the circuit and, due to the mass transfer, deposition occurs at the cold leg. One of the possible ways to improve the performance of structural materials in lead-bismuth is the creation of an oxide layer. Tests have been performed in a small natural convection loop built of austenitic steel (316L) that has been operating for 3000 h. This loop contains a test area in which several samples of F82Hmod. martensitic steel have been tested at different times. A gas with an oxygen content of 10 ppm was bubbled in the hot area of the circuit during the operation time. The obtained results show that an oxide layer is formed on the samples introduced in the loop at the beginning of the operation and this layer increases with time. However, the samples introduced at different times during the loop operation, are not protected by oxide layers and present material dissolution in some cases.

OBIST methodology incorporating modified sensitivity of pulses for active analogue filter components

NASA Astrophysics Data System (ADS)

Khade, R. H.; Chaudhari, D. S.

2018-03-01

In this paper, oscillation-based built-in self-test method is used to diagnose catastrophic and parametric faults in integrated circuits. Sallen-Key low pass filter and high pass filter circuits with different gains are used to investigate defects. Variation in seven parameters of operational amplifier (OP-AMP) like gain, input impedance, output impedance, slew rate, input bias current, input offset current, input offset voltage and catastrophic as well as parametric defects in components outside OP-AMP are introduced in the circuit and simulation results are analysed. Oscillator output signal is converted to pulses which are used to generate a signature of the circuit. The signature and pulse count changes with the type of fault present in the circuit under test (CUT). The change in oscillation frequency is observed for fault detection. Designer has flexibility to predefine tolerance band of cut-off frequency and range of pulses for which circuit should be accepted. The fault coverage depends upon the required tolerance band of the CUT. We propose a modification of sensitivity of parameter (pulses) to avoid test escape and enhance yield. Result shows that the method provides 100% fault coverage for catastrophic faults.

Design issues of a low cost lock-in amplifier readout circuit for an infrared detector

NASA Astrophysics Data System (ADS)

Scheepers, L.; Schoeman, J.

2014-06-01

In the past, high resolution thermal sensors required expensive cooling techniques making the early thermal imagers expensive to operate and cumbersome to transport, limiting them mainly to military applications. However, the introduction of uncooled microbolometers has overcome many of earlier problems and now shows great potential for commercial optoelectric applications. The structure of uncooled microbolometer sensors, especially their smaller size, makes them attractive in low cost commercial applications requiring high production numbers with relatively low performance requirements. However, the biasing requirements of these microbolometers cause these sensors to generate a substantial amount of noise on the output measurements due to self-heating. Different techniques to reduce this noise component have been attempted, such as pulsed biasing currents and the use of blind bolometers as common mode reference. These techniques proved to either limit the performance of the microbolometer or increase the cost of their implementation. The development of a low cost lock-in amplifier provides a readout technique to potentially overcome these challenges. High performance commercial lock-in amplifiers are very expensive. Using this as a readout circuit for a microbolometer will take away from the low manufacturing cost of the detector array. Thus, the purpose of this work was to develop a low cost readout circuit using the technique of phase sensitive detection and customizing this as a readout circuit for microbolometers. The hardware and software of the readout circuit was designed and tested for improvement of the signal-to-noise ratio (SNR) of the microbolometer signal. An optical modulation system was also developed in order to effectively identify the desired signal from the noise with the use of the readout circuit. A data acquisition and graphical user interface sub system was added in order to display the signal recovered by the readout circuit. The readout circuit was able to enhance the SNR of the microbolometer signal significantly. It was shown that the quality of the phase sensitive detector plays a significant role in the effectiveness of the readout circuit to improve the SNR.

Information Flow through a Model of the C. elegans Klinotaxis Circuit

PubMed Central

Izquierdo, Eduardo J.; Williams, Paul L.; Beer, Randall D.

2015-01-01

Understanding how information about external stimuli is transformed into behavior is one of the central goals of neuroscience. Here we characterize the information flow through a complete sensorimotor circuit: from stimulus, to sensory neurons, to interneurons, to motor neurons, to muscles, to motion. Specifically, we apply a recently developed framework for quantifying information flow to a previously published ensemble of models of salt klinotaxis in the nematode worm Caenorhabditis elegans. Despite large variations in the neural parameters of individual circuits, we found that the overall information flow architecture circuit is remarkably consistent across the ensemble. This suggests structural connectivity is not necessarily predictive of effective connectivity. It also suggests information flow analysis captures general principles of operation for the klinotaxis circuit. In addition, information flow analysis reveals several key principles underlying how the models operate: (1) Interneuron class AIY is responsible for integrating information about positive and negative changes in concentration, and exhibits a strong left/right information asymmetry. (2) Gap junctions play a crucial role in the transfer of information responsible for the information symmetry observed in interneuron class AIZ. (3) Neck motor neuron class SMB implements an information gating mechanism that underlies the circuit’s state-dependent response. (4) The neck carries more information about small changes in concentration than about large ones, and more information about positive changes in concentration than about negative ones. Thus, not all directions of movement are equally informative for the worm. Each of these findings corresponds to hypotheses that could potentially be tested in the worm. Knowing the results of these experiments would greatly refine our understanding of the neural circuit underlying klinotaxis. PMID:26465883

NREL/NASA Internal Short-Circuit Instigator in Lithium Ion Cells; NREL (National Renewable Energy Laboratory)

DOE Office of Scientific and Technical Information (OSTI.GOV)

Long, Dirk; Ireland, John; Pesaran, Ahmad

NREL has developed a device to test one of the most challenging failure mechanisms of lithium-ion (Li-ion) batteries -- a battery internal short circuit. Many members of the technical community believe that this type of failure is caused by a latent flaw that results in a short circuit between electrodes during use. As electric car manufacturers turn to Li-ion batteries for energy storage, solving the short circuit problem becomes more important. To date, no reliable and practical method exists to create on-demand internal shorts in Li-ion cells that produce a response that is relevant to the ones produced by fieldmore » failures. NREL and NASA have worked to establish an improved ISC cell-level test method that simulates an emergent internal short circuit, is capable of triggering the four types of cell internal shorts, and produces consistent and reproducible results. Internal short circuit device design is small, low-profile and implantable into Li-ion cells, preferably during assembly. The key component is an electrolyte-compatible phase change material (PCM). The ISC is triggered by heating the cell above PCM melting temperature (presently 40 degrees C – 60 degrees C). In laboratory testing, the activated device can handle currents in excess of 300 A to simulate hard shorts (< 2 mohms). Phase change from non-conducting to conducting has been 100% successful during trigger tests.« less

Waveguide metatronics: Lumped circuitry based on structural dispersion

PubMed Central

Li, Yue; Liberal, Iñigo; Della Giovampaola, Cristian; Engheta, Nader

2016-01-01

Engineering optical nanocircuits by exploiting modularization concepts and methods inherited from electronics may lead to multiple innovations in optical information processing at the nanoscale. We introduce the concept of “waveguide metatronics,” an advanced form of optical metatronics that uses structural dispersion in waveguides to obtain the materials and structures required to construct this class of circuitry. Using numerical simulations, we demonstrate that the design of a metatronic circuit can be carried out by using a waveguide filled with materials with positive permittivity. This includes the implementation of all “lumped” circuit elements and their assembly in a single circuit board. In doing so, we extend the concepts of optical metatronics to frequency ranges where there are no natural plasmonic materials available. The proposed methodology could be exploited as a platform to experimentally validate optical metatronic circuits in other frequency regimes, such as microwave frequency setups, and/or to provide a new route to design optical nanocircuitry. PMID:27386566

Carbon-Nanotube-Based Epoxy Matrix Thermal Interface Materials for Thermal Management in Load Bearing Aerospace Structures

DTIC Science & Technology

2012-01-12

fabrication of the composite indicate physical deformities and defects, including entanglement of carbon nanotubes and fused contacts, that are understood...working distance, and spot size, 2.5) of MWCNT array batch of which the composite was made and tested: (a) Entanglements of Individual Nanotubes...electron, photon and phonon) in these materials is critical to their reliable and robust performance, thus accommodating denser circuits 2 and higher

Reference Manual for the Ada Programming Language

DTIC Science & Technology

1983-01-01

Convercions 4-21 4.7 Qualified Expresclions 4-24 4.8 Allocators 4-24 4.9 Static Expressions and Static Subtypes 4-26 , 4.10 Universal Expressions 4-27 5...record type.•: • 2 Access types allow the construction of linked data structures created by the evaluation of / allocators . They allow several...the following: A * An assignment (In assignment statements and Initializations), an allocator , a membership test, or a short-circuit control form, * A

CMOS Active-Pixel Image Sensor With Simple Floating Gates

NASA Technical Reports Server (NTRS)

Fossum, Eric R.; Nakamura, Junichi; Kemeny, Sabrina E.

1996-01-01

Experimental complementary metal-oxide/semiconductor (CMOS) active-pixel image sensor integrated circuit features simple floating-gate structure, with metal-oxide/semiconductor field-effect transistor (MOSFET) as active circuit element in each pixel. Provides flexibility of readout modes, no kTC noise, and relatively simple structure suitable for high-density arrays. Features desirable for "smart sensor" applications.

Crossed SMPS MOSFET-based protection circuit for high frequency ultrasound transceivers and transducers

PubMed Central

2014-01-01

Background The ultrasonic transducer is one of the core components of ultrasound systems, and the transducer’s sensitivity is significantly related the loss of electronic components such as the transmitter, receiver, and protection circuit. In an ultrasonic device, protection circuits are commonly used to isolate the electrical noise between an ultrasound transmitter and transducer and to minimize unwanted discharged pulses in order to protect the ultrasound receiver. However, the performance of the protection circuit and transceiver obviously degrade as the operating frequency or voltage increases. We therefore developed a crossed SMPS (Switching Mode Power Supply) MOSFET-based protection circuit in order to maximize the sensitivity of high frequency transducers in ultrasound systems. The high frequency pulse signals need to trigger the transducer, and high frequency pulse signals must be received by the transducer. We therefore selected the SMPS MOSFET, which is the main component of the protection circuit, to minimize the loss in high frequency operation. The crossed configuration of the protection circuit can drive balanced bipolar high voltage signals from the pulser and transfer the balanced low voltage echo signals from the transducer. Methods The equivalent circuit models of the SMPS MOSFET-based protection circuit are shown in order to select the proper device components. The schematic diagram and operation mechanism of the protection circuit is provided to show how the protection circuit is constructed. The P-Spice circuit simulation was also performed in order to estimate the performance of the crossed MOSFET-based protection circuit. Results We compared the performance of our crossed SMPS MOSFET-based protection circuit with a commercial diode-based protection circuit. At 60 MHz, our expander and limiter circuits have lower insertion loss than the commercial diode-based circuits. The pulse-echo test is typical method to evaluate the sensitivity of ultrasonic transducers. Therefore, we performed a pulse-echo test using a single element transducer in order to utilize the crossed SMPS MOSFET-based protection circuit in an ultrasound system. Conclusions The SMPS-based protection circuit could be a viable alternative that provides better sensitivity, especially for high frequency ultrasound applications. PMID:24924595

Crossed SMPS MOSFET-based protection circuit for high frequency ultrasound transceivers and transducers.

PubMed

Choi, Hojong; Shung, K Kirk

2014-06-12

The ultrasonic transducer is one of the core components of ultrasound systems, and the transducer's sensitivity is significantly related the loss of electronic components such as the transmitter, receiver, and protection circuit. In an ultrasonic device, protection circuits are commonly used to isolate the electrical noise between an ultrasound transmitter and transducer and to minimize unwanted discharged pulses in order to protect the ultrasound receiver. However, the performance of the protection circuit and transceiver obviously degrade as the operating frequency or voltage increases. We therefore developed a crossed SMPS (Switching Mode Power Supply) MOSFET-based protection circuit in order to maximize the sensitivity of high frequency transducers in ultrasound systems.The high frequency pulse signals need to trigger the transducer, and high frequency pulse signals must be received by the transducer. We therefore selected the SMPS MOSFET, which is the main component of the protection circuit, to minimize the loss in high frequency operation. The crossed configuration of the protection circuit can drive balanced bipolar high voltage signals from the pulser and transfer the balanced low voltage echo signals from the transducer. The equivalent circuit models of the SMPS MOSFET-based protection circuit are shown in order to select the proper device components. The schematic diagram and operation mechanism of the protection circuit is provided to show how the protection circuit is constructed. The P-Spice circuit simulation was also performed in order to estimate the performance of the crossed MOSFET-based protection circuit. We compared the performance of our crossed SMPS MOSFET-based protection circuit with a commercial diode-based protection circuit. At 60 MHz, our expander and limiter circuits have lower insertion loss than the commercial diode-based circuits. The pulse-echo test is typical method to evaluate the sensitivity of ultrasonic transducers. Therefore, we performed a pulse-echo test using a single element transducer in order to utilize the crossed SMPS MOSFET-based protection circuit in an ultrasound system. The SMPS-based protection circuit could be a viable alternative that provides better sensitivity, especially for high frequency ultrasound applications.

4H-SiC JFET Multilayer Integrated Circuit Technologies Tested Up to 1000 K

NASA Technical Reports Server (NTRS)

Spry, D. J.; Neudeck, P. G.; Chen, L.; Chang, C. W.; Lukco, D.; Beheim, G. M.

2015-01-01

Testing of semiconductor electronics at temperatures above their designed operating envelope is recognized as vital to qualification and lifetime prediction of circuits. This work describes the high temperature electrical testing of prototype 4H silicon carbide (SiC) junction field effect transistor (JFET) integrated circuits (ICs) technology implemented with multilayer interconnects; these ICs are intended for prolonged operation at temperatures up to 773K (500 C). A 50 mm diameter sapphire wafer was used in place of the standard NASA packaging for this experiment. Testing was carried out between 300K (27 C) and 1150K (877 C) with successful electrical operation of all devices observed up to 1000K (727 C).

The circuit parameters measurement of the SABALAN-I plasma focus facility and comparison with Lee Model

NASA Astrophysics Data System (ADS)

Karimi, F. S.; Saviz, S.; Ghoranneviss, M.; Salem, M. K.; Aghamir, F. M.

The circuit parameters are investigated in a Mather-type plasma focus device. The experiments are performed in the SABALAN-I plasma focus facility (2 kJ, 20 kV, 10 μF). A 12-turn Rogowski coil is built and used to measure the time derivative of discharge current (dI/dt). The high pressure test has been performed in this work, as alternative technique to short circuit test to determine the machine circuit parameters and calibration factor of the Rogowski coil. The operating parameters are calculated by two methods and the results show that the relative error of determined parameters by method I, are very low in comparison to method II. Thus the method I produces more accurate results than method II. The high pressure test is operated with this assumption that no plasma motion and the circuit parameters may be estimated using R-L-C theory given that C0 is known. However, for a plasma focus, even at highest permissible pressure it is found that there is significant motion, so that estimated circuit parameters not accurate. So the Lee Model code is used in short circuit mode to generate the computed current trace for fitting to the current waveform was integrated from current derivative signal taken with Rogowski coil. Hence, the dynamics of plasma is accounted for into the estimation and the static bank parameters are determined accurately.

SAFETY SYSTEM FOR CONTROL ROD

DOEpatents

Paget, J.A.

1963-05-14

A structure for monitoring the structural continuity of a control rod foi a neutron reactor is presented. A electric conductor readily breakable under mechanical stress is fastened along the length of the control rod at a plurality of positions and forms a closed circuit with remote electrical components responsive to an open circuit. A portion of the conductor between the control rod and said components is helically wound to allow free and normally unrestricted movement of the segment of conductor secured to the control rod relative to the remote components. Any break in the circuit is indicative of control rod breakage. (AEC)

Development and evaluation of endurance test system for ventricular assist devices.

PubMed

Sumikura, Hirohito; Homma, Akihiko; Ohnuma, Kentaro; Taenaka, Yoshiyuki; Takewa, Yoshiaki; Mukaibayashi, Hiroshi; Katano, Kazuo; Tatsumi, Eisuke

2013-06-01

We developed a novel endurance test system that can arbitrarily set various circulatory conditions and has durability and stability for long-term continuous evaluation of ventricular assist devices (VADs), and we evaluated its fundamental performance and prolonged durability and stability. The circulation circuit of the present endurance test system consisted of a pulsatile pump with a small closed chamber (SCC), a closed chamber, a reservoir and an electromagnetic proportional valve. Two duckbill valves were mounted in the inlet and outlet of the pulsatile pump. The features of the circulation circuit are as follows: (1) the components of the circulation circuit consist of optimized industrial devices, giving durability; (2) the pulsatile pump can change the heart rate and stroke length (SL), as well as its compliance using the SCC. Therefore, the endurance test system can quantitatively reproduce various circulatory conditions. The range of reproducible circulatory conditions in the endurance test circuit was examined in terms of fundamental performance. Additionally, continuous operation for 6 months was performed in order to evaluate the durability and stability. The circulation circuit was able to set up a wide range of pressure and total flow conditions using the SCC and adjusting the pulsatile pump SL. The long-term continuous operation test demonstrated that stable, continuous operation for 6 months was possible without leakage or industrial device failure. The newly developed endurance test system demonstrated a wide range of reproducible circulatory conditions, durability and stability, and is a promising approach for evaluating the basic characteristics of VADs.

Complete or partial reduction of the Met receptor tyrosine kinase in distinct circuits differentially impacts mouse behavior.

PubMed

Thompson, Barbara L; Levitt, Pat

2015-01-01

Our laboratory discovered that the gene encoding the receptor tyrosine kinase, MET, contributes to autism risk. Expression of MET is reduced in human postmortem temporal lobe in autism and Rett Syndrome. Subsequent studies revealed a role for MET in human and mouse functional and structural cortical connectivity. To further understand the contribution of Met to brain development and its impact on behavior, we generated two conditional mouse lines in which Met is deleted from select populations of central nervous system neurons. Mice were then tested to determine the consequences of disrupting Met expression. Mating of Emx1 (cre) and Met (fx/fx) mice eliminates receptor signaling from all cells arising from the dorsal pallium. Met (fx/fx) and Nestin (cre) crosses result in receptor signaling elimination from all neural cells. Behavioral tests were performed to assess cognitive, emotional, and social impairments that are observed in multiple neurodevelopmental disorders and that are in part subserved by circuits that express Met. Met (fx/fx) /Emx1 (cre) null mice displayed significant hypoactivity in the activity chamber and in the T-maze despite superior performance on the rotarod. Additionally, these animals showed a deficit in spontaneous alternation. Surprisingly, Met (fx/fx; fx/+) /Nestin (cre) null and heterozygous mice exhibited deficits in contextual fear conditioning, and Met (fx/+) /Nestin (cre) heterozygous mice spent less time in the closed arms of the elevated plus maze. These data suggest a complex contribution of Met in the development of circuits mediating social, emotional, and cognitive behavior. The impact of disrupting developmental Met expression is dependent upon circuit-specific deletion patterns and levels of receptor activity.

Energy structure of MHD flow coupling with outer resistance circuit

NASA Astrophysics Data System (ADS)

Huang, Z. Y.; Liu, Y. J.; Chen, Y. Q.; Peng, Z. L.

2015-08-01

Energy structure of MHD flow coupling with outer resistance circuit is studied to illuminate qualitatively and quantitatively the energy relation of this basic MHD flow system with energy input and output. Energy structure are analytically derived based on the Navier-Stocks equations for two-dimensional fully-developed flow and generalized Ohm's Law. The influences of applied magnetic field, Hall parameter and conductivity on energy structure are discussed based on the analytical results. Associated energies in MHD flow are deduced and validated by energy conservation. These results reveal that energy structure consists of two sub structures: electrical energy structure and internal energy structure. Energy structure and its sub structures provide an integrated theoretical energy path of the MHD system. Applied magnetic field and conductivity decrease the input energy, dissipation by fluid viscosity and internal energy but increase the ratio of electrical energy to input energy, while Hall parameter has the opposite effects. These are caused by their different effects on Bulk velocity, velocity profiles, voltage and current in outer circuit. Understanding energy structure helps MHD application designers to actively adjust the allocation of different parts of energy so that it is more reasonable and desirable.

Modelling of piezoelectric actuator dynamics for active structural control

NASA Technical Reports Server (NTRS)

Hagood, Nesbitt W.; Chung, Walter H.; Von Flotow, Andreas

1990-01-01

The paper models the effects of dynamic coupling between a structure and an electrical network through the piezoelectric effect. The coupled equations of motion of an arbitrary elastic structure with piezoelectric elements and passive electronics are derived. State space models are developed for three important cases: direct voltage driven electrodes, direct charge driven electrodes, and an indirect drive case where the piezoelectric electrodes are connected to an arbitrary electrical circuit with embedded voltage and current sources. The equations are applied to the case of a cantilevered beam with surface mounted piezoceramics and indirect voltage and current drive. The theoretical derivations are validated experimentally on an actively controlled cantilevered beam test article with indirect voltage drive.

Digital MOS integrated circuits

NASA Astrophysics Data System (ADS)

Elmasry, M. I.

MOS in digital circuit design is considered along with aspects of digital VLSI, taking into account a comparison of MOSFET logic circuits, 1-micrometer MOSFET VLSI technology, a generalized guide for MOSFET miniaturization, processing technologies, novel circuit structures for VLSI, and questions of circuit and system design for VLSI. MOS memory cells and circuits are discussed, giving attention to a survey of high-density dynamic RAM cell concepts, one-device cells for dynamic random-access memories, variable resistance polysilicon for high density CMOS Ram, high performance MOS EPROMs using a stacked-gate cell, and the optimization of the latching pulse for dynamic flip-flop sensors. Programmable logic arrays are considered along with digital signal processors, microprocessors, static RAMs, and dynamic RAMs.

Testbed Experiment for SPIDER: A Photonic Integrated Circuit-based Interferometric imaging system

NASA Astrophysics Data System (ADS)

Badham, K.; Duncan, A.; Kendrick, R. L.; Wuchenich, D.; Ogden, C.; Chriqui, G.; Thurman, S. T.; Su, T.; Lai, W.; Chun, J.; Li, S.; Liu, G.; Yoo, S. J. B.

The Lockheed Martin Advanced Technology Center (LM ATC) and the University of California at Davis (UC Davis) are developing an electro-optical (EO) imaging sensor called SPIDER (Segmented Planar Imaging Detector for Electro-optical Reconnaissance) that seeks to provide a 10x to 100x size, weight, and power (SWaP) reduction alternative to the traditional bulky optical telescope and focal-plane detector array. The substantial reductions in SWaP would reduce cost and/or provide higher resolution by enabling a larger-aperture imager in a constrained volume. Our SPIDER imager replaces the traditional optical telescope and digital focal plane detector array with a densely packed interferometer array based on emerging photonic integrated circuit (PIC) technologies that samples the object being imaged in the Fourier domain (i.e., spatial frequency domain), and then reconstructs an image. Our approach replaces the large optics and structures required by a conventional telescope with PICs that are accommodated by standard lithographic fabrication techniques (e.g., complementary metal-oxide-semiconductor (CMOS) fabrication). The standard EO payload integration and test process that involves precision alignment and test of optical components to form a diffraction limited telescope is, therefore, replaced by in-process integration and test as part of the PIC fabrication, which substantially reduces associated schedule and cost. In this paper we describe the photonic integrated circuit design and the testbed used to create the first images of extended scenes. We summarize the image reconstruction steps and present the final images. We also describe our next generation PIC design for a larger (16x area, 4x field of view) image.

Three-Function Logic Gate Controlled by Analog Voltage

NASA Technical Reports Server (NTRS)

Zebulum, Ricardo; Stoica, Adrian

2006-01-01

The figure is a schematic diagram of a complementary metal oxide/semiconductor (CMOS) electronic circuit that performs one of three different logic functions, depending on the level of an externally applied control voltage, V(sub sel). Specifically, the circuit acts as A NAND gate at V(sub sel) = 0.0 V, A wire (the output equals one of the inputs) at V(sub sel) = 1.0 V, or An AND gate at V(sub sel) = -1.8 V. [The nominal power-supply potential (VDD) and logic "1" potential of this circuit is 1.8 V.] Like other multifunctional circuits described in several prior NASA Tech Briefs articles, this circuit was synthesized following an automated evolutionary approach that is so named because it is modeled partly after the repetitive trial-and-error process of biological evolution. An evolved circuit can be tested by computational simulation and/or tested in real hardware, and the results of the test can provide guidance for refining the design through further iteration. The evolutionary synthesis of electronic circuits can now be implemented by means of a software package Genetic Algorithms for Circuit Synthesis (GACS) that was developed specifically for this purpose. GACS was used to synthesize the present trifunctional circuit. As in the cases of other multifunctional circuits described in several prior NASA Tech Briefs articles, the multiple functionality of this circuit, the use of a single control voltage to select the function, and the automated evolutionary approach to synthesis all contribute synergistically to a combination of features that are potentially advantageous for the further development of robust, multiple-function logic circuits, including, especially, field-programmable gate arrays (FPGAs). These advantages include the following: This circuit contains only 9 transistors about half the number of transistors that would be needed to obtain equivalent NAND/wire/AND functionality by use of components from a standard digital design library. If multifunctional gates like this circuit were used in the place of the configurable logic blocks of present commercial FPGAs, it would be possible to change the functions of the resulting digital systems within shorter times. For example, by changing a single control voltage, one could change the function of thousands of FPGA cells within nanoseconds. In contrast, typically, the reconfiguration in a conventional FPGA by use of bits downloaded from look-up tables via a digital bus takes microseconds.

Development of a Three-Tier Test to Assess Misconceptions about Simple Electric Circuits

ERIC Educational Resources Information Center

Pesman, Haki; Eryilmaz, Ali

2010-01-01

The authors aimed to propose a valid and reliable diagnostic instrument by developing a three-tier test on simple electric circuits. Based on findings from the interviews, open-ended questions, and the related literature, the test was developed and administered to 124 high school students. In addition to some qualitative techniques for…

Optimal Topology and Experimental Evaluation of Piezoelectric Materials for Actively Shunted General Electric Polymer Matrix Fiber Composite Blades

NASA Technical Reports Server (NTRS)

Choi, Benjamin B.; Duffy, Kirsten; Kauffman, Jeffrey L.; Kray, Nicholas

2012-01-01

NASA Glenn Research Center, in collaboration with GE Aviation, has begun the development of a smart adaptive structure system with piezoelectric (PE) transducers to improve composite fan blade damping at resonances. Traditional resonant damping approaches may not be realistic for rotating frame applications such as engine blades. The limited space in which the blades reside in the engine makes it impossible to accommodate the circuit size required to implement passive resonant damping. Thus, a novel digital shunt scheme has been developed to replace the conventional electric passive shunt circuits. The digital shunt dissipates strain energy through the load resistor on a power amplifier. General Electric (GE) designed and fabricated a variety of polymer matrix fiber composite (PMFC) test specimens. Investigating the optimal topology of PE sensors and actuators for each test specimen has revealed the best PE transducer location for each target mode. Also a variety of flexible patches, which can conform to the blade surface, have been tested to identify the best performing PE patch. The active damping control achieved significant performance at target modes. This work has been highlighted by successful spin testing up to 5000 rpm of subscale GEnx composite blades in Glenn s Dynamic Spin Rig.

Distribution system model calibration with big data from AMI and PV inverters

DOE PAGES

Peppanen, Jouni; Reno, Matthew J.; Broderick, Robert J.; ...

2016-03-03

Efficient management and coordination of distributed energy resources with advanced automation schemes requires accurate distribution system modeling and monitoring. Big data from smart meters and photovoltaic (PV) micro-inverters can be leveraged to calibrate existing utility models. This paper presents computationally efficient distribution system parameter estimation algorithms to improve the accuracy of existing utility feeder radial secondary circuit model parameters. The method is demonstrated using a real utility feeder model with advanced metering infrastructure (AMI) and PV micro-inverters, along with alternative parameter estimation approaches that can be used to improve secondary circuit models when limited measurement data is available. Lastly, themore » parameter estimation accuracy is demonstrated for both a three-phase test circuit with typical secondary circuit topologies and single-phase secondary circuits in a real mixed-phase test system.« less

Distribution system model calibration with big data from AMI and PV inverters

DOE Office of Scientific and Technical Information (OSTI.GOV)

Peppanen, Jouni; Reno, Matthew J.; Broderick, Robert J.

Efficient management and coordination of distributed energy resources with advanced automation schemes requires accurate distribution system modeling and monitoring. Big data from smart meters and photovoltaic (PV) micro-inverters can be leveraged to calibrate existing utility models. This paper presents computationally efficient distribution system parameter estimation algorithms to improve the accuracy of existing utility feeder radial secondary circuit model parameters. The method is demonstrated using a real utility feeder model with advanced metering infrastructure (AMI) and PV micro-inverters, along with alternative parameter estimation approaches that can be used to improve secondary circuit models when limited measurement data is available. Lastly, themore » parameter estimation accuracy is demonstrated for both a three-phase test circuit with typical secondary circuit topologies and single-phase secondary circuits in a real mixed-phase test system.« less

Taped Random Spectra for Reliability Demonstration Testing

DTIC Science & Technology

1981-04-01

circuit , barrier strip terminals 9A and 9B. Closure of the normally-open contacts provides the gate current necessary to trigger the control TRIAC ... Circuit contains a TRIAC , DIAC, Reed Relay (R3) and the Tape Running Relay Driver. The Cam on/off switching is accomplished through the barrier strip...2-25 2I; Input Power Circuit .. .. .... ...... ...... ...... ........... 2-26 2-13 Typical Control Circuit

Gated high speed optical detector

NASA Technical Reports Server (NTRS)

Green, S. I.; Carson, L. M.; Neal, G. W.

1973-01-01

The design, fabrication, and test of two gated, high speed optical detectors for use in high speed digital laser communication links are discussed. The optical detectors used a dynamic crossed field photomultiplier and electronics including dc bias and RF drive circuits, automatic remote synchronization circuits, automatic gain control circuits, and threshold detection circuits. The equipment is used to detect binary encoded signals from a mode locked neodynium laser.

Use of the quartz crystal microbalance to determine the monomeric friction coefficient of polyimides

NASA Technical Reports Server (NTRS)

Bechtold, Mary M.

1995-01-01

When a thin film of polymer is coated on to a quartz crystal microbalance (QCM), the QCM can be used to detect the rate of increase in weight of the polymer film as the volatile penetrant diffuses into the polymer. From this rate information the diffusion coefficient of the penetrant into the polymer can be computed. Calculations requiring this diffusion coefficient lead to values which approximate the monomeric friction coefficient of the polymer. This project has been concerned with the trial of crystal oscillating circuits suitable for driving polymer coated crystals in an atmosphere of penetrant. For these studies done at room temperature, natural rubber was used as an easily applied polymer that is readily penetrated by toluene vapors, qualities anticipated with polyimides when they are tested at T(g) in the presence of toluene. Three quartz crystal oscillator circuits were tested. The simplest circuit used +/- 5 volt dc and had a transistor to transistor logic (TTL) inverter chip that provides a 180 deg phase shift via a feed back loop. This oscillator circuit was stable but would not drive the crystal when the crystal was coated with polymer and subjected to toluene vapors. Removal of a variable resistor from this circuit increased stability but did not otherwise increase performance. Another driver circuit tested contained a two stage differential input, differential output, wide band video amplifier and also contain a feed back loop. The circuit voltage could not be varied and operated at +/- 5 volts dc; this circuit was also stable but failed to oscillate the polymer coated crystal in an atmosphere saturated with toluene vapors. The third oscillator circuit was of similar construction and relied on the same video amplifier but allowed operation with variable voltage. This circuit would drive the crystal when the crystal was submerged in liquid toluene and when the crystal was coated with polymer and immersed in toluene vapors. The frequency readings obtained when using this oscillating circuit are highly variable. This circuit requires further modification to stabilize frequency readings before its use in studies to determine the diffusion coefficient of penetrant molecules into a polymer film coated on a QCM.

Optogenetic interrogation of neural circuits: technology for probing mammalian brain structures

PubMed Central

Zhang, Feng; Gradinaru, Viviana; Adamantidis, Antoine R; Durand, Remy; Airan, Raag D; de Lecea, Luis; Deisseroth, Karl

2015-01-01

Elucidation of the neural substrates underlying complex animal behaviors depends on precise activity control tools, as well as compatible readout methods. Recent developments in optogenetics have addressed this need, opening up new possibilities for systems neuroscience. Interrogation of even deep neural circuits can be conducted by directly probing the necessity and sufficiency of defined circuit elements with millisecond-scale, cell type-specific optical perturbations, coupled with suitable readouts such as electrophysiology, optical circuit dynamics measures and freely moving behavior in mammals. Here we collect in detail our strategies for delivering microbial opsin genes to deep mammalian brain structures in vivo, along with protocols for integrating the resulting optical control with compatible readouts (electrophysiological, optical and behavioral). The procedures described here, from initial virus preparation to systems-level functional readout, can be completed within 4–5 weeks. Together, these methods may help in providing circuit-level insight into the dynamics underlying complex mammalian behaviors in health and disease. PMID:20203662

Compact, high-speed algorithm for laying out printed circuit board runs

NASA Astrophysics Data System (ADS)

Zapolotskiy, D. Y.

1985-09-01

A high speed printed circuit connection layout algorithm is described which was developed within the framework of an interactive system for designing two-sided printed circuit broads. For this reason, algorithm speed was considered, a priori, as a requirement equally as important as the inherent demand for minimizing circuit run lengths and the number of junction openings. This resulted from the fact that, in order to provide psychological man/machine compatibility in the design process, real-time dialog during the layout phase is possible only within limited time frames (on the order of several seconds) for each circuit run. The work was carried out for use on an ARM-R automated work site complex based on an SM-4 minicomputer with a 32K-word memory. This limited memory capacity heightened the demand for algorithm speed and also tightened data file structure and size requirements. The layout algorithm's design logic is analyzed. The structure and organization of the data files are described.

Three dimensional, multi-chip module

DOEpatents

Bernhardt, A.F.; Petersen, R.W.

1993-08-31

A plurality of multi-chip modules are stacked and bonded around the perimeter by sold-bump bonds to adjacent modules on, for instance, three sides of the perimeter. The fourth side can be used for coolant distribution, for more interconnect structures, or other features, depending on particular design considerations of the chip set. The multi-chip modules comprise a circuit board, having a planarized interconnect structure formed on a first major surface, and integrated circuit chips bonded to the planarized interconnect surface. Around the periphery of each circuit board, long, narrow dummy chips'' are bonded to the finished circuit board to form a perimeter wall. The wall is higher than any of the chips on the circuit board, so that the flat back surface of the board above will only touch the perimeter wall. Module-to-module interconnect is laser-patterned on the sides of the boards and over the perimeter wall in the same way and at the same time that chip to board interconnect may be laser-patterned.

Three dimensional, multi-chip module

DOEpatents

Bernhardt, Anthony F.; Petersen, Robert W.

1993-01-01

A plurality of multi-chip modules are stacked and bonded around the perimeter by sold-bump bonds to adjacent modules on, for instance, three sides of the perimeter. The fourth side can be used for coolant distribution, for more interconnect structures, or other features, depending on particular design considerations of the chip set. The multi-chip modules comprise a circuit board, having a planarized interconnect structure formed on a first major surface, and integrated circuit chips bonded to the planarized interconnect surface. Around the periphery of each circuit board, long, narrow "dummy chips" are bonded to the finished circuit board to form a perimeter wall. The wall is higher than any of the chips on the circuit board, so that the flat back surface of the board above will only touch the perimeter wall. Module-to-module interconnect is laser-patterned o the sides of the boards and over the perimeter wall in the same way and at the same time that chip to board interconnect may be laser-patterned.

Method of preforming and assembling superconducting circuit elements

NASA Astrophysics Data System (ADS)

Haertling, Gene H.; Buckley, John D.

1991-03-01

The invention is a method of preforming and pretesting rigid and discrete superconductor circuit elements to optimize the superconductivity development of the preformed circuit element prior to its assembly, and encapsulation on a substrate and final environmental testing of the assembled ceramic superconductive elements.

Titanium-containing zeolites and microporous molecular sieves as photovoltaic solar cells.

PubMed

Atienzar, Pedro; Valencia, Susana; Corma, Avelino; García, Hermenegildo

2007-05-14

Four titanium-containing zeolites and microporous molecular sieves differing on the crystal structure and particle size (Ti/Beta, Ti/Beta-60, TS-1 and ETS-10) are prepared, and their activity for solar cells after incorporating N3 (a commercially available ruthenium polypyridyl dye) is tested. All the zeolites exhibit photovoltaic activity, and the photoresponse is quite independent of the zeolite pore dimensions or particle size. The photoresponse increases with titanium content in the range 1-7% wt. In this way, cells are obtained that have open-circuit voltage Voc=560 mV and maximum short-circuit photocurrent density Isc=100 microA, measured for 1x1 cm2 surfaces with a solar simulator at 1000 W through and AM 1.5 filter. These values are promising and comparable to those obtained for current dye-sensitized titania solar cells.

Studies of silicon PN junction solar cells

NASA Technical Reports Server (NTRS)

Lindholm, F. A.

1975-01-01

Silicon pn junction solar cells made with low-resistivity substrates show poorer performance than traditional theory predicts. The purpose of this research was to identify and characterize the physical mechanisms responsible for the discrepancy. Attention was concentrated on the open circuit voltage in shallow junction cells of 0.1 ohm-cm substrate resistivity. A number of possible mechanisms that can occur in silicon devices were considered. Two mechanisms which are likely to be of main importance in explaining the observed low values of open-circuit voltage were found: (1) recombination losses associated with defects introduced during junction formation, and (2) inhomogeneity of defects and impurities across the area of the cell. To explore these theoretical anticipations, various diode test structures were designed and fabricated and measurement configurations for characterizing the defect properties and the areal inhomogeneity were constructed.

Investigation of Pressure Surges in Aircraft Hydraulic Systems

DTIC Science & Technology

1952-03-01

RESTRICTED Figure 2 TEST APPARATUS FOR CLOSED-END TUBE SYSTEM TESTS , r WADC TR52-37 10 SECURITY INFORMATION-RESTRICTED SECURITY INFORMATION -R ESTR ICTED...simplified circuitto--decrease the labor involved in circuit solutions by manual calculation. The circuit developed for the basic accumulator, valve

Survey Of High Speed Test Techniques

NASA Astrophysics Data System (ADS)

Gheewala, Tushar

1988-02-01

The emerging technologies for the characterization and production testing of high-speed devices and integrated circuits are reviewed. The continuing progress in the field of semiconductor technologies will, in the near future, demand test techniques to test 10ps to lOOps gate delays, 10 GHz to 100 GHz analog functions and 10,000 to 100,000 gates on a single chip. Clearly, no single test technique would provide a cost-effective answer to all the above demands. A divide-and-conquer approach based on a judicial selection of parametric, functional and high-speed tests will be required. In addition, design-for-test methods need to be pursued which will include on-chip test electronics as well as circuit techniques that minimize the circuit performance sensitivity to allowable process variations. The electron and laser beam based test technologies look very promising and may provide the much needed solutions to not only the high-speed test problem but also to the need for high levels of fault coverage during functional testing.

Ferruleless coupled-cavity traveling-wave tube cold-test characteristics simulated with micro-SOS

NASA Technical Reports Server (NTRS)

Schroeder, Dana L.; Wilson, Jeffrey D.

1993-01-01

The three-dimensional, electromagnetic circuit analysis code, Micro-SOS, can be used to reduce expensive and time consuming experimental 'cold-testing' of traveling-wave tube (TWT) circuits. The frequency-phase dispersion and beam interaction impedance characteristics of a ferruleless coupled-cavity traveling-wave tube slow-wave circuit were simulated using the code. Computer results agree closely with experimental data. Variations in the cavity geometry dimensions of period length and gap-to-period ratio were modeled. These variations can be used in velocity taper designs to reduce the radiofrequency (RF) phase velocity in synchronism with the decelerating electron beam. Such circuit designs can result in enhanced TWT power and efficiency.

Function-specific and Enhanced Brain Structural Connectivity Mapping via Joint Modeling of Diffusion and Functional MRI.

PubMed

Chu, Shu-Hsien; Parhi, Keshab K; Lenglet, Christophe

2018-03-16

A joint structural-functional brain network model is presented, which enables the discovery of function-specific brain circuits, and recovers structural connections that are under-estimated by diffusion MRI (dMRI). Incorporating information from functional MRI (fMRI) into diffusion MRI to estimate brain circuits is a challenging task. Usually, seed regions for tractography are selected from fMRI activation maps to extract the white matter pathways of interest. The proposed method jointly analyzes whole brain dMRI and fMRI data, allowing the estimation of complete function-specific structural networks instead of interactively investigating the connectivity of individual cortical/sub-cortical areas. Additionally, tractography techniques are prone to limitations, which can result in erroneous pathways. The proposed framework explicitly models the interactions between structural and functional connectivity measures thereby improving anatomical circuit estimation. Results on Human Connectome Project (HCP) data demonstrate the benefits of the approach by successfully identifying function-specific anatomical circuits, such as the language and resting-state networks. In contrast to correlation-based or independent component analysis (ICA) functional connectivity mapping, detailed anatomical connectivity patterns are revealed for each functional module. Results on a phantom (Fibercup) also indicate improvements in structural connectivity mapping by rejecting false-positive connections with insufficient support from fMRI, and enhancing under-estimated connectivity with strong functional correlation.

Model of lightning strike to a steel reinforce structure using PSpice

NASA Astrophysics Data System (ADS)

Koone, Neil; Condren, Brian

2003-03-01

Surges and arcs from lightning can pose hazards to personnel and sensitive equipment and processes. Steel reinforcement in structures can act as a Faraday cage mitigating lightning effects. Knowing a structure's response to a lightning strike allows hazards associated with lightning to be analyzed. A model of lightning's response in a steel reinforced structure has been developed using PSpice (a commercial circuit simulation). Segments of rebar are modeled as inductors and resistors in series. A program has been written to take architectural information of a steel reinforced structure and "build" a circuit network that is analogous to the network of reinforcement in a facility. A severe current waveform (simulating a 99th percentile lightning strike), modeled as a current source, is introduced in the circuit network, and potential differences within the structure are determined using PSpice. A visual three-dimensional model of the facility displays the voltage distribution across the structure using color to indicate the potential difference relative to the floor. Clear air arcing distances can be calculated from the voltage distribution using a conservative value for the dielectric breakdown strength of air.

Molecular interfaces for plasmonic hot electron photovoltaics

NASA Astrophysics Data System (ADS)

Pelayo García de Arquer, F.; Mihi, Agustín; Konstantatos, Gerasimos

2015-01-01

The use of self-assembled monolayers (SAMs) to improve and tailor the photovoltaic performance of plasmonic hot-electron Schottky solar cells is presented. SAMs allow the simultaneous control of open-circuit voltage, hot-electron injection and short-circuit current. To that end, a plurality of molecule structural parameters can be adjusted: SAM molecule's length can be adjusted to control plasmonic hot electron injection. Modifying SAMs dipole moment allows for a precise tuning of the open-circuit voltage. The functionalization of the SAM can also be selected to modify short-circuit current. This allows the simultaneous achievement of high open-circuit voltages (0.56 V) and fill-factors (0.58), IPCE above 5% at the plasmon resonance and maximum power-conversion efficiencies of 0.11%, record for this class of devices.The use of self-assembled monolayers (SAMs) to improve and tailor the photovoltaic performance of plasmonic hot-electron Schottky solar cells is presented. SAMs allow the simultaneous control of open-circuit voltage, hot-electron injection and short-circuit current. To that end, a plurality of molecule structural parameters can be adjusted: SAM molecule's length can be adjusted to control plasmonic hot electron injection. Modifying SAMs dipole moment allows for a precise tuning of the open-circuit voltage. The functionalization of the SAM can also be selected to modify short-circuit current. This allows the simultaneous achievement of high open-circuit voltages (0.56 V) and fill-factors (0.58), IPCE above 5% at the plasmon resonance and maximum power-conversion efficiencies of 0.11%, record for this class of devices. Electronic supplementary information (ESI) available: Contact-potential differentiometry measurements, FTIR characterization, performance statistics and gold devices. See DOI: 10.1039/c4nr06356b

Fluid Power Multi-actuator Circuit Board with Microcomputer Control Option.

ERIC Educational Resources Information Center

McKechnie, R. E.; Vickers, G. W.

1981-01-01

Describes a portable fluid power engineering laboratory and class demonstration apparatus designed to enable students to design, build, and test multi-actuator circuits. Features a variety of standard pneumatic values and actuators fitted with quick disconnect couplings. Discusses sequencing circuit boards, microcomputer control, cost, and…

Electroshock protection circuit

NASA Technical Reports Server (NTRS)

Heskett, H.; Meincer, J.; Inglis, A. L.

1973-01-01

Circuit was developed to prevent accidental shock through electrodes used to test subjects as part of Skylab program. This circuit is placed between electrical apparatus and electrode that is attached to patient's body. Thus, patient is effectively protected from dangerous electrical shock that might be caused by failure in electrical apparatus.

Response of Nuclear Power Plant Instrumentation Cables Exposed to Fire Conditions.

DOE Office of Scientific and Technical Information (OSTI.GOV)

Muna, Alice Baca; LaFleur, Chris Bensdotter; Brooks, Dusty Marie

This report presents the results of instrumentation cable tests sponsored by the US Nuclear Regulatory Commission (NRC) Office of Nuclear Regulatory Research and performed at Sandia National Laboratories (SNL). The goal of the tests was to assess thermal and electrical response behavior under fire-exposure conditions for instrumentation cables and circuits. The test objective was to assess how severe radiant heating conditions surrounding an instrumentation cable affect current or voltage signals in an instrumentation circuit. A total of thirty-nine small-scale tests were conducted. Ten different instrumentation cables were tested, ranging from one conductor to eight-twisted pairs. Because the focus of themore » tests was thermoset (TS) cables, only two of the ten cables had thermoplastic (TP) insulation and jacket material and the remaining eight cables were one of three different TS insulation and jacket material. Two instrumentation cables from previous cable fire testing were included, one TS and one TP. Three test circuits were used to simulate instrumentation circuits present in nuclear power plants: a 4–20 mA current loop, a 10–50 mA current loop and a 1–5 VDC voltage loop. A regression analysis was conducted to determine key variables affecting signal leakage time.« less

Design, Fabrication and Integration of a NaK-Cooled Circuit

NASA Technical Reports Server (NTRS)

Garber, Anne; Godfroy, Thomas

2006-01-01

The Early Flight Fission Test Facilities (EFF-TF) team has been tasked by the NASA Marshall Space Flight Center Nuclear Systems Office to design, fabricate, and test an actively pumped alkali metal flow circuit. The system, which was originally designed for use with a eutectic mixture of sodium potassium (NaK), was redesigned to for use with lithium. Due to a shi$ in focus, it is once again being prepared for use with NaK. Changes made to the actively pumped, high temperature circuit include the replacement of the expansion reservoir, addition of remotely operated valves, and modification of the support table. Basic circuit components include: reactor segment, NaK to gas heat exchanger, electromagnetic (EM) liquid metal pump, load/drain reservoir, expansion reservoir, instrumentation, and a spill reservoir. A 37-pin partial-array core (pin and flow path dimensions are the same as those in a fill design) was selected for fabrication and test. This paper summarizes the integration and preparations for the fill of the pumped liquid metal NaK flow circuit.

Analysis of strain gage reliability in F-100 jet engine testing at NASA Lewis Research Center

NASA Technical Reports Server (NTRS)

Holanda, R.

1983-01-01

A reliability analysis was performed on 64 strain gage systems mounted on the 3 rotor stages of the fan of a YF-100 engine. The strain gages were used in a 65 hour fan flutter research program which included about 5 hours of blade flutter. The analysis was part of a reliability improvement program. Eighty-four percent of the strain gages survived the test and performed satisfactorily. A post test analysis determined most failure causes. Five failures were caused by open circuits, three failed gages showed elevated circuit resistance, and one gage circuit was grounded. One failure was undetermined.

Visible rodent brain-wide networks at single-neuron resolution

PubMed Central

Yuan, Jing; Gong, Hui; Li, Anan; Li, Xiangning; Chen, Shangbin; Zeng, Shaoqun; Luo, Qingming

2015-01-01

There are some unsolvable fundamental questions, such as cell type classification, neural circuit tracing and neurovascular coupling, though great progresses are being made in neuroscience. Because of the structural features of neurons and neural circuits, the solution of these questions needs us to break through the current technology of neuroanatomy for acquiring the exactly fine morphology of neuron and vessels and tracing long-distant circuit at axonal resolution in the whole brain of mammals. Combined with fast-developing labeling techniques, efficient whole-brain optical imaging technology emerging at the right moment presents a huge potential in the structure and function research of specific-function neuron and neural circuit. In this review, we summarize brain-wide optical tomography techniques, review the progress on visible brain neuronal/vascular networks benefit from these novel techniques, and prospect the future technical development. PMID:26074784

The Induction of Chaos in Electronic Circuits Final Report-October 1, 2001

DOE Office of Scientific and Technical Information (OSTI.GOV)

R.M.Wheat, Jr.

2003-04-01

This project, now known by the name ''Chaos in Electronic Circuits,'' was originally tasked as a two-year project to examine various ''fault'' or ''non-normal'' operational states of common electronic circuits with some focus on determining the feasibility of exploiting these states. Efforts over the two-year duration of this project have been dominated by the study of the chaotic behavior of electronic circuits. These efforts have included setting up laboratory space and hardware for conducting laboratory tests and experiments, acquiring and developing computer simulation and analysis capabilities, conducting literature surveys, developing test circuitry and computer models to exercise and test ourmore » capabilities, and experimenting with and studying the use of RF injection as a means of inducing chaotic behavior in electronics. An extensive array of nonlinear time series analysis tools have been developed and integrated into a package named ''After Acquisition'' (AA), including capabilities such as Delayed Coordinate Embedding Mapping (DCEM), Time Resolved (3-D) Fourier Transform, and several other phase space re-creation methods. Many computer models have been developed for Spice and for the ATP (Alternative Transients Program), modeling the several working circuits that have been developed for use in the laboratory. And finally, methods of induction of chaos in electronic circuits have been explored.« less

Testing of Diode-Clamping in an Inductive Pulsed Plasma Thruster Circuit

NASA Technical Reports Server (NTRS)

Toftul, Alexandra; Polzin, Kurt A.; Martin, Adam K.; Hudgins, Jerry L.

2014-01-01

Testing of a 5.5 kV silicon (Si) diode and 5.8 kV prototype silicon carbide (SiC) diode in an inductive pulsed plasma thruster (IPPT) circuit was performed to obtain a comparison of the resulting circuit recapture efficiency,eta(sub r), defined as the percentage of the initial charge energy remaining on the capacitor bank after the diode interrupts the current. The diode was placed in a pulsed circuit in series with a silicon controlled rectifier (SCR) switch, and the voltages across different components and current waveforms were collected over a range of capacitor charge voltages. Reverse recovery parameters, including turn-off time and peak reverse recovery current, were measured and capacitor voltage waveforms were used to determine the recapture efficiency for each case. The Si fast recovery diode in the circuit was shown to yield a recapture efficiency of up to 20% for the conditions tested, while the SiC diode further increased recapture efficiency to nearly 30%. The data presented show that fast recovery diodes operate on a timescale that permits them to clamp the discharge quickly after the first half cycle, supporting the idea that diode-clamping in IPPT circuit reduces energy dissipation that occurs after the first half cycle

The objective structured clinical examination revisited for postgraduate trainees in general practice.

PubMed

Schoenmakers, Birgitte; Wens, Johan

2014-03-04

To investigate if the psychometric qualities of an OSCE consisting of more complex simulated patient encounters remain valid and reliable in the assessment of postgraduate trainees in general practice. In this intervention study without control group, the traditional OSCE was formally replaced by the new, complex version. The study population was composed by all postgraduate trainees (second and third phase) in general practice during the ongoing academic year. Data were handled and collected as part of the formal assessment program. Univariate analyses, the variance of scores and multivariate analyses were performed to assess the test qualities. A total of 340 students participated. Average final scores were slightly higher for third-phase students (t-test, p =0.05). Overall test scores were equally distributed on station level, circuit level and phase level. A multiple regression analysis revealed that test scores were dependent on the stations and circuits, but not on the master phase. In a changing learning environment, assessment and evaluation strategies require reorientation. The reliability and validity of the OSCE remain subject to discussion. In particular, when it comes to content and design, the traditional OSCE might underestimate the performance level of postgraduate trainees in general practice. A reshaping of this OSCE to a more sophisticated design with more complex patient encounters appears to restore the validity of the test results.

Design and implementation of a programming circuit in radiation-hardened FPGA

NASA Astrophysics Data System (ADS)

Lihua, Wu; Xiaowei, Han; Yan, Zhao; Zhongli, Liu; Fang, Yu; Chen, Stanley L.

2011-08-01

We present a novel programming circuit used in our radiation-hardened field programmable gate array (FPGA) chip. This circuit provides the ability to write user-defined configuration data into an FPGA and then read it back. The proposed circuit adopts the direct-access programming point scheme instead of the typical long token shift register chain. It not only saves area but also provides more flexible configuration operations. By configuring the proposed partial configuration control register, our smallest configuration section can be conveniently configured as a single data and a flexible partial configuration can be easily implemented. The hierarchical simulation scheme, optimization of the critical path and the elaborate layout plan make this circuit work well. Also, the radiation hardened by design programming point is introduced. This circuit has been implemented in a static random access memory (SRAM)-based FPGA fabricated by a 0.5 μm partial-depletion silicon-on-insulator CMOS process. The function test results of the fabricated chip indicate that this programming circuit successfully realizes the desired functions in the configuration and read-back. Moreover, the radiation test results indicate that the programming circuit has total dose tolerance of 1 × 105 rad(Si), dose rate survivability of 1.5 × 1011 rad(Si)/s and neutron fluence immunity of 1 × 1014 n/cm2.

Evaluation of high-voltage, high-power, solid-state remote power controllers for amps

NASA Technical Reports Server (NTRS)

Callis, Charles P.

1987-01-01

The Electrical Power Branch at Marshall Space Flight Center has a Power System Development Facility where various power circuit breadboards are tested and evaluated. This project relates to the evaluation of a particular remote power controller (RPC) energizing high power loads. The Facility equipment permits the thorough testing and evaluation of high-voltage, high-power solid-state remote power controllers. The purpose is to evaluate a Type E, 30 Ampere, 200 V dc remote power controller. Three phases of the RPC evaluation are presented. The RPC is evaluated within a low-voltage, low-power circuit to check its operational capability. The RPC is then evaluated while performing switch/circuit breaker functions within a 200 V dc, 30 Ampere power circuit. The final effort of the project relates to the recommended procedures for installing these RPC's into the existing Autonomously Managed Power System (AMPS) breadboard/test facility at MSFC.

Effect of the structure and mechanical properties of the near-surface layer of lithium niobate single crystals on the manufacture of integrated optic circuits

NASA Astrophysics Data System (ADS)

Sosunov, A. V.; Ponomarev, R. S.; Yur'ev, V. A.; Volyntsev, A. B.

2017-01-01

This paper shows that the near-surface layer of a lithium niobate single layer 15 μm in depth is essentially different from the rest of the volume of the material from the standpoint of composition, structure, and mechanical properties. The pointed out differences are due to the effect of cutting, polishing, and smoothing of the lithium niobate plates, which increase the density of point defects and dislocations. The increasing density of the structural defects leads to uncontrollable changes in the conditions of the formations of waveguides and the drifting of characteristics of integrated optical circuits. The results obtained are very important for the manufacture of lithium niobate based integrated optical circuits.

Implementation of Basic and Universal Gates In a single Circuit Based On Quantum-dot Cellular Automata Using Multi-Layer Crossbar Wire

NASA Astrophysics Data System (ADS)

Bhowmik, Dhrubajyoti; Saha, Apu Kr; Dutta, Paramartha; Nandi, Supratim

2017-08-01

Quantum-dot Cellular Automata (QCA) is one of the most substitutes developing nanotechnologies for electronic circuits, as a result of lower force utilization, higher speed and smaller size in correlation with CMOS innovation. The essential devices, a Quantum-dot cell can be utilized to logic gates and wires. As it is the key building block on nanotechnology circuits. By applying simple gates, the hardware requirements for a QCA circuit can be decreased and circuits can be less complex as far as level, delay and cell check. This article exhibits an unobtrusive methodology for actualizing novel upgraded simple and universal gates, which can be connected to outline numerous variations of complex QCA circuits. Proposed gates are straightforward in structure and capable as far as implementing any digital circuits. The main aim is to build all basic and universal gates in a simple circuit with and without crossbar-wire. Simulation results and physical relations affirm its handiness in actualizing each advanced circuit.

A framework for scalable parameter estimation of gene circuit models using structural information.

PubMed

Kuwahara, Hiroyuki; Fan, Ming; Wang, Suojin; Gao, Xin

2013-07-01

Systematic and scalable parameter estimation is a key to construct complex gene regulatory models and to ultimately facilitate an integrative systems biology approach to quantitatively understand the molecular mechanisms underpinning gene regulation. Here, we report a novel framework for efficient and scalable parameter estimation that focuses specifically on modeling of gene circuits. Exploiting the structure commonly found in gene circuit models, this framework decomposes a system of coupled rate equations into individual ones and efficiently integrates them separately to reconstruct the mean time evolution of the gene products. The accuracy of the parameter estimates is refined by iteratively increasing the accuracy of numerical integration using the model structure. As a case study, we applied our framework to four gene circuit models with complex dynamics based on three synthetic datasets and one time series microarray data set. We compared our framework to three state-of-the-art parameter estimation methods and found that our approach consistently generated higher quality parameter solutions efficiently. Although many general-purpose parameter estimation methods have been applied for modeling of gene circuits, our results suggest that the use of more tailored approaches to use domain-specific information may be a key to reverse engineering of complex biological systems. http://sfb.kaust.edu.sa/Pages/Software.aspx. Supplementary data are available at Bioinformatics online.

A reliable ground bounce noise reduction technique for nanoscale CMOS circuits

NASA Astrophysics Data System (ADS)

Sharma, Vijay Kumar; Pattanaik, Manisha

2015-11-01

Power gating is the most effective method to reduce the standby leakage power by adding header/footer high-VTH sleep transistors between actual and virtual power/ground rails. When a power gating circuit transitions from sleep mode to active mode, a large instantaneous charge current flows through the sleep transistors. Ground bounce noise (GBN) is the high voltage fluctuation on real ground rail during sleep mode to active mode transitions of power gating circuits. GBN disturbs the logic states of internal nodes of circuits. A novel and reliable power gating structure is proposed in this article to reduce the problem of GBN. The proposed structure contains low-VTH transistors in place of high-VTH footer. The proposed power gating structure not only reduces the GBN but also improves other performance metrics. A large mitigation of leakage power in both modes eliminates the need of high-VTH transistors. A comprehensive and comparative evaluation of proposed technique is presented in this article for a chain of 5-CMOS inverters. The simulation results are compared to other well-known GBN reduction circuit techniques at 22 nm predictive technology model (PTM) bulk CMOS model using HSPICE tool. Robustness against process, voltage and temperature (PVT) variations is estimated through Monte-Carlo simulations.

The design of a small flow optical sensor of particle counter

NASA Astrophysics Data System (ADS)

Zhan, Yongbo; zhang, Jianwei; Zeng, Jianxiong; Li, Bin; Chen, Lu

2018-01-01

Based on the principle of Mie scattering, we design a small flow optical sensor of particle counter. Firstly, laser illumination system was simulated and designed by ZEMAX optical design software, and the uniform light intensity of photosensitive area was obtained. The gas circuit structure was also designed according to the related theory of fluid mechanics. Then, the method of combining with MIST scattering calculation software and geometric modeling was firstly used to design spherical reflection system, on the basis of the formula of object-image distance. Finally, the test was conducted after the optical sensor placed in self-designed pre-amplification and high-speed processing circuit. The test results show that the counting efficiency of 0.3 μm gear is above 70%, 0.5 μm gear and 1.0 μm gear are both reached more than 90%, and the dispersion coefficient of each gear is very nearly the same, compared with the standard machine of Kanomax 3886 under the particle spraying flow of 2.5SCFH, 3.0SCFH, 3.5SCFH.

The steady-state flow quality in a model of a non-return wind tunnel

NASA Technical Reports Server (NTRS)

Mort, K. W.; Eckert, W. T.; Kelly, M. W.

1972-01-01

The structural cost of non-return wind tunnels is significantly less than that of the more conventional closed-circuit wind tunnels. However, because of the effects of external winds, the flow quality of non-return wind tunnels is an area of concern at the low test speeds required for V/STOL testing. The flow quality required at these low speeds is discussed and alternatives to the traditional manner of specifying the flow quality requirements in terms of dynamic pressure and angularity are suggested. The development of a non-return wind tunnel configuration which has good flow quality at low as well as at high test speeds is described.

Developing 300°C Ceramic Circuit Boards

DOE Office of Scientific and Technical Information (OSTI.GOV)

Normann, Randy A

2015-02-15

This paper covers the development of a geothermal ceramic circuit board technology using 3D traces in a machinable ceramic. Test results showing the circuit board to be operational to at least 550°C. Discussion on producing this type of board is outlined along with areas needing improvement.

75 FR 34170 - Circuit Science, Inc., Including Workers Whose Unemployment Insurance (UI) Wages Are Reported...

Federal Register 2010, 2011, 2012, 2013, 2014

2010-06-16

...., Including Workers Whose Unemployment Insurance (UI) Wages Are Reported Through Circuit Test; Plymouth, MN... employment at the subject firm had their wages reported under a separated unemployment insurance (UI) tax...., including workers whose unemployment insurance (UI) wages are reported through Circuit, Plymouth, Minnesota...

Design and implementation of GaAs HBT circuits with ACME

NASA Technical Reports Server (NTRS)

Hutchings, Brad L.; Carter, Tony M.

1993-01-01

GaAs HBT circuits offer high performance (5-20 GHz) and radiation hardness (500 Mrad) that is attractive for space applications. ACME is a CAD tool specifically developed for HBT circuits. ACME implements a novel physical schematic-capture design technique where designers simultaneously view the structure and physical organization of a circuit. ACME's design interface is similar to schematic capture; however, unlike conventional schematic capture, designers can directly control the physical placement of both function and interconnect at the schematic level. In addition, ACME provides design-time parasitic extraction, complex wire models, and extensions to Multi-Chip Modules (MCM's). A GaAs HBT gate-array and semi-custom circuits have been developed with ACME; several circuits have been fabricated and found to be fully functional .

Aircraft Material Fire Test Handbook

DTIC Science & Technology

1990-09-01

becomes extinguished for any period that exceeds 3 sec. A circuit for a satisfactory device is sketched in Figure 5-4. 5.3.8.2 Upper Pilot Burner An...34A model 470 Series Power controller manufactured by Eurotherm, a Model 3AEV 1B IOC I Triac manufactured by General Electric Co, or equivalent have...Compartment (galley or lavatory module ) An enclosure or shell structure with access provisions, such as a waste chute opening or doors, designed for

Levels at streamflow gaging stations

USGS Publications Warehouse

Kennedy, E.J.

1988-01-01

This manual establishes the surveying procedures for setting gages at a streamflow gaging station to datum and for checking them periodically for errors caused by vertical movement of the gage-supporting structures. The surveying terms and concepts used are explained; and the details of testing, adjusting, and operating the instruments are outlined. Notekeeping, adjusting level circuits, checking gages, summarizing results, locating the nearest National Geodetic Vertical Datum of 1929 bench mark, and relating the gage datum to the national datum are described.

A method for identifying EMI critical circuits during development of a large C3

NASA Astrophysics Data System (ADS)

Barr, Douglas H.

The circuit analysis methods and process Boeing Aerospace used on a large, ground-based military command, control, and communications (C3) system are described. This analysis was designed to help identify electromagnetic interference (EMI) critical circuits. The methodology used the MIL-E-6051 equipment criticality categories as the basis for defining critical circuits, relational database technology to help sort through and account for all of the approximately 5000 system signal cables, and Macintosh Plus personal computers to predict critical circuits based on safety margin analysis. The EMI circuit analysis process systematically examined all system circuits to identify which ones were likely to be EMI critical. The process used two separate, sequential safety margin analyses to identify critical circuits (conservative safety margin analysis, and detailed safety margin analysis). These analyses used field-to-wire and wire-to-wire coupling models using both worst-case and detailed circuit parameters (physical and electrical) to predict circuit safety margins. This process identified the predicted critical circuits that could then be verified by test.

The evolvability of programmable hardware.

PubMed

Raman, Karthik; Wagner, Andreas

2011-02-06

In biological systems, individual phenotypes are typically adopted by multiple genotypes. Examples include protein structure phenotypes, where each structure can be adopted by a myriad individual amino acid sequence genotypes. These genotypes form vast connected 'neutral networks' in genotype space. The size of such neutral networks endows biological systems not only with robustness to genetic change, but also with the ability to evolve a vast number of novel phenotypes that occur near any one neutral network. Whether technological systems can be designed to have similar properties is poorly understood. Here we ask this question for a class of programmable electronic circuits that compute digital logic functions. The functional flexibility of such circuits is important in many applications, including applications of evolutionary principles to circuit design. The functions they compute are at the heart of all digital computation. We explore a vast space of 10(45) logic circuits ('genotypes') and 10(19) logic functions ('phenotypes'). We demonstrate that circuits that compute the same logic function are connected in large neutral networks that span circuit space. Their robustness or fault-tolerance varies very widely. The vicinity of each neutral network contains circuits with a broad range of novel functions. Two circuits computing different functions can usually be converted into one another via few changes in their architecture. These observations show that properties important for the evolvability of biological systems exist in a commercially important class of electronic circuitry. They also point to generic ways to generate fault-tolerant, adaptable and evolvable electronic circuitry.

The evolvability of programmable hardware

PubMed Central

Raman, Karthik; Wagner, Andreas

2011-01-01

In biological systems, individual phenotypes are typically adopted by multiple genotypes. Examples include protein structure phenotypes, where each structure can be adopted by a myriad individual amino acid sequence genotypes. These genotypes form vast connected ‘neutral networks’ in genotype space. The size of such neutral networks endows biological systems not only with robustness to genetic change, but also with the ability to evolve a vast number of novel phenotypes that occur near any one neutral network. Whether technological systems can be designed to have similar properties is poorly understood. Here we ask this question for a class of programmable electronic circuits that compute digital logic functions. The functional flexibility of such circuits is important in many applications, including applications of evolutionary principles to circuit design. The functions they compute are at the heart of all digital computation. We explore a vast space of 1045 logic circuits (‘genotypes’) and 1019 logic functions (‘phenotypes’). We demonstrate that circuits that compute the same logic function are connected in large neutral networks that span circuit space. Their robustness or fault-tolerance varies very widely. The vicinity of each neutral network contains circuits with a broad range of novel functions. Two circuits computing different functions can usually be converted into one another via few changes in their architecture. These observations show that properties important for the evolvability of biological systems exist in a commercially important class of electronic circuitry. They also point to generic ways to generate fault-tolerant, adaptable and evolvable electronic circuitry. PMID:20534598

A design of driving circuit for star sensor imaging camera

NASA Astrophysics Data System (ADS)

Li, Da-wei; Yang, Xiao-xu; Han, Jun-feng; Liu, Zhao-hui

2016-01-01

The star sensor is a high-precision attitude sensitive measuring instruments, which determine spacecraft attitude by detecting different positions on the celestial sphere. Imaging camera is an important portion of star sensor. The purpose of this study is to design a driving circuit based on Kodak CCD sensor. The design of driving circuit based on Kodak KAI-04022 is discussed, and the timing of this CCD sensor is analyzed. By the driving circuit testing laboratory and imaging experiments, it is found that the driving circuits can meet the requirements of Kodak CCD sensor.

Relationship between physiological excitatory and inhibitory measures of excitability in the left vs. right human motor cortex and peripheral electrodermal activity.

PubMed

Bracco, Martina; Turriziani, Patrizia; Smirni, Daniela; Mangano, Renata Giuseppa; Oliveri, Massimiliano

2017-02-22

The current study was aimed at investigating the relationships of excitatory and inhibitory circuits of the left vs. right primary motor cortex with peripheral electrodermal activity (EDA). Ten healthy subjects participated in two experimental sessions. In each session, EDA was recorded for 10min from the palmar surface of the left hand. Immediately after EDA recording, Transcranial Magnetic Stimulation (TMS) was used to probe excitatory and inhibitory circuits of the left or right primary motor cortex using two protocols of stimulation: the input-output curve for recording of motor evoked potentials, for testing excitatory circuits; the long-interval cortical inhibition (LICI) protocol, for testing inhibitory circuits. In both cases, motor evoked potentials were recorded with surface electrodes from a contralateral hand muscle. The main results showed that in the right motor cortex, excitatory circuits directly correlate and inhibitory circuits inversely correlate with sympathetic activation. In the left motor cortex, both excitatory and inhibitory circuits are inversely correlated with sympathetic activation. These findings may suggest a bi-hemispheric mode of control of vegetative system by motor cortices, with the right hemisphere mainly involved in sympathetic control. Copyright © 2017. Published by Elsevier B.V.

Capacitance discharge system for ignition of Single Bridge Apollo Standard Initiators (SBASI)

NASA Technical Reports Server (NTRS)

Ward, R. D.

1974-01-01

The design support data developed during the single bridge Apollo standard initiator (SBASI) program are presented. A circuit was designed and bread-board tested to verify operational capabilities of the circuit. Test data, design criteria, weight, and reliability trade-off considerations, and final design recommendations are reported.

Transceiver Design for CMUT-Based Super-Resolution Ultrasound Imaging.

PubMed

Behnamfar, Parisa; Molavi, Reza; Mirabbasi, Shahriar

2016-04-01

A recently introduced structure for the capacitive micromachined ultrasonic transducers (CMUTs) has focused on the applications of the asymmetric mode of vibration and has shown promising results in construction of super-resolution ultrasound images. This paper presents the first implementation and experimental results of a transceiver circuit to interface such CMUT structures. The multiple input/multiple output receiver in this work supports both fundamental and asymmetric modes of operation and includes transimpedance amplifiers and low-power variable-gain stages. These circuit blocks are designed considering the trade-offs between gain, input impedance, noise, linearity and power consumption. The high-voltage transmitter can generate pulse voltages up to 60 V while occupying a considerably small area. The overall circuit is designed and laid out in a 0.35 μm CMOS process and a four-channel transceiver occupies 0.86 × 0.38 mm(2). The prototype chip is characterized in both electrical and mechanical domains. Measurement results show that each receiver channel has a nominal gain of 110 dBΩ with a 3 dB bandwidth of 9 MHz while consuming 1.02 mW from a 3.3 V supply. The receiver is also highly linear, with 1 dB compression point of minimum 1.05 V which is considerably higher than the previously reported designs. The transmitter consumes 98.1 mW from a 30 V supply while generating 1.38 MHz, 30 V pulses. The CMOS-CMUT system is tested in the transmit mode and shows full functionality in air medium.

Aminosilanization nanoadhesive layer for nanoelectric circuits with porous ultralow dielectric film.

PubMed

Zhao, Zhongkai; He, Yongyong; Yang, Haifang; Qu, Xinping; Lu, Xinchun; Luo, Jianbin

2013-07-10

An ultrathin layer is investigated for its potential application of replacing conventional diffusion barriers and promoting interface adhesion for nanoelectric circuits with porous ultralow dielectrics. The porous ultralow dielectric (k ≈ 2.5) substrate is silanized by 3-aminopropyltrimethoxysilane (APTMS) to form the nanoadhesive layer by performing oxygen plasma modification and tailoring the silanization conditions appropriately. The high primary amine content is obtained in favor of strong interaction between amino groups and copper. And the results of leakage current measurements of metal-oxide-semiconductor capacitor structure demonstrate that the aminosilanization nanoadhesive layer can block copper diffusion effectively and guarantee the performance of devices. Furthermore, the results of four-point bending tests indicate that the nanoadhesive layer with monolayer structure can provide the satisfactory interface toughness up to 6.7 ± 0.5 J/m(2) for Cu/ultralow-k interface. Additionally, an annealing-enhanced interface toughness effect occurs because of the formation of Cu-N bonding and siloxane bridges below 500 °C. However, the interface is weakened on account of the oxidization of amines and copper as well as the breaking of Cu-N bonding above 500 °C. It is also found that APTMS nanoadhesive layer with multilayer structure provides relatively low interface toughness compared with monolayer structure, which is mainly correlated to the breaking of interlayer hydrogen bonding.

Nanoklystron: A Monolithic Tube Approach to THz Power Generation

NASA Technical Reports Server (NTRS)

Siegel, Peter H.; Fung, Andy; Manohara, Harish; Xu, Jimmy; Chang, Baohe

2001-01-01

The authors propose a new approach to THz power generation: the nanoklystron. Utilizing silicon micromachining techniques, the design and fabrication concept of a monolithic THz vacuum-tube reflex-klystron source is described. The nanoklystron employs a separately fabricated cathode structure composed of densely packed carbon nanotube field emitters and an add-in repeller. The nanotube cathode is expected to increase the current density, extend the cathode life and decrease the required oscillation voltage to values below 100 V. The excitation cavity is based on ridged-waveguide and differs from the conventional cylindrical re-entrant structures found in lower frequency klystrons. A quasi-static field analysis of the cavity and output coupling structure show excellent control of the quality factor and desired field distribution. Output power is expected to occur through an iris coupled matched rectangular waveguide and integrated pyramidal feed horn. The entire circuit is designed so as to be formed monolithically from two thermocompression bonded silicon wafers processed using deep reactive ion etching (DRIE) techniques. To expedite prototyping, a 600 GHz mechanically machined structure has been designed and is in fabrication. A complete numeric analysis of the nanoklystron circuit, including the electron beam dynamics has just gotten underway. Separate evaluation of the nanotube cathodes is also ongoing. The authors will describe the progress to date as well as plans for the immediate implementation and testing of nanoklystron prototypes at 640 and 1250 GHz.

Test Generation Algorithm for Fault Detection of Analog Circuits Based on Extreme Learning Machine

PubMed Central

Zhou, Jingyu; Tian, Shulin; Yang, Chenglin; Ren, Xuelong

2014-01-01

This paper proposes a novel test generation algorithm based on extreme learning machine (ELM), and such algorithm is cost-effective and low-risk for analog device under test (DUT). This method uses test patterns derived from the test generation algorithm to stimulate DUT, and then samples output responses of the DUT for fault classification and detection. The novel ELM-based test generation algorithm proposed in this paper contains mainly three aspects of innovation. Firstly, this algorithm saves time efficiently by classifying response space with ELM. Secondly, this algorithm can avoid reduced test precision efficiently in case of reduction of the number of impulse-response samples. Thirdly, a new process of test signal generator and a test structure in test generation algorithm are presented, and both of them are very simple. Finally, the abovementioned improvement and functioning are confirmed in experiments. PMID:25610458

The Generating Mechanism of Non-Sustained Disruptive Discharges in Vacuum Interrupters

NASA Astrophysics Data System (ADS)

Hara, Daisuke; Taki, Masayuki; Tanaka, Hitoshi; Okawa, Mikio; Yanabu, Satoru

To develop vacuum circuit breaker (VCB) for higher voltage application, it may be important to understand generating mechanism and its influence of non-sustained disruptive discharges (NSDD) to the systems. So, we carried out the tests using equivalent testing circuit and observed the contacts after testing, For the test, by using commercial vacuum circuit interrupters, AC voltages of 50Hz was applied between contacts for 4 seconds after current interruption, and measured generating frequencies of NSDD vs. the voltages and vs. currents. Typical contact material used in the commercial switching equipment, such as AgWC, CuW, CuCr were tested and compared. Then CuCr's of different composition and manufacturing process are investigated. And CuCr-50 (manufactured by melting process) showed the best performance in all tests. We point out that surface condition may affect the generation of NSDD and also conditioning effect is very important.

Three-dimensional simulation of helix traveling-wave tube cold-test characteristics using MAFIA

DOE Office of Scientific and Technical Information (OSTI.GOV)

Kory, C.L.

1996-12-31

A critically important step in the traveling-wave tube (TWT) design process is the cold-testing of the slow-wave circuit for dispersion, beam interaction impedance and RF losses. Experimental cold-tests can be very time-consuming and expensive, thus limiting the freedom to examine numerous variations to the test circuit. This makes the need for computational methods crucial as they can lower cost, reduce tube development time and allow the freedom to introduce novel and improved designs. The cold-test parameters have been calculated for a C-Band Northrop-Grumman helix TWT slow-wave circuit using MAFIA, the three-dimensional electromagnetic finite-integration computer code. Measured and simulated cold-test datamore » for the Northrop-Grumman helix TWT including dispersion, impedance and attenuation will be presented. Close agreement between simulated and measured values of the dispersion, impedance and attenuation has been obtained.« less

Laser system for testing radiation imaging detector circuits

NASA Astrophysics Data System (ADS)

Zubrzycka, Weronika; Kasinski, Krzysztof

2015-09-01

Performance and functionality of radiation imaging detector circuits in charge and position measurement systems need to meet tight requirements. It is therefore necessary to thoroughly test sensors as well as read-out electronics. The major disadvantages of using radioactive sources or particle beams for testing are high financial expenses and limited accessibility. As an alternative short pulses of well-focused laser beam are often used for preliminary tests. There are number of laser-based devices available on the market, but very often their applicability in this field is limited. This paper describes concept, design and validation of laser system for testing silicon sensor based radiation imaging detector circuits. The emphasis is put on keeping overall costs low while achieving all required goals: mobility, flexible parameters, remote control and possibility of carrying out automated tests. The main part of the developed device is an optical pick-up unit (OPU) used in optical disc drives. The hardware includes FPGA-controlled circuits for laser positioning in 2 dimensions (horizontal and vertical), precision timing (frequency and number) and amplitude (diode current) of short ns-scale (3.2 ns) light pulses. The system is controlled via USB interface by a dedicated LabVIEW-based application enabling full manual or semi-automated test procedures.

Transitional circuitry for studying the properties of DNA

NASA Astrophysics Data System (ADS)

Trubochkina, N.

2018-01-01

The article is devoted to a new view of the structure of DNA as an intellectual scheme possessing the properties of logic and memory. The theory of transient circuitry, developed by the author for optimal computer circuits, revealed an amazing structural similarity between mathematical models of transition silicon elements and logic and memory circuits of solid state transient circuitry and atomic models of parts of DNA.

Drive and protection circuit for converter module of cascaded H-bridge STATCOM

NASA Astrophysics Data System (ADS)

Wang, Xuan; Yuan, Hongliang; Wang, Xiaoxing; Wang, Shuai; Fu, Yongsheng

2018-04-01

Drive and protection circuit is an important part of power electronics, which is related to safe and stable operation issues in the power electronics. The drive and protection circuit is designed for the cascaded H-bridge STATCOM. This circuit can realize flexible dead-time setting, operation status self-detection, fault priority protection and detailed fault status uploading. It can help to improve the reliability of STATCOM's operation. Finally, the proposed circuit is tested and analyzed by power electronic simulation software PSPICE (Simulation Program with IC Emphasis) and a series of experiments. Further studies showed that the proposed circuit can realize drive and control of H-bridge circuit, meanwhile it also can realize fast processing faults and have advantage of high reliability.

Astable Oscillator Circuits using Silicon-on-Insulator Timer Chip for Wide Range Temperature Sensing

NASA Technical Reports Server (NTRS)

Patterson, Richard L.; Culley, Dennis; Hammoud, Ahmad; Elbuluk, Malik

2008-01-01

Two astable oscillator circuits were constructed using a new silicon-on-insulator (SOI) 555 timer chip for potential use as a temperature sensor in harsh environments encompassing jet engine and space mission applications. The two circuits, which differed slightly in configuration, were evaluated between -190 and 200 C. The output of each circuit was made to produce a stream of rectangular pulses whose frequency was proportional to the sensed temperature. The preliminary results indicated that both circuits performed relatively well over the entire test temperature range. In addition, after the circuits were subjected to limited thermal cycling over the temperature range of -190 to 200 C, the performance of either circuit did not experience any significant change.

Designing across ages: Multi-agent-based models and learning electricity

NASA Astrophysics Data System (ADS)

Sengupta, Pratim

Electricity is regarded as one of the most challenging topics for students at all levels -- middle school -- college (Cohen, Eylon, & Ganiel, 1983; Belcher & Olbert, 2003; Eylon & Ganiel, 1990; Steinberg et al., 1985). Several researchers have suggested that naive misconceptions about electricity stem from a deep incommensurability (Slotta & Chi, 2006; Chi, 2005) or incompatibility (Chi, Slotta & Leauw, 1994; Reiner, Slotta, Chi, & Resnick, 2000) between naive and expert knowledge structures. I first present an alternative theoretical framework that adopts an emergent levels-based perspective as proposed by Wilensky & Resnick (1999). From this perspective, macro-level phenomena such as electric current and resistance, as well as behavior of linear electric circuits, can be conceived of as emergent from simple, body-syntonic interactions between electrons and ions in a circuit. I argue that adopting such a perspective enables us to reconceive commonly noted misconceptions in electricity as behavioral evidences of "slippage between levels" -- i.e., these misconceptions appear when otherwise productive knowledge elements are sometimes inappropriately activated due to certain macro-level phenomenological cues only -- and, that the same knowledge elements when activated due to phenomenological cues at both micro- and macro-levels, can engender a deeper, expert-like understanding. I will then introduce NIELS (NetLogo Investigations In Electromagnetism, Sengupta & Wilensky, 2006, 2008, 2009), a low-threshold high-ceiling (LTHC) learning environment of multi-agent-based computational models that represent phenomena such as electric current and resistance, as well as the behavior of linear electric circuits, as emergent. I also present results from implementations of NIELS in 5th, 7th and 12th grade classrooms that show the following: (a) how leveraging certain "design elements" over others in NIELS models can create new phenomenological cues, which in turn can be appropriated for learners in different grades; (b) how learners' existing knowledge structures can be bootstrapped to generate deep understanding; (c) how these knowledge structures evolve as the learners progress through the implemented curriculum; (d) improvement of learners' understanding in the post-test compared to the pre-test; and (e) how NIELS students compare with a comparison group of 12th grade students who underwent traditional classroom instruction.

Long life assurance study for manned spacecraft long life hardware. Volume 2: Long life assurance studies of EEE parts and packaging

NASA Technical Reports Server (NTRS)

1972-01-01

Guidelines for the design, development, and fabrication of electronic components and circuits for use in spacecraft construction are presented. The subjects discussed involve quality control procedures and test methodology for the following subjects: (1) monolithic integrated circuits, (2) hybrid integrated circuits, (3) transistors, (4) diodes, (5) tantalum capacitors, (6) electromechanical relays, (7) switches and circuit breakers, and (8) electronic packaging.

Twin Neurons for Efficient Real-World Data Distribution in Networks of Neural Cliques: Applications in Power Management in Electronic Circuits.

PubMed

Boguslawski, Bartosz; Gripon, Vincent; Seguin, Fabrice; Heitzmann, Frédéric

2016-02-01

Associative memories are data structures that allow retrieval of previously stored messages given part of their content. They, thus, behave similarly to the human brain's memory that is capable, for instance, of retrieving the end of a song, given its beginning. Among different families of associative memories, sparse ones are known to provide the best efficiency (ratio of the number of bits stored to that of the bits used). Recently, a new family of sparse associative memories achieving almost optimal efficiency has been proposed. Their structure, relying on binary connections and neurons, induces a direct mapping between input messages and stored patterns. Nevertheless, it is well known that nonuniformity of the stored messages can lead to a dramatic decrease in performance. In this paper, we show the impact of nonuniformity on the performance of this recent model, and we exploit the structure of the model to improve its performance in practical applications, where data are not necessarily uniform. In order to approach the performance of networks with uniformly distributed messages presented in theoretical studies, twin neurons are introduced. To assess the adapted model, twin neurons are used with the real-world data to optimize power consumption of electronic circuits in practical test cases.

GaAs circuits for monolithic optical controller

NASA Technical Reports Server (NTRS)

Gustafson, G.; Bendett, M.; Carney, J.; Mactaggart, R.; Palmquist, S.

1988-01-01

GaAs circuits for use in a fully monolithic 1 Gb/s optical controller have been developed and tested. The circuits include photodetectors, transimpedance amplifiers and 1:16 demultiplexers that can directly control the phase of MMIC phase shifters. The entire chip contains approximately 300 self-aligned gate E/D-mode MESFETs. The MESFETs have one micron-wide gate and the E-mode FETs typically have transconductance of 200 ms/mm. Results of simulations and tests are reported. Also, the design and layout of the fully monolithic chip is discussed.

Multiple piezo-patch energy harvesters integrated to a thin plate with AC-DC conversion: analytical modeling and numerical validation

NASA Astrophysics Data System (ADS)

Aghakhani, Amirreza; Basdogan, Ipek; Erturk, Alper

2016-04-01

Plate-like components are widely used in numerous automotive, marine, and aerospace applications where they can be employed as host structures for vibration based energy harvesting. Piezoelectric patch harvesters can be easily attached to these structures to convert the vibrational energy to the electrical energy. Power output investigations of these harvesters require accurate models for energy harvesting performance evaluation and optimization. Equivalent circuit modeling of the cantilever-based vibration energy harvesters for estimation of electrical response has been proposed in recent years. However, equivalent circuit formulation and analytical modeling of multiple piezo-patch energy harvesters integrated to thin plates including nonlinear circuits has not been studied. In this study, equivalent circuit model of multiple parallel piezoelectric patch harvesters together with a resistive load is built in electronic circuit simulation software SPICE and voltage frequency response functions (FRFs) are validated using the analytical distributedparameter model. Analytical formulation of the piezoelectric patches in parallel configuration for the DC voltage output is derived while the patches are connected to a standard AC-DC circuit. The analytic model is based on the equivalent load impedance approach for piezoelectric capacitance and AC-DC circuit elements. The analytic results are validated numerically via SPICE simulations. Finally, DC power outputs of the harvesters are computed and compared with the peak power amplitudes in the AC output case.

Qualitative-Modeling-Based Silicon Neurons and Their Networks

PubMed Central

Kohno, Takashi; Sekikawa, Munehisa; Li, Jing; Nanami, Takuya; Aihara, Kazuyuki

2016-01-01

The ionic conductance models of neuronal cells can finely reproduce a wide variety of complex neuronal activities. However, the complexity of these models has prompted the development of qualitative neuron models. They are described by differential equations with a reduced number of variables and their low-dimensional polynomials, which retain the core mathematical structures. Such simple models form the foundation of a bottom-up approach in computational and theoretical neuroscience. We proposed a qualitative-modeling-based approach for designing silicon neuron circuits, in which the mathematical structures in the polynomial-based qualitative models are reproduced by differential equations with silicon-native expressions. This approach can realize low-power-consuming circuits that can be configured to realize various classes of neuronal cells. In this article, our qualitative-modeling-based silicon neuron circuits for analog and digital implementations are quickly reviewed. One of our CMOS analog silicon neuron circuits can realize a variety of neuronal activities with a power consumption less than 72 nW. The square-wave bursting mode of this circuit is explained. Another circuit can realize Class I and II neuronal activities with about 3 nW. Our digital silicon neuron circuit can also realize these classes. An auto-associative memory realized on an all-to-all connected network of these silicon neurons is also reviewed, in which the neuron class plays important roles in its performance. PMID:27378842

Polymeric Materials for Electro-Optic Testing.

DTIC Science & Technology

1987-07-01

what Langmuir Blodgett films are, how they are grown and deposited on a material, and the electro - optic effects in Langmuir/Blodgett films. Stephen...Kowel has experimented with several different types of organic dyes mixed in the films to increase the electro - optic effect in the films. The bulk of his...test integrated circuits. Keywords: Langmuir Blodgett films, Electro - optic testing, Integrated circuits, Linear electro - optic effect.

Spectral Mismatch Corrections Video Text Version | Photovoltaic Research |

Science.gov Websites

reference cell with the spectral or spot similar to a test cell will make it easier to account for the goes into the numerator of M. Second, we measure the short circuit current of the test cell under the measure the EQE of the test cell and multiply the AM 1.5G solar spectrum to calculate its short circuit

Testing Procedures for Open Circuit Air Diving H ELMETS AND Semi-Closed Circuit Mixed Gas Diving Helmets

DTIC Science & Technology

1973-12-18

abosrbent canister under all of the conditions in which the helmet will be expected to operate. These tests are very similar to those of Section III. B. 4... abosrbent canister will be operating but on air). Since the CO2 absorbent canister is not operating, it need not be instrumented. b. Recommended Tests -W 1

Fast 4-2 Compressor of Booth Multiplier Circuits for High-Speed RISC Processor

NASA Astrophysics Data System (ADS)

Yuan, S. C.

2008-11-01

We use different XOR circuits to optimize the XOR structure 4-2 compressor, and design the transmission gates(TG) 4-2 compressor use single to dual rail circuit configurations. The maximum propagation delay, the power consumption and the layout area of the designed 4-2 compressors are simulated with 0.35μm and 0.25μm CMOS process parameters and compared with results of the synthesized 4-2 circuits, and show that the designed 4-2 compressors are faster and area smaller than the synthesized one.

A study of short test and charge retention test methods for nickel-cadmium spacecraft cells

NASA Technical Reports Server (NTRS)

Scott, W. R.

1975-01-01

Methods for testing nickel-cadmium cells for internal shorts and charge retention were studied. Included were (a) open circuit voltage decay after a brief charge, (b) open circuit voltage recovery after shorting, and (c) open circuit voltage decay and capacity loss after a full charge. The investigation included consideration of the effects of prior history, of conditioning cells prior to testing, and of various test method variables on the results of the tests. Sensitivity of the tests was calibrated in terms of equivalent external resistance. The results were correlated. It was shown that a large number of variables may affect the results of these tests. It is concluded that the voltage decay after a brief charge and the voltage recovery methods are more sensitive than the charged stand method, and can detect an internal short equivalent to a resistance of about (10,000/C)ohms where "C' is the numerical value of the capacity of the cell in ampere hours.

Enhancing Elementary Students' Experiences Learning about Circuits Using an Exploration-Explanation Instructional Sequence

ERIC Educational Resources Information Center

Brown, Timothy M.; Brown, Patrick L.

2010-01-01

Using an exploration-explanation sequence of science instruction helps teachers unveil students' prior knowledge about circuits and engage them in minds-on science learning. In these lessons, fourth grade students make predictions and test their ideas about circuits in series through hands-on investigations. The teacher helps students make…

49 CFR 234.237 - Reverse switch cut-out circuit.

Code of Federal Regulations, 2011 CFR

2011-10-01

... 49 Transportation 4 2011-10-01 2011-10-01 false Reverse switch cut-out circuit. 234.237 Section... Maintenance, Inspection, and Testing Maintenance Standards § 234.237 Reverse switch cut-out circuit. A switch... system circuitry, shall be maintained so that the warning system can only be cut out when the switch...

49 CFR 234.237 - Reverse switch cut-out circuit.

Code of Federal Regulations, 2010 CFR

2010-10-01

... 49 Transportation 4 2010-10-01 2010-10-01 false Reverse switch cut-out circuit. 234.237 Section... Maintenance, Inspection, and Testing Maintenance Standards § 234.237 Reverse switch cut-out circuit. A switch... system circuitry, shall be maintained so that the warning system can only be cut out when the switch...

Inductance effects in the high-power transmitter crowbar system

NASA Technical Reports Server (NTRS)

Daeges, J.; Bhanji, A.

1987-01-01

The effective protection of a klystron in a high-power transmitter requires the diversion of all stored energy in the protected circuit through an alternate low-impedance path, the crowbar, such that less than 1 joule of energy is dumped into the klystron during an internal arc. A scheme of adding a bypass inductor in the crowbar-protected circuit of the high-power transmitter was tested using computer simulations and actual measurements under a test load. Although this scheme has several benefits, including less power dissipation in the resistor, the tests show that the presence of inductance in the portion of the circuit to be protected severely hampers effective crowbar operation.

3D Printing of Ball Grid Arrays

NASA Astrophysics Data System (ADS)

Sinha, Shayandev; Hines, Daniel; Dasgupta, Abhijit; Das, Siddhartha

Ball grid arrays (BGA) are interconnects between an integrated circuit (IC) and a printed circuit board (PCB), that are used for surface mounting electronic components. Typically, lead free alloys are used to make solder balls which, after a reflow process, establish a mechanical and electrical connection between the IC and the PCB. High temperature processing is required for most of these alloys leading to thermal shock causing damage to ICs. For producing flexible circuits on a polymer substrate, there is a requirement for low temperature processing capabilities (around 150 C) and for reducing strain from mechanical stresses. Additive manufacturing techniques can provide an alternative methodology for fabricating BGAs as a direct replacement for standard solder bumped BGAs. We have developed aerosol jet (AJ) printing methods to fabricate a polymer bumped BGA. As a demonstration of the process developed, a daisy chain test chip was polymer bumped using an AJ printed ultra violet (UV) curable polymer ink that was then coated with an AJ printed silver nanoparticle laden ink as a conducting layer printed over the polymer bump. The structure for the balls were achieved by printing the polymer ink using a specific toolpath coupled with in-situ UV curing of the polymer which provided good control over the shape, resulting in well-formed spherical bumps on the order of 200 um wide by 200 um tall for this initial demonstration. A detailed discussion of the AJ printing method and results from accelerated life-time testing will be presented

Equivalent circuit models for interpreting impedance perturbation spectroscopy data

NASA Astrophysics Data System (ADS)

Smith, R. Lowell

2004-07-01

As in-situ structural integrity monitoring disciplines mature, there is a growing need to process sensor/actuator data efficiently in real time. Although smaller, faster embedded processors will contribute to this, it is also important to develop straightforward, robust methods to reduce the overall computational burden for practical applications of interest. This paper addresses the use of equivalent circuit modeling techniques for inferring structure attributes monitored using impedance perturbation spectroscopy. In pioneering work about ten years ago significant progress was associated with the development of simple impedance models derived from the piezoelectric equations. Using mathematical modeling tools currently available from research in ultrasonics and impedance spectroscopy is expected to provide additional synergistic benefits. For purposes of structural health monitoring the objective is to use impedance spectroscopy data to infer the physical condition of structures to which small piezoelectric actuators are bonded. Features of interest include stiffness changes, mass loading, and damping or mechanical losses. Equivalent circuit models are typically simple enough to facilitate the development of practical analytical models of the actuator-structure interaction. This type of parametric structure model allows raw impedance/admittance data to be interpreted optimally using standard multiple, nonlinear regression analysis. One potential long-term outcome is the possibility of cataloging measured viscoelastic properties of the mechanical subsystems of interest as simple lists of attributes and their statistical uncertainties, whose evolution can be followed in time. Equivalent circuit models are well suited for addressing calibration and self-consistency issues such as temperature corrections, Poisson mode coupling, and distributed relaxation processes.

Switch contact device for interrupting high current, high voltage, AC and DC circuits

DOEpatents

Via, Lester C.; Witherspoon, F. Douglas; Ryan, John M.

2005-01-04

A high voltage switch contact structure capable of interrupting high voltage, high current AC and DC circuits. The contact structure confines the arc created when contacts open to the thin area between two insulating surfaces in intimate contact. This forces the arc into the shape of a thin sheet which loses heat energy far more rapidly than an arc column having a circular cross-section. These high heat losses require a dramatic increase in the voltage required to maintain the arc, thus extinguishing it when the required voltage exceeds the available voltage. The arc extinguishing process with this invention is not dependent on the occurrence of a current zero crossing and, consequently, is capable of rapidly interrupting both AC and DC circuits. The contact structure achieves its high performance without the use of sulfur hexafluoride.

Wideband analytical equivalent circuit for one-dimensional periodic stacked arrays.

PubMed

Molero, Carlos; Rodríguez-Berral, Raúl; Mesa, Francisco; Medina, Francisco; Yakovlev, Alexander B

2016-01-01

A wideband equivalent circuit is proposed for the accurate analysis of scattering from a set of stacked slit gratings illuminated by a plane wave with transverse magnetic or electric polarization that impinges normally or obliquely along one of the principal planes of the structure. The slit gratings are printed on dielectric slabs of arbitrary thickness, including the case of closely spaced gratings that interact by higher-order modes. A Π-circuit topology is obtained for a pair of coupled arrays, with fully analytical expressions for all the circuit elements. This equivalent Π circuit is employed as the basis to derive the equivalent circuit of finite stacks with any given number of gratings. Analytical expressions for the Brillouin diagram and the Bloch impedance are also obtained for infinite periodic stacks.

Improved Estimation and Interpretation of Correlations in Neural Circuits

PubMed Central

Yatsenko, Dimitri; Josić, Krešimir; Ecker, Alexander S.; Froudarakis, Emmanouil; Cotton, R. James; Tolias, Andreas S.

2015-01-01

Ambitious projects aim to record the activity of ever larger and denser neuronal populations in vivo. Correlations in neural activity measured in such recordings can reveal important aspects of neural circuit organization. However, estimating and interpreting large correlation matrices is statistically challenging. Estimation can be improved by regularization, i.e. by imposing a structure on the estimate. The amount of improvement depends on how closely the assumed structure represents dependencies in the data. Therefore, the selection of the most efficient correlation matrix estimator for a given neural circuit must be determined empirically. Importantly, the identity and structure of the most efficient estimator informs about the types of dominant dependencies governing the system. We sought statistically efficient estimators of neural correlation matrices in recordings from large, dense groups of cortical neurons. Using fast 3D random-access laser scanning microscopy of calcium signals, we recorded the activity of nearly every neuron in volumes 200 μm wide and 100 μm deep (150–350 cells) in mouse visual cortex. We hypothesized that in these densely sampled recordings, the correlation matrix should be best modeled as the combination of a sparse graph of pairwise partial correlations representing local interactions and a low-rank component representing common fluctuations and external inputs. Indeed, in cross-validation tests, the covariance matrix estimator with this structure consistently outperformed other regularized estimators. The sparse component of the estimate defined a graph of interactions. These interactions reflected the physical distances and orientation tuning properties of cells: The density of positive ‘excitatory’ interactions decreased rapidly with geometric distances and with differences in orientation preference whereas negative ‘inhibitory’ interactions were less selective. Because of its superior performance, this ‘sparse+latent’ estimator likely provides a more physiologically relevant representation of the functional connectivity in densely sampled recordings than the sample correlation matrix. PMID:25826696

Phase Two of the Array Automated Assembly Task for the Low Cost Solar Array Project

NASA Technical Reports Server (NTRS)

Campbell, R. B.; Page, D. J.; Rai-Choudhury, P.; Seman, E. J.; Hanes, M. H.; Rohatgi, A.; Davis, J. R.

1979-01-01

Various top contact metal systems were studied. Only Ti Pd Cu approaches baseline (Ti Pd Ag) quality, but this system shows a lack of long term stability. Aluminum back surface field structures were fabricated and thicknesses of p superscript + material of up to 7.0 microns were achieved with open circuit voltages of 0.59V. A general purpose ultrasonic welder was purchased and tests using various metal foils are under way. During fabrication of the demonstration module, several cells became cracked. Due to redundancy of interconnections, the module was not open circuited but the efficiency was reduced to 8.8%. The broken cell was interconnected with a strap across the back and the efficiency was increased to 11.5%. A cost analysis was made and the results indicate a selling price of $0.56/watt peak (in 1986 with 1975 dollars).

250 kV 6 mA compact Cockcroft-Walton high-voltage power supply.

PubMed

Ma, Zhan-Wen; Su, Xiao-Dong; Lu, Xiao-Long; Wei, Zhen; Wang, Jun-Run; Huang, Zhi-Wu; Miao, Tian-You; Su, Tong-Ling; Yao, Ze-En

2016-08-01

A compact power supply system for a compact neutron generator has been developed. A 4-stage symmetrical Cockcroft-Walton circuit is adopted to produce 250 kV direct current high-voltage. A 2-stage 280 kV isolation transformer system is used to drive the ion source power supply. For a compact structure, safety, and reliability during the operation, the Cockcroft-Walton circuit and the isolation transformer system are enclosed in an epoxy vessel containing the transformer oil whose size is about ∅350 mm × 766 mm. Test results indicate that the maximum output voltage of the power supply is 282 kV, and the stability of the output voltage is better than 0.63% when the high voltage power supply is operated at 250 kV, 6.9 mA with the input voltage varying ±10%.

White LED visible light communication technology research

NASA Astrophysics Data System (ADS)

Yang, Chao

2017-03-01

Visible light communication is a new type of wireless optical communication technology. White LED to the success of development, the LED lighting technology is facing a new revolution. Because the LED has high sensitivity, modulation, the advantages of good performance, large transmission power, can make it in light transmission light signal at the same time. Use white LED light-emitting characteristics, on the modulation signals to the visible light transmission, can constitute a LED visible light communication system. We built a small visible optical communication system. The system composition and structure has certain value in the field of practical application, and we also research the key technology of transmitters and receivers, the key problem has been resolved. By studying on the optical and LED the characteristics of a high speed modulation driving circuit and a high sensitive receiving circuit was designed. And information transmission through the single chip microcomputer test, a preliminary verification has realized the data transmission function.

250 kV 6 mA compact Cockcroft-Walton high-voltage power supply

DOE Office of Scientific and Technical Information (OSTI.GOV)

Ma, Zhan-Wen; Su, Xiao-Dong; Wei, Zhen

A compact power supply system for a compact neutron generator has been developed. A 4-stage symmetrical Cockcroft-Walton circuit is adopted to produce 250 kV direct current high-voltage. A 2-stage 280 kV isolation transformer system is used to drive the ion source power supply. For a compact structure, safety, and reliability during the operation, the Cockcroft-Walton circuit and the isolation transformer system are enclosed in an epoxy vessel containing the transformer oil whose size is about ∅350 mm × 766 mm. Test results indicate that the maximum output voltage of the power supply is 282 kV, and the stability of themore » output voltage is better than 0.63% when the high voltage power supply is operated at 250 kV, 6.9 mA with the input voltage varying ±10%.« less

Activity-dependent stochastic resonance in recurrent neuronal networks

NASA Astrophysics Data System (ADS)

Volman, Vladislav

2009-03-01

An important source of noise for neuronal networks is that of the stochastic nature of synaptic transmission. In particular, there can occur spontaneous asynchronous release of neurotransmitter at a rate that is strongly dependent on the presynaptic Ca2+ concentration and hence strongly dependent on the rate of spike induced Ca2+. Here it is shown that this noise can lead to a new form of stochastic resonance for local circuits consisting of roughly 100 neurons - a ``microcolumn''- coupled via noisy plastic synapses. Furthermore, due to the plastic coupling and activity-dependent noise component, the detection of weak stimuli will also depend on the structure of the latter. In addition, the circuit can exhibit short-term memory, by which we mean that spiking will continue to occur for a transient period following removal of the stimulus. These results can be directly tested in experiments on cultured networks.

Oscillatory integration windows in neurons

PubMed Central

Gupta, Nitin; Singh, Swikriti Saran; Stopfer, Mark

2016-01-01

Oscillatory synchrony among neurons occurs in many species and brain areas, and has been proposed to help neural circuits process information. One hypothesis states that oscillatory input creates cyclic integration windows: specific times in each oscillatory cycle when postsynaptic neurons become especially responsive to inputs. With paired local field potential (LFP) and intracellular recordings and controlled stimulus manipulations we directly test this idea in the locust olfactory system. We find that inputs arriving in Kenyon cells (KCs) sum most effectively in a preferred window of the oscillation cycle. With a computational model, we show that the non-uniform structure of noise in the membrane potential helps mediate this process. Further experiments performed in vivo demonstrate that integration windows can form in the absence of inhibition and at a broad range of oscillation frequencies. Our results reveal how a fundamental coincidence-detection mechanism in a neural circuit functions to decode temporally organized spiking. PMID:27976720

An experimental study on the thermal characteristics and heating effect of arc-fault from Cu core in residential electrical wiring fires

PubMed Central

Du, Jian-Hua; Zeng, Yi; Pan, Leng; Zhang, Ren-Cheng

2017-01-01

The characteristics of a series direct current (DC) arc-fault including both electrical and thermal parameters were investigated based on an arc-fault simulator to provide references for multi-parameter electrical fire detection method. Tests on arc fault behavior with three different initial circuit voltages, resistances and arc gaps were conducted, respectively. The influences of circuit conditions on arc dynamic image, voltage, current or power were interpreted. Also, the temperature rises of electrode surface and ambient air were studied. The results showed that, first, significant variations of arc structure and light emitting were observed under different conditions. A thin outer burning layer of vapor generated from electrodes with orange light was found due to the extremely high arc temperature. Second, with the increasing electrode gap in discharging, the arc power was shown to have a non monotonic relationship with arc length for constant initial circuit voltage and resistance. Finally, the temperature rises of electrode surface caused by heat transfer from arc were found to be not sensitive with increasing arc length due to special heat transfer mechanism. In addition, temperature of ambient air showed a large gradient in radial direction of arc. PMID:28797055

[Digital acoustic burglar alarm system using infrared radio remote control].

PubMed

Wang, Song-De; Zhao, Yan; Yao, Li-Ping; Zhang, Shuan-Ji

2009-03-01

Using butt emission infrared sensors, radio receiving and sending modules, double function integrated circuit with code and code translation, LED etc, a digital acoustic burglar alarm system using infrared radio to realize remote control was designed. It uses infrared ray invisible to eyes, composing area of radio distance. Once people and objects shelter the infrared ray, a testing signal will be output by the tester, and the sender will be triggered to work. The radio coding signal that sender sent is received by the receiver, then processed by a serial circuit. The control signal is output to trigger the sounder to give out an alarm signal, and the operator will be cued to notice this variation. At the same time, the digital display will be lighted and the alarm place will be watched. Digital coding technology is used, and a number of sub alarm circuits can joint the main receiver, so a lot of places can be monitored. The whole system features a module structure, with the property of easy alignment, stable operation, debug free and so on. The system offers an alarm range reaching 1 000 meters in all directions, and can be widely used in family, shop, storehouse, orchard and so on.

Non-resonant electromagnetic energy harvester for car-key applications

NASA Astrophysics Data System (ADS)

Li, X.; Hehn, T.; Thewes, M.; Kuehne, I.; Frey, A.; Scholl, G.; Manoli, Y.

2013-12-01

This paper presents a novel non-resonant electromagnetic energy harvester for application in a remote car-key, to extend the lifetime of the battery or even to realize a fully energy autonomous, maintenance-free car-key product. Characteristic for a car-key are low frequency and large amplitude motions during normal daily operation. The basic idea of this non-resonant generator is to use a round flat permanent magnet moving freely in a round flat cavity, which is packaged on both sides by printed circuit boards embedded with multi-layer copper coils. The primary goal of this structure is to easily integrate the energy harvester with the existing electrical circuit module into available commercial car-key designs. The whole size of the energy harvester is comparable to a CR2032 coin battery. To find out the best power-efficient and optimal design, several magnets with different dimensions and magnetizations, and various layouts of copper coils were analysed and built up for prototype testing. Experimental results show that with an axially magnetized NdFeB magnet and copper coils of design variant B a maximum open circuit voltage of 1.1V can be observed.

Research on the detection system of liquid concentration base on birefringence light transmission method

NASA Astrophysics Data System (ADS)

Li, Tianze; Zhang, Xia; Hou, Luan; Jiang, Chuan

2010-10-01

The characteristics of the beam transmitting in the optical fiber and the liquid medium are analyzed in this paper. On this basis, a new type of semiconductor optical position sensitive detector is used for a receiving device, a light transmission method of birefringence is presented,and a set of opto-electrical detection system which is applied to detect liquid concentration is designed. The system is mainly composed of semiconductor lasers,optical systems, Psd signal conditioning circuit, Single-chip System, A/D conversion circuit and display circuit. Through theoretical analysis and experimental simulations, the accuracy of this system has been verified. Some main factors affecting the test results are analyzed detailedly in this paper. The experiments show that the temperature drift and the light intensity have a very small impact on this system. The system has some advantages, such as the simple structure, high sensitivity, good stability, fast response time, high degree of automation, and so on. It also can achieve the real-time detection of liquid concentration conveniently and accurately. The system can be widely applied in chemical, food, pharmacy and many other industries. It has broad prospects of application.

An experimental study on the thermal characteristics and heating effect of arc-fault from Cu core in residential electrical wiring fires.

PubMed

Du, Jian-Hua; Tu, Ran; Zeng, Yi; Pan, Leng; Zhang, Ren-Cheng

2017-01-01

The characteristics of a series direct current (DC) arc-fault including both electrical and thermal parameters were investigated based on an arc-fault simulator to provide references for multi-parameter electrical fire detection method. Tests on arc fault behavior with three different initial circuit voltages, resistances and arc gaps were conducted, respectively. The influences of circuit conditions on arc dynamic image, voltage, current or power were interpreted. Also, the temperature rises of electrode surface and ambient air were studied. The results showed that, first, significant variations of arc structure and light emitting were observed under different conditions. A thin outer burning layer of vapor generated from electrodes with orange light was found due to the extremely high arc temperature. Second, with the increasing electrode gap in discharging, the arc power was shown to have a non monotonic relationship with arc length for constant initial circuit voltage and resistance. Finally, the temperature rises of electrode surface caused by heat transfer from arc were found to be not sensitive with increasing arc length due to special heat transfer mechanism. In addition, temperature of ambient air showed a large gradient in radial direction of arc.

Maintenance of Mouse Gustatory Terminal Field Organization Is Disrupted following Selective Removal of Peripheral Sodium Salt Taste Activity at Adulthood

PubMed Central

Sun, Chengsan

2017-01-01

Neural activity plays a critical role in the development of central circuits in sensory systems. However, the maintenance of these circuits at adulthood is usually not dependent on sensory-elicited neural activity. Recent work in the mouse gustatory system showed that selectively deleting the primary transduction channel for sodium taste, the epithelial sodium channel (ENaC), throughout development dramatically impacted the organization of the central terminal fields of three nerves that carry taste information to the nucleus of the solitary tract. More specifically, deleting ENaCs during development prevented the normal maturation of the fields. The present study was designed to extend these findings by testing the hypothesis that the loss of sodium taste activity impacts the maintenance of the normal adult terminal field organization in male and female mice. To do this, we used an inducible Cre-dependent genetic recombination strategy to delete ENaC function after terminal field maturation occurred. We found that removal of sodium taste neural activity at adulthood resulted in significant reorganization of mature gustatory afferent terminal fields in the nucleus of the solitary tract. Specifically, the chorda tympani and greater superficial petrosal nerve terminal fields were 1.4× and 1.6× larger than age-matched controls, respectively. By contrast, the glossopharyngeal nerve, which is not highly sensitive to sodium taste stimulation, did not undergo terminal field reorganization. These surprising results suggest that gustatory nerve terminal fields remain plastic well into adulthood, which likely impacts central coding of taste information and taste-related behaviors with altered taste experience. SIGNIFICANCE STATEMENT Neural activity plays a major role in the development of sensory circuits in the mammalian brain. However, the importance of sensory-driven activity in maintaining these circuits at adulthood, especially in subcortical structures, appears to be much less. Here, we tested whether the loss of sodium taste activity in adult mice impacts the maintenance of how taste nerves project to the first central relay. We found that specific loss of sodium-elicited taste activity at adulthood produced dramatic and selective reorganization of terminal fields in the brainstem. This demonstrates, for the first time, that taste-elicited activity is necessary for the normal maintenance of central gustatory circuits at adulthood and highlights a level of plasticity not seen in other sensory system subcortical circuits. PMID:28676575

An Engineering Methodology for Implementing and Testing VLSI (Very Large Scale Integrated) Circuits

DTIC Science & Technology

1989-03-01

the pad frame and associated routing, conducted additional testing. and submitted the finished design effort to MOSIS for manufacturing. Throughout...register bank TSTCON Allows the XNOR circuitry to enter the TEST register bank PADIN Test signal to check operation of the input pad VCC Power connection...MOSSIM II simulation program. but the design offered little observability within the circuit. The initial design used 35 pins of a 40 pin pad frame

Investigations of detail design issues for the high speed acoustic wind tunnel using a 60th scale model tunnel. Part 2: Tests with the closed circuit

NASA Technical Reports Server (NTRS)

Barna, P. Stephen

1991-01-01

This report summarizes the tests on the 1:60 scale model of the High Speed Acoustic Wind Tunnel (HSAWT) performed during the period June - August 1991. Throughout the testing the tunnel was operated in the 'closed circuit mode,' that is when the airflow was set up by an axial flow fan, which was located inside the tunnel circuit and was directly driven by a motor. The tests were first performed with the closed test section and were subsequently repeated with the open test section, the latter operating with the nozzle-diffuser at its optimum setting. On this subject, reference is made to the report (1) issued January 1991, under contract 17-GFY900125, which summarizes the result obtained with the tunnel operating in the 'open circuit mode.' The tests confirmed the viability of the tunnel design, and the flow distributions in most of the tunnel components were considered acceptable. There were found, however, some locations where the flow distribution requires improvement. This applies to the flow upstream of the fan where the flow was found skewed, thus affecting the flow downstream. As a result of this, the flow appeared separated at the end of the large diffuser at the outer side. All tests were performed at NASA LaRC.

An optimized implementation of a fault-tolerant clock synchronization circuit

NASA Technical Reports Server (NTRS)

Torres-Pomales, Wilfredo

1995-01-01

A fault-tolerant clock synchronization circuit was designed and tested. A comparison to a previous design and the procedure followed to achieve the current optimization are included. The report also includes a description of the system and the results of tests performed to study the synchronization and fault-tolerant characteristics of the implementation.

Circuit For Current-vs.-Voltage Tests Of Semiconductors

NASA Technical Reports Server (NTRS)

Huston, Steven W.

1991-01-01

Circuit designed for measurement of dc current-versus-voltage characteristics of semiconductor devices. Operates in conjunction with x-y pen plotter or digital storage oscilloscope, which records data. Includes large feedback resistors to prevent high currents damaging device under test. Principal virtues: low cost, simplicity, and compactness. Also used to evaluate diodes and transistors.

Dissociable corticostriatal circuits underlie goal-directed vs. cue-elicited habitual food seeking after satiation: evidence from a multimodal MRI study.

PubMed

van Steenbergen, Henk; Watson, Poppy; Wiers, Reinout W; Hommel, Bernhard; de Wit, Sanne

2017-07-01

The present multimodal MRI study advances our understanding of the corticostriatal circuits underlying goal-directed vs. cue-driven, habitual food seeking. To this end, we employed a computerized Pavlovian-instrumental transfer paradigm. During the test phase, participants were free to perform learned instrumental responses (left and right key presses) for popcorn and Smarties outcomes. Importantly, prior to this test half of the participants had been sated on popcorn and the other half on Smarties - resulting in a reduced desirability of those outcomes. Furthermore, during a proportion of the test trials, food-associated Pavlovian cues were presented in the background. In line with previous studies, we found that participants were able to perform in a goal-directed manner in the absence of Pavlovian cues, meaning that specific satiation selectively reduced responding for that food. However, presentation of Pavlovian cues biased choice toward the associated food reward regardless of satiation. Functional MRI analyses revealed that, in the absence of Pavlovian cues, posterior ventromedial prefrontal cortex tracked outcome value. In contrast, during cued trials, the BOLD signal in the posterior putamen differentiated between responses compatible and incompatible with the cue-associated outcome. Furthermore, we identified a region in ventral amygdala showing relatively strong functional connectivity with posterior putamen during the cued trials. Structural MRI analyses provided converging evidence for the involvement of corticostriatal circuits: diffusion tensor imaging data revealed that connectivity of caudate-seeded white-matter tracts to the ventromedial prefrontal cortex predicted responding for still-valuable outcomes; and gray matter integrity in the premotor cortex predicted individual Pavlovian cueing effects. © 2017 Federation of European Neuroscience Societies and John Wiley & Sons Ltd.

Multi-channel detector readout method and integrated circuit

DOEpatents

Moses, William W.; Beuville, Eric; Pedrali-Noy, Marzio

2006-12-12

An integrated circuit which provides multi-channel detector readout from a detector array. The circuit receives multiple signals from the elements of a detector array and compares the sampled amplitudes of these signals against a noise-floor threshold and against one another. A digital signal is generated which corresponds to the location of the highest of these signal amplitudes which exceeds the noise floor threshold. The digital signal is received by a multiplexing circuit which outputs an analog signal corresponding the highest of the input signal amplitudes. In addition a digital control section provides for programmatic control of the multiplexer circuit, amplifier gain, amplifier reset, masking selection, and test circuit functionality on each input thereof.

Multi-channel detector readout method and integrated circuit

DOEpatents

Moses, William W.; Beuville, Eric; Pedrali-Noy, Marzio

2004-05-18

An integrated circuit which provides multi-channel detector readout from a detector array. The circuit receives multiple signals from the elements of a detector array and compares the sampled amplitudes of these signals against a noise-floor threshold and against one another. A digital signal is generated which corresponds to the location of the highest of these signal amplitudes which exceeds the noise floor threshold. The digital signal is received by a multiplexing circuit which outputs an analog signal corresponding the highest of the input signal amplitudes. In addition a digital control section provides for programmatic control of the multiplexer circuit, amplifier gain, amplifier reset, masking selection, and test circuit functionality on each input thereof.

Comprehensive photonics-electronics convergent simulation and its application to high-speed electronic circuit integration on a Si/Ge photonic chip

NASA Astrophysics Data System (ADS)

Takeda, Kotaro; Honda, Kentaro; Takeya, Tsutomu; Okazaki, Kota; Hiraki, Tatsurou; Tsuchizawa, Tai; Nishi, Hidetaka; Kou, Rai; Fukuda, Hiroshi; Usui, Mitsuo; Nosaka, Hideyuki; Yamamoto, Tsuyoshi; Yamada, Koji

2015-01-01

We developed a design technique for a photonics-electronics convergence system by using an equivalent circuit of optical devices in an electrical circuit simulator. We used the transfer matrix method to calculate the response of an optical device. This method used physical parameters and dimensions of optical devices as calculation parameters to design a device in the electrical circuit simulator. It also used an intermediate frequency to express the wavelength dependence of optical devices. By using both techniques, we simulated bit error rates and eye diagrams of optical and electrical integrated circuits and calculated influences of device structure change and wavelength shift penalty.

Vehicle drive module having improved cooling configuration

DOEpatents

Radosevich, Lawrence D.; Meyer, Andreas A.; Kannenberg, Daniel G.; Kaishian, Steven C.; Beihoff, Bruce C.

2007-02-13

An electric vehicle drive includes a thermal support may receive one or more power electronic circuits. The support may aid in removing heat from the circuits through fluid circulating through the support. Power electronic circuits are thermally matched, such as between component layers and between the circuits and the support. The support may form a shield from both external EMI/RFI and from interference generated by operation of the power electronic circuits. Features may be provided to permit and enhance connection of the circuitry to external circuitry, such as improved terminal configurations. Modular units may be assembled that may be coupled to electronic circuitry via plug-in arrangements or through interface with a backplane or similar mounting and interconnecting structures.

Thermally matched fluid cooled power converter

DOEpatents

Radosevich, Lawrence D.; Kannenberg, Daniel G.; Kaishian, Steven C.; Beihoff, Bruce C.

2005-06-21

A thermal support may receive one or more power electronic circuits. The support may aid in removing heat from the circuits through fluid circulating through the support. Power electronic circuits are thermally matched, such as between component layers and between the circuits and the support. The support may form a shield from both external EMI/RFI and from interference generated by operation of the power electronic circuits. Features may be provided to permit and enhance connection of the circuitry to external circuitry, such as improved terminal configurations. Modular units may be assembled that may be coupled to electronic circuitry via plug-in arrangements or through interface with a backplane or similar mounting and interconnecting structures.

Methodological Foundations for Designing Intelligent Computer-Based Training

DTIC Science & Technology

1991-09-03

student models, graphic forms, version control data structures, flowcharts , etc. Circuit simulations are an obvious case. A circuit, after all, can... flowcharts as a basic data structure, and we were able to generalize our tools to create a flowchart drawing tool for inputting both the appearance and...the meaning of flowcharts efficiently. For the Sherlock work, we built a tool that permitted inputting of information about front panels and

Multichannel, Active Low-Pass Filters

NASA Technical Reports Server (NTRS)

Lev, James J.

1989-01-01

Multichannel integrated circuits cascaded to obtain matched characteristics. Gain and phase characteristics of channels of multichannel, multistage, active, low-pass filter matched by making filter of cascaded multichannel integrated-circuit operational amplifiers. Concept takes advantage of inherent equality of electrical characteristics of nominally-identical circuit elements made on same integrated-circuit chip. Characteristics of channels vary identically with changes in temperature. If additional matched channels needed, chips containing more than two operational amplifiers apiece (e.g., commercial quad operational amplifliers) used. Concept applicable to variety of equipment requiring matched gain and phase in multiple channels - radar, test instruments, communication circuits, and equipment for electronic countermeasures.

Design and Application of a Circuit for Measuring Frequency and Duty Cycle of Stimulated Bioelectrical Signal

NASA Astrophysics Data System (ADS)

Tang, Li-Ming; Chang, Ben-Kang; Liu, Tie-Bing; Wu, Min; Ling, Gang

2002-12-01

To design a new type of circuit for measuring frequency & duty cycle of stimulated bioelectrical signal for the project of 'the map of neuron-threshold in human brain and its clinical application'. This circuit was designed according to the character of stimulated bioelectrical signals. It was tested and improved and then used in the neuron -threshold stimulator. The circuit was found to be very accurate for measuring frequency and the error for measuring duty cycle was below 0.2%. This circuit is well-designed, simple, easy to use, and can be applied in many systems.

DOE Office of Scientific and Technical Information (OSTI.GOV)

Britton, C.L.; Jagadish, U.; Bryan, W.L.

An Integrated Circuit (IC) readout chip with four channels arranged so as to receive input charge from the corners of the chip was designed for use with 5- to 7-mm pixel detectors. This Application Specific IC (ASIC) can be used for cold neutron imaging, for study of structural order in materials using cold neutron scattering or for particle physics experiments. The ASIC is fabricated in a 0.5-{micro}m n-well AMI process. The design of the ASIC and the test measurements made is reported. Noise measurements are also reported.

Levels at streamflow gaging stations

USGS Publications Warehouse

Kennedy, E.J.

1990-01-01

This manual establishes the surveying procedures for (1) setting gages at a streamflow gaging station to datum and (2) checking the gages periodically for errors caused by vertical movement of the structures that support them. Surveying terms and concepts are explained, and procedures for testing, adjusting, and operating the instruments are described in detail. Notekeeping, adjusting level circuits, checking gages, summarizing results, locating the nearest National Geodetic Vertical Datum of 1929 bench mark, and relating the gage datum to the national datum are also described.

Variability aware compact model characterization for statistical circuit design optimization

NASA Astrophysics Data System (ADS)

Qiao, Ying; Qian, Kun; Spanos, Costas J.

2012-03-01

Variability modeling at the compact transistor model level can enable statistically optimized designs in view of limitations imposed by the fabrication technology. In this work we propose an efficient variabilityaware compact model characterization methodology based on the linear propagation of variance. Hierarchical spatial variability patterns of selected compact model parameters are directly calculated from transistor array test structures. This methodology has been implemented and tested using transistor I-V measurements and the EKV-EPFL compact model. Calculation results compare well to full-wafer direct model parameter extractions. Further studies are done on the proper selection of both compact model parameters and electrical measurement metrics used in the method.

T-111 Rankine system corrosion test loop, volume 1

NASA Technical Reports Server (NTRS)

Harrison, R. W.; Hoffman, E. E.; Smith, J. P.

1975-01-01

Results are given of a program whose objective was to determine the performance of refractory metal alloys in a two loop Rankine test system. The test system consisted of a circulating lithium circuit heated to 1230 C maximum transferring heat to a boiling potassium circuit with a 1170 C superheated vapor temperature. The results demonstrate the suitability of the selected refractory alloys to perform from a chemical compatibility standpoint.

Expedition 18 Station Development Test Objectives (STDO) Session 1

NASA Image and Video Library

2009-02-19

ISS018-E-033816 (19 Feb. 2009) --- Astronaut Michael Fincke, Expedition 18 commander, removes, cleans and replaces electronic test components on a single test card using Component Repair Equipment (CRE-1) hardware in a portable glovebox facility in the Harmony node of the International Space Station. Fincke unsoldered 1 1/2 components from an integrated circuit board and re-soldered new components including an integrated circuit chip.

Expedition 18 Station Development Test Objectives (STDO) Session 1

NASA Image and Video Library

2009-02-19

ISS018-E-033818 (19 Feb. 2009) --- Astronaut Michael Fincke, Expedition 18 commander, removes, cleans and replaces electronic test components on a single test card using Component Repair Equipment (CRE-1) hardware in a portable glovebox facility in the Harmony node of the International Space Station. Fincke unsoldered 1 1/2 components from an integrated circuit board and re-soldered new components including an integrated circuit chip.

Method and device for determining bond separation strength using induction heating

NASA Technical Reports Server (NTRS)

Coultrip, Robert H. (Inventor); Johnson, Samuel D. (Inventor); Copeland, Carl E. (Inventor); Phillips, W. Morris (Inventor); Fox, Robert L. (Inventor)

1994-01-01

An induction heating device includes an induction heating gun which includes a housing, a U-shaped pole piece having two spaced apart opposite ends defining a gap there between, the U-shaped pole piece being mounted in one end of the housing, and a tank circuit including an induction coil wrapped around the pole piece and a capacitor connected to the induction coil. A power source is connected to the tank circuit. A pull test machine is provided having a stationary chuck and a movable chuck, the two chucks holding two test pieces bonded together at a bond region. The heating gun is mounted on the pull test machine in close proximity to the bond region of the two test pieces, whereby when the tank circuit is energized, the two test pieces are heated by induction heating while a tension load is applied to the two test pieces by the pull test machine to determine separation strength of the bond region.

Internal short circuit and accelerated rate calorimetry tests of lithium-ion cells: Considerations for methane-air intrinsic safety and explosion proof/flameproof protection methods.

PubMed

Dubaniewicz, Thomas H; DuCarme, Joseph P

2016-09-01

Researchers with the National Institute for Occupational Safety and Health (NIOSH) studied the potential for lithium-ion cell thermal runaway from an internal short circuit in equipment for use in underground coal mines. In this third phase of the study, researchers compared plastic wedge crush-induced internal short circuit tests of selected lithium-ion cells within methane (CH 4 )-air mixtures with accelerated rate calorimetry tests of similar cells. Plastic wedge crush test results with metal oxide lithium-ion cells extracted from intrinsically safe evaluated equipment were mixed, with one cell model igniting the chamber atmosphere while another cell model did not. The two cells models exhibited different internal short circuit behaviors. A lithium iron phosphate (LiFePO 4 ) cell model was tolerant to crush-induced internal short circuits within CH 4 -air, tested under manufacturer recommended charging conditions. Accelerating rate calorimetry tests with similar cells within a nitrogen purged 353-mL chamber produced ignitions that exceeded explosion proof and flameproof enclosure minimum internal pressure design criteria. Ignition pressures within a 20-L chamber with 6.5% CH 4 -air were relatively low, with much larger head space volume and less adiabatic test conditions. The literature indicates that sizeable lithium thionyl chloride (LiSOCl 2 ) primary (non rechargeable) cell ignitions can be especially violent and toxic. Because ignition of an explosive atmosphere is expected within explosion proof or flameproof enclosures, there is a need to consider the potential for an internal explosive atmosphere ignition in combination with a lithium or lithium-ion battery thermal runaway process, and the resulting effects on the enclosure.

Design of a cross-connected charge pump for energy harvesting systems

NASA Astrophysics Data System (ADS)

Eguchi, K.; Fujisaki, H.; Asadi, F.; Oota, I.

2018-03-01

For energy harvesting systems, a novel charge pump with cross-connected structure is proposed in this paper. Owing to the cross-connected structure, the proposed charge pump can offer the output voltage to the output load at every phase. Furthermore, the proposed charge pump can reduce the number of circuit stages from the conventional charge pump. For above-mentioned reasons, the proposed charge pump can realize not only smaller internal resistance but also smaller output capacitance than the conventional charge pump. The theoretical analysis and simulation program with integrated circuit emphasis (SPICE) simulation demonstrate that the proposed charge pump outperforms the conventional charge pump in the point of power efficiency and circuit speed.

An analog silicon retina with multichip configuration.

PubMed

Kameda, Seiji; Yagi, Tetsuya

2006-01-01

The neuromorphic silicon retina is a novel analog very large scale integrated circuit that emulates the structure and the function of the retinal neuronal circuit. We fabricated a neuromorphic silicon retina, in which sample/hold circuits were embedded to generate fluctuation-suppressed outputs in the previous study [1]. The applications of this silicon retina, however, are limited because of a low spatial resolution and computational variability. In this paper, we have fabricated a multichip silicon retina in which the functional network circuits are divided into two chips: the photoreceptor network chip (P chip) and the horizontal cell network chip (H chip). The output images of the P chip are transferred to the H chip with analog voltages through the line-parallel transfer bus. The sample/hold circuits embedded in the P and H chips compensate for the pattern noise generated on the circuits, including the analog communication pathway. Using the multichip silicon retina together with an off-chip differential amplifier, spatial filtering of the image with an odd- and an even-symmetric orientation selective receptive fields was carried out in real time. The analog data transfer method in the present multichip silicon retina is useful to design analog neuromorphic multichip systems that mimic the hierarchical structure of neuronal networks in the visual system.

Automatic Design of Digital Synthetic Gene Circuits

PubMed Central

Marchisio, Mario A.; Stelling, Jörg

2011-01-01

De novo computational design of synthetic gene circuits that achieve well-defined target functions is a hard task. Existing, brute-force approaches run optimization algorithms on the structure and on the kinetic parameter values of the network. However, more direct rational methods for automatic circuit design are lacking. Focusing on digital synthetic gene circuits, we developed a methodology and a corresponding tool for in silico automatic design. For a given truth table that specifies a circuit's input–output relations, our algorithm generates and ranks several possible circuit schemes without the need for any optimization. Logic behavior is reproduced by the action of regulatory factors and chemicals on the promoters and on the ribosome binding sites of biological Boolean gates. Simulations of circuits with up to four inputs show a faithful and unequivocal truth table representation, even under parametric perturbations and stochastic noise. A comparison with already implemented circuits, in addition, reveals the potential for simpler designs with the same function. Therefore, we expect the method to help both in devising new circuits and in simplifying existing solutions. PMID:21399700

Radiation Testing and Evaluation Issues for Modern Integrated Circuits

NASA Technical Reports Server (NTRS)

LaBel, Kenneth A.; Cohn, Lew M.

2005-01-01

Abstract. Changes in modern integrated circuit (IC) technologies have modified the way we approach and conduct radiation tolerance and testing of electronics. These changes include scaling of geometries, new materials, new packaging technologies, and overall speed and device complexity challenges. In this short course section, we will identify and discuss these issues as they impact radiation testing, modeling, and effects mitigation of modern integrated circuits. The focus will be on CMOS-based technologies, however, other high performance technologies will be discussed where appropriate. The effects of concern will be: Single-Event Effects (SEE) and steady state total ionizing dose (TID) IC response. However, due to the growing use of opto-electronics in space systems issues concerning displacement damage testing will also be considered. This short course section is not intended to provide detailed "how-to-test" information, but simply provide a snapshot of current challenges and some of the approaches being considered.

Virtual Lab to Develop Achievement in Electronic Circuits for Hearing-Impaired Students

ERIC Educational Resources Information Center

Baladoh, S. M.; Elgamal, A. F.; Abas, H. A.

2017-01-01

This paper aims to report and discuss the use of a virtual lab for developing achievement in electronic circuits for hearing-impaired students. Results from a number of studies have proved that the virtual lab allowed students to build and test a wide variety of electronic circuits. The present study was implemented to investigate the…

Pre-Service and In-Service Physics Teachers' Ideas about Simple Electric Circuits

ERIC Educational Resources Information Center

Kucukozer, Huseyin; Demirci, Neset

2008-01-01

The aim of the study is to determine pre-service and high school physics teachers' ideas about simple electric circuits. In this study, a test containing eight questions related to simple electric circuits was given to the pre-service physics teachers (32 subjects) that had graduated from Balikesir University, Necatibey Faculty of Education, the…

A Novel Analog Integrated Circuit Design Course Covering Design, Layout, and Resulting Chip Measurement

ERIC Educational Resources Information Center

Lin, Wei-Liang; Cheng, Wang-Chuan; Wu, Chen-Hao; Wu, Hai-Ming; Wu, Chang-Yu; Ho, Kuan-Hsuan; Chan, Chueh-An

2010-01-01

This work describes a novel, first-year graduate-level analog integrated circuit (IC) design course. The course teaches students analog circuit design; an external manufacturer then produces their designs in three different silicon chips. The students, working in pairs, then test these chips to verify their success. All work is completed within…

A 10kW series resonant converter design, transistor characterization, and base-drive optimization

NASA Technical Reports Server (NTRS)

Robson, R.; Hancock, D.

1981-01-01

Transistors are characterized for use as switches in resonant circuit applications. A base drive circuit to provide the optimal base drive to these transistors under resonant circuit conditions is developed and then used in the design, fabrication and testing of a breadboard, spaceborne type 10 kW series resonant converter.

Engine Tune-Up Service. Unit 4: Secondary Circuit. Posttests. Automotive Mechanics Curriculum.

ERIC Educational Resources Information Center

Morse, David T.

This book of posttests is designed to accompany the Engine Tune-Up Service Student Guide for Unit 4, Secondary Circuit, available separately as CE 031 214. Focus of the posttests is testing and servicing the secondary ignition circuit. One multiple choice posttest is provided that covers the seven performance objectives contained in the unit. (No…

Unit: Electric Circuits, Inspection Pack, National Trial Print.

ERIC Educational Resources Information Center

Australian Science Education Project, Toorak, Victoria.

As a part of the unit materials in the series produced by the Australian Science Education Project, this teacher edition is primarily composed of a core relating to simple circuits, a test form, and options. Options are given under the headings: Your Invention; "How Long Does a Call Last?"; One, Two, Three Wires; Parallel Circuits; More…

Flexible Simulation E-Learning Environment for Studying Digital Circuits and Possibilities for It Deployment as Semantic Web Service

ERIC Educational Resources Information Center

Radoyska, P.; Ivanova, T.; Spasova, N.

2011-01-01

In this article we present a partially realized project for building a distributed learning environment for studying digital circuits Test and Diagnostics at TU-Sofia. We describe the main requirements for this environment, substantiate the developer platform choice, and present our simulation and circuit parameter calculation tools.…

Q factor of megahertz LC circuits based on thin films of YBaCuO high-temperature superconductor

NASA Astrophysics Data System (ADS)

Masterov, D. V.; Pavlov, S. A.; Parafin, A. E.

2008-05-01

High-frequency properties of resonant structures based on thin films of YBa2Cu3O7 δ high-temperature superconductor are studied experimentally in the frequency range 30 100 MHz. The structures planar induction coils with a self-capacitance fabricated on neodymium gallate and lanthanum aluminate substrates. The unloaded Q factor of the circuits exceeds 2 × 105 at 77 K and 40 MHz. Possible loss mechanisms that determine the Q factor of the superconducting resonant structures in the megahertz range are considered.

Electrical Performance of a High Temperature 32-I/O HTCC Alumina Package

NASA Technical Reports Server (NTRS)

Chen, Liang-Yu; Neudeck, Philip G.; Spry, David J.; Beheim, Glenn M.; Hunter, Gary W.

2016-01-01

A high temperature co-fired ceramic (HTCC) alumina material was previously electrically tested at temperatures up to 550 C, and demonstrated improved dielectric performance at high temperatures compared with the 96% alumina substrate that we used before, suggesting its potential use for high temperature packaging applications. This paper introduces a prototype 32-I/O (input/output) HTCC alumina package with platinum conductor for 500 C low-power silicon carbide (SiC) integrated circuits. The design and electrical performance of this package including parasitic capacitance and parallel conductance of neighboring I/Os from 100 Hz to 1 MHz in a temperature range from room temperature to 550 C are discussed in detail. The parasitic capacitance and parallel conductance of this package in the entire frequency and temperature ranges measured does not exceed 1.5 pF and 0.05 microsiemens, respectively. SiC integrated circuits using this package and compatible printed circuit board have been successfully tested at 500 C for over 3736 hours continuously, and at 700 C for over 140 hours. Some test examples of SiC integrated circuits with this packaging system are presented. This package is the key to prolonged T greater than or equal to 500 C operational testing of the new generation of SiC high temperature integrated circuits and other devices currently under development at NASA Glenn Research Center.

Stainless Steel NaK Circuit Integration and Fill Submission

NASA Technical Reports Server (NTRS)

Garber, Anne E.

2006-01-01

The Early Flight Fission Test Facilities (EFF-TF) team has been tasked by the Marshall Space Flight Center Nuclear Systems Office to design, fabricate, and test an actively pumped alkali metal flow circuit. The system, which was originally designed to hold a eutectic mixture of sodium potassium (NaK), was redesigned to hold lithium; but due to a shift in focus, it is once again being prepared for use with NaK. Changes made to the actively pumped, high temperature loop include the replacement of the expansion reservoir, addition of remotely operated valves, and modification of the support table. Basic circuit components include: reactor segment, NaK to gas heat exchanger, electromagnetic (EM) liquid metal pump, load/drain reservoir, expansion reservoir, instrumentation, and a spill reservoir. A 37-pin partial-array core (pin and flow path dimensions are the same as those in a full design) was selected for fabrication and test. This document summarizes the integration and fill of the pumped liquid metal NaK flow circuit.

Controlled conjugated backbone twisting for an increased open-circuit voltage while having a high short-circuit current in poly(hexylthiophene) derivatives.

PubMed

Ko, Sangwon; Hoke, Eric T; Pandey, Laxman; Hong, Sanghyun; Mondal, Rajib; Risko, Chad; Yi, Yuanping; Noriega, Rodrigo; McGehee, Michael D; Brédas, Jean-Luc; Salleo, Alberto; Bao, Zhenan

2012-03-21

Conjugated polymers with nearly planar backbones have been the most commonly investigated materials for organic-based electronic devices. More twisted polymer backbones have been shown to achieve larger open-circuit voltages in solar cells, though with decreased short-circuit current densities. We systematically impose twists within a family of poly(hexylthiophene)s and examine their influence on the performance of polymer:fullerene bulk heterojunction (BHJ) solar cells. A simple chemical modification concerning the number and placement of alkyl side chains along the conjugated backbone is used to control the degree of backbone twisting. Density functional theory calculations were carried out on a series of oligothiophene structures to provide insights on how the sterically induced twisting influences the geometric, electronic, and optical properties. Grazing incidence X-ray scattering measurements were performed to investigate how the thin-film packing structure was affected. The open-circuit voltage and charge-transfer state energy of the polymer:fullerene BHJ solar cells increased substantially with the degree of twist induced within the conjugated backbone--due to an increase in the polymer ionization potential--while the short-circuit current decreased as a result of a larger optical gap and lower hole mobility. A controlled, moderate degree of twist along the poly(3,4-dihexyl-2,2':5',2''-terthiophene) (PDHTT) conjugated backbone led to a 19% enhancement in the open-circuit voltage (0.735 V) vs poly(3-hexylthiophene)-based devices, while similar short-circuit current densities, fill factors, and hole-carrier mobilities were maintained. These factors resulted in a power conversion efficiency of 4.2% for a PDHTT:[6,6]-phenyl-C(71)-butyric acid methyl ester (PC(71)BM) blend solar cell without thermal annealing. This simple approach reveals a molecular design avenue to increase open-circuit voltage while retaining the short-circuit current.

Design of Multilayer Dual-Band BPF and Diplexer with Zeros Implantation Using Suspended Stripline

NASA Astrophysics Data System (ADS)

Ho, Min-Hua; Hsu, Wei-Hong

In this paper, a dual-band bandpass filter (BPF) of multilayer suspended stripline (SSL) structure and an SSL diplexer composed of a low-pass filter (LPF) and a high-pass filter (HPF) are proposed. Bandstop structure creating transmission zeros is adopted in the BPF and diplexer, enhancing the signal selectivity of the former and increasing the isolation between the diverting ports of the latter. The dual-band BPF possesses two distinct bandpass structures and a bandstop circuit, all laid on different metallic layers. The metallic layers together with the supporting substrates are vertically stacked up to save the circuit dimension. The LPF and HPF used in the diplexer structure are designed by a quasi-lumped approach, which the LC lumped-elements circuit models are developed to analyze filters' characteristics and to emulate their frequency responses. Half-wavelength resonating slots are employed in the diplexer's structure to increase the isolation between its two signal diverting ports. Experiments are conducted to verify the multilayer dual-band BPF and the diplexer design. Agreements are observed between the simulation and the measurement.

Rotor instrumentation circuits for the Sandia 34-meter vertical axis wind turbine

NASA Astrophysics Data System (ADS)

Sutherland, Herbert J.; Stephenson, William A.

1988-07-01

Sandia National Laboratories has erected a research oriented, 34-meter diameter, Darrieus vertical axis wind turbine near Bushland, Texas, which has been designated the Sandia 34-m VAWT Test Bed. To meet present and future research needs, the machine was equipped with a large array of sensors. This manuscript details the sensors initially placed on the rotor, their respective instrumentation circuits, and the provisions incorporated into the design of the rotor instrumentation circuits for future research. This manuscript was written as a reference manual for the rotor instrumentation of the Test Bed.

A Resonant Damping Study Using Piezoelectric Materials

NASA Technical Reports Server (NTRS)

Min, J. B.; Duffy, K. P.; Choi, B. B.; Morrison, C. R.; Jansen, R. H.; Provenza, A. J.

2008-01-01

Excessive vibration of turbomachinery blades causes high cycle fatigue (HCF) problems requiring damping treatments to mitigate vibration levels. Based on the technical challenges and requirements learned from previous turbomachinery blade research, a feasibility study of resonant damping control using shunted piezoelectric patches with passive and active control techniques has been conducted on cantilever beam specimens. Test results for the passive damping circuit show that the optimum resistive shunt circuit reduces the third bending resonant vibration by almost 50%, and the optimum inductive circuit reduces the vibration by 90%. In a separate test, active control reduced vibration by approximately 98%.

Experimental simulation of internal short circuit in Li-ion and Li-ion-Polymer cells

DOE Office of Scientific and Technical Information (OSTI.GOV)

Cai, Wei; Wang, Hsin; Maleki, Hossein

A multi-parameter controlled pinch test was developed to study the occurrence of internal short circuits in Li-ion and Li-ion-polymer cells. By tuning the control parameters (i.e., cell voltage as well as pinching area, load, and speed), the pinch test can reproducibly create ~1 to 2 mm wide internal short between a cell jelly-roll s inner layer electrodes. This recreates conditions similar to those that may occur during service. Furthermore, the pinch test is used to determine thermal stability of two Li-ion-polymer cells of different designs built by the same manufacturer. The pinch test method can be used to help distinguishmore » cells with design features or characteristics that lower risk of potential thermal events created by internal short circuits.« less

A study of ignition and simulation circuits for arcjet thrusters, part 1. M.S. Thesis Final Report

NASA Technical Reports Server (NTRS)

Stuart, Thomas A.; King, Roger J.; Altenburger, Gene P.

1991-01-01

A 1 kW electronic load was programmed to simulate the nonlinear i-v (volt-ampere) characteristics of an arcjet, both ignited and unignited. The simulator was tested and found to closely resemble an arcjet both for large transients and small perturbances up to about 40 kHz. No attempt was made to simulate the ignition process itself. The dynamic behavior of the arcjet (and the simulator) was shown to differ significantly from that of a resistor bank. Previous research led to the design and construction of a 1 kW arcjet power supply. A high voltage ignition circuit was added to this hardware, and tests on a 1 kW arcjet were performed at NASA-Lewis. All tests were successful and no ignition failures were observed. Circuit documentation and test results are included.