Science.gov

Sample records for coding circuits

  1. Electrical Circuit Simulation Code

    SciTech Connect

    Wix, Steven D.; Waters, Arlon J.; Shirley, David

    2001-08-09

    Massively-Parallel Electrical Circuit Simulation Code. CHILESPICE is a massively-arallel distributed-memory electrical circuit simulation tool that contains many enhanced radiation, time-based, and thermal features and models. Large scale electronic circuit simulation. Shared memory, parallel processing, enhance convergence. Sandia specific device models.

  2. Electromagnetic Gun Circuit Analysis Code (EGCAC)

    NASA Astrophysics Data System (ADS)

    Rolader, Glenn E.; Thornhill, Lindsey D.; Batteh, Jad H.; Scanlon, James J., III

    1993-01-01

    This paper describes a system engineering code that simulates the performance of a railgun/power supply system. The code, named EGCAC (Electromagnetic Gun Circuit Analysis Code), accounts for many performance degrading effects including viscous drag on the armature, viscous drag on the gas being pushed in front of the projectile, entrained gas that must be accelerated in front of the projectile, time-dependent rail resistance, armature resistance, system resistance, and ablation drag. EGCAC has been utilized to predict railgun performance up to a velocity of approximately 4 km/s for experiments at several laboratories. In this paper, the theory of EGCAC is described, and sample calculations are presented.

  3. 49 CFR 236.727 - Circuit, track; coded.

    Code of Federal Regulations, 2010 CFR

    2010-10-01

    ... 49 Transportation 4 2010-10-01 2010-10-01 false Circuit, track; coded. 236.727 Section 236.727 Transportation Other Regulations Relating to Transportation (Continued) FEDERAL RAILROAD ADMINISTRATION... Circuit, track; coded. A track circuit in which the energy is varied or interrupted periodically....

  4. 49 CFR 236.727 - Circuit, track; coded.

    Code of Federal Regulations, 2014 CFR

    2014-10-01

    ... 49 Transportation 4 2014-10-01 2014-10-01 false Circuit, track; coded. 236.727 Section 236.727 Transportation Other Regulations Relating to Transportation (Continued) FEDERAL RAILROAD ADMINISTRATION... Circuit, track; coded. A track circuit in which the energy is varied or interrupted periodically....

  5. 49 CFR 236.727 - Circuit, track; coded.

    Code of Federal Regulations, 2012 CFR

    2012-10-01

    ... 49 Transportation 4 2012-10-01 2012-10-01 false Circuit, track; coded. 236.727 Section 236.727 Transportation Other Regulations Relating to Transportation (Continued) FEDERAL RAILROAD ADMINISTRATION... Circuit, track; coded. A track circuit in which the energy is varied or interrupted periodically....

  6. 49 CFR 236.727 - Circuit, track; coded.

    Code of Federal Regulations, 2011 CFR

    2011-10-01

    ... 49 Transportation 4 2011-10-01 2011-10-01 false Circuit, track; coded. 236.727 Section 236.727 Transportation Other Regulations Relating to Transportation (Continued) FEDERAL RAILROAD ADMINISTRATION... Circuit, track; coded. A track circuit in which the energy is varied or interrupted periodically....

  7. Practical applications of digital integrated circuits. Part 2: Minimization techniques, code conversion, flip-flops, and asynchronous circuits

    NASA Technical Reports Server (NTRS)

    1972-01-01

    Here, the 7400 line of transistor to transistor logic (TTL) devices is emphasized almost exclusively where hardware is concerned. However, it should be pointed out that the logic theory contained herein applies to all hardware. Binary numbers, simplification of logic circuits, code conversion circuits, basic flip-flop theory, details about series 54/7400, and asynchronous circuits are discussed.

  8. Dynamic Coding of Signed Quantities in Cortical Feedback Circuits

    PubMed Central

    Ballard, Dana H.; Jehee, Janneke

    2012-01-01

    In the early sensory and motor areas of the cortex, individual neurons transmit information about specific sensory features via a peaked response. This concept has been crystallized as “labeled lines,” to denote that axons communicate the specific properties of their sensory or motor parent cell. Such cells also can be characterized as being polarized, that is, as representing a signed quantity that is either positive or negative. We show in a model simulation that there are two important consequences when learning receptive fields using such signed codings in circuits that subtract different inputs. The first is that, in feedback circuits using labeled lines, such arithmetic operations need to be distributed across multiple distinct pathways. The second consequence is that such pathways must be necessarily dynamic, i.e., that synapses can grow and retract when forming receptive fields. The model monitors the breaking and growing of new circuit connections when their synapses need to change polarities and predicts that the rate of such changes should be inversely correlated with the progress of receptive field formation. PMID:22876235

  9. User`s guide and physics manual for the SCATPlus circuit code

    SciTech Connect

    Yapuncich, M.L.; Deninger, W.J.; Gribble, R.F.

    1994-05-09

    ScatPlus is a user friendly circuit code and an expandable library of circuit models for electrical components and devices; it can be used to predict the transient behavior in electric circuits. The heart of ScatPlus is the transient circuit solver SCAT written in 1986 by R.F. Gribble. This manual includes system requirements, physics manual, ScatPlus component library, tutorial, ScatPlus screen, menus and toolbar, ScatPlus tool bar, procedures.

  10. Quantum circuit for optimal eavesdropping in quantum key distribution using phase-time coding

    SciTech Connect

    Kronberg, D. A.; Molotkov, S. N.

    2010-07-15

    A quantum circuit is constructed for optimal eavesdropping on quantum key distribution proto- cols using phase-time coding, and its physical implementation based on linear and nonlinear fiber-optic components is proposed.

  11. Direction-Selective Circuits Shape Noise to Ensure a Precise Population Code.

    PubMed

    Zylberberg, Joel; Cafaro, Jon; Turner, Maxwell H; Shea-Brown, Eric; Rieke, Fred

    2016-01-20

    Neural responses are noisy, and circuit structure can correlate this noise across neurons. Theoretical studies show that noise correlations can have diverse effects on population coding, but these studies rarely explore stimulus dependence of noise correlations. Here, we show that noise correlations in responses of ON-OFF direction-selective retinal ganglion cells are strongly stimulus dependent, and we uncover the circuit mechanisms producing this stimulus dependence. A population model based on these mechanistic studies shows that stimulus-dependent noise correlations improve the encoding of motion direction 2-fold compared to independent noise. This work demonstrates a mechanism by which a neural circuit effectively shapes its signal and noise in concert, minimizing corruption of signal by noise. Finally, we generalize our findings beyond direction coding in the retina and show that stimulus-dependent correlations will generally enhance information coding in populations of diversely tuned neurons. PMID:26796691

  12. Direction-Selective Circuits Shape Noise to Ensure a Precise Population Code.

    PubMed

    Zylberberg, Joel; Cafaro, Jon; Turner, Maxwell H; Shea-Brown, Eric; Rieke, Fred

    2016-01-20

    Neural responses are noisy, and circuit structure can correlate this noise across neurons. Theoretical studies show that noise correlations can have diverse effects on population coding, but these studies rarely explore stimulus dependence of noise correlations. Here, we show that noise correlations in responses of ON-OFF direction-selective retinal ganglion cells are strongly stimulus dependent, and we uncover the circuit mechanisms producing this stimulus dependence. A population model based on these mechanistic studies shows that stimulus-dependent noise correlations improve the encoding of motion direction 2-fold compared to independent noise. This work demonstrates a mechanism by which a neural circuit effectively shapes its signal and noise in concert, minimizing corruption of signal by noise. Finally, we generalize our findings beyond direction coding in the retina and show that stimulus-dependent correlations will generally enhance information coding in populations of diversely tuned neurons.

  13. Development of a numerical computer code and circuit element models for simulation of firing systems

    SciTech Connect

    Carpenter, K.H. . Dept. of Electrical and Computer Engineering)

    1990-07-02

    Numerical simulation of firing systems requires both the appropriate circuit analysis framework and the special element models required by the application. We have modified the SPICE circuit analysis code (version 2G.6), developed originally at the Electronic Research Laboratory of the University of California, Berkeley, to allow it to be used on MSDOS-based, personal computers and to give it two additional circuit elements needed by firing systems--fuses and saturating inductances. An interactive editor and a batch driver have been written to ease the use of the SPICE program by system designers, and the interactive graphical post processor, NUTMEG, supplied by U. C. Berkeley with SPICE version 3B1, has been interfaced to the output from the modified SPICE. Documentation and installation aids have been provided to make the total software system accessible to PC users. Sample problems show that the resulting code is in agreement with the FIRESET code on which the fuse model was based (with some modifications to the dynamics of scaling fuse parameters). In order to allow for more complex simulations of firing systems, studies have been made of additional special circuit elements--switches and ferrite cored inductances. A simple switch model has been investigated which promises to give at least a first approximation to the physical effects of a non ideal switch, and which can be added to the existing SPICE circuits without changing the SPICE code itself. The effect of fast rise time pulses on ferrites has been studied experimentally in order to provide a base for future modeling and incorporation of the dynamic effects of changes in core magnetization into the SPICE code. This report contains detailed accounts of the work on these topics performed during the period it covers, and has appendices listing all source code written documentation produced.

  14. SPOCK: A SPICE based circuit code for modeling pulsed power machines

    SciTech Connect

    Ingermanson, R.; Parks, D.

    1996-12-31

    SPICE is an industry standard electrical circuit simulation code developed by the University of California at Berkeley over the last twenty years. The authors have developed a number of new SPICE devices of interest to the pulsed power community: plasma opening switches, plasma radiation sources, bremsstrahlung diodes, magnetically insulated transmission lines, explosively driven flux compressors. These new devices are integrated into SPICE using S-Cubed`s MIRIAD technology to create a user-friendly circuit code that runs on Unix workstations or under Windows NT or Windows 95. The new circuit code is called SPOCK--``S-Cubed Power Optimizing Circuit Kit.`` SPOCK allows the user to easily run optimization studies by setting up runs in which any circuit parameters can be systematically varied. Results can be plotted as 1-D line plots, 2-D contour plots, or 3-D ``bedsheet`` plots. The authors demonstrate SPOCK`s capabilities on a color laptop computer, performing realtime analysis of typical configurations of such machines as HAWK and ACE4.

  15. How Do Efficient Coding Strategies Depend on Origins of Noise in Neural Circuits?

    PubMed Central

    Shea-Brown, Eric

    2016-01-01

    Neural circuits reliably encode and transmit signals despite the presence of noise at multiple stages of processing. The efficient coding hypothesis, a guiding principle in computational neuroscience, suggests that a neuron or population of neurons allocates its limited range of responses as efficiently as possible to best encode inputs while mitigating the effects of noise. Previous work on this question relies on specific assumptions about where noise enters a circuit, limiting the generality of the resulting conclusions. Here we systematically investigate how noise introduced at different stages of neural processing impacts optimal coding strategies. Using simulations and a flexible analytical approach, we show how these strategies depend on the strength of each noise source, revealing under what conditions the different noise sources have competing or complementary effects. We draw two primary conclusions: (1) differences in encoding strategies between sensory systems—or even adaptational changes in encoding properties within a given system—may be produced by changes in the structure or location of neural noise, and (2) characterization of both circuit nonlinearities as well as noise are necessary to evaluate whether a circuit is performing efficiently. PMID:27741248

  16. Improving reliability of non-volatile memory technologies through circuit level techniques and error control coding

    NASA Astrophysics Data System (ADS)

    Yang, Chengen; Emre, Yunus; Cao, Yu; Chakrabarti, Chaitali

    2012-12-01

    Non-volatile resistive memories, such as phase-change RAM (PRAM) and spin transfer torque RAM (STT-RAM), have emerged as promising candidates because of their fast read access, high storage density, and very low standby power. Unfortunately, in scaled technologies, high storage density comes at a price of lower reliability. In this article, we first study in detail the causes of errors for PRAM and STT-RAM. We see that while for multi-level cell (MLC) PRAM, the errors are due to resistance drift, in STT-RAM they are due to process variations and variations in the device geometry. We develop error models to capture these effects and propose techniques based on tuning of circuit level parameters to mitigate some of these errors. Unfortunately for reliable memory operation, only circuit-level techniques are not sufficient and so we propose error control coding (ECC) techniques that can be used on top of circuit-level techniques. We show that for STT-RAM, a combination of voltage boosting and write pulse width adjustment at the circuit-level followed by a BCH-based ECC scheme can reduce the block failure rate (BFR) to 10-8. For MLC-PRAM, a combination of threshold resistance tuning and BCH-based product code ECC scheme can achieve the same target BFR of 10-8. The product code scheme is flexible; it allows migration to a stronger code to guarantee the same target BFR when the raw bit error rate increases with increase in the number of programming cycles.

  17. Trading Speed and Accuracy by Coding Time: A Coupled-circuit Cortical Model

    PubMed Central

    Standage, Dominic; You, Hongzhi; Wang, Da-Hui; Dorris, Michael C.

    2013-01-01

    Our actions take place in space and time, but despite the role of time in decision theory and the growing acknowledgement that the encoding of time is crucial to behaviour, few studies have considered the interactions between neural codes for objects in space and for elapsed time during perceptual decisions. The speed-accuracy trade-off (SAT) provides a window into spatiotemporal interactions. Our hypothesis is that temporal coding determines the rate at which spatial evidence is integrated, controlling the SAT by gain modulation. Here, we propose that local cortical circuits are inherently suited to the relevant spatial and temporal coding. In simulations of an interval estimation task, we use a generic local-circuit model to encode time by ‘climbing’ activity, seen in cortex during tasks with a timing requirement. The model is a network of simulated pyramidal cells and inhibitory interneurons, connected by conductance synapses. A simple learning rule enables the network to quickly produce new interval estimates, which show signature characteristics of estimates by experimental subjects. Analysis of network dynamics formally characterizes this generic, local-circuit timing mechanism. In simulations of a perceptual decision task, we couple two such networks. Network function is determined only by spatial selectivity and NMDA receptor conductance strength; all other parameters are identical. To trade speed and accuracy, the timing network simply learns longer or shorter intervals, driving the rate of downstream decision processing by spatially non-selective input, an established form of gain modulation. Like the timing network's interval estimates, decision times show signature characteristics of those by experimental subjects. Overall, we propose, demonstrate and analyse a generic mechanism for timing, a generic mechanism for modulation of decision processing by temporal codes, and we make predictions for experimental verification. PMID:23592967

  18. A multi coding technique to reduce transition activity in VLSI circuits

    NASA Astrophysics Data System (ADS)

    Vithyalakshmi, N.; Rajaram, M.

    2014-02-01

    Advances in VLSI technology have enabled the implementation of complex digital circuits in a single chip, reducing system size and power consumption. In deep submicron low power CMOS VLSI design, the main cause of energy dissipation is charging and discharging of internal node capacitances due to transition activity. Transition activity is one of the major factors that also affect the dynamic power dissipation. This paper proposes power reduction analyzed through algorithm and logic circuit levels. In algorithm level the key aspect of reducing power dissipation is by minimizing transition activity and is achieved by introducing a data coding technique. So a novel multi coding technique is introduced to improve the efficiency of transition activity up to 52.3% on the bus lines, which will automatically reduce the dynamic power dissipation. In addition, 1 bit full adders are introduced in the Hamming distance estimator block, which reduces the device count. This coding method is implemented using Verilog HDL. The overall performance is analyzed by using Modelsim and Xilinx Tools. In total 38.2% power saving capability is achieved compared to other existing methods.

  19. Superconducting quantum circuits at the surface code threshold for fault tolerance

    NASA Astrophysics Data System (ADS)

    Barends, R.; Kelly, J.; Megrant, A.; Veitia, A.; Sank, D.; Jeffrey, E.; White, T. C.; Mutus, J.; Fowler, A. G.; Campbell, B.; Chen, Y.; Chen, Z.; Chiaro, B.; Dunsworth, A.; Neill, C.; O'Malley, P.; Roushan, P.; Vainsencher, A.; Wenner, J.; Korotkov, A. N.; Cleland, A. N.; Martinis, John M.

    2014-04-01

    A quantum computer can solve hard problems, such as prime factoring, database searching and quantum simulation, at the cost of needing to protect fragile quantum states from error. Quantum error correction provides this protection by distributing a logical state among many physical quantum bits (qubits) by means of quantum entanglement. Superconductivity is a useful phenomenon in this regard, because it allows the construction of large quantum circuits and is compatible with microfabrication. For superconducting qubits, the surface code approach to quantum computing is a natural choice for error correction, because it uses only nearest-neighbour coupling and rapidly cycled entangling gates. The gate fidelity requirements are modest: the per-step fidelity threshold is only about 99 per cent. Here we demonstrate a universal set of logic gates in a superconducting multi-qubit processor, achieving an average single-qubit gate fidelity of 99.92 per cent and a two-qubit gate fidelity of up to 99.4 per cent. This places Josephson quantum computing at the fault-tolerance threshold for surface code error correction. Our quantum processor is a first step towards the surface code, using five qubits arranged in a linear array with nearest-neighbour coupling. As a further demonstration, we construct a five-qubit Greenberger-Horne-Zeilinger state using the complete circuit and full set of gates. The results demonstrate that Josephson quantum computing is a high-fidelity technology, with a clear path to scaling up to large-scale, fault-tolerant quantum circuits.

  20. Superconducting quantum circuits at the surface code threshold for fault tolerance.

    PubMed

    Barends, R; Kelly, J; Megrant, A; Veitia, A; Sank, D; Jeffrey, E; White, T C; Mutus, J; Fowler, A G; Campbell, B; Chen, Y; Chen, Z; Chiaro, B; Dunsworth, A; Neill, C; O'Malley, P; Roushan, P; Vainsencher, A; Wenner, J; Korotkov, A N; Cleland, A N; Martinis, John M

    2014-04-24

    A quantum computer can solve hard problems, such as prime factoring, database searching and quantum simulation, at the cost of needing to protect fragile quantum states from error. Quantum error correction provides this protection by distributing a logical state among many physical quantum bits (qubits) by means of quantum entanglement. Superconductivity is a useful phenomenon in this regard, because it allows the construction of large quantum circuits and is compatible with microfabrication. For superconducting qubits, the surface code approach to quantum computing is a natural choice for error correction, because it uses only nearest-neighbour coupling and rapidly cycled entangling gates. The gate fidelity requirements are modest: the per-step fidelity threshold is only about 99 per cent. Here we demonstrate a universal set of logic gates in a superconducting multi-qubit processor, achieving an average single-qubit gate fidelity of 99.92 per cent and a two-qubit gate fidelity of up to 99.4 per cent. This places Josephson quantum computing at the fault-tolerance threshold for surface code error correction. Our quantum processor is a first step towards the surface code, using five qubits arranged in a linear array with nearest-neighbour coupling. As a further demonstration, we construct a five-qubit Greenberger-Horne-Zeilinger state using the complete circuit and full set of gates. The results demonstrate that Josephson quantum computing is a high-fidelity technology, with a clear path to scaling up to large-scale, fault-tolerant quantum circuits.

  1. Superconducting quantum circuits at the surface code threshold for fault tolerance.

    PubMed

    Barends, R; Kelly, J; Megrant, A; Veitia, A; Sank, D; Jeffrey, E; White, T C; Mutus, J; Fowler, A G; Campbell, B; Chen, Y; Chen, Z; Chiaro, B; Dunsworth, A; Neill, C; O'Malley, P; Roushan, P; Vainsencher, A; Wenner, J; Korotkov, A N; Cleland, A N; Martinis, John M

    2014-04-24

    A quantum computer can solve hard problems, such as prime factoring, database searching and quantum simulation, at the cost of needing to protect fragile quantum states from error. Quantum error correction provides this protection by distributing a logical state among many physical quantum bits (qubits) by means of quantum entanglement. Superconductivity is a useful phenomenon in this regard, because it allows the construction of large quantum circuits and is compatible with microfabrication. For superconducting qubits, the surface code approach to quantum computing is a natural choice for error correction, because it uses only nearest-neighbour coupling and rapidly cycled entangling gates. The gate fidelity requirements are modest: the per-step fidelity threshold is only about 99 per cent. Here we demonstrate a universal set of logic gates in a superconducting multi-qubit processor, achieving an average single-qubit gate fidelity of 99.92 per cent and a two-qubit gate fidelity of up to 99.4 per cent. This places Josephson quantum computing at the fault-tolerance threshold for surface code error correction. Our quantum processor is a first step towards the surface code, using five qubits arranged in a linear array with nearest-neighbour coupling. As a further demonstration, we construct a five-qubit Greenberger-Horne-Zeilinger state using the complete circuit and full set of gates. The results demonstrate that Josephson quantum computing is a high-fidelity technology, with a clear path to scaling up to large-scale, fault-tolerant quantum circuits. PMID:24759412

  2. Traveling-wave-tube simulation: The IBC (Interactive Beam-Circuit) code

    SciTech Connect

    Morey, I.J.; Birdsall, C.K.

    1989-09-26

    Interactive Beam-Circuit (IBC) is a one-dimensional many particle simulation code which has been developed to run interactively on a PC or Workstation, and displaying most of the important physics of a traveling-wave-tube. The code is a substantial departure from previous efforts, since it follows all of the particles in the tube, rather than just those in one wavelength, as commonly done. This step allows for nonperiodic inputs in time, a nonuniform line and a large set of spatial diagnostics. The primary aim is to complement a microwave tube lecture course, although past experience has shown that such codes readily become research tools. Simple finite difference methods are used to model the fields of the coupled slow-wave transmission line. The coupling between the beam and the transmission line is based upon the finite difference equations of Brillouin. The space-charge effects are included, in a manner similar to that used by Hess; the original part is use of particle-in-cell techniques to model the space-charge fields. 11 refs., 11 figs.

  3. Spatial information outflow from the hippocampal circuit: distributed spatial coding and phase precession in the subiculum.

    PubMed

    Kim, Steve M; Ganguli, Surya; Frank, Loren M

    2012-08-22

    Hippocampal place cells convey spatial information through a combination of spatially selective firing and theta phase precession. The way in which this information influences regions like the subiculum that receive input from the hippocampus remains unclear. The subiculum receives direct inputs from area CA1 of the hippocampus and sends divergent output projections to many other parts of the brain, so we examined the firing patterns of rat subicular neurons. We found a substantial transformation in the subicular code for space from sparse to dense firing rate representations along a proximal-distal anatomical gradient: neurons in the proximal subiculum are more similar to canonical, sparsely firing hippocampal place cells, whereas neurons in the distal subiculum have higher firing rates and more distributed spatial firing patterns. Using information theory, we found that the more distributed spatial representation in the subiculum carries, on average, more information about spatial location and context than the sparse spatial representation in CA1. Remarkably, despite the disparate firing rate properties of subicular neurons, we found that neurons at all proximal-distal locations exhibit robust theta phase precession, with similar spiking oscillation frequencies as neurons in area CA1. Our findings suggest that the subiculum is specialized to compress sparse hippocampal spatial codes into highly informative distributed codes suitable for efficient communication to other brain regions. Moreover, despite this substantial compression, the subiculum maintains finer scale temporal properties that may allow it to participate in oscillatory phase coding and spike timing-dependent plasticity in coordination with other regions of the hippocampal circuit.

  4. Spatial information outflow from the hippocampal circuit: distributed spatial coding and phase precession in the subiculum

    PubMed Central

    Kim, Steve M.; Ganguli, Surya; Frank, Loren M.

    2012-01-01

    Hippocampal place cells convey spatial information through a combination of spatially-selective firing and theta phase precession. The way in which this information influences regions like the subiculum that receive input from the hippocampus remains unclear. The subiculum receives direct inputs from area CA1 of the hippocampus and sends divergent output projections to many other parts of the brain, so we examined the firing patterns of rat subicular neurons. We found a substantial transformation in the subicular code for space from sparse to dense firing rate representations along a proximal-distal anatomical gradient: neurons in the proximal subiculum are more similar to canonical, sparsely firing hippocampal place cells, whereas neurons in the distal subiculum have higher firing rates and more distributed spatial firing patterns. Using information theory, we found that the more distributed spatial representation in the subiculum carries, on average, more information about spatial location and context than the sparse spatial representation in CA1. Remarkably, despite the disparate firing rate properties of subicular neurons, we found that neurons at all proximal-distal locations exhibit robust theta phase precession, with similar spiking oscillation frequencies as neurons in area CA1. Our findings suggest that the subiculum is specialized to compress sparse hippocampal spatial codes into highly informative distributed codes suitable for efficient communication to other brain regions. Moreover, despite this substantial compression, the subiculum maintains finer scale temporal properties that may allow it to participate in oscillatory phase coding and spike timing-dependent plasticity in coordination with other regions of the hippocampal circuit. PMID:22915100

  5. Self-stabilization techniques for intermediate power level in stacked-Vdd integrated circuits using DC-balanced coding methods

    NASA Astrophysics Data System (ADS)

    Kohara, Yusuke; Kubo, Naoya; Nishiyama, Tomofumi; Koizuka, Taiki; Alimudin, Mohammad; Rahmat, Amirul; Okamura, Hitoshi; Yamanokuchi, Tomoyuki; Nakamura, Kazuyuki

    2016-04-01

    Two new parallel bus coding methods for generating a DC-balanced code with additional bits are proposed to achieve the self-stabilization of the intermediate power level in Stacked-Vdd integrated circuits. They contribute to producing a uniform switching current in parallel inputs and outputs (I/Os). Type I coding minimizes the difference in the number of switchings between the upper and lower CMOS I/Os by 8B/10B coding followed by toggle conversion. Type II coding, in which the multi-value running disparity control feature is integrated into the bus-invert coding, requires only one redundant bit for any wider bus. Their DC-balanced feature and the stability effect of the intermediate power level in the Stacked-Vdd structure were experimentally confirmed from the measurement results obtained from the developed test chips.

  6. Simulation of TunneLadder traveling-wave tube cold-test characteristics: Implementation of the three-dimensional, electromagnetic circuit analysis code micro-SOS

    NASA Technical Reports Server (NTRS)

    Kory, Carol L.; Wilson, Jeffrey D.

    1993-01-01

    The three-dimensional, electromagnetic circuit analysis code, Micro-SOS, can be used to reduce expensive time-consuming experimental 'cold-testing' of traveling-wave tube (TWT) circuits. The frequency-phase dispersion characteristics and beam interaction impedance of a TunneLadder traveling-wave tube slow-wave structure were simulated using the code. When reasonable dimensional adjustments are made, computer results agree closely with experimental data. Modifications to the circuit geometry that would make the TunneLadder TWT easier to fabricate for higher frequency operation are explored.

  7. Heat removal (wetting, heat transfer, T/H, secondary circuit, code validation etc.)

    SciTech Connect

    Dury, T.; Siman-Tov, M.

    1996-06-01

    This working group provided a comprehensive list of feasibility and uncertainty issues. Most of the issues seem to fall into the `needed but can be worked out` category. They feel these can be worked out as the project develops. A few issues can be considered critical or feasibility issues (that must be proven to be feasible). Those include: (1) Thermal shock and its mitigation (>1 MW); how to inject the He bubbles (if used) - back pressure into He lines - mercury traces in He lines; how to maintain proper bubble distribution and size (static and dynamic; if used); vibrations and fatigue (dynamic); possibility of cavitation from thermal shock. (2) Wetting and/or non-wetting of mercury on containment walls with or without gases and its effect on heat transfer (and materials). (3) Prediction capabilities in the CFD code; bubbles behavior in mercury (if used) - cross stream turbulence (ESS only) - wetting/non-wetting effects. (4) Cooling of beam `windows`; concentration of local heat deposition at center, especially if beam is of parabolic profile.

  8. TWO-PHASE FLOW STUDIES IN NUCLEAR POWER PLANT PRIMARY CIRCUITS USING THE THREE-DIMENSIONAL THERMAL-HYDRAULIC CODE BAGIRA.

    SciTech Connect

    KOHURT, P. , KALINICHENKO, S.D.; KROSHILIN, A.E.; KROSHILIN, V.E.; SMIRNOV, A.V.

    2006-06-04

    In this paper we present recent results of the application of the thermal-hydraulic code BAGIRA to the analysis of complex two-phase flows in nuclear power plants primary loops. In particular, we performed benchmark numerical simulation of an integral LOCA experiment performed on a test facility modeling the primary circuit of VVER-1000. In addition, we have also analyzed the flow patterns in the VVER-1000 steam generator vessel for stationary and transient operation regimes. For both of these experiments we have compared the numerical results with measured data. Finally, we demonstrate the capabilities of BAGIRA by modeling a hypothetical severe accident for a VVER-1000 type nuclear reactor. The numerical analysis, which modeled all stages of the hypothetical severe accident up to the complete ablation of the reactor cavity bottom, shows the importance of multi-dimensional flow effects.

  9. Measuring circuit

    DOEpatents

    Sun, Shan C.; Chaprnka, Anthony G.

    1977-01-11

    An automatic gain control circuit functions to adjust the magnitude of an input signal supplied to a measuring circuit to a level within the dynamic range of the measuring circuit while a log-ratio circuit adjusts the magnitude of the output signal from the measuring circuit to the level of the input signal and optimizes the signal-to-noise ratio performance of the measuring circuit.

  10. Driver circuit

    NASA Technical Reports Server (NTRS)

    Matsumoto, Raymond T. (Inventor); Higashi, Stanley T. (Inventor)

    1976-01-01

    A driver circuit which has low power requirements, a relatively small number of components and provides flexibility in output voltage setting. The driver circuit comprises, essentially, two portions which are selectively activated by the application of input signals. The output signal is determined by which of the two circuit portions is activated. While each of the two circuit portions operates in a manner similar to silicon controlled rectifiers (SCR), the circuit portions are on only when an input signal is supplied thereto.

  11. Genetic circuit design automation.

    PubMed

    Nielsen, Alec A K; Der, Bryan S; Shin, Jonghyeon; Vaidyanathan, Prashant; Paralanov, Vanya; Strychalski, Elizabeth A; Ross, David; Densmore, Douglas; Voigt, Christopher A

    2016-04-01

    Computation can be performed in living cells by DNA-encoded circuits that process sensory information and control biological functions. Their construction is time-intensive, requiring manual part assembly and balancing of regulator expression. We describe a design environment, Cello, in which a user writes Verilog code that is automatically transformed into a DNA sequence. Algorithms build a circuit diagram, assign and connect gates, and simulate performance. Reliable circuit design requires the insulation of gates from genetic context, so that they function identically when used in different circuits. We used Cello to design 60 circuits forEscherichia coli(880,000 base pairs of DNA), for which each DNA sequence was built as predicted by the software with no additional tuning. Of these, 45 circuits performed correctly in every output state (up to 10 regulators and 55 parts), and across all circuits 92% of the output states functioned as predicted. Design automation simplifies the incorporation of genetic circuits into biotechnology projects that require decision-making, control, sensing, or spatial organization.

  12. Genetic circuit design automation.

    PubMed

    Nielsen, Alec A K; Der, Bryan S; Shin, Jonghyeon; Vaidyanathan, Prashant; Paralanov, Vanya; Strychalski, Elizabeth A; Ross, David; Densmore, Douglas; Voigt, Christopher A

    2016-04-01

    Computation can be performed in living cells by DNA-encoded circuits that process sensory information and control biological functions. Their construction is time-intensive, requiring manual part assembly and balancing of regulator expression. We describe a design environment, Cello, in which a user writes Verilog code that is automatically transformed into a DNA sequence. Algorithms build a circuit diagram, assign and connect gates, and simulate performance. Reliable circuit design requires the insulation of gates from genetic context, so that they function identically when used in different circuits. We used Cello to design 60 circuits forEscherichia coli(880,000 base pairs of DNA), for which each DNA sequence was built as predicted by the software with no additional tuning. Of these, 45 circuits performed correctly in every output state (up to 10 regulators and 55 parts), and across all circuits 92% of the output states functioned as predicted. Design automation simplifies the incorporation of genetic circuits into biotechnology projects that require decision-making, control, sensing, or spatial organization. PMID:27034378

  13. ADDER CIRCUIT

    DOEpatents

    Jacobsohn, D.H.; Merrill, L.C.

    1959-01-20

    An improved parallel addition unit is described which is especially adapted for use in electronic digital computers and characterized by propagation of the carry signal through each of a plurality of denominationally ordered stages within a minimum time interval. In its broadest aspects, the invention incorporates a fast multistage parallel digital adder including a plurality of adder circuits, carry-propagation circuit means in all but the most significant digit stage, means for conditioning each carry-propagation circuit during the time period in which information is placed into the adder circuits, and means coupling carry-generation portions of thc adder circuit to the carry propagating means.

  14. GATING CIRCUITS

    DOEpatents

    Merrill, L.C.

    1958-10-14

    Control circuits for vacuum tubes are described, and a binary counter having an improved trigger circuit is reported. The salient feature of the binary counter is the application of the input signal to the cathode of each of two vacuum tubes through separate capacitors and the connection of each cathode to ground through separate diodes. The control of the binary counter is achieved in this manner without special pulse shaping of the input signal. A further advantage of the circuit is the simplicity and minimum nuruber of components required, making its use particularly desirable in computer machines.

  15. MULTIPLIER CIRCUIT

    DOEpatents

    Thomas, R.E.

    1959-01-20

    An electronic circuit is presented for automatically computing the product of two selected variables by multiplying the voltage pulses proportional to the variables. The multiplier circuit has a plurality of parallel resistors of predetermined values connected through separate gate circults between a first input and the output terminal. One voltage pulse is applied to thc flrst input while the second voltage pulse is applied to control circuitry for the respective gate circuits. Thc magnitude of the second voltage pulse selects the resistors upon which the first voltage pulse is imprcssed, whereby the resultant output voltage is proportional to the product of the input voltage pulses

  16. TRIPPING CIRCUIT

    DOEpatents

    Lees, G.W.; McCormick, E.D.

    1962-05-22

    A tripping circuit employing a magnetic amplifier for tripping a reactor in response to power level, period, or instrument failure is described. A reference winding and signal winding are wound in opposite directions on the core. Current from an ion chamber passes through both windings. If the current increases at too fast a rate, a shunt circuit bypasses one or the windings and the amplifier output reverses polarity. (AEC)

  17. MULTIPLIER CIRCUIT

    DOEpatents

    Chase, R.L.

    1963-05-01

    An electronic fast multiplier circuit utilizing a transistor controlled voltage divider network is presented. The multiplier includes a stepped potentiometer in which solid state or transistor switches are substituted for mechanical wipers in order to obtain electronic switching that is extremely fast as compared to the usual servo-driven mechanical wipers. While this multiplier circuit operates as an approximation and in steps to obtain a voltage that is the product of two input voltages, any desired degree of accuracy can be obtained with the proper number of increments and adjustment of parameters. (AEC)

  18. Circuit Training.

    ERIC Educational Resources Information Center

    Nelson, Jane B.

    1998-01-01

    Describes a research-based activity for high school physics students in which they build an LC circuit and find its resonant frequency of oscillation using an oscilloscope. Includes a diagram of the apparatus and an explanation of the procedures. (DDR)

  19. Thermionic integrated circuit program: Final report

    SciTech Connect

    Wilde, D.K.; Lynn, D.K.; Hamilton, D.

    1988-05-01

    This report describes the development of an operational amplifier using radiation hardened Thermionic Integrated Circuits (TICs). The report is written as a tutorial to cover all aspects of the fabrication process and circuit development as well as the process and circuit modifications required to meet the integration requirements of the operational amplifier. Recent experimental results are discussed in which both devices and test circuit data are compared to theoretical computer code predictions. The development of compatible high-temperature thin-film resistors is also presented. Because the project is being terminated prior to the completion of the amplifier, suggestions are made for additional advance development.

  20. LOGIC CIRCUIT

    DOEpatents

    Strong, G.H.; Faught, M.L.

    1963-12-24

    A device for safety rod counting in a nuclear reactor is described. A Wheatstone bridge circuit is adapted to prevent de-energizing the hopper coils of a ball backup system if safety rods, sufficient in total control effect, properly enter the reactor core to effect shut down. A plurality of resistances form one arm of the bridge, each resistance being associated with a particular safety rod and weighted in value according to the control effect of the particular safety rod. Switching means are used to switch each of the resistances in and out of the bridge circuit responsive to the presence of a particular safety rod in its effective position in the reactor core and responsive to the attainment of a predetermined velocity by a particular safety rod enroute to its effective position. The bridge is unbalanced in one direction during normal reactor operation prior to the generation of a scram signal and the switching means and resistances are adapted to unbalance the bridge in the opposite direction if the safety rods produce a predetermined amount of control effect in response to the scram signal. The bridge unbalance reversal is then utilized to prevent the actuation of the ball backup system, or, conversely, a failure of the safety rods to produce the predetermined effect produces no unbalance reversal and the ball backup system is actuated. (AEC)

  1. Commutation circuit for an HVDC circuit breaker

    DOEpatents

    Premerlani, W.J.

    1981-11-10

    A commutation circuit for a high voltage DC circuit breaker incorporates a resistor capacitor combination and a charging circuit connected to the main breaker, such that a commutating capacitor is discharged in opposition to the load current to force the current in an arc after breaker opening to zero to facilitate arc interruption. In a particular embodiment, a normally open commutating circuit is connected across the contacts of a main DC circuit breaker to absorb the inductive system energy trapped by breaker opening and to limit recovery voltages to a level tolerable by the commutating circuit components. 13 figs.

  2. Commutation circuit for an HVDC circuit breaker

    DOEpatents

    Premerlani, William J.

    1981-01-01

    A commutation circuit for a high voltage DC circuit breaker incorporates a resistor capacitor combination and a charging circuit connected to the main breaker, such that a commutating capacitor is discharged in opposition to the load current to force the current in an arc after breaker opening to zero to facilitate arc interruption. In a particular embodiment, a normally open commutating circuit is connected across the contacts of a main DC circuit breaker to absorb the inductive system energy trapped by breaker opening and to limit recovery voltages to a level tolerable by the commutating circuit components.

  3. A simple tachometer circuit

    NASA Technical Reports Server (NTRS)

    Dimeff, J.

    1972-01-01

    Electric circuit to measure frequency of repetitive sinusoidal or rectangular wave is presented. Components of electric circuit and method of operation are explained. Application of circuit as tachometer for automobile is discussed.

  4. Photomultiplier blanking circuit

    NASA Technical Reports Server (NTRS)

    Mcclenahan, J. O.

    1972-01-01

    Circuit for protecting photomultiplier equipment from current surges which occur when exposed to brilliant illumination is discussed. Components of circuit and details of operation are provided. Circuit diagram to show action of blanking pulse on zener diode is included.

  5. Transversal Clifford gates on folded surface codes

    NASA Astrophysics Data System (ADS)

    Moussa, Jonathan E.

    2016-10-01

    Surface and color codes are two forms of topological quantum error correction in two spatial dimensions with complementary properties. Surface codes have lower-depth error detection circuits and well-developed decoders to interpret and correct errors, while color codes have transversal Clifford gates and better code efficiency in the number of physical qubits needed to achieve a given code distance. A formal equivalence exists between color codes and folded surface codes, but it does not guarantee the transferability of any of these favorable properties. However, the equivalence does imply the existence of constant-depth circuit implementations of logical Clifford gates on folded surface codes. We achieve and improve this result by constructing two families of folded surface codes with transversal Clifford gates. This construction is presented generally for qudits of any dimension. The specific application of these codes to universal quantum computation based on qubit fusion is also discussed.

  6. Doubled Color Codes

    NASA Astrophysics Data System (ADS)

    Bravyi, Sergey

    Combining protection from noise and computational universality is one of the biggest challenges in the fault-tolerant quantum computing. Topological stabilizer codes such as the 2D surface code can tolerate a high level of noise but implementing logical gates, especially non-Clifford ones, requires a prohibitively large overhead due to the need of state distillation. In this talk I will describe a new family of 2D quantum error correcting codes that enable a transversal implementation of all logical gates required for the universal quantum computing. Transversal logical gates (TLG) are encoded operations that can be realized by applying some single-qubit rotation to each physical qubit. TLG are highly desirable since they introduce no overhead and do not spread errors. It has been known before that a quantum code can have only a finite number of TLGs which rules out computational universality. Our scheme circumvents this no-go result by combining TLGs of two different quantum codes using the gauge-fixing method pioneered by Paetznick and Reichardt. The first code, closely related to the 2D color code, enables a transversal implementation of all single-qubit Clifford gates such as the Hadamard gate and the π / 2 phase shift. The second code that we call a doubled color code provides a transversal T-gate, where T is the π / 4 phase shift. The Clifford+T gate set is known to be computationally universal. The two codes can be laid out on the honeycomb lattice with two qubits per site such that the code conversion requires parity measurements for six-qubit Pauli operators supported on faces of the lattice. I will also describe numerical simulations of logical Clifford+T circuits encoded by the distance-3 doubled color code. Based on a joint work with Andrew Cross.

  7. Hidden circuits and argumentation

    NASA Astrophysics Data System (ADS)

    Leinonen, Risto; Kesonen, Mikko H. P.; Hirvonen, Pekka E.

    2016-11-01

    Despite the relevance of DC circuits in everyday life and schools, they have been shown to cause numerous learning difficulties at various school levels. In the course of this article, we present a flexible method for teaching DC circuits at lower secondary level. The method is labelled as hidden circuits, and the essential idea underlying hidden circuits is in hiding the actual wiring of DC circuits, but to make their behaviour evident for pupils. Pupils are expected to find out the wiring of the circuit which should enhance their learning of DC circuits. We present two possible ways to utilise hidden circuits in a classroom. First, they can be used to test and enhance pupils’ conceptual understanding when pupils are expected to find out which one of the offered circuit diagram options corresponds to the actual circuit shown. This method aims to get pupils to evaluate the circuits holistically rather than locally, and as a part of that aim this method highlights any learning difficulties of pupils. Second, hidden circuits can be used to enhance pupils’ argumentation skills with the aid of argumentation sheet that illustrates the main elements of an argument. Based on the findings from our co-operating teachers and our own experiences, hidden circuits offer a flexible and motivating way to supplement teaching of DC circuits.

  8. Sensor Authentication: Embedded Processor Code

    SciTech Connect

    Svoboda, John

    2012-09-25

    Described is the c code running on the embedded Microchip 32bit PIC32MX575F256H located on the INL developed noise analysis circuit board. The code performs the following functions: Controls the noise analysis circuit board preamplifier voltage gains of 1, 10, 100, 000 Initializes the analog to digital conversion hardware, input channel selection, Fast Fourier Transform (FFT) function, USB communications interface, and internal memory allocations Initiates high resolution 4096 point 200 kHz data acquisition Computes complex 2048 point FFT and FFT magnitude. Services Host command set Transfers raw data to Host Transfers FFT result to host Communication error checking

  9. Parallel algorithm strategies for circuit simulation.

    SciTech Connect

    Thornquist, Heidi K.; Schiek, Richard Louis; Keiter, Eric Richard

    2010-01-01

    Circuit simulation tools (e.g., SPICE) have become invaluable in the development and design of electronic circuits. However, they have been pushed to their performance limits in addressing circuit design challenges that come from the technology drivers of smaller feature scales and higher integration. Improving the performance of circuit simulation tools through exploiting new opportunities in widely-available multi-processor architectures is a logical next step. Unfortunately, not all traditional simulation applications are inherently parallel, and quickly adapting mature application codes (even codes designed to parallel applications) to new parallel paradigms can be prohibitively difficult. In general, performance is influenced by many choices: hardware platform, runtime environment, languages and compilers used, algorithm choice and implementation, and more. In this complicated environment, the use of mini-applications small self-contained proxies for real applications is an excellent approach for rapidly exploring the parameter space of all these choices. In this report we present a multi-core performance study of Xyce, a transistor-level circuit simulation tool, and describe the future development of a mini-application for circuit simulation.

  10. Charge regulation circuit

    DOEpatents

    Ball, Don G.

    1992-01-01

    A charge regulation circuit provides regulation of an unregulated voltage supply in the range of 0.01%. The charge regulation circuit is utilized in a preferred embodiment in providing regulated voltage for controlling the operation of a laser.

  11. Electrical Circuits and Water Analogies

    ERIC Educational Resources Information Center

    Smith, Frederick A.; Wilson, Jerry D.

    1974-01-01

    Briefly describes water analogies for electrical circuits and presents plans for the construction of apparatus to demonstrate these analogies. Demonstrations include series circuits, parallel circuits, and capacitors. (GS)

  12. Piezoelectric drive circuit

    DOEpatents

    Treu, C.A. Jr.

    1999-08-31

    A piezoelectric motor drive circuit is provided which utilizes the piezoelectric elements as oscillators and a Meacham half-bridge approach to develop feedback from the motor ground circuit to produce a signal to drive amplifiers to power the motor. The circuit automatically compensates for shifts in harmonic frequency of the piezoelectric elements due to pressure and temperature changes. 7 figs.

  13. Piezoelectric drive circuit

    DOEpatents

    Treu, Jr., Charles A.

    1999-08-31

    A piezoelectric motor drive circuit is provided which utilizes the piezoelectric elements as oscillators and a Meacham half-bridge approach to develop feedback from the motor ground circuit to produce a signal to drive amplifiers to power the motor. The circuit automatically compensates for shifts in harmonic frequency of the piezoelectric elements due to pressure and temperature changes.

  14. CIRCUITS FOR CURRENT MEASUREMENTS

    DOEpatents

    Cox, R.J.

    1958-11-01

    Circuits are presented for measurement of a logarithmic scale of current flowing in a high impedance. In one form of the invention the disclosed circuit is in combination with an ionization chamber to measure lonization current. The particular circuit arrangement lncludes a vacuum tube having at least one grid, an ionization chamber connected in series with a high voltage source and the grid of the vacuum tube, and a d-c amplifier feedback circuit. As the ionization chamber current passes between the grid and cathode of the tube, the feedback circuit acts to stabilize the anode current, and the feedback voltage is a measure of the logaritbm of the ionization current.

  15. Source circuit design considerations

    NASA Technical Reports Server (NTRS)

    Noel, G. T.

    1983-01-01

    The cost of several circuit configurations for large (5MW) array fields were investigated to assess the relative costs of high and low voltage configurations. Three source circuit NOC voltages were evaluated: 400V (ungrounded), 800V (+ or 400V center grounded), and 2000V (+ or - 1000V center grounded). Four source circuit configurations were considered for each of the three NOC voltages. The configurations correspond to source circuit currents of 15, 30, 45, and 60 amperes, respectively. Conceptual layouts for 5MW building blocks for each of the above configurations were developed. The designs were optimized to minimize BOS electrical and structural costs. Only the BOS electrical costs were evaluated. The designs were broken down into the following elements for cost: (1) basic source circuit intermodule wiring, bypass diodes and associated hardware, source circuit to J-Box wiring, etc; (2) J-Box blocking diodes, varistors, heat sinks, and housing; (3) disconnects source circuit disconnects, fuses, and housing; (4) bus cabling J-Box to PCU interface wiring, and trenching; (5) interface bus bar, group disconnects, and fuses; and (6) fault detection shunts, signal wire, electronics, and alarm. It is concluded that high voltage low current circuits are not economical, at higher currents high and low voltage circuit costs approach each other, high voltage circuits are not likely to offer near term advantage, and development work/manufacturer stimulation is needed to develop low cost high voltage hardware.

  16. Spring Break: A Lesson in Circuits. "This Old House" College Style.

    ERIC Educational Resources Information Center

    Duch, Barbara

    2001-01-01

    Introduces students to the topics of electricity and circuits within the context of house wiring. Explores the properties of series and parallel circuits, researches local wiring codes, calculates the current used by appliances based on their power ratings, and designs circuits in a typical kitchen. (Author/ASK)

  17. Regenerative feedback resonant circuit

    DOEpatents

    Jones, A. Mark; Kelly, James F.; McCloy, John S.; McMakin, Douglas L.

    2014-09-02

    A regenerative feedback resonant circuit for measuring a transient response in a loop is disclosed. The circuit includes an amplifier for generating a signal in the loop. The circuit further includes a resonator having a resonant cavity and a material located within the cavity. The signal sent into the resonator produces a resonant frequency. A variation of the resonant frequency due to perturbations in electromagnetic properties of the material is measured.

  18. Remote reset circuit

    DOEpatents

    Gritzo, Russell E.

    1987-01-01

    A remote reset circuit acts as a stand-alone monitor and controller by clocking in each character sent by a terminal to a computer and comparing it to a given reference character. When a match occurs, the remote reset circuit activates the system's hardware reset line. The remote reset circuit is hardware based centered around monostable multivibrators and is unaffected by system crashes, partial serial transmissions, or power supply transients.

  19. Remote reset circuit

    DOEpatents

    Gritzo, R.E.

    1985-09-12

    A remote reset circuit acts as a stand-along monitor and controller by clocking in each character sent by a terminal to a computer and comparing it to a given reference character. When a match occurs, the remote reset circuit activates the system's hardware reset line. The remote reset circuit is hardware based centered around monostable multivibrators and is unaffected by system crashes, partial serial transmissions, or power supply transients. 4 figs.

  20. Fast Overcurrent Tripping Circuit

    NASA Technical Reports Server (NTRS)

    Sullender, Craig C.; Davies, Bryan L.; Osborn, Stephen H.

    1993-01-01

    Fast overcurrent tripping circuit designed for incorporation into power metal oxide/semiconductor field-effect transistor (MOSFET) switching circuit. Serves as fast electronic circuit breaker by sensing voltage across MOSFET's during conduction and switching MOSFET's off within 1 microsecond after voltage exceeds reference value corresponding to tripping current. Acts more quickly than Hall-effect current sensor and, in comparison with shunt current-measuring circuits, smaller and consumes less power. Also ignores initial transient overcurrents during first 5 microseconds of switching cycle.

  1. Printed circuit board industry.

    PubMed

    LaDou, Joseph

    2006-05-01

    The printed circuit board is the platform upon which microelectronic components such as semiconductor chips and capacitors are mounted. It provides the electrical interconnections between components and is found in virtually all electronics products. Once considered low technology, the printed circuit board is evolving into a high-technology product. Printed circuit board manufacturing is highly complicated, requiring large equipment investments and over 50 process steps. Many of the high-speed, miniaturized printed circuit boards are now manufactured in cleanrooms with the same health and safety problems posed by other microelectronics manufacturing. Asia produces three-fourths of the world's printed circuit boards. In Asian countries, glycol ethers are the major solvents used in the printed circuit board industry. Large quantities of hazardous chemicals such as formaldehyde, dimethylformamide, and lead are used by the printed circuit board industry. For decades, chemically intensive and often sloppy manufacturing processes exposed tens of thousands of workers to a large number of chemicals that are now known to be reproductive toxicants and carcinogens. The printed circuit board industry has exposed workers to high doses of toxic metals, solvents, acids, and photolithographic chemicals. Only recently has there been any serious effort to diminish the quantity of lead distributed worldwide by the printed circuit board industry. Billions of electronics products have been discarded in every region of the world. This paper summarizes recent regulatory and enforcement efforts. PMID:16580876

  2. Pulse code modulated signal synchronizer

    NASA Technical Reports Server (NTRS)

    Kobayashi, H. S. (Inventor)

    1974-01-01

    A bit synchronizer for a split phase PCM transmission is reported that includes three loop circuits which receive incoming phase coded PCM signals. In the first loop, called a Q-loop, a generated, phase coded, PCM signal is multiplied with the incoming signals, and the frequency and phase of the generated signal are nulled to that of the incoming subcarrier signal. In the second loop, called a B-loop, a circuit multiplies a generated signal with incoming signals to null the phase of the generated signal in a bit phase locked relationship to the incoming signal. In a third loop, called the I-loop, a phase coded PCM signal is multiplied with the incoming signals for decoding the bit information from the PCM signal. A counter means is used for timing of the generated signals and timing of sample intervals for each bit period.

  3. Uplink Coding

    NASA Technical Reports Server (NTRS)

    Pollara, Fabrizio; Hamkins, Jon; Dolinar, Sam; Andrews, Ken; Divsalar, Dariush

    2006-01-01

    This viewgraph presentation reviews uplink coding. The purpose and goals of the briefing are (1) Show a plan for using uplink coding and describe benefits (2) Define possible solutions and their applicability to different types of uplink, including emergency uplink (3) Concur with our conclusions so we can embark on a plan to use proposed uplink system (4) Identify the need for the development of appropriate technology and infusion in the DSN (5) Gain advocacy to implement uplink coding in flight projects Action Item EMB04-1-14 -- Show a plan for using uplink coding, including showing where it is useful or not (include discussion of emergency uplink coding).

  4. A Virtual Circuits Lab

    ERIC Educational Resources Information Center

    Vick, Matthew E.

    2010-01-01

    The University of Colorado's Physics Education Technology (PhET) website offers free, high-quality simulations of many physics experiments that can be used in the classroom. The Circuit Construction Kit, for example, allows students to safely and constructively play with circuit components while learning the mathematics behind many circuit…

  5. Computer circuit card puller

    NASA Technical Reports Server (NTRS)

    Sawyer, R. V.; Szuwalski, B. (Inventor)

    1981-01-01

    The invention generally relates to hand tools, and more particularly to an improved device for facilitating removal of printed circuit cards from a card rack characterized by longitudinal side rails arranged in a mutually spaced parallelism and a plurality of printed circuit cards extended between the rails of the rack.

  6. Completing a Simple Circuit.

    ERIC Educational Resources Information Center

    Slater, Timothy F.; Adams, Jeffrey P.; Brown, Thomas R.

    2000-01-01

    Students have problems successfully arranging an electric circuit to make the bulb produce light. Investigates the percentage of students able to complete a circuit with a given apparatus, and the effects of prior experience on student success. Recommends hands-on activities at the elementary and secondary school levels. (Contains 14 references.)…

  7. Understanding Simple Circuits

    ERIC Educational Resources Information Center

    Mant, Jenny; Wilson, Helen

    2007-01-01

    Many envisage electricity as the "power" to "do things." They know that electricity needs "circuits" and that something is "flowing" in the circuits, but they are not sure what or why. Words such as "current" and "voltage" are part of electricity but their meaning, and the difference between them, is not always clear. In this article, the authors…

  8. Interconnections for fluidic circuits

    NASA Technical Reports Server (NTRS)

    Mangion, C.

    1972-01-01

    Circuit elements are grouped on functional basis in rectangular two-dimensional planar arrays or modules. Another interconnection method brings all connections out to module edge. For smaller fluidic circuits, manifold and interconnections are fabricated as single blocks. Advantages of methods are given.

  9. Liquid detection circuit

    DOEpatents

    Regan, Thomas O.

    1987-01-01

    Herein is a circuit which is capable of detecting the presence of liquids, especially cryogenic liquids, and whose sensor will not overheat in a vacuum. The circuit parameters, however, can be adjusted to work with any liquid over a wide range of temperatures.

  10. In-circuit fault injector user's guide

    NASA Technical Reports Server (NTRS)

    Padilla, Peter A.

    1987-01-01

    A fault injector system, called an in-circuit injector, was designed and developed to facilitate fault injection experiments performed at NASA-Langley's Avionics Integration Research Lab (AIRLAB). The in-circuit fault injector (ICFI) allows fault injections to be performed on electronic systems without special test features, e.g., sockets. The system supports stuck-at-zero, stuck-at-one, and transient fault models. The ICFI system is interfaced to a VAX-11/750 minicomputer. An interface program has been developed in the VAX. The computer code required to access the interface program is presented. Also presented is the connection procedure to be followed to connect the ICFI system to a circuit under test and the ICFI front panel controls which allow manual control of fault injections.

  11. Compensated gain control circuit for buck regulator command charge circuit

    DOEpatents

    Barrett, D.M.

    1996-11-05

    A buck regulator command charge circuit includes a compensated-gain control signal for compensating for changes in the component values in order to achieve optimal voltage regulation. The compensated-gain control circuit includes an automatic-gain control circuit for generating a variable-gain control signal. The automatic-gain control circuit is formed of a precision rectifier circuit, a filter network, an error amplifier, and an integrator circuit. 5 figs.

  12. Compensated gain control circuit for buck regulator command charge circuit

    DOEpatents

    Barrett, David M.

    1996-01-01

    A buck regulator command charge circuit includes a compensated-gain control signal for compensating for changes in the component values in order to achieve optimal voltage regulation. The compensated-gain control circuit includes an automatic-gain control circuit for generating a variable-gain control signal. The automatic-gain control circuit is formed of a precision rectifier circuit, a filter network, an error amplifier, and an integrator circuit.

  13. Approximate circuits for increased reliability

    DOEpatents

    Hamlet, Jason R.; Mayo, Jackson R.

    2015-12-22

    Embodiments of the invention describe a Boolean circuit having a voter circuit and a plurality of approximate circuits each based, at least in part, on a reference circuit. The approximate circuits are each to generate one or more output signals based on values of received input signals. The voter circuit is to receive the one or more output signals generated by each of the approximate circuits, and is to output one or more signals corresponding to a majority value of the received signals. At least some of the approximate circuits are to generate an output value different than the reference circuit for one or more input signal values; however, for each possible input signal value, the majority values of the one or more output signals generated by the approximate circuits and received by the voter circuit correspond to output signal result values of the reference circuit.

  14. Approximate circuits for increased reliability

    DOEpatents

    Hamlet, Jason R.; Mayo, Jackson R.

    2015-08-18

    Embodiments of the invention describe a Boolean circuit having a voter circuit and a plurality of approximate circuits each based, at least in part, on a reference circuit. The approximate circuits are each to generate one or more output signals based on values of received input signals. The voter circuit is to receive the one or more output signals generated by each of the approximate circuits, and is to output one or more signals corresponding to a majority value of the received signals. At least some of the approximate circuits are to generate an output value different than the reference circuit for one or more input signal values; however, for each possible input signal value, the majority values of the one or more output signals generated by the approximate circuits and received by the voter circuit correspond to output signal result values of the reference circuit.

  15. Sharing code.

    PubMed

    Kubilius, Jonas

    2014-01-01

    Sharing code is becoming increasingly important in the wake of Open Science. In this review I describe and compare two popular code-sharing utilities, GitHub and Open Science Framework (OSF). GitHub is a mature, industry-standard tool but lacks focus towards researchers. In comparison, OSF offers a one-stop solution for researchers but a lot of functionality is still under development. I conclude by listing alternative lesser-known tools for code and materials sharing.

  16. Sensor readout detector circuit

    DOEpatents

    Chu, D.D.; Thelen, D.C. Jr.

    1998-08-11

    A sensor readout detector circuit is disclosed that is capable of detecting sensor signals down to a few nanoamperes or less in a high (microampere) background noise level. The circuit operates at a very low standby power level and is triggerable by a sensor event signal that is above a predetermined threshold level. A plurality of sensor readout detector circuits can be formed on a substrate as an integrated circuit (IC). These circuits can operate to process data from an array of sensors in parallel, with only data from active sensors being processed for digitization and analysis. This allows the IC to operate at a low power level with a high data throughput for the active sensors. The circuit may be used with many different types of sensors, including photodetectors, capacitance sensors, chemically-sensitive sensors or combinations thereof to provide a capability for recording transient events or for recording data for a predetermined period of time following an event trigger. The sensor readout detector circuit has applications for portable or satellite-based sensor systems. 6 figs.

  17. Sensor readout detector circuit

    DOEpatents

    Chu, Dahlon D.; Thelen, Jr., Donald C.

    1998-01-01

    A sensor readout detector circuit is disclosed that is capable of detecting sensor signals down to a few nanoamperes or less in a high (microampere) background noise level. The circuit operates at a very low standby power level and is triggerable by a sensor event signal that is above a predetermined threshold level. A plurality of sensor readout detector circuits can be formed on a substrate as an integrated circuit (IC). These circuits can operate to process data from an array of sensors in parallel, with only data from active sensors being processed for digitization and analysis. This allows the IC to operate at a low power level with a high data throughput for the active sensors. The circuit may be used with many different types of sensors, including photodetectors, capacitance sensors, chemically-sensitive sensors or combinations thereof to provide a capability for recording transient events or for recording data for a predetermined period of time following an event trigger. The sensor readout detector circuit has applications for portable or satellite-based sensor systems.

  18. Polymorphic Electronic Circuits

    NASA Technical Reports Server (NTRS)

    Stoica, Adrian

    2004-01-01

    Polymorphic electronics is a nascent technological discipline that involves, among other things, designing the same circuit to perform different analog and/or digital functions under different conditions. For example, a circuit can be designed to function as an OR gate or an AND gate, depending on the temperature (see figure). Polymorphic electronics can also be considered a subset of polytronics, which is a broader technological discipline in which optical and possibly other information- processing systems could also be designed to perform multiple functions. Polytronics is an outgrowth of evolvable hardware (EHW). The basic concepts and some specific implementations of EHW were described in a number of previous NASA Tech Briefs articles. To recapitulate: The essence of EHW is to design, construct, and test a sequence of populations of circuits that function as incrementally better solutions of a given design problem through the selective, repetitive connection and/or disconnection of capacitors, transistors, amplifiers, inverters, and/or other circuit building blocks. The evolution is guided by a search-and-optimization algorithm (in particular, a genetic algorithm) that operates in the space of possible circuits to find a circuit that exhibits an acceptably close approximation of the desired functionality. The evolved circuits can be tested by computational simulation (in which case the evolution is said to be extrinsic), tested in real hardware (in which case the evolution is said to be intrinsic), or tested in random sequences of computational simulation and real hardware (in which case the evolution is said to be mixtrinsic).

  19. Coding For Compression Of Low-Entropy Data

    NASA Technical Reports Server (NTRS)

    Yeh, Pen-Shu

    1994-01-01

    Improved method of encoding digital data provides for efficient lossless compression of partially or even mostly redundant data from low-information-content source. Method of coding implemented in relatively simple, high-speed arithmetic and logic circuits. Also increases coding efficiency beyond that of established Huffman coding method in that average number of bits per code symbol can be less than 1, which is the lower bound for Huffman code.

  20. Atemporal diagrams for quantum circuits

    SciTech Connect

    Griffiths, Robert B.; Wu Shengjun; Yu Li; Cohen, Scott M.

    2006-05-15

    A system of diagrams is introduced that allows the representation of various elements of a quantum circuit, including measurements, in a form which makes no reference to time (hence 'atemporal'). It can be used to relate quantum dynamical properties to those of entangled states (map-state duality), and suggests useful analogies, such as the inverse of an entangled ket. Diagrams clarify the role of channel kets, transition operators, dynamical operators (matrices), and Kraus rank for noisy quantum channels. Positive (semidefinite) operators are represented by diagrams with a symmetry that aids in understanding their connection with completely positive maps. The diagrams are used to analyze standard teleportation and dense coding, and for a careful study of unambiguous (conclusive) teleportation. A simple diagrammatic argument shows that a Kraus rank of 3 is impossible for a one-qubit channel modeled using a one-qubit environment in a mixed state.

  1. Gallium Arsenide Domino Circuit

    NASA Technical Reports Server (NTRS)

    Yang, Long; Long, Stephen I.

    1990-01-01

    Advantages include reduced power and high speed. Experimental gallium arsenide field-effect-transistor (FET) domino circuit replicated in large numbers for use in dynamic-logic systems. Name of circuit denotes mode of operation, which logic signals propagate from each stage to next when successive stages operated at slightly staggered clock cycles, in manner reminiscent of dominoes falling in a row. Building block of domino circuit includes input, inverter, and level-shifting substages. Combinational logic executed in input substage. During low half of clock cycle, result of logic operation transmitted to following stage.

  2. Monolithic microwave integrated circuits

    NASA Astrophysics Data System (ADS)

    Pucel, R. A.

    Monolithic microwave integrated circuits (MMICs), a new microwave technology which is expected to exert a profound influence on microwave circuit designs for future military systems as well as for the commercial and consumer markets, is discussed. The book contains an historical discussion followed by a comprehensive review presenting the current status in the field. The general topics of the volume are: design considerations, materials and processing considerations, monolithic circuit applications, and CAD, measurement, and packaging techniques. All phases of MMIC technology are covered, from design to testing.

  3. DIFFERENTIAL FAULT SENSING CIRCUIT

    DOEpatents

    Roberts, J.H.

    1961-09-01

    A differential fault sensing circuit is designed for detecting arcing in high-voltage vacuum tubes arranged in parallel. A circuit is provided which senses differences in voltages appearing between corresponding elements likely to fault. Sensitivity of the circuit is adjusted to some level above which arcing will cause detectable differences in voltage. For particular corresponding elements, a group of pulse transformers are connected in parallel with diodes connected across the secondaries thereof so that only voltage excursions are transmitted to a thyratron which is biased to the sensitivity level mentioned.

  4. ROBUST CIRCUIT RHYTHMS IN SMALL CIRCUITS ARISE FROM VARIABLE CIRCUIT COMPONENTS AND MECHANISMS

    PubMed Central

    Marder, Eve; Goeritz, Marie L.; Otopalik, Adriane G.

    2014-01-01

    Small central pattern generating circuits found in invertebrates have significant advantages for the study of the circuit mechanisms that generate brain rhythms. Experimental and computational studies of small oscillatory circuits reveal that similar rhythms can arise from disparate mechanisms. Animal-to-animal variation in the properties of single neurons and synapses may underly robust circuit performance, and can be revealed by perturbations. Neuromodulation can produce altered circuit performance but also ensure reliable circuit function. PMID:25460072

  5. Stochastically driven genetic circuits

    NASA Astrophysics Data System (ADS)

    Tsimring, L. S.; Volfson, D.; Hasty, J.

    2006-06-01

    Transcriptional regulation in small genetic circuits exhibits large stochastic fluctuations. Recent experiments have shown that a significant fraction of these fluctuations is caused by extrinsic factors. In this paper we review several theoretical and computational approaches to modeling of small genetic circuits driven by extrinsic stochastic processes. We propose a simplified approach to this problem, which can be used in the case when extrinsic fluctuations dominate the stochastic dynamics of the circuit (as appears to be the case in eukaryots). This approach is applied to a model of a single nonregulated gene that is driven by a certain gating process that affects the rate of transcription, and to a simplified version of the galactose utilization circuit in yeast.

  6. Power supply conditioning circuit

    NASA Technical Reports Server (NTRS)

    Primas, Lori E. (Inventor); Loveland, Rohan C. (Inventor)

    1988-01-01

    A conditioning circuit is provided with a constant current diode in series with a zener diode, the former having a high dynamic impedance and the latter a low dynamic impedance. The constant current diode can receive an input voltage with PARD. In conjunction with the zener diode fixed to a ground, a voltage divider is provided which can give an output voltage whose PARD was significantly reduced. The conditioning circuit is effective down to dc.

  7. Encoding of fear learning and memory in distributed neuronal circuits.

    PubMed

    Herry, Cyril; Johansen, Joshua P

    2014-12-01

    How sensory information is transformed by learning into adaptive behaviors is a fundamental question in neuroscience. Studies of auditory fear conditioning have revealed much about the formation and expression of emotional memories and have provided important insights into this question. Classical work focused on the amygdala as a central structure for fear conditioning. Recent advances, however, have identified new circuits and neural coding strategies mediating fear learning and the expression of fear behaviors. One area of research has identified key brain regions and neuronal coding mechanisms that regulate the formation, specificity and strength of fear memories. Other work has discovered critical circuits and neuronal dynamics by which fear memories are expressed through a medial prefrontal cortex pathway and coordinated activity across interconnected brain regions. Here we review these recent advances alongside prior work to provide a working model of the extended circuits and neuronal coding mechanisms mediating fear learning and memory.

  8. Encoding of fear learning and memory in distributed neuronal circuits.

    PubMed

    Herry, Cyril; Johansen, Joshua P

    2014-12-01

    How sensory information is transformed by learning into adaptive behaviors is a fundamental question in neuroscience. Studies of auditory fear conditioning have revealed much about the formation and expression of emotional memories and have provided important insights into this question. Classical work focused on the amygdala as a central structure for fear conditioning. Recent advances, however, have identified new circuits and neural coding strategies mediating fear learning and the expression of fear behaviors. One area of research has identified key brain regions and neuronal coding mechanisms that regulate the formation, specificity and strength of fear memories. Other work has discovered critical circuits and neuronal dynamics by which fear memories are expressed through a medial prefrontal cortex pathway and coordinated activity across interconnected brain regions. Here we review these recent advances alongside prior work to provide a working model of the extended circuits and neuronal coding mechanisms mediating fear learning and memory. PMID:25413091

  9. Efficient codes and balanced networks.

    PubMed

    Denève, Sophie; Machens, Christian K

    2016-03-01

    Recent years have seen a growing interest in inhibitory interneurons and their circuits. A striking property of cortical inhibition is how tightly it balances excitation. Inhibitory currents not only match excitatory currents on average, but track them on a millisecond time scale, whether they are caused by external stimuli or spontaneous fluctuations. We review, together with experimental evidence, recent theoretical approaches that investigate the advantages of such tight balance for coding and computation. These studies suggest a possible revision of the dominant view that neurons represent information with firing rates corrupted by Poisson noise. Instead, tight excitatory/inhibitory balance may be a signature of a highly cooperative code, orders of magnitude more precise than a Poisson rate code. Moreover, tight balance may provide a template that allows cortical neurons to construct high-dimensional population codes and learn complex functions of their inputs.

  10. Sensor Authentication: Embedded Processor Code

    2012-09-25

    Described is the c code running on the embedded Microchip 32bit PIC32MX575F256H located on the INL developed noise analysis circuit board. The code performs the following functions: Controls the noise analysis circuit board preamplifier voltage gains of 1, 10, 100, 000 Initializes the analog to digital conversion hardware, input channel selection, Fast Fourier Transform (FFT) function, USB communications interface, and internal memory allocations Initiates high resolution 4096 point 200 kHz data acquisition Computes complex 2048more » point FFT and FFT magnitude. Services Host command set Transfers raw data to Host Transfers FFT result to host Communication error checking« less

  11. Coding and transformations in the olfactory system.

    PubMed

    Uchida, Naoshige; Poo, Cindy; Haddad, Rafi

    2014-01-01

    How is sensory information represented in the brain? A long-standing debate in neural coding is whether and how timing of spikes conveys information to downstream neurons. Although we know that neurons in the olfactory bulb (OB) exhibit rich temporal dynamics, the functional relevance of temporal coding remains hotly debated. Recent recording experiments in awake behaving animals have elucidated highly organized temporal structures of activity in the OB. In addition, the analysis of neural circuits in the piriform cortex (PC) demonstrated the importance of not only OB afferent inputs but also intrinsic PC neural circuits in shaping odor responses. Furthermore, new experiments involving stimulation of the OB with specific temporal patterns allowed for testing the relevance of temporal codes. Together, these studies suggest that the relative timing of neuronal activity in the OB conveys odor information and that neural circuits in the PC possess various mechanisms to decode temporal patterns of OB input.

  12. Driver Code for Adaptive Optics

    NASA Technical Reports Server (NTRS)

    Rao, Shanti

    2007-01-01

    A special-purpose computer code for a deformable-mirror adaptive-optics control system transmits pixel-registered control from (1) a personal computer running software that generates the control data to (2) a circuit board with 128 digital-to-analog converters (DACs) that generate voltages to drive the deformable-mirror actuators. This program reads control-voltage codes from a text file, then sends them, via the computer s parallel port, to a circuit board with four AD5535 (or equivalent) chips. Whereas a similar prior computer program was capable of transmitting data to only one chip at a time, this program can send data to four chips simultaneously. This program is in the form of C-language code that can be compiled and linked into an adaptive-optics software system. The program as supplied includes source code for integration into the adaptive-optics software, documentation, and a component that provides a demonstration of loading DAC codes from a text file. On a standard Windows desktop computer, the software can update 128 channels in 10 ms. On Real-Time Linux with a digital I/O card, the software can update 1024 channels (8 boards in parallel) every 8 ms.

  13. Circuit simulation: some humbling thoughts

    SciTech Connect

    Wendt, Manfred; /Fermilab

    2006-01-01

    A short, very personal note on circuit simulation is presented. It does neither include theoretical background on circuit simulation, nor offers an overview of available software, but just gives some general remarks for a discussion on circuit simulator needs in context to the design and development of accelerator beam instrumentation circuits and systems.

  14. Superconducting flux flow digital circuits

    DOEpatents

    Hietala, V.M.; Martens, J.S.; Zipperian, T.E.

    1995-02-14

    A NOR/inverter logic gate circuit and a flip flop circuit implemented with superconducting flux flow transistors (SFFTs) are disclosed. Both circuits comprise two SFFTs with feedback lines. They have extremely low power dissipation, very high switching speeds, and the ability to interface between Josephson junction superconductor circuits and conventional microelectronics. 8 figs.

  15. Superconducting flux flow digital circuits

    DOEpatents

    Hietala, Vincent M.; Martens, Jon S.; Zipperian, Thomas E.

    1995-01-01

    A NOR/inverter logic gate circuit and a flip flop circuit implemented with superconducting flux flow transistors (SFFTs). Both circuits comprise two SFFTs with feedback lines. They have extremely low power dissipation, very high switching speeds, and the ability to interface between Josephson junction superconductor circuits and conventional microelectronics.

  16. Comparison of NASCAP modelling results with lumped circuit analysis

    NASA Technical Reports Server (NTRS)

    Stang, D. B.; Purvis, C. K.

    1980-01-01

    Engineering design tools that can be used to predict the development of absolute and differential potentials by realistic spacecraft under geomagnetic substorm conditions are described. Two types of analyses are in use: (1) the NASCAP code, which computes quasistatic charging of geometrically complex objects with multiple surface materials in three dimensions; (2) lumped element equivalent circuit models that are used for analyses of particular spacecraft. The equivalent circuit models require very little computation time, however, they cannot account for effects, such as the formation of potential barriers, that are inherently multidimensional. Steady state potentials of structure and insulation are compared with those resulting from the equivalent circuit model.

  17. Controlling the elements: an optogenetic approach to understanding the neural circuits of fear.

    PubMed

    Johansen, Joshua P; Wolff, Steffen B E; Lüthi, Andreas; LeDoux, Joseph E

    2012-06-15

    Neural circuits underlie our ability to interact in the world and to learn adaptively from experience. Understanding neural circuits and how circuit structure gives rise to neural firing patterns or computations is fundamental to our understanding of human experience and behavior. Fear conditioning is a powerful model system in which to study neural circuits and information processing and relate them to learning and behavior. Until recently, technological limitations have made it difficult to study the causal role of specific circuit elements during fear conditioning. However, newly developed optogenetic tools allow researchers to manipulate individual circuit components such as anatomically or molecularly defined cell populations, with high temporal precision. Applying these tools to the study of fear conditioning to control specific neural subpopulations in the fear circuit will facilitate a causal analysis of the role of these circuit elements in fear learning and memory. By combining this approach with in vivo electrophysiological recordings in awake, behaving animals, it will also be possible to determine the functional contribution of specific cell populations to neural processing in the fear circuit. As a result, the application of optogenetics to fear conditioning could shed light on how specific circuit elements contribute to neural coding and to fear learning and memory. Furthermore, this approach may reveal general rules for how circuit structure and neural coding within circuits gives rise to sensory experience and behavior.

  18. Current regulating circuit

    SciTech Connect

    Hoffman, Ph. A.

    1985-03-12

    A battery charger which includes terminals for connection to an electric power source, an electrical charging circuit and an operative arrangement for connecting at least one rechargeable battery cell, in series with the charging circuit across the terminals. The battery charger has a charging circuit which includes a first resistor, a second resistor, a third resistor and a rectifier, constituted by at least one diode, in series. A first transistor, which has a collector-emitter path and a base-emitter path, is operatively connected so that the base-emitter path is connected in parallel with the first resistor. A fourth resistor is provided, the fourth resistor being connected in series with the collector-emitter path of the transistor and the third resistor. A plurality of additional transistors, connected in Darlington configuration, includes a second transistor and a final transistor, each of the additional transistors having its collector connected to a circuit point between the third resistor and an electrode of the diode. The first transistor and the last transistor have their emitters connected via a current-limiting PTC fifth resistor which may act as a fuse. The first transistor and the second transistor have their respective collector and base conductively connected. The connection of the third resistor provides internal feedback. The fifth resistor, when in series with the first resistor in the base-emitter circuit, provides external feedback.

  19. ELECTRONIC TRIGGER CIRCUIT

    DOEpatents

    Russell, J.A.G.

    1958-01-01

    An electronic trigger circuit is described of the type where an output pulse is obtained only after an input voltage has cqualed or exceeded a selected reference voltage. In general, the invention comprises a source of direct current reference voltage in series with an impedance and a diode rectifying element. An input pulse of preselected amplitude causes the diode to conduct and develop a signal across the impedance. The signal is delivered to an amplifier where an output pulse is produced and part of the output is fed back in a positive manner to the diode so that the amplifier produces a steep wave front trigger pulsc at the output. The trigger point of the described circuit is not subject to variation due to the aging, etc., of multi-electrode tabes, since the diode circuit essentially determines the trigger point.

  20. Logsum Using Garbled Circuits

    PubMed Central

    Portêlo, José; Raj, Bhiksha; Trancoso, Isabel

    2015-01-01

    Secure multiparty computation allows for a set of users to evaluate a particular function over their inputs without revealing the information they possess to each other. Theoretically, this can be achieved using fully homomorphic encryption systems, but so far they remain in the realm of computational impracticability. An alternative is to consider secure function evaluation using homomorphic public-key cryptosystems or Garbled Circuits, the latter being a popular trend in recent times due to important breakthroughs. We propose a technique for computing the logsum operation using Garbled Circuits. This technique relies on replacing the logsum operation with an equivalent piecewise linear approximation, taking advantage of recent advances in efficient methods for both designing and implementing Garbled Circuits. We elaborate on how all the required blocks should be assembled in order to obtain small errors regarding the original logsum operation and very fast execution times. PMID:25811740

  1. ELECTRONIC MULTIPLIER CIRCUIT

    DOEpatents

    Thomas, R.E.

    1959-08-25

    An electronic multiplier circuit is described in which an output voltage having an amplitude proportional to the product or quotient of the input signals is accomplished in a novel manner which facilitates simplicity of circuit construction and a high degree of accuracy in accomplishing the multiplying and dividing function. The circuit broadly comprises a multiplier tube in which the plate current is proportional to the voltage applied to a first control grid multiplied by the difference between voltage applied to a second control grid and the voltage applied to the first control grid. Means are provided to apply a first signal to be multiplied to the first control grid together with means for applying the sum of the first signal to be multiplied and a second signal to be multiplied to the second control grid whereby the plate current of the multiplier tube is proportional to the product of the first and second signals to be multiplied.

  2. ELECTRONIC PHASE CONTROL CIRCUIT

    DOEpatents

    Salisbury, J.D.; Klein, W.W.; Hansen, C.F.

    1959-04-21

    An electronic circuit is described for controlling the phase of radio frequency energy applied to a multicavity linear accelerator. In one application of the circuit two cavities are excited from a single radio frequency source, with one cavity directly coupled to the source and the other cavity coupled through a delay line of special construction. A phase detector provides a bipolar d-c output signal proportional to the difference in phase between the voltage in the two cavities. This d-c signal controls a bias supply which provides a d-c output for varying the capacitnce of voltage sensitive capacitors in the delay line. The over-all operation of the circuit is completely electronic, overcoming the time response limitations of the electromechanical control systems, and the relative phase relationship of the radio frequency voltages in the two caviiies is continuously controlled to effect particle acceleration.

  3. Accessibility of applications specific integrated circuits

    NASA Astrophysics Data System (ADS)

    Strip, D. R.

    1986-03-01

    Applications specific integrated circuits (ASICs) open new design opportunities in Sandia component applications. ASICs can be used to overcome many of the constraints that reduce system functionality in Sandia systems. Key constraints in our environment are power consumption, volume, weight, speed, and radiation-hardness. In addition, use of ASICs may reduce the costs of system design, acquisition, and life-cycle maintenance. Design tools for integrated circuits are rapidly simplifying the design of integrated circuits. Just as high level computer languages enabled applications-oriented computer users to take control of their own code development after assembly coding had limited the practicality of user design, in ICC design tools and approaches are enabling the applications-oriented user to design an ASIC with modest training and in a short time period. In order to demonstrate the state of the design systems, we have selected a representative application and, without any formal training or experience in IC design, have designed and fabricated an ASIC. This report details the steps that were followed and the time they took. It is important to emphasize that this project was the first chip designed start-to-finish on the Mentor design stations in Organization 2110; therefore most of the problems encountered were typical of a first pass through a new system. Most of the problems were quickly wrung out by the CAD tools staff; future users of the system should not expect to have the problems recur.

  4. Micromachined Silicon Waveguide Circuits

    NASA Technical Reports Server (NTRS)

    McGrath, W. R.

    1995-01-01

    Rectangular waveguides are commonly used as circuit elements in remote-sensing heterodyne receivers at millimeter wavelengths. The advantages of waveguides are low loss and mechanical tunability. However, conventional machining techniques for waveguide components operating above a few hundred GHz are complicated and costly. Waveguides micromachined from silicon however would have several important advantages including low-cost; small size for very high frequency (submillimeter wave) operation; high dimensional accuracy (important for high-Q circuits); atomically smooth walls, thereby reducing rf losses; and the ability to integrate active and passive devices directly in the waveguide on thin membranes, thereby solving the traditional problem of mounting thin substrates.

  5. Inrush Current Control Circuit

    NASA Technical Reports Server (NTRS)

    Cole, Steven W. (Inventor)

    2002-01-01

    An inrush current control circuit having an input terminal connected to a DC power supply and an output terminal connected to a load capacitor limits the inrush current that charges up the load capacitor during power up of a system. When the DC power supply applies a DC voltage to the input terminal, the inrush current control circuit produces a voltage ramp at the load capacitor instead of an abrupt DC voltage. The voltage ramp results in a constant low level current to charge up the load capacitor, greatly reducing the current drain on the DC power supply.

  6. Electrical Circuit Tester

    DOEpatents

    Love, Frank

    2006-04-18

    An electrical circuit testing device is provided, comprising a case, a digital voltage level testing circuit with a display means, a switch to initiate measurement using the device, a non-shorting switching means for selecting pre-determined electrical wiring configurations to be tested in an outlet, a terminal block, a five-pole electrical plug mounted on the case surface and a set of adapters that can be used for various multiple-pronged electrical outlet configurations for voltages from 100 600 VAC from 50 100 Hz.

  7. Automatic level control circuit

    NASA Technical Reports Server (NTRS)

    Toole, P. C.; Mccarthy, D. M. (Inventor)

    1983-01-01

    An automatic level control circuit for an operational amplifier for minimizing spikes or instantaneous gain of the amplifier at a low period wherein no signal is received on the input is provided. The apparatus includes a multibranch circuit which is connected between an output terminal and a feedback terminal. A pair of zener diodes are connected back to back in series with a capacitor provided in one of the branches. A pair of voltage dividing resistors are connected in another of the branches and a second capacitor is provided in the remaining branch of controlling the high frequency oscillations of the operational amplifier.

  8. Small circuits for cryptography.

    SciTech Connect

    Torgerson, Mark Dolan; Draelos, Timothy John; Schroeppel, Richard Crabtree; Miller, Russell D.; Anderson, William Erik

    2005-10-01

    This report examines a number of hardware circuit design issues associated with implementing certain functions in FPGA and ASIC technologies. Here we show circuit designs for AES and SHA-1 that have an extremely small hardware footprint, yet show reasonably good performance characteristics as compared to the state of the art designs found in the literature. Our AES performance numbers are fueled by an optimized composite field S-box design for the Stratix chipset. Our SHA-1 designs use register packing and feedback functionalities of the Stratix LE, which reduce the logic element usage by as much as 72% as compared to other SHA-1 designs.

  9. Speech coding

    SciTech Connect

    Ravishankar, C., Hughes Network Systems, Germantown, MD

    1998-05-08

    Speech is the predominant means of communication between human beings and since the invention of the telephone by Alexander Graham Bell in 1876, speech services have remained to be the core service in almost all telecommunication systems. Original analog methods of telephony had the disadvantage of speech signal getting corrupted by noise, cross-talk and distortion Long haul transmissions which use repeaters to compensate for the loss in signal strength on transmission links also increase the associated noise and distortion. On the other hand digital transmission is relatively immune to noise, cross-talk and distortion primarily because of the capability to faithfully regenerate digital signal at each repeater purely based on a binary decision. Hence end-to-end performance of the digital link essentially becomes independent of the length and operating frequency bands of the link Hence from a transmission point of view digital transmission has been the preferred approach due to its higher immunity to noise. The need to carry digital speech became extremely important from a service provision point of view as well. Modem requirements have introduced the need for robust, flexible and secure services that can carry a multitude of signal types (such as voice, data and video) without a fundamental change in infrastructure. Such a requirement could not have been easily met without the advent of digital transmission systems, thereby requiring speech to be coded digitally. The term Speech Coding is often referred to techniques that represent or code speech signals either directly as a waveform or as a set of parameters by analyzing the speech signal. In either case, the codes are transmitted to the distant end where speech is reconstructed or synthesized using the received set of codes. A more generic term that is applicable to these techniques that is often interchangeably used with speech coding is the term voice coding. This term is more generic in the sense that the

  10. The development of circuit models for ZR.

    SciTech Connect

    Harjes, Henry Charles III; Corley, J.

    2005-06-01

    Summary from only given. The capabilities of the Z accelerator will be significantly enhanced by the Z Refurbishment (ZR) project [McDaniel DH, 2002]. The performance of a single ZR module is currently being characterized in the pre-production engineering evaluation test bed, Z20 [Lehr, JM, 2003]. Z20 is thoroughly diagnosed so that electrical performance of the module can be established. Circuit models of Z20 have been developed and validated in both Screamer [1985] and Bertha [1989] circuit codes. For the purposes of predicting ZR performance, a full ZR circuit model has also been developed in Bertha. The full ZR model (using operating parameters demonstrated on Z20) indicates that the required 26 MA, 100 ns implosion time, output load current pulse will be achieved on ZR. In this paper, the electrical characterization of Z20 and development of the single module circuit models will be discussed in detail. The full ZR model will also be discussed and the results of several system studies conducted to predict ZR performance will be presented.

  11. Wein bridge oscillator circuit

    NASA Technical Reports Server (NTRS)

    Lipoma, P. C.

    1971-01-01

    Circuit with minimum number of components provides stable outputs of 2 to 8 volts at frequencies of .001 to 100 kHz. Oscillator exhibits low power consumption, portability, simplicity, and drive capability, it has application as loudspeaker tester and audible alarm, as well as in laboratory and test generators.

  12. Automatic sweep circuit

    DOEpatents

    Keefe, Donald J.

    1980-01-01

    An automatically sweeping circuit for searching for an evoked response in an output signal in time with respect to a trigger input. Digital counters are used to activate a detector at precise intervals, and monitoring is repeated for statistical accuracy. If the response is not found then a different time window is examined until the signal is found.

  13. "Printed-circuit" rectenna

    NASA Technical Reports Server (NTRS)

    Dickinson, R. M.

    1977-01-01

    Rectifying antenna is less bulky structure for absorbing transmitted microwave power and converting it into electrical current. Printed-circuit approach, using microstrip technology and circularly polarized antenna, makes polarization orientation unimportant and allows much smaller arrays for given performance. Innovation is particularly useful with proposed electric vehicles powered by beam microwaves.

  14. A coherent RC circuit

    NASA Astrophysics Data System (ADS)

    Gabelli, J.; Fève, G.; Berroir, J.-M.; Plaçais, B.

    2012-12-01

    We review the first experiment on dynamic transport in a phase-coherent quantum conductor. In our discussion, we highlight the use of time-dependent transport as a means of gaining insight into charge relaxation on a mesoscopic scale. For this purpose, we studied the ac conductance of a model quantum conductor, i.e. the quantum RC circuit. Prior to our experimental work, Büttiker et al (1993 Phys. Lett. A 180 364-9) first worked on dynamic mesoscopic transport in the 1990s. They predicted that the mesoscopic RC circuit can be described by a quantum capacitance related to the density of states in the capacitor and a constant charge-relaxation resistance equal to half of the resistance quantum h/2e2, when a single mode is transmitted between the capacitance and a reservoir. By applying a microwave excitation to a gate located on top of a coherent submicronic quantum dot that is coupled to a reservoir, we validate this theoretical prediction on the ac conductance of the quantum RC circuit. Our study demonstrates that the ac conductance is directly related to the dwell time of electrons in the capacitor. Thereby, we observed a counterintuitive behavior of a quantum origin: as the transmission of the single conducting mode decreases, the resistance of the quantum RC circuit remains constant while the capacitance oscillates.

  15. Electrifying Inquiry: Electrical Circuits

    ERIC Educational Resources Information Center

    Godbey, Susan; Barnett, Jessica; Webster, Lois

    2005-01-01

    An activity involving parallel electrical circuits was modified to incorporate an open inquiry approach. Both the original and revised versions of the activity were tested in the middle school classroom. We present a comparison of the two versions of the activity in terms of facilitating learning and engaging students' interests.

  16. A Magnetic Circuit Demonstration.

    ERIC Educational Resources Information Center

    Vanderkooy, John; Lowe, June

    1995-01-01

    Presents a demonstration designed to illustrate Faraday's, Ampere's, and Lenz's laws and to reinforce the concepts through the analysis of a two-loop magnetic circuit. Can be made dramatic and challenging for sophisticated students but is suitable for an introductory course in electricity and magnetism. (JRH)

  17. Integrated circuit reliability testing

    NASA Technical Reports Server (NTRS)

    Buehler, Martin G. (Inventor); Sayah, Hoshyar R. (Inventor)

    1990-01-01

    A technique is described for use in determining the reliability of microscopic conductors deposited on an uneven surface of an integrated circuit device. A wafer containing integrated circuit chips is formed with a test area having regions of different heights. At the time the conductors are formed on the chip areas of the wafer, an elongated serpentine assay conductor is deposited on the test area so the assay conductor extends over multiple steps between regions of different heights. Also, a first test conductor is deposited in the test area upon a uniform region of first height, and a second test conductor is deposited in the test area upon a uniform region of second height. The occurrence of high resistances at the steps between regions of different height is indicated by deriving the measured length of the serpentine conductor using the resistance measured between the ends of the serpentine conductor, and comparing that to the design length of the serpentine conductor. The percentage by which the measured length exceeds the design length, at which the integrated circuit will be discarded, depends on the required reliability of the integrated circuit.

  18. Integrated circuit reliability testing

    NASA Technical Reports Server (NTRS)

    Buehler, Martin G. (Inventor); Sayah, Hoshyar R. (Inventor)

    1988-01-01

    A technique is described for use in determining the reliability of microscopic conductors deposited on an uneven surface of an integrated circuit device. A wafer containing integrated circuit chips is formed with a test area having regions of different heights. At the time the conductors are formed on the chip areas of the wafer, an elongated serpentine assay conductor is deposited on the test area so the assay conductor extends over multiple steps between regions of different heights. Also, a first test conductor is deposited in the test area upon a uniform region of first height, and a second test conductor is deposited in the test area upon a uniform region of second height. The occurrence of high resistances at the steps between regions of different height is indicated by deriving the measured length of the serpentine conductor using the resistance measured between the ends of the serpentine conductor, and comparing that to the design length of the serpentine conductor. The percentage by which the measured length exceeds the design length, at which the integrated circuit will be discarded, depends on the required reliability of the integrated circuit.

  19. Circuit breaker lockout device

    DOEpatents

    Kozlowski, Lawrence J.; Shirey, Lawrence A.

    1992-01-01

    An improved lockout assembly for locking a circuit breaker in a selected off or on position is provided. The lockout assembly includes a lock block and a lock pin. The lock block has a hollow interior which fits over the free end of a switch handle of the circuit breaker. The lock block includes at least one hole that is placed in registration with a hole in the free end of the switch handle. A lock tab on the lock block serves to align and register the respective holes on the lock block and switch handle. A lock pin is inserted through the registered holes and serves to connect the lock block to the switch handle. Once the lock block and the switch handle are connected, the position of the switch handle is prevented from being changed by the lock tab bumping up against a stationary housing portion of the circuit breaker. When the lock pin installed, an apertured-end portion of the lock pin is in registration with another hole on the lock block. Then a special scissors conforming to O.S.H.A. regulations can be installed, with one or more padlocks, on the lockout assembly to prevent removal of the lock pin from the lockout assembly, thereby preventing removal of the lockout assembly from the circuit breaker.

  20. Circuit breaker lockout device

    DOEpatents

    Kozlowski, L.J.; Shirey, L.A.

    1992-11-24

    An improved lockout assembly for locking a circuit breaker in a selected off or on position is provided. The lockout assembly includes a lock block and a lock pin. The lock block has a hollow interior which fits over the free end of a switch handle of the circuit breaker. The lock block includes at least one hole that is placed in registration with a hole in the free end of the switch handle. A lock tab on the lock block serves to align and register the respective holes on the lock block and switch handle. A lock pin is inserted through the registered holes and serves to connect the lock block to the switch handle. Once the lock block and the switch handle are connected, the position of the switch handle is prevented from being changed by the lock tab bumping up against a stationary housing portion of the circuit breaker. When the lock pin installed, an apertured-end portion of the lock pin is in registration with another hole on the lock block. Then a special scissors conforming to O.S.H.A. regulations can be installed, with one or more padlocks, on the lockout assembly to prevent removal of the lock pin from the lockout assembly, thereby preventing removal of the lockout assembly from the circuit breaker. 2 figs.

  1. Energy management circuit

    SciTech Connect

    Corless, R. W.

    1985-10-15

    An energy management circuit for use in a telephone or other device which includes an electronic memory is disclosed. The invention provides a capacitive keep alive power supply to maintain said memory in an active condition during extended periods when the device is disconnected from a line power source, as in a telephone on-hook condition. A large capacitor charge is maintained within a predetermined voltage range during such disconnect conditions by a resistively coupled trickle charge power source. A comparator is operated to monitor capacitor charge and to produce a control signal when the voltage at the capacitor falls below a selected memory keep alive level. The control signal operates a switch to bypass the trickle charge circuit. The switch couples line power directly to the capacitor to charge the capacitor to a voltage sufficient to maintain memory contents intact. A switch inhibit circuit is provided to prevent trickle charge bypass during an inadequate or excessive line voltage condition. A sleep timer circuit is also provided to conserve energy required to operate the present invention by allowing the invention to operate periodically and only for short intervals.

  2. Bioluminescent bioreporter integrated circuit

    DOEpatents

    Simpson, Michael L.; Sayler, Gary S.; Paulus, Michael J.

    2000-01-01

    Disclosed are monolithic bioelectronic devices comprising a bioreporter and an OASIC. These bioluminescent bioreporter integrated circuit are useful in detecting substances such as pollutants, explosives, and heavy-metals residing in inhospitable areas such as groundwater, industrial process vessels, and battlefields. Also disclosed are methods and apparatus for environmental pollutant detection, oil exploration, drug discovery, industrial process control, and hazardous chemical monitoring.

  3. Chaos in Josephson circuits

    SciTech Connect

    Kautz, R.

    1983-05-01

    Chaotic behavior in Josephson circuits is reviewed using the rf-driven junction as an example. Topics include the effect of chaos on the I-V characteristic, the period doubling route to chaos, and power spectra for the chaotic state. Liapunov exponents and the fractal geometry of strange attractors are also discussed.

  4. The Global Circuit.

    ERIC Educational Resources Information Center

    Lansford, Henry

    1983-01-01

    Discusses the nature of and research related to a theory explaining the earth's electric budget. The theory suggests a global electric circuit completed by a positive current flowing up into thunderstorm clouds, from clouds to ionosphere, distributed around the globe, and down to earth through the lower atmosphere in fair-weather regions. (JN)

  5. MCNP code

    SciTech Connect

    Cramer, S.N.

    1984-01-01

    The MCNP code is the major Monte Carlo coupled neutron-photon transport research tool at the Los Alamos National Laboratory, and it represents the most extensive Monte Carlo development program in the United States which is available in the public domain. The present code is the direct descendent of the original Monte Carlo work of Fermi, von Neumaum, and Ulam at Los Alamos in the 1940s. Development has continued uninterrupted since that time, and the current version of MCNP (or its predecessors) has always included state-of-the-art methods in the Monte Carlo simulation of radiation transport, basic cross section data, geometry capability, variance reduction, and estimation procedures. The authors of the present code have oriented its development toward general user application. The documentation, though extensive, is presented in a clear and simple manner with many examples, illustrations, and sample problems. In addition to providing the desired results, the output listings give a a wealth of detailed information (some optional) concerning each state of the calculation. The code system is continually updated to take advantage of advances in computer hardware and software, including interactive modes of operation, diagnostic interrupts and restarts, and a variety of graphical and video aids.

  6. QR Codes

    ERIC Educational Resources Information Center

    Lai, Hsin-Chih; Chang, Chun-Yen; Li, Wen-Shiane; Fan, Yu-Lin; Wu, Ying-Tien

    2013-01-01

    This study presents an m-learning method that incorporates Integrated Quick Response (QR) codes. This learning method not only achieves the objectives of outdoor education, but it also increases applications of Cognitive Theory of Multimedia Learning (CTML) (Mayer, 2001) in m-learning for practical use in a diverse range of outdoor locations. When…

  7. Resistor Combinations for Parallel Circuits.

    ERIC Educational Resources Information Center

    McTernan, James P.

    1978-01-01

    To help simplify both teaching and learning of parallel circuits, a high school electricity/electronics teacher presents and illustrates the use of tables of values for parallel resistive circuits in which total resistances are whole numbers. (MF)

  8. Electronic circuits and systems: A compilation. [including integrated circuits, logic circuits, varactor diode circuits, low pass filters, and optical equipment circuits

    NASA Technical Reports Server (NTRS)

    1975-01-01

    Technological information is presented electronic circuits and systems which have potential utility outside the aerospace community. Topics discussed include circuit components such as filters, converters, and integrators, circuits designed for use with specific equipment or systems, and circuits designed primarily for use with optical equipment or displays.

  9. Positive fractional linear electrical circuits

    NASA Astrophysics Data System (ADS)

    Kaczorek, Tadeusz

    2013-10-01

    The positive fractional linear systems and electrical circuits are addressed. New classes of fractional asymptotically stable and unstable electrical circuits are introduced. The Caputo and Riemann-Liouville definitions of fractional derivatives are used to analysis of the positive electrical circuits composed of resistors, capacitors, coils and voltage (current) sources. The positive fractional electrical and specially unstable different types electrical circuits are analyzed. Some open problems are formulated.

  10. Methods of fabricating applique circuits

    DOEpatents

    Dimos, Duane B.; Garino, Terry J.

    1999-09-14

    Applique circuits suitable for advanced packaging applications are introduced. These structures are particularly suited for the simple integration of large amounts (many nanoFarads) of capacitance into conventional integrated circuit and multichip packaging technology. In operation, applique circuits are bonded to the integrated circuit or other appropriate structure at the point where the capacitance is required, thereby minimizing the effects of parasitic coupling. An immediate application is to problems of noise reduction and control in modern high-frequency circuitry.

  11. Experimental determination of circuit equations

    NASA Astrophysics Data System (ADS)

    Shulman, Jason; Malatino, Frank; Widjaja, Matthew; Gunaratne, Gemunu H.

    2015-01-01

    Kirchhoff's laws offer a general, straightforward approach to circuit analysis. Unfortunately, their application becomes impractical for all but the simplest of circuits. This work presents an alternative procedure, based on an approach developed to analyze complex networks, thus making it appropriate for use on large, complicated circuits. The procedure is unusual in that it is not an analytic method but is based on experiment. Yet, this approach produces the same circuit equations obtained by more traditional means.

  12. Statistical circuit design for yield improvement in CMOS circuits

    NASA Technical Reports Server (NTRS)

    Kamath, H. J.; Purviance, J. E.; Whitaker, S. R.

    1990-01-01

    This paper addresses the statistical design of CMOS integrated circuits for improved parametric yield. The work uses the Monte Carlo technique of circuit simulation to obtain an unbiased estimation of the yield. A simple graphical analysis tool, the yield factor histogram, is presented. The yield factor histograms are generated by a new computer program called SPICENTER. Using the yield factor histograms, the most sensitive circuit parameters are noted, and their nominal values are changed to improve the yield. Two basic CMOS example circuits, one analog and one digital, are chosen and their designs are 'centered' to illustrate the use of the yield factor histograms for statistical circuit design.

  13. Graphics-System Color-Code Interface

    NASA Technical Reports Server (NTRS)

    Tulppo, J. S.

    1982-01-01

    Circuit originally developed for a flight simulator interfaces a computer graphics system with color monitor. Subsystem is intended for particular display computer (AGT-130, ADAGE Graphics Terminal) and specific color monitor (beam penetration tube--Penetron). Store-and-transmit channel is one of five in graphics/color-monitor interface. Adding 5-bit color code to existing graphics programs requires minimal programing effort.

  14. Identification coding schemes for modulated reflectance systems

    DOEpatents

    Coates, Don M.; Briles, Scott D.; Neagley, Daniel L.; Platts, David; Clark, David D.

    2006-08-22

    An identifying coding apparatus employing modulated reflectance technology involving a base station emitting a RF signal, with a tag, located remotely from the base station, and containing at least one antenna and predetermined other passive circuit components, receiving the RF signal and reflecting back to the base station a modulated signal indicative of characteristics related to the tag.

  15. High voltage MOSFET switching circuit

    DOEpatents

    McEwan, T.E.

    1994-07-26

    The problem of source lead inductance in a MOSFET switching circuit is compensated for by adding an inductor to the gate circuit. The gate circuit inductor produces an inductive spike which counters the source lead inductive drop to produce a rectangular drive voltage waveform at the internal gate-source terminals of the MOSFET. 2 figs.

  16. Ladder-Type Circuits Revisited

    ERIC Educational Resources Information Center

    Yoon, Sung Hyun

    2007-01-01

    Ladder-type circuits where a given unit is repeated infinitely many times are dealt with in many textbooks on electromagnetism as examples of filter circuits. Determining the impedance of such circuits seems to be regarded as simple, which may be due to the fact that the invariance of the infinite system under the operation of adding one more unit…

  17. High voltage MOSFET switching circuit

    DOEpatents

    McEwan, Thomas E.

    1994-01-01

    The problem of source lead inductance in a MOSFET switching circuit is compensated for by adding an inductor to the gate circuit. The gate circuit inductor produces an inductive spike which counters the source lead inductive drop to produce a rectangular drive voltage waveform at the internal gate-source terminals of the MOSFET.

  18. Automatic Parametric Testing Of Integrated Circuits

    NASA Technical Reports Server (NTRS)

    Jennings, Glenn A.; Pina, Cesar A.

    1989-01-01

    Computer program for parametric testing saves time and effort in research and development of integrated circuits. Software system automatically assembles various types of test structures and lays them out on silicon chip, generates sequency of test instructions, and interprets test data. Employs self-programming software; needs minimum of human intervention. Adapted to needs of different laboratories and readily accommodates new test structures. Program codes designed to be adaptable to most computers and test equipment now in use. Written in high-level languages to enhance transportability.

  19. 2D bifurcations and Newtonian properties of memristive Chua's circuits

    NASA Astrophysics Data System (ADS)

    Marszalek, W.; Podhaisky, H.

    2016-01-01

    Two interesting properties of Chua's circuits are presented. First, two-parameter bifurcation diagrams of Chua's oscillatory circuits with memristors are presented. To obtain various 2D bifurcation images a substantial numerical effort, possibly with parallel computations, is needed. The numerical algorithm is described first and its numerical code for 2D bifurcation image creation is available for free downloading. Several color 2D images and the corresponding 1D greyscale bifurcation diagrams are included. Secondly, Chua's circuits are linked to Newton's law φ ''= F(t,φ,φ')/m with φ=\\text{flux} , constant m > 0, and the force term F(t,φ,φ') containing memory terms. Finally, the jounce scalar equations for Chua's circuits are also discussed.

  20. Improved Classical Simulation of Quantum Circuits Dominated by Clifford Gates

    NASA Astrophysics Data System (ADS)

    Bravyi, Sergey; Gosset, David

    2016-06-01

    We present a new algorithm for classical simulation of quantum circuits over the Clifford+T gate set. The runtime of the algorithm is polynomial in the number of qubits and the number of Clifford gates in the circuit but exponential in the number of T gates. The exponential scaling is sufficiently mild that the algorithm can be used in practice to simulate medium-sized quantum circuits dominated by Clifford gates. The first demonstrations of fault-tolerant quantum circuits based on 2D topological codes are likely to be dominated by Clifford gates due to a high implementation cost associated with logical T gates. Thus our algorithm may serve as a verification tool for near-term quantum computers which cannot in practice be simulated by other means. To demonstrate the power of the new method, we performed a classical simulation of a hidden shift quantum algorithm with 40 qubits, a few hundred Clifford gates, and nearly 50 T gates.

  1. Power supply conditioning circuit

    NASA Technical Reports Server (NTRS)

    Primas, L. E.; Loveland, R.

    1987-01-01

    A power supply conditioning circuit that can reduce Periodic and Random Deviations (PARD) on the output voltages of dc power supplies to -150 dBV from dc to several KHz with no measurable periodic deviations is described. The PARD for a typical commercial low noise power supply is -74 dBV for frequencies above 20 Hz and is often much worse at frequencies below 20 Hz. The power supply conditioning circuit described here relies on the large differences in the dynamic impedances of a constant current diode and a zener diode to establish a dc voltage with low PARD. Power supplies with low PARD are especially important in circuitry involving ultrastable frequencies for the Deep Space Network.

  2. Neuromorphic Silicon Neuron Circuits

    PubMed Central

    Indiveri, Giacomo; Linares-Barranco, Bernabé; Hamilton, Tara Julia; van Schaik, André; Etienne-Cummings, Ralph; Delbruck, Tobi; Liu, Shih-Chii; Dudek, Piotr; Häfliger, Philipp; Renaud, Sylvie; Schemmel, Johannes; Cauwenberghs, Gert; Arthur, John; Hynna, Kai; Folowosele, Fopefolu; Saighi, Sylvain; Serrano-Gotarredona, Teresa; Wijekoon, Jayawan; Wang, Yingxue; Boahen, Kwabena

    2011-01-01

    Hardware implementations of spiking neurons can be extremely useful for a large variety of applications, ranging from high-speed modeling of large-scale neural systems to real-time behaving systems, to bidirectional brain–machine interfaces. The specific circuit solutions used to implement silicon neurons depend on the application requirements. In this paper we describe the most common building blocks and techniques used to implement these circuits, and present an overview of a wide range of neuromorphic silicon neurons, which implement different computational models, ranging from biophysically realistic and conductance-based Hodgkin–Huxley models to bi-dimensional generalized adaptive integrate and fire models. We compare the different design methodologies used for each silicon neuron design described, and demonstrate their features with experimental results, measured from a wide range of fabricated VLSI chips. PMID:21747754

  3. Engineered gene circuits

    NASA Astrophysics Data System (ADS)

    Hasty, Jeff; McMillen, David; Collins, J. J.

    2002-11-01

    A central focus of postgenomic research will be to understand how cellular phenomena arise from the connectivity of genes and proteins. This connectivity generates molecular network diagrams that resemble complex electrical circuits, and a systematic understanding will require the development of a mathematical framework for describing the circuitry. From an engineering perspective, the natural path towards such a framework is the construction and analysis of the underlying submodules that constitute the network. Recent experimental advances in both sequencing and genetic engineering have made this approach feasible through the design and implementation of synthetic gene networks amenable to mathematical modelling and quantitative analysis. These developments have signalled the emergence of a gene circuit discipline, which provides a framework for predicting and evaluating the dynamics of cellular processes. Synthetic gene networks will also lead to new logical forms of cellular control, which could have important applications in functional genomics, nanotechnology, and gene and cell therapy.

  4. PHASE DIFFERENTIAL INDICATING CIRCUIT

    DOEpatents

    Kirsten, F.A.

    1962-01-01

    An electronic circuit for totalizing the net phase difference between two alternating current signals is designed which responds to both increasing and decreasing phase changes. A phase comparator provldes an output pulse for each 360 deg of phase difference occurring, there being a negative pulse for phase shtft in one direction and a positive pulse for a phase shift in the opposite direction. A counting circuit utilizing glow discharge tubes receives the negative and positive pulses at a single input terminal and provides a running net total, pulses of one polarity dded and pulses of the opposite polarity being subtracted. The glow discharge tubes may be decaded to increase the total count capacity. (AEC)

  5. GAS PHOTOTUBE CIRCUIT

    DOEpatents

    Richardson, J.H.

    1958-03-01

    This patent pertains to electronic circuits for measuring the intensity of light and is especially concerned with measurement between preset light thresholds. Such a circuit has application in connection with devices for reading-out information stored on punch cards or tapes where the cards and tapes are translucent. By the novel arrangement of this invention thc sensitivity of a gas phototube is maintained at a low value when the light intensity is below a first threshold level. If the light level rises above the first threshold level, the tube is rendered highly sensitive and an output signal will vary in proportion to the light intensity change. When the light level decreases below a second threshold level, the gas phototube is automatically rendered highly insensitive. Each of these threshold points is adjustable.

  6. Integrated Circuit Immunity

    NASA Technical Reports Server (NTRS)

    Sketoe, J. G.; Clark, Anthony

    2000-01-01

    This paper presents a DOD E3 program overview on integrated circuit immunity. The topics include: 1) EMI Immunity Testing; 2) Threshold Definition; 3) Bias Tee Function; 4) Bias Tee Calibration Set-Up; 5) EDM Test Figure; 6) EMI Immunity Levels; 7) NAND vs. and Gate Immunity; 8) TTL vs. LS Immunity Levels; 9) TP vs. OC Immunity Levels; 10) 7805 Volt Reg Immunity; and 11) Seventies Chip Set. This paper is presented in viewgraph form.

  7. Cartography of serotonergic circuits

    PubMed Central

    Sparta, Dennis R.; Stuber, Garret D.

    2014-01-01

    Summary Serotonin is an essential neuromodulator, but the precise circuit connectivity that regulates serotonergic neurons has not been well defined. Using rabies virus tracing strategies Weissbourd et al., and Dorocic et al., in this issue of Neuron and Ogawa et al., in Cell Reports provide a comprehensive map of the inputs to serotonergic neurons; highlighting the complexity and diversity of potential upstream cellular regulators. PMID:25102556

  8. Cartography of serotonergic circuits.

    PubMed

    Sparta, Dennis R; Stuber, Garret D

    2014-08-01

    Serotonin is an essential neuromodulator, but the precise circuit connectivity that regulates serotonergic neurons has not been well defined. Using rabies virus tracing strategies Weissbourd et al. (2014) and Pollak Dorocic et al. (2014) in this issue of Neuron and Ogawa et al. (2014) in Cell Reports provide a comprehensive map of the inputs to serotonergic neurons, highlighting the complexity and diversity of potential upstream cellular regulators.

  9. Monolithic Optoelectronic Integrated Circuit

    NASA Technical Reports Server (NTRS)

    Bhasin, Kul B.; Walters, Wayne; Gustafsen, Jerry; Bendett, Mark

    1990-01-01

    Monolithic optoelectronic integrated circuit (OEIC) receives single digitally modulated input light signal via optical fiber and converts it into 16-channel electrical output signal. Potentially useful in any system in which digital data must be transmitted serially at high rates, then decoded into and used in parallel format at destination. Applications include transmission and decoding of control signals to phase shifters in phased-array antennas and also communication of data between computers and peripheral equipment in local-area networks.

  10. PARTICLE BEAM TRACKING CIRCUIT

    DOEpatents

    Anderson, O.A.

    1959-05-01

    >A particle-beam tracking and correcting circuit is described. Beam induction electrodes are placed on either side of the beam, and potentials induced by the beam are compared in a voltage comparator or discriminator. This comparison produces an error signal which modifies the fm curve at the voltage applied to the drift tube, thereby returning the orbit to the preferred position. The arrangement serves also to synchronize accelerating frequency and magnetic field growth. (T.R.H.)

  11. Electrochemical Circuit Elements.

    PubMed

    Maier, Joachim

    2016-01-01

    The vast majority of electrochemical processes can be modelled by resistors and capacitors. These will then be, in addition to usual circuit elements, electrochemical and chemical resistors or chemical capacitors. The paper shows the significance of understanding these parameters and their connections in given systems for a variety of timely scientific examples. This rationale mirrors one of the intellectual facets, if not the most important one, of Janko Jamnik's scientific work. PMID:27640384

  12. Optical Circuit Switched Protocol

    NASA Technical Reports Server (NTRS)

    Monacos, Steve P. (Inventor)

    2000-01-01

    The present invention is a system and method embodied in an optical circuit switched protocol for the transmission of data through a network. The optical circuit switched protocol is an all-optical circuit switched network and includes novel optical switching nodes for transmitting optical data packets within a network. Each optical switching node comprises a detector for receiving the header, header detection logic for translating the header into routing information and eliminating the header, and a controller for receiving the routing information and configuring an all optical path within the node. The all optical path located within the node is solely an optical path without having electronic storage of the data and without having optical delay of the data. Since electronic storage of the header is not necessary and the initial header is eliminated by the first detector of the first switching node. multiple identical headers are sent throughout the network so that subsequent switching nodes can receive and read the header for setting up an optical data path.

  13. Inkjet deposited circuit components

    NASA Astrophysics Data System (ADS)

    Bidoki, S. M.; Nouri, J.; Heidari, A. A.

    2010-05-01

    All-printed electronics as a means of achieving ultra-low-cost electronic circuits has attracted great interest in recent years. Inkjet printing is one of the most promising techniques by which the circuit components can be ultimately drawn (i.e. printed) onto the substrate in one step. Here, the inkjet printing technique was used to chemically deposit silver nanoparticles (10-200 nm) simply by ejection of silver nitrate and reducing solutions onto different substrates such as paper, PET plastic film and textile fabrics. The silver patterns were tested for their functionality to work as circuit components like conductor, resistor, capacitor and inductor. Different levels of conductivity were achieved simply by changing the printing sequence, inks ratio and concentration. The highest level of conductivity achieved by an office thermal inkjet printer (300 dpi) was 5.54 × 105 S m-1 on paper. Inkjet deposited capacitors could exhibit a capacitance of more than 1.5 nF (parallel plate 45 × 45 mm2) and induction coils displayed an inductance of around 400 µH (planar coil 10 cm in diameter). Comparison of electronic performance of inkjet deposited components to the performance of conventionally etched items makes the technique highly promising for fabricating different printed electronic devices.

  14. Driven superconducting quantum circuits

    NASA Astrophysics Data System (ADS)

    Nakamura, Yasunobu

    2014-03-01

    Driven nonlinear quantum systems show rich phenomena in various fields of physics. Among them, superconducting quantum circuits have very attractive features such as well-controlled quantum states with design flexibility, strong nonlinearity of Josephson junctions, strong coupling to electromagnetic driving fields, little internal dissipation, and tailored coupling to the electromagnetic environment. We have investigated properties and functionalities of driven superconducting quantum circuits. A transmon qubit coupled to a transmission line shows nearly perfect spatial mode matching between the incident and scattered microwave field in the 1D mode. Dressed states under a driving field are studied there and also in a semi-infinite 1D mode terminated by a resonator containing a flux qubit. An effective Λ-type three-level system is realized under an appropriate driving condition. It allows ``impedance-matched'' perfect absorption of incident probe photons and down conversion into another frequency mode. Finally, the weak signal from the qubit is read out using a Josephson parametric amplifier/oscillator which is another nonlinear circuit driven by a strong pump field. This work was partly supported by the Funding Program for World-Leading Innovative R&D on Science and Technology (FIRST), Project for Developing Innovation Systems of MEXT, MEXT KAKENHI ``Quantum Cybernetics,'' and the NICT Commissioned Research.

  15. Interface Circuit For Printer Port

    NASA Technical Reports Server (NTRS)

    Tucker, Jerry H.; Yadlowsky, Ann B.

    1991-01-01

    Electronic circuit, called printer-port interface circuit (PPI) developed to overcome certain disadvantages of previous methods for connecting IBM PC or PC-compatible computer to other equipment. Has both reading and writing modes of operation. Very simple, requiring only six integrated circuits. Provides for moderately fast rates of transfer of data and uses existing unmodified circuit card in IBM PC. When used with appropriate software, circuit converts printer port on IBM PC, XT, AT, or compatible personal computer to general purpose, 8-bit-data, 16-bit address bus that connects to multitude of devices.

  16. Power system with an integrated lubrication circuit

    DOEpatents

    Hoff, Brian D.; Akasam, Sivaprasad; Algrain, Marcelo C.; Johnson, Kris W.; Lane, William H.

    2009-11-10

    A power system includes an engine having a first lubrication circuit and at least one auxiliary power unit having a second lubrication circuit. The first lubrication circuit is in fluid communication with the second lubrication circuit.

  17. Memristor based startup circuit for self biased circuits

    NASA Astrophysics Data System (ADS)

    Das, Mangal; Singh, Amit Kumar; Rathi, Amit; Singhal, Sonal

    2016-04-01

    This paper presents the design of a Memristor based startup circuit for self biased circuits. Memristor has many advantages over conventional CMOS devices such as low leakage current at nanometer scale, easy to manufacture. In this work the switching characteristics of memristor is utilized. First the theoretical equations describing the switching behavior of memristor are investigated. To prove the switching capability of Memristor, a startup circuit based on memristor is proposed which uses series combination of Memristor and capacitor. Proposed circuit is compared with the previously reported MOSFET based startup circuits. Comparison of different circuits was done to validate the results. Simulation results show that memristor based circuit can attain on (I = 12.94 µA) to off state (I = 1 .2 µA) in 25 ns while the MOSFET based startup circuits take on (I = 14.19 µA) to off state (I = 1.4 µA) in more than 90 ns. The benefit comes in terms of area because the number of components used in the circuit are lesser than the conventional startup circuits.

  18. Base drive circuit

    DOEpatents

    Lange, Arnold C.

    1995-01-01

    An improved base drive circuit (10) having a level shifter (24) for providing bistable input signals to a pair of non-linear delays (30, 32). The non-linear delays (30, 32) provide gate control to a corresponding pair of field effect transistors (100, 106) through a corresponding pair of buffer components (88, 94). The non-linear delays (30, 32) provide delayed turn-on for each of the field effect transistors (100, 106) while an associated pair of transistors (72, 80) shunt the non-linear delays (30, 32) during turn-off of the associated field effect transistor (100, 106).

  19. Dynamic pulse difference circuit

    DOEpatents

    Erickson, Gerald L.

    1978-01-01

    A digital electronic circuit of especial use for subtracting background activity pulses in gamma spectrometry comprises an up-down counter connected to count up with signal-channel pulses and to count down with background-channel pulses. A detector responsive to the count position of the up-down counter provides a signal when the up-down counter has completed one scaling sequence cycle of counts in the up direction. In an alternate embodiment, a detector responsive to the count position of the up-down counter provides a signal upon overflow of the counter.

  20. Seeing Circuits Assemble

    PubMed Central

    Lichtman, Jeff W.; Smith, Stephen J.

    2009-01-01

    Developmental neurobiology has been greatly invigorated by a recent string of breakthroughs in molecular biology and optical physics that permit direct in vivo observation of neural circuit assembly. The imaging done thus far suggests that as brains are built, a significant amount of unbuilding is also occurring. We offer the view that this tumult is the result of the intersecting behaviors of the many single-celled creatures (i.e., neurons, glia, and progenitors) that inhabit brains. New tools will certainly be needed if we wish to monitor the myriad cooperative and competitive interactions at play in the cellular society that builds brains. PMID:18995818

  1. Integrated circuit cell library

    NASA Technical Reports Server (NTRS)

    Whitaker, Sterling R. (Inventor); Miles, Lowell H. (Inventor)

    2005-01-01

    According to the invention, an ASIC cell library for use in creation of custom integrated circuits is disclosed. The ASIC cell library includes some first cells and some second cells. Each of the second cells includes two or more kernel cells. The ASIC cell library is at least 5% comprised of second cells. In various embodiments, the ASIC cell library could be 10% or more, 20% or more, 30% or more, 40% or more, 50% or more, 60% or more, 70% or more, 80% or more, 90% or more, or 95% or more comprised of second cells.

  2. Photonic Integrated Circuits

    NASA Technical Reports Server (NTRS)

    Merritt, Scott; Krainak, Michael

    2016-01-01

    Integrated photonics generally is the integration of multiple lithographically defined photonic and electronic components and devices (e.g. lasers, detectors, waveguides passive structures, modulators, electronic control and optical interconnects) on a single platform with nanometer-scale feature sizes. The development of photonic integrated circuits permits size, weight, power and cost reductions for spacecraft microprocessors, optical communication, processor buses, advanced data processing, and integrated optic science instrument optical systems, subsystems and components. This is particularly critical for small spacecraft platforms. We will give an overview of some NASA applications for integrated photonics.

  3. Base drive circuit

    DOEpatents

    Lange, A.C.

    1995-04-04

    An improved base drive circuit having a level shifter for providing bistable input signals to a pair of non-linear delays. The non-linear delays provide gate control to a corresponding pair of field effect transistors through a corresponding pair of buffer components. The non-linear delays provide delayed turn-on for each of the field effect transistors while an associated pair of transistors shunt the non-linear delays during turn-off of the associated field effect transistor. 2 figures.

  4. Optically controllable molecular logic circuits

    SciTech Connect

    Nishimura, Takahiro Fujii, Ryo; Ogura, Yusuke; Tanida, Jun

    2015-07-06

    Molecular logic circuits represent a promising technology for observation and manipulation of biological systems at the molecular level. However, the implementation of molecular logic circuits for temporal and programmable operation remains challenging. In this paper, we demonstrate an optically controllable logic circuit that uses fluorescence resonance energy transfer (FRET) for signaling. The FRET-based signaling process is modulated by both molecular and optical inputs. Based on the distance dependence of FRET, the FRET pathways required to execute molecular logic operations are formed on a DNA nanostructure as a circuit based on its molecular inputs. In addition, the FRET pathways on the DNA nanostructure are controlled optically, using photoswitching fluorescent molecules to instruct the execution of the desired operation and the related timings. The behavior of the circuit can thus be controlled using external optical signals. As an example, a molecular logic circuit capable of executing two different logic operations was studied. The circuit contains functional DNAs and a DNA scaffold to construct two FRET routes for executing Input 1 AND Input 2 and Input 1 AND NOT Input 3 operations on molecular inputs. The circuit produced the correct outputs with all possible combinations of the inputs by following the light signals. Moreover, the operation execution timings were controlled based on light irradiation and the circuit responded to time-dependent inputs. The experimental results demonstrate that the circuit changes the output for the required operations following the input of temporal light signals.

  5. Sequential circuit design for radiation hardened multiple voltage integrated circuits

    SciTech Connect

    Clark, Lawrence T.; McIver, III, John K.

    2009-11-24

    The present invention includes a radiation hardened sequential circuit, such as a bistable circuit, flip-flop or other suitable design that presents substantial immunity to ionizing radiation while simultaneously maintaining a low operating voltage. In one embodiment, the circuit includes a plurality of logic elements that operate on relatively low voltage, and a master and slave latches each having storage elements that operate on a relatively high voltage.

  6. Speech coding research at Bell Laboratories

    NASA Astrophysics Data System (ADS)

    Atal, Bishnu S.

    2001-05-01

    The field of speech coding is now over 70 years old. It started from the desire to transmit voice signals over telegraph cables. The availability of digital computers in the mid 1960s made it possible to test complex speech coding algorithms rapidly. The introduction of linear predictive coding (LPC) started a new era in speech coding. The fundamental philosophy of speech coding went through a major shift, resulting in a new generation of low bit rate speech coders, such as multi-pulse and code-excited LPC. The semiconductor revolution produced faster and faster DSP chips and made linear predictive coding practical. Code-excited LPC has become the method of choice for low bit rate speech coding applications and is used in most voice transmission standards for cell phones. Digital speech communication is rapidly evolving from circuit-switched to packet-switched networks to provide integrated transmission of voice, data, and video signals. The new communication environment is also moving the focus of speech coding research from compression to low cost, reliable, and secure transmission of voice signals on digital networks, and provides the motivation for creating a new class of speech coders suitable for future applications.

  7. Quasi-Linear Circuit

    NASA Technical Reports Server (NTRS)

    Bradley, William; Bird, Ross; Eldred, Dennis; Zook, Jon; Knowles, Gareth

    2013-01-01

    This work involved developing spacequalifiable switch mode DC/DC power supplies that improve performance with fewer components, and result in elimination of digital components and reduction in magnetics. This design is for missions where systems may be operating under extreme conditions, especially at elevated temperature levels from 200 to 300 degC. Prior art for radiation-tolerant DC/DC converters has been accomplished utilizing classical magnetic-based switch mode converter topologies; however, this requires specific shielding and component de-rating to meet the high-reliability specifications. It requires complex measurement and feedback components, and will not enable automatic re-optimization for larger changes in voltage supply or electrical loading condition. The innovation is a switch mode DC/DC power supply that eliminates the need for processors and most magnetics. It can provide a well-regulated voltage supply with a gain of 1:100 step-up to 8:1 step down, tolerating an up to 30% fluctuation of the voltage supply parameters. The circuit incorporates a ceramic core transformer in a manner that enables it to provide a well-regulated voltage output without use of any processor components or magnetic transformers. The circuit adjusts its internal parameters to re-optimize its performance for changes in supply voltage, environmental conditions, or electrical loading at the output

  8. Noise in biological circuits

    SciTech Connect

    Simpson, Michael L; Allen, Michael S.; Cox, Chris D.; Dar, Roy D.; Karig, David K; McCollum, James M.; Cooke, John F

    2009-01-01

    Noise biology focuses on the sources, processing, and biological consequences of the inherent stochastic fluctuations in molecular transitions or interactions that control cellular behavior. These fluctuations are especially pronounced in small systems where the magnitudes of the fluctuations approach or exceed the mean value of the molecular population. Noise biology is an essential component of nanomedicine where the communication of information is across a boundary that separates small synthetic and biological systems that are bound by their size to reside in environments of large fluctuations. Here we review the fundamentals of the computational, analytical, and experimental approaches to noise biology. We review results that show that the competition between the benefits of low noise and those of low population has resulted in the evolution of genetic system architectures that produce an uneven distribution of stochasticity across the molecular components of cells and, in some cases, use noise to drive biological function. We review the exact and approximate approaches to gene circuit noise analysis and simulation, and reviewmany of the key experimental results obtained using flow cytometry and time-lapse fluorescent microscopy. In addition, we consider the probative value of noise with a discussion of using measured noise properties to elucidate the structure and function of the underlying gene circuit. We conclude with a discussion of the frontiers of and significant future challenges for noise biology.

  9. Time in Cortical Circuits

    PubMed Central

    Shadlen, Michael N.; Jazayeri, Mehrdad; Nobre, Anna C.; Buonomano, Dean V.

    2015-01-01

    Time is central to cognition. However, the neural basis for time-dependent cognition remains poorly understood. We explore how the temporal features of neural activity in cortical circuits and their capacity for plasticity can contribute to time-dependent cognition over short time scales. This neural activity is linked to cognition that operates in the present or anticipates events or stimuli in the near future. We focus on deliberation and planning in the context of decision making as a cognitive process that integrates information across time. We progress to consider how temporal expectations of the future modulate perception. We propose that understanding the neural basis for how the brain tells time and operates in time will be necessary to develop general models of cognition. SIGNIFICANCE STATEMENT Time is central to cognition. However, the neural basis for time-dependent cognition remains poorly understood. We explore how the temporal features of neural activity in cortical circuits and their capacity for plasticity can contribute to time-dependent cognition over short time scales. We propose that understanding the neural basis for how the brain tells time and operates in time will be necessary to develop general models of cognition. PMID:26468192

  10. Jitter compensation circuit

    DOEpatents

    Sullivan, J.S.; Ball, D.G.

    1997-09-09

    The instantaneous V{sub co} signal on a charging capacitor is sampled and the charge voltage on capacitor C{sub o} is captured just prior to its discharge into the first stage of magnetic modulator. The captured signal is applied to an averaging circuit with a long time constant and to the positive input terminal of a differential amplifier. The averaged V{sub co} signal is split between a gain stage (G = 0.975) and a feedback stage that determines the slope of the voltage ramp applied to the high speed comparator. The 97.5% portion of the averaged V{sub co} signal is applied to the negative input of a differential amplifier gain stage (G = 10). The differential amplifier produces an error signal by subtracting 97.5% of the averaged V{sub co} signal from the instantaneous value of sampled V{sub co} signal and multiplying the difference by ten. The resulting error signal is applied to the positive input of a high speed comparator. The error signal is then compared to a voltage ramp that is proportional to the averaged V{sub co} values squared divided by the total volt-second product of the magnetic compression circuit. 11 figs.

  11. Jitter compensation circuit

    DOEpatents

    Sullivan, James S.; Ball, Don G.

    1997-01-01

    The instantaneous V.sub.co signal on a charging capacitor is sampled and the charge voltage on capacitor C.sub.o is captured just prior to its discharge into the first stage of magnetic modulator. The captured signal is applied to an averaging circuit with a long time constant and to the positive input terminal of a differential amplifier. The averaged V.sub. co signal is split between a gain stage (G=0.975) and a feedback stage that determines the slope of the voltage ramp applied to the high speed comparator. The 97.5% portion of the averaged V.sub.co signal is applied to the negative input of a differential amplifier gain stage (G=10). The differential amplifier produces an error signal by subtracting 97.5% of the averaged V.sub.co signal from the instantaneous value of sampled V.sub.co signal and multiplying the difference by ten. The resulting error signal is applied to the positive input of a high speed comparator. The error signal is then compared to a voltage ramp that is proportional to the averaged V.sub.co values squared divided by the total volt-second product of the magnetic compression circuit.

  12. Simple Cell Balance Circuit

    NASA Technical Reports Server (NTRS)

    Johnson, Steven D.; Byers, Jerry W.; Martin, James A.

    2012-01-01

    A method has been developed for continuous cell voltage balancing for rechargeable batteries (e.g. lithium ion batteries). A resistor divider chain is provided that generates a set of voltages representing the ideal cell voltage (the voltage of each cell should be as if the cells were perfectly balanced). An operational amplifier circuit with an added current buffer stage generates the ideal voltage with a very high degree of accuracy, using the concept of negative feedback. The ideal voltages are each connected to the corresponding cell through a current- limiting resistance. Over time, having the cell connected to the ideal voltage provides a balancing current that moves the cell voltage very close to that ideal level. In effect, it adjusts the current of each cell during charging, discharging, and standby periods to force the cell voltages to be equal to the ideal voltages generated by the resistor divider. The device also includes solid-state switches that disconnect the circuit from the battery so that it will not discharge the battery during storage. This solution requires relatively few parts and is, therefore, of lower cost and of increased reliability due to the fewer failure modes. Additionally, this design uses very little power. A preliminary model predicts a power usage of 0.18 W for an 8-cell battery. This approach is applicable to a wide range of battery capacities and voltages.

  13. A bit serial sequential circuit

    NASA Technical Reports Server (NTRS)

    Hu, S.; Whitaker, S.

    1990-01-01

    Normally a sequential circuit with n state variables consists of n unique hardware realizations, one for each state variable. All variables are processed in parallel. This paper introduces a new sequential circuit architecture that allows the state variables to be realized in a serial manner using only one next state logic circuit. The action of processing the state variables in a serial manner has never been addressed before. This paper presents a general design procedure for circuit construction and initialization. Utilizing pass transistors to form the combinational next state forming logic in synchronous sequential machines, a bit serial state machine can be realized with a single NMOS pass transistor network connected to shift registers. The bit serial state machine occupies less area than other realizations which perform parallel operations. Moreover, the logical circuit of the bit serial state machine can be modified by simply changing the circuit input matrix to develop an adaptive state machine.

  14. Automated Design of Quantum Circuits

    NASA Technical Reports Server (NTRS)

    Williams, Colin P.; Gray, Alexander G.

    2000-01-01

    In order to design a quantum circuit that performs a desired quantum computation, it is necessary to find a decomposition of the unitary matrix that represents that computation in terms of a sequence of quantum gate operations. To date, such designs have either been found by hand or by exhaustive enumeration of all possible circuit topologies. In this paper we propose an automated approach to quantum circuit design using search heuristics based on principles abstracted from evolutionary genetics, i.e. using a genetic programming algorithm adapted specially for this problem. We demonstrate the method on the task of discovering quantum circuit designs for quantum teleportation. We show that to find a given known circuit design (one which was hand-crafted by a human), the method considers roughly an order of magnitude fewer designs than naive enumeration. In addition, the method finds novel circuit designs superior to those previously known.

  15. 49 CFR 236.13 - Spring switch; selection of signal control circuits through circuit controller.

    Code of Federal Regulations, 2014 CFR

    2014-10-01

    ... circuits through circuit controller. 236.13 Section 236.13 Transportation Other Regulations Relating to...; selection of signal control circuits through circuit controller. The control circuits of signals governing... circuit controller, or through the contacts of relay repeating the position of such circuit...

  16. 49 CFR 236.13 - Spring switch; selection of signal control circuits through circuit controller.

    Code of Federal Regulations, 2010 CFR

    2010-10-01

    ... circuits through circuit controller. 236.13 Section 236.13 Transportation Other Regulations Relating to...; selection of signal control circuits through circuit controller. The control circuits of signals governing... circuit controller, or through the contacts of relay repeating the position of such circuit...

  17. 49 CFR 236.13 - Spring switch; selection of signal control circuits through circuit controller.

    Code of Federal Regulations, 2012 CFR

    2012-10-01

    ... circuits through circuit controller. 236.13 Section 236.13 Transportation Other Regulations Relating to...; selection of signal control circuits through circuit controller. The control circuits of signals governing... circuit controller, or through the contacts of relay repeating the position of such circuit...

  18. 49 CFR 236.13 - Spring switch; selection of signal control circuits through circuit controller.

    Code of Federal Regulations, 2011 CFR

    2011-10-01

    ... circuits through circuit controller. 236.13 Section 236.13 Transportation Other Regulations Relating to...; selection of signal control circuits through circuit controller. The control circuits of signals governing... circuit controller, or through the contacts of relay repeating the position of such circuit...

  19. Add/Compare/Select Circuit For Rapid Decoding

    NASA Technical Reports Server (NTRS)

    Budinger, James M.; Becker, Neal D.; Johnson, Peter N.

    1993-01-01

    Prototype decoding system operates at 200 Mb/s. ACS (add/compare/select) gate array is highly integrated emitter-coupled-logic circuit implementing arithmetic operations essential to Viterbi decoding of convolutionally encoded data signals. Principal advantage of circuit is speed. Operates as single unit performing eight additions and finds minimum of eight sums, or operates as two independent units, each performing four additions and finding minimum of four sums. Flexibility enables application to variety of different codes. Includes built-in self-testing circuitry, enabling unit to be tested at full speed with help of only simple test fixture.

  20. Pharmacokinetics and RC Circuit Concepts

    NASA Astrophysics Data System (ADS)

    Cock, Mieke De; Janssen, Paul

    2013-11-01

    Most introductory physics courses include a chapter on RC circuits in which the differential equations for the charging and discharging of a capacitor are derived. A number of papers in this journal describe lab experiments dealing with the measurement of different parameters in such RC circuits. In this contribution, we report on a lab experiment we developed for students majoring in pharmacy, using RC circuits to simulate a pharmacokinetic process.

  1. Source-circuit design overview

    NASA Technical Reports Server (NTRS)

    Ross, R. G., Jr.

    1983-01-01

    The source circuit is the fundamental electrical building block of a large central-station array; it consists of a series-parallel network of solar cells that develops full system voltage. The array field is generally made up of a large number of parallel source circuits. Source-circuit electrical configuration is driven by a number of design considerations, which must be considered simultaneously. Array fault tolerance and hot spot heating endurance are examined in detail.

  2. Electronic control circuits: A compilation

    NASA Technical Reports Server (NTRS)

    1973-01-01

    A compilation of technical R and D information on circuits and modular subassemblies is presented as a part of a technology utilization program. Fundamental design principles and applications are given. Electronic control circuits discussed include: anti-noise circuit; ground protection device for bioinstrumentation; temperature compensation for operational amplifiers; hybrid gatling capacitor; automatic signal range control; integrated clock-switching control; and precision voltage tolerance detector.

  3. Magnetic compression laser driving circuit

    DOEpatents

    Ball, Don G.; Birx, Dan; Cook, Edward G.

    1993-01-01

    A magnetic compression laser driving circuit is disclosed. The magnetic compression laser driving circuit compresses voltage pulses in the range of 1.5 microseconds at 20 Kilovolts of amplitude to pulses in the range of 40 nanoseconds and 60 Kilovolts of amplitude. The magnetic compression laser driving circuit includes a multi-stage magnetic switch where the last stage includes a switch having at least two turns which has larger saturated inductance with less core material so that the efficiency of the circuit and hence the laser is increased.

  4. Four-junction superconducting circuit

    PubMed Central

    Qiu, Yueyin; Xiong, Wei; He, Xiao-Ling; Li, Tie-Fu; You, J. Q.

    2016-01-01

    We develop a theory for the quantum circuit consisting of a superconducting loop interrupted by four Josephson junctions and pierced by a magnetic flux (either static or time-dependent). In addition to the similarity with the typical three-junction flux qubit in the double-well regime, we demonstrate the difference of the four-junction circuit from its three-junction analogue, including its advantages over the latter. Moreover, the four-junction circuit in the single-well regime is also investigated. Our theory provides a tool to explore the physical properties of this four-junction superconducting circuit. PMID:27356619

  5. Magnetic compression laser driving circuit

    DOEpatents

    Ball, D.G.; Birx, D.; Cook, E.G.

    1993-01-05

    A magnetic compression laser driving circuit is disclosed. The magnetic compression laser driving circuit compresses voltage pulses in the range of 1.5 microseconds at 20 kilovolts of amplitude to pulses in the range of 40 nanoseconds and 60 kilovolts of amplitude. The magnetic compression laser driving circuit includes a multi-stage magnetic switch where the last stage includes a switch having at least two turns which has larger saturated inductance with less core material so that the efficiency of the circuit and hence the laser is increased.

  6. PRECISION TIME-DELAY CIRCUIT

    DOEpatents

    Creveling, R.

    1959-03-17

    A tine-delay circuit which produces a delay time in d. The circuit a capacitor, an te back resistance, connected serially with the anode of the diode going to ground. At the start of the time delay a negative stepfunction is applied to the series circuit and initiates a half-cycle transient oscillatory voltage terminated by a transient oscillatory voltage of substantially higher frequency. The output of the delay circuit is taken at the junction of the inductor and diode where a sudden voltage rise appears after the initiation of the higher frequency transient oscillations.

  7. Four-junction superconducting circuit.

    PubMed

    Qiu, Yueyin; Xiong, Wei; He, Xiao-Ling; Li, Tie-Fu; You, J Q

    2016-01-01

    We develop a theory for the quantum circuit consisting of a superconducting loop interrupted by four Josephson junctions and pierced by a magnetic flux (either static or time-dependent). In addition to the similarity with the typical three-junction flux qubit in the double-well regime, we demonstrate the difference of the four-junction circuit from its three-junction analogue, including its advantages over the latter. Moreover, the four-junction circuit in the single-well regime is also investigated. Our theory provides a tool to explore the physical properties of this four-junction superconducting circuit. PMID:27356619

  8. Four-junction superconducting circuit.

    PubMed

    Qiu, Yueyin; Xiong, Wei; He, Xiao-Ling; Li, Tie-Fu; You, J Q

    2016-06-30

    We develop a theory for the quantum circuit consisting of a superconducting loop interrupted by four Josephson junctions and pierced by a magnetic flux (either static or time-dependent). In addition to the similarity with the typical three-junction flux qubit in the double-well regime, we demonstrate the difference of the four-junction circuit from its three-junction analogue, including its advantages over the latter. Moreover, the four-junction circuit in the single-well regime is also investigated. Our theory provides a tool to explore the physical properties of this four-junction superconducting circuit.

  9. A Circuit to Demonstrate Phase Relationships in "RLC" Circuits

    ERIC Educational Resources Information Center

    Sokol, P. E.; Warren, G.; Zheng, B.; Smith, P.

    2013-01-01

    We have developed a circuit to demonstrate the phase relationships between resistive and reactive elements in series "RLC" circuits. We utilize a differential amplifier to allow the phases of the three elements and the current to be simultaneously displayed on an inexpensive four channel oscilloscope. We have included a novel circuit…

  10. ELECTRONIC INTEGRATING CIRCUIT

    DOEpatents

    Englemann, R.H.

    1963-08-20

    An electronic integrating circuit using a transistor with a capacitor connected between the emitter and collector through which the capacitor discharges at a rate proportional to the input current at the base is described. Means are provided for biasing the base with an operating bias and for applying a voltage pulse to the capacitor for charging to an initial voltage. A current dividing diode is connected between the base and emitter of the transistor, and signal input terminal means are coupled to the juncture of the capacitor and emitter and to the base of the transistor. At the end of the integration period, the residual voltage on said capacitor is less by an amount proportional to the integral of the input signal. Either continuous or intermittent periods of integration are provided. (AEC)

  11. Photoconductive circuit element reflectometer

    DOEpatents

    Rauscher, C.

    1987-12-07

    A photoconductive reflectometer for characterizing semiconductor devices at millimeter wavelength frequencies where a first photoconductive circuit element (PCE) is biased by a direct current voltage source and produces short electrical pulses when excited into conductance by short first laser light pulses. The electrical pulses are electronically conditioned to improve the frequency related amplitude characteristics of the pulses which thereafter propagate along a transmission line to a device under test. Second PCEs are connected along the transmission line to sample the signals on the transmission line when excited into conductance by short second laser light pulses, spaced apart in time a determinable period from the first laser light pulses. Electronic filters connected to each of the second PCEs act as low-pass filters and remove parasitic interference from the sampled signals and output the sampled signals in the form of slowed-motion images of the signals on the transmission line. 4 figs.

  12. Photoconductive circuit element reflectometer

    DOEpatents

    Rauscher, Christen

    1990-01-01

    A photoconductive reflectometer for characterizing semiconductor devices at millimeter wavelength frequencies where a first photoconductive circuit element (PCE) is biased by a direct current voltage source and produces short electrical pulses when excited into conductance by short first laser light pulses. The electrical pulses are electronically conditioned to improve the frequency related amplitude characteristics of the pulses which thereafter propagate along a transmission line to a device under test. Second PCEs are connected along the transmission line to sample the signals on the transmission line when excited into conductance by short second laser light pulses, spaced apart in time a variable period from the first laser light pulses. Electronic filters connected to each of the second PCEs act as low-pass filters and remove parasitic interference from the sampled signals and output the sampled signals in the form of slowed-motion images of the signals on the transmission line.

  13. ELECTRONIC PULSE SCALING CIRCUITS

    DOEpatents

    Cooke-Yarborough, E.H.

    1958-11-18

    Electronic pulse scaling circults of the klnd comprlsing a serles of bi- stable elements connected ln sequence, usually in the form of a rlng so as to be cycllcally repetitive at the highest scallng factor, are described. The scaling circuit comprises a ring system of bi-stable elements each arranged on turn-off to cause, a succeeding element of the ring to be turned-on, and one being arranged on turn-off to cause a further element of the ring to be turned-on. In addition, separate means are provided for applying a turn-off pulse to all the elements simultaneously, and for resetting the elements to a starting condition at the end of each cycle.

  14. Modeling cortical circuits.

    SciTech Connect

    Rohrer, Brandon Robinson; Rothganger, Fredrick H.; Verzi, Stephen J.; Xavier, Patrick Gordon

    2010-09-01

    The neocortex is perhaps the highest region of the human brain, where audio and visual perception takes place along with many important cognitive functions. An important research goal is to describe the mechanisms implemented by the neocortex. There is an apparent regularity in the structure of the neocortex [Brodmann 1909, Mountcastle 1957] which may help simplify this task. The work reported here addresses the problem of how to describe the putative repeated units ('cortical circuits') in a manner that is easily understood and manipulated, with the long-term goal of developing a mathematical and algorithmic description of their function. The approach is to reduce each algorithm to an enhanced perceptron-like structure and describe its computation using difference equations. We organize this algorithmic processing into larger structures based on physiological observations, and implement key modeling concepts in software which runs on parallel computing hardware.

  15. VLSI circuits implementing computational models of neocortical circuits.

    PubMed

    Wijekoon, Jayawan H B; Dudek, Piotr

    2012-09-15

    This paper overviews the design and implementation of three neuromorphic integrated circuits developed for the COLAMN ("Novel Computing Architecture for Cognitive Systems based on the Laminar Microcircuitry of the Neocortex") project. The circuits are implemented in a standard 0.35 μm CMOS technology and include spiking and bursting neuron models, and synapses with short-term (facilitating/depressing) and long-term (STDP and dopamine-modulated STDP) dynamics. They enable execution of complex nonlinear models in accelerated-time, as compared with biology, and with low power consumption. The neural dynamics are implemented using analogue circuit techniques, with digital asynchronous event-based input and output. The circuits provide configurable hardware blocks that can be used to simulate a variety of neural networks. The paper presents experimental results obtained from the fabricated devices, and discusses the advantages and disadvantages of the analogue circuit approach to computational neural modelling. PMID:22342970

  16. Digital circuits using universal logic gates

    NASA Technical Reports Server (NTRS)

    Whitaker, Sterling R. (Inventor); Miles, Lowell H. (Inventor); Cameron, Eric G. (Inventor); Donohoe, Gregory W. (Inventor); Gambles, Jody W. (Inventor)

    2004-01-01

    According to the invention, a digital circuit design embodied in at least one of a structural netlist, a behavioral netlist, a hardware description language netlist, a full-custom ASIC, a semi-custom ASIC, an IP core, an integrated circuit, a hybrid of chips, one or more masks, a FPGA, and a circuit card assembly is disclosed. The digital circuit design includes first and second sub-circuits. The first sub-circuits comprise a first percentage of the digital circuit design and the second sub-circuits comprise a second percentage of the digital circuit design. Each of the second sub-circuits is substantially comprised of one or more kernel circuits. The kernel circuits are comprised of selection circuits. The second percentage is at least 5%. In various embodiments, the second percentage could be at least 10%, 20%, 30%, 40%, 50%, 60%, 70%, 80%, 90%, or 95%.

  17. Compact Circuit Preprocesses Accelerometer Output

    NASA Technical Reports Server (NTRS)

    Bozeman, Richard J., Jr.

    1993-01-01

    Compact electronic circuit transfers dc power to, and preprocesses ac output of, accelerometer and associated preamplifier. Incorporated into accelerometer case during initial fabrication or retrofit onto commercial accelerometer. Made of commercial integrated circuits and other conventional components; made smaller by use of micrologic and surface-mount technology.

  18. Demonstrations with an "LCR" Circuit

    ERIC Educational Resources Information Center

    Kraftmakher, Yaakov

    2011-01-01

    The "LCR" circuit is an important topic in the course of electricity and magnetism. Papers in this field consider mainly the forced oscillations and resonance. Our aim is to show how to demonstrate the free and self-excited oscillations in an "LCR" circuit. (Contains 4 figures.)

  19. Sequential Polarity-Reversing Circuit

    NASA Technical Reports Server (NTRS)

    Labaw, Clayton C.

    1994-01-01

    Proposed circuit reverses polarity of electric power supplied to bidirectional dc motor, reversible electro-mechanical actuator, or other device operating in direction depending on polarity. Circuit reverses polarity each time power turned on, without need for additional polarity-reversing or direction signals and circuitry to process them.

  20. Dive In to Aquatic Circuits.

    ERIC Educational Resources Information Center

    Goldfarb, Joseph M.

    1995-01-01

    The article presents a method for swimming teachers and coaches to stave off workout boredom in their students by using a circuit in the pool. After explaining how to set up a training circuit, the article describes sample stations and notes important safety precautions. (SM)

  1. Pharmacokinetics and "RC" Circuit Concepts

    ERIC Educational Resources Information Center

    De Cock, Mieke; Janssen, Paul

    2013-01-01

    Most introductory physics courses include a chapter on "RC" circuits in which the differential equations for the charging and discharging of a capacitor are derived. A number of papers in this journal describe lab experiments dealing with the measurement of different parameters in such "RC" circuits. In this contribution, we…

  2. 49 CFR 236.728 - Circuit, trap.

    Code of Federal Regulations, 2012 CFR

    2012-10-01

    ... 49 Transportation 4 2012-10-01 2012-10-01 false Circuit, trap. 236.728 Section 236.728... Circuit, trap. A term applied to a circuit used where it is desirable to provide a track circuit but where it is impracticable to maintain a track circuit....

  3. 49 CFR 236.728 - Circuit, trap.

    Code of Federal Regulations, 2014 CFR

    2014-10-01

    ... 49 Transportation 4 2014-10-01 2014-10-01 false Circuit, trap. 236.728 Section 236.728... Circuit, trap. A term applied to a circuit used where it is desirable to provide a track circuit but where it is impracticable to maintain a track circuit....

  4. 49 CFR 236.728 - Circuit, trap.

    Code of Federal Regulations, 2010 CFR

    2010-10-01

    ... 49 Transportation 4 2010-10-01 2010-10-01 false Circuit, trap. 236.728 Section 236.728... Circuit, trap. A term applied to a circuit used where it is desirable to provide a track circuit but where it is impracticable to maintain a track circuit....

  5. An Electronics Course Emphasizing Circuit Design

    ERIC Educational Resources Information Center

    Bergeson, Haven E.

    1975-01-01

    Describes a one-quarter introductory electronics course in which the students use a variety of inexpensive integrated circuits to design and construct a large number of useful circuits. Presents the subject matter of the course in three parts: linear circuits, digital circuits, and more complex circuits. (GS)

  6. 49 CFR 236.728 - Circuit, trap.

    Code of Federal Regulations, 2011 CFR

    2011-10-01

    ... 49 Transportation 4 2011-10-01 2011-10-01 false Circuit, trap. 236.728 Section 236.728... Circuit, trap. A term applied to a circuit used where it is desirable to provide a track circuit but where it is impracticable to maintain a track circuit....

  7. Principles of genetic circuit design.

    PubMed

    Brophy, Jennifer A N; Voigt, Christopher A

    2014-05-01

    Cells navigate environments, communicate and build complex patterns by initiating gene expression in response to specific signals. Engineers seek to harness this capability to program cells to perform tasks or create chemicals and materials that match the complexity seen in nature. This Review describes new tools that aid the construction of genetic circuits. Circuit dynamics can be influenced by the choice of regulators and changed with expression 'tuning knobs'. We collate the failure modes encountered when assembling circuits, quantify their impact on performance and review mitigation efforts. Finally, we discuss the constraints that arise from circuits having to operate within a living cell. Collectively, better tools, well-characterized parts and a comprehensive understanding of how to compose circuits are leading to a breakthrough in the ability to program living cells for advanced applications, from living therapeutics to the atomic manufacturing of functional materials.

  8. Demultiplexer circuit for neural stimulation

    DOEpatents

    Wessendorf, Kurt O; Okandan, Murat; Pearson, Sean

    2012-10-09

    A demultiplexer circuit is disclosed which can be used with a conventional neural stimulator to extend the number of electrodes which can be activated. The demultiplexer circuit, which is formed on a semiconductor substrate containing a power supply that provides all the dc electrical power for operation of the circuit, includes digital latches that receive and store addressing information from the neural stimulator one bit at a time. This addressing information is used to program one or more 1:2.sup.N demultiplexers in the demultiplexer circuit which then route neural stimulation signals from the neural stimulator to an electrode array which is connected to the outputs of the 1:2.sup.N demultiplexer. The demultiplexer circuit allows the number of individual electrodes in the electrode array to be increased by a factor of 2.sup.N with N generally being in a range of 2-4.

  9. Genetic Dissection of Neural Circuits

    PubMed Central

    Luo, Liqun; Callaway, Edward M.; Svoboda, Karel

    2009-01-01

    Understanding the principles of information processing in neural circuits requires systematic characterization of the participating cell types and their connections, and the ability to measure and perturb their activity. Genetic approaches promise to bring experimental access to complex neural systems, including genetic stalwarts such as the fly and mouse, but also to nongenetic systems such as primates. Together with anatomical and physiological methods, cell-type-specific expression of protein markers and sensors and transducers will be critical to construct circuit diagrams and to measure the activity of genetically defined neurons. Inactivation and activation of genetically defined cell types will establish causal relationships between activity in specific groups of neurons, circuit function, and animal behavior. Genetic analysis thus promises to reveal the logic of the neural circuits in complex brains that guide behaviors. Here we review progress in the genetic analysis of neural circuits and discuss directions for future research and development. PMID:18341986

  10. Reduced circuit implementation of encoder and syndrome generator

    DOEpatents

    Trager, Barry M; Winograd, Shmuel

    2014-05-27

    An error correction method and system includes an Encoder and Syndrome-generator that operate in parallel to reduce the amount of circuitry used to compute check symbols and syndromes for error correcting codes. The system and method computes the contributions to the syndromes and check symbols 1 bit at a time instead of 1 symbol at a time. As a result, the even syndromes can be computed as powers of the odd syndromes. Further, the system assigns symbol addresses so that there are, for an example GF(2.sup.8) which has 72 symbols, three (3) blocks of addresses which differ by a cube root of unity to allow the data symbols to be combined for reducing size and complexity of odd syndrome circuits. Further, the implementation circuit for generating check symbols is derived from syndrome circuit using the inverse of the part of the syndrome matrix for check locations.

  11. Gate drive latching circuit for an auxiliary resonant commutation circuit

    NASA Technical Reports Server (NTRS)

    Delgado, Eladio Clemente (Inventor); Kheraluwala, Mustansir Hussainy (Inventor)

    1999-01-01

    A gate drive latching circuit for an auxiliary resonant commutation circuit for a power switching inverter includes a current monitor circuit providing a current signal to a pair of analog comparators to implement latching of one of a pair of auxiliary switching devices which are used to provide commutation current for commutating switching inverters in the circuit. Each of the pair of comparators feeds a latching circuit which responds to an active one of the comparators for latching the associated gate drive circuit for one of the pair of auxiliary commutating switches. An initial firing signal is applied to each of the commutating switches to gate each into conduction and the resulting current is monitored to determine current direction and therefore the one of the switches which is carrying current. The comparator provides a latching signal to the one of the auxiliary power switches which is actually conducting current and latches that particular power switch into an on state for the duration of current through the device. The latching circuit is so designed that the only time one of the auxiliary switching devices can be latched on is during the duration of an initial firing command signal.

  12. Piezo-optomechanical circuits

    NASA Astrophysics Data System (ADS)

    Coimbatore Balram, Krishna; Davanco, Marcelo; Ilic, B. Robert; Srinivasan, Kartik

    Coherent links between the optical, radio frequency (RF), and mechanical domains are critical for applications ranging from quantum state transfer between the RF and optical domains to signal processing in the acoustic domain for microwave photonics. We develop such a piezo optomechanical circuit platform in GaAs, in which localized and interacting 1550 nm photons and 2.4 GHz phonons are combined with photonic and phononic waveguides. GaAs allows us to exploit the photoelastic effect to engineer cavities with strong optomechanical coupling (g0/2 π ~ 1.1 MHz) and the piezoelectric effect to couple RF fields to mechanical motion through surface acoustic waves, which are routed on-chip using phononic crystal waveguides. This platform enables optical readout of electrically-injected mechanical states with an average coherent intracavity phonon number as small as ~0.05 and the ability to drive mechanical motion with equal facility through either the optical or electrical channel. This is used to demonstrate a novel acoustic wave interference effect in which optically-driven motion is completely cancelled by electrically-driven motion, and vice versa. As an application of this, we present time-domain measurements of optically-controlled acoustic pulse propagation. Secondary Affiliation is Maryland Nanocenter, University of Maryland, College Park, MD.

  13. Low distortion automatic phase control circuit

    NASA Technical Reports Server (NTRS)

    Hauge, G.; Pederson, C. W.

    1972-01-01

    Circuit for generation and demodulation of quadrature double side band signals in frequency division multiplexing system is described. Circuit is designed to produce low distortion automatic phase control. Illustration of circuit and components is included.

  14. Gyrator circuit using field effect transistors

    NASA Technical Reports Server (NTRS)

    Hochmair, E. S.

    1973-01-01

    Gyrator circuit is especially useful in integrated circuits for such purposes as simulating inductors with capacitors. Circuit is adaptable to semifloating and full floating configurations. It has excellent response, low power consumption, and high energy storage capacity.

  15. 49 CFR 236.731 - Controller, circuit.

    Code of Federal Regulations, 2013 CFR

    2013-10-01

    ... Controller, circuit. A device for opening and closing electric circuits. ... 49 Transportation 4 2013-10-01 2013-10-01 false Controller, circuit. 236.731 Section 236.731 Transportation Other Regulations Relating to Transportation (Continued) FEDERAL RAILROAD...

  16. Performance analysis of electrical circuits /PANE/

    NASA Technical Reports Server (NTRS)

    Johnson, K. L.; Steinberg, L. L.

    1968-01-01

    Automated statistical and worst case computer program has been designed to perform dc and ac steady circuit analyses. The program determines the worst case circuit performance by solving circuit equations.

  17. 30 CFR 75.800 - High-voltage circuits; circuit breakers.

    Code of Federal Regulations, 2014 CFR

    2014-07-01

    ... 30 Mineral Resources 1 2014-07-01 2014-07-01 false High-voltage circuits; circuit breakers. 75.800... § 75.800 High-voltage circuits; circuit breakers. High-voltage circuits entering the underground area of any coal mine shall be protected by suitable circuit breakers of adequate interrupting...

  18. 30 CFR 75.800 - High-voltage circuits; circuit breakers.

    Code of Federal Regulations, 2012 CFR

    2012-07-01

    ... 30 Mineral Resources 1 2012-07-01 2012-07-01 false High-voltage circuits; circuit breakers. 75.800... § 75.800 High-voltage circuits; circuit breakers. High-voltage circuits entering the underground area of any coal mine shall be protected by suitable circuit breakers of adequate interrupting...

  19. 30 CFR 75.800 - High-voltage circuits; circuit breakers.

    Code of Federal Regulations, 2011 CFR

    2011-07-01

    ... 30 Mineral Resources 1 2011-07-01 2011-07-01 false High-voltage circuits; circuit breakers. 75.800... § 75.800 High-voltage circuits; circuit breakers. High-voltage circuits entering the underground area of any coal mine shall be protected by suitable circuit breakers of adequate interrupting...

  20. Homological stabilizer codes

    SciTech Connect

    Anderson, Jonas T.

    2013-03-15

    In this paper we define homological stabilizer codes on qubits which encompass codes such as Kitaev's toric code and the topological color codes. These codes are defined solely by the graphs they reside on. This feature allows us to use properties of topological graph theory to determine the graphs which are suitable as homological stabilizer codes. We then show that all toric codes are equivalent to homological stabilizer codes on 4-valent graphs. We show that the topological color codes and toric codes correspond to two distinct classes of graphs. We define the notion of label set equivalencies and show that under a small set of constraints the only homological stabilizer codes without local logical operators are equivalent to Kitaev's toric code or to the topological color codes. - Highlights: Black-Right-Pointing-Pointer We show that Kitaev's toric codes are equivalent to homological stabilizer codes on 4-valent graphs. Black-Right-Pointing-Pointer We show that toric codes and color codes correspond to homological stabilizer codes on distinct graphs. Black-Right-Pointing-Pointer We find and classify all 2D homological stabilizer codes. Black-Right-Pointing-Pointer We find optimal codes among the homological stabilizer codes.

  1. Variational integrators for electric circuits

    SciTech Connect

    Ober-Blöbaum, Sina; Tao, Molei; Cheng, Mulin; Owhadi, Houman; Marsden, Jerrold E.

    2013-06-01

    In this contribution, we develop a variational integrator for the simulation of (stochastic and multiscale) electric circuits. When considering the dynamics of an electric circuit, one is faced with three special situations: 1. The system involves external (control) forcing through external (controlled) voltage sources and resistors. 2. The system is constrained via the Kirchhoff current (KCL) and voltage laws (KVL). 3. The Lagrangian is degenerate. Based on a geometric setting, an appropriate variational formulation is presented to model the circuit from which the equations of motion are derived. A time-discrete variational formulation provides an iteration scheme for the simulation of the electric circuit. Dependent on the discretization, the intrinsic degeneracy of the system can be canceled for the discrete variational scheme. In this way, a variational integrator is constructed that gains several advantages compared to standard integration tools for circuits; in particular, a comparison to BDF methods (which are usually the method of choice for the simulation of electric circuits) shows that even for simple LCR circuits, a better energy behavior and frequency spectrum preservation can be observed using the developed variational integrator.

  2. Global optimization of digital circuits

    NASA Astrophysics Data System (ADS)

    Flandera, Richard

    1991-12-01

    This thesis was divided into two tasks. The first task involved developing a parser which could translate a behavioral specification in Very High-Speed Integrated Circuits (VHSIC) Hardware Description Language (VHDL) into the format used by an existing digital circuit optimization tool, Boolean Reasoning In Scheme (BORIS). Since this tool is written in Scheme, a dialect of Lisp, the parser was also written in Scheme. The parser was implemented is Artez's modification of Earley's Algorithm. Additionally, a VHDL tokenizer was implemented in Scheme and a portion of the VHDL grammar was converted into the format which the parser uses. The second task was the incorporation of intermediate functions into BORIS. The existing BORIS contains a recursive optimization system that optimizes digital circuits by using circuit outputs as inputs into other circuits. Intermediate functions provide a greater selection of functions to be used as circuits inputs. Using both intermediate functions and output functions, the costs of the circuits in the test set were reduced by 43 percent. This is a 10 percent reduction when compared to the existing recursive optimization system. Incorporating intermediate functions into BORIS required the development of an intermediate-function generator and a set of control methods to keep the computation time from increasing exponentially.

  3. Integrated circuits, and design and manufacture thereof

    DOEpatents

    Auracher, Stefan; Pribbernow, Claus; Hils, Andreas

    2006-04-18

    A representation of a macro for an integrated circuit layout. The representation may define sub-circuit cells of a module. The module may have a predefined functionality. The sub-circuit cells may include at least one reusable circuit cell. The reusable circuit cell may be configured such that when the predefined functionality of the module is not used, the reusable circuit cell is available for re-use.

  4. Framed 4-graphs: Euler tours, Gauss circuits and rotating circuits

    SciTech Connect

    Il'yutko, Denis P

    2011-09-30

    We consider connected finite 4-valent graphs with the structure of opposite edges at each vertex (framed 4-graphs). For any of such graphs there exist Euler tours, in travelling along which at each vertex we turn from an edge to a nonopposite one (rotating circuits); and at the same time, it is not true that for any such graph there exists an Euler tour passing from an edge to the opposite one at each vertex (a Gauss circuit). The main result of the work is an explicit formula connecting the adjacency matrices of the Gauss circuit and an arbitrary Euler tour. This formula immediately gives us a criterion for the existence of a Gauss circuit on a given framed 4-graph. It turns out that the results are also valid for all symmetric matrices (not just for matrices realisable by a chord diagram). Bibliography: 24 titles.

  5. Engineering stabilizer measurements in circuit QED: II

    NASA Astrophysics Data System (ADS)

    Blumoff, Jacob; Chou, Kevin; Reagor, M.; Axline, C.; Brierly, R.; Nigg, S.; Reinhold, P.; Heeres, R.; Wang, C.; Sliwa, K.; Narla, A.; Hatridge, M.; Jiang, L.; Devoret, M. H.; Girvin, S. M.; Schoelkopf, R. J.

    Quantum error correction based on stabilizer codes has emerged as an attractive approach towards building a practical quantum information processor. One requirement for such a device is the ability to perform hardware efficient measurements on registers of qubits. We demonstrate a new protocol to realize such multi-qubit measurements. A key feature of our approach is that it enables arbitrary stabilizer measurements to be selected in software, and requires a relatively small number of buses, ancillae, and control lines. This allows for a minimally complex sample realizing a simple dispersive hamiltonian while maintaining a high degree of decoupling between our fixed-tuned qubits. We experimentally implement these measurements in 3D circuit QED using transmon qubits coupled to a common bus resonator. In the second of two talks, we present a full characterization of the algorithm describing the outcome dependent projections via quantum process tomography. We acknowledge funding from ARO.

  6. Engineering stabilizer measurements in circuit QED: I

    NASA Astrophysics Data System (ADS)

    Chou, Kevin; Blumoff, Jacob; Reagor, M.; Axline, C.; Brierley, R.; Nigg, S.; Reinhold, P.; Heeres, R.; Wang, C.; Sliwa, K.; Narla, A.; Hatridge, M.; Jiang, L.; Devoret, M. H.; Girvin, S. M.; Schoekopf, R. J.

    Quantum error correction based on stabilizer codes has emerged as an attractive approach towards building a practical quantum information processor. One requirement for such a device is the ability to perform hardware efficient measurements on registers of qubits. We demonstrate a new protocol to realize such multi-qubit measurements. A key feature of our approach is that it enables arbitrary stabilizer measurements to be selected in software, and requires a relatively small number of buses, ancillae, and control lines. This allows for a minimally complex sample realizing a simple dispersive hamiltonian while maintaining a high degree of decoupling between our fixed-tuned qubits. We experimentally implement these measurements in 3D circuit QED using transmon qubits coupled to a common bus resonator. In this first of two talks, we introduce our 3D cQED system and describe the protocol for measuring n-qubit parities of a three qubit register. We acknowledge funding from ARO.

  7. Counterpulse railgun energy recovery circuit

    DOEpatents

    Honig, E.M.

    1984-09-28

    The invention presented relates to a high-power pulsing circuit and more particularly to a repetitive pulse inductive energy storage and transfer circuit for an electromagnetic launcher. In an electromagnetic launcher such as a railgun for propelling a projectile at high velocity, a counterpulse energy recovery circuit is employed to transfer stored inductive energy from a source inductor to the railgun inductance to propel the projectile down the railgun. Switching circuitry and an energy transfer capacitor are used to switch the energy back to the source inductor in readiness for a repetitive projectile propelling cycle.

  8. Overpulse railgun energy recovery circuit

    DOEpatents

    Honig, E.M.

    1984-09-28

    The invention presented relates to a high-power pulsing circuit and more particularly to a repetitive pulse inductive energy storage and transfer circuit for an electromagnetic launcher. In an electromagnetic launcher such as a railgun for propelling a projectile at high velocity, an overpulse energy recovery circuit is employed to transfer stored inductive energy from a source inductor to the railgun inductance to propel the projectile down the railgun. Switching circuitry and an energy transfer capacitor are used to switch the energy back to the source inductor in readiness for a repetitive projectile propelling cycle.

  9. Coding of Neuroinfectious Diseases.

    PubMed

    Barkley, Gregory L

    2015-12-01

    Accurate coding is an important function of neurologic practice. This contribution to Continuum is part of an ongoing series that presents helpful coding information along with examples related to the issue topic. Tips for diagnosis coding, Evaluation and Management coding, procedure coding, or a combination are presented, depending on which is most applicable to the subject area of the issue. PMID:26633789

  10. Model Children's Code.

    ERIC Educational Resources Information Center

    New Mexico Univ., Albuquerque. American Indian Law Center.

    The Model Children's Code was developed to provide a legally correct model code that American Indian tribes can use to enact children's codes that fulfill their legal, cultural and economic needs. Code sections cover the court system, jurisdiction, juvenile offender procedures, minor-in-need-of-care, and termination. Almost every Code section is…

  11. To Code or Not To Code?

    ERIC Educational Resources Information Center

    Parkinson, Brian; Sandhu, Parveen; Lacorte, Manel; Gourlay, Lesley

    1998-01-01

    This article considers arguments for and against the use of coding systems in classroom-based language research and touches on some relevant considerations from ethnographic and conversational analysis approaches. The four authors each explain and elaborate on their practical decision to code or not to code events or utterances at a specific point…

  12. Principles of Genetic Circuit Design

    PubMed Central

    Brophy, Jennifer A.N.; Voigt, Christopher A.

    2014-01-01

    Cells are able to navigate environments, communicate, and build complex patterns by initiating gene expression in response to specific signals. Engineers need to harness this capability to program cells to perform tasks or build chemicals and materials that match the complexity seen in nature. This review describes new tools that aid the construction of genetic circuits. We show how circuit dynamics can be influenced by the choice of regulators and changed with expression “tuning knobs.” We collate the failure modes encountered when assembling circuits, quantify their impact on performance, and review mitigation efforts. Finally, we discuss the constraints that arise from operating within a living cell. Collectively, better tools, well-characterized parts, and a comprehensive understanding of how to compose circuits are leading to a breakthrough in the ability to program living cells for advanced applications, from living therapeutics to the atomic manufacturing of functional materials. PMID:24781324

  13. Focal plane infrared readout circuit

    NASA Technical Reports Server (NTRS)

    Pain, Bedabrata (Inventor)

    2002-01-01

    An infrared imager, such as a spectrometer, includes multiple infrared photodetectors and readout circuits for reading out signals from the photodetectors. Each readout circuit includes a buffered direct injection input circuit including a differential amplifier with active feedback provided through an injection transistor. The differential amplifier includes a pair of input transistors, a pair of cascode transistors and a current mirror load. Photocurrent from a photodetector can be injected onto an integration capacitor in the readout circuit with high injection efficiency at high speed. A high speed, low noise, wide dynamic range linear infrared multiplexer array for reading out infrared detectors with large capacitances can be achieved even when short exposure times are used. The effect of image lag can be reduced.

  14. Student Conceptions of Simple Circuits.

    ERIC Educational Resources Information Center

    Fredette, Norman; Lochhead, John

    1980-01-01

    Investigates some conceptual difficulties which college students have with regard to simple direct current circuits. The clinical interview technique was used with 57 students in a freshman level engineering course. (HM)

  15. CADAT integrated circuit mask analysis

    NASA Technical Reports Server (NTRS)

    1981-01-01

    CADAT System Mask Analysis Program (MAPS2) is automated software tool for analyzing integrated-circuit mask design. Included in MAPS2 functions are artwork verification, device identification, nodal analysis, capacitance calculation, and logic equation generation.

  16. Reverse engineering of integrated circuits

    DOEpatents

    Chisholm, Gregory H.; Eckmann, Steven T.; Lain, Christopher M.; Veroff, Robert L.

    2003-01-01

    Software and a method therein to analyze circuits. The software comprises several tools, each of which perform particular functions in the Reverse Engineering process. The analyst, through a standard interface, directs each tool to the portion of the task to which it is most well suited, rendering previously intractable problems solvable. The tools are generally used iteratively to produce a successively more abstract picture of a circuit, about which incomplete a priori knowledge exists.

  17. Bare Code Reader

    NASA Astrophysics Data System (ADS)

    Clair, Jean J.

    1980-05-01

    The Bare code system will be used, in every market and supermarket. The code, which is normalised in US and Europe (code EAN) gives informations on price, storage, nature and allows in real time the gestion of theshop.

  18. Fault-Tolerant Coding for State Machines

    NASA Technical Reports Server (NTRS)

    Naegle, Stephanie Taft; Burke, Gary; Newell, Michael

    2008-01-01

    Two reliable fault-tolerant coding schemes have been proposed for state machines that are used in field-programmable gate arrays and application-specific integrated circuits to implement sequential logic functions. The schemes apply to strings of bits in state registers, which are typically implemented in practice as assemblies of flip-flop circuits. If a single-event upset (SEU, a radiation-induced change in the bit in one flip-flop) occurs in a state register, the state machine that contains the register could go into an erroneous state or could hang, by which is meant that the machine could remain in undefined states indefinitely. The proposed fault-tolerant coding schemes are intended to prevent the state machine from going into an erroneous or hang state when an SEU occurs. To ensure reliability of the state machine, the coding scheme for bits in the state register must satisfy the following criteria: 1. All possible states are defined. 2. An SEU brings the state machine to a known state. 3. There is no possibility of a hang state. 4. No false state is entered. 5. An SEU exerts no effect on the state machine. Fault-tolerant coding schemes that have been commonly used include binary encoding and "one-hot" encoding. Binary encoding is the simplest state machine encoding and satisfies criteria 1 through 3 if all possible states are defined. Binary encoding is a binary count of the state machine number in sequence; the table represents an eight-state example. In one-hot encoding, N bits are used to represent N states: All except one of the bits in a string are 0, and the position of the 1 in the string represents the state. With proper circuit design, one-hot encoding can satisfy criteria 1 through 4. Unfortunately, the requirement to use N bits to represent N states makes one-hot coding inefficient.

  19. Receiver Gain Modulation Circuit

    NASA Technical Reports Server (NTRS)

    Jones, Hollis; Racette, Paul; Walker, David; Gu, Dazhen

    2011-01-01

    A receiver gain modulation circuit (RGMC) was developed that modulates the power gain of the output of a radiometer receiver with a test signal. As the radiometer receiver switches between calibration noise references, the test signal is mixed with the calibrated noise and thus produces an ensemble set of measurements from which ensemble statistical analysis can be used to extract statistical information about the test signal. The RGMC is an enabling technology of the ensemble detector. As a key component for achieving ensemble detection and analysis, the RGMC has broad aeronautical and space applications. The RGMC can be used to test and develop new calibration algorithms, for example, to detect gain anomalies, and/or correct for slow drifts that affect climate-quality measurements over an accelerated time scale. A generalized approach to analyzing radiometer system designs yields a mathematical treatment of noise reference measurements in calibration algorithms. By treating the measurements from the different noise references as ensemble samples of the receiver state, i.e. receiver gain, a quantitative description of the non-stationary properties of the underlying receiver fluctuations can be derived. Excellent agreement has been obtained between model calculations and radiometric measurements. The mathematical formulation is equivalent to modulating the gain of a stable receiver with an externally generated signal and is the basis for ensemble detection and analysis (EDA). The concept of generating ensemble data sets using an ensemble detector is similar to the ensemble data sets generated as part of ensemble empirical mode decomposition (EEMD) with exception of a key distinguishing factor. EEMD adds noise to the signal under study whereas EDA mixes the signal with calibrated noise. It is mixing with calibrated noise that permits the measurement of temporal-functional variability of uncertainty in the underlying process. The RGMC permits the evaluation of EDA by

  20. Multi-Layer E-Textile Circuits

    NASA Technical Reports Server (NTRS)

    Dunne, Lucy E.; Bibeau, Kaila; Mulligan, Lucie; Frith, Ashton; Simon, Cory

    2012-01-01

    Stitched e-textile circuits facilitate wearable, flexible, comfortable wearable technology. However, while stitched methods of e-textile circuits are common, multi-layer circuit creation remains a challenge. Here, we present methods of stitched multi-layer circuit creation using accessible tools and techniques.

  1. Bypassing An Open-Circuit Power Cell

    NASA Technical Reports Server (NTRS)

    Wannemacher, Harry E.

    1994-01-01

    Collection of bypass circuits enables battery consisting series string of cells to continue to function when one of its cells fails in open-circuit (high-resistance) condition. Basic idea simply to shunt current around defective cell to prevent open circuit from turning off battery altogether. Bypass circuits dissipate little power and are nearly immune to false activation.

  2. Tunable circuit for tunable capacitor devices

    DOEpatents

    Rivkina, Tatiana; Ginley, David S.

    2006-09-19

    A tunable circuit (10) for a capacitively tunable capacitor device (12) is provided. The tunable circuit (10) comprises a tunable circuit element (14) and a non-tunable dielectric element (16) coupled to the tunable circuit element (16). A tunable capacitor device (12) and a method for increasing the figure of merit in a tunable capacitor device (12) are also provided.

  3. 46 CFR 169.670 - Circuit breakers.

    Code of Federal Regulations, 2014 CFR

    2014-10-01

    ... 46 Shipping 7 2014-10-01 2014-10-01 false Circuit breakers. 169.670 Section 169.670 Shipping COAST... Gross Tons § 169.670 Circuit breakers. Each circuit breaker must be of the manually reset type designed for— (a) Inverse time delay; (b) Instantaneous short circuit protection; and (c) Repeated opening...

  4. 30 CFR 56.6403 - Branch circuits.

    Code of Federal Regulations, 2010 CFR

    2010-07-01

    ... 30 Mineral Resources 1 2010-07-01 2010-07-01 false Branch circuits. 56.6403 Section 56.6403... Blasting § 56.6403 Branch circuits. (a) If electric blasting includes the use of branch circuits, each branch shall be equipped with a safety switch or equivalent method to isolate the circuits to be used....

  5. 30 CFR 56.6403 - Branch circuits.

    Code of Federal Regulations, 2012 CFR

    2012-07-01

    ... 30 Mineral Resources 1 2012-07-01 2012-07-01 false Branch circuits. 56.6403 Section 56.6403... Blasting § 56.6403 Branch circuits. (a) If electric blasting includes the use of branch circuits, each branch shall be equipped with a safety switch or equivalent method to isolate the circuits to be used....

  6. 46 CFR 169.670 - Circuit breakers.

    Code of Federal Regulations, 2012 CFR

    2012-10-01

    ... 46 Shipping 7 2012-10-01 2012-10-01 false Circuit breakers. 169.670 Section 169.670 Shipping COAST... Gross Tons § 169.670 Circuit breakers. Each circuit breaker must be of the manually reset type designed for— (a) Inverse time delay; (b) Instantaneous short circuit protection; and (c) Repeated opening...

  7. 30 CFR 56.6403 - Branch circuits.

    Code of Federal Regulations, 2014 CFR

    2014-07-01

    ... 30 Mineral Resources 1 2014-07-01 2014-07-01 false Branch circuits. 56.6403 Section 56.6403... Blasting § 56.6403 Branch circuits. (a) If electric blasting includes the use of branch circuits, each branch shall be equipped with a safety switch or equivalent method to isolate the circuits to be used....

  8. 46 CFR 169.670 - Circuit breakers.

    Code of Federal Regulations, 2013 CFR

    2013-10-01

    ... 46 Shipping 7 2013-10-01 2013-10-01 false Circuit breakers. 169.670 Section 169.670 Shipping COAST... Gross Tons § 169.670 Circuit breakers. Each circuit breaker must be of the manually reset type designed for— (a) Inverse time delay; (b) Instantaneous short circuit protection; and (c) Repeated opening...

  9. Difference-Equation/Flow-Graph Circuit Analysis

    NASA Technical Reports Server (NTRS)

    Mcvey, I. M.

    1988-01-01

    Numerical technique enables rapid, approximate analyses of electronic circuits containing linear and nonlinear elements. Practiced in variety of computer languages on large and small computers; for circuits simple enough, programmable hand calculators used. Although some combinations of circuit elements make numerical solutions diverge, enables quick identification of divergence and correction of circuit models to make solutions converge.

  10. 46 CFR 169.670 - Circuit breakers.

    Code of Federal Regulations, 2011 CFR

    2011-10-01

    ... 46 Shipping 7 2011-10-01 2011-10-01 false Circuit breakers. 169.670 Section 169.670 Shipping COAST... Gross Tons § 169.670 Circuit breakers. Each circuit breaker must be of the manually reset type designed for— (a) Inverse time delay; (b) Instantaneous short circuit protection; and (c) Repeated opening...

  11. 30 CFR 56.6403 - Branch circuits.

    Code of Federal Regulations, 2011 CFR

    2011-07-01

    ... 30 Mineral Resources 1 2011-07-01 2011-07-01 false Branch circuits. 56.6403 Section 56.6403... Blasting § 56.6403 Branch circuits. (a) If electric blasting includes the use of branch circuits, each branch shall be equipped with a safety switch or equivalent method to isolate the circuits to be used....

  12. Accumulate repeat accumulate codes

    NASA Technical Reports Server (NTRS)

    Abbasfar, Aliazam; Divsalar, Dariush; Yao, Kung

    2004-01-01

    In this paper we propose an innovative channel coding scheme called 'Accumulate Repeat Accumulate codes' (ARA). This class of codes can be viewed as serial turbo-like codes, or as a subclass of Low Density Parity Check (LDPC) codes, thus belief propagation can be used for iterative decoding of ARA codes on a graph. The structure of encoder for this class can be viewed as precoded Repeat Accumulate (RA) code or as precoded Irregular Repeat Accumulate (IRA) code, where simply an accumulator is chosen as a precoder. Thus ARA codes have simple, and very fast encoder structure when they representing LDPC codes. Based on density evolution for LDPC codes through some examples for ARA codes, we show that for maximum variable node degree 5 a minimum bit SNR as low as 0.08 dB from channel capacity for rate 1/2 can be achieved as the block size goes to infinity. Thus based on fixed low maximum variable node degree, its threshold outperforms not only the RA and IRA codes but also the best known LDPC codes with the dame maximum node degree. Furthermore by puncturing the accumulators any desired high rate codes close to code rate 1 can be obtained with thresholds that stay close to the channel capacity thresholds uniformly. Iterative decoding simulation results are provided. The ARA codes also have projected graph or protograph representation that allows for high speed decoder implementation.

  13. Study of Novel Slow Wave Circuit for Miniaturized Millimeter Wave Helical Traveling Wave Tube

    NASA Astrophysics Data System (ADS)

    Li, Bin; Zhu, Xiaofang; Liao, Li; Yang, Zhonghai; Zeng, Baoqing; Yao, Lieming

    2006-07-01

    Two kinds of novel helical slow wave circuit, supported by Chemical Vapor Deposition (CVD) diamond, are presented. They are applying in miniaturized millimeter wave helical traveling wave tube. Cold test characteristic of these circuits are simulated by MAFIA code. Higher performances are achieved with smaller size, compared with conventional circuit supported by BeO rods. The nonlinear analysis is implemented by Beam and Wave Interaction (BWI) module, which is a part of TWTCAD Integrated Framework. Results have been found to be consistent with the expectation. It should be wider apply in microwave and millimeter wave vacuum electronic devices.

  14. Full circuit calculation for electromagnetic pulse transmission in a high current facility

    NASA Astrophysics Data System (ADS)

    Zou, Wenkang; Guo, Fan; Chen, Lin; Song, Shengyi; Wang, Meng; Xie, Weiping; Deng, Jianjun

    2014-11-01

    We describe herein for the first time a full circuit model for electromagnetic pulse transmission in the Primary Test Stand (PTS)—the first TW class pulsed power driver in China. The PTS is designed to generate 8-10 MA current into a z -pinch load in nearly 90 ns rise time for inertial confinement fusion and other high energy density physics research. The PTS facility has four conical magnetic insulation transmission lines, in which electron current loss exists during the establishment of magnetic insulation. At the same time, equivalent resistance of switches and equivalent inductance of pinch changes with time. However, none of these models are included in a commercially developed circuit code so far. Therefore, in order to characterize the electromagnetic transmission process in the PTS, a full circuit model, in which switch resistance, magnetic insulation transmission line current loss and a time-dependent load can be taken into account, was developed. Circuit topology and an equivalent circuit model of the facility were introduced. Pulse transmission calculation of shot 0057 was demonstrated with the corresponding code FAST (full-circuit analysis and simulation tool) by setting controllable parameters the same as in the experiment. Preliminary full circuit simulation results for electromagnetic pulse transmission to the load are presented. Although divergences exist between calculated and experimentally obtained waveforms before the vacuum section, consistency with load current is satisfactory, especially at the rising edge.

  15. Architecture and algorithm of a circuit simulator

    NASA Astrophysics Data System (ADS)

    Marranghello, Norian; Damiani, Furio

    1990-11-01

    Software-based circuit simulators had a ten-fold speed improvement in the last 15 years. Despite this they are not fast enough to cost- effectively deal with current VLSI circuits. In this paper we describe the current status of the ABACUS circuit simulator project, which takes advantage of both a dedicated hardware to speed up circuit simulation and a new methodology, where each parallel processor behaves like a circuit element.

  16. Discussion on LDPC Codes and Uplink Coding

    NASA Technical Reports Server (NTRS)

    Andrews, Ken; Divsalar, Dariush; Dolinar, Sam; Moision, Bruce; Hamkins, Jon; Pollara, Fabrizio

    2007-01-01

    This slide presentation reviews the progress that the workgroup on Low-Density Parity-Check (LDPC) for space link coding. The workgroup is tasked with developing and recommending new error correcting codes for near-Earth, Lunar, and deep space applications. Included in the presentation is a summary of the technical progress of the workgroup. Charts that show the LDPC decoder sensitivity to symbol scaling errors are reviewed, as well as a chart showing the performance of several frame synchronizer algorithms compared to that of some good codes and LDPC decoder tests at ESTL. Also reviewed is a study on Coding, Modulation, and Link Protocol (CMLP), and the recommended codes. A design for the Pseudo-Randomizer with LDPC Decoder and CRC is also reviewed. A chart that summarizes the three proposed coding systems is also presented.

  17. Digital first order hold circuit

    NASA Technical Reports Server (NTRS)

    Chan, Fred N. (Inventor); Wensley, Gerald J. (Inventor)

    1989-01-01

    There is provided a digitally controlled first order hold circuit and waveform synthesizer for digitally controlling the representation of a function over an approximation interval. In accordance with the operation of the invention, the first order hold circuit and waveform generator receives a digital data input signal which contains initial condition data, up/down data, and slope data for the approximation interval. The initial condition data is loaded into an up/down counter which is incremented using counting data at a rate depending on the value of the slope data and in a direction depending on the value of the up-down data. In order to minimize delays arising from data acquistion, two frequency synthesizer circuits are provided such that one frequency synthesizer provides counting data while the other frequency synthesizer receives slope data. During alternating intervals, the other frequency synthesizer circuit provides counting data while the other circuit receives slope data. In addition, long length data input signals covering a plurality of approximation intervals are provided to reduce the demands on a main system central processing unit.

  18. Neurotrophins and spinal circuit function

    PubMed Central

    Boyce, Vanessa S.; Mendell, Lorne M.

    2014-01-01

    Work early in the last century emphasized the stereotyped activity of spinal circuits based on studies of reflexes. However, the last several decades have focused on the plasticity of these spinal circuits. These considerations began with studies of the effects of monoamines on descending and reflex circuits. In recent years new classes of compounds called growth factors that are found in peripheral nerves and the spinal cord have been shown to affect circuit behavior in the spinal cord. In this review we will focus on the effects of neurotrophins, particularly nerve growth factor (NGF), brain derived neurotrophic factor (BDNF) and neurotrophin-3 (NT-3), on spinal circuits. We also discuss evidence that these molecules can modify functions including nociceptive behavior, motor reflexes and stepping behavior. Since these substances and their receptors are normally present in the spinal cord, they could potentially be useful in improving function in disease states and after injury. Here we review recent findings relevant to these translational issues. PMID:24926235

  19. Introduction to lethal circuit transformations

    NASA Astrophysics Data System (ADS)

    Fišer, Petr; Schmidt, Jan

    2015-12-01

    Logic optimization is a process that takes a logic circuit description (Boolean network) as an input and tries to refine it, to reduce its size and/or depth. An ideal optimization process should be able to devise an optimum implementation of a network in a reasonable time, given any circuit structure at the input. However, there are cases where it completely fails to produce even near-optimum solutions. Such cases are typically induced by non-standard circuit structure modifications. Surprisingly enough, such deviated structures are frequently present in standard benchmark sets too. We may only wonder whether it is an intention of the benchmarks creators, or just an unlucky coincidence. Even though synthesis tools should be primarily well suited for practical circuits, there is no guarantee that, e.g., a higher-level synthesis process will not generate such unlucky structures. Here we present examples of circuit transformations that lead to failure of most of state-of-the-art logic synthesis and optimization processes, both academic and commercial, and suggest actions to mitigate the disturbing effects.

  20. Bioluminescent bioreporter integrated circuits (BBICs)

    NASA Astrophysics Data System (ADS)

    Simpson, Michael L.; Sayler, Gary S.; Nivens, David; Ripp, Steve; Paulus, Michael J.; Jellison, Gerald E.

    1998-07-01

    As the workhorse of the integrated circuit (IC) industry, the capabilities of CMOS have been expanded well beyond the original applications. The full spectrum of analog circuits from switched-capacitor filters to microwave circuit blocks, and from general-purpose operational amplifiers to sub- nanosecond analog timing circuits for nuclear physics experiments have been implemented in CMOS. This technology has also made in-roads into the growing area of monolithic sensors with devices such as active-pixel sensors and other electro-optical detection devices. While many of the processes used for MEMS fabrication are not compatible with the CMOS IC process, depositing a sensor material onto a previously fabricated CMOS circuit can create a very useful category of sensors. In this work we report a chemical sensor composed of bioluminescent bioreporters (genetically engineered bacteria) deposited onto a micro-luminometer fabricated in a standard CMOS IC process. The bioreporter used for this work emitted 490-nm light when exposed to toluene. This luminescence was detected by the micro- luminometer giving an indication of the concentration of toluene. Other bioluminescent bioreporters sensitive to explosives, mercury, and other organic chemicals and heavy metals have been reported. These could be incorporated (individually or in combination) with the micro-luminometer reported here to form a variety of chemical sensors.

  1. Manually operated coded switch

    DOEpatents

    Barnette, Jon H.

    1978-01-01

    The disclosure relates to a manually operated recodable coded switch in which a code may be inserted, tried and used to actuate a lever controlling an external device. After attempting a code, the switch's code wheels must be returned to their zero positions before another try is made.

  2. 30 CFR 75.800 - High-voltage circuits; circuit breakers.

    Code of Federal Regulations, 2010 CFR

    2010-07-01

    ... 30 Mineral Resources 1 2010-07-01 2010-07-01 false High-voltage circuits; circuit breakers. 75.800... SAFETY AND HEALTH MANDATORY SAFETY STANDARDS-UNDERGROUND COAL MINES Underground High-Voltage Distribution § 75.800 High-voltage circuits; circuit breakers. High-voltage circuits entering the underground...

  3. 30 CFR 77.800 - High-voltage circuits; circuit breakers.

    Code of Federal Regulations, 2010 CFR

    2010-07-01

    ... 30 Mineral Resources 1 2010-07-01 2010-07-01 false High-voltage circuits; circuit breakers. 77.800... COAL MINES Surface High-Voltage Distribution § 77.800 High-voltage circuits; circuit breakers. High-voltage circuits supplying power to portable or mobile equipment shall be protected by suitable...

  4. 30 CFR 77.800 - High-voltage circuits; circuit breakers.

    Code of Federal Regulations, 2012 CFR

    2012-07-01

    ... 30 Mineral Resources 1 2012-07-01 2012-07-01 false High-voltage circuits; circuit breakers. 77.800... COAL MINES Surface High-Voltage Distribution § 77.800 High-voltage circuits; circuit breakers. High-voltage circuits supplying power to portable or mobile equipment shall be protected by suitable...

  5. 30 CFR 77.800 - High-voltage circuits; circuit breakers.

    Code of Federal Regulations, 2014 CFR

    2014-07-01

    ... 30 Mineral Resources 1 2014-07-01 2014-07-01 false High-voltage circuits; circuit breakers. 77.800... COAL MINES Surface High-Voltage Distribution § 77.800 High-voltage circuits; circuit breakers. High-voltage circuits supplying power to portable or mobile equipment shall be protected by suitable...

  6. 49 CFR 236.5 - Design of control circuits on closed circuit principle.

    Code of Federal Regulations, 2012 CFR

    2012-10-01

    ... 49 Transportation 4 2012-10-01 2012-10-01 false Design of control circuits on closed circuit..., AND APPLIANCES Rules and Instructions: All Systems General § 236.5 Design of control circuits on closed circuit principle. All control circuits the functioning of which affects safety of train...

  7. 49 CFR 236.5 - Design of control circuits on closed circuit principle.

    Code of Federal Regulations, 2014 CFR

    2014-10-01

    ... 49 Transportation 4 2014-10-01 2014-10-01 false Design of control circuits on closed circuit..., AND APPLIANCES Rules and Instructions: All Systems General § 236.5 Design of control circuits on closed circuit principle. All control circuits the functioning of which affects safety of train...

  8. 30 CFR 77.506 - Electric equipment and circuits; overload and short-circuit protection.

    Code of Federal Regulations, 2010 CFR

    2010-07-01

    ... 30 Mineral Resources 1 2010-07-01 2010-07-01 false Electric equipment and circuits; overload and short-circuit protection. 77.506 Section 77.506 Mineral Resources MINE SAFETY AND HEALTH ADMINISTRATION... circuits; overload and short-circuit protection. Automatic circuit-breaking devices or fuses of the...

  9. 30 CFR 77.506 - Electric equipment and circuits; overload and short-circuit protection.

    Code of Federal Regulations, 2012 CFR

    2012-07-01

    ... 30 Mineral Resources 1 2012-07-01 2012-07-01 false Electric equipment and circuits; overload and short-circuit protection. 77.506 Section 77.506 Mineral Resources MINE SAFETY AND HEALTH ADMINISTRATION... circuits; overload and short-circuit protection. Automatic circuit-breaking devices or fuses of the...

  10. 49 CFR 236.5 - Design of control circuits on closed circuit principle.

    Code of Federal Regulations, 2010 CFR

    2010-10-01

    ... 49 Transportation 4 2010-10-01 2010-10-01 false Design of control circuits on closed circuit..., AND APPLIANCES Rules and Instructions: All Systems General § 236.5 Design of control circuits on closed circuit principle. All control circuits the functioning of which affects safety of train...

  11. 30 CFR 77.506 - Electric equipment and circuits; overload and short-circuit protection.

    Code of Federal Regulations, 2014 CFR

    2014-07-01

    ... 30 Mineral Resources 1 2014-07-01 2014-07-01 false Electric equipment and circuits; overload and short-circuit protection. 77.506 Section 77.506 Mineral Resources MINE SAFETY AND HEALTH ADMINISTRATION... circuits; overload and short-circuit protection. Automatic circuit-breaking devices or fuses of the...

  12. 30 CFR 75.518 - Electric equipment and circuits; overload and short circuit protection.

    Code of Federal Regulations, 2013 CFR

    2013-07-01

    ... Equipment-General § 75.518 Electric equipment and circuits; overload and short circuit protection. Automatic... electric equipment and circuits against short circuit and overloads. Three-phase motors on all electric... 30 Mineral Resources 1 2013-07-01 2013-07-01 false Electric equipment and circuits; overload...

  13. 30 CFR 77.800 - High-voltage circuits; circuit breakers.

    Code of Federal Regulations, 2013 CFR

    2013-07-01

    ... 30 Mineral Resources 1 2013-07-01 2013-07-01 false High-voltage circuits; circuit breakers. 77.800... COAL MINES Surface High-Voltage Distribution § 77.800 High-voltage circuits; circuit breakers. High... devices to provide protection against under voltage, grounded phase, short circuit and overcurrent....

  14. 30 CFR 75.800 - High-voltage circuits; circuit breakers.

    Code of Federal Regulations, 2013 CFR

    2013-07-01

    ... 30 Mineral Resources 1 2013-07-01 2013-07-01 false High-voltage circuits; circuit breakers. 75.800... SAFETY AND HEALTH MANDATORY SAFETY STANDARDS-UNDERGROUND COAL MINES Underground High-Voltage Distribution § 75.800 High-voltage circuits; circuit breakers. High-voltage circuits entering the underground...

  15. 30 CFR 77.800 - High-voltage circuits; circuit breakers.

    Code of Federal Regulations, 2011 CFR

    2011-07-01

    ... 30 Mineral Resources 1 2011-07-01 2011-07-01 false High-voltage circuits; circuit breakers. 77.800... COAL MINES Surface High-Voltage Distribution § 77.800 High-voltage circuits; circuit breakers. High-voltage circuits supplying power to portable or mobile equipment shall be protected by suitable...

  16. 49 CFR 236.5 - Design of control circuits on closed circuit principle.

    Code of Federal Regulations, 2011 CFR

    2011-10-01

    ... 49 Transportation 4 2011-10-01 2011-10-01 false Design of control circuits on closed circuit..., AND APPLIANCES Rules and Instructions: All Systems General § 236.5 Design of control circuits on closed circuit principle. All control circuits the functioning of which affects safety of train...

  17. 30 CFR 77.506 - Electric equipment and circuits; overload and short-circuit protection.

    Code of Federal Regulations, 2011 CFR

    2011-07-01

    ... 30 Mineral Resources 1 2011-07-01 2011-07-01 false Electric equipment and circuits; overload and short-circuit protection. 77.506 Section 77.506 Mineral Resources MINE SAFETY AND HEALTH ADMINISTRATION... circuits; overload and short-circuit protection. Automatic circuit-breaking devices or fuses of the...

  18. Parafermion stabilizer codes

    NASA Astrophysics Data System (ADS)

    Güngördü, Utkan; Nepal, Rabindra; Kovalev, Alexey A.

    2014-10-01

    We define and study parafermion stabilizer codes, which can be viewed as generalizations of Kitaev's one-dimensional (1D) model of unpaired Majorana fermions. Parafermion stabilizer codes can protect against low-weight errors acting on a small subset of parafermion modes in analogy to qudit stabilizer codes. Examples of several smallest parafermion stabilizer codes are given. A locality-preserving embedding of qudit operators into parafermion operators is established that allows one to map known qudit stabilizer codes to parafermion codes. We also present a local 2D parafermion construction that combines topological protection of Kitaev's toric code with additional protection relying on parity conservation.

  19. Experimental quantum coding against qubit loss error.

    PubMed

    Lu, Chao-Yang; Gao, Wei-Bo; Zhang, Jin; Zhou, Xiao-Qi; Yang, Tao; Pan, Jian-Wei

    2008-08-12

    The fundamental unit for quantum computing is the qubit, an isolated, controllable two-level system. However, for many proposed quantum computer architectures, especially photonic systems, the qubits can be lost or can leak out of the desired two-level systems, posing a significant obstacle for practical quantum computation. Here, we experimentally demonstrate, both in the quantum circuit model and in the one-way quantum computer model, the smallest nontrivial quantum codes to tackle this problem. In the experiment, we encode single-qubit input states into highly entangled multiparticle code words, and we test their ability to protect encoded quantum information from detected 1-qubit loss error. Our results prove in-principle the feasibility of overcoming the qubit loss error by quantum codes.

  20. ARA type protograph codes

    NASA Technical Reports Server (NTRS)

    Divsalar, Dariush (Inventor); Abbasfar, Aliazam (Inventor); Jones, Christopher R. (Inventor); Dolinar, Samuel J. (Inventor); Thorpe, Jeremy C. (Inventor); Andrews, Kenneth S. (Inventor); Yao, Kung (Inventor)

    2008-01-01

    An apparatus and method for encoding low-density parity check codes. Together with a repeater, an interleaver and an accumulator, the apparatus comprises a precoder, thus forming accumulate-repeat-accumulate (ARA codes). Protographs representing various types of ARA codes, including AR3A, AR4A and ARJA codes, are described. High performance is obtained when compared to the performance of current repeat-accumulate (RA) or irregular-repeat-accumulate (IRA) codes.

  1. QR Codes 101

    ERIC Educational Resources Information Center

    Crompton, Helen; LaFrance, Jason; van 't Hooft, Mark

    2012-01-01

    A QR (quick-response) code is a two-dimensional scannable code, similar in function to a traditional bar code that one might find on a product at the supermarket. The main difference between the two is that, while a traditional bar code can hold a maximum of only 20 digits, a QR code can hold up to 7,089 characters, so it can contain much more…

  2. Design automation for integrated circuits

    NASA Astrophysics Data System (ADS)

    Newell, S. B.; de Geus, A. J.; Rohrer, R. A.

    1983-04-01

    Consideration is given to the development status of the use of computers in automated integrated circuit design methods, which promise the minimization of both design time and design error incidence. Integrated circuit design encompasses two major tasks: error specification, in which the goal is a logic diagram that accurately represents the desired electronic function, and physical specification, in which the goal is an exact description of the physical locations of all circuit elements and their interconnections on the chip. Design automation not only saves money by reducing design and fabrication time, but also helps the community of systems and logic designers to work more innovatively. Attention is given to established design automation methodologies, programmable logic arrays, and design shortcuts.

  3. Vertically Integrated Circuits at Fermilab

    SciTech Connect

    Deptuch, Grzegorz; Demarteau, Marcel; Hoff, James; Lipton, Ronald; Shenai, Alpana; Trimpl, Marcel; Yarema, Raymond; Zimmerman, Tom; /Fermilab

    2009-01-01

    The exploration of the vertically integrated circuits, also commonly known as 3D-IC technology, for applications in radiation detection started at Fermilab in 2006. This paper examines the opportunities that vertical integration offers by looking at various 3D designs that have been completed by Fermilab. The emphasis is on opportunities that are presented by through silicon vias (TSV), wafer and circuit thinning and finally fusion bonding techniques to replace conventional bump bonding. Early work by Fermilab has led to an international consortium for the development of 3D-IC circuits for High Energy Physics. The consortium has submitted over 25 different designs for the Fermilab organized MPW run organized for the first time.

  4. Chua's Circuit: Control and Synchronization

    NASA Astrophysics Data System (ADS)

    Irimiciuc, Stefan-Andrei; Vasilovici, Ovidiu; Dimitriu, Dan-Gheorghe

    Chaos-based data encryption is one of the most reliable methods used in secure communications. This implies a good control of a chaotic system and a good synchronization between the involved systems. Here, experimental results are shown on the control and synchronization of Chua's circuits. The control of the chaotic circuit was achieved by using the switching method. The influence of the control signal characteristics (amplitude, frequency and shape) on the system's states was also investigated. The synchronization of two similar chaotic circuits was studied, emphasizing the importance of the chaotic state characteristics of the Master system in respect to those of Slave system. It was shown that the synchronization does not depend on the chaotic state type, neither on the dimension (x, y or z) used for synchronization.

  5. Additive Manufacturing of Hybrid Circuits

    NASA Astrophysics Data System (ADS)

    Sarobol, Pylin; Cook, Adam; Clem, Paul G.; Keicher, David; Hirschfeld, Deidre; Hall, Aaron C.; Bell, Nelson S.

    2016-07-01

    There is a rising interest in developing functional electronics using additively manufactured components. Considerations in materials selection and pathways to forming hybrid circuits and devices must demonstrate useful electronic function; must enable integration; and must complement the complex shape, low cost, high volume, and high functionality of structural but generally electronically passive additively manufactured components. This article reviews several emerging technologies being used in industry and research/development to provide integration advantages of fabricating multilayer hybrid circuits or devices. First, we review a maskless, noncontact, direct write (DW) technology that excels in the deposition of metallic colloid inks for electrical interconnects. Second, we review a complementary technology, aerosol deposition (AD), which excels in the deposition of metallic and ceramic powder as consolidated, thick conformal coatings and is additionally patternable through masking. Finally, we show examples of hybrid circuits/devices integrated beyond 2-D planes, using combinations of DW or AD processes and conventional, established processes.

  6. Riding the circuit for IRP

    SciTech Connect

    Mashaw, R.

    1996-09-01

    In its original usage, the term {open_quotes}circuit rider{close_quotes} described a minister supported by several congregations, who rode from rural church to rural church spreading religion. Today, thanks to a grant from the Department of Energy, there`s a new kind of circuit rider at work in small communities and rural areas, spreading the gospel of integrated resource planning. The concept of the circuit rider was advanced in 1994 by a coalition of associations, private businesses and government agencies, including the American Public Power Association, the National Rural Electric Cooperative Association, the federal power marketing agencies and the National Renewable Energy Laboratory. The group proposed to DOE the creation of a program for the advancement of integrated resource planning (IRP) in public power, designed to extend the resources and capabilities of publicly and cooperatively owned utilities in IRP by offering a several types of assistance, including training, direct consultation and publications.

  7. Nuclear sensor signal processing circuit

    DOEpatents

    Kallenbach, Gene A.; Noda, Frank T.; Mitchell, Dean J.; Etzkin, Joshua L.

    2007-02-20

    An apparatus and method are disclosed for a compact and temperature-insensitive nuclear sensor that can be calibrated with a non-hazardous radioactive sample. The nuclear sensor includes a gamma ray sensor that generates tail pulses from radioactive samples. An analog conditioning circuit conditions the tail-pulse signals from the gamma ray sensor, and a tail-pulse simulator circuit generates a plurality of simulated tail-pulse signals. A computer system processes the tail pulses from the gamma ray sensor and the simulated tail pulses from the tail-pulse simulator circuit. The nuclear sensor is calibrated under the control of the computer. The offset is adjusted using the simulated tail pulses. Since the offset is set to zero or near zero, the sensor gain can be adjusted with a non-hazardous radioactive source such as, for example, naturally occurring radiation and potassium chloride.

  8. A memristive spiking neuron with firing rate coding

    PubMed Central

    Ignatov, Marina; Ziegler, Martin; Hansen, Mirko; Petraru, Adrian; Kohlstedt, Hermann

    2015-01-01

    Perception, decisions, and sensations are all encoded into trains of action potentials in the brain. The relation between stimulus strength and all-or-nothing spiking of neurons is widely believed to be the basis of this coding. This initiated the development of spiking neuron models; one of today's most powerful conceptual tool for the analysis and emulation of neural dynamics. The success of electronic circuit models and their physical realization within silicon field-effect transistor circuits lead to elegant technical approaches. Recently, the spectrum of electronic devices for neural computing has been extended by memristive devices, mainly used to emulate static synaptic functionality. Their capabilities for emulations of neural activity were recently demonstrated using a memristive neuristor circuit, while a memristive neuron circuit has so far been elusive. Here, a spiking neuron model is experimentally realized in a compact circuit comprising memristive and memcapacitive devices based on the strongly correlated electron material vanadium dioxide (VO2) and on the chemical electromigration cell Ag/TiO2−x/Al. The circuit can emulate dynamical spiking patterns in response to an external stimulus including adaptation, which is at the heart of firing rate coding as first observed by E.D. Adrian in 1926. PMID:26539074

  9. A memristive spiking neuron with firing rate coding.

    PubMed

    Ignatov, Marina; Ziegler, Martin; Hansen, Mirko; Petraru, Adrian; Kohlstedt, Hermann

    2015-01-01

    Perception, decisions, and sensations are all encoded into trains of action potentials in the brain. The relation between stimulus strength and all-or-nothing spiking of neurons is widely believed to be the basis of this coding. This initiated the development of spiking neuron models; one of today's most powerful conceptual tool for the analysis and emulation of neural dynamics. The success of electronic circuit models and their physical realization within silicon field-effect transistor circuits lead to elegant technical approaches. Recently, the spectrum of electronic devices for neural computing has been extended by memristive devices, mainly used to emulate static synaptic functionality. Their capabilities for emulations of neural activity were recently demonstrated using a memristive neuristor circuit, while a memristive neuron circuit has so far been elusive. Here, a spiking neuron model is experimentally realized in a compact circuit comprising memristive and memcapacitive devices based on the strongly correlated electron material vanadium dioxide (VO2) and on the chemical electromigration cell Ag/TiO2-x /Al. The circuit can emulate dynamical spiking patterns in response to an external stimulus including adaptation, which is at the heart of firing rate coding as first observed by E.D. Adrian in 1926. PMID:26539074

  10. Protection circuits for superconducting magnets

    SciTech Connect

    Parsons, W.M.; Wood, R.J.

    1980-01-01

    As the technology of controlled nuclear fusion progresses, plans for new experimental reactors include much longer duty cycles than those of earlier experiments. Many of the magnet systems for these reactors must be superconducting due to the prolonged or continuous high current levels required. The large initial investment of a superconducting magnet system justifies a protective dump circuit. This circuit must operate if the magnet goes normal or in the event of failure of some of the critical auxiliary equipment. This paper examines two applications of superconducting magnet protection for fusion experiments. A novel dc interrupter being developed especially for this purpose is also discussed.

  11. Circuit breaker lock out assembly

    DOEpatents

    Gordy, Wade T.

    1984-01-01

    A lock out assembly for a circuit breaker which consists of a generally step-shaped unitary base with an aperture in the small portion of the step-shaped base and a roughly "S" shaped retaining pin which loops through the large portion of the step-shaped base. The lock out assembly is adapted to fit over a circuit breaker with the handle switch projecting through the aperture, and the retaining pin projecting into an opening of the handle switch, preventing removal.

  12. Electrochemical planarization for microelectronic circuits

    SciTech Connect

    Contolini, R.J.; Mayer, S.T.; Bernhardt, A.F.

    1993-03-25

    The need for flatter and smoother surfaces (planarization) in microelectronic circuits increases as the number of metal levels in ultra large scale integrated (ULSI) circuits increases. At Lawrence Livermore National Laboratory, the authors have developed an electrochemical planarization process that fills vias and trenches with metal (without voids) and subsequently planarizes the surface. Use is made of plasma-enhanced chemical vapor deposition (PECVD) of SiO[sub 2] for the dielectric layers and electroplated copper for the metalization. This report describes the advantages of this process over existing techniques, possibilities for collaboration, and previous technology transfer.

  13. Electrochemical planarization for microelectronic circuits

    NASA Astrophysics Data System (ADS)

    Contolini, R. J.; Mayer, S. T.; Bernhardt, A. F.

    1993-03-01

    The need for flatter and smoother surfaces (planarization) in microelectronic circuits increases as the number of metal levels in ultra large scale integrated (ULSI) circuits increases. At Lawrence Livermore National Laboratory, the authors have developed an electrochemical planarization process that fills vias and trenches with metal (without voids) and subsequently planarizes the surface. Use is made of plasma-enhanced chemical vapor deposition (PECVD) of SiO2 for the dielectric layers and electroplated copper for the metalization. This report describes the advantages of this process over existing techniques, possibilities for collaboration, and previous technology transfer.

  14. Programming languages for circuit design.

    PubMed

    Pedersen, Michael; Yordanov, Boyan

    2015-01-01

    This chapter provides an overview of a programming language for Genetic Engineering of Cells (GEC). A GEC program specifies a genetic circuit at a high level of abstraction through constraints on otherwise unspecified DNA parts. The GEC compiler then selects parts which satisfy the constraints from a given parts database. GEC further provides more conventional programming language constructs for abstraction, e.g., through modularity. The GEC language and compiler is available through a Web tool which also provides functionality, e.g., for simulation of designed circuits.

  15. Pulsed thyristor trigger control circuit

    NASA Technical Reports Server (NTRS)

    Nola, F. J. (Inventor)

    1984-01-01

    A trigger control circuit is provided for producing firing pulses for the thyristor of a thyristor control system such as a power factor controller. The control circuit overcomes thyristor triggering problems involved with the current lag associated with controlling inductive loads and utilizes a phase difference signal, already present in the power factor controller, in deriving a signal for inhibiting generation of a firing pulse until no load current is flowing from the preceding half cycle and thereby ensuring that the thyristor is triggered on during each half cycle.

  16. Improved Classical Simulation of Quantum Circuits Dominated by Clifford Gates.

    PubMed

    Bravyi, Sergey; Gosset, David

    2016-06-24

    We present a new algorithm for classical simulation of quantum circuits over the Clifford+T gate set. The runtime of the algorithm is polynomial in the number of qubits and the number of Clifford gates in the circuit but exponential in the number of T gates. The exponential scaling is sufficiently mild that the algorithm can be used in practice to simulate medium-sized quantum circuits dominated by Clifford gates. The first demonstrations of fault-tolerant quantum circuits based on 2D topological codes are likely to be dominated by Clifford gates due to a high implementation cost associated with logical T gates. Thus our algorithm may serve as a verification tool for near-term quantum computers which cannot in practice be simulated by other means. To demonstrate the power of the new method, we performed a classical simulation of a hidden shift quantum algorithm with 40 qubits, a few hundred Clifford gates, and nearly 50 T gates. PMID:27391708

  17. An Integrated Magnetic Circuit Model and Finite Element Model Approach to Magnetic Bearing Design

    NASA Technical Reports Server (NTRS)

    Provenza, Andrew J.; Kenny, Andrew; Palazzolo, Alan B.

    2003-01-01

    A code for designing magnetic bearings is described. The code generates curves from magnetic circuit equations relating important bearing performance parameters. Bearing parameters selected from the curves by a designer to meet the requirements of a particular application are input directly by the code into a three-dimensional finite element analysis preprocessor. This means that a three-dimensional computer model of the bearing being developed is immediately available for viewing. The finite element model solution can be used to show areas of magnetic saturation and make more accurate predictions of the bearing load capacity, current stiffness, position stiffness, and inductance than the magnetic circuit equations did at the start of the design process. In summary, the code combines one-dimensional and three-dimensional modeling methods for designing magnetic bearings.

  18. Nonbinary Quantum Convolutional Codes Derived from Negacyclic Codes

    NASA Astrophysics Data System (ADS)

    Chen, Jianzhang; Li, Jianping; Yang, Fan; Huang, Yuanyuan

    2015-01-01

    In this paper, some families of nonbinary quantum convolutional codes are constructed by using negacyclic codes. These nonbinary quantum convolutional codes are different from quantum convolutional codes in the literature. Moreover, we construct a family of optimal quantum convolutional codes.

  19. Practical fault tolerance for quantum circuits

    NASA Astrophysics Data System (ADS)

    Whitney, Mark Gregory

    Due to very high projected error rates, large scale quantum computers will require substantial fault tolerance just to maintain a minimum level of reliability. We present tools to better analyze the performance of large, fault tolerant quantum computer designs. We find that current uses of quantum error correction are overly conservative in mitigating the impact of gate errors and negligent of other error sources in quantum data communication and memory. We have developed circuit layout heuristics to generate detailed designs in trapped ion quantum computing technology. From these designs, we can extract much more accurate error models for a given application, including all gate, movement and idle errors on qubits. Using these extracted models, our flexible error simulation environment determines the overall failure probability of the design. Included in this simulation environment is a bit-parallel Monte Carlo technique that is 10 times faster than previous fault propagation simulations. This allows us to evaluate the reliability of designs that are an order of magnitude larger, in the same amount of time. Using this analysis framework to verify reliability, we have developed a linear programming-based optimization for error correction which decreases overall circuit resources by an order of magnitude. In some cases, our optimization actually improves overall system reliability by removing error correction. We combine this optimization with judicious quantum error correcting code selection to provide efficient designs for large quantum arithmetic kernels used in Shor's factorization algorithm. We show our optimized designs perform 2x to 100x better than previous works in terms of probabilistic area-delay product. Additionally, the area of our layout of a 1024-bit factoring using Shor's algorithm is 64cm2, a substantial improvement compared to the 0.9m2 state-of-the-art design from prior work. A design size reduction by this amount will make fabricating such an

  20. Asymmetric quantum convolutional codes

    NASA Astrophysics Data System (ADS)

    La Guardia, Giuliano G.

    2016-01-01

    In this paper, we construct the first families of asymmetric quantum convolutional codes (AQCCs). These new AQCCs are constructed by means of the CSS-type construction applied to suitable families of classical convolutional codes, which are also constructed here. The new codes have non-catastrophic generator matrices, and they have great asymmetry. Since our constructions are performed algebraically, i.e. we develop general algebraic methods and properties to perform the constructions, it is possible to derive several families of such codes and not only codes with specific parameters. Additionally, several different types of such codes are obtained.

  1. Integrated Circuit Stellar Magnitude Simulator

    ERIC Educational Resources Information Center

    Blackburn, James A.

    1978-01-01

    Describes an electronic circuit which can be used to demonstrate the stellar magnitude scale. Six rectangular light-emitting diodes with independently adjustable duty cycles represent stars of magnitudes 1 through 6. Experimentally verifies the logarithmic response of the eye. (Author/GA)

  2. Operational slope-limiting circuit

    NASA Technical Reports Server (NTRS)

    Engel, A.

    1973-01-01

    Circuit limits slope of arbitrary waveform to avoid exceeding rate limit of subsequent amplifier, or to form trapezoidal wave with adjustable rise and fall rates from square wave of arbitrary frequency. Integrator provides delay needed to develop output waveform. DC coupling is used to preserve original dc offset.

  3. Development of CMOS integrated circuits

    NASA Technical Reports Server (NTRS)

    Bertino, F.; Feller, A.; Greenhouse, J.; Lombardi, T.; Merriam, A.; Noto, R.; Ozga, S.; Pryor, R.; Ramondetta, P.; Smith, A.

    1979-01-01

    Report documents life cycles of two custom CMOS integrated circuits: (1) 4-bit multiplexed register with shift left and shift right capabilities, and (2) dual 4-bit registers. Cycles described include conception as logic diagrams through design, fabrication, testing, and delivery.

  4. No-warp potted circuits

    NASA Technical Reports Server (NTRS)

    Robinson, W. W.

    1979-01-01

    Sponge inserts compensate for potting-compound expansion and relieve thermal stresses on circuit boards. Technique quality of production runs on PC boards intended for applications in environments less severe than those for aerospace equipment. Pads reduce weight of modules because they weigh far less than potting compound they displace.

  5. Advanced Imaging of Elementary Circuits

    ERIC Educational Resources Information Center

    Baird, William H.; Richards, Caleb; Godbole, Pranav

    2012-01-01

    Students commonly find the second semester of introductory physics to be more challenging than the first, probably due to the mechanical intuition we acquire just by moving around. For most students, there is no similar comfort with electricity or magnetism. In an effort to combat this confusion, we decided to examine simple electric circuits with…

  6. A Closed Circuit Teaching System.

    ERIC Educational Resources Information Center

    Conkright, William F.; King, Geoffrey E.

    A new method was developed for displaying a wide range of size of specimens and other visual materials in anatomy classes via closed circuit television. The system is contained in two desk units and permits presentation of lecturer, microscopic specimens, microscopic slides, 35mm transparencies, 3 x 4 lantern slides or X-rays, as well as…

  7. MOS integrated circuit fault modeling

    NASA Technical Reports Server (NTRS)

    Sievers, M.

    1985-01-01

    Three digital simulation techniques for MOS integrated circuit faults were examined. These techniques embody a hierarchy of complexity bracketing the range of simulation levels. The digital approaches are: transistor-level, connector-switch-attenuator level, and gate level. The advantages and disadvantages are discussed. Failure characteristics are also described.

  8. A circuit mechanism for neurodegeneration.

    PubMed

    Roselli, Francesco; Caroni, Pico

    2012-10-12

    How deficiency in SMN1 selectively affects motoneurons in spinal muscular atrophy is poorly understood. Here, Imlach et al. and Lotti et al. show that aberrant splicing of Stasimon in cholinergic sensory neurons and interneurons leads to motoneuron degeneration, suggesting that altered circuit function may underlie the disorder.

  9. All-Optical Interrogation of Neural Circuits

    PubMed Central

    2015-01-01

    optical and protein engineering strategies that form the basis of this “all-optical” approach are now sufficiently advanced to enable single-neuron and single-action potential precision for simultaneous readout and manipulation from the same functionally defined neurons in the intact brain. These advances promise to illuminate many fundamental challenges in neuroscience, including transforming our search for the neural code and the links between neural circuit activity and behavior. PMID:26468193

  10. Applications of the dynamic circuit theory to maglev suspension systems

    SciTech Connect

    He, Jian Liang; Rote, D.M.; Coffey, H.T.

    1993-11-01

    This paper discusses the applications of dynamic circuit theory to electrodynamic suspension EDS systems. In particular, the paper focuses on the loop-shaped coil and the figure-eight-shaped null-flux coil suspension systems. Mathematical models, including very general force expressions that can be used for the development of computer codes, are provided for each of these suspension systems. General applications and advantages of the dynamic circuit model are summarized. The paper emphasizes the transient and dynamic analysis and computer simulation of maglev systems. In general, the method discussed here can be applied to many EDS maglev design concepts. It is also suited for the computation of the performance of maglev propulsion systems. Numerical examples are presented in the paper to demonstrate the capability of the model.

  11. Packaging printed circuit boards: A production application of interactive graphics

    NASA Technical Reports Server (NTRS)

    Perrill, W. A.

    1975-01-01

    The structure and use of an Interactive Graphics Packaging Program (IGPP), conceived to apply computer graphics to the design of packaging electronic circuits onto printed circuit boards (PCB), were described. The intent was to combine the data storage and manipulative power of the computer with the imaginative, intuitive power of a human designer. The hardware includes a CDC 6400 computer and two CDC 777 terminals with CRT screens, light pens, and keyboards. The program is written in FORTRAN 4 extended with the exception of a few functions coded in COMPASS (assembly language). The IGPP performs four major functions for the designer: (1) data input and display, (2) component placement (automatic or manual), (3) conductor path routing (automatic or manual), and (4) data output. The most complex PCB packaged to date measured 16.5 cm by 19 cm and contained 380 components, two layers of ground planes and four layers of conductors mixed with ground planes.

  12. Neural representation of time in cortico-basal ganglia circuits

    PubMed Central

    Jin, Dezhe Z.; Fujii, Naotaka; Graybiel, Ann M.

    2009-01-01

    Encoding time is universally required for learning and structuring motor and cognitive actions, but how the brain keeps track of time is still not understood. We searched for time representations in cortico-basal ganglia circuits by recording from thousands of neurons in the prefrontal cortex and striatum of macaque monkeys performing a routine visuomotor task. We found that a subset of neurons exhibited time-stamp encoding strikingly similar to that required by models of reinforcement-based learning: They responded with spike activity peaks that were distributed at different time delays after single task events. Moreover, the temporal evolution of the population activity allowed robust decoding of task time by perceptron models. We suggest that time information can emerge as a byproduct of event coding in cortico-basal ganglia circuits and can serve as a critical infrastructure for behavioral learning and performance. PMID:19850874

  13. View of first bank of circuit towers on Arizona side ...

    Library of Congress Historic Buildings Survey, Historic Engineering Record, Historic Landscapes Survey

    View of first bank of circuit towers on Arizona side of canyon. Left tower supports Circuit 12, second from left tower supports Circuit 11, middle tower supports Circuit 10, second from right tower supports Circuit 9, and right tower supports Circuit 8, view west - Hoover Dam, Circuits 1-15, U.S. Highway 93, Boulder City, Clark County, NV

  14. Leakage Suppression in the Toric Code

    NASA Astrophysics Data System (ADS)

    Suchara, Martin; Cross, Andrew; Gambetta, Jay

    2015-03-01

    Quantum codes excel at correcting local noise but fail to correct leakage faults that excite qubits to states outside the computational space. Aliferis and Terhal have shown that an accuracy threshold exists for leakage faults using gadgets called leakage reduction units (LRUs). However, these gadgets reduce the threshold and increase experimental complexity, and the costs have not been thoroughly understood. We explore a variety of techniques for leakage resilience in topological codes. Our contributions are threefold. First, we develop a leakage model that differs in critical details from earlier models. Second, we use Monte-Carlo simulations to survey several syndrome extraction circuits. Third, given the capability to perform 3-outcome measurements, we present a dramatically improved syndrome processing algorithm. Our simulations show that simple circuits with one extra CNOT per qubit reduce the accuracy threshold by less than a factor of 4 when leakage and depolarizing noise rates are comparable. This becomes a factor of 2 when the decoder uses 3-outcome measurements. Finally, when the physical error rate is less than 2 ×10-4 , placing LRUs after every gate may achieve the lowest logical error rate. We expect that the ideas may generalize to other topological codes.

  15. Cellulases and coding sequences

    DOEpatents

    Li, Xin-Liang; Ljungdahl, Lars G.; Chen, Huizhong

    2001-02-20

    The present invention provides three fungal cellulases, their coding sequences, recombinant DNA molecules comprising the cellulase coding sequences, recombinant host cells and methods for producing same. The present cellulases are from Orpinomyces PC-2.

  16. Cellulases and coding sequences

    DOEpatents

    Li, Xin-Liang; Ljungdahl, Lars G.; Chen, Huizhong

    2001-01-01

    The present invention provides three fungal cellulases, their coding sequences, recombinant DNA molecules comprising the cellulase coding sequences, recombinant host cells and methods for producing same. The present cellulases are from Orpinomyces PC-2.

  17. QR Code Mania!

    ERIC Educational Resources Information Center

    Shumack, Kellie A.; Reilly, Erin; Chamberlain, Nik

    2013-01-01

    space, has error-correction capacity, and can be read from any direction. These codes are used in manufacturing, shipping, and marketing, as well as in education. QR codes can be created to produce…

  18. Fabric circuits and method of manufacturing fabric circuits

    NASA Technical Reports Server (NTRS)

    Chu, Andrew W. (Inventor); Dobbins, Justin A. (Inventor); Scully, Robert C. (Inventor); Trevino, Robert C. (Inventor); Lin, Greg Y. (Inventor); Fink, Patrick W. (Inventor)

    2011-01-01

    A flexible, fabric-based circuit comprises a non-conductive flexible layer of fabric and a conductive flexible layer of fabric adjacent thereto. A non-conductive thread, an adhesive, and/or other means may be used for attaching the conductive layer to the non-conductive layer. In some embodiments, the layers are attached by a computer-driven embroidery machine at pre-determined portions or locations in accordance with a pre-determined attachment layout before automated cutting. In some other embodiments, an automated milling machine or a computer-driven laser using a pre-designed circuit trace as a template cuts the conductive layer so as to separate an undesired portion of the conductive layer from a desired portion of the conductive layer. Additional layers of conductive fabric may be attached in some embodiments to form a multi-layer construct.

  19. Analog Nonvolatile Computer Memory Circuits

    NASA Technical Reports Server (NTRS)

    MacLeod, Todd

    2007-01-01

    In nonvolatile random-access memory (RAM) circuits of a proposed type, digital data would be stored in analog form in ferroelectric field-effect transistors (FFETs). This type of memory circuit would offer advantages over prior volatile and nonvolatile types: In a conventional complementary metal oxide/semiconductor static RAM, six transistors must be used to store one bit, and storage is volatile in that data are lost when power is turned off. In a conventional dynamic RAM, three transistors must be used to store one bit, and the stored bit must be refreshed every few milliseconds. In contrast, in a RAM according to the proposal, data would be retained when power was turned off, each memory cell would contain only two FFETs, and the cell could store multiple bits (the exact number of bits depending on the specific design). Conventional flash memory circuits afford nonvolatile storage, but they operate at reading and writing times of the order of thousands of conventional computer memory reading and writing times and, hence, are suitable for use only as off-line storage devices. In addition, flash memories cease to function after limited numbers of writing cycles. The proposed memory circuits would not be subject to either of these limitations. Prior developmental nonvolatile ferroelectric memories are limited to one bit per cell, whereas, as stated above, the proposed memories would not be so limited. The design of a memory circuit according to the proposal must reflect the fact that FFET storage is only partly nonvolatile, in that the signal stored in an FFET decays gradually over time. (Retention times of some advanced FFETs exceed ten years.) Instead of storing a single bit of data as either a positively or negatively saturated state in a ferroelectric device, each memory cell according to the proposal would store two values. The two FFETs in each cell would be denoted the storage FFET and the control FFET. The storage FFET would store an analog signal value

  20. Auxiliary circuit enables automatic monitoring of EKG'S

    NASA Technical Reports Server (NTRS)

    1965-01-01

    Auxiliary circuits allow direct, automatic monitoring of electrocardiograms by digital computers. One noiseless square-wave output signal for each trigger pulse from an electrocardiogram preamplifier is produced. The circuit also permits automatic processing of cardiovascular data from analog tapes.

  1. Driver circuit for solid state light sources

    DOEpatents

    Palmer, Fred; Denvir, Kerry; Allen, Steven

    2016-02-16

    A driver circuit for a light source including one or more solid state light sources, a luminaire including the same, and a method of so driving the solid state light sources are provided. The driver circuit includes a rectifier circuit that receives an alternating current (AC) input voltage and provides a rectified AC voltage. The driver circuit also includes a switching converter circuit coupled to the light source. The switching converter circuit provides a direct current (DC) output to the light source in response to the rectified AC voltage. The driver circuit also includes a mixing circuit, coupled to the light source, to switch current through at least one solid state light source of the light source in response to each of a plurality of consecutive half-waves of the rectified AC voltage.

  2. 49 CFR 234.203 - Control circuits.

    Code of Federal Regulations, 2013 CFR

    2013-10-01

    ..., DEPARTMENT OF TRANSPORTATION GRADE CROSSING SAFETY, INCLUDING SIGNAL SYSTEMS, STATE ACTION PLANS, AND... circuits. All control circuits that affect the safe operation of a highway-rail grade crossing...

  3. 30 CFR 56.6403 - Branch circuits.

    Code of Federal Regulations, 2013 CFR

    2013-07-01

    ... SAFETY AND HEALTH SAFETY AND HEALTH STANDARDS-SURFACE METAL AND NONMETAL MINES Explosives Electric Blasting § 56.6403 Branch circuits. (a) If electric blasting includes the use of branch circuits,...

  4. Post regulation circuit with energy storage

    DOEpatents

    Ball, Don G.; Birx, Daniel L.; Cook, Edward G.

    1992-01-01

    A charge regulation circuit provides regulation of an unregulated voltage supply and provides energy storage. The charge regulation circuit according to the present invention provides energy storage without unnecessary dissipation of energy through a resistor as in prior art approaches.

  5. EMF wire code research

    SciTech Connect

    Jones, T.

    1993-11-01

    This paper examines the results of previous wire code research to determines the relationship with childhood cancer, wire codes and electromagnetic fields. The paper suggests that, in the original Savitz study, biases toward producing a false positive association between high wire codes and childhood cancer were created by the selection procedure.

  6. Ideal Observer Analysis of Signal Quality in Retinal Circuits

    PubMed Central

    Smith, Robert G.; Dhingra, Narender K.

    2009-01-01

    The function of the retina is crucial, for it must encode visual signals so the brain can detect objects in the visual world. However, the biological mechanisms of the retina add noise to the visual signal and therefore reduce its quality and capacity to inform about the world. Because an organism’s survival depends on its ability to unambiguously detect visual stimuli in the presence of noise, its retinal circuits must have evolved to maximize signal quality, suggesting that each retinal circuit has a specific functional role. Here we explain how an ideal observer can measure signal quality to determine the functional roles of retinal circuits. In a visual discrimination task the ideal observer can measure from a neural response the increment threshold, the number of distinguishable response levels, and the neural code, which are fundamental measures of signal quality relevant to behavior. It can compare the signal quality in stimulus and response to determine the optimal stimulus, and can measure the specific loss of signal quality by a neuron’s receptive field for non-optimal stimuli. Taking into account noise correlations, the ideal observer can track the signal to noise ratio available from one stage to the next, allowing one to determine each stage’s role in preserving signal quality. A comparison between the ideal performance of the photon flux absorbed from the stimulus and actual performance of a retinal ganglion cell shows that in daylight a ganglion cell and its presynaptic circuit loses a factor of ~10-fold in contrast sensitivity, suggesting specific signal-processing roles for synaptic connections and other neural circuit elements. The ideal observer is a powerful tool for characterizing signal processing in single neurons and arrays along a neural pathway. PMID:19446034

  7. Software Certification - Coding, Code, and Coders

    NASA Technical Reports Server (NTRS)

    Havelund, Klaus; Holzmann, Gerard J.

    2011-01-01

    We describe a certification approach for software development that has been adopted at our organization. JPL develops robotic spacecraft for the exploration of the solar system. The flight software that controls these spacecraft is considered to be mission critical. We argue that the goal of a software certification process cannot be the development of "perfect" software, i.e., software that can be formally proven to be correct under all imaginable and unimaginable circumstances. More realistically, the goal is to guarantee a software development process that is conducted by knowledgeable engineers, who follow generally accepted procedures to control known risks, while meeting agreed upon standards of workmanship. We target three specific issues that must be addressed in such a certification procedure: the coding process, the code that is developed, and the skills of the coders. The coding process is driven by standards (e.g., a coding standard) and tools. The code is mechanically checked against the standard with the help of state-of-the-art static source code analyzers. The coders, finally, are certified in on-site training courses that include formal exams.

  8. Nanoelectronic circuit design and test

    NASA Astrophysics Data System (ADS)

    Simsir, Muzaffer Orkun

    Controlling power consumption in CMOS integrated circuits (ICs) during normal mode of operation is becoming one of the limiting factors to further scaling. In addition, it is a well known fact that during testing of a complex IC, power consumption can far exceed the values reached during its normal operation. High power consumption, combined with limited cooling support, leads to overheating of ICs. This can cause permanent damage to the chip or can invalidate test results due to the fact that extreme temperature variations lead to changes in path delays. Therefore, even good chips can fail the test. For these reasons, thermal problems during test need to be identified to prevent the loss of yield in CMOS ICs. In this thesis, we propose a methodology for thermally characterizing circuits under test. Using this methodology, it is possible to simulate the thermal profiles of the chips during test and prevent possible yield loss because of thermal problems. In addition to the problems associated with power and temperature, a more important barrier is the scaling limitations of the CMOS technology. It has been predicted that in next decade, it will not be possible to scale it further. In the near future, rather than a transition to a completely new technology, extensions to CMOS seem to be more realistic. Double-gate CMOS technology is one of the most promising alternatives that offers a simple extension to CMOS. The transistors of this technology are formed by adding a second gate across the conventional CMOS transistor gate. Designing circuits using this technology has attracted a lot of attention. However, as circuit design methods mature, there is a need to identify how these circuits can be tested. From a circuit testing viewpoint, it is unclear if CMOS fault models are comprehensive enough to model all defects in double-gate CMOS circuits. Therefore, fault models of this technology need to be defined to enable manufacturing-time testing. In this thesis, we

  9. LARC-SI Flatwire Twin Conduction Circuits

    NASA Technical Reports Server (NTRS)

    1995-01-01

    Eight 2-line, L-shaped gold flex circuits have been imprinted on 1-mil LARC-SI. Each circuit was embedded in a space-applications trapezoidal truss made of carbon fiber reinforced resin composite (with protruding ends) to facilitate electrical connection of electronic devices mounted on the truss. LARC-SI is an advanced polymer highly suitable for multi layered electrical circuits.

  10. 49 CFR 234.203 - Control circuits.

    Code of Federal Regulations, 2011 CFR

    2011-10-01

    ... 49 Transportation 4 2011-10-01 2011-10-01 false Control circuits. 234.203 Section 234.203 Transportation Other Regulations Relating to Transportation (Continued) FEDERAL RAILROAD ADMINISTRATION..., Inspection, and Testing Maintenance Standards § 234.203 Control circuits. All control circuits that...

  11. 49 CFR 236.721 - Circuit, control.

    Code of Federal Regulations, 2011 CFR

    2011-10-01

    ... 49 Transportation 4 2011-10-01 2011-10-01 false Circuit, control. 236.721 Section 236.721..., MAINTENANCE, AND REPAIR OF SIGNAL AND TRAIN CONTROL SYSTEMS, DEVICES, AND APPLIANCES Definitions § 236.721 Circuit, control. An electrical circuit between a source of electric energy and a device which it operates....

  12. 49 CFR 236.721 - Circuit, control.

    Code of Federal Regulations, 2013 CFR

    2013-10-01

    ... 49 Transportation 4 2013-10-01 2013-10-01 false Circuit, control. 236.721 Section 236.721..., MAINTENANCE, AND REPAIR OF SIGNAL AND TRAIN CONTROL SYSTEMS, DEVICES, AND APPLIANCES Definitions § 236.721 Circuit, control. An electrical circuit between a source of electric energy and a device which it operates....

  13. 30 CFR 56.6407 - Circuit testing.

    Code of Federal Regulations, 2011 CFR

    2011-07-01

    ... 30 Mineral Resources 1 2011-07-01 2011-07-01 false Circuit testing. 56.6407 Section 56.6407... Blasting § 56.6407 Circuit testing. A blasting galvanometer or other instrument designed for testing blasting circuits shall be used to test each of the following: (a) Continuity of each electric detonator...

  14. 30 CFR 57.6407 - Circuit testing.

    Code of Federal Regulations, 2011 CFR

    2011-07-01

    ... 30 Mineral Resources 1 2011-07-01 2011-07-01 false Circuit testing. 57.6407 Section 57.6407... Blasting-Surface and Underground § 57.6407 Circuit testing. A blasting galvanometer or other instrument designed for testing blasting circuits shall be used to test the following: (a) In surface operations—...

  15. 30 CFR 57.6407 - Circuit testing.

    Code of Federal Regulations, 2013 CFR

    2013-07-01

    ... 30 Mineral Resources 1 2013-07-01 2013-07-01 false Circuit testing. 57.6407 Section 57.6407... Blasting-Surface and Underground § 57.6407 Circuit testing. A blasting galvanometer or other instrument designed for testing blasting circuits shall be used to test the following: (a) In surface operations—...

  16. 30 CFR 56.6407 - Circuit testing.

    Code of Federal Regulations, 2013 CFR

    2013-07-01

    ... 30 Mineral Resources 1 2013-07-01 2013-07-01 false Circuit testing. 56.6407 Section 56.6407... Blasting § 56.6407 Circuit testing. A blasting galvanometer or other instrument designed for testing blasting circuits shall be used to test each of the following: (a) Continuity of each electric detonator...

  17. New Logic Circuit with DC Parametric Excitation

    NASA Astrophysics Data System (ADS)

    Sugahara, Masanori; Kaneda, Hisayoshi

    1982-12-01

    It is shown that dc parametric excitation is possible in a circuit named JUDO, which is composed of two resistively-connected Josephson junctions. Simulation study proves that the circuit has large gain and properties suitable for the construction of small, high-speed logic circuits.

  18. 49 CFR 236.721 - Circuit, control.

    Code of Federal Regulations, 2010 CFR

    2010-10-01

    ... 49 Transportation 4 2010-10-01 2010-10-01 false Circuit, control. 236.721 Section 236.721..., MAINTENANCE, AND REPAIR OF SIGNAL AND TRAIN CONTROL SYSTEMS, DEVICES, AND APPLIANCES Definitions § 236.721 Circuit, control. An electrical circuit between a source of electric energy and a device which it operates....

  19. 49 CFR 234.203 - Control circuits.

    Code of Federal Regulations, 2010 CFR

    2010-10-01

    ... 49 Transportation 4 2010-10-01 2010-10-01 false Control circuits. 234.203 Section 234.203 Transportation Other Regulations Relating to Transportation (Continued) FEDERAL RAILROAD ADMINISTRATION..., Inspection, and Testing Maintenance Standards § 234.203 Control circuits. All control circuits that...

  20. Simple photometer circuits using modular electronic components

    NASA Technical Reports Server (NTRS)

    Wampler, J. E.

    1975-01-01

    Operational and peak holding amplifiers are discussed as useful circuits for bioluminescence assays. Circuit diagrams are provided. While analog methods can give a good integration on short time scales, digital methods were found best for long term integration in bioluminescence assays. Power supplies, a general photometer circuit with ratio capability, and variations in the basic photometer design are also considered.

  1. Removing Bonded Integrated Circuits From Boards

    NASA Technical Reports Server (NTRS)

    Rice, John T.

    1989-01-01

    Small resistance heater makes it easier, faster, and cheaper to remove integrated circuit from hybrid-circuit board, package, or other substrate for rework. Heater, located directly in polymeric bond interface or on substrate under integrated-circuit chip, energized when necessary to remove chip. Heat generated softens adhesive or solder that bonds chip to substrate. Chip then lifted easily from substrate.

  2. 49 CFR 236.731 - Controller, circuit.

    Code of Federal Regulations, 2010 CFR

    2010-10-01

    ... 49 Transportation 4 2010-10-01 2010-10-01 false Controller, circuit. 236.731 Section 236.731 Transportation Other Regulations Relating to Transportation (Continued) FEDERAL RAILROAD ADMINISTRATION... Controller, circuit. A device for opening and closing electric circuits....

  3. 49 CFR 236.719 - Circuit, acknowledgment.

    Code of Federal Regulations, 2014 CFR

    2014-10-01

    ... 49 Transportation 4 2014-10-01 2014-10-01 false Circuit, acknowledgment. 236.719 Section 236.719 Transportation Other Regulations Relating to Transportation (Continued) FEDERAL RAILROAD ADMINISTRATION... Circuit, acknowledgment. A circuit consisting of wire or other conducting material installed between...

  4. 30 CFR 57.6403 - Branch circuits.

    Code of Federal Regulations, 2010 CFR

    2010-07-01

    ... 30 Mineral Resources 1 2010-07-01 2010-07-01 false Branch circuits. 57.6403 Section 57.6403... Blasting-Surface and Underground § 57.6403 Branch circuits. (a) If electric blasting includes the use of branch circuits, each branch shall be equipped with a safety switch or equivalent method to isolate...

  5. 49 CFR 234.203 - Control circuits.

    Code of Federal Regulations, 2012 CFR

    2012-10-01

    ... 49 Transportation 4 2012-10-01 2012-10-01 false Control circuits. 234.203 Section 234.203 Transportation Other Regulations Relating to Transportation (Continued) FEDERAL RAILROAD ADMINISTRATION... circuits. All control circuits that affect the safe operation of a highway-rail grade crossing...

  6. 30 CFR 56.6407 - Circuit testing.

    Code of Federal Regulations, 2012 CFR

    2012-07-01

    ... 30 Mineral Resources 1 2012-07-01 2012-07-01 false Circuit testing. 56.6407 Section 56.6407... Blasting § 56.6407 Circuit testing. A blasting galvanometer or other instrument designed for testing blasting circuits shall be used to test each of the following: (a) Continuity of each electric detonator...

  7. 30 CFR 75.1323 - Blasting circuits.

    Code of Federal Regulations, 2010 CFR

    2010-07-01

    ... 30 Mineral Resources 1 2010-07-01 2010-07-01 false Blasting circuits. 75.1323 Section 75.1323... MANDATORY SAFETY STANDARDS-UNDERGROUND COAL MINES Explosives and Blasting § 75.1323 Blasting circuits. (a) Blasting circuits shall be protected from sources of stray electric current. (b) Detonators made...

  8. 49 CFR 234.203 - Control circuits.

    Code of Federal Regulations, 2014 CFR

    2014-10-01

    ... 49 Transportation 4 2014-10-01 2014-10-01 false Control circuits. 234.203 Section 234.203 Transportation Other Regulations Relating to Transportation (Continued) FEDERAL RAILROAD ADMINISTRATION... circuits. All control circuits that affect the safe operation of a highway-rail grade crossing...

  9. 49 CFR 236.726 - Circuit, track.

    Code of Federal Regulations, 2010 CFR

    2010-10-01

    ... 49 Transportation 4 2010-10-01 2010-10-01 false Circuit, track. 236.726 Section 236.726 Transportation Other Regulations Relating to Transportation (Continued) FEDERAL RAILROAD ADMINISTRATION... Circuit, track. An electrical circuit of which the rails of the track form a part....

  10. 49 CFR 236.721 - Circuit, control.

    Code of Federal Regulations, 2014 CFR

    2014-10-01

    ... 49 Transportation 4 2014-10-01 2014-10-01 false Circuit, control. 236.721 Section 236.721 Transportation Other Regulations Relating to Transportation (Continued) FEDERAL RAILROAD ADMINISTRATION... Circuit, control. An electrical circuit between a source of electric energy and a device which it operates....

  11. 49 CFR 236.719 - Circuit, acknowledgment.

    Code of Federal Regulations, 2010 CFR

    2010-10-01

    ... 49 Transportation 4 2010-10-01 2010-10-01 false Circuit, acknowledgment. 236.719 Section 236.719 Transportation Other Regulations Relating to Transportation (Continued) FEDERAL RAILROAD ADMINISTRATION... Circuit, acknowledgment. A circuit consisting of wire or other conducting material installed between...

  12. 49 CFR 236.731 - Controller, circuit.

    Code of Federal Regulations, 2014 CFR

    2014-10-01

    ... 49 Transportation 4 2014-10-01 2014-10-01 false Controller, circuit. 236.731 Section 236.731 Transportation Other Regulations Relating to Transportation (Continued) FEDERAL RAILROAD ADMINISTRATION... Controller, circuit. A device for opening and closing electric circuits....

  13. 49 CFR 236.721 - Circuit, control.

    Code of Federal Regulations, 2012 CFR

    2012-10-01

    ... 49 Transportation 4 2012-10-01 2012-10-01 false Circuit, control. 236.721 Section 236.721 Transportation Other Regulations Relating to Transportation (Continued) FEDERAL RAILROAD ADMINISTRATION... Circuit, control. An electrical circuit between a source of electric energy and a device which it operates....

  14. 30 CFR 57.6407 - Circuit testing.

    Code of Federal Regulations, 2010 CFR

    2010-07-01

    ... 30 Mineral Resources 1 2010-07-01 2010-07-01 false Circuit testing. 57.6407 Section 57.6407... Blasting-Surface and Underground § 57.6407 Circuit testing. A blasting galvanometer or other instrument designed for testing blasting circuits shall be used to test the following: (a) In surface operations—...

  15. 49 CFR 236.719 - Circuit, acknowledgment.

    Code of Federal Regulations, 2012 CFR

    2012-10-01

    ... 49 Transportation 4 2012-10-01 2012-10-01 false Circuit, acknowledgment. 236.719 Section 236.719 Transportation Other Regulations Relating to Transportation (Continued) FEDERAL RAILROAD ADMINISTRATION... Circuit, acknowledgment. A circuit consisting of wire or other conducting material installed between...

  16. 30 CFR 75.1323 - Blasting circuits.

    Code of Federal Regulations, 2014 CFR

    2014-07-01

    ... 30 Mineral Resources 1 2014-07-01 2014-07-01 false Blasting circuits. 75.1323 Section 75.1323... MANDATORY SAFETY STANDARDS-UNDERGROUND COAL MINES Explosives and Blasting § 75.1323 Blasting circuits. (a) Blasting circuits shall be protected from sources of stray electric current. (b) Detonators made...

  17. 30 CFR 75.1323 - Blasting circuits.

    Code of Federal Regulations, 2012 CFR

    2012-07-01

    ... 30 Mineral Resources 1 2012-07-01 2012-07-01 false Blasting circuits. 75.1323 Section 75.1323... MANDATORY SAFETY STANDARDS-UNDERGROUND COAL MINES Explosives and Blasting § 75.1323 Blasting circuits. (a) Blasting circuits shall be protected from sources of stray electric current. (b) Detonators made...

  18. 49 CFR 236.726 - Circuit, track.

    Code of Federal Regulations, 2012 CFR

    2012-10-01

    ... 49 Transportation 4 2012-10-01 2012-10-01 false Circuit, track. 236.726 Section 236.726 Transportation Other Regulations Relating to Transportation (Continued) FEDERAL RAILROAD ADMINISTRATION... Circuit, track. An electrical circuit of which the rails of the track form a part....

  19. 30 CFR 57.6403 - Branch circuits.

    Code of Federal Regulations, 2014 CFR

    2014-07-01

    ... 30 Mineral Resources 1 2014-07-01 2014-07-01 false Branch circuits. 57.6403 Section 57.6403... Blasting-Surface and Underground § 57.6403 Branch circuits. (a) If electric blasting includes the use of branch circuits, each branch shall be equipped with a safety switch or equivalent method to isolate...

  20. 30 CFR 57.6407 - Circuit testing.

    Code of Federal Regulations, 2014 CFR

    2014-07-01

    ... 30 Mineral Resources 1 2014-07-01 2014-07-01 false Circuit testing. 57.6407 Section 57.6407... Blasting-Surface and Underground § 57.6407 Circuit testing. A blasting galvanometer or other instrument designed for testing blasting circuits shall be used to test the following: (a) In surface operations—...

  1. 30 CFR 56.6407 - Circuit testing.

    Code of Federal Regulations, 2010 CFR

    2010-07-01

    ... 30 Mineral Resources 1 2010-07-01 2010-07-01 false Circuit testing. 56.6407 Section 56.6407... Blasting § 56.6407 Circuit testing. A blasting galvanometer or other instrument designed for testing blasting circuits shall be used to test each of the following: (a) Continuity of each electric detonator...

  2. 49 CFR 236.731 - Controller, circuit.

    Code of Federal Regulations, 2012 CFR

    2012-10-01

    ... 49 Transportation 4 2012-10-01 2012-10-01 false Controller, circuit. 236.731 Section 236.731 Transportation Other Regulations Relating to Transportation (Continued) FEDERAL RAILROAD ADMINISTRATION... Controller, circuit. A device for opening and closing electric circuits....

  3. 30 CFR 56.6407 - Circuit testing.

    Code of Federal Regulations, 2014 CFR

    2014-07-01

    ... 30 Mineral Resources 1 2014-07-01 2014-07-01 false Circuit testing. 56.6407 Section 56.6407... Blasting § 56.6407 Circuit testing. A blasting galvanometer or other instrument designed for testing blasting circuits shall be used to test each of the following: (a) Continuity of each electric detonator...

  4. 30 CFR 57.6407 - Circuit testing.

    Code of Federal Regulations, 2012 CFR

    2012-07-01

    ... 30 Mineral Resources 1 2012-07-01 2012-07-01 false Circuit testing. 57.6407 Section 57.6407... Blasting-Surface and Underground § 57.6407 Circuit testing. A blasting galvanometer or other instrument designed for testing blasting circuits shall be used to test the following: (a) In surface operations—...

  5. 49 CFR 236.726 - Circuit, track.

    Code of Federal Regulations, 2014 CFR

    2014-10-01

    ... 49 Transportation 4 2014-10-01 2014-10-01 false Circuit, track. 236.726 Section 236.726 Transportation Other Regulations Relating to Transportation (Continued) FEDERAL RAILROAD ADMINISTRATION... Circuit, track. An electrical circuit of which the rails of the track form a part....

  6. 30 CFR 57.6403 - Branch circuits.

    Code of Federal Regulations, 2012 CFR

    2012-07-01

    ... 30 Mineral Resources 1 2012-07-01 2012-07-01 false Branch circuits. 57.6403 Section 57.6403... Blasting-Surface and Underground § 57.6403 Branch circuits. (a) If electric blasting includes the use of branch circuits, each branch shall be equipped with a safety switch or equivalent method to isolate...

  7. 49 CFR 236.726 - Circuit, track.

    Code of Federal Regulations, 2013 CFR

    2013-10-01

    ... 49 Transportation 4 2013-10-01 2013-10-01 false Circuit, track. 236.726 Section 236.726 Transportation Other Regulations Relating to Transportation (Continued) FEDERAL RAILROAD ADMINISTRATION... Circuit, track. An electrical circuit of which the rails of the track form a part....

  8. The dc power circuits: A compilation

    NASA Technical Reports Server (NTRS)

    1972-01-01

    A compilation of reports concerning power circuits is presented for the dissemination of aerospace information to the general public as part of the NASA Technology Utilization Program. The descriptions for the electronic circuits are grouped as follows: dc power supplies, power converters, current-voltage power supply regulators, overload protection circuits, and dc constant current power supplies.

  9. 30 CFR 57.6403 - Branch circuits.

    Code of Federal Regulations, 2011 CFR

    2011-07-01

    ... 30 Mineral Resources 1 2011-07-01 2011-07-01 false Branch circuits. 57.6403 Section 57.6403... Blasting-Surface and Underground § 57.6403 Branch circuits. (a) If electric blasting includes the use of branch circuits, each branch shall be equipped with a safety switch or equivalent method to isolate...

  10. 49 CFR 236.731 - Controller, circuit.

    Code of Federal Regulations, 2011 CFR

    2011-10-01

    ... 49 Transportation 4 2011-10-01 2011-10-01 false Controller, circuit. 236.731 Section 236.731 Transportation Other Regulations Relating to Transportation (Continued) FEDERAL RAILROAD ADMINISTRATION... Controller, circuit. A device for opening and closing electric circuits....

  11. 49 CFR 236.726 - Circuit, track.

    Code of Federal Regulations, 2011 CFR

    2011-10-01

    ... 49 Transportation 4 2011-10-01 2011-10-01 false Circuit, track. 236.726 Section 236.726 Transportation Other Regulations Relating to Transportation (Continued) FEDERAL RAILROAD ADMINISTRATION... Circuit, track. An electrical circuit of which the rails of the track form a part....

  12. 49 CFR 236.719 - Circuit, acknowledgment.

    Code of Federal Regulations, 2011 CFR

    2011-10-01

    ... 49 Transportation 4 2011-10-01 2011-10-01 false Circuit, acknowledgment. 236.719 Section 236.719 Transportation Other Regulations Relating to Transportation (Continued) FEDERAL RAILROAD ADMINISTRATION... Circuit, acknowledgment. A circuit consisting of wire or other conducting material installed between...

  13. The use of digital circuit multiplication equipment in satellite communications

    NASA Astrophysics Data System (ADS)

    Viklund, Nils-Erik; Nycander, Claes

    1990-12-01

    The use, within satellite communications, of low rate encoding (LRE) techniques, based on 24, 32 and 40 kb/s ADPCM coding, coupled with digital speech interpolation (DSI) to form a digital circuit multiplication equipment (DCME), is addressed in this paper. The need for a system simulation tool, in order to plan for and correctly use the DCME concept is identified. Results obtained with this simulation tool are presented. The simulation model makes it possible to predict the behavior of the system from a quality point of view, with external conditions simulated to be very close to actual operating conditions.

  14. Synthesis of Arbitrary Quantum Circuits to Topological Assembly

    NASA Astrophysics Data System (ADS)

    Paler, Alexandru; Devitt, Simon J.; Fowler, Austin G.

    2016-08-01

    Given a quantum algorithm, it is highly nontrivial to devise an efficient sequence of physical gates implementing the algorithm on real hardware and incorporating topological quantum error correction. In this paper, we present a first step towards this goal, focusing on generating correct and simple arrangements of topological structures that correspond to a given quantum circuit and largely neglecting their efficiency. We detail the many challenges that will need to be tackled in the pursuit of efficiency. The software source code can be consulted at https://github.com/alexandrupaler/tqec.

  15. Synthesis of Arbitrary Quantum Circuits to Topological Assembly

    PubMed Central

    Paler, Alexandru; Devitt, Simon J.; Fowler, Austin G.

    2016-01-01

    Given a quantum algorithm, it is highly nontrivial to devise an efficient sequence of physical gates implementing the algorithm on real hardware and incorporating topological quantum error correction. In this paper, we present a first step towards this goal, focusing on generating correct and simple arrangements of topological structures that correspond to a given quantum circuit and largely neglecting their efficiency. We detail the many challenges that will need to be tackled in the pursuit of efficiency. The software source code can be consulted at https://github.com/alexandrupaler/tqec. PMID:27481212

  16. Emulating Anyonic Fractional Statistical Behavior in a Superconducting Quantum Circuit.

    PubMed

    Zhong, Y P; Xu, D; Wang, P; Song, C; Guo, Q J; Liu, W X; Xu, K; Xia, B X; Lu, C-Y; Han, Siyuan; Pan, Jian-Wei; Wang, H

    2016-09-01

    Anyons are exotic quasiparticles obeying fractional statistics, whose behavior can be emulated in artificially designed spin systems. Here we present an experimental emulation of creating anyonic excitations in a superconducting circuit that consists of four qubits, achieved by dynamically generating the ground and excited states of the toric code model, i.e., four-qubit Greenberger-Horne-Zeilinger states. The anyonic braiding is implemented via single-qubit rotations: a phase shift of π related to braiding, the hallmark of Abelian 1/2 anyons, has been observed through a Ramsey-type interference measurement. PMID:27661671

  17. Synthesis of Arbitrary Quantum Circuits to Topological Assembly.

    PubMed

    Paler, Alexandru; Devitt, Simon J; Fowler, Austin G

    2016-01-01

    Given a quantum algorithm, it is highly nontrivial to devise an efficient sequence of physical gates implementing the algorithm on real hardware and incorporating topological quantum error correction. In this paper, we present a first step towards this goal, focusing on generating correct and simple arrangements of topological structures that correspond to a given quantum circuit and largely neglecting their efficiency. We detail the many challenges that will need to be tackled in the pursuit of efficiency. The software source code can be consulted at https://github.com/alexandrupaler/tqec. PMID:27481212

  18. Emulating Anyonic Fractional Statistical Behavior in a Superconducting Quantum Circuit

    NASA Astrophysics Data System (ADS)

    Zhong, Y. P.; Xu, D.; Wang, P.; Song, C.; Guo, Q. J.; Liu, W. X.; Xu, K.; Xia, B. X.; Lu, C.-Y.; Han, Siyuan; Pan, Jian-Wei; Wang, H.

    2016-09-01

    Anyons are exotic quasiparticles obeying fractional statistics, whose behavior can be emulated in artificially designed spin systems. Here we present an experimental emulation of creating anyonic excitations in a superconducting circuit that consists of four qubits, achieved by dynamically generating the ground and excited states of the toric code model, i.e., four-qubit Greenberger-Horne-Zeilinger states. The anyonic braiding is implemented via single-qubit rotations: a phase shift of π related to braiding, the hallmark of Abelian 1 /2 anyons, has been observed through a Ramsey-type interference measurement.

  19. Coding for Electronic Mail

    NASA Technical Reports Server (NTRS)

    Rice, R. F.; Lee, J. J.

    1986-01-01

    Scheme for coding facsimile messages promises to reduce data transmission requirements to one-tenth current level. Coding scheme paves way for true electronic mail in which handwritten, typed, or printed messages or diagrams sent virtually instantaneously - between buildings or between continents. Scheme, called Universal System for Efficient Electronic Mail (USEEM), uses unsupervised character recognition and adaptive noiseless coding of text. Image quality of resulting delivered messages improved over messages transmitted by conventional coding. Coding scheme compatible with direct-entry electronic mail as well as facsimile reproduction. Text transmitted in this scheme automatically translated to word-processor form.

  20. Prospects For Quantum Integrated Circuits

    NASA Astrophysics Data System (ADS)

    Bate, R. T.; Frazier, G. A.; Frensley, W. R.; Lee, J. W.; Reed, M. A.

    1987-08-01

    Recent progress in research on resonant tunneling diodes, and on lateral quantization effects in quantum wells renews hope for the development of active unipolar heterojunction devices which incorporate no depletion layers, and hence can be extremely compact in both vertical and lateral dimensions. If such devices meeting the fundamental requirements for ultrahigh density integrated circuits can be developed, and if revolutionary chip architectures which overcome current interconnection limitations can be devised, then a new generation of integrated circuits approaching the ultimate limits of functional density and functional throughput may eventually ensue. Although many of the most challenging problems in this scenario have not yet been addressed, progress is being made in the areas of fabrication and characterization of resonant tunneling devices, simulation of such devices using quantum transport theory, and simulation of nearest-neighbor connected (two-dimensional cellular automaton) architectures. This paper reviews the progress in these areas at Texas Instruments, and discusses the prospects for the future.

  1. Handbook of microwave integrated circuits

    NASA Astrophysics Data System (ADS)

    Hoffmann, Reinmut K.

    The design and operation of ICs for use in the 0.5-20-GHz range are described in an introductory and reference work for industrial engineers. Chapters are devoted to an overview of microwave IC (MIC) technology, general stripline characteristics, microwave transmission line (MTL) parameters for microstrips with isotropic dielectric substrates, higher-order modes on a microstrip, the effects of metallic enclosure on MTL transmission parameters, losses in microstrips, the measurement of MTL parameters, and MTLs on anisotropic dielectric substrates. Consideration is given to coupled microstrips on dielectric substrates, microstrip discontinuities, radiation from microstrip circuits, MTL variations, coplanar MTLs, slotlines, and spurious modes in MTL circuits. Diagrams, drawings, graphs, and a glossary of symbols are provided.

  2. Ionization tube simmer current circuit

    DOEpatents

    Steinkraus, R.F. Jr.

    1994-12-13

    A highly efficient flash lamp simmer current circuit utilizes a fifty percent duty cycle square wave pulse generator to pass a current over a current limiting inductor to a full wave rectifier. The DC output of the rectifier is then passed over a voltage smoothing capacitor through a reverse current blocking diode to a flash lamp tube to sustain ionization in the tube between discharges via a small simmer current. An alternate embodiment of the circuit combines the pulse generator and inductor in the form of an FET off line square wave generator with an impedance limited step up output transformer which is then applied to the full wave rectifier as before to yield a similar simmer current. 6 figures.

  3. Delay locked loop integrated circuit.

    SciTech Connect

    Brocato, Robert Wesley

    2007-10-01

    This report gives a description of the development of a Delay Locked Loop (DLL) integrated circuit (IC). The DLL was developed and tested as a stand-alone IC test chip to be integrated into a larger application specific integrated circuit (ASIC), the Quadrature Digital Waveform Synthesizer (QDWS). The purpose of the DLL is to provide a digitally programmable delay to enable synchronization between an internal system clock and external peripherals with unknown clock skew. The DLL was designed and fabricated in the IBM 8RF process, a 0.13 {micro}m CMOS process. It was designed to operate with a 300MHz clock and has been tested up to 500MHz.

  4. Ionization tube simmer current circuit

    DOEpatents

    Steinkraus, Jr., Robert F.

    1994-01-01

    A highly efficient flash lamp simmer current circuit utilizes a fifty percent duty cycle square wave pulse generator to pass a current over a current limiting inductor to a full wave rectifier. The DC output of the rectifier is then passed over a voltage smoothing capacitor through a reverse current blocking diode to a flash lamp tube to sustain ionization in the tube between discharges via a small simmer current. An alternate embodiment of the circuit combines the pulse generator and inductor in the form of an FET off line square wave generator with an impedance limited step up output transformer which is then applied to the full wave rectifier as before to yield a similar simmer current.

  5. Delta connected resonant snubber circuit

    DOEpatents

    Lai, J.S.; Peng, F.Z.; Young, R.W. Sr.; Ott, G.W. Jr.

    1998-01-20

    A delta connected, resonant snubber-based, soft switching, inverter circuit achieves lossless switching during dc-to-ac power conversion and power conditioning with minimum component count and size. Current is supplied to the resonant snubber branches solely by the dc supply voltage through the main inverter switches and the auxiliary switches. Component count and size are reduced by use of a single semiconductor switch in the resonant snubber branches. Component count is also reduced by maximizing the use of stray capacitances of the main switches as parallel resonant capacitors. Resonance charging and discharging of the parallel capacitances allows lossless, zero voltage switching. In one embodiment, circuit component size and count are minimized while achieving lossless, zero voltage switching within a three-phase inverter. 36 figs.

  6. Delta connected resonant snubber circuit

    DOEpatents

    Lai, Jih-Sheng; Peng, Fang Zheng; Young, Sr., Robert W.; Ott, Jr., George W.

    1998-01-01

    A delta connected, resonant snubber-based, soft switching, inverter circuit achieves lossless switching during dc-to-ac power conversion and power conditioning with minimum component count and size. Current is supplied to the resonant snubber branches solely by the dc supply voltage through the main inverter switches and the auxiliary switches. Component count and size are reduced by use of a single semiconductor switch in the resonant snubber branches. Component count is also reduced by maximizing the use of stray capacitances of the main switches as parallel resonant capacitors. Resonance charging and discharging of the parallel capacitances allows lossless, zero voltage switching. In one embodiment, circuit component size and count are minimized while achieving lossless, zero voltage switching within a three-phase inverter.

  7. Overpulse railgun energy recovery circuit

    SciTech Connect

    Honig, E.M.

    1989-12-12

    This patent describes an overpulse railgun energy recovery circuit for propelling a projectile along a railgun. The overpulse rail gun energy recovery circuit comprising: a railgun having an effective inductance, the railgun having a breach end, a pair of parallel rails, and a muzzle end; source inductor for storing current connected across the pair of parallel rails of the railgun at the breech end thereof; means for initially charging the source inductor to an initial current for storage; switching means connected across the source inductor with a closed position for shorting across the source inductor and an open position for enabling current flow into the effective inductance of the breech end towards the muzzle end of the railgun; a muzzle switch connected across the pair of parallel rails of the railgun at the muzzle end thereof; and transfer capacitive means.

  8. 30 CFR 75.518 - Electric equipment and circuits; overload and short circuit protection.

    Code of Federal Regulations, 2014 CFR

    2014-07-01

    ... 30 Mineral Resources 1 2014-07-01 2014-07-01 false Electric equipment and circuits; overload and short circuit protection. 75.518 Section 75.518 Mineral Resources MINE SAFETY AND HEALTH ADMINISTRATION... Equipment-General § 75.518 Electric equipment and circuits; overload and short circuit protection....

  9. 30 CFR 75.518 - Electric equipment and circuits; overload and short circuit protection.

    Code of Federal Regulations, 2012 CFR

    2012-07-01

    ... 30 Mineral Resources 1 2012-07-01 2012-07-01 false Electric equipment and circuits; overload and short circuit protection. 75.518 Section 75.518 Mineral Resources MINE SAFETY AND HEALTH ADMINISTRATION... Equipment-General § 75.518 Electric equipment and circuits; overload and short circuit protection....

  10. 30 CFR 75.601-1 - Short circuit protection; ratings and settings of circuit breakers.

    Code of Federal Regulations, 2010 CFR

    2010-07-01

    ... 30 Mineral Resources 1 2010-07-01 2010-07-01 false Short circuit protection; ratings and settings of circuit breakers. 75.601-1 Section 75.601-1 Mineral Resources MINE SAFETY AND HEALTH... Trailing Cables § 75.601-1 Short circuit protection; ratings and settings of circuit breakers....

  11. 30 CFR 75.518 - Electric equipment and circuits; overload and short circuit protection.

    Code of Federal Regulations, 2010 CFR

    2010-07-01

    ... 30 Mineral Resources 1 2010-07-01 2010-07-01 false Electric equipment and circuits; overload and short circuit protection. 75.518 Section 75.518 Mineral Resources MINE SAFETY AND HEALTH ADMINISTRATION... Equipment-General § 75.518 Electric equipment and circuits; overload and short circuit protection....

  12. 30 CFR 75.601-1 - Short circuit protection; ratings and settings of circuit breakers.

    Code of Federal Regulations, 2014 CFR

    2014-07-01

    ... 30 Mineral Resources 1 2014-07-01 2014-07-01 false Short circuit protection; ratings and settings of circuit breakers. 75.601-1 Section 75.601-1 Mineral Resources MINE SAFETY AND HEALTH... Trailing Cables § 75.601-1 Short circuit protection; ratings and settings of circuit breakers....

  13. 30 CFR 75.601-1 - Short circuit protection; ratings and settings of circuit breakers.

    Code of Federal Regulations, 2012 CFR

    2012-07-01

    ... 30 Mineral Resources 1 2012-07-01 2012-07-01 false Short circuit protection; ratings and settings of circuit breakers. 75.601-1 Section 75.601-1 Mineral Resources MINE SAFETY AND HEALTH... Trailing Cables § 75.601-1 Short circuit protection; ratings and settings of circuit breakers....

  14. 30 CFR 75.601-1 - Short circuit protection; ratings and settings of circuit breakers.

    Code of Federal Regulations, 2011 CFR

    2011-07-01

    ... 30 Mineral Resources 1 2011-07-01 2011-07-01 false Short circuit protection; ratings and settings of circuit breakers. 75.601-1 Section 75.601-1 Mineral Resources MINE SAFETY AND HEALTH... Trailing Cables § 75.601-1 Short circuit protection; ratings and settings of circuit breakers....

  15. 30 CFR 75.518 - Electric equipment and circuits; overload and short circuit protection.

    Code of Federal Regulations, 2011 CFR

    2011-07-01

    ... 30 Mineral Resources 1 2011-07-01 2011-07-01 false Electric equipment and circuits; overload and short circuit protection. 75.518 Section 75.518 Mineral Resources MINE SAFETY AND HEALTH ADMINISTRATION... Equipment-General § 75.518 Electric equipment and circuits; overload and short circuit protection....

  16. Digital model of a vacuum circuit breaker for the analysis of switching waveforms in electrical circuits

    NASA Astrophysics Data System (ADS)

    Budzisz, Joanna; Wróblewski, Zbigniew

    2016-03-01

    The article presents a method of modelling a vaccum circuit breaker in the ATP/EMTP package, the results of the verification of the correctness of the developed digital circuit breaker model operation and its practical usefulness for analysis of overvoltages and overcurrents occurring in commutated capacitive electrical circuits and also examples of digital simulations of overvoltages and overcurrents in selected electrical circuits.

  17. Description of a quantum convolutional code.

    PubMed

    Ollivier, Harold; Tillich, Jean-Pierre

    2003-10-24

    We describe a quantum error correction scheme aimed at protecting a flow of quantum information over long distance communication. It is largely inspired by the theory of classical convolutional codes which are used in similar circumstances in classical communication. The particular example shown here uses the stabilizer formalism. We provide an explicit encoding circuit and its associated error estimation algorithm. The latter gives the most likely error over any memoryless quantum channel, with a complexity growing only linearly with the number of encoded qubits.

  18. XSOR codes users manual

    SciTech Connect

    Jow, Hong-Nian; Murfin, W.B.; Johnson, J.D.

    1993-11-01

    This report describes the source term estimation codes, XSORs. The codes are written for three pressurized water reactors (Surry, Sequoyah, and Zion) and two boiling water reactors (Peach Bottom and Grand Gulf). The ensemble of codes has been named ``XSOR``. The purpose of XSOR codes is to estimate the source terms which would be released to the atmosphere in severe accidents. A source term includes the release fractions of several radionuclide groups, the timing and duration of releases, the rates of energy release, and the elevation of releases. The codes have been developed by Sandia National Laboratories for the US Nuclear Regulatory Commission (NRC) in support of the NUREG-1150 program. The XSOR codes are fast running parametric codes and are used as surrogates for detailed mechanistic codes. The XSOR codes also provide the capability to explore the phenomena and their uncertainty which are not currently modeled by the mechanistic codes. The uncertainty distributions of input parameters may be used by an. XSOR code to estimate the uncertainty of source terms.

  19. Counterpulse railgun energy recovery circuit

    DOEpatents

    Honig, Emanuel M.

    1986-01-01

    In an electromagnetic launcher such as a railgun for propelling a projectile at high velocity, a counterpulse energy recovery circuit is employed to transfer stored inductive energy from a source inductor to the railgun inductance to propel the projectile down the railgun. Switching circuitry and an energy transfer capacitor are used to switch the energy back to the source inductor in readiness for a repetitive projectile propelling cycle.

  20. Overpulse railgun energy recovery circuit

    DOEpatents

    Honig, Emanuel M.

    1989-01-01

    In an electromagnetic launcher such as a railgun for propelling a projectile at high velocity, an overpulse energy recovery circuit is employed to transfer stored inductive energy from a source inductor to the railgun inductance to propel the projectile down the railgun. Switching circuitry and an energy transfer capacitor are used to switch the energy back to the source inductor in readiness for a repetitive projectile propelling cycle.

  1. Monolithic readout circuits for RHIC

    SciTech Connect

    O`Connor, P.; Harder, J.

    1991-12-31

    Several CMOS ASICs have been developed for a proposed RHIC experiment. This paper discusses why ASIC implementation was chosen for certain functions, circuit specifications and the design techniques used to meet them, and results of simulations and early prototypes. By working closely together from an early stage in the planning process, in-house ASIC designers and detector and data acquisition experimenters can achieve optimal use of this important technology.

  2. Photoconductive circuit element pulse generator

    DOEpatents

    Rauscher, Christen

    1989-01-01

    A pulse generator for characterizing semiconductor devices at millimeter wavelength frequencies where a photoconductive circuit element (PCE) is biased by a direct current voltage source and produces short electrical pulses when excited into conductance by short laser light pulses. The electrical pulses are electronically conditioned to improve the frequency related amplitude characteristics of the pulses which thereafter propagate along a transmission line to a device under test.

  3. DLLExternalCode

    SciTech Connect

    Greg Flach, Frank Smith

    2014-05-14

    DLLExternalCode is the a general dynamic-link library (DLL) interface for linking GoldSim (www.goldsim.com) with external codes. The overall concept is to use GoldSim as top level modeling software with interfaces to external codes for specific calculations. The DLLExternalCode DLL that performs the linking function is designed to take a list of code inputs from GoldSim, create an input file for the external application, run the external code, and return a list of outputs, read from files created by the external application, back to GoldSim. Instructions for creating the input file, running the external code, and reading the output are contained in an instructions file that is read and interpreted by the DLL.

  4. DLLExternalCode

    2014-05-14

    DLLExternalCode is the a general dynamic-link library (DLL) interface for linking GoldSim (www.goldsim.com) with external codes. The overall concept is to use GoldSim as top level modeling software with interfaces to external codes for specific calculations. The DLLExternalCode DLL that performs the linking function is designed to take a list of code inputs from GoldSim, create an input file for the external application, run the external code, and return a list of outputs, read frommore » files created by the external application, back to GoldSim. Instructions for creating the input file, running the external code, and reading the output are contained in an instructions file that is read and interpreted by the DLL.« less

  5. Parafermion stabilizer codes

    NASA Astrophysics Data System (ADS)

    Gungordu, Utkan; Nepal, Rabindra; Kovalev, Alexey

    2015-03-01

    We define and study parafermion stabilizer codes [Phys. Rev. A 90, 042326 (2014)] which can be viewed as generalizations of Kitaev's one dimensional model of unpaired Majorana fermions. Parafermion stabilizer codes can protect against low-weight errors acting on a small subset of parafermion modes in analogy to qudit stabilizer codes. Examples of several smallest parafermion stabilizer codes are given. Our results show that parafermions can achieve a better encoding rate than Majorana fermions. A locality preserving embedding of qudit operators into parafermion operators is established which allows one to map known qudit stabilizer codes to parafermion codes. We also present a local 2D parafermion construction that combines topological protection of Kitaev's toric code with additional protection relying on parity conservation. This work was supported in part by the NSF under Grants No. Phy-1415600 and No. NSF-EPSCoR 1004094.

  6. Additive manufacturing of hybrid circuits

    DOE PAGES

    Bell, Nelson S.; Sarobol, Pylin; Cook, Adam; Clem, Paul G.; Keicher, David M.; Hirschfeld, Deidre; Hall, Aaron Christopher

    2016-03-26

    There is a rising interest in developing functional electronics using additively manufactured components. Considerations in materials selection and pathways to forming hybrid circuits and devices must demonstrate useful electronic function; must enable integration; and must complement the complex shape, low cost, high volume, and high functionality of structural but generally electronically passive additively manufactured components. This article reviews several emerging technologies being used in industry and research/development to provide integration advantages of fabricating multilayer hybrid circuits or devices. First, we review a maskless, noncontact, direct write (DW) technology that excels in the deposition of metallic colloid inks for electrical interconnects.more » Second, we review a complementary technology, aerosol deposition (AD), which excels in the deposition of metallic and ceramic powder as consolidated, thick conformal coatings and is additionally patternable through masking. As a result, we show examples of hybrid circuits/devices integrated beyond 2-D planes, using combinations of DW or AD processes and conventional, established processes.« less

  7. Electrical circuit for data reduction

    SciTech Connect

    Kronberg, J.W.

    1991-12-31

    This invention is comprised of an electrical circuit for determining characteristic voltages, such as maximum, minimum, average and root mean squared voltages, of a time-varying electrical signal. The circuit comprises a positive and a negative peak detector that feed the positive and negative voltage peaks detected in each of a series of time intervals into a solid-state multiplexer controlled by a process controller. The time intervals are generated by the process controller in combination with a clocking, circuit. The multiplexer applies the positive and negative peak voltages to a set of four capacitors, apply the positive peak to one capacitor during one interval and then the negative peak to that capacitor in a subsequent interval so that each capacitor is alternatingly accumulating a positive peak then a negative peak to obviate the need for resetting each capacitor. After the positive peak voltage is applied to one capacitor, the connection is switched during the next interval for reading the negative peak voltage, then switched again for applying, a negative peak voltage, then switched once more for reading the negative peak voltage, the multiplexer serving, as a solid state commutator for switching the electrical connection. Alternatively, peak maximum and minimum voltage detectors may be replaced with circuitry designed to obtain the additional characteristic voltages desired in each interval.

  8. CONTROL AND FAULT DETECTOR CIRCUIT

    DOEpatents

    Winningstad, C.N.

    1958-04-01

    A power control and fault detectcr circuit for a radiofrequency system is described. The operation of the circuit controls the power output of a radio- frequency power supply to automatically start the flow of energizing power to the radio-frequency power supply and to gradually increase the power to a predetermined level which is below the point where destruction occurs upon the happening of a fault. If the radio-frequency power supply output fails to increase during such period, the control does not further increase the power. On the other hand, if the output of the radio-frequency power supply properly increases, then the control continues to increase the power to a maximum value. After the maximumn value of radio-frequency output has been achieved. the control is responsive to a ''fault,'' such as a short circuit in the radio-frequency system being driven, so that the flow of power is interrupted for an interval before the cycle is repeated.

  9. Reconfigurable RF CMOS Circuit for Cognitive Radio

    NASA Astrophysics Data System (ADS)

    Masu, Kazuya; Okada, Kenichi

    Cognitive radio and/or SDR (Software Defined Radio) inherently requires multi-band and multi standard wireless circuit. The circuit is implemented based on Si CMOS technology. In this article, the recent progress of Si RF CMOS is described and the reconfigurable RF CMOS circuit which was proposed by the authors is introduced. At the present and in the future, several kind of Si CMOS technology can be used for RF CMOS circuit implementation. The realistic RF CMOS circuit implementation toward cognitive and/or SDR is discussed.

  10. The global electrical circuit: A review

    NASA Astrophysics Data System (ADS)

    Williams, Earle R.

    2009-02-01

    Research topics on the global electrical circuit are addressed that have received attention in recent years. These topics include the diurnal variation of the global circuit, surface measurements of electric field at high latitude, the annual variation, the semiannual variation, the role of lightning as a source for the global circuit, the electrical contribution of mesoscale convective systems, the possible effect of thunderstorms on the E and F regions of the ionosphere, the evidence for a global circuit impact from nuclear weapons tests, the controversy over long-term variations, the response to climate change, and finally the impact of the global circuit on climate.

  11. SiC JFET Transistor Circuit Model for Extreme Temperature Range

    NASA Technical Reports Server (NTRS)

    Neudeck, Philip G.

    2008-01-01

    A technique for simulating extreme-temperature operation of integrated circuits that incorporate silicon carbide (SiC) junction field-effect transistors (JFETs) has been developed. The technique involves modification of NGSPICE, which is an open-source version of the popular Simulation Program with Integrated Circuit Emphasis (SPICE) general-purpose analog-integrated-circuit-simulating software. NGSPICE in its unmodified form is used for simulating and designing circuits made from silicon-based transistors that operate at or near room temperature. Two rapid modifications of NGSPICE source code enable SiC JFETs to be simulated to 500 C using the well-known Level 1 model for silicon metal oxide semiconductor field-effect transistors (MOSFETs). First, the default value of the MOSFET surface potential must be changed. In the unmodified source code, this parameter has a value of 0.6, which corresponds to slightly more than half the bandgap of silicon. In NGSPICE modified to simulate SiC JFETs, this parameter is changed to a value of 1.6, corresponding to slightly more than half the bandgap of SiC. The second modification consists of changing the temperature dependence of MOSFET transconductance and saturation parameters. The unmodified NGSPICE source code implements a T(sup -1.5) temperature dependence for these parameters. In order to mimic the temperature behavior of experimental SiC JFETs, a T(sup -1.3) temperature dependence must be implemented in the NGSPICE source code. Following these two simple modifications, the Level 1 MOSFET model of the NGSPICE circuit simulation program reasonably approximates the measured high-temperature behavior of experimental SiC JFETs properly operated with zero or reverse bias applied to the gate terminal. Modification of additional silicon parameters in the NGSPICE source code was not necessary to model experimental SiC JFET current-voltage performance across the entire temperature range from 25 to 500 C.

  12. Method of determining the open circuit voltage of a battery in a closed circuit

    DOEpatents

    Brown, William E.

    1980-01-01

    The open circuit voltage of a battery which is connected in a closed circuit is determined without breaking the circuit or causing voltage upsets therein. The closed circuit voltage across the battery and the current flowing through it are determined under normal load and then a fractional change is made in the load and the new current and voltage values determined. The open circuit voltage is then calculated, according to known principles, from the two sets of values.

  13. Method and Circuit for Injecting a Precise Amount of Charge onto a Circuit Node

    NASA Technical Reports Server (NTRS)

    Hancock, Bruce R. (Inventor)

    2016-01-01

    A method and circuit for injecting charge into a circuit node, comprising (a) resetting a capacitor's voltage through a first transistor; (b) after the resetting, pre-charging the capacitor through the first transistor; and (c) after the pre-charging, further charging the capacitor through a second transistor, wherein the second transistor is connected between the capacitor and a circuit node, and the further charging draws charge through the second transistor from the circuit node, thereby injecting charge into the circuit node.

  14. 46 CFR 28.365 - Overcurrent protection and switched circuits.

    Code of Federal Regulations, 2010 CFR

    2010-10-01

    ... carrying capacity by a circuit breaker or fuse at the connection to the switchboard or distribution panel... circuits must be separate, switched circuits having fused disconnect switches or circuit breakers so...

  15. View second bank of circuit towers on Arizona side of ...

    Library of Congress Historic Buildings Survey, Historic Engineering Record, Historic Landscapes Survey

    View second bank of circuit towers on Arizona side of canyon. Left tower supports Circuit 10 and right tower supports Circuit 11, view north - Hoover Dam, Circuits 1-15, U.S. Highway 93, Boulder City, Clark County, NV

  16. Faster Evolution of More Multifunctional Logic Circuits

    NASA Technical Reports Server (NTRS)

    Stoica, Adrian; Zebulum, Ricardo

    2005-01-01

    A modification in a method of automated evolutionary synthesis of voltage-controlled multifunctional logic circuits makes it possible to synthesize more circuits in less time. Prior to the modification, the computations for synthesizing a four-function logic circuit by this method took about 10 hours. Using the method as modified, it is possible to synthesize a six-function circuit in less than half an hour. The concepts of automated evolutionary synthesis and voltage-controlled multifunctional logic circuits were described in a number of prior NASA Tech Briefs articles. To recapitulate: A circuit is designed to perform one of several different logic functions, depending on the value of an applied control voltage. The circuit design is synthesized following an automated evolutionary approach that is so named because it is modeled partly after the repetitive trial-and-error process of biological evolution. In this process, random populations of integer strings that encode electronic circuits play a role analogous to that of chromosomes. An evolved circuit is tested by computational simulation (prior to testing in real hardware to verify a final design). Then, in a fitness-evaluation step, responses of the circuit are compared with specifications of target responses and circuits are ranked according to how close they come to satisfying specifications. The results of the evaluation provide guidance for refining designs through further iteration.

  17. Design of superconductor frame compression circuits

    NASA Astrophysics Data System (ADS)

    Sakurai, T.; Miyaho, N.; Miyahara, K.

    2007-10-01

    We proposed previously a novel interface circuit which was used between semiconductor data-input circuits and superconductor high-speed routers. The frame length of data packets is compressed in the interface circuit. Our proposed interface circuit has rather narrow timing margin. The problem was that our control circuit of the interface circuit could allow only very small timing delay. In this paper we propose a modified control circuit. We have improved the timing margin of the control circuit using RS-flip flop (RS-FF), where two shift registers and one control circuit are driven by clock pulses provided from a master clock-pulse generator. In this circuit, we have assumed fixed frame length packets. Our final target of master clock frequency is 100 GHz which will be realized with the device-parameter set of future advanced process. As the first step of realizing this target value, we aimed at 40 GHz clock operation with the conventional device-parameter set of NECs standard I process. The behavior of the whole frame compression circuit was simulated by a computer, and it was confirmed that it operated properly up to the master clock frequency of 23 GHz.

  18. Graphene radio frequency receiver integrated circuit.

    PubMed

    Han, Shu-Jen; Garcia, Alberto Valdes; Oida, Satoshi; Jenkins, Keith A; Haensch, Wilfried

    2014-01-01

    Graphene has attracted much interest as a future channel material in radio frequency electronics because of its superior electrical properties. Fabrication of a graphene integrated circuit without significantly degrading transistor performance has proven to be challenging, posing one of the major bottlenecks to compete with existing technologies. Here we present a fabrication method fully preserving graphene transistor quality, demonstrated with the implementation of a high-performance three-stage graphene integrated circuit. The circuit operates as a radio frequency receiver performing signal amplification, filtering and downconversion mixing. All circuit components are integrated into 0.6 mm(2) area and fabricated on 200 mm silicon wafers, showing the unprecedented graphene circuit complexity and silicon complementary metal-oxide-semiconductor process compatibility. The demonstrated circuit performance allow us to use graphene integrated circuit to perform practical wireless communication functions, receiving and restoring digital text transmitted on a 4.3-GHz carrier signal.

  19. Auto-programmable impulse neural circuits

    NASA Technical Reports Server (NTRS)

    Watula, D.; Meador, J.

    1990-01-01

    Impulse neural networks use pulse trains to communicate neuron activation levels. Impulse neural circuits emulate natural neurons at a more detailed level than that typically employed by contemporary neural network implementation methods. An impulse neural circuit which realizes short term memory dynamics is presented. The operation of that circuit is then characterized in terms of pulse frequency modulated signals. Both fixed and programmable synapse circuits for realizing long term memory are also described. The implementation of a simple and useful unsupervised learning law is then presented. The implementation of a differential Hebbian learning rule for a specific mean-frequency signal interpretation is shown to have a straightforward implementation using digital combinational logic with a variation of a previously developed programmable synapse circuit. This circuit is expected to be exploited for simple and straightforward implementation of future auto-adaptive neural circuits.

  20. Spectral information coding by infrared photoreceptors

    NASA Astrophysics Data System (ADS)

    Coon, D. D.; Perera, A. G. U.

    1986-10-01

    Spontaneous pulsing has been observed in circuits containing cryogenically cooled silicon p-i-n (p+-n-n+) diodes under dc forward bias. The intensity of infrared radiation incident on the diodes controls the pulse rate with no appreciable effect on the shape or size of the pulses. A strong similarity is noted between these properties and the nearly universal means of coding of visual information by animal photoreceptors and neural networks. It is proposed that exploitation of this remarkable analogy could lead to radically new approaches to acquisition and processing of infrared optical information. Infrared analogs of neural color coding and color vision are proposed based on analysis of p-i-n spectral response measurements.

  1. Industrial Code Development

    NASA Technical Reports Server (NTRS)

    Shapiro, Wilbur

    1991-01-01

    The industrial codes will consist of modules of 2-D and simplified 2-D or 1-D codes, intended for expeditious parametric studies, analysis, and design of a wide variety of seals. Integration into a unified system is accomplished by the industrial Knowledge Based System (KBS), which will also provide user friendly interaction, contact sensitive and hypertext help, design guidance, and an expandable database. The types of analysis to be included with the industrial codes are interfacial performance (leakage, load, stiffness, friction losses, etc.), thermoelastic distortions, and dynamic response to rotor excursions. The first three codes to be completed and which are presently being incorporated into the KBS are the incompressible cylindrical code, ICYL, and the compressible cylindrical code, GCYL.

  2. Updating the Read Codes

    PubMed Central

    Robinson, David; Comp, Dip; Schulz, Erich; Brown, Philip; Price, Colin

    1997-01-01

    Abstract The Read Codes are a hierarchically-arranged controlled clinical vocabulary introduced in the early 1980s and now consisting of three maintained versions of differing complexity. The code sets are dynamic, and are updated quarterly in response to requests from users including clinicians in both primary and secondary care, software suppliers, and advice from a network of specialist healthcare professionals. The codes' continual evolution of content, both across and within versions, highlights tensions between different users and uses of coded clinical data. Internal processes, external interactions and new structural features implemented by the NHS Centre for Coding and Classification (NHSCCC) for user interactive maintenance of the Read Codes are described, and over 2000 items of user feedback episodes received over a 15-month period are analysed. PMID:9391934

  3. Mechanical code comparator

    DOEpatents

    Peter, Frank J.; Dalton, Larry J.; Plummer, David W.

    2002-01-01

    A new class of mechanical code comparators is described which have broad potential for application in safety, surety, and security applications. These devices can be implemented as micro-scale electromechanical systems that isolate a secure or otherwise controlled device until an access code is entered. This access code is converted into a series of mechanical inputs to the mechanical code comparator, which compares the access code to a pre-input combination, entered previously into the mechanical code comparator by an operator at the system security control point. These devices provide extremely high levels of robust security. Being totally mechanical in operation, an access control system properly based on such devices cannot be circumvented by software attack alone.

  4. Generating code adapted for interlinking legacy scalar code and extended vector code

    DOEpatents

    Gschwind, Michael K

    2013-06-04

    Mechanisms for intermixing code are provided. Source code is received for compilation using an extended Application Binary Interface (ABI) that extends a legacy ABI and uses a different register configuration than the legacy ABI. First compiled code is generated based on the source code, the first compiled code comprising code for accommodating the difference in register configurations used by the extended ABI and the legacy ABI. The first compiled code and second compiled code are intermixed to generate intermixed code, the second compiled code being compiled code that uses the legacy ABI. The intermixed code comprises at least one call instruction that is one of a call from the first compiled code to the second compiled code or a call from the second compiled code to the first compiled code. The code for accommodating the difference in register configurations is associated with the at least one call instruction.

  5. 49 CFR 234.269 - Cut-out circuits.

    Code of Federal Regulations, 2012 CFR

    2012-10-01

    ... 49 Transportation 4 2012-10-01 2012-10-01 false Cut-out circuits. 234.269 Section 234.269... circuits. Each cut-out circuit shall be tested at least once every three months to determine that the circuit functions as intended. For purposes of this section, a cut-out circuit is any circuit...

  6. 49 CFR 234.269 - Cut-out circuits.

    Code of Federal Regulations, 2014 CFR

    2014-10-01

    ... 49 Transportation 4 2014-10-01 2014-10-01 false Cut-out circuits. 234.269 Section 234.269... circuits. Each cut-out circuit shall be tested at least once every three months to determine that the circuit functions as intended. For purposes of this section, a cut-out circuit is any circuit...

  7. Phonological coding during reading

    PubMed Central

    Leinenger, Mallorie

    2014-01-01

    The exact role that phonological coding (the recoding of written, orthographic information into a sound based code) plays during silent reading has been extensively studied for more than a century. Despite the large body of research surrounding the topic, varying theories as to the time course and function of this recoding still exist. The present review synthesizes this body of research, addressing the topics of time course and function in tandem. The varying theories surrounding the function of phonological coding (e.g., that phonological codes aid lexical access, that phonological codes aid comprehension and bolster short-term memory, or that phonological codes are largely epiphenomenal in skilled readers) are first outlined, and the time courses that each maps onto (e.g., that phonological codes come online early (pre-lexical) or that phonological codes come online late (post-lexical)) are discussed. Next the research relevant to each of these proposed functions is reviewed, discussing the varying methodologies that have been used to investigate phonological coding (e.g., response time methods, reading while eyetracking or recording EEG and MEG, concurrent articulation) and highlighting the advantages and limitations of each with respect to the study of phonological coding. In response to the view that phonological coding is largely epiphenomenal in skilled readers, research on the use of phonological codes in prelingually, profoundly deaf readers is reviewed. Finally, implications for current models of word identification (activation-verification model (Van Order, 1987), dual-route model (e.g., Coltheart, Rastle, Perry, Langdon, & Ziegler, 2001), parallel distributed processing model (Seidenberg & McClelland, 1989)) are discussed. PMID:25150679

  8. Industrial Computer Codes

    NASA Technical Reports Server (NTRS)

    Shapiro, Wilbur

    1996-01-01

    This is an overview of new and updated industrial codes for seal design and testing. GCYLT (gas cylindrical seals -- turbulent), SPIRALI (spiral-groove seals -- incompressible), KTK (knife to knife) Labyrinth Seal Code, and DYSEAL (dynamic seal analysis) are covered. CGYLT uses G-factors for Poiseuille and Couette turbulence coefficients. SPIRALI is updated to include turbulence and inertia, but maintains the narrow groove theory. KTK labyrinth seal code handles straight or stepped seals. And DYSEAL provides dynamics for the seal geometry.

  9. Dynamic Flux Tubes Form Reservoirs of Stability in Neuronal Circuits

    NASA Astrophysics Data System (ADS)

    Monteforte, Michael; Wolf, Fred

    2012-10-01

    Neurons in cerebral cortical circuits interact by sending and receiving electrical impulses called spikes. The ongoing spiking activity of cortical circuits is fundamental to many cognitive functions including sensory processing, working memory, and decision making. London et al. [Sensitivity to Perturbations In Vivo Implies High Noise and Suggests Rate Coding in Cortex, Nature (London)NATUAS0028-0836 466, 123 (2010).10.1038/nature09086] recently argued that even a single additional spike can cause a cascade of extra spikes that rapidly decorrelate the microstate of the network. Here, we show theoretically in a minimal model of cortical neuronal circuits that single-spike perturbations trigger only a very weak rate response. Nevertheless, single-spike perturbations are found to rapidly decorrelate the microstate of the network, although the dynamics is stable with respect to small perturbations. The coexistence of stable and unstable dynamics results from a system of exponentially separating dynamic flux tubes around stable trajectories in the network’s phase space. The radius of these flux tubes appears to decrease algebraically with neuron number N and connectivity K, which implies that the entropy of the circuit’s repertoire of state sequences scales as Nln⁡(KN).

  10. FAA Smoke Transport Code

    SciTech Connect

    Domino, Stefan; Luketa-Hanlin, Anay; Gallegos, Carlos

    2006-10-27

    FAA Smoke Transport Code, a physics-based Computational Fluid Dynamics tool, which couples heat, mass, and momentum transfer, has been developed to provide information on smoke transport in cargo compartments with various geometries and flight conditions. The software package contains a graphical user interface for specification of geometry and boundary conditions, analysis module for solving the governing equations, and a post-processing tool. The current code was produced by making substantial improvements and additions to a code obtained from a university. The original code was able to compute steady, uniform, isothermal turbulent pressurization. In addition, a preprocessor and postprocessor were added to arrive at the current software package.

  11. Bar Code Labels

    NASA Technical Reports Server (NTRS)

    1988-01-01

    American Bar Codes, Inc. developed special bar code labels for inventory control of space shuttle parts and other space system components. ABC labels are made in a company-developed anodizing aluminum process and consecutively marketed with bar code symbology and human readable numbers. They offer extreme abrasion resistance and indefinite resistance to ultraviolet radiation, capable of withstanding 700 degree temperatures without deterioration and up to 1400 degrees with special designs. They offer high resistance to salt spray, cleaning fluids and mild acids. ABC is now producing these bar code labels commercially or industrial customers who also need labels to resist harsh environments.

  12. Tokamak Systems Code

    SciTech Connect

    Reid, R.L.; Barrett, R.J.; Brown, T.G.; Gorker, G.E.; Hooper, R.J.; Kalsi, S.S.; Metzler, D.H.; Peng, Y.K.M.; Roth, K.E.; Spampinato, P.T.

    1985-03-01

    The FEDC Tokamak Systems Code calculates tokamak performance, cost, and configuration as a function of plasma engineering parameters. This version of the code models experimental tokamaks. It does not currently consider tokamak configurations that generate electrical power or incorporate breeding blankets. The code has a modular (or subroutine) structure to allow independent modeling for each major tokamak component or system. A primary benefit of modularization is that a component module may be updated without disturbing the remainder of the systems code as long as the imput to or output from the module remains unchanged.

  13. MORSE Monte Carlo code

    SciTech Connect

    Cramer, S.N.

    1984-01-01

    The MORSE code is a large general-use multigroup Monte Carlo code system. Although no claims can be made regarding its superiority in either theoretical details or Monte Carlo techniques, MORSE has been, since its inception at ORNL in the late 1960s, the most widely used Monte Carlo radiation transport code. The principal reason for this popularity is that MORSE is relatively easy to use, independent of any installation or distribution center, and it can be easily customized to fit almost any specific need. Features of the MORSE code are described.

  14. The neural circuit basis of learning

    NASA Astrophysics Data System (ADS)

    Patrick, Kaifosh William John

    The astounding capacity for learning ranks among the nervous system's most impressive features. This thesis comprises studies employing varied approaches to improve understanding, at the level of neural circuits, of the brain's capacity for learning. The first part of the thesis contains investigations of hippocampal circuitry -- both theoretical work and experimental work in the mouse Mus musculus -- as a model system for declarative memory. To begin, Chapter 2 presents a theory of hippocampal memory storage and retrieval that reflects nonlinear dendritic processing within hippocampal pyramidal neurons. As a prelude to the experimental work that comprises the remainder of this part, Chapter 3 describes an open source software platform that we have developed for analysis of data acquired with in vivo Ca2+ imaging, the main experimental technique used throughout the remainder of this part of the thesis. As a first application of this technique, Chapter 4 characterizes the content of signaling at synapses between GABAergic neurons of the medial septum and interneurons in stratum oriens of hippocampal area CA1. Chapter 5 then combines these techniques with optogenetic, pharmacogenetic, and pharmacological manipulations to uncover inhibitory circuit mechanisms underlying fear learning. The second part of this thesis focuses on the cerebellum-like electrosensory lobe in the weakly electric mormyrid fish Gnathonemus petersii, as a model system for non-declarative memory. In Chapter 6, we study how short-duration EOD motor commands are recoded into a complex temporal basis in the granule cell layer, which can be used to cancel Purkinje-like cell firing to the longer duration and temporally varying EOD-driven sensory responses. In Chapter 7, we consider not only the temporal aspects of the granule cell code, but also the encoding of body position provided from proprioceptive and efference copy sources. Together these studies clarify how the cerebellum-like circuitry of the

  15. Emergence of Motor Circuit Activity

    PubMed Central

    Law, Chris; Paquet, Michel; Kania, Artur

    2014-01-01

    In the developing nervous system, ordered neuronal activity patterns can occur even in the absence of sensory input and to investigate how these arise, we have used the model system of the embryonic chicken spinal motor circuit, focusing on motor neurons of the lateral motor column (LMC). At the earliest stages of their molecular differentiation, we can detect differences between medial and lateral LMC neurons in terms of expression of neurotransmitter receptor subunits, including CHRNA5, CHRNA7, GRIN2A, GRIK1, HTR1A and HTR1B, as well as the KCC2 transporter. Using patch-clamp recordings we also demonstrate that medial and lateral LMC motor neurons have subtly different activity patterns that reflect the differential expression of neurotransmitter receptor subunits. Using a combination of patch-clamp recordings in single neurons and calcium-imaging of motor neuron populations, we demonstrate that inhibition of nicotinic, muscarinic or GABA-ergic activity, has profound effects of motor circuit activity during the initial stages of neuromuscular junction formation. Finally, by analysing the activity of large populations of motor neurons at different developmental stages, we show that the asynchronous, disordered neuronal activity that occurs at early stages of circuit formation develops into organised, synchronous activity evident at the stage of LMC neuron muscle innervation. In light of the considerable diversity of neurotransmitter receptor expression, activity patterns in the LMC are surprisingly similar between neuronal types, however the emergence of patterned activity, in conjunction with the differential expression of transmitter systems likely leads to the development of near-mature patterns of locomotor activity by perinatal ages. PMID:24722186

  16. Printed circuit dispersive transmission line

    DOEpatents

    Ikezi, H.; Lin-Liu, Y.R.; DeGrassie, J.S.

    1991-08-27

    A printed circuit dispersive transmission line structure is disclosed comprising an insulator, a ground plane formed on one surface of the insulator, a first transmission line formed on a second surface of the insulator, and a second transmission line also formed on the second surface of the insulator and of longer length than the first transmission line and periodically intersecting the first transmission line. In a preferred embodiment, the transmission line structure exhibits highly dispersive characteristics by designing the length of one of the transmission line between two adjacent periodic intersections to be longer than the other. 5 figures.

  17. Inductive storage pulse circuit device

    DOEpatents

    Parsons, William M.; Honig, Emanuel M.

    1984-01-01

    Inductive storage pulse circuit device which is capable of delivering a series of electrical pulses to a load in a sequential manner. Silicon controlled rectifiers as well as spark gap switches can be utilized in accordance with the present invention. A commutation switching array is utilized to produce a reverse current to turn-off the main opening switch. A commutation capacitor produces the reverse current and is initially charged to a predetermined voltage and subsequently charged in alternating directions by the inductive storage current.

  18. Printed circuit dispersive transmission line

    DOEpatents

    Ikezi, Hiroyuki; Lin-Liu, Yuh-Ren; DeGrassie, John S.

    1991-01-01

    A printed circuit dispersive transmission line structure is disclosed comprising an insulator, a ground plane formed on one surface of the insulator, a first transmission line formed on a second surface of the insulator, and a second transmission line also formed on the second surface of the insulator and of longer length than the first transmission line and periodically intersecting the first transmission line. In a preferred embodiment, the transmission line structure exhibits highly dispersive characteristics by designing the length of one of the transmission line between two adjacent periodic intersections to be longer than the other.

  19. Two digital video encoder circuits

    NASA Astrophysics Data System (ADS)

    Eldon, John A.

    1992-11-01

    Central to `multimedia' image processing is the desire to encode computer graphics data into a standard television signal, complete with line, field, and color subcarrier synchronizing information. The numerous incompatibilities between television and computer display standards render this operation far less trivial than it sounds to anyone who hasn't worked with both types of signals. To simplify the task of encoding computer graphics signals into standard NTSC (North America and Japan) or PAL (most of Europe) television format for display, broadcast, or recording, TRW LSI Products Inc. has introduced the two newest members of it multimedia integrated circuit family, the TMC22090 and TMC22190 digital video encoders.

  20. Circuit for Driving Piezoelectric Transducers

    NASA Technical Reports Server (NTRS)

    Randall, David P.; Chapsky, Jacob

    2009-01-01

    The figure schematically depicts an oscillator circuit for driving a piezoelectric transducer to excite vibrations in a mechanical structure. The circuit was designed and built to satisfy application-specific requirements to drive a selected one of 16 such transducers at a regulated amplitude and frequency chosen to optimize the amount of work performed by the transducer and to compensate for both (1) temporal variations of the resonance frequency and damping time of each transducer and (2) initially unknown differences among the resonance frequencies and damping times of different transducers. In other words, the circuit is designed to adjust itself to optimize the performance of whichever transducer is selected at any given time. The basic design concept may be adaptable to other applications that involve the use of piezoelectric transducers in ultrasonic cleaners and other apparatuses in which high-frequency mechanical drives are utilized. This circuit includes three resistor-capacitor networks that, together with the selected piezoelectric transducer, constitute a band-pass filter having a peak response at a frequency of about 2 kHz, which is approximately the resonance frequency of the piezoelectric transducers. Gain for generating oscillations is provided by a power hybrid operational amplifier (U1). A junction field-effect transistor (Q1) in combination with a resistor (R4) is used as a voltage-variable resistor to control the magnitude of the oscillation. The voltage-variable resistor is part of a feedback control loop: Part of the output of the oscillator is rectified and filtered for use as a slow negative feedback to the gate of Q1 to keep the output amplitude constant. The response of this control loop is much slower than 2 kHz and, therefore, does not introduce significant distortion of the oscillator output, which is a fairly clean sine wave. The positive AC feedback needed to sustain oscillations is derived from sampling the current through the

  1. Automatic generation of signal processing integrated circuits

    SciTech Connect

    Pope, S.P.

    1985-01-01

    A system for the automated design of signal processing integrated circuits is described in this thesis. The system is based on a library of circuit cells, and a software package that can configure the cells into complete integrated circuits. The architecture of the cell library is optimized for low and medium bandwidth digital signal processing applications. Circuits designed with the system use a multiprocessor architecture. Input to the system is a design file written in a specialized programming language. Software emulation from the design file is used to verify performance. A two-pass silicon compiler is used to translate the design file into a mask-level description of an integrated circuit. A major goal of the project is to make the system useable by those with little or no formal training in integrated circuits. A second goal is to reduce the time and cost associated with performing an integrated circuit design, while still producing designs which are reasonably efficient in their use of the technology. Development of the system was guided by basic research on appropriate architectures and circuit constructs for signal processors. As part of this research an integrated circuit was designed which performs speech analysis and synthesis. This vocoder circuit is intended for use in low-bit-rate digital speech transmission systems.

  2. Research on universal combinatorial coding.

    PubMed

    Lu, Jun; Zhang, Zhuo; Mo, Juan

    2014-01-01

    The conception of universal combinatorial coding is proposed. Relations exist more or less in many coding methods. It means that a kind of universal coding method is objectively existent. It can be a bridge connecting many coding methods. Universal combinatorial coding is lossless and it is based on the combinatorics theory. The combinational and exhaustive property make it closely related with the existing code methods. Universal combinatorial coding does not depend on the probability statistic characteristic of information source, and it has the characteristics across three coding branches. It has analyzed the relationship between the universal combinatorial coding and the variety of coding method and has researched many applications technologies of this coding method. In addition, the efficiency of universal combinatorial coding is analyzed theoretically. The multicharacteristic and multiapplication of universal combinatorial coding are unique in the existing coding methods. Universal combinatorial coding has theoretical research and practical application value.

  3. Research on universal combinatorial coding.

    PubMed

    Lu, Jun; Zhang, Zhuo; Mo, Juan

    2014-01-01

    The conception of universal combinatorial coding is proposed. Relations exist more or less in many coding methods. It means that a kind of universal coding method is objectively existent. It can be a bridge connecting many coding methods. Universal combinatorial coding is lossless and it is based on the combinatorics theory. The combinational and exhaustive property make it closely related with the existing code methods. Universal combinatorial coding does not depend on the probability statistic characteristic of information source, and it has the characteristics across three coding branches. It has analyzed the relationship between the universal combinatorial coding and the variety of coding method and has researched many applications technologies of this coding method. In addition, the efficiency of universal combinatorial coding is analyzed theoretically. The multicharacteristic and multiapplication of universal combinatorial coding are unique in the existing coding methods. Universal combinatorial coding has theoretical research and practical application value. PMID:24772019

  4. Fast Coding Unit Encoding Mechanism for Low Complexity Video Coding

    PubMed Central

    Wu, Yueying; Jia, Kebin; Gao, Guandong

    2016-01-01

    In high efficiency video coding (HEVC), coding tree contributes to excellent compression performance. However, coding tree brings extremely high computational complexity. Innovative works for improving coding tree to further reduce encoding time are stated in this paper. A novel low complexity coding tree mechanism is proposed for HEVC fast coding unit (CU) encoding. Firstly, this paper makes an in-depth study of the relationship among CU distribution, quantization parameter (QP) and content change (CC). Secondly, a CU coding tree probability model is proposed for modeling and predicting CU distribution. Eventually, a CU coding tree probability update is proposed, aiming to address probabilistic model distortion problems caused by CC. Experimental results show that the proposed low complexity CU coding tree mechanism significantly reduces encoding time by 27% for lossy coding and 42% for visually lossless coding and lossless coding. The proposed low complexity CU coding tree mechanism devotes to improving coding performance under various application conditions. PMID:26999741

  5. The p53 circuit board

    PubMed Central

    Sullivan, Kelly D.; Gallant-Behm, Corrie L.; Henry, Ryan E.; Fraikin, Jean-Luc; Espinosa, Joaquín M.

    2012-01-01

    The p53 tumor suppressor is embedded in a large gene network controlling diverse cellular and organismal phenotypes. Multiple signaling pathways converge onto p53 activation, mostly by relieving the inhibitory effects of its repressors, MDM2 and MDM4. In turn, signals originating from increased p53 activity diverge into distinct effector pathways to deliver a specific cellular response to the activating stimuli. Much attention has been devoted to dissecting how the various input pathways trigger p53 activation and how the activity of the p53 protein itself can be modulated by a plethora of co-factors and post-translational modifications. In this review we will focus instead on the multiple configurations of the effector pathways. We will discuss how p53-generated signals are transmitted, amplified, resisted and eventually integrated by downstream gene circuits operating at the transcriptional, post-transcriptional and post-translational level. We will also discuss how context-dependent variations in these gene circuits define the cellular response to p53 activation and how they may impact the clinical efficacy of p53-based targeted therapies. PMID:22333261

  6. Cortical circuits for perceptual inference.

    PubMed

    Friston, Karl; Kiebel, Stefan

    2009-10-01

    This paper assumes that cortical circuits have evolved to enable inference about the causes of sensory input received by the brain. This provides a principled specification of what neural circuits have to achieve. Here, we attempt to address how the brain makes inferences by casting inference as an optimisation problem. We look at how the ensuing recognition dynamics could be supported by directed connections and message-passing among neuronal populations, given our knowledge of intrinsic and extrinsic neuronal connections. We assume that the brain models the world as a dynamic system, which imposes causal structure on the sensorium. Perception is equated with the optimisation or inversion of this internal model, to explain sensory input. Given a model of how sensory data are generated, we use a generic variational approach to model inversion to furnish equations that prescribe recognition; i.e., the dynamics of neuronal activity that represents the causes of sensory input. Here, we focus on a model whose hierarchical and dynamical structure enables simulated brains to recognise and predict sequences of sensory states. We first review these models and their inversion under a variational free-energy formulation. We then show that the brain has the necessary infrastructure to implement this inversion and present stimulations using synthetic birds that generate and recognise birdsongs.

  7. Cortical circuits for perceptual inference.

    PubMed

    Friston, Karl; Kiebel, Stefan

    2009-10-01

    This paper assumes that cortical circuits have evolved to enable inference about the causes of sensory input received by the brain. This provides a principled specification of what neural circuits have to achieve. Here, we attempt to address how the brain makes inferences by casting inference as an optimisation problem. We look at how the ensuing recognition dynamics could be supported by directed connections and message-passing among neuronal populations, given our knowledge of intrinsic and extrinsic neuronal connections. We assume that the brain models the world as a dynamic system, which imposes causal structure on the sensorium. Perception is equated with the optimisation or inversion of this internal model, to explain sensory input. Given a model of how sensory data are generated, we use a generic variational approach to model inversion to furnish equations that prescribe recognition; i.e., the dynamics of neuronal activity that represents the causes of sensory input. Here, we focus on a model whose hierarchical and dynamical structure enables simulated brains to recognise and predict sequences of sensory states. We first review these models and their inversion under a variational free-energy formulation. We then show that the brain has the necessary infrastructure to implement this inversion and present stimulations using synthetic birds that generate and recognise birdsongs. PMID:19635656

  8. Linking oscillations in cerebellar circuits

    PubMed Central

    Courtemanche, Richard; Robinson, Jennifer C.; Aponte, Daniel I.

    2013-01-01

    In many neuroscience fields, the study of local and global rhythmicity has been receiving increasing attention. These network influences could directly impact on how neuronal groups interact together, organizing for different contexts. The cerebellar cortex harbors a variety of such local circuit rhythms, from the rhythms in the cerebellar cortex per se, or those dictated from important afferents. We present here certain cerebellar oscillatory phenomena that have been recorded in rodents and primates. Those take place in a range of frequencies: from the more known oscillations in the 4–25 Hz band, such as the olivocerebellar oscillatory activity and the granule cell layer oscillations, to the more recently reported slow (<1 Hz oscillations), and the fast (>150 Hz) activity in the Purkinje cell layer. Many of these oscillations appear spontaneously in the circuits, and are modulated by behavioral imperatives. We review here how those oscillations are recorded, some of their modulatory mechanisms, and also identify some of the cerebellar nodes where they could interact. A particular emphasis has been placed on how these oscillations could be modulated by movement and certain neuropathological manifestations. Many of those oscillations could have a definite impact on the way information is processed in the cerebellum and how it interacts with other structures in a variety of contexts. PMID:23908606

  9. Code of Ethics

    ERIC Educational Resources Information Center

    Division for Early Childhood, Council for Exceptional Children, 2009

    2009-01-01

    The Code of Ethics of the Division for Early Childhood (DEC) of the Council for Exceptional Children is a public statement of principles and practice guidelines supported by the mission of DEC. The foundation of this Code is based on sound ethical reasoning related to professional practice with young children with disabilities and their families…

  10. Lichenase and coding sequences

    DOEpatents

    Li, Xin-Liang; Ljungdahl, Lars G.; Chen, Huizhong

    2000-08-15

    The present invention provides a fungal lichenase, i.e., an endo-1,3-1,4-.beta.-D-glucanohydrolase, its coding sequence, recombinant DNA molecules comprising the lichenase coding sequences, recombinant host cells and methods for producing same. The present lichenase is from Orpinomyces PC-2.

  11. Legacy Code Modernization

    NASA Technical Reports Server (NTRS)

    Hribar, Michelle R.; Frumkin, Michael; Jin, Haoqiang; Waheed, Abdul; Yan, Jerry; Saini, Subhash (Technical Monitor)

    1998-01-01

    Over the past decade, high performance computing has evolved rapidly; systems based on commodity microprocessors have been introduced in quick succession from at least seven vendors/families. Porting codes to every new architecture is a difficult problem; in particular, here at NASA, there are many large CFD applications that are very costly to port to new machines by hand. The LCM ("Legacy Code Modernization") Project is the development of an integrated parallelization environment (IPE) which performs the automated mapping of legacy CFD (Fortran) applications to state-of-the-art high performance computers. While most projects to port codes focus on the parallelization of the code, we consider porting to be an iterative process consisting of several steps: 1) code cleanup, 2) serial optimization,3) parallelization, 4) performance monitoring and visualization, 5) intelligent tools for automated tuning using performance prediction and 6) machine specific optimization. The approach for building this parallelization environment is to build the components for each of the steps simultaneously and then integrate them together. The demonstration will exhibit our latest research in building this environment: 1. Parallelizing tools and compiler evaluation. 2. Code cleanup and serial optimization using automated scripts 3. Development of a code generator for performance prediction 4. Automated partitioning 5. Automated insertion of directives. These demonstrations will exhibit the effectiveness of an automated approach for all the steps involved with porting and tuning a legacy code application for a new architecture.

  12. Synthesizing Certified Code

    NASA Technical Reports Server (NTRS)

    Whalen, Michael; Schumann, Johann; Fischer, Bernd

    2002-01-01

    Code certification is a lightweight approach to demonstrate software quality on a formal level. Its basic idea is to require producers to provide formal proofs that their code satisfies certain quality properties. These proofs serve as certificates which can be checked independently. Since code certification uses the same underlying technology as program verification, it also requires many detailed annotations (e.g., loop invariants) to make the proofs possible. However, manually adding theses annotations to the code is time-consuming and error-prone. We address this problem by combining code certification with automatic program synthesis. We propose an approach to generate simultaneously, from a high-level specification, code and all annotations required to certify generated code. Here, we describe a certification extension of AUTOBAYES, a synthesis tool which automatically generates complex data analysis programs from compact specifications. AUTOBAYES contains sufficient high-level domain knowledge to generate detailed annotations. This allows us to use a general-purpose verification condition generator to produce a set of proof obligations in first-order logic. The obligations are then discharged using the automated theorem E-SETHEO. We demonstrate our approach by certifying operator safety for a generated iterative data classification program without manual annotation of the code.

  13. Analog VLSI neural network integrated circuits

    NASA Astrophysics Data System (ADS)

    Kub, F. J.; Moon, K. K.; Just, E. A.

    1991-12-01

    Two analog very large scale integration (VLSI) vector matrix multiplier integrated circuit chips were designed, fabricated, and partially tested. They can perform both vector-matrix and matrix-matrix multiplication operations at high speeds. The 32 by 32 vector-matrix multiplier chip and the 128 by 64 vector-matrix multiplier chip were designed to perform 300 million and 3 billion multiplications per second, respectively. An additional circuit that has been developed is a continuous-time adaptive learning circuit. The performance achieved thus far for this circuit is an adaptivity of 28 dB at 300 KHz and 11 dB at 15 MHz. This circuit has demonstrated greater than two orders of magnitude higher frequency of operation than any previous adaptive learning circuit.

  14. Physical synthesis of quantum circuits using templates

    NASA Astrophysics Data System (ADS)

    Mirkhani, Zahra; Mohammadzadeh, Naser

    2016-06-01

    Similar to traditional CMOS circuits, quantum circuit design flow is divided into two main processes: logic synthesis and physical design. Addressing the limitations imposed on optimization of the quantum circuit metrics because of no information sharing between logic synthesis and physical design processes, the concept of "physical synthesis" was introduced for quantum circuit flow, and a few techniques were proposed for it. Following that concept, in this paper a new approach for physical synthesis inspired by template matching idea in quantum logic synthesis is proposed to improve the latency of quantum circuits. Experiments show that by using template matching as a physical synthesis approach, the latency of quantum circuits can be improved by more than 23.55 % on average.

  15. Diode-quad bridge circuit means

    NASA Technical Reports Server (NTRS)

    Harrison, D. R.; Dimeff, J. (Inventor)

    1975-01-01

    Diode-quad bridge circuit means is described for use as a transducer circuit or as a discriminator circuit. It includes: (1) a diode bridge having first, second, third, and fourth bridge terminals consecutively coupled together by four diodes polarized in circulating relationship; (2) a first impedance connected between the second bridge terminal and a circuit ground; (3) a second impedance connected between the fourth bridge terminal and the circuit ground; (4) a signal source having a first source terminal capacitively coupled to the first and third bridge terminals, and a second source terminal connected to the circuit ground; and (5) an output terminal coupled to the first bridge terminal and at which an output signal may be taken.

  16. MULTI-ELECTRODE TUBE PULSE MEMORY CIRCUIT

    DOEpatents

    Gundlach, J.C.; Reeves, J.B.

    1958-05-20

    Control circuits are described for pulse memory devices for scalers and the like, and more particularly to a driving or energizing circuit for a polycathode gaseous discharge tube having an elongated anode and a successive series of cathodes spaced opposite the anode along its length. The circuit is so arranged as to utilize an arc discharge between the anode and a cathode to count a series of pulses. Upon application of an input pulse the discharge is made to occur between the anode and the next successive cathode, and an output pulse is produced when a particular subsequent cathode is reached. The circuit means for transfering the discharge by altering the anode potential and potential of the cathodes and interconnecting the cathodes constitutes the novel aspects of the invention. A low response time and reduced number of circuit components are the practical advantages of the described circuit.

  17. Clocking and synchronization circuits in multiprocessor systems

    SciTech Connect

    Jeong, D.K.

    1989-01-01

    Microprocessors based on RISC (Reduced Instruction Set Computer) concepts have demonstrated an ability to provide more computing power at a given level of integration than conventional microprocessors. The next step is multiprocessors composed of RISC processing elements. Communication bandwidth among such microprocessors is critical in achieving efficient hardware utilization. This thesis focuses on the communication capability of VLSI circuits and presents new circuit techniques as a guide to build an interconnection network of VLSI microprocessors. Circuit techniques for PLL-based clock generation are described along with stability criteria. The main objective of the circuit is to realize a zero delay buffer. Experimental results show the feasibility of such circuits in VLSI. Synchronizer circuit configurations in both bipolar and MOS technology that best utilize each device, or overcome the technology limit using a bandwidth doubling technique are shown. Interface techniques including handshake mechanisms in such a system are also described.

  18. Realizing a supercapacitor in an electrical circuit

    NASA Astrophysics Data System (ADS)

    Fukuhara, Mikio; Kuroda, Tomoyuki; Hasegawa, Fumihiko

    2014-11-01

    Capacitors are commonly used in electronic resonance circuits; however, capacitors have not been used for storing large amounts of electrical energy in electrical circuits. Here, we report a superior RC circuit which serves as an electrical storage system characterized by quick charging and long-term discharging of electricity. The improved energy storage characteristics in this mixed electric circuit (R1 + R2C1) with small resistor R1, large resistor R2, and large capacitor C1 are derived from the damming effect by large R2 in simple parallel R2C1 circuit. However, no research work has been carried out previously on the use of capacitors as electrical energy storage devices in circuits. Combined with nanotechnology, we hope that our finding will play a remarkable role in a variety of applications such as hybrid electric vehicles and backup power supplies.

  19. Analog VLSI neural network integrated circuits

    NASA Technical Reports Server (NTRS)

    Kub, F. J.; Moon, K. K.; Just, E. A.

    1991-01-01

    Two analog very large scale integration (VLSI) vector matrix multiplier integrated circuit chips were designed, fabricated, and partially tested. They can perform both vector-matrix and matrix-matrix multiplication operations at high speeds. The 32 by 32 vector-matrix multiplier chip and the 128 by 64 vector-matrix multiplier chip were designed to perform 300 million and 3 billion multiplications per second, respectively. An additional circuit that has been developed is a continuous-time adaptive learning circuit. The performance achieved thus far for this circuit is an adaptivity of 28 dB at 300 KHz and 11 dB at 15 MHz. This circuit has demonstrated greater than two orders of magnitude higher frequency of operation than any previous adaptive learning circuit.

  20. Physical synthesis of quantum circuits using templates

    NASA Astrophysics Data System (ADS)

    Mirkhani, Zahra; Mohammadzadeh, Naser

    2016-10-01

    Similar to traditional CMOS circuits, quantum circuit design flow is divided into two main processes: logic synthesis and physical design. Addressing the limitations imposed on optimization of the quantum circuit metrics because of no information sharing between logic synthesis and physical design processes, the concept of " physical synthesis" was introduced for quantum circuit flow, and a few techniques were proposed for it. Following that concept, in this paper a new approach for physical synthesis inspired by template matching idea in quantum logic synthesis is proposed to improve the latency of quantum circuits. Experiments show that by using template matching as a physical synthesis approach, the latency of quantum circuits can be improved by more than 23.55 % on average.

  1. A qualitative approach to teaching capacitive circuits

    NASA Astrophysics Data System (ADS)

    Smith, David P.; Kampen, Paul van

    2013-05-01

    We have investigated students' qualitative understanding of dc circuits containing resistors and a capacitor. We found that a year after traditional lecture instruction as part of an introductory physics course, most students were unable to predict the behavior of a series circuit consisting of a battery, a bulb, and a capacitor. Among the difficulties identified we found that almost half of the students implicitly abandoned the idea that a complete circuit is necessary for a bulb to light when a capacitor is introduced into the circuit. We have developed curriculum that enables students to construct a phenomenological model in which they liken the behavior of a capacitor to that of a wire, a switch, and a battery; this allows them to qualitatively describe circuits with batteries, bulbs, and capacitors. We have also developed curriculum on the determination of RC times. Post-test results show a significant increase in understanding of capacitive circuits.

  2. Combustion chamber analysis code

    NASA Astrophysics Data System (ADS)

    Przekwas, A. J.; Lai, Y. G.; Krishnan, A.; Avva, R. K.; Giridharan, M. G.

    1993-05-01

    A three-dimensional, time dependent, Favre averaged, finite volume Navier-Stokes code has been developed to model compressible and incompressible flows (with and without chemical reactions) in liquid rocket engines. The code has a non-staggered formulation with generalized body-fitted-coordinates (BFC) capability. Higher order differencing methodologies such as MUSCL and Osher-Chakravarthy schemes are available. Turbulent flows can be modeled using any of the five turbulent models present in the code. A two-phase, two-liquid, Lagrangian spray model has been incorporated into the code. Chemical equilibrium and finite rate reaction models are available to model chemically reacting flows. The discrete ordinate method is used to model effects of thermal radiation. The code has been validated extensively against benchmark experimental data and has been applied to model flows in several propulsion system components of the SSME and the STME.

  3. Combustion chamber analysis code

    NASA Technical Reports Server (NTRS)

    Przekwas, A. J.; Lai, Y. G.; Krishnan, A.; Avva, R. K.; Giridharan, M. G.

    1993-01-01

    A three-dimensional, time dependent, Favre averaged, finite volume Navier-Stokes code has been developed to model compressible and incompressible flows (with and without chemical reactions) in liquid rocket engines. The code has a non-staggered formulation with generalized body-fitted-coordinates (BFC) capability. Higher order differencing methodologies such as MUSCL and Osher-Chakravarthy schemes are available. Turbulent flows can be modeled using any of the five turbulent models present in the code. A two-phase, two-liquid, Lagrangian spray model has been incorporated into the code. Chemical equilibrium and finite rate reaction models are available to model chemically reacting flows. The discrete ordinate method is used to model effects of thermal radiation. The code has been validated extensively against benchmark experimental data and has been applied to model flows in several propulsion system components of the SSME and the STME.

  4. Energy Conservation Code Decoded

    SciTech Connect

    Cole, Pam C.; Taylor, Zachary T.

    2006-09-01

    Designing an energy-efficient, affordable, and comfortable home is a lot easier thanks to a slime, easier to read booklet, the 2006 International Energy Conservation Code (IECC), published in March 2006. States, counties, and cities have begun reviewing the new code as a potential upgrade to their existing codes. Maintained under the public consensus process of the International Code Council, the IECC is designed to do just what its title says: promote the design and construction of energy-efficient homes and commercial buildings. Homes in this case means traditional single-family homes, duplexes, condominiums, and apartment buildings having three or fewer stories. The U.S. Department of Energy, which played a key role in proposing the changes that resulted in the new code, is offering a free training course that covers the residential provisions of the 2006 IECC.

  5. Evolving genetic code

    PubMed Central

    OHAMA, Takeshi; INAGAKI, Yuji; BESSHO, Yoshitaka; OSAWA, Syozo

    2008-01-01

    In 1985, we reported that a bacterium, Mycoplasma capricolum, used a deviant genetic code, namely UGA, a “universal” stop codon, was read as tryptophan. This finding, together with the deviant nuclear genetic codes in not a few organisms and a number of mitochondria, shows that the genetic code is not universal, and is in a state of evolution. To account for the changes in codon meanings, we proposed the codon capture theory stating that all the code changes are non-disruptive without accompanied changes of amino acid sequences of proteins. Supporting evidence for the theory is presented in this review. A possible evolutionary process from the ancient to the present-day genetic code is also discussed. PMID:18941287

  6. A Generalized Fast Frequency Sweep Algorithm for Coupled Circuit-EM Simulations

    SciTech Connect

    Ouyang, G; Jandhyala, V; Champagne, N; Sharpe, R; Fasenfest, B J; Rockway, J D

    2004-12-14

    An Asymptotic Wave Expansion (AWE) technique is implemented into the EIGER computational electromagnetics code. The AWE fast frequency sweep is formed by separating the components of the integral equations by frequency dependence, then using this information to find a rational function approximation of the results. The standard AWE method is generalized to work for several integral equations, including the EFIE for conductors and the PMCHWT for dielectrics. The method is also expanded to work for two types of coupled circuit-EM problems as well as lumped load circuit elements. After a simple bisecting adaptive sweep algorithm is developed, dramatic speed improvements are seen for several example problems.

  7. Monitoring transients in low inductance circuits

    DOEpatents

    Guilford, R.P.; Rosborough, J.R.

    1985-10-21

    The instant invention relates to methods of and apparatus for monitoring transients in low inductance circuits and to a probe utilized to practice said method and apparatus. More particularly, the instant invention relates to methods of and apparatus for monitoring low inductance circuits, wherein the low inductance circuits include a pair of flat cable transmission lines. The instant invention is further directed to a probe for use in monitoring pairs of flat cable transmission lines.

  8. Cost optimization in low volume VLSI circuits

    NASA Technical Reports Server (NTRS)

    Cook, K. B., Jr.; Kerns, D. V., Jr.

    1982-01-01

    The relationship of integrated circuit (IC) cost to electronic system cost is developed using models for integrated circuit cost which are based on design/fabrication approach. Emphasis is on understanding the relationship between cost and volume for custom circuits suitable for NASA applications. In this report, reliability is a major consideration in the models developed. Results are given for several typical IC designs using off the shelf, full custom, and semicustom IC's with single and double level metallization.

  9. A microwave dielectric resonant oscillatory circuit

    NASA Astrophysics Data System (ADS)

    Sigov, A. S.; Shvartsburg, A. B.

    2016-07-01

    Bias currents in a thin dielectric nonconducting torus are investigated, and the resonant mode of excitation of these currents is established. The similarity of the frequency spectrum of such a dielectric element to the spectra of a classical Thomson oscillatory circuit and a metamaterial with negative permittivity is demonstrated. The resonant frequency of electromagnetic oscillations of the ring dielectric circuit and magnetic and electric fields of such a circuit under resonant excitation are determined.

  10. Integrated-Circuit Pseudorandom-Number Generator

    NASA Technical Reports Server (NTRS)

    Steelman, James E.; Beasley, Jeff; Aragon, Michael; Ramirez, Francisco; Summers, Kenneth L.; Knoebel, Arthur

    1992-01-01

    Integrated circuit produces 8-bit pseudorandom numbers from specified probability distribution, at rate of 10 MHz. Use of Boolean logic, circuit implements pseudorandom-number-generating algorithm. Circuit includes eight 12-bit pseudorandom-number generators, outputs are uniformly distributed. 8-bit pseudorandom numbers satisfying specified nonuniform probability distribution are generated by processing uniformly distributed outputs of eight 12-bit pseudorandom-number generators through "pipeline" of D flip-flops, comparators, and memories implementing conditional probabilities on zeros and ones.

  11. Gas-Sensing Flip-Flop Circuits

    NASA Technical Reports Server (NTRS)

    Buehler, Martin G.; Blaes, Brent R.; Williams, Roger; Ryan, Margaret A.

    1995-01-01

    Gas-sensing integrated circuits consisting largely of modified static random-access memories (SRAMs) undergoing development, building on experience gained in use of modified SRAMs as radiation sensors. Each SRAM memory cell includes flip-flop circuit; sensors exploit metastable state that lies between two stable states (corresponding to binary logic states) of flip-flop circuit. Voltages of metastable states vary with exposures of gas-sensitive resistors.

  12. Electronic circuits for communications systems: A compilation

    NASA Technical Reports Server (NTRS)

    1972-01-01

    The compilation of electronic circuits for communications systems is divided into thirteen basic categories, each representing an area of circuit design and application. The compilation items are moderately complex and, as such, would appeal to the applications engineer. However, the rationale for the selection criteria was tailored so that the circuits would reflect fundamental design principles and applications, with an additional requirement for simplicity whenever possible.

  13. Expert system to design communications circuits

    SciTech Connect

    Tolendino, L.F.; Vahle, M.O.

    1986-07-01

    An expert system has been created to aid the design of fiber optic based communications circuits. The design system is based on an Apollo workstation, LISP and CPSL, an in-house developed expert system language. The optical circuit is taken from design specification through hardware selection and circuit routing to the production of detailed schematics and routing guides. A database containing the entire fiber optic trunk system is also maintained.

  14. The Development of a Portable Hard Disk Encryption/Decryption System with a MEMS Coded Lock

    PubMed Central

    Zhang, Weiping; Chen, Wenyuan; Tang, Jian; Xu, Peng; Li, Yibin; Li, Shengyong

    2009-01-01

    In this paper, a novel portable hard-disk encryption/decryption system with a MEMS coded lock is presented, which can authenticate the user and provide the key for the AES encryption/decryption module. The portable hard-disk encryption/decryption system is composed of the authentication module, the USB portable hard-disk interface card, the ATA protocol command decoder module, the data encryption/decryption module, the cipher key management module, the MEMS coded lock controlling circuit module, the MEMS coded lock and the hard disk. The ATA protocol circuit, the MEMS control circuit and AES encryption/decryption circuit are designed and realized by FPGA(Field Programmable Gate Array). The MEMS coded lock with two couplers and two groups of counter-meshing-gears (CMGs) are fabricated by a LIGA-like process and precision engineering method. The whole prototype was fabricated and tested. The test results show that the user's password could be correctly discriminated by the MEMS coded lock, and the AES encryption module could get the key from the MEMS coded lock. Moreover, the data in the hard-disk could be encrypted or decrypted, and the read-write speed of the dataflow could reach 17 MB/s in Ultra DMA mode. PMID:22291566

  15. Modeling of transformers using circuit simulators

    SciTech Connect

    Archer, W.E.; Deveney, M.F.; Nagel, R.L.

    1994-07-01

    Transformers of two different designs; and unencapsulated pot core and an encapsulated toroidal core have been modeled for circuit analysis with circuit simulation tools. We selected MicroSim`s PSPICE and Anology`s SABER as the simulation tools and used experimental BH Loop and network analyzer measurements to generate the needed input data. The models are compared for accuracy and convergence using the circuit simulators. Results are presented which demonstrate the effects on circuit performance from magnetic core losses, eddy currents, and mechanical stress on the magnetic cores.

  16. Precision measurements of a simple chaotic circuit

    NASA Astrophysics Data System (ADS)

    Kiers, Ken; Schmidt, Dory; Sprott, J. C.

    2004-04-01

    We describe a simple nonlinear electrical circuit that can be used to study chaotic phenomena. The circuit employs simple electronic elements such as diodes, resistors, and operational amplifiers, and is easy to construct. A novel feature of the circuit is its use of an almost ideal nonlinear element, which is straightforward to model theoretically and leads to excellent agreement between experiment and theory. For example, comparisons of bifurcation points and power spectra give agreement to within 1%. The circuit yields a broad range of behavior and is well suited for qualitative demonstrations and as a serious research tool.

  17. Digital circuits for computer applications: A compilation

    NASA Technical Reports Server (NTRS)

    1972-01-01

    The innovations in this updated series of compilations dealing with electronic technology represent a carefully selected collection of digital circuits which have direct application in computer oriented systems. In general, the circuits have been selected as representative items of each section and have been included on their merits of having universal applications in digital computers and digital data processing systems. As such, they should have wide appeal to the professional engineer and scientist who encounter the fundamentals of digital techniques in their daily activities. The circuits are grouped as digital logic circuits, analog to digital converters, and counters and shift registers.

  18. Q-switched laser prelase detection circuit

    NASA Technical Reports Server (NTRS)

    Lockard, George E.

    1991-01-01

    A compact electronic circuit was developed to detect prelasing in Q-swithed pulsed laser systems and once detected to shut down the laser before the next laser pulse occurs. The circuit is small, compact, and uses a minimum of components which makes it quite economical, thus readily lending itself to commercial applications. It can easily be incorporated into virtually any Q-switched laser system or reliability of a laser system by reducing a source of possible costly optical damage. The circuit operation and instrument requirements necessary to incorporate the circuit into a laser system are discussed.

  19. Circuit For Control Of Electromechanical Prosthetic Hand

    NASA Technical Reports Server (NTRS)

    Bozeman, Richard J., Jr.

    1995-01-01

    Proposed circuit for control of electromechanical prosthetic hand derives electrical control signals from shoulder movements. Updated, electronic version of prosthesis, that includes two hooklike fingers actuated via cables from shoulder harness. Circuit built around favored shoulder harness, provides more dexterous movement, without incurring complexity of computer-controlled "bionic" or hydraulically actuated devices. Additional harness and potentiometer connected to similar control circuit mounted on other shoulder. Used to control stepping motor rotating hand about prosthetic wrist to one of number of angles consistent with number of digital outputs. Finger-control signals developed by circuit connected to first shoulder harness transmitted to prosthetic hand via sliprings at prosthetic wrist joint.

  20. Hybrid stretchable circuits on silicone substrate

    SciTech Connect

    Robinson, A. Aziz, A.; Liu, Q.; Suo, Z.; Lacour, S. P.

    2014-04-14

    When rigid and stretchable components are integrated onto a single elastic carrier substrate, large strain heterogeneities appear in the vicinity of the deformable-non-deformable interfaces. In this paper, we report on a generic approach to manufacture hybrid stretchable circuits where commercial electronic components can be mounted on a stretchable circuit board. Similar to printed circuit board development, the components are electrically bonded on the elastic substrate and interconnected with stretchable electrical traces. The substrate—a silicone matrix carrying concentric rigid disks—ensures both the circuit elasticity and the mechanical integrity of the most fragile materials.

  1. Wafer-scale graphene integrated circuit.

    PubMed

    Lin, Yu-Ming; Valdes-Garcia, Alberto; Han, Shu-Jen; Farmer, Damon B; Meric, Inanc; Sun, Yanning; Wu, Yanqing; Dimitrakopoulos, Christos; Grill, Alfred; Avouris, Phaedon; Jenkins, Keith A

    2011-06-10

    A wafer-scale graphene circuit was demonstrated in which all circuit components, including graphene field-effect transistor and inductors, were monolithically integrated on a single silicon carbide wafer. The integrated circuit operates as a broadband radio-frequency mixer at frequencies up to 10 gigahertz. These graphene circuits exhibit outstanding thermal stability with little reduction in performance (less than 1 decibel) between 300 and 400 kelvin. These results open up possibilities of achieving practical graphene technology with more complex functionality and performance.

  2. Predicting the reliability of electronic circuits.

    SciTech Connect

    Loescher, Douglas H.

    2004-06-01

    Procedures to predict the reliability of electrical circuits are discussed. Three cases are introduced and discussed. In Case 1, an analyst predicts the probability of any failure in the intended relations between circuit inputs and circuit outputs. In Case 2, an analyst predicts the probability that specified unintended outputs would occur. In Case 3, an analyst considers coupling between circuits. Logic models are given for the three cases, and sources of failure probabilities of components are mentioned. Methods of analysis are given, software tools are mentioned, and recommendations for presentation and review of results are discussed.

  3. Quantum convolutional codes derived from constacyclic codes

    NASA Astrophysics Data System (ADS)

    Yan, Tingsu; Huang, Xinmei; Tang, Yuansheng

    2014-12-01

    In this paper, three families of quantum convolutional codes are constructed. The first one and the second one can be regarded as a generalization of Theorems 3, 4, 7 and 8 [J. Chen, J. Li, F. Yang and Y. Huang, Int. J. Theor. Phys., doi:10.1007/s10773-014-2214-6 (2014)], in the sense that we drop the constraint q ≡ 1 (mod 4). Furthermore, the second one and the third one attain the quantum generalized Singleton bound.

  4. View of first bank of circuit towers on Arizona side ...

    Library of Congress Historic Buildings Survey, Historic Engineering Record, Historic Landscapes Survey

    View of first bank of circuit towers on Arizona side of canyon. Photograph taken from Nevada side of canyon. Left tower supports Circuit 8, second from left tower supports Circuit 9, middle tower supports Circuit 10, second from right tower supports Circuit 11, and right tower supports Circuit 12, view southeast. - Hoover Dam, Circuits 1-15, U.S. Highway 93, Boulder City, Clark County, NV

  5. RBMK-LOCA-Analyses with the ATHLET-Code

    SciTech Connect

    Petry, A.; Domoradov, A.; Finjakin, A.

    1995-09-01

    The scientific technical cooperation between Germany and Russia includes the area of adaptation of several German codes for the Russian-designed RBMK-reactor. One point of this cooperation is the adaptation of the Thermal-Hydraulic code ATHLET (Analyses of the Thermal-Hydraulics of LEaks and Transients), for RBMK-specific safety problems. This paper contains a short description of a RBMK-1000 reactor circuit. Furthermore, the main features of the thermal-hydraulic code ATHLET are presented. The main assumptions for the ATHLET-RBMK model are discussed. As an example for the application, the results of test calculations concerning a guillotine type rupture of a distribution group header are presented and discussed, and the general analysis conditions are described. A comparison with corresponding RELAP-calculations is given. This paper gives an overview on some problems posed and experience by application of Western best-estimate codes for RBMK-calculations.

  6. Adaptive neural coding: from biological to behavioral decision-making

    PubMed Central

    Louie, Kenway; Glimcher, Paul W.; Webb, Ryan

    2015-01-01

    Empirical decision-making in diverse species deviates from the predictions of normative choice theory, but why such suboptimal behavior occurs is unknown. Here, we propose that deviations from optimality arise from biological decision mechanisms that have evolved to maximize choice performance within intrinsic biophysical constraints. Sensory processing utilizes specific computations such as divisive normalization to maximize information coding in constrained neural circuits, and recent evidence suggests that analogous computations operate in decision-related brain areas. These adaptive computations implement a relative value code that may explain the characteristic context-dependent nature of behavioral violations of classical normative theory. Examining decision-making at the computational level thus provides a crucial link between the architecture of biological decision circuits and the form of empirical choice behavior. PMID:26722666

  7. Pyramid image codes

    NASA Technical Reports Server (NTRS)

    Watson, Andrew B.

    1990-01-01

    All vision systems, both human and machine, transform the spatial image into a coded representation. Particular codes may be optimized for efficiency or to extract useful image features. Researchers explored image codes based on primary visual cortex in man and other primates. Understanding these codes will advance the art in image coding, autonomous vision, and computational human factors. In cortex, imagery is coded by features that vary in size, orientation, and position. Researchers have devised a mathematical model of this transformation, called the Hexagonal oriented Orthogonal quadrature Pyramid (HOP). In a pyramid code, features are segregated by size into layers, with fewer features in the layers devoted to large features. Pyramid schemes provide scale invariance, and are useful for coarse-to-fine searching and for progressive transmission of images. The HOP Pyramid is novel in three respects: (1) it uses a hexagonal pixel lattice, (2) it uses oriented features, and (3) it accurately models most of the prominent aspects of primary visual cortex. The transform uses seven basic features (kernels), which may be regarded as three oriented edges, three oriented bars, and one non-oriented blob. Application of these kernels to non-overlapping seven-pixel neighborhoods yields six oriented, high-pass pyramid layers, and one low-pass (blob) layer.

  8. Report number codes

    SciTech Connect

    Nelson, R.N.

    1985-05-01

    This publication lists all report number codes processed by the Office of Scientific and Technical Information. The report codes are substantially based on the American National Standards Institute, Standard Technical Report Number (STRN)-Format and Creation Z39.23-1983. The Standard Technical Report Number (STRN) provides one of the primary methods of identifying a specific technical report. The STRN consists of two parts: The report code and the sequential number. The report code identifies the issuing organization, a specific program, or a type of document. The sequential number, which is assigned in sequence by each report issuing entity, is not included in this publication. Part I of this compilation is alphabetized by report codes followed by issuing installations. Part II lists the issuing organization followed by the assigned report code(s). In both Parts I and II, the names of issuing organizations appear for the most part in the form used at the time the reports were issued. However, for some of the more prolific installations which have had name changes, all entries have been merged under the current name.

  9. More About Vector Adaptive/Predictive Coding Of Speech

    NASA Technical Reports Server (NTRS)

    Jedrey, Thomas C.; Gersho, Allen

    1992-01-01

    Report presents additional information about digital speech-encoding and -decoding system described in "Vector Adaptive/Predictive Encoding of Speech" (NPO-17230). Summarizes development of vector adaptive/predictive coding (VAPC) system and describes basic functions of algorithm. Describes refinements introduced enabling receiver to cope with errors. VAPC algorithm implemented in integrated-circuit coding/decoding processors (codecs). VAPC and other codecs tested under variety of operating conditions. Tests designed to reveal effects of various background quiet and noisy environments and of poor telephone equipment. VAPC found competitive with and, in some respects, superior to other 4.8-kb/s codecs and other codecs of similar complexity.

  10. Scaling of graphene integrated circuits.

    PubMed

    Bianchi, Massimiliano; Guerriero, Erica; Fiocco, Marco; Alberti, Ruggero; Polloni, Laura; Behnam, Ashkan; Carrion, Enrique A; Pop, Eric; Sordan, Roman

    2015-05-01

    The influence of transistor size reduction (scaling) on the speed of realistic multi-stage integrated circuits (ICs) represents the main performance metric of a given transistor technology. Despite extensive interest in graphene electronics, scaling efforts have so far focused on individual transistors rather than multi-stage ICs. Here we study the scaling of graphene ICs based on transistors from 3.3 to 0.5 μm gate lengths and with different channel widths, access lengths, and lead thicknesses. The shortest gate delay of 31 ps per stage was obtained in sub-micron graphene ROs oscillating at 4.3 GHz, which is the highest oscillation frequency obtained in any strictly low-dimensional material to date. We also derived the fundamental Johnson limit, showing that scaled graphene ICs could be used at high frequencies in applications with small voltage swing. PMID:25873359

  11. Towards programmable plant genetic circuits.

    PubMed

    Medford, June I; Prasad, Ashok

    2016-07-01

    Synthetic biology enables the construction of genetic circuits with predictable gene functions in plants. Detailed quantitative descriptions of the transfer function or input-output function for genetic parts (promoters, 5' and 3' untranslated regions, etc.) are collected. These data are then used in computational simulations to determine their robustness and desired properties, thereby enabling the best components to be selected for experimental testing in plants. In addition, the process forms an iterative workflow which allows vast improvement to validated elements with sub-optimal function. These processes enable computational functions such as digital logic in living plants and follow the pathway of technological advances which took us from vacuum tubes to cell phones. PMID:27297052

  12. TIME CALIBRATED OSCILLOSCOPE SWEEP CIRCUIT

    DOEpatents

    Smith, V.L.; Carstensen, H.K.

    1959-11-24

    An improved time calibrated sweep circuit is presented, which extends the range of usefulness of conventional oscilloscopes as utilized for time calibrated display applications in accordance with U. S. Patent No. 2,832,002. Principal novelty resides in the provision of a pair of separate signal paths, each of which is phase and amplitude adjustable, to connect a high-frequency calibration oscillator to the output of a sawtooth generator also connected to the respective horizontal deflection plates of an oscilloscope cathode ray tube. The amplitude and phase of the calibration oscillator signals in the two signal paths are adjusted to balance out feedthrough currents capacitively coupled at high frequencies of the calibration oscillator from each horizontal deflection plate to the vertical plates of the cathode ray tube.

  13. Shapeable short circuit resistant capacitor

    SciTech Connect

    Taylor, Ralph S.; Myers, John D.; Baney, William J.

    2015-10-06

    A ceramic short circuit resistant capacitor that is bendable and/or shapeable to provide a multiple layer capacitor that is extremely compact and amenable to desirable geometries. The capacitor that exhibits a benign failure mode in which a multitude of discrete failure events result in a gradual loss of capacitance. Each event is a localized event in which localized heating causes an adjacent portion of one or both of the electrodes to vaporize, physically cleaning away electrode material from the failure site. A first metal electrode, a second metal electrode, and a ceramic dielectric layer between the electrodes are thin enough to be formed in a serpentine-arrangement with gaps between the first electrode and the second electrode that allow venting of vaporized electrode material in the event of a benign failure.

  14. Quantum transducer in circuit optomechanics

    NASA Astrophysics Data System (ADS)

    Didier, Nicolas; Pugnetti, Stefano; Blanter, Yaroslav M.; Fazio, Rosario

    2014-11-01

    Mechanical resonators are macroscopic quantum objects with great potential. They couple to many different quantum systems such as spins, optical photons, and Bose Einstein condensates. It is difficult to measure and manipulate a phonon state due to the tiny motion in the quantum regime. On the other hand, microwave resonators are powerful quantum devices since arbitrary photon states can be synthesized and measured with the quantum tomography. We show that linear coupling, strong and controlled with gate voltage, between mechanical and microwave resonators enables creation of quantum phonon states, manipulation of hybrid entanglement between phonons and photons, and generation of entanglement between two mechanical oscillators. In circuit quantum optomechanics, the mechanical resonator acts as a quantum transducer between an auxiliary quantum system and the microwave resonator, which is used as a quantum bus. As an example, we demonstrate how two mechanical resonators coupled to one microwave resonator and two spins can facilitate entanglement generation between the spins.

  15. Coulomb drag in quantum circuits.

    PubMed

    Levchenko, Alex; Kamenev, Alex

    2008-11-21

    We study the drag effect in a system of two electrically isolated quantum point contacts, coupled by Coulomb interactions. Drag current exhibits maxima as a function of quantum point contacts gate voltages when the latter are tuned to the transitions between quantized conductance plateaus. In the linear regime this behavior is due to enhanced electron-hole asymmetry near an opening of a new conductance channel. In the nonlinear regime the drag current is proportional to the shot noise of the driving circuit, suggesting that the Coulomb drag experiments may be a convenient way to measure the quantum shot noise. Remarkably, the transition to the nonlinear regime may occur at driving voltages substantially smaller than the temperature.

  16. Sequential power-up circuit

    DOEpatents

    Kronberg, J.W.

    1992-06-02

    A sequential power-up circuit for starting several electrical load elements in series to avoid excessive current surge, comprising a voltage ramp generator and a set of voltage comparators, each comparator having a different reference voltage and interfacing with a switch that is capable of turning on one of the load elements. As the voltage rises, it passes the reference voltages one at a time and causes the switch corresponding to that voltage to turn on its load element. The ramp is turned on and off by a single switch or by a logic-level electrical signal. The ramp rate for turning on the load element is relatively slow and the rate for turning the elements off is relatively fast. Optionally, the duration of each interval of time between the turning on of the load elements is programmable. 2 figs.

  17. Sequential power-up circuit

    DOEpatents

    Kronberg, James W.

    1992-01-01

    A sequential power-up circuit for starting several electrical load elements in series to avoid excessive current surge, comprising a voltage ramp generator and a set of voltage comparators, each comparator having a different reference voltage and interfacing with a switch that is capable of turning on one of the load elements. As the voltage rises, it passes the reference voltages one at a time and causes the switch corresponding to that voltage to turn on its load element. The ramp is turned on and off by a single switch or by a logic-level electrical signal. The ramp rate for turning on the load element is relatively slow and the rate for turning the elements off is relatively fast. Optionally, the duration of each interval of time between the turning on of the load elements is programmable.

  18. Analyzing Pulse-Code Modulation On A Small Computer

    NASA Technical Reports Server (NTRS)

    Massey, David E.

    1988-01-01

    System for analysis pulse-code modulation (PCM) comprises personal computer, computer program, and peripheral interface adapter on circuit board that plugs into expansion bus of computer. Functions essentially as "snapshot" PCM decommutator, which accepts and stores thousands of frames of PCM data, sifts through them repeatedly to process according to routines specified by operator. Enables faster testing and involves less equipment than older testing systems.

  19. Phase control circuits using frequency multiplications for phased array antennas

    NASA Technical Reports Server (NTRS)

    Mailloux, R. J.; Caron, P. R. (Inventor)

    1973-01-01

    A phase control coupling circuit for use with a phased array antenna is described. The coupling circuit includes a combining circuit which is coupled to a transmission line, a frequency multiplier circuit which is coupled to the combining circuit, and a recombining circuit which is coupled between the frequency multiplier circuit and phased array antenna elements. In a doubler embodiment, the frequency multiplier circuit comprises frequency doublers and the combining and recombining circuits comprise four-port hybrid power dividers. In a generalized embodiment, the multiplier circuit comprises frequency multiplier elements which multiply to the Nth power, the combining circuit comprises four-part hybrid power dividers, and the recombinding circuit comprises summing circuits.

  20. Compressible Astrophysics Simulation Code

    SciTech Connect

    Howell, L.; Singer, M.

    2007-07-18

    This is an astrophysics simulation code involving a radiation diffusion module developed at LLNL coupled to compressible hydrodynamics and adaptive mesh infrastructure developed at LBNL. One intended application is to neutrino diffusion in core collapse supernovae.