Comparison and statistical analysis of four write stability metrics in bulk CMOS static random access memory cells

NASA Astrophysics Data System (ADS)

Qiu, Hao; Mizutani, Tomoko; Saraya, Takuya; Hiramoto, Toshiro

2015-04-01

The commonly used four metrics for write stability were measured and compared based on the same set of 2048 (2k) six-transistor (6T) static random access memory (SRAM) cells by the 65 nm bulk technology. The preferred one should be effective for yield estimation and help predict edge of stability. Results have demonstrated that all metrics share the same worst SRAM cell. On the other hand, compared to butterfly curve with non-normality and write N-curve where no cell state flip happens, bit-line and word-line margins have good normality as well as almost perfect correlation. As a result, both bit line method and word line method prove themselves preferred write stability metrics.

76 FR 73676 - Certain Dynamic Random Access Memory Devices, and Products Containing Same; Receipt of Complaint...

Federal Register 2010, 2011, 2012, 2013, 2014

2011-11-29

... INTERNATIONAL TRADE COMMISSION [DN 2859] Certain Dynamic Random Access Memory Devices, and.... International Trade Commission has received a complaint entitled In Re Certain Dynamic Random Access Memory... certain dynamic random access memory devices, and products containing same. The complaint names Elpida...

75 FR 16507 - In the Matter of Certain Semiconductor Chips Having Synchronous Dynamic Random Access Memory...

Federal Register 2010, 2011, 2012, 2013, 2014

2010-04-01

... Semiconductor Chips Having Synchronous Dynamic Random Access Memory Controllers and Products Containing Same... synchronous dynamic random access memory controllers and products containing same by reason of infringement of... semiconductor chips having synchronous dynamic random access memory controllers and products containing same...

Generation-based memory synchronization in a multiprocessor system with weakly consistent memory accesses

DOEpatents

Ohmacht, Martin

2017-08-15

In a multiprocessor system, a central memory synchronization module coordinates memory synchronization requests responsive to memory access requests in flight, a generation counter, and a reclaim pointer. The central module communicates via point-to-point communication. The module includes a global OR reduce tree for each memory access requesting device, for detecting memory access requests in flight. An interface unit is implemented associated with each processor requesting synchronization. The interface unit includes multiple generation completion detectors. The generation count and reclaim pointer do not pass one another.

Generation-based memory synchronization in a multiprocessor system with weakly consistent memory accesses

DOEpatents

Ohmacht, Martin

2014-09-09

In a multiprocessor system, a central memory synchronization module coordinates memory synchronization requests responsive to memory access requests in flight, a generation counter, and a reclaim pointer. The central module communicates via point-to-point communication. The module includes a global OR reduce tree for each memory access requesting device, for detecting memory access requests in flight. An interface unit is implemented associated with each processor requesting synchronization. The interface unit includes multiple generation completion detectors. The generation count and reclaim pointer do not pass one another.

76 FR 55417 - In the Matter of Certain Dynamic Random Access Memory and Nand Flash Memory Devices and Products...

Federal Register 2010, 2011, 2012, 2013, 2014

2011-09-07

... Access Memory and Nand Flash Memory Devices and Products Containing Same; Notice of Institution of... importation, and the sale within the United States after importation of certain dynamic random access memory and NAND flash memory devices and products containing same by reason of infringement of certain claims...

Improved Writing-Conductor Designs For Magnetic Memory

NASA Technical Reports Server (NTRS)

Wu, Jiin-Chuan; Stadler, Henry L.; Katti, Romney R.

1994-01-01

Writing currents reduced to practical levels. Improved conceptual designs for writing conductors in micromagnet/Hall-effect random-access integrated-circuit memory reduces electrical current needed to magnetize micromagnet in each memory cell. Basic concept of micromagnet/Hall-effect random-access memory presented in "Magnetic Analog Random-Access Memory" (NPO-17999).

75 FR 14467 - In the Matter of: Certain Dynamic Random Access Memory Semiconductors and Products Containing...

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2010-03-25

... Access Memory Semiconductors and Products Containing Same, Including Memory Modules; Notice of... the sale within the United States after importation of certain dynamic random access memory semiconductors and products containing same, including memory modules, by reason of infringement of certain...

76 FR 80964 - Certain Dynamic Random Access Memory Devices, and Products Containing Same; Institution of...

Federal Register 2010, 2011, 2012, 2013, 2014

2011-12-27

... INTERNATIONAL TRADE COMMISSION [Investigation No. 337-TA-821] Certain Dynamic Random Access Memory... importation, and the sale within the United States after importation of certain dynamic random access memory... certain dynamic random access memory devices, and products containing same that infringe one or more of...

Method and apparatus for managing access to a memory

DOE Office of Scientific and Technical Information (OSTI.GOV)

DeBenedictis, Erik

A method and apparatus for managing access to a memory of a computing system. A controller transforms a plurality of operations that represent a computing job into an operational memory layout that reduces a size of a selected portion of the memory that needs to be accessed to perform the computing job. The controller stores the operational memory layout in a plurality of memory cells within the selected portion of the memory. The controller controls a sequence by which a processor in the computing system accesses the memory to perform the computing job using the operational memory layout. The operationalmore » memory layout reduces an amount of energy consumed by the processor to perform the computing job.« less

Experimental realization of a multiplexed quantum memory with 225 individually accessible memory cells.

PubMed

Pu, Y-F; Jiang, N; Chang, W; Yang, H-X; Li, C; Duan, L-M

2017-05-08

To realize long-distance quantum communication and quantum network, it is required to have multiplexed quantum memory with many memory cells. Each memory cell needs to be individually addressable and independently accessible. Here we report an experiment that realizes a multiplexed DLCZ-type quantum memory with 225 individually accessible memory cells in a macroscopic atomic ensemble. As a key element for quantum repeaters, we demonstrate that entanglement with flying optical qubits can be stored into any neighboring memory cells and read out after a programmable time with high fidelity. Experimental realization of a multiplexed quantum memory with many individually accessible memory cells and programmable control of its addressing and readout makes an important step for its application in quantum information technology.

"Keeping in mind the gender stereotype": the role of need for closure in the retrieval-induced forgetting of female managers' qualities.

PubMed

Pica, Gennaro; Pierro, Antonio; Pellegrini, Valerio; De Cristofaro, Valeria; Giannini, Annamaria; Kruglanski, Arie W

2018-05-19

The present research addressed the question of whether need for closure (NFC; Kruglanski in The psychology of closed mindedness, Psychology Press, New York, 2004) biases individuals' memory of female leaders. Merging research on role congruity theory of leadership (Koenig et al. in Psychol Bull 4:616-642, 2011. https://doi.org/10.1037/a0023557 ) and research on retrieval-induced forgetting (RIF, Anderson et al. in J Exp Psychol Learn Mem Cognit 20:1063-1087, 1994. https://doi.org/10.1037/0022-3514.65.5.861 ), we hypothesized and found that high-NFC participants show (1) a higher RIF of dimensions commonly associated with the leadership prototype (agentic/masculine) ascribed to female manager targets, when selectively retrieved dimensions commonly associated with the female prototype (communal/feminine) were ascribed to the same target; and (2) a lessened RIF of female stereotypical dimensions ascribed to female manager targets, when selectively retrieved prototypical leadership dimensions were ascribed to the same target. Overall, the present findings suggest that when faced with women leaders, high NfC enhances the accessibility of gender stereotype-congruent memories and reduces the accessibility of prototypical leadership ones, thus reducing the RIF of communal/feminine memories.

Experimental realization of a multiplexed quantum memory with 225 individually accessible memory cells

PubMed Central

Pu, Y-F; Jiang, N.; Chang, W.; Yang, H-X; Li, C.; Duan, L-M

2017-01-01

To realize long-distance quantum communication and quantum network, it is required to have multiplexed quantum memory with many memory cells. Each memory cell needs to be individually addressable and independently accessible. Here we report an experiment that realizes a multiplexed DLCZ-type quantum memory with 225 individually accessible memory cells in a macroscopic atomic ensemble. As a key element for quantum repeaters, we demonstrate that entanglement with flying optical qubits can be stored into any neighboring memory cells and read out after a programmable time with high fidelity. Experimental realization of a multiplexed quantum memory with many individually accessible memory cells and programmable control of its addressing and readout makes an important step for its application in quantum information technology. PMID:28480891

Deflate decompressor

DOEpatents

Hamlet, Jason R [Albuquerque, NM; Robertson, Perry J [Albuquerque, NM; Pierson, Lyndon G [Albuquerque, NM; Olsberg, Ronald R [Albuquerque, NM

2012-02-28

A deflate decompressor includes at least one decompressor unit, a memory access controller, a feedback path, and an output buffer unit. The memory access controller is coupled to the decompressor unit via a data path and includes a data buffer to receive the data stream and temporarily buffer a first portion the data stream. The memory access controller transfers fixed length data units of the data stream from the data buffer to the decompressor unit with reference to a memory pointer pointing into the memory buffer. The feedback path couples the decompressor unit to the memory access controller to feed back decrement values to the memory access controller for updating the memory pointer. The decrement values each indicate a number of bits unused by the decompressor unit when decoding the fixed length data units. The output buffer unit buffers a second portion of the data stream after decompression.

75 FR 44283 - In the Matter of Certain Dynamic Random Access Memory Semiconductors and Products Containing Same...

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2010-07-28

... Random Access Memory Semiconductors and Products Containing Same, Including Memory Modules; Notice of a... importation of certain dynamic random access memory semiconductors and products containing same, including memory modules, by reason of infringement of certain claims of U.S. Patent Nos. 5,480,051; 5,422,309; 5...

Overview of emerging nonvolatile memory technologies

PubMed Central

2014-01-01

Nonvolatile memory technologies in Si-based electronics date back to the 1990s. Ferroelectric field-effect transistor (FeFET) was one of the most promising devices replacing the conventional Flash memory facing physical scaling limitations at those times. A variant of charge storage memory referred to as Flash memory is widely used in consumer electronic products such as cell phones and music players while NAND Flash-based solid-state disks (SSDs) are increasingly displacing hard disk drives as the primary storage device in laptops, desktops, and even data centers. The integration limit of Flash memories is approaching, and many new types of memory to replace conventional Flash memories have been proposed. Emerging memory technologies promise new memories to store more data at less cost than the expensive-to-build silicon chips used by popular consumer gadgets including digital cameras, cell phones and portable music players. They are being investigated and lead to the future as potential alternatives to existing memories in future computing systems. Emerging nonvolatile memory technologies such as magnetic random-access memory (MRAM), spin-transfer torque random-access memory (STT-RAM), ferroelectric random-access memory (FeRAM), phase-change memory (PCM), and resistive random-access memory (RRAM) combine the speed of static random-access memory (SRAM), the density of dynamic random-access memory (DRAM), and the nonvolatility of Flash memory and so become very attractive as another possibility for future memory hierarchies. Many other new classes of emerging memory technologies such as transparent and plastic, three-dimensional (3-D), and quantum dot memory technologies have also gained tremendous popularity in recent years. Subsequently, not an exaggeration to say that computer memory could soon earn the ultimate commercial validation for commercial scale-up and production the cheap plastic knockoff. Therefore, this review is devoted to the rapidly developing new class of memory technologies and scaling of scientific procedures based on an investigation of recent progress in advanced Flash memory devices. PMID:25278820

Overview of emerging nonvolatile memory technologies.

PubMed

Meena, Jagan Singh; Sze, Simon Min; Chand, Umesh; Tseng, Tseung-Yuen

2014-01-01

Nonvolatile memory technologies in Si-based electronics date back to the 1990s. Ferroelectric field-effect transistor (FeFET) was one of the most promising devices replacing the conventional Flash memory facing physical scaling limitations at those times. A variant of charge storage memory referred to as Flash memory is widely used in consumer electronic products such as cell phones and music players while NAND Flash-based solid-state disks (SSDs) are increasingly displacing hard disk drives as the primary storage device in laptops, desktops, and even data centers. The integration limit of Flash memories is approaching, and many new types of memory to replace conventional Flash memories have been proposed. Emerging memory technologies promise new memories to store more data at less cost than the expensive-to-build silicon chips used by popular consumer gadgets including digital cameras, cell phones and portable music players. They are being investigated and lead to the future as potential alternatives to existing memories in future computing systems. Emerging nonvolatile memory technologies such as magnetic random-access memory (MRAM), spin-transfer torque random-access memory (STT-RAM), ferroelectric random-access memory (FeRAM), phase-change memory (PCM), and resistive random-access memory (RRAM) combine the speed of static random-access memory (SRAM), the density of dynamic random-access memory (DRAM), and the nonvolatility of Flash memory and so become very attractive as another possibility for future memory hierarchies. Many other new classes of emerging memory technologies such as transparent and plastic, three-dimensional (3-D), and quantum dot memory technologies have also gained tremendous popularity in recent years. Subsequently, not an exaggeration to say that computer memory could soon earn the ultimate commercial validation for commercial scale-up and production the cheap plastic knockoff. Therefore, this review is devoted to the rapidly developing new class of memory technologies and scaling of scientific procedures based on an investigation of recent progress in advanced Flash memory devices.

Competition with and without priority control: linking rivalry to attention through winner-take-all networks with memory

PubMed Central

Marx, Svenja; Gruenhage, Gina; Walper, Daniel; Rutishauser, Ueli; Einhäuser, Wolfgang

2015-01-01

Competition is ubiquitous in perception. For example, items in the visual field compete for processing resources, and attention controls their priority (biased competition). The inevitable ambiguity in the interpretation of sensory signals yields another form of competition: distinct perceptual interpretations compete for access to awareness. Rivalry, where two equally likely percepts compete for dominance, explicates the latter form of competition. Building upon the similarity between attention and rivalry, we propose to model rivalry by a generic competitive circuit that is widely used in the attention literature—a winner-take-all (WTA) network. Specifically, we show that a network of two coupled WTA circuits replicates three common hallmarks of rivalry: the distribution of dominance durations, their dependence on input strength (“Levelt's propositions”), and the effects of stimulus removal (blanking). This model introduces a form of memory by forming discrete states and explains experimental data better than competitive models of rivalry without memory. This result supports the crucial role of memory in rivalry specifically and in competitive processes in general. Our approach unifies the seemingly distinct phenomena of rivalry, memory, and attention in a single model with competition as the common underlying principle. PMID:25581077

Emerging Applications for High K Materials in VLSI Technology

PubMed Central

Clark, Robert D.

2014-01-01

The current status of High K dielectrics in Very Large Scale Integrated circuit (VLSI) manufacturing for leading edge Dynamic Random Access Memory (DRAM) and Complementary Metal Oxide Semiconductor (CMOS) applications is summarized along with the deposition methods and general equipment types employed. Emerging applications for High K dielectrics in future CMOS are described as well for implementations in 10 nm and beyond nodes. Additional emerging applications for High K dielectrics include Resistive RAM memories, Metal-Insulator-Metal (MIM) diodes, Ferroelectric logic and memory devices, and as mask layers for patterning. Atomic Layer Deposition (ALD) is a common and proven deposition method for all of the applications discussed for use in future VLSI manufacturing. PMID:28788599

DOE Office of Scientific and Technical Information (OSTI.GOV)

Li, Lingda; Hayes, Ari; Song, Shuaiwen

Modern GPUs employ cache to improve memory system efficiency. However, large amount of cache space is underutilized due to irregular memory accesses and poor spatial locality which exhibited commonly in GPU applications. Our experiments show that using smaller cache lines could improve cache space utilization, but it also frequently suffers from significant performance loss by introducing large amount of extra cache requests. In this work, we propose a novel cache design named tag-split cache (TSC) that enables fine-grained cache storage to address the problem of cache space underutilization while keeping memory request number unchanged. TSC divides tag into two partsmore » to reduce storage overhead, and it supports multiple cache line replacement in one cycle.« less

[Collective memories of women who have experienced maternal near miss: health needs and human rights].

PubMed

Aguiar, Cláudia de Azevedo; Tanaka, Ana Cristina dʼAndretta

2016-09-19

The collective memories of women that have experienced maternal near miss can help elucidate serious obstetric events, like maternal death. Their experience is authentic and representative, with the construction of a common identity. This identity lends quality to a group's memory, and such memory is thus a social phenomenon. The study analyzed the experience of twelve women who nearly died during the gestational and postpartum cycle. The thematic oral history method was used, from the perspective of health needs and human rights. Six collective memories comprised the discourses: unmet health needs; healthcare deficiencies; denial of contact with the newborn child; violation of rights; absence of demand for rights; and compensation for unmet rights and needs. To understand these women's health needs is to acknowledge the women as bearers of rights and to individualize care, respecting their autonomy, guaranteeing access to technologies, and establishing an effective bond with health professionals.

Common Neural Representations for Visually Guided Reorientation and Spatial Imagery

PubMed Central

Vass, Lindsay K.; Epstein, Russell A.

2017-01-01

Abstract Spatial knowledge about an environment can be cued from memory by perception of a visual scene during active navigation or by imagination of the relationships between nonvisible landmarks, such as when providing directions. It is not known whether these different ways of accessing spatial knowledge elicit the same representations in the brain. To address this issue, we scanned participants with fMRI, while they performed a judgment of relative direction (JRD) task that required them to retrieve real-world spatial relationships in response to either pictorial or verbal cues. Multivoxel pattern analyses revealed several brain regions that exhibited representations that were independent of the cues to access spatial memory. Specifically, entorhinal cortex in the medial temporal lobe and the retrosplenial complex (RSC) in the medial parietal lobe coded for the heading assumed on a particular trial, whereas the parahippocampal place area (PPA) contained information about the starting location of the JRD. These results demonstrate the existence of spatial representations in RSC, ERC, and PPA that are common to visually guided navigation and spatial imagery. PMID:26759482

Accessing memory

DOEpatents

Yoon, Doe Hyun; Muralimanohar, Naveen; Chang, Jichuan; Ranganthan, Parthasarathy

2017-09-26

A disclosed example method involves performing simultaneous data accesses on at least first and second independently selectable logical sub-ranks to access first data via a wide internal data bus in a memory device. The memory device includes a translation buffer chip, memory chips in independently selectable logical sub-ranks, a narrow external data bus to connect the translation buffer chip to a memory controller, and the wide internal data bus between the translation buffer chip and the memory chips. A data access is performed on only the first independently selectable logical sub-rank to access second data via the wide internal data bus. The example method also involves locating a first portion of the first data, a second portion of the first data, and the second data on the narrow external data bus during separate data transfers.

Revising psychoanalytic interpretations of the past. An examination of declarative and non-declarative memory processes.

PubMed

Davis, J T

2001-06-01

The author reviews a contemporary cognitive psychology perspective on memory that views memory as being composed of multiple separate systems. Most researchers draw a fundamental distinction between declarative/explicit and non-declarative/implicit forms of memory. Declarative memory is responsible for the conscious recollection of facts and events--what is typically meant by the everyday and the common psychoanalytic use of the word 'memory'. Non-declarative forms of memory, in contrast, are specialised processes that influence experience and behaviour without representing the past in terms of any consciously accessible content. They operate outside of an individual's awareness, but are not repressed or otherwise dynamically unconscious. Using this theoretical framework, the question of how childhood relationship experiences are carried forward from the past to influence the present is examined. It is argued that incorporating a conceptualisation of non-declarative memory processing into psychoanalytic theory is essential. Non-declarative memory processes are capable of forming complex and sophisticated representations of the interpersonal world. These non-declarative memory processes exert a major impact on interpersonal experience and behaviour that needs to be analysed on its own terms and not mistakenly viewed as a form of resistance.

Effects of Working Memory Demand on Neural Mechanisms of Motor Response Selection and Control

PubMed Central

Barber, Anita D.; Caffo, Brian S.; Pekar, James J.; Mostofsky, Stewart H.

2013-01-01

Inhibitory control commonly recruits a number of frontal regions: pre-supplementary motor area (pre-SMA), frontal eye fields (FEFs), and right-lateralized posterior inferior frontal gyrus (IFG), dorsal anterior insula (DAI), dorsolateral prefrontal cortex (DLPFC), and inferior frontal junction (IFJ). These regions may directly implement inhibitory motor control or may be more generally involved in executive control functions. Two go/no-go tasks were used to distinguish regions specifically recruited for inhibition from those that additionally show increased activity with working memory demand. The pre-SMA and IFG were recruited for inhibition in both tasks and did not have greater activation for working memory demand on no-go trials, consistent with a role in inhibitory control. Activation in pre-SMA also responded to response selection demand and was increased with working memory on go trials specifically. The bilateral FEF and right DAI were commonly active for no-go trials. The FEF was also recruited to a greater degree with working memory demand on go trials and may bias top–down information when stimulus–response mappings change. The DAI, additionally responded to increased working memory demand on both go and no-go trials and may be involved in accessing sustained task information, alerting, or autonomic changes when cognitive demands increase. DLPFC activation was consistent with a role in working memory retrieval on both go and no-go trials. The inferior frontal junction, on the other hand, had greater activation with working memory specifically for no-go trials and may detect salient stimuli when the task requires frequent updating of working memory representations. PMID:23530923

Working memory capacity and retrieval limitations from long-term memory: an examination of differences in accessibility.

PubMed

Unsworth, Nash; Spillers, Gregory J; Brewer, Gene A

2012-01-01

In two experiments, the locus of individual differences in working memory capacity and long-term memory recall was examined. Participants performed categorical cued and free recall tasks, and individual differences in the dynamics of recall were interpreted in terms of a hierarchical-search framework. The results from this study are in accordance with recent theorizing suggesting a strong relation between working memory capacity and retrieval from long-term memory. Furthermore, the results also indicate that individual differences in categorical recall are partially due to differences in accessibility. In terms of accessibility of target information, two important factors drive the difference between high- and low-working-memory-capacity participants. Low-working-memory-capacity participants fail to utilize appropriate retrieval strategies to access cues, and they also have difficulty resolving cue overload. Thus, when low-working-memory-capacity participants were given specific cues that activated a smaller set of potential targets, their recall performance was the same as that of high-working-memory-capacity participants.

Memory availability and referential access

PubMed Central

Johns, Clinton L.; Gordon, Peter C.; Long, Debra L.; Swaab, Tamara Y.

2013-01-01

Most theories of coreference specify linguistic factors that modulate antecedent accessibility in memory; however, whether non-linguistic factors also affect coreferential access is unknown. Here we examined the impact of a non-linguistic generation task (letter transposition) on the repeated-name penalty, a processing difficulty observed when coreferential repeated names refer to syntactically prominent (and thus more accessible) antecedents. In Experiment 1, generation improved online (event-related potentials) and offline (recognition memory) accessibility of names in word lists. In Experiment 2, we manipulated generation and syntactic prominence of antecedent names in sentences; both improved online and offline accessibility, but only syntactic prominence elicited a repeated-name penalty. Our results have three important implications: first, the form of a referential expression interacts with an antecedent’s status in the discourse model during coreference; second, availability in memory and referential accessibility are separable; and finally, theories of coreference must better integrate known properties of the human memory system. PMID:24443621

Circuit-Switched Memory Access in Photonic Interconnection Networks for High-Performance Embedded Computing

DTIC Science & Technology

2010-07-22

dependent , providing a natural bandwidth match between compute cores and the memory subsystem. • High Bandwidth Dcnsity. Waveguides crossing the chip...simulate this memory access architecture on a 2S6-core chip with a concentrated 64-node network lIsing detailed traces of high-performance embedded...memory modulcs, wc placc memory access poi nts (MAPs) around the pcriphery of the chip connected to thc nctwork. These MAPs, shown in Figure 4, contain

The dynamic interplay between acute psychosocial stress, emotion and autobiographical memory.

PubMed

Sheldon, Signy; Chu, Sonja; Nitschke, Jonas P; Pruessner, Jens C; Bartz, Jennifer A

2018-06-06

Although acute psychosocial stress can impact autobiographical memory retrieval, the nature of this effect is not entirely clear. One reason for this ambiguity is because stress can have opposing effects on the different stages of autobiographical memory retrieval. We addressed this issue by testing how acute stress affects three stages of the autobiographical memory retrieval - accessing, recollecting and reconsolidating a memory. We also investigate the influence of emotion valence on this effect. In a between-subjects design, participants were first exposed to an acute psychosocial stressor or a control task. Next, the participants were shown positive, negative or neutral retrieval cues and asked to access and describe autobiographical memories. After a three to four day delay, participants returned for a second session in which they described these autobiographical memories. During initial retrieval, stressed participants were slower to access memories than were control participants; moreover, cortisol levels were positively associated with response times to access positively-cued memories. There were no effects of stress on the amount of details used to describe memories during initial retrieval, but stress did influence memory detail during session two. During session two, stressed participants recovered significantly more details, particularly emotional ones, from the remembered events than control participants. Our results indicate that the presence of stress impairs the ability to access consolidated autobiographical memories; moreover, although stress has no effect on memory recollection, stress alters how recollected experiences are reconsolidated back into memory traces.

A new approach for implementation of associative memory using volume holographic materials

NASA Astrophysics Data System (ADS)

Habibi, Mohammad; Pashaie, Ramin

2012-02-01

Associative memory, also known as fault tolerant or content-addressable memory, has gained considerable attention in last few decades. This memory possesses important advantages over the more common random access memories since it provides the capability to correct faults and/or partially missing information in a given input pattern. There is general consensus that optical implementation of connectionist models and parallel processors including associative memory has a better record of success compared to their electronic counterparts. In this article, we describe a novel optical implementation of associative memory which not only has the advantage of all optical learning and recalling capabilities, it can also be realized easily. We present a new approach, inspired by tomographic imaging techniques, for holographic implementation of associative memories. In this approach, a volume holographic material is sandwiched within a matrix of inputs (optical point sources) and outputs (photodetectors). The memory capacity is realized by the spatial modulation of refractive index of the holographic material. Constructing the spatial distribution of the refractive index from an array of known inputs and outputs is formulated as an inverse problem consisting a set of linear integral equations.

Accessing Information in Working Memory: Can the Focus of Attention Grasp Two Elements at the Same Time?

ERIC Educational Resources Information Center

Oberauer, Klaus; Bialkova, Svetlana

2009-01-01

Processing information in working memory requires selective access to a subset of working-memory contents by a focus of attention. Complex cognition often requires joint access to 2 items in working memory. How does the focus select 2 items? Two experiments with an arithmetic task and 1 with a spatial task investigate time demands for successive…

78 FR 35645 - Certain Static Random Access Memories and Products Containing Same; Commission Determination...

Federal Register 2010, 2011, 2012, 2013, 2014

2013-06-13

... INTERNATIONAL TRADE COMMISSION [Investigation No. 337-TA-792] Certain Static Random Access Memories and Products Containing Same; Commission Determination Affirming a Final Initial Determination..., and the sale within the United States after importation of certain static random access memories and...

Quantum random access memory.

PubMed

Giovannetti, Vittorio; Lloyd, Seth; Maccone, Lorenzo

2008-04-25

A random access memory (RAM) uses n bits to randomly address N=2(n) distinct memory cells. A quantum random access memory (QRAM) uses n qubits to address any quantum superposition of N memory cells. We present an architecture that exponentially reduces the requirements for a memory call: O(logN) switches need be thrown instead of the N used in conventional (classical or quantum) RAM designs. This yields a more robust QRAM algorithm, as it in general requires entanglement among exponentially less gates, and leads to an exponential decrease in the power needed for addressing. A quantum optical implementation is presented.

The MUSOS (MUsic SOftware System) Toolkit: A computer-based, open source application for testing memory for melodies.

PubMed

Rainsford, M; Palmer, M A; Paine, G

2018-04-01

Despite numerous innovative studies, rates of replication in the field of music psychology are extremely low (Frieler et al., 2013). Two key methodological challenges affecting researchers wishing to administer and reproduce studies in music cognition are the difficulty of measuring musical responses, particularly when conducting free-recall studies, and access to a reliable set of novel stimuli unrestricted by copyright or licensing issues. In this article, we propose a solution for these challenges in computer-based administration. We present a computer-based application for testing memory for melodies. Created using the software Max/MSP (Cycling '74, 2014a), the MUSOS (Music Software System) Toolkit uses a simple modular framework configurable for testing common paradigms such as recall, old-new recognition, and stem completion. The program is accompanied by a stimulus set of 156 novel, copyright-free melodies, in audio and Max/MSP file formats. Two pilot tests were conducted to establish the properties of the accompanying stimulus set that are relevant to music cognition and general memory research. By using this software, a researcher without specialist musical training may administer and accurately measure responses from common paradigms used in the study of memory for music.

78 FR 25767 - Certain Static Random Access Memories and Products Containing Same; Commission Determination To...

Federal Register 2010, 2011, 2012, 2013, 2014

2013-05-02

... INTERNATIONAL TRADE COMMISSION [Investigation No. 337-TA-792] Certain Static Random Access Memories and Products Containing Same; Commission Determination To Review in Part a Final Initial... States after importation of certain static random access memories and products containing the same by...

Low latency and persistent data storage

DOEpatents

Fitch, Blake G; Franceschini, Michele M; Jagmohan, Ashish; Takken, Todd E

2014-02-18

Persistent data storage is provided by a method that includes receiving a low latency store command that includes write data. The write data is written to a first memory device that is implemented by a nonvolatile solid-state memory technology characterized by a first access speed. It is acknowledged that the write data has been successfully written to the first memory device. The write data is written to a second memory device that is implemented by a volatile memory technology. At least a portion of the data in the first memory device is written to a third memory device when a predetermined amount of data has been accumulated in the first memory device. The third memory device is implemented by a nonvolatile solid-state memory technology characterized by a second access speed that is slower than the first access speed.

System and method for programmable bank selection for banked memory subsystems

DOEpatents

Blumrich, Matthias A.; Chen, Dong; Gara, Alan G.; Giampapa, Mark E.; Hoenicke, Dirk; Ohmacht, Martin; Salapura, Valentina; Sugavanam, Krishnan

2010-09-07

A programmable memory system and method for enabling one or more processor devices access to shared memory in a computing environment, the shared memory including one or more memory storage structures having addressable locations for storing data. The system comprises: one or more first logic devices associated with a respective one or more processor devices, each first logic device for receiving physical memory address signals and programmable for generating a respective memory storage structure select signal upon receipt of pre-determined address bit values at selected physical memory address bit locations; and, a second logic device responsive to each of the respective select signal for generating an address signal used for selecting a memory storage structure for processor access. The system thus enables each processor device of a computing environment memory storage access distributed across the one or more memory storage structures.

Carbon nanomaterials for non-volatile memories

NASA Astrophysics Data System (ADS)

Ahn, Ethan C.; Wong, H.-S. Philip; Pop, Eric

2018-03-01

Carbon can create various low-dimensional nanostructures with remarkable electronic, optical, mechanical and thermal properties. These features make carbon nanomaterials especially interesting for next-generation memory and storage devices, such as resistive random access memory, phase-change memory, spin-transfer-torque magnetic random access memory and ferroelectric random access memory. Non-volatile memories greatly benefit from the use of carbon nanomaterials in terms of bit density and energy efficiency. In this Review, we discuss sp2-hybridized carbon-based low-dimensional nanostructures, such as fullerene, carbon nanotubes and graphene, in the context of non-volatile memory devices and architectures. Applications of carbon nanomaterials as memory electrodes, interfacial engineering layers, resistive-switching media, and scalable, high-performance memory selectors are investigated. Finally, we compare the different memory technologies in terms of writing energy and time, and highlight major challenges in the manufacturing, integration and understanding of the physical mechanisms and material properties.

Design of a memory-access controller with 3.71-times-enhanced energy efficiency for Internet-of-Things-oriented nonvolatile microcontroller unit

NASA Astrophysics Data System (ADS)

Natsui, Masanori; Hanyu, Takahiro

2018-04-01

In realizing a nonvolatile microcontroller unit (MCU) for sensor nodes in Internet-of-Things (IoT) applications, it is important to solve the data-transfer bottleneck between the central processing unit (CPU) and the nonvolatile memory constituting the MCU. As one circuit-oriented approach to solving this problem, we propose a memory access minimization technique for magnetoresistive-random-access-memory (MRAM)-embedded nonvolatile MCUs. In addition to multiplexing and prefetching of memory access, the proposed technique realizes efficient instruction fetch by eliminating redundant memory access while considering the code length of the instruction to be fetched and the transition of the memory address to be accessed. As a result, the performance of the MCU can be improved while relaxing the performance requirement for the embedded MRAM, and compact and low-power implementation can be performed as compared with the conventional cache-based one. Through the evaluation using a system consisting of a general purpose 32-bit CPU and embedded MRAM, it is demonstrated that the proposed technique increases the peak efficiency of the system up to 3.71 times, while a 2.29-fold area reduction is achieved compared with the cache-based one.

On the origin of resistive switching volatility in Ni/TiO{sub 2}/Ni stacks

DOE Office of Scientific and Technical Information (OSTI.GOV)

Cortese, Simone, E-mail: simone.cortese@soton.ac.uk; Trapatseli, Maria; Khiat, Ali

2016-08-14

Resistive switching and resistive random access memories have attracted huge interest for next generation nonvolatile memory applications, also thought to be able to overcome flash memories limitations when arranged in crossbar arrays. A cornerstone of their potential success is that the toggling between two distinct resistance states, usually a High Resistive State (HRS) and a Low Resistive State (LRS), is an intrinsic non-volatile phenomenon with the two states being thermodynamically stable. TiO{sub 2} is one of the most common materials known to support non-volatile RS. In this paper, we report a volatile resistive switching in a titanium dioxide thin filmmore » sandwiched by two nickel electrodes. The aim of this work is to understand the underlying physical mechanism that triggers the volatile effect, which is ascribed to the presence of a NiO layer at the bottom interface. The NiO layer alters the equilibrium between electric field driven filament formation and thermal enhanced ion diffusion, resulting in the volatile behaviour. Although the volatility is not ideal for non-volatile memory applications, it shows merit for access devices in crossbar arrays due to its high LRS/HRS ratio, which are also briefly discussed.« less

76 FR 2336 - Dynamic Random Access Memory Semiconductors From the Republic of Korea: Final Results of...

Federal Register 2010, 2011, 2012, 2013, 2014

2011-01-13

... DEPARTMENT OF COMMERCE International Trade Administration [C-580-851] Dynamic Random Access Memory... administrative review of the countervailing duty order on dynamic random access memory semiconductors from the... following events have occurred since the publication of the preliminary results of this review. See Dynamic...

75 FR 20564 - Dynamic Random Access Memory Semiconductors from the Republic of Korea: Extension of Time Limit...

Federal Register 2010, 2011, 2012, 2013, 2014

2010-04-20

... DEPARTMENT OF COMMERCE International Trade Administration [C-580-851] Dynamic Random Access Memory Semiconductors from the Republic of Korea: Extension of Time Limit for Preliminary Results of Countervailing Duty... access memory semiconductors from the Republic of Korea, covering the period January 1, 2008 through...

Accessibility versus Accuracy in Retrieving Spatial Memory: Evidence for Suboptimal Assumed Headings

ERIC Educational Resources Information Center

Yerramsetti, Ashok; Marchette, Steven A.; Shelton, Amy L.

2013-01-01

Orientation dependence in spatial memory has often been interpreted in terms of accessibility: Object locations are encoded relative to a reference orientation that affords the most accurate access to spatial memory. An open question, however, is whether people naturally use this "preferred" orientation whenever recalling the space. We…

Detecting Potentially Compromised Credentials in a Large-Scale Production Single-Signon System

DTIC Science & Technology

2014-06-01

Attention Deficit Hyperactivity Disorder ( ADHD ), Post-Traumatic Stress Disorder (PTSD), anxiety, they are neurotic, and have memory issues. They... Deficit Hyperactivity Disorder API Application Programming Interface CAC Common Access Card CBL Composite Blocking List CDF Cumulative Distribution...Service Logons (DSLs) system . . . . . . . . . . . . . . . . 49 xi THIS PAGE INTENTIONALLY LEFT BLANK xii List of Acronyms and Abbreviations ADHD Attention

Low latency and persistent data storage

DOEpatents

Fitch, Blake G; Franceschini, Michele M; Jagmohan, Ashish; Takken, Todd

2014-11-04

Persistent data storage is provided by a computer program product that includes computer program code configured for receiving a low latency store command that includes write data. The write data is written to a first memory device that is implemented by a nonvolatile solid-state memory technology characterized by a first access speed. It is acknowledged that the write data has been successfully written to the first memory device. The write data is written to a second memory device that is implemented by a volatile memory technology. At least a portion of the data in the first memory device is written to a third memory device when a predetermined amount of data has been accumulated in the first memory device. The third memory device is implemented by a nonvolatile solid-state memory technology characterized by a second access speed that is slower than the first access speed.

More than a feeling: Emotional cues impact the access and experience of autobiographical memories.

PubMed

Sheldon, Signy; Donahue, Julia

2017-07-01

Remembering is impacted by several factors of retrieval, including the emotional content of a memory cue. Here we tested how musical retrieval cues that differed on two dimensions of emotion-valence (positive and negative) and arousal (high and low)-impacted the following aspects of autobiographical memory recall: the response time to access a past personal event, the experience of remembering (ratings of memory vividness), the emotional content of a cued memory (ratings of event arousal and valence), and the type of event recalled (ratings of event energy, socialness, and uniqueness). We further explored how cue presentation affected autobiographical memory retrieval by administering cues of similar arousal and valence levels in a blocked fashion to one half of the tested participants, and randomly to the other half. We report three main findings. First, memories were accessed most quickly in response to musical cues that were highly arousing and positive in emotion. Second, we observed a relation between a cue and the elicited memory's emotional valence but not arousal; however, both the cue valence and arousal related to the nature of the recalled event. Specifically, high cue arousal led to lower memory vividness and uniqueness ratings, but cues with both high arousal and positive valence were associated with memories rated as more social and energetic. Finally, cue presentation impacted both how quickly and specifically memories were accessed and how cue valence affected the memory vividness ratings. The implications of these findings for views of how emotion directs the access to memories and the experience of remembering are discussed.

Optical memories in digital computing

NASA Technical Reports Server (NTRS)

Alford, C. O.; Gaylord, T. K.

1979-01-01

High capacity optical memories with relatively-high data-transfer rate and multiport simultaneous access capability may serve as basis for new computer architectures. Several computer structures that might profitably use memories are: a) simultaneous record-access system, b) simultaneously-shared memory computer system, and c) parallel digital processing structure.

Support for Diagnosis of Custom Computer Hardware

NASA Technical Reports Server (NTRS)

Molock, Dwaine S.

2008-01-01

The Coldfire SDN Diagnostics software is a flexible means of exercising, testing, and debugging custom computer hardware. The software is a set of routines that, collectively, serve as a common software interface through which one can gain access to various parts of the hardware under test and/or cause the hardware to perform various functions. The routines can be used to construct tests to exercise, and verify the operation of, various processors and hardware interfaces. More specifically, the software can be used to gain access to memory, to execute timer delays, to configure interrupts, and configure processor cache, floating-point, and direct-memory-access units. The software is designed to be used on diverse NASA projects, and can be customized for use with different processors and interfaces. The routines are supported, regardless of the architecture of a processor that one seeks to diagnose. The present version of the software is configured for Coldfire processors on the Subsystem Data Node processor boards of the Solar Dynamics Observatory. There is also support for the software with respect to Mongoose V, RAD750, and PPC405 processors or their equivalents.

Making working memory work: The effects of extended practice on focus capacity and the processes of updating, forward access, and random access

PubMed Central

Price, John M.; Colflesh, Gregory J. H.; Cerella, John; Verhaeghen, Paul

2014-01-01

We investigated the effects of 10 hours of practice on variations of the N-Back task to investigate the processes underlying possible expansion of the focus of attention within working memory. Using subtractive logic, we showed that random access (i.e., Sternberg-like search) yielded a modest effect (a 50% increase in speed) whereas the processes of forward access (i.e., retrieval in order, as in a standard N-Back task) and updating (i.e., changing the contents of working memory) were executed about 5 times faster after extended practice. We additionally found that extended practice increased working memory capacity as measured by the size of the focus of attention for the forward-access task, but not for variations where probing was in random order. This suggests that working memory capacity may depend on the type of search process engaged, and that certain working-memory-related cognitive processes are more amenable to practice than others. PMID:24486803

How intention and monitoring your thoughts influence characteristics of autobiographical memories.

PubMed

Barzykowski, Krystian; Staugaard, Søren Risløv

2018-05-01

Involuntary autobiographical memories come to mind effortlessly and unintended, but the mechanisms of their retrieval are not fully understood. We hypothesize that involuntary retrieval depends on memories that are highly accessible (e.g., intense, unusual, recent, rehearsed), while the elaborate search that characterizes voluntary retrieval also produces memories that are mundane, repeated or distant - memories with low accessibility. Previous research provides some evidence for this 'threshold hypothesis'. However, in almost every prior study, participants have been instructed to report only memories while ignoring other thoughts. It is possible that such an instruction can modify the phenomenological characteristics of involuntary memories. This study aimed to investigate the effects of retrieval intentionality (i.e., wanting to retrieve a memory) and selective monitoring (i.e., instructions to report only memories) on the phenomenology of autobiographical memories. Participants were instructed to (1) intentionally retrieve autobiographical memories, (2) intentionally retrieve any type of thought (3) wait for an autobiographical memory to spontaneously appear, or (4) wait for any type of thought to spontaneously appear. They rated the mental content on a number of phenomenological characteristics both during retrieval and retrospectively following retrieval. The results support the prediction that highly accessible memories mostly enter awareness unintended and without selective monitoring, while memories with low accessibility rely on intention and selective monitoring. We discuss the implications of these effects. © 2017 The British Psychological Society.

How are 'Barack Obama' and 'President Elect' differentially stored in the brain? An ERP investigation on the processing of proper and common noun pairs.

PubMed

Proverbio, Alice Mado; Mariani, Serena; Zani, Alberto; Adorni, Roberta

2009-09-23

One of the most debated issues in the cognitive neuroscience of language is whether distinct semantic domains are differentially represented in the brain. Clinical studies described several anomic dissociations with no clear neuroanatomical correlate. Neuroimaging studies have shown that memory retrieval is more demanding for proper than common nouns in that the former are purely arbitrary referential expressions. In this study a semantic relatedness paradigm was devised to investigate neural processing of proper and common nouns. 780 words (arranged in pairs of Italian nouns/adjectives and the first/last names of well known persons) were presented. Half pairs were semantically related ("Woody Allen" or "social security"), while the others were not ("Sigmund Parodi" or "judicial cream"). All items were balanced for length, frequency, familiarity and semantic relatedness. Participants were to decide about the semantic relatedness of the two items in a pair. RTs and N400 data suggest that the task was more demanding for common nouns. The LORETA neural generators for the related-unrelated contrast (for proper names) included the left fusiform gyrus, right medial temporal gyrus, limbic and parahippocampal regions, inferior parietal and inferior frontal areas, which are thought to be involved in the conjoined processing a familiar face with the relevant episodic information. Person name was more emotional and sensory vivid than common noun semantic access. When memory retrieval is not required, proper name access (conspecifics knowledge) is not more demanding. The neural generators of N400 to unrelated items (unknown persons and things) did not differ as a function of lexical class, thus suggesting that proper and common nouns are not treated differently as belonging to different grammatical classes.

How Are ‘Barack Obama’ and ‘President Elect’ Differentially Stored in the Brain? An ERP Investigation on the Processing of Proper and Common Noun Pairs

PubMed Central

Proverbio, Alice Mado; Mariani, Serena; Zani, Alberto; Adorni, Roberta

2009-01-01

Background One of the most debated issues in the cognitive neuroscience of language is whether distinct semantic domains are differentially represented in the brain. Clinical studies described several anomic dissociations with no clear neuroanatomical correlate. Neuroimaging studies have shown that memory retrieval is more demanding for proper than common nouns in that the former are purely arbitrary referential expressions. In this study a semantic relatedness paradigm was devised to investigate neural processing of proper and common nouns. Methodology/Principal Findings 780 words (arranged in pairs of Italian nouns/adjectives and the first/last names of well known persons) were presented. Half pairs were semantically related (“Woody Allen” or “social security”), while the others were not (“Sigmund Parodi” or “judicial cream”). All items were balanced for length, frequency, familiarity and semantic relatedness. Participants were to decide about the semantic relatedness of the two items in a pair. RTs and N400 data suggest that the task was more demanding for common nouns. The LORETA neural generators for the related-unrelated contrast (for proper names) included the left fusiform gyrus, right medial temporal gyrus, limbic and parahippocampal regions, inferior parietal and inferior frontal areas, which are thought to be involved in the conjoined processing a familiar face with the relevant episodic information. Person name was more emotional and sensory vivid than common noun semantic access. Conclusions/Significance When memory retrieval is not required, proper name access (conspecifics knowledge) is not more demanding. The neural generators of N400 to unrelated items (unknown persons and things) did not differ as a function of lexical class, thus suggesting that proper and common nouns are not treated differently as belonging to different grammatical classes. PMID:19774070

UPC++ Programmer’s Guide (v1.0 2017.9)

DOE Office of Scientific and Technical Information (OSTI.GOV)

Bachan, J.; Baden, S.; Bonachea, D.

UPC++ is a C++11 library that provides Asynchronous Partitioned Global Address Space (APGAS) programming. It is designed for writing parallel programs that run efficiently and scale well on distributed-memory parallel computers. The APGAS model is single program, multiple-data (SPMD), with each separate thread of execution (referred to as a rank, a term borrowed from MPI) having access to local memory as it would in C++. However, APGAS also provides access to a global address space, which is allocated in shared segments that are distributed over the ranks. UPC++ provides numerous methods for accessing and using global memory. In UPC++, allmore » operations that access remote memory are explicit, which encourages programmers to be aware of the cost of communication and data movement. Moreover, all remote-memory access operations are by default asynchronous, to enable programmers to write code that scales well even on hundreds of thousands of cores.« less

UPC++ Programmer’s Guide, v1.0-2018.3.0

DOE Office of Scientific and Technical Information (OSTI.GOV)

Bachan, J.; Baden, S.; Bonachea, Dan

UPC++ is a C++11 library that provides Partitioned Global Address Space (PGAS) programming. It is designed for writing parallel programs that run efficiently and scale well on distributed-memory parallel computers. The PGAS model is single program, multiple-data (SPMD), with each separate thread of execution (referred to as a rank, a term borrowed from MPI) having access to local memory as it would in C++. However, PGAS also provides access to a global address space, which is allocated in shared segments that are distributed over the ranks. UPC++ provides numerous methods for accessing and using global memory. In UPC++, all operationsmore » that access remote memory are explicit, which encourages programmers to be aware of the cost of communication and data movement. Moreover, all remote-memory access operations are by default asynchronous, to enable programmers to write code that scales well even on hundreds of thousands of cores.« less

Competition with and without priority control: linking rivalry to attention through winner-take-all networks with memory.

PubMed

Marx, Svenja; Gruenhage, Gina; Walper, Daniel; Rutishauser, Ueli; Einhäuser, Wolfgang

2015-03-01

Competition is ubiquitous in perception. For example, items in the visual field compete for processing resources, and attention controls their priority (biased competition). The inevitable ambiguity in the interpretation of sensory signals yields another form of competition: distinct perceptual interpretations compete for access to awareness. Rivalry, where two equally likely percepts compete for dominance, explicates the latter form of competition. Building upon the similarity between attention and rivalry, we propose to model rivalry by a generic competitive circuit that is widely used in the attention literature-a winner-take-all (WTA) network. Specifically, we show that a network of two coupled WTA circuits replicates three common hallmarks of rivalry: the distribution of dominance durations, their dependence on input strength ("Levelt's propositions"), and the effects of stimulus removal (blanking). This model introduces a form of memory by forming discrete states and explains experimental data better than competitive models of rivalry without memory. This result supports the crucial role of memory in rivalry specifically and in competitive processes in general. Our approach unifies the seemingly distinct phenomena of rivalry, memory, and attention in a single model with competition as the common underlying principle. © 2015 The Authors. Annals of the New York Academy of Sciences published by Wiley Periodicals Inc. on behalf of The New York Academy of Sciences.

Mapping virtual addresses to different physical addresses for value disambiguation for thread memory access requests

DOE Office of Scientific and Technical Information (OSTI.GOV)

Gala, Alan; Ohmacht, Martin

A multiprocessor system includes nodes. Each node includes a data path that includes a core, a TLB, and a first level cache implementing disambiguation. The system also includes at least one second level cache and a main memory. For thread memory access requests, the core uses an address associated with an instruction format of the core. The first level cache uses an address format related to the size of the main memory plus an offset corresponding to hardware thread meta data. The second level cache uses a physical main memory address plus software thread meta data to store the memorymore » access request. The second level cache accesses the main memory using the physical address with neither the offset nor the thread meta data after resolving speculation. In short, this system includes mapping of a virtual address to a different physical addresses for value disambiguation for different threads.« less

DOE Office of Scientific and Technical Information (OSTI.GOV)

Braiman, Yehuda; Neschke, Brendan; Nair, Niketh S.

Here, we study memory states of a circuit consisting of a small inductively coupled Josephson junction array and introduce basic (write, read, and reset) memory operations logics of the circuit. The presented memory operation paradigm is fundamentally different from conventional single quantum flux operation logics. We calculate stability diagrams of the zero-voltage states and outline memory states of the circuit. We also calculate access times and access energies for basic memory operations.

Is random access memory random?

NASA Technical Reports Server (NTRS)

Denning, P. J.

1986-01-01

Most software is contructed on the assumption that the programs and data are stored in random access memory (RAM). Physical limitations on the relative speeds of processor and memory elements lead to a variety of memory organizations that match processor addressing rate with memory service rate. These include interleaved and cached memory. A very high fraction of a processor's address requests can be satified from the cache without reference to the main memory. The cache requests information from main memory in blocks that can be transferred at the full memory speed. Programmers who organize algorithms for locality can realize the highest performance from these computers.

Distributed multiport memory architecture

NASA Technical Reports Server (NTRS)

Kohl, W. H. (Inventor)

1983-01-01

A multiport memory architecture is diclosed for each of a plurality of task centers connected to a command and data bus. Each task center, includes a memory and a plurality of devices which request direct memory access as needed. The memory includes an internal data bus and an internal address bus to which the devices are connected, and direct timing and control logic comprised of a 10-state ring counter for allocating memory devices by enabling AND gates connected to the request signal lines of the devices. The outputs of AND gates connected to the same device are combined by OR gates to form an acknowledgement signal that enables the devices to address the memory during the next clock period. The length of the ring counter may be effectively lengthened to any multiple of ten to allow for more direct memory access intervals in one repetitive sequence. One device is a network bus adapter which serially shifts onto the command and data bus, a data word (8 bits plus control and parity bits) during the next ten direct memory access intervals after it has been granted access. The NBA is therefore allocated only one access in every ten intervals, which is a predetermined interval for all centers. The ring counters of all centers are periodically synchronized by DMA SYNC signal to assure that all NBAs be able to function in synchronism for data transfer from one center to another.

Gender differences in the functional neuroanatomy of emotional episodic autobiographical memory.

PubMed

Piefke, Martina; Weiss, Peter H; Markowitsch, Hans J; Fink, Gereon R

2005-04-01

Autobiographical memory is based on interactions between episodic memory contents, associated emotions, and a sense of self-continuity along the time axis of one's life. The functional neuroanatomy subserving autobiographical memory is known to include prefrontal, medial and lateral temporal, as well as retrosplenial brain areas; however, whether gender differences exist in neural correlates of autobiographical memory remains to be clarified. We reanalyzed data from a previous functional magnetic resonance imaging (fMRI) experiment to investigate gender-related differences in the neural bases of autobiographical memories with differential remoteness and emotional valence. On the behavioral level, there were no significant gender differences in memory performance or emotional intensity of memories. Activations common to males and females during autobiographical memory retrieval were observed in a bilateral network of brain areas comprising medial and lateral temporal regions, including hippocampal and parahippocampal structures, posterior cingulate, as well as prefrontal cortex. In males (relative to females), all types of autobiographical memories investigated were associated with differential activation of the left parahippocampal gyrus. By contrast, right dorsolateral prefrontal cortex was activated differentially by females. In addition, the right insula was activated differentially in females during remote and negative memory retrieval. The data show gender-related differential neural activations within the network subserving autobiographical memory in both genders. We suggest that the differential activations may reflect gender-specific cognitive strategies during access to autobiographical memories that do not necessarily affect the behavioral level of memory performance and emotionality. (c) 2005 Wiley-Liss, Inc.

Personal digital assistant applications for the healthcare provider.

PubMed

Keplar, Kristine E; Urbanski, Christopher J

2003-02-01

To review some common medical applications available for personal digital assistants (PDAs), with brief discussion of the different PDA operating systems and memory requirements. Key search terms included handheld, PDA, personal digital assistants, and medical applications. The literature was accessed through MEDLINE (1999-August 2002). Other information was obtained through secondary sources such as Web sites describing common PDAs. Medical applications available on PDAs are numerous and include general drug references, specialized drug references (e.g., pediatrics, geriatrics, cardiology, infectious disease), diagnostic guides, medical calculators, herbal medication references, nursing references, toxicology references, and patient tracking databases. Costs and memory requirements for these programs can vary; consequently, the healthcare provider must limit the medication applications that are placed on the handheld computer. This article attempts to systematically describe the common medical applications available for the handheld computer along with cost, memory and download requirements, and Web site information. This review found many excellent PDA drug information applications offering many features which will aid the healthcare provider. Very likely, after using these PDA applications, the healthcare provider will find them indispensable, as their multifunctional capabilities can save time, improve accuracy, and allow for general business procedures as well as being a quick reference tool. To avoid the benefits of this technology might be a step backward.

Making working memory work: the effects of extended practice on focus capacity and the processes of updating, forward access, and random access.

PubMed

Price, John M; Colflesh, Gregory J H; Cerella, John; Verhaeghen, Paul

2014-05-01

We investigated the effects of 10h of practice on variations of the N-Back task to investigate the processes underlying possible expansion of the focus of attention within working memory. Using subtractive logic, we showed that random access (i.e., Sternberg-like search) yielded a modest effect (a 50% increase in speed) whereas the processes of forward access (i.e., retrieval in order, as in a standard N-Back task) and updating (i.e., changing the contents of working memory) were executed about 5 times faster after extended practice. We additionally found that extended practice increased working memory capacity as measured by the size of the focus of attention for the forward-access task, but not for variations where probing was in random order. This suggests that working memory capacity may depend on the type of search process engaged, and that certain working-memory-related cognitive processes are more amenable to practice than others. Copyright © 2014 Elsevier B.V. All rights reserved.

What can the programming language Rust do for astrophysics?

NASA Astrophysics Data System (ADS)

Blanco-Cuaresma, Sergi; Bolmont, Emeline

2017-06-01

The astrophysics community uses different tools for computational tasks such as complex systems simulations, radiative transfer calculations or big data. Programming languages like Fortran, C or C++ are commonly present in these tools and, generally, the language choice was made based on the need for performance. However, this comes at a cost: safety. For instance, a common source of error is the access to invalid memory regions, which produces random execution behaviors and affects the scientific interpretation of the results. In 2015, Mozilla Research released the first stable version of a new programming language named Rust. Many features make this new language attractive for the scientific community, it is open source and it guarantees memory safety while offering zero-cost abstraction. We explore the advantages and drawbacks of Rust for astrophysics by re-implementing the fundamental parts of Mercury-T, a Fortran code that simulates the dynamical and tidal evolution of multi-planet systems.

Programmable DMA controller

NASA Technical Reports Server (NTRS)

Hendry, David F. (Inventor)

1993-01-01

In a data system having a memory, plural input/output (I/O) devices and a bus connecting each of the I/O devices to the memory, a direct memory access (DMA) controller regulating access of each of the I/O devices to the bus, including a priority register storing priorities of bus access requests from the I/O devices, an interrupt register storing bus access requests of the I/O devices, a resolver for selecting one of the I/O devices to have access to the bus, a pointer register storing addresses of locations in the memory for communication with the one I/O device via the bus, a sequence register storing an address of a location in the memory containing a channel program instruction which is to be executed next, an ALU for incrementing and decrementing addresses stored in the pointer register, computing the next address to be stored in the sequence register, computing an initial contents of each of the register. The memory contains a sequence of channel program instructions defining a set up operation wherein the contents of each of the registers in the channel register is initialized in accordance with the initial contents computed by the ALU and an access operation wherein data is transferred on the bus between a location in the memory whose address is currently stored in the pointer register and the one I/O device enabled by the resolver.

zorder-lib: Library API for Z-Order Memory Layout

DOE Office of Scientific and Technical Information (OSTI.GOV)

Nowell, Lucy; Edward W. Bethel

2015-04-01

This document describes the motivation for, elements of, and use of the zorder-lib, a library API that implements organization of and access to data in memory using either a-order (also known as "row-major" order) or z-order memory layouts. The primary motivation for this work is to improve the performance of many types of data- intensive codes by increasing both spatial and temporal locality of memory accesses. The basic idea is that the cost associated with accessing a datum is less when it is nearby in either space or time.

Efficient accesses of data structures using processing near memory

DOE Office of Scientific and Technical Information (OSTI.GOV)

Jayasena, Nuwan S.; Zhang, Dong Ping; Diez, Paula Aguilera

Systems, apparatuses, and methods for implementing efficient queues and other data structures. A queue may be shared among multiple processors and/or threads without using explicit software atomic instructions to coordinate access to the queue. System software may allocate an atomic queue and corresponding queue metadata in system memory and return, to the requesting thread, a handle referencing the queue metadata. Any number of threads may utilize the handle for accessing the atomic queue. The logic for ensuring the atomicity of accesses to the atomic queue may reside in a management unit in the memory controller coupled to the memory wheremore » the atomic queue is allocated.« less

Memory Loss, Alzheimer's Disease and General Anesthesia: A Preoperative Concern.

PubMed

Thaler, Adam; Siry, Read; Cai, Lufan; García, Paul S; Chen, Linda; Liu, Renyu

2012-02-20

The long-term cognitive effects of general anesthesia are under intense scrutiny. Here we present 5 cases from 2 academic institutions to analyze some common features where the patient's or the patient family member has made a request to address their concern on memory loss, Alzheimer's disease and general anesthesia before surgery. Records of anesthesia consultation separate from standard preoperative evaluation were retrieved to identify consultations related to memory loss and Alzheimer's disease from the patient and/or patient family members. The identified cases were extensively reviewed for features in common. We used Google® (http://www. google.com/) to identify available online information using "anesthesia memory loss" as a search phrase. Five cases were collected as a specific preoperative consultation related to memory loss, Alzheimer's disease and general anesthesia from two institutions. All of the individuals either had perceived memory impairment after a prior surgical procedure with general anesthesia or had a family member with Alzheimer's disease. They all accessed public media sources to find articles related to anesthesia and memory loss. On May 2 nd , 2011, searching "anesthesia memory loss" in Google yielded 764,000 hits. Only 3 of the 50 Google top hits were from peer-reviewed journals. Some of the lay media postings made a causal association between general anesthesia and memory loss and/or Alzheimer's disease without conclusive scientific literature support. The potential link between memory loss and Alzheimer's disease with general anesthesia is an important preoperative concern from patients and their family members. This concern arises from individuals who have had history of cognitive impairment or have had a family member with Alzheimer disease and have tried to obtain information from public media. Proper preoperative consultation with the awareness of the lay literature can be useful in reducing patient and patient family member's preoperative anxiety related to this concern.

Memory Loss, Alzheimer’s Disease and General Anesthesia: A Preoperative Concern

PubMed Central

Thaler, Adam; Siry, Read; Cai, Lufan; García, Paul S.; Chen, Linda; Liu, RenYu

2012-01-01

Background The long-term cognitive effects of general anesthesia are under intense scrutiny. Here we present 5 cases from 2 academic institutions to analyze some common features where the patient’s or the patient family member has made a request to address their concern on memory loss, Alzheimer’s disease and general anesthesia before surgery. Methods Records of anesthesia consultation separate from standard preoperative evaluation were retrieved to identify consultations related to memory loss and Alzheimer’s disease from the patient and/or patient family members. The identified cases were extensively reviewed for features in common. We used Google® (http://www. google.com/) to identify available online information using “anesthesia memory loss” as a search phrase. Results Five cases were collected as a specific preoperative consultation related to memory loss, Alzheimer’s disease and general anesthesia from two institutions. All of the individuals either had perceived memory impairment after a prior surgical procedure with general anesthesia or had a family member with Alzheimer’s disease. They all accessed public media sources to find articles related to anesthesia and memory loss. On May 2nd, 2011, searching “anesthesia memory loss” in Google yielded 764,000 hits. Only 3 of the 50 Google top hits were from peer-reviewed journals. Some of the lay media postings made a causal association between general anesthesia and memory loss and/or Alzheimer’s disease without conclusive scientific literature support. Conclusion The potential link between memory loss and Alzheimer’s disease with general anesthesia is an important preoperative concern from patients and their family members. This concern arises from individuals who have had history of cognitive impairment or have had a family member with Alzheimer disease and have tried to obtain information from public media. Proper preoperative consultation with the awareness of the lay literature can be useful in reducing patient and patient family member’s preoperative anxiety related to this concern. PMID:23853740

Working memory capacity and controlled serial memory search.

PubMed

Mızrak, Eda; Öztekin, Ilke

2016-08-01

The speed-accuracy trade-off (SAT) procedure was used to investigate the relationship between working memory capacity (WMC) and the dynamics of temporal order memory retrieval. High- and low-span participants (HSs, LSs) studied sequentially presented five-item lists, followed by two probes from the study list. Participants indicated the more recent probe. Overall, accuracy was higher for HSs compared to LSs. Crucially, in contrast to previous investigations that observed no impact of WMC on speed of access to item information in memory (e.g., Öztekin & McElree, 2010), recovery of temporal order memory was slower for LSs. While accessing an item's representation in memory can be direct, recovery of relational information such as temporal order information requires a more controlled serial memory search. Collectively, these data indicate that WMC effects are particularly prominent during high demands of cognitive control, such as serial search operations necessary to access temporal order information from memory. Copyright © 2016 Elsevier B.V. All rights reserved.

The potential of multi-port optical memories in digital computing

NASA Technical Reports Server (NTRS)

Alford, C. O.; Gaylord, T. K.

1975-01-01

A high-capacity memory with a relatively high data transfer rate and multi-port simultaneous access capability may serve as the basis for new computer architectures. The implementation of a multi-port optical memory is discussed. Several computer structures are presented that might profitably use such a memory. These structures include (1) a simultaneous record access system, (2) a simultaneously shared memory computer system, and (3) a parallel digital processing structure.

Saying what’s on your mind: Working memory effects on sentence production

PubMed Central

Slevc, L. Robert

2011-01-01

The role of working memory (WM) in sentence comprehension has received considerable interest, but little work has investigated how sentence production relies on memory mechanisms. These three experiments investigated speakers’ tendency to produce syntactic structures that allow for early production of material that is accessible in memory. In Experiment 1, speakers produced accessible information early less often when under a verbal WM load than when under no load. Experiment 2 found the same pattern for given-new ordering, i.e., when accessibility was manipulated by making information given. Experiment 3 addressed the possibility that these effects do not reflect WM mechanisms but rather increased task difficulty by relying on the distinction between verbal and spatial WM: Speakers’ tendency to produce sentences respecting given-new ordering was reduced more by a verbal than by a spatial WM load. These patterns show that accessibility effects do in fact reflect accessibility in verbal WM, and that representations in sentence production are vulnerable to interference from other information in memory. PMID:21767058

Working memory at work: how the updating process alters the nature of working memory transfer.

PubMed

Zhang, Yanmin; Verhaeghen, Paul; Cerella, John

2012-01-01

In three N-Back experiments, we investigated components of the process of working memory (WM) updating, more specifically access to items stored outside the focus of attention and transfer from the focus to the region of WM outside the focus. We used stimulus complexity as a marker. We found that when WM transfer occurred under full attention, it was slow and highly sensitive to stimulus complexity, much more so than WM access. When transfer occurred in conjunction with access, however, it was fast and no longer sensitive to stimulus complexity. Thus the updating context altered the nature of WM processing: The dual-task situation (transfer in conjunction with access) drove memory transfer into a more efficient mode, indifferent to stimulus complexity. In contrast, access times consistently increased with complexity, unaffected by the processing context. This study reinforces recent reports that retrieval is a (perhaps the) key component of working memory functioning. Copyright © 2011 Elsevier B.V. All rights reserved.

Working Memory at Work: How the Updating Process Alters the Nature of Working Memory Transfer

PubMed Central

Zhang, Yanmin; Verhaeghen, Paul; Cerella, John

2011-01-01

In three N-Back experiments, we investigated components of the process of working memory (WM) updating, more specifically access to items stored outside the focus of attention and transfer from the focus to the region of WM outside the focus. We used stimulus complexity as a marker. We found that when WM transfer occurred under full attention, it was slow and highly sensitive to stimulus complexity, much more so than WM access. When transfer occurred in conjunction with access, however, it was fast and no longer sensitive to stimulus complexity. Thus the updating context altered the nature of WM processing: The dual-task situation (transfer in conjunction with access) drove memory transfer into a more efficient mode, indifferent to stimulus complexity. In contrast, access times consistently increased with complexity, unaffected by the processing context. This study reinforces recent reports that retrieval is a (perhaps the) key component of working memory functioning. PMID:22105718

Children's Access to Public Library Services: Prince George's County Memorial Public Library, Maryland, 1980.

ERIC Educational Resources Information Center

Gerhardt, Lillian N.

1981-01-01

Evaluates the Prince George's County Memorial Public Library's approach to providing access to its services for children, and examines policies, regulations, practices, and conditions that affect such access. Six references are cited. (FM)

What versus where: Investigating how autobiographical memory retrieval differs when accessed with thematic versus spatial information.

PubMed

Sheldon, Signy; Chu, Sonja

2017-09-01

Autobiographical memory research has investigated how cueing distinct aspects of a past event can trigger different recollective experiences. This research has stimulated theories about how autobiographical knowledge is accessed and organized. Here, we test the idea that thematic information organizes multiple autobiographical events whereas spatial information organizes individual past episodes by investigating how retrieval guided by these two forms of information differs. We used a novel autobiographical fluency task in which participants accessed multiple memory exemplars to event theme and spatial (location) cues followed by a narrative description task in which they described the memories generated to these cues. Participants recalled significantly more memory exemplars to event theme than to spatial cues; however, spatial cues prompted faster access to past memories. Results from the narrative description task revealed that memories retrieved via event theme cues compared to spatial cues had a higher number of overall details, but those recalled to the spatial cues were recollected with a greater concentration on episodic details than those retrieved via event theme cues. These results provide evidence that thematic information organizes and integrates multiple memories whereas spatial information prompts the retrieval of specific episodic content from a past event.

Memory-efficient table look-up optimized algorithm for context-based adaptive variable length decoding in H.264/advanced video coding

NASA Astrophysics Data System (ADS)

Wang, Jianhua; Cheng, Lianglun; Wang, Tao; Peng, Xiaodong

2016-03-01

Table look-up operation plays a very important role during the decoding processing of context-based adaptive variable length decoding (CAVLD) in H.264/advanced video coding (AVC). However, frequent table look-up operation can result in big table memory access, and then lead to high table power consumption. Aiming to solve the problem of big table memory access of current methods, and then reduce high power consumption, a memory-efficient table look-up optimized algorithm is presented for CAVLD. The contribution of this paper lies that index search technology is introduced to reduce big memory access for table look-up, and then reduce high table power consumption. Specifically, in our schemes, we use index search technology to reduce memory access by reducing the searching and matching operations for code_word on the basis of taking advantage of the internal relationship among length of zero in code_prefix, value of code_suffix and code_lengh, thus saving the power consumption of table look-up. The experimental results show that our proposed table look-up algorithm based on index search can lower about 60% memory access consumption compared with table look-up by sequential search scheme, and then save much power consumption for CAVLD in H.264/AVC.

Garnet Random-Access Memory

NASA Technical Reports Server (NTRS)

Katti, Romney R.

1995-01-01

Random-access memory (RAM) devices of proposed type exploit magneto-optical properties of magnetic garnets exhibiting perpendicular anisotropy. Magnetic writing and optical readout used. Provides nonvolatile storage and resists damage by ionizing radiation. Because of basic architecture and pinout requirements, most likely useful as small-capacity memory devices.

Development of Curie point switching for thin film, random access, memory device

NASA Technical Reports Server (NTRS)

Lewicki, G. W.; Tchernev, D. I.

1967-01-01

Managanese bismuthide films are used in the development of a random access memory device of high packing density and nondestructive readout capability. Memory entry is by Curie point switching using a laser beam. Readout is accomplished by microoptical or micromagnetic scanning.

Individual differences in memory span: the contribution of rehearsal, access to lexical memory, and output speed.

PubMed

Tehan, G; Lalor, D M

2000-11-01

Rehearsal speed has traditionally been seen to be the prime determinant of individual differences in memory span. Recent studies, in the main using young children as the subject population, have suggested other contributors to span performance, notably contributions from long-term memory and forgetting and retrieval processes occurring during recall. In the current research we explore individual differences in span with respect to measures of rehearsal, output time, and access to lexical memory. We replicate standard short-term phenomena; we show that the variables that influence children's span performance influence adult performance in the same way; and we show that lexical memory access appears to be a more potent source of individual differences in span than either rehearsal speed or output factors.

Adult Age Differences in Accessing and Retrieving Information from Long-Term Memory.

ERIC Educational Resources Information Center

Petros, Thomas V.; And Others

1983-01-01

Investigated adult age differences in accessing and retrieving information from long-term memory. Results showed that older adults (N=26) were slower than younger adults (N=35) at feature extraction, lexical access, and accessing category information. The age deficit was proportionally greater when retrieval of category information was required.…

Bubble memory module for spacecraft application

NASA Technical Reports Server (NTRS)

Hayes, P. J.; Looney, K. T.; Nichols, C. D.

1985-01-01

Bubble domain technology offers an all-solid-state alternative for data storage in onboard data systems. A versatile modular bubble memory concept was developed. The key module is the bubble memory module which contains all of the storage devices and circuitry for accessing these devices. This report documents the bubble memory module design and preliminary hardware designs aimed at memory module functional demonstration with available commercial bubble devices. The system architecture provides simultaneous operation of bubble devices to attain high data rates. Banks of bubble devices are accessed by a given bubble controller to minimize controller parts. A power strobing technique is discussed which could minimize the average system power dissipation. A fast initialization method using EEPROM (electrically erasable, programmable read-only memory) devices promotes fast access. Noise and crosstalk problems and implementations to minimize these are discussed. Flight memory systems which incorporate the concepts and techniques of this work could now be developed for applications.

Wide-Range Motion Estimation Architecture with Dual Search Windows for High Resolution Video Coding

NASA Astrophysics Data System (ADS)

Dung, Lan-Rong; Lin, Meng-Chun

This paper presents a memory-efficient motion estimation (ME) technique for high-resolution video compression. The main objective is to reduce the external memory access, especially for limited local memory resource. The reduction of memory access can successfully save the notorious power consumption. The key to reduce the memory accesses is based on center-biased algorithm in that the center-biased algorithm performs the motion vector (MV) searching with the minimum search data. While considering the data reusability, the proposed dual-search-windowing (DSW) approaches use the secondary windowing as an option per searching necessity. By doing so, the loading of search windows can be alleviated and hence reduce the required external memory bandwidth. The proposed techniques can save up to 81% of external memory bandwidth and require only 135 MBytes/sec, while the quality degradation is less than 0.2dB for 720p HDTV clips coded at 8Mbits/sec.

Radiation Effects of Commercial Resistive Random Access Memories

NASA Technical Reports Server (NTRS)

Chen, Dakai; LaBel, Kenneth A.; Berg, Melanie; Wilcox, Edward; Kim, Hak; Phan, Anthony; Figueiredo, Marco; Buchner, Stephen; Khachatrian, Ani; Roche, Nicolas

2014-01-01

We present results for the single-event effect response of commercial production-level resistive random access memories. We found that the resistive memory arrays are immune to heavy ion-induced upsets. However, the devices were susceptible to single-event functional interrupts, due to upsets from the control circuits. The intrinsic radiation tolerant nature of resistive memory makes the technology an attractive consideration for future space applications.

Accessibility Limits Recall from Visual Working Memory

ERIC Educational Resources Information Center

Rajsic, Jason; Swan, Garrett; Wilson, Daryl E.; Pratt, Jay

2017-01-01

In this article, we demonstrate limitations of accessibility of information in visual working memory (VWM). Recently, cued-recall has been used to estimate the fidelity of information in VWM, where the feature of a cued object is reproduced from memory (Bays, Catalao, & Husain, 2009; Wilken & Ma, 2004; Zhang & Luck, 2008). Response…

The Cooperate Assistive Teamwork Environment for Software Description Languages.

PubMed

Groenda, Henning; Seifermann, Stephan; Müller, Karin; Jaworek, Gerhard

2015-01-01

Versatile description languages such as the Unified Modeling Language (UML) are commonly used in software engineering across different application domains in theory and practice. They often use graphical notations and leverage visual memory for expressing complex relations. Those notations are hard to access for people with visual impairment and impede their smooth inclusion in an engineering team. Existing approaches provide textual notations but require manual synchronization between the notations. This paper presents requirements for an accessible and language-aware team work environment as well as our plan for the assistive implementation of Cooperate. An industrial software engineering team consisting of people with and without visual impairment will evaluate the implementation.

Shared direct memory access on the Explorer 2-LX

NASA Technical Reports Server (NTRS)

Musgrave, Jeffrey L.

1990-01-01

Advances in Expert System technology and Artificial Intelligence have provided a framework for applying automated Intelligence to the solution of problems which were generally perceived as intractable using more classical approaches. As a result, hybrid architectures and parallel processing capability have become more common in computing environments. The Texas Instruments Explorer II-LX is an example of a machine which combines a symbolic processing environment, and a computationally oriented environment in a single chassis for integrated problem solutions. This user's manual is an attempt to make these capabilities more accessible to a wider range of engineers and programmers with problems well suited to solution in such an environment.

Non-tables look-up search algorithm for efficient H.264/AVC context-based adaptive variable length coding decoding

NASA Astrophysics Data System (ADS)

Han, Yishi; Luo, Zhixiao; Wang, Jianhua; Min, Zhixuan; Qin, Xinyu; Sun, Yunlong

2014-09-01

In general, context-based adaptive variable length coding (CAVLC) decoding in H.264/AVC standard requires frequent access to the unstructured variable length coding tables (VLCTs) and significant memory accesses are consumed. Heavy memory accesses will cause high power consumption and time delays, which are serious problems for applications in portable multimedia devices. We propose a method for high-efficiency CAVLC decoding by using a program instead of all the VLCTs. The decoded codeword from VLCTs can be obtained without any table look-up and memory access. The experimental results show that the proposed algorithm achieves 100% memory access saving and 40% decoding time saving without degrading video quality. Additionally, the proposed algorithm shows a better performance compared with conventional CAVLC decoding, such as table look-up by sequential search, table look-up by binary search, Moon's method, and Kim's method.

The two faces of selective memory retrieval: recall specificity of the detrimental but not the beneficial effect.

PubMed

Bäuml, Karl-Heinz T; Dobler, Ina M

2015-01-01

Depending on the degree to which the original study context is accessible, selective memory retrieval can be detrimental or beneficial for the recall of other memories (Bäuml & Samenieh, 2012). Prior work has shown that the detrimental effect of memory retrieval is typically recall specific and does not arise after restudy trials, whereas recall specificity of the beneficial effect has not been examined to date. Addressing the issue, we compared in 2 experiments the effects of retrieval and restudy on recall of other items, when access to the study context was (largely) maintained and when access to the study context was impaired (in Experiment 1 by using the listwise directed-forgetting task, in Experiment 2 by using a prolonged retention interval). In both experiments, selective retrieval but not restudy induced forgetting of other items when context access was maintained, which replicates prior work. In contrast, when context access was impaired, both selective retrieval and restudy induced beneficial effects on other memories. These findings suggest that the detrimental but not the beneficial effect of selective memory retrieval is recall specific. The results are consistent with a recent 2-factor account of selective memory retrieval that attributes the detrimental effect to inhibition or blocking but the beneficial effect to context reactivation processes. PsycINFO Database Record (c) 2015 APA, all rights reserved.

Low latency memory access and synchronization

DOE Office of Scientific and Technical Information (OSTI.GOV)

Blumrich, Matthias A.; Chen, Dong; Coteus, Paul W.

A low latency memory system access is provided in association with a weakly-ordered multiprocessor system. Each processor in the multiprocessor shares resources, and each shared resource has an associated lock within a locking device that provides support for synchronization between the multiple processors in the multiprocessor and the orderly sharing of the resources. A processor only has permission to access a resource when it owns the lock associated with that resource, and an attempt by a processor to own a lock requires only a single load operation, rather than a traditional atomic load followed by store, such that the processormore » only performs a read operation and the hardware locking device performs a subsequent write operation rather than the processor. A simple prefetching for non-contiguous data structures is also disclosed. A memory line is redefined so that in addition to the normal physical memory data, every line includes a pointer that is large enough to point to any other line in the memory, wherein the pointers to determine which memory line to prefetch rather than some other predictive algorithm. This enables hardware to effectively prefetch memory access patterns that are non-contiguous, but repetitive.« less

Low latency memory access and synchronization

DOE Office of Scientific and Technical Information (OSTI.GOV)

Blumrich, Matthias A.; Chen, Dong; Coteus, Paul W.

A low latency memory system access is provided in association with a weakly-ordered multiprocessor system. Bach processor in the multiprocessor shares resources, and each shared resource has an associated lock within a locking device that provides support for synchronization between the multiple processors in the multiprocessor and the orderly sharing of the resources. A processor only has permission to access a resource when it owns the lock associated with that resource, and an attempt by a processor to own a lock requires only a single load operation, rather than a traditional atomic load followed by store, such that the processormore » only performs a read operation and the hardware locking device performs a subsequent write operation rather than the processor. A simple prefetching for non-contiguous data structures is also disclosed. A memory line is redefined so that in addition to the normal physical memory data, every line includes a pointer that is large enough to point to any other line in the memory, wherein the pointers to determine which memory line to prefetch rather than some other predictive algorithm. This enables hardware to effectively prefetch memory access patterns that are non-contiguous, but repetitive.« less

Plated wire random access memories

NASA Technical Reports Server (NTRS)

Gouldin, L. D.

1975-01-01

A program was conducted to construct 4096-work by 18-bit random access, NDRO-plated wire memory units. The memory units were subjected to comprehensive functional and environmental tests at the end-item level to verify comformance with the specified requirements. A technical description of the unit is given, along with acceptance test data sheets.

The Dynamics of Access to Groups in Working Memory

ERIC Educational Resources Information Center

Farrell, Simon; Lelievre, Anna

2012-01-01

The finding that participants leave a pause between groups when attempting serial recall of temporally grouped lists has been taken to indicate access to a hierarchical representation of the list in working memory. An alternative explanation is that the dynamics of serial recall solely reflect output (rather than memorial) processes, with the…

An Adaptive Insertion and Promotion Policy for Partitioned Shared Caches

NASA Astrophysics Data System (ADS)

Mahrom, Norfadila; Liebelt, Michael; Raof, Rafikha Aliana A.; Daud, Shuhaizar; Hafizah Ghazali, Nur

2018-03-01

Cache replacement policies in chip multiprocessors (CMP) have been investigated extensively and proven able to enhance shared cache management. However, competition among multiple processors executing different threads that require simultaneous access to a shared memory may cause cache contention and memory coherence problems on the chip. These issues also exist due to some drawbacks of the commonly used Least Recently Used (LRU) policy employed in multiprocessor systems, which are because of the cache lines residing in the cache longer than required. In image processing analysis of for example extra pulmonary tuberculosis (TB), an accurate diagnosis for tissue specimen is required. Therefore, a fast and reliable shared memory management system to execute algorithms for processing vast amount of specimen image is needed. In this paper, the effects of the cache replacement policy in a partitioned shared cache are investigated. The goal is to quantify whether better performance can be achieved by using less complex replacement strategies. This paper proposes a Middle Insertion 2 Positions Promotion (MI2PP) policy to eliminate cache misses that could adversely affect the access patterns and the throughput of the processors in the system. The policy employs a static predefined insertion point, near distance promotion, and the concept of ownership in the eviction policy to effectively improve cache thrashing and to avoid resource stealing among the processors.

Improving the effectiveness of an interruption lag by inducing a memory-based strategy.

PubMed

Morgan, Phillip L; Patrick, John; Tiley, Leyanne

2013-01-01

The memory for goals model (Altmann & Trafton, 2002) posits the importance of a short delay (the 'interruption lag') before an interrupting task to encode suspended goals for retrieval post-interruption. Two experiments used the theory of soft constraints (Gray, Simms, Fu & Schoelles, 2006) to investigate whether the efficacy of an interruption lag could be improved by increasing goal-state access cost to induce a more memory-based encoding strategy. Both experiments used a copying task with three access cost conditions (Low, Medium, and High) and a 5-s interruption lag with a no lag control condition. Experiment 1 found that the participants in the High access cost condition resumed more interrupted trials and executed more actions correctly from memory when coupled with an interruption lag. Experiment 2 used a prospective memory test post-interruption and an eyetracker recorded gaze activity during the interruption lag. The participants in the High access cost condition with an interruption lag were best at encoding target information during the interruption lag, evidenced by higher scores on the prospective memory measure and more gaze activity on the goal-state during the interruption lag. Theoretical and practical issues regarding the use of goal-state access cost and an interruption lag are discussed. Copyright © 2012. Published by Elsevier B.V.

Programmable Direct-Memory-Access Controller

NASA Technical Reports Server (NTRS)

Hendry, David F.

1990-01-01

Proposed programmable direct-memory-access controller (DMAC) operates with computer systems of 32000 series, which have 32-bit data buses and use addresses of 24 (or potentially 32) bits. Controller functions with or without help of central processing unit (CPU) and starts itself. Includes such advanced features as ability to compare two blocks of memory for equality and to search block of memory for specific value. Made as single very-large-scale integrated-circuit chip.

A DNA-based pattern classifier with in vitro learning and associative recall for genomic characterization and biosensing without explicit sequence knowledge.

PubMed

Lee, Ju Seok; Chen, Junghuei; Deaton, Russell; Kim, Jin-Woo

2014-01-01

Genetic material extracted from in situ microbial communities has high promise as an indicator of biological system status. However, the challenge is to access genomic information from all organisms at the population or community scale to monitor the biosystem's state. Hence, there is a need for a better diagnostic tool that provides a holistic view of a biosystem's genomic status. Here, we introduce an in vitro methodology for genomic pattern classification of biological samples that taps large amounts of genetic information from all genes present and uses that information to detect changes in genomic patterns and classify them. We developed a biosensing protocol, termed Biological Memory, that has in vitro computational capabilities to "learn" and "store" genomic sequence information directly from genomic samples without knowledge of their explicit sequences, and that discovers differences in vitro between previously unknown inputs and learned memory molecules. The Memory protocol was designed and optimized based upon (1) common in vitro recombinant DNA operations using 20-base random probes, including polymerization, nuclease digestion, and magnetic bead separation, to capture a snapshot of the genomic state of a biological sample as a DNA memory and (2) the thermal stability of DNA duplexes between new input and the memory to detect similarities and differences. For efficient read out, a microarray was used as an output method. When the microarray-based Memory protocol was implemented to test its capability and sensitivity using genomic DNA from two model bacterial strains, i.e., Escherichia coli K12 and Bacillus subtilis, results indicate that the Memory protocol can "learn" input DNA, "recall" similar DNA, differentiate between dissimilar DNA, and detect relatively small concentration differences in samples. This study demonstrated not only the in vitro information processing capabilities of DNA, but also its promise as a genomic pattern classifier that could access information from all organisms in a biological system without explicit genomic information. The Memory protocol has high potential for many applications, including in situ biomonitoring of ecosystems, screening for diseases, biosensing of pathological features in water and food supplies, and non-biological information processing of memory devices, among many.

Memory-Intensive Benchmarks: IRAM vs. Cache-Based Machines

NASA Technical Reports Server (NTRS)

Biswas, Rupak; Gaeke, Brian R.; Husbands, Parry; Li, Xiaoye S.; Oliker, Leonid; Yelick, Katherine A.; Biegel, Bryan (Technical Monitor)

2002-01-01

The increasing gap between processor and memory performance has lead to new architectural models for memory-intensive applications. In this paper, we explore the performance of a set of memory-intensive benchmarks and use them to compare the performance of conventional cache-based microprocessors to a mixed logic and DRAM processor called VIRAM. The benchmarks are based on problem statements, rather than specific implementations, and in each case we explore the fundamental hardware requirements of the problem, as well as alternative algorithms and data structures that can help expose fine-grained parallelism or simplify memory access patterns. The benchmarks are characterized by their memory access patterns, their basic control structures, and the ratio of computation to memory operation.

Some pitfalls in measuring memory in animals.

PubMed

Thorpe, Christina M; Jacova, Claudia; Wilkie, Donald M

2004-11-01

Because the presence or absence of memories in the brain cannot be directly observed, scientists must rely on indirect measures and use inferential reasoning to make statements about the status of memories. In humans, memories are often accessed through spoken or written language. In animals, memory is accessed through overt behaviours such as running down an arm in a maze, pressing a lever, or visiting a food cache site. Because memory is measured by these indirect methods, errors in the veracity of statements about memory can occur. In this brief paper, we identify three areas that may serve as pitfalls in reasoning about memory in animals: (1) the presence of 'silent associations', (2) intrusions of species-typical behaviours on memory tasks, and (3) improper mapping between human and animals memory tasks. There are undoubtedly other areas in which scientists should act cautiously when reasoning about the status of memory.

A Decision Model for Selection of Microcomputers and Operating Systems.

DTIC Science & Technology

1984-06-01

is resilting in application software (for microccmputers) being developed almost exclu- sively tor the IBM PC and compatiole systems. NAVDAC ielt that...location can be indepen- dently accessed. RAN memory is also often called read/ write memory, hecause new information can be written into and read from...when power is lost; this is also read/ write memory. Bubble memory, however, has significantly slower access times than RAM or RON and also is not preva

MemAxes: Visualization and Analytics for Characterizing Complex Memory Performance Behaviors.

PubMed

Gimenez, Alfredo; Gamblin, Todd; Jusufi, Ilir; Bhatele, Abhinav; Schulz, Martin; Bremer, Peer-Timo; Hamann, Bernd

2018-07-01

Memory performance is often a major bottleneck for high-performance computing (HPC) applications. Deepening memory hierarchies, complex memory management, and non-uniform access times have made memory performance behavior difficult to characterize, and users require novel, sophisticated tools to analyze and optimize this aspect of their codes. Existing tools target only specific factors of memory performance, such as hardware layout, allocations, or access instructions. However, today's tools do not suffice to characterize the complex relationships between these factors. Further, they require advanced expertise to be used effectively. We present MemAxes, a tool based on a novel approach for analytic-driven visualization of memory performance data. MemAxes uniquely allows users to analyze the different aspects related to memory performance by providing multiple visual contexts for a centralized dataset. We define mappings of sampled memory access data to new and existing visual metaphors, each of which enabling a user to perform different analysis tasks. We present methods to guide user interaction by scoring subsets of the data based on known performance problems. This scoring is used to provide visual cues and automatically extract clusters of interest. We designed MemAxes in collaboration with experts in HPC and demonstrate its effectiveness in case studies.

Integrated semiconductor-magnetic random access memory system

NASA Technical Reports Server (NTRS)

Katti, Romney R. (Inventor); Blaes, Brent R. (Inventor)

2001-01-01

The present disclosure describes a non-volatile magnetic random access memory (RAM) system having a semiconductor control circuit and a magnetic array element. The integrated magnetic RAM system uses CMOS control circuit to read and write data magnetoresistively. The system provides a fast access, non-volatile, radiation hard, high density RAM for high speed computing.

Attention and memory protection: Interactions between retrospective attention cueing and interference.

PubMed

Makovski, Tal; Pertzov, Yoni

2015-01-01

Visual working memory (VWM) and attention have a number of features in common, but despite extensive research it is still unclear how the two interact. Can focused attention improve VWM precision? Can it protect VWM from interference? Here we used a partial-report, continuous-response orientation memory task to examine how attention and interference affect different aspects of VWM and how they interact with one another. Both attention and interference were orthogonally manipulated during the retention interval. Attention was manipulated by presenting informative retro-cues, whereas interference was manipulated by introducing a secondary interfering task. Mixture-model analyses revealed that retro-cues, compared to uninformative cues, improved all aspects of performance: Attention increased recall precision and decreased guessing rate and swap-errors (reporting a wrong item in memory). Similarly, performing a secondary task impaired all aspects of the VWM task. In particular, an interaction between retro-cue and secondary task interference was found primarily for swap-errors. Together these results suggest that both the quantity and quality of VWM representations are sensitive to attention cueing and interference modulations, and they highlight the role of attention in protecting the feature-location associations needed to access the correct items in memory.

A novel ternary content addressable memory design based on resistive random access memory with high intensity and low search energy

NASA Astrophysics Data System (ADS)

Han, Runze; Shen, Wensheng; Huang, Peng; Zhou, Zheng; Liu, Lifeng; Liu, Xiaoyan; Kang, Jinfeng

2018-04-01

A novel ternary content addressable memory (TCAM) design based on resistive random access memory (RRAM) is presented. Each TCAM cell consists of two parallel RRAM to both store and search for ternary data. The cell size of the proposed design is 8F2, enable a ∼60× cell area reduction compared with the conventional static random access memory (SRAM) based implementation. Simulation results also show that the search delay and energy consumption of the proposed design at the 64-bit word search are 2 ps and 0.18 fJ/bit/search respectively at 22 nm technology node, where significant improvements are achieved compared to previous works. The desired characteristics of RRAM for implementation of the high performance TCAM search chip are also discussed.

An Investigation of Unified Memory Access Performance in CUDA

PubMed Central

Landaverde, Raphael; Zhang, Tiansheng; Coskun, Ayse K.; Herbordt, Martin

2015-01-01

Managing memory between the CPU and GPU is a major challenge in GPU computing. A programming model, Unified Memory Access (UMA), has been recently introduced by Nvidia to simplify the complexities of memory management while claiming good overall performance. In this paper, we investigate this programming model and evaluate its performance and programming model simplifications based on our experimental results. We find that beyond on-demand data transfers to the CPU, the GPU is also able to request subsets of data it requires on demand. This feature allows UMA to outperform full data transfer methods for certain parallel applications and small data sizes. We also find, however, that for the majority of applications and memory access patterns, the performance overheads associated with UMA are significant, while the simplifications to the programming model restrict flexibility for adding future optimizations. PMID:26594668

Daily Access to Sucrose Impairs Aspects of Spatial Memory Tasks Reliant on Pattern Separation and Neural Proliferation in Rats

ERIC Educational Resources Information Center

Reichelt, Amy C.; Morris, Margaret J.; Westbrook, Reginald Frederick

2016-01-01

High sugar diets reduce hippocampal neurogenesis, which is required for minimizing interference between memories, a process that involves "pattern separation." We provided rats with 2 h daily access to a sucrose solution for 28 d and assessed their performance on a spatial memory task. Sucrose consuming rats discriminated between objects…

Encoding and Retrieval Processes Involved in the Access of Source Information in the Absence of Item Memory

ERIC Educational Resources Information Center

Ball, B. Hunter; DeWitt, Michael R.; Knight, Justin B.; Hicks, Jason L.

2014-01-01

The current study sought to examine the relative contributions of encoding and retrieval processes in accessing contextual information in the absence of item memory using an extralist cuing procedure in which the retrieval cues used to query memory for contextual information were "related" to the target item but never actually studied.…

Boosting the FM-Index on the GPU: Effective Techniques to Mitigate Random Memory Access.

PubMed

Chacón, Alejandro; Marco-Sola, Santiago; Espinosa, Antonio; Ribeca, Paolo; Moure, Juan Carlos

2015-01-01

The recent advent of high-throughput sequencing machines producing big amounts of short reads has boosted the interest in efficient string searching techniques. As of today, many mainstream sequence alignment software tools rely on a special data structure, called the FM-index, which allows for fast exact searches in large genomic references. However, such searches translate into a pseudo-random memory access pattern, thus making memory access the limiting factor of all computation-efficient implementations, both on CPUs and GPUs. Here, we show that several strategies can be put in place to remove the memory bottleneck on the GPU: more compact indexes can be implemented by having more threads work cooperatively on larger memory blocks, and a k-step FM-index can be used to further reduce the number of memory accesses. The combination of those and other optimisations yields an implementation that is able to process about two Gbases of queries per second on our test platform, being about 8 × faster than a comparable multi-core CPU version, and about 3 × to 5 × faster than the FM-index implementation on the GPU provided by the recently announced Nvidia NVBIO bioinformatics library.

Paging memory from random access memory to backing storage in a parallel computer

DOEpatents

Archer, Charles J; Blocksome, Michael A; Inglett, Todd A; Ratterman, Joseph D; Smith, Brian E

2013-05-21

Paging memory from random access memory (`RAM`) to backing storage in a parallel computer that includes a plurality of compute nodes, including: executing a data processing application on a virtual machine operating system in a virtual machine on a first compute node; providing, by a second compute node, backing storage for the contents of RAM on the first compute node; and swapping, by the virtual machine operating system in the virtual machine on the first compute node, a page of memory from RAM on the first compute node to the backing storage on the second compute node.

Optical mass memories

NASA Technical Reports Server (NTRS)

Bailey, G. A.

1976-01-01

Optical and magnetic variants in the design of trillion-bit read/write memories are compared and tabulated. Components and materials suitable for a random access read/write nonmoving memory system are examined, with preference given to holography and photoplastic materials. Advantages and deficiencies of photoplastics are reviewed. Holographic page composer design, essential features of an optical memory with no moving parts, fiche-oriented random access memory design, and materials suitable for an efficient photoplastic fiche are considered. The optical variants offer advantages in lower volume and weight at data transfer rates near 1 Mbit/sec, but power drain is of the same order as for the magnetic variants (tape memory, disk memory). The mechanical properties of photoplastic film materials still leave much to be desired.

BCH codes for large IC random-access memory systems

NASA Technical Reports Server (NTRS)

Lin, S.; Costello, D. J., Jr.

1983-01-01

In this report some shortened BCH codes for possible applications to large IC random-access memory systems are presented. These codes are given by their parity-check matrices. Encoding and decoding of these codes are discussed.

76 FR 35238 - Notice of Receipt of Complaint; Solicitation of Comments Relating to the Public Interest

Federal Register 2010, 2011, 2012, 2013, 2014

2011-06-16

... Static Random Access Memories and Products Containing Same, DN 2816; the Commission is soliciting... importation of certain static random access memories and products containing same. The complaint names as...

Providing the Public with Online Access to Large Bibliographic Data Bases.

ERIC Educational Resources Information Center

Firschein, Oscar; Summit, Roger K.

DIALOG, an interactive, computer-based information retrieval language, consists of a series of computer programs designed to make use of direct access memory devices in order to provide the user with a rapid means of identifying records within a specific memory bank. Using the system, a library user can be provided access to sixteen distinct and…

Advanced texture filtering: a versatile framework for reconstructing multi-dimensional image data on heterogeneous architectures

NASA Astrophysics Data System (ADS)

Zellmann, Stefan; Percan, Yvonne; Lang, Ulrich

2015-01-01

Reconstruction of 2-d image primitives or of 3-d volumetric primitives is one of the most common operations performed by the rendering components of modern visualization systems. Because this operation is often aided by GPUs, reconstruction is typically restricted to first-order interpolation. With the advent of in situ visualization, the assumption that rendering algorithms are in general executed on GPUs is however no longer adequate. We thus propose a framework that provides versatile texture filtering capabilities: up to third-order reconstruction using various types of cubic filtering and interpolation primitives; cache-optimized algorithms that integrate seamlessly with GPGPU rendering or with software rendering that was optimized for cache-friendly "Structure of Array" (SoA) access patterns; a memory management layer (MML) that gracefully hides the complexities of extra data copies necessary for memory access optimizations such as swizzling, for rendering on GPGPUs, or for reconstruction schemes that rely on pre-filtered data arrays. We prove the effectiveness of our software architecture by integrating it into and validating it using the open source direct volume rendering (DVR) software DeskVOX.

Social Desirability Bias in Smoking Cessation: Effects in the Laboratory and Field

DTIC Science & Technology

2012-03-16

and Child Health Journal, 2(2), 77-83. Bradburn, N., Rips, L., & Shevell, S. (1987). Answering autobiographical questions: the impact of memory ...how accessible smoking outcomes are in an individual’s memory . Research has shown that smokers tend to exhibit greater accessibility for positive...body of research that suggests that acute tobacco abstinence hinders cognitive functioning, such as attention, memory , information processing

Fast Magnetoresistive Random-Access Memory

NASA Technical Reports Server (NTRS)

Wu, Jiin-Chuan; Stadler, Henry L.; Katti, Romney R.

1991-01-01

Magnetoresistive binary digital memories of proposed new type expected to feature high speed, nonvolatility, ability to withstand ionizing radiation, high density, and low power. In memory cell, magnetoresistive effect exploited more efficiently by use of ferromagnetic material to store datum and adjacent magnetoresistive material to sense datum for readout. Because relative change in sensed resistance between "zero" and "one" states greater, shorter sampling and readout access times achievable.

Kokkos: Enabling manycore performance portability through polymorphic memory access patterns

DOE PAGES

Carter Edwards, H.; Trott, Christian R.; Sunderland, Daniel

2014-07-22

The manycore revolution can be characterized by increasing thread counts, decreasing memory per thread, and diversity of continually evolving manycore architectures. High performance computing (HPC) applications and libraries must exploit increasingly finer levels of parallelism within their codes to sustain scalability on these devices. We found that a major obstacle to performance portability is the diverse and conflicting set of constraints on memory access patterns across devices. Contemporary portable programming models address manycore parallelism (e.g., OpenMP, OpenACC, OpenCL) but fail to address memory access patterns. The Kokkos C++ library enables applications and domain libraries to achieve performance portability on diversemore » manycore architectures by unifying abstractions for both fine-grain data parallelism and memory access patterns. In this paper we describe Kokkos’ abstractions, summarize its application programmer interface (API), present performance results for unit-test kernels and mini-applications, and outline an incremental strategy for migrating legacy C++ codes to Kokkos. Furthermore, the Kokkos library is under active research and development to incorporate capabilities from new generations of manycore architectures, and to address a growing list of applications and domain libraries.« less

Accessing global data from accelerator devices

DOEpatents

Bertolli, Carlo; O'Brien, John K.; Sallenave, Olivier H.; Sura, Zehra N.

2016-12-06

An aspect includes a table of contents (TOC) that was generated by a compiler being received at an accelerator device. The TOC includes an address of global data in a host memory space. The global data is copied from the address in the host memory space to an address in the device memory space. The address in the host memory space is obtained from the received TOC. The received TOC is updated to indicate that global data is stored at the address in the device memory space. A kernel that accesses the global data from the address in the device memory space is executed. The address in the device memory space is obtained based on contents of the updated TOC. When the executing is completed, the global data from the address in the device memory space is copied to the address in the host memory space.

Application of phase-change materials in memory taxonomy.

PubMed

Wang, Lei; Tu, Liang; Wen, Jing

2017-01-01

Phase-change materials are suitable for data storage because they exhibit reversible transitions between crystalline and amorphous states that have distinguishable electrical and optical properties. Consequently, these materials find applications in diverse memory devices ranging from conventional optical discs to emerging nanophotonic devices. Current research efforts are mostly devoted to phase-change random access memory, whereas the applications of phase-change materials in other types of memory devices are rarely reported. Here we review the physical principles of phase-change materials and devices aiming to help researchers understand the concept of phase-change memory. We classify phase-change memory devices into phase-change optical disc, phase-change scanning probe memory, phase-change random access memory, and phase-change nanophotonic device, according to their locations in memory hierarchy. For each device type we discuss the physical principles in conjunction with merits and weakness for data storage applications. We also outline state-of-the-art technologies and future prospects.

A Cerebellar-model Associative Memory as a Generalized Random-access Memory

NASA Technical Reports Server (NTRS)

Kanerva, Pentti

1989-01-01

A versatile neural-net model is explained in terms familiar to computer scientists and engineers. It is called the sparse distributed memory, and it is a random-access memory for very long words (for patterns with thousands of bits). Its potential utility is the result of several factors: (1) a large pattern representing an object or a scene or a moment can encode a large amount of information about what it represents; (2) this information can serve as an address to the memory, and it can also serve as data; (3) the memory is noise tolerant--the information need not be exact; (4) the memory can be made arbitrarily large and hence an arbitrary amount of information can be stored in it; and (5) the architecture is inherently parallel, allowing large memories to be fast. Such memories can become important components of future computers.

Accessing global data from accelerator devices

DOE Office of Scientific and Technical Information (OSTI.GOV)

Bertolli, Carlo; O'Brien, John K.; Sallenave, Olivier H.

2016-12-06

An aspect includes a table of contents (TOC) that was generated by a compiler being received at an accelerator device. The TOC includes an address of global data in a host memory space. The global data is copied from the address in the host memory space to an address in the device memory space. The address in the host memory space is obtained from the received TOC. The received TOC is updated to indicate that global data is stored at the address in the device memory space. A kernel that accesses the global data from the address in the devicemore » memory space is executed. The address in the device memory space is obtained based on contents of the updated TOC. When the executing is completed, the global data from the address in the device memory space is copied to the address in the host memory space.« less

The contribution to immediate serial recall of rehearsal, search speed, access to lexical memory, and phonological coding: an investigation at the construct level.

PubMed

Tehan, Gerald; Fogarty, Gerard; Ryan, Katherine

2004-07-01

Rehearsal speed has traditionally been seen to be the prime determinant of individual differences in memory span. Recent studies, in the main using young children as the participant population, have suggested other contributors to span performance. In the present research, we used structural equation modeling to explore, at the construct level, individual differences in immediate serial recall with respect to rehearsal, search, phonological coding, and speed of access to lexical memory. We replicated standard short-term phenomena; we showed that the variables that influence children's span performance influence adult performance in the same way; and we showed that speed of access to lexical memory and facility with phonological codes appear to be more potent sources of individual differences in immediate memory than is either rehearsal speed or search factors.

Beyond a mask and against the bottleneck: retroactive dual-task interference during working memory consolidation of a masked visual target.

PubMed

Nieuwenstein, Mark; Wyble, Brad

2014-06-01

While studies on visual memory commonly assume that the consolidation of a visual stimulus into working memory is interrupted by a trailing mask, studies on dual-task interference suggest that the consolidation of a stimulus can continue for several hundred milliseconds after a mask. As a result, estimates of the time course of working memory consolidation differ more than an order of magnitude. Here, we contrasted these opposing views by examining if and for how long the processing of a masked display of visual stimuli can be disturbed by a trailing 2-alternative forced choice task (2-AFC; a color discrimination task or a visual or auditory parity judgment task). The results showed that the presence of the 2-AFC task produced a pronounced retroactive interference effect that dissipated across stimulus onset asynchronies of 250-1,000 ms, indicating that the processing elicited by the 2-AFC task interfered with the gradual consolidation of the earlier shown stimuli. Furthermore, this interference effect occurred regardless of whether the to-be-remembered stimuli comprised a string of letters or an unfamiliar complex visual shape, and it occurred regardless of whether these stimuli were masked. Conversely, the interference effect was reduced when the memory load for the 1st task was reduced, or when the 2nd task was a color detection task that did not require decision making. Taken together, these findings show that the formation of a durable and consciously accessible working memory trace for a briefly shown visual stimulus can be disturbed by a trailing 2-AFC task for up to several hundred milliseconds after the stimulus has been masked. By implication, the current findings challenge the common view that working memory consolidation involves an immutable central processing bottleneck, and they also make clear that consolidation does not stop when a stimulus is masked. PsycINFO Database Record (c) 2014 APA, all rights reserved.

Chip architecture - A revolution brewing

NASA Astrophysics Data System (ADS)

Guterl, F.

1983-07-01

Techniques being explored by microchip designers and manufacturers to both speed up memory access and instruction execution while protecting memory are discussed. Attention is given to hardwiring control logic, pipelining for parallel processing, devising orthogonal instruction sets for interchangeable instruction fields, and the development of hardware for implementation of virtual memory and multiuser systems to provide memory management and protection. The inclusion of microcode in mainframes eliminated logic circuits that control timing and gating of the CPU. However, improvements in memory architecture have reduced access time to below that needed for instruction execution. Hardwiring the functions as a virtual memory enhances memory protection. Parallelism involves a redundant architecture, which allows identical operations to be performed simultaneously, and can be directed with microcode to avoid abortion of intermediate instructions once on set of instructions has been completed.

AFSC Standardization Conference, 1553, 1589, 1750, 1760, Ada, November 18-20, 1980, Dayton Convention Center, Dayton, Ohio, Volume II. Proceedings Standards,

DTIC Science & Technology

1980-11-01

4006 DMAE Direct Memory Access Enable: ’Ibis command enables direct memory access (DMA). 4007 I)MAi) Direct Memory Access Disable: This command...72 DLI 72 DLR 72 DM 111 DMAD 30 DMAE 30 DMR 111 ONEG 103 DR 117 DS 104 OSAR 53 141 373 ’., M1L-STD-1750A (USAF) 2 July 1980 OSBI 29 OSCR 54 OSIC 48...in 4.7.7, the connectors shall show no defects detrimental to the operation of the connectors and shall A-7 461 -meet the subsequent test requirements

A short cut to the past: Cueing via concrete objects improves autobiographical memory retrieval in Alzheimer's disease patients.

PubMed

Kirk, Marie; Berntsen, Dorthe

2018-02-01

Older adults diagnosed with Alzheimer's disease (AD) have difficulties accessing autobiographical memories. However, this deficit tends to spare memories dated to earlier parts of their lives, and may partially reflect retrieval deficits rather than complete memory loss. Introducing a novel paradigm, the present study examines whether autobiographical memory recall can be improved in AD by manipulating the sensory richness, concreteness and cultural dating of the memory cues. Specifically, we examine whether concrete everyday objects historically dated to the participants' youth (e.g., a skipping rope), relative to verbal cues (i.e., the verbal signifiers for the objects) facilitate access to autobiographical memories. The study includes 49 AD patients, and 50 healthy, older matched control participants, all tested on word versus object-cued recall. Both groups recalled significantly more memories, when cued by objects relative to words, but the advantage was significantly larger in the AD group. In both groups, memory descriptions were longer and significantly more episodic in nature in response to object-cued recall. Together these findings suggest that the multimodal nature of the object cues (i.e. vision, olfaction, audition, somatic sensation) along with specific cue characteristics, such as time reference, texture, shape, may constrain the retrieval search, potentially minimizing executive function demands, and hence strategic processing requirements, thus easing access to autobiographical memories in AD. Copyright © 2017 Elsevier Ltd. All rights reserved.

Multiprocessing MCNP on an IBN RS/6000 cluster

DOE Office of Scientific and Technical Information (OSTI.GOV)

McKinney, G.W.; West, J.T.

1993-01-01

The advent of high-performance computer systems has brought to maturity programming concepts like vectorization, multiprocessing, and multitasking. While there are many schools of thought as to the most significant factor in obtaining order-of-magnitude increases in performance, such speedup can only be achieved by integrating the computer system and application code. Vectorization leads to faster manipulation of arrays by overlapping instruction CPU cycles. Discrete ordinates codes, which require the solving of large matrices, have proved to be major benefactors of vectorization. Monte Carlo transport, on the other hand, typically contains numerous logic statements and requires extensive redevelopment to benefit from vectorization.more » Multiprocessing and multitasking provide additional CPU cycles via multiple processors. Such systems are generally designed with either common memory access (multitasking) or distributed memory access. In both cases, theoretical speedup, as a function of the number of processors P and the fraction f of task time that multiprocesses, can be formulated using Amdahl's law: S(f, P) =1/(1-f+f/P). However, for most applications, this theoretical limit cannot be achieved because of additional terms (e.g., multitasking overhead, memory overlap, etc.) that are not included in Amdahl's law. Monte Carlo transport is a natural candidate for multiprocessing because the particle tracks are generally independent, and the precision of the result increases as the square Foot of the number of particles tracked.« less

Effect of Atomic Layer Depositions (ALD)-Deposited Titanium Oxide (TiO2) Thickness on the Performance of Zr40Cu35Al15Ni10 (ZCAN)/TiO2/Indium (In)-Based Resistive Random Access Memory (RRAM) Structures

DTIC Science & Technology

2015-08-01

metal structures, memristors, resistive random access memory, RRAM, titanium dioxide, Zr40Cu35Al15Ni10, ZCAN, resistive memory, tunnel junction 16...TiO2 thickness ........................6 1 1. Introduction Resistive-switching memory elements based on metal-insulator-metal (MIM) diodes ...have attracted great interest due to their potential as components for simple, inexpensive, and high-density non-volatile storage devices. MIM diodes

Digital Equipment Corporation VAX/VMS Version 4.3

DTIC Science & Technology

1986-07-30

operating system performs process-oriented paging that allows execution of programs that may be larger than the physical memory allocated to them... to higher privileged modes. (For an explanation of how the four access modes provide memory access protection see page 9, "Memory Management".) A... to optimize program performance for real-time applications or interactive environments. July 30, 1986 - 4 - Final Evaluation Report Digital VAX/VMS

Memory for conversation and the development of common ground.

PubMed

McKinley, Geoffrey L; Brown-Schmidt, Sarah; Benjamin, Aaron S

2017-11-01

Efficient conversation is guided by the mutual knowledge, or common ground, that interlocutors form as a conversation progresses. Characterized from the perspective of commonly used measures of memory, efficient conversation should be closely associated with item memory-what was said-and context memory-who said what to whom. However, few studies have explicitly probed memory to evaluate what type of information is maintained following a communicative exchange. The current study examined how item and context memory relate to the development of common ground over the course of a conversation, and how these forms of memory vary as a function of one's role in a conversation as speaker or listener. The process of developing common ground was positively related to both item and context memory. In addition, content that was spoken was remembered better than content that was heard. Our findings illustrate how memory assessments can complement language measures by revealing the impact that basic conversational processes have on memory for what has been discussed. By taking this approach, we show that not only does the process of forming common ground facilitate communication in the present, but it also promotes an enduring record of that event, facilitating conversation into the future.

A semi-floating gate memory based on van der Waals heterostructures for quasi-non-volatile applications

NASA Astrophysics Data System (ADS)

Liu, Chunsen; Yan, Xiao; Song, Xiongfei; Ding, Shijin; Zhang, David Wei; Zhou, Peng

2018-05-01

As conventional circuits based on field-effect transistors are approaching their physical limits due to quantum phenomena, semi-floating gate transistors have emerged as an alternative ultrafast and silicon-compatible technology. Here, we show a quasi-non-volatile memory featuring a semi-floating gate architecture with band-engineered van der Waals heterostructures. This two-dimensional semi-floating gate memory demonstrates 156 times longer refresh time with respect to that of dynamic random access memory and ultrahigh-speed writing operations on nanosecond timescales. The semi-floating gate architecture greatly enhances the writing operation performance and is approximately 106 times faster than other memories based on two-dimensional materials. The demonstrated characteristics suggest that the quasi-non-volatile memory has the potential to bridge the gap between volatile and non-volatile memory technologies and decrease the power consumption required for frequent refresh operations, enabling a high-speed and low-power random access memory.

Memory Benchmarks for SMP-Based High Performance Parallel Computers

DOE Office of Scientific and Technical Information (OSTI.GOV)

Yoo, A B; de Supinski, B; Mueller, F

2001-11-20

As the speed gap between CPU and main memory continues to grow, memory accesses increasingly dominates the performance of many applications. The problem is particularly acute for symmetric multiprocessor (SMP) systems, where the shared memory may be accessed concurrently by a group of threads running on separate CPUs. Unfortunately, several key issues governing memory system performance in current systems are not well understood. Complex interactions between the levels of the memory hierarchy, buses or switches, DRAM back-ends, system software, and application access patterns can make it difficult to pinpoint bottlenecks and determine appropriate optimizations, and the situation is even moremore » complex for SMP systems. To partially address this problem, we formulated a set of multi-threaded microbenchmarks for characterizing and measuring the performance of the underlying memory system in SMP-based high-performance computers. We report our use of these microbenchmarks on two important SMP-based machines. This paper has four primary contributions. First, we introduce a microbenchmark suite to systematically assess and compare the performance of different levels in SMP memory hierarchies. Second, we present a new tool based on hardware performance monitors to determine a wide array of memory system characteristics, such as cache sizes, quickly and easily; by using this tool, memory performance studies can be targeted to the full spectrum of performance regimes with many fewer data points than is otherwise required. Third, we present experimental results indicating that the performance of applications with large memory footprints remains largely constrained by memory. Fourth, we demonstrate that thread-level parallelism further degrades memory performance, even for the latest SMPs with hardware prefetching and switch-based memory interconnects.« less

Measuring autobiographical fluency in the self-memory system.

PubMed

Rathbone, Clare J; Moulin, Chris J A

2014-01-01

Autobiographical memory is widely considered to be fundamentally related to concepts of self and identity. However, few studies have sought to test models of self and memory directly using experimental designs. Using a novel autobiographical fluency paradigm, the present study investigated memory accessibility for different levels of self-related knowledge. Forty participants generated 20 "I am" statements about themselves, from which the 1st, 5th, 10th, 15th, and 20th were used as cues in a two-minute autobiographical fluency task. The most salient aspects of the self, measured by both serial position and ratings of personal significance, were associated with more accessible sets of autobiographical memories. This finding supports theories that view the self as a powerful organizational structure in memory. Results are discussed with reference to models of self and memory.

Efficient Machine Learning Approach for Optimizing Scientific Computing Applications on Emerging HPC Architectures

DOE Office of Scientific and Technical Information (OSTI.GOV)

Arumugam, Kamesh

Efficient parallel implementations of scientific applications on multi-core CPUs with accelerators such as GPUs and Xeon Phis is challenging. This requires - exploiting the data parallel architecture of the accelerator along with the vector pipelines of modern x86 CPU architectures, load balancing, and efficient memory transfer between different devices. It is relatively easy to meet these requirements for highly structured scientific applications. In contrast, a number of scientific and engineering applications are unstructured. Getting performance on accelerators for these applications is extremely challenging because many of these applications employ irregular algorithms which exhibit data-dependent control-ow and irregular memory accesses. Furthermore,more » these applications are often iterative with dependency between steps, and thus making it hard to parallelize across steps. As a result, parallelism in these applications is often limited to a single step. Numerical simulation of charged particles beam dynamics is one such application where the distribution of work and memory access pattern at each time step is irregular. Applications with these properties tend to present significant branch and memory divergence, load imbalance between different processor cores, and poor compute and memory utilization. Prior research on parallelizing such irregular applications have been focused around optimizing the irregular, data-dependent memory accesses and control-ow during a single step of the application independent of the other steps, with the assumption that these patterns are completely unpredictable. We observed that the structure of computation leading to control-ow divergence and irregular memory accesses in one step is similar to that in the next step. It is possible to predict this structure in the current step by observing the computation structure of previous steps. In this dissertation, we present novel machine learning based optimization techniques to address the parallel implementation challenges of such irregular applications on different HPC architectures. In particular, we use supervised learning to predict the computation structure and use it to address the control-ow and memory access irregularities in the parallel implementation of such applications on GPUs, Xeon Phis, and heterogeneous architectures composed of multi-core CPUs with GPUs or Xeon Phis. We use numerical simulation of charged particles beam dynamics simulation as a motivating example throughout the dissertation to present our new approach, though they should be equally applicable to a wide range of irregular applications. The machine learning approach presented here use predictive analytics and forecasting techniques to adaptively model and track the irregular memory access pattern at each time step of the simulation to anticipate the future memory access pattern. Access pattern forecasts can then be used to formulate optimization decisions during application execution which improves the performance of the application at a future time step based on the observations from earlier time steps. In heterogeneous architectures, forecasts can also be used to improve the memory performance and resource utilization of all the processing units to deliver a good aggregate performance. We used these optimization techniques and anticipation strategy to design a cache-aware, memory efficient parallel algorithm to address the irregularities in the parallel implementation of charged particles beam dynamics simulation on different HPC architectures. Experimental result using a diverse mix of HPC architectures shows that our approach in using anticipation strategy is effective in maximizing data reuse, ensuring workload balance, minimizing branch and memory divergence, and in improving resource utilization.« less

Heap/stack guard pages using a wakeup unit

DOE Office of Scientific and Technical Information (OSTI.GOV)

Gooding, Thomas M; Satterfield, David L; Steinmacher-Burow, Burkhard

A method and system for providing a memory access check on a processor including the steps of detecting accesses to a memory device including level-1 cache using a wakeup unit. The method includes invalidating level-1 cache ranges corresponding to a guard page, and configuring a plurality of wakeup address compare (WAC) registers to allow access to selected WAC registers. The method selects one of the plurality of WAC registers, and sets up a WAC register related to the guard page. The method configures the wakeup unit to interrupt on access of the selected WAC register. The method detects access ofmore » the memory device using the wakeup unit when a guard page is violated. The method generates an interrupt to the core using the wakeup unit, and determines the source of the interrupt. The method detects the activated WAC registers assigned to the violated guard page, and initiates a response.« less

The differential effects of ecstasy/polydrug use on executive components: shifting, inhibition, updating and access to semantic memory.

PubMed

Montgomery, Catharine; Fisk, John E; Newcombe, Russell; Murphy, Phillip N

2005-10-01

Recent theoretical models suggest that the central executive may not be a unified structure. The present study explored the nature of central executive deficits in ecstasy users. In study 1, 27 ecstasy users and 34 non-users were assessed using tasks to tap memory updating (computation span; letter updating) and access to long-term memory (a semantic fluency test and the Chicago Word Fluency Test). In study 2, 51 ecstasy users and 42 non-users completed tasks that assess mental set switching (number/letter and plus/minus) and inhibition (random letter generation). MANOVA revealed that ecstasy users performed worse on both tasks used to assess memory updating and on tasks to assess access to long-term memory (C- and S-letter fluency). However, notwithstanding the significant ecstasy group-related effects, indices of cocaine and cannabis use were also significantly correlated with most of the executive measures. Unexpectedly, in study 2, ecstasy users performed significantly better on the inhibition task, producing more letters than non-users. No group differences were observed on the switching tasks. Correlations between indices of ecstasy use and number of letters produced were significant. The present study provides further support for ecstasy/polydrug-related deficits in memory updating and in access to long-term memory. The surplus evident on the inhibition task should be treated with some caution, as this was limited to a single measure and has not been supported by our previous work.

owlcpp: a C++ library for working with OWL ontologies.

PubMed

Levin, Mikhail K; Cowell, Lindsay G

2015-01-01

The increasing use of ontologies highlights the need for a library for working with ontologies that is efficient, accessible from various programming languages, and compatible with common computational platforms. We developed owlcpp, a library for storing and searching RDF triples, parsing RDF/XML documents, converting triples into OWL axioms, and reasoning. The library is written in ISO-compliant C++ to facilitate efficiency, portability, and accessibility from other programming languages. Internally, owlcpp uses the Raptor RDF Syntax library for parsing RDF/XML and the FaCT++ library for reasoning. The current version of owlcpp is supported under Linux, OSX, and Windows platforms and provides an API for Python. The results of our evaluation show that, compared to other commonly used libraries, owlcpp is significantly more efficient in terms of memory usage and searching RDF triple stores. owlcpp performs strict parsing and detects errors ignored by other libraries, thus reducing the possibility of incorrect semantic interpretation of ontologies. owlcpp is available at http://owl-cpp.sf.net/ under the Boost Software License, Version 1.0.

Performance Evaluation of Remote Memory Access (RMA) Programming on Shared Memory Parallel Computers

NASA Technical Reports Server (NTRS)

Jin, Hao-Qiang; Jost, Gabriele; Biegel, Bryan A. (Technical Monitor)

2002-01-01

The purpose of this study is to evaluate the feasibility of remote memory access (RMA) programming on shared memory parallel computers. We discuss different RMA based implementations of selected CFD application benchmark kernels and compare them to corresponding message passing based codes. For the message-passing implementation we use MPI point-to-point and global communication routines. For the RMA based approach we consider two different libraries supporting this programming model. One is a shared memory parallelization library (SMPlib) developed at NASA Ames, the other is the MPI-2 extensions to the MPI Standard. We give timing comparisons for the different implementation strategies and discuss the performance.

Odor-enriched environment rescues long-term social memory, but does not improve olfaction in social isolated adult mice.

PubMed

Gusmão, Isabela D; Monteiro, Brisa M M; Cornélio, Guilherme O S; Fonseca, Cristina S; Moraes, Márcio F D; Pereira, Grace S

2012-03-17

Prolonged permanence of animals under social isolation (SI) arouses a variety of psychological symptoms like aggression, stress, anxiety and depression. However, short-term SI is commonly used to evaluate social memory. Interestingly, the social memory cannot be accessed with delays higher than 30min in SI mice. Our hypothesis is that SI with intermediate duration, like one week (1w), impairs the long-term storage of new social information (S-LTM), without affecting anxiety or other types of memories, because the SI compromises the olfactory function of the animal. Our results demonstrated that SI impaired S-LTM, without affecting other kinds of memory or anxiety. In addition, the SI increased the latency in the buried-food finding task, but did not affect the habituation or the discrimination of odors. Next, we postulated that if continuous input to the olfactory system is fundamental for the maintenance of the olfactory function and social memory persistence, isolated mice under odor-enriched environment (OEE) should behave like group-housed (GH) animals. In fact, the OEE prevented the S-LTM deficit imposed by the SI. However, OEE did not restore the SI mice olfaction to the GH mice level. Our results suggest that SI modulates olfaction and social memory persistence, probably, by independent mechanisms. We also showed for the first time that OEE rescued S-LTM in SI mice through a mechanism not necessarily involved with olfaction. Copyright © 2011 Elsevier B.V. All rights reserved.

Generalized enhanced suffix array construction in external memory.

PubMed

Louza, Felipe A; Telles, Guilherme P; Hoffmann, Steve; Ciferri, Cristina D A

2017-01-01

Suffix arrays, augmented by additional data structures, allow solving efficiently many string processing problems. The external memory construction of the generalized suffix array for a string collection is a fundamental task when the size of the input collection or the data structure exceeds the available internal memory. In this article we present and analyze [Formula: see text] [introduced in CPM (External memory generalized suffix and [Formula: see text] arrays construction. In: Proceedings of CPM. pp 201-10, 2013)], the first external memory algorithm to construct generalized suffix arrays augmented with the longest common prefix array for a string collection. Our algorithm relies on a combination of buffers, induced sorting and a heap to avoid direct string comparisons. We performed experiments that covered different aspects of our algorithm, including running time, efficiency, external memory access, internal phases and the influence of different optimization strategies. On real datasets of size up to 24 GB and using 2 GB of internal memory, [Formula: see text] showed a competitive performance when compared to [Formula: see text] and [Formula: see text], which are efficient algorithms for a single string according to the related literature. We also show the effect of disk caching managed by the operating system on our algorithm. The proposed algorithm was validated through performance tests using real datasets from different domains, in various combinations, and showed a competitive performance. Our algorithm can also construct the generalized Burrows-Wheeler transform of a string collection with no additional cost except by the output time.

Memory and Common Ground Processes in Language Use

PubMed Central

Brown-Schmidt, Sarah; Duff, Melissa C.

2018-01-01

During communication, we form assumptions about what our communication partners know and believe. Information that is mutually known between the discourse partners—their common ground—serves as a backdrop for successful communication. Here we present an introduction to the focus of this topic, which is the role of memory in common ground and language use. Two types of questions emerge as central to understanding the relationship between memory and common ground, specifically questions having to do with the representation of common ground in memory, and the use of common ground during language processing. PMID:27797165

Enhancing Memory Access for Less Skilled Readers

ERIC Educational Resources Information Center

Smith, Emily R.; O'Brien, Edward J.

2016-01-01

Less skilled readers' comprehension often suffers because they have an impoverished representation of text in long-term memory; this, in turn, increases the difficulty of gaining access to backgrounded information necessary for maintaining coherence. The results of four experiments demonstrated that providing less skilled readers with additional…

Application of phase-change materials in memory taxonomy

PubMed Central

Wang, Lei; Tu, Liang; Wen, Jing

2017-01-01

Abstract Phase-change materials are suitable for data storage because they exhibit reversible transitions between crystalline and amorphous states that have distinguishable electrical and optical properties. Consequently, these materials find applications in diverse memory devices ranging from conventional optical discs to emerging nanophotonic devices. Current research efforts are mostly devoted to phase-change random access memory, whereas the applications of phase-change materials in other types of memory devices are rarely reported. Here we review the physical principles of phase-change materials and devices aiming to help researchers understand the concept of phase-change memory. We classify phase-change memory devices into phase-change optical disc, phase-change scanning probe memory, phase-change random access memory, and phase-change nanophotonic device, according to their locations in memory hierarchy. For each device type we discuss the physical principles in conjunction with merits and weakness for data storage applications. We also outline state-of-the-art technologies and future prospects. PMID:28740557

A review of emerging non-volatile memory (NVM) technologies and applications

NASA Astrophysics Data System (ADS)

Chen, An

2016-11-01

This paper will review emerging non-volatile memory (NVM) technologies, with the focus on phase change memory (PCM), spin-transfer-torque random-access-memory (STTRAM), resistive random-access-memory (RRAM), and ferroelectric field-effect-transistor (FeFET) memory. These promising NVM devices are evaluated in terms of their advantages, challenges, and applications. Their performance is compared based on reported parameters of major industrial test chips. Memory selector devices and cell structures are discussed. Changing market trends toward low power (e.g., mobile, IoT) and data-centric applications create opportunities for emerging NVMs. High-performance and low-cost emerging NVMs may simplify memory hierarchy, introduce non-volatility in logic gates and circuits, reduce system power, and enable novel architectures. Storage-class memory (SCM) based on high-density NVMs could fill the performance and density gap between memory and storage. Some unique characteristics of emerging NVMs can be utilized for novel applications beyond the memory space, e.g., neuromorphic computing, hardware security, etc. In the beyond-CMOS era, emerging NVMs have the potential to fulfill more important functions and enable more efficient, intelligent, and secure computing systems.

Attention, working memory, and phenomenal experience of WM content: memory levels determined by different types of top-down modulation.

PubMed

Jacob, Jane; Jacobs, Christianne; Silvanto, Juha

2015-01-01

What is the role of top-down attentional modulation in consciously accessing working memory (WM) content? In influential WM models, information can exist in different states, determined by allocation of attention; placing the original memory representation in the center of focused attention gives rise to conscious access. Here we discuss various lines of evidence indicating that such attentional modulation is not sufficient for memory content to be phenomenally experienced. We propose that, in addition to attentional modulation of the memory representation, another type of top-down modulation is required: suppression of all incoming visual information, via inhibition of early visual cortex. In this view, there are three distinct memory levels, as a function of the top-down control associated with them: (1) Nonattended, nonconscious associated with no attentional modulation; (2) attended, phenomenally nonconscious memory, associated with attentional enhancement of the actual memory trace; (3) attended, phenomenally conscious memory content, associated with enhancement of the memory trace and top-down suppression of all incoming visual input.

Selective memory retrieval can impair and improve retrieval of other memories.

PubMed

Bäuml, Karl-Heinz T; Samenieh, Anuscheh

2012-03-01

Research from the past decades has shown that retrieval of a specific memory (e.g., retrieving part of a previous vacation) typically attenuates retrieval of other memories (e.g., memories for other details of the event), causing retrieval-induced forgetting. More recently, however, it has been shown that retrieval can both attenuate and aid recall of other memories (K.-H. T. Bäuml & A. Samenieh, 2010). To identify the circumstances under which retrieval aids recall, the authors examined retrieval dynamics in listwise directed forgetting, context-dependent forgetting, proactive interference, and in the absence of any induced memory impairment. They found beneficial effects of selective retrieval in listwise directed forgetting and context-dependent forgetting but detrimental effects in all the other conditions. Because context-dependent forgetting and listwise directed forgetting arguably reflect impaired context access, the results suggest that memory retrieval aids recall of memories that are subject to impaired context access but attenuates recall in the absence of such circumstances. The findings are consistent with a 2-factor account of memory retrieval and suggest the existence of 2 faces of memory retrieval. 2012 APA, all rights reserved

Multiple memory stores and operant conditioning: a rationale for memory's complexity.

PubMed

Meeter, Martijn; Veldkamp, Rob; Jin, Yaochu

2009-02-01

Why does the brain contain more than one memory system? Genetic algorithms can play a role in elucidating this question. Here, model animals were constructed containing a dorsal striatal layer that controlled actions, and a ventral striatal layer that controlled a dopaminergic learning signal. Both layers could gain access to three modeled memory stores, but such access was penalized as energy expenditure. Model animals were then selected on their fitness in simulated operant conditioning tasks. Results suggest that having access to multiple memory stores and their representations is important in learning to regulate dopamine release, as well as in contextual discrimination. For simple operant conditioning, as well as stimulus discrimination, hippocampal compound representations turned out to suffice, a counterintuitive result given findings that hippocampal lesions tend not to affect performance in such tasks. We argue that there is in fact evidence to support a role for compound representations and the hippocampus in even the simplest conditioning tasks.

Power reduction by power gating in differential pair type spin-transfer-torque magnetic random access memories for low-power nonvolatile cache memories

NASA Astrophysics Data System (ADS)

Ohsawa, Takashi; Ikeda, Shoji; Hanyu, Takahiro; Ohno, Hideo; Endoh, Tetsuo

2014-01-01

Array operation currents in spin-transfer-torque magnetic random access memories (STT-MRAMs) that use four differential pair type magnetic tunnel junction (MTJ)-based memory cells (4T2MTJ, two 6T2MTJs and 8T2MTJ) are simulated and compared with that in SRAM. With L3 cache applications in mind, it is assumed that the memories are composed of 32 Mbyte capacity to be accessed in 64 byte in parallel. All the STT-MRAMs except for the 8T2MTJ one are designed with 32 bit fine-grained power gating scheme applied to eliminate static currents in the memory cells that are not accessed. The 8T2MTJ STT-MRAM, the cell’s design concept being not suitable for the fine-grained power gating, loads and saves 32 Mbyte data in 64 Mbyte unit per 1 Mbit sub-array in 2 × 103 cycles. It is shown that the array operation current of the 4T2MTJ STT-MRAM is 70 mA averaged in 15 ns write cycles at Vdd = 0.9 V. This is the smallest among the STT-MRAMs, about the half of the low standby power (LSTP) SRAM whose array operation current is totally dominated by the cells’ subthreshold leakage.

Object selection costs in visual working memory: A diffusion model analysis of the focus of attention.

PubMed

Sewell, David K; Lilburn, Simon D; Smith, Philip L

2016-11-01

A central question in working memory research concerns the degree to which information in working memory is accessible to other cognitive processes (e.g., decision-making). Theories assuming that the focus of attention can only store a single object at a time require the focus to orient to a target representation before further processing can occur. The need to orient the focus of attention implies that single-object accounts typically predict response time costs associated with object selection even when working memory is not full (i.e., memory load is less than 4 items). For other theories that assume storage of multiple items in the focus of attention, predictions depend on specific assumptions about the way resources are allocated among items held in the focus, and how this affects the time course of retrieval of items from the focus. These broad theoretical accounts have been difficult to distinguish because conventional analyses fail to separate components of empirical response times related to decision-making from components related to selection and retrieval processes associated with accessing information in working memory. To better distinguish these response time components from one another, we analyze data from a probed visual working memory task using extensions of the diffusion decision model. Analysis of model parameters revealed that increases in memory load resulted in (a) reductions in the quality of the underlying stimulus representations in a manner consistent with a sample size model of visual working memory capacity and (b) systematic increases in the time needed to selectively access a probed representation in memory. The results are consistent with single-object theories of the focus of attention. The results are also consistent with a subset of theories that assume a multiobject focus of attention in which resource allocation diminishes both the quality and accessibility of the underlying representations. (PsycINFO Database Record (c) 2016 APA, all rights reserved).

Designing a VMEbus FDDI adapter card

NASA Astrophysics Data System (ADS)

Venkataraman, Raman

1992-03-01

This paper presents a system architecture for a VMEbus FDDI adapter card containing a node core, FDDI block, frame buffer memory and system interface unit. Most of the functions of the PHY and MAC layers of FDDI are implemented with National's FDDI chip set and the SMT implementation is simplified with a low cost microcontroller. The factors that influence the system bus bandwidth utilization and FDDI bandwidth utilization are the data path and frame buffer memory architecture. The VRAM based frame buffer memory has two sections - - LLC frame memory and SMT frame memory. Each section with an independent serial access memory (SAM) port provides an independent access after the initial data transfer cycle on the main port and hence, the throughput is maximized on each port of the memory. The SAM port simplifies the system bus master DMA design and the VMEbus interface can be designed with low-cost off-the-shelf interface chips.

Scaling Irregular Applications through Data Aggregation and Software Multithreading

DOE Office of Scientific and Technical Information (OSTI.GOV)

Morari, Alessandro; Tumeo, Antonino; Chavarría-Miranda, Daniel

Bioinformatics, data analytics, semantic databases, knowledge discovery are emerging high performance application areas that exploit dynamic, linked data structures such as graphs, unbalanced trees or unstructured grids. These data structures usually are very large, requiring significantly more memory than available on single shared memory systems. Additionally, these data structures are difficult to partition on distributed memory systems. They also present poor spatial and temporal locality, thus generating unpredictable memory and network accesses. The Partitioned Global Address Space (PGAS) programming model seems suitable for these applications, because it allows using a shared memory abstraction across distributed-memory clusters. However, current PGAS languagesmore » and libraries are built to target regular remote data accesses and block transfers. Furthermore, they usually rely on the Single Program Multiple Data (SPMD) parallel control model, which is not well suited to the fine grained, dynamic and unbalanced parallelism of irregular applications. In this paper we present {\\bf GMT} (Global Memory and Threading library), a custom runtime library that enables efficient execution of irregular applications on commodity clusters. GMT integrates a PGAS data substrate with simple fork/join parallelism and provides automatic load balancing on a per node basis. It implements multi-level aggregation and lightweight multithreading to maximize memory and network bandwidth with fine-grained data accesses and tolerate long data access latencies. A key innovation in the GMT runtime is its thread specialization (workers, helpers and communication threads) that realize the overall functionality. We compare our approach with other PGAS models, such as UPC running using GASNet, and hand-optimized MPI code on a set of typical large-scale irregular applications, demonstrating speedups of an order of magnitude.« less

The influence of training and experience on memory strategy.

PubMed

Patrick, John; Morgan, Phillip L; Smy, Victoria; Tiley, Leyanne; Seeby, Helen; Patrick, Tanya; Evans, Jonathan

2015-07-01

This paper investigates whether, and if so how much, prior training and experience overwrite the influence of the constraints of the task environment on strategy deployment. This evidence is relevant to the theory of soft constraints that focuses on the role of constraints in the task environment (Gray, Simms, Fu, & Schoelles, Psychological Review, 113: 461-482, 2006). The theory explains how an increase in the cost of accessing information induces a more memory-based strategy involving more encoding and planning. Experiments 1 and 3 adopt a traditional training and transfer design using the Blocks World Task in which participants were exposed to training trials involving a 2.5-s delay in accessing goal-state information before encountering transfer trials in which there was no access delay. The effect of prior training was assessed by the degree of memory-based strategy adopted in the transfer trials. Training with an access delay had a substantial carry-over effect and increased the subsequent degree of memory-based strategy adopted in the transfer environment. However, such effects do not necessarily occur if goal-state access cost in training is less costly than in transfer trials (Experiment 2). Experiment 4 used a fine-grained intra-trial design to examine the effect of experiencing access cost on one, two, or three occasions within the same trial and found that such experience on two consecutive occasions was sufficient to induce a more memory-based strategy. This paper establishes some effects of training that are relevant to the soft constraints theory and also discusses practical implications.

Memory and Common Ground Processes in Language Use.

PubMed

Brown-Schmidt, Sarah; Duff, Melissa C

2016-10-01

During communication, we form assumptions about what our communication partners know and believe. Information that is mutually known between the discourse partners-their common ground-serves as a backdrop for successful communication. Here we present an introduction to the focus of this topic, which is the role of memory in common ground and language use. Two types of questions emerge as central to understanding the relationship between memory and common ground, specifically questions having to do with the representation of common ground in memory, and the use of common ground during language processing. Copyright © 2016 Cognitive Science Society, Inc.

Optoelectronic-cache memory system architecture.

PubMed

Chiarulli, D M; Levitan, S P

1996-05-10

We present an investigation of the architecture of an optoelectronic cache that can integrate terabit optical memories with the electronic caches associated with high-performance uniprocessors and multiprocessors. The use of optoelectronic-cache memories enables these terabit technologies to provide transparently low-latency secondary memory with frame sizes comparable with disk pages but with latencies that approach those of electronic secondary-cache memories. This enables the implementation of terabit memories with effective access times comparable with the cycle times of current microprocessors. The cache design is based on the use of a smart-pixel array and combines parallel free-space optical input-output to-and-from optical memory with conventional electronic communication to the processor caches. This cache and the optical memory system to which it will interface provide a large random-access memory space that has a lower overall latency than that of magnetic disks and disk arrays. In addition, as a consequence of the high-bandwidth parallel input-output capabilities of optical memories, fault service times for the optoelectronic cache are substantially less than those currently achievable with any rotational media.

LLB simulation of the temperature dependent switching critical curve of a Stoner-Wohlfarth macrospin in the presence of a polarized current

NASA Astrophysics Data System (ADS)

Oniciuc, E.; Stoleriu, L.; Stancu, A.

2014-02-01

An extension of Landau-Lifshitz-Bloch (LLB) equation is used to describe the behavior of single-domain particles under the influence of magnetic fields and polarized currents at elevated temperatures. We prove that using such a model, which takes into account the longitudinal magnetization relaxation, together with the consideration of the quartic crystalline anisotropy term, a number of recent experimental results can be explained concerning the free layer characteristic critical curves of spin valves commonly used in spin electronics. These results are of paramount importance for heat assisted magnetic recording (HAMR) processes in hard-drives or in new memory systems like the spin-transfer-torque magnetic random access memory (HA-STTMRAM) with the aim of increasing data density writing while avoiding superparamagnetic limit.

Cerebellar models of associative memory: Three papers from IEEE COMPCON spring 1989

NASA Technical Reports Server (NTRS)

Raugh, Michael R. (Editor)

1989-01-01

Three papers are presented on the following topics: (1) a cerebellar-model associative memory as a generalized random-access memory; (2) theories of the cerebellum - two early models of associative memory; and (3) intelligent network management and functional cerebellum synthesis.

The dynamics of sensory buffers: geometric, spatial, and experience-dependent shaping of iconic memory.

PubMed

Graziano, Martin; Sigman, Mariano

2008-05-23

When a stimulus is presented, its sensory trace decays rapidly, lasting for approximately 1000 ms. This brief and labile memory, referred as iconic memory, serves as a buffer before information is transferred to working memory and executive control. Here we explored the effect of different factors--geometric, spatial, and experience--with respect to the access and the maintenance of information in iconic memory and the progressive distortion of this memory. We studied performance in a partial report paradigm, a design wherein recall of only part of a stimulus array is required. Subjects had to report the identity of a letter in a location that was cued in a variable delay after the stimulus onset. Performance decayed exponentially with time, and we studied the different parameters (time constant, zero-delay value, and decay amplitude) as a function of the different factors. We observed that experience (determined by letter frequency) affected the access to iconic memory but not the temporal decay constant. On the contrary, spatial position affected the temporal course of delay. The entropy of the error distribution increased with time reflecting a progressive morphological distortion of the iconic buffer. We discuss our results on the context of a model of information access to executive control and how it is affected by learning and attention.

Oscillatory mechanisms of process binding in memory.

PubMed

Klimesch, Wolfgang; Freunberger, Roman; Sauseng, Paul

2010-06-01

A central topic in cognitive neuroscience is the question, which processes underlie large scale communication within and between different neural networks. The basic assumption is that oscillatory phase synchronization plays an important role for process binding--the transient linking of different cognitive processes--which may be considered a special type of large scale communication. We investigate this question for memory processes on the basis of different types of oscillatory synchronization mechanisms. The reviewed findings suggest that theta and alpha phase coupling (and phase reorganization) reflect control processes in two large memory systems, a working memory and a complex knowledge system that comprises semantic long-term memory. It is suggested that alpha phase synchronization may be interpreted in terms of processes that coordinate top-down control (a process guided by expectancy to focus on relevant search areas) and access to memory traces (a process leading to the activation of a memory trace). An analogous interpretation is suggested for theta oscillations and the controlled access to episodic memories. Copyright (c) 2009 Elsevier Ltd. All rights reserved.

TLR4 signaling augments B lymphocyte migration and overcomes the restriction that limits access to germinal center dark zones

PubMed Central

Hwang, Il-Young; Park, Chung; Harrison, Kathleen

2009-01-01

B lymphocyte–intrinsic Toll-like receptor (TLR) signals amplify humoral immunity and can exacerbate autoimmune diseases. We identify a new mechanism by which TLR signals may contribute to autoimmunity and chronic inflammation. We show that TLR4 signaling enhances B lymphocyte trafficking into lymph nodes (LNs), induces B lymphocyte clustering and interactions within LN follicles, leads to sustained in vivo B cell proliferation, overcomes the restriction that limits the access of nonantigen-activated B cells to germinal center dark zones, and enhances the generation of memory and plasma cells. Intravital microscopy and in vivo tracking studies of B cells transferred to recipient mice revealed that TLR4-activated, but not nonstimulated, B cells accumulated within the dark zones of preexisting germinal centers even when transferred with antigen-specific B cells. The TLR4-activated cells persist much better than nonstimulated cells, expanding both within the memory and plasma cell compartments. TLR-mediated activation of B cells may help to feed and stabilize the spontaneous and ectopic germinal centers that are so commonly found in autoimmune individuals and that accompany chronic inflammation. PMID:19917774

Dual operation characteristics of resistance random access memory in indium-gallium-zinc-oxide thin film transistors

NASA Astrophysics Data System (ADS)

Yang, Jyun-Bao; Chang, Ting-Chang; Huang, Jheng-Jie; Chen, Yu-Chun; Chen, Yu-Ting; Tseng, Hsueh-Chih; Chu, Ann-Kuo; Sze, Simon M.

2014-04-01

In this study, indium-gallium-zinc-oxide thin film transistors can be operated either as transistors or resistance random access memory devices. Before the forming process, current-voltage curve transfer characteristics are observed, and resistance switching characteristics are measured after a forming process. These resistance switching characteristics exhibit two behaviors, and are dominated by different mechanisms. The mode 1 resistance switching behavior is due to oxygen vacancies, while mode 2 is dominated by the formation of an oxygen-rich layer. Furthermore, an easy approach is proposed to reduce power consumption when using these resistance random access memory devices with the amorphous indium-gallium-zinc-oxide thin film transistor.

Magnet/Hall-Effect Random-Access Memory

NASA Technical Reports Server (NTRS)

Wu, Jiin-Chuan; Stadler, Henry L.; Katti, Romney R.

1991-01-01

In proposed magnet/Hall-effect random-access memory (MHRAM), bits of data stored magnetically in Perm-alloy (or equivalent)-film memory elements and read out by using Hall-effect sensors to detect magnetization. Value of each bit represented by polarity of magnetization. Retains data for indefinite time or until data rewritten. Speed of Hall-effect sensors in MHRAM results in readout times of about 100 nanoseconds. Other characteristics include high immunity to ionizing radiation and storage densities of order 10(Sup6)bits/cm(Sup 2) or more.

Investigation of multilayer magnetic domain lattice file

NASA Technical Reports Server (NTRS)

Torok, E. J.; Kamin, M.; Tolman, C. H.

1980-01-01

The feasibility of the self structured multilayered bubble domain memory as a mass memory medium for satellite applications is examined. Theoretical considerations of multilayer bubble supporting materials are presented, in addition to the experimental evaluation of current accessed circuitry for various memory functions. The design, fabrication, and test of four device designs is described, and a recommended memory storage area configuration is presented. Memory functions which were demonstrated include the current accessed propagation of bubble domains and stripe domains, pinning of stripe domain ends, generation of single and double bubbles, generation of arrays of coexisting strip and bubble domains in a single garnet layer, and demonstration of different values of the strip out field for single and double bubbles indicating adequate margins for data detection. All functions necessary to develop a multilayer self structured bubble memory device were demonstrated in individual experiments.

Spin-transfer torque magnetoresistive random-access memory technologies for normally off computing (invited)

NASA Astrophysics Data System (ADS)

Ando, K.; Fujita, S.; Ito, J.; Yuasa, S.; Suzuki, Y.; Nakatani, Y.; Miyazaki, T.; Yoda, H.

2014-05-01

Most parts of present computer systems are made of volatile devices, and the power to supply them to avoid information loss causes huge energy losses. We can eliminate this meaningless energy loss by utilizing the non-volatile function of advanced spin-transfer torque magnetoresistive random-access memory (STT-MRAM) technology and create a new type of computer, i.e., normally off computers. Critical tasks to achieve normally off computers are implementations of STT-MRAM technologies in the main memory and low-level cache memories. STT-MRAM technology for applications to the main memory has been successfully developed by using perpendicular STT-MRAMs, and faster STT-MRAM technologies for applications to the cache memory are now being developed. The present status of STT-MRAMs and challenges that remain for normally off computers are discussed.

Non-volatile magnetic random access memory

NASA Technical Reports Server (NTRS)

Katti, Romney R. (Inventor); Stadler, Henry L. (Inventor); Wu, Jiin-Chuan (Inventor)

1994-01-01

Improvements are made in a non-volatile magnetic random access memory. Such a memory is comprised of an array of unit cells, each having a Hall-effect sensor and a thin-film magnetic element made of material having an in-plane, uniaxial anisotropy and in-plane, bipolar remanent magnetization states. The Hall-effect sensor is made more sensitive by using a 1 m thick molecular beam epitaxy grown InAs layer on a silicon substrate by employing a GaAs/AlGaAs/InAlAs superlattice buffering layer. One improvement avoids current shunting problems of matrix architecture. Another improvement reduces the required magnetizing current for the micromagnets. Another improvement relates to the use of GaAs technology wherein high electron-mobility GaAs MESFETs provide faster switching times. Still another improvement relates to a method for configuring the invention as a three-dimensional random access memory.

Fencing direct memory access data transfers in a parallel active messaging interface of a parallel computer

DOEpatents

Blocksome, Michael A.; Mamidala, Amith R.

2013-09-03

Fencing direct memory access (`DMA`) data transfers in a parallel active messaging interface (`PAMI`) of a parallel computer, the PAMI including data communications endpoints, each endpoint including specifications of a client, a context, and a task, the endpoints coupled for data communications through the PAMI and through DMA controllers operatively coupled to segments of shared random access memory through which the DMA controllers deliver data communications deterministically, including initiating execution through the PAMI of an ordered sequence of active DMA instructions for DMA data transfers between two endpoints, effecting deterministic DMA data transfers through a DMA controller and a segment of shared memory; and executing through the PAMI, with no FENCE accounting for DMA data transfers, an active FENCE instruction, the FENCE instruction completing execution only after completion of all DMA instructions initiated prior to execution of the FENCE instruction for DMA data transfers between the two endpoints.

Fencing direct memory access data transfers in a parallel active messaging interface of a parallel computer

DOEpatents

Blocksome, Michael A; Mamidala, Amith R

2014-02-11

Fencing direct memory access (`DMA`) data transfers in a parallel active messaging interface (`PAMI`) of a parallel computer, the PAMI including data communications endpoints, each endpoint including specifications of a client, a context, and a task, the endpoints coupled for data communications through the PAMI and through DMA controllers operatively coupled to segments of shared random access memory through which the DMA controllers deliver data communications deterministically, including initiating execution through the PAMI of an ordered sequence of active DMA instructions for DMA data transfers between two endpoints, effecting deterministic DMA data transfers through a DMA controller and a segment of shared memory; and executing through the PAMI, with no FENCE accounting for DMA data transfers, an active FENCE instruction, the FENCE instruction completing execution only after completion of all DMA instructions initiated prior to execution of the FENCE instruction for DMA data transfers between the two endpoints.

Staging memory for massively parallel processor

NASA Technical Reports Server (NTRS)

Batcher, Kenneth E. (Inventor)

1988-01-01

The invention herein relates to a computer organization capable of rapidly processing extremely large volumes of data. A staging memory is provided having a main stager portion consisting of a large number of memory banks which are accessed in parallel to receive, store, and transfer data words simultaneous with each other. Substager portions interconnect with the main stager portion to match input and output data formats with the data format of the main stager portion. An address generator is coded for accessing the data banks for receiving or transferring the appropriate words. Input and output permutation networks arrange the lineal order of data into and out of the memory banks.

Development of highly reliable static random access memory for 40-nm embedded split gate-MONOS flash memory

NASA Astrophysics Data System (ADS)

Okamoto, Shin-ichi; Maekawa, Kei-ichi; Kawashima, Yoshiyuki; Shiba, Kazutoshi; Sugiyama, Hideki; Inoue, Masao; Nishida, Akio

2015-04-01

High quality static random access memory (SRAM) for 40-nm embedded MONOS flash memory with split gate (SG-MONOS) was developed. Marginal failure, which results in threshold voltage/drain current tailing and outliers of SRAM transistors, occurs when using a conventional SRAM structure. These phenomena can be explained by not only gate depletion but also partial depletion and percolation path formation in the MOS channel. A stacked poly-Si gate structure can suppress these phenomena and achieve high quality SRAM without any defects in the 6σ level and with high affinity to the 40-nm SG-MONOS process was developed.

Method for prefetching non-contiguous data structures

DOEpatents

Blumrich, Matthias A [Ridgefield, CT; Chen, Dong [Croton On Hudson, NY; Coteus, Paul W [Yorktown Heights, NY; Gara, Alan G [Mount Kisco, NY; Giampapa, Mark E [Irvington, NY; Heidelberger, Philip [Cortlandt Manor, NY; Hoenicke, Dirk [Ossining, NY; Ohmacht, Martin [Brewster, NY; Steinmacher-Burow, Burkhard D [Mount Kisco, NY; Takken, Todd E [Mount Kisco, NY; Vranas, Pavlos M [Bedford Hills, NY

2009-05-05

A low latency memory system access is provided in association with a weakly-ordered multiprocessor system. Each processor in the multiprocessor shares resources, and each shared resource has an associated lock within a locking device that provides support for synchronization between the multiple processors in the multiprocessor and the orderly sharing of the resources. A processor only has permission to access a resource when it owns the lock associated with that resource, and an attempt by a processor to own a lock requires only a single load operation, rather than a traditional atomic load followed by store, such that the processor only performs a read operation and the hardware locking device performs a subsequent write operation rather than the processor. A simple perfecting for non-contiguous data structures is also disclosed. A memory line is redefined so that in addition to the normal physical memory data, every line includes a pointer that is large enough to point to any other line in the memory, wherein the pointers to determine which memory line to prefect rather than some other predictive algorithm. This enables hardware to effectively prefect memory access patterns that are non-contiguous, but repetitive.

Making Physical Activity Accessible to Older Adults with Memory Loss: A Feasibility Study

ERIC Educational Resources Information Center

Logsdon, Rebecca G.; McCurry, Susan M.; Pike, Kenneth C.; Teri, Linda

2009-01-01

Purpose: For individuals with mild cognitive impairment (MCI), memory loss may prevent successful engagement in exercise, a key factor in preventing additional disability. The Resources and Activities for Life Long Independence (RALLI) program uses behavioral principles to make exercise more accessible for these individuals. Exercises are broken…

PyParse: a semiautomated system for scoring spoken recall data.

PubMed

Solway, Alec; Geller, Aaron S; Sederberg, Per B; Kahana, Michael J

2010-02-01

Studies of human memory often generate data on the sequence and timing of recalled items, but scoring such data using conventional methods is difficult or impossible. We describe a Python-based semiautomated system that greatly simplifies this task. This software, called PyParse, can easily be used in conjunction with many common experiment authoring systems. Scored data is output in a simple ASCII format and can be accessed with the programming language of choice, allowing for the identification of features such as correct responses, prior-list intrusions, extra-list intrusions, and repetitions.

Improving the performance of heterogeneous multi-core processors by modifying the cache coherence protocol

NASA Astrophysics Data System (ADS)

Fang, Juan; Hao, Xiaoting; Fan, Qingwen; Chang, Zeqing; Song, Shuying

2017-05-01

In the Heterogeneous multi-core architecture, CPU and GPU processor are integrated on the same chip, which poses a new challenge to the last-level cache management. In this architecture, the CPU application and the GPU application execute concurrently, accessing the last-level cache. CPU and GPU have different memory access characteristics, so that they have differences in the sensitivity of last-level cache (LLC) capacity. For many CPU applications, a reduced share of the LLC could lead to significant performance degradation. On the contrary, GPU applications can tolerate increase in memory access latency when there is sufficient thread-level parallelism. Taking into account the GPU program memory latency tolerance characteristics, this paper presents a method that let GPU applications can access to memory directly, leaving lots of LLC space for CPU applications, in improving the performance of CPU applications and does not affect the performance of GPU applications. When the CPU application is cache sensitive, and the GPU application is insensitive to the cache, the overall performance of the system is improved significantly.

A diary after dinner: How the time of event recording influences later accessibility of diary events.

PubMed

Szőllősi, Ágnes; Keresztes, Attila; Conway, Martin A; Racsmány, Mihály

2015-01-01

Recording the events of a day in a diary may help improve their later accessibility. An interesting question is whether improvements in long-term accessibility will be greater if the diary is completed at the end of the day, or after a period of sleep, the following morning. We investigated this question using an internet-based diary method. On each of five days, participants (n = 109) recorded autobiographical memories for that day or for the previous day. Recording took place either in the morning or in the evening. Following a 30-day retention interval, the diary events were free recalled. We found that participants who recorded their memories in the evening before sleep had best memory performance. These results suggest that the time of reactivation and recording of recent autobiographical events has a significant effect on the later accessibility of those diary events. We discuss our results in the light of related findings that show a beneficial effect of reduced interference during sleep on memory consolidation and reconsolidation.

Facial Expression Influences Face Identity Recognition During the Attentional Blink

PubMed Central

2014-01-01

Emotional stimuli (e.g., negative facial expressions) enjoy prioritized memory access when task relevant, consistent with their ability to capture attention. Whether emotional expression also impacts on memory access when task-irrelevant is important for arbitrating between feature-based and object-based attentional capture. Here, the authors address this question in 3 experiments using an attentional blink task with face photographs as first and second target (T1, T2). They demonstrate reduced neutral T2 identity recognition after angry or happy T1 expression, compared to neutral T1, and this supports attentional capture by a task-irrelevant feature. Crucially, after neutral T1, T2 identity recognition was enhanced and not suppressed when T2 was angry—suggesting that attentional capture by this task-irrelevant feature may be object-based and not feature-based. As an unexpected finding, both angry and happy facial expressions suppress memory access for competing objects, but only angry facial expression enjoyed privileged memory access. This could imply that these 2 processes are relatively independent from one another. PMID:25286076

Facial expression influences face identity recognition during the attentional blink.

PubMed

Bach, Dominik R; Schmidt-Daffy, Martin; Dolan, Raymond J

2014-12-01

Emotional stimuli (e.g., negative facial expressions) enjoy prioritized memory access when task relevant, consistent with their ability to capture attention. Whether emotional expression also impacts on memory access when task-irrelevant is important for arbitrating between feature-based and object-based attentional capture. Here, the authors address this question in 3 experiments using an attentional blink task with face photographs as first and second target (T1, T2). They demonstrate reduced neutral T2 identity recognition after angry or happy T1 expression, compared to neutral T1, and this supports attentional capture by a task-irrelevant feature. Crucially, after neutral T1, T2 identity recognition was enhanced and not suppressed when T2 was angry-suggesting that attentional capture by this task-irrelevant feature may be object-based and not feature-based. As an unexpected finding, both angry and happy facial expressions suppress memory access for competing objects, but only angry facial expression enjoyed privileged memory access. This could imply that these 2 processes are relatively independent from one another.

Event memory and moving in a well-known environment.

PubMed

Tamplin, Andrea K; Krawietz, Sabine A; Radvansky, Gabriel A; Copeland, David E

2013-11-01

Research in narrative comprehension has repeatedly shown that when people read about characters moving in well-known environments, the accessibility of object information follows a spatial gradient. That is, the accessibility of objects is best when they are in the same room as the protagonist, and it becomes worse the farther away they are see, e.g., Morrow, Greenspan, & Bower, (Journal of Memory and Language, 26, 165-187, 1987). In the present study, we assessed this finding using an interactive environment in which we had people memorize a map and navigate a virtual simulation of the area. During navigation, people were probed with pairs of object names and indicated whether both objects were in the same room. In contrast to the narrative studies described above, several experiments showed no evidence of a clear spatial gradient. Instead, memory for objects in currently occupied locations (e.g., the location room) was more accessible, especially after a small delay, but no clear decline was evident in the accessibility of information in memory with increased distance. Also, memory for objects along the pathway of movement (i.e., rooms that a person only passed through) showed a transitory suppression effect that was present immediately after movement, but attenuated over time. These results were interpreted in light of the event horizon model of event cognition.

The special role of item-context associations in the direct-access region of working memory.

PubMed

Campoy, Guillermo

2017-09-01

The three-embedded-component model of working memory (WM) distinguishes three representational states corresponding to three WM regions: activated long-term memory, direct-access region (DAR), and focus of attention. Recent neuroimaging research has revealed that access to the DAR is associated with enhanced hippocampal activity. Because the hippocampus mediates the encoding and retrieval of item-context associations, it has been suggested that this hippocampal activation is a consequence of the fact that item-context associations are particularly strong and accessible in the DAR. This study provides behavioral evidence for this view using an item-recognition task to assess the effect of non-intentional encoding and maintenance of item-location associations across WM regions. Five pictures of human faces were sequentially presented in different screen locations followed by a recognition probe. Visual cues immediately preceding the probe indicated the location thereof. When probe stimuli appeared in the same location that they had been presented within the memory set, the presentation of the cue was expected to elicit the activation of the corresponding WM representation through the just-established item-location association, resulting in faster recognition. Results showed this same-location effect, but only for items that, according to their serial position within the memory set, were held in the DAR.

Multi-port, optically addressed RAM

NASA Technical Reports Server (NTRS)

Johnston, Alan R. (Inventor); Nixon, Robert H. (Inventor); Bergman, Larry A. (Inventor); Esener, Sadik (Inventor)

1989-01-01

A random access memory addressing system utilizing optical links between memory and the read/write logic circuits comprises addressing circuits including a plurality of light signal sources, a plurality of optical gates including optical detectors associated with the memory cells, and a holographic optical element adapted to reflect and direct the light signals to the desired memory cell locations. More particularly, it is a multi-port, binary computer memory for interfacing with a plurality of computers. There are a plurality of storage cells for containing bits of binary information, the storage cells being disposed at the intersections of a plurality of row conductors and a plurality of column conductors. There is interfacing logic for receiving information from the computers directing access to ones of the storage cells. There are first light sources associated with the interfacing logic for transmitting a first light beam with the access information modulated thereon. First light detectors are associated with the storage cells for receiving the first light beam, for generating an electrical signal containing the access information, and for conducting the electrical signal to the one of the storage cells to which it is directed. There are holographic optical elements for reflecting the first light beam from the first light sources to the first light detectors.

A Calendar Savant with Episodic Memory Impairments

PubMed Central

Olson, Ingrid R.; Berryhill, Marian E.; Drowos, David B.; Brown, Lawrence; Chatterjee, Anjan

2010-01-01

Patients with memory disorders have severely restricted learning and memory. For instance, patients with anterograde amnesia can learn motor procedures as well as retaining some restricted ability to learn new words and factual information. However, such learning is inflexible and frequently inaccessible to conscious awareness. Here we present a case of patient AC596, a 25-year old male with severe episodic memory impairments, presumably due to anoxia during a preterm birth. In contrast to his poor episodic memory, he exhibits savant-like memory for calendar information that can be flexibly accessed by day, month, and year cues. He also has the ability to recollect the exact date of a wide range of personal experiences over the past 20 years. The patient appears to supplement his generally poor episodic memory by using memorized calendar information as a retrieval cue for autobiographical events. These findings indicate that islands of preserved memory functioning, such as a highly developed semantic memory system, can exist in individuals with severely impaired episodic memory systems. In this particular case, our patient’s memory for dates far outstripped that of normal individuals and served as a keen retrieval cue, allowing him to access information that was otherwise unavailable. PMID:20104390

Neural Correlates of Conceptual Implicit Memory and Their Contamination of Putative Neural Correlates of Explicit Memory

ERIC Educational Resources Information Center

Voss, Joel L.; Paller, Ken A.

2007-01-01

During episodic recognition tests, meaningful stimuli such as words can engender both conscious retrieval (explicit memory) and facilitated access to meaning that is distinct from the awareness of remembering (conceptual implicit memory). Neuroimaging investigations of one type of memory are frequently subject to the confounding influence of the…

Improving memory after interruption: exploiting soft constraints and manipulating information access cost.

PubMed

Morgan, Phillip L; Patrick, John; Waldron, Samuel M; King, Sophia L; Patrick, Tanya

2009-12-01

Forgetting what one was doing prior to interruption is an everyday problem. The recent soft constraints hypothesis (Gray, Sims, Fu, & Schoelles, 2006) emphasizes the strategic adaptation of information processing strategy to the task environment. It predicts that increasing information access cost (IAC: the time, and physical and mental effort involved in accessing information) encourages a more memory-intensive strategy. Like interruptions, access costs are also intrinsic to most work environments, such as when opening documents and e-mails. Three experiments investigated whether increasing IAC during a simple copying task can be an effective method for reducing forgetting following interruption. IAC was designated Low (all information permanently visible), Medium (a mouse movement to uncover target information), or High (an additional few seconds to uncover such information). Experiment 1 found that recall improved across all three levels of IAC. Subsequent experiments found that High IAC facilitated resumption after interruption, particularly when interruption occurred on half of all trials (Experiment 2), and improved prospective memory following two different interrupting tasks, even when one involved the disruptive effect of using the same type of resource as the primary task (Experiment 3). The improvement of memory after interruption with increased IAC supports the prediction of the soft constraints hypothesis. The main disadvantage of a high access cost was a reduction in speed of task completion. The practicality of manipulating IAC as a design method for inducing a memory-intensive strategy to protect against forgetting is discussed. Copyright 2009 APA

Electrical Evaluation of RCA MWS5501D Random Access Memory, Volume 2, Appendix a

NASA Technical Reports Server (NTRS)

Klute, A.

1979-01-01

The electrical characterization and qualification test results are presented for the RCA MWS5001D random access memory. The tests included functional tests, AC and DC parametric tests, AC parametric worst-case pattern selection test, determination of worst-case transition for setup and hold times, and a series of schmoo plots. The address access time, address readout time, the data hold time, and the data setup time are some of the results surveyed.

An Account of Performance in Accessing Information Stored in Long-Term Memory. A Fixed-Links Model Approach

ERIC Educational Resources Information Center

Altmeyer, Michael; Schweizer, Karl; Reiss, Siegbert; Ren, Xuezhu; Schreiner, Michael

2013-01-01

Performance in working memory and short-term memory tasks was employed for predicting performance in a long-term memory task in order to find out about the underlying processes. The types of memory were represented by versions of the Posner Task, the Backward Counting Task and the Sternberg Task serving as measures of long-term memory, working…

Tracing the time course of picture--word processing.

PubMed

Smith, M C; Magee, L E

1980-12-01

A number of independent lines of research have suggested that semantic and articulatory information become available differentially from pictures and words. The first of the experiments reported here sought to clarify the time course by which information about pictures and words becomes available by considering the pattern of interference generated when incongruent pictures and words are presented simultaneously in a Stroop-like situation. Previous investigators report that picture naming is easily disrupted by the presence of a distracting word but that word naming is relatively immune to interference from an incongruent picture. Under the assumption that information available from a completed process may disrupt an ongoing process, these results suggest that words access articulatory information more rapidly than do pictures. Experiment 1 extended this paradigm by requiring subjects to verify the category of the target stimulus. In accordance with the hypothesis that picture access the semantic code more rapidly than words, there was a reversal in the interference pattern: Word categorization suffered considerable disruption, whereas picture categorization was minimally affected by the presence of an incongruent word. Experiment 2 sought to further test the hypothesis that access to semantic and articulatory codes is different for pictures and words by examining memory for those items following naming or categorization. Categorized words were better recognized than named words, whereas the reverse was true for pictures, a result which suggests that picture naming involves more extensive processing than picture categorization. Experiment 3 replicated this result under conditions in which viewing time was held constant. The last experiment extended the investigation of memory differences to a situation in which subjects were required to generate the superordinate category name. Here, memory for categorized pictures was as good as memory for named pictures. Category generation also influenced memory for words, memory performance being superior to that following a yes--no verification of category membership. These experiments suggest a model of information access whereby pictures access semantic information were readily than name information, with the reverse being true for words. Memory for both pictures and words was a function of the amount of processing required to access a particular type of information as well as the extent of response differentiation necessitated by the task.

Antiretroviral Non-Adherence is Associated With a Retrieval Profile of Deficits in Verbal Episodic Memory.

PubMed

Obermeit, Lisa C; Morgan, Erin E; Casaletto, Kaitlin B; Grant, Igor; Woods, Steven Paul

2015-01-01

HIV-associated deficits in verbal episodic memory are commonly associated with antiretroviral non-adherence; however, the specific aspects of memory functioning (e.g., encoding, consolidation, or retrieval) that underlie this established relationship are not well understood. This study evaluated verbal memory profiles of 202 HIV+ participants who underwent a 30-day electronic monitoring of antiretroviral adherence. At the group level, non-adherence was significantly associated with lower scores on immediate and delayed passage recall and word list learning. Retention and recognition of passages and word lists were not related to adherence. Participants were then classified as having either a normal verbal memory profile, a "subcortical" retrieval profile (i.e., impaired free recall with relatively spared recognition), or a "cortical" encoding profile (e.g., cued recall intrusions) based on the Massman et al. ( 1990 ) algorithm for the California Verbal Learning Test. HIV+ participants with a classic retrieval deficit had significantly greater odds of being non-adherent than participants with a normal or encoding profile. These findings suggest that adherence to prescribed antiretroviral regimens may be particularly vulnerable to disruption in HIV+ individuals due to deficits in the complex process of efficiently accessing verbal episodic information with minimal cues. A stronger relationship between non-adherence and passage (vs. word list) recall was also found and may reflect the importance of contextual features in remembering to take medications. Targeted interventions for enhancing and supporting episodic memory retrieval processes may improve antiretroviral adherence and overall health outcomes among persons living with HIV.

Review of optical memory technologies

NASA Technical Reports Server (NTRS)

Chen, D.

1972-01-01

Optical technologies for meeting the demands of large capacity fast access time memory are discussed in terms of optical phenomena and laser applications. The magneto-optic and electro-optic approaches are considered to be the most promising memory approaches.

Optical interconnection network for parallel access to multi-rank memory in future computing systems.

PubMed

Wang, Kang; Gu, Huaxi; Yang, Yintang; Wang, Kun

2015-08-10

With the number of cores increasing, there is an emerging need for a high-bandwidth low-latency interconnection network, serving core-to-memory communication. In this paper, aiming at the goal of simultaneous access to multi-rank memory, we propose an optical interconnection network for core-to-memory communication. In the proposed network, the wavelength usage is delicately arranged so that cores can communicate with different ranks at the same time and broadcast for flow control can be achieved. A distributed memory controller architecture that works in a pipeline mode is also designed for efficient optical communication and transaction address processes. The scaling method and wavelength assignment for the proposed network are investigated. Compared with traditional electronic bus-based core-to-memory communication, the simulation results based on the PARSEC benchmark show that the bandwidth enhancement and latency reduction are apparent.

Relation between bandgap and resistance drift in amorphous phase change materials

PubMed Central

Rütten, Martin; Kaes, Matthias; Albert, Andreas; Wuttig, Matthias; Salinga, Martin

2015-01-01

Memory based on phase change materials is currently the most promising candidate for bridging the gap in access time between memory and storage in traditional memory hierarchy. However, multilevel storage is still hindered by the so-called resistance drift commonly related to structural relaxation of the amorphous phase. Here, we present the temporal evolution of infrared spectra measured on amorphous thin films of the three phase change materials Ag4In3Sb67Te26, GeTe and the most popular Ge2Sb2Te5. A widening of the bandgap upon annealing accompanied by a decrease of the optical dielectric constant ε∞ is observed for all three materials. Quantitative comparison with experimental data for the apparent activation energy of conduction reveals that the temporal evolution of bandgap and activation energy can be decoupled. The case of Ag4In3Sb67Te26, where the increase of activation energy is significantly smaller than the bandgap widening, demonstrates the possibility to identify new phase change materials with reduced resistance drift. PMID:26621533

Relation between bandgap and resistance drift in amorphous phase change materials.

PubMed

Rütten, Martin; Kaes, Matthias; Albert, Andreas; Wuttig, Matthias; Salinga, Martin

2015-12-01

Memory based on phase change materials is currently the most promising candidate for bridging the gap in access time between memory and storage in traditional memory hierarchy. However, multilevel storage is still hindered by the so-called resistance drift commonly related to structural relaxation of the amorphous phase. Here, we present the temporal evolution of infrared spectra measured on amorphous thin films of the three phase change materials Ag4In3Sb67Te26, GeTe and the most popular Ge2Sb2Te5. A widening of the bandgap upon annealing accompanied by a decrease of the optical dielectric constant ε∞ is observed for all three materials. Quantitative comparison with experimental data for the apparent activation energy of conduction reveals that the temporal evolution of bandgap and activation energy can be decoupled. The case of Ag4In3Sb67Te26, where the increase of activation energy is significantly smaller than the bandgap widening, demonstrates the possibility to identify new phase change materials with reduced resistance drift.

Tightening the entropic uncertainty bound in the presence of quantum memory

NASA Astrophysics Data System (ADS)

Adabi, F.; Salimi, S.; Haseli, S.

2016-06-01

The uncertainty principle is a fundamental principle in quantum physics. It implies that the measurement outcomes of two incompatible observables cannot be predicted simultaneously. In quantum information theory, this principle can be expressed in terms of entropic measures. M. Berta et al. [Nat. Phys. 6, 659 (2010), 10.1038/nphys1734] have indicated that uncertainty bound can be altered by considering a particle as a quantum memory correlating with the primary particle. In this article, we obtain a lower bound for entropic uncertainty in the presence of a quantum memory by adding an additional term depending on the Holevo quantity and mutual information. We conclude that our lower bound will be tightened with respect to that of Berta et al. when the accessible information about measurements outcomes is less than the mutual information about the joint state. Some examples have been investigated for which our lower bound is tighter than Berta et al.'s lower bound. Using our lower bound, a lower bound for the entanglement of formation of bipartite quantum states has been obtained, as well as an upper bound for the regularized distillable common randomness.

Three-dimensional magnetic bubble memory system

NASA Technical Reports Server (NTRS)

Stadler, Henry L. (Inventor); Katti, Romney R. (Inventor); Wu, Jiin-Chuan (Inventor)

1994-01-01

A compact memory uses magnetic bubble technology for providing data storage. A three-dimensional arrangement, in the form of stacks of magnetic bubble layers, is used to achieve high volumetric storage density. Output tracks are used within each layer to allow data to be accessed uniquely and unambiguously. Storage can be achieved using either current access or field access magnetic bubble technology. Optical sensing via the Faraday effect is used to detect data. Optical sensing facilitates the accessing of data from within the three-dimensional package and lends itself to parallel operation for supporting high data rates and vector and parallel processing.

Perpetual Model Validation

DTIC Science & Technology

2017-03-01

models of software execution, for example memory access patterns, to check for security intrusions. Additional research was performed to tackle the...considered using indirect models of software execution, for example memory access patterns, to check for security intrusions. Additional research ...deterioration for example , no longer corresponds to the model used during verification time. Finally, the research looked at ways to combine hybrid systems

Design of Unstructured Adaptive (UA) NAS Parallel Benchmark Featuring Irregular, Dynamic Memory Accesses

NASA Technical Reports Server (NTRS)

Feng, Hui-Yu; VanderWijngaart, Rob; Biswas, Rupak; Biegel, Bryan (Technical Monitor)

2001-01-01

We describe the design of a new method for the measurement of the performance of modern computer systems when solving scientific problems featuring irregular, dynamic memory accesses. The method involves the solution of a stylized heat transfer problem on an unstructured, adaptive grid. A Spectral Element Method (SEM) with an adaptive, nonconforming mesh is selected to discretize the transport equation. The relatively high order of the SEM lowers the fraction of wall clock time spent on inter-processor communication, which eases the load balancing task and allows us to concentrate on the memory accesses. The benchmark is designed to be three-dimensional. Parallelization and load balance issues of a reference implementation will be described in detail in future reports.

A Pilot Memory Café for People with Learning Disabilities and Memory Difficulties

ERIC Educational Resources Information Center

Kiddle, Hannah; Drew, Neil; Crabbe, Paul; Wigmore, Jonathan

2016-01-01

Memory cafés have been found to normalise experiences of dementia and provide access to an accepting social network. People with learning disabilities are at increased risk of developing dementia, but the possible benefits of attending a memory café are not known. This study evaluates a 12-week pilot memory café for people with learning…

Large Capacity of Conscious Access for Incidental Memories in Natural Scenes.

PubMed

Kaunitz, Lisandro N; Rowe, Elise G; Tsuchiya, Naotsugu

2016-09-01

When searching a crowd, people can detect a target face only by direct fixation and attention. Once the target is found, it is consciously experienced and remembered, but what is the perceptual fate of the fixated nontarget faces? Whereas introspection suggests that one may remember nontargets, previous studies have proposed that almost no memory should be retained. Using a gaze-contingent paradigm, we asked subjects to visually search for a target face within a crowded natural scene and then tested their memory for nontarget faces, as well as their confidence in those memories. Subjects remembered up to seven fixated, nontarget faces with more than 70% accuracy. Memory accuracy was correlated with trial-by-trial confidence ratings, which implies that the memory was consciously maintained and accessed. When the search scene was inverted, no more than three nontarget faces were remembered. These findings imply that incidental memory for faces, such as those recalled by eyewitnesses, is more reliable than is usually assumed. © The Author(s) 2016.

The Effect of NUMA Tunings on CPU Performance

NASA Astrophysics Data System (ADS)

Hollowell, Christopher; Caramarcu, Costin; Strecker-Kellogg, William; Wong, Antonio; Zaytsev, Alexandr

2015-12-01

Non-Uniform Memory Access (NUMA) is a memory architecture for symmetric multiprocessing (SMP) systems where each processor is directly connected to separate memory. Indirect access to other CPU's (remote) RAM is still possible, but such requests are slower as they must also pass through that memory's controlling CPU. In concert with a NUMA-aware operating system, the NUMA hardware architecture can help eliminate the memory performance reductions generally seen in SMP systems when multiple processors simultaneously attempt to access memory. The x86 CPU architecture has supported NUMA for a number of years. Modern operating systems such as Linux support NUMA-aware scheduling, where the OS attempts to schedule a process to the CPU directly attached to the majority of its RAM. In Linux, it is possible to further manually tune the NUMA subsystem using the numactl utility. With the release of Red Hat Enterprise Linux (RHEL) 6.3, the numad daemon became available in this distribution. This daemon monitors a system's NUMA topology and utilization, and automatically makes adjustments to optimize locality. As the number of cores in x86 servers continues to grow, efficient NUMA mappings of processes to CPUs/memory will become increasingly important. This paper gives a brief overview of NUMA, and discusses the effects of manual tunings and numad on the performance of the HEPSPEC06 benchmark, and ATLAS software.

Enhancing Memory in Your Students: COMPOSE Yourself!

ERIC Educational Resources Information Center

Rotter, Kathleen M.

2009-01-01

The essence of teaching is, in fact, creating new memories for your students. The teacher's role is to help students store the correct information (memories) in ways that make recall and future access and use likely. Therefore, choosing techniques to enhance memory is possibly the most critical aspect of instructional design. COMPOSE is an acronym…

Frequent Statement and Dereference Elimination for Imperative and Object-Oriented Distributed Programs

PubMed Central

El-Zawawy, Mohamed A.

2014-01-01

This paper introduces new approaches for the analysis of frequent statement and dereference elimination for imperative and object-oriented distributed programs running on parallel machines equipped with hierarchical memories. The paper uses languages whose address spaces are globally partitioned. Distributed programs allow defining data layout and threads writing to and reading from other thread memories. Three type systems (for imperative distributed programs) are the tools of the proposed techniques. The first type system defines for every program point a set of calculated (ready) statements and memory accesses. The second type system uses an enriched version of types of the first type system and determines which of the ready statements and memory accesses are used later in the program. The third type system uses the information gather so far to eliminate unnecessary statement computations and memory accesses (the analysis of frequent statement and dereference elimination). Extensions to these type systems are also presented to cover object-oriented distributed programs. Two advantages of our work over related work are the following. The hierarchical style of concurrent parallel computers is similar to the memory model used in this paper. In our approach, each analysis result is assigned a type derivation (serves as a correctness proof). PMID:24892098

Don’t make cache too complex: A simple probability-based cache management scheme for SSDs

PubMed Central

Cho, Sangyeun; Choi, Jongmoo

2017-01-01

Solid-state drives (SSDs) have recently become a common storage component in computer systems, and they are fueled by continued bit cost reductions achieved with smaller feature sizes and multiple-level cell technologies. However, as the flash memory stores more bits per cell, the performance and reliability of the flash memory degrade substantially. To solve this problem, a fast non-volatile memory (NVM-)based cache has been employed within SSDs to reduce the long latency required to write data. Absorbing small writes in a fast NVM cache can also reduce the number of flash memory erase operations. To maximize the benefits of an NVM cache, it is important to increase the NVM cache utilization. In this paper, we propose and study ProCache, a simple NVM cache management scheme, that makes cache-entrance decisions based on random probability testing. Our scheme is motivated by the observation that frequently written hot data will eventually enter the cache with a high probability, and that infrequently accessed cold data will not enter the cache easily. Owing to its simplicity, ProCache is easy to implement at a substantially smaller cost than similar previously studied techniques. We evaluate ProCache and conclude that it achieves comparable performance compared to a more complex reference counter-based cache-management scheme. PMID:28358897

Don't make cache too complex: A simple probability-based cache management scheme for SSDs.

PubMed

Baek, Seungjae; Cho, Sangyeun; Choi, Jongmoo

2017-01-01

Solid-state drives (SSDs) have recently become a common storage component in computer systems, and they are fueled by continued bit cost reductions achieved with smaller feature sizes and multiple-level cell technologies. However, as the flash memory stores more bits per cell, the performance and reliability of the flash memory degrade substantially. To solve this problem, a fast non-volatile memory (NVM-)based cache has been employed within SSDs to reduce the long latency required to write data. Absorbing small writes in a fast NVM cache can also reduce the number of flash memory erase operations. To maximize the benefits of an NVM cache, it is important to increase the NVM cache utilization. In this paper, we propose and study ProCache, a simple NVM cache management scheme, that makes cache-entrance decisions based on random probability testing. Our scheme is motivated by the observation that frequently written hot data will eventually enter the cache with a high probability, and that infrequently accessed cold data will not enter the cache easily. Owing to its simplicity, ProCache is easy to implement at a substantially smaller cost than similar previously studied techniques. We evaluate ProCache and conclude that it achieves comparable performance compared to a more complex reference counter-based cache-management scheme.

Retention and Fading of Military Skills: Literature Review

DTIC Science & Technology

2000-04-01

distinction between availability and accessibility of human memory ( Tulving & Pearlstone , 1966; Tulving , 1983). Observation of some decrement in performance...Army War College. TULVING , E. (1983). Elements of Episodic Memory. London: Oxford University Press. TULVING , E., & PEARLSTONE , Z. (1966). Availability...store ( Tulving , 1983). To access this knowledge, the individual consciously recalls facts about the task and attempts to use them to guide performance

Access to Attitude-Relevant Information in Memory as a Determinant of Persuasion: The Role of Message and Communicator Attributes.

ERIC Educational Resources Information Center

Wood, Wendy; And Others

Research literature shows that people with access to attitude-relevant information in memory are able to draw on relevant beliefs and prior experiences when analyzing a persuasive message. This suggests that people who can retrieve little attitude-relevant information should be less able to engage in systematic processing. Two experiments were…

76 FR 45295 - In the Matter of Certain Static Random Access Memories and Products Containing Same; Notice of...

Federal Register 2010, 2011, 2012, 2013, 2014

2011-07-28

... supplementing the amended complaint was filed on June 28, 2011. A second amended complaint was filed on July 13... of certain static random access memories and products containing same by reason of infringement of... 13 of the `937 patent, and whether an industry in the United States exists as required by subsection...

Implementing a bubble memory hierarchy system

NASA Technical Reports Server (NTRS)

Segura, R.; Nichols, C. D.

1979-01-01

This paper reports on implementation of a magnetic bubble memory in a two-level hierarchial system. The hierarchy used a major-minor loop device and RAM under microprocessor control. Dynamic memory addressing, dual bus primary memory, and hardware data modification detection are incorporated in the system to minimize access time. It is the objective of the system to incorporate the advantages of bipolar memory with that of bubble domain memory to provide a smart, optimal memory system which is easy to interface and independent of user's system.

Integrated Vertical Bloch Line (VBL) memory

NASA Technical Reports Server (NTRS)

Katti, R. R.; Wu, J. C.; Stadler, H. L.

1991-01-01

Vertical Bloch Line (VBL) Memory is a recently conceived, integrated, solid state, block access, VLSI memory which offers the potential of 1 Gbit/sq cm areal storage density, data rates of hundreds of megabits/sec, and submillisecond average access time simultaneously at relatively low mass, volume, and power values when compared to alternative technologies. VBLs are micromagnetic structures within magnetic domain walls which can be manipulated using magnetic fields from integrated conductors. The presence or absence of BVL pairs are used to store binary information. At present, efforts are being directed at developing a single chip memory using 25 Mbit/sq cm technology in magnetic garnet material which integrates, at a single operating point, the writing, storage, reading, and amplification functions needed in a memory. The current design architecture, functional elements, and supercomputer simulation results are described which are used to assist the design process.

Fencing direct memory access data transfers in a parallel active messaging interface of a parallel computer

DOE Office of Scientific and Technical Information (OSTI.GOV)

Blocksome, Michael A.; Mamidala, Amith R.

2013-09-03

Fencing direct memory access (`DMA`) data transfers in a parallel active messaging interface (`PAMI`) of a parallel computer, the PAMI including data communications endpoints, each endpoint including specifications of a client, a context, and a task, the endpoints coupled for data communications through the PAMI and through DMA controllers operatively coupled to segments of shared random access memory through which the DMA controllers deliver data communications deterministically, including initiating execution through the PAMI of an ordered sequence of active DMA instructions for DMA data transfers between two endpoints, effecting deterministic DMA data transfers through a DMA controller and a segmentmore » of shared memory; and executing through the PAMI, with no FENCE accounting for DMA data transfers, an active FENCE instruction, the FENCE instruction completing execution only after completion of all DMA instructions initiated prior to execution of the FENCE instruction for DMA data transfers between the two endpoints.« less

Guilt as a Motivator for Moral Judgment: An Autobiographical Memory Study

PubMed Central

Knez, Igor; Nordhall, Ola

2017-01-01

The aim was to investigate the phenomenology of self-defining moral memory and its relations to self-conscious feelings of guilt and willingness to do wrong (moral intention) in social and economic moral situations. We found that people use guilt as a moral motivator for their moral intention. The reparative function of guilt varied, however, with type of situation; that is, participants felt guiltier and were less willing to do wrong in economic compared to social moral situations. The self-defining moral memory was shown to be relatively more easy to access (accessibility), logically structured (coherence), vivid, seen from the first-person perspective (visual perspective), real (sensory detail); but was relatively less positive (valence), emotionally intense, chronologically clear (time perspective), in agreement with the present self (distancing), and shared. Finally, it was indicated that the more guilt people felt the more hidden/denied (less accessible), but more real (more sensory details), the self-defining moral memory. PMID:28539906

Computer hardware for radiologists: Part 2.

PubMed

Indrajit, Ik; Alam, A

2010-11-01

Computers are an integral part of modern radiology equipment. In the first half of this two-part article, we dwelt upon some fundamental concepts regarding computer hardware, covering components like motherboard, central processing unit (CPU), chipset, random access memory (RAM), and memory modules. In this article, we describe the remaining computer hardware components that are of relevance to radiology. "Storage drive" is a term describing a "memory" hardware used to store data for later retrieval. Commonly used storage drives are hard drives, floppy drives, optical drives, flash drives, and network drives. The capacity of a hard drive is dependent on many factors, including the number of disk sides, number of tracks per side, number of sectors on each track, and the amount of data that can be stored in each sector. "Drive interfaces" connect hard drives and optical drives to a computer. The connections of such drives require both a power cable and a data cable. The four most popular "input/output devices" used commonly with computers are the printer, monitor, mouse, and keyboard. The "bus" is a built-in electronic signal pathway in the motherboard to permit efficient and uninterrupted data transfer. A motherboard can have several buses, including the system bus, the PCI express bus, the PCI bus, the AGP bus, and the (outdated) ISA bus. "Ports" are the location at which external devices are connected to a computer motherboard. All commonly used peripheral devices, such as printers, scanners, and portable drives, need ports. A working knowledge of computers is necessary for the radiologist if the workflow is to realize its full potential and, besides, this knowledge will prepare the radiologist for the coming innovations in the 'ever increasing' digital future.

Deciding with the eye: how the visually manipulated accessibility of information in memory influences decision behavior.

PubMed

Platzer, Christine; Bröder, Arndt; Heck, Daniel W

2014-05-01

Decision situations are typically characterized by uncertainty: Individuals do not know the values of different options on a criterion dimension. For example, consumers do not know which is the healthiest of several products. To make a decision, individuals can use information about cues that are probabilistically related to the criterion dimension, such as sugar content or the concentration of natural vitamins. In two experiments, we investigated how the accessibility of cue information in memory affects which decision strategy individuals rely on. The accessibility of cue information was manipulated by means of a newly developed paradigm, the spatial-memory-cueing paradigm, which is based on a combination of the looking-at-nothing phenomenon and the spatial-cueing paradigm. The results indicated that people use different decision strategies, depending on the validity of easily accessible information. If the easily accessible information is valid, people stop information search and decide according to a simple take-the-best heuristic. If, however, information that comes to mind easily has a low predictive validity, people are more likely to integrate all available cue information in a compensatory manner.

The Effect of Retrieval Cues on Visual Preferences and Memory in Infancy: Evidence for a Four-Phase Attention Function.

ERIC Educational Resources Information Center

Bahrick, Lorraine E.; Hernandez-Reif, Maria; Pickens, Jeffrey N.

1997-01-01

Tested hypothesis from Bahrick and Pickens' infant attention model that retrieval cues increase memory accessibility and shift visual preferences toward greater novelty to resemble recent memories. Found that after retention intervals associated with remote or intermediate memory, previous familiarity preferences shifted to null or novelty…

Activation and Binding in Verbal Working Memory: A Dual-Process Model for the Recognition of Nonwords

ERIC Educational Resources Information Center

Oberauer, Klauss; Lange, Elke B.

2009-01-01

The article presents a mathematical model of short-term recognition based on dual-process models and the three-component theory of working memory [Oberauer, K. (2002). Access to information in working memory: Exploring the focus of attention. "Journal of Experimental Psychology: Learning, Memory, and Cognition, 28", 411-421]. Familiarity arises…

Recognition-induced forgetting is not due to category-based set size.

PubMed

Maxcey, Ashleigh M

2016-01-01

What are the consequences of accessing a visual long-term memory representation? Previous work has shown that accessing a long-term memory representation via retrieval improves memory for the targeted item and hurts memory for related items, a phenomenon called retrieval-induced forgetting. Recently we found a similar forgetting phenomenon with recognition of visual objects. Recognition-induced forgetting occurs when practice recognizing an object during a two-alternative forced-choice task, from a group of objects learned at the same time, leads to worse memory for objects from that group that were not practiced. An alternative explanation of this effect is that category-based set size is inducing forgetting, not recognition practice as claimed by some researchers. This alternative explanation is possible because during recognition practice subjects make old-new judgments in a two-alternative forced-choice task, and are thus exposed to more objects from practiced categories, potentially inducing forgetting due to set-size. Herein I pitted the category-based set size hypothesis against the recognition-induced forgetting hypothesis. To this end, I parametrically manipulated the amount of practice objects received in the recognition-induced forgetting paradigm. If forgetting is due to category-based set size, then the magnitude of forgetting of related objects will increase as the number of practice trials increases. If forgetting is recognition induced, the set size of exemplars from any given category should not be predictive of memory for practiced objects. Consistent with this latter hypothesis, additional practice systematically improved memory for practiced objects, but did not systematically affect forgetting of related objects. These results firmly establish that recognition practice induces forgetting of related memories. Future directions and important real-world applications of using recognition to access our visual memories of previously encountered objects are discussed.

A Memory-Based Programmable Logic Device Using Look-Up Table Cascade with Synchronous Static Random Access Memories

NASA Astrophysics Data System (ADS)

Nakamura, Kazuyuki; Sasao, Tsutomu; Matsuura, Munehiro; Tanaka, Katsumasa; Yoshizumi, Kenichi; Nakahara, Hiroki; Iguchi, Yukihiro

2006-04-01

A large-scale memory-technology-based programmable logic device (PLD) using a look-up table (LUT) cascade is developed in the 0.35-μm standard complementary metal oxide semiconductor (CMOS) logic process. Eight 64 K-bit synchronous SRAMs are connected to form an LUT cascade with a few additional circuits. The features of the LUT cascade include: 1) a flexible cascade connection structure, 2) multi phase pseudo asynchronous operations with synchronous static random access memory (SRAM) cores, and 3) LUT-bypass redundancy. This chip operates at 33 MHz in 8-LUT cascades at 122 mW. Benchmark results show that it achieves a comparable performance to field programmable gate array (FPGAs).

Eight microprocessor-based instrument data systems in the Galileo Orbiter spacecraft

NASA Technical Reports Server (NTRS)

Barry, R. C.

1980-01-01

Instrument data systems consist of a microprocessor, 3K bytes of Read Only Memory and 3K bytes of Random Access Memory. It interfaces with the spacecraft data bus through an isolated user interface with a direct memory access bus adaptor, and/or parallel data from instrument devices such as registers, buffers, analog to digital converters, multiplexers, and solid state sensors. These data systems support the spacecraft hardware and software communication protocol, decode and process instrument commands, generate continuous instrument operating modes, control the instrument mechanisms, acquire, process, format, and output instrument science data.

Vertical Launch System Loadout Planner

DTIC Science & Technology

2015-03-01

United States Navy USS United States’ Ship VBA Visual Basic for Applications VLP VLS Loadout Planner VLS Vertical Launch System...with 32 gigabytes of random access memory and eight processors, General Algebraic Modeling System (GAMS) CPLEX version 24 (GAMS, 2015) solves this...problem in ten minutes to an integer tolerance of 10%. The GAMS interpreter and CPLEX solver require 75 Megabytes of random access memory for this

Nonvolatile GaAs Random-Access Memory

NASA Technical Reports Server (NTRS)

Katti, Romney R.; Stadler, Henry L.; Wu, Jiin-Chuan

1994-01-01

Proposed random-access integrated-circuit electronic memory offers nonvolatile magnetic storage. Bits stored magnetically and read out with Hall-effect sensors. Advantages include short reading and writing times and high degree of immunity to both single-event upsets and permanent damage by ionizing radiation. Use of same basic material for both transistors and sensors simplifies fabrication process, with consequent benefits in increased yield and reduced cost.

MemAxes Visualization Software

DOE Office of Scientific and Technical Information (OSTI.GOV)

Hardware advancements such as Intel's PEBS and AMD's IBS, as well as software developments such as the perf_event API in Linux have made available the acquisition of memory access samples with performance information. MemAxes is a visualization and analysis tool for memory access sample data. By mapping the samples to their associated code, variables, node topology, and application dataset, MemAxes provides intuitive views of the data.

Recollection Rejection: How Children Edit Their False Memories.

ERIC Educational Resources Information Center

Brainerd, C. J.; Reyna, V. F.

2002-01-01

Presents new measure of children's use of an editing operation that suppresses false memories by accessing verbatim traces of true events. Application of the methodology showed that false-memory editing increased dramatically between early and middle childhood. Measure reacted appropriately to experimental manipulations. Developmental reductions…

Multiprocessing MCNP on an IBM RS/6000 cluster

DOE Office of Scientific and Technical Information (OSTI.GOV)

McKinney, G.W.; West, J.T.

1993-01-01

The advent of high-performance computer systems has brought to maturity programming concepts like vectorization, multiprocessing, and multitasking. While there are many schools of thought as to the most significant factor in obtaining order-of-magnitude increases in performance, such speedup can only be achieved by integrating the computer system and application code. Vectorization leads to faster manipulation of arrays by overlapping instruction CPU cycles. Discrete ordinates codes, which require the solving of large matrices, have proved to be major benefactors of vectorization. Monte Carlo transport, on the other hand, typically contains numerous logic statements and requires extensive redevelopment to benefit from vectorization.more » Multiprocessing and multitasking provide additional CPU cycles via multiple processors. Such systems are generally designed with either common memory access (multitasking) or distributed memory access. In both cases, theoretical speedup, as a function of the number of processors (P) and the fraction of task time that multiprocesses (f), can be formulated using Amdahl's Law S ((f,P) = 1 f + f/P). However, for most applications this theoretical limit cannot be achieved, due to additional terms not included in Amdahl's Law. Monte Carlo transport is a natural candidate for multiprocessing, since the particle tracks are generally independent and the precision of the result increases as the square root of the number of particles tracked.« less

Analysis of Internet Usage Among Cancer Patients in a County Hospital Setting: A Quality Improvement Initiative

PubMed Central

Lilley, Lisa; Lodrigues, William; Dreadin-Pulliam, Julie; Xie, Xian-Jin; Mathur, Sakshi; Rao, Madhu; Harvey, Valorie; Leitch, Ann Marilyn; Rao, Roshni

2014-01-01

Background Cancer is one of the most common diseases that patients research on the Internet. The Commission on Cancer (CoC) recommended that Parkland Memorial Hospital (PMH) improve the oncology services website. PMH is Dallas County’s public health care facility, serving a largely uninsured, minority population. Most research regarding patient Internet use has been conducted in insured, Caucasian populations, raising concerns that the needs of PMH patients may not be extrapolated from available data. The PMH Cancer Committee, therefore, adopted a quality improvement initiative to understand patients’ Internet usage. Objective The objective of the study was to obtain and analyze data regarding patients’ Internet usage in order to make targeted improvements to the oncology services section of the institutional website. Methods A task force developed an 11-question survey to ascertain what proportion of our patients have Internet access and use the Internet to obtain medical information as well as determine the specific information sought. Between April 2011 and August 2011, 300 surveys were administered to newly diagnosed cancer patients. Multivariate analyses were performed. Results Of 300 surveys, 291 were included. Minorities, primarily African-American and Hispanic, represented 78.0% (227/291) of patients. Only 37.1% (108/291) of patients had Internet access, most (256/291, 87.9%) having access at home. Younger patients more commonly had Internet access, with a mean age of 47 versus 58 years for those without (P<.001). Education beyond high school was associated with Internet access (P<.001). The most common reason for Internet research was to develop questions for discussion with one’s physician. Patients most frequently sought information regarding cancer treatment options, outcomes, and side effects. Conclusions Less than one-half of PMH oncology patients have Internet access. This is influenced by age, educational level, and ethnicity. Those with access use it to obtain information related to their cancer diagnosis. The most effective way of addressing our patients’ needs using the institutional website is to provide links to reputable disease-specific sites. PMID:24824330

Strategies for generating multiple instances of common and ad hoc categories.

PubMed

Vallée-Tourangeau, F; Anthony, S H; Austin, N G

1998-09-01

In a free-emission procedure participants were asked to generate instances of a given category and to report, retrospectively, the strategies that they were aware of using in retrieving instances. In two studies reported here, participants generated instances for common categories (e.g. fruit) and for ad hoc categories (e.g., things people keep in their pockets) for 90 seconds and for each category described how they had proceeded in doing so. Analysis of the protocols identified three broad classes of strategy: (1) experiential, where memories of specific or generic personal experiences involving interactions with the category instances acted as cues; (2) semantic, where a consideration of abstract conceptual characteristics of a category were employed to retrieve category exemplars; (3) unmediated, where instances were effortlessly retrieved without mediating cognitions of which subjects were aware. Experiential strategies outnumbered semantic strategies (on average 4 to 1) not only for ad hoc categories but also for common categories. This pattern was noticeably reversed for ad hoc categories that subjects were unlikely to have experienced personally (e.g. things sold on the black market in Russia). Whereas more traditional accounts of semantic memory have favoured decontextualised abstract representations of category knowledge, to the extent that mode of access informs us of knowledge structures, our data suggest that category knowledge is significantly grounded in terms of everyday contexts where category instances are encountered.

Another look at retroactive and proactive interference: a quantitative analysis of conversion processes.

PubMed

Blank, Hartmut

2005-02-01

Traditionally, the causes of interference phenomena were sought in "real" or "hard" memory processes such as unlearning, response competition, or inhibition, which serve to reduce the accessibility of target items. I propose an alternative approach which does not deny the influence of such processes but highlights a second, equally important, source of interference-the conversion (Tulving, 1983) of accessible memory information into memory performance. Conversion is conceived as a problem-solving-like activity in which the rememberer tries to find solutions to a memory task. Conversion-based interference effects are traced to different conversion processes in the experimental and control conditions of interference designs. I present a simple theoretical model that quantitatively predicts the resulting amount of interference. In two paired-associate learning experiments using two different types of memory tests, these predictions were corroborated. Relations of the present approach to traditional accounts of interference phenomena and implications for eyewitness testimony are discussed.

Nanoscale CuO solid-electrolyte-based conductive-bridging, random-access memory cell with a TiN liner

NASA Astrophysics Data System (ADS)

Lee, Jong-Sun; Kim, Dong-Won; Kim, Hea-Jee; Jin, Soo-Min; Song, Myung-Jin; Kwon, Ki-Hyun; Park, Jea-Gun; Jalalah, Mohammed; Al-Hajry, Ali

2018-01-01

The Conductive-bridge random-access memory (CBRAM) cell is a promising candidate for a terabit-level non-volatile memory due to its remarkable advantages. We present for the first time TiN as a diffusion barrier in CBRAM cells for enhancing their reliability. CuO solid-electrolyte-based CBRAM cells implemented with a 0.1-nm TiN liner demonstrated better non-volatile memory characteristics such as 106 AC write/erase endurance cycles with 100-μs AC pulse width and a long retention time of 7.4-years at 85 °C. In addition, the analysis of Ag diffusion in the CBRAM cell suggests that the morphology of the Ag filaments in the electrolyte can be effectively controlled by tuning the thickness of the TiN liner. These promising results pave the way for faster commercialization of terabit-level non-volatile memories.

On Using the Volatile Mem-Capacitive Effect of TiO2 Resistive Random Access Memory to Mimic the Synaptic Forgetting Process

NASA Astrophysics Data System (ADS)

Sarkar, Biplab; Mills, Steven; Lee, Bongmook; Pitts, W. Shepherd; Misra, Veena; Franzon, Paul D.

2018-02-01

In this work, we report on mimicking the synaptic forgetting process using the volatile mem-capacitive effect of a resistive random access memory (RRAM). TiO2 dielectric, which is known to show volatile memory operations due to migration of inherent oxygen vacancies, was used to achieve the volatile mem-capacitive effect. By placing the volatile RRAM candidate along with SiO2 at the gate of a MOS capacitor, a volatile capacitance change resembling the forgetting nature of a human brain is demonstrated. Furthermore, the memory operation in the MOS capacitor does not require a current flow through the gate dielectric indicating the feasibility of obtaining low power memory operations. Thus, the mem-capacitive effect of volatile RRAM candidates can be attractive to the future neuromorphic systems for implementing the forgetting process of a human brain.

Parameter optimization for transitions between memory states in small arrays of Josephson junctions

DOE Office of Scientific and Technical Information (OSTI.GOV)

Rezac, Jacob D.; Imam, Neena; Braiman, Yehuda

Coupled arrays of Josephson junctions possess multiple stable zero voltage states. Such states can store information and consequently can be utilized for cryogenic memory applications. Basic memory operations can be implemented by sending a pulse to one of the junctions and studying transitions between the states. In order to be suitable for memory operations, such transitions between the states have to be fast and energy efficient. Here in this article we employed simulated annealing, a stochastic optimization algorithm, to study parameter optimization of array parameters which minimizes times and energies of transitions between specifically chosen states that can be utilizedmore » for memory operations (Read, Write, and Reset). Simulation results show that such transitions occur with access times on the order of 10–100 ps and access energies on the order of 10 -19–5×10 -18 J. Numerical simulations are validated with approximate analytical results.« less

Dementia - daily care

MedlinePlus

... pdf . Accessed on June 27, 2016. Budson AE, Solomon PR. Life adjustments for memory loss, Alzheimer's disease, and dementia. In: Budson AE, Solomon PR, eds. Memory Loss, Alzheimer's Disease, and Dementia: ...

Rapid recovery from transient faults in the fault-tolerant processor with fault-tolerant shared memory

NASA Technical Reports Server (NTRS)

Harper, Richard E.; Butler, Bryan P.

1990-01-01

The Draper fault-tolerant processor with fault-tolerant shared memory (FTP/FTSM), which is designed to allow application tasks to continue execution during the memory alignment process, is described. Processor performance is not affected by memory alignment. In addition, the FTP/FTSM incorporates a hardware scrubber device to perform the memory alignment quickly during unused memory access cycles. The FTP/FTSM architecture is described, followed by an estimate of the time required for channel reintegration.

The Two Faces of Selective Memory Retrieval: Recall Specificity of the Detrimental but Not the Beneficial Effect

ERIC Educational Resources Information Center

Bäuml, Karl-Heinz T.; Dobler, Ina M.

2015-01-01

Depending on the degree to which the original study context is accessible, selective memory retrieval can be detrimental or beneficial for the recall of other memories (Bäuml & Samenieh, 2012). Prior work has shown that the detrimental effect of memory retrieval is typically recall specific and does not arise after restudy trials, whereas…

Vortex-Core Reversal Dynamics: Towards Vortex Random Access Memory

NASA Astrophysics Data System (ADS)

Kim, Sang-Koog

2011-03-01

An energy-efficient, ultrahigh-density, ultrafast, and nonvolatile solid-state universal memory is a long-held dream in the field of information-storage technology. The magnetic random access memory (MRAM) along with a spin-transfer-torque switching mechanism is a strong candidate-means of realizing that dream, given its nonvolatility, infinite endurance, and fast random access. Magnetic vortices in patterned soft magnetic dots promise ground-breaking applications in information-storage devices, owing to the very stable twofold ground states of either their upward or downward core magnetization orientation and plausible core switching by in-plane alternating magnetic fields or spin-polarized currents. However, two technologically most important but very challenging issues --- low-power recording and reliable selection of each memory cell with already existing cross-point architectures --- have not yet been resolved for the basic operations in information storage, that is, writing (recording) and readout. Here, we experimentally demonstrate a magnetic vortex random access memory (VRAM) in the basic cross-point architecture. This unique VRAM offers reliable cell selection and low-power-consumption control of switching of out-of-plane core magnetizations using specially designed rotating magnetic fields generated by two orthogonal and unipolar Gaussian-pulse currents along with optimized pulse width and time delay. Our achievement of a new device based on a new material, that is, a medium composed of patterned vortex-state disks, together with the new physics on ultrafast vortex-core switching dynamics, can stimulate further fruitful research on MRAMs that are based on vortex-state dot arrays.

Blanket Gate Would Address Blocks Of Memory

NASA Technical Reports Server (NTRS)

Lambe, John; Moopenn, Alexander; Thakoor, Anilkumar P.

1988-01-01

Circuit-chip area used more efficiently. Proposed gate structure selectively allows and restricts access to blocks of memory in electronic neural-type network. By breaking memory into independent blocks, gate greatly simplifies problem of reading from and writing to memory. Since blocks not used simultaneously, share operational amplifiers that prompt and read information stored in memory cells. Fewer operational amplifiers needed, and chip area occupied reduced correspondingly. Cost per bit drops as result.

Chronic intermittent exposure to ayahuasca during aging does not affect memory in mice.

PubMed

Correa-Netto, N F; Coelho, L S; Galfano, G S; Nishide, F; Tamura, F; Shimizu, M K; Santos, J G; Linardi, A

2017-06-05

The Quechua term ayahuasca refers to a beverage obtained from decoctions of the liana Banisteriopsis caapi with leaves of Psychotria viridis. The ritualistic use of ayahuasca is becoming a global phenomenon, with some individuals using this beverage throughout life, including in old age. Cognitive impairment is a common manifestation during aging. There are conflicting reports on the ability of some ayahuasca compounds to exert neuroprotective or neurotoxic effects that could improve or impair learning and memory. Animal models provide a relevant and accessible means of investigating the behavioral effects of ayahuasca without the environmental conditions associated with the ritualistic use of the beverage. In this study, we investigated the influence of chronic ayahuasca exposure throughout aging on the spatial reference and habituation memories of mice. Twenty-eight male c57bl/6 mice (6 months old) received ayahuasca or water (1.5 mL/kg, orally) twice a week for 12 months and were tested in the Morris water maze (MWM), open field and elevated plus maze (EPM) tasks before and after treatment. During aging, there was significant impairment in the evocation (but not acquisition) of spatial reference memory and in habituation to the open field. There was also a decrease in locomotor activity in the open field and EPM tests, whereas the anxiety parameters were unaltered. Ayahuasca treatment did not alter any of these parameters associated with aging. These findings indicate that chronic exposure to ayahuasca during aging did not affect memory in mice.

The dynamic time course of memory recovery in transient global amnesia.

PubMed

Guillery-Girard, B; Desgranges, B; Urban, C; Piolino, P; de la Sayette, V; Eustache, F

2004-11-01

To investigate the dynamic time course of transient global amnesia (TGA)--that is, the process of recovery and the interindividual variability--by testing four patients during the day of TGA itself (on three occasions) and at follow up (on two occasions). A specially designed protocol focusing on semantic (both conceptual and autobiographical knowledge) and episodic (both anterograde and retrograde components) memory. Every patient showed marked impairment of both anterograde and retrograde episodic memory during the acute phase, with a relative preservation of personal and conceptual semantic knowledge. During the following phase, the authors observed similarities and differences among the patients' patterns of recovery. In general, retrograde amnesia recovered before the anterograde amnesia and anterograde episodic memory was recovered gradually in every case. In contrast, shrinkage of retrograde amnesia was more heterogeneous. In two of the patients, this shrinkage followed a chronological gradient and the most remote events were recovered first. In the two other patients, it depended more on the strength of the trace, and there was no temporal gradient. For the latter, an executive deficit could account for difficulties in accessing both conceptual knowledge and autobiographical memories. This profile of recovery suggests a "neocortical to medial temporal" process in every case, and the possibility of an additional frontal dysfunction in some cases. Hence, the acute phase seems to be characterised by a common episodic impairment. This variability between subjects appears in the recovery phase with two different patterns of impairment.

Chronic intermittent exposure to ayahuasca during aging does not affect memory in mice

PubMed Central

Correa-Netto, N.F.; Coelho, L.S.; Galfano, G.S.; Nishide, F.; Tamura, F.; Shimizu, M.K.; Santos, J.G.; Linardi, A.

2017-01-01

The Quechua term ayahuasca refers to a beverage obtained from decoctions of the liana Banisteriopsis caapi with leaves of Psychotria viridis. The ritualistic use of ayahuasca is becoming a global phenomenon, with some individuals using this beverage throughout life, including in old age. Cognitive impairment is a common manifestation during aging. There are conflicting reports on the ability of some ayahuasca compounds to exert neuroprotective or neurotoxic effects that could improve or impair learning and memory. Animal models provide a relevant and accessible means of investigating the behavioral effects of ayahuasca without the environmental conditions associated with the ritualistic use of the beverage. In this study, we investigated the influence of chronic ayahuasca exposure throughout aging on the spatial reference and habituation memories of mice. Twenty-eight male c57bl/6 mice (6 months old) received ayahuasca or water (1.5 mL/kg, orally) twice a week for 12 months and were tested in the Morris water maze (MWM), open field and elevated plus maze (EPM) tasks before and after treatment. During aging, there was significant impairment in the evocation (but not acquisition) of spatial reference memory and in habituation to the open field. There was also a decrease in locomotor activity in the open field and EPM tests, whereas the anxiety parameters were unaltered. Ayahuasca treatment did not alter any of these parameters associated with aging. These findings indicate that chronic exposure to ayahuasca during aging did not affect memory in mice. PMID:28591380

Memory hierarchy using row-based compression

DOEpatents

Loh, Gabriel H.; O'Connor, James M.

2016-10-25

A system includes a first memory and a device coupleable to the first memory. The device includes a second memory to cache data from the first memory. The second memory includes a plurality of rows, each row including a corresponding set of compressed data blocks of non-uniform sizes and a corresponding set of tag blocks. Each tag block represents a corresponding compressed data block of the row. The device further includes decompression logic to decompress data blocks accessed from the second memory. The device further includes compression logic to compress data blocks to be stored in the second memory.

Schedulers with load-store queue awareness

DOE Office of Scientific and Technical Information (OSTI.GOV)

Chen, Tong; Eichenberger, Alexandre E.; Jacob, Arpith C.

2017-02-07

In one embodiment, a computer-implemented method includes tracking a size of a load-store queue (LSQ) during compile time of a program. The size of the LSQ is time-varying and indicates how many memory access instructions of the program are on the LSQ. The method further includes scheduling, by a computer processor, a plurality of memory access instructions of the program based on the size of the LSQ.

Schedulers with load-store queue awareness

DOE Office of Scientific and Technical Information (OSTI.GOV)

Chen, Tong; Eichenberger, Alexandre E.; Jacob, Arpith C.

2017-01-24

In one embodiment, a computer-implemented method includes tracking a size of a load-store queue (LSQ) during compile time of a program. The size of the LSQ is time-varying and indicates how many memory access instructions of the program are on the LSQ. The method further includes scheduling, by a computer processor, a plurality of memory access instructions of the program based on the size of the LSQ.

Temperature dependent characteristics of the random telegraph noise on contact resistive random access memory

NASA Astrophysics Data System (ADS)

Chang, Liang-Shun; Lin, Chrong Jung; King, Ya-Chin

2014-01-01

The temperature dependent characteristics of the random telegraphic noise (RTN) on contact resistive random access memory (CRRAM) are studied in this work. In addition to the bi-level switching, the occurrences of the middle states in the RTN signal are investigated. Based on the unique its temperature dependent characteristics, a new temperature sensing scheme is proposed for applications in ultra-low power sensor modules.

A simple GPU-accelerated two-dimensional MUSCL-Hancock solver for ideal magnetohydrodynamics

NASA Astrophysics Data System (ADS)

Bard, Christopher M.; Dorelli, John C.

2014-02-01

We describe our experience using NVIDIA's CUDA (Compute Unified Device Architecture) C programming environment to implement a two-dimensional second-order MUSCL-Hancock ideal magnetohydrodynamics (MHD) solver on a GTX 480 Graphics Processing Unit (GPU). Taking a simple approach in which the MHD variables are stored exclusively in the global memory of the GTX 480 and accessed in a cache-friendly manner (without further optimizing memory access by, for example, staging data in the GPU's faster shared memory), we achieved a maximum speed-up of ≈126 for a 10242 grid relative to the sequential C code running on a single Intel Nehalem (2.8 GHz) core. This speedup is consistent with simple estimates based on the known floating point performance, memory throughput and parallel processing capacity of the GTX 480.

Overgeneral Autobiographical Memory and Traumatic Events: An Evaluative Review

ERIC Educational Resources Information Center

Moore, Sally A.; Zoellner, Lori A.

2007-01-01

Does trauma exposure impair retrieval of autobiographical memories? Many theorists have suggested that the reduced ability to access specific memories of life events, termed overgenerality, is a protective mechanism helping attenuate painful emotions associated with trauma. The authors addressed this question by reviewing 24 studies that assessed…

Working Memory Underpins Cognitive Development, Learning, and Education

ERIC Educational Resources Information Center

Cowan, Nelson

2014-01-01

Working memory is the retention of a small amount of information in a readily accessible form. It facilitates planning, comprehension, reasoning, and problem solving. I examine the historical roots and conceptual development of the concept and the theoretical and practical implications of current debates about working memory mechanisms. Then, I…

Library API for Z-Order Memory Layout

DOE Office of Scientific and Technical Information (OSTI.GOV)

Bethel, E. Wes

This library provides a simple-to-use API for implementing an altnerative to traditional row-major order in-memory layout, one based on a Morton- order space filling curve (SFC) , specifically, a Z-order variant of the Morton order curve. The library enables programmers to, after a simple initialization step, to convert a multidimensional array from row-major to Z- order layouts, then use a single, generic API call to access data from any arbitrary (i,j,k) location from within the array, whether it it be stored in row- major or z-order format. The motivation for using a SFC in-memory layout is for improved spatial locality,more » which results in increased use of local high speed cache memory. The basic idea is that with row-major order layouts, a data access to some location that is nearby in index space is likely far away in physical memory, resulting in poor spatial locality and slow runtime. On the other hand, with a SFC-based layout, accesses that are nearby in index space are much more likely to also be nearby in physical memory, resulting in much better spatial locality, and better runtime performance. Numerous studies over the years have shown significant runtime performance gains are realized by using a SFC-based memory layout compared to a row-major layout, sometimes by as much as 50%, which result from the better use of the memory and cache hierarchy that are attendant with a SFC-based layout (see, for example, [Beth2012]). This library implementation is intended for use with codes that work with structured, array-based data in 2 or 3 dimensions. It is not appropriate for use with unstructured or point-based data.« less

Dementia - what to ask your doctor

MedlinePlus

... recs.pdf . Accessed December 8, 2016. Budson AE, Solomon PR. Life adjustments for memory loss, Alzheimer's disease, and dementia. In: Budson AE, Solomon PR, eds. Memory Loss, Alzheimer's Disease, and Dementia: ...

Dementia - keeping safe in the home

MedlinePlus

... recs.pdf . Accessed June 27, 2016. Budson AE, Solomon PR. Life adjustments for memory loss, Alzheimer's disease, and dementia. In: Budson AE, Solomon PR, eds. Memory Loss, Alzheimer's Disease, and Dementia: ...

Behavioral assays with mouse models of Alzheimer’s disease: practical considerations and guidelines

PubMed Central

Puzzo, Daniela; Lee, Linda; Palmeri, Agostino; Calabrese, Giorgio; Arancio, Ottavio

2014-01-01

In Alzheimer’s disease (AD) basic research and drug discovery, mouse models are essential resources for uncovering biological mechanisms, validating molecular targets and screening potential compounds. Both transgenic and non-genetically modified mouse models enable access to different types of AD-like pathology in vivo. Although there is a wealth of genetic and biochemical studies on proposed AD pathogenic pathways, as a disease that centrally features cognitive failure, the ultimate readout for any interventions should be measures of learning and memory. This is particularly important given the lack of knowledge on disease etiology – assessment by cognitive assays offers the advantage of targeting relevant memory systems without requiring assumptions about pathogenesis. A multitude of behavioral assays are available for assessing cognitive functioning in mouse models, including ones specific for hippocampal-dependent learning and memory. Here we review the basics of available transgenic and non-transgenic AD mouse models and detail three well-established behavioral tasks commonly used for testing hippocampal-dependent cognition in mice – contextual fear conditioning, radial arm water maze and Morris water maze. In particular, we discuss the practical considerations, requirements and caveats of these behavioral testing paradigms. PMID:24462904

Hormones and the hippocampus.

PubMed

Lathe, R

2001-05-01

Hippocampal lesions produce memory deficits, but the exact function of the hippocampus remains obscure. Evidence is presented that its role in memory may be ancillary to physiological regulation. Molecular studies demonstrate that the hippocampus is a primary target for ligands that reflect body physiology, including ion balance and blood pressure, immunity, pain, reproductive status, satiety and stress. Hippocampal receptors are functional, probably accessible to their ligands, and mediate physiological and cognitive changes. This argues that an early role of the hippocampus may have been in sensing soluble molecules (termed here 'enteroception') in blood and cerebrospinal fluid, perhaps reflecting a common evolutionary origin with the olfactory system ('exteroception'). Functionally, hippocampal enteroception may reflect feedback control; evidence is reviewed that the hippocampus modulates body physiology, including the activity of the hypothalamus-pituitary-adrenal axis, blood pressure, immunity, and reproductive function. It is suggested that the hippocampus operates, in parallel with the amygdala, to modulate body physiology in response to cognitive stimuli. Hippocampal outputs are predominantly inhibitory on downstream neuroendocrine activity; increased synaptic efficacy in the hippocampus (e.g. long-term potentiation) could facilitate throughput inhibition. This may have implications for the role of the hippocampus and long-term potentiation in memory.

Building Intrusion Detection with a Wireless Sensor Network

NASA Astrophysics Data System (ADS)

Wälchli, Markus; Braun, Torsten

This paper addresses the detection and reporting of abnormal building access with a wireless sensor network. A common office room, offering space for two working persons, has been monitored with ten sensor nodes and a base station. The task of the system is to report suspicious office occupation such as office searching by thieves. On the other hand, normal office occupation should not throw alarms. In order to save energy for communication, the system provides all nodes with some adaptive short-term memory. Thus, a set of sensor activation patterns can be temporarily learned. The local memory is implemented as an Adaptive Resonance Theory (ART) neural network. Unknown event patterns detected on sensor node level are reported to the base station, where the system-wide anomaly detection is performed. The anomaly detector is lightweight and completely self-learning. The system can be run autonomously or it could be used as a triggering system to turn on an additional high-resolution system on demand. Our building monitoring system has proven to work reliably in different evaluated scenarios. Communication costs of up to 90% could be saved compared to a threshold-based approach without local memory.

Insights from child development on the relationship between episodic and semantic memory.

PubMed

Robertson, Erin K; Köhler, Stefan

2007-11-05

The present study was motivated by a recent controversy in the neuropsychological literature on semantic dementia as to whether episodic encoding requires semantic processing or whether it can proceed solely based on perceptual processing. We addressed this issue by examining the effect of age-related limitations in semantic competency on episodic memory in 4-6-year-old children (n=67). We administered three different forced-choice recognition memory tests for pictures previously encountered in a single study episode. The tests varied in the degree to which access to semantically encoded information was required at retrieval. Semantic competency predicted recognition performance regardless of whether access to semantic information was required. A direct relation between picture naming at encoding and subsequent recognition was also found for all tests. Our findings emphasize the importance of semantic encoding processes even in retrieval situations that purportedly do not require access to semantic information. They also highlight the importance of testing neuropsychological models of memory in different populations, healthy and brain damaged, at both ends of the developmental continuum.

How Distinctive Processing Enhances Hits and Reduces False Alarms

PubMed Central

Hunt, R. Reed; Smith, Rebekah E.

2015-01-01

Distinctive processing is a concept designed to account for precision in memory, both correct responses and avoidance of errors. The principal question addressed in two experiments is how distinctive processing of studied material reduces false alarms to familiar distractors. Jacoby (Jacoby, Kelley, & McElree, 1999) has used the metaphors early selection and late correction to describe two different types of control processes. Early selection refers to limitations on access whereas late correction describes controlled monitoring of accessed information. The two types of processes are not mutually exclusive, and previous research has provided evidence for the operation of both. The data reported here extend previous work to a criterial recollection paradigm and to a recognition memory test. The results of both experiments show that variables that reduce false memory for highly familiar distracters continue to exert their effect under conditions of minimal post-access monitoring. Level of monitoring was reduced in the first experiment through test instructions and in the second experiment through speeded test responding. The results were consistent with the conclusion that both early selection and late correction operate to control accuracy in memory. PMID:26034343

Memory inhibition as a critical factor preventing creative problem solving.

PubMed

Gómez-Ariza, Carlos J; Del Prete, Francesco; Prieto Del Val, Laura; Valle, Tania; Bajo, M Teresa; Fernandez, Angel

2017-06-01

The hypothesis that reduced accessibility to relevant information can negatively affect problem solving in a remote associate test (RAT) was tested by using, immediately before the RAT, a retrieval practice procedure to hinder access to target solutions. The results of 2 experiments clearly showed that, relative to baseline, target words that had been competitors during selective retrieval were much less likely to be provided as solutions in the RAT, demonstrating that performance in the problem-solving task was strongly influenced by the predetermined accessibility status of the solutions in memory. Importantly, this was so even when participants were unaware of the relationship between the memory and the problem-solving procedures in the experiments. This finding is consistent with an inhibitory account of retrieval-induced forgetting effects and, more generally, constitutes support for the idea that the activation status of mental representations originating in a given task (e.g., episodic memory) can unwittingly have significant consequences for a different, unrelated task (e.g., problem solving). (PsycINFO Database Record (c) 2017 APA, all rights reserved).

If It Is Stored in My Memory I Will Surely Retrieve It: Anatomy of a Metacognitive Belief

ERIC Educational Resources Information Center

Kornell, Nate

2015-01-01

Retrieval failures--moments when a memory will not come to mind--are a universal human experience. Yet many laypeople believe human memory is a reliable storage system in which a stored memory should be accessible. I predicted that people would see retrieval failures as aberrations and predict that fewer retrieval failures would happen in the…

Synesthetic experiences enhance unconscious learning.

PubMed

Rothen, Nicolas; Scott, Ryan B; Mealor, Andy D; Coolbear, Daniel J; Burckhardt, Vera; Ward, Jamie

2013-01-01

Synesthesia  is characterized  by consistent extra perceptual experiences in response to normal sensory input. Recent studies provide evidence for a specific profile of enhanced memory performance in synesthesia, but focus exclusively on explicit memory paradigms for which the learned content is consciously accessible. In this study, for the first time, we demonstrate with an implicit memory paradigm that synesthetic experiences also enhance memory performance relating to unconscious knowledge.

Unstructured Adaptive Meshes: Bad for Your Memory?

NASA Technical Reports Server (NTRS)

Biswas, Rupak; Feng, Hui-Yu; VanderWijngaart, Rob

2003-01-01

This viewgraph presentation explores the need for a NASA Advanced Supercomputing (NAS) parallel benchmark for problems with irregular dynamical memory access. This benchmark is important and necessary because: 1) Problems with localized error source benefit from adaptive nonuniform meshes; 2) Certain machines perform poorly on such problems; 3) Parallel implementation may provide further performance improvement but is difficult. Some examples of problems which use irregular dynamical memory access include: 1) Heat transfer problem; 2) Heat source term; 3) Spectral element method; 4) Base functions; 5) Elemental discrete equations; 6) Global discrete equations. Nonconforming Mesh and Mortar Element Method are covered in greater detail in this presentation.

Integrated, nonvolatile, high-speed analog random access memory

NASA Technical Reports Server (NTRS)

Katti, Romney R. (Inventor); Wu, Jiin-Chuan (Inventor); Stadler, Henry L. (Inventor)

1994-01-01

This invention provides an integrated, non-volatile, high-speed random access memory. A magnetically switchable ferromagnetic or ferrimagnetic layer is sandwiched between an electrical conductor which provides the ability to magnetize the magnetically switchable layer and a magneto resistive or Hall effect material which allows sensing the magnetic field which emanates from the magnetization of the magnetically switchable layer. By using this integrated three-layer form, the writing process, which is controlled by the conductor, is separated from the storage medium in the magnetic layer and from the readback process which is controlled by the magnetoresistive layer. A circuit for implementing the memory in CMOS or the like is disclosed.

Optical memory development. Volume 2: Gain-assisted holographic storage media

NASA Technical Reports Server (NTRS)

Gange, R. A.; Mezrich, R. S.

1972-01-01

Thin deformable films were investigated for use as the storage medium in a holographic optical memory. The research was directed toward solving the problems of material fatigue, selective heat addressing, electrical charging of the film surface and charge patterning by light. A number of solutions to these problems were found but the main conclusion to be drawn from the work is that deformable media which employ heat in the recording process are not satisfactory for use in a high-speed random-access read/write holographic memory. They are, however, a viable approach in applications where either high speed or random-access is not required.

Ferroelectric tunneling element and memory applications which utilize the tunneling element

DOEpatents

Kalinin, Sergei V [Knoxville, TN; Christen, Hans M [Knoxville, TN; Baddorf, Arthur P [Knoxville, TN; Meunier, Vincent [Knoxville, TN; Lee, Ho Nyung [Oak Ridge, TN

2010-07-20

A tunneling element includes a thin film layer of ferroelectric material and a pair of dissimilar electrically-conductive layers disposed on opposite sides of the ferroelectric layer. Because of the dissimilarity in composition or construction between the electrically-conductive layers, the electron transport behavior of the electrically-conductive layers is polarization dependent when the tunneling element is below the Curie temperature of the layer of ferroelectric material. The element can be used as a basis of compact 1R type non-volatile random access memory (RAM). The advantages include extremely simple architecture, ultimate scalability and fast access times generic for all ferroelectric memories.

Kanerva's sparse distributed memory: An associative memory algorithm well-suited to the Connection Machine

NASA Technical Reports Server (NTRS)

Rogers, David

1988-01-01

The advent of the Connection Machine profoundly changes the world of supercomputers. The highly nontraditional architecture makes possible the exploration of algorithms that were impractical for standard Von Neumann architectures. Sparse distributed memory (SDM) is an example of such an algorithm. Sparse distributed memory is a particularly simple and elegant formulation for an associative memory. The foundations for sparse distributed memory are described, and some simple examples of using the memory are presented. The relationship of sparse distributed memory to three important computational systems is shown: random-access memory, neural networks, and the cerebellum of the brain. Finally, the implementation of the algorithm for sparse distributed memory on the Connection Machine is discussed.

Effects of Information Access Cost and Accountability on Medical Residents' Information Retrieval Strategy and Performance During Prehandover Preparation: Evidence From Interview and Simulation Study.

PubMed

Yang, X Jessie; Wickens, Christopher D; Park, Taezoon; Fong, Liesel; Siah, Kewin T H

2015-12-01

We aimed to examine the effects of information access cost and accountability on medical residents' information retrieval strategy and performance during prehandover preparation. Prior studies observing doctors' prehandover practices witnessed the use of memory-intensive strategies when retrieving patient information. These strategies impose potential threats to patient safety as human memory is prone to errors. Of interest in this work are the underlying determinants of information retrieval strategy and the potential impacts on medical residents' information preparation performance. A two-step research approach was adopted, consisting of semistructured interviews with 21 medical residents and a simulation-based experiment with 32 medical residents. The semistructured interviews revealed that a substantial portion of medical residents (38%) relied largely on memory for preparing handover information. The simulation-based experiment showed that higher information access cost reduced information access attempts and access duration on patient documents and harmed information preparation performance. Higher accountability led to marginally longer access to patient documents. It is important to understand the underlying determinants of medical residents' information retrieval strategy and performance during prehandover preparation. We noted the criticality of easy access to patient documents in prehandover preparation. In addition, accountability marginally influenced medical residents' information retrieval strategy. Findings from this research suggested that the cost of accessing information sources should be minimized in developing handover preparation tools. © 2015, Human Factors and Ergonomics Society.

Fast maximum intensity projections of large medical data sets by exploiting hierarchical memory architectures.

PubMed

Kiefer, Gundolf; Lehmann, Helko; Weese, Jürgen

2006-04-01

Maximum intensity projections (MIPs) are an important visualization technique for angiographic data sets. Efficient data inspection requires frame rates of at least five frames per second at preserved image quality. Despite the advances in computer technology, this task remains a challenge. On the one hand, the sizes of computed tomography and magnetic resonance images are increasing rapidly. On the other hand, rendering algorithms do not automatically benefit from the advances in processor technology, especially for large data sets. This is due to the faster evolving processing power and the slower evolving memory access speed, which is bridged by hierarchical cache memory architectures. In this paper, we investigate memory access optimization methods and use them for generating MIPs on general-purpose central processing units (CPUs) and graphics processing units (GPUs), respectively. These methods can work on any level of the memory hierarchy, and we show that properly combined methods can optimize memory access on multiple levels of the hierarchy at the same time. We present performance measurements to compare different algorithm variants and illustrate the influence of the respective techniques. On current hardware, the efficient handling of the memory hierarchy for CPUs improves the rendering performance by a factor of 3 to 4. On GPUs, we observed that the effect is even larger, especially for large data sets. The methods can easily be adjusted to different hardware specifics, although their impact can vary considerably. They can also be used for other rendering techniques than MIPs, and their use for more general image processing task could be investigated in the future.

Encoding and retrieval processes involved in the access of source information in the absence of item memory.

PubMed

Ball, B Hunter; DeWitt, Michael R; Knight, Justin B; Hicks, Jason L

2014-09-01

The current study sought to examine the relative contributions of encoding and retrieval processes in accessing contextual information in the absence of item memory using an extralist cuing procedure in which the retrieval cues used to query memory for contextual information were related to the target item but never actually studied. In Experiments 1 and 2, participants studied 1 category member (e.g., onion) from a variety of different categories and at test were presented with an unstudied category label (e.g., vegetable) to probe memory for item and source information. In Experiments 3 and 4, 1 member of unidirectional (e.g., credit or card) or bidirectional (e.g., salt or pepper) associates was studied, whereas the other unstudied member served as a test probe. When recall failed, source information was accessible only when items were processed deeply during encoding (Experiments 1 and 2) and when there was strong forward associative strength between the retrieval cue and target (Experiments 3 and 4). These findings suggest that a retrieval probe diagnostic of semantically related item information reinstantiates information bound in memory during encoding that results in reactivation of associated contextual information, contingent upon sufficient learning of the item itself and the association between the item and its context information.

ImgLib2--generic image processing in Java.

PubMed

Pietzsch, Tobias; Preibisch, Stephan; Tomancák, Pavel; Saalfeld, Stephan

2012-11-15

ImgLib2 is an open-source Java library for n-dimensional data representation and manipulation with focus on image processing. It aims at minimizing code duplication by cleanly separating pixel-algebra, data access and data representation in memory. Algorithms can be implemented for classes of pixel types and generic access patterns by which they become independent of the specific dimensionality, pixel type and data representation. ImgLib2 illustrates that an elegant high-level programming interface can be achieved without sacrificing performance. It provides efficient implementations of common data types, storage layouts and algorithms. It is the data model underlying ImageJ2, the KNIME Image Processing toolbox and an increasing number of Fiji-Plugins. ImgLib2 is licensed under BSD. Documentation and source code are available at http://imglib2.net and in a public repository at https://github.com/imagej/imglib. Supplementary data are available at Bioinformatics Online. saalfeld@mpi-cbg.de

Structurally Integrated Versus Structurally Segregated Memory Representations: Implications for the Design of Instructional Materials.

ERIC Educational Resources Information Center

Hayes-Roth, Barbara

Two kinds of memory organization are distinguished: segregrated versus integrated. In segregated memory organizations, related learned propositions have separate memory representations. In integrated memory organizations, memory representations of related propositions share common subrepresentations. Segregated memory organizations facilitate…

ACCESS: A Communicating and Cooperating Expert Systems System.

DTIC Science & Technology

1988-01-31

therefore more quickly accepted by programmers. This is in part due to the already familiar concepts of multi-processing environments (e.g. semaphores ...Di68] and monitors [Br75]) which can be viewed as a special case of synchronized shared memory models [Di6S]. Heterogeneous systems however, are by...locality of nodes is not possible and frequent access of memory is required. Synchronization of processes also suffers from a loss of efficiency in

Constraints on Access: Costs and Benefits (Spontaneous Memory for Relevant Experiences)

DTIC Science & Technology

1989-05-01

F. I. M. Craik (Eds.), Levels of processing and human memory. Hillsdale, NJ: Erlbaum. Dewey, J. (1963). How we think. Portions published in R. M...transfer. Pictures (vs. words) and levels of processing and elaborative encoding manipulations are shown to affect directed access but are found to have...includes most 5 6 list-learning experiments, research on schema/script abstraction, and studies of remembering which might manipulate levels of processing

Transfers and Enhancements of the Teleconferencing System and Support of the Special Operations Planning Aids

DTIC Science & Technology

1984-10-31

five colors , page forward, page back, erase, clear the page, store previously annotated material, and later retrieve it. From this developed a four...system to secure sites. These * enchancements are discussed below. -2- .7- -. . . --. J -. . . . .. . . . . . . . ..- . _77 . -.- 2.1 Enhancements to the...and large cache memory of the Winchester drive allows the SGWS software to run much faster when doing file access or direct memory access (DMA) than

Activating representations in permanent memory: different benefits for pictures and words.

PubMed

Seifert, L S

1997-09-01

Previous research has suggested that pictures have privileged access to semantic memory (W. R. Glaser, 1992), but J. Theios and P. C. Amrhein (1989b) argued that prior studies inappropriately used large pictures and small words. In Experiment 1, participants categorized pictures reliably faster than words, even when both types of items were of optimal perceptual size. In Experiment 2, a poststimulus flashmask and judgments about internal features did not eliminate picture superiority, indicating that it was not due to differences in early visual processing or analysis of visible features. In Experiment 3, when participants made judgments about whether items were related, latencies were reliably faster for categorically related pictures than for words, but there was no picture advantage for noncategorically associated items. Results indicate that pictures have privileged access to semantic memory for categories, but that neither pictures nor words seem to have privileged access to noncategorical associations.

Implementation of Ferroelectric Memories for Space Applications

NASA Technical Reports Server (NTRS)

Philpy, Stephen C.; Derbenwick, Gary F.; Kamp, David A.; Isaacson, Alan F.

2000-01-01

Ferroelectric random access semiconductor memories (FeRAMs) are an ideal nonvolatile solution for space applications. These memories have low power performance, high endurance and fast write times. By combining commercial ferroelectric memory technology with radiation hardened CMOS technology, nonvolatile semiconductor memories for space applications can be attained. Of the few radiation hardened semiconductor manufacturers, none have embraced the development of radiation hardened FeRAMs, due a limited commercial space market and funding limitations. Government funding may be necessary to assure the development of radiation hardened ferroelectric memories for space applications.

The Role of Inhibition in Age-related Off-Topic Verbosity: Not Access but Deletion and Restraint Functions.

PubMed

Yin, Shufei; Peng, Huamao

2016-01-01

The speech of older adults is commonly described as verbose and off-topic, which is thought to influence their social communication. This study investigated the role of inhibition in age-related off-topic verbosity (OTV). Inhibition consists of three functions: access, deletion, and restraint. The access function is responsible for preventing irrelevant information from accessing the attention center (pre-mechanism of inhibition); The deletion function is responsible for deleting previously relevant but currently irrelevant information from working memory, and the restraint function is responsible for restraining strong but inappropriate responses (post-mechanisms of inhibition). A referential communication task was used to determine whether OTV was influenced by the pre-mechanism of inhibition. A self-involved event interview task was used to investigate the effect of the post-mechanisms of inhibition on OTV. Results showed that the OTV of the elderly participants was associated with an age-related decline in the post-mechanisms of inhibition, while the OTV exhibited by young adults was most likely due to deficits in the pre-mechanism function of inhibition. This research contributed to fill gaps in the existing knowledge about the potential relationship between specific functions of inhibition and age-related OTV.

Taxing Working Memory during Retrieval of Emotional Memories Does Not Reduce Memory Accessibility When Cued with Reminders

PubMed Central

van Schie, Kevin; Engelhard, Iris M.; van den Hout, Marcel A.

2015-01-01

Earlier studies have shown that when individuals recall an emotional memory while simultaneously doing a demanding dual-task [e.g., playing Tetris, mental arithmetic, making eye movements (EM)], this reduces self-reported vividness and emotionality of the memory. These effects have been found up to 1 week later, but have largely been confined to self-report ratings. This study examined whether this dual-tasking intervention reduces memory performance (i.e., accessibility of emotional memories). Undergraduates (N = 60) studied word-image pairs and rated the retrieved image on vividness and emotionality when cued with the word. Then they viewed the cues and recalled the images with or without making EM. Finally, they re-rated the images on vividness and emotionality. Additionally, fragments from images from all conditions were presented and participants identified which fragment was paired earlier with which cue. Findings showed no effect of the dual-task manipulation on self-reported ratings and latency responses. Several possible explanations for the lack of effects are discussed, but the cued recall procedure in our experiment seems to explain the absence of effects best. The study demonstrates boundaries to the effects of the “dual-tasking” procedure. PMID:25729370

Left Ventrolateral Prefrontal Cortex and the Cognitive Control of Memory

ERIC Educational Resources Information Center

Badre, David; Wagner, Anthony D.

2007-01-01

Cognitive control mechanisms permit memory to be accessed strategically, and so aid in bringing knowledge to mind that is relevant to current goals and actions. In this review, we consider the contribution of left ventrolateral prefrontal cortex (VLPFC) to the cognitive control of memory. Reviewed evidence supports a two-process model of mnemonic…

Patterns of Autobiographical Memory in Adults with Autism Spectrum Disorder

ERIC Educational Resources Information Center

Crane, Laura; Pring, Linda; Jukes, Kaylee; Goddard, Lorna

2012-01-01

Two studies are presented that explored the effects of experimental manipulations on the quality and accessibility of autobiographical memories in adults with autism spectrum disorder (ASD), relative to a typical comparison group matched for age, gender and IQ. Both studies found that the adults with ASD generated fewer specific memories than the…

Ames Lab 101: Ultrafast Magnetic Switching

ScienceCinema

Wang; Jigang

2018-01-01

Ames Laboratory physicists have found a new way to switch magnetism that is at least 1000 times faster than currently used in magnetic memory technologies. Magnetic switching is used to encode information in hard drives, magnetic random access memory and other computing devices. The discovery potentially opens the door to terahertz and faster memory speeds.

Memory for Recently Accessed Visual Attributes

ERIC Educational Resources Information Center

Jiang, Yuhong V.; Shupe, Joshua M.; Swallow, Khena M.; Tan, Deborah H.

2016-01-01

Recent reports have suggested that the attended features of an item may be rapidly forgotten once they are no longer relevant for an ongoing task (attribute amnesia). This finding relies on a surprise memory procedure that places high demands on declarative memory. We used intertrial priming to examine whether the representation of an item's…

Episodic and Semantic Memory Influences on Picture Naming in Alzheimer's Disease

ERIC Educational Resources Information Center

Small, Jeff A.; Sandhu, Nirmaljeet

2008-01-01

This study investigated the relationship between semantic and episodic memory as they support lexical access by healthy younger and older adults and individuals with Alzheimer's disease (AD). In particular, we were interested in examining the pattern of semantic and episodic memory declines in AD (i.e., word-finding difficulty and impaired recent…

Hemispheric Differences in the Organization of Memory for Text Ideas

ERIC Educational Resources Information Center

Long, Debra L.; Johns, Clinton L.; Jonathan, Eunike

2012-01-01

The goal of this study was to examine hemispheric asymmetries in episodic memory for discourse. Access to previously comprehended information is essential for mapping incoming information to representations of "who did what to whom" in memory. An item-priming-in-recognition paradigm was used to examine differences in how the hemispheres represent…

Individual Differences in the Effects of Retrieval from Long-Term Memory

ERIC Educational Resources Information Center

Brewer, Gene A.; Unsworth, Nash

2012-01-01

The current study examined individual differences in the effects of retrieval from long-term memory (i.e., the testing effect). The effects of retrieving from memory make tested information more accessible for future retrieval attempts. Despite the broad applied ramifications of such a potent memorization technique there is a paucity of research…

Semantic Memory and Verbal Working Memory Correlates of N400 to Subordinate Homographs

ERIC Educational Resources Information Center

Salisbury, Dean F.

2004-01-01

N400 is an event-related brain potential that indexes operations in semantic memory conceptual space, whether elicited by language or some other representation (e.g., drawings). Language models typically propose three stages: lexical access or orthographic- and phonological-level analysis; lexical selection or word-level meaning and associate…

A Neuroanatomical Model of Prefrontal Inhibitory Modulation of Memory Retrieval

PubMed Central

Depue, Brendan E.

2012-01-01

Memory of past experience is essential for guiding goal-related behavior. Being able to control accessibility of memory through modulation of retrieval enables humans to flexibly adapt to their environment. Understanding the specific neural pathways of how this control is achieved has largely eluded cognitive neuroscience. Accordingly, in the current paper I review literature that examines the overt control over retrieval in order to reduce accessibility. I first introduce three hypotheses of inhibition of retrieval. These hypotheses involve: i) attending to other stimuli as a form of diversionary attention, ii) inhibiting the specific individual neural representation of the memory, and iii) inhibiting the hippocampus and retrieval process more generally to prevent reactivation of the representation. I then analyze literature taken from the White Bear Suppression, Directed Forgetting and Think/No-Think tasks to provide evidence for these hypotheses. Finally, a neuroanatomical model is developed to indicate three pathways from PFC to the hippocampal complex that support inhibition of memory retrieval. Describing these neural pathways increases our understanding of control over memory in general. PMID:22374224

Activation and binding in verbal working memory: a dual-process model for the recognition of nonwords.

PubMed

Oberauer, Klaus; Lange, Elke B

2009-02-01

The article presents a mathematical model of short-term recognition based on dual-process models and the three-component theory of working memory [Oberauer, K. (2002). Access to information in working memory: Exploring the focus of attention. Journal of Experimental Psychology: Learning, Memory, and Cognition, 28, 411-421]. Familiarity arises from activated representations in long-term memory, ignoring their relations; recollection retrieves bindings in the capacity-limited component of working memory. In three experiments participants encoded two short lists of nonwords for immediate recognition, one of which was then cued as irrelevant. Probes from the irrelevant list were rejected more slowly than new probes; this was also found with probes recombining letters of irrelevant nonwords, suggesting that familiarity arises from individual letters independent of their relations. When asked to accept probes whose letters were all in the relevant list, regardless of their conjunction, participants accepted probes preserving the original conjunctions faster than recombinations, showing that recollection accessed feature bindings automatically. The model fit the data best when familiarity depended only on matching letters, whereas recollection used binding information.

Soft-error tolerance and energy consumption evaluation of embedded computer with magnetic random access memory in practical systems using computer simulations

NASA Astrophysics Data System (ADS)

Nebashi, Ryusuke; Sakimura, Noboru; Sugibayashi, Tadahiko

2017-08-01

We evaluated the soft-error tolerance and energy consumption of an embedded computer with magnetic random access memory (MRAM) using two computer simulators. One is a central processing unit (CPU) simulator of a typical embedded computer system. We simulated the radiation-induced single-event-upset (SEU) probability in a spin-transfer-torque MRAM cell and also the failure rate of a typical embedded computer due to its main memory SEU error. The other is a delay tolerant network (DTN) system simulator. It simulates the power dissipation of wireless sensor network nodes of the system using a revised CPU simulator and a network simulator. We demonstrated that the SEU effect on the embedded computer with 1 Gbit MRAM-based working memory is less than 1 failure in time (FIT). We also demonstrated that the energy consumption of the DTN sensor node with MRAM-based working memory can be reduced to 1/11. These results indicate that MRAM-based working memory enhances the disaster tolerance of embedded computers.

Early-life sugar consumption has long-term negative effects on memory function in male rats.

PubMed

Noble, Emily E; Hsu, Ted M; Liang, Joanna; Kanoski, Scott E

2017-09-25

Added dietary sugars contribute substantially to the diet of children and adolescents in the USA, and recent evidence suggests that consuming sugar-sweetened beverages (SSBs) during early life has deleterious effects on hippocampal-dependent memory function. Here, we test whether the effects of early-life sugar consumption on hippocampal function persist into adulthood when access to sugar is restricted to the juvenile/adolescent phase of development. Male rats were given ad libitum access to an 11% weight-by-volume sugar solution (made with high fructose corn syrup-55) throughout the adolescent phase of development (post-natal day (PN) 26-56). The control group received a second bottle of water instead, and both groups received ad libitum standard laboratory chow and water access throughout the study. At PN 56 sugar solutions were removed and at PN 175 rats were subjected to behavioral testing for hippocampal-dependent episodic contextual memory in the novel object in context (NOIC) task, for anxiety-like behavior in the Zero maze, and were given an intraperitoneal glucose tolerance test. Early-life exposure to SSBs conferred long-lasting impairments in hippocampal-dependent memory function later in life- yet had no effect on body weight, anxiety-like behavior, or glucose tolerance. A second experiment demonstrated that NOIC performance was impaired at PN 175 even when SSB access was limited to 2 hours daily from PN 26-56. Our data suggest that even modest SSB consumption throughout early life may have long-term negative consequences on memory function during adulthood.

Memory access in shared virtual memory

DOE Office of Scientific and Technical Information (OSTI.GOV)

Berrendorf, R.

1992-01-01

Shared virtual memory (SVM) is a virtual memory layer with a single address space on top of a distributed real memory on parallel computers. We examine the behavior and performance of SVM running a parallel program with medium-grained, loop-level parallelism on top of it. A simulator for the underlying parallel architecture can be used to examine the behavior of SVM more deeply. The influence of several parameters, such as the number of processors, page size, cold or warm start, and restricted page replication, is studied.

Memory access in shared virtual memory

DOE Office of Scientific and Technical Information (OSTI.GOV)

Berrendorf, R.

1992-09-01

Shared virtual memory (SVM) is a virtual memory layer with a single address space on top of a distributed real memory on parallel computers. We examine the behavior and performance of SVM running a parallel program with medium-grained, loop-level parallelism on top of it. A simulator for the underlying parallel architecture can be used to examine the behavior of SVM more deeply. The influence of several parameters, such as the number of processors, page size, cold or warm start, and restricted page replication, is studied.

Non-Volatile Memory Technology Symposium 2001: Proceedings

NASA Technical Reports Server (NTRS)

Aranki, Nazeeh; Daud, Taher; Strauss, Karl

2001-01-01

This publication contains the proceedings for the Non-Volatile Memory Technology Symposium 2001 that was held on November 7-8, 2001 in San Diego, CA. The proceedings contains a a wide range of papers that cover current and new memory technologies including Flash memories, Magnetic Random Access Memories (MRAM and GMRAM), Ferro-electric RAM (FeRAM), and Chalcogenide RAM (CRAM). The papers presented in the proceedings address the use of these technologies for space applications as well as radiation effects and packaging issues.

A Concept of Corporate Memory

DTIC Science & Technology

1979-05-17

34 social memory", in the broader context of society. This paper explores some of the possibilities of creating a computer based corporate memory...NUMBER 79-04-03 2. COVT ACCESSION NO. 3. RECIPIENT’S CATALOG NUMBER «. TITLE f«n<* SubfU/.; A CONCEPT OF- CORPORATE MEMORY S. TYPE OF...It. SUPPLEMENTARY NOTES • IJ. KEY WORDS fCon<Jnu» on r»r»r»» mid* It nmcammmrj and Idmntltr bf block numbmr) corporate memory, office

Artificial intelligence applications of fast optical memory access

NASA Astrophysics Data System (ADS)

Henshaw, P. D.; Todtenkopf, A. B.

The operating principles and performance of rapid laser beam-steering (LBS) techniques are reviewed and illustrated with diagrams; their applicability to fast optical-memory (disk) access is evaluated; and the implications of fast access for the design of expert systems are discussed. LBS methods examined include analog deflection (source motion, wavefront tilt, and phased arrays), digital deflection (polarization modulation, reflectivity modulation, interferometric switching, and waveguide deflection), and photorefractive LBS. The disk-access problem is considered, and typical LBS requirements are listed as 38,000 beam positions, rotational latency 25 ms, one-sector rotation time 1.5 ms, and intersector space 87 microsec. The value of rapid access for increasing the power of expert systems (by permitting better organization of blocks of information) is illustrated by summarizing the learning process of the MVP-FORTH system (Park, 1983).

Performance of Compiler-Assisted Memory Safety Checking

DTIC Science & Technology

2014-08-01

software developer has in mind a particular object to which the pointer should point, the intended referent. A memory access error occurs when an ac...Performance of Compiler-Assisted Memory Safety Checking David Keaton Robert C. Seacord August 2014 TECHNICAL NOTE CMU/SEI-2014-TN...based memory safety checking tool and the performance that can be achieved with two such tools whose source code is freely available. The note then

Active non-volatile memory post-processing

DOE Office of Scientific and Technical Information (OSTI.GOV)

Kannan, Sudarsun; Milojicic, Dejan S.; Talwar, Vanish

A computing node includes an active Non-Volatile Random Access Memory (NVRAM) component which includes memory and a sub-processor component. The memory is to store data chunks received from a processor core, the data chunks comprising metadata indicating a type of post-processing to be performed on data within the data chunks. The sub-processor component is to perform post-processing of said data chunks based on said metadata.

Optically Addressable, Ferroelectric Memory With NDRO

NASA Technical Reports Server (NTRS)

Thakoor, Sarita

1994-01-01

For readout, memory cells addressed via on-chip semiconductor lasers. Proposed thin-film ferroelectric memory device features nonvolatile storage, optically addressable, nondestructive readout (NDRO) with fast access, and low vulnerability to damage by ionizing radiation. Polarization switched during recording and erasure, but not during readout. As result, readout would not destroy contents of memory, and operating life in specific "read-intensive" applications increased up to estimated 10 to the 16th power cycles.

The Cognitive Bases of Intelligence Analysis.

DTIC Science & Technology

1984-01-01

the truth of a single proposition or to discriminate among several propositions. Indicators represent the potentially observable events that form the ...serves as a checklist against which to evaluate an actual Intelligance product. * If the Ideal product Is specified In sufficient detail for a particular...34 Interf’arence In accessing memory occurs for both recognition and recall. Memory retrieval is most efficient when the memories are discriminable . Memories for

Memory Loss: When to Seek Help

MedlinePlus

... a set of symptoms, including impairment in memory, reasoning, judgment, language and other thinking skills. Dementia usually ... et al. Mild cognitive impairment: Epidemiology, pathology and clinical assessment. http://www.uptodate.com/home. Accessed March ...

Context controls access to working and reference memory in the pigeon (Columba livia).

PubMed

Roberts, William A; Macpherson, Krista; Strang, Caroline

2016-01-01

The interaction between working and reference memory systems was examined under conditions in which salient contextual cues were presented during memory retrieval. Ambient colored lights (red or green) bathed the operant chamber during the presentation of comparison stimuli in delayed matching-to-sample training (working memory) and during the presentation of the comparison stimuli as S+ and S- cues in discrimination training (reference memory). Strong competition between memory systems appeared when the same contextual cue appeared during working and reference memory training. When different contextual cues were used, however, working memory was completely protected from reference memory interference. © 2016 Society for the Experimental Analysis of Behavior.

A Simple GPU-Accelerated Two-Dimensional MUSCL-Hancock Solver for Ideal Magnetohydrodynamics

NASA Technical Reports Server (NTRS)

Bard, Christopher; Dorelli, John C.

2013-01-01

We describe our experience using NVIDIA's CUDA (Compute Unified Device Architecture) C programming environment to implement a two-dimensional second-order MUSCL-Hancock ideal magnetohydrodynamics (MHD) solver on a GTX 480 Graphics Processing Unit (GPU). Taking a simple approach in which the MHD variables are stored exclusively in the global memory of the GTX 480 and accessed in a cache-friendly manner (without further optimizing memory access by, for example, staging data in the GPU's faster shared memory), we achieved a maximum speed-up of approx. = 126 for a sq 1024 grid relative to the sequential C code running on a single Intel Nehalem (2.8 GHz) core. This speedup is consistent with simple estimates based on the known floating point performance, memory throughput and parallel processing capacity of the GTX 480.

Musical Expertise Increases Top–Down Modulation Over Hippocampal Activation during Familiarity Decisions

PubMed Central

Gagnepain, Pierre; Fauvel, Baptiste; Desgranges, Béatrice; Gaubert, Malo; Viader, Fausto; Eustache, Francis; Groussard, Mathilde; Platel, Hervé

2017-01-01

The hippocampus has classically been associated with episodic memory, but is sometimes also recruited during semantic memory tasks, especially for the skilled exploration of familiar information. Cognitive control mechanisms guiding semantic memory search may benefit from the set of cognitive processes at stake during musical training. Here, we examined using functional magnetic resonance imaging, whether musical expertise would promote the top–down control of the left inferior frontal gyrus (LIFG) over the generation of hippocampally based goal-directed thoughts mediating the familiarity judgment of proverbs and musical items. Analyses of behavioral data confirmed that musical experts more efficiently access familiar melodies than non-musicians although such increased ability did not transfer to verbal semantic memory. At the brain level, musical expertise specifically enhanced the recruitment of the hippocampus during semantic access to melodies, but not proverbs. Additionally, hippocampal activation contributed to speed of access to familiar melodies, but only in musicians. Critically, causal modeling of neural dynamics between LIFG and the hippocampus further showed that top–down excitatory regulation over the hippocampus during familiarity decision specifically increases with musical expertise – an effect that generalized across melodies and proverbs. At the local level, our data show that musical expertise modulates the online recruitment of hippocampal response to serve semantic memory retrieval of familiar melodies. The reconfiguration of memory network dynamics following musical training could constitute a promising framework to understand its ability to preserve brain functions. PMID:29033805

Glucocorticoids in the prefrontal cortex enhance memory consolidation and impair working memory by a common neural mechanism

PubMed Central

Barsegyan, Areg; Mackenzie, Scott M.; Kurose, Brian D.; McGaugh, James L.; Roozendaal, Benno

2010-01-01

It is well established that acute administration of adrenocortical hormones enhances the consolidation of memories of emotional experiences and, concurrently, impairs working memory. These different glucocorticoid effects on these two memory functions have generally been considered to be independently regulated processes. Here we report that a glucocorticoid receptor agonist administered into the medial prefrontal cortex (mPFC) of male Sprague-Dawley rats both enhances memory consolidation and impairs working memory. Both memory effects are mediated by activation of a membrane-bound steroid receptor and depend on noradrenergic activity within the mPFC to increase levels of cAMP-dependent protein kinase. These findings provide direct evidence that glucocorticoid effects on both memory consolidation and working memory share a common neural influence within the mPFC. PMID:20810923

Response of the Ubiquitin-Proteasome System to Memory Retrieval After Extended-Access Cocaine or Saline Self-Administration.

PubMed

Werner, Craig T; Milovanovic, Mike; Christian, Daniel T; Loweth, Jessica A; Wolf, Marina E

2015-12-01

The ubiquitin-proteasome system (UPS) has been implicated in the retrieval-induced destabilization of cocaine- and fear-related memories in Pavlovian paradigms. However, nothing is known about its role in memory retrieval after self-administration of cocaine, an operant paradigm, or how the length of withdrawal from cocaine may influence retrieval mechanisms. Here, we examined UPS activity after an extended-access cocaine self-administration regimen that leads to withdrawal-dependent incubation of cue-induced cocaine craving. Controls self-administered saline. In initial experiments, memory retrieval was elicited via a cue-induced seeking/retrieval test on withdrawal day (WD) 50-60, when craving has incubated. We found that retrieval of cocaine- and saline-associated memories produced similar increases in polyubiquitinated proteins in the nucleus accumbens (NAc), compared with rats that did not undergo a seeking/retrieval test. Measures of proteasome catalytic activity confirmed similar activation of the UPS after retrieval of saline and cocaine memories. However, in a subsequent experiment in which testing was conducted on WD1, proteasome activity in the NAc was greater after retrieval of cocaine memory than saline memory. Analysis of other brain regions confirmed that effects of cocaine memory retrieval on proteasome activity, relative to saline memory retrieval, depend on withdrawal time. These results, combined with prior studies, suggest that the relationship between UPS activity and memory retrieval depends on training paradigm, brain region, and time elapsed between training and retrieval. The observation that mechanisms underlying cocaine memory retrieval change depending on the age of the memory has implications for development of memory destabilization therapies for cue-induced relapse in cocaine addicts.

Retrieval of memories with the help of music in Alzheimer's disease.

PubMed

Chevreau, Priscilia; Nizard, Ingrid; Allain, Philippe

2017-09-01

This study focuses on music as a mediator facilitating access to autobiographical memory in Alzheimer's disease (AD). Studies on this topic are rare, but available data have shown a beneficial effect of music on autobiographical performance in AD patients. Based on the "index word" method, we developed the "index music" method for the evaluation of autobiographical memory. The subjects had to tell a memory of their choice from the words or music presented to them. The task was proposed to 54 patients with diagnosis of AD according to DSM IV and NINCDS-ADRDA criteria. All of them had a significant cognitive decline on the MMSE (mean score: 14.5). Patients were matched by age, sex and level of education with 48 control subjects without cognitive impairment (mean score on the MMSE: 28). Results showed that autobiographical memory quantity scores of AD patients were significantly lower than those of healthy control in both methods. However, autobiographical memory quality scores of AD patients increased with "index music" whereas autobiographical memory quality scores of healthy control decreased. Also, the autobiographical performance of patients with AD in condition index music was not correlated with cognitive performance in contrast to the autobiographical performances in index word. These results confirm that music improves access to personal memories in patients with AD. Personal memories could be preserved in patients with AD and music could constitute an interesting way to stimulate recollection.

Parallelizing ATLAS Reconstruction and Simulation: Issues and Optimization Solutions for Scaling on Multi- and Many-CPU Platforms

NASA Astrophysics Data System (ADS)

Leggett, C.; Binet, S.; Jackson, K.; Levinthal, D.; Tatarkhanov, M.; Yao, Y.

2011-12-01

Thermal limitations have forced CPU manufacturers to shift from simply increasing clock speeds to improve processor performance, to producing chip designs with multi- and many-core architectures. Further the cores themselves can run multiple threads as a zero overhead context switch allowing low level resource sharing (Intel Hyperthreading). To maximize bandwidth and minimize memory latency, memory access has become non uniform (NUMA). As manufacturers add more cores to each chip, a careful understanding of the underlying architecture is required in order to fully utilize the available resources. We present AthenaMP and the Atlas event loop manager, the driver of the simulation and reconstruction engines, which have been rewritten to make use of multiple cores, by means of event based parallelism, and final stage I/O synchronization. However, initial studies on 8 andl6 core Intel architectures have shown marked non-linearities as parallel process counts increase, with as much as 30% reductions in event throughput in some scenarios. Since the Intel Nehalem architecture (both Gainestown and Westmere) will be the most common choice for the next round of hardware procurements, an understanding of these scaling issues is essential. Using hardware based event counters and Intel's Performance Tuning Utility, we have studied the performance bottlenecks at the hardware level, and discovered optimization schemes to maximize processor throughput. We have also produced optimization mechanisms, common to all large experiments, that address the extreme nature of today's HEP code, which due to it's size, places huge burdens on the memory infrastructure of today's processors.

Does the Sound of a Barking Dog Activate its Corresponding Visual Form? An fMRI Investigation of Modality-Specific Semantic Access

PubMed Central

Reilly, Jamie; Garcia, Amanda; Binney, Richard J.

2016-01-01

Much remains to be learned about the neural architecture underlying word meaning. Fully distributed models of semantic memory predict that the sound of a barking dog will conjointly engage a network of distributed sensorimotor spokes. An alternative framework holds that modality-specific features additionally converge within transmodal hubs. Participants underwent functional MRI while covertly naming familiar objects versus newly learned novel objects from only one of their constituent semantic features (visual form, characteristic sound, or point-light motion representation). Relative to the novel object baseline, familiar concepts elicited greater activation within association regions specific to that presentation modality. Furthermore, visual form elicited activation within high-level auditory association cortex. Conversely, environmental sounds elicited activation in regions proximal to visual association cortex. Both conditions commonly engaged a putative hub region within lateral anterior temporal cortex. These results support hybrid semantic models in which local hubs and distributed spokes are dually engaged in service of semantic memory. PMID:27289210

Shape Memory Alloy Actuator Design: CASMART Collaborative Best Practices

NASA Technical Reports Server (NTRS)

Benafan, Othmane; Brown, Jeff; Calkins, F. Tad; Kumar, Parikshith; Stebner, Aaron; Turner, Travis; Vaidyanathan, Raj; Webster, John; Young, Marcus L.

2011-01-01

Upon examination of shape memory alloy (SMA) actuation designs, there are many considerations and methodologies that are common to them all. A goal of CASMART's design working group is to compile the collective experiences of CASMART's member organizations into a single medium that engineers can then use to make the best decisions regarding SMA system design. In this paper, a review of recent work toward this goal is presented, spanning a wide range of design aspects including evaluation, properties, testing, modeling, alloy selection, fabrication, actuator processing, design optimization, controls, and system integration. We have documented each aspect, based on our collective experiences, so that the design engineer may access the tools and information needed to successfully design and develop SMA systems. Through comparison of several case studies, it is shown that there is not an obvious single, linear route a designer can adopt to navigate the path of concept to product. SMA engineering aspects will have different priorities and emphasis for different applications.

Functional Fixedness in Creative Thinking Tasks Depends on Stimulus Modality.

PubMed

Chrysikou, Evangelia G; Motyka, Katharine; Nigro, Cristina; Yang, Song-I; Thompson-Schill, Sharon L

2016-11-01

Pictorial examples during creative thinking tasks can lead participants to fixate on these examples and reproduce their elements even when yielding suboptimal creative products. Semantic memory research may illuminate the cognitive processes underlying this effect. Here, we examined whether pictures and words differentially influence access to semantic knowledge for object concepts depending on whether the task is close- or open-ended. Participants viewed either names or pictures of everyday objects, or a combination of the two, and generated common, secondary, or ad hoc uses for them. Stimulus modality effects were assessed quantitatively through reaction times and qualitatively through a novel coding system, which classifies creative output on a continuum from top-down-driven to bottom-up-driven responses. Both analyses revealed differences across tasks. Importantly, for ad hoc uses, participants exposed to pictures generated more top-down-driven responses than those exposed to object names. These findings have implications for accounts of functional fixedness in creative thinking, as well as theories of semantic memory for object concepts.

Functional Fixedness in Creative Thinking Tasks Depends on Stimulus Modality

PubMed Central

Chrysikou, Evangelia G.; Motyka, Katharine; Nigro, Cristina; Yang, Song-I; Thompson-Schill, Sharon L.

2015-01-01

Pictorial examples during creative thinking tasks can lead participants to fixate on these examples and reproduce their elements even when yielding suboptimal creative products. Semantic memory research may illuminate the cognitive processes underlying this effect. Here, we examined whether pictures and words differentially influence access to semantic knowledge for object concepts depending on whether the task is close- or open-ended. Participants viewed either names or pictures of everyday objects, or a combination of the two, and generated common, secondary, or ad hoc uses for them. Stimulus modality effects were assessed quantitatively through reaction times and qualitatively through a novel coding system, which classifies creative output on a continuum from top-down-driven to bottom-up-driven responses. Both analyses revealed differences across tasks. Importantly, for ad hoc uses, participants exposed to pictures generated more top-down-driven responses than those exposed to object names. These findings have implications for accounts of functional fixedness in creative thinking, as well as theories of semantic memory for object concepts. PMID:28344724

Electrical Evaluation of RCA MWS5001D Random Access Memory, Volume 5, Appendix D

NASA Technical Reports Server (NTRS)

Klute, A.

1979-01-01

The electrical characterization and qualification test results are presented for the RCA MWS 5001D random access memory. The tests included functional tests, AC and DC parametric tests, AC parametric worst-case pattern selection test, determination of worst-case transition for setup and hold times, and a series of schmoo plots. Average input high current, worst case input high current, output low current, and data setup time are some of the results presented.

The Effect of a Previously-Generated Hypothesis on Hypothesis Generation Performance.

DTIC Science & Technology

1980-08-05

distinction 17I -’ai S between availability and accessibility has been made by Tulving and Pearlstone (1966). A datum may be present in memory, but may...1977. Thorndyke, P.W. The role of inference in discourse comprehension. Journal of Verbal Learning and Verbal Behavior, 1976, 15, 437-446. Tulving ...E. and Pearlstone , Z. Availability versus accessibility of infor- mation in memory for words. Journal of Verbal Learning and Verbal Behavior, 1966, 5

Electrical Evaluation of RCA MWS5001D Random Access Memory, Volume 4, Appendix C

NASA Technical Reports Server (NTRS)

Klute, A.

1979-01-01

The electrical characterization and qualification test results are presented for the RCA MWS5001D random access memory. The tests included functional tests, AC and DC parametric tests, AC parametric worst-case pattern selection test, determination of worst-case transition for setup and hold times, and a series of schmoo plots. Statistical analysis data is supplied along with write pulse width, read cycle time, write cycle time, and chip enable time data.

ViSA: a neurodynamic model for visuo-spatial working memory, attentional blink, and conscious access.

PubMed

Simione, Luca; Raffone, Antonino; Wolters, Gezinus; Salmas, Paola; Nakatani, Chie; Belardinelli, Marta Olivetti; van Leeuwen, Cees

2012-10-01

Two separate lines of study have clarified the role of selectivity in conscious access to visual information. Both involve presenting multiple targets and distracters: one simultaneously in a spatially distributed fashion, the other sequentially at a single location. To understand their findings in a unified framework, we propose a neurodynamic model for Visual Selection and Awareness (ViSA). ViSA supports the view that neural representations for conscious access and visuo-spatial working memory are globally distributed and are based on recurrent interactions between perceptual and access control processors. Its flexible global workspace mechanisms enable a unitary account of a broad range of effects: It accounts for the limited storage capacity of visuo-spatial working memory, attentional cueing, and efficient selection with multi-object displays, as well as for the attentional blink and associated sparing and masking effects. In particular, the speed of consolidation for storage in visuo-spatial working memory in ViSA is not fixed but depends adaptively on the input and recurrent signaling. Slowing down of consolidation due to weak bottom-up and recurrent input as a result of brief presentation and masking leads to the attentional blink. Thus, ViSA goes beyond earlier 2-stage and neuronal global workspace accounts of conscious processing limitations. PsycINFO Database Record (c) 2012 APA, all rights reserved.

Random Access Memories: A New Paradigm for Target Detection in High Resolution Aerial Remote Sensing Images.

PubMed

Zou, Zhengxia; Shi, Zhenwei

2018-03-01

We propose a new paradigm for target detection in high resolution aerial remote sensing images under small target priors. Previous remote sensing target detection methods frame the detection as learning of detection model + inference of class-label and bounding-box coordinates. Instead, we formulate it from a Bayesian view that at inference stage, the detection model is adaptively updated to maximize its posterior that is determined by both training and observation. We call this paradigm "random access memories (RAM)." In this paradigm, "Memories" can be interpreted as any model distribution learned from training data and "random access" means accessing memories and randomly adjusting the model at detection phase to obtain better adaptivity to any unseen distribution of test data. By leveraging some latest detection techniques e.g., deep Convolutional Neural Networks and multi-scale anchors, experimental results on a public remote sensing target detection data set show our method outperforms several other state of the art methods. We also introduce a new data set "LEarning, VIsion and Remote sensing laboratory (LEVIR)", which is one order of magnitude larger than other data sets of this field. LEVIR consists of a large set of Google Earth images, with over 22 k images and 10 k independently labeled targets. RAM gives noticeable upgrade of accuracy (an mean average precision improvement of 1% ~ 4%) of our baseline detectors with acceptable computational overhead.

Application of holographic optical techniques to bulk memory.

NASA Technical Reports Server (NTRS)

Anderson, L. K.

1971-01-01

Current efforts to exploit the spatial redundancy and built-in imaging of holographic optical techniques to provide high information densities without critical alignment and tight mechanical tolerances are reviewed. Read-write-erase in situ operation is possible but is presently impractical because of limitations in available recording media. As these are overcome, it should prove feasible to build holographic bulk memories with mechanically replaceable hologram plates featuring very fast (less than 2 microsec) random access to large (greater than 100 million bit) data blocks and very high throughput (greater than 500 Mbit/sec). Using volume holographic storage it may eventually be possible to realize random-access mass memories which require no mechanical motion and yet provide very high capacity.

Acoustic Neuroma: Questions to Discuss with Your Doctor

MedlinePlus

... products will be searched. Shopping Cart Description Qty Price The Harvard Medical School 6-Week Plan for ... Memory: Understanding Age-Related Memory Loss (PDF - Lowest Price!) $18.00 Harvard Health Letter (Print & Online Access ( ...

Colonic Polyps: Questions to Discuss with Your Doctor

MedlinePlus

... products will be searched. Shopping Cart Description Qty Price The Harvard Medical School 6-Week Plan for ... Memory: Understanding Age-Related Memory Loss (PDF - Lowest Price!) $18.00 Harvard Health Letter (Print & Online Access ( ...

When You Visit Your Doctor After a Heart Attack

MedlinePlus

... products will be searched. Shopping Cart Description Qty Price The Harvard Medical School 6-Week Plan for ... Memory: Understanding Age-Related Memory Loss (PDF - Lowest Price!) $18.00 Harvard Health Letter (Print & Online Access ( ...

When You Visit Your Doctor: Irregular Menstrual Periods

MedlinePlus

... products will be searched. Shopping Cart Description Qty Price The Harvard Medical School 6-Week Plan for ... Memory: Understanding Age-Related Memory Loss (PDF - Lowest Price!) $18.00 Harvard Health Letter (Print & Online Access ( ...

The increasing globalization of health librarianship: a brief survey of international trends and activities.

PubMed

Madge, Bruce; Plutchak, T Scott

2005-09-01

Throughout his career, Leslie Morton was interested in international developments in health librarianship. In memory of the work he did in this field, the authors examine current developments in international health librarianship and describe some current themes. The authors draw from their combined experience in international activities and the published information available from selected library associations and related organizations. Although many of the major health library associations around the world are tackling agendas specific to their own country, issues of international concern are emerging in common. These are grouped around globalization, partnerships and co-operation, electronic access, especially open access, and working with the developing world in a number of different ways. Of course, the basis of all of these initiatives is to improve the health of the population by providing the best possible access to materials. Professional associations can provide a useful institutional infrastructure for addressing issues of international interest. Librarians should encourage their associations to develop these international initiatives and to seek out new and innovative ways to work together across international boundaries.

Method of pedestal and common-mode noise correction for switched-capacitor analog memories

DOEpatents

Britton, Charles L.

1997-01-01

A method and apparatus for correcting common-mode noise and pedestal noise in a multichannel array of switched-capacitor analog memories wherein each analog memory is connected to an associated analog-to-digital converter. The apparatus comprises a single differential element in two different embodiments. In a first embodiment, the differential element is a reference analog memory connected to a buffer. In the second embodiment, the differential dement is a reference analog memory connected to a reference analog-to-digital connected to an array of digital summing circuits.

Method of pedestal and common-mode noise correction for switched-capacitor analog memories

DOEpatents

Britton, Charles L.

1996-01-01

A method and apparatus for correcting common-mode noise and pedestal noise in a multichannel array of switched-capacitor analog memories wherein each analog memory is connected to an associated analog-to-digital converter. The apparatus comprises a single differential element in two different embodiments. In a first embodiment, the differential element is a reference analog memory connected to a buffer. In the second embodiment, the differential element is a reference analog memory connected to a reference analog-to-digital connected to an array of digital summing circuits.

Integrating across Episodes: Investigating the Long-term Accessibility of Self-derived Knowledge in 4-Year-Old Children

PubMed Central

Varga, Nicole L.; Stewart, Rebekah A.; Bauer, Patricia J.

2016-01-01

Semantic memory, defined as our store of knowledge about the world, provides representational support for all of our higher order cognitive functions. As such, it is crucial that the contents of semantic memory remain accessible over time. Although memory for knowledge learned through direct observation has been previously investigated, we know very little about the retention of knowledge derived through integration of information acquired across separate learning episodes. The present research investigated cross-episode integration in 4-year-old children. Participants were presented with novel facts via distinct story episodes and tested for knowledge extension through cross-episode integration, as well as for retention of the information over a 1-week delay. In Experiment 1, children retained the self-derived knowledge over the delay, though performance was primarily evidenced in a forced-choice format. In Experiment 2, we sought to facilitate the accessibility and robustness of self-derived knowledge by providing a verbal reminder after the delay. The accessibility of self-derived knowledge increased, irrespective of whether participants successfully demonstrated knowledge of the integration facts during the first visit. The results suggest knowledge extended through integration remains accessible after delays, even in a population in which this learning process is less robust. The findings also demonstrate the facilitative effect of reminders on the accessibility and further extension of knowledge over extended time periods. PMID:26774259

Belief Inhibition in Children's Reasoning: Memory-Based Evidence

ERIC Educational Resources Information Center

Steegen, Sara; Neys, Wim De

2012-01-01

Adult reasoning has been shown as mediated by the inhibition of intuitive beliefs that are in conflict with logic. The current study introduces a classic procedure from the memory field to investigate belief inhibition in 12- to 17-year-old reasoners. A lexical decision task was used to probe the memory accessibility of beliefs that were cued…

Checkpoint-Restart in User Space

DOE Office of Scientific and Technical Information (OSTI.GOV)

CRUISE implements a user-space file system that stores data in main memory and transparently spills over to other storage, like local flash memory or the parallel file system, as needed. CRUISE also exposes file contents fo remote direct memory access, allowing external tools to copy files to the parallel file system in the background with reduced CPU interruption.

Memory Dynamics and Decision Making in Younger and Older Adults

ERIC Educational Resources Information Center

Lechuga, M. Teresa; Gomez-Ariza, Carlos J.; Iglesias-Parro, Sergio; Pelegrina, Santiago

2012-01-01

The main aim of this research was to study whether memory dynamics influence older people's choices to the same extent as younger's ones. To do so, we adapted the retrieval-practice paradigm to produce variations in memory accessibility of information on which decisions were made later. Based on previous results, we expected to observe…

Speed and Accuracy of Accessing Information in Working Memory: An Individual Differences Investigation of Focus Switching

ERIC Educational Resources Information Center

Unsworth, Nash; Engle, Randall W.

2008-01-01

Three experiments examined the nature of individual differences in switching the focus of attention in working memory. Participants performed 3 versions of a continuous counting task that required successive updating and switching between counts. Across all 3 experiments, individual differences in working memory span and fluid intelligence were…

Contexts and Control Operations Used in Accessing List-Specific, Generalized, and Semantic Memories

ERIC Educational Resources Information Center

Humphreys, Michael S.; Murray, Krista L.; Maguire, Angela M.

2009-01-01

The human ability to focus memory retrieval operations on a particular list, episode or memory structure has not been fully appreciated or documented. In Experiment 1-3, we make it increasingly difficult for participants to switch between a less recent list (multiple study opportunities), and a more recent list (single study opportunity). Task…

Loss of Visual Working Memory within Seconds: The Combined Use of Refreshable and Non-Refreshable Features

ERIC Educational Resources Information Center

Ricker, Timothy J.; Cowan, Nelson

2010-01-01

We reexamine the role of time in the loss of information from working memory, the limited information accessible for cognitive tasks. The controversial issue of whether working memory deteriorates over time was investigated using arrays of unconventional visual characters. Each array was followed by a postperceptual mask, a variable retention…

Production, Comprehension, and Theories of the Mental Lexicon. CUNYForum, Numbers 5-6.

ERIC Educational Resources Information Center

Cowart, Wayne

Problems related to the structure of the mental lexicon are considered. The single access assumption, the passive memory assumption, and the heterogeneous memory assumption are rejected in favor of the theory which assumes several active memories, each able to store expression based on only one homogenous set of abstract primitives. One lexicon…

Multiple Memory Stores and Operant Conditioning: A Rationale for Memory's Complexity

ERIC Educational Resources Information Center

Meeter, Martijn; Veldkamp, Rob; Jin, Yaochu

2009-01-01

Why does the brain contain more than one memory system? Genetic algorithms can play a role in elucidating this question. Here, model animals were constructed containing a dorsal striatal layer that controlled actions, and a ventral striatal layer that controlled a dopaminergic learning signal. Both layers could gain access to three modeled memory…

Columbia Crew added to Astronaut Memorial Mirror

NASA Image and Video Library

2003-07-15

Workers add to the Astronaut Memorial Mirror the names of the Columbia crew who died in the STS-107 accident. Dedicated May 9, 1991, the Astronaut Memorial honors U.S. astronauts who gave their lives for space exploration. The "Space Mirror," 42 1/2 feet high by 50 feet wide, illuminates the names of the fallen astronauts cut through the monument's black granite surface. The Memorial Mirror is accessible through the KSC Visitor Complex.

Common neural substrates for visual working memory and attention.

PubMed

Mayer, Jutta S; Bittner, Robert A; Nikolić, Danko; Bledowski, Christoph; Goebel, Rainer; Linden, David E J

2007-06-01

Humans are severely limited in their ability to memorize visual information over short periods of time. Selective attention has been implicated as a limiting factor. Here we used functional magnetic resonance imaging to test the hypothesis that this limitation is due to common neural resources shared by visual working memory (WM) and selective attention. We combined visual search and delayed discrimination of complex objects and independently modulated the demands on selective attention and WM encoding. Participants were presented with a search array and performed easy or difficult visual search in order to encode one or three complex objects into visual WM. Overlapping activation for attention-demanding visual search and WM encoding was observed in distributed posterior and frontal regions. In the right prefrontal cortex and bilateral insula blood oxygen-level-dependent activation additively increased with increased WM load and attentional demand. Conversely, several visual, parietal and premotor areas showed overlapping activation for the two task components and were severely reduced in their WM load response under the condition with high attentional demand. Regions in the left prefrontal cortex were selectively responsive to WM load. Areas selectively responsive to high attentional demand were found within the right prefrontal and bilateral occipital cortex. These results indicate that encoding into visual WM and visual selective attention require to a high degree access to common neural resources. We propose that competition for resources shared by visual attention and WM encoding can limit processing capabilities in distributed posterior brain regions.

Temporal information processing in short- and long-term memory of patients with schizophrenia.

PubMed

Landgraf, Steffen; Steingen, Joerg; Eppert, Yvonne; Niedermeyer, Ulrich; van der Meer, Elke; Krueger, Frank

2011-01-01

Cognitive deficits of patients with schizophrenia have been largely recognized as core symptoms of the disorder. One neglected factor that contributes to these deficits is the comprehension of time. In the present study, we assessed temporal information processing and manipulation from short- and long-term memory in 34 patients with chronic schizophrenia and 34 matched healthy controls. On the short-term memory temporal-order reconstruction task, an incidental or intentional learning strategy was deployed. Patients showed worse overall performance than healthy controls. The intentional learning strategy led to dissociable performance improvement in both groups. Whereas healthy controls improved on a performance measure (serial organization), patients improved on an error measure (inappropriate semantic clustering) when using the intentional instead of the incidental learning strategy. On the long-term memory script-generation task, routine and non-routine events of everyday activities (e.g., buying groceries) had to be generated in either chronological or inverted temporal order. Patients were slower than controls at generating events in the chronological routine condition only. They also committed more sequencing and boundary errors in the inverted conditions. The number of irrelevant events was higher in patients in the chronological, non-routine condition. These results suggest that patients with schizophrenia imprecisely access temporal information from short- and long-term memory. In short-term memory, processing of temporal information led to a reduction in errors rather than, as was the case in healthy controls, to an improvement in temporal-order recall. When accessing temporal information from long-term memory, patients were slower and committed more sequencing, boundary, and intrusion errors. Together, these results suggest that time information can be accessed and processed only imprecisely by patients who provide evidence for impaired time comprehension. This could contribute to symptomatic cognitive deficits and strategic inefficiency in schizophrenia.

Logical Access Control Mechanisms in Computer Systems.

ERIC Educational Resources Information Center

Hsiao, David K.

The subject of access control mechanisms in computer systems is concerned with effective means to protect the anonymity of private information on the one hand, and to regulate the access to shareable information on the other hand. Effective means for access control may be considered on three levels: memory, process and logical. This report is a…

Multiprocessing MCNP on an IBM RS/6000 cluster

DOE Office of Scientific and Technical Information (OSTI.GOV)

McKinney, G.W.; West, J.T.

1993-03-01

The advent of high-performance computer systems has brought to maturity programming concepts like vectorization, multiprocessing, and multitasking. While there are many schools of thought as to the most significant factor in obtaining order-of-magnitude increases in performance, such speedup can only be achieved by integrating the computer system and application code. Vectorization leads to faster manipulation of arrays by overlapping instruction CPU cycles. Discrete ordinates codes, which require the solving of large matrices, have proved to be major benefactors of vectorization. Monte Carlo transport, on the other hand, typically contains numerous logic statements and requires extensive redevelopment to benefit from vectorization.more » Multiprocessing and multitasking provide additional CPU cycles via multiple processors. Such systems are generally designed with either common memory access (multitasking) or distributed memory access. In both cases, theoretical speedup, as a function of the number of processors (P) and the fraction of task time that multiprocesses (f), can be formulated using Amdahl`s Law S ((f,P) = 1 f + f/P). However, for most applications this theoretical limit cannot be achieved, due to additional terms not included in Amdahl`s Law. Monte Carlo transport is a natural candidate for multiprocessing, since the particle tracks are generally independent and the precision of the result increases as the square root of the number of particles tracked.« less

Selective memory retrieval in social groups: When silence is golden and when it is not.

PubMed

Abel, Magdalena; Bäuml, Karl-Heinz T

2015-07-01

Previous research has shown that the selective remembering of a speaker and the resulting silences can cause forgetting of related, but unmentioned information by a listener (Cuc, Koppel, & Hirst, 2007). Guided by more recent work that demonstrated both detrimental and beneficial effects of selective memory retrieval in individuals, the present research explored the effects of selective remembering in social groups when access to the encoding context at retrieval was maintained or impaired. In each of three experiments, selective retrieval by the speaker impaired recall of the listener when access to the encoding context was maintained, but it improved recall of the listener when context access was impaired. The results suggest the existence of two faces of selective memory retrieval in social groups, with a detrimental face when the encoding context is still active at retrieval and a beneficial face when it is not. The role of silence in social recall thus seems to be more complex than was indicated in prior work, and mnemonic silences on the part of a speaker can be "golden" for the memories of a listener under some circumstances, but not be "golden" under others. Copyright © 2015 Elsevier B.V. All rights reserved.

Routes to the past: neural substrates of direct and generative autobiographical memory retrieval.

PubMed

Addis, Donna Rose; Knapp, Katie; Roberts, Reece P; Schacter, Daniel L

2012-02-01

Models of autobiographical memory propose two routes to retrieval depending on cue specificity. When available cues are specific and personally-relevant, a memory can be directly accessed. However, when available cues are generic, one must engage a generative retrieval process to produce more specific cues to successfully access a relevant memory. The current study sought to characterize the neural bases of these retrieval processes. During functional magnetic resonance imaging (fMRI), participants were shown personally-relevant cues to elicit direct retrieval, or generic cues (nouns) to elicit generative retrieval. We used spatiotemporal partial least squares to characterize the spatial and temporal characteristics of the networks associated with direct and generative retrieval. Both retrieval tasks engaged regions comprising the autobiographical retrieval network, including hippocampus, and medial prefrontal and parietal cortices. However, some key neural differences emerged. Generative retrieval differentially recruited lateral prefrontal and temporal regions early on during the retrieval process, likely supporting the strategic search operations and initial recovery of generic autobiographical information. However, many regions were activated more strongly during direct versus generative retrieval, even when we time-locked the analysis to the successful recovery of events in both conditions. This result suggests that there may be fundamental differences between memories that are accessed directly and those that are recovered via the iterative search and retrieval process that characterizes generative retrieval. Copyright © 2011 Elsevier Inc. All rights reserved.

Routes to the past: Neural substrates of direct and generative autobiographical memory retrieval

PubMed Central

Addis, Donna Rose; Knapp, Katie; Roberts, Reece P.; Schacter, Daniel L.

2011-01-01

Models of autobiographical memory propose two routes to retrieval depending on cue specificity. When available cues are specific and personally-relevant, a memory can be directly accessed. However, when available cues are generic, one must engage a generative retrieval process to produce more specific cues to successfully access a relevant memory. The current study sought to characterize the neural bases of these retrieval processes. During functional magnetic resonance imaging (fMRI), participants were shown personally-relevant cues to elicit direct retrieval, or generic cues (nouns) to elicit generative retrieval. We used spatiotemporal partial least squares to characterize the spatial and temporal characteristics of the networks associated with direct and generative retrieval. Both retrieval tasks engaged regions comprising the autobiographical retrieval network, including hippocampus, and medial prefrontal and parietal cortices. However, some key neural differences emerged. Generative retrieval differentially recruited lateral prefrontal and temporal regions early on during the retrieval process, likely supporting the strategic search operations and initial recovery of generic autobiographical information. However, many regions were activated more strongly during direct versus generative retrieval, even when we time-locked the analysis to the successful recovery of events in both conditions. This result suggests that there may be fundamental differences between memories that are accessed directly and those that are recovered via the iterative search and retrieval process that characterizes generative retrieval. PMID:22001264

Implementation of nitrogen-doped titanium-tungsten tunable heater in phase change random access memory and its effects on device performance

DOE Office of Scientific and Technical Information (OSTI.GOV)

Tan, Chun Chia; Zhao, Rong, E-mail: zhao-rong@sutd.edu.sg; Chong, Tow Chong

2014-10-13

Nitrogen-doped titanium-tungsten (N-TiW) was proposed as a tunable heater in Phase Change Random Access Memory (PCRAM). By tuning N-TiW's material properties through doping, the heater can be tailored to optimize the access speed and programming current of PCRAM. Experiments reveal that N-TiW's resistivity increases and thermal conductivity decreases with increasing nitrogen-doping ratio, and N-TiW devices displayed (∼33% to ∼55%) reduced programming currents. However, there is a tradeoff between the current and speed for heater-based PCRAM. Analysis of devices with different N-TiW heaters shows that N-TiW doping levels could be optimized to enable low RESET currents and fast access speeds.

Design and measurement of fully digital ternary content addressable memory using ratioless static random access memory cells and hierarchical-AND matching comparator

NASA Astrophysics Data System (ADS)

Nishikata, Daisuke; Ali, Mohammad Alimudin Bin Mohd; Hosoda, Kento; Matsumoto, Hiroshi; Nakamura, Kazuyuki

2018-04-01

A 36-bit × 32-entry fully digital ternary content addressable memory (TCAM) using the ratioless static random access memory (RL-SRAM) technology and fully complementary hierarchical-AND matching comparators (HAMCs) was developed. Since its fully complementary and digital operation enables the effect of device variabilities to be avoided, it can operate with a quite low supply voltage. A test chip incorporating a conventional TCAM and a proposed 24-transistor ratioless TCAM (RL-TCAM) cells and HAMCs was developed using a 0.18 µm CMOS process. The minimum operating voltage of 0.25 V of the developed RL-TCAM, which is less than half of that of the conventional TCAM, was measured via the conventional CMOS push–pull output buffers with the level-shifting and flipping technique using optimized pull-up voltage and resistors.

Are There Multiple Visual Short-Term Memory Stores?

PubMed Central

Sligte, Ilja G.; Scholte, H. Steven; Lamme, Victor A. F.

2008-01-01

Background Classic work on visual short-term memory (VSTM) suggests that people store a limited amount of items for subsequent report. However, when human observers are cued to shift attention to one item in VSTM during retention, it seems as if there is a much larger representation, which keeps additional items in a more fragile VSTM store. Thus far, it is not clear whether the capacity of this fragile VSTM store indeed exceeds the traditional capacity limits of VSTM. The current experiments address this issue and explore the capacity, stability, and duration of fragile VSTM representations. Methodology/Principal Findings We presented cues in a change-detection task either just after off-set of the memory array (iconic-cue), 1,000 ms after off-set of the memory array (retro-cue) or after on-set of the probe array (post-cue). We observed three stages in visual information processing 1) iconic memory with unlimited capacity, 2) a four seconds lasting fragile VSTM store with a capacity that is at least a factor of two higher than 3) the robust and capacity-limited form of VSTM. Iconic memory seemed to depend on the strength of the positive after-image resulting from the memory display and was virtually absent under conditions of isoluminance or when intervening light masks were presented. This suggests that iconic memory is driven by prolonged retinal activation beyond stimulus duration. Fragile VSTM representations were not affected by light masks, but were completely overwritten by irrelevant pattern masks that spatially overlapped the memory array. Conclusions/Significance We find that immediately after a stimulus has disappeared from view, subjects can still access information from iconic memory because they can see an after-image of the display. After that period, human observers can still access a substantial, but somewhat more limited amount of information from a high-capacity, but fragile VSTM that is overwritten when new items are presented to the eyes. What is left after that is the traditional VSTM store, with a limit of about four objects. We conclude that human observers store more sustained representations than is evident from standard change detection tasks and that these representations can be accessed at will. PMID:18301775

Are there multiple visual short-term memory stores?

PubMed

Sligte, Ilja G; Scholte, H Steven; Lamme, Victor A F

2008-02-27

Classic work on visual short-term memory (VSTM) suggests that people store a limited amount of items for subsequent report. However, when human observers are cued to shift attention to one item in VSTM during retention, it seems as if there is a much larger representation, which keeps additional items in a more fragile VSTM store. Thus far, it is not clear whether the capacity of this fragile VSTM store indeed exceeds the traditional capacity limits of VSTM. The current experiments address this issue and explore the capacity, stability, and duration of fragile VSTM representations. We presented cues in a change-detection task either just after off-set of the memory array (iconic-cue), 1,000 ms after off-set of the memory array (retro-cue) or after on-set of the probe array (post-cue). We observed three stages in visual information processing 1) iconic memory with unlimited capacity, 2) a four seconds lasting fragile VSTM store with a capacity that is at least a factor of two higher than 3) the robust and capacity-limited form of VSTM. Iconic memory seemed to depend on the strength of the positive after-image resulting from the memory display and was virtually absent under conditions of isoluminance or when intervening light masks were presented. This suggests that iconic memory is driven by prolonged retinal activation beyond stimulus duration. Fragile VSTM representations were not affected by light masks, but were completely overwritten by irrelevant pattern masks that spatially overlapped the memory array. We find that immediately after a stimulus has disappeared from view, subjects can still access information from iconic memory because they can see an after-image of the display. After that period, human observers can still access a substantial, but somewhat more limited amount of information from a high-capacity, but fragile VSTM that is overwritten when new items are presented to the eyes. What is left after that is the traditional VSTM store, with a limit of about four objects. We conclude that human observers store more sustained representations than is evident from standard change detection tasks and that these representations can be accessed at will.

Temporal Expectations Guide Dynamic Prioritization in Visual Working Memory through Attenuated α Oscillations.

PubMed

van Ede, Freek; Niklaus, Marcel; Nobre, Anna C

2017-01-11

Although working memory is generally considered a highly dynamic mnemonic store, popular laboratory tasks used to understand its psychological and neural mechanisms (such as change detection and continuous reproduction) often remain relatively "static," involving the retention of a set number of items throughout a shared delay interval. In the current study, we investigated visual working memory in a more dynamic setting, and assessed the following: (1) whether internally guided temporal expectations can dynamically and reversibly prioritize individual mnemonic items at specific times at which they are deemed most relevant; and (2) the neural substrates that support such dynamic prioritization. Participants encoded two differently colored oriented bars into visual working memory to retrieve the orientation of one bar with a precision judgment when subsequently probed. To test for the flexible temporal control to access and retrieve remembered items, we manipulated the probability for each of the two bars to be probed over time, and recorded EEG in healthy human volunteers. Temporal expectations had a profound influence on working memory performance, leading to faster access times as well as more accurate orientation reproductions for items that were probed at expected times. Furthermore, this dynamic prioritization was associated with the temporally specific attenuation of contralateral α (8-14 Hz) oscillations that, moreover, predicted working memory access times on a trial-by-trial basis. We conclude that attentional prioritization in working memory can be dynamically steered by internally guided temporal expectations, and is supported by the attenuation of α oscillations in task-relevant sensory brain areas. In dynamic, everyday-like, environments, flexible goal-directed behavior requires that mental representations that are kept in an active (working memory) store are dynamic, too. We investigated working memory in a more dynamic setting than is conventional, and demonstrate that expectations about when mnemonic items are most relevant can dynamically and reversibly prioritize these items in time. Moreover, we uncover a neural substrate of such dynamic prioritization in contralateral visual brain areas and show that this substrate predicts working memory retrieval times on a trial-by-trial basis. This places the experimental study of working memory, and its neuronal underpinnings, in a more dynamic and ecologically valid context, and provides new insights into the neural implementation of attentional prioritization within working memory. Copyright © 2017 van Ede et al.

45 CFR 2490.150 - Program accessibility: Existing facilities.

Code of Federal Regulations, 2013 CFR

2013-10-01

... 45 Public Welfare 4 2013-10-01 2013-10-01 false Program accessibility: Existing facilities. 2490.150 Section 2490.150 Public Welfare Regulations Relating to Public Welfare (Continued) JAMES MADISON... ACTIVITIES CONDUCTED BY THE JAMES MADISON MEMORIAL FELLOWSHIP FOUNDATION § 2490.150 Program accessibility...

45 CFR 2490.150 - Program accessibility: Existing facilities.

Code of Federal Regulations, 2012 CFR

2012-10-01

... 45 Public Welfare 4 2012-10-01 2012-10-01 false Program accessibility: Existing facilities. 2490.150 Section 2490.150 Public Welfare Regulations Relating to Public Welfare (Continued) JAMES MADISON... ACTIVITIES CONDUCTED BY THE JAMES MADISON MEMORIAL FELLOWSHIP FOUNDATION § 2490.150 Program accessibility...

45 CFR 2490.150 - Program accessibility: Existing facilities.

Code of Federal Regulations, 2014 CFR

2014-10-01

... 45 Public Welfare 4 2014-10-01 2014-10-01 false Program accessibility: Existing facilities. 2490.150 Section 2490.150 Public Welfare Regulations Relating to Public Welfare (Continued) JAMES MADISON... ACTIVITIES CONDUCTED BY THE JAMES MADISON MEMORIAL FELLOWSHIP FOUNDATION § 2490.150 Program accessibility...

45 CFR 2490.150 - Program accessibility: Existing facilities.

Code of Federal Regulations, 2011 CFR

2011-10-01

... 45 Public Welfare 4 2011-10-01 2011-10-01 false Program accessibility: Existing facilities. 2490.150 Section 2490.150 Public Welfare Regulations Relating to Public Welfare (Continued) JAMES MADISON... ACTIVITIES CONDUCTED BY THE JAMES MADISON MEMORIAL FELLOWSHIP FOUNDATION § 2490.150 Program accessibility...

Rutger's CAM2000 chip architecture

NASA Technical Reports Server (NTRS)

Smith, Donald E.; Hall, J. Storrs; Miyake, Keith

1993-01-01

This report describes the architecture and instruction set of the Rutgers CAM2000 memory chip. The CAM2000 combines features of Associative Processing (AP), Content Addressable Memory (CAM), and Dynamic Random Access Memory (DRAM) in a single chip package that is not only DRAM compatible but capable of applying simple massively parallel operations to memory. This document reflects the current status of the CAM2000 architecture and is continually updated to reflect the current state of the architecture and instruction set.

Time Frame Affects Vantage Point in Episodic and Semantic Autobiographical Memory: Evidence from Response Latencies

PubMed Central

Karylowski, Jerzy J.; Mrozinski, Blazej

2017-01-01

Previous research suggests that, with the passage of time, representations of self in episodic memory become less dependent on their initial (internal) vantage point and shift toward an external perspective that is normally characteristic of how other people are represented. The present experiment examined this phenomenon in both episodic and semantic autobiographical memory using latency of self-judgments as a measure of accessibility of the internal vs. the external perspective. Results confirmed that in the case of representations of the self retrieved from recent autobiographical memories, trait-judgments regarding unobservable self-aspects (internal perspective) were faster than trait judgments regarding observable self-aspects (external perspective). Yet, in the case of self-representations retrieved from memories of a more distant past, judgments regarding observable self-aspects were faster. Those results occurred for both self-representations retrieved from episodic memory and for representations retrieved from the semantic memory. In addition, regardless of the effect of time, greater accessibility of unobservable (vs. observable) self-aspects was associated with the episodic rather than semantic autobiographical memory. Those results were modified by neither declared trait’s self-descriptiveness (yes vs. no responses) nor by its desirability (highly desirable vs. moderately desirable traits). Implications for compatibility between how self and others are represented and for the role of self in social perception are discussed. PMID:28473793

Time Frame Affects Vantage Point in Episodic and Semantic Autobiographical Memory: Evidence from Response Latencies.

PubMed

Karylowski, Jerzy J; Mrozinski, Blazej

2017-01-01

Previous research suggests that, with the passage of time, representations of self in episodic memory become less dependent on their initial (internal) vantage point and shift toward an external perspective that is normally characteristic of how other people are represented. The present experiment examined this phenomenon in both episodic and semantic autobiographical memory using latency of self-judgments as a measure of accessibility of the internal vs. the external perspective. Results confirmed that in the case of representations of the self retrieved from recent autobiographical memories, trait-judgments regarding unobservable self-aspects (internal perspective) were faster than trait judgments regarding observable self-aspects (external perspective). Yet, in the case of self-representations retrieved from memories of a more distant past, judgments regarding observable self-aspects were faster. Those results occurred for both self-representations retrieved from episodic memory and for representations retrieved from the semantic memory. In addition, regardless of the effect of time, greater accessibility of unobservable (vs. observable) self-aspects was associated with the episodic rather than semantic autobiographical memory. Those results were modified by neither declared trait's self-descriptiveness ( yes vs. no responses) nor by its desirability (highly desirable vs. moderately desirable traits). Implications for compatibility between how self and others are represented and for the role of self in social perception are discussed.

Method of pedestal and common-mode noise correction for switched-capacitor analog memories

DOEpatents

Britton, C.L.

1997-09-23

A method and apparatus are disclosed for correcting common-mode noise and pedestal noise in a multichannel array of switched-capacitor analog memories wherein each analog memory is connected to an associated analog-to-digital converter. The apparatus comprises a single differential element in two different embodiments. In a first embodiment, the differential element is a reference analog memory connected to a buffer. In the second embodiment, the differential dement is a reference analog memory connected to a reference analog-to-digital connected to an array of digital summing circuits. 4 figs.

Method of pedestal and common-mode noise correction for switched-capacitor analog memories

DOEpatents

Britton, C.L.

1996-12-31

A method and apparatus are disclosed for correcting common-mode noise and pedestal noise in a multichannel array of switched-capacitor analog memories wherein each analog memory is connected to an associated analog-to-digital converter. The apparatus comprises a single differential element in two different embodiments. In a first embodiment, the differential element is a reference analog memory connected to a buffer. In the second embodiment, the differential element is a reference analog memory connected to a reference analog-to-digital connected to an array of digital summing circuits. 4 figs.

Figuring fact from fiction: unbiased polling of memory T cells.

PubMed

Gerlach, Carmen; Loughhead, Scott M; von Andrian, Ulrich H

2015-05-07

Immunization generates several memory T cell subsets that differ in their migratory properties, anatomic distribution, and, hence, accessibility to investigation. In this issue, Steinert et al. demonstrate that what was believed to be a minor memory cell subset in peripheral tissues has been dramatically underestimated. Thus, current models of protective immunity require revision. Copyright © 2015 Elsevier Inc. All rights reserved.

Object Selection Costs in Visual Working Memory: A Diffusion Model Analysis of the Focus of Attention

ERIC Educational Resources Information Center

Sewell, David K.; Lilburn, Simon D.; Smith, Philip L.

2016-01-01

A central question in working memory research concerns the degree to which information in working memory is accessible to other cognitive processes (e.g., decision-making). Theories assuming that the focus of attention can only store a single object at a time require the focus to orient to a target representation before further processing can…

Reasoning and Memory: People Make Varied Use of the Information Available in Working Memory

ERIC Educational Resources Information Center

Hardman, Kyle O.; Cowan, Nelson

2016-01-01

Working memory (WM) is used for storing information in a highly accessible state so that other mental processes, such as reasoning, can use that information. Some WM tasks require that participants not only store information, but also reason about that information to perform optimally on the task. In this study, we used visual WM tasks that had…

Two Spatial Memories Are Not Better than One: Evidence of Exclusivity in Memory for Object Location

ERIC Educational Resources Information Center

Baguley, Thom; Lansdale, Mark W.; Lines, Lorna K.; Parkin, Jennifer K.

2006-01-01

This paper studies the dynamics of attempting to access two spatial memories simultaneously and its implications for the accuracy of recall. Experiment 1 demonstrates in a range of conditions that two cues pointing to different experiences of the same object location produce little or no higher recall than that observed with a single cue.…

Plated wire memory subsystem

NASA Technical Reports Server (NTRS)

Reynolds, L.; Tweed, H.

1972-01-01

The work performed entailed the design, development, construction and testing of a 4000 word by 18 bit random access, NDRO plated wire memory for use in conjunction with a spacecraft imput/output unit and central processing unit. The primary design parameters, in order of importance, were high reliability, low power, volume and weight. A single memory unit, referred to as a qualification model, was delivered.

Particle sensor array

NASA Technical Reports Server (NTRS)

Buehler, Martin G. (Inventor); Blaes, Brent R. (Inventor); Lieneweg, Udo (Inventor)

1994-01-01

A particle sensor array which in a preferred embodiment comprises a static random access memory having a plurality of ion-sensitive memory cells, each such cell comprising at least one pull-down field effect transistor having a sensitive drain surface area (such as by bloating) and at least one pull-up field effect transistor having a source connected to an offset voltage. The sensitive drain surface area and the offset voltage are selected for memory cell upset by incident ions such as alpha-particles. The static random access memory of the present invention provides a means for selectively biasing the memory cells into the same state in which each of the sensitive drain surface areas is reverse biased and then selectively reducing the reversed bias on these sensitive drain surface areas for increasing the upset sensitivity of the cells to ions. The resulting selectively sensitive memory cells can be used in a number of applications. By way of example, the present invention can be used for measuring the linear energy transfer of ion particles, as well as a device for assessing the resistance of CMOS latches to Cosmic Ray induced single event upsets. The sensor of the present invention can also be used to determine the uniformity of an ion beam.

Parity of access to memory services in London for the BAME population: a cross-sectional study.

PubMed

Cook, Laura; Mukherjee, Sujoy; McLachlan, Tim; Shah, Rajendra; Livingston, Gill; Mukadam, Naaheed

2018-03-12

To investigate whether referrals to memory services in London reflect the ethnic diversity of the population. Memory service data including referral rates of BAME was collected from London Clinical Commissioning Groups (CCGs). The expected percentage of BAME referrals using census data was compared against White British population percentages using the chi squared test. We found that within 13,166 referrals to memory services across London, the percentage of people from BAME groups was higher than would be expected (20.3 versus 19.4%; χ 2 = 39.203, d.f. = 1, p < 0.0001) indicating that generally people from BAME groups are accessing memory services. Seventy-nine percent of memory services had more referrals than expected or no significant difference for all BAME groups. When there were fewer referrals then expected, the largest difference in percentage for an individual ethnic group was 3.3%. Results are encouraging and may indicate a significant improvement in awareness of dementia and help seeking behaviour among BAME populations. Prevalence of dementia in some ethnic groups may be higher so these numbers could still indicate under-referral. Due to the data available we were unable to compare disease severity or diagnosis type.

Virtual memory support for distributed computing environments using a shared data object model

NASA Astrophysics Data System (ADS)

Huang, F.; Bacon, J.; Mapp, G.

1995-12-01

Conventional storage management systems provide one interface for accessing memory segments and another for accessing secondary storage objects. This hinders application programming and affects overall system performance due to mandatory data copying and user/kernel boundary crossings, which in the microkernel case may involve context switches. Memory-mapping techniques may be used to provide programmers with a unified view of the storage system. This paper extends such techniques to support a shared data object model for distributed computing environments in which good support for coherence and synchronization is essential. The approach is based on a microkernel, typed memory objects, and integrated coherence control. A microkernel architecture is used to support multiple coherence protocols and the addition of new protocols. Memory objects are typed and applications can choose the most suitable protocols for different types of object to avoid protocol mismatch. Low-level coherence control is integrated with high-level concurrency control so that the number of messages required to maintain memory coherence is reduced and system-wide synchronization is realized without severely impacting the system performance. These features together contribute a novel approach to the support for flexible coherence under application control.

CoNNeCT Baseband Processor Module

NASA Technical Reports Server (NTRS)

Yamamoto, Clifford K; Jedrey, Thomas C.; Gutrich, Daniel G.; Goodpasture, Richard L.

2011-01-01

A document describes the CoNNeCT Baseband Processor Module (BPM) based on an updated processor, memory technology, and field-programmable gate arrays (FPGAs). The BPM was developed from a requirement to provide sufficient computing power and memory storage to conduct experiments for a Software Defined Radio (SDR) to be implemented. The flight SDR uses the AT697 SPARC processor with on-chip data and instruction cache. The non-volatile memory has been increased from a 20-Mbit EEPROM (electrically erasable programmable read only memory) to a 4-Gbit Flash, managed by the RTAX2000 Housekeeper, allowing more programs and FPGA bit-files to be stored. The volatile memory has been increased from a 20-Mbit SRAM (static random access memory) to a 1.25-Gbit SDRAM (synchronous dynamic random access memory), providing additional memory space for more complex operating systems and programs to be executed on the SPARC. All memory is EDAC (error detection and correction) protected, while the SPARC processor implements fault protection via TMR (triple modular redundancy) architecture. Further capability over prior BPM designs includes the addition of a second FPGA to implement features beyond the resources of a single FPGA. Both FPGAs are implemented with Xilinx Virtex-II and are interconnected by a 96-bit bus to facilitate data exchange. Dedicated 1.25- Gbit SDRAMs are wired to each Xilinx FPGA to accommodate high rate data buffering for SDR applications as well as independent SpaceWire interfaces. The RTAX2000 manages scrub and configuration of each Xilinx.

An amorphous titanium dioxide metal insulator metal selector device for resistive random access memory crossbar arrays with tunable voltage margin

NASA Astrophysics Data System (ADS)

Cortese, Simone; Khiat, Ali; Carta, Daniela; Light, Mark E.; Prodromakis, Themistoklis

2016-01-01

Resistive random access memory (ReRAM) crossbar arrays have become one of the most promising candidates for next-generation non volatile memories. To become a mature technology, the sneak path current issue must be solved without compromising all the advantages that crossbars offer in terms of electrical performances and fabrication complexity. Here, we present a highly integrable access device based on nickel and sub-stoichiometric amorphous titanium dioxide (TiO2-x), in a metal insulator metal crossbar structure. The high voltage margin of 3 V, amongst the highest reported for monolayer selector devices, and the good current density of 104 A/cm2 make it suitable to sustain ReRAM read and write operations, effectively tackling sneak currents in crossbars without compromising fabrication complexity in a 1 Selector 1 Resistor (1S1R) architecture. Furthermore, the voltage margin is found to be tunable by an annealing step without affecting the device's characteristics.

A performance comparison of the IBM RS/6000 and the Astronautics ZS-1

DOE Office of Scientific and Technical Information (OSTI.GOV)

Smith, W.M.; Abraham, S.G.; Davidson, E.S.

1991-01-01

Concurrent uniprocessor architectures, of which vector and superscalar are two examples, are designed to capitalize on fine-grain parallelism. The authors have developed a performance evaluation method for comparing and improving these architectures, and in this article they present the methodology and a detailed case study of two machines. The runtime of many programs is dominated by time spent in loop constructs - for example, Fortran Do-loops. Loops generally comprise two logical processes: The access process generates addresses for memory operations while the execute process operates on floating-point data. Memory access patterns typically can be generated independently of the data inmore » the execute process. This independence allows the access process to slip ahead, thereby hiding memory latency. The IBM 360/91 was designed in 1967 to achieve slip dynamically, at runtime. One CPU unit executes integer operations while another handles floating-point operations. Other machines, including the VAX 9000 and the IBM RS/6000, use a similar approach.« less

Tuning resistance states by thickness control in an electroforming-free nanometallic complementary resistance random access memory

DOE Office of Scientific and Technical Information (OSTI.GOV)

Yang, Xiang; Lu, Yang; Lee, Jongho

2016-01-04

Tuning low resistance state is crucial for resistance random access memory (RRAM) that aims to achieve optimal read margin and design flexibility. By back-to-back stacking two nanometallic bipolar RRAMs with different thickness into a complementary structure, we have found that its low resistance can be reliably tuned over several orders of magnitude. Such high tunability originates from the exponential thickness dependence of the high resistance state of nanometallic RRAM, in which electron wave localization in a random network gives rise to the unique scaling behavior. The complementary nanometallic RRAM provides electroforming-free, multi-resistance-state, sub-100 ns switching capability with advantageous characteristics formore » memory arrays.« less

Twin-bit via resistive random access memory in 16 nm FinFET logic technologies

NASA Astrophysics Data System (ADS)

Shih, Yi-Hong; Hsu, Meng-Yin; King, Ya-Chin; Lin, Chrong Jung

2018-04-01

A via resistive random access memory (RRAM) cell fully compatible with the standard CMOS logic process has been successfully demonstrated for high-density logic nonvolatile memory (NVM) modules in advanced FinFET circuits. In this new cell, the transition metal layers are formed on both sides of a via, given two storage bits per via. In addition to its compact cell area (1T + 14 nm × 32 nm), the twin-bit via RRAM cell features a low operation voltage, a large read window, good data retention, and excellent cycling capability. As fine alignments between mask layers become possible, the twin-bit via RRAM cell is expected to be highly scalable in advanced FinFET technology.

Soft errors in commercial off-the-shelf static random access memories

NASA Astrophysics Data System (ADS)

Dilillo, L.; Tsiligiannis, G.; Gupta, V.; Bosser, A.; Saigne, F.; Wrobel, F.

2017-01-01

This article reviews state-of-the-art techniques for the evaluation of the effect of radiation on static random access memory (SRAM). We detailed irradiation test techniques and results from irradiation experiments with several types of particles. Two commercial SRAMs, in 90 and 65 nm technology nodes, were considered as case studies. Besides the basic static and dynamic test modes, advanced stimuli for the irradiation tests were introduced, as well as statistical post-processing techniques allowing for deeper analysis of the correlations between bit-flip cross-sections and design/architectural characteristics of the memory device. Further insight is provided on the response of irradiated stacked layer devices and on the use of characterized SRAM devices as particle detectors.

A 300MHz Embedded Flash Memory with Pipeline Architecture and Offset-Free Sense Amplifiers for Dual-Core Automotive Microcontrollers

NASA Astrophysics Data System (ADS)

Kajiyama, Shinya; Fujito, Masamichi; Kasai, Hideo; Mizuno, Makoto; Yamaguchi, Takanori; Shinagawa, Yutaka

A novel 300MHz embedded flash memory for dual-core microcontrollers with a shared ROM architecture is proposed. One of its features is a three-stage pipeline read operation, which enables reduced access pitch and therefore reduces performance penalty due to conflict of shared ROM accesses. Another feature is a highly sensitive sense amplifier that achieves efficient pipeline operation with two-cycle latency one-cycle pitch as a result of a shortened sense time of 0.63ns. The combination of the pipeline architecture and proposed sense amplifiers significantly reduces access-conflict penalties with shared ROM and enhances performance of 32-bit RISC dual-core microcontrollers by 30%.

45 CFR 2490.150 - Program accessibility: Existing facilities.

Code of Federal Regulations, 2010 CFR

2010-10-01

... ACTIVITIES CONDUCTED BY THE JAMES MADISON MEMORIAL FELLOWSHIP FOUNDATION § 2490.150 Program accessibility: Existing facilities. (a) General. The agency shall operate each program or activity so that the program or activity, when viewed in its entirety, is readily accessible to and usable by individuals with handicaps...

Working Memory Underpins Cognitive Development, Learning, and Education

PubMed Central

Cowan, Nelson

2014-01-01

Working memory is the retention of a small amount of information in a readily accessible form. It facilitates planning, comprehension, reasoning, and problem-solving. I examine the historical roots and conceptual development of the concept and the theoretical and practical implications of current debates about working memory mechanisms. Then I explore the nature of cognitive developmental improvements in working memory, the role of working memory in learning, and some potential implications of working memory and its development for the education of children and adults. The use of working memory is quite ubiquitous in human thought, but the best way to improve education using what we know about working memory is still controversial. I hope to provide some directions for research and educational practice. PMID:25346585

Reprogrammable read only variable threshold transistor memory with isolated addressing buffer

DOEpatents

Lodi, Robert J.

1976-01-01

A monolithic integrated circuit, fully decoded memory comprises a rectangular array of variable threshold field effect transistors organized into a plurality of multi-bit words. Binary address inputs to the memory are decoded by a field effect transistor decoder into a plurality of word selection lines each of which activates an address buffer circuit. Each address buffer circuit, in turn, drives a word line of the memory array. In accordance with the word line selected by the decoder the activated buffer circuit directs reading or writing voltages to the transistors comprising the memory words. All of the buffer circuits additionally are connected to a common terminal for clearing all of the memory transistors to a predetermined state by the application to the common terminal of a large magnitude voltage of a predetermined polarity. The address decoder, the buffer and the memory array, as well as control and input/output control and buffer field effect transistor circuits, are fabricated on a common substrate with means provided to isolate the substrate of the address buffer transistors from the remainder of the substrate so that the bulk clearing function of simultaneously placing all of the memory transistors into a predetermined state can be performed.

The Earth Data Analytic Services (EDAS) Framework

NASA Astrophysics Data System (ADS)

Maxwell, T. P.; Duffy, D.

2017-12-01

Faced with unprecedented growth in earth data volume and demand, NASA has developed the Earth Data Analytic Services (EDAS) framework, a high performance big data analytics framework built on Apache Spark. This framework enables scientists to execute data processing workflows combining common analysis operations close to the massive data stores at NASA. The data is accessed in standard (NetCDF, HDF, etc.) formats in a POSIX file system and processed using vetted earth data analysis tools (ESMF, CDAT, NCO, etc.). EDAS utilizes a dynamic caching architecture, a custom distributed array framework, and a streaming parallel in-memory workflow for efficiently processing huge datasets within limited memory spaces with interactive response times. EDAS services are accessed via a WPS API being developed in collaboration with the ESGF Compute Working Team to support server-side analytics for ESGF. The API can be accessed using direct web service calls, a Python script, a Unix-like shell client, or a JavaScript-based web application. New analytic operations can be developed in Python, Java, or Scala (with support for other languages planned). Client packages in Python, Java/Scala, or JavaScript contain everything needed to build and submit EDAS requests. The EDAS architecture brings together the tools, data storage, and high-performance computing required for timely analysis of large-scale data sets, where the data resides, to ultimately produce societal benefits. It is is currently deployed at NASA in support of the Collaborative REAnalysis Technical Environment (CREATE) project, which centralizes numerous global reanalysis datasets onto a single advanced data analytics platform. This service enables decision makers to compare multiple reanalysis datasets and investigate trends, variability, and anomalies in earth system dynamics around the globe.

Complex dynamics of semantic memory access in reading.

PubMed

Baggio, Giosué; Fonseca, André

2012-02-07

Understanding a word in context relies on a cascade of perceptual and conceptual processes, starting with modality-specific input decoding, and leading to the unification of the word's meaning into a discourse model. One critical cognitive event, turning a sensory stimulus into a meaningful linguistic sign, is the access of a semantic representation from memory. Little is known about the changes that activating a word's meaning brings about in cortical dynamics. We recorded the electroencephalogram (EEG) while participants read sentences that could contain a contextually unexpected word, such as 'cold' in 'In July it is very cold outside'. We reconstructed trajectories in phase space from single-trial EEG time series, and we applied three nonlinear measures of predictability and complexity to each side of the semantic access boundary, estimated as the onset time of the N400 effect evoked by critical words. Relative to controls, unexpected words were associated with larger prediction errors preceding the onset of the N400. Accessing the meaning of such words produced a phase transition to lower entropy states, in which cortical processing becomes more predictable and more regular. Our study sheds new light on the dynamics of information flow through interfaces between sensory and memory systems during language processing.

Episodic memories.

PubMed

Conway, Martin A

2009-09-01

An account of episodic memories is developed that focuses on the types of knowledge they represent, their properties, and the functions they might serve. It is proposed that episodic memories consist of episodic elements, summary records of experience often in the form of visual images, associated to a conceptual frame that provides a conceptual context. Episodic memories are embedded in a more complex conceptual system in which they can become the basis of autobiographical memories. However, the function of episodic memories is to keep a record of progress with short-term goals and access to most episodic memories is lost soon after their formation. Finally, it is suggested that developmentally episodic memories form the basis of the conceptual system and it is from sets of episodic memories that early non-verbal conceptual knowledge is abstracted.

Dopamine D1 Sensitivity in the Prefrontal Cortex Predicts General Cognitive Abilities and is Modulated by Working Memory Training

ERIC Educational Resources Information Center

Wass, Christopher; Pizzo, Alessandro; Sauce, Bruno; Kawasumi, Yushi; Sturzoiu, Tudor; Ree, Fred; Otto, Tim; Matzel, Louis D.

2013-01-01

A common source of variance (i.e., "general intelligence") underlies an individual's performance across diverse tests of cognitive ability, and evidence indicates that the processing efficacy of working memory may serve as one such source of common variance. One component of working memory, selective attention, has been reported to…

Functional retrograde amnesia: a quantitative case study.

PubMed

Schacter, D L; Wang, P L; Tulving, E; Freedman, M

1982-01-01

The memory impairment of a patient suffering from functional retrograde amnesia was assessed both during the amnesic episode and after its termination. The patient's performance on a task tapping semantic memory was nearly identical on the two test occasions, but his performance on a task tapping episodic memory substantially changed across test sessions. Cueing procedures revealed that in spite of the patient's restricted access to episodic memory during the amnesic period, a relatively intact "island" of episodic memories could be uncovered. The distinction between episodic and semantic memory, as well as the relation between organic and functional retrograde amnesia, are discussed in light of the case study.

The removal of information from working memory.

PubMed

Lewis-Peacock, Jarrod A; Kessler, Yoav; Oberauer, Klaus

2018-05-09

What happens to goal-relevant information in working memory after it is no longer needed? Here, we review evidence for a selective removal process that operates on outdated information to limit working memory load and hence facilitates the maintenance of goal-relevant information. Removal alters the representations of irrelevant content so as to reduce access to it, thereby improving access to the remaining relevant content and also facilitating the encoding of new information. Both behavioral and neural evidence support the existence of a removal process that is separate from forgetting due to decay or interference. We discuss the potential mechanisms involved in removal and characterize the time course and duration of the process. In doing so, we propose the existence of two forms of removal: one is temporary, and reversible, which modifies working memory content without impacting content-to-context bindings, and another is permanent, which unbinds the content from its context in working memory (without necessarily impacting long-term forgetting). Finally, we discuss limitations on removal and prescribe conditions for evaluating evidence for or against this process. © 2018 New York Academy of Sciences.

Optimizing NEURON Simulation Environment Using Remote Memory Access with Recursive Doubling on Distributed Memory Systems.

PubMed

Shehzad, Danish; Bozkuş, Zeki

2016-01-01

Increase in complexity of neuronal network models escalated the efforts to make NEURON simulation environment efficient. The computational neuroscientists divided the equations into subnets amongst multiple processors for achieving better hardware performance. On parallel machines for neuronal networks, interprocessor spikes exchange consumes large section of overall simulation time. In NEURON for communication between processors Message Passing Interface (MPI) is used. MPI_Allgather collective is exercised for spikes exchange after each interval across distributed memory systems. The increase in number of processors though results in achieving concurrency and better performance but it inversely affects MPI_Allgather which increases communication time between processors. This necessitates improving communication methodology to decrease the spikes exchange time over distributed memory systems. This work has improved MPI_Allgather method using Remote Memory Access (RMA) by moving two-sided communication to one-sided communication, and use of recursive doubling mechanism facilitates achieving efficient communication between the processors in precise steps. This approach enhanced communication concurrency and has improved overall runtime making NEURON more efficient for simulation of large neuronal network models.

Optimizing NEURON Simulation Environment Using Remote Memory Access with Recursive Doubling on Distributed Memory Systems

PubMed Central

Bozkuş, Zeki

2016-01-01

Increase in complexity of neuronal network models escalated the efforts to make NEURON simulation environment efficient. The computational neuroscientists divided the equations into subnets amongst multiple processors for achieving better hardware performance. On parallel machines for neuronal networks, interprocessor spikes exchange consumes large section of overall simulation time. In NEURON for communication between processors Message Passing Interface (MPI) is used. MPI_Allgather collective is exercised for spikes exchange after each interval across distributed memory systems. The increase in number of processors though results in achieving concurrency and better performance but it inversely affects MPI_Allgather which increases communication time between processors. This necessitates improving communication methodology to decrease the spikes exchange time over distributed memory systems. This work has improved MPI_Allgather method using Remote Memory Access (RMA) by moving two-sided communication to one-sided communication, and use of recursive doubling mechanism facilitates achieving efficient communication between the processors in precise steps. This approach enhanced communication concurrency and has improved overall runtime making NEURON more efficient for simulation of large neuronal network models. PMID:27413363

Accessing sparse arrays in parallel memories

DOE Office of Scientific and Technical Information (OSTI.GOV)

Banerjee, U.; Gajski, D.; Kuck, D.

The concept of dense and sparse execution of arrays is introduced. Arrays themselves can be stored in a dense or sparse manner in a parallel memory with m memory modules. The paper proposes hardware for speeding up the execution of array operations of the form c(c/sub 0/+ci)=a(a/sub 0/+ai) op b(b/sub 0/+bi), where a/sub 0/, a, b/sub 0/, b, c/sub 0/, c are integer constants and i is an index variable. The hardware handles 'sparse execution', in which the operation op is not executed for every value of i. The hardware also makes provision for 'sparse storage', in which memory spacemore » is not provided for every array element. It is shown how to access array elements of the above form without conflict in an efficient way. The efficiency is obtained by using some specialised units which are basically smart memories with priority detection, one's counting or associative searching. Generalisation to multidimensional arrays is shown possible under restrictions defined in the paper. 12 references.« less

Flexible Peripheral Component Interconnect Input/Output Card

NASA Technical Reports Server (NTRS)

Bigelow, Kirk K.; Jerry, Albert L.; Baricio, Alisha G.; Cummings, Jon K.

2010-01-01

The Flexible Peripheral Component Interconnect (PCI) Input/Output (I/O) Card is an innovative circuit board that provides functionality to interface between a variety of devices. It supports user-defined interrupts for interface synchronization, tracks system faults and failures, and includes checksum and parity evaluation of interface data. The card supports up to 16 channels of high-speed, half-duplex, low-voltage digital signaling (LVDS) serial data, and can interface combinations of serial and parallel devices. Placement of a processor within the field programmable gate array (FPGA) controls an embedded application with links to host memory over its PCI bus. The FPGA also provides protocol stacking and quick digital signal processor (DSP) functions to improve host performance. Hardware timers, counters, state machines, and other glue logic support interface communications. The Flexible PCI I/O Card provides an interface for a variety of dissimilar computer systems, featuring direct memory access functionality. The card has the following attributes: 8/16/32-bit, 33-MHz PCI r2.2 compliance, Configurable for universal 3.3V/5V interface slots, PCI interface based on PLX Technology's PCI9056 ASIC, General-use 512K 16 SDRAM memory, General-use 1M 16 Flash memory, FPGA with 3K to 56K logical cells with embedded 27K to 198K bits RAM, I/O interface: 32-channel LVDS differential transceivers configured in eight, 4-bit banks; signaling rates to 200 MHz per channel, Common SCSI-3, 68-pin interface connector.

On the Efficacy of Source Code Optimizations for Cache-Based Systems

NASA Technical Reports Server (NTRS)

VanderWijngaart, Rob F.; Saphir, William C.

1998-01-01

Obtaining high performance without machine-specific tuning is an important goal of scientific application programmers. Since most scientific processing is done on commodity microprocessors with hierarchical memory systems, this goal of "portable performance" can be achieved if a common set of optimization principles is effective for all such systems. It is widely believed, or at least hoped, that portable performance can be realized. The rule of thumb for optimization on hierarchical memory systems is to maximize temporal and spatial locality of memory references by reusing data and minimizing memory access stride. We investigate the effects of a number of optimizations on the performance of three related kernels taken from a computational fluid dynamics application. Timing the kernels on a range of processors, we observe an inconsistent and often counterintuitive impact of the optimizations on performance. In particular, code variations that have a positive impact on one architecture can have a negative impact on another, and variations expected to be unimportant can produce large effects. Moreover, we find that cache miss rates - as reported by a cache simulation tool, and confirmed by hardware counters - only partially explain the results. By contrast, the compiler-generated assembly code provides more insight by revealing the importance of processor-specific instructions and of compiler maturity, both of which strongly, and sometimes unexpectedly, influence performance. We conclude that it is difficult to obtain performance portability on modern cache-based computers, and comment on the implications of this result.

On the Efficacy of Source Code Optimizations for Cache-Based Systems

NASA Technical Reports Server (NTRS)

VanderWijngaart, Rob F.; Saphir, William C.; Saini, Subhash (Technical Monitor)

1998-01-01

Obtaining high performance without machine-specific tuning is an important goal of scientific application programmers. Since most scientific processing is done on commodity microprocessors with hierarchical memory systems, this goal of "portable performance" can be achieved if a common set of optimization principles is effective for all such systems. It is widely believed, or at least hoped, that portable performance can be realized. The rule of thumb for optimization on hierarchical memory systems is to maximize temporal and spatial locality of memory references by reusing data and minimizing memory access stride. We investigate the effects of a number of optimizations on the performance of three related kernels taken from a computational fluid dynamics application. Timing the kernels on a range of processors, we observe an inconsistent and often counterintuitive impact of the optimizations on performance. In particular, code variations that have a positive impact on one architecture can have a negative impact on another, and variations expected to be unimportant can produce large effects. Moreover, we find that cache miss rates-as reported by a cache simulation tool, and confirmed by hardware counters-only partially explain the results. By contrast, the compiler-generated assembly code provides more insight by revealing the importance of processor-specific instructions and of compiler maturity, both of which strongly, and sometimes unexpectedly, influence performance. We conclude that it is difficult to obtain performance portability on modern cache-based computers, and comment on the implications of this result.

Microcontroller for automation application

NASA Technical Reports Server (NTRS)

Cooper, H. W.

1975-01-01

The description of a microcontroller currently being developed for automation application was given. It is basically an 8-bit microcomputer with a 40K byte random access memory/read only memory, and can control a maximum of 12 devices through standard 15-line interface ports.

Gateway Arch Circulator Conceptual Feasibility Study : Jefferson National Expansion Memorial

DOT National Transportation Integrated Search

2015-03-01

The Jefferson National Expansion Memorial (JEFF) is undergoing major design changes as part of the City Arch River 2015 project (CAR) that will impact access for park visitors. The park and stakeholders are considering a circulator system to facilita...

No Evidence for an Item Limit in Change Detection (Open Access)

DTIC Science & Technology

2013-02-28

memory : a reconsideration of mental storage capacity. Behav Brain Sci 24: 87–114. 17. Eng HY, Chen D, Jiang Y (2005) Visual working memory for simple...working memory can hold no more than a fixed number of items (‘‘item-limit models’’). Recent findings force us to consider the alternative view that working... memory is limited by the precision in stimulus encoding, with mean precision decreasing with increasing set size (‘‘continuous-resource models

Plated wire memory subsystem

NASA Technical Reports Server (NTRS)

Carpenter, K. H.

1974-01-01

The design, construction, and test history of a 4096 word by 18 bit random access NDRO Plated Wire Memory for use in conjunction with a spacecraft input/output and central processing unit is reported. A technical and functional description is given along with diagrams illustrating layout and systems operation. Test data is shown on the procedures and results of system level and memory stack testing, and hybrid circuit screening. A comparison of the most significant physical and performance characteristics of the memory unit versus the specified requirements is also included.

Design of a magnetic-tunnel-junction-oriented nonvolatile lookup table circuit with write-operation-minimized data shifting

NASA Astrophysics Data System (ADS)

Suzuki, Daisuke; Hanyu, Takahiro

2018-04-01

A magnetic-tunnel-junction (MTJ)-oriented nonvolatile lookup table (LUT) circuit, in which a low-power data-shift function is performed by minimizing the number of write operations in MTJ devices is proposed. The permutation of the configuration memory cell for read/write access is performed as opposed to conventional direct data shifting to minimize the number of write operations, which results in significant write energy savings in the data-shift function. Moreover, the hardware cost of the proposed LUT circuit is small since the selector is shared between read access and write access. In fact, the power consumption in the data-shift function and the transistor count are reduced by 82 and 52%, respectively, compared with those in a conventional static random-access memory-based implementation using a 90 nm CMOS technology.

Interference from mere thinking: mental rehearsal temporarily disrupts recall of motor memory.

PubMed

Yin, Cong; Wei, Kunlin

2014-08-01

Interference between successively learned tasks is widely investigated to study motor memory. However, how simultaneously learned motor memories interact with each other has been rarely studied despite its prevalence in daily life. Assuming that motor memory shares common neural mechanisms with declarative memory system, we made unintuitive predictions that mental rehearsal, as opposed to further practice, of one motor memory will temporarily impair the recall of another simultaneously learned memory. Subjects simultaneously learned two sensorimotor tasks, i.e., visuomotor rotation and gain. They retrieved one memory by either practice or mental rehearsal and then had their memory evaluated. We found that mental rehearsal, instead of execution, impaired the recall of unretrieved memory. This impairment was content-independent, i.e., retrieving either gain or rotation impaired the other memory. Hence, conscious recollection of one motor memory interferes with the recall of another memory. This is analogous to retrieval-induced forgetting in declarative memory, suggesting a common neural process across memory systems. Our findings indicate that motor imagery is sufficient to induce interference between motor memories. Mental rehearsal, currently widely regarded as beneficial for motor performance, negatively affects memory recall when it is exercised for a subset of memorized items. Copyright © 2014 the American Physiological Society.

Psychological Processes Underlying Cultivation Effects: Further Tests of Construct Accessibility.

ERIC Educational Resources Information Center

Shrum, L. J.

1996-01-01

Describes a study that tested whether the accessibility of information in memory mediates the cultivation effect (the effect of television viewing on social perceptions), consistent with the availability heuristic. Shows that heavy viewers gave higher frequency estimates (cultivation effect) and responded faster (accessibility effect) than did…

Making the Stranger's Path Familiar: Environmental Communication that Turns Access into Participation

ERIC Educational Resources Information Center

Adelman, Clifford

2005-01-01

Visitors to the FDR Memorial in Washington, D.C., enter the area through ceremonial openings: from the pathway around the reflecting pond of the Jefferson Memorial, or across a small shaded plaza reached from a roadway parallel to the Potomac River. The FDR Memorial itself cannot be seen at the start of either of these paths. It is out there…

FPGA Vision Data Architecture

NASA Technical Reports Server (NTRS)

Morfopoulos, Arin C.; Pham, Thang D.

2013-01-01

JPL has produced a series of FPGA (field programmable gate array) vision algorithms that were written with custom interfaces to get data in and out of each vision module. Each module has unique requirements on the data interface, and further vision modules are continually being developed, each with their own custom interfaces. Each memory module had also been designed for direct access to memory or to another memory module.

Trinary Associative Memory Would Recognize Machine Parts

NASA Technical Reports Server (NTRS)

Liu, Hua-Kuang; Awwal, Abdul Ahad S.; Karim, Mohammad A.

1991-01-01

Trinary associative memory combines merits and overcomes major deficiencies of unipolar and bipolar logics by combining them in three-valued logic that reverts to unipolar or bipolar binary selectively, as needed to perform specific tasks. Advantage of associative memory: one obtains access to all parts of it simultaneously on basis of content, rather than address, of data. Consequently, used to exploit fully parallelism and speed of optical computing.

Cache directory look-up re-use as conflict check mechanism for speculative memory requests

DOEpatents

Ohmacht, Martin

2013-09-10

In a cache memory, energy and other efficiencies can be realized by saving a result of a cache directory lookup for sequential accesses to a same memory address. Where the cache is a point of coherence for speculative execution in a multiprocessor system, with directory lookups serving as the point of conflict detection, such saving becomes particularly advantageous.

An FPGA-Based Test-Bed for Reliability and Endurance Characterization of Non-Volatile Memory

NASA Technical Reports Server (NTRS)

Rao, Vikram; Patel, Jagdish; Patel, Janak; Namkung, Jeffrey

2001-01-01

Memory technologies are divided into two categories. The first category, nonvolatile memories, are traditionally used in read-only or read-mostly applications because of limited write endurance and slow write speed. These memories are derivatives of read only memory (ROM) technology, which includes erasable programmable ROM (EPROM), electrically-erasable programmable ROM (EEPROM), Flash, and more recent ferroelectric non-volatile memory technology. Nonvolatile memories are able to retain data in the absence of power. The second category, volatile memories, are random access memory (RAM) devices including SRAM and DRAM. Writing to these memories is fast and write endurance is unlimited, so they are most often used to store data that change frequently, but they cannot store data in the absence of power. Nonvolatile memory technologies with better future potential are FRAM, Chalcogenide, GMRAM, Tunneling MRAM, and Silicon-Oxide-Nitride-Oxide-Silicon (SONOS) EEPROM.

The Role of Inhibition in Age-related Off-Topic Verbosity: Not Access but Deletion and Restraint Functions

PubMed Central

Yin, Shufei; Peng, Huamao

2016-01-01

The speech of older adults is commonly described as verbose and off-topic, which is thought to influence their social communication. This study investigated the role of inhibition in age-related off-topic verbosity (OTV). Inhibition consists of three functions: access, deletion, and restraint. The access function is responsible for preventing irrelevant information from accessing the attention center (pre-mechanism of inhibition); The deletion function is responsible for deleting previously relevant but currently irrelevant information from working memory, and the restraint function is responsible for restraining strong but inappropriate responses (post-mechanisms of inhibition). A referential communication task was used to determine whether OTV was influenced by the pre-mechanism of inhibition. A self-involved event interview task was used to investigate the effect of the post-mechanisms of inhibition on OTV. Results showed that the OTV of the elderly participants was associated with an age-related decline in the post-mechanisms of inhibition, while the OTV exhibited by young adults was most likely due to deficits in the pre-mechanism function of inhibition. This research contributed to fill gaps in the existing knowledge about the potential relationship between specific functions of inhibition and age-related OTV. PMID:27199793

Adoptive Transfer of Interleukin-21-stimulated Human CD8+ T Memory Stem Cells Efficiently Inhibits Tumor Growth.

PubMed

Chen, Yingshi; Yu, Fei; Jiang, Yawen; Chen, Jingliang; Wu, Kang; Chen, Xinxin; Lin, Yingtong; Zhang, Hui; Li, Linghua; Zhang, Yiwen

2018-05-01

Memory stem T (TSCM) cells, a new subset of memory T cells with self-renewal and multipotent capacities, are considered as a promising candidates for adoptive cellular therapy. However, the low proportion of human TSCM cells in total CD8 T cells limits their utility. Here, we aimed to induce human CD8 TSCM cells by stimulating naive precursors with interleukin-21 (IL-21). We found that IL-21 promoted the generation of TSCM cells, described as CD45RACD45ROCD62LCCR7CD122CD95 cells, with a higher efficiency than that observed with other common γ-chain cytokines. Upon adoptive transfer into an A375 melanoma mouse model, these lymphocytes mediated much stronger antitumor responses. Further mechanistic analysis revealed that IL-21 activated the Janus kinase signal transducer and activator of transcription 3 pathway by upregulating signal transducer and activator of transcription 3 phosphorylation and consequently promoting the expression of T-bet and suppressor of cytokine signaling 1, but decreasing the expression of eomesodermin and GATA binding protein 3. Our findings provide novel insights into the generation of human CD8 TSCM cells and reveal a novel potential clinical application of IL-21.This is an open-access article distributed under the terms of the Creative Commons Attribution-Non Commercial-No Derivatives License 4.0 (CCBY-NC-ND), where it is permissible to download and share the work provided it is properly cited. The work cannot be changed in any way or used commercially without permission from the journal. http://creativecommons.org/licenses/by-nc-nd/4.0/.

45 CFR 2490.149 - Program accessibility: Discrimination prohibited.

Code of Federal Regulations, 2014 CFR

2014-10-01

.... 2490.149 Section 2490.149 Public Welfare Regulations Relating to Public Welfare (Continued) JAMES MADISON MEMORIAL FELLOWSHIP FOUNDATION ENFORCEMENT OF NONDISCRIMINATION ON THE BASIS OF HANDICAP IN PROGRAMS OR ACTIVITIES CONDUCTED BY THE JAMES MADISON MEMORIAL FELLOWSHIP FOUNDATION § 2490.149 Program...

45 CFR 2490.149 - Program accessibility: Discrimination prohibited.

Code of Federal Regulations, 2013 CFR

2013-10-01

.... 2490.149 Section 2490.149 Public Welfare Regulations Relating to Public Welfare (Continued) JAMES MADISON MEMORIAL FELLOWSHIP FOUNDATION ENFORCEMENT OF NONDISCRIMINATION ON THE BASIS OF HANDICAP IN PROGRAMS OR ACTIVITIES CONDUCTED BY THE JAMES MADISON MEMORIAL FELLOWSHIP FOUNDATION § 2490.149 Program...

45 CFR 2490.149 - Program accessibility: Discrimination prohibited.

Code of Federal Regulations, 2012 CFR

2012-10-01

.... 2490.149 Section 2490.149 Public Welfare Regulations Relating to Public Welfare (Continued) JAMES MADISON MEMORIAL FELLOWSHIP FOUNDATION ENFORCEMENT OF NONDISCRIMINATION ON THE BASIS OF HANDICAP IN PROGRAMS OR ACTIVITIES CONDUCTED BY THE JAMES MADISON MEMORIAL FELLOWSHIP FOUNDATION § 2490.149 Program...

45 CFR 2490.149 - Program accessibility: Discrimination prohibited.

Code of Federal Regulations, 2011 CFR

2011-10-01

.... 2490.149 Section 2490.149 Public Welfare Regulations Relating to Public Welfare (Continued) JAMES MADISON MEMORIAL FELLOWSHIP FOUNDATION ENFORCEMENT OF NONDISCRIMINATION ON THE BASIS OF HANDICAP IN PROGRAMS OR ACTIVITIES CONDUCTED BY THE JAMES MADISON MEMORIAL FELLOWSHIP FOUNDATION § 2490.149 Program...

45 CFR 2490.149 - Program accessibility: Discrimination prohibited.

Code of Federal Regulations, 2010 CFR

2010-10-01

.... 2490.149 Section 2490.149 Public Welfare Regulations Relating to Public Welfare (Continued) JAMES MADISON MEMORIAL FELLOWSHIP FOUNDATION ENFORCEMENT OF NONDISCRIMINATION ON THE BASIS OF HANDICAP IN PROGRAMS OR ACTIVITIES CONDUCTED BY THE JAMES MADISON MEMORIAL FELLOWSHIP FOUNDATION § 2490.149 Program...

Accessibility limits recall from visual working memory.

PubMed

Rajsic, Jason; Swan, Garrett; Wilson, Daryl E; Pratt, Jay

2017-09-01

In this article, we demonstrate limitations of accessibility of information in visual working memory (VWM). Recently, cued-recall has been used to estimate the fidelity of information in VWM, where the feature of a cued object is reproduced from memory (Bays, Catalao, & Husain, 2009; Wilken & Ma, 2004; Zhang & Luck, 2008). Response error in these tasks has been largely studied with respect to failures of encoding and maintenance; however, the retrieval operations used in these tasks remain poorly understood. By varying the number and type of object features provided as a cue in a visual delayed-estimation paradigm, we directly assess the nature of retrieval errors in delayed estimation from VWM. Our results demonstrate that providing additional object features in a single cue reliably improves recall, largely by reducing swap, or misbinding, responses. In addition, performance simulations using the binding pool model (Swan & Wyble, 2014) were able to mimic this pattern of performance across a large span of parameter combinations, demonstrating that the binding pool provides a possible mechanism underlying this pattern of results that is not merely a symptom of one particular parametrization. We conclude that accessing visual working memory is a noisy process, and can lead to errors over and above those of encoding and maintenance limitations. (PsycINFO Database Record (c) 2017 APA, all rights reserved).

The storage system of PCM based on random access file system

NASA Astrophysics Data System (ADS)

Han, Wenbing; Chen, Xiaogang; Zhou, Mi; Li, Shunfen; Li, Gezi; Song, Zhitang

2016-10-01

Emerging memory technologies such as Phase change memory (PCM) tend to offer fast, random access to persistent storage with better scalability. It's a hot topic of academic and industrial research to establish PCM in storage hierarchy to narrow the performance gap. However, the existing file systems do not perform well with the emerging PCM storage, which access storage medium via a slow, block-based interface. In this paper, we propose a novel file system, RAFS, to bring about good performance of PCM, which is built in the embedded platform. We attach PCM chips to the memory bus and build RAFS on the physical address space. In the proposed file system, we simplify traditional system architecture to eliminate block-related operations and layers. Furthermore, we adopt memory mapping and bypassed page cache to reduce copy overhead between the process address space and storage device. XIP mechanisms are also supported in RAFS. To the best of our knowledge, we are among the first to implement file system on real PCM chips. We have analyzed and evaluated its performance with IOZONE benchmark tools. Our experimental results show that the RAFS on PCM outperforms Ext4fs on SDRAM with small record lengths. Based on DRAM, RAFS is significantly faster than Ext4fs by 18% to 250%.

Distributed shared memory for roaming large volumes.

PubMed

Castanié, Laurent; Mion, Christophe; Cavin, Xavier; Lévy, Bruno

2006-01-01

We present a cluster-based volume rendering system for roaming very large volumes. This system allows to move a gigabyte-sized probe inside a total volume of several tens or hundreds of gigabytes in real-time. While the size of the probe is limited by the total amount of texture memory on the cluster, the size of the total data set has no theoretical limit. The cluster is used as a distributed graphics processing unit that both aggregates graphics power and graphics memory. A hardware-accelerated volume renderer runs in parallel on the cluster nodes and the final image compositing is implemented using a pipelined sort-last rendering algorithm. Meanwhile, volume bricking and volume paging allow efficient data caching. On each rendering node, a distributed hierarchical cache system implements a global software-based distributed shared memory on the cluster. In case of a cache miss, this system first checks page residency on the other cluster nodes instead of directly accessing local disks. Using two Gigabit Ethernet network interfaces per node, we accelerate data fetching by a factor of 4 compared to directly accessing local disks. The system also implements asynchronous disk access and texture loading, which makes it possible to overlap data loading, volume slicing and rendering for optimal volume roaming.

Low power consumption resistance random access memory with Pt/InOx/TiN structure

NASA Astrophysics Data System (ADS)

Yang, Jyun-Bao; Chang, Ting-Chang; Huang, Jheng-Jie; Chen, Yu-Ting; Tseng, Hsueh-Chih; Chu, Ann-Kuo; Sze, Simon M.; Tsai, Ming-Jinn

2013-09-01

In this study, the resistance switching characteristics of a resistive random access memory device with Pt/InOx/TiN structure is investigated. Unstable bipolar switching behavior is observed during the initial switching cycle, which then stabilizes after several switching cycles. Analyses indicate that the current conduction mechanism in the resistance state is dominated by Ohmic conduction. The decrease in electrical conductance can be attributed to the reduction of the cross-sectional area of the conduction path. Furthermore, the device exhibits low operation voltage and power consumption.

Lowering data retention voltage in static random access memory array by post fabrication self-improvement of cell stability by multiple stress application

NASA Astrophysics Data System (ADS)

Mizutani, Tomoko; Takeuchi, Kiyoshi; Saraya, Takuya; Kobayashi, Masaharu; Hiramoto, Toshiro

2018-04-01

We propose a new version of the post fabrication static random access memory (SRAM) self-improvement technique, which utilizes multiple stress application. It is demonstrated that, using a device matrix array (DMA) test element group (TEG) with intrinsic channel fully depleted (FD) silicon-on-thin-buried-oxide (SOTB) six-transistor (6T) SRAM cells fabricated by the 65 nm technology, the lowering of data retention voltage (DRV) is more effectively achieved than using the previously proposed single stress technique.

The Relationships of Working Memory, Secondary Memory, and General Fluid Intelligence: Working Memory Is Special

ERIC Educational Resources Information Center

Shelton, Jill Talley; Elliott, Emily M.; Matthews, Russell A.; Hill, B. D.; Gouvier, Wm. Drew

2010-01-01

Recent efforts have been made to elucidate the commonly observed link between working memory and reasoning ability. The results have been inconsistent, with some work suggesting that the emphasis placed on retrieval from secondary memory by working memory tests is the driving force behind this association (Mogle, Lovett, Stawski, & Sliwinski,…

Relational Memory Is Evident in Eye Movement Behavior despite the Use of Subliminal Testing Methods.

PubMed

Nickel, Allison E; Henke, Katharina; Hannula, Deborah E

2015-01-01

While it is generally agreed that perception can occur without awareness, there continues to be debate about the type of representational content that is accessible when awareness is minimized or eliminated. Most investigations that have addressed this issue evaluate access to well-learned representations. Far fewer studies have evaluated whether or not associations encountered just once prior to testing might also be accessed and influence behavior. Here, eye movements were used to examine whether or not memory for studied relationships is evident following the presentation of subliminal cues. Participants assigned to experimental or control groups studied scene-face pairs and test trials evaluated implicit and explicit memory for these pairs. Each test trial began with a subliminal scene cue, followed by three visible studied faces. For experimental group participants, one face was the studied associate of the scene (implicit test); for controls none were a match. Subsequently, the display containing a match was presented to both groups, but now it was preceded by a visible scene cue (explicit test). Eye movements were recorded and recognition memory responses were made. Participants in the experimental group looked disproportionately at matching faces on implicit test trials and participants from both groups looked disproportionately at matching faces on explicit test trials, even when that face had not been successfully identified as the associate. Critically, implicit memory-based viewing effects seemed not to depend on residual awareness of subliminal scene cues, as subjective and objective measures indicated that scenes were successfully masked from view. The reported outcomes indicate that memory for studied relationships can be expressed in eye movement behavior without awareness.

Relational Memory Is Evident in Eye Movement Behavior despite the Use of Subliminal Testing Methods

PubMed Central

Nickel, Allison E.; Henke, Katharina; Hannula, Deborah E.

2015-01-01

While it is generally agreed that perception can occur without awareness, there continues to be debate about the type of representational content that is accessible when awareness is minimized or eliminated. Most investigations that have addressed this issue evaluate access to well-learned representations. Far fewer studies have evaluated whether or not associations encountered just once prior to testing might also be accessed and influence behavior. Here, eye movements were used to examine whether or not memory for studied relationships is evident following the presentation of subliminal cues. Participants assigned to experimental or control groups studied scene-face pairs and test trials evaluated implicit and explicit memory for these pairs. Each test trial began with a subliminal scene cue, followed by three visible studied faces. For experimental group participants, one face was the studied associate of the scene (implicit test); for controls none were a match. Subsequently, the display containing a match was presented to both groups, but now it was preceded by a visible scene cue (explicit test). Eye movements were recorded and recognition memory responses were made. Participants in the experimental group looked disproportionately at matching faces on implicit test trials and participants from both groups looked disproportionately at matching faces on explicit test trials, even when that face had not been successfully identified as the associate. Critically, implicit memory-based viewing effects seemed not to depend on residual awareness of subliminal scene cues, as subjective and objective measures indicated that scenes were successfully masked from view. The reported outcomes indicate that memory for studied relationships can be expressed in eye movement behavior without awareness. PMID:26512726

New uses of hypnosis in the treatment of posttraumatic stress disorder.

PubMed

Spiegel, D; Cardena, E

1990-10-01

Hypnosis is associated with the treatment of posttraumatic stress disorder (PTSD) for two reasons: (1) the similarity between hypnotic phenomena and the symptoms of PTSD, and (2) the utility of hypnosis as a tool in treatment. Physical trauma produces a sudden discontinuity in cognitive and emotional experience that often persists after the trauma is over. This results in symptoms such as psychogenic amnesia, intrusive reliving of the event as if it were recurring, numbing of responsiveness, and hypersensitivity to stimuli. Two studies have shown that Vietnam veterans with PTSD have higher than normal hypnotizability scores on standardized tests. Likewise, a history of physical abuse in childhood has been shown to be strongly associated with dissociative symptoms later in life. Furthermore, dissociative symptoms during and soon after traumatic experience predict later PTSD. Formal hypnotic procedures are especially helpful because this population is highly hypnotizable. Hypnosis provides controlled access to memories that may otherwise be kept out of consciousness. New uses of hypnosis in the psychotherapy of PTSD victims involve coupling access to the dissociated traumatic memories with positive restructuring of those memories. Hypnosis can be used to help patients face and bear a traumatic experience by embedding it in a new context, acknowledging helplessness during the event, and yet linking that experience with remoralizing memories such as efforts at self-protection, shared affection with friends who were killed, or the ability to control the environment at other times. In this way, hypnosis can be used to provide controlled access to memories that are then placed into a broader perspective. Patients can be taught self-hypnosis techniques that allow them to work through traumatic memories and thereby reduce spontaneous unbidden intrusive recollections.

MPEG-1 low-cost encoder solution

NASA Astrophysics Data System (ADS)

Grueger, Klaus; Schirrmeister, Frank; Filor, Lutz; von Reventlow, Christian; Schneider, Ulrich; Mueller, Gerriet; Sefzik, Nicolai; Fiedrich, Sven

1995-02-01

A solution for real-time compression of digital YCRCB video data to an MPEG-1 video data stream has been developed. As an additional option, motion JPEG and video telephone streams (H.261) can be generated. For MPEG-1, up to two bidirectional predicted images are supported. The required computational power for motion estimation and DCT/IDCT, memory size and memory bandwidth have been the main challenges. The design uses fast-page-mode memory accesses and requires only one single 80 ns EDO-DRAM with 256 X 16 organization for video encoding. This can be achieved only by using adequate access and coding strategies. The architecture consists of an input processing and filter unit, a memory interface, a motion estimation unit, a motion compensation unit, a DCT unit, a quantization control, a VLC unit and a bus interface. For using the available memory bandwidth by the processing tasks, a fixed schedule for memory accesses has been applied, that can be interrupted for asynchronous events. The motion estimation unit implements a highly sophisticated hierarchical search strategy based on block matching. The DCT unit uses a separated fast-DCT flowgraph realized by a switchable hardware unit for both DCT and IDCT operation. By appropriate multiplexing, only one multiplier is required for: DCT, quantization, inverse quantization, and IDCT. The VLC unit generates the video-stream up to the video sequence layer and is directly coupled with an intelligent bus-interface. Thus, the assembly of video, audio and system data can easily be performed by the host computer. Having a relatively low complexity and only small requirements for DRAM circuits, the developed solution can be applied to low-cost encoding products for consumer electronics.

A memory and organizational aid improves Alzheimer disease research consent capacity: results of a randomized, controlled trial.

PubMed

Rubright, Jonathan; Sankar, Pamela; Casarett, David J; Gur, Ruben; Xie, Sharon X; Karlawish, Jason

2010-12-01

Early and progressive cognitive impairments of patients with Alzheimer disease (AD) hinder their capacity to provide informed consent. Unfortunately, the limited research on techniques to improve capacity has shown mixed results. Therefore, the authors tested whether a memory and organizational aid improves the performance of patients with AD on measures of capacity and competency to give informed consent. Patients with AD randomly assigned to standard consent or standard plus a memory and organizational aid. Memory and organizational aid summarized the content of information mandated under the informed consent disclosure requirements of the Common Rule at a sixth grade reading level. Three psychiatrists without access to patient data independently reviewed MacArthur Competence Assessment Tool for Clinical Research (MacCAT-CR) interview transcripts to judge whether the patient was capable of providing informed consent. The agreement of at least two of the three experts defined a participant as capable of providing informed consent. Secondary outcomes are MacCAT-CR measures of understanding, appreciation and reasoning, and comparison with cognitively normal older adult norms. AD intervention and control groups were similar in terms of age, education, and cognitive status. The intervention group was more likely to be judged competent than control group and had higher scores on MacCAT-CR measure of understanding. The intervention had no effect on the measures of appreciation or reasoning. A consent process that addresses the deficits in memory and attention of a patient with AD can improve capacity to give informed consent for early phase AD research. The results also validate the MacCAT-CR as an instrument to measure capacity, especially the understanding subscale. ClinicalTrials.Gov#NCT00105612, http://clinicaltrials.gov/show/NCT00105612.

A memory and organizational aid improves AD research consent capacity: Results of a randomized, controlled trial

PubMed Central

Rubright, Jonathan; Sankar, Pamela; Casarett, David J; Gur, Ruben; Xie, Sharon X; Karlawish, Jason

2010-01-01

Objectives AD patients' early and progressive cognitive impairments hinder their capacity to provide informed consent. Unfortunately, the limited research on techniques to improve capacity has shown mixed results. Therefore, we tested whether a memory and organizational aid improves AD patient performance on measures of capacity and competency to give informed consent. Design, Setting, and Participants AD patients randomly assigned to standard consent, or standard plus a memory and organizational aid. Intervention Memory and organizational aid summarized at a 6th grade reading level the content of information mandated under the Common Rule's informed consent disclosure requirements. Measurements Three psychiatrists without access to patient data independently reviewed MacArthur Competence Assessment Tool for Clinical Research (MacCAT-CR) interview transcripts to judge whether the patient was capable of providing informed consent. The agreement of at least two of three experts defined a participant as capable of providing informed consent. Secondary outcomes are MacCAT-CR measures of understanding, appreciation and reasoning, and comparison to cognitively normal older adult norms. Results AD intervention and control groups were similar in terms of age, education, and cognitive status. The intervention group was more likely to be judged competent than control group and had higher scores on MacCAT-CR measure of understanding. The intervention had no effect on measures of appreciation or reasoning. Conclusions A consent process that addresses an AD patients' deficits in memory and attention can improve capacity to give informed consent for early phase AD research. The results also validate the MacCAT-CR as an instrument to measure capacity, especially the understanding subscale. PMID:20808101

Conceptual design and feasibility evaluation model of a 10 to the 8th power bit oligatomic mass memory. Volume 1: Conceptual design

NASA Technical Reports Server (NTRS)

Recksiedler, A. L.; Lutes, C. L.

1972-01-01

The oligatomic (mirror) thin film memory technology is a suitable candidate for general purpose spaceborne applications in the post-1975 time frame. Capacities of around 10 to the 8th power bits can be reliably implemented with systems designed around a 335 million bit module. The recommended mode was determined following an investigation of implementation sizes ranging from an 8,000,000 to 100,000,000 bits per module. Cost, power, weight, volume, reliability, maintainability and speed were investigated. The memory includes random access, NDRO, SEC-DED, nonvolatility, and dual interface characteristics. The applications most suitable for the technology are those involving a large capacity with high speed (no latency), nonvolatility, and random accessing.

Set statistics in conductive bridge random access memory device with Cu/HfO{sub 2}/Pt structure

DOE Office of Scientific and Technical Information (OSTI.GOV)

Zhang, Meiyun; Long, Shibing, E-mail: longshibing@ime.ac.cn; Wang, Guoming

2014-11-10

The switching parameter variation of resistive switching memory is one of the most important challenges in its application. In this letter, we have studied the set statistics of conductive bridge random access memory with a Cu/HfO{sub 2}/Pt structure. The experimental distributions of the set parameters in several off resistance ranges are shown to nicely fit a Weibull model. The Weibull slopes of the set voltage and current increase and decrease logarithmically with off resistance, respectively. This experimental behavior is perfectly captured by a Monte Carlo simulator based on the cell-based set voltage statistics model and the Quantum Point Contact electronmore » transport model. Our work provides indications for the improvement of the switching uniformity.« less

Optimized collectives using a DMA on a parallel computer

DOEpatents

Chen, Dong [Croton On Hudson, NY; Gabor, Dozsa [Ardsley, NY; Giampapa, Mark E [Irvington, NY; Heidelberger,; Phillip, [Cortlandt Manor, NY

2011-02-08

Optimizing collective operations using direct memory access controller on a parallel computer, in one aspect, may comprise establishing a byte counter associated with a direct memory access controller for each submessage in a message. The byte counter includes at least a base address of memory and a byte count associated with a submessage. A byte counter associated with a submessage is monitored to determine whether at least a block of data of the submessage has been received. The block of data has a predetermined size, for example, a number of bytes. The block is processed when the block has been fully received, for example, when the byte count indicates all bytes of the block have been received. The monitoring and processing may continue for all blocks in all submessages in the message.

A parallel approximate string matching under Levenshtein distance on graphics processing units using warp-shuffle operations

PubMed Central

Ho, ThienLuan; Oh, Seung-Rohk

2017-01-01

Approximate string matching with k-differences has a number of practical applications, ranging from pattern recognition to computational biology. This paper proposes an efficient memory-access algorithm for parallel approximate string matching with k-differences on Graphics Processing Units (GPUs). In the proposed algorithm, all threads in the same GPUs warp share data using warp-shuffle operation instead of accessing the shared memory. Moreover, we implement the proposed algorithm by exploiting the memory structure of GPUs to optimize its performance. Experiment results for real DNA packages revealed that the performance of the proposed algorithm and its implementation archived up to 122.64 and 1.53 times compared to that of sequential algorithm on CPU and previous parallel approximate string matching algorithm on GPUs, respectively. PMID:29016700

Final Report: Correctness Tools for Petascale Computing

DOE Office of Scientific and Technical Information (OSTI.GOV)

Mellor-Crummey, John

2014-10-27

In the course of developing parallel programs for leadership computing systems, subtle programming errors often arise that are extremely difficult to diagnose without tools. To meet this challenge, University of Maryland, the University of Wisconsin—Madison, and Rice University worked to develop lightweight tools to help code developers pinpoint a variety of program correctness errors that plague parallel scientific codes. The aim of this project was to develop software tools that help diagnose program errors including memory leaks, memory access errors, round-off errors, and data races. Research at Rice University focused on developing algorithms and data structures to support efficient monitoringmore » of multithreaded programs for memory access errors and data races. This is a final report about research and development work at Rice University as part of this project.« less

High-density magnetoresistive random access memory operating at ultralow voltage at room temperature.

PubMed

Hu, Jia-Mian; Li, Zheng; Chen, Long-Qing; Nan, Ce-Wen

2011-11-22

The main bottlenecks limiting the practical applications of current magnetoresistive random access memory (MRAM) technology are its low storage density and high writing energy consumption. Although a number of proposals have been reported for voltage-controlled memory device in recent years, none of them simultaneously satisfy the important device attributes: high storage capacity, low power consumption and room temperature operation. Here we present, using phase-field simulations, a simple and new pathway towards high-performance MRAMs that display significant improvements over existing MRAM technologies or proposed concepts. The proposed nanoscale MRAM device simultaneously exhibits ultrahigh storage capacity of up to 88 Gb inch(-2), ultralow power dissipation as low as 0.16 fJ per bit and room temperature high-speed operation below 10 ns.

High-density magnetoresistive random access memory operating at ultralow voltage at room temperature

PubMed Central

Hu, Jia-Mian; Li, Zheng; Chen, Long-Qing; Nan, Ce-Wen

2011-01-01

The main bottlenecks limiting the practical applications of current magnetoresistive random access memory (MRAM) technology are its low storage density and high writing energy consumption. Although a number of proposals have been reported for voltage-controlled memory device in recent years, none of them simultaneously satisfy the important device attributes: high storage capacity, low power consumption and room temperature operation. Here we present, using phase-field simulations, a simple and new pathway towards high-performance MRAMs that display significant improvements over existing MRAM technologies or proposed concepts. The proposed nanoscale MRAM device simultaneously exhibits ultrahigh storage capacity of up to 88 Gb inch−2, ultralow power dissipation as low as 0.16 fJ per bit and room temperature high-speed operation below 10 ns. PMID:22109527

45 CFR 2490.151 - Program accessibility: New construction and alterations.

Code of Federal Regulations, 2012 CFR

2012-10-01

... alterations. 2490.151 Section 2490.151 Public Welfare Regulations Relating to Public Welfare (Continued) JAMES MADISON MEMORIAL FELLOWSHIP FOUNDATION ENFORCEMENT OF NONDISCRIMINATION ON THE BASIS OF HANDICAP IN PROGRAMS OR ACTIVITIES CONDUCTED BY THE JAMES MADISON MEMORIAL FELLOWSHIP FOUNDATION § 2490.151 Program...

45 CFR 2490.151 - Program accessibility: New construction and alterations.

Code of Federal Regulations, 2013 CFR

2013-10-01

... alterations. 2490.151 Section 2490.151 Public Welfare Regulations Relating to Public Welfare (Continued) JAMES MADISON MEMORIAL FELLOWSHIP FOUNDATION ENFORCEMENT OF NONDISCRIMINATION ON THE BASIS OF HANDICAP IN PROGRAMS OR ACTIVITIES CONDUCTED BY THE JAMES MADISON MEMORIAL FELLOWSHIP FOUNDATION § 2490.151 Program...

45 CFR 2490.151 - Program accessibility: New construction and alterations.

Code of Federal Regulations, 2014 CFR

2014-10-01

... alterations. 2490.151 Section 2490.151 Public Welfare Regulations Relating to Public Welfare (Continued) JAMES MADISON MEMORIAL FELLOWSHIP FOUNDATION ENFORCEMENT OF NONDISCRIMINATION ON THE BASIS OF HANDICAP IN PROGRAMS OR ACTIVITIES CONDUCTED BY THE JAMES MADISON MEMORIAL FELLOWSHIP FOUNDATION § 2490.151 Program...

45 CFR 2490.151 - Program accessibility: New construction and alterations.

Code of Federal Regulations, 2011 CFR

2011-10-01

... alterations. 2490.151 Section 2490.151 Public Welfare Regulations Relating to Public Welfare (Continued) JAMES MADISON MEMORIAL FELLOWSHIP FOUNDATION ENFORCEMENT OF NONDISCRIMINATION ON THE BASIS OF HANDICAP IN PROGRAMS OR ACTIVITIES CONDUCTED BY THE JAMES MADISON MEMORIAL FELLOWSHIP FOUNDATION § 2490.151 Program...

Empirical Modeling Of Single-Event Upset

NASA Technical Reports Server (NTRS)

Zoutendyk, John A.; Smith, Lawrence S.; Soli, George A.; Thieberger, Peter; Smith, Stephen L.; Atwood, Gregory E.

1988-01-01

Experimental study presents examples of empirical modeling of single-event upset in negatively-doped-source/drain metal-oxide-semiconductor static random-access memory cells. Data supports adoption of simplified worst-case model in which cross sectionof SEU by ion above threshold energy equals area of memory cell.

45 CFR 2490.151 - Program accessibility: New construction and alterations.

Code of Federal Regulations, 2010 CFR

2010-10-01

... alterations. 2490.151 Section 2490.151 Public Welfare Regulations Relating to Public Welfare (Continued) JAMES MADISON MEMORIAL FELLOWSHIP FOUNDATION ENFORCEMENT OF NONDISCRIMINATION ON THE BASIS OF HANDICAP IN PROGRAMS OR ACTIVITIES CONDUCTED BY THE JAMES MADISON MEMORIAL FELLOWSHIP FOUNDATION § 2490.151 Program...

Ga-doped indium oxide nanowire phase change random access memory cells

NASA Astrophysics Data System (ADS)

Jin, Bo; Lim, Taekyung; Ju, Sanghyun; Latypov, Marat I.; Kim, Hyoung Seop; Meyyappan, M.; Lee, Jeong-Soo

2014-02-01

Phase change random access memory (PCRAM) devices are usually constructed using tellurium based compounds, but efforts to seek other materials providing desirable memory characteristics have continued. We have fabricated PCRAM devices using Ga-doped In2O3 nanowires with three different Ga compositions (Ga/(In+Ga) atomic ratio: 2.1%, 11.5% and 13.0%), and investigated their phase switching properties. The nanowires (˜40 nm in diameter) can be repeatedly switched between crystalline and amorphous phases, and Ga concentration-dependent memory switching behavior in the nanowires was observed with ultra-fast set/reset rates of 80 ns/20 ns, which are faster than for other competitive phase change materials. The observations of fast set/reset rates and two distinct states with a difference in resistance of two to three orders of magnitude appear promising for nonvolatile information storage. Moreover, we found that increasing the Ga concentration can reduce the power consumption and resistance drift; however, too high a level of Ga doping may cause difficulty in achieving the phase transition.

SiGe epitaxial memory for neuromorphic computing with reproducible high performance based on engineered dislocations

NASA Astrophysics Data System (ADS)

Choi, Shinhyun; Tan, Scott H.; Li, Zefan; Kim, Yunjo; Choi, Chanyeol; Chen, Pai-Yu; Yeon, Hanwool; Yu, Shimeng; Kim, Jeehwan

2018-01-01

Although several types of architecture combining memory cells and transistors have been used to demonstrate artificial synaptic arrays, they usually present limited scalability and high power consumption. Transistor-free analog switching devices may overcome these limitations, yet the typical switching process they rely on—formation of filaments in an amorphous medium—is not easily controlled and hence hampers the spatial and temporal reproducibility of the performance. Here, we demonstrate analog resistive switching devices that possess desired characteristics for neuromorphic computing networks with minimal performance variations using a single-crystalline SiGe layer epitaxially grown on Si as a switching medium. Such epitaxial random access memories utilize threading dislocations in SiGe to confine metal filaments in a defined, one-dimensional channel. This confinement results in drastically enhanced switching uniformity and long retention/high endurance with a high analog on/off ratio. Simulations using the MNIST handwritten recognition data set prove that epitaxial random access memories can operate with an online learning accuracy of 95.1%.

The effect of patterning options on embedded memory cells in logic technologies at iN10 and iN7

NASA Astrophysics Data System (ADS)

Appeltans, Raf; Weckx, Pieter; Raghavan, Praveen; Kim, Ryoung-Han; Kar, Gouri Sankar; Furnémont, Arnaud; Van der Perre, Liesbet; Dehaene, Wim

2017-03-01

Static Random Access Memory (SRAM) cells are used together with logic standard cells as the benchmark to develop the process flow for new logic technologies. In order to achieve successful integration of Spin-Transfer Torque Magnetic Random Access Memory (STT-MRAM) as area efficient higher level embedded cache, it also needs to be included as a benchmark. The simple cell structure of STT-MRAM brings extra patterning challenges to achieve high density. The two memory types are compared in terms of minimum area and critical design rules in both the iN10 and iN7 node, with an extra focus on patterning options in iN7. Both the use of Self-Aligned Quadruple Patterning (SAQP) mandrel and spacer engineering, as well as multi-level via's are explored. These patterning options result in large area gains for the STT-MRAM cell and moreover determine which cell variant is the smallest.

Revisiting the picture-superiority effect in symbolic comparisons: do pictures provide privileged access?

PubMed

Amrhein, Paul C; McDaniel, Mark A; Waddill, Paula

2002-09-01

In 4 experiments, symbolic comparisons were investigated to test semantic-memory retrieval accounts espousing processing advantages for picture over word stimuli. In Experiment 1, participants judged pairs of animal names or pictures by responding to questions probing concrete or abstract attributes (texture or size, ferocity or intelligence). Per pair, attributes were salient or nonsalient concerning their prerated relevance to animals being compared. Distance (near or far) between attribute magnitudes was also varied. Pictures did not significantly speed responding relative to words across all other variables. Advantages were found forfar attribute magnitudes (i.e., the distance effect) and salient attributes. The distance effect was much less for salient than nonsalient concrete-attribute comparisons. These results were consistently found in additional experiments with increased statistical power to detect modality effects. Our findings argue against dual-coding and some common-code accounts of conceptual attribute processing, urging reexamination of the assumption that pictures confer privileged access to long-term knowledge.

The role of the frontal cortex in memory: an investigation of the Von Restorff effect

PubMed Central

Elhalal, Anat; Davelaar, Eddy J.; Usher, Marius

2014-01-01

Evidence from neuropsychology and neuroimaging indicate that the pre-frontal cortex (PFC) plays an important role in human memory. Although frontal patients are able to form new memories, these memories appear qualitatively different from those of controls by lacking distinctiveness. Neuroimaging studies of memory indicate activation in the PFC under deep encoding conditions, and under conditions of semantic elaboration. Based on these results, we hypothesize that the PFC enhances memory by extracting differences and commonalities in the studied material. To test this hypothesis, we carried out an experimental investigation to test the relationship between the PFC-dependent factors and semantic factors associated with common and specific features of words. These experiments were performed using Free-Recall of word lists with healthy adults, exploiting the correlation between PFC function and fluid intelligence. As predicted, a correlation was found between fluid intelligence and the Von-Restorff effect (better memory for semantic isolates, e.g., isolate “cat” within category members of “fruit”). Moreover, memory for the semantic isolate was found to depend on the isolate's serial position. The isolate item tends to be recalled first, in comparison to non-isolates, suggesting that the process interacts with short term memory. These results are captured within a computational model of free recall, which includes a PFC mechanism that is sensitive to both commonality and distinctiveness, sustaining a trade-off between the two. PMID:25018721

Interference and memory capacity limitations.

PubMed

Endress, Ansgar D; Szabó, Szilárd

2017-10-01

Working memory (WM) is thought to have a fixed and limited capacity. However, the origins of these capacity limitations are debated, and generally attributed to active, attentional processes. Here, we show that the existence of interference among items in memory mathematically guarantees fixed and limited capacity limits under very general conditions, irrespective of any processing assumptions. Assuming that interference (a) increases with the number of interfering items and (b) brings memory performance to chance levels for large numbers of interfering items, capacity limits are a simple function of the relative influence of memorization and interference. In contrast, we show that time-based memory limitations do not lead to fixed memory capacity limitations that are independent of the timing properties of an experiment. We show that interference can mimic both slot-like and continuous resource-like memory limitations, suggesting that these types of memory performance might not be as different as commonly believed. We speculate that slot-like WM limitations might arise from crowding-like phenomena in memory when participants have to retrieve items. Further, based on earlier research on parallel attention and enumeration, we suggest that crowding-like phenomena might be a common reason for the 3 major cognitive capacity limitations. As suggested by Miller (1956) and Cowan (2001), these capacity limitations might arise because of a common reason, even though they likely rely on distinct processes. (PsycINFO Database Record (c) 2017 APA, all rights reserved).

Multiple core computer processor with globally-accessible local memories

DOE Office of Scientific and Technical Information (OSTI.GOV)

Shalf, John; Donofrio, David; Oliker, Leonid

A multi-core computer processor including a plurality of processor cores interconnected in a Network-on-Chip (NoC) architecture, a plurality of caches, each of the plurality of caches being associated with one and only one of the plurality of processor cores, and a plurality of memories, each of the plurality of memories being associated with a different set of at least one of the plurality of processor cores and each of the plurality of memories being configured to be visible in a global memory address space such that the plurality of memories are visible to two or more of the plurality ofmore » processor cores.« less

Multilevel resistive information storage and retrieval

DOEpatents

Lohn, Andrew; Mickel, Patrick R.

2016-08-09

The present invention relates to resistive random-access memory (RRAM or ReRAM) systems, as well as methods of employing multiple state variables to form degenerate states in such memory systems. The methods herein allow for precise write and read steps to form multiple state variables, and these steps can be performed electrically. Such an approach allows for multilevel, high density memory systems with enhanced information storage capacity and simplified information retrieval.

Immigration, Language Proficiency, and Autobiographical Memories: Lifespan Distribution and Second-Language Access

PubMed Central

Esposito, Alena G.; Baker-Ward, Lynne

2015-01-01

This investigation examined two controversies in the autobiographical literature: how cross-language immigration affects the distribution of autobiographical memories across the lifespan and under what circumstances language-dependent recall is observed. Both Spanish/English bilingual immigrants and English monolingual non-immigrants participated in a cue word study, with the bilingual sample taking part in a within-subject language manipulation. The expected bump in the number of memories from early life was observed for non-immigrants but not immigrants, who reported more memories for events surrounding immigration. Aspects of the methodology addressed possible reasons for past discrepant findings. Language-dependent recall was influenced by second-language proficiency. Results were interpreted as evidence that bilinguals with high second-language proficiency, in contrast to those with lower second-language proficiency, access a single conceptual store through either language. The final multi-level model predicting language-dependent recall, including second-language proficiency, age of immigration, internal language, and cue word language, explained ¾ of the between-person variance and ⅕ of the within-person variance. We arrive at two conclusions. First, major life transitions influence the distribution of memories. Second, concept representation across multiple languages follows a developmental model. In addition, the results underscore the importance of considering language experience in research involving memory reports. PMID:26274061

Immigration, language proficiency, and autobiographical memories: Lifespan distribution and second-language access.

PubMed

Esposito, Alena G; Baker-Ward, Lynne

2016-08-01

This investigation examined two controversies in the autobiographical literature: how cross-language immigration affects the distribution of autobiographical memories across the lifespan and under what circumstances language-dependent recall is observed. Both Spanish/English bilingual immigrants and English monolingual non-immigrants participated in a cue word study, with the bilingual sample taking part in a within-subject language manipulation. The expected bump in the number of memories from early life was observed for non-immigrants but not immigrants, who reported more memories for events surrounding immigration. Aspects of the methodology addressed possible reasons for past discrepant findings. Language-dependent recall was influenced by second-language proficiency. Results were interpreted as evidence that bilinguals with high second-language proficiency, in contrast to those with lower second-language proficiency, access a single conceptual store through either language. The final multi-level model predicting language-dependent recall, including second-language proficiency, age of immigration, internal language, and cue word language, explained ¾ of the between-person variance and (1)/5 of the within-person variance. We arrive at two conclusions. First, major life transitions influence the distribution of memories. Second, concept representation across multiple languages follows a developmental model. In addition, the results underscore the importance of considering language experience in research involving memory reports.

Databases and Electronic Resources - Betty Petersen Memorial Library

Science.gov Websites

of NOAA-Wide and Open Access Databases on the NOAA Central Library website. American Meteorological to a nonfederal website. Open Science Directory Open Science Directory contains collections of Open Access Journals (e.g. Directory of Open Access Journals) and journals in the special programs (Hinari

Similar verbal memory impairments in schizophrenia and healthy aging. Implications for understanding of neural mechanisms.

PubMed

Silver, Henry; Bilker, Warren B

2015-03-30

Memory is impaired in schizophrenia patients but it is not clear whether this is specific to the illness and whether different types of memory (verbal and nonverbal) or memories in different cognitive domains (executive, object recognition) are similarly affected. To study relationships between memory impairments and schizophrenia we compared memory functions in 77 schizophrenia patients, 58 elderly healthy individuals and 41 young healthy individuals. Tests included verbal associative and logical memory and memory in executive and object recognition domains. We compared relationships of memory functions to each other and to other cognitive functions including psychomotor speed and verbal and spatial working memory. Compared to the young healthy group, schizophrenia patients and elderly healthy individuals showed similar severe impairment in logical memory and in the ability to learn new associations (NAL), and similar but less severe impairment in spatial working memory and executive and object memory. Verbal working memory was significantly more impaired in schizophrenia patients than in the healthy elderly. Verbal episodic memory impairment in schizophrenia may share common mechanisms with similar impairment in healthy aging. Impairment in verbal working memory in contrast may reflect mechanisms specific to schizophrenia. Study of verbal explicit memory impairment tapped by the NAL index may advance understanding of abnormal hippocampus dependent mechanisms common to schizophrenia and aging. Copyright © 2015 Elsevier Ireland Ltd. All rights reserved.

A Mathematical Model for the Hippocampus: Towards the Understanding of Episodic Memory and Imagination

NASA Astrophysics Data System (ADS)

Tsuda, I.; Yamaguti, Y.; Kuroda, S.; Fukushima, Y.; Tsukada, M.

How does the brain encode episode? Based on the fact that the hippocampus is responsible for the formation of episodic memory, we have proposed a mathematical model for the hippocampus. Because episodic memory includes a time series of events, an underlying dynamics for the formation of episodic memory is considered to employ an association of memories. David Marr correctly pointed out in his theory of archecortex for a simple memory that the hippocampal CA3 is responsible for the formation of associative memories. However, a conventional mathematical model of associative memory simply guarantees a single association of memory unless a rule for an order of successive association of memories is given. The recent clinical studies in Maguire's group for the patients with the hippocampal lesion show that the patients cannot make a new story, because of the lack of ability of imagining new things. Both episodic memory and imagining things include various common characteristics: imagery, the sense of now, retrieval of semantic information, and narrative structures. Taking into account these findings, we propose a mathematical model of the hippocampus in order to understand the common mechanism of episodic memory and imagination.

Fuzzy-trace theory: dual processes in memory, reasoning, and cognitive neuroscience.

PubMed

Brainerd, C J; Reyna, V F

2001-01-01

Fuzzy-trace theory has evolved in response to counterintuitive data on how memory development influences the development of reasoning. The two traditional perspectives on memory-reasoning relations--the necessity and constructivist hypotheses--stipulate that the accuracy of children's memory for problem information and the accuracy of their reasoning are closely intertwined, albeit for different reasons. However, contrary to necessity, correlational and experimental dissociations have been found between children's memory for problem information that is determinative in solving certain problems and their solutions of those problems. In these same tasks, age changes in memory for problem information appear to be dissociated from age changes in reasoning. Contrary to constructivism, correlational and experimental dissociations also have been found between children's performance on memory tests for actual experience and memory tests for the meaning of experience. As in memory-reasoning studies, age changes in one type of memory performance do not seem to be closely connected to age changes in the other type of performance. Subsequent experiments have led to dual-process accounts in both the memory and reasoning spheres. The account of memory development features four other principles: parallel verbatim-gist storage, dissociated verbatim-gist retrieval, memorial bases of conscious recollection, and identity/similarity processes. The account of the development of reasoning features three principles: gist extraction, fuzzy-to-verbatim continua, and fuzzy-processing preferences. The fuzzy-processing preference is a particularly important notion because it implies that gist-based intuitive reasoning often suffices to deliver "logical" solutions and that such reasoning confers multiple cognitive advantages that enhance accuracy. The explanation of memory-reasoning dissociations in cognitive development then falls out of fuzzy-trace theory's dual-process models of memory and reasoning. More explicitly, in childhood reasoning tasks, it is assumed that both verbatim and gist traces of problem information are stored. Responding accurately to memory tests for presented problem information depends primarily on verbatim memory abilities (preserving traces of that information and accessing them when the appropriate memory probes are administered). However, accurate solutions to reasoning problems depend primarily on gist-memory abilities (extracting the correct gist from problem information, focusing on that gist during reasoning, and accessing reasoning operations that process that gist). Because verbatim and gist memories exhibit considerable dissociation, both during storage and when they are subsequently accessed on memory tests, dissociations of verbatim-based memory performance from gist-based reasoning are predictable. Conversely, associations are predicted in situations in which memory and reasoning are based on the same verbatim traces (Brainerd & Reyna, 1988) and in situations in which memory and reasoning are based on the same gist traces (Reyna & Kiernan, 1994). Fuzzy-trace theory's memory and reasoning principles have been applied in other research domains. Four such domains are developmental cognitive neuroscience studies of false memory, studies of false memory in brain-damaged patients, studies of reasoning errors in judgment and decision making, and studies of retrieval mechanisms in recall. In the first domain, the principles of parallel verbatim-gist storage, dissociated verbatim-gist retrieval, and identity/similarity processes have been used to explain both spontaneous and implanted false reports in children and in the elderly. These explanations have produced some surprising predictions that have been verified: false reports do not merely decline with age during childhood but increase under theoretically specified conditions; reports of events that were not experienced can nevertheless be highly persistent over time; and false reports can be suppressed by retrieving verbatim traces of corresponding true events. In the second domain, the same principles have been invoked to explain why some forms of brain damage lead to elevated levels of false memory and other forms lead to reduced levels of false memory. In the third domain, the principles of gist extraction, fuzzy-to-verbatim continua, and fuzzy-processing preferences have been exploited to formulate a general theory of loci of processing failures in judgment and decision making, cluminating in a developmental account of degrees of rationality that distinguishes more and less advanced reasoning. This theory has in turn been used to formulate local models, such as the inclusion illusions model, that explain the characteristic reasoning errors that are observed on specific judgment and decision-making tasks. Finally, in the fourth domain, a dual-process conception of recall has been derived from the principles of parallel verbatim-gist storage and dissociated verbatim-gist retrieval. In this conception, which has been used to explain cognitive triage effects in recall and robust false recall, targets are recalled either by directly accessing their verbatim traces and reading the retrieved information out of consciousness or by reconstructively processing their gist traces.

Autobiographical Memory Disturbances in Depression: A Novel Therapeutic Target?

PubMed Central

Köhler, Cristiano A.; Carvalho, André F.; Alves, Gilberto S.; McIntyre, Roger S.; Hyphantis, Thomas N.; Cammarota, Martín

2015-01-01

Major depressive disorder (MDD) is characterized by a dysfunctional processing of autobiographical memories. We review the following core domains of deficit: systematic biases favoring materials of negative emotional valence; diminished access and response to positive memories; a recollection of overgeneral memories in detriment of specific autobiographical memories; and the role of ruminative processes and avoidance when dealing with autobiographical memories. Furthermore, we review evidence from functional neuroimaging studies of neural circuits activated by the recollection of autobiographical memories in both healthy and depressive individuals. Disruptions in autobiographical memories predispose and portend onset and maintenance of depression. Thus, we discuss emerging therapeutics that target memory difficulties in those with depression. We review strategies for this clinical domain, including memory specificity training, method-of-loci, memory rescripting, and real-time fMRI neurofeedback training of amygdala activity in depression. We propose that the manipulation of the reconsolidation of autobiographical memories in depression might represent a novel yet largely unexplored, domain-specific, therapeutic opportunity for depression treatment. PMID:26380121

A Developmental Psychopathology Model of Overgeneral Autobiographical Memory

ERIC Educational Resources Information Center

Valentino, Kristin

2011-01-01

Overgeneral memory (OGM) is a phenomenon that refers to difficulty retrieving specific autobiographical memories. The tendency to be overgeneral in autobiographical memory recall has been commonly observed among individuals with emotional disorders compared to those without emotional disorders. Despite significant advances in identifying…

TiO2-based memristors and ReRAM: materials, mechanisms and models (a review)

NASA Astrophysics Data System (ADS)

Gale, Ella

2014-10-01

The memristor is the fundamental nonlinear circuit element, with uses in computing and computer memory. Resistive Random Access Memory (ReRAM) is a resistive switching memory proposed as a non-volatile memory. In this review we shall summarize the state of the art for these closely-related fields, concentrating on titanium dioxide, the well-utilized and archetypal material for both. We shall cover material properties, switching mechanisms and models to demonstrate what ReRAM and memristor scientists can learn from each other and examine the outlook for these technologies.

Positive Affect Modulates Flexibility and Evaluative Control

ERIC Educational Resources Information Center

van Wouwe, Nelleke C.; Band, Guido P. H.; Ridderinkhof, K. Richard

2011-01-01

The ability to interact with a constantly changing environment requires a balance between maintaining the currently relevant working memory content and being sensitive to potentially relevant new information that should be given priority access to working memory. Mesocortical dopamine projections to frontal brain areas modulate working memory…

A Hardware Platform for Characterizing and Validating 1-Dimensional Optical Systems

DTIC Science & Technology

2014-09-01

principle laboratory experiments, a bread -board sensor and data collection system was created to gather fuze data to postprocess after the event...merely differentiates this bistable memory category from dynamic random access memory [RAM], which must be periodically refreshed to retain data.) A

Generating Data Flow Programs from Nonprocedural Specifications.

DTIC Science & Technology

1983-03-01

With the I-structures, Gajski points out, it is difficult to know ahead of time the optimal memory allocation scheme to pertition large arrays. amory...contention problems may occur for frequently accessed elements stored in the sam memory module. Gajski observes that these are the same problem which

Stream Processors

NASA Astrophysics Data System (ADS)

Erez, Mattan; Dally, William J.

Stream processors, like other multi core architectures partition their functional units and storage into multiple processing elements. In contrast to typical architectures, which contain symmetric general-purpose cores and a cache hierarchy, stream processors have a significantly leaner design. Stream processors are specifically designed for the stream execution model, in which applications have large amounts of explicit parallel computation, structured and predictable control, and memory accesses that can be performed at a coarse granularity. Applications in the streaming model are expressed in a gather-compute-scatter form, yielding programs with explicit control over transferring data to and from on-chip memory. Relying on these characteristics, which are common to many media processing and scientific computing applications, stream architectures redefine the boundary between software and hardware responsibilities with software bearing much of the complexity required to manage concurrency, locality, and latency tolerance. Thus, stream processors have minimal control consisting of fetching medium- and coarse-grained instructions and executing them directly on the many ALUs. Moreover, the on-chip storage hierarchy of stream processors is under explicit software control, as is all communication, eliminating the need for complex reactive hardware mechanisms.

Design and evaluation of an architecture for a digital signal processor for instrumentation applications

NASA Astrophysics Data System (ADS)

Fellman, Ronald D.; Kaneshiro, Ronald T.; Konstantinides, Konstantinos

1990-03-01

The authors present the design and evaluation of an architecture for a monolithic, programmable, floating-point digital signal processor (DSP) for instrumentation applications. An investigation of the most commonly used algorithms in instrumentation led to a design that satisfies the requirements for high computational and I/O (input/output) throughput. In the arithmetic unit, a 16- x 16-bit multiplier and a 32-bit accumulator provide the capability for single-cycle multiply/accumulate operations, and three format adjusters automatically adjust the data format for increased accuracy and dynamic range. An on-chip I/O unit is capable of handling data block transfers through a direct memory access port and real-time data streams through a pair of parallel I/O ports. I/O operations and program execution are performed in parallel. In addition, the processor includes two data memories with independent addressing units, a microsequencer with instruction RAM, and multiplexers for internal data redirection. The authors also present the structure and implementation of a design environment suitable for the algorithmic, behavioral, and timing simulation of a complete DSP system. Various benchmarking results are reported.

Complex dynamics of semantic memory access in reading

PubMed Central

Baggio, Giosué; Fonseca, André

2012-01-01

Understanding a word in context relies on a cascade of perceptual and conceptual processes, starting with modality-specific input decoding, and leading to the unification of the word's meaning into a discourse model. One critical cognitive event, turning a sensory stimulus into a meaningful linguistic sign, is the access of a semantic representation from memory. Little is known about the changes that activating a word's meaning brings about in cortical dynamics. We recorded the electroencephalogram (EEG) while participants read sentences that could contain a contextually unexpected word, such as ‘cold’ in ‘In July it is very cold outside’. We reconstructed trajectories in phase space from single-trial EEG time series, and we applied three nonlinear measures of predictability and complexity to each side of the semantic access boundary, estimated as the onset time of the N400 effect evoked by critical words. Relative to controls, unexpected words were associated with larger prediction errors preceding the onset of the N400. Accessing the meaning of such words produced a phase transition to lower entropy states, in which cortical processing becomes more predictable and more regular. Our study sheds new light on the dynamics of information flow through interfaces between sensory and memory systems during language processing. PMID:21715401

Accessing Real-Life Episodic Information from Minutes versus Hours Earlier Modulates Hippocampal and High-Order Cortical Dynamics

PubMed Central

Chen, J.; Honey, C. J.; Simony, E.; Arcaro, M. J.; Norman, K. A.; Hasson, U.

2016-01-01

It is well known that formation of new episodic memories depends on hippocampus, but in real-life settings (e.g., conversation), hippocampal amnesics can utilize information from several minutes earlier. What neural systems outside hippocampus might support this minutes-long retention? In this study, subjects viewed an audiovisual movie continuously for 25 min; another group viewed the movie in 2 parts separated by a 1-day delay. Understanding Part 2 depended on retrieving information from Part 1, and thus hippocampus was required in the day-delay condition. But is hippocampus equally recruited to access the same information from minutes earlier? We show that accessing memories from a few minutes prior elicited less interaction between hippocampus and default mode network (DMN) cortical regions than accessing day-old memories of identical events, suggesting that recent information was available with less reliance on hippocampal retrieval. Moreover, the 2 groups evinced reliable but distinct DMN activity timecourses, reflecting differences in information carried in these regions when Part 1 was recent versus distant. The timecourses converged after 4 min, suggesting a time frame over which the continuous-viewing group may have relied less on hippocampal retrieval. We propose that cortical default mode regions can intrinsically retain real-life episodic information for several minutes. PMID:26240179

Multi-Level Bitmap Indexes for Flash Memory Storage

DOE Office of Scientific and Technical Information (OSTI.GOV)

Wu, Kesheng; Madduri, Kamesh; Canon, Shane

2010-07-23

Due to their low access latency, high read speed, and power-efficient operation, flash memory storage devices are rapidly emerging as an attractive alternative to traditional magnetic storage devices. However, tests show that the most efficient indexing methods are not able to take advantage of the flash memory storage devices. In this paper, we present a set of multi-level bitmap indexes that can effectively take advantage of flash storage devices. These indexing methods use coarsely binned indexes to answer queries approximately, and then use finely binned indexes to refine the answers. Our new methods read significantly lower volumes of data atmore » the expense of an increased disk access count, thus taking full advantage of the improved read speed and low access latency of flash devices. To demonstrate the advantage of these new indexes, we measure their performance on a number of storage systems using a standard data warehousing benchmark called the Set Query Benchmark. We observe that multi-level strategies on flash drives are up to 3 times faster than traditional indexing strategies on magnetic disk drives.« less

Enhanced accessibility of ignored neutral and negative items in nonclinical dissociative individuals.

PubMed

Chiu, Chui-De

2018-01-01

While clinical studies showed paradoxical memory phenomena, including the intrusion and amnesia of stressful experiences that are features of dissociation, the results of laboratory studies on dissociative individuals' forgetting of experimental stimuli through cognitive control varied. Some studies demonstrated ineffective inhibition, and others found that dissociative individuals could remember fewer trauma words in a divided-attention context. Dissociative individuals may utilize superior cognitive disengagement to forget the representations. This hypothesis was tested in nonclinical individuals with high, medium, and low dissociation proneness. In the study phase, the participants learned several lists of experimental words and kept updating working memory by remembering the last four items on a list (target) and ignoring those non-target items. A recognition test was then conducted. The high dissociation group performed better on updating working memory. However, the accessibility of the representations of neutral and negative non-target items was elevated. Dissociative individuals disengaged attention effectively from items they intended to ignore, and the representations of the ignored items were more accessible when cues were available. Copyright © 2017 Elsevier Inc. All rights reserved.

The impact of Moore's Law and loss of Dennard scaling: Are DSP SoCs an energy efficient alternative to x86 SoCs?

NASA Astrophysics Data System (ADS)

Johnsson, L.; Netzer, G.

2016-10-01

Moore's law, the doubling of transistors per unit area for each CMOS technology generation, is expected to continue throughout the decade, while Dennard voltage scaling resulting in constant power per unit area stopped about a decade ago. The semiconductor industry's response to the loss of Dennard scaling and the consequent challenges in managing power distribution and dissipation has been leveled off clock rates, a die performance gain reduced from about a factor of 2.8 to 1.4 per technology generation, and multi-core processor dies with increased cache sizes. Increased caches sizes offers performance benefits for many applications as well as energy savings. Accessing data in cache is considerably more energy efficient than main memory accesses. Further, caches consume less power than a corresponding amount of functional logic. As feature sizes continue to be scaled down an increasing fraction of the die must be “underutilized” or “dark” due to power constraints. With power being a prime design constraint there is a concerted effort to find significantly more energy efficient chip architectures than dominant in servers today, with chips potentially incorporating several types of cores to cover a range of applications, or different functions in an application, as is already common for the mobile processor market. Digital Signal Processors (DSPs), largely targeting the embedded and mobile processor markets, typically have been designed for a power consumption of 10% or less of a typical x86 CPU, yet with much more than 10% of the floating-point capability of the same technology generation x86 CPUs. Thus, DSPs could potentially offer an energy efficient alternative to x86 CPUs. Here we report an assessment of the Texas Instruments TMS320C6678 DSP in regards to its energy efficiency for two common HPC benchmarks: STREAM (memory system benchmark) and HPL (CPU benchmark)

An Adaptive Memory Interface Controller for Improving Bandwidth Utilization of Hybrid and Reconfigurable Systems

DOE Office of Scientific and Technical Information (OSTI.GOV)

Castellana, Vito G.; Tumeo, Antonino; Ferrandi, Fabrizio

Emerging applications such as data mining, bioinformatics, knowledge discovery, social network analysis are irregular. They use data structures based on pointers or linked lists, such as graphs, unbalanced trees or unstructures grids, which generates unpredictable memory accesses. These data structures usually are large, but difficult to partition. These applications mostly are memory bandwidth bounded and have high synchronization intensity. However, they also have large amounts of inherent dynamic parallelism, because they potentially perform a task for each one of the element they are exploring. Several efforts are looking at accelerating these applications on hybrid architectures, which integrate general purpose processorsmore » with reconfigurable devices. Some solutions, which demonstrated significant speedups, include custom-hand tuned accelerators or even full processor architectures on the reconfigurable logic. In this paper we present an approach for the automatic synthesis of accelerators from C, targeted at irregular applications. In contrast to typical High Level Synthesis paradigms, which construct a centralized Finite State Machine, our approach generates dynamically scheduled hardware components. While parallelism exploitation in typical HLS-generated accelerators is usually bound within a single execution flow, our solution allows concurrently running multiple execution flow, thus also exploiting the coarser grain task parallelism of irregular applications. Our approach supports multiple, multi-ported and distributed memories, and atomic memory operations. Its main objective is parallelizing as many memory operations as possible, independently from their execution time, to maximize the memory bandwidth utilization. This significantly differs from current HLS flows, which usually consider a single memory port and require precise scheduling of memory operations. A key innovation of our approach is the generation of a memory interface controller, which dynamically maps concurrent memory accesses to multiple ports. We present a case study on a typical irregular kernel, Graph Breadth First search (BFS), exploring different tradeoffs in terms of parallelism and number of memories.« less

Architectural design and simulation of a virtual memory

NASA Technical Reports Server (NTRS)

Kwok, G.; Chu, Y.

1971-01-01

Virtual memory is an imaginary main memory with a very large capacity which the programmer has at his disposal. It greatly contributes to the solution of the dynamic storage allocation problem. The architectural design of a virtual memory is presented which implements by hardware the idea of queuing and scheduling the page requests to a paging drum in such a way that the access of the paging drum is increased many times. With the design, an increase of up to 16 times in page transfer rate is achievable when the virtual memory is heavily loaded. This in turn makes feasible a great increase in the system throughput.

Magnetic vortex racetrack memory

NASA Astrophysics Data System (ADS)

Geng, Liwei D.; Jin, Yongmei M.

2017-02-01

We report a new type of racetrack memory based on current-controlled movement of magnetic vortices in magnetic nanowires with rectangular cross-section and weak perpendicular anisotropy. Data are stored through the core polarity of vortices and each vortex carries a data bit. Besides high density, non-volatility, fast data access, and low power as offered by domain wall racetrack memory, magnetic vortex racetrack memory has additional advantages of no need for constrictions to define data bits, changeable information density, adjustable current magnitude for data propagation, and versatile means of ultrafast vortex core switching. By using micromagnetic simulations, current-controlled motion of magnetic vortices in cobalt nanowire is demonstrated for racetrack memory applications.

Unraveling Network-induced Memory Contention: Deeper Insights with Machine Learning

DOE PAGES

Groves, Taylor Liles; Grant, Ryan; Gonzales, Aaron; ...

2017-11-21

Remote Direct Memory Access (RDMA) is expected to be an integral communication mechanism for future exascale systems enabling asynchronous data transfers, so that applications may fully utilize CPU resources while simultaneously sharing data amongst remote nodes. We examine Network-induced Memory Contention (NiMC) on Infiniband networks. We expose the interactions between RDMA, main-memory and cache, when applications and out-of-band services compete for memory resources. We then explore NiMCs resulting impact on application-level performance. For a range of hardware technologies and HPC workloads, we quantify NiMC and show that NiMCs impact grows with scale resulting in up to 3X performance degradation atmore » scales as small as 8K processes even in applications that previously have been shown to be performance resilient in the presence of noise. In addition, this work examines the problem of predicting NiMC's impact on applications by leveraging machine learning and easily accessible performance counters. This approach provides additional insights about the root cause of NiMC and facilitates dynamic selection of potential solutions. Finally, we evaluated three potential techniques to reduce NiMCs impact, namely hardware offloading, core reservation and network throttling.« less

Low-power resistive random access memory by confining the formation of conducting filaments

DOE Office of Scientific and Technical Information (OSTI.GOV)

Huang, Yi-Jen; Lee, Si-Chen, E-mail: sclee@ntu.edu.tw; Shen, Tzu-Hsien

2016-06-15

Owing to their small physical size and low power consumption, resistive random access memory (RRAM) devices are potential for future memory and logic applications in microelectronics. In this study, a new resistive switching material structure, TiO{sub x}/silver nanoparticles/TiO{sub x}/AlTiO{sub x}, fabricated between the fluorine-doped tin oxide bottom electrode and the indium tin oxide top electrode is demonstrated. The device exhibits excellent memory performances, such as low operation voltage (<±1 V), low operation power, small variation in resistance, reliable data retention, and a large memory window. The current-voltage measurement shows that the conducting mechanism in the device at the high resistancemore » state is via electron hopping between oxygen vacancies in the resistive switching material. When the device is switched to the low resistance state, conducting filaments are formed in the resistive switching material as a result of accumulation of oxygen vacancies. The bottom AlTiO{sub x} layer in the device structure limits the formation of conducting filaments; therefore, the current and power consumption of device operation are significantly reduced.« less

Spin-transfer torque switched magnetic tunnel junctions in magnetic random access memory

NASA Astrophysics Data System (ADS)

Sun, Jonathan Z.

2016-10-01

Spin-transfer torque (or spin-torque, or STT) based magnetic tunnel junction (MTJ) is at the heart of a new generation of magnetism-based solid-state memory, the so-called spin-transfer-torque magnetic random access memory, or STT-MRAM. Over the past decades, STT-based switchable magnetic tunnel junction has seen progress on many fronts, including the discovery of (001) MgO as the most favored tunnel barrier, which together with (bcc) Fe or FeCo alloy are yielding best demonstrated tunnel magneto-resistance (TMR); the development of perpendicularly magnetized ultrathin CoFeB-type of thin films sufficient to support high density memories with junction sizes demonstrated down to 11nm in diameter; and record-low spin-torque switching threshold current, giving best reported switching efficiency over 5 kBT/μA. Here we review the basic device properties focusing on the perpendicularly magnetized MTJs, both in terms of switching efficiency as measured by sub-threshold, quasi-static methods, and of switching speed at super-threshold, forced switching. We focus on device behaviors important for memory applications that are rooted in fundamental device physics, which highlights the trade-off of device parameters for best suitable system integration.

Effect of embedded metal nanocrystals on the resistive switching characteristics in NiN-based resistive random access memory cells

DOE Office of Scientific and Technical Information (OSTI.GOV)

Yun, Min Ju; Kim, Hee-Dong; Man Hong, Seok

2014-03-07

The metal nanocrystals (NCs) embedded-NiN-based resistive random access memory cells are demonstrated using several metal NCs (i.e., Pt, Ni, and Ti) with different physical parameters in order to investigate the metal NC's dependence on resistive switching (RS) characteristics. First, depending on the electronegativity of metal, the size of metal NCs is determined and this affects the operating current of memory cells. If metal NCs with high electronegativity are incorporated, the size of the NCs is reduced; hence, the operating current is reduced owing to the reduced density of the electric field around the metal NCs. Second, the potential wells aremore » formed by the difference of work function between the metal NCs and active layer, and the barrier height of the potential wells affects the level of operating voltage as well as the conduction mechanism of metal NCs embedded memory cells. Therefore, by understanding these correlations between the active layer and embedded metal NCs, we can optimize the RS properties of metal NCs embedded memory cells as well as predict their conduction mechanisms.« less

Unraveling Network-induced Memory Contention: Deeper Insights with Machine Learning

DOE Office of Scientific and Technical Information (OSTI.GOV)

Groves, Taylor Liles; Grant, Ryan; Gonzales, Aaron

Remote Direct Memory Access (RDMA) is expected to be an integral communication mechanism for future exascale systems enabling asynchronous data transfers, so that applications may fully utilize CPU resources while simultaneously sharing data amongst remote nodes. We examine Network-induced Memory Contention (NiMC) on Infiniband networks. We expose the interactions between RDMA, main-memory and cache, when applications and out-of-band services compete for memory resources. We then explore NiMCs resulting impact on application-level performance. For a range of hardware technologies and HPC workloads, we quantify NiMC and show that NiMCs impact grows with scale resulting in up to 3X performance degradation atmore » scales as small as 8K processes even in applications that previously have been shown to be performance resilient in the presence of noise. In addition, this work examines the problem of predicting NiMC's impact on applications by leveraging machine learning and easily accessible performance counters. This approach provides additional insights about the root cause of NiMC and facilitates dynamic selection of potential solutions. Finally, we evaluated three potential techniques to reduce NiMCs impact, namely hardware offloading, core reservation and network throttling.« less

Dancing your moves away: How memory retrieval shapes complex motor action.

PubMed

Tempel, Tobias; Loran, Igor; Frings, Christian

2015-09-01

Human memory is subject to continuous change. Besides the accumulation of contents as a consequence of encoding new information, the accessing of memory influences later accessibility. The authors investigated how retrieval-related memory-shaping processes affect intentionally acquired complex motion patterns. Dance figures served as the material to be learned. The authors found that selectively retrieving a subset of dance moves facilitated later recall of the retrieved dance figures, whereas figures that were related to these but that did not receive selective practice suffered from forgetting. These opposing effects were shown in experiments with different designs involving either the learning of only 1 set of body movements or 2 sets of movements categorized into 2 dances. A 3rd experiment showed that selective restudy also entailed a recall benefit for restudied dance figures but did not induce forgetting for related nonrestudied dance figures. The results suggest that motor programs representing the motion patterns in a format closely corresponding to parameters of movement execution were affected. The reported experiments demonstrate how retrieval determines motor memory plasticity and emphasize the importance of separating restudy and retrieval practice when teaching people new movements. (c) 2015 APA, all rights reserved).

Threshold-voltage modulated phase change heterojunction for application of high density memory

DOE Office of Scientific and Technical Information (OSTI.GOV)

Yan, Baihan; Tong, Hao, E-mail: tonghao@hust.edu.cn; Qian, Hang

2015-09-28

Phase change random access memory is one of the most important candidates for the next generation non-volatile memory technology. However, the ability to reduce its memory size is compromised by the fundamental limitations inherent in the CMOS technology. While 0T1R configuration without any additional access transistor shows great advantages in improving the storage density, the leakage current and small operation window limit its application in large-scale arrays. In this work, phase change heterojunction based on GeTe and n-Si is fabricated to address those problems. The relationship between threshold voltage and doping concentration is investigated, and energy band diagrams and X-raymore » photoelectron spectroscopy measurements are provided to explain the results. The threshold voltage is modulated to provide a large operational window based on this relationship. The switching performance of the heterojunction is also tested, showing a good reverse characteristic, which could effectively decrease the leakage current. Furthermore, a reliable read-write-erase function is achieved during the tests. Phase change heterojunction is proposed for high-density memory, showing some notable advantages, such as modulated threshold voltage, large operational window, and low leakage current.« less

Age effects on explicit and implicit memory

PubMed Central

Ward, Emma V.; Berry, Christopher J.; Shanks, David R.

2013-01-01

It is well-documented that explicit memory (e.g., recognition) declines with age. In contrast, many argue that implicit memory (e.g., priming) is preserved in healthy aging. For example, priming on tasks such as perceptual identification is often not statistically different in groups of young and older adults. Such observations are commonly taken as evidence for distinct explicit and implicit learning/memory systems. In this article we discuss several lines of evidence that challenge this view. We describe how patterns of differential age-related decline may arise from differences in the ways in which the two forms of memory are commonly measured, and review recent research suggesting that under improved measurement methods, implicit memory is not age-invariant. Formal computational models are of considerable utility in revealing the nature of underlying systems. We report the results of applying single and multiple-systems models to data on age effects in implicit and explicit memory. Model comparison clearly favors the single-system view. Implications for the memory systems debate are discussed. PMID:24065942

Silent store detection and recording in memory storage

DOEpatents

Bose, Pradip; Cher, Chen-Yong; Nair, Ravi

2017-03-07

An aspect includes receiving a write request that includes a memory address and write data. Stored data is read from a memory location at the memory address. Based on determining that the memory location was not previously modified, the stored data is compared to the write data. Based on the stored data matching the write data, the write request is completed without writing the write data to the memory and a corresponding silent store bit, in a silent store bitmap is set. Based on the stored data not matching the write data, the write data is written to the memory location, the silent store bit is reset and a corresponding modified bit is set. At least one of an application and an operating system is provided access to the silent store bitmap.

Silent store detection and recording in memory storage

DOEpatents

Bose, Pradip; Cher, Chen-Yong; Nair, Ravi

2016-09-20

An aspect includes receiving a write request that includes a memory address and write data. Stored data is read from a memory location at the memory address. Based on determining that the memory location was not previously modified, the stored data is compared to the write data. Based on the stored data matching the write data, the write request is completed without writing the write data to the memory and a corresponding silent store bit, in a silent store bitmap is set. Based on the stored data not matching the write data, the write data is written to the memory location, the silent store bit is reset and a corresponding modified bit is set. At least one of an application and an operating system is provided access to the silent store bitmap.

Global Neural Pattern Similarity as a Common Basis for Categorization and Recognition Memory

PubMed Central

Xue, Gui; Love, Bradley C.; Preston, Alison R.; Poldrack, Russell A.

2014-01-01

Familiarity, or memory strength, is a central construct in models of cognition. In previous categorization and long-term memory research, correlations have been found between psychological measures of memory strength and activation in the medial temporal lobes (MTLs), which suggests a common neural locus for memory strength. However, activation alone is insufficient for determining whether the same mechanisms underlie neural function across domains. Guided by mathematical models of categorization and long-term memory, we develop a theory and a method to test whether memory strength arises from the global similarity among neural representations. In human subjects, we find significant correlations between global similarity among activation patterns in the MTLs and both subsequent memory confidence in a recognition memory task and model-based measures of memory strength in a category learning task. Our work bridges formal cognitive theories and neuroscientific models by illustrating that the same global similarity computations underlie processing in multiple cognitive domains. Moreover, by establishing a link between neural similarity and psychological memory strength, our findings suggest that there may be an isomorphism between psychological and neural representational spaces that can be exploited to test cognitive theories at both the neural and behavioral levels. PMID:24872552

In-Memory Business Intelligence: Concepts and Performance

NASA Astrophysics Data System (ADS)

Rantung, V. P.; Kembuan, O.; Rompas, P. T. D.; Mewengkang, A.; Liando, O. E. S.; Sumayku, J.

2018-02-01

This research aims to discuss in-memory Business Intelligent (BI) and to model the business analysis questions to know the performance of the in-memory BI. By using, the Qlickview application found BI dashboards that easily accessed and modified. The dashboards are developed together using an agile development approach such as pre-study, planning, iterative execution, implementation, and evaluation. At the end, this research helping analyzer in choosing a right implementation for BI solution.

Hybrid Shape Memory Alloy Composites for Extreme Environments

DTIC Science & Technology

2011-10-01

Shape Memory Alloys in Oil Well Applications,” Sintef Petroleum Research, 1999, Trondheim, Norway. 5. Hartl , D. J., Lagoudas, D., Mabe , J., Calkins...Materials and Structures, Vol. 19, No. 1., 2009. 6. Hartl , D. J., Lagoudas, D., Mabe , J., Calkins, F., and Mooney, J., “Use of Ni60Ti Shape Memory...hydraulic actuators) and can thus be located in environments not previously accessible. SMA actuators can also be found in the aerospace ( Hartl and

Using DMA for copying performance counter data to memory

DOEpatents

Gara, Alan; Salapura, Valentina; Wisniewski, Robert W.

2012-09-25

A device for copying performance counter data includes hardware path that connects a direct memory access (DMA) unit to a plurality of hardware performance counters and a memory device. Software prepares an injection packet for the DMA unit to perform copying, while the software can perform other tasks. In one aspect, the software that prepares the injection packet runs on a processing core other than the core that gathers the hardware performance counter data.

Using DMA for copying performance counter data to memory

DOEpatents

Gara, Alan; Salapura, Valentina; Wisniewski, Robert W

2013-12-31

A device for copying performance counter data includes hardware path that connects a direct memory access (DMA) unit to a plurality of hardware performance counters and a memory device. Software prepares an injection packet for the DMA unit to perform copying, while the software can perform other tasks. In one aspect, the software that prepares the injection packet runs on a processing core other than the core that gathers the hardware performance data.

Post Traumatic Stress Disorder (PTSD) in Emergency Responders Scoping Study: Literature Review

DTIC Science & Technology

2013-11-01

Memory Disorganized or fragmented memories with strong negative associations – hyper-accessible but not easily integrated into existing memory... Negative social support (shaming or blaming environment) History of PTSD History of peri-traumatic dissociation and interpersonal trauma Poor coping...trauma Incidence of PTSD Rape 65% of men, 46% of women Combat 38.8% Childhood neglect 23.9% of men, 48.5% of women Childhood physical abuse 22.3% of

On the mechanisms of cation injection in conducting bridge memories: The case of HfO{sub 2} in contact with noble metal anodes (Au, Cu, Ag)

DOE Office of Scientific and Technical Information (OSTI.GOV)

Saadi, M.; CNRS, LTM, F-38000 Grenoble; El Manar University, LMOP, 2092 Tunis

Resistance switching is studied in HfO{sub 2} as a function of the anode metal (Au, Cu, and Ag) in view of its application to resistive memories (resistive random access memories, RRAM). Current-voltage (I-V) and current-time (I-t) characteristics are presented. For Au anodes, resistance transition is controlled by oxygen vacancies (oxygen-based resistive random access memory, OxRRAM). For Ag anodes, resistance switching is governed by cation injection (Conducting Bridge random access memory, CBRAM). Cu anodes lead to an intermediate case. I-t experiments are shown to be a valuable tool to distinguish between OxRRAM and CBRAM behaviors. A model is proposed to explainmore » the high-to-low resistance transition in CBRAMs. The model is based on the theory of low-temperature oxidation of metals (Cabrera-Mott theory). Upon electron injection, oxygen vacancies and oxygen ions are generated in the oxide. Oxygen ions are drifted to the anode, and an interfacial oxide is formed at the HfO{sub 2}/anode interface. If oxygen ion mobility is low in the interfacial oxide, a negative space charge builds-up at the HfO{sub 2}/oxide interface. This negative space charge is the source of a strong electric field across the interfacial oxide thickness, which pulls out cations from the anode (CBRAM case). Inversely, if oxygen ions migration through the interfacial oxide is important (or if the anode does not oxidize such as Au), bulk oxygen vacancies govern resistance transition (OxRRAM case).« less

A spin transfer torque magnetoresistance random access memory-based high-density and ultralow-power associative memory for fully data-adaptive nearest neighbor search with current-mode similarity evaluation and time-domain minimum searching

NASA Astrophysics Data System (ADS)

Ma, Yitao; Miura, Sadahiko; Honjo, Hiroaki; Ikeda, Shoji; Hanyu, Takahiro; Ohno, Hideo; Endoh, Tetsuo

2017-04-01

A high-density nonvolatile associative memory (NV-AM) based on spin transfer torque magnetoresistive random access memory (STT-MRAM), which achieves highly concurrent and ultralow-power nearest neighbor search with full adaptivity of the template data format, has been proposed and fabricated using the 90 nm CMOS/70 nm perpendicular-magnetic-tunnel-junction hybrid process. A truly compact current-mode circuitry is developed to realize flexibly controllable and high-parallel similarity evaluation, which makes the NV-AM adaptable to any dimensionality and component-bit of template data. A compact dual-stage time-domain minimum searching circuit is also developed, which can freely extend the system for more template data by connecting multiple NM-AM cores without additional circuits for integrated processing. Both the embedded STT-MRAM module and the computing circuit modules in this NV-AM chip are synchronously power-gated to completely eliminate standby power and maximally reduce operation power by only activating the currently accessed circuit blocks. The operations of a prototype chip at 40 MHz are demonstrated by measurement. The average operation power is only 130 µW, and the circuit density is less than 11 µm2/bit. Compared with the latest conventional works in both volatile and nonvolatile approaches, more than 31.3% circuit area reductions and 99.2% power improvements are achieved, respectively. Further power performance analyses are discussed, which verify the special superiority of the proposed NV-AM in low-power and large-memory-based VLSIs.

Temporal Clustering and Sequencing in Short-Term Memory and Episodic Memory

ERIC Educational Resources Information Center

Farrell, Simon

2012-01-01

A model of short-term memory and episodic memory is presented, with the core assumptions that (a) people parse their continuous experience into episodic clusters and (b) items are clustered together in memory as episodes by binding information within an episode to a common temporal context. Along with the additional assumption that information…

Are Asians Forgetful? Perception, Retention, and Recall in Episodic Remembering

ERIC Educational Resources Information Center

Wang, Qi

2009-01-01

Cross-cultural studies have shown that Asians exhibit less accessibility to episodic memories than Euro-Americans. This difference is often attributed to differential cognitive and social influences on memory retention, although there have been no empirical data concerning the underlying mechanism. Three studies were conducted to examine encoding…

Pattern Perception and Pictures for the Blind

ERIC Educational Resources Information Center

Heller, Morton A.; McCarthy, Melissa; Clark, Ashley

2005-01-01

This article reviews recent research on perception of tangible pictures in sighted and blind people. Haptic picture naming accuracy is dependent upon familiarity and access to semantic memory, just as in visual recognition. Performance is high when haptic picture recognition tasks do not depend upon semantic memory. Viewpoint matters for the ease…

Multisensory Integration Affects Visuo-Spatial Working Memory

ERIC Educational Resources Information Center

Botta, Fabiano; Santangelo, Valerio; Raffone, Antonino; Sanabria, Daniel; Lupianez, Juan; Belardinelli, Marta Olivetti

2011-01-01

In the present study, we investigate how spatial attention, driven by unisensory and multisensory cues, can bias the access of information into visuo-spatial working memory (VSWM). In a series of four experiments, we compared the effectiveness of spatially-nonpredictive visual, auditory, or audiovisual cues in capturing participants' spatial…

Body Posture Facilitates Retrieval of Autobiographical Memories

ERIC Educational Resources Information Center

Dijkstra, Katinka; Kaschak, Michael P.; Zwaan, Rolf A.

2007-01-01

We assessed potential facilitation of congruent body posture on access to and retention of autobiographical memories in younger and older adults. Response times were shorter when body positions during prompted retrieval of autobiographical events were similar to the body positions in the original events than when body position was incongruent.…

Cognitive Processing in Oral and Silent Reading Comprehension.

ERIC Educational Resources Information Center

Salasoo, Aita

1986-01-01

Reading rates and comprehension measures that probed recognition of various levels of text structure were collected for passages read orally and silently by 16 college students. Results showed that memory traces of text microstructure created in oral reading were accessed faster during memory-based comprehension tasks than traces established by…

Memory-Based Approaches and Beyond

ERIC Educational Resources Information Center

Sanford, Anthony J.; Garrod, Simon C.

2005-01-01

In this article, we discuss 2 issues that we believe any theory of discourse comprehension has to take account of-accessing irrelevant information and granularity. Along the lines that have been suggested as demonstrating the memory-based account, we describe some work in favor of the recruitment of apparently irrelevant information from memory…

Effector and memory T cell subsets in the response to bovine tuberculosis

USDA-ARS?s Scientific Manuscript database

Long-term (i.e., 14 days) cultured IFN-gamma ELISPOT assays of peripheral blood mononuclear cells (PBMC) are used to access T cell central memory (Tcm) responses in both cattle and humans. With bovine tuberculosis, vaccine-elicited long-term IFN-gamma ELISPOT response correlates with protection; how...

Evaluation of the train signal and rail systems for the Anton Anderson Memorial Tunnel.

DOT National Transportation Integrated Search

2014-07-01

The Whittier Access Project was completed in 2000. One phase of the project was to convert the 2.5 mile long Anton Anderson : Memorial Tunnel (Whittier Tunnel) into the worlds only dual-use highway/railroad tunnel with one way reversible highway t...

A Simple Solution to Providing Remote Access to CD-ROM.

ERIC Educational Resources Information Center

Garnham, Carla T.; Brodie, Kent

1990-01-01

A pilot project at the Medical College of Wisconsin illustrates how even small computing organizations with limited financial and staff resources can provide remote access to CD-ROM (Compact Disc-Read-Only-Memory) databases, and that providing such convenient access to a vast array of useful information can greatly benefit faculty and students.…

Administering an epoch initiated for remote memory access

DOEpatents

Blocksome, Michael A; Miller, Douglas R

2014-03-18

Methods, systems, and products are disclosed for administering an epoch initiated for remote memory access that include: initiating, by an origin application messaging module on an origin compute node, one or more data transfers to a target compute node for the epoch; initiating, by the origin application messaging module after initiating the data transfers, a closing stage for the epoch, including rejecting any new data transfers after initiating the closing stage for the epoch; determining, by the origin application messaging module, whether the data transfers have completed; and closing, by the origin application messaging module, the epoch if the data transfers have completed.

Administering an epoch initiated for remote memory access

DOEpatents

Blocksome, Michael A; Miller, Douglas R

2012-10-23

Methods, systems, and products are disclosed for administering an epoch initiated for remote memory access that include: initiating, by an origin application messaging module on an origin compute node, one or more data transfers to a target compute node for the epoch; initiating, by the origin application messaging module after initiating the data transfers, a closing stage for the epoch, including rejecting any new data transfers after initiating the closing stage for the epoch; determining, by the origin application messaging module, whether the data transfers have completed; and closing, by the origin application messaging module, the epoch if the data transfers have completed.

Administering an epoch initiated for remote memory access

DOEpatents

Blocksome, Michael A.; Miller, Douglas R.

2013-01-01

Methods, systems, and products are disclosed for administering an epoch initiated for remote memory access that include: initiating, by an origin application messaging module on an origin compute node, one or more data transfers to a target compute node for the epoch; initiating, by the origin application messaging module after initiating the data transfers, a closing stage for the epoch, including rejecting any new data transfers after initiating the closing stage for the epoch; determining, by the origin application messaging module, whether the data transfers have completed; and closing, by the origin application messaging module, the epoch if the data transfers have completed.

A 16K-bit static IIL RAM with 25-ns access time

NASA Astrophysics Data System (ADS)

Inabe, Y.; Hayashi, T.; Kawarada, K.; Miwa, H.; Ogiue, K.

1982-04-01

A 16,384 x 1-bit RAM with 25-ns access time, 600-mW power dissipation, and 33 sq mm chip size has been developed. Excellent speed-power performance with high packing density has been achieved by an oxide isolation technology in conjunction with novel ECL circuit techniques and IIL flip-flop memory cells, 980 sq microns (35 x 28 microns) in cell size. Development results have shown that IIL flip-flop memory cell is a trump card for assuring achievement of a high-performance large-capacity bipolar RAM, in the above 16K-bit/chip area.