Synthetic Analog and Digital Circuits for Cellular Computation and Memory

PubMed Central

Purcell, Oliver; Lu, Timothy K.

2014-01-01

Biological computation is a major area of focus in synthetic biology because it has the potential to enable a wide range of applications. Synthetic biologists have applied engineering concepts to biological systems in order to construct progressively more complex gene circuits capable of processing information in living cells. Here, we review the current state of computational genetic circuits and describe artificial gene circuits that perform digital and analog computation. We then discuss recent progress in designing gene circuits that exhibit memory, and how memory and computation have been integrated to yield more complex systems that can both process and record information. Finally, we suggest new directions for engineering biological circuits capable of computation. PMID:24794536

Analysis of the capability to effectively design complementary metal oxide semiconductor integrated circuits

NASA Astrophysics Data System (ADS)

McConkey, M. L.

1984-12-01

A complete CMOS/BULK design cycle has been implemented and fully tested to evaluate its effectiveness and a viable set of computer-aided design tools for the layout, verification, and simulation of CMOS/BULK integrated circuits. This design cycle is good for p-well, n-well, or twin-well structures, although current fabrication technique available limit this to p-well only. BANE, an integrated layout program from Stanford, is at the center of this design cycle and was shown to be simple to use in the layout of CMOS integrated circuits (it can be also used to layout NMOS integrated circuits). A flowchart was developed showing the design cycle from initial layout, through design verification, and to circuit simulation using NETLIST, PRESIM, and RNL from the University of Washington. A CMOS/BULK library was designed and includes logic gates that were designed and completely tested by following this flowchart. Also designed was an arithmetic logic unit as a more complex test of the CMOS/BULK design cycle.

Method for Evaluating the Corrosion Resistance of Aluminum Metallization of Integrated Circuits under Multifactorial Influence

NASA Astrophysics Data System (ADS)

Kolomiets, V. I.

2018-03-01

The influence of complex influence of climatic factors (temperature, humidity) and electric mode (supply voltage) on the corrosion resistance of metallization of integrated circuits has been considered. The regression dependence of the average time of trouble-free operation t on the mentioned factors has been established in the form of a modified Arrhenius equation that is adequate in a wide range of factor values and is suitable for selecting accelerated test modes. A technique for evaluating the corrosion resistance of aluminum metallization of depressurized CMOS integrated circuits has been proposed.

Proceedings of the Workshop on Compound Semiconductor Devices and Integrated Circuits (13th) Held in Cabourg, France on 10-12 May 1989

DTIC Science & Technology

1989-05-12

USA Resonant tunneling transistors and New III-V memory devices for new circuit architectures with reduced complexity F. Capasso, Bell. Murray Hill...the evaporation, or by selective oxidation of As, leaving metallic Ga clusters and b) the interdiffusive deterioration of metal contacts on GaAs...VEB (My) Resonant Tunneling Transistors and New III-V Memory Devices for New Circuit Architectures with Reduced Complexity . Invited: F. Capasso

Flexible and low-voltage integrated circuits constructed from high-performance nanocrystal transistors.

PubMed

Kim, David K; Lai, Yuming; Diroll, Benjamin T; Murray, Christopher B; Kagan, Cherie R

2012-01-01

Colloidal semiconductor nanocrystals are emerging as a new class of solution-processable materials for low-cost, flexible, thin-film electronics. Although these colloidal inks have been shown to form single, thin-film field-effect transistors with impressive characteristics, the use of multiple high-performance nanocrystal field-effect transistors in large-area integrated circuits has not been shown. This is needed to understand and demonstrate the applicability of these discrete nanocrystal field-effect transistors for advanced electronic technologies. Here we report solution-deposited nanocrystal integrated circuits, showing nanocrystal integrated circuit inverters, amplifiers and ring oscillators, constructed from high-performance, low-voltage, low-hysteresis CdSe nanocrystal field-effect transistors with electron mobilities of up to 22 cm(2) V(-1) s(-1), current modulation >10(6) and subthreshold swing of 0.28 V dec(-1). We fabricated the nanocrystal field-effect transistors and nanocrystal integrated circuits from colloidal inks on flexible plastic substrates and scaled the devices to operate at low voltages. We demonstrate that colloidal nanocrystal field-effect transistors can be used as building blocks to construct complex integrated circuits, promising a viable material for low-cost, flexible, large-area electronics.

Displacement Damage in Bipolar Linear Integrated Circuits

NASA Technical Reports Server (NTRS)

Rax, B. G.; Johnston, A. H.; Miyahira, T.

2000-01-01

Although many different processes can be used to manufacture linear integrated circuits, the process that is used for most circuits is optimized for high voltage -- a total power supply voltage of about 40 V -- and low cost. This process, which has changed little during the last twenty years, uses lateral and substrate p-n-p transistors. These p-n-p transistors have very wide base regions, increasing their sensitivity to displacement damage from electrons and protons. Although displacement damage effects can be easily treated for individual transistors, the net effect on linear circuits can be far more complex because circuit operation often depends on the interaction of several internal transistors. Note also that some circuits are made with more advanced processes with much narrower base widths. Devices fabricated with these newer processes are not expected to be significantly affected by displacement damage for proton fluences below 1 x 10(exp 12) p/sq cm. This paper discusses displacement damage in linear integrated circuits with more complex failure modes than those exhibited by simpler devices, such as the LM111 comparator, where the dominant response mode is gain degradation of the input transistor. Some circuits fail catastrophically at much lower equivalent total dose levels compared to tests with gamma rays. The device works satisfactorily up to nearly 1 Mrad(Si) when it is irradiated with gamma rays, but fails catastrophically between 50 and 70 krad(Si) when it is irradiated with protons.

Monolithic optical integrated control circuitry for GaAs MMIC-based phased arrays

NASA Technical Reports Server (NTRS)

Bhasin, K. B.; Ponchak, G. E.; Kascak, T. J.

1985-01-01

Gallium arsenide (GaAs) monolithic microwave integrated circuits (MMIC's) show promise in phased-array antenna applications for future space communications systems. Their efficient usage will depend on the control of amplitude and phase signals for each MMIC element in the phased array and in the low-loss radiofrequency feed. For a phased array contining several MMIC elements a complex system is required to control and feed each element. The characteristics of GaAs MMIC's for 20/30-GHz phased-array systems are discussed. The optical/MMIC interface and the desired characteristics of optical integrated circuits (OIC's) for such an interface are described. Anticipated fabrication considerations for eventual full monolithic integration of optical integrated circuits with MMIC's on a GaAs substrate are presented.

The Topographical Mapping in Drosophila Central Complex Network and Its Signal Routing

PubMed Central

Chang, Po-Yen; Su, Ta-Shun; Shih, Chi-Tin; Lo, Chung-Chuan

2017-01-01

Neural networks regulate brain functions by routing signals. Therefore, investigating the detailed organization of a neural circuit at the cellular levels is a crucial step toward understanding the neural mechanisms of brain functions. To study how a complicated neural circuit is organized, we analyzed recently published data on the neural circuit of the Drosophila central complex, a brain structure associated with a variety of functions including sensory integration and coordination of locomotion. We discovered that, except for a small number of “atypical” neuron types, the network structure formed by the identified 194 neuron types can be described by only a few simple mathematical rules. Specifically, the topological mapping formed by these neurons can be reconstructed by applying a generation matrix on a small set of initial neurons. By analyzing how information flows propagate with or without the atypical neurons, we found that while the general pattern of signal propagation in the central complex follows the simple topological mapping formed by the “typical” neurons, some atypical neurons can substantially re-route the signal pathways, implying specific roles of these neurons in sensory signal integration. The present study provides insights into the organization principle and signal integration in the central complex. PMID:28443014

Very high speed integrated circuits - Into the second generation. V - The issues of standardization and technology insertion

NASA Astrophysics Data System (ADS)

Martin, J.

1982-04-01

It is shown that the fulfillment of very high speed integrated circuit (VHSIC) device development goals entails the restructuring of military electronics acquisition policy, standardization which produces the maximum number of systems and subsystems by means of the minimum number of flexible, broad-purpose, high-power semiconductors, and especially the standardization of bus structures incorporating a priorization system. It is expected that the Design Specification Handbook currently under preparation by the VHSIC program office of the DOD will make the design of such systems a task whose complexity is comparable to that of present integrated circuit electronics.

Carbon nanotube circuit integration up to sub-20 nm channel lengths.

PubMed

Shulaker, Max Marcel; Van Rethy, Jelle; Wu, Tony F; Liyanage, Luckshitha Suriyasena; Wei, Hai; Li, Zuanyi; Pop, Eric; Gielen, Georges; Wong, H-S Philip; Mitra, Subhasish

2014-04-22

Carbon nanotube (CNT) field-effect transistors (CNFETs) are a promising emerging technology projected to achieve over an order of magnitude improvement in energy-delay product, a metric of performance and energy efficiency, compared to silicon-based circuits. However, due to substantial imperfections inherent with CNTs, the promise of CNFETs has yet to be fully realized. Techniques to overcome these imperfections have yielded promising results, but thus far only at large technology nodes (1 μm device size). Here we demonstrate the first very large scale integration (VLSI)-compatible approach to realizing CNFET digital circuits at highly scaled technology nodes, with devices ranging from 90 nm to sub-20 nm channel lengths. We demonstrate inverters functioning at 1 MHz and a fully integrated CNFET infrared light sensor and interface circuit at 32 nm channel length. This demonstrates the feasibility of realizing more complex CNFET circuits at highly scaled technology nodes.

Implantable neurotechnologies: bidirectional neural interfaces--applications and VLSI circuit implementations.

PubMed

Greenwald, Elliot; Masters, Matthew R; Thakor, Nitish V

2016-01-01

A bidirectional neural interface is a device that transfers information into and out of the nervous system. This class of devices has potential to improve treatment and therapy in several patient populations. Progress in very large-scale integration has advanced the design of complex integrated circuits. System-on-chip devices are capable of recording neural electrical activity and altering natural activity with electrical stimulation. Often, these devices include wireless powering and telemetry functions. This review presents the state of the art of bidirectional circuits as applied to neuroprosthetic, neurorepair, and neurotherapeutic systems.

A statistical-based material and process guidelines for design of carbon nanotube field-effect transistors in gigascale integrated circuits.

PubMed

Ghavami, Behnam; Raji, Mohsen; Pedram, Hossein

2011-08-26

Carbon nanotube field-effect transistors (CNFETs) show great promise as building blocks of future integrated circuits. However, synthesizing single-walled carbon nanotubes (CNTs) with accurate chirality and exact positioning control has been widely acknowledged as an exceedingly complex task. Indeed, density and chirality variations in CNT growth can compromise the reliability of CNFET-based circuits. In this paper, we present a novel statistical compact model to estimate the failure probability of CNFETs to provide some material and process guidelines for the design of CNFETs in gigascale integrated circuits. We use measured CNT spacing distributions within the framework of detailed failure analysis to demonstrate that both the CNT density and the ratio of metallic to semiconducting CNTs play dominant roles in defining the failure probability of CNFETs. Besides, it is argued that the large-scale integration of these devices within an integrated circuit will be feasible only if a specific range of CNT density with an acceptable ratio of semiconducting to metallic CNTs can be adjusted in a typical synthesis process.

Training and operation of an integrated neuromorphic network based on metal-oxide memristors.

PubMed

Prezioso, M; Merrikh-Bayat, F; Hoskins, B D; Adam, G C; Likharev, K K; Strukov, D B

2015-05-07

Despite much progress in semiconductor integrated circuit technology, the extreme complexity of the human cerebral cortex, with its approximately 10(14) synapses, makes the hardware implementation of neuromorphic networks with a comparable number of devices exceptionally challenging. To provide comparable complexity while operating much faster and with manageable power dissipation, networks based on circuits combining complementary metal-oxide-semiconductors (CMOSs) and adjustable two-terminal resistive devices (memristors) have been developed. In such circuits, the usual CMOS stack is augmented with one or several crossbar layers, with memristors at each crosspoint. There have recently been notable improvements in the fabrication of such memristive crossbars and their integration with CMOS circuits, including first demonstrations of their vertical integration. Separately, discrete memristors have been used as artificial synapses in neuromorphic networks. Very recently, such experiments have been extended to crossbar arrays of phase-change memristive devices. The adjustment of such devices, however, requires an additional transistor at each crosspoint, and hence these devices are much harder to scale than metal-oxide memristors, whose nonlinear current-voltage curves enable transistor-free operation. Here we report the experimental implementation of transistor-free metal-oxide memristor crossbars, with device variability sufficiently low to allow operation of integrated neural networks, in a simple network: a single-layer perceptron (an algorithm for linear classification). The network can be taught in situ using a coarse-grain variety of the delta rule algorithm to perform the perfect classification of 3 × 3-pixel black/white images into three classes (representing letters). This demonstration is an important step towards much larger and more complex memristive neuromorphic networks.

Lithography for enabling advances in integrated circuits and devices.

PubMed

Garner, C Michael

2012-08-28

Because the transistor was fabricated in volume, lithography has enabled the increase in density of devices and integrated circuits. With the invention of the integrated circuit, lithography enabled the integration of higher densities of field-effect transistors through evolutionary applications of optical lithography. In 1994, the semiconductor industry determined that continuing the increase in density transistors was increasingly difficult and required coordinated development of lithography and process capabilities. It established the US National Technology Roadmap for Semiconductors and this was expanded in 1999 to the International Technology Roadmap for Semiconductors to align multiple industries to provide the complex capabilities to continue increasing the density of integrated circuits to nanometre scales. Since the 1960s, lithography has become increasingly complex with the evolution from contact printers, to steppers, pattern reduction technology at i-line, 248 nm and 193 nm wavelengths, which required dramatic improvements of mask-making technology, photolithography printing and alignment capabilities and photoresist capabilities. At the same time, pattern transfer has evolved from wet etching of features, to plasma etch and more complex etching capabilities to fabricate features that are currently 32 nm in high-volume production. To continue increasing the density of devices and interconnects, new pattern transfer technologies will be needed with options for the future including extreme ultraviolet lithography, imprint technology and directed self-assembly. While complementary metal oxide semiconductors will continue to be extended for many years, these advanced pattern transfer technologies may enable development of novel memory and logic technologies based on different physical phenomena in the future to enhance and extend information processing.

Synthetic analog and digital circuits for cellular computation and memory.

PubMed

Purcell, Oliver; Lu, Timothy K

2014-10-01

Biological computation is a major area of focus in synthetic biology because it has the potential to enable a wide range of applications. Synthetic biologists have applied engineering concepts to biological systems in order to construct progressively more complex gene circuits capable of processing information in living cells. Here, we review the current state of computational genetic circuits and describe artificial gene circuits that perform digital and analog computation. We then discuss recent progress in designing gene networks that exhibit memory, and how memory and computation have been integrated to yield more complex systems that can both process and record information. Finally, we suggest new directions for engineering biological circuits capable of computation. Copyright © 2014 The Authors. Published by Elsevier Ltd.. All rights reserved.

Microprocessor-based integration of microfluidic control for the implementation of automated sensor monitoring and multithreaded optimization algorithms.

PubMed

Ezra, Elishai; Maor, Idan; Bavli, Danny; Shalom, Itai; Levy, Gahl; Prill, Sebastian; Jaeger, Magnus S; Nahmias, Yaakov

2015-08-01

Microfluidic applications range from combinatorial synthesis to high throughput screening, with platforms integrating analog perfusion components, digitally controlled micro-valves and a range of sensors that demand a variety of communication protocols. Currently, discrete control units are used to regulate and monitor each component, resulting in scattered control interfaces that limit data integration and synchronization. Here, we present a microprocessor-based control unit, utilizing the MS Gadgeteer open framework that integrates all aspects of microfluidics through a high-current electronic circuit that supports and synchronizes digital and analog signals for perfusion components, pressure elements, and arbitrary sensor communication protocols using a plug-and-play interface. The control unit supports an integrated touch screen and TCP/IP interface that provides local and remote control of flow and data acquisition. To establish the ability of our control unit to integrate and synchronize complex microfluidic circuits we developed an equi-pressure combinatorial mixer. We demonstrate the generation of complex perfusion sequences, allowing the automated sampling, washing, and calibrating of an electrochemical lactate sensor continuously monitoring hepatocyte viability following exposure to the pesticide rotenone. Importantly, integration of an optical sensor allowed us to implement automated optimization protocols that require different computational challenges including: prioritized data structures in a genetic algorithm, distributed computational efforts in multiple-hill climbing searches and real-time realization of probabilistic models in simulated annealing. Our system offers a comprehensive solution for establishing optimization protocols and perfusion sequences in complex microfluidic circuits.

Compact beam splitters with deep gratings for miniature photonic integrated circuits: design and implementation aspects.

PubMed

Chen, Chin-Hui; Klamkin, Jonathan; Nicholes, Steven C; Johansson, Leif A; Bowers, John E; Coldren, Larry A

2009-09-01

We present an extensive study of an ultracompact grating-based beam splitter suitable for photonic integrated circuits (PICs) that have stringent density requirements. The 10 microm long beam splitter exhibits equal splitting, low insertion loss, and also provides a high extinction ratio in an integrated coherent balanced receiver. We further present the design strategies for avoiding mode distortion in the beam splitter and discuss optimization of the widths of the detectors to improve insertion loss and extinction ratio of the coherent receiver circuit. In our study, we show that the grating-based beam splitter is a competitive technology having low fabrication complexity for ultracompact PICs.

Integrating DNA strand-displacement circuitry with DNA tile self-assembly

PubMed Central

Zhang, David Yu; Hariadi, Rizal F.; Choi, Harry M.T.; Winfree, Erik

2013-01-01

DNA nanotechnology has emerged as a reliable and programmable way of controlling matter at the nanoscale through the specificity of Watson–Crick base pairing, allowing both complex self-assembled structures with nanometer precision and complex reaction networks implementing digital and analog behaviors. Here we show how two well-developed frameworks, DNA tile self-assembly and DNA strand-displacement circuits, can be systematically integrated to provide programmable kinetic control of self-assembly. We demonstrate the triggered and catalytic isothermal self-assembly of DNA nanotubes over 10 μm long from precursor DNA double-crossover tiles activated by an upstream DNA catalyst network. Integrating more sophisticated control circuits and tile systems could enable precise spatial and temporal organization of dynamic molecular structures. PMID:23756381

New dynamic FET logic and serial memory circuits for VLSI GaAs technology

NASA Technical Reports Server (NTRS)

Eldin, A. G.

1991-01-01

The complexity of GaAs field effect transistor (FET) very large scale integration (VLSI) circuits is limited by the maximum power dissipation while the uniformity of the device parameters determines the functional yield. In this work, digital GaAs FET circuits are presented that eliminate the DC power dissipation and reduce the area to 50% of that of the conventional static circuits. Its larger tolerance to device parameter variations results in higher functional yield.

Quantum dash based single section mode locked lasers for photonic integrated circuits.

PubMed

Joshi, Siddharth; Calò, Cosimo; Chimot, Nicolas; Radziunas, Mindaugas; Arkhipov, Rostislav; Barbet, Sophie; Accard, Alain; Ramdane, Abderrahim; Lelarge, Francois

2014-05-05

We present the first demonstration of an InAs/InP Quantum Dash based single-section frequency comb generator designed for use in photonic integrated circuits (PICs). The laser cavity is closed using a specifically designed Bragg reflector without compromising the mode-locking performance of the self pulsating laser. This enables the integration of single-section mode-locked laser in photonic integrated circuits as on-chip frequency comb generators. We also investigate the relations between cavity modes in such a device and demonstrate how the dispersion of the complex mode frequencies induced by the Bragg grating implies a violation of the equi-distance between the adjacent mode frequencies and, therefore, forbids the locking of the modes in a classical Bragg Device. Finally we integrate such a Bragg Mirror based laser with Semiconductor Optical Amplifier (SOA) to demonstrate the monolithic integration of QDash based low phase noise sources in PICs.

Programmable resistive-switch nanowire transistor logic circuits.

PubMed

Shim, Wooyoung; Yao, Jun; Lieber, Charles M

2014-09-10

Programmable logic arrays (PLA) constitute a promising architecture for developing increasingly complex and functional circuits through nanocomputers from nanoscale building blocks. Here we report a novel one-dimensional PLA element that incorporates resistive switch gate structures on a semiconductor nanowire and show that multiple elements can be integrated to realize functional PLAs. In our PLA element, the gate coupling to the nanowire transistor can be modulated by the memory state of the resistive switch to yield programmable active (transistor) or inactive (resistor) states within a well-defined logic window. Multiple PLA nanowire elements were integrated and programmed to yield a working 2-to-4 demultiplexer with long-term retention. The well-defined, controllable logic window and long-term retention of our new one-dimensional PLA element provide a promising route for building increasingly complex circuits with nanoscale building blocks.

Optical device terahertz integration in a two-dimensional-three-dimensional heterostructure.

PubMed

Feng, Zhifang; Lin, Jie; Feng, Shuai

2018-01-10

The transmission properties of an off-planar integrated circuit including two wavelength division demultiplexers are designed, simulated, and analyzed in detail by the finite-difference time-domain method. The results show that the wavelength selection for different ports (0.404[c/a] at B 2 port, 0.389[c/a] at B 3 port, and 0.394[c/a] at B 4 port) can be realized by adjusting the parameters. It is especially important that the off-planar integration between two complex devices is also realized. These simulated results give valuable promotions in the all-optical integrated circuit, especially in compact integration.

Identifying behavioral circuits in Drosophila melanogaster: moving targets in a flying insect.

PubMed

Griffith, Leslie C

2012-08-01

Drosophila melanogaster has historically been the premier model system for understanding the molecular and genetic bases of complex behaviors. In the last decade technical advances, in the form of new genetic tools and electrophysiological and optical methods, have allowed investigators to begin to dissect the neuronal circuits that generate behavior in the adult. The blossoming of circuit analysis in this organism has also reinforced our appreciation of the inadequacy of wiring diagrams for specifying complex behavior. Neuromodulation and neuronal plasticity act to reconfigure circuits on both short and long time scales. These processes act on the connectome, providing context by integrating external and internal cues that are relevant for behavioral choices. New approaches in the fly are providing insight into these basic principles of circuit function. Copyright © 2012 Elsevier Ltd. All rights reserved.

Design automation for integrated nonlinear logic circuits (Conference Presentation)

NASA Astrophysics Data System (ADS)

Van Vaerenbergh, Thomas; Pelc, Jason; Santori, Charles; Bose, Ranojoy; Kielpinski, Dave; Beausoleil, Raymond G.

2016-05-01

A key enabler of the IT revolution of the late 20th century was the development of electronic design automation (EDA) tools allowing engineers to manage the complexity of electronic circuits with transistor counts now reaching into the billions. Recently, we have been developing large-scale nonlinear photonic integrated logic circuits for next generation all-optical information processing. At this time a sufficiently powerful EDA-style software tool chain to design this type of complex circuits does not yet exist. Here we describe a hierarchical approach to automating the design and validation of photonic integrated circuits, which can scale to several orders of magnitude higher complexity than the state of the art. Most photonic integrated circuits developed today consist of a small number of components, and only limited hierarchy. For example, a simple photonic transceiver may contain on the order of 10 building-block components, consisting of grating couplers for photonic I/O, modulators, and signal splitters/combiners. Because this is relatively easy to lay out by hand (or simple script) existing photonic design tools have relatively little automation in comparison to electronics tools. But demonstrating all-optical logic will require significantly more complex photonic circuits containing up to 1,000 components, hence becoming infeasible to design manually. Our design framework is based off Python-based software from Luceda Photonics which provides an environment to describe components, simulate their behavior, and export design files (GDS) to foundries for fabrication. At a fundamental level, a photonic component is described as a parametric cell (PCell) similarly to electronics design. PCells are described by geometric characteristics of their layout. A critical part of the design framework is the implementation of PCells as Python objects. PCell objects can then use inheritance to simplify design, and hierarchical designs can be made by creating composite PCells (modules) which consist of primitive building-block PCells (components). To automatically produce layouts, we built on a construct provided by Luceda called a PlaceAndAutoRoute cell: we create a module component by supplying a list of child cells, and a list of the desired connections between the cells (e.g. the out0 port of a microring is connected to a grating coupler). This functionality allowed us to write algorithms to automatically lay out the components: for instance, by laying out the first component and walking through the list of connections to check to see if the next component is already placed or not. The placement and orientation of the new component is determined by minimizing the length of a connecting waveguide. Our photonic circuits also utilize electrical signals to tune the photonic elements (setting propagation phases or microring resonant frequencies via thermo-optical tuning): the algorithm also routes the contacts for the metal heaters to contact pads at the edge of the circuit being designed where it can be contacted by electrical probes. We are currently validating a test run fabricated over the summer, and will use detailed characterization results to prepare our final design cycle in which we aim to demonstrate complex operational logic circuits containing ~50-100 nonlinear resonators.

GaAs VLSI for aerospace electronics

NASA Technical Reports Server (NTRS)

Larue, G.; Chan, P.

1990-01-01

Advanced aerospace electronics systems require high-speed, low-power, radiation-hard, digital components for signal processing, control, and communication applications. GaAs VLSI devices provide a number of advantages over silicon devices including higher carrier velocities, ability to integrate with high performance optical devices, and high-resistivity substrates that provide very short gate delays, good isolation, and tolerance to many forms of radiation. However, III-V technologies also have disadvantages, such as lower yield compared to silicon MOS technology. Achieving very large scale integration (VLSI) is particularly important for fast complex systems. At very short gate delays (less than 100 ps), chip-to-chip interconnects severely degrade circuit clock rates. Complex systems, therefore, benefit greatly when as many gates as possible are placed on a single chip. To fully exploit the advantages of GaAs circuits, attention must be focused on achieving high integration levels by reducing power dissipation, reducing the number of devices per logic function, and providing circuit designs that are more tolerant to process and environmental variations. In addition, adequate noise margin must be maintained to ensure a practical yield.

Enabling complex genetic circuits to respond to extrinsic environmental signals.

PubMed

Hoynes-O'Connor, Allison; Shopera, Tatenda; Hinman, Kristina; Creamer, John Philip; Moon, Tae Seok

2017-07-01

Genetic circuits have the potential to improve a broad range of metabolic engineering processes and address a variety of medical and environmental challenges. However, in order to engineer genetic circuits that can meet the needs of these real-world applications, genetic sensors that respond to relevant extrinsic and intrinsic signals must be implemented in complex genetic circuits. In this work, we construct the first AND and NAND gates that respond to temperature and pH, two signals that have relevance in a variety of real-world applications. A previously identified pH-responsive promoter and a temperature-responsive promoter were extracted from the E. coli genome, characterized, and modified to suit the needs of the genetic circuits. These promoters were combined with components of the type III secretion system in Salmonella typhimurium and used to construct a set of AND gates with up to 23-fold change. Next, an antisense RNA was integrated into the circuit architecture to invert the logic of the AND gate and generate a set of NAND gates with up to 1168-fold change. These circuits provide the first demonstration of complex pH- and temperature-responsive genetic circuits, and lay the groundwork for the use of similar circuits in real-world applications. Biotechnol. Bioeng. 2017;114: 1626-1631. © 2017 Wiley Periodicals, Inc. © 2017 Wiley Periodicals, Inc.

Digitally Programmable Analogue Circuits for Sensor Conditioning Systems

PubMed Central

Zatorre, Guillermo; Medrano, Nicolás; Sanz, María Teresa; Aldea, Concepción; Calvo, Belén; Celma, Santiago

2009-01-01

This work presents two current-mode integrated circuits designed for sensor signal preprocessing in embedded systems. The proposed circuits have been designed to provide good signal transfer and fulfill their function, while minimizing the load effects due to building complex conditioning architectures. The processing architecture based on the proposed building blocks can be reconfigured through digital programmability. Thus, sensor useful range can be expanded, changes in the sensor operation can be compensated for and furthermore, undesirable effects such as device mismatching and undesired physical magnitudes sensor sensibilities are reduced. The circuits were integrated using a 0.35 μm standard CMOS process. Experimental measurements, load effects and a study of two different tuning strategies are presented. From these results, system performance is tested in an application which entails extending the linear range of a magneto-resistive sensor. Circuit area, average power consumption and programmability features allow these circuits to be included in embedded sensing systems as a part of the analogue conditioning components. PMID:22412331

Radiation-Hard Complementary Integrated Circuits Based on Semiconducting Single-Walled Carbon Nanotubes.

PubMed

McMorrow, Julian J; Cress, Cory D; Gaviria Rojas, William A; Geier, Michael L; Marks, Tobin J; Hersam, Mark C

2017-03-28

Increasingly complex demonstrations of integrated circuit elements based on semiconducting single-walled carbon nanotubes (SWCNTs) mark the maturation of this technology for use in next-generation electronics. In particular, organic materials have recently been leveraged as dopant and encapsulation layers to enable stable SWCNT-based rail-to-rail, low-power complementary metal-oxide-semiconductor (CMOS) logic circuits. To explore the limits of this technology in extreme environments, here we study total ionizing dose (TID) effects in enhancement-mode SWCNT-CMOS inverters that employ organic doping and encapsulation layers. Details of the evolution of the device transport properties are revealed by in situ and in operando measurements, identifying n-type transistors as the more TID-sensitive component of the CMOS system with over an order of magnitude larger degradation of the static power dissipation. To further improve device stability, radiation-hardening approaches are explored, resulting in the observation that SWNCT-CMOS circuits are TID-hard under dynamic bias operation. Overall, this work reveals conditions under which SWCNTs can be employed for radiation-hard integrated circuits, thus presenting significant potential for next-generation satellite and space applications.

Processing and Prolonged 500 C Testing of 4H-SiC JFET Integrated Circuits with Two Levels of Metal Interconnect

NASA Technical Reports Server (NTRS)

Spry, David J.; Neudeck, Philip G.; Chen, Liangyu; Lukco, Dorothy; Chang, Carl W.; Beheim, Glenn M.; Krasowski, Michael J.; Prokop, Norman F.

2015-01-01

Complex integrated circuit (IC) chips rely on more than one level of interconnect metallization for routing of electrical power and signals. This work reports the processing and testing of 4H-SiC junction field effect transistor (JFET) prototype ICs with two levels of metal interconnect capable of prolonged operation at 500 C. Packaged functional circuits including 3-and 11-stage ring oscillators, a 4-bit digital to analog converter, and a 4-bit address decoder and random access memory cell have been demonstrated at 500 C. A 3-stage oscillator functioned for over 3000 hours at 500 C in air ambient.

Computer modeling of batteries from nonlinear circuit elements

DOE Office of Scientific and Technical Information (OSTI.GOV)

Waaben, S.; Dyer, C.K.; Federico, J.

1985-06-01

Circuit analogs for a single battery cell have previously been composed of resistors, capacitors, and inductors. This work introduces a nonlinear circuit model for cell behavior. The circuit is configured around the PIN junction diode, whose charge-storage behavior has features similar to those of electrochemical cells. A user-friendly integrated circuit simulation computer program has reproduced a variety of complex cell responses including electrica isolation effects causing capacity loss, as well as potentiodynamic peaks and discharge phenomena hitherto thought to be thermodynamic in origin. However, in this work, they are shown to be simply due to spatial distribution of stored chargemore » within a practical electrode.« less

Additive manufacturing of hybrid circuits

DOE PAGES

Bell, Nelson S.; Sarobol, Pylin; Cook, Adam; ...

2016-03-26

There is a rising interest in developing functional electronics using additively manufactured components. Considerations in materials selection and pathways to forming hybrid circuits and devices must demonstrate useful electronic function; must enable integration; and must complement the complex shape, low cost, high volume, and high functionality of structural but generally electronically passive additively manufactured components. This article reviews several emerging technologies being used in industry and research/development to provide integration advantages of fabricating multilayer hybrid circuits or devices. First, we review a maskless, noncontact, direct write (DW) technology that excels in the deposition of metallic colloid inks for electrical interconnects.more » Second, we review a complementary technology, aerosol deposition (AD), which excels in the deposition of metallic and ceramic powder as consolidated, thick conformal coatings and is additionally patternable through masking. As a result, we show examples of hybrid circuits/devices integrated beyond 2-D planes, using combinations of DW or AD processes and conventional, established processes.« less

Three-dimensional integration of nanotechnologies for computing and data storage on a single chip

NASA Astrophysics Data System (ADS)

Shulaker, Max M.; Hills, Gage; Park, Rebecca S.; Howe, Roger T.; Saraswat, Krishna; Wong, H.-S. Philip; Mitra, Subhasish

2017-07-01

The computing demands of future data-intensive applications will greatly exceed the capabilities of current electronics, and are unlikely to be met by isolated improvements in transistors, data storage technologies or integrated circuit architectures alone. Instead, transformative nanosystems, which use new nanotechnologies to simultaneously realize improved devices and new integrated circuit architectures, are required. Here we present a prototype of such a transformative nanosystem. It consists of more than one million resistive random-access memory cells and more than two million carbon-nanotube field-effect transistors—promising new nanotechnologies for use in energy-efficient digital logic circuits and for dense data storage—fabricated on vertically stacked layers in a single chip. Unlike conventional integrated circuit architectures, the layered fabrication realizes a three-dimensional integrated circuit architecture with fine-grained and dense vertical connectivity between layers of computing, data storage, and input and output (in this instance, sensing). As a result, our nanosystem can capture massive amounts of data every second, store it directly on-chip, perform in situ processing of the captured data, and produce ‘highly processed’ information. As a working prototype, our nanosystem senses and classifies ambient gases. Furthermore, because the layers are fabricated on top of silicon logic circuitry, our nanosystem is compatible with existing infrastructure for silicon-based technologies. Such complex nano-electronic systems will be essential for future high-performance and highly energy-efficient electronic systems.

Three-dimensional integration of nanotechnologies for computing and data storage on a single chip.

PubMed

Shulaker, Max M; Hills, Gage; Park, Rebecca S; Howe, Roger T; Saraswat, Krishna; Wong, H-S Philip; Mitra, Subhasish

2017-07-05

The computing demands of future data-intensive applications will greatly exceed the capabilities of current electronics, and are unlikely to be met by isolated improvements in transistors, data storage technologies or integrated circuit architectures alone. Instead, transformative nanosystems, which use new nanotechnologies to simultaneously realize improved devices and new integrated circuit architectures, are required. Here we present a prototype of such a transformative nanosystem. It consists of more than one million resistive random-access memory cells and more than two million carbon-nanotube field-effect transistors-promising new nanotechnologies for use in energy-efficient digital logic circuits and for dense data storage-fabricated on vertically stacked layers in a single chip. Unlike conventional integrated circuit architectures, the layered fabrication realizes a three-dimensional integrated circuit architecture with fine-grained and dense vertical connectivity between layers of computing, data storage, and input and output (in this instance, sensing). As a result, our nanosystem can capture massive amounts of data every second, store it directly on-chip, perform in situ processing of the captured data, and produce 'highly processed' information. As a working prototype, our nanosystem senses and classifies ambient gases. Furthermore, because the layers are fabricated on top of silicon logic circuitry, our nanosystem is compatible with existing infrastructure for silicon-based technologies. Such complex nano-electronic systems will be essential for future high-performance and highly energy-efficient electronic systems.

Bidirectional Neural Interfaces

PubMed Central

Masters, Matthew R.; Thakor, Nitish V.

2016-01-01

A bidirectional neural interface is a device that transfers information into and out of the nervous system. This class of devices has potential to improve treatment and therapy in several patient populations. Progress in very-large-scale integration (VLSI) has advanced the design of complex integrated circuits. System-on-chip (SoC) devices are capable of recording neural electrical activity and altering natural activity with electrical stimulation. Often, these devices include wireless powering and telemetry functions. This review presents the state of the art of bidirectional circuits as applied to neuroprosthetic, neurorepair, and neurotherapeutic systems. PMID:26753776

A design concept for an MMIC (Monolithic Microwave Integrated Circuit) microstrip phased array

NASA Technical Reports Server (NTRS)

Lee, Richard Q.; Smetana, Jerry; Acosta, Roberto

1987-01-01

A conceptual design for a microstrip phased array with monolithic microwave integrated circuit (MMIC) amplitude and phase controls is described. The MMIC devices used are 20 GHz variable power amplifiers and variable phase shifters recently developed by NASA contractors for applications in future Ka proposed design, which concept is for a general NxN element array of rectangular lattice geometry. Subarray excitation is incorporated in the MMIC phased array design to reduce the complexity of the beam forming network and the number of MMIC components required.

Pyruvate dehydrogenase complex and nicotinamide nucleotide transhydrogenase constitute an energy consuming redox circuit

PubMed Central

Fisher-Wellman, Kelsey H.; Lin, Chien-Te; Ryan, Terence E.; Reese, Lauren R.; Gilliam, Laura A. A.; Cathey, Brook L.; Lark, Daniel S.; Smith, Cody D.; Muoio, Deborah M.; Neufer, P. Darrell

2015-01-01

SUMMARY Cellular proteins rely on reversible redox reactions to establish and maintain biological structure and function. How redox catabolic (NAD+:NADH) and anabolic (NADP+:NADPH) processes integrate during metabolism to maintain cellular redox homeostasis however is unknown. The present work identifies a continuously cycling, mitochondrial membrane potential-dependent redox circuit between the pyruvate dehydrogenase complex (PDHC) and nicotinamide nucleotide transhydrogenase (NNT). PDHC is shown to produce H2O2 in relation to reducing pressure within the complex. The H2O2 produced however is effectively masked by a continuously cycling redox circuit that links, via glutathione/thioredoxin, to NNT, which catalyzes the regeneration of NADPH from NADH at the expense of the mitochondrial membrane potential. The net effect is an automatic fine tuning of NNT-mediated energy expenditure to metabolic balance at the level of PDHC. In mitochondria, genetic or pharmacological disruptions in the PDHC-NNT redox circuit negate counterbalance changes in energy expenditure. At the whole animal level, mice lacking functional NNT (C57BL/6J) are characterized by lower energy expenditure rates, consistent with their well known susceptibility to diet-induced obesity. These findings suggest the integration of redox sensing of metabolic balance with compensatory changes in energy expenditure provides a potential mechanism by which cellular redox homeostasis is maintained and body weight is defended during periods of positive and negative energy balance. PMID:25643703

Pyruvate dehydrogenase complex and nicotinamide nucleotide transhydrogenase constitute an energy-consuming redox circuit.

PubMed

Fisher-Wellman, Kelsey H; Lin, Chien-Te; Ryan, Terence E; Reese, Lauren R; Gilliam, Laura A A; Cathey, Brook L; Lark, Daniel S; Smith, Cody D; Muoio, Deborah M; Neufer, P Darrell

2015-04-15

Cellular proteins rely on reversible redox reactions to establish and maintain biological structure and function. How redox catabolic (NAD+/NADH) and anabolic (NADP+/NADPH) processes integrate during metabolism to maintain cellular redox homoeostasis, however, is unknown. The present work identifies a continuously cycling mitochondrial membrane potential (ΔΨm)-dependent redox circuit between the pyruvate dehydrogenase complex (PDHC) and nicotinamide nucleotide transhydrogenase (NNT). PDHC is shown to produce H2O2 in relation to reducing pressure within the complex. The H2O2 produced, however, is effectively masked by a continuously cycling redox circuit that links, via glutathione/thioredoxin, to NNT, which catalyses the regeneration of NADPH from NADH at the expense of ΔΨm. The net effect is an automatic fine-tuning of NNT-mediated energy expenditure to metabolic balance at the level of PDHC. In mitochondria, genetic or pharmacological disruptions in the PDHC-NNT redox circuit negate counterbalance changes in energy expenditure. At the whole animal level, mice lacking functional NNT (C57BL/6J) are characterized by lower energy-expenditure rates, consistent with their well-known susceptibility to diet-induced obesity. These findings suggest the integration of redox sensing of metabolic balance with compensatory changes in energy expenditure provides a potential mechanism by which cellular redox homoeostasis is maintained and body weight is defended during periods of positive and negative energy balance.

Microfluidic Pneumatic Logic Circuits and Digital Pneumatic Microprocessors for Integrated Microfluidic Systems

PubMed Central

Rhee, Minsoung

2010-01-01

We have developed pneumatic logic circuits and microprocessors built with microfluidic channels and valves in polydimethylsiloxane (PDMS). The pneumatic logic circuits perform various combinational and sequential logic calculations with binary pneumatic signals (atmosphere and vacuum), producing cascadable outputs based on Boolean operations. A complex microprocessor is constructed from combinations of various logic circuits and receives pneumatically encoded serial commands at a single input line. The device then decodes the temporal command sequence by spatial parallelization, computes necessary logic calculations between parallelized command bits, stores command information for signal transportation and maintenance, and finally executes the command for the target devices. Thus, such pneumatic microprocessors will function as a universal on-chip control platform to perform complex parallel operations for large-scale integrated microfluidic devices. To demonstrate the working principles, we have built 2-bit, 3-bit, 4-bit, and 8-bit microprecessors to control various target devices for applications such as four color dye mixing, and multiplexed channel fluidic control. By significantly reducing the need for external controllers, the digital pneumatic microprocessor can be used as a universal on-chip platform to autonomously manipulate microfluids in a high throughput manner. PMID:19823730

Measurement of Quantum Interference in a Silicon Ring Resonator Photon Source.

PubMed

Steidle, Jeffrey A; Fanto, Michael L; Preble, Stefan F; Tison, Christopher C; Howland, Gregory A; Wang, Zihao; Alsing, Paul M

2017-04-04

Silicon photonic chips have the potential to realize complex integrated quantum information processing circuits, including photon sources, qubit manipulation, and integrated single-photon detectors. Here, we present the key aspects of preparing and testing a silicon photonic quantum chip with an integrated photon source and two-photon interferometer. The most important aspect of an integrated quantum circuit is minimizing loss so that all of the generated photons are detected with the highest possible fidelity. Here, we describe how to perform low-loss edge coupling by using an ultra-high numerical aperture fiber to closely match the mode of the silicon waveguides. By using an optimized fusion splicing recipe, the UHNA fiber is seamlessly interfaced with a standard single-mode fiber. This low-loss coupling allows the measurement of high-fidelity photon production in an integrated silicon ring resonator and the subsequent two-photon interference of the produced photons in a closely integrated Mach-Zehnder interferometer. This paper describes the essential procedures for the preparation and characterization of high-performance and scalable silicon quantum photonic circuits.

Modular integration of electronics and microfluidic systems using flexible printed circuit boards.

PubMed

Wu, Amy; Wang, Lisen; Jensen, Erik; Mathies, Richard; Boser, Bernhard

2010-02-21

Microfluidic systems offer an attractive alternative to conventional wet chemical methods with benefits including reduced sample and reagent volumes, shorter reaction times, high-throughput, automation, and low cost. However, most present microfluidic systems rely on external means to analyze reaction products. This substantially adds to the size, complexity, and cost of the overall system. Electronic detection based on sub-millimetre size integrated circuits (ICs) has been demonstrated for a wide range of targets including nucleic and amino acids, but deployment of this technology to date has been limited due to the lack of a flexible process to integrate these chips within microfluidic devices. This paper presents a modular and inexpensive process to integrate ICs with microfluidic systems based on standard printed circuit board (PCB) technology to assemble the independently designed microfluidic and electronic components. The integrated system can accommodate multiple chips of different sizes bonded to glass or PDMS microfluidic systems. Since IC chips and flex PCB manufacturing and assembly are industry standards with low cost, the integrated system is economical for both laboratory and point-of-care settings.

Processing and Prolonged 500 C Testing of 4H-SiC JFET Integrated Circuits with Two Levels of Metal Interconnect

NASA Technical Reports Server (NTRS)

Spry, David J.; Neudeck, Philip G.; Chen, Liangyu; Lukco, Dorothy; Chang, Carl W.; Beheim, Glenn M.; Krasowski, Michael J.; Prokop, Norman F.

2015-01-01

Complex integrated circuit (IC) chips rely on more than one level of interconnect metallization for routing of electrical power and signals. This work reports the processing and testing of 4H-SiC junction field effect transistor (JFET) prototype IC's with two levels of metal interconnect capable of prolonged operation at 500 C. Packaged functional circuits including 3- and 11-stage ring oscillators, a 4-bit digital to analog converter, and a 4-bit address decoder and random access memory cell have been demonstrated at 500 C. A 3-stage oscillator functioned for over 3000 hours at 500 C in air ambient. Improved reproducibility remains to be accomplished.

CMOS-micromachined, two-dimenisional transistor arrays for neural recording and stimulation.

PubMed

Lin, J S; Chang, S R; Chang, C H; Lu, S C; Chen, H

2007-01-01

In-plane microelectrode arrays have proven to be useful tools for studying the connectivities and the functions of neural tissues. However, seldom microelectrode arrays are monolithically-integrated with signal-processing circuits, without which the maximum number of electrodes is limited by the compromise with routing complexity and interferences. This paper proposes a CMOS-compatible, two-dimensional array of oxide-semiconductor field-effect transistors(OSFETs), capable of both recording and stimulating neuronal activities. The fabrication of the OSFETs not only requires simply die-level, post-CMOS micromachining process, but also retains metal layers for monolithic integration with signal-processing circuits. A CMOS microsystem containing the OSFET arrays and gain-programmable recording circuits has been fabricated and tested. The preliminary testing results are presented and discussed.

Chaos in a neural network circuit

NASA Astrophysics Data System (ADS)

Kepler, Thomas B.; Datt, Sumeet; Meyer, Robert B.; Abott, L. F.

1990-12-01

We have constructed a neural network circuit of four clipped, high-grain, integrating operational amplifiers coupled to each other through an array of digitally programmable resistor ladders (MDACs). In addition to fixed-point and cyclic behavior, the circuit exhibits chaotic behavior with complex strange attractors which are approached through period doubling, intermittent attractor expansion and/or quasiperiodic pathways. Couplings between the nonlinear circuit elements are controlled by a computer which can automatically search through the space of couplings for interesting phenomena. We report some initial statistical results relating the behavior of the network to properties of its coupling matrix. Through these results and further research the circuit should help resolve fundamental issues concerning chaos in neural networks.

Micromachined Integrated Quantum Circuit Containing a Superconducting Qubit

NASA Astrophysics Data System (ADS)

Brecht, T.; Chu, Y.; Axline, C.; Pfaff, W.; Blumoff, J. Z.; Chou, K.; Krayzman, L.; Frunzio, L.; Schoelkopf, R. J.

2017-04-01

We present a device demonstrating a lithographically patterned transmon integrated with a micromachined cavity resonator. Our two-cavity, one-qubit device is a multilayer microwave-integrated quantum circuit (MMIQC), comprising a basic unit capable of performing circuit-QED operations. We describe the qubit-cavity coupling mechanism of a specialized geometry using an electric-field picture and a circuit model, and obtain specific system parameters using simulations. Fabrication of the MMIQC includes lithography, etching, and metallic bonding of silicon wafers. Superconducting wafer bonding is a critical capability that is demonstrated by a micromachined storage-cavity lifetime of 34.3 μ s , corresponding to a quality factor of 2 ×106 at single-photon energies. The transmon coherence times are T1=6.4 μ s , and T2echo=11.7 μ s . We measure qubit-cavity dispersive coupling with a rate χq μ/2 π =-1.17 MHz , constituting a Jaynes-Cummings system with an interaction strength g /2 π =49 MHz . With these parameters we are able to demonstrate circuit-QED operations in the strong dispersive regime with ease. Finally, we highlight several improvements and anticipated extensions of the technology to complex MMIQCs.

Optogenetic interrogation of neural circuits: technology for probing mammalian brain structures

PubMed Central

Zhang, Feng; Gradinaru, Viviana; Adamantidis, Antoine R; Durand, Remy; Airan, Raag D; de Lecea, Luis; Deisseroth, Karl

2015-01-01

Elucidation of the neural substrates underlying complex animal behaviors depends on precise activity control tools, as well as compatible readout methods. Recent developments in optogenetics have addressed this need, opening up new possibilities for systems neuroscience. Interrogation of even deep neural circuits can be conducted by directly probing the necessity and sufficiency of defined circuit elements with millisecond-scale, cell type-specific optical perturbations, coupled with suitable readouts such as electrophysiology, optical circuit dynamics measures and freely moving behavior in mammals. Here we collect in detail our strategies for delivering microbial opsin genes to deep mammalian brain structures in vivo, along with protocols for integrating the resulting optical control with compatible readouts (electrophysiological, optical and behavioral). The procedures described here, from initial virus preparation to systems-level functional readout, can be completed within 4–5 weeks. Together, these methods may help in providing circuit-level insight into the dynamics underlying complex mammalian behaviors in health and disease. PMID:20203662

Quantum interference in heterogeneous superconducting-photonic circuits on a silicon chip.

PubMed

Schuck, C; Guo, X; Fan, L; Ma, X; Poot, M; Tang, H X

2016-01-21

Quantum information processing holds great promise for communicating and computing data efficiently. However, scaling current photonic implementation approaches to larger system size remains an outstanding challenge for realizing disruptive quantum technology. Two main ingredients of quantum information processors are quantum interference and single-photon detectors. Here we develop a hybrid superconducting-photonic circuit system to show how these elements can be combined in a scalable fashion on a silicon chip. We demonstrate the suitability of this approach for integrated quantum optics by interfering and detecting photon pairs directly on the chip with waveguide-coupled single-photon detectors. Using a directional coupler implemented with silicon nitride nanophotonic waveguides, we observe 97% interference visibility when measuring photon statistics with two monolithically integrated superconducting single-photon detectors. The photonic circuit and detector fabrication processes are compatible with standard semiconductor thin-film technology, making it possible to implement more complex and larger scale quantum photonic circuits on silicon chips.

Radiation Testing and Evaluation Issues for Modern Integrated Circuits

NASA Technical Reports Server (NTRS)

LaBel, Kenneth A.; Cohn, Lew M.

2005-01-01

Abstract. Changes in modern integrated circuit (IC) technologies have modified the way we approach and conduct radiation tolerance and testing of electronics. These changes include scaling of geometries, new materials, new packaging technologies, and overall speed and device complexity challenges. In this short course section, we will identify and discuss these issues as they impact radiation testing, modeling, and effects mitigation of modern integrated circuits. The focus will be on CMOS-based technologies, however, other high performance technologies will be discussed where appropriate. The effects of concern will be: Single-Event Effects (SEE) and steady state total ionizing dose (TID) IC response. However, due to the growing use of opto-electronics in space systems issues concerning displacement damage testing will also be considered. This short course section is not intended to provide detailed "how-to-test" information, but simply provide a snapshot of current challenges and some of the approaches being considered.

Gigahertz flexible graphene transistors for microwave integrated circuits.

PubMed

Yeh, Chao-Hui; Lain, Yi-Wei; Chiu, Yu-Chiao; Liao, Chen-Hung; Moyano, David Ricardo; Hsu, Shawn S H; Chiu, Po-Wen

2014-08-26

Flexible integrated circuits with complex functionalities are the missing link for the active development of wearable electronic devices. Here, we report a scalable approach to fabricate self-aligned graphene microwave transistors for the implementation of flexible low-noise amplifiers and frequency mixers, two fundamental building blocks of a wireless communication receiver. A devised AlOx T-gate structure is used to achieve an appreciable increase of device transconductance and a commensurate reduction of the associated parasitic resistance, thus yielding a remarkable extrinsic cutoff frequency of 32 GHz and a maximum oscillation frequency of 20 GHz; in both cases the operation frequency is an order of magnitude higher than previously reported. The two frequencies work at 22 and 13 GHz even when subjected to a strain of 2.5%. The gigahertz microwave integrated circuits demonstrated here pave the way for applications which require high flexibility and radio frequency operations.

DOE Office of Scientific and Technical Information (OSTI.GOV)

Bell, Nelson S.; Sarobol, Pylin; Cook, Adam

There is a rising interest in developing functional electronics using additively manufactured components. Considerations in materials selection and pathways to forming hybrid circuits and devices must demonstrate useful electronic function; must enable integration; and must complement the complex shape, low cost, high volume, and high functionality of structural but generally electronically passive additively manufactured components. This article reviews several emerging technologies being used in industry and research/development to provide integration advantages of fabricating multilayer hybrid circuits or devices. First, we review a maskless, noncontact, direct write (DW) technology that excels in the deposition of metallic colloid inks for electrical interconnects.more » Second, we review a complementary technology, aerosol deposition (AD), which excels in the deposition of metallic and ceramic powder as consolidated, thick conformal coatings and is additionally patternable through masking. As a result, we show examples of hybrid circuits/devices integrated beyond 2-D planes, using combinations of DW or AD processes and conventional, established processes.« less

Synthetic mixed-signal computation in living cells

PubMed Central

Rubens, Jacob R.; Selvaggio, Gianluca; Lu, Timothy K.

2016-01-01

Living cells implement complex computations on the continuous environmental signals that they encounter. These computations involve both analogue- and digital-like processing of signals to give rise to complex developmental programs, context-dependent behaviours and homeostatic activities. In contrast to natural biological systems, synthetic biological systems have largely focused on either digital or analogue computation separately. Here we integrate analogue and digital computation to implement complex hybrid synthetic genetic programs in living cells. We present a framework for building comparator gene circuits to digitize analogue inputs based on different thresholds. We then demonstrate that comparators can be predictably composed together to build band-pass filters, ternary logic systems and multi-level analogue-to-digital converters. In addition, we interface these analogue-to-digital circuits with other digital gene circuits to enable concentration-dependent logic. We expect that this hybrid computational paradigm will enable new industrial, diagnostic and therapeutic applications with engineered cells. PMID:27255669

Photonic Integrated Circuit (PIC) Device Structures: Background, Fabrication Ecosystem, Relevance to Space Systems Applications, and Discussion of Related Radiation Effects

NASA Technical Reports Server (NTRS)

Alt, Shannon

2016-01-01

Electronic integrated circuits are considered one of the most significant technological advances of the 20th century, with demonstrated impact in their ability to incorporate successively higher numbers transistors and construct electronic devices onto a single CMOS chip. Photonic integrated circuits (PICs) exist as the optical analog to integrated circuits; however, in place of transistors, PICs consist of numerous scaled optical components, including such "building-block" structures as waveguides, MMIs, lasers, and optical ring resonators. The ability to construct electronic and photonic components on a single microsystems platform offers transformative potential for the development of technologies in fields including communications, biomedical device development, autonomous navigation, and chemical and atmospheric sensing. Developing on-chip systems that provide new avenues for integration and replacement of bulk optical and electro-optic components also reduces size, weight, power and cost (SWaP-C) limitations, which are important in the selection of instrumentation for specific flight projects. The number of applications currently emerging for complex photonics systems-particularly in data communications-warrants additional investigations when considering reliability for space systems development. This Body of Knowledge document seeks to provide an overview of existing integrated photonics architectures; the current state of design, development, and fabrication ecosystems in the United States and Europe; and potential space applications, with emphasis given to associated radiation effects and reliability.

MAGIA2: from miRNA and genes expression data integrative analysis to microRNA–transcription factor mixed regulatory circuits (2012 update)

PubMed Central

Bisognin, Andrea; Sales, Gabriele; Coppe, Alessandro; Bortoluzzi, Stefania; Romualdi, Chiara

2012-01-01

MAGIA2 (http://gencomp.bio.unipd.it/magia2) is an update, extension and evolution of the MAGIA web tool. It is dedicated to the integrated analysis of in silico target prediction, microRNA (miRNA) and gene expression data for the reconstruction of post-transcriptional regulatory networks. miRNAs are fundamental post-transcriptional regulators of several key biological and pathological processes. As miRNAs act prevalently through target degradation, their expression profiles are expected to be inversely correlated to those of the target genes. Low specificity of target prediction algorithms makes integration approaches an interesting solution for target prediction refinement. MAGIA2 performs this integrative approach supporting different association measures, multiple organisms and almost all target predictions algorithms. Nevertheless, miRNAs activity should be viewed as part of a more complex scenario where regulatory elements and their interactors generate a highly connected network and where gene expression profiles are the result of different levels of regulation. The updated MAGIA2 tries to dissect this complexity by reconstructing mixed regulatory circuits involving either miRNA or transcription factor (TF) as regulators. Two types of circuits are identified: (i) a TF that regulates both a miRNA and its target and (ii) a miRNA that regulates both a TF and its target. PMID:22618880

Organic printed photonics: From microring lasers to integrated circuits

PubMed Central

Zhang, Chuang; Zou, Chang-Ling; Zhao, Yan; Dong, Chun-Hua; Wei, Cong; Wang, Hanlin; Liu, Yunqi; Guo, Guang-Can; Yao, Jiannian; Zhao, Yong Sheng

2015-01-01

A photonic integrated circuit (PIC) is the optical analogy of an electronic loop in which photons are signal carriers with high transport speed and parallel processing capability. Besides the most frequently demonstrated silicon-based circuits, PICs require a variety of materials for light generation, processing, modulation, and detection. With their diversity and flexibility, organic molecular materials provide an alternative platform for photonics; however, the versatile fabrication of organic integrated circuits with the desired photonic performance remains a big challenge. The rapid development of flexible electronics has shown that a solution printing technique has considerable potential for the large-scale fabrication and integration of microsized/nanosized devices. We propose the idea of soft photonics and demonstrate the function-directed fabrication of high-quality organic photonic devices and circuits. We prepared size-tunable and reproducible polymer microring resonators on a wafer-scale transparent and flexible chip using a solution printing technique. The printed optical resonator showed a quality (Q) factor higher than 4 × 105, which is comparable to that of silicon-based resonators. The high material compatibility of this printed photonic chip enabled us to realize low-threshold microlasers by doping organic functional molecules into a typical photonic device. On an identical chip, this construction strategy allowed us to design a complex assembly of one-dimensional waveguide and resonator components for light signal filtering and optical storage toward the large-scale on-chip integration of microscopic photonic units. Thus, we have developed a scheme for soft photonic integration that may motivate further studies on organic photonic materials and devices. PMID:26601256

Organic printed photonics: From microring lasers to integrated circuits.

PubMed

Zhang, Chuang; Zou, Chang-Ling; Zhao, Yan; Dong, Chun-Hua; Wei, Cong; Wang, Hanlin; Liu, Yunqi; Guo, Guang-Can; Yao, Jiannian; Zhao, Yong Sheng

2015-09-01

A photonic integrated circuit (PIC) is the optical analogy of an electronic loop in which photons are signal carriers with high transport speed and parallel processing capability. Besides the most frequently demonstrated silicon-based circuits, PICs require a variety of materials for light generation, processing, modulation, and detection. With their diversity and flexibility, organic molecular materials provide an alternative platform for photonics; however, the versatile fabrication of organic integrated circuits with the desired photonic performance remains a big challenge. The rapid development of flexible electronics has shown that a solution printing technique has considerable potential for the large-scale fabrication and integration of microsized/nanosized devices. We propose the idea of soft photonics and demonstrate the function-directed fabrication of high-quality organic photonic devices and circuits. We prepared size-tunable and reproducible polymer microring resonators on a wafer-scale transparent and flexible chip using a solution printing technique. The printed optical resonator showed a quality (Q) factor higher than 4 × 10(5), which is comparable to that of silicon-based resonators. The high material compatibility of this printed photonic chip enabled us to realize low-threshold microlasers by doping organic functional molecules into a typical photonic device. On an identical chip, this construction strategy allowed us to design a complex assembly of one-dimensional waveguide and resonator components for light signal filtering and optical storage toward the large-scale on-chip integration of microscopic photonic units. Thus, we have developed a scheme for soft photonic integration that may motivate further studies on organic photonic materials and devices.

Thermooptic two-mode interference device for reconfigurable quantum optic circuits

NASA Astrophysics Data System (ADS)

Sahu, Partha Pratim

2018-06-01

Reconfigurable large-scale integrated quantum optic circuits require compact component having capability of accurate manipulation of quantum entanglement for quantum communication and information processing applications. Here, a thermooptic two-mode interference coupler has been introduced as a compact component for generation of reconfigurable complex multi-photons quantum interference. Both theoretical and experimental approaches are used for the demonstration of two-photon and four-photon quantum entanglement manipulated with thermooptic phase change in TMI region. Our results demonstrate complex multi-photon quantum interference with high fabrication tolerance and quantum fidelity in smaller dimension than previous thermooptic Mach-Zehnder implementations.

Optimization Methods for Spiking Neurons and Networks

PubMed Central

Russell, Alexander; Orchard, Garrick; Dong, Yi; Mihalaş, Ştefan; Niebur, Ernst; Tapson, Jonathan; Etienne-Cummings, Ralph

2011-01-01

Spiking neurons and spiking neural circuits are finding uses in a multitude of tasks such as robotic locomotion control, neuroprosthetics, visual sensory processing, and audition. The desired neural output is achieved through the use of complex neuron models, or by combining multiple simple neurons into a network. In either case, a means for configuring the neuron or neural circuit is required. Manual manipulation of parameters is both time consuming and non-intuitive due to the nonlinear relationship between parameters and the neuron’s output. The complexity rises even further as the neurons are networked and the systems often become mathematically intractable. In large circuits, the desired behavior and timing of action potential trains may be known but the timing of the individual action potentials is unknown and unimportant, whereas in single neuron systems the timing of individual action potentials is critical. In this paper, we automate the process of finding parameters. To configure a single neuron we derive a maximum likelihood method for configuring a neuron model, specifically the Mihalas–Niebur Neuron. Similarly, to configure neural circuits, we show how we use genetic algorithms (GAs) to configure parameters for a network of simple integrate and fire with adaptation neurons. The GA approach is demonstrated both in software simulation and hardware implementation on a reconfigurable custom very large scale integration chip. PMID:20959265

Heterogeneous Monolithic Integration of Single-Crystal Organic Materials.

PubMed

Park, Kyung Sun; Baek, Jangmi; Park, Yoonkyung; Lee, Lynn; Hyon, Jinho; Koo Lee, Yong-Eun; Shrestha, Nabeen K; Kang, Youngjong; Sung, Myung Mo

2017-02-01

Manufacturing high-performance organic electronic circuits requires the effective heterogeneous integration of different nanoscale organic materials with uniform morphology and high crystallinity in a desired arrangement. In particular, the development of high-performance organic electronic and optoelectronic devices relies on high-quality single crystals that show optimal intrinsic charge-transport properties and electrical performance. Moreover, the heterogeneous integration of organic materials on a single substrate in a monolithic way is highly demanded for the production of fundamental organic electronic components as well as complex integrated circuits. Many of the various methods that have been designed to pattern multiple heterogeneous organic materials on a substrate and the heterogeneous integration of organic single crystals with their crystal growth are described here. Critical issues that have been encountered in the development of high-performance organic integrated electronics are also addressed. © 2016 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

The Effectiveness of an Electronic Security Management System in a Privately Owned Apartment Complex

ERIC Educational Resources Information Center

Greenberg, David F.; Roush, Jeffrey B.

2009-01-01

Poisson and negative binomial regression methods are used to analyze the monthly time series data to determine the effects of introducing an integrated security management system including closed-circuit television (CCTV), door alarm monitoring, proximity card access, and emergency call boxes to a large privately-owned complex of apartment…

ASIC For Complex Fixed-Point Arithmetic

NASA Technical Reports Server (NTRS)

Petilli, Stephen G.; Grimm, Michael J.; Olson, Erlend M.

1995-01-01

Application-specific integrated circuit (ASIC) performs 24-bit, fixed-point arithmetic operations on arrays of complex-valued input data. High-performance, wide-band arithmetic logic unit (ALU) designed for use in computing fast Fourier transforms (FFTs) and for performing ditigal filtering functions. Other applications include general computations involved in analysis of spectra and digital signal processing.

VLSI circuits implementing computational models of neocortical circuits.

PubMed

Wijekoon, Jayawan H B; Dudek, Piotr

2012-09-15

This paper overviews the design and implementation of three neuromorphic integrated circuits developed for the COLAMN ("Novel Computing Architecture for Cognitive Systems based on the Laminar Microcircuitry of the Neocortex") project. The circuits are implemented in a standard 0.35 μm CMOS technology and include spiking and bursting neuron models, and synapses with short-term (facilitating/depressing) and long-term (STDP and dopamine-modulated STDP) dynamics. They enable execution of complex nonlinear models in accelerated-time, as compared with biology, and with low power consumption. The neural dynamics are implemented using analogue circuit techniques, with digital asynchronous event-based input and output. The circuits provide configurable hardware blocks that can be used to simulate a variety of neural networks. The paper presents experimental results obtained from the fabricated devices, and discusses the advantages and disadvantages of the analogue circuit approach to computational neural modelling. Copyright © 2012 Elsevier B.V. All rights reserved.

Synthetic analog computation in living cells.

PubMed

Daniel, Ramiz; Rubens, Jacob R; Sarpeshkar, Rahul; Lu, Timothy K

2013-05-30

A central goal of synthetic biology is to achieve multi-signal integration and processing in living cells for diagnostic, therapeutic and biotechnology applications. Digital logic has been used to build small-scale circuits, but other frameworks may be needed for efficient computation in the resource-limited environments of cells. Here we demonstrate that synthetic analog gene circuits can be engineered to execute sophisticated computational functions in living cells using just three transcription factors. Such synthetic analog gene circuits exploit feedback to implement logarithmically linear sensing, addition, ratiometric and power-law computations. The circuits exhibit Weber's law behaviour as in natural biological systems, operate over a wide dynamic range of up to four orders of magnitude and can be designed to have tunable transfer functions. Our circuits can be composed to implement higher-order functions that are well described by both intricate biochemical models and simple mathematical functions. By exploiting analog building-block functions that are already naturally present in cells, this approach efficiently implements arithmetic operations and complex functions in the logarithmic domain. Such circuits may lead to new applications for synthetic biology and biotechnology that require complex computations with limited parts, need wide-dynamic-range biosensing or would benefit from the fine control of gene expression.

Quantum interference in heterogeneous superconducting-photonic circuits on a silicon chip

PubMed Central

Schuck, C.; Guo, X.; Fan, L.; Ma, X.; Poot, M.; Tang, H. X.

2016-01-01

Quantum information processing holds great promise for communicating and computing data efficiently. However, scaling current photonic implementation approaches to larger system size remains an outstanding challenge for realizing disruptive quantum technology. Two main ingredients of quantum information processors are quantum interference and single-photon detectors. Here we develop a hybrid superconducting-photonic circuit system to show how these elements can be combined in a scalable fashion on a silicon chip. We demonstrate the suitability of this approach for integrated quantum optics by interfering and detecting photon pairs directly on the chip with waveguide-coupled single-photon detectors. Using a directional coupler implemented with silicon nitride nanophotonic waveguides, we observe 97% interference visibility when measuring photon statistics with two monolithically integrated superconducting single-photon detectors. The photonic circuit and detector fabrication processes are compatible with standard semiconductor thin-film technology, making it possible to implement more complex and larger scale quantum photonic circuits on silicon chips. PMID:26792424

A 30 Mbps in-plane full-duplex light communication using a monolithic GaN photonic circuit

NASA Astrophysics Data System (ADS)

Gao, Xumin; Yuan, Jialei; Yang, Yongchao; Li, Yuanhang; Yuan, Wei; Zhu, Guixia; Zhu, Hongbo; Feng, Meixin; Sun, Qian; Liu, Yuhuai; Wang, Yongjin

2017-07-01

We propose, fabricate and characterize photonic integration of a InGaN/GaN multiple-quantum-well light-emitting diode (MQW-LED), waveguide, ring resonator and InGaN/GaN MQW-photodiode on a single chip, in which the photonic circuit is suspended by the support beams. Both experimental observations and simulation results illustrate the manipulation of in-plane light coupling and propagation by the waveguide and the ring resonator. The monolithic photonic circuit forms an in-plane data communication system using visible light. When the two suspended InGaN/GaN MQW-diodes simultaneously serve as the transmitter and the receiver, an in-plane full-duplex light communication is experimentally demonstrated with a transmission rate of 30 Mbps, and the superimposed signals are extracted using the self-interference cancellation method. The suspended photonic circuit creates new possibilities for exploring the in-plane full-duplex light communication and manufacturing complex GaN-based monolithic photonic integrations.

Multipurpose silicon photonics signal processor core.

PubMed

Pérez, Daniel; Gasulla, Ivana; Crudgington, Lee; Thomson, David J; Khokhar, Ali Z; Li, Ke; Cao, Wei; Mashanovich, Goran Z; Capmany, José

2017-09-21

Integrated photonics changes the scaling laws of information and communication systems offering architectural choices that combine photonics with electronics to optimize performance, power, footprint, and cost. Application-specific photonic integrated circuits, where particular circuits/chips are designed to optimally perform particular functionalities, require a considerable number of design and fabrication iterations leading to long development times. A different approach inspired by electronic Field Programmable Gate Arrays is the programmable photonic processor, where a common hardware implemented by a two-dimensional photonic waveguide mesh realizes different functionalities through programming. Here, we report the demonstration of such reconfigurable waveguide mesh in silicon. We demonstrate over 20 different functionalities with a simple seven hexagonal cell structure, which can be applied to different fields including communications, chemical and biomedical sensing, signal processing, multiprocessor networks, and quantum information systems. Our work is an important step toward this paradigm.Integrated optical circuits today are typically designed for a few special functionalities and require complex design and development procedures. Here, the authors demonstrate a reconfigurable but simple silicon waveguide mesh with different functionalities.

Single-cell axotomy of cultured hippocampal neurons integrated in neuronal circuits.

PubMed

Gomis-Rüth, Susana; Stiess, Michael; Wierenga, Corette J; Meyn, Liane; Bradke, Frank

2014-05-01

An understanding of the molecular mechanisms of axon regeneration after injury is key for the development of potential therapies. Single-cell axotomy of dissociated neurons enables the study of the intrinsic regenerative capacities of injured axons. This protocol describes how to perform single-cell axotomy on dissociated hippocampal neurons containing synapses. Furthermore, to axotomize hippocampal neurons integrated in neuronal circuits, we describe how to set up coculture with a few fluorescently labeled neurons. This approach allows axotomy of single cells in a complex neuronal network and the observation of morphological and molecular changes during axon regeneration. Thus, single-cell axotomy of mature neurons is a valuable tool for gaining insights into cell intrinsic axon regeneration and the plasticity of neuronal polarity of mature neurons. Dissociation of the hippocampus and plating of hippocampal neurons takes ∼2 h. Neurons are then left to grow for 2 weeks, during which time they integrate into neuronal circuits. Subsequent axotomy takes 10 min per neuron and further imaging takes 10 min per neuron.

Photonic technology revolution influence on the defence area

NASA Astrophysics Data System (ADS)

Galas, Jacek; Litwin, Dariusz; Błocki, Narcyz; Daszkiewicz, Marek

2017-10-01

Revolutionary progress in the photonic technology provides the ability to develop military systems of new properties not possible to obtain with the use of classical technologies. In recent years, this progress has resulted in developing advanced, complex, multifunctional and relatively cheap Photonic Integrated Circuits (PIC) or Hybrid Photonics Circuits (HPC) built of a collection of standardized optical, optoelectronic and photonic components. This idea is similar to the technology of Electronic Integrated Circuits, which has revolutionized the microelectronic market. The novel approach to photonic technology is now revolutionizing the photonics' market. It simplifies the photonics technology and enables creation of technological centers for designing, development and production of advanced optical and photonic systems in the EU and other countries. This paper presents some selected photonic technologies and their impact on such defense systems like radars, radiolocation, telecommunication, and radio-communication systems.

Selective positioning and integration of individual single-walled carbon nanotubes.

PubMed

Jiao, Liying; Xian, Xiaojun; Wu, Zhongyun; Zhang, Jin; Liu, Zhongfan

2009-01-01

We present a general selective positioning and integration technique for fabricating single-walled carbon nanotube (SWNT) circuits with preselected individual SWNTs as building blocks by utilizing poly(methyl methacrylate) (PMMA) thin film as a macroscopically handlable mediator. The transparency and marker-replicating capability of PMMA mediator allow the selective placement of chirality-specific nanotubes onto predesigned patterned surfaces with a resolution of ca. 1 mum. This technique is compatible with multiple operations and p-n conversion by chemical doping, which enables the construction of complex and logic circuits. As demonstrations of building SWNTs circuits, we fabricated a field effect inverter, a 2 x 2 all-SWNT crossbar field effect transistor (FET), and flexible FETs on plastic with this technique. This selective positioning approach can also be extended to construct purpose-directed architecture with various nanoscale building blocks.

A fast low-power optical memory based on coupled micro-ring lasers

NASA Astrophysics Data System (ADS)

Hill, Martin T.; Dorren, Harmen J. S.; de Vries, Tjibbe; Leijtens, Xaveer J. M.; den Besten, Jan Hendrik; Smalbrugge, Barry; Oei, Yok-Siang; Binsma, Hans; Khoe, Giok-Djan; Smit, Meint K.

2004-11-01

The increasing speed of fibre-optic-based telecommunications has focused attention on high-speed optical processing of digital information. Complex optical processing requires a high-density, high-speed, low-power optical memory that can be integrated with planar semiconductor technology for buffering of decisions and telecommunication data. Recently, ring lasers with extremely small size and low operating power have been made, and we demonstrate here a memory element constructed by interconnecting these microscopic lasers. Our device occupies an area of 18 × 40µm2 on an InP/InGaAsP photonic integrated circuit, and switches within 20ps with 5.5fJ optical switching energy. Simulations show that the element has the potential for much smaller dimensions and switching times. Large numbers of such memory elements can be densely integrated and interconnected on a photonic integrated circuit: fast digital optical information processing systems employing large-scale integration should now be viable.

Y-junctions based on circular depressed-cladding waveguides fabricated with femtosecond pulses in Nd:YAG crystal: A route to integrate complex photonic circuits in crystals

NASA Astrophysics Data System (ADS)

Ajates, Javier G.; Romero, Carolina; Castillo, Gabriel R.; Chen, Feng; Vázquez de Aldana, Javier R.

2017-10-01

We have designed and fabricated photonic structures such as, Y-junctions (one of the basic building blocks for construction any integrated photonic devices) and Mach-Zehnder interferometers, based on circular depressed-cladding waveguides by direct femtosecond laser irradiation in Nd:YAG crystal. The waveguides were optically characterized at 633 nm, showing nearly mono-modal behaviour for the selected waveguide radius (9 μm). The effect of the splitting angle in the Y structures was investigated finding a good preservation of the modal profiles up to more than 2°, with 1 dB of additional losses in comparison with straight waveguides. The dependence with polarization of these splitters keeps in a reasonable low level. Our designs pave the way for the fabrication of arbitrarily complex 3D photonic circuits in crystals with cladding waveguides.

Complex Parts, Complex Data: Why You Need to Understand What Radiation Single Event Testing Data Does and Doesn't Show and the Implications Thereof

NASA Technical Reports Server (NTRS)

LaBel, Kenneth A.; Berg, Melanie D.

2015-01-01

Electronic parts (integrated circuits) have grown in complexity such that determining all failure modes and risks from single particle event testing is impossible. In this presentation, the authors will present why this is so and provide some realism on what this means. Its all about understanding actual risks and not making assumptions.

Three-Dimensional, Inkjet-Printed Organic Transistors and Integrated Circuits with 100% Yield, High Uniformity, and Long-Term Stability.

PubMed

Kwon, Jimin; Takeda, Yasunori; Fukuda, Kenjiro; Cho, Kilwon; Tokito, Shizuo; Jung, Sungjune

2016-11-22

In this paper, we demonstrate three-dimensional (3D) integrated circuits (ICs) based on a 3D complementary organic field-effect transistor (3D-COFET). The transistor-on-transistor structure was achieved by vertically stacking a p-type OFET over an n-type OFET with a shared gate joining the two transistors, effectively halving the footprint of printed transistors. All the functional layers including organic semiconductors, source/drain/gate electrodes, and interconnection paths were fully inkjet-printed except a parylene dielectric which was deposited by chemical vapor deposition. An array of printed 3D-COFETs and their inverter logic gates comprising over 100 transistors showed 100% yield, and the uniformity and long-term stability of the device were also investigated. A full-adder circuit, the most basic computing unit, has been successfully demonstrated using nine NAND gates based on the 3D structure. The present study fulfills the essential requirements for the fabrication of organic printed complex ICs (increased transistor density, 100% yield, high uniformity, and long-term stability), and the findings can be applied to realize more complex digital/analogue ICs and intelligent devices.

Heuristics for the Hodgkin-Huxley system.

PubMed

Hoppensteadt, Frank

2013-09-01

Hodgkin and Huxley (HH) discovered that voltages control ionic currents in nerve membranes. This led them to describe electrical activity in a neuronal membrane patch in terms of an electronic circuit whose characteristics were determined using empirical data. Due to the complexity of this model, a variety of heuristics, including relaxation oscillator circuits and integrate-and-fire models, have been used to investigate activity in neurons, and these simpler models have been successful in suggesting experiments and explaining observations. Connections between most of the simpler models had not been made clear until recently. Shown here are connections between these heuristics and the full HH model. In particular, we study a new model (Type III circuit): It includes the van der Pol-based models; it can be approximated by a simple integrate-and-fire model; and it creates voltages and currents that correspond, respectively, to the h and V components of the HH system. Copyright © 2012 Elsevier Inc. All rights reserved.

System-on-Chip Considerations for Heterogeneous Integration of CMOS and Fluidic Bio-Interfaces.

PubMed

Datta-Chaudhuri, Timir; Smela, Elisabeth; Abshire, Pamela A

2016-12-01

CMOS chips are increasingly used for direct sensing and interfacing with fluidic and biological systems. While many biosensing systems have successfully combined CMOS chips for readout and signal processing with passive sensing arrays, systems that co-locate sensing with active circuits on a single chip offer significant advantages in size and performance but increase the complexity of multi-domain design and heterogeneous integration. This emerging class of lab-on-CMOS systems also poses distinct and vexing technical challenges that arise from the disparate requirements of biosensors and integrated circuits (ICs). Modeling these systems must address not only circuit design, but also the behavior of biological components on the surface of the IC and any physical structures. Existing tools do not support the cross-domain simulation of heterogeneous lab-on-CMOS systems, so we recommend a two-step modeling approach: using circuit simulation to inform physics-based simulation, and vice versa. We review the primary lab-on-CMOS implementation challenges and discuss practical approaches to overcome them. Issues include new versions of classical challenges in system-on-chip integration, such as thermal effects, floor-planning, and signal coupling, as well as new challenges that are specifically attributable to biological and fluidic domains, such as electrochemical effects, non-standard packaging, surface treatments, sterilization, microfabrication of surface structures, and microfluidic integration. We describe these concerns as they arise in lab-on-CMOS systems and discuss solutions that have been experimentally demonstrated.

Layout-aware simulation of soft errors in sub-100 nm integrated circuits

NASA Astrophysics Data System (ADS)

Balbekov, A.; Gorbunov, M.; Bobkov, S.

2016-12-01

Single Event Transient (SET) caused by charged particle traveling through the sensitive volume of integral circuit (IC) may lead to different errors in digital circuits in some cases. In technologies below 180 nm, a single particle can affect multiple devices causing multiple SET. This fact adds the complexity to fault tolerant devices design, because the schematic design techniques become useless without their layout consideration. The most common layout mitigation technique is a spatial separation of sensitive nodes of hardened circuits. Spatial separation decreases the circuit performance and increases power consumption. Spacing should thus be reasonable and its scaling follows the device dimensions' scaling trend. This paper presents the development of the SET simulation approach comprised of SPICE simulation with "double exponent" current source as SET model. The technique uses layout in GDSII format to locate nearby devices that can be affected by a single particle and that can share the generated charge. The developed software tool automatizes multiple simulations and gathers the produced data to present it as the sensitivity map. The examples of conducted simulations of fault tolerant cells and their sensitivity maps are presented in this paper.

Complex modulation using tandem polarization modulators

NASA Astrophysics Data System (ADS)

Hasan, Mehedi; Hall, Trevor

2017-11-01

A novel photonic technique for implementing frequency up-conversion or complex modulation is proposed. The proposed circuit consists of a sandwich of a quarter-wave plate between two polarization modulators, driven, respectively, by an in-phase and quadrature-phase signals. The operation of the circuit is modelled using a transmission matrix method. The theoretical prediction is then validated by simulation using an industry-standard software tool. The intrinsic conversion efficiency of the architecture is improved by 6 dB over a functionally equivalent design based on dual parallel Mach-Zehnder modulators. Non-ideal scenarios such as imperfect alignment of the optical components and power imbalances and phase errors in the electric drive signals are also analysed. As light travels, along one physical path, the proposed design can be implemented using discrete components with greater control of relative optical path length differences. The circuit can further be integrated in any material platform that offers electro-optic polarization modulators.

Measurement, modeling, and simulation of cryogenic SiGe HBT amplifier circuits for fast single spin readout

NASA Astrophysics Data System (ADS)

England, Troy; Curry, Matthew; Carr, Steve; Swartzentruber, Brian; Lilly, Michael; Bishop, Nathan; Carrol, Malcolm

2015-03-01

Fast, low-power quantum state readout is one of many challenges facing quantum information processing. Single electron transistors (SETs) are potentially fast, sensitive detectors for performing spin readout of electrons bound to Si:P donors. From a circuit perspective, however, their output impedance and nonlinear conductance are ill suited to drive the parasitic capacitance typical of coaxial conductors used in cryogenic environments, necessitating a cryogenic amplification stage. We will discuss calibration data, as well as modeling and simulation of cryogenic silicon-germanium (SiGe) heterojunction bipolar transistor (HBT) circuits connected to a silicon SET and operating at 4 K. We find a continuum of solutions from simple, single-HBT amplifiers to more complex, multi-HBT circuits suitable for integration, with varying noise levels and power vs. bandwidth tradeoffs. This work was performed, in part, at the Center for Integrated Nanotechnologies, a U.S. DOE Office of Basic Energy Sciences user facility. Sandia National Laboratories is a multi-program laboratory operated by Sandia Corporation, a Lockheed-Martin Company, for the U. S. Department of Energy under Contract No. DE-AC04-94AL85000.

Extremely flexible nanoscale ultrathin body silicon integrated circuits on plastic.

PubMed

Shahrjerdi, Davood; Bedell, Stephen W

2013-01-09

In recent years, flexible devices based on nanoscale materials and structures have begun to emerge, exploiting semiconductor nanowires, graphene, and carbon nanotubes. This is primarily to circumvent the existing shortcomings of the conventional flexible electronics based on organic and amorphous semiconductors. The aim of this new class of flexible nanoelectronics is to attain high-performance devices with increased packing density. However, highly integrated flexible circuits with nanoscale transistors have not yet been demonstrated. Here, we show nanoscale flexible circuits on 60 Å thick silicon, including functional ring oscillators and memory cells. The 100-stage ring oscillators exhibit the stage delay of ~16 ps at a power supply voltage of 0.9 V, the best reported for any flexible circuits to date. The mechanical flexibility is achieved by employing the controlled spalling technology, enabling the large-area transfer of the ultrathin body silicon devices to a plastic substrate at room temperature. These results provide a simple and cost-effective pathway to enable ultralight flexible nanoelectronics with unprecedented level of system complexity based on mainstream silicon technology.

Chip-integrated ultrawide-band all-optical logic comparator in plasmonic circuits

PubMed Central

Lu, Cuicui; Hu, Xiaoyong; Yang, Hong; Gong, Qihuang

2014-01-01

Optical computing opens up the possibility for the realization of ultrahigh-speed and ultrawide-band information processing. Integrated all-optical logic comparator is one of the indispensable core components of optical computing systems. Unfortunately, up to now, no any nanoscale all-optical logic comparator suitable for on-chip integration applications has been realized experimentally. Here, we report a subtle and effective technical solution to circumvent the obstacles of inherent Ohmic losses of metal and limited propagation length of SPPs. A nanoscale all-optical logic comparator suitable for on-chip integration applications is realized in plasmonic circuits directly. The incident single-bit (or dual-bit) logic signals can be compared and the comparison results are endowed with different logic encodings. An ultrabroad operating wavelength range from 700 to 1000 nm, and an ultrahigh output logic-state contrast-ratio of more than 25 dB are realized experimentally. No high power requirement is needed. Though nanoscale SPP light source and the logic comparator device are integrated into the same plasmonic chip, an ultrasmall feature size is maintained. This work not only paves a way for the realization of complex logic device such as adders and multiplier, but also opens up the possibility for realizing quantum solid chips based on plasmonic circuits. PMID:24463956

Chip-integrated ultrawide-band all-optical logic comparator in plasmonic circuits.

PubMed

Lu, Cuicui; Hu, Xiaoyong; Yang, Hong; Gong, Qihuang

2014-01-27

Optical computing opens up the possibility for the realization of ultrahigh-speed and ultrawide-band information processing. Integrated all-optical logic comparator is one of the indispensable core components of optical computing systems. Unfortunately, up to now, no any nanoscale all-optical logic comparator suitable for on-chip integration applications has been realized experimentally. Here, we report a subtle and effective technical solution to circumvent the obstacles of inherent Ohmic losses of metal and limited propagation length of SPPs. A nanoscale all-optical logic comparator suitable for on-chip integration applications is realized in plasmonic circuits directly. The incident single-bit (or dual-bit) logic signals can be compared and the comparison results are endowed with different logic encodings. An ultrabroad operating wavelength range from 700 to 1000 nm, and an ultrahigh output logic-state contrast-ratio of more than 25 dB are realized experimentally. No high power requirement is needed. Though nanoscale SPP light source and the logic comparator device are integrated into the same plasmonic chip, an ultrasmall feature size is maintained. This work not only paves a way for the realization of complex logic device such as adders and multiplier, but also opens up the possibility for realizing quantum solid chips based on plasmonic circuits.

Millimeter And Submillimeter-Wave Integrated Circuits On Quartz

NASA Technical Reports Server (NTRS)

Mehdi, Imran; Mazed, Mohammad; Siegel, Peter; Smith, R. Peter

1995-01-01

Proposed Quartz substrate Upside-down Integrated Device (QUID) relies on UV-curable adhesive to bond semiconductor with quartz. Integrated circuits including planar GaAs Schottky diodes and passive circuit elements (such as bandpass filters) fabricated on quartz substrates. Circuits designed to operate as mixers in waveguide circuit at millimeter and submillimeter wavelengths. Integrated circuits mechanically more robust, larger, and easier to handle than planar Schottky diode chips. Quartz substrate more suitable for waveguide circuits than GaAs substrate.

Modular electron transfer circuits for synthetic biology

PubMed Central

Agapakis, Christina M

2010-01-01

Electron transfer is central to a wide range of essential metabolic pathways, from photosynthesis to fermentation. The evolutionary diversity and conservation of proteins that transfer electrons makes these pathways a valuable platform for engineered metabolic circuits in synthetic biology. Rational engineering of electron transfer pathways containing hydrogenases has the potential to lead to industrial scale production of hydrogen as an alternative source of clean fuel and experimental assays for understanding the complex interactions of multiple electron transfer proteins in vivo. We designed and implemented a synthetic hydrogen metabolism circuit in Escherichia coli that creates an electron transfer pathway both orthogonal to and integrated within existing metabolism. The design of such modular electron transfer circuits allows for facile characterization of in vivo system parameters with applications toward further engineering for alternative energy production. PMID:21468209

Soldering Tool for Integrated Circuits

NASA Technical Reports Server (NTRS)

Takahashi, Ted H.

1987-01-01

Many connections soldered simultaneously in confined spaces. Improved soldering tool bonds integrated circuits onto printed-circuit boards. Intended especially for use with so-called "leadless-carrier" integrated circuits.

Deterministic Integration of Quantum Dots into on-Chip Multimode Interference Beamsplitters Using in Situ Electron Beam Lithography.

PubMed

Schnauber, Peter; Schall, Johannes; Bounouar, Samir; Höhne, Theresa; Park, Suk-In; Ryu, Geun-Hwan; Heindel, Tobias; Burger, Sven; Song, Jin-Dong; Rodt, Sven; Reitzenstein, Stephan

2018-04-11

The development of multinode quantum optical circuits has attracted great attention in recent years. In particular, interfacing quantum-light sources, gates, and detectors on a single chip is highly desirable for the realization of large networks. In this context, fabrication techniques that enable the deterministic integration of preselected quantum-light emitters into nanophotonic elements play a key role when moving forward to circuits containing multiple emitters. Here, we present the deterministic integration of an InAs quantum dot into a 50/50 multimode interference beamsplitter via in situ electron beam lithography. We demonstrate the combined emitter-gate interface functionality by measuring triggered single-photon emission on-chip with g (2) (0) = 0.13 ± 0.02. Due to its high patterning resolution as well as spectral and spatial control, in situ electron beam lithography allows for integration of preselected quantum emitters into complex photonic systems. Being a scalable single-step approach, it paves the way toward multinode, fully integrated quantum photonic chips.

High on food: the interaction between the neural circuits for feeding and for reward.

PubMed

Liu, Jing-Jing; Mukherjee, Diptendu; Haritan, Doron; Ignatowska-Jankowska, Bogna; Liu, Ji; Citri, Ami; Pang, Zhiping P

2015-04-01

Hunger, mostly initiated by a deficiency in energy, induces food seeking and intake. However, the drive toward food is not only regulated by physiological needs, but is motivated by the pleasure derived from ingestion of food, in particular palatable foods. Therefore, feeding is viewed as an adaptive motivated behavior that involves integrated communication between homeostatic feeding circuits and reward circuits. The initiation and termination of a feeding episode are instructed by a variety of neuronal signals, and maladaptive plasticity in almost any component of the network may lead to the development of pathological eating disorders. In this review we will summarize the latest understanding of how the feeding circuits and reward circuits in the brain interact. We will emphasize communication between the hypothalamus and the mesolimbic dopamine system and highlight complexities, discrepancies, open questions and future directions for the field.

Modeling and experimental characterization of electromigration in interconnect trees

NASA Astrophysics Data System (ADS)

Thompson, C. V.; Hau-Riege, S. P.; Andleigh, V. K.

1999-11-01

Most modeling and experimental characterization of interconnect reliability is focussed on simple straight lines terminating at pads or vias. However, laid-out integrated circuits often have interconnects with junctions and wide-to-narrow transitions. In carrying out circuit-level reliability assessments it is important to be able to assess the reliability of these more complex shapes, generally referred to as `trees.' An interconnect tree consists of continuously connected high-conductivity metal within one layer of metallization. Trees terminate at diffusion barriers at vias and contacts, and, in the general case, can have more than one terminating branch when they include junctions. We have extended the understanding of `immortality' demonstrated and analyzed for straight stud-to-stud lines, to trees of arbitrary complexity. This leads to a hierarchical approach for identifying immortal trees for specific circuit layouts and models for operation. To complete a circuit-level-reliability analysis, it is also necessary to estimate the lifetimes of the mortal trees. We have developed simulation tools that allow modeling of stress evolution and failure in arbitrarily complex trees. We are testing our models and simulations through comparisons with experiments on simple trees, such as lines broken into two segments with different currents in each segment. Models, simulations and early experimental results on the reliability of interconnect trees are shown to be consistent.

Thermally-isolated silicon-based integrated circuits and related methods

DOEpatents

Wojciechowski, Kenneth; Olsson, Roy H.; Clews, Peggy J.; Bauer, Todd

2017-05-09

Thermally isolated devices may be formed by performing a series of etches on a silicon-based substrate. As a result of the series of etches, silicon material may be removed from underneath a region of an integrated circuit (IC). The removal of the silicon material from underneath the IC forms a gap between remaining substrate and the integrated circuit, though the integrated circuit remains connected to the substrate via a support bar arrangement that suspends the integrated circuit over the substrate. The creation of this gap functions to release the device from the substrate and create a thermally-isolated integrated circuit.

Corticostriatal circuit mechanisms of value-based action selection: Implementation of reinforcement learning algorithms and beyond.

PubMed

Morita, Kenji; Jitsev, Jenia; Morrison, Abigail

2016-09-15

Value-based action selection has been suggested to be realized in the corticostriatal local circuits through competition among neural populations. In this article, we review theoretical and experimental studies that have constructed and verified this notion, and provide new perspectives on how the local-circuit selection mechanisms implement reinforcement learning (RL) algorithms and computations beyond them. The striatal neurons are mostly inhibitory, and lateral inhibition among them has been classically proposed to realize "Winner-Take-All (WTA)" selection of the maximum-valued action (i.e., 'max' operation). Although this view has been challenged by the revealed weakness, sparseness, and asymmetry of lateral inhibition, which suggest more complex dynamics, WTA-like competition could still occur on short time scales. Unlike the striatal circuit, the cortical circuit contains recurrent excitation, which may enable retention or temporal integration of information and probabilistic "soft-max" selection. The striatal "max" circuit and the cortical "soft-max" circuit might co-implement an RL algorithm called Q-learning; the cortical circuit might also similarly serve for other algorithms such as SARSA. In these implementations, the cortical circuit presumably sustains activity representing the executed action, which negatively impacts dopamine neurons so that they can calculate reward-prediction-error. Regarding the suggested more complex dynamics of striatal, as well as cortical, circuits on long time scales, which could be viewed as a sequence of short WTA fragments, computational roles remain open: such a sequence might represent (1) sequential state-action-state transitions, constituting replay or simulation of the internal model, (2) a single state/action by the whole trajectory, or (3) probabilistic sampling of state/action. Copyright © 2016. Published by Elsevier B.V.

Superior model for fault tolerance computation in designing nano-sized circuit systems

DOE Office of Scientific and Technical Information (OSTI.GOV)

Singh, N. S. S., E-mail: narinderjit@petronas.com.my; Muthuvalu, M. S., E-mail: msmuthuvalu@gmail.com; Asirvadam, V. S., E-mail: vijanth-sagayan@petronas.com.my

2014-10-24

As CMOS technology scales nano-metrically, reliability turns out to be a decisive subject in the design methodology of nano-sized circuit systems. As a result, several computational approaches have been developed to compute and evaluate reliability of desired nano-electronic circuits. The process of computing reliability becomes very troublesome and time consuming as the computational complexity build ups with the desired circuit size. Therefore, being able to measure reliability instantly and superiorly is fast becoming necessary in designing modern logic integrated circuits. For this purpose, the paper firstly looks into the development of an automated reliability evaluation tool based on the generalizationmore » of Probabilistic Gate Model (PGM) and Boolean Difference-based Error Calculator (BDEC) models. The Matlab-based tool allows users to significantly speed-up the task of reliability analysis for very large number of nano-electronic circuits. Secondly, by using the developed automated tool, the paper explores into a comparative study involving reliability computation and evaluation by PGM and, BDEC models for different implementations of same functionality circuits. Based on the reliability analysis, BDEC gives exact and transparent reliability measures, but as the complexity of the same functionality circuits with respect to gate error increases, reliability measure by BDEC tends to be lower than the reliability measure by PGM. The lesser reliability measure by BDEC is well explained in this paper using distribution of different signal input patterns overtime for same functionality circuits. Simulation results conclude that the reliability measure by BDEC depends not only on faulty gates but it also depends on circuit topology, probability of input signals being one or zero and also probability of error on signal lines.« less

Advances in integrated photonic circuits for packet-switched interconnection

NASA Astrophysics Data System (ADS)

Williams, Kevin A.; Stabile, Ripalta

2014-03-01

Sustained increases in capacity and connectivity are needed to overcome congestion in a range of broadband communication network nodes. Packet routing and switching in the electronic domain are leading to unsustainable energy- and bandwidth-densities, motivating research into hybrid solutions: optical switching engines are introduced for massive-bandwidth data transport while the electronic domain is clocked at more modest GHz rates to manage routing. Commercially-deployed optical switching engines using MEMS technologies are unwieldy and too slow to reconfigure for future packet-based networking. Optoelectronic packet-compliant switch technologies have been demonstrated as laboratory prototypes, but they have so far mostly used discretely pigtailed components, which are impractical for control plane development and product assembly. Integrated photonics has long held the promise of reduced hardware complexity and may be the critical step towards packet-compliant optical switching engines. Recently a number of laboratories world-wide have prototyped optical switching circuits using monolithic integration technology with up to several hundreds of integrated optical components per chip. Our own work has focused on multi-input to multi-output switching matrices. Recently we have demonstrated 8×8×8λ space and wavelength selective switches using gated cyclic routers and 16×16 broadband switching chips using monolithic multi-stage networks. We now operate these advanced circuits with custom control planes implemented with FPGAs to explore real time packet routing in multi-wavelength, multi-port test-beds. We review our contributions in the context of state of the art photonic integrated circuit technology and packet optical switching hardware demonstrations.

19 CFR 10.14 - Fabricated components subject to the exemption.

Code of Federal Regulations, 2010 CFR

2010-04-01

... assembled, such as transistors, diodes, integrated circuits, machinery parts, or precut parts of wearing..., or integrated circuit wafers containing individual integrated circuit dice which have been scribed or... resulted in a substantial transformation of the foreign copper ingots. Example 2. An integrated circuit...

Results on 3D interconnection from AIDA WP3

NASA Astrophysics Data System (ADS)

Moser, Hans-Günther; AIDA-WP3

2016-09-01

From 2010 to 2014 the EU funded AIDA project established in one of its work packages (WP3) a network of groups working collaboratively on advanced 3D integration of electronic circuits and semiconductor sensors for applications in particle physics. The main motivation came from the severe requirements on pixel detectors for tracking and vertexing at future Particle Physics experiments at LHC, super-B factories and linear colliders. To go beyond the state-of-the-art, the main issues were studying low mass, high bandwidth applications, with radiation hardness capabilities, with low power consumption, offering complex functionality, with small pixel size and without dead regions. The interfaces and interconnects of sensors to electronic readout integrated circuits are a key challenge for new detector applications.

Curvilinear electronics formed using silicon membrane circuits and elastomeric transfer elements.

PubMed

Ko, Heung Cho; Shin, Gunchul; Wang, Shuodao; Stoykovich, Mark P; Lee, Jeong Won; Kim, Dong-Hun; Ha, Jeong Sook; Huang, Yonggang; Hwang, Keh-Chih; Rogers, John A

2009-12-01

Materials and methods to achieve electronics intimately integrated on the surfaces of substrates with complex, curvilinear shapes are described. The approach exploits silicon membranes in circuit mesh structures that can be deformed in controlled ways using thin, elastomeric films. Experimental and theoretical studies of the micromechanics of such curvilinear electronics demonstrate the underlying concepts. Electrical measurements illustrate the high yields that can be obtained. The results represent significant experimental and theoretical advances over recently reported concepts for creating hemispherical photodetectors in electronic eye cameras and for using printable silicon nanoribbons/membranes in flexible electronics. The results might provide practical routes to the integration of high performance electronics with biological tissues and other systems of interest for new applications.

Fully integrated wearable sensor arrays for multiplexed in situ perspiration analysis

DOE PAGES

Gao, Wei; Emaminejad, Sam; Nyein, Hnin Yin Yin; ...

2016-01-27

We report that wearable sensor technologies are essential to the realization of personalized medicine through continuously monitoring an individual’s state of health. Sampling human sweat, which is rich in physiological information13, could enable non-invasive monitoring. Previously reported sweat-based and other noninvasive biosensors either can only monitor a single analyte at a time or lack on-site signal processing circuitry and sensor calibration mechanisms for accurate analysis of the physiological state14–18. Given the complexity of sweat secretion, simultaneous and multiplexed screening of target biomarkers is critical and requires full system integration to ensure the accuracy of measurements. Here we present a mechanicallymore » flexible and fully integrated (that is, no external analysis is needed) sensor array for multiplexed in situ perspiration analysis, which simultaneously and selectively measures sweat metabolites (such as glucose and lactate) and electrolytes (such as sodium and potassium ions), as well as the skin temperature (to calibrate the response of the sensors). Lastly, our work bridges the technological gap between signal transduction, conditioning (amplification and filtering), processing and wireless transmission in wearable biosensors by merging plasticbased sensors that interface with the skin with silicon integrated circuits consolidated on a flexible circuit board for complex signal processing.« less

Fully integrated wearable sensor arrays for multiplexed in situ perspiration analysis

DOE Office of Scientific and Technical Information (OSTI.GOV)

Gao, Wei; Emaminejad, Sam; Nyein, Hnin Yin Yin

We report that wearable sensor technologies are essential to the realization of personalized medicine through continuously monitoring an individual’s state of health. Sampling human sweat, which is rich in physiological information13, could enable non-invasive monitoring. Previously reported sweat-based and other noninvasive biosensors either can only monitor a single analyte at a time or lack on-site signal processing circuitry and sensor calibration mechanisms for accurate analysis of the physiological state14–18. Given the complexity of sweat secretion, simultaneous and multiplexed screening of target biomarkers is critical and requires full system integration to ensure the accuracy of measurements. Here we present a mechanicallymore » flexible and fully integrated (that is, no external analysis is needed) sensor array for multiplexed in situ perspiration analysis, which simultaneously and selectively measures sweat metabolites (such as glucose and lactate) and electrolytes (such as sodium and potassium ions), as well as the skin temperature (to calibrate the response of the sensors). Lastly, our work bridges the technological gap between signal transduction, conditioning (amplification and filtering), processing and wireless transmission in wearable biosensors by merging plasticbased sensors that interface with the skin with silicon integrated circuits consolidated on a flexible circuit board for complex signal processing.« less

Integrating Asynchronous Digital Design Into the Computer Engineering Curriculum

ERIC Educational Resources Information Center

Smith, S. C.; Al-Assadi, W. K.; Di, J.

2010-01-01

As demand increases for circuits with higher performance, higher complexity, and decreased feature size, asynchronous (clockless) paradigms will become more widely used in the semiconductor industry, as evidenced by the International Technology Roadmap for Semiconductors' (ITRS) prediction of a likely shift from synchronous to asynchronous design…

Silicon photonic integrated circuit swept-source optical coherence tomography receiver with dual polarization, dual balanced, in-phase and quadrature detection.

PubMed

Wang, Zhao; Lee, Hsiang-Chieh; Vermeulen, Diedrik; Chen, Long; Nielsen, Torben; Park, Seo Yeon; Ghaemi, Allan; Swanson, Eric; Doerr, Chris; Fujimoto, James

2015-07-01

Optical coherence tomography (OCT) is a widely used three-dimensional (3D) optical imaging method with many biomedical and non-medical applications. Miniaturization, cost reduction, and increased functionality of OCT systems will be critical for future emerging clinical applications. We present a silicon photonic integrated circuit swept-source OCT (SS-OCT) coherent receiver with dual polarization, dual balanced, in-phase and quadrature (IQ) detection. We demonstrate multiple functional capabilities of IQ polarization resolved detection including: complex-conjugate suppressed full-range OCT, polarization diversity detection, and polarization-sensitive OCT. To our knowledge, this is the first demonstration of a silicon photonic integrated receiver for OCT. The integrated coherent receiver provides a miniaturized, low-cost solution for SS-OCT, and is also a key step towards a fully integrated high speed SS-OCT system with good performance and multi-functional capabilities. With further performance improvement and cost reduction, photonic integrated technology promises to greatly increase penetration of OCT systems in existing applications and enable new applications.

Silicon photonic integrated circuit swept-source optical coherence tomography receiver with dual polarization, dual balanced, in-phase and quadrature detection

PubMed Central

Wang, Zhao; Lee, Hsiang-Chieh; Vermeulen, Diedrik; Chen, Long; Nielsen, Torben; Park, Seo Yeon; Ghaemi, Allan; Swanson, Eric; Doerr, Chris; Fujimoto, James

2015-01-01

Optical coherence tomography (OCT) is a widely used three-dimensional (3D) optical imaging method with many biomedical and non-medical applications. Miniaturization, cost reduction, and increased functionality of OCT systems will be critical for future emerging clinical applications. We present a silicon photonic integrated circuit swept-source OCT (SS-OCT) coherent receiver with dual polarization, dual balanced, in-phase and quadrature (IQ) detection. We demonstrate multiple functional capabilities of IQ polarization resolved detection including: complex-conjugate suppressed full-range OCT, polarization diversity detection, and polarization-sensitive OCT. To our knowledge, this is the first demonstration of a silicon photonic integrated receiver for OCT. The integrated coherent receiver provides a miniaturized, low-cost solution for SS-OCT, and is also a key step towards a fully integrated high speed SS-OCT system with good performance and multi-functional capabilities. With further performance improvement and cost reduction, photonic integrated technology promises to greatly increase penetration of OCT systems in existing applications and enable new applications. PMID:26203382

Highly integrated optical phased arrays: photonic integrated circuits for optical beam shaping and beam steering

NASA Astrophysics Data System (ADS)

Heck, Martijn J. R.

2017-01-01

Technologies for efficient generation and fast scanning of narrow free-space laser beams find major applications in three-dimensional (3D) imaging and mapping, like Lidar for remote sensing and navigation, and secure free-space optical communications. The ultimate goal for such a system is to reduce its size, weight, and power consumption, so that it can be mounted on, e.g. drones and autonomous cars. Moreover, beam scanning should ideally be done at video frame rates, something that is beyond the capabilities of current opto-mechanical systems. Photonic integrated circuit (PIC) technology holds the promise of achieving low-cost, compact, robust and energy-efficient complex optical systems. PICs integrate, for example, lasers, modulators, detectors, and filters on a single piece of semiconductor, typically silicon or indium phosphide, much like electronic integrated circuits. This technology is maturing fast, driven by high-bandwidth communications applications, and mature fabrication facilities. State-of-the-art commercial PICs integrate hundreds of elements, and the integration of thousands of elements has been shown in the laboratory. Over the last few years, there has been a considerable research effort to integrate beam steering systems on a PIC, and various beam steering demonstrators based on optical phased arrays have been realized. Arrays of up to thousands of coherent emitters, including their phase and amplitude control, have been integrated, and various applications have been explored. In this review paper, I will present an overview of the state of the art of this technology and its opportunities, illustrated by recent breakthroughs.

A brief review of the clinical anatomy of the vestibular-ocular connections-how much do we know?

PubMed

Bronstein, A M; Patel, M; Arshad, Q

2015-02-01

The basic connectivity from the vestibular labyrinth to the eye muscles (vestibular ocular reflex, VOR) has been elucidated in the past decade, and we summarise this in graphic format. We also review the concept of 'velocity storage', a brainstem integrator that prolongs vestibular responses. Finally, we present new discoveries of how complex visual stimuli, such as binocular rivalry, influence VOR processing. In contrast to the basic brainstem circuits, cortical vestibular circuits are far from being understood, but parietal-vestibular nuclei projections are likely to be involved.

Progress in MMIC technology for satellite communications

NASA Technical Reports Server (NTRS)

Haugland, Edward J.; Leonard, Regis F.

1987-01-01

NASA's Lewis Research Center is actively involved in the development of monolithic microwave and millimeter-wave integrated circuits (MMICs). The approach of the program is to support basic research under grant or in-house, while MMIC development is done under contract, thereby facilitating the transfer of technology to users. Preliminary thrusts of the program have been the extension of technology to higher frequencies (60 GHz), degrees of complexity, and performance (power, efficiency, noise figure) by utilizing novel circuit designs, processes, and materials. A review of the progress made so far is presented.

Measured thermal images of a gallium arsenide power MMIC with and without RF applied to the input

NASA Astrophysics Data System (ADS)

Oxley, C. H.; Coaker, B. M.; Priestley, N. E.

2003-04-01

A gallium arsenide microwave monolithic integrated circuit (MMIC) power amplifier (M/ACom type MAAM71100) has been measured using infra-red microscope technology, with and without the application of a RF input signal. A reduction of approximately 10 °C in chip temperature was observed with the application of a RF input signal, which will influence the MTTF of the chip. Further, the measurement technique may be used to monitor the thermal impedance and dynamic cooling of RF power devices under operational conditions in complex circuits.

First-Order SPICE Modeling of Extreme-Temperature 4H-SiC JFET Integrated Circuits

NASA Technical Reports Server (NTRS)

Neudeck, Philip G.; Spry, David J.; Chen, Liang-Yu

2016-01-01

A separate submission to this conference reports that 4H-SiC Junction Field Effect Transistor (JFET) digital and analog Integrated Circuits (ICs) with two levels of metal interconnect have reproducibly demonstrated electrical operation at 500 C in excess of 1000 hours. While this progress expands the complexity and durability envelope of high temperature ICs, one important area for further technology maturation is the development of reasonably accurate and accessible computer-aided modeling and simulation tools for circuit design of these ICs. Towards this end, we report on development and verification of 25 C to 500 C SPICE simulation models of first order accuracy for this extreme-temperature durable 4H-SiC JFET IC technology. For maximum availability, the JFET IC modeling is implemented using the baseline-version SPICE NMOS LEVEL 1 model that is common to other variations of SPICE software and importantly includes the body-bias effect. The first-order accuracy of these device models is verified by direct comparison with measured experimental device characteristics.

Good Trellises for IC Implementation of Viterbi Decoders for Linear Block Codes

NASA Technical Reports Server (NTRS)

Moorthy, Hari T.; Lin, Shu; Uehara, Gregory T.

1997-01-01

This paper investigates trellis structures of linear block codes for the integrated circuit (IC) implementation of Viterbi decoders capable of achieving high decoding speed while satisfying a constraint on the structural complexity of the trellis in terms of the maximum number of states at any particular depth. Only uniform sectionalizations of the code trellis diagram are considered. An upper-bound on the number of parallel and structurally identical (or isomorphic) subtrellises in a proper trellis for a code without exceeding the maximum state complexity of the minimal trellis of the code is first derived. Parallel structures of trellises with various section lengths for binary BCH and Reed-Muller (RM) codes of lengths 32 and 64 are analyzed. Next, the complexity of IC implementation of a Viterbi decoder based on an L-section trellis diagram for a code is investigated. A structural property of a Viterbi decoder called add-compare-select (ACS)-connectivity which is related to state connectivity is introduced. This parameter affects the complexity of wire-routing (interconnections within the IC). The effect of five parameters namely: (1) effective computational complexity; (2) complexity of the ACS-circuit; (3) traceback complexity; (4) ACS-connectivity; and (5) branch complexity of a trellis diagram on the very large scale integration (VISI) complexity of a Viterbi decoder is investigated. It is shown that an IC implementation of a Viterbi decoder based on a nonminimal trellis requires less area and is capable of operation at higher speed than one based on the minimal trellis when the commonly used ACS-array architecture is considered.

GaAs integrated circuits and heterojunction devices

NASA Astrophysics Data System (ADS)

Fowlis, Colin

1986-06-01

The state of the art of GaAs technology in the U.S. as it applies to digital and analog integrated circuits is examined. In a market projection, it is noted that whereas analog ICs now largely dominate the market, in 1994 they will amount to only 39 percent vs. 57 percent for digital ICs. The military segment of the market will remain the largest (42 percent in 1994 vs. 70 percent today). ICs using depletion-mode-only FETs can be constructed in various forms, the closest to production being BFL or buffered FET logic. Schottky diode FET logic - a lower power approach - can reach higher complexities and strong efforts are being made in this direction. Enhancement type devices appear essential to reach LSI and VLSI complexity, but process control is still very difficult; strong efforts are under way, both in the U.S. and in Japan. Heterojunction devices appear very promising, although structures are fairly complex, and special fabrication techniques, such as molecular beam epitaxy and MOCVD, are necessary. High-electron-mobility-transistor (HEMT) devices show significant performance advantages over MESFETs at low temperatures. Initial results of heterojunction bipolar transistor devices show promise for high speed A/D converter applications.

Inverter Circuits Using ZnO Nanoparticle Based Thin-Film Transistors for Flexible Electronic Applications

PubMed Central

Vidor, Fábio F.; Meyers, Thorsten; Hilleringmann, Ulrich

2016-01-01

Innovative systems exploring the flexibility and the transparency of modern semiconducting materials are being widely researched by the scientific community and by several companies. For a low-cost production and large surface area applications, thin-film transistors (TFTs) are the key elements driving the system currents. In order to maintain a cost efficient integration process, solution based materials are used as they show an outstanding tradeoff between cost and system complexity. In this paper, we discuss the integration process of ZnO nanoparticle TFTs using a high-k resin as gate dielectric. The performance in dependence on the transistor structure has been investigated, and inverted staggered setups depict an improved performance over the coplanar device increasing both the field-effect mobility and the ION/IOFF ratio. Aiming at the evaluation of the TFT characteristics for digital circuit applications, inverter circuits using a load TFT in the pull-up network and an active TFT in the pull-down network were integrated. The inverters show reasonable switching characteristics and V/V gains. Conjointly, the influence of the geometry ratio and the supply voltage on the devices have been analyzed. Moreover, as all integration steps are suitable to polymeric templates, the fabrication process is fully compatible to flexible substrates. PMID:28335282

Inverter Circuits Using ZnO Nanoparticle Based Thin-Film Transistors for Flexible Electronic Applications.

PubMed

Vidor, Fábio F; Meyers, Thorsten; Hilleringmann, Ulrich

2016-08-23

Innovative systems exploring the flexibility and the transparency of modern semiconducting materials are being widely researched by the scientific community and by several companies. For a low-cost production and large surface area applications, thin-film transistors (TFTs) are the key elements driving the system currents. In order to maintain a cost efficient integration process, solution based materials are used as they show an outstanding tradeoff between cost and system complexity. In this paper, we discuss the integration process of ZnO nanoparticle TFTs using a high- k resin as gate dielectric. The performance in dependence on the transistor structure has been investigated, and inverted staggered setups depict an improved performance over the coplanar device increasing both the field-effect mobility and the I ON / I OFF ratio. Aiming at the evaluation of the TFT characteristics for digital circuit applications, inverter circuits using a load TFT in the pull-up network and an active TFT in the pull-down network were integrated. The inverters show reasonable switching characteristics and V / V gains. Conjointly, the influence of the geometry ratio and the supply voltage on the devices have been analyzed. Moreover, as all integration steps are suitable to polymeric templates, the fabrication process is fully compatible to flexible substrates.

Generation of arbitrarily shaped picosecond optical pulses using an integrated electrooptic waveguide modulator.

PubMed

Haner, M; Warren, W S

1987-09-01

We have produced complex software adjustable laser pulse shapes with ~10-ps resolution, and pulse energies up to 100 microJ for spectroscopic applications. The key devices are a high damage threshold electrooptic directional coupler and a GaAs circuit for synthesizing arbitrarily shaped microwave pulses.

Electronic circuits and systems: A compilation. [including integrated circuits, logic circuits, varactor diode circuits, low pass filters, and optical equipment circuits

NASA Technical Reports Server (NTRS)

1975-01-01

Technological information is presented electronic circuits and systems which have potential utility outside the aerospace community. Topics discussed include circuit components such as filters, converters, and integrators, circuits designed for use with specific equipment or systems, and circuits designed primarily for use with optical equipment or displays.

Automatic visual inspection system for microelectronics

NASA Technical Reports Server (NTRS)

Micka, E. Z. (Inventor)

1975-01-01

A system for automatically inspecting an integrated circuit was developed. A device for shining a scanning narrow light beam at an integrated circuit to be inspected and another light beam at an accepted integrated circuit was included. A pair of photodetectors that receive light reflected from these integrated circuits, and a comparing system compares the outputs of the photodetectors.

DOE Office of Scientific and Technical Information (OSTI.GOV)

Wojciechowski, Kenneth; Olsson, Roy; Clews, Peggy J.

Thermally isolated devices may be formed by performing a series of etches on a silicon-based substrate. As a result of the series of etches, silicon material may be removed from underneath a region of an integrated circuit (IC). The removal of the silicon material from underneath the IC forms a gap between remaining substrate and the integrated circuit, though the integrated circuit remains connected to the substrate via a support bar arrangement that suspends the integrated circuit over the substrate. The creation of this gap functions to release the device from the substrate and create a thermally-isolated integrated circuit.

Design structure for in-system redundant array repair in integrated circuits

DOEpatents

Bright, Arthur A.; Crumley, Paul G.; Dombrowa, Marc; Douskey, Steven M.; Haring, Rudolf A.; Oakland, Steven F.; Quellette, Michael R.; Strissel, Scott A.

2008-11-25

A design structure for repairing an integrated circuit during operation of the integrated circuit. The integrated circuit comprising of a multitude of memory arrays and a fuse box holding control data for controlling redundancy logic of the arrays. The design structure provides the integrated circuit with a control data selector for passing the control data from the fuse box to the memory arrays; providing a source of alternate control data, external of the integrated circuit; and connecting the source of alternate control data to the control data selector. The design structure further passes the alternate control data from the source thereof, through the control data selector and to the memory arrays to control the redundancy logic of the memory arrays.

Circuit-Host Coupling Induces Multifaceted Behavioral Modulations of a Gene Switch.

PubMed

Blanchard, Andrew E; Liao, Chen; Lu, Ting

2018-02-06

Quantitative modeling of gene circuits is fundamentally important to synthetic biology, as it offers the potential to transform circuit engineering from trial-and-error construction to rational design and, hence, facilitates the advance of the field. Currently, typical models regard gene circuits as isolated entities and focus only on the biochemical processes within the circuits. However, such a standard paradigm is getting challenged by increasing experimental evidence suggesting that circuits and their host are intimately connected, and their interactions can potentially impact circuit behaviors. Here we systematically examined the roles of circuit-host coupling in shaping circuit dynamics by using a self-activating gene switch as a model circuit. Through a combination of deterministic modeling, stochastic simulation, and Fokker-Planck equation formalism, we found that circuit-host coupling alters switch behaviors across multiple scales. At the single-cell level, it slows the switch dynamics in the high protein production regime and enlarges the difference between stable steady-state values. At the population level, it favors cells with low protein production through differential growth amplification. Together, the two-level coupling effects induce both quantitative and qualitative modulations of the switch, with the primary component of the effects determined by the circuit's architectural parameters. This study illustrates the complexity and importance of circuit-host coupling in modulating circuit behaviors, demonstrating the need for a new paradigm-integrated modeling of the circuit-host system-for quantitative understanding of engineered gene networks. Copyright © 2017 Biophysical Society. Published by Elsevier Inc. All rights reserved.

Integrated circuits and molecular components for stress and feeding: implications for eating disorders

PubMed Central

Hardaway, J. A.; Crowley, N. A.; Bulik, C. M.; Kash, T. L.

2015-01-01

Eating disorders are complex brain disorders that afflict millions of individuals worldwide. The etiology of these diseases is not fully understood, but a growing body of literature suggests that stress and anxiety may play a critical role in their development. As our understanding of the genetic and environmental factors that contribute to disease in clinical populations like anorexia nervosa, bulimia nervosa and binge eating disorder continue to grow, neuroscientists are using animal models to understand the neurobiology of stress and feeding. We hypothesize that eating disorder clinical phenotypes may result from stress-induced maladaptive alterations in neural circuits that regulate feeding, and that these circuits can be neurochemically isolated using animal model of eating disorders. PMID:25366309

Rapid construction of insulated genetic circuits via synthetic sequence-guided isothermal assembly

DOE Office of Scientific and Technical Information (OSTI.GOV)

Torella, JP; Boehm, CR; Lienert, F

2013-12-28

In vitro recombination methods have enabled one-step construction of large DNA sequences from multiple parts. Although synthetic biological circuits can in principle be assembled in the same fashion, they typically contain repeated sequence elements such as standard promoters and terminators that interfere with homologous recombination. Here we use a computational approach to design synthetic, biologically inactive unique nucleotide sequences (UNSes) that facilitate accurate ordered assembly. Importantly, our designed UNSes make it possible to assemble parts with repeated terminator and insulator sequences, and thereby create insulated functional genetic circuits in bacteria and mammalian cells. Using UNS-guided assembly to construct repeating promoter-gene-terminatormore » parts, we systematically varied gene expression to optimize production of a deoxychromoviridans biosynthetic pathway in Escherichia coli. We then used this system to construct complex eukaryotic AND-logic gates for genomic integration into embryonic stem cells. Construction was performed by using a standardized series of UNS-bearing BioBrick-compatible vectors, which enable modular assembly and facilitate reuse of individual parts. UNS-guided isothermal assembly is broadly applicable to the construction and optimization of genetic circuits and particularly those requiring tight insulation, such as complex biosynthetic pathways, sensors, counters and logic gates.« less

Laser Integration on Silicon Photonic Circuits Through Transfer Printing

DTIC Science & Technology

2017-03-10

AFRL-AFOSR-UK-TR-2017-0019 Laser integration on silicon photonic circuits through transfer printing Gunther Roelkens UNIVERSITEIT GENT VZW Final...TYPE Final 3. DATES COVERED (From - To) 15 Sep 2015 to 14 Sep 2016 4. TITLE AND SUBTITLE Laser integration on silicon photonic circuits through...parallel integration of III-V lasers on silicon photonic integrated circuits. The report discusses the technological process that has been developed as

Total-dose radiation effects data for semiconductor devices. 1985 supplement. Volume 2, part A

NASA Technical Reports Server (NTRS)

Martin, K. E.; Gauthier, M. K.; Coss, J. R.; Dantas, A. R. V.; Price, W. E.

1986-01-01

Steady-state, total-dose radiation test data, are provided in graphic format for use by electronic designers and other personnel using semiconductor devices in a radiation environment. The data were generated by JPL for various NASA space programs. This volume provides data on integrated circuits. The data are presented in graphic, tabular, and/or narrative format, depending on the complexity of the integrated circuit. Most tests were done using the JPL or Boeing electron accelerator (Dynamitron) which provides a steady-state 2.5 MeV electron beam. However, some radiation exposures were made with a Cobalt-60 gamma ray source, the results of which should be regarded as only an approximate measure of the radiation damage that would be incurred by an equivalent electron dose.

Multiscale mechanobiology: computational models for integrating molecules to multicellular systems

PubMed Central

Mak, Michael; Kim, Taeyoon

2015-01-01

Mechanical signals exist throughout the biological landscape. Across all scales, these signals, in the form of force, stiffness, and deformations, are generated and processed, resulting in an active mechanobiological circuit that controls many fundamental aspects of life, from protein unfolding and cytoskeletal remodeling to collective cell motions. The multiple scales and complex feedback involved present a challenge for fully understanding the nature of this circuit, particularly in development and disease in which it has been implicated. Computational models that accurately predict and are based on experimental data enable a means to integrate basic principles and explore fine details of mechanosensing and mechanotransduction in and across all levels of biological systems. Here we review recent advances in these models along with supporting and emerging experimental findings. PMID:26019013

SiC Integrated Circuits for Power Device Drivers Able to Operate in Harsh Environments

NASA Astrophysics Data System (ADS)

Godignon, P.; Alexandru, M.; Banu, V.; Montserrat, J.; Jorda, X.; Vellvehi, M.; Schmidt, B.; Michel, P.; Millan, J.

2014-08-01

The currently developed SiC electronic devices are more robust to high temperature operation and radiation exposure damage than correspondingly rated Si ones. In order to integrate the existent SiC high power and high temperature electronics into more complex systems, a SiC integrated circuit (IC) technology capable of operation at temperatures substantially above the conventional ones is required. Therefore, this paper is a step towards the development of ICs-control electronics that have to attend the harsh environment power applications. Concretely, we present the development of SiC MESFET-based digital circuitry, able to integrate gate driver for SiC power devices. Furthermore, a planar lateral power MESFET is developed with the aim of its co-integration on the same chip with the previously mentioned SiC digital ICs technology. And finally, experimental results on SiC Schottky-gated devices irradiated with protons and electrons are presented. This development is based on the Tungsten-Schottky interface technology used for the fabrication of stable SiC Schottky diodes for the European Space Agency Mission BepiColombo.

A two-channel, spectrally degenerate polarization entangled source on chip

NASA Astrophysics Data System (ADS)

Sansoni, Linda; Luo, Kai Hong; Eigner, Christof; Ricken, Raimund; Quiring, Viktor; Herrmann, Harald; Silberhorn, Christine

2017-12-01

Integrated optics provides the platform for the experimental implementation of highly complex and compact circuits for quantum information applications. In this context integrated waveguide sources represent a powerful resource for the generation of quantum states of light due to their high brightness and stability. However, the confinement of the light in a single spatial mode limits the realization of multi-channel sources. Due to this challenge one of the most adopted sources in quantum information processes, i.e. a source which generates spectrally indistinguishable polarization entangled photons in two different spatial modes, has not yet been realized in a fully integrated platform. Here we overcome this limitation by suitably engineering two periodically poled waveguides and an integrated polarization splitter in lithium niobate. This source produces polarization entangled states with fidelity of F = 0.973 ±0.003 and a test of Bell's inequality results in a violation larger than 14 standard deviations. It can work both in pulsed and continuous wave regime. This device represents a new step toward the implementation of fully integrated circuits for quantum information applications.

Deterministic Integration of Quantum Dots into on-Chip Multimode Interference Beamsplitters Using in Situ Electron Beam Lithography

NASA Astrophysics Data System (ADS)

Schnauber, Peter; Schall, Johannes; Bounouar, Samir; Höhne, Theresa; Park, Suk-In; Ryu, Geun-Hwan; Heindel, Tobias; Burger, Sven; Song, Jin-Dong; Rodt, Sven; Reitzenstein, Stephan

2018-04-01

The development of multi-node quantum optical circuits has attracted great attention in recent years. In particular, interfacing quantum-light sources, gates and detectors on a single chip is highly desirable for the realization of large networks. In this context, fabrication techniques that enable the deterministic integration of pre-selected quantum-light emitters into nanophotonic elements play a key role when moving forward to circuits containing multiple emitters. Here, we present the deterministic integration of an InAs quantum dot into a 50/50 multi-mode interference beamsplitter via in-situ electron beam lithography. We demonstrate the combined emitter-gate interface functionality by measuring triggered single-photon emission on-chip with $g^{(2)}(0) = 0.13\\pm 0.02$. Due to its high patterning resolution as well as spectral and spatial control, in-situ electron beam lithography allows for integration of pre-selected quantum emitters into complex photonic systems. Being a scalable single-step approach, it paves the way towards multi-node, fully integrated quantum photonic chips.

Monolithically integrated bacteriorhodopsin/semiconductor opto-electronic integrated circuit for a bio-photoreceiver.

PubMed

Xu, J; Bhattacharya, P; Váró, G

2004-03-15

The light-sensitive protein, bacteriorhodopsin (BR), is monolithically integrated with an InP-based amplifier circuit to realize a novel opto-electronic integrated circuit (OEIC) which performs as a high-speed photoreceiver. The circuit is realized by epitaxial growth of the field-effect transistors, currently used semiconductor device and circuit fabrication techniques, and selective area BR electro-deposition. The integrated photoreceiver has a responsivity of 175 V/W and linear photoresponse, with a dynamic range of 16 dB, with 594 nm photoexcitation. The dynamics of the photochemical cycle of BR has also been modeled and a proposed equivalent circuit simulates the measured BR photoresponse with good agreement.

Microchannel cooling of face down bonded chips

DOEpatents

Bernhardt, Anthony F.

1993-01-01

Microchannel cooling is applied to flip-chip bonded integrated circuits, in a manner which maintains the advantages of flip-chip bonds, while overcoming the difficulties encountered in cooling the chips. The technique is suited to either multichip integrated circuit boards in a plane, or to stacks of circuit boards in a three dimensional interconnect structure. Integrated circuit chips are mounted on a circuit board using flip-chip or control collapse bonds. A microchannel structure is essentially permanently coupled with the back of the chip. A coolant delivery manifold delivers coolant to the microchannel structure, and a seal consisting of a compressible elastomer is provided between the coolant delivery manifold and the microchannel structure. The integrated circuit chip and microchannel structure are connected together to form a replaceable integrated circuit module which can be easily decoupled from the coolant delivery manifold and the circuit board. The coolant supply manifolds may be disposed between the circuit boards in a stack and coupled to supplies of coolant through a side of the stack.

Microchannel cooling of face down bonded chips

DOEpatents

Bernhardt, A.F.

1993-06-08

Microchannel cooling is applied to flip-chip bonded integrated circuits, in a manner which maintains the advantages of flip-chip bonds, while overcoming the difficulties encountered in cooling the chips. The technique is suited to either multi chip integrated circuit boards in a plane, or to stacks of circuit boards in a three dimensional interconnect structure. Integrated circuit chips are mounted on a circuit board using flip-chip or control collapse bonds. A microchannel structure is essentially permanently coupled with the back of the chip. A coolant delivery manifold delivers coolant to the microchannel structure, and a seal consisting of a compressible elastomer is provided between the coolant delivery manifold and the microchannel structure. The integrated circuit chip and microchannel structure are connected together to form a replaceable integrated circuit module which can be easily decoupled from the coolant delivery manifold and the circuit board. The coolant supply manifolds may be disposed between the circuit boards in a stack and coupled to supplies of coolant through a side of the stack.

Design of high-speed burst mode clock and data recovery IC for passive optical network

NASA Astrophysics Data System (ADS)

Yan, Minhui; Hong, Xiaobin; Huang, Wei-Ping; Hong, Jin

2005-09-01

Design of a high bit rate burst mode clock and data recovery (BMCDR) circuit for gigabit passive optical networks (GPON) is described. A top-down design flow is established and some of the key issues related to the behavioural level modeling are addressed in consideration for the complexity of the BMCDR integrated circuit (IC). Precise implementation of Simulink behavioural model accounting for the saturation of frequency control voltage is therefore developed for the BMCDR, and the parameters of the circuit blocks can be readily adjusted and optimized based on the behavioural model. The newly designed BMCDR utilizes the 0.18um standard CMOS technology and is shown to be capable of operating at bit rate of 2.5Gbps, as well as the recovery time of one bit period in our simulation. The developed behaviour model is verified by comparing with the detailed circuit simulation.

CMOS Electrochemical Instrumentation for Biosensor Microsystems: A Review.

PubMed

Li, Haitao; Liu, Xiaowen; Li, Lin; Mu, Xiaoyi; Genov, Roman; Mason, Andrew J

2016-12-31

Modern biosensors play a critical role in healthcare and have a quickly growing commercial market. Compared to traditional optical-based sensing, electrochemical biosensors are attractive due to superior performance in response time, cost, complexity and potential for miniaturization. To address the shortcomings of traditional benchtop electrochemical instruments, in recent years, many complementary metal oxide semiconductor (CMOS) instrumentation circuits have been reported for electrochemical biosensors. This paper provides a review and analysis of CMOS electrochemical instrumentation circuits. First, important concepts in electrochemical sensing are presented from an instrumentation point of view. Then, electrochemical instrumentation circuits are organized into functional classes, and reported CMOS circuits are reviewed and analyzed to illuminate design options and performance tradeoffs. Finally, recent trends and challenges toward on-CMOS sensor integration that could enable highly miniaturized electrochemical biosensor microsystems are discussed. The information in the paper can guide next generation electrochemical sensor design.

CMOS Electrochemical Instrumentation for Biosensor Microsystems: A Review

PubMed Central

Li, Haitao; Liu, Xiaowen; Li, Lin; Mu, Xiaoyi; Genov, Roman; Mason, Andrew J.

2016-01-01

Modern biosensors play a critical role in healthcare and have a quickly growing commercial market. Compared to traditional optical-based sensing, electrochemical biosensors are attractive due to superior performance in response time, cost, complexity and potential for miniaturization. To address the shortcomings of traditional benchtop electrochemical instruments, in recent years, many complementary metal oxide semiconductor (CMOS) instrumentation circuits have been reported for electrochemical biosensors. This paper provides a review and analysis of CMOS electrochemical instrumentation circuits. First, important concepts in electrochemical sensing are presented from an instrumentation point of view. Then, electrochemical instrumentation circuits are organized into functional classes, and reported CMOS circuits are reviewed and analyzed to illuminate design options and performance tradeoffs. Finally, recent trends and challenges toward on-CMOS sensor integration that could enable highly miniaturized electrochemical biosensor microsystems are discussed. The information in the paper can guide next generation electrochemical sensor design. PMID:28042860

Mechanically Flexible and High-Performance CMOS Logic Circuits.

PubMed

Honda, Wataru; Arie, Takayuki; Akita, Seiji; Takei, Kuniharu

2015-10-13

Low-power flexible logic circuits are key components required by the next generation of flexible electronic devices. For stable device operation, such components require a high degree of mechanical flexibility and reliability. Here, the mechanical properties of low-power flexible complementary metal-oxide-semiconductor (CMOS) logic circuits including inverter, NAND, and NOR are investigated. To fabricate CMOS circuits on flexible polyimide substrates, carbon nanotube (CNT) network films are used for p-type transistors, whereas amorphous InGaZnO films are used for the n-type transistors. The power consumption and voltage gain of CMOS inverters are <500 pW/mm at Vin = 0 V (<7.5 nW/mm at Vin = 5 V) and >45, respectively. Importantly, bending of the substrate is not found to cause significant changes in the device characteristics. This is also observed to be the case for more complex flexible NAND and NOR logic circuits for bending states with a curvature radius of 2.6 mm. The mechanical stability of these CMOS logic circuits makes them ideal candidates for use in flexible integrated devices.

Mechanically Flexible and High-Performance CMOS Logic Circuits

PubMed Central

Honda, Wataru; Arie, Takayuki; Akita, Seiji; Takei, Kuniharu

2015-01-01

Low-power flexible logic circuits are key components required by the next generation of flexible electronic devices. For stable device operation, such components require a high degree of mechanical flexibility and reliability. Here, the mechanical properties of low-power flexible complementary metal–oxide–semiconductor (CMOS) logic circuits including inverter, NAND, and NOR are investigated. To fabricate CMOS circuits on flexible polyimide substrates, carbon nanotube (CNT) network films are used for p-type transistors, whereas amorphous InGaZnO films are used for the n-type transistors. The power consumption and voltage gain of CMOS inverters are <500 pW/mm at Vin = 0 V (<7.5 nW/mm at Vin = 5 V) and >45, respectively. Importantly, bending of the substrate is not found to cause significant changes in the device characteristics. This is also observed to be the case for more complex flexible NAND and NOR logic circuits for bending states with a curvature radius of 2.6 mm. The mechanical stability of these CMOS logic circuits makes them ideal candidates for use in flexible integrated devices. PMID:26459882

Transnational migration of Mexican scientists: A circuit between Mexico and the EEUU

NASA Astrophysics Data System (ADS)

Tinoco Herrera, Mario Luis

The experience and meaning of migration for a group of Mexican scientists participating in the construction of a migratory circuit between Mexico and US within the field of agricultural sciences is the object of this study. I define this migratory circuit of scientists as a social, historical and cultural process, and draw from transnational migration theories to analyze it. From this perspective, I view the migratory circuit of Mexican scientists to be a field of social relationships extended across Mexico and the US. In studying the migratory experience and its significance, I draw upon the methods of historical reconstruction of the circuit of scientists between Mexico and the US, participatory observation, informal narratives, testimonies and their analysis. This study focuses on three crucial moments of their migratory experience: (1) the moment prior to their trip to the US; (2) their academic training at a research center in the US; and (3) their return to a research center in Mexico. At the same time, this study highlights three key factors that determine and ascribe different meanings to the experiences of this migratory circuit: gender, academic trajectory, and the belonging to a migratory circuit. The findings from this study have shown that the experiences of migration and their multiple meanings are complex, heterogeneous and paradoxical. The complexity lies in the challenges of academic responsibilities and their near total integration and transformation of the participants' social life, as well as family life. These migratory experiences are further differentiated and problematic because of the various perceptions and sense of value that are mediated by gender, academic trajectory, and belonging to a circuit of migration; and, they are paradoxical because even though the experiences, perceptions and meanings are different and, at times, challenging, every single participant has described their experience as positive.

Signals and circuits in the purkinje neuron.

PubMed

Abrams, Zéev R; Zhang, Xiang

2011-01-01

Purkinje neurons (PN) in the cerebellum have over 100,000 inputs organized in an orthogonal geometry, and a single output channel. As the sole output of the cerebellar cortex layer, their complex firing pattern has been associated with motor control and learning. As such they have been extensively modeled and measured using tools ranging from electrophysiology and neuroanatomy, to dynamic systems and artificial intelligence methods. However, there is an alternative approach to analyze and describe the neuronal output of these cells using concepts from electrical engineering, particularly signal processing and digital/analog circuits. By viewing the PN as an unknown circuit to be reverse-engineered, we can use the tools that provide the foundations of today's integrated circuits and communication systems to analyze the Purkinje system at the circuit level. We use Fourier transforms to analyze and isolate the inherent frequency modes in the PN and define three unique frequency ranges associated with the cells' output. Comparing the PN to a signal generator that can be externally modulated adds an entire level of complexity to the functional role of these neurons both in terms of data analysis and information processing, relying on Fourier analysis methods in place of statistical ones. We also re-describe some of the recent literature in the field, using the nomenclature of signal processing. Furthermore, by comparing the experimental data of the past decade with basic electronic circuitry, we can resolve the outstanding controversy in the field, by recognizing that the PN can act as a multivibrator circuit.

Compact component for integrated quantum optic processing

PubMed Central

Sahu, Partha Pratim

2015-01-01

Quantum interference is indispensable to derive integrated quantum optic technologies (1–2). For further progress in large scale integration of quantum optic circuit, we have introduced first time two mode interference (TMI) coupler as an ultra compact component. The quantum interference varying with coupling length corresponding to the coupling ratio is studied and the larger HOM dip with peak visibility ~0.963 ± 0.009 is found at half coupling length of TMI coupler. Our results also demonstrate complex quantum interference with high fabrication tolerance and quantum visibility in TMI coupler. PMID:26584759

Gene Expression Profiling with Cre-Conditional Pseudorabies Virus Reveals a Subset of Midbrain Neurons That Participate in Reward Circuitry

PubMed Central

Pomeranz, Lisa E.; Ekstrand, Mats I.; Latcha, Kaamashri N.; Smith, Gregory A.; Enquist, Lynn W.

2017-01-01

The mesolimbic dopamine pathway receives inputs from numerous regions of the brain as part of a neural system that detects rewarding stimuli and coordinates a behavioral response. The capacity to simultaneously map and molecularly define the components of this complex multisynaptic circuit would thus advance our understanding of the determinants of motivated behavior. To accomplish this, we have constructed pseudorabies virus (PRV) strains in which viral propagation and fluorophore expression are activated only after exposure to Cre recombinase. Once activated in Cre-expressing neurons, the virus serially labels chains of presynaptic neurons. Dual injection of GFP and mCherry tracing viruses simultaneously illuminates nigrostriatal and mesolimbic circuitry and shows no overlap, demonstrating that PRV transmission is confined to synaptically connected neurons. To molecularly profile mesolimbic dopamine neurons and their presynaptic inputs, we injected Cre-conditional GFP virus into the NAc of (anti-GFP) nanobody-L10 transgenic mice and immunoprecipitated translating ribosomes from neurons infected after retrograde tracing. Analysis of purified RNA revealed an enrichment of transcripts expressed in neurons of the dorsal raphe nuclei and lateral hypothalamus that project to the mesolimbic dopamine circuit. These studies identify important inputs to the mesolimbic dopamine pathway and further show that PRV circuit-directed translating ribosome affinity purification can be broadly applied to identify molecularly defined neurons comprising complex, multisynaptic circuits. SIGNIFICANCE STATEMENT The mesolimbic dopamine circuit integrates signals from key brain regions to detect and respond to rewarding stimuli. To further define this complex multisynaptic circuit, we constructed a panel of Cre recombinase-activated pseudorabies viruses (PRVs) that enabled retrograde tracing of neural inputs that terminate on Cre-expressing neurons. Using these viruses and Retro-TRAP (translating ribosome affinity purification), a previously reported molecular profiling method, we developed a novel technique that provides anatomic as well as molecular information about the neural components of polysynaptic circuits. We refer to this new method as PRV-Circuit-TRAP (PRV circuit-directed TRAP). Using it, we have identified major projections to the mesolimbic dopamine circuit from the lateral hypothalamus and dorsal raphe nucleus and defined a discrete subset of transcripts expressed in these projecting neurons, which will allow further characterization of this important pathway. Moreover, the method we report is general and can be applied to the study of other neural circuits. PMID:28283558

Hybrid VLSI/QCA Architecture for Computing FFTs

NASA Technical Reports Server (NTRS)

Fijany, Amir; Toomarian, Nikzad; Modarres, Katayoon; Spotnitz, Matthew

2003-01-01

A data-processor architecture that would incorporate elements of both conventional very-large-scale integrated (VLSI) circuitry and quantum-dot cellular automata (QCA) has been proposed to enable the highly parallel and systolic computation of fast Fourier transforms (FFTs). The proposed circuit would complement the QCA-based circuits described in several prior NASA Tech Briefs articles, namely Implementing Permutation Matrices by Use of Quantum Dots (NPO-20801), Vol. 25, No. 10 (October 2001), page 42; Compact Interconnection Networks Based on Quantum Dots (NPO-20855) Vol. 27, No. 1 (January 2003), page 32; and Bit-Serial Adder Based on Quantum Dots (NPO-20869), Vol. 27, No. 1 (January 2003), page 35. The cited prior articles described the limitations of very-large-scale integrated (VLSI) circuitry and the major potential advantage afforded by QCA. To recapitulate: In a VLSI circuit, signal paths that are required not to interact with each other must not cross in the same plane. In contrast, for reasons too complex to describe in the limited space available for this article, suitably designed and operated QCAbased signal paths that are required not to interact with each other can nevertheless be allowed to cross each other in the same plane without adverse effect. In principle, this characteristic could be exploited to design compact, coplanar, simple (relative to VLSI) QCA-based networks to implement complex, advanced interconnection schemes.

Low-power grating detection system chip for high-speed low-cost length and angle precision measurement

NASA Astrophysics Data System (ADS)

Hou, Ligang; Luo, Rengui; Wu, Wuchen

2006-11-01

This paper forwards a low power grating detection chip (EYAS) on length and angle precision measurement. Traditional grating detection method, such as resister chain divide or phase locked divide circuit are difficult to design and tune. The need of an additional CPU for control and display makes these methods' implementation more complex and costly. Traditional methods also suffer low sampling speed for the complex divide circuit scheme and CPU software compensation. EYAS is an application specific integrated circuit (ASIC). It integrates micro controller unit (MCU), power management unit (PMU), LCD controller, Keyboard interface, grating detection unit and other peripherals. Working at 10MHz, EYAS can afford 5MHz internal sampling rate and can handle 1.25MHz orthogonal signal from grating sensor. With a simple control interface by keyboard, sensor parameter, data processing and system working mode can be configured. Two LCD controllers can adapt to dot array LCD or segment bit LCD, which comprised output interface. PMU alters system between working and standby mode by clock gating technique to save power. EYAS in test mode (system action are more frequently than real world use) consumes 0.9mw, while 0.2mw in real world use. EYAS achieved the whole grating detection system function, high-speed orthogonal signal handling in a single chip with very low power consumption.

Deep FIFO Surge Buffer

NASA Technical Reports Server (NTRS)

Temple, Gerald; Siegel, Marc; Amitai, Zwie

1991-01-01

First-in/first-out (FIFO) temporarily stores short surges of data generated by data-acquisition system at excessively high rate and releases data at lower rate suitable for processing by computer. Size and complexity reduced while capacity enhanced by use of newly developed, sophisticated integrated circuits and by "byte-folding" scheme doubling effective depth and data rate.

Projecting light beams with 3D waveguide arrays

NASA Astrophysics Data System (ADS)

Crespi, Andrea; Bragheri, Francesca

2017-01-01

Free-space light beams with complex intensity patterns, or non-trivial phase structure, are demanded in diverse fields, ranging from classical and quantum optical communications, to manipulation and imaging of microparticles and cells. Static or dynamic spatial light modulators, acting on the phase or intensity of an incoming light wave, are the conventional choices to produce beams with such non-trivial characteristics. However, interfacing these devices with optical fibers or integrated optical circuits often requires difficult alignment or cumbersome optical setups. Here we explore theoretically and with numerical simulations the potentialities of directly using the output of engineered three-dimensional waveguide arrays, illuminated with linearly polarized light, to project light beams with peculiar structures. We investigate through a collection of illustrative configurations the far field distribution, showing the possibility to achieve orbital angular momentum, or to produce elaborate intensity or phase patterns with several singularity points. We also simulate the propagation of the projected beam, showing the possibility to concentrate light. We note that these devices should be at reach of current technology, thus perspectives are open for the generation of complex free-space optical beams from integrated waveguide circuits.

Making sense out of spinal cord somatosensory development

PubMed Central

Seal, Rebecca P.

2016-01-01

The spinal cord integrates and relays somatosensory input, leading to complex motor responses. Research over the past couple of decades has identified transcription factor networks that function during development to define and instruct the generation of diverse neuronal populations within the spinal cord. A number of studies have now started to connect these developmentally defined populations with their roles in somatosensory circuits. Here, we review our current understanding of how neuronal diversity in the dorsal spinal cord is generated and we discuss the logic underlying how these neurons form the basis of somatosensory circuits. PMID:27702783

Method of forming through substrate vias (TSVs) and singulating and releasing die having the TSVs from a mechanical support substrate

DOEpatents

Okandan, Murat; Nielson, Gregory N

2014-12-09

Accessing a workpiece object in semiconductor processing is disclosed. The workpiece object includes a mechanical support substrate, a release layer over the mechanical support substrate, and an integrated circuit substrate coupled over the release layer. The integrated circuit substrate includes a device layer having semiconductor devices. The method also includes etching through-substrate via (TSV) openings through the integrated circuit substrate that have buried ends at or within the release layer including using the release layer as an etch stop. TSVs are formed by introducing one or more conductive materials into the TSV openings. A die singulation trench is etched at least substantially through the integrated circuit substrate around a perimeter of an integrated circuit die. The integrated circuit die is at least substantially released from the mechanical support substrate.

Electro-optical Probing Of Terahertz Integrated Circuits

NASA Technical Reports Server (NTRS)

Bhasin, K. B.; Romanofsky, R.; Whitaker, J. F.; Valdmanis, J. A.; Mourou, G.; Jackson, T. A.

1990-01-01

Electro-optical probe developed to perform noncontact, nondestructive, and relatively noninvasive measurements of electric fields over broad spectrum at millimeter and shorter wavelengths in integrated circuits. Manipulated with conventional intregrated-circuit-wafer-probing equipment and operated without any special preparation of integrated circuits. Tip of probe small electro-optical crystal serving as proximity electric-field sensor.

Monolithic Microwave Integrated Circuits Based on GaAs Mesfet Technology

NASA Astrophysics Data System (ADS)

Bahl, Inder J.

Advanced military microwave systems are demanding increased integration, reliability, radiation hardness, compact size and lower cost when produced in large volume, whereas the microwave commercial market, including wireless communications, mandates low cost circuits. Monolithic Microwave Integrated Circuit (MMIC) technology provides an economically viable approach to meeting these needs. In this paper the design considerations for several types of MMICs and their performance status are presented. Multifunction integrated circuits that advance the MMIC technology are described, including integrated microwave/digital functions and a highly integrated transceiver at C-band.

Wide-band polarization controller for Si photonic integrated circuits.

PubMed

Velha, P; Sorianello, V; Preite, M V; De Angelis, G; Cassese, T; Bianchi, A; Testa, F; Romagnoli, M

2016-12-15

A circuit for the management of any arbitrary polarization state of light is demonstrated on an integrated silicon (Si) photonics platform. This circuit allows us to adapt any polarization into the standard fundamental TE mode of a Si waveguide and, conversely, to control the polarization and set it to any arbitrary polarization state. In addition, the integrated thermal tuning allows kilohertz speed which can be used to perform a polarization scrambler. The circuit was used in a WDM link and successfully used to adapt four channels into a standard Si photonic integrated circuit.

General technique for the integration of MIC/MMIC'S with waveguides

NASA Technical Reports Server (NTRS)

Geller, Bernard D. (Inventor); Zaghloul, Amir I. (Inventor)

1987-01-01

A technique for packaging and integrating of a microwave integrated circuit (MIC) or monolithic microwave integrated circuit (MMIC) with a waveguide uses a printed conductive circuit pattern on a dielectric substrate to transform impedance and mode of propagation between the MIC/MMIC and the waveguide. The virtually coplanar circuit pattern lies on an equipotential surface within the waveguide and therefore makes possible single or dual polarized mode structures.

Large Scale Integrated Circuits for Military Applications.

DTIC Science & Technology

1977-05-01

economic incentive for riarrowing this gap is examined, y (U)^wo"categories of cost are analyzed: the direct life cycle cost of the integrated circuit...dependence of these costs on the physical charac- teristics of the integrated circuits is discussed. (U) The economic and physical characteristics of... economic incentive for narrowing this gap is examined. Two categories of cost are analyzed: the direct life cycle cost of the integrated circuit

Functional Interactions between Newborn and Mature Neurons Leading to Integration into Established Neuronal Circuits.

PubMed

Boulanger-Weill, Jonathan; Candat, Virginie; Jouary, Adrien; Romano, Sebastián A; Pérez-Schuster, Verónica; Sumbre, Germán

2017-06-19

From development up to adulthood, the vertebrate brain is continuously supplied with newborn neurons that integrate into established mature circuits. However, how this process is coordinated during development remains unclear. Using two-photon imaging, GCaMP5 transgenic zebrafish larvae, and sparse electroporation in the larva's optic tectum, we monitored spontaneous and induced activity of large neuronal populations containing newborn and functionally mature neurons. We observed that the maturation of newborn neurons is a 4-day process. Initially, newborn neurons showed undeveloped dendritic arbors, no neurotransmitter identity, and were unresponsive to visual stimulation, although they displayed spontaneous calcium transients. Later on, newborn-labeled neurons began to respond to visual stimuli but in a very variable manner. At the end of the maturation period, newborn-labeled neurons exhibited visual tuning curves (spatial receptive fields and direction selectivity) and spontaneous correlated activity with neighboring functionally mature neurons. At this developmental stage, newborn-labeled neurons presented complex dendritic arbors and neurotransmitter identity (excitatory or inhibitory). Removal of retinal inputs significantly perturbed the integration of newborn neurons into the functionally mature tectal network. Our results provide a comprehensive description of the maturation of newborn neurons during development and shed light on potential mechanisms underlying their integration into a functionally mature neuronal circuit. Copyright © 2017 The Author(s). Published by Elsevier Ltd.. All rights reserved.

Integrated circuits, and design and manufacture thereof

DOEpatents

Auracher, Stefan; Pribbernow, Claus; Hils, Andreas

2006-04-18

A representation of a macro for an integrated circuit layout. The representation may define sub-circuit cells of a module. The module may have a predefined functionality. The sub-circuit cells may include at least one reusable circuit cell. The reusable circuit cell may be configured such that when the predefined functionality of the module is not used, the reusable circuit cell is available for re-use.

Integrated circuits and molecular components for stress and feeding: implications for eating disorders.

PubMed

Hardaway, J A; Crowley, N A; Bulik, C M; Kash, T L

2015-01-01

Eating disorders are complex brain disorders that afflict millions of individuals worldwide. The etiology of these diseases is not fully understood, but a growing body of literature suggests that stress and anxiety may play a critical role in their development. As our understanding of the genetic and environmental factors that contribute to disease in clinical populations like anorexia nervosa, bulimia nervosa and binge eating disorder continue to grow, neuroscientists are using animal models to understand the neurobiology of stress and feeding. We hypothesize that eating disorder clinical phenotypes may result from stress-induced maladaptive alterations in neural circuits that regulate feeding, and that these circuits can be neurochemically isolated using animal model of eating disorders. © 2014 John Wiley & Sons Ltd and International Behavioural and Neural Genetics Society.

Thread-Like CMOS Logic Circuits Enabled by Reel-Processed Single-Walled Carbon Nanotube Transistors via Selective Doping.

PubMed

Heo, Jae Sang; Kim, Taehoon; Ban, Seok-Gyu; Kim, Daesik; Lee, Jun Ho; Jur, Jesse S; Kim, Myung-Gil; Kim, Yong-Hoon; Hong, Yongtaek; Park, Sung Kyu

2017-08-01

The realization of large-area electronics with full integration of 1D thread-like devices may open up a new era for ultraflexible and human adaptable electronic systems because of their potential advantages in demonstrating scalable complex circuitry by a simply integrated weaving technology. More importantly, the thread-like fiber electronic devices can be achieved using a simple reel-to-reel process, which is strongly required for low-cost and scalable manufacturing technology. Here, high-performance reel-processed complementary metal-oxide-semiconductor (CMOS) integrated circuits are reported on 1D fiber substrates by using selectively chemical-doped single-walled carbon nanotube (SWCNT) transistors. With the introduction of selective n-type doping and a nonrelief photochemical patterning process, p- and n-type SWCNT transistors are successfully implemented on cylindrical fiber substrates under air ambient, enabling high-performance and reliable thread-like CMOS inverter circuits. In addition, it is noteworthy that the optimized reel-coating process can facilitate improvement in the arrangement of SWCNTs, building uniformly well-aligned SWCNT channels, and enhancement of the electrical performance of the devices. The p- and n-type SWCNT transistors exhibit field-effect mobility of 4.03 and 2.15 cm 2 V -1 s -1 , respectively, with relatively narrow distribution. Moreover, the SWCNT CMOS inverter circuits demonstrate a gain of 6.76 and relatively good dynamic operation at a supply voltage of 5.0 V. © 2017 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

Advantages of comparative studies in songbirds to understand the neural basis of sensorimotor integration.

PubMed

Murphy, Karagh; James, Logan S; Sakata, Jon T; Prather, Jonathan F

2017-08-01

Sensorimotor integration is the process through which the nervous system creates a link between motor commands and associated sensory feedback. This process allows for the acquisition and refinement of many behaviors, including learned communication behaviors such as speech and birdsong. Consequently, it is important to understand fundamental mechanisms of sensorimotor integration, and comparative analyses of this process can provide vital insight. Songbirds offer a powerful comparative model system to study how the nervous system links motor and sensory information for learning and control. This is because the acquisition, maintenance, and control of birdsong critically depend on sensory feedback. Furthermore, there is an incredible diversity of song organizations across songbird species, ranging from songs with simple, stereotyped sequences to songs with complex sequencing of vocal gestures, as well as a wide diversity of song repertoire sizes. Despite this diversity, the neural circuitry for song learning, control, and maintenance remains highly similar across species. Here, we highlight the utility of songbirds for the analysis of sensorimotor integration and the insights about mechanisms of sensorimotor integration gained by comparing different songbird species. Key conclusions from this comparative analysis are that variation in song sequence complexity seems to covary with the strength of feedback signals in sensorimotor circuits and that sensorimotor circuits contain distinct representations of elements in the vocal repertoire, possibly enabling evolutionary variation in repertoire sizes. We conclude our review by highlighting important areas of research that could benefit from increased comparative focus, with particular emphasis on the integration of new technologies. Copyright © 2017 the American Physiological Society.

An Energy efficient application specific integrated circuit for electrocardiogram feature detection and its potential for ambulatory cardiovascular disease detection

PubMed Central

Bhaumik, Basabi

2016-01-01

A novel algorithm based on forward search is developed for real-time electrocardiogram (ECG) signal processing and implemented in application specific integrated circuit (ASIC) for QRS complex related cardiovascular disease diagnosis. The authors have evaluated their algorithm using MIT-BIH database and achieve sensitivity of 99.86% and specificity of 99.93% for QRS complex peak detection. In this Letter, Physionet PTB diagnostic ECG database is used for QRS complex related disease detection. An ASIC for cardiovascular disease detection is fabricated using 130-nm CMOS high-speed process technology. The area of the ASIC is 0.5 mm2. The power dissipation is 1.73 μW at the operating frequency of 1 kHz with a supply voltage of 0.6 V. The output from the ASIC is fed to their Android application that generates diagnostic report and can be sent to a cardiologist through email. Their ASIC result shows average failed detection rate of 0.16% for six leads data of 290 patients in PTB diagnostic ECG database. They also have implemented a low-leakage version of their ASIC. The ASIC dissipates only 45 pJ with a supply voltage of 0.9 V. Their proposed ASIC is most suitable for energy efficient telemetry cardiovascular disease detection system. PMID:27284458

An Energy efficient application specific integrated circuit for electrocardiogram feature detection and its potential for ambulatory cardiovascular disease detection.

PubMed

Jain, Sanjeev Kumar; Bhaumik, Basabi

2016-03-01

A novel algorithm based on forward search is developed for real-time electrocardiogram (ECG) signal processing and implemented in application specific integrated circuit (ASIC) for QRS complex related cardiovascular disease diagnosis. The authors have evaluated their algorithm using MIT-BIH database and achieve sensitivity of 99.86% and specificity of 99.93% for QRS complex peak detection. In this Letter, Physionet PTB diagnostic ECG database is used for QRS complex related disease detection. An ASIC for cardiovascular disease detection is fabricated using 130-nm CMOS high-speed process technology. The area of the ASIC is 0.5 mm(2). The power dissipation is 1.73 μW at the operating frequency of 1 kHz with a supply voltage of 0.6 V. The output from the ASIC is fed to their Android application that generates diagnostic report and can be sent to a cardiologist through email. Their ASIC result shows average failed detection rate of 0.16% for six leads data of 290 patients in PTB diagnostic ECG database. They also have implemented a low-leakage version of their ASIC. The ASIC dissipates only 45 pJ with a supply voltage of 0.9 V. Their proposed ASIC is most suitable for energy efficient telemetry cardiovascular disease detection system.

Silicon photonics integrated circuits: a manufacturing platform for high density, low power optical I/O's.

PubMed

Absil, Philippe P; Verheyen, Peter; De Heyn, Peter; Pantouvaki, Marianna; Lepage, Guy; De Coster, Jeroen; Van Campenhout, Joris

2015-04-06

Silicon photonics integrated circuits are considered to enable future computing systems with optical input-outputs co-packaged with CMOS chips to circumvent the limitations of electrical interfaces. In this paper we present the recent progress made to enable dense multiplexing by exploiting the integration advantage of silicon photonics integrated circuits. We also discuss the manufacturability of such circuits, a key factor for a wide adoption of this technology.

Silicon-Germanium Films Grown on Sapphire for Ka-Band Communications Applications

NASA Technical Reports Server (NTRS)

Alterovitz, Samuel A.; Mueller, Carl H.; Croke, Edward T.

2004-01-01

NASA's vision in the space communications area is to develop a broadband data network in which there is a high degree of interconnectivity among the various satellite systems, ground stations, and wired systems. To accomplish this goal, we will need complex electronic circuits integrating analog and digital data handling at the Ka-band (26 to 40 GHz). The purpose of this project is to show the feasibility of a new technology for Ka-band communications applications, namely silicon germanium (SiGe) on sapphire. This new technology will have several advantages in comparison to the existing silicon-substrate- based circuits. The main advantages are extremely low parasitic reactances that enable much higher quality active and passive components, better device isolation, higher radiation tolerance, and the integration of digital and analog circuitry on a single chip.

An electron-beam dose deposition experiment: TIGER 1-D simulation code versus thermoluminescent dosimetry

NASA Astrophysics Data System (ADS)

Murrill, Steven R.; Tipton, Charles W.; Self, Charles T.

1991-03-01

The dose absorbed in an integrated circuit (IC) die exposed to a pulse of low-energy electrons is a strong function of both electron energy and surrounding packaging materials. This report describes an experiment designed to measure how well the Integrated TIGER Series one-dimensional (1-D) electron transport simulation program predicts dose correction factors for a state-of-the-art IC package and package/printed circuit board (PCB) combination. These derived factors are compared with data obtained experimentally using thermoluminescent dosimeters (TLD's) and the FX-45 flash x-ray machine (operated in electron-beam (e-beam) mode). The results of this experiment show that the TIGER 1-D simulation code can be used to accurately predict FX-45 e-beam dose deposition correction factors for reasonably complex IC packaging configurations.

Reusable vibration resistant integrated circuit mounting socket

DOEpatents

Evans, Craig N.

1995-01-01

This invention discloses a novel form of socket for integrated circuits to be mounted on printed circuit boards. The socket uses a novel contact which is fabricated out of a bimetallic strip with a shape which makes the end of the strip move laterally as temperature changes. The end of the strip forms a barb which digs into an integrated circuit lead at normal temperatures and holds it firmly in the contact, preventing loosening and open circuits from vibration. By cooling the contact containing the bimetallic strip the barb end can be made to release so that the integrated circuit lead can be removed from the socket without damage either to the lead or to the socket components.

Macromodels of digital integrated circuits for program packages of circuit engineering design

NASA Astrophysics Data System (ADS)

Petrenko, A. I.; Sliusar, P. B.; Timchenko, A. P.

1984-04-01

Various aspects of the generation of macromodels of digital integrated circuits are examined, and their effective application in program packages of circuit engineering design is considered. Three levels of macromodels are identified, and the application of such models to the simulation of circuit outputs is discussed.

Adaptive neuro fuzzy inference system-based power estimation method for CMOS VLSI circuits

NASA Astrophysics Data System (ADS)

Vellingiri, Govindaraj; Jayabalan, Ramesh

2018-03-01

Recent advancements in very large scale integration (VLSI) technologies have made it feasible to integrate millions of transistors on a single chip. This greatly increases the circuit complexity and hence there is a growing need for less-tedious and low-cost power estimation techniques. The proposed work employs Back-Propagation Neural Network (BPNN) and Adaptive Neuro Fuzzy Inference System (ANFIS), which are capable of estimating the power precisely for the complementary metal oxide semiconductor (CMOS) VLSI circuits, without requiring any knowledge on circuit structure and interconnections. The ANFIS to power estimation application is relatively new. Power estimation using ANFIS is carried out by creating initial FIS modes using hybrid optimisation and back-propagation (BP) techniques employing constant and linear methods. It is inferred that ANFIS with the hybrid optimisation technique employing the linear method produces better results in terms of testing error that varies from 0% to 0.86% when compared to BPNN as it takes the initial fuzzy model and tunes it by means of a hybrid technique combining gradient descent BP and mean least-squares optimisation algorithms. ANFIS is the best suited for power estimation application with a low RMSE of 0.0002075 and a high coefficient of determination (R) of 0.99961.

Three-Dimensional Flexible Complementary Metal-Oxide-Semiconductor Logic Circuits Based On Two-Layer Stacks of Single-Walled Carbon Nanotube Networks.

PubMed

Zhao, Yudan; Li, Qunqing; Xiao, Xiaoyang; Li, Guanhong; Jin, Yuanhao; Jiang, Kaili; Wang, Jiaping; Fan, Shoushan

2016-02-23

We have proposed and fabricated stable and repeatable, flexible, single-walled carbon nanotube (SWCNT) thin film transistor (TFT) complementary metal-oxide-semiconductor (CMOS) integrated circuits based on a three-dimensional (3D) structure. Two layers of SWCNT-TFT devices were stacked, where one layer served as n-type devices and the other one served as p-type devices. On the basis of this method, it is able to save at least half of the area required to construct an inverter and make large-scale and high-density integrated CMOS circuits easier to design and manufacture. The 3D flexible CMOS inverter gain can be as high as 40, and the total noise margin is more than 95%. Moreover, the input and output voltage of the inverter are exactly matched for cascading. 3D flexible CMOS NOR, NAND logic gates, and 15-stage ring oscillators were fabricated on PI substrates with high performance as well. Stable electrical properties of these circuits can be obtained with bending radii as small as 3.16 mm, which shows that such a 3D structure is a reliable architecture and suitable for carbon nanotube electrical applications in complex flexible and wearable electronic devices.

SIFamide Translates Hunger Signals into Appetitive and Feeding Behavior in Drosophila.

PubMed

Martelli, Carlotta; Pech, Ulrike; Kobbenbring, Simon; Pauls, Dennis; Bahl, Britta; Sommer, Mirjam Vanessa; Pooryasin, Atefeh; Barth, Jonas; Arias, Carmina Warth Perez; Vassiliou, Chrystalleni; Luna, Abud Jose Farca; Poppinga, Haiko; Richter, Florian Gerhard; Wegener, Christian; Fiala, André; Riemensperger, Thomas

2017-07-11

Animal behavior is, on the one hand, controlled by neuronal circuits that integrate external sensory stimuli and induce appropriate motor responses. On the other hand, stimulus-evoked or internally generated behavior can be influenced by motivational conditions, e.g., the metabolic state. Motivational states are determined by physiological parameters whose homeostatic imbalances are signaled to and processed within the brain, often mediated by modulatory peptides. Here, we investigate the regulation of appetitive and feeding behavior in the fruit fly, Drosophila melanogaster. We report that four neurons in the fly brain that release SIFamide are integral elements of a complex neuropeptide network that regulates feeding. We show that SIFamidergic cells integrate feeding stimulating (orexigenic) and feeding suppressant (anorexigenic) signals to appropriately sensitize sensory circuits, promote appetitive behavior, and enhance food intake. Our study advances the cellular dissection of evolutionarily conserved signaling pathways that convert peripheral metabolic signals into feeding-related behavior. Copyright © 2017 The Author(s). Published by Elsevier Inc. All rights reserved.

Magnetic-free non-reciprocity based on staggered commutation

PubMed Central

Reiskarimian, Negar; Krishnaswamy, Harish

2016-01-01

Lorentz reciprocity is a fundamental characteristic of the vast majority of electronic and photonic structures. However, non-reciprocal components such as isolators, circulators and gyrators enable new applications ranging from radio frequencies to optical frequencies, including full-duplex wireless communication and on-chip all-optical information processing. Such components today dominantly rely on the phenomenon of Faraday rotation in magneto-optic materials. However, they are typically bulky, expensive and not suitable for insertion in a conventional integrated circuit. Here we demonstrate magnetic-free linear passive non-reciprocity based on the concept of staggered commutation. Commutation is a form of parametric modulation with very high modulation ratio. We observe that staggered commutation enables time-reversal symmetry breaking within very small dimensions (λ/1,250 × λ/1,250 in our device), resulting in a miniature radio-frequency circulator that exhibits reduced implementation complexity, very low loss, strong non-reciprocity, significantly enhanced linearity and real-time reconfigurability, and is integrated in a conventional complementary metal–oxide–semiconductor integrated circuit for the first time. PMID:27079524

Methods of fabricating applique circuits

DOEpatents

Dimos, Duane B.; Garino, Terry J.

1999-09-14

Applique circuits suitable for advanced packaging applications are introduced. These structures are particularly suited for the simple integration of large amounts (many nanoFarads) of capacitance into conventional integrated circuit and multichip packaging technology. In operation, applique circuits are bonded to the integrated circuit or other appropriate structure at the point where the capacitance is required, thereby minimizing the effects of parasitic coupling. An immediate application is to problems of noise reduction and control in modern high-frequency circuitry.

High-resolution non-destructive three-dimensional imaging of integrated circuits

NASA Astrophysics Data System (ADS)

Holler, Mirko; Guizar-Sicairos, Manuel; Tsai, Esther H. R.; Dinapoli, Roberto; Müller, Elisabeth; Bunk, Oliver; Raabe, Jörg; Aeppli, Gabriel

2017-03-01

Modern nanoelectronics has advanced to a point at which it is impossible to image entire devices and their interconnections non-destructively because of their small feature sizes and the complex three-dimensional structures resulting from their integration on a chip. This metrology gap implies a lack of direct feedback between design and manufacturing processes, and hampers quality control during production, shipment and use. Here we demonstrate that X-ray ptychography—a high-resolution coherent diffractive imaging technique—can create three-dimensional images of integrated circuits of known and unknown designs with a lateral resolution in all directions down to 14.6 nanometres. We obtained detailed device geometries and corresponding elemental maps, and show how the devices are integrated with each other to form the chip. Our experiments represent a major advance in chip inspection and reverse engineering over the traditional destructive electron microscopy and ion milling techniques. Foreseeable developments in X-ray sources, optics and detectors, as well as adoption of an instrument geometry optimized for planar rather than cylindrical samples, could lead to a thousand-fold increase in efficiency, with concomitant reductions in scan times and voxel sizes.

High-resolution non-destructive three-dimensional imaging of integrated circuits.

PubMed

Holler, Mirko; Guizar-Sicairos, Manuel; Tsai, Esther H R; Dinapoli, Roberto; Müller, Elisabeth; Bunk, Oliver; Raabe, Jörg; Aeppli, Gabriel

2017-03-15

Modern nanoelectronics has advanced to a point at which it is impossible to image entire devices and their interconnections non-destructively because of their small feature sizes and the complex three-dimensional structures resulting from their integration on a chip. This metrology gap implies a lack of direct feedback between design and manufacturing processes, and hampers quality control during production, shipment and use. Here we demonstrate that X-ray ptychography-a high-resolution coherent diffractive imaging technique-can create three-dimensional images of integrated circuits of known and unknown designs with a lateral resolution in all directions down to 14.6 nanometres. We obtained detailed device geometries and corresponding elemental maps, and show how the devices are integrated with each other to form the chip. Our experiments represent a major advance in chip inspection and reverse engineering over the traditional destructive electron microscopy and ion milling techniques. Foreseeable developments in X-ray sources, optics and detectors, as well as adoption of an instrument geometry optimized for planar rather than cylindrical samples, could lead to a thousand-fold increase in efficiency, with concomitant reductions in scan times and voxel sizes.

Circuit Architecture of VTA Dopamine Neurons Revealed by Systematic Input-Output Mapping.

PubMed

Beier, Kevin T; Steinberg, Elizabeth E; DeLoach, Katherine E; Xie, Stanley; Miyamichi, Kazunari; Schwarz, Lindsay; Gao, Xiaojing J; Kremer, Eric J; Malenka, Robert C; Luo, Liqun

2015-07-30

Dopamine (DA) neurons in the midbrain ventral tegmental area (VTA) integrate complex inputs to encode multiple signals that influence motivated behaviors via diverse projections. Here, we combine axon-initiated viral transduction with rabies-mediated trans-synaptic tracing and Cre-based cell-type-specific targeting to systematically map input-output relationships of VTA-DA neurons. We found that VTA-DA (and VTA-GABA) neurons receive excitatory, inhibitory, and modulatory input from diverse sources. VTA-DA neurons projecting to different forebrain regions exhibit specific biases in their input selection. VTA-DA neurons projecting to lateral and medial nucleus accumbens innervate largely non-overlapping striatal targets, with the latter also sending extensive extra-striatal axon collaterals. Using electrophysiology and behavior, we validated new circuits identified in our tracing studies, including a previously unappreciated top-down reinforcing circuit from anterior cortex to lateral nucleus accumbens via VTA-DA neurons. This study highlights the utility of our viral-genetic tracing strategies to elucidate the complex neural substrates that underlie motivated behaviors. Copyright © 2015 Elsevier Inc. All rights reserved.

Towards a DNA Nanoprocessor: Reusable Tile-Integrated DNA Circuits.

PubMed

Gerasimova, Yulia V; Kolpashchikov, Dmitry M

2016-08-22

Modern electronic microprocessors use semiconductor logic gates organized on a silicon chip to enable efficient inter-gate communication. Here, arrays of communicating DNA logic gates integrated on a single DNA tile were designed and used to process nucleic acid inputs in a reusable format. Our results lay the foundation for the development of a DNA nanoprocessor, a small and biocompatible device capable of performing complex analyses of DNA and RNA inputs. © 2016 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

Photonic integrated circuit implementation of a sub-GHz-selectivity frequency comb filter for optical clock multiplication.

PubMed

Geng, Zihan; Xie, Yiwei; Zhuang, Leimeng; Burla, Maurizio; Hoekman, Marcel; Roeloffzen, Chris G H; Lowery, Arthur J

2017-10-30

We report a photonic integrated circuit implementation of an optical clock multiplier, or equivalently an optical frequency comb filter. The circuit comprises a novel topology of a ring-resonator-assisted asymmetrical Mach-Zehnder interferometer in a Sagnac loop, providing a reconfigurable comb filter with sub-GHz selectivity and low complexity. A proof-of-concept device is fabricated in a high-index-contrast stoichiometric silicon nitride (Si 3 N 4 /SiO 2 ) waveguide, featuring low loss, small size, and large bandwidth. In the experiment, we show a very narrow passband for filters of this kind, i.e. a -3-dB bandwidth of 0.6 GHz and a -20-dB passband of 1.2 GHz at a frequency interval of 12.5 GHz. As an application example, this particular filter shape enables successful demonstrations of five-fold repetition rate multiplication of optical clock signals, i.e. from 2.5 Gpulses/s to 12.5 Gpulses/s and from 10 Gpulses/s to 50 Gpulses/s. This work addresses comb spectrum processing on an integrated platform, pointing towards a device-compact solution for optical clock multipliers (frequency comb filters) which have diverse applications ranging from photonic-based RF spectrum scanners and photonic radars to GHz-granularity WDM switches and LIDARs.

A Cross-Grade Study Validating the Evolutionary Pathway of Student Mental Models in Electric Circuits

ERIC Educational Resources Information Center

Lin, Jing-Wen

2017-01-01

Cross-grade studies are valuable for the development of sequential curriculum. However such studies are time and resource intensive and fail to provide a clear representation to integrate different levels of representational complexity. Lin (Lin, 2006; Lin & Chiu, 2006; Lin, Chiu, & Hsu, 2006) proposed a cladistics approach in conceptual…

Hybrid Integration of Solid-State Quantum Emitters on a Silicon Photonic Chip.

PubMed

Kim, Je-Hyung; Aghaeimeibodi, Shahriar; Richardson, Christopher J K; Leavitt, Richard P; Englund, Dirk; Waks, Edo

2017-12-13

Scalable quantum photonic systems require efficient single photon sources coupled to integrated photonic devices. Solid-state quantum emitters can generate single photons with high efficiency, while silicon photonic circuits can manipulate them in an integrated device structure. Combining these two material platforms could, therefore, significantly increase the complexity of integrated quantum photonic devices. Here, we demonstrate hybrid integration of solid-state quantum emitters to a silicon photonic device. We develop a pick-and-place technique that can position epitaxially grown InAs/InP quantum dots emitting at telecom wavelengths on a silicon photonic chip deterministically with nanoscale precision. We employ an adiabatic tapering approach to transfer the emission from the quantum dots to the waveguide with high efficiency. We also incorporate an on-chip silicon-photonic beamsplitter to perform a Hanbury-Brown and Twiss measurement. Our approach could enable integration of precharacterized III-V quantum photonic devices into large-scale photonic structures to enable complex devices composed of many emitters and photons.

System on a Chip (SoC) Overview

NASA Technical Reports Server (NTRS)

LaBel, Kenneth A.

2010-01-01

System-on-a-chip or system on chip (SoC or SOC) refers to integrating all components of a computer or other electronic system into a single integrated circuit (chip). It may contain digital, analog, mixed-signal, and often radio-frequency functions all on a single chip substrate. Complexity drives it all: Radiation tolerance and testability are challenges for fault isolation, propagation, and validation. Bigger single silicon die than flown before and technology is scaling below 90nm (new qual methods). Packages have changed and are bigger and more difficult to inspect, test, and understand. Add in embedded passives. Material interfaces are more complex (underfills, processing). New rules for board layouts. Mechanical and thermal designs, etc.

Photonic generation of ultra-wideband signals by direct current modulation on SOA section of an SOA-integrated SGDBR laser.

PubMed

Lv, Hui; Yu, Yonglin; Shu, Tan; Huang, Dexiu; Jiang, Shan; Barry, Liam P

2010-03-29

Photonic ultra-wideband (UWB) pulses are generated by direct current modulation of a semiconductor optical amplifier (SOA) section of an SOA-integrated sampled grating distributed Bragg reflector (SGDBR) laser. Modulation responses of the SOA section of the laser are first simulated with a microwave equivalent circuit model. Simulated results show a resonance behavior indicating the possibility to generate UWB signals with complex shapes in the time domain. The UWB pulse generation is then experimentally demonstrated for different selected wavelength channels with an SOA-integrated SGDBR laser.

Modular minimally invasive extracorporeal circulation systems; can they become the standard practice for performing cardiac surgery?

PubMed

Anastasiadis, K; Antonitsis, P; Argiriadou, H; Deliopoulos, A; Grosomanidis, V; Tossios, P

2015-04-01

Minimally invasive extracorporeal circulation (MiECC) has been developed in an attempt to integrate all advances in cardiopulmonary bypass technology in one closed circuit that shows improved biocompatibility and minimizes the systemic detrimental effects of CPB. Despite well-evidenced clinical advantages, penetration of MiECC technology into clinical practice is hampered by concerns raised by perfusionists and surgeons regarding air handling together with blood and volume management during CPB. We designed a modular MiECC circuit, bearing an accessory circuit for immediate transition to an open system that can be used in every adult cardiac surgical procedure, offering enhanced safety features. We challenged this modular circuit in a series of 50 consecutive patients. Our results showed that the modular AHEPA circuit design offers 100% technical success rate in a cohort of random, high-risk patients who underwent complex procedures, including reoperation and valve and aortic surgery, together with emergency cases. This pilot study applies to the real world and prompts for further evaluation of modular MiECC systems through multicentre trials. © The Author(s) 2015.

SpikingLab: modelling agents controlled by Spiking Neural Networks in Netlogo.

PubMed

Jimenez-Romero, Cristian; Johnson, Jeffrey

2017-01-01

The scientific interest attracted by Spiking Neural Networks (SNN) has lead to the development of tools for the simulation and study of neuronal dynamics ranging from phenomenological models to the more sophisticated and biologically accurate Hodgkin-and-Huxley-based and multi-compartmental models. However, despite the multiple features offered by neural modelling tools, their integration with environments for the simulation of robots and agents can be challenging and time consuming. The implementation of artificial neural circuits to control robots generally involves the following tasks: (1) understanding the simulation tools, (2) creating the neural circuit in the neural simulator, (3) linking the simulated neural circuit with the environment of the agent and (4) programming the appropriate interface in the robot or agent to use the neural controller. The accomplishment of the above-mentioned tasks can be challenging, especially for undergraduate students or novice researchers. This paper presents an alternative tool which facilitates the simulation of simple SNN circuits using the multi-agent simulation and the programming environment Netlogo (educational software that simplifies the study and experimentation of complex systems). The engine proposed and implemented in Netlogo for the simulation of a functional model of SNN is a simplification of integrate and fire (I&F) models. The characteristics of the engine (including neuronal dynamics, STDP learning and synaptic delay) are demonstrated through the implementation of an agent representing an artificial insect controlled by a simple neural circuit. The setup of the experiment and its outcomes are described in this work.

Differential transimpedance amplifier circuit for correlated differential amplification

DOEpatents

Gresham, Christopher A [Albuquerque, NM; Denton, M Bonner [Tucson, AZ; Sperline, Roger P [Tucson, AZ

2008-07-22

A differential transimpedance amplifier circuit for correlated differential amplification. The amplifier circuit increase electronic signal-to-noise ratios in charge detection circuits designed for the detection of very small quantities of electrical charge and/or very weak electromagnetic waves. A differential, integrating capacitive transimpedance amplifier integrated circuit comprising capacitor feedback loops performs time-correlated subtraction of noise.

Noise-margin limitations on gallium-arsenide VLSI

NASA Technical Reports Server (NTRS)

Long, Stephen I.; Sundaram, Mani

1988-01-01

Two factors which limit the complexity of GaAs MESFET VLSI circuits are considered. Power dissipation sets an upper complexity limit for a given logic circuit implementation and thermal design. Uniformity of device characteristics and the circuit configuration determines the electrical functional yield. Projection of VLSI complexity based on these factors indicates that logic chips of 15,000 gates are feasible with the most promising static circuits if a maximum power dissipation of 5 W per chip is assumed. While lower power per gate and therefore more gates per chip can be obtained by using a popular E/D FET circuit, yields are shown to be small when practical device parameter tolerances are applied. Further improvements in materials, devices, and circuits wil be needed to extend circuit complexity to the range currently dominated by silicon.

Optical Computers and Space Technology

NASA Technical Reports Server (NTRS)

Abdeldayem, Hossin A.; Frazier, Donald O.; Penn, Benjamin; Paley, Mark S.; Witherow, William K.; Banks, Curtis; Hicks, Rosilen; Shields, Angela

1995-01-01

The rapidly increasing demand for greater speed and efficiency on the information superhighway requires significant improvements over conventional electronic logic circuits. Optical interconnections and optical integrated circuits are strong candidates to provide the way out of the extreme limitations imposed on the growth of speed and complexity of nowadays computations by the conventional electronic logic circuits. The new optical technology has increased the demand for high quality optical materials. NASA's recent involvement in processing optical materials in space has demonstrated that a new and unique class of high quality optical materials are processible in a microgravity environment. Microgravity processing can induce improved orders in these materials and could have a significant impact on the development of optical computers. We will discuss NASA's role in processing these materials and report on some of the associated nonlinear optical properties which are quite useful for optical computers technology.

Multimode quantum interference of photons in multiport integrated devices

PubMed Central

Peruzzo, Alberto; Laing, Anthony; Politi, Alberto; Rudolph, Terry; O'Brien, Jeremy L.

2011-01-01

Photonics is a leading approach in realizing future quantum technologies and recently, optical waveguide circuits on silicon chips have demonstrated high levels of miniaturization and performance. Multimode interference (MMI) devices promise a straightforward implementation of compact and robust multiport circuits. Here, we show quantum interference in a 2×2 MMI coupler with visibility of V=95.6±0.9%. We further demonstrate the operation of a 4×4 port MMI device with photon pairs, which exhibits complex quantum interference behaviour. We have developed a new technique to fully characterize such multiport devices, which removes the need for phase-sensitive measurements and may find applications for a wide range of photonic devices. Our results show that MMI devices can operate in the quantum regime with high fidelity and promise substantial simplification and concatenation of photonic quantum circuits. PMID:21364563

GaAs Optoelectronic Integrated-Circuit Neurons

NASA Technical Reports Server (NTRS)

Lin, Steven H.; Kim, Jae H.; Psaltis, Demetri

1992-01-01

Monolithic GaAs optoelectronic integrated circuits developed for use as artificial neurons. Neural-network computer contains planar arrays of optoelectronic neurons, and variable synaptic connections between neurons effected by diffraction of light from volume hologram in photorefractive material. Basic principles of neural-network computers explained more fully in "Optoelectronic Integrated Circuits For Neural Networks" (NPO-17652). In present circuits, devices replaced by metal/semiconductor field effect transistors (MESFET's), which consume less power.

Techniques for control of long-term reliability of complex integrated circuits. I - Reliability assurance by test vehicle qualification.

NASA Technical Reports Server (NTRS)

Van Vonno, N. W.

1972-01-01

Development of an alternate approach to the conventional methods of reliability assurance for large-scale integrated circuits. The product treated is a large-scale T squared L array designed for space applications. The concept used is that of qualification of product by evaluation of the basic processing used in fabricating the product, providing an insight into its potential reliability. Test vehicles are described which enable evaluation of device characteristics, surface condition, and various parameters of the two-level metallization system used. Evaluation of these test vehicles is performed on a lot qualification basis, with the lot consisting of one wafer. Assembled test vehicles are evaluated by high temperature stress at 300 C for short time durations. Stressing at these temperatures provides a rapid method of evaluation and permits a go/no go decision to be made on the wafer lot in a timely fashion.

Interferometric imaging using Si3N4 photonic integrated circuits for a SPIDER imager.

PubMed

Su, Tiehui; Liu, Guangyao; Badham, Katherine E; Thurman, Samuel T; Kendrick, Richard L; Duncan, Alan; Wuchenich, Danielle; Ogden, Chad; Chriqui, Guy; Feng, Shaoqi; Chun, Jaeyi; Lai, Weicheng; Yoo, S J B

2018-05-14

This paper reports design, fabrication, and experimental demonstration of a silicon nitride photonic integrated circuit (PIC). The PIC is capable of conducting one-dimensional interferometric imaging with twelve baselines near λ = 1100-1600 nm. The PIC consists of twelve waveguide pairs, each leading to a multi-mode interferometer (MMI) that forms broadband interference fringes or each corresponding pair of the waveguides. Then an 18 channel arrayed waveguide grating (AWG) separates the combined signal into 18 signals of different wavelengths. A total of 103 sets of fringes are collected by the detector array at the output of the PIC. We keep the optical path difference (OPD) of each interferometer baseline to within 1 µm to maximize the visibility of the interference measurement. We also constructed a testbed to utilize the PIC for two-dimension complex visibility measurement with various targets. The experiment shows reconstructed images in good agreement with theoretical predictions.

Experimental demonstration of two-dimensional hybrid waveguide-integrated plasmonic crystals on silicon-on-insulator platform

NASA Astrophysics Data System (ADS)

Ren, Guanghui; Yudistira, Didit; Nguyen, Thach G.; Khodasevych, Iryna; Schoenhardt, Steffen; Berean, Kyle J.; Hamm, Joachim M.; Hess, Ortwin; Mitchell, Arnan

2017-07-01

Nanoscale plasmonic structures can offer unique functionality due to extreme sub-wavelength optical confinement, but the realization of complex plasmonic circuits is hampered by high propagation losses. Hybrid approaches can potentially overcome this limitation, but only few practical approaches based on either single or few element arrays of nanoantennas on dielectric nanowire have been experimentally demonstrated. In this paper, we demonstrate a two dimensional hybrid photonic plasmonic crystal interfaced with a standard silicon photonic platform. Off resonance, we observe low loss propagation through our structure, while on resonance we observe strong propagation suppression and intense concentration of light into a dense lattice of nanoscale hot-spots on the surface providing clear evidence of a hybrid photonic plasmonic crystal bandgap. This fully integrated approach is compatible with established silicon-on-insulator (SOI) fabrication techniques and constitutes a significant step toward harnessing plasmonic functionality within SOI photonic circuits.

Selective Processing Techniques for Electronics and Opto-Electronic Applications: Quantum-Well Devices and Integrated Optic Circuits

DTIC Science & Technology

1993-02-10

new technology is to have sufficient control of processing to *- describable by an appropriate elecromagnetic model . build useful devices. For example...3. W aveguide Modulators .................................. 7 B. Integrated Optical Device and Circuit Modeling ... ................... .. 10 C...following categories: A. Integrated Optical Devices and Technology B. Integrated Optical Device and Circuit Modeling C. Cryogenic Etching for Low

Semicustom integrated circuits and the standard transistor array radix (STAR)

NASA Technical Reports Server (NTRS)

Edge, T. M.

1977-01-01

The development, application, pros and cons of the semicustom and custom approach to the integration of circuits are described. Improvements in terms of cost, reliability, secrecy, power, and size reduction are examined. Also presented is the standard transistor array radix, a semicustom approach to digital integrated circuits that offers the advantages of both custom and semicustom approaches to integration.

Directly writing resistor, inductor and capacitor to composite functional circuits: a super-simple way for alternative electronics.

PubMed

Gao, Yunxia; Li, Haiyan; Liu, Jing

2013-01-01

The current strategies for making electronic devices are generally time, water, material and energy consuming. Here, the direct writing of composite functional circuits through comprehensive use of GaIn10-based liquid metal inks and matching material is proposed and investigated, which is a rather easy going and cost effective electronics fabrication way compared with the conventional approaches. Owing to its excellent adhesion and electrical properties, the liquid metal ink was demonstrated as a generalist in directly making various basic electronic components such as planar resistor, inductor and capacitor or their combination and thus composing circuits with expected electrical functions. For a precise control of the geometric sizes of the writing, a mask with a designed pattern was employed and demonstrated. Mechanisms for justifying the chemical components of the inks and the magnitudes of the target electronic elements so as to compose various practical circuits were disclosed. Fundamental tests on the electrical components including capacitor and inductor directly written on paper with working time up to 48 h and elevated temperature demonstrated their good stability and potential widespread adaptability especially when used in some high frequency circuits. As the first proof-of-concept experiment, a typical functional oscillating circuit including an integrated chip of 74HC04 with a supply voltage of 5 V, a capacitor of 10 nF and two resistors of 5 kΩ and 1 kΩ respectively was directly composed on paper through integrating specific electrical elements together, which presented an oscillation frequency of 8.8 kHz. The present method significantly extends the roles of the metal ink in recent works serving as only a single electrical conductor or interconnecting wires. It opens the way for directly writing out complex functional circuits or devices on different substrates. Such circuit composition strategy has generalized purpose and can be extended to more areas, even daily pervasive electronics.

Directly Writing Resistor, Inductor and Capacitor to Composite Functional Circuits: A Super-Simple Way for Alternative Electronics

PubMed Central

Gao, Yunxia; Li, Haiyan; Liu, Jing

2013-01-01

Background The current strategies for making electronic devices are generally time, water, material and energy consuming. Here, the direct writing of composite functional circuits through comprehensive use of GaIn10-based liquid metal inks and matching material is proposed and investigated, which is a rather easy going and cost effective electronics fabrication way compared with the conventional approaches. Methods Owing to its excellent adhesion and electrical properties, the liquid metal ink was demonstrated as a generalist in directly making various basic electronic components such as planar resistor, inductor and capacitor or their combination and thus composing circuits with expected electrical functions. For a precise control of the geometric sizes of the writing, a mask with a designed pattern was employed and demonstrated. Mechanisms for justifying the chemical components of the inks and the magnitudes of the target electronic elements so as to compose various practical circuits were disclosed. Results Fundamental tests on the electrical components including capacitor and inductor directly written on paper with working time up to 48 h and elevated temperature demonstrated their good stability and potential widespread adaptability especially when used in some high frequency circuits. As the first proof-of-concept experiment, a typical functional oscillating circuit including an integrated chip of 74HC04 with a supply voltage of 5 V, a capacitor of 10 nF and two resistors of 5 kΩ and 1 kΩ respectively was directly composed on paper through integrating specific electrical elements together, which presented an oscillation frequency of 8.8 kHz. Conclusions The present method significantly extends the roles of the metal ink in recent works serving as only a single electrical conductor or interconnecting wires. It opens the way for directly writing out complex functional circuits or devices on different substrates. Such circuit composition strategy has generalized purpose and can be extended to more areas, even daily pervasive electronics. PMID:23936349

Subsurface microscopy of interconnect layers of an integrated circuit.

PubMed

Köklü, F Hakan; Unlü, M Selim

2010-01-15

We apply the NA-increasing lens technique to confocal and wide-field backside microscopy of integrated circuits. We demonstrate 325 nm (lambda(0)/4) lateral spatial resolution while imaging metal structures located inside the interconnect layer of an integrated circuit. Vectorial field calculations are presented justifying our findings.

Postirradiation Effects In Integrated Circuits

NASA Technical Reports Server (NTRS)

Shaw, David C.; Barnes, Charles E.

1993-01-01

Two reports discuss postirradiation effects in integrated circuits. Presents examples of postirradiation measurements of performances of integrated circuits of five different types: dual complementary metal oxide/semiconductor (CMOS) flip-flop; CMOS analog multiplier; two CMOS multiplying digital-to-analog converters; electrically erasable programmable read-only memory; and semiconductor/oxide/semiconductor octal buffer driver.

76 FR 14688 - In the Matter of Certain Large Scale Integrated Circuit Semiconductor Chips and Products...

Federal Register 2010, 2011, 2012, 2013, 2014

2011-03-17

... Integrated Circuit Semiconductor Chips and Products Containing the Same; Notice of a Commission Determination... certain large scale integrated circuit semiconductor chips and products containing same by reason of... existence of a domestic industry. The Commission's notice of investigation named several respondents...

77 FR 25747 - Certain Semiconductor Integrated Circuit Devices and Products Containing Same; Institution of...

Federal Register 2010, 2011, 2012, 2013, 2014

2012-05-01

... INTERNATIONAL TRADE COMMISSION [Inv. No. 337-TA-840] Certain Semiconductor Integrated Circuit... States after importation of certain semiconductor integrated circuit devices and products containing same... No. 6,847,904 (``the '904 patent''). The complaint further alleges that an industry in the United...

77 FR 19032 - Certain Semiconductor Integrated Circuit Devices and Products Containing Same Notice of Receipt...

Federal Register 2010, 2011, 2012, 2013, 2014

2012-03-29

... INTERNATIONAL TRADE COMMISSION [DN 2888] Certain Semiconductor Integrated Circuit Devices and... Integrated Circuit Devices and Products Containing Same, DN 2888; the Commission is soliciting comments on... Commission's electronic docket (EDIS) at http://edis.usitc.gov , and will be available for inspection during...

77 FR 33486 - Certain Integrated Circuit Packages Provided With Multiple Heat-Conducting Paths and Products...

Federal Register 2010, 2011, 2012, 2013, 2014

2012-06-06

... INTERNATIONAL TRADE COMMISSION [Docket No. 2899] Certain Integrated Circuit Packages Provided With... complaint entitled Certain Integrated Circuit Packages Provided With Multiple Heat-Conducting Paths and..., telephone (202) 205-2000. The public version of the complaint can be accessed on the Commission's electronic...

A 1 GHz integrated circuit with carbon nanotube interconnects and silicon transistors.

PubMed

Close, Gael F; Yasuda, Shinichi; Paul, Bipul; Fujita, Shinobu; Wong, H-S Philip

2008-02-01

Due to their excellent electrical properties, metallic carbon nanotubes are promising materials for interconnect wires in future integrated circuits. Simulations have shown that the use of metallic carbon nanotube interconnects could yield more energy efficient and faster integrated circuits. The next step is to build an experimental prototype integrated circuit using carbon nanotube interconnects operating at high speed. Here, we report the fabrication of the first stand-alone integrated circuit combining silicon transistors and individual carbon nanotube interconnect wires on the same chip operating above 1 GHz. In addition to setting a milestone by operating above 1 GHz, this prototype is also a tool to investigate carbon nanotubes on a silicon-based platform at high frequencies, paving the way for future multi-GHz nanoelectronics.

Energy-efficient STDP-based learning circuits with memristor synapses

NASA Astrophysics Data System (ADS)

Wu, Xinyu; Saxena, Vishal; Campbell, Kristy A.

2014-05-01

It is now accepted that the traditional von Neumann architecture, with processor and memory separation, is ill suited to process parallel data streams which a mammalian brain can efficiently handle. Moreover, researchers now envision computing architectures which enable cognitive processing of massive amounts of data by identifying spatio-temporal relationships in real-time and solving complex pattern recognition problems. Memristor cross-point arrays, integrated with standard CMOS technology, are expected to result in massively parallel and low-power Neuromorphic computing architectures. Recently, significant progress has been made in spiking neural networks (SNN) which emulate data processing in the cortical brain. These architectures comprise of a dense network of neurons and the synapses formed between the axons and dendrites. Further, unsupervised or supervised competitive learning schemes are being investigated for global training of the network. In contrast to a software implementation, hardware realization of these networks requires massive circuit overhead for addressing and individually updating network weights. Instead, we employ bio-inspired learning rules such as the spike-timing-dependent plasticity (STDP) to efficiently update the network weights locally. To realize SNNs on a chip, we propose to use densely integrating mixed-signal integrate-andfire neurons (IFNs) and cross-point arrays of memristors in back-end-of-the-line (BEOL) of CMOS chips. Novel IFN circuits have been designed to drive memristive synapses in parallel while maintaining overall power efficiency (<1 pJ/spike/synapse), even at spike rate greater than 10 MHz. We present circuit design details and simulation results of the IFN with memristor synapses, its response to incoming spike trains and STDP learning characterization.

Frontal-thalamic circuits associated with language

PubMed Central

Barbas, Helen; García-Cabezas, Miguel Ángel; Zikopoulos, Basilis

2012-01-01

Thalamic nuclei associated with language including the ventral lateral, ventral anterior, intralaminar and mediodorsal form a hub that uniquely receives the output of the basal ganglia and cerebellum, and is connected with frontal (premotor and prefrontal) cortices through two parallel circuits: a thalamic pathway targets the middle frontal cortical layers focally, and the other innervates widely cortical layer 1, poised to recruit other cortices and thalamic nuclei for complex cognitive operations. Return frontal pathways to the thalamus originate from cortical layers 6 and 5. Information through this integrated thalamo-cortical system is gated by the inhibitory thalamic reticular nucleus and modulated by dopamine, representing a specialization in primates. The intricate dialogue of distinct thalamic nuclei with the basal ganglia, cerebellum, and specific dorsolateral prefrontal and premotor cortices associated with language, suggests synergistic roles in the complex but seemingly effortless sequential transformation of cognitive operations for speech production in humans. PMID:23211411

Potential for integrated optical circuits in advanced aircraft with fiber optic control and monitoring systems

NASA Astrophysics Data System (ADS)

Baumbick, Robert J.

1991-02-01

Fiber optic technology is expected to be used in future advanced weapons platforms as well as commercial aerospace applications. Fiber optic waveguides will be used to transmit noise free high speed data between a multitude of computers as well as audio and video information to the flight crew. Passive optical sensors connected to control computers with optical fiber interconnects will serve both control and monitoring functions. Implementation of fiber optic technology has already begun. Both the military and NASA have several programs in place. A cooperative program called FOCSI (Fiber Optic Control System Integration) between NASA Lewis and the NAVY to build environmentally test and flight demonstrate sensor systems for propul sion and flight control systems is currently underway. Integrated Optical Circuits (IOC''s) are also being given serious consideration for use in advanced aircraft sys tems. IOC''s will result in miniaturization and localization of components to gener ate detect optical signals and process them for use by the control computers. In some complex systems IOC''s may be required to perform calculations optically if the technology is ready replacing some of the electronic systems used today. IOC''s are attractive because they will result in rugged components capable of withstanding severe environments in advanced aerospace vehicles. Manufacturing technology devel oped for microelectronic integrated circuits applied to IOC''s will result in cost effective manufacturing. This paper reviews the current FOCSI program and describes the role of IOC''s in FOCSI applications.

Field Programmable Gate Aray (FPGA) Radiation Data: All Data is Not Equal

NASA Technical Reports Server (NTRS)

Label, Kenneth A.; Berg, Melanie D.

2016-01-01

Electronic parts (integrated circuits) have grown in complexity such that determining all failure modes and risks based on single particle event radiation testing is impossible. In this presentation, the authors will present why this is so and provide some realism on what this means to FPGAs. Its all about understanding actual risks and not making assumptions.

Phase Holograms In PMMA

NASA Technical Reports Server (NTRS)

Maker, Paul D.; Muller, Richard E.

1994-01-01

Complex, computer-generated phase holograms written in thin films of poly(methyl methacrylate) (PMMA) by process of electron-beam exposure followed by chemical development. Spatial variations of phase delay in holograms quasi-continuous, as distinquished from stepwise as in binary phase holograms made by integrated-circuit fabrication. Holograms more precise than binary holograms. Greater continuity and precision results in decreased scattering loss and increased imaging efficiency.

Silicon Compilation: A Solution to the Complexity of VLSI (Very Large-Scale Integrated) Circuit Design.

DTIC Science & Technology

1985-09-01

Design Language Xi." International Conference on Computer Design, pp. 652-655. 1983. [GAJ 84] D. D. Gajski and J. J. Bozek. "ARSENIC: Methodology and...Report R-1015 UIUL-ENG 84-2209. August 1984. [LUR 84] C. Lursinsap and D. Gajski , "Cell Compilation with Constraints." Proceedings of the 21st Design

Method for producing a hybridization of detector array and integrated circuit for readout

NASA Technical Reports Server (NTRS)

Fossum, Eric R. (Inventor); Grunthaner, Frank J. (Inventor)

1993-01-01

A process is explained for fabricating a detector array in a layer of semiconductor material on one substrate and an integrated readout circuit in a layer of semiconductor material on a separate substrate in order to select semiconductor material for optimum performance of each structure, such as GaAs for the detector array and Si for the integrated readout circuit. The detector array layer is lifted off its substrate, laminated on the metallized surface on the integrated surface, etched with reticulating channels to the surface of the integrated circuit, and provided with interconnections between the detector array pixels and the integrated readout circuit through the channels. The adhesive material for the lamination is selected to be chemically stable to provide electrical and thermal insulation and to provide stress release between the two structures fabricated in semiconductor materials that may have different coefficients of thermal expansion.

Energy-efficient neuron, synapse and STDP integrated circuits.

PubMed

Cruz-Albrecht, Jose M; Yung, Michael W; Srinivasa, Narayan

2012-06-01

Ultra-low energy biologically-inspired neuron and synapse integrated circuits are presented. The synapse includes a spike timing dependent plasticity (STDP) learning rule circuit. These circuits have been designed, fabricated and tested using a 90 nm CMOS process. Experimental measurements demonstrate proper operation. The neuron and the synapse with STDP circuits have an energy consumption of around 0.4 pJ per spike and synaptic operation respectively.

Miniaturized ultrasound imaging probes enabled by CMUT arrays with integrated frontend electronic circuits.

PubMed

Khuri-Yakub, B T; Oralkan, Omer; Nikoozadeh, Amin; Wygant, Ira O; Zhuang, Steve; Gencel, Mustafa; Choe, Jung Woo; Stephens, Douglas N; de la Rama, Alan; Chen, Peter; Lin, Feng; Dentinger, Aaron; Wildes, Douglas; Thomenius, Kai; Shivkumar, Kalyanam; Mahajan, Aman; Seo, Chi Hyung; O'Donnell, Matthew; Truong, Uyen; Sahn, David J

2010-01-01

Capacitive micromachined ultrasonic transducer (CMUT) arrays are conveniently integrated with frontend integrated circuits either monolithically or in a hybrid multichip form. This integration helps with reducing the number of active data processing channels for 2D arrays. This approach also preserves the signal integrity for arrays with small elements. Therefore CMUT arrays integrated with electronic circuits are most suitable to implement miniaturized probes required for many intravascular, intracardiac, and endoscopic applications. This paper presents examples of miniaturized CMUT probes utilizing 1D, 2D, and ring arrays with integrated electronics.

An integrated modelling framework for neural circuits with multiple neuromodulators.

PubMed

Joshi, Alok; Youssofzadeh, Vahab; Vemana, Vinith; McGinnity, T M; Prasad, Girijesh; Wong-Lin, KongFatt

2017-01-01

Neuromodulators are endogenous neurochemicals that regulate biophysical and biochemical processes, which control brain function and behaviour, and are often the targets of neuropharmacological drugs. Neuromodulator effects are generally complex partly owing to the involvement of broad innervation, co-release of neuromodulators, complex intra- and extrasynaptic mechanism, existence of multiple receptor subtypes and high interconnectivity within the brain. In this work, we propose an efficient yet sufficiently realistic computational neural modelling framework to study some of these complex behaviours. Specifically, we propose a novel dynamical neural circuit model that integrates the effective neuromodulator-induced currents based on various experimental data (e.g. electrophysiology, neuropharmacology and voltammetry). The model can incorporate multiple interacting brain regions, including neuromodulator sources, simulate efficiently and easily extendable to large-scale brain models, e.g. for neuroimaging purposes. As an example, we model a network of mutually interacting neural populations in the lateral hypothalamus, dorsal raphe nucleus and locus coeruleus, which are major sources of neuromodulator orexin/hypocretin, serotonin and norepinephrine/noradrenaline, respectively, and which play significant roles in regulating many physiological functions. We demonstrate that such a model can provide predictions of systemic drug effects of the popular antidepressants (e.g. reuptake inhibitors), neuromodulator antagonists or their combinations. Finally, we developed user-friendly graphical user interface software for model simulation and visualization for both fundamental sciences and pharmacological studies. © 2017 The Authors.

An integrated modelling framework for neural circuits with multiple neuromodulators

PubMed Central

Vemana, Vinith

2017-01-01

Neuromodulators are endogenous neurochemicals that regulate biophysical and biochemical processes, which control brain function and behaviour, and are often the targets of neuropharmacological drugs. Neuromodulator effects are generally complex partly owing to the involvement of broad innervation, co-release of neuromodulators, complex intra- and extrasynaptic mechanism, existence of multiple receptor subtypes and high interconnectivity within the brain. In this work, we propose an efficient yet sufficiently realistic computational neural modelling framework to study some of these complex behaviours. Specifically, we propose a novel dynamical neural circuit model that integrates the effective neuromodulator-induced currents based on various experimental data (e.g. electrophysiology, neuropharmacology and voltammetry). The model can incorporate multiple interacting brain regions, including neuromodulator sources, simulate efficiently and easily extendable to large-scale brain models, e.g. for neuroimaging purposes. As an example, we model a network of mutually interacting neural populations in the lateral hypothalamus, dorsal raphe nucleus and locus coeruleus, which are major sources of neuromodulator orexin/hypocretin, serotonin and norepinephrine/noradrenaline, respectively, and which play significant roles in regulating many physiological functions. We demonstrate that such a model can provide predictions of systemic drug effects of the popular antidepressants (e.g. reuptake inhibitors), neuromodulator antagonists or their combinations. Finally, we developed user-friendly graphical user interface software for model simulation and visualization for both fundamental sciences and pharmacological studies. PMID:28100828

75 FR 24742 - In the Matter of Certain Large Scale Integrated Circuit Semiconductor Chips and Products...

Federal Register 2010, 2011, 2012, 2013, 2014

2010-05-05

... Integrated Circuit Semiconductor Chips and Products Containing Same; Notice of Investigation AGENCY: U.S... of certain large scale integrated circuit semiconductor chips and products containing same by reason... alleges that an industry in the United States exists as required by subsection (a)(2) of section 337. The...

75 FR 5804 - In the Matter of: Certain Semiconductor Integrated Circuits and Products Containing Same; Notice...

Federal Register 2010, 2011, 2012, 2013, 2014

2010-02-04

... Semiconductor Integrated Circuits and Products Containing Same; Notice of Commission Determination To Review in... importation of certain semiconductor integrated circuits and products containing same by reason of... that there exists a domestic industry with respect to each of the asserted patents. The complaint named...

Carbon nanotube-based three-dimensional monolithic optoelectronic integrated system

NASA Astrophysics Data System (ADS)

Liu, Yang; Wang, Sheng; Liu, Huaping; Peng, Lian-Mao

2017-06-01

Single material-based monolithic optoelectronic integration with complementary metal oxide semiconductor-compatible signal processing circuits is one of the most pursued approaches in the post-Moore era to realize rapid data communication and functional diversification in a limited three-dimensional space. Here, we report an electrically driven carbon nanotube-based on-chip three-dimensional optoelectronic integrated circuit. We demonstrate that photovoltaic receivers, electrically driven transmitters and on-chip electronic circuits can all be fabricated using carbon nanotubes via a complementary metal oxide semiconductor-compatible low-temperature process, providing a seamless integration platform for realizing monolithic three-dimensional optoelectronic integrated circuits with diversified functionality such as the heterogeneous AND gates. These circuits can be vertically scaled down to sub-30 nm and operates in photovoltaic mode at room temperature. Parallel optical communication between functional layers, for example, bottom-layer digital circuits and top-layer memory, has been demonstrated by mapping data using a 2 × 2 transmitter/receiver array, which could be extended as the next generation energy-efficient signal processing paradigm.

Computer-aided engineering of semiconductor integrated circuits

NASA Astrophysics Data System (ADS)

Meindl, J. D.; Dutton, R. W.; Gibbons, J. F.; Helms, C. R.; Plummer, J. D.; Tiller, W. A.; Ho, C. P.; Saraswat, K. C.; Deal, B. E.; Kamins, T. I.

1980-07-01

Economical procurement of small quantities of high performance custom integrated circuits for military systems is impeded by inadequate process, device and circuit models that handicap low cost computer aided design. The principal objective of this program is to formulate physical models of fabrication processes, devices and circuits to allow total computer-aided design of custom large-scale integrated circuits. The basic areas under investigation are (1) thermal oxidation, (2) ion implantation and diffusion, (3) chemical vapor deposition of silicon and refractory metal silicides, (4) device simulation and analytic measurements. This report discusses the fourth year of the program.

Multichannel, Active Low-Pass Filters

NASA Technical Reports Server (NTRS)

Lev, James J.

1989-01-01

Multichannel integrated circuits cascaded to obtain matched characteristics. Gain and phase characteristics of channels of multichannel, multistage, active, low-pass filter matched by making filter of cascaded multichannel integrated-circuit operational amplifiers. Concept takes advantage of inherent equality of electrical characteristics of nominally-identical circuit elements made on same integrated-circuit chip. Characteristics of channels vary identically with changes in temperature. If additional matched channels needed, chips containing more than two operational amplifiers apiece (e.g., commercial quad operational amplifliers) used. Concept applicable to variety of equipment requiring matched gain and phase in multiple channels - radar, test instruments, communication circuits, and equipment for electronic countermeasures.

Integration of functional myotubes with a Bio-MEMS device for non-invasive interrogation.

PubMed

Wilson, Kerry; Molnar, Peter; Hickman, James

2007-07-01

We have developed a biological micro-electromechanical system (Bio-MEMS) device consisting of surface-modified microfabricated silicon cantilevers and an AFM detection apparatus for the study of cultured myotubes. With this system we are able to selectively stimulate the myotubes as well as report on a variety of physiological properties of the myotubes in real time and in a high-throughput manner. This system will serve as the foundation for future work integrating multiple tissue types for the creation of Bio-MEMS analogues of complex tissues and biological circuits.

Reusable vibration resistant integrated circuit mounting socket

DOE Office of Scientific and Technical Information (OSTI.GOV)

Evans, C.N.

1993-12-31

This invention discloses a novel form of socket for integrated circuits to be mounted on printed circuit boards. The socket uses a novel contact which is fabricated out of a bimetallic strip with a shape which makes the end of the strip move laterally as temperature changes. The end of the strip forms a barb which digs into an integrated circuit lead at normal temperatures and hold it firmly in the contact, preventing loosening and open circuits from vibration. By cooling the contact containing the bimetallic strip the barb end can be made to release so that the integrated circuitmore » lead can be removed from the socket without damage either to the lead or to the socket components.« less

Reusable vibration resistant integrated circuit mounting socket

DOE Office of Scientific and Technical Information (OSTI.GOV)

Evans, C.N.

1995-08-29

This invention discloses a novel form of socket for integrated circuits to be mounted on printed circuit boards. The socket uses a novel contact which is fabricated out of a bimetallic strip with a shape which makes the end of the strip move laterally as temperature changes. The end of the strip forms a barb which digs into an integrated circuit lead at normal temperatures and holds it firmly in the contact, preventing loosening and open circuits from vibration. By cooling the contact containing the bimetallic strip the barb end can be made to release so that the integrated circuitmore » lead can be removed from the socket without damage either to the lead or to the socket components. 11 figs.« less

Organic integrated circuits for information storage based on ambipolar polymers and charge injection engineering

NASA Astrophysics Data System (ADS)

Dell'Erba, Giorgio; Luzio, Alessandro; Natali, Dario; Kim, Juhwan; Khim, Dongyoon; Kim, Dong-Yu; Noh, Yong-Young; Caironi, Mario

2014-04-01

Ambipolar semiconducting polymers, characterized by both high electron (μe) and hole (μh) mobility, offer the advantage of realizing complex complementary electronic circuits with a single semiconducting layer, deposited by simple coating techniques. However, to achieve complementarity, one of the two conduction paths in transistors has to be suppressed, resulting in unipolar devices. Here, we adopt charge injection engineering through a specific interlayer in order to tune injection into frontier energy orbitals of a high mobility donor-acceptor co-polymer. Starting from field-effect transistors with Au contacts, showing a p-type unbalanced behaviour with μh = 0.29 cm2/V s and μe = 0.001 cm2/V s, through the insertion of a caesium salt interlayer with optimized thickness, we obtain an n-type unbalanced transistor with μe = 0.12 cm2/V s and μh = 8 × 10-4 cm2/V s. We applied this result to the development of the basic pass-transistor logic building blocks such as inverters, with high gain and good noise margin, and transmission-gates. In addition, we developed and characterized information storage circuits like D-Latches and D-Flip-Flops consisting of 16 transistors, demonstrating both their static and dynamic performances and thus the suitability of this technology for more complex circuits such as display addressing logic.

Vertically integrated, three-dimensional nanowire complementary metal-oxide-semiconductor circuits.

PubMed

Nam, SungWoo; Jiang, Xiaocheng; Xiong, Qihua; Ham, Donhee; Lieber, Charles M

2009-12-15

Three-dimensional (3D), multi-transistor-layer, integrated circuits represent an important technological pursuit promising advantages in integration density, operation speed, and power consumption compared with 2D circuits. We report fully functional, 3D integrated complementary metal-oxide-semiconductor (CMOS) circuits based on separate interconnected layers of high-mobility n-type indium arsenide (n-InAs) and p-type germanium/silicon core/shell (p-Ge/Si) nanowire (NW) field-effect transistors (FETs). The DC voltage output (V(out)) versus input (V(in)) response of vertically interconnected CMOS inverters showed sharp switching at close to the ideal value of one-half the supply voltage and, moreover, exhibited substantial DC gain of approximately 45. The gain and the rail-to-rail output switching are consistent with the large noise margin and minimal static power consumption of CMOS. Vertically interconnected, three-stage CMOS ring oscillators were also fabricated by using layer-1 InAs NW n-FETs and layer-2 Ge/Si NW p-FETs. Significantly, measurements of these circuits demonstrated stable, self-sustained oscillations with a maximum frequency of 108 MHz, which represents the highest-frequency integrated circuit based on chemically synthesized nanoscale materials. These results highlight the flexibility of bottom-up assembly of distinct nanoscale materials and suggest substantial promise for 3D integrated circuits.

Antibody-controlled actuation of DNA-based molecular circuits.

PubMed

Engelen, Wouter; Meijer, Lenny H H; Somers, Bram; de Greef, Tom F A; Merkx, Maarten

2017-02-17

DNA-based molecular circuits allow autonomous signal processing, but their actuation has relied mostly on RNA/DNA-based inputs, limiting their application in synthetic biology, biomedicine and molecular diagnostics. Here we introduce a generic method to translate the presence of an antibody into a unique DNA strand, enabling the use of antibodies as specific inputs for DNA-based molecular computing. Our approach, antibody-templated strand exchange (ATSE), uses the characteristic bivalent architecture of antibodies to promote DNA-strand exchange reactions both thermodynamically and kinetically. Detailed characterization of the ATSE reaction allowed the establishment of a comprehensive model that describes the kinetics and thermodynamics of ATSE as a function of toehold length, antibody-epitope affinity and concentration. ATSE enables the introduction of complex signal processing in antibody-based diagnostics, as demonstrated here by constructing molecular circuits for multiplex antibody detection, integration of multiple antibody inputs using logic gates and actuation of enzymes and DNAzymes for signal amplification.

Antibody-controlled actuation of DNA-based molecular circuits

NASA Astrophysics Data System (ADS)

Engelen, Wouter; Meijer, Lenny H. H.; Somers, Bram; de Greef, Tom F. A.; Merkx, Maarten

2017-02-01

DNA-based molecular circuits allow autonomous signal processing, but their actuation has relied mostly on RNA/DNA-based inputs, limiting their application in synthetic biology, biomedicine and molecular diagnostics. Here we introduce a generic method to translate the presence of an antibody into a unique DNA strand, enabling the use of antibodies as specific inputs for DNA-based molecular computing. Our approach, antibody-templated strand exchange (ATSE), uses the characteristic bivalent architecture of antibodies to promote DNA-strand exchange reactions both thermodynamically and kinetically. Detailed characterization of the ATSE reaction allowed the establishment of a comprehensive model that describes the kinetics and thermodynamics of ATSE as a function of toehold length, antibody-epitope affinity and concentration. ATSE enables the introduction of complex signal processing in antibody-based diagnostics, as demonstrated here by constructing molecular circuits for multiplex antibody detection, integration of multiple antibody inputs using logic gates and actuation of enzymes and DNAzymes for signal amplification.

Miniaturized Ultrasound Imaging Probes Enabled by CMUT Arrays with Integrated Frontend Electronic Circuits

PubMed Central

Khuri-Yakub, B. (Pierre) T.; Oralkan, Ömer; Nikoozadeh, Amin; Wygant, Ira O.; Zhuang, Steve; Gencel, Mustafa; Choe, Jung Woo; Stephens, Douglas N.; de la Rama, Alan; Chen, Peter; Lin, Feng; Dentinger, Aaron; Wildes, Douglas; Thomenius, Kai; Shivkumar, Kalyanam; Mahajan, Aman; Seo, Chi Hyung; O’Donnell, Matthew; Truong, Uyen; Sahn, David J.

2010-01-01

Capacitive micromachined ultrasonic transducer (CMUT) arrays are conveniently integrated with frontend integrated circuits either monolithically or in a hybrid multichip form. This integration helps with reducing the number of active data processing channels for 2D arrays. This approach also preserves the signal integrity for arrays with small elements. Therefore CMUT arrays integrated with electronic circuits are most suitable to implement miniaturized probes required for many intravascular, intracardiac, and endoscopic applications. This paper presents examples of miniaturized CMUT probes utilizing 1D, 2D, and ring arrays with integrated electronics. PMID:21097106

Simple photometer circuits using modular electronic components

NASA Technical Reports Server (NTRS)

Wampler, J. E.

1975-01-01

Operational and peak holding amplifiers are discussed as useful circuits for bioluminescence assays. Circuit diagrams are provided. While analog methods can give a good integration on short time scales, digital methods were found best for long term integration in bioluminescence assays. Power supplies, a general photometer circuit with ratio capability, and variations in the basic photometer design are also considered.

AIM Photonics: Tomorrow’s Technology at the Speed of Light

DTIC Science & Technology

2016-09-01

design automation companies AIM Photonics Tomorrow’s Technology at the Speed of Light Michael Liehr Defense AT&L: September-October 2010 386...in speed and complexity will increase cost, power consumption and heat too much to allow further, practical miniaturization. Light propagates...Integrated microwave photonic circuits (using light to transmit and process optical signals encoded with ana- log information at frequencies in the

Virtualization of AEGIS: A Study of the Feasibility of Applying Open Architecture Technology to the Surface Navy’s Most Complex Automated Weapon System

DTIC Science & Technology

2011-09-01

diagnostics system. Aerospace and Electronic Systems Magazine, IEEE , 9(2), 40–45. Current version released August 2002 in IEEE Xplore . doi: 10.1109...Cramming more components onto integrated circuits. Electronics, 114–117. Reprinted January 1998 in Proceedings of the IEEE , 86(1), 82–85. doi: S 0018

Pulse Detecting Genetic Circuit – A New Design Approach

PubMed Central

Inniss, Mara; Iba, Hitoshi; Way, Jeffrey C.

2016-01-01

A robust cellular counter could enable synthetic biologists to design complex circuits with diverse behaviors. The existing synthetic-biological counters, responsive to the beginning of the pulse, are sensitive to the pulse duration. Here we present a pulse detecting circuit that responds only at the falling edge of a pulse–analogous to negative edge triggered electric circuits. As biological events do not follow precise timing, use of such a pulse detector would enable the design of robust asynchronous counters which can count the completion of events. This transcription-based pulse detecting circuit depends on the interaction of two co-expressed lambdoid phage-derived proteins: the first is unstable and inhibits the regulatory activity of the second, stable protein. At the end of the pulse the unstable inhibitor protein disappears from the cell and the second protein triggers the recording of the event completion. Using stochastic simulation we showed that the proposed design can detect the completion of the pulse irrespective to the pulse duration. In our simulation we also showed that fusing the pulse detector with a phage lambda memory element we can construct a counter which can be extended to count larger numbers. The proposed design principle is a new control mechanism for synthetic biology which can be integrated in different circuits for identifying the completion of an event. PMID:27907045

Pulse Detecting Genetic Circuit - A New Design Approach.

PubMed

Noman, Nasimul; Inniss, Mara; Iba, Hitoshi; Way, Jeffrey C

2016-01-01

A robust cellular counter could enable synthetic biologists to design complex circuits with diverse behaviors. The existing synthetic-biological counters, responsive to the beginning of the pulse, are sensitive to the pulse duration. Here we present a pulse detecting circuit that responds only at the falling edge of a pulse-analogous to negative edge triggered electric circuits. As biological events do not follow precise timing, use of such a pulse detector would enable the design of robust asynchronous counters which can count the completion of events. This transcription-based pulse detecting circuit depends on the interaction of two co-expressed lambdoid phage-derived proteins: the first is unstable and inhibits the regulatory activity of the second, stable protein. At the end of the pulse the unstable inhibitor protein disappears from the cell and the second protein triggers the recording of the event completion. Using stochastic simulation we showed that the proposed design can detect the completion of the pulse irrespective to the pulse duration. In our simulation we also showed that fusing the pulse detector with a phage lambda memory element we can construct a counter which can be extended to count larger numbers. The proposed design principle is a new control mechanism for synthetic biology which can be integrated in different circuits for identifying the completion of an event.

Waveguide design, modeling, and optimization: from photonic nanodevices to integrated photonic circuits

NASA Astrophysics Data System (ADS)

Bordovsky, Michal; Catrysse, Peter; Dods, Steven; Freitas, Marcio; Klein, Jackson; Kotacka, Libor; Tzolov, Velko; Uzunov, Ivan M.; Zhang, Jiazong

2004-05-01

We present the state of the art for commercial design and simulation software in the 'front end' of photonic circuit design. One recent advance is to extend the flexibility of the software by using more than one numerical technique on the same optical circuit. There are a number of popular and proven techniques for analysis of photonic devices. Examples of these techniques include the Beam Propagation Method (BPM), the Coupled Mode Theory (CMT), and the Finite Difference Time Domain (FDTD) method. For larger photonic circuits, it may not be practical to analyze the whole circuit by any one of these methods alone, but often some smaller part of the circuit lends itself to at least one of these standard techniques. Later the whole problem can be analyzed on a unified platform. This kind of approach can enable analysis for cases that would otherwise be cumbersome, or even impossible. We demonstrate solutions for more complex structures ranging from the sub-component layout, through the entire device characterization, to the mask layout and its editing. We also present recent advances in the above well established techniques. This includes the analysis of nano-particles, metals, and non-linear materials by FDTD, photonic crystal design and analysis, and improved models for high concentration Er/Yb co-doped glass waveguide amplifiers.

Computer Simulation of Microwave Devices

NASA Technical Reports Server (NTRS)

Kory, Carol L.

1997-01-01

The accurate simulation of cold-test results including dispersion, on-axis beam interaction impedance, and attenuation of a helix traveling-wave tube (TWT) slow-wave circuit using the three-dimensional code MAFIA (Maxwell's Equations Solved by the Finite Integration Algorithm) was demonstrated for the first time. Obtaining these results is a critical step in the design of TWT's. A well-established procedure to acquire these parameters is to actually build and test a model or a scale model of the circuit. However, this procedure is time-consuming and expensive, and it limits freedom to examine new variations to the basic circuit. These limitations make the need for computational methods crucial since they can lower costs, reduce tube development time, and lessen limitations on novel designs. Computer simulation has been used to accurately obtain cold-test parameters for several slow-wave circuits. Although the helix slow-wave circuit remains the mainstay of the TWT industry because of its exceptionally wide bandwidth, until recently it has been impossible to accurately analyze a helical TWT using its exact dimensions because of the complexity of its geometrical structure. A new computer modeling technique developed at the NASA Lewis Research Center overcomes these difficulties. The MAFIA three-dimensional mesh for a C-band helix slow-wave circuit is shown.

Integrated circuits and logic operations based on single-layer MoS2.

PubMed

Radisavljevic, Branimir; Whitwick, Michael Brian; Kis, Andras

2011-12-27

Logic circuits and the ability to amplify electrical signals form the functional backbone of electronics along with the possibility to integrate multiple elements on the same chip. The miniaturization of electronic circuits is expected to reach fundamental limits in the near future. Two-dimensional materials such as single-layer MoS(2) represent the ultimate limit of miniaturization in the vertical dimension, are interesting as building blocks of low-power nanoelectronic devices, and are suitable for integration due to their planar geometry. Because they are less than 1 nm thin, 2D materials in transistors could also lead to reduced short channel effects and result in fabrication of smaller and more power-efficient transistors. Here, we report on the first integrated circuit based on a two-dimensional semiconductor MoS(2). Our integrated circuits are capable of operating as inverters, converting logical "1" into logical "0", with room-temperature voltage gain higher than 1, making them suitable for incorporation into digital circuits. We also show that electrical circuits composed of single-layer MoS(2) transistors are capable of performing the NOR logic operation, the basis from which all logical operations and full digital functionality can be deduced.

LEC GaAs for integrated circuit applications

NASA Technical Reports Server (NTRS)

Kirkpatrick, C. G.; Chen, R. T.; Homes, D. E.; Asbeck, P. M.; Elliott, K. R.; Fairman, R. D.; Oliver, J. D.

1984-01-01

Recent developments in liquid encapsulated Czochralski techniques for the growth of semiinsulating GaAs for integrated circuit applications have resulted in significant improvements in the quality and quantity of GaAs material suitable for device processing. The emergence of high performance GaAs integrated circuit technologies has accelerated the demand for high quality, large diameter semiinsulating GaAs substrates. The new device technologies, including digital integrated circuits, monolithic microwave integrated circuits and charge coupled devices have largely adopted direct ion implantation for the formation of doped layers. Ion implantation lends itself to good uniformity and reproducibility, high yield and low cost; however, this technique also places stringent demands on the quality of the semiinsulating GaAs substrates. Although significant progress was made in developing a viable planar ion implantation technology, the variability and poor quality of GaAs substrates have hindered progress in process development.

Hypothalamic Integration of Metabolic, Endocrine, and Circadian Signals in Fish: Involvement in the Control of Food Intake

PubMed Central

Delgado, María J.; Cerdá-Reverter, José M.; Soengas, José L.

2017-01-01

The regulation of food intake in fish is a complex process carried out through several different mechanisms in the central nervous system (CNS) with hypothalamus being the main regulatory center. As in mammals, a complex hypothalamic circuit including two populations of neurons: one co-expressing neuropeptide Y (NPY) and Agouti-related peptide (AgRP) and the second one population co-expressing pro-opiomelanocortin (POMC) and cocaine- and amphetamine-regulated transcript (CART) is involved in the integration of information relating to food intake control. The production and release of these peptides control food intake, and the production results from the integration of information of different nature such as levels of nutrients and hormones as well as circadian signals. The present review summarizes the knowledge and recent findings about the presence and functioning of these mechanisms in fish and their differences vs. the known mammalian model. PMID:28694769

Testing and Qualifying Linear Integrated Circuits for Radiation Degradation in Space

NASA Technical Reports Server (NTRS)

Johnston, Allan H.; Rax, Bernard G.

2006-01-01

This paper discusses mechanisms and circuit-related factors that affect the degradation of linear integrated circuits from radiation in space. For some circuits there is sufficient degradation to affect performance at total dose levels below 4 krad(Si) because the circuit design techniques require higher gain for the pnp transistors that are the most sensitive to radiation. Qualification methods are recommended that include displacement damage as well as ionization damage.

Ka-band to L-band frequency down-conversion based on III-V-on-silicon photonic integrated circuits

NASA Astrophysics Data System (ADS)

Van Gasse, K.; Wang, Z.; Uvin, S.; De Deckere, B.; Mariën, J.; Thomassen, L.; Roelkens, G.

2017-12-01

In this work, we present the design, simulation and characterization of a frequency down-converter based on III-V-on-silicon photonic integrated circuit technology. We first demonstrate the concept using commercial discrete components, after which we demonstrate frequency conversion using an integrated mode-locked laser and integrated modulator. In our experiments, five channels in the Ka-band (27.5-30 GHz) with 500 MHz bandwidth are down-converted to the L-band (1.5 GHz). The breadboard demonstration shows a conversion efficiency of - 20 dB and a flat response over the 500 MHz bandwidth. The simulation of a fully integrated circuit indicates that a positive conversion gain can be obtained on a millimeter-sized photonic integrated circuit.

Microwave GaAs Integrated Circuits On Quartz Substrates

NASA Technical Reports Server (NTRS)

Siegel, Peter H.; Mehdi, Imran; Wilson, Barbara

1994-01-01

Integrated circuits for use in detecting electromagnetic radiation at millimeter and submillimeter wavelengths constructed by bonding GaAs-based integrated circuits onto quartz-substrate-based stripline circuits. Approach offers combined advantages of high-speed semiconductor active devices made only on epitaxially deposited GaAs substrates with low-dielectric-loss, mechanically rugged quartz substrates. Other potential applications include integration of antenna elements with active devices, using carrier substrates other than quartz to meet particular requirements using lifted-off GaAs layer in membrane configuration with quartz substrate supporting edges only, and using lift-off technique to fabricate ultrathin discrete devices diced separately and inserted into predefined larger circuits. In different device concept, quartz substrate utilized as transparent support for GaAs devices excited from back side by optical radiation.

Metal contact engineering and registration-free fabrication of complementary metal-oxide semiconductor integrated circuits using aligned carbon nanotubes.

PubMed

Wang, Chuan; Ryu, Koungmin; Badmaev, Alexander; Zhang, Jialu; Zhou, Chongwu

2011-02-22

Complementary metal-oxide semiconductor (CMOS) operation is very desirable for logic circuit applications as it offers rail-to-rail swing, larger noise margin, and small static power consumption. However, it remains to be a challenging task for nanotube-based devices. Here in this paper, we report our progress on metal contact engineering for n-type nanotube transistors and CMOS integrated circuits using aligned carbon nanotubes. By using Pd as source/drain contacts for p-type transistors, small work function metal Gd as source/drain contacts for n-type transistors, and evaporated SiO(2) as a passivation layer, we have achieved n-type transistor, PN diode, and integrated CMOS inverter with an air-stable operation. Compared with other nanotube n-doping techniques, such as potassium doping, PEI doping, hydrazine doping, etc., using low work function metal contacts for n-type nanotube devices is not only air stable but also integrated circuit fabrication compatible. Moreover, our aligned nanotube platform for CMOS integrated circuits shows significant advantage over the previously reported individual nanotube platforms with respect to scalability and reproducibility and suggests a practical and realistic approach for nanotube-based CMOS integrated circuit applications.

Fully integrated wearable sensor arrays for multiplexed in situ perspiration analysis.

PubMed

Gao, Wei; Emaminejad, Sam; Nyein, Hnin Yin Yin; Challa, Samyuktha; Chen, Kevin; Peck, Austin; Fahad, Hossain M; Ota, Hiroki; Shiraki, Hiroshi; Kiriya, Daisuke; Lien, Der-Hsien; Brooks, George A; Davis, Ronald W; Javey, Ali

2016-01-28

Wearable sensor technologies are essential to the realization of personalized medicine through continuously monitoring an individual's state of health. Sampling human sweat, which is rich in physiological information, could enable non-invasive monitoring. Previously reported sweat-based and other non-invasive biosensors either can only monitor a single analyte at a time or lack on-site signal processing circuitry and sensor calibration mechanisms for accurate analysis of the physiological state. Given the complexity of sweat secretion, simultaneous and multiplexed screening of target biomarkers is critical and requires full system integration to ensure the accuracy of measurements. Here we present a mechanically flexible and fully integrated (that is, no external analysis is needed) sensor array for multiplexed in situ perspiration analysis, which simultaneously and selectively measures sweat metabolites (such as glucose and lactate) and electrolytes (such as sodium and potassium ions), as well as the skin temperature (to calibrate the response of the sensors). Our work bridges the technological gap between signal transduction, conditioning (amplification and filtering), processing and wireless transmission in wearable biosensors by merging plastic-based sensors that interface with the skin with silicon integrated circuits consolidated on a flexible circuit board for complex signal processing. This application could not have been realized using either of these technologies alone owing to their respective inherent limitations. The wearable system is used to measure the detailed sweat profile of human subjects engaged in prolonged indoor and outdoor physical activities, and to make a real-time assessment of the physiological state of the subjects. This platform enables a wide range of personalized diagnostic and physiological monitoring applications.

Fully integrated wearable sensor arrays for multiplexed in situ perspiration analysis

NASA Astrophysics Data System (ADS)

Gao, Wei; Emaminejad, Sam; Nyein, Hnin Yin Yin; Challa, Samyuktha; Chen, Kevin; Peck, Austin; Fahad, Hossain M.; Ota, Hiroki; Shiraki, Hiroshi; Kiriya, Daisuke; Lien, Der-Hsien; Brooks, George A.; Davis, Ronald W.; Javey, Ali

2016-01-01

Wearable sensor technologies are essential to the realization of personalized medicine through continuously monitoring an individual’s state of health. Sampling human sweat, which is rich in physiological information, could enable non-invasive monitoring. Previously reported sweat-based and other non-invasive biosensors either can only monitor a single analyte at a time or lack on-site signal processing circuitry and sensor calibration mechanisms for accurate analysis of the physiological state. Given the complexity of sweat secretion, simultaneous and multiplexed screening of target biomarkers is critical and requires full system integration to ensure the accuracy of measurements. Here we present a mechanically flexible and fully integrated (that is, no external analysis is needed) sensor array for multiplexed in situ perspiration analysis, which simultaneously and selectively measures sweat metabolites (such as glucose and lactate) and electrolytes (such as sodium and potassium ions), as well as the skin temperature (to calibrate the response of the sensors). Our work bridges the technological gap between signal transduction, conditioning (amplification and filtering), processing and wireless transmission in wearable biosensors by merging plastic-based sensors that interface with the skin with silicon integrated circuits consolidated on a flexible circuit board for complex signal processing. This application could not have been realized using either of these technologies alone owing to their respective inherent limitations. The wearable system is used to measure the detailed sweat profile of human subjects engaged in prolonged indoor and outdoor physical activities, and to make a real-time assessment of the physiological state of the subjects. This platform enables a wide range of personalized diagnostic and physiological monitoring applications.

Removal of Gross Air Embolization from Cardiopulmonary Bypass Circuits with Integrated Arterial Line Filters: A Comparison of Circuit Designs.

PubMed

Reagor, James A; Holt, David W

2016-03-01

Advances in technology, the desire to minimize blood product transfusions, and concerns relating to inflammatory mediators have lead many practitioners and manufacturers to minimize cardiopulmonary bypass (CBP) circuit designs. The oxygenator and arterial line filter (ALF) have been integrated into one device as a method of attaining a reduction in prime volume and surface area. The instructions for use of a currently available oxygenator with integrated ALF recommends incorporating a recirculation line distal to the oxygenator. However, according to an unscientific survey, 70% of respondents utilize CPB circuits incorporating integrated ALFs without a path of recirculation distal to the oxygenator outlet. Considering this circuit design, the ability to quickly remove a gross air bolus in the blood path distal to the oxygenator may be compromised. This in vitro study was designed to determine if the time required to remove a gross air bolus from a CPB circuit without a path of recirculation distal to the oxygenator will be significantly longer than that of a circuit with a path of recirculation distal to the oxygenator. A significant difference was found in the mean time required to remove a gross air bolus between the circuit designs (p = .0003). Additionally, There was found to be a statistically significant difference in the mean time required to remove a gross air bolus between Trial 1 and Trials 4 (p = .015) and 5 (p =.014) irrespective of the circuit design. Under the parameters of this study, a recirculation line distal to an oxygenator with an integrated ALF significantly decreases the time it takes to remove an air bolus from the CPB circuit and may be safer for clinical use than the same circuit without a recirculation line.

An innovative approach to predict technology evolution for the desoldering of printed circuit boards: A perspective from China and America.

PubMed

Wang, Chen; Zhao, Wu; Wang, Jie; Chen, Ling; Luo, Chun-Jing

2016-06-01

The printed circuit boards basis of electronic equipment have seen a rapid growth in recent years and played a significant role in modern life. Nowadays, the fact that electronic devices upgrade quickly necessitates a proper management of waste printed circuit boards. Non-destructive desoldering of waste printed circuit boards becomes the first and the most crucial step towards recycling electronic components. Owing to the diversity of materials and components, the separation process is difficult, which results in complex and expensive recovery of precious materials and electronic components from waste printed circuit boards. To cope with this problem, we proposed an innovative approach integrating Theory of Inventive Problem Solving (TRIZ) evolution theory and technology maturity mapping system to forecast the evolution trends of desoldering technology of waste printed circuit boards. This approach can be applied to analyse the technology evolution, as well as desoldering technology evolution, then research and development strategy and evolution laws can be recommended. As an example, the maturity of desoldering technology is analysed with a technology maturity mapping system model. What is more, desoldering methods in different stages are analysed and compared. According to the analysis, the technological evolution trends are predicted to be 'the law of energy conductivity' and 'increasing the degree of idealisation'. And the potential technology and evolutionary state of waste printed circuit boards are predicted, offering reference for future waste printed circuit boards recycling. © The Author(s) 2016.

Technical Reliability Studies. EOS/ESD Technology Abstracts

DTIC Science & Technology

1982-01-01

RESISTANT BIPOLAR TRANSISTOR DESIGN AND ITS APPLICATIONS TO LINEAR INTEGRATED CIRCUITS 16145 MODULE ELECTROSTATIC DISCHARGE SIMULATOR 15786 SOME...T.M. 16476 STATIC DISCHARGE MODELING TECHNIQUES FOR EVALUATION OF INTEGRATED (FET) CIRCUIT DESTRUCTION 16145 MODULE ELECTAOSTATIC DISCHARGE SIMULATOR...PLASTIC LSI CIRCUITS PRklE, L.A., II 16145 MODULE ELECTROSTATIC DISCHARGE SIMULATOR PRICE, R.D. 13455 EVALUATION OF PLASTIC LSI CIRCUITS PSHAENICH, A

Silicon millimetre-wave integrated-circuit (SIMMWIC) SPST switch

NASA Astrophysics Data System (ADS)

Stabile, P. J.; Rosen, A.

1984-10-01

The first silicon millimetre-wave integrated circuit (SIMMWIC) has been successfully fabricated. This circuit is a monolithic SPST switch with a 3 dB bandwidth of 20 percent and a minimum isolation of 21.6 dB across the band (centre frequency is 36.75 GHz). This monolithic circuit is a low-cost reproducible building block for all millimetre-wave control applications.

Demonstration of Inexact Computing Implemented in the JPEG Compression Algorithm using Probabilistic Boolean Logic applied to CMOS Components

DTIC Science & Technology

2015-12-24

Signal to Noise Ratio SPICE Simulation Program with Integrated Circuit Emphasis TIFF Tagged Image File Format USC University of Southern California xvii...sources can create errors in digital circuits. These effects can be simulated using Simulation Program with Integrated Circuit Emphasis ( SPICE ) or...compute summary statistics. 4.1 Circuit Simulations Noisy analog circuits can be simulated in SPICE or Cadence SpectreTM software via noisy voltage

A Framework for Robust Multivariable Optimization of Integrated Circuits in Space Applications

NASA Technical Reports Server (NTRS)

DuMonthier, Jeffrey; Suarez, George

2013-01-01

Application Specific Integrated Circuit (ASIC) design for space applications involves multiple challenges of maximizing performance, minimizing power and ensuring reliable operation in extreme environments. This is a complex multidimensional optimization problem which must be solved early in the development cycle of a system due to the time required for testing and qualification severely limiting opportunities to modify and iterate. Manual design techniques which generally involve simulation at one or a small number of corners with a very limited set of simultaneously variable parameters in order to make the problem tractable are inefficient and not guaranteed to achieve the best possible results within the performance envelope defined by the process and environmental requirements. What is required is a means to automate design parameter variation, allow the designer to specify operational constraints and performance goals, and to analyze the results in a way which facilitates identifying the tradeoffs defining the performance envelope over the full set of process and environmental corner cases. The system developed by the Mixed Signal ASIC Group (MSAG) at the Goddard Space Flight Center is implemented as framework of software modules, templates and function libraries. It integrates CAD tools and a mathematical computing environment, and can be customized for new circuit designs with only a modest amount of effort as most common tasks are already encapsulated. Customization is required for simulation test benches to determine performance metrics and for cost function computation. Templates provide a starting point for both while toolbox functions minimize the code required. Once a test bench has been coded to optimize a particular circuit, it is also used to verify the final design. The combination of test bench and cost function can then serve as a template for similar circuits or be re-used to migrate the design to different processes by re-running it with the new process specific device models. The system has been used in the design of time to digital converters for laser ranging and time-of-flight mass spectrometry to optimize analog, mixed signal and digital circuits such as charge sensitive amplifiers, comparators, delay elements, radiation tolerant dual interlocked (DICE) flip-flops and two of three voter gates.

Optical printed circuit board (O-PCB) and VLSI photonic integrated circuits: visions, challenges, and progresses

NASA Astrophysics Data System (ADS)

Lee, El-Hang; Lee, S. G.; O, B. H.; Park, S. G.; Noh, H. S.; Kim, K. H.; Song, S. H.

2006-09-01

A collective overview and review is presented on the original work conducted on the theory, design, fabrication, and in-tegration of micro/nano-scale optical wires and photonic devices for applications in a newly-conceived photonic systems called "optical printed circuit board" (O-PCBs) and "VLSI photonic integrated circuits" (VLSI-PIC). These are aimed for compact, high-speed, multi-functional, intelligent, light-weight, low-energy and environmentally friendly, low-cost, and high-volume applications to complement or surpass the capabilities of electrical PCBs (E-PCBs) and/or VLSI electronic integrated circuit (VLSI-IC) systems. These consist of 2-dimensional or 3-dimensional planar arrays of micro/nano-optical wires and circuits to perform the functions of all-optical sensing, storing, transporting, processing, switching, routing and distributing optical signals on flat modular boards or substrates. The integrated optical devices include micro/nano-scale waveguides, lasers, detectors, switches, sensors, directional couplers, multi-mode interference devices, ring-resonators, photonic crystal devices, plasmonic devices, and quantum devices, made of polymer, silicon and other semiconductor materials. For VLSI photonic integration, photonic crystals and plasmonic structures have been used. Scientific and technological issues concerning the processes of miniaturization, interconnection and integration of these systems as applicable to board-to-board, chip-to-chip, and intra-chip integration, are discussed along with applications for future computers, telecommunications, and sensor-systems. Visions and challenges toward these goals are also discussed.

Qualitative models and experimental investigation of chaotic NOR gates and set/reset flip-flops

NASA Astrophysics Data System (ADS)

Rahman, Aminur; Jordan, Ian; Blackmore, Denis

2018-01-01

It has been observed through experiments and SPICE simulations that logical circuits based upon Chua's circuit exhibit complex dynamical behaviour. This behaviour can be used to design analogues of more complex logic families and some properties can be exploited for electronics applications. Some of these circuits have been modelled as systems of ordinary differential equations. However, as the number of components in newer circuits increases so does the complexity. This renders continuous dynamical systems models impractical and necessitates new modelling techniques. In recent years, some discrete dynamical models have been developed using various simplifying assumptions. To create a robust modelling framework for chaotic logical circuits, we developed both deterministic and stochastic discrete dynamical models, which exploit the natural recurrence behaviour, for two chaotic NOR gates and a chaotic set/reset flip-flop. This work presents a complete applied mathematical investigation of logical circuits. Experiments on our own designs of the above circuits are modelled and the models are rigorously analysed and simulated showing surprisingly close qualitative agreement with the experiments. Furthermore, the models are designed to accommodate dynamics of similarly designed circuits. This will allow researchers to develop ever more complex chaotic logical circuits with a simple modelling framework.

A novel prediction method about single components of analog circuits based on complex field modeling.

PubMed

Zhou, Jingyu; Tian, Shulin; Yang, Chenglin

2014-01-01

Few researches pay attention to prediction about analog circuits. The few methods lack the correlation with circuit analysis during extracting and calculating features so that FI (fault indicator) calculation often lack rationality, thus affecting prognostic performance. To solve the above problem, this paper proposes a novel prediction method about single components of analog circuits based on complex field modeling. Aiming at the feature that faults of single components hold the largest number in analog circuits, the method starts with circuit structure, analyzes transfer function of circuits, and implements complex field modeling. Then, by an established parameter scanning model related to complex field, it analyzes the relationship between parameter variation and degeneration of single components in the model in order to obtain a more reasonable FI feature set via calculation. According to the obtained FI feature set, it establishes a novel model about degeneration trend of analog circuits' single components. At last, it uses particle filter (PF) to update parameters for the model and predicts remaining useful performance (RUP) of analog circuits' single components. Since calculation about the FI feature set is more reasonable, accuracy of prediction is improved to some extent. Finally, the foregoing conclusions are verified by experiments.

Qualitative models and experimental investigation of chaotic NOR gates and set/reset flip-flops.

PubMed

Rahman, Aminur; Jordan, Ian; Blackmore, Denis

2018-01-01

It has been observed through experiments and SPICE simulations that logical circuits based upon Chua's circuit exhibit complex dynamical behaviour. This behaviour can be used to design analogues of more complex logic families and some properties can be exploited for electronics applications. Some of these circuits have been modelled as systems of ordinary differential equations. However, as the number of components in newer circuits increases so does the complexity. This renders continuous dynamical systems models impractical and necessitates new modelling techniques. In recent years, some discrete dynamical models have been developed using various simplifying assumptions. To create a robust modelling framework for chaotic logical circuits, we developed both deterministic and stochastic discrete dynamical models, which exploit the natural recurrence behaviour, for two chaotic NOR gates and a chaotic set/reset flip-flop. This work presents a complete applied mathematical investigation of logical circuits. Experiments on our own designs of the above circuits are modelled and the models are rigorously analysed and simulated showing surprisingly close qualitative agreement with the experiments. Furthermore, the models are designed to accommodate dynamics of similarly designed circuits. This will allow researchers to develop ever more complex chaotic logical circuits with a simple modelling framework.

Integrated testing system FiTest for diagnosis of PCBA

NASA Astrophysics Data System (ADS)

Bogdan, Arkadiusz; Lesniak, Adam

2016-12-01

This article presents the innovative integrated testing system FiTest for automatic, quick inspection of printed circuit board assemblies (PCBA) manufactured in Surface Mount Technology (SMT). Integration of Automatic Optical Inspection (AOI), In-Circuit Tests (ICT) and Functional Circuit Tests (FCT) resulted in universal hardware platform for testing variety of electronic circuits. The platform provides increased test coverage, decreased level of false calls and optimization of test duration. The platform is equipped with powerful algorithms performing tests in a stable and repetitive way and providing effective management of diagnosis.

International Conference on Integrated Optical Circuit Engineering, 1st, Cambridge, MA, October 23-25, 1984, Proceedings

NASA Astrophysics Data System (ADS)

Ostrowsky, D. B.; Sriram, S.

Aspects of waveguide technology are explored, taking into account waveguide fabrication techniques in GaAs/GaAlAs, the design and fabrication of AlGaAs/GaAs phase couplers for optical integrated circuit applications, ion implanted GaAs integrated optics fabrication technology, a direct writing electron beam lithography based process for the realization of optoelectronic integrated circuits, and advances in the development of semiconductor integrated optical circuits for telecommunications. Other subjects examined are related to optical signal processing, optical switching, and questions of optical bistability and logic. Attention is given to acousto-optic techniques in integrated optics, acousto-optic Bragg diffraction in proton exchanged waveguides, optical threshold logic architectures for hybrid binary/residue processors, integrated optical modulation and switching, all-optic logic devices for waveguide optics, optoelectronic switching, high-speed photodetector switching, and a mechanical optical switch.

Analog integrated circuits design for processing physiological signals.

PubMed

Li, Yan; Poon, Carmen C Y; Zhang, Yuan-Ting

2010-01-01

Analog integrated circuits (ICs) designed for processing physiological signals are important building blocks of wearable and implantable medical devices used for health monitoring or restoring lost body functions. Due to the nature of physiological signals and the corresponding application scenarios, the ICs designed for these applications should have low power consumption, low cutoff frequency, and low input-referred noise. In this paper, techniques for designing the analog front-end circuits with these three characteristics will be reviewed, including subthreshold circuits, bulk-driven MOSFETs, floating gate MOSFETs, and log-domain circuits to reduce power consumption; methods for designing fully integrated low cutoff frequency circuits; as well as chopper stabilization (CHS) and other techniques that can be used to achieve a high signal-to-noise performance. Novel applications using these techniques will also be discussed.

MOS Circuitry Would Detect Low-Energy Charged Particles

NASA Technical Reports Server (NTRS)

Sinha, Mahadeva; Wadsworth, Mark

2003-01-01

Metal oxide semiconductor (MOS) circuits for measuring spatially varying intensities of beams of low-energy charged particles have been developed. These circuits are intended especially for use in measuring fluxes of ions with spatial resolution along the focal planes of mass spectrometers. Unlike prior mass spectrometer focal-plane detectors, these MOS circuits would not be based on ion-induced generation of electrons, and photons; instead, they would be based on direct detection of the electric charges of the ions. Hence, there would be no need for microchannel plates (for ion-to-electron conversion), phosphors (for electron-to-photon conversion), and photodetectors (for final detection) -- components that degrade spatial resolution and contribute to complexity and size. The developmental circuits are based on linear arrays of charge-coupled devices (CCDs) with associated readout circuitry (see figure). They resemble linear CCD photodetector arrays, except that instead of a photodetector, each pixel contains a capacitive charge sensor. The capacitor in each sensor comprises two electrodes (typically made of aluminum) separated by a layer of insulating material. The exposed electrode captures ions and accumulates their electric charges during signal-integration periods.

High output lamp with high brightness

DOEpatents

Kirkpatrick, Douglas A.; Bass, Gary K.; Copsey, Jesse F.; Garber, Jr., William E.; Kwong, Vincent H.; Levin, Izrail; MacLennan, Donald A.; Roy, Robert J.; Steiner, Paul E.; Tsai, Peter; Turner, Brian P.

2002-01-01

An ultra bright, low wattage inductively coupled electrodeless aperture lamp is powered by a solid state RF source in the range of several tens to several hundreds of watts at various frequencies in the range of 400 to 900 MHz. Numerous novel lamp circuits and components are disclosed including a wedding ring shaped coil having one axial and one radial lead, a high accuracy capacitor stack, a high thermal conductivity aperture cup and various other aperture bulb configurations, a coaxial capacitor arrangement, and an integrated coil and capacitor assembly. Numerous novel RF circuits are also disclosed including a high power oscillator circuit with reduced complexity resonant pole configuration, parallel RF power FET transistors with soft gate switching, a continuously variable frequency tuning circuit, a six port directional coupler, an impedance switching RF source, and an RF source with controlled frequency-load characteristics. Numerous novel RF control methods are disclosed including controlled adjustment of the operating frequency to find a resonant frequency and reduce reflected RF power, controlled switching of an impedance switched lamp system, active power control and active gate bias control.

Large-scale quantum photonic circuits in silicon

NASA Astrophysics Data System (ADS)

Harris, Nicholas C.; Bunandar, Darius; Pant, Mihir; Steinbrecher, Greg R.; Mower, Jacob; Prabhu, Mihika; Baehr-Jones, Tom; Hochberg, Michael; Englund, Dirk

2016-08-01

Quantum information science offers inherently more powerful methods for communication, computation, and precision measurement that take advantage of quantum superposition and entanglement. In recent years, theoretical and experimental advances in quantum computing and simulation with photons have spurred great interest in developing large photonic entangled states that challenge today's classical computers. As experiments have increased in complexity, there has been an increasing need to transition bulk optics experiments to integrated photonics platforms to control more spatial modes with higher fidelity and phase stability. The silicon-on-insulator (SOI) nanophotonics platform offers new possibilities for quantum optics, including the integration of bright, nonclassical light sources, based on the large third-order nonlinearity (χ(3)) of silicon, alongside quantum state manipulation circuits with thousands of optical elements, all on a single phase-stable chip. How large do these photonic systems need to be? Recent theoretical work on Boson Sampling suggests that even the problem of sampling from e30 identical photons, having passed through an interferometer of hundreds of modes, becomes challenging for classical computers. While experiments of this size are still challenging, the SOI platform has the required component density to enable low-loss and programmable interferometers for manipulating hundreds of spatial modes. Here, we discuss the SOI nanophotonics platform for quantum photonic circuits with hundreds-to-thousands of optical elements and the associated challenges. We compare SOI to competing technologies in terms of requirements for quantum optical systems. We review recent results on large-scale quantum state evolution circuits and strategies for realizing high-fidelity heralded gates with imperfect, practical systems. Next, we review recent results on silicon photonics-based photon-pair sources and device architectures, and we discuss a path towards large-scale source integration. Finally, we review monolithic integration strategies for single-photon detectors and their essential role in on-chip feed forward operations.

Low-temperature crack-free Si3N4 nonlinear photonic circuits for CMOS-compatible optoelectronic co-integration

NASA Astrophysics Data System (ADS)

Casale, Marco; Kerdiles, Sebastien; Brianceau, Pierre; Hugues, Vincent; El Dirani, Houssein; Sciancalepore, Corrado

2017-02-01

In this communication, authors report for the first time on the fabrication and testing of Si3N4 non-linear photonic circuits for CMOS-compatible monolithic co-integration with silicon-based optoelectronics. In particular, a novel process has been developed to fabricate low-loss crack-free Si3N4 750-nm-thick films for Kerr-based nonlinear functions featuring full thermal budget compatibility with existing Silicon photonics and front-end Si optoelectronics. Briefly, differently from previous and state-of-the-art works, our nonlinear nitride-based platform has been realized without resorting to commonly-used high-temperature annealing ( 1200°C) of the film and its silica upper-cladding used to break N-H bonds otherwise causing absorption in the C-band and destroying its nonlinear functionality. Furthermore, no complex and fabrication-intolerant Damascene process - as recently reported earlier this year - aimed at controlling cracks generated in thick tensile-strained Si3N4 films has been used as well. Instead, a tailored Si3N4 multiple-step film deposition in 200-mm LPCVD-based reactor and subsequent low-temperature (400°C) PECVD oxide encapsulation have been used to fabricate the nonlinear micro-resonant circuits aiming at generating optical frequency combs via optical parametric oscillators (OPOs), thus allowing the monolithic co-integration of such nonlinear functions on existing CMOS-compatible optoelectronics, for both active and passive components such as, for instance, silicon modulators and wavelength (de-)multiplexers. Experimental evidence based on wafer-level statistics show nitride-based 112-μm-radius ring resonators using such low-temperature crack-free nitride film exhibiting quality factors exceeding Q >3 x 105, thus paving the way to low-threshold power-efficient Kerr-based comb sources and dissipative temporal solitons in the C-band featuring full thermal processing compatibility with Si photonic integrated circuits (Si-PICs).

Process development of beam-lead silicon-gate COS/MOS integrated circuits

NASA Technical Reports Server (NTRS)

Baptiste, B.; Boesenberg, W.

1974-01-01

Two processes for the fabrication of beam-leaded COS/MOS integrated circuits are described. The first process utilizes a composite gate dielectric of 800 A of silicon dioxide and 450 A of pyrolytically deposited A12O3 as an impurity barrier. The second process utilizes polysilicon gate metallization over which a sealing layer of 1000 A of pyrolytic Si3N4 is deposited. Three beam-lead integrated circuits have been implemented with the first process: (1) CD4000BL - three-input NOR gate; (2) CD4007BL - triple inverter; and (3) CD4013BL - dual D flip flop. An arithmetic and logic unit (ALU) integrated circuit was designed and implemented with the second process. The ALU chip allows addition with four bit accuracy. Processing details, device design and device characterization, circuit performance and life data are presented.

Complex computation in the retina

NASA Astrophysics Data System (ADS)

Deshmukh, Nikhil Rajiv

Elucidating the general principles of computation in neural circuits is a difficult problem requiring both a tractable model circuit as well as sophisticated measurement tools. This thesis advances our understanding of complex computation in the salamander retina and its underlying circuitry and furthers the development of advanced tools to enable detailed study of neural circuits. The retina provides an ideal model system for neural circuits in general because it is capable of producing complex representations of the visual scene, and both its inputs and outputs are accessible to the experimenter. Chapter 2 describes the biophysical mechanisms that give rise to the omitted stimulus response in retinal ganglion cells described in Schwartz et al., (2007) and Schwartz and Berry, (2008). The extra response to omitted flashes is generated at the input to bipolar cells, and is separable from the characteristic latency shift of the OSR apparent in ganglion cells, which must occur downstream in the circuit. Chapter 3 characterizes the nonlinearities at the first synapse of the ON pathway in response to high contrast flashes and develops a phenomenological model that captures the effect of synaptic activation and intracellular signaling dynamics on flash responses. This work is the first attempt to model the dynamics of the poorly characterized mGluR6 transduction cascade unique to ON bipolar cells, and explains the second lobe of the biphasic flash response. Complementary to the study of neural circuits, recent advances in wafer-scale photolithography have made possible new devices to measure the electrical and mechanical properties of neurons. Chapter 4 reports a novel piezoelectric sensor that facilitates the simultaneous measurement of electrical and mechanical signals in neural tissue. This technology could reveal the relationship between the electrical activity of neurons and their local mechanical environment, which is critical to the study of mechanoreceptors, neural development, and traumatic brain injury. Chapter 5 describes advances in the development, fabrication, and testing of a prototype silicon micropipette for patch clamp physiology. Nanoscale photolithography addresses some of the limitations of traditional glass patch electrodes, such as the rapid dialysis of the cell with internal solution, and provides a platform for integration of microfluidics and electronics into the device, which can enable novel experimental methodology.

The Effects of Space Radiation on Linear Integrated Circuit

NASA Technical Reports Server (NTRS)

Johnston, A.

2000-01-01

Permanent and transient effects are discussed that are induced in linear integrated circuits by space radiation. Recent developments include enhanced damage at low dose rate, increased damage from protons due to displacement effects, and transients in digital comparators that can cause circuit malfunctions.

35 GHz integrated circuit rectifying antenna with 33 percent efficiency

NASA Technical Reports Server (NTRS)

Yoo, T.-W.; Chang, K.

1991-01-01

A 35 GHz integrated circuit rectifying antenna (rectenna) has been developed using a microstrip dipole antenna and beam-lead mixer diode. Greater than 33 percent conversion efficiency has been achieved. The circuit should have applications in microwave/millimeter-wave power transmission and detection.

Dictionary-based image reconstruction for superresolution in integrated circuit imaging.

PubMed

Cilingiroglu, T Berkin; Uyar, Aydan; Tuysuzoglu, Ahmet; Karl, W Clem; Konrad, Janusz; Goldberg, Bennett B; Ünlü, M Selim

2015-06-01

Resolution improvement through signal processing techniques for integrated circuit imaging is becoming more crucial as the rapid decrease in integrated circuit dimensions continues. Although there is a significant effort to push the limits of optical resolution for backside fault analysis through the use of solid immersion lenses, higher order laser beams, and beam apodization, signal processing techniques are required for additional improvement. In this work, we propose a sparse image reconstruction framework which couples overcomplete dictionary-based representation with a physics-based forward model to improve resolution and localization accuracy in high numerical aperture confocal microscopy systems for backside optical integrated circuit analysis. The effectiveness of the framework is demonstrated on experimental data.

Pulse-firing winner-take-all networks

NASA Technical Reports Server (NTRS)

Meador, Jack L.

1991-01-01

Winner-take-all (WTA) neural networks using pulse-firing processing elements are introduced. In the pulse-firing WTA (PWTA) networks described, input and activation signal shunting is controlled by one shared lateral inhibition signal. This organization yields an O(n) area complexity that is convenient for integrated circuit implementation. Appropriately specified network parameters allow for the accurate continuous evaluation of inputs using a signal representation compatible with established pulse-firing neural network implementations.

Low loss fusion splicing of micron scale silica fibers.

PubMed

Pal, Parama; Knox, Wayne H

2008-07-21

Tapered micron-sized optical fibers may be important in the future for development of microscale integrated photonic devices. Complex photonic circuits require many devices and a robust technique for interconnection. We demonstrate splicing of four micron diameter step-index air-clad silica microfibers using a CO2 laser. We obtain splice losses lower than 0.3%. Compared with evanescent coupling of microfibers, our splices are more mechanically stable and efficient.

A microfluidic microprocessor: controlling biomimetic containers and cells using hybrid integrated circuit/microfluidic chips.

PubMed

Issadore, David; Franke, Thomas; Brown, Keith A; Westervelt, Robert M

2010-11-07

We present an integrated platform for performing biological and chemical experiments on a chip based on standard CMOS technology. We have developed a hybrid integrated circuit (IC)/microfluidic chip that can simultaneously control thousands of living cells and pL volumes of fluid, enabling a wide variety of chemical and biological tasks. Taking inspiration from cellular biology, phospholipid bilayer vesicles are used as robust picolitre containers for reagents on the chip. The hybrid chip can be programmed to trap, move, and porate individual living cells and vesicles and fuse and deform vesicles using electric fields. The IC spatially patterns electric fields in a microfluidic chamber using 128 × 256 (32,768) 11 × 11 μm(2) metal pixels, each of which can be individually driven with a radio frequency (RF) voltage. The chip's basic functions can be combined in series to perform complex biological and chemical tasks and can be performed in parallel on the chip's many pixels for high-throughput operations. The hybrid chip operates in two distinct modes, defined by the frequency of the RF voltage applied to the pixels: Voltages at MHz frequencies are used to trap, move, and deform objects using dielectrophoresis and voltages at frequencies below 1 kHz are used for electroporation and electrofusion. This work represents an important step towards miniaturizing the complex chemical and biological experiments used for diagnostics and research onto automated and inexpensive chips.

Design and implementation of a low-power SOI CMOS receiver

NASA Astrophysics Data System (ADS)

Zencir, Ertan

There is a strong demand for wireless communications in civilian and military applications, and space explorations. This work attempts to implement a low-power, high-performance fully-integrated receiver for deep space communications using Silicon on Insulator (SOI) CMOS technology. Design and implementation of a UHF low-IF receiver front-end in a 0.35-mum SOI CMOS technology are presented. Problems and challenges in implementing a highly integrated receiver at UHF are identified. Low-IF architecture, suitable for low-power design, has been adopted to mitigate the noise at the baseband. Design issues of the receiver building blocks including single-ended and differential LNA's, passive and active mixers, and variable gain/bandwidth complex filters are discussed. The receiver is designed to have a variable conversion gain of more than 100 dB with a 70 dB image rejection and a power dissipation of 45 mW from a 2.5-V supply. Design and measured performance of the LNA's, and the mixer are presented. Measurement results of RF front-end blocks including a single-ended LNA, a differential LNA, and a double-balanced mixer demonstrate the low power realizability of RF front-end circuits in SOI CMOS technology. We also report on the design and simulation of the image-rejecting complex IF filter and the full receiver circuit. Gain, noise, and linearity performance of the receiver components prove the viability of fully integrated low-power receivers in SOI CMOS technology.

An investigation for the development of an integrated optical data preprocessor. [preprocessing remote sensor outputs

NASA Technical Reports Server (NTRS)

Verber, C. M.; Kenan, R. P.; Hartman, N. F.; Chapman, C. M.

1980-01-01

A laboratory model of a 16 channel integrated optical data preprocessor was fabricated and tested in response to a need for a device to evaluate the outputs of a set of remote sensors. It does this by accepting the outputs of these sensors, in parallel, as the components of a multidimensional vector descriptive of the data and comparing this vector to one or more reference vectors which are used to classify the data set. The comparison is performed by taking the difference between the signal and reference vectors. The preprocessor is wholly integrated upon the surface of a LiNbO3 single crystal with the exceptions of the source and the detector. He-Ne laser light is coupled in and out of the waveguide by prism couplers. The integrated optical circuit consists of a titanium infused waveguide pattern, electrode structures and grating beam splitters. The waveguide and electrode patterns, by virtue of their complexity, make the vector subtraction device the most complex integrated optical structure fabricated to date.

Genetic programs constructed from layered logic gates in single cells

PubMed Central

Moon, Tae Seok; Lou, Chunbo; Tamsir, Alvin; Stanton, Brynne C.; Voigt, Christopher A.

2014-01-01

Genetic programs function to integrate environmental sensors, implement signal processing algorithms and control expression dynamics1. These programs consist of integrated genetic circuits that individually implement operations ranging from digital logic to dynamic circuits2–6, and they have been used in various cellular engineering applications, including the implementation of process control in metabolic networks and the coordination of spatial differentiation in artificial tissues. A key limitation is that the circuits are based on biochemical interactions occurring in the confined volume of the cell, so the size of programs has been limited to a few circuits1,7. Here we apply part mining and directed evolution to build a set of transcriptional AND gates in Escherichia coli. Each AND gate integrates two promoter inputs and controls one promoter output. This allows the gates to be layered by having the output promoter of an upstream circuit serve as the input promoter for a downstream circuit. Each gate consists of a transcription factor that requires a second chaperone protein to activate the output promoter. Multiple activator–chaperone pairs are identified from type III secretion pathways in different strains of bacteria. Directed evolution is applied to increase the dynamic range and orthogonality of the circuits. These gates are connected in different permutations to form programs, the largest of which is a 4-input AND gate that consists of 3 circuits that integrate 4 inducible systems, thus requiring 11 regulatory proteins. Measuring the performance of individual gates is sufficient to capture the behaviour of the complete program. Errors in the output due to delays (faults), a common problem for layered circuits, are not observed. This work demonstrates the successful layering of orthogonal logic gates, a design strategy that could enable the construction of large, integrated circuits in single cells. PMID:23041931

Development of analog watch with minute repeater

NASA Astrophysics Data System (ADS)

Okigami, Tomio; Aoyama, Shigeru; Osa, Takashi; Igarashi, Kiyotaka; Ikegami, Tomomi

A complementary metal oxide semiconductor with large scale integration was developed for an electronic minute repeater. It is equipped with the synthetic struck sound circuit to generate natural struck sound necessary for the minute repeater. This circuit consists of an envelope curve drawing circuit, frequency mixer, polyphonic mixer, and booster circuit made by using analog circuit technology. This large scale integration is a single chip microcomputer with motor drivers and input ports in addition to the synthetic struck sound circuit, and it is possible to make an electronic system of minute repeater at a very low cost in comparison with the conventional type.

The Need for Optical Means as an Alternative for Electronic Computing

NASA Technical Reports Server (NTRS)

Adbeldayem, Hossin; Frazier, Donald; Witherow, William; Paley, Steve; Penn, Benjamin; Bank, Curtis; Whitaker, Ann F. (Technical Monitor)

2001-01-01

An increasing demand for faster computers is rapidly growing to encounter the fast growing rate of Internet, space communication, and robotic industry. Unfortunately, the Very Large Scale Integration technology is approaching its fundamental limits beyond which the device will be unreliable. Optical interconnections and optical integrated circuits are strongly believed to provide the way out of the extreme limitations imposed on the growth of speed and complexity of nowadays computations by conventional electronics. This paper demonstrates two ultra-fast, all-optical logic gates and a high-density storage medium, which are essential components in building the future optical computer.

Feasibility study, software design, layout and simulation of a two-dimensional Fast Fourier Transform machine for use in optical array interferometry

NASA Technical Reports Server (NTRS)

Boriakoff, Valentin

1994-01-01

The goal of this project was the feasibility study of a particular architecture of a digital signal processing machine operating in real time which could do in a pipeline fashion the computation of the fast Fourier transform (FFT) of a time-domain sampled complex digital data stream. The particular architecture makes use of simple identical processors (called inner product processors) in a linear organization called a systolic array. Through computer simulation the new architecture to compute the FFT with systolic arrays was proved to be viable, and computed the FFT correctly and with the predicted particulars of operation. Integrated circuits to compute the operations expected of the vital node of the systolic architecture were proven feasible, and even with a 2 micron VLSI technology can execute the required operations in the required time. Actual construction of the integrated circuits was successful in one variant (fixed point) and unsuccessful in the other (floating point).

Brain/MINDS: brain-mapping project in Japan

PubMed Central

Okano, Hideyuki; Miyawaki, Atsushi; Kasai, Kiyoto

2015-01-01

There is an emerging interest in brain-mapping projects in countries across the world, including the USA, Europe, Australia and China. In 2014, Japan started a brain-mapping project called Brain Mapping by Integrated Neurotechnologies for Disease Studies (Brain/MINDS). Brain/MINDS aims to map the structure and function of neuronal circuits to ultimately understand the vast complexity of the human brain, and takes advantage of a unique non-human primate animal model, the common marmoset (Callithrix jacchus). In Brain/MINDS, the RIKEN Brain Science Institute acts as a central institute. The objectives of Brain/MINDS can be categorized into the following three major subject areas: (i) structure and functional mapping of a non-human primate brain (the marmoset brain); (ii) development of innovative neurotechnologies for brain mapping; and (iii) human brain mapping; and clinical research. Brain/MINDS researchers are highly motivated to identify the neuronal circuits responsible for the phenotype of neurological and psychiatric disorders, and to understand the development of these devastating disorders through the integration of these three subject areas. PMID:25823872

Low-Cost Manufacturing of Bioresorbable Conductors by Evaporation-Condensation-Mediated Laser Printing and Sintering of Zn Nanoparticles.

PubMed

Shou, Wan; Mahajan, Bikram K; Ludwig, Brandon; Yu, Xiaowei; Staggs, Joshua; Huang, Xian; Pan, Heng

2017-07-01

Currently, bioresorbable electronic devices are predominantly fabricated by complex and expensive vacuum-based integrated circuit (IC) processes. Here, a low-cost manufacturing approach for bioresorbable conductors on bioresorbable polymer substrates by evaporation-condensation-mediated laser printing and sintering of Zn nanoparticle is reported. Laser sintering of Zn nanoparticles has been technically difficult due to the surface oxide on nanoparticles. To circumvent the surface oxide, a novel approach is discovered to print and sinter Zn nanoparticle facilitated by evaporation-condensation in confined domains. The printing process can be performed on low-temperature substrates in ambient environment allowing easy integration on a roll-to-roll platform for economical manufacturing of bioresorbable electronics. The fabricated Zn conductors show excellent electrical conductivity (≈1.124 × 10 6 S m -1 ), mechanical durability, and water dissolvability. Successful demonstration of strain gauges confirms the potential application in various environmentally friendly sensors and circuits. © 2017 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

Neural Circuit to Integrate Opposing Motions in the Visual Field.

PubMed

Mauss, Alex S; Pankova, Katarina; Arenz, Alexander; Nern, Aljoscha; Rubin, Gerald M; Borst, Alexander

2015-07-16

When navigating in their environment, animals use visual motion cues as feedback signals that are elicited by their own motion. Such signals are provided by wide-field neurons sampling motion directions at multiple image points as the animal maneuvers. Each one of these neurons responds selectively to a specific optic flow-field representing the spatial distribution of motion vectors on the retina. Here, we describe the discovery of a group of local, inhibitory interneurons in the fruit fly Drosophila key for filtering these cues. Using anatomy, molecular characterization, activity manipulation, and physiological recordings, we demonstrate that these interneurons convey direction-selective inhibition to wide-field neurons with opposite preferred direction and provide evidence for how their connectivity enables the computation required for integrating opposing motions. Our results indicate that, rather than sharpening directional selectivity per se, these circuit elements reduce noise by eliminating non-specific responses to complex visual information. Copyright © 2015 Elsevier Inc. All rights reserved.

Total-dose radiation effects data for semiconductor devices. 1985 Supplement. Volume 2, part B

NASA Technical Reports Server (NTRS)

Martin, K. E.; Gauthier, M. K.; Coss, J. R.; Dantas, A. R. V.; Price, W. E.

1986-01-01

Steady-state, total-dose radiation test data are provided in graphic format, for use by electronic designers and other personnel using semiconductor devices in a radiation environment. The data were generated by JPL for various NASA space programs. The document is in two volumes: Volume 1 provides data on diodes, bipolar transistors, field effect transistors, and miscellaneous semiconductor types, and Volume 2 (Parts A and B) provides data on integrated circuits. The data are presented in graphic, tabular, and/or narrative format, depending on the complexity of the integrated circuit. Most tests were done steady-state 2.5-MeV electron beam. However, some radiation exposures were made with a Cobalt-60 gamma ray source, the results of which should be regarded as only an approximate measure of the radiation damage that would be incurred by an equivalent electron dose. All data were generated in support of NASA space programs by the JPL Radiation Effects and Testing Group (514).

Tunable quantum interference in a 3D integrated circuit.

PubMed

Chaboyer, Zachary; Meany, Thomas; Helt, L G; Withford, Michael J; Steel, M J

2015-04-27

Integrated photonics promises solutions to questions of stability, complexity, and size in quantum optics. Advances in tunable and non-planar integrated platforms, such as laser-inscribed photonics, continue to bring the realisation of quantum advantages in computation and metrology ever closer, perhaps most easily seen in multi-path interferometry. Here we demonstrate control of two-photon interference in a chip-scale 3D multi-path interferometer, showing a reduced periodicity and enhanced visibility compared to single photon measurements. Observed non-classical visibilities are widely tunable, and explained well by theoretical predictions based on classical measurements. With these predictions we extract Fisher information approaching a theoretical maximum. Our results open a path to quantum enhanced phase measurements.

Nanoionics-Based Switches for Radio-Frequency Applications

NASA Technical Reports Server (NTRS)

Nessel, James; Lee, Richard

2010-01-01

Nanoionics-based devices have shown promise as alternatives to microelectromechanical systems (MEMS) and semiconductor diode devices for switching radio-frequency (RF) signals in diverse systems. Examples of systems that utilize RF switches include phase shifters for electronically steerable phased-array antennas, multiplexers, cellular telephones and other radio transceivers, and other portable electronic devices. Semiconductor diode switches can operate at low potentials (about 1 to 3 V) and high speeds (switching times of the order of nanoseconds) but are characterized by significant insertion loss, high DC power consumption, low isolation, and generation of third-order harmonics and intermodulation distortion (IMD). MEMS-based switches feature low insertion loss (of the order of 0.2 dB), low DC power consumption (picowatts), high isolation (>30 dB), and low IMD, but contain moving parts, are not highly reliable, and must be operated at high actuation potentials (20 to 60 V) generated and applied by use of complex circuitry. In addition, fabrication of MEMS is complex, involving many processing steps. Nanoionics-based switches offer the superior RF performance and low power consumption of MEMS switches, without need for the high potentials and complex circuitry necessary for operation of MEMS switches. At the same time, nanoionics-based switches offer the high switching speed of semiconductor devices. Also, like semiconductor devices, nanoionics-based switches can be fabricated relatively inexpensively by use of conventional integrated-circuit fabrication techniques. More over, nanoionics-based switches have simple planar structures that can easily be integrated into RF power-distribution circuits.

Engineering complex nanolasers: from spaser quantum information sources to near-field anapole lasers

NASA Astrophysics Data System (ADS)

Totero Gongora, Juan Sebastian; Miroshnichenko, Andrey E.; Kivshar, Yuri S.; Fratalocchi, Andrea

2017-02-01

In this invited contribution I will review recent results of our research in the field of complex nanolasers. I will begin by discussing recent experimental results from a new type of ultra-dark nanoparticles, which behave as an ideal black-body and spontaneously produce single color pulses thanks to an equivalent Bose-Einstein Condensation of light.1 I will then discuss new quantum information sources from core-shell spaser nanoparticles.2 Finally, I will illustrate a new type of laser source that emits only in the near field, discussing applications in integrated optical circuits.

Impedance Matching Antenna-Integrated High-Efficiency Energy Harvesting Circuit

PubMed Central

Shinki, Yuharu; Shibata, Kyohei; Mansour, Mohamed

2017-01-01

This paper describes the design of a high-efficiency energy harvesting circuit with an integrated antenna. The circuit is composed of series resonance and boost rectifier circuits for converting radio frequency power into boosted direct current (DC) voltage. The measured output DC voltage is 5.67 V for an input of 100 mV at 900 MHz. Antenna input impedance matching is optimized for greater efficiency and miniaturization. The measured efficiency of this antenna-integrated energy harvester is 60% for −4.85 dBm input power and a load resistance equal to 20 kΩ at 905 MHz. PMID:28763043

Impedance Matching Antenna-Integrated High-Efficiency Energy Harvesting Circuit.

PubMed

Shinki, Yuharu; Shibata, Kyohei; Mansour, Mohamed; Kanaya, Haruichi

2017-08-01

This paper describes the design of a high-efficiency energy harvesting circuit with an integrated antenna. The circuit is composed of series resonance and boost rectifier circuits for converting radio frequency power into boosted direct current (DC) voltage. The measured output DC voltage is 5.67 V for an input of 100 mV at 900 MHz. Antenna input impedance matching is optimized for greater efficiency and miniaturization. The measured efficiency of this antenna-integrated energy harvester is 60% for -4.85 dBm input power and a load resistance equal to 20 kΩ at 905 MHz.

Nanowire nanocomputer as a finite-state machine.

PubMed

Yao, Jun; Yan, Hao; Das, Shamik; Klemic, James F; Ellenbogen, James C; Lieber, Charles M

2014-02-18

Implementation of complex computer circuits assembled from the bottom up and integrated on the nanometer scale has long been a goal of electronics research. It requires a design and fabrication strategy that can address individual nanometer-scale electronic devices, while enabling large-scale assembly of those devices into highly organized, integrated computational circuits. We describe how such a strategy has led to the design, construction, and demonstration of a nanoelectronic finite-state machine. The system was fabricated using a design-oriented approach enabled by a deterministic, bottom-up assembly process that does not require individual nanowire registration. This methodology allowed construction of the nanoelectronic finite-state machine through modular design using a multitile architecture. Each tile/module consists of two interconnected crossbar nanowire arrays, with each cross-point consisting of a programmable nanowire transistor node. The nanoelectronic finite-state machine integrates 180 programmable nanowire transistor nodes in three tiles or six total crossbar arrays, and incorporates both sequential and arithmetic logic, with extensive intertile and intratile communication that exhibits rigorous input/output matching. Our system realizes the complete 2-bit logic flow and clocked control over state registration that are required for a finite-state machine or computer. The programmable multitile circuit was also reprogrammed to a functionally distinct 2-bit full adder with 32-set matched and complete logic output. These steps forward and the ability of our unique design-oriented deterministic methodology to yield more extensive multitile systems suggest that proposed general-purpose nanocomputers can be realized in the near future.

Nanowire nanocomputer as a finite-state machine

PubMed Central

Yao, Jun; Yan, Hao; Das, Shamik; Klemic, James F.; Ellenbogen, James C.; Lieber, Charles M.

2014-01-01

Implementation of complex computer circuits assembled from the bottom up and integrated on the nanometer scale has long been a goal of electronics research. It requires a design and fabrication strategy that can address individual nanometer-scale electronic devices, while enabling large-scale assembly of those devices into highly organized, integrated computational circuits. We describe how such a strategy has led to the design, construction, and demonstration of a nanoelectronic finite-state machine. The system was fabricated using a design-oriented approach enabled by a deterministic, bottom–up assembly process that does not require individual nanowire registration. This methodology allowed construction of the nanoelectronic finite-state machine through modular design using a multitile architecture. Each tile/module consists of two interconnected crossbar nanowire arrays, with each cross-point consisting of a programmable nanowire transistor node. The nanoelectronic finite-state machine integrates 180 programmable nanowire transistor nodes in three tiles or six total crossbar arrays, and incorporates both sequential and arithmetic logic, with extensive intertile and intratile communication that exhibits rigorous input/output matching. Our system realizes the complete 2-bit logic flow and clocked control over state registration that are required for a finite-state machine or computer. The programmable multitile circuit was also reprogrammed to a functionally distinct 2-bit full adder with 32-set matched and complete logic output. These steps forward and the ability of our unique design-oriented deterministic methodology to yield more extensive multitile systems suggest that proposed general-purpose nanocomputers can be realized in the near future. PMID:24469812

Multilevel Regulation of Bacterial Gene Expression with the Combined STAR and Antisense RNA System.

PubMed

Lee, Young Je; Kim, Soo-Jung; Moon, Tae Seok

2018-03-16

Synthetic small RNA regulators have emerged as a versatile tool to predictably control bacterial gene expression. Owing to their simple design principles, small size, and highly orthogonal behavior, these engineered genetic parts have been incorporated into genetic circuits. However, efforts to achieve more sophisticated cellular functions using RNA regulators have been hindered by our limited ability to integrate different RNA regulators into complex circuits. Here, we present a combined RNA regulatory system in Escherichia coli that uses small transcription activating RNA (STAR) and antisense RNA (asRNA) to activate or deactivate target gene expression in a programmable manner. Specifically, we demonstrated that the activated target output by the STAR system can be deactivated by expressing two different types of asRNAs: one binds to and sequesters the STAR regulator, affecting the transcription process, while the other binds to the target mRNA, affecting the translation process. We improved deactivation efficiencies (up to 96%) by optimizing each type of asRNA and then integrating the two optimized asRNAs into a single circuit. Furthermore, we demonstrated that the combined STAR and asRNA system can control gene expression in a reversible way and can regulate expression of a gene in the genome. Lastly, we constructed and simultaneously tested two A AND NOT B logic gates in the same cell to show sophisticated multigene regulation by the combined system. Our approach establishes a methodology for integrating multiple RNA regulators to rationally control multiple genes.

Programmable chemical controllers made from DNA.

PubMed

Chen, Yuan-Jyue; Dalchau, Neil; Srinivas, Niranjan; Phillips, Andrew; Cardelli, Luca; Soloveichik, David; Seelig, Georg

2013-10-01

Biological organisms use complex molecular networks to navigate their environment and regulate their internal state. The development of synthetic systems with similar capabilities could lead to applications such as smart therapeutics or fabrication methods based on self-organization. To achieve this, molecular control circuits need to be engineered to perform integrated sensing, computation and actuation. Here we report a DNA-based technology for implementing the computational core of such controllers. We use the formalism of chemical reaction networks as a 'programming language' and our DNA architecture can, in principle, implement any behaviour that can be mathematically expressed as such. Unlike logic circuits, our formulation naturally allows complex signal processing of intrinsically analogue biological and chemical inputs. Controller components can be derived from biologically synthesized (plasmid) DNA, which reduces errors associated with chemically synthesized DNA. We implement several building-block reaction types and then combine them into a network that realizes, at the molecular level, an algorithm used in distributed control systems for achieving consensus between multiple agents.

Programmable chemical controllers made from DNA

NASA Astrophysics Data System (ADS)

Chen, Yuan-Jyue; Dalchau, Neil; Srinivas, Niranjan; Phillips, Andrew; Cardelli, Luca; Soloveichik, David; Seelig, Georg

2013-10-01

Biological organisms use complex molecular networks to navigate their environment and regulate their internal state. The development of synthetic systems with similar capabilities could lead to applications such as smart therapeutics or fabrication methods based on self-organization. To achieve this, molecular control circuits need to be engineered to perform integrated sensing, computation and actuation. Here we report a DNA-based technology for implementing the computational core of such controllers. We use the formalism of chemical reaction networks as a 'programming language' and our DNA architecture can, in principle, implement any behaviour that can be mathematically expressed as such. Unlike logic circuits, our formulation naturally allows complex signal processing of intrinsically analogue biological and chemical inputs. Controller components can be derived from biologically synthesized (plasmid) DNA, which reduces errors associated with chemically synthesized DNA. We implement several building-block reaction types and then combine them into a network that realizes, at the molecular level, an algorithm used in distributed control systems for achieving consensus between multiple agents.

Programmable chemical controllers made from DNA

PubMed Central

Chen, Yuan-Jyue; Dalchau, Neil; Srinivas, Niranjan; Phillips, Andrew; Cardelli, Luca; Soloveichik, David; Seelig, Georg

2014-01-01

Biological organisms use complex molecular networks to navigate their environment and regulate their internal state. The development of synthetic systems with similar capabilities could lead to applications such as smart therapeutics or fabrication methods based on self-organization. To achieve this, molecular control circuits need to be engineered to perform integrated sensing, computation and actuation. Here we report a DNA-based technology for implementing the computational core of such controllers. We use the formalism of chemical reaction networks as a 'programming language', and our DNA architecture can, in principle, implement any behaviour that can be mathematically expressed as such. Unlike logic circuits, our formulation naturally allows complex signal processing of intrinsically analogue biological and chemical inputs. Controller components can be derived from biologically synthesized (plasmid) DNA, which reduces errors associated with chemically synthesized DNA. We implement several building-block reaction types and then combine them into a network that realizes, at the molecular level, an algorithm used in distributed control systems for achieving consensus between multiple agents. PMID:24077029

Power system with an integrated lubrication circuit

DOEpatents

Hoff, Brian D [East Peoria, IL; Akasam, Sivaprasad [Peoria, IL; Algrain, Marcelo C [Peoria, IL; Johnson, Kris W [Washington, IL; Lane, William H [Chillicothe, IL

2009-11-10

A power system includes an engine having a first lubrication circuit and at least one auxiliary power unit having a second lubrication circuit. The first lubrication circuit is in fluid communication with the second lubrication circuit.

A Low-Complexity Circuit for On-Sensor Concurrent A/D Conversion and Compression

NASA Technical Reports Server (NTRS)

Leon-Salas, Walter D.; Balkir, Sina; Sayood, Khalid; Schemm, Nathan; Hoffman, Michael W.

2007-01-01

A low-complexity circuit for on-sensor compression is presented. The proposed circuit achieves complexity savings by combining a single-slope analog-to-digital converter with a Golomb-Rice entropy encoder and by implementing a low-complexity adaptation rule. The adaptation rule monitors the output codewords and minimizes their length by incrementing or decrementing the value of the Golomb-Rice coding parameter k. Its hardware implementation is one order of magnitude lower than existing adaptive algorithms. The compression circuit has been fabricated using a 0.35 micrometers CMOS technology and occupies an area of 0.0918 mm2. Test measurements confirm the validity of the design

Low-power integrated-circuit driver for ferrite-memory word lines

NASA Technical Reports Server (NTRS)

Katz, S.

1970-01-01

Composite circuit uses both n-p-n bipolar and p-channel MOS transistors /BIMOS/. The BIMOS driver provides 1/ ease of integrated circuit construction, 2/ low standby power consumption, 3/ bidirectional current pulses, and 4/ current-pulse amplitudes and rise times independent of active device parameters.

Aluminum heat sink enables power transistors to be mounted integrally with printed circuit board

NASA Technical Reports Server (NTRS)

Seaward, R. C.

1967-01-01

Power transistor is provided with an integral flat plate aluminum heat sink which mounts directly on a printed circuit board containing associated circuitry. Standoff spacers are used to attach the heat sink to the printed circuit board containing the remainder of the circuitry.

77 FR 60721 - Certain Semiconductor Integrated Circuit Devices and Products Containing Same; Notice of...

Federal Register 2010, 2011, 2012, 2013, 2014

2012-10-04

... Circuit Devices and Products Containing Same; Notice of Commission Determination Not To Review an Initial... public record for this investigation may be viewed on the Commission's electronic docket (EDIS) at http... certain semiconductor integrated circuit devices and products containing same by reason of infringement of...

Multi-lead heat sink

DOEpatents

Roose, L.D.

1984-07-03

The disclosure relates to a heat sink used to protect integrated circuits from the heat resulting from soldering them to circuit boards. A tubular housing contains a slidable member which engages somewhat inwardly extending connecting rods, each of which is rotatably attached at one end to the bottom of the housing. The other end of each rod is fastened to an expandable coil spring loop. As the member is pushed downward in the housing, its bottom edge engages and forces outward the connecting rods, thereby expanding the spring so that it will fit over an integrated circuit. After the device is in place, the member is slid upward and the spring contracts about the leads of the integrated circuit. Soldering is now conducted and the spring absorbs excess heat therefrom to protect the integrated circuit. The placement steps are repeated in reverse order to remove the heat sink for use again. 4 figs.

Multi-lead heat sink

DOEpatents

Roose, Lars D.

1984-01-01

The disclosure relates to a heat sink used to protect integrated circuits from the heat resulting from soldering them to circuit boards. A tubular housing contains a slidable member which engages somewhat inwardly extending connecting rods, each of which is rotatably attached at one end to the bottom of the housing. The other end of each rod is fastened to an expandable coil spring loop. As the member is pushed downward in the housing, its bottom edge engages and forces outward the connecting rods, thereby expanding the spring so that it will fit over an integrated circuit. After the device is in place, the member is slid upward and the spring contracts about the leads of the integrated circuit. Soldering is now conducted and the spring absorbs excess heat therefrom to protect the integrated circuit. The placement steps are repeated in reverse order to remove the heat sink for use again.

Multi-lead heat sink

DOEpatents

Roose, L.D.

1982-08-25

The disclosure relates to a heat sink used to protect integrated circuits from the heat resulting from soldering them to circuit boards. A tubular housing contains a slidable member which engages somewhat inwardly extending connecting rods, each of which is rotatably attached at one end to the bottom of the housing. The other end of each rod is fastened to an expandable coil spring loop. As the member is pushed downward in the housing, its bottom edge engages and forces outward the connecting rods, thereby expanding the spring so that it will fit over an integrated circuit. After the device is in place, the member is slid upward and the spring contracts about the leads of the integrated circuit. Soldering is now conducted and the spring absorbs excess heat therefrom to protect the integrated circuit. The placement steps are repeated in reverse order to remove the heat sink for use again.

A Novel Prediction Method about Single Components of Analog Circuits Based on Complex Field Modeling

PubMed Central

Tian, Shulin; Yang, Chenglin

2014-01-01

Few researches pay attention to prediction about analog circuits. The few methods lack the correlation with circuit analysis during extracting and calculating features so that FI (fault indicator) calculation often lack rationality, thus affecting prognostic performance. To solve the above problem, this paper proposes a novel prediction method about single components of analog circuits based on complex field modeling. Aiming at the feature that faults of single components hold the largest number in analog circuits, the method starts with circuit structure, analyzes transfer function of circuits, and implements complex field modeling. Then, by an established parameter scanning model related to complex field, it analyzes the relationship between parameter variation and degeneration of single components in the model in order to obtain a more reasonable FI feature set via calculation. According to the obtained FI feature set, it establishes a novel model about degeneration trend of analog circuits' single components. At last, it uses particle filter (PF) to update parameters for the model and predicts remaining useful performance (RUP) of analog circuits' single components. Since calculation about the FI feature set is more reasonable, accuracy of prediction is improved to some extent. Finally, the foregoing conclusions are verified by experiments. PMID:25147853

Process design kit and circuits at a 2 µm technology node for flexible wearable electronics applications (Conference Presentation)

NASA Astrophysics Data System (ADS)

Torres-Miranda, Miguel; Petritz, Andreas; Gold, Herbert; Stadlober, Barbara

2016-09-01

In this work we present our most advanced technology node of organic thin film transistors (OTFTs) manufactured with a channel length as short as 2 μm by contact photolithography and a self-alignment process directly on a plastic substrate. Our process design kit (PDK) is described with P-type transistors, capacitors and 3 metal layers for connections of complex circuits. The OTFTs are composed of a double dielectric layer with a photopatternable ultra thin polymer (PNDPE) and alumina, with a thickness on the order of 100 nm. The organic semiconductor is either Pentacene or DNTT, which have a stable average mobility up to 0.1 cm2/Vs. Finally, a polymer (e.g.: Parylene-C) is used as a passivation layer. We describe also our design rules for the placement of standard circuit cells. A "plastic wafer" is fabricated containing 49 dies. Each die of 1 cm2 has between 25 to 50 devices, proving larger scale integration in such a small space, unique in organic technologies. Finally, we present the design (by simulations using a Spice model for OTFTs) and the test of analog and digital basic circuits: amplifiers with DC gains of about 20 dB, comparators, inverters and logic gates working in the frequency range of 1-10 kHz. These standard circuit cells could be used for signal conditioning and integrated as active matrices for flexible sensors from 3rd party institutions, thus opening our fab to new ideas and sophisticated pre-industrial low cost applications for the emerging fields of biomedical devices and wearable electronics for virtual/augmented reality.

Programmable nanowire circuits for nanoprocessors.

PubMed

Yan, Hao; Choe, Hwan Sung; Nam, SungWoo; Hu, Yongjie; Das, Shamik; Klemic, James F; Ellenbogen, James C; Lieber, Charles M

2011-02-10

A nanoprocessor constructed from intrinsically nanometre-scale building blocks is an essential component for controlling memory, nanosensors and other functions proposed for nanosystems assembled from the bottom up. Important steps towards this goal over the past fifteen years include the realization of simple logic gates with individually assembled semiconductor nanowires and carbon nanotubes, but with only 16 devices or fewer and a single function for each circuit. Recently, logic circuits also have been demonstrated that use two or three elements of a one-dimensional memristor array, although such passive devices without gain are difficult to cascade. These circuits fall short of the requirements for a scalable, multifunctional nanoprocessor owing to challenges in materials, assembly and architecture on the nanoscale. Here we describe the design, fabrication and use of programmable and scalable logic tiles for nanoprocessors that surmount these hurdles. The tiles were built from programmable, non-volatile nanowire transistor arrays. Ge/Si core/shell nanowires coupled to designed dielectric shells yielded single-nanowire, non-volatile field-effect transistors (FETs) with uniform, programmable threshold voltages and the capability to drive cascaded elements. We developed an architecture to integrate the programmable nanowire FETs and define a logic tile consisting of two interconnected arrays with 496 functional configurable FET nodes in an area of ∼960 μm(2). The logic tile was programmed and operated first as a full adder with a maximal voltage gain of ten and input-output voltage matching. Then we showed that the same logic tile can be reprogrammed and used to demonstrate full-subtractor, multiplexer, demultiplexer and clocked D-latch functions. These results represent a significant advance in the complexity and functionality of nanoelectronic circuits built from the bottom up with a tiled architecture that could be cascaded to realize fully integrated nanoprocessors with computing, memory and addressing capabilities.

Inkjet printed circuits based on ambipolar and p-type carbon nanotube thin-film transistors

NASA Astrophysics Data System (ADS)

Kim, Bongjun; Geier, Michael L.; Hersam, Mark C.; Dodabalapur, Ananth

2017-02-01

Ambipolar and p-type single-walled carbon nanotube (SWCNT) thin-film transistors (TFTs) are reliably integrated into various complementary-like circuits on the same substrate by inkjet printing. We describe the fabrication and characteristics of inverters, ring oscillators, and NAND gates based on complementary-like circuits fabricated with such TFTs as building blocks. We also show that complementary-like circuits have potential use as chemical sensors in ambient conditions since changes to the TFT characteristics of the p-channel TFTs in the circuit alter the overall operating characteristics of the circuit. The use of circuits rather than individual devices as sensors integrates sensing and signal processing functions, thereby simplifying overall system design.

DOE Office of Scientific and Technical Information (OSTI.GOV)

Oler, Kiri J.; Miller, Carl H.

In this paper, we present a methodology for reverse engineering integrated circuits, including a mathematical verification of a scalable algorithm used to generate minimal finite state machine representations of integrated circuits.

Mechanosensation and Adaptive Motor Control in Insects.

PubMed

Tuthill, John C; Wilson, Rachel I

2016-10-24

The ability of animals to flexibly navigate through complex environments depends on the integration of sensory information with motor commands. The sensory modality most tightly linked to motor control is mechanosensation. Adaptive motor control depends critically on an animal's ability to respond to mechanical forces generated both within and outside the body. The compact neural circuits of insects provide appealing systems to investigate how mechanical cues guide locomotion in rugged environments. Here, we review our current understanding of mechanosensation in insects and its role in adaptive motor control. We first examine the detection and encoding of mechanical forces by primary mechanoreceptor neurons. We then discuss how central circuits integrate and transform mechanosensory information to guide locomotion. Because most studies in this field have been performed in locusts, cockroaches, crickets, and stick insects, the examples we cite here are drawn mainly from these 'big insects'. However, we also pay particular attention to the tiny fruit fly, Drosophila, where new tools are creating new opportunities, particularly for understanding central circuits. Our aim is to show how studies of big insects have yielded fundamental insights relevant to mechanosensation in all animals, and also to point out how the Drosophila toolkit can contribute to future progress in understanding mechanosensory processing. Copyright © 2016 Elsevier Ltd. All rights reserved.

Controlled initialization of superconducting π-phaseshifters and possible applications

NASA Astrophysics Data System (ADS)

Mielke, Olaf; Ortlepp, Thomas; Kunert, Juergen; Meyer, Hans-Georg; Toepfer, Hannes

2010-05-01

The rapid single-flux quantum electronics (RSFQ) is a superconducting, naturally digital circuit family which is currently close to being commercially applied. RSFQ is outstanding because of its very low switching energy resulting in very low power consumption. This advantage causes, however, a significant influence of thermal noise. For industrial applications, a certain noise immunity is required which is still a challenge, especially for circuits of higher complexity. Integrating phase-shifting elements is a new concept for further improvements concerning stability against the influence of thermal noise. We have already shown that the implementation of phase-shifting elements significantly reduces the influence of thermal noise on circuit behavior by experimentally analyzing the bit-error rate (Mielke et al 2009 IEEE Trans. Appl. Supercond. 19 621-5). Concepts which are easily implementable in standard niobium technology are especially promising. The π-phaseshifter consists of a superconducting loop which is able to store a single flux quantum. The loop current related to the stored flux creates a well-defined phase shift. To achieve the correct functionality of complex circuits it is essential to store exactly one flux quantum in each π-phaseshifter during the cooling down of the chip. Thus, for studying the feasibility of this new approach, the initialization reliability of the π-phaseshifter needs to be verified. We present an experimental investigation of this reliability to obtain a general assessment for the application of the π-phaseshifter in niobium technology. Furthermore, we compare the configuration shielded by a solid ground plane with a configuration with a ground-plane hole below the π-phaseshifter. Justified by the experimental results we suggest programmable RSFQ circuits based on π-phaseshifters. The characteristics of these devices can be influenced by a controlled initialization of the π-phaseshifter. The fabrication was performed by FLUXONICS Foundry.

High-Power, High-Frequency Si-Based (SiGe) Transistors Developed

NASA Technical Reports Server (NTRS)

Ponchak, George E.

2002-01-01

Future NASA, DOD, and commercial products will require electronic circuits that have greater functionality and versatility but occupy less space and cost less money to build and integrate than current products. System on a Chip (SOAC), a single semiconductor substrate containing circuits that perform many functions or containing an entire system, is widely recognized as the best technology for achieving low-cost, small-sized systems. Thus, a circuit technology is required that can gather, process, store, and transmit data or communications. Since silicon-integrated circuits are already used for data processing and storage and the infrastructure that supports silicon circuit fabrication is very large, it is sensible to develop communication circuits on silicon so that all the system functions can be integrated onto a single wafer. Until recently, silicon integrated circuits did not function well at the frequencies required for wireless or microwave communications, but with the introduction of small amounts of germanium into the silicon to make silicon-germanium (SiGe) transistors, silicon-based communication circuits are possible. Although microwavefrequency SiGe circuits have been demonstrated, there has been difficulty in obtaining the high power from their transistors that is required for the amplifiers of a transmitter, and many researchers have thought that this could not be done. The NASA Glenn Research Center and collaborators at the University of Michigan have developed SiGe transistors and amplifiers with state-of-the-art output power at microwave frequencies from 8 to 20 GHz. These transistors are fabricated using standard silicon processing and may be integrated with CMOS integrated circuits on a single chip. A scanning electron microscope image of a typical SiGe heterojunction bipolar transistor is shown in the preceding photomicrograph. This transistor achieved a record output power of 550 mW and an associated power-added efficiency of 33 percent at 8.4 GHz, as shown. Record performance was also demonstrated at 12.6 and 18 GHz. Developers have combined these state-of-the-art transistors with transmission lines and micromachined passive circuit components, such as inductors and capacitors, to build multistage amplifiers. Currently, a 1-W, 8.4-GHz power amplifier is being built for NASA deep space communication architectures.

Addressable-Matrix Integrated-Circuit Test Structure

NASA Technical Reports Server (NTRS)

Sayah, Hoshyar R.; Buehler, Martin G.

1991-01-01

Method of quality control based on use of row- and column-addressable test structure speeds collection of data on widths of resistor lines and coverage of steps in integrated circuits. By use of straightforward mathematical model, line widths and step coverages deduced from measurements of electrical resistances in each of various combinations of lines, steps, and bridges addressable in test structure. Intended for use in evaluating processes and equipment used in manufacture of application-specific integrated circuits.

System-Level Integrated Circuit (SLIC) development for phased array antenna applications

NASA Technical Reports Server (NTRS)

Shalkhauser, K. A.; Raquet, C. A.

1991-01-01

A microwave/millimeter wave system-level integrated circuit (SLIC) being developed for use in phased array antenna applications is described. The program goal is to design, fabricate, test, and deliver an advanced integrated circuit that merges radio frequency (RF) monolithic microwave integrated circuit (MMIC) technologies with digital, photonic, and analog circuitry that provide control, support, and interface functions. As a whole, the SLIC will offer improvements in RF device performance, uniformity, and stability while enabling accurate, rapid, repeatable control of the RF signal. Furthermore, the SLIC program addresses issues relating to insertion of solid state devices into antenna systems, such as the reduction in number of bias, control, and signal lines. Program goals, approach, and status are discussed.

System-level integrated circuit (SLIC) development for phased array antenna applications

NASA Technical Reports Server (NTRS)

Shalkhauser, K. A.; Raquet, C. A.

1991-01-01

A microwave/millimeter wave system-level integrated circuit (SLIC) being developed for use in phased array antenna applications is described. The program goal is to design, fabricate, test, and deliver an advanced integrated circuit that merges radio frequency (RF) monolithic microwave integrated circuit (MMIC) technologies with digital, photonic, and analog circuitry that provide control, support, and interface functions. As a whole, the SLIC will offer improvements in RF device performance, uniformity, and stability while enabling accurate, rapid, repeatable control of the RF signal. Furthermore, the SLIC program addresses issues relating to insertion of solid state devices into antenna systems, such as the reduction in number of bias, control, and signal lines. Program goals, approach, and status are discussed.

Free-world microelectronic manufacturing equipment

NASA Astrophysics Data System (ADS)

Kilby, J. S.; Arnold, W. H.; Booth, W. T.; Cunningham, J. A.; Hutcheson, J. D.; Owen, R. W.; Runyan, W. R.; McKenney, Barbara L.; McGrain, Moira; Taub, Renee G.

1988-12-01

Equipment is examined and evaluated for the manufacture of microelectronic integrated circuit devices and sources for that equipment within the Free World. Equipment suitable for the following are examined: single-crystal silicon slice manufacturing and processing; required lithographic processes; wafer processing; device packaging; and test of digital integrated circuits. Availability of the equipment is also discussed, now and in the near future. Very adequate equipment for most stages of the integrated circuit manufacturing process is available from several sources, in different countries, although the best and most widely used versions of most manufacturing equipment are made in the United States or Japan. There is also an active market in used equipment, suitable for manufacture of capable integrated circuits with performance somewhat short of the present state of the art.

Chemical sensors fabricated by a photonic integrated circuit foundry

NASA Astrophysics Data System (ADS)

Stievater, Todd H.; Koo, Kee; Tyndall, Nathan F.; Holmstrom, Scott A.; Kozak, Dmitry A.; Goetz, Peter G.; McGill, R. Andrew; Pruessner, Marcel W.

2018-02-01

We describe the detection of trace concentrations of chemical agents using waveguide-enhanced Raman spectroscopy in a photonic integrated circuit fabricated by AIM Photonics. The photonic integrated circuit is based on a five-centimeter long silicon nitride waveguide with a trench etched in the top cladding to allow access to the evanescent field of the propagating mode by analyte molecules. This waveguide transducer is coated with a sorbent polymer to enhance detection sensitivity and placed between low-loss edge couplers. The photonic integrated circuit is laid-out using the AIM Photonics Process Design Kit and fabricated on a Multi-Project Wafer. We detect chemical warfare agent simulants at sub parts-per-million levels in times of less than a minute. We also discuss anticipated improvements in the level of integration for photonic chemical sensors, as well as existing challenges.

Hybrid stretchable circuits on silicone substrate

DOE Office of Scientific and Technical Information (OSTI.GOV)

Robinson, A., E-mail: adam.1.robinson@nokia.com; Aziz, A., E-mail: a.aziz1@lancaster.ac.uk; Liu, Q.

When rigid and stretchable components are integrated onto a single elastic carrier substrate, large strain heterogeneities appear in the vicinity of the deformable-non-deformable interfaces. In this paper, we report on a generic approach to manufacture hybrid stretchable circuits where commercial electronic components can be mounted on a stretchable circuit board. Similar to printed circuit board development, the components are electrically bonded on the elastic substrate and interconnected with stretchable electrical traces. The substrate—a silicone matrix carrying concentric rigid disks—ensures both the circuit elasticity and the mechanical integrity of the most fragile materials.

Integrated Optoelectronic Position Sensor for Scanning Micromirrors.

PubMed

Cheng, Xiang; Sun, Xinglin; Liu, Yan; Zhu, Lijun; Zhang, Xiaoyang; Zhou, Liang; Xie, Huikai

2018-03-26

Scanning micromirrors have been used in a wide range of areas, but many of them do not have position sensing built in, which significantly limits their application space. This paper reports an integrated optoelectronic position sensor (iOE-PS) that can measure the linear displacement and tilting angle of electrothermal MEMS (Micro-electromechanical Systems) scanning mirrors. The iOE-PS integrates a laser diode and its driving circuits, a quadrant photo-detector (QPD) and its readout circuits, and a band-gap reference all on a single chip, and it has been fabricated in a standard 0.5 μm CMOS (Complementary Metal Oxide Semiconductor) process. The footprint of the iOE-PS chip is 5 mm × 5 mm. Each quadrant of the QPD has a photosensitive area of 500 µm × 500 µm and the spacing between adjacent quadrants is 500 μm. The iOE-PS chip is simply packaged underneath of an electrothermally-actuated MEMS mirror. Experimental results show that the iOE-PS has a linear response when the MEMS mirror plate moves vertically between 2.0 mm and 3.0 mm over the iOE-PS chip or scans from -5 to +5°. Such MEMS scanning mirrors integrated with the iOE-PS can greatly reduce the complexity and cost of the MEMS mirrors-enabled modules and systems.

Memristor-based cellular nonlinear/neural network: design, analysis, and applications.

PubMed

Duan, Shukai; Hu, Xiaofang; Dong, Zhekang; Wang, Lidan; Mazumder, Pinaki

2015-06-01

Cellular nonlinear/neural network (CNN) has been recognized as a powerful massively parallel architecture capable of solving complex engineering problems by performing trillions of analog operations per second. The memristor was theoretically predicted in the late seventies, but it garnered nascent research interest due to the recent much-acclaimed discovery of nanocrossbar memories by engineers at the Hewlett-Packard Laboratory. The memristor is expected to be co-integrated with nanoscale CMOS technology to revolutionize conventional von Neumann as well as neuromorphic computing. In this paper, a compact CNN model based on memristors is presented along with its performance analysis and applications. In the new CNN design, the memristor bridge circuit acts as the synaptic circuit element and substitutes the complex multiplication circuit used in traditional CNN architectures. In addition, the negative differential resistance and nonlinear current-voltage characteristics of the memristor have been leveraged to replace the linear resistor in conventional CNNs. The proposed CNN design has several merits, for example, high density, nonvolatility, and programmability of synaptic weights. The proposed memristor-based CNN design operations for implementing several image processing functions are illustrated through simulation and contrasted with conventional CNNs. Monte-Carlo simulation has been used to demonstrate the behavior of the proposed CNN due to the variations in memristor synaptic weights.

Medium-scale carbon nanotube thin-film integrated circuits on flexible plastic substrates.

PubMed

Cao, Qing; Kim, Hoon-sik; Pimparkar, Ninad; Kulkarni, Jaydeep P; Wang, Congjun; Shim, Moonsub; Roy, Kaushik; Alam, Muhammad A; Rogers, John A

2008-07-24

The ability to form integrated circuits on flexible sheets of plastic enables attributes (for example conformal and flexible formats and lightweight and shock resistant construction) in electronic devices that are difficult or impossible to achieve with technologies that use semiconductor wafers or glass plates as substrates. Organic small-molecule and polymer-based materials represent the most widely explored types of semiconductors for such flexible circuitry. Although these materials and those that use films or nanostructures of inorganics have promise for certain applications, existing demonstrations of them in circuits on plastic indicate modest performance characteristics that might restrict the application possibilities. Here we report implementations of a comparatively high-performance carbon-based semiconductor consisting of sub-monolayer, random networks of single-walled carbon nanotubes to yield small- to medium-scale integrated digital circuits, composed of up to nearly 100 transistors on plastic substrates. Transistors in these integrated circuits have excellent properties: mobilities as high as 80 cm(2) V(-1) s(-1), subthreshold slopes as low as 140 m V dec(-1), operating voltages less than 5 V together with deterministic control over the threshold voltages, on/off ratios as high as 10(5), switching speeds in the kilohertz range even for coarse (approximately 100-microm) device geometries, and good mechanical flexibility-all with levels of uniformity and reproducibility that enable high-yield fabrication of integrated circuits. Theoretical calculations, in contexts ranging from heterogeneous percolative transport through the networks to compact models for the transistors to circuit level simulations, provide quantitative and predictive understanding of these systems. Taken together, these results suggest that sub-monolayer films of single-walled carbon nanotubes are attractive materials for flexible integrated circuits, with many potential areas of application in consumer and other areas of electronics.

Advanced Packaging for VLSI/VHSIC (Very Large Scale Integrated Circuits/Very High Speed Integrated Circuits) Applications: Electrical, Thermal, and Mechanical Considerations - An IR&D Report.

DTIC Science & Technology

1987-11-01

developed that can be used by circuit engineers to extract the maximum performance from the devices on various board technologies including multilayer ceramic...Design guidelines have been developed that can be used by circuit engineers to extract the maxi- mum performance from the devices on various board...25 Attenuation and Dispersion Effects ......................................... 27 Skin Effect

Integrated-Circuit Pseudorandom-Number Generator

NASA Technical Reports Server (NTRS)

Steelman, James E.; Beasley, Jeff; Aragon, Michael; Ramirez, Francisco; Summers, Kenneth L.; Knoebel, Arthur

1992-01-01

Integrated circuit produces 8-bit pseudorandom numbers from specified probability distribution, at rate of 10 MHz. Use of Boolean logic, circuit implements pseudorandom-number-generating algorithm. Circuit includes eight 12-bit pseudorandom-number generators, outputs are uniformly distributed. 8-bit pseudorandom numbers satisfying specified nonuniform probability distribution are generated by processing uniformly distributed outputs of eight 12-bit pseudorandom-number generators through "pipeline" of D flip-flops, comparators, and memories implementing conditional probabilities on zeros and ones.

Long life assurance study for manned spacecraft long life hardware. Volume 2: Long life assurance studies of EEE parts and packaging

NASA Technical Reports Server (NTRS)

1972-01-01

Guidelines for the design, development, and fabrication of electronic components and circuits for use in spacecraft construction are presented. The subjects discussed involve quality control procedures and test methodology for the following subjects: (1) monolithic integrated circuits, (2) hybrid integrated circuits, (3) transistors, (4) diodes, (5) tantalum capacitors, (6) electromechanical relays, (7) switches and circuit breakers, and (8) electronic packaging.

Asymmetric Memory Circuit Would Resist Soft Errors

NASA Technical Reports Server (NTRS)

Buehler, Martin G.; Perlman, Marvin

1990-01-01

Some nonlinear error-correcting codes more efficient in presence of asymmetry. Combination of circuit-design and coding concepts expected to make integrated-circuit random-access memories more resistant to "soft" errors (temporary bit errors, also called "single-event upsets" due to ionizing radiation). Integrated circuit of new type made deliberately more susceptible to one kind of bit error than to other, and associated error-correcting code adapted to exploit this asymmetry in error probabilities.

Radiation damage in MOS integrated circuits, Part 1

NASA Technical Reports Server (NTRS)

Danchenko, V.

1971-01-01

Complementary and p-channel MOS integrated circuits made by four commercial manufacturers were investigated for sensitivity to radiation environment. The circuits were irradiated with 1.5 MeV electrons. The results are given for electrons and for the Co-60 gamma radiation equivalent. The data are presented in terms of shifts in the threshold potentials and changes in transconductances and leakages. Gate biases of -10V, +10V and zero volts were applied to individual MOS units during irradiation. It was found that, in most of circuits of complementary MOS technologies, noticable changes due to radiation appear first as increased leakage in n-channel MOSFETs somewhat before a total integrated dose 10 to the 12th power electrons/sg cm is reached. The inability of p-channel MOSFETs to turn on sets in at about 10 to the 13th power electrons/sq cm. Of the circuits tested, an RCA A-series circuit was the most radiation resistant sample.

Monolithic microwave integrated circuits for sensors, radar, and communications systems; Proceedings of the Meeting, Orlando, FL, Apr. 2-4, 1991

NASA Technical Reports Server (NTRS)

Leonard, Regis F. (Editor); Bhasin, Kul B. (Editor)

1991-01-01

Consideration is given to MMICs for airborne phased arrays, monolithic GaAs integrated circuit millimeter wave imaging sensors, accurate design of multiport low-noise MMICs up to 20 GHz, an ultralinear low-noise amplifier technology for space communications, variable-gain MMIC module for space applications, a high-efficiency dual-band power amplifier for radar applications, a high-density circuit approach for low-cost MMIC circuits, coplanar SIMMWIC circuits, recent advances in monolithic phased arrays, and system-level integrated circuit development for phased-array antenna applications. Consideration is also given to performance enhancement in future communications satellites with MMIC technology insertion, application of Ka-band MMIC technology for an Orbiter/ACTS communications experiment, a space-based millimeter wave debris tracking radar, low-noise high-yield octave-band feedback amplifiers to 20 GHz, quasi-optical MESFET VCOs, and a high-dynamic-range mixer using novel balun structure.

Quantum circuit dynamics via path integrals: Is there a classical action for discrete-time paths?

NASA Astrophysics Data System (ADS)

Penney, Mark D.; Enshan Koh, Dax; Spekkens, Robert W.

2017-07-01

It is straightforward to compute the transition amplitudes of a quantum circuit using the sum-over-paths methodology when the gates in the circuit are balanced, where a balanced gate is one for which all non-zero transition amplitudes are of equal magnitude. Here we consider the question of whether, for such circuits, the relative phases of different discrete-time paths through the configuration space can be defined in terms of a classical action, as they are for continuous-time paths. We show how to do so for certain kinds of quantum circuits, namely, Clifford circuits where the elementary systems are continuous-variable systems or discrete systems of odd-prime dimension. These types of circuit are distinguished by having phase-space representations that serve to define their classical counterparts. For discrete systems, the phase-space coordinates are also discrete variables. We show that for each gate in the generating set, one can associate a symplectomorphism on the phase-space and to each of these one can associate a generating function, defined on two copies of the configuration space. For discrete systems, the latter association is achieved using tools from algebraic geometry. Finally, we show that if the action functional for a discrete-time path through a sequence of gates is defined using the sum of the corresponding generating functions, then it yields the correct relative phases for the path-sum expression. These results are likely to be relevant for quantizing physical theories where time is fundamentally discrete, characterizing the classical limit of discrete-time quantum dynamics, and proving complexity results for quantum circuits.

Integrated Electrode Arrays for Neuro-Prosthetic Implants

NASA Technical Reports Server (NTRS)

Brandon, Erik; Mojarradi, Mohammede

2003-01-01

Arrays of electrodes integrated with chip-scale packages and silicon-based integrated circuits have been proposed for use as medical electronic implants, including neuro-prosthetic devices that might be implanted in brains of patients who suffer from strokes, spinal-cord injuries, or amyotrophic lateral sclerosis. The electrodes of such a device would pick up signals from neurons in the cerebral cortex, and the integrated circuit would perform acquisition and preprocessing of signal data. The output of the integrated circuit could be used to generate, for example, commands for a robotic arm. Electrode arrays capable of acquiring electrical signals from neurons already exist, but heretofore, there has been no convenient means to integrate these arrays with integrated-circuit chips. Such integration is needed in order to eliminate the need for the extensive cabling now used to pass neural signals to data-acquisition and -processing equipment outside the body. The proposed integration would enable progress toward neuro-prostheses that would be less restrictive of patients mobility. An array of electrodes would comprise a set of thin wires of suitable length and composition protruding from and supported by a fine-pitch micro-ball grid array or chip-scale package (see figure). The associated integrated circuit would be mounted on the package face opposite the probe face, using the solder bumps (the balls of the ball grid array) to make the electrical connections between the probes and the input terminals of the integrated circuit. The key innovation is the insertion of probe wires of the appropriate length and material into the solder bumps through a reflow process, thereby fixing the probes in place and electrically connecting them with the integrated circuit. The probes could be tailored to any distribution of lengths and made of any suitable metal that could be drawn into fine wires. Furthermore, the wires could be coated with an insulating layer using anodization or other processes, to achieve the correct electrical impedance. The probe wires and the packaging materials must be biocompatible using such materials as lead-free solders. For protection, the chip and package can be coated with parylene.

Silicon Carbide Integrated Circuit Chip

NASA Image and Video Library

2015-02-17

A multilevel interconnect silicon carbide integrated circuit chip with co-fired ceramic package and circuit board recently developed at the NASA GRC Smart Sensors and Electronics Systems Branch for high temperature applications. High temperature silicon carbide electronics and compatible packaging technologies are elements of instrumentation for aerospace engine control and long term inner-solar planet explorations.

Design of a front-end integrated circuit for 3D acoustic imaging using 2D CMUT arrays.

PubMed

Ciçek, Ihsan; Bozkurt, Ayhan; Karaman, Mustafa

2005-12-01

Integration of front-end electronics with 2D capacitive micromachined ultrasonic transducer (CMUT) arrays has been a challenging issue due to the small element size and large channel count. We present design and verification of a front-end drive-readout integrated circuit for 3D ultrasonic imaging using 2D CMUT arrays. The circuit cell dedicated to a single CMUT array element consists of a high-voltage pulser and a low-noise readout amplifier. To analyze the circuit cell together with the CMUT element, we developed an electrical CMUT model with parameters derived through finite element analysis, and performed both the pre- and postlayout verification. An experimental chip consisting of 4 X 4 array of the designed circuit cells, each cell occupying a 200 X 200 microm2 area, was formed for the initial test studies and scheduled for fabrication in 0.8 microm, 50 V CMOS technology. The designed circuit is suitable for integration with CMUT arrays through flip-chip bonding and the CMUT-on-CMOS process.

Synthesis of a fully-integrated digital signal source for communications from chaotic dynamics-based oscillations

NASA Astrophysics Data System (ADS)

Glenn, Chance Michael, Sr.

This work is the conceptualization, derivation, analysis, and fabrication of a fully practical digital signal source designed from a chaotic oscillator. In it we show how a simple electronic circuit based upon the Colpitts oscillator, can be made to produce highly complex signals capable of carrying digital information. We show a direct relationship between the continuous-time chaotic oscillations produced by the circuit and the logistic map, which is discrete-time, one-dimensional map that is a fundamental paradigm for the study of chaotic systems. We demonstrate the direct encoding of binary information into the oscillations of the chaotic circuit. We demonstrate a new concept in power amplification, called syncrodyne amplification , which uses fundamental properties of chaotic oscillators to provide high-efficiency, high gain amplification of standard communication waveforms as well as typical chaotic oscillations. We show modeling results of this system providing nearly 60-dB power gain and 80% PAE for communications waveforms conforming to GMSK modulation. Finally we show results from a fabricated syncrodyne amplifier circuit operating at 2 MHz, providing over 40-dB power gain and 72% PAE, and propose design criteria for an 824--850 MHz circuit utilizing heterojunction bipolar transistors (HBTs), providing the basis for microwave frequency realization.

Fully integrated wearable sensor arrays for multiplexed in situ perspiration analysis

PubMed Central

Nyein, Hnin Yin Yin; Challa, Samyuktha; Chen, Kevin; Peck, Austin; Fahad, Hossain M.; Ota, Hiroki; Shiraki, Hiroshi; Kiriya, Daisuke; Lien, Der-Hsien; Brooks, George A.; Davis, Ronald W.; Javey, Ali

2016-01-01

Wearable sensor technologies are essential to the realization of personalized medicine through continuously monitoring an individual's state of health1–12. Sampling human sweat, which is rich in physiological information13, could enable non-invasive monitoring. Previously reported sweat-based and other non-invasive biosensors either can only monitor a single analyte at a time or lack on-site signal processing circuitry and sensor calibration mechanisms for accurate analysis of the physiological state14–18. Given the complexity of sweat secretion, simultaneous and multiplexed screening of target biomarkers is critical and requires full system integration to ensure the accuracy of measurements. Here we present a mechanically flexible and fully integrated (that is, no external analysis is needed) sensor array for multiplexed in situ perspiration analysis, which simultaneously and selectively measures sweat metabolites (such as glucose and lactate) and electrolytes (such as sodium and potassium ions), as well as the skin temperature (to calibrate the response of the sensors). Our work bridges the technological gap between signal transduction, conditioning (amplification and filtering), processing and wireless transmission in wearable biosensors by merging plastic-based sensors that interface with the skin with silicon integrated circuits consolidated on a flexible circuit board for complex signal processing. This application could not have been realized using either of these technologies alone owing to their respective inherent limitations. The wearable system is used to measure the detailed sweat profile of human subjects engaged in prolonged indoor and outdoor physical activities, and to make a real-time assessment of the physiological state of the subjects. This platform enables a wide range of personalized diagnostic and physiological monitoring applications. PMID:26819044

Electric and Magnetic Interactions

NASA Astrophysics Data System (ADS)

Chabay, Ruth W.; Sherwood, Bruce A.

1994-08-01

The curriculum has been restructured so that students will have the necessary fundamental understanding of charges and fields before going on to more complex issues. Qualitative reasoning and quantitative analysis are discussed equally in order to provide a meaningful conceptual framework within which the quantitative work makes more sense. Atomic-level analysis is stressed and electrostatics and circuits are unified. Desktop experiments can be conducted at home or in the classroom and are tightly integrated with the theoretical treatment.

Three Dimensional Visualization of GOES Cloud Data Using Octress

DTIC Science & Technology

1993-06-01

structure for CAD of integrated circuits that can subdivide the cubes into more complex polyhedrons . Medical imaging is also taking advantage of the...CIGOES 501 FORMAT(A) CALL OPENDBCPARAM’, ISTATRM) IF (ISTATRM .NE. 0) CALL FRIMERRC Error opening database .’, "+ ISTATRM) CALL OLDIMAGE(1, CIGOES, STATUS...image name (no .ext):’ ACCEPT 501, CIGOES 501 FORMAT(A) CALL OPENDB(’PARAM’, ISTATRM) IF (ISTATRM .NE. 0) CALL FRIMERRC Error opening database

Integrated two-cylinder liquid piston Stirling engine

DOE Office of Scientific and Technical Information (OSTI.GOV)

Yang, Ning; Rickard, Robert; Pluckter, Kevin

2014-10-06

Heat engines utilizing the Stirling cycle may run on low temperature differentials with the capacity to function at high efficiency due to their near-reversible operation. However, current approaches to building Stirling engines are laborious and costly. Typically the components are assembled by hand and additional components require a corresponding increase in manufacturing complexity, akin to electronics before the integrated circuit. We present a simple and integrated approach to fabricating Stirling engines with precisely designed cylinders. We utilize computer aided design and one-step, planar machining to form all components of the engine. The engine utilizes liquid pistons and displacers to harnessmore » useful work from heat absorption and rejection. As a proof of principle of the integrated design, a two-cylinder engine is produced and characterized and liquid pumping is demonstrated.« less

Integrated two-cylinder liquid piston Stirling engine

NASA Astrophysics Data System (ADS)

Yang, Ning; Rickard, Robert; Pluckter, Kevin; Sulchek, Todd

2014-10-01

Heat engines utilizing the Stirling cycle may run on low temperature differentials with the capacity to function at high efficiency due to their near-reversible operation. However, current approaches to building Stirling engines are laborious and costly. Typically the components are assembled by hand and additional components require a corresponding increase in manufacturing complexity, akin to electronics before the integrated circuit. We present a simple and integrated approach to fabricating Stirling engines with precisely designed cylinders. We utilize computer aided design and one-step, planar machining to form all components of the engine. The engine utilizes liquid pistons and displacers to harness useful work from heat absorption and rejection. As a proof of principle of the integrated design, a two-cylinder engine is produced and characterized and liquid pumping is demonstrated.

Electronic Switch Arrays for Managing Microbattery Arrays

NASA Technical Reports Server (NTRS)

Mojarradi, Mohammad; Alahmad, Mahmoud; Sukumar, Vinesh; Zghoul, Fadi; Buck, Kevin; Hess, Herbert; Li, Harry; Cox, David

2008-01-01

Integrated circuits have been invented for managing the charging and discharging of such advanced miniature energy-storage devices as planar arrays of microscopic energy-storage elements [typically, microscopic electrochemical cells (microbatteries) or microcapacitors]. The architecture of these circuits enables implementation of the following energy-management options: dynamic configuration of the elements of an array into a series or parallel combination of banks (subarrarys), each array comprising a series of parallel combination of elements; direct addressing of individual banks for charging/or discharging; and, disconnection of defective elements and corresponding reconfiguration of the rest of the array to utilize the remaining functional elements to obtain the desited voltage and current performance. An integrated circuit according to the invention consists partly of a planar array of field-effect transistors that function as switches for routing electric power among the energy-storage elements, the power source, and the load. To connect the energy-storage elements to the power source for charging, a specific subset of switches is closed; to connect the energy-storage elements to the load for discharging, a different specific set of switches is closed. Also included in the integrated circuit is circuitry for monitoring and controlling charging and discharging. The control and monitoring circuitry, the switching transistors, and interconnecting metal lines are laid out on the integrated-circuit chip in a pattern that registers with the array of energy-storage elements. There is a design option to either (1) fabricate the energy-storage elements in the corresponding locations on, and as an integral part of, this integrated circuit; or (2) following a flip-chip approach, fabricate the array of energy-storage elements on a separate integrated-circuit chip and then align and bond the two chips together.

Inkjet printed circuits based on ambipolar and p-type carbon nanotube thin-film transistors

PubMed Central

Kim, Bongjun; Geier, Michael L.; Hersam, Mark C.; Dodabalapur, Ananth

2017-01-01

Ambipolar and p-type single-walled carbon nanotube (SWCNT) thin-film transistors (TFTs) are reliably integrated into various complementary-like circuits on the same substrate by inkjet printing. We describe the fabrication and characteristics of inverters, ring oscillators, and NAND gates based on complementary-like circuits fabricated with such TFTs as building blocks. We also show that complementary-like circuits have potential use as chemical sensors in ambient conditions since changes to the TFT characteristics of the p-channel TFTs in the circuit alter the overall operating characteristics of the circuit. The use of circuits rather than individual devices as sensors integrates sensing and signal processing functions, thereby simplifying overall system design. PMID:28145438

Immobilized rolling circle amplification on extended-gate field-effect transistors with integrated readout circuits for early detection of platelet-derived growth factor.

PubMed

Lin, Ming-Yu; Hsu, Wen-Yang; Yang, Yuh-Shyong; Huang, Jo-Wen; Chung, Yueh-Lin; Chen, Hsin

2016-07-01

Detection of tumor-related proteins with high specificity and sensitivity is important for early diagnosis and prognosis of cancers. While protein sensors based on antibodies are not easy to keep for a long time, aptamers (single-stranded DNA) are found to be a good alternative for recognizing tumor-related protein specifically. This study investigates the feasibility of employing aptamers to recognize the platelet-derived growth factor (PDGF) specifically and subsequently triggering rolling circle amplification (RCA) of DNAs on extended-gate field-effect transistors (EGFETs) to enhance the sensitivity. The EGFETs are fabricated by the standard CMOS technology and integrated with readout circuits monolithically. The monolithic integration not only avoids the wiring complexity for a large sensor array but also enhances the sensor reliability and facilitates massive production for commercialization. With the RCA primers immobilized on the sensory surface, the protein signal is amplified as the elongation of DNA, allowing the EGFET to achieve a sensitivity of 8.8 pM, more than three orders better than that achieved by conventional EGFETs. Moreover, the responses of EGFETs are able to indicate quantitatively the reaction rates of RCA, facilitating the estimation on the protein concentration. Our experimental results demonstrate that immobilized RCA on EGFETs is a useful, label-free method for early diagnosis of diseases related to low-concentrated tumor makers (e.g., PDGF) for serum sample, as well as for monitoring the synthesis of various DNA nanostructures in real time. Graphical Abstract The tumor-related protein, PDGF, is detected by immobilizing rolling circle amplification on an EGFET with integrated readout circuit.

Column-parallel correlated multiple sampling circuits for CMOS image sensors and their noise reduction effects.

PubMed

Suh, Sungho; Itoh, Shinya; Aoyama, Satoshi; Kawahito, Shoji

2010-01-01

For low-noise complementary metal-oxide-semiconductor (CMOS) image sensors, the reduction of pixel source follower noises is becoming very important. Column-parallel high-gain readout circuits are useful for low-noise CMOS image sensors. This paper presents column-parallel high-gain signal readout circuits, correlated multiple sampling (CMS) circuits and their noise reduction effects. In the CMS, the gain of the noise cancelling is controlled by the number of samplings. It has a similar effect to that of an amplified CDS for the thermal noise but is a little more effective for 1/f and RTS noises. Two types of the CMS with simple integration and folding integration are proposed. In the folding integration, the output signal swing is suppressed by a negative feedback using a comparator and one-bit D-to-A converter. The CMS circuit using the folding integration technique allows to realize a very low-noise level while maintaining a wide dynamic range. The noise reduction effects of their circuits have been investigated with a noise analysis and an implementation of a 1Mpixel pinned photodiode CMOS image sensor. Using 16 samplings, dynamic range of 59.4 dB and noise level of 1.9 e(-) for the simple integration CMS and 75 dB and 2.2 e(-) for the folding integration CMS, respectively, are obtained.

Computer aided design of monolithic microwave and millimeter wave integrated circuits and subsystems

NASA Astrophysics Data System (ADS)

Ku, Walter H.

1989-05-01

The objectives of this research are to develop analytical and computer aided design techniques for monolithic microwave and millimeter wave integrated circuits (MMIC and MIMIC) and subsystems and to design and fabricate those ICs. Emphasis was placed on heterojunction-based devices, especially the High Electron Mobility Transition (HEMT), for both low noise and medium power microwave and millimeter wave applications. Circuits to be considered include monolithic low noise amplifiers, power amplifiers, and distributed and feedback amplifiers. Interactive computer aided design programs were developed, which include large signal models of InP MISFETs and InGaAs HEMTs. Further, a new unconstrained optimization algorithm POSM was developed and implemented in the general Analysis and Design program for Integrated Circuit (ADIC) for assistance in the design of largesignal nonlinear circuits.

Thalamocortical and corticothalamic pathways differentially contribute to goal-directed behaviors in the rat

PubMed Central

Alcaraz, Fabien; Fresno, Virginie; Marchand, Alain R; Kremer, Eric J; Coutureau, Etienne

2018-01-01

Highly distributed neural circuits are thought to support adaptive decision-making in volatile and complex environments. Notably, the functional interactions between prefrontal and reciprocally connected thalamic nuclei areas may be important when choices are guided by current goal value or action-outcome contingency. We examined the functional involvement of selected thalamocortical and corticothalamic pathways connecting the dorsomedial prefrontal cortex (dmPFC) and the mediodorsal thalamus (MD) in the behaving rat. Using a chemogenetic approach to inhibit projection-defined dmPFC and MD neurons during an instrumental learning task, we show that thalamocortical and corticothalamic pathways differentially support goal attributes. Both pathways participate in adaptation to the current goal value, but only thalamocortical neurons are required to integrate current causal relationships. These data indicate that antiparallel flow of information within thalamocortical circuits may convey qualitatively distinct aspects of adaptive decision-making and highlight the importance of the direction of information flow within neural circuits. PMID:29405119

A CMOS Imager with Focal Plane Compression using Predictive Coding

NASA Technical Reports Server (NTRS)

Leon-Salas, Walter D.; Balkir, Sina; Sayood, Khalid; Schemm, Nathan; Hoffman, Michael W.

2007-01-01

This paper presents a CMOS image sensor with focal-plane compression. The design has a column-level architecture and it is based on predictive coding techniques for image decorrelation. The prediction operations are performed in the analog domain to avoid quantization noise and to decrease the area complexity of the circuit, The prediction residuals are quantized and encoded by a joint quantizer/coder circuit. To save area resources, the joint quantizerlcoder circuit exploits common circuitry between a single-slope analog-to-digital converter (ADC) and a Golomb-Rice entropy coder. This combination of ADC and encoder allows the integration of the entropy coder at the column level. A prototype chip was fabricated in a 0.35 pm CMOS process. The output of the chip is a compressed bit stream. The test chip occupies a silicon area of 2.60 mm x 5.96 mm which includes an 80 X 44 APS array. Tests of the fabricated chip demonstrate the validity of the design.

Intrasystem Analysis Program (IAP) code summaries

NASA Astrophysics Data System (ADS)

Dobmeier, J. J.; Drozd, A. L. S.; Surace, J. A.

1983-05-01

This report contains detailed descriptions and capabilities of the codes that comprise the Intrasystem Analysis Program. The four codes are: Intrasystem Electromagnetic Compatibility Analysis Program (IEMCAP), General Electromagnetic Model for the Analysis of Complex Systems (GEMACS), Nonlinear Circuit Analysis Program (NCAP), and Wire Coupling Prediction Models (WIRE). IEMCAP is used for computer-aided evaluation of electromagnetic compatibility (ECM) at all stages of an Air Force system's life cycle, applicable to aircraft, space/missile, and ground-based systems. GEMACS utilizes a Method of Moments (MOM) formalism with the Electric Field Integral Equation (EFIE) for the solution of electromagnetic radiation and scattering problems. The code employs both full matrix decomposition and Banded Matrix Iteration solution techniques and is expressly designed for large problems. NCAP is a circuit analysis code which uses the Volterra approach to solve for the transfer functions and node voltage of weakly nonlinear circuits. The Wire Programs deal with the Application of Multiconductor Transmission Line Theory to the Prediction of Cable Coupling for specific classes of problems.

Development, Integration and Testing of Automated Triggering Circuit for Hybrid DC Circuit Breaker

NASA Astrophysics Data System (ADS)

Kanabar, Deven; Roy, Swati; Dodiya, Chiragkumar; Pradhan, Subrata

2017-04-01

A novel concept of Hybrid DC circuit breaker having combination of mechanical switch and static switch provides arc-less current commutation into the dump resistor during quench in superconducting magnet operation. The triggering of mechanical and static switches in Hybrid DC breaker can be automatized which can effectively reduce the overall current commutation time of hybrid DC circuit breaker and make the operation independent of opening time of mechanical switch. With this view, a dedicated control circuit (auto-triggering circuit) has been developed which can decide the timing and pulse duration for mechanical switch as well as static switch from the operating parameters. This circuit has been tested with dummy parameters and thereafter integrated with the actual test set up of hybrid DC circuit breaker. This paper deals with the conceptual design of the auto-triggering circuit, its control logic and operation. The test results of Hybrid DC circuit breaker using this circuit have also been discussed.

Hybrid integrated biological-solid-state system powered with adenosine triphosphate.

PubMed

Roseman, Jared M; Lin, Jianxun; Ramakrishnan, Siddharth; Rosenstein, Jacob K; Shepard, Kenneth L

2015-12-07

There is enormous potential in combining the capabilities of the biological and the solid state to create hybrid engineered systems. While there have been recent efforts to harness power from naturally occurring potentials in living systems in plants and animals to power complementary metal-oxide-semiconductor integrated circuits, here we report the first successful effort to isolate the energetics of an electrogenic ion pump in an engineered in vitro environment to power such an artificial system. An integrated circuit is powered by adenosine triphosphate through the action of Na(+)/K(+) adenosine triphosphatases in an integrated in vitro lipid bilayer membrane. The ion pumps (active in the membrane at numbers exceeding 2 × 10(6) mm(-2)) are able to sustain a short-circuit current of 32.6 pA mm(-2) and an open-circuit voltage of 78 mV, providing for a maximum power transfer of 1.27 pW mm(-2) from a single bilayer. Two series-stacked bilayers provide a voltage sufficient to operate an integrated circuit with a conversion efficiency of chemical to electrical energy of 14.9%.

The Capabilities of Chaos and Complexity

PubMed Central

Abel, David L.

2009-01-01

To what degree could chaos and complexity have organized a Peptide or RNA World of crude yet necessarily integrated protometabolism? How far could such protolife evolve in the absence of a heritable linear digital symbol system that could mutate, instruct, regulate, optimize and maintain metabolic homeostasis? To address these questions, chaos, complexity, self-ordered states, and organization must all be carefully defined and distinguished. In addition their cause-and-effect relationships and mechanisms of action must be delineated. Are there any formal (non physical, abstract, conceptual, algorithmic) components to chaos, complexity, self-ordering and organization, or are they entirely physicodynamic (physical, mass/energy interaction alone)? Chaos and complexity can produce some fascinating self-ordered phenomena. But can spontaneous chaos and complexity steer events and processes toward pragmatic benefit, select function over non function, optimize algorithms, integrate circuits, produce computational halting, organize processes into formal systems, control and regulate existing systems toward greater efficiency? The question is pursued of whether there might be some yet-to-be discovered new law of biology that will elucidate the derivation of prescriptive information and control. “System” will be rigorously defined. Can a low-informational rapid succession of Prigogine’s dissipative structures self-order into bona fide organization? PMID:19333445

Triggerable electro-optic amplitude modulator bias stabilizer for integrated optical devices

DOEpatents

Conder, A.D.; Haigh, R.E.; Hugenberg, K.F.

1995-09-26

An improved Mach-Zehnder integrated optical electro-optic modulator is achieved by application and incorporation of a DC bias box containing a laser synchronized trigger circuit, a DC ramp and hold circuit, a modulator transfer function negative peak detector circuit, and an adjustable delay circuit. The DC bias box ramps the DC bias along the transfer function curve to any desired phase or point of operation at which point the RF modulation takes place. 7 figs.

Triggerable electro-optic amplitude modulator bias stabilizer for integrated optical devices

DOEpatents

Conder, Alan D.; Haigh, Ronald E.; Hugenberg, Keith F.

1995-01-01

An improved Mach-Zehnder integrated optical electro-optic modulator is achieved by application and incorporation of a DC bias box containing a laser synchronized trigger circuit, a DC ramp and hold circuit, a modulator transfer function negative peak detector circuit, and an adjustable delay circuit. The DC bias box ramps the DC bias along the transfer function curve to any desired phase or point of operation at which point the RF modulation takes place.

Cost optimization in low volume VLSI circuits

NASA Technical Reports Server (NTRS)

Cook, K. B., Jr.; Kerns, D. V., Jr.

1982-01-01

The relationship of integrated circuit (IC) cost to electronic system cost is developed using models for integrated circuit cost which are based on design/fabrication approach. Emphasis is on understanding the relationship between cost and volume for custom circuits suitable for NASA applications. In this report, reliability is a major consideration in the models developed. Results are given for several typical IC designs using off the shelf, full custom, and semicustom IC's with single and double level metallization.

Gated integrator with signal baseline subtraction

DOEpatents

Wang, X.

1996-12-17

An ultrafast, high precision gated integrator includes an opamp having differential inputs. A signal to be integrated is applied to one of the differential inputs through a first input network, and a signal indicative of the DC offset component of the signal to be integrated is applied to the other of the differential inputs through a second input network. A pair of electronic switches in the first and second input networks define an integrating period when they are closed. The first and second input networks are substantially symmetrically constructed of matched components so that error components introduced by the electronic switches appear symmetrically in both input circuits and, hence, are nullified by the common mode rejection of the integrating opamp. The signal indicative of the DC offset component is provided by a sample and hold circuit actuated as the integrating period begins. The symmetrical configuration of the integrating circuit improves accuracy and speed by balancing out common mode errors, by permitting the use of high speed switching elements and high speed opamps and by permitting the use of a small integrating time constant. The sample and hold circuit substantially eliminates the error caused by the input signal baseline offset during a single integrating window. 5 figs.

Gated integrator with signal baseline subtraction

DOEpatents

Wang, Xucheng

1996-01-01

An ultrafast, high precision gated integrator includes an opamp having differential inputs. A signal to be integrated is applied to one of the differential inputs through a first input network, and a signal indicative of the DC offset component of the signal to be integrated is applied to the other of the differential inputs through a second input network. A pair of electronic switches in the first and second input networks define an integrating period when they are closed. The first and second input networks are substantially symmetrically constructed of matched components so that error components introduced by the electronic switches appear symmetrically in both input circuits and, hence, are nullified by the common mode rejection of the integrating opamp. The signal indicative of the DC offset component is provided by a sample and hold circuit actuated as the integrating period begins. The symmetrical configuration of the integrating circuit improves accuracy and speed by balancing out common mode errors, by permitting the use of high speed switching elements and high speed opamps and by permitting the use of a small integrating time constant. The sample and hold circuit substantially eliminates the error caused by the input signal baseline offset during a single integrating window.

Good trellises for IC implementation of viterbi decoders for linear block codes

NASA Technical Reports Server (NTRS)

Lin, Shu; Moorthy, Hari T.; Uehara, Gregory T.

1996-01-01

This paper investigates trellis structures of linear block codes for the IC (integrated circuit) implementation of Viterbi decoders capable of achieving high decoding speed while satisfying a constraint on the structural complexity of the trellis in terms of the maximum number of states at any particular depth. Only uniform sectionalizations of the code trellis diagram are considered. An upper bound on the number of parallel and structurally identical (or isomorphic) subtrellises in a proper trellis for a code without exceeding the maximum state complexity of the minimal trellis of the code is first derived. Parallel structures of trellises with various section lengths for binary BCH and Reed-Muller (RM) codes of lengths 32 and 64 are analyzed. Next, the complexity of IC implementation of a Viterbi decoder based on an L-section trellis diagram for a code is investigated. A structural property of a Viterbi decoder called ACS-connectivity which is related to state connectivity is introduced. This parameter affects the complexity of wire-routing (interconnections within the IC). The effect of five parameters namely: (1) effective computational complexity; (2) complexity of the ACS-circuit; (3) traceback complexity; (4) ACS-connectivity; and (5) branch complexity of a trellis diagram on the VLSI complexity of a Viterbi decoder is investigated. It is shown that an IC implementation of a Viterbi decoder based on a non-minimal trellis requires less area and is capable of operation at higher speed than one based on the minimal trellis when the commonly used ACS-array architecture is considered.

Energy efficient circuit design using nanoelectromechanical relays

NASA Astrophysics Data System (ADS)

Venkatasubramanian, Ramakrishnan

Nano-electromechanical (NEM) relays are a promising class of emerging devices that offer zero off-state leakage and behave like an ideal switch. Recent advances in planar fabrication technology have demonstrated that microelectromechanical (MEMS) scale miniature relays could be manufactured reliably and could be used to build fully functional, complex integrated circuits. The zero leakage operation of relays has renewed the interest in relay based low power logic design. This dissertation explores circuit architectures using NEM relays and NEMS-CMOS heterogeneous integration. Novel circuit topologies for sequential logic, memory, and power management circuits have been proposed taking into consideration the NEM relay device properties and optimizing for energy efficiency and area. In nanoscale electromechanical devices, dispersion forces like Van der Waals' force (vdW) affect the pull-in stability of the relay devices significantly. Verilog-A electromechanical model of the suspended gate relay operating at 1V with a nominal air gap of 5 - 10nm has been developed taking into account all the electrical, mechanical and dispersion effects. This dissertation explores different relay based latch and flip-flop topologies. It has been shown that as few as 4 relay cells could be used to build flip-flops. An integrated voltage doubler based flip flop that improves the performance by 2X by overdriving Vgb has been proposed. Three NEM relay based parallel readout memory bitcell architectures have been proposed that have faster access time, and remove the reliability issues associated with previously reported serial readout architectures. A paradigm shift in design of power switches using NEM relays is proposed. An interesting property of the relay device is that the ON state resistance (Ron) of the NEM relay switch is constant and is insensitive to the gate slew rate. This coupled with infinite OFF state resistance (Roff ) offers significant area and power advantages over CMOS. This dissertation demonstrates NEM relay based charge pump and NEM-CMOS heterogeneous discontinuous conduction mode (DCM) buck regulator and the results are compared against a standard commercial 0.35μm CMOS implementation. It is shown that NEM-CMOS heterogeneous DC-DC converter has an area savings of 60% over CMOS and achieves an overall higher efficiency over CMOS, with a peak efficiency of 94.3% at 100mA. NEM relays offers unprecedented 10X-30X energy efficiency improvement in logic design for low frequency operation and has the potential to break the CMOS efficiency barrier in power electronic circuits as well. The practical aspects of NEM Relay integration are evaluated and algorithms for synthesis and development of large NEM relay based logic circuits are explored.

Disposable photonic integrated circuits for evanescent wave sensors by ultra-high volume roll-to-roll method.

PubMed

Aikio, Sanna; Hiltunen, Jussi; Hiitola-Keinänen, Johanna; Hiltunen, Marianne; Kontturi, Ville; Siitonen, Samuli; Puustinen, Jarkko; Karioja, Pentti

2016-02-08

Flexible photonic integrated circuit technology is an emerging field expanding the usage possibilities of photonics, particularly in sensor applications, by enabling the realization of conformable devices and introduction of new alternative production methods. Here, we demonstrate that disposable polymeric photonic integrated circuit devices can be produced in lengths of hundreds of meters by ultra-high volume roll-to-roll methods on a flexible carrier. Attenuation properties of hundreds of individual devices were measured confirming that waveguides with good and repeatable performance were fabricated. We also demonstrate the applicability of the devices for the evanescent wave sensing of ambient refractive index. The production of integrated photonic devices using ultra-high volume fabrication, in a similar manner as paper is produced, may inherently expand methods of manufacturing low-cost disposable photonic integrated circuits for a wide range of sensor applications.

Package for integrated optic circuit and method

DOEpatents

Kravitz, Stanley H.; Hadley, G. Ronald; Warren, Mial E.; Carson, Richard F.; Armendariz, Marcelino G.

1998-01-01

A structure and method for packaging an integrated optic circuit. The package comprises a first wall having a plurality of microlenses formed therein to establish channels of optical communication with an integrated optic circuit within the package. A first registration pattern is provided on an inside surface of one of the walls of the package for alignment and attachment of the integrated optic circuit. The package in one embodiment may further comprise a fiber holder for aligning and attaching a plurality of optical fibers to the package and extending the channels of optical communication to the fibers outside the package. In another embodiment, a fiber holder may be used to hold the fibers and align the fibers to the package. The fiber holder may be detachably connected to the package.

Method and apparatus for in-system redundant array repair on integrated circuits

DOEpatents

Bright, Arthur A [Croton-on-Hudson, NY; Crumley, Paul G [Yorktown Heights, NY; Dombrowa, Marc B [Bronx, NY; Douskey, Steven M [Rochester, MN; Haring, Rudolf A [Cortlandt Manor, NY; Oakland, Steven F [Colchester, VT; Ouellette, Michael R [Westford, VT; Strissel, Scott A [Byron, MN

2008-07-29

Disclosed is a method of repairing an integrated circuit of the type comprising of a multitude of memory arrays and a fuse box holding control data for controlling redundancy logic of the arrays. The method comprises the steps of providing the integrated circuit with a control data selector for passing the control data from the fuse box to the memory arrays; providing a source of alternate control data, external of the integrated circuit; and connecting the source of alternate control data to the control data selector. The method comprises the further step of, at a given time, passing the alternate control data from the source thereof, through the control data selector and to the memory arrays to control the redundancy logic of the memory arrays.

Method and apparatus for in-system redundant array repair on integrated circuits

DOEpatents

Bright, Arthur A [Croton-on-Hudson, NY; Crumley, Paul G [Yorktown Heights, NY; Dombrowa, Marc B [Bronx, NY; Douskey, Steven M [Rochester, MN; Haring, Rudolf A [Cortlandt Manor, NY; Oakland, Steven F [Colchester, VT; Ouellette, Michael R [Westford, VT; Strissel, Scott A [Byron, MN

2008-07-08

Disclosed is a method of repairing an integrated circuit of the type comprising of a multitude of memory arrays and a fuse box holding control data for controlling redundancy logic of the arrays. The method comprises the steps of providing the integrated circuit with a control data selector for passing the control data from the fuse box to the memory arrays; providing a source of alternate control data, external of the integrated circuit; and connecting the source of alternate control data to the control data selector. The method comprises the further step of, at a given time, passing the alternate control data from the source thereof, through the control data selector and to the memory arrays to control the redundancy logic of the memory arrays.

Method and apparatus for in-system redundant array repair on integrated circuits

DOEpatents

Bright, Arthur A.; Crumley, Paul G.; Dombrowa, Marc B.; Douskey, Steven M.; Haring, Rudolf A.; Oakland, Steven F.; Ouellette, Michael R.; Strissel, Scott A.

2007-12-18

Disclosed is a method of repairing an integrated circuit of the type comprising of a multitude of memory arrays and a fuse box holding control data for controlling redundancy logic of the arrays. The method comprises the steps of providing the integrated circuit with a control data selector for passing the control data from the fuse box to the memory arrays; providing a source of alternate control data, external of the integrated circuit; and connecting the source of alternate control data to the control data selector. The method comprises the further step of, at a given time, passing the alternate control data from the source thereof, through the control data selector and to the memory arrays to control the redundancy logic of the memory arrays.

Package for integrated optic circuit and method

DOEpatents

Kravitz, S.H.; Hadley, G.R.; Warren, M.E.; Carson, R.F.; Armendariz, M.G.

1998-08-04

A structure and method are disclosed for packaging an integrated optic circuit. The package comprises a first wall having a plurality of microlenses formed therein to establish channels of optical communication with an integrated optic circuit within the package. A first registration pattern is provided on an inside surface of one of the walls of the package for alignment and attachment of the integrated optic circuit. The package in one embodiment may further comprise a fiber holder for aligning and attaching a plurality of optical fibers to the package and extending the channels of optical communication to the fibers outside the package. In another embodiment, a fiber holder may be used to hold the fibers and align the fibers to the package. The fiber holder may be detachably connected to the package. 6 figs.

Silica Integrated Optical Circuits Based on Glass Photosensitivity

NASA Technical Reports Server (NTRS)

Abushagur, Mustafa A. G.

1999-01-01

Integrated optical circuits play a major rule in the new photonics technology both in communication and sensing due to their small size and compatibility with integrated circuits. Currently integrated optical circuits (IOCs) are fabricated using similar manufacturing to those used in the semiconductor industry. In this study we are considering a new technique to fabricate IOCs which does not require layers of photolithography, depositing and etching. This method is based on the photosensitivity of germanosilicate glasses. Waveguides and other IOC devises can be patterned in these glasses by exposing them using UV lasers. This exposure by UV light changes the index of refraction of the germanosilicate glass. This technique enjoys both the simplicity and flexibility of design and fabrication with also the potential of being fast and low cost.

Plasmonic integrated circuits comprising metal waveguides, multiplexer/demultiplexer, detectors, and logic circuits on a silicon substrate

NASA Astrophysics Data System (ADS)

Fukuda, M.; Ota, M.; Sumimura, A.; Okahisa, S.; Ito, M.; Ishii, Y.; Ishiyama, T.

2017-05-01

A plasmonic integrated circuit configuration comprising plasmonic and electronic components is presented and the feasibility for high-speed signal processing applications is discussed. In integrated circuits, plasmonic signals transmit data at high transfer rates with light velocity. Plasmonic and electronic components such as wavelength-divisionmultiplexing (WDM) networks comprising metal wires, plasmonic multiplexers/demultiplexers, and crossing metal wires are connected via plasmonic waveguides on the nanometer or micrometer scales. To merge plasmonic and electronic components, several types of plasmonic components were developed. To ensure that the plasmonic components could be easily fabricated and monolithically integrated onto a silicon substrate using silicon complementary metal-oxide-semiconductor (CMOS)-compatible processes, the components were fabricated on a Si substrate and made from silicon, silicon oxides, and metal; no other materials were used in the fabrication. The plasmonic components operated in the 1300- and 1550-nm-wavelength bands, which are typically employed in optical fiber communication systems. The plasmonic logic circuits were formed by patterning a silicon oxide film on a metal film, and the operation as a half adder was confirmed. The computed plasmonic signals can propagate through the plasmonic WDM networks and be connected to electronic integrated circuits at high data-transfer rates.

An egalitarian network model for the emergence of simple and complex cells in visual cortex

PubMed Central

Tao, Louis; Shelley, Michael; McLaughlin, David; Shapley, Robert

2004-01-01

We explain how simple and complex cells arise in a large-scale neuronal network model of the primary visual cortex of the macaque. Our model consists of ≈4,000 integrate-and-fire, conductance-based point neurons, representing the cells in a small, 1-mm2 patch of an input layer of the primary visual cortex. In the model the local connections are isotropic and nonspecific, and convergent input from the lateral geniculate nucleus confers cortical cells with orientation and spatial phase preference. The balance between lateral connections and lateral geniculate nucleus drive determines whether individual neurons in this recurrent circuit are simple or complex. The model reproduces qualitatively the experimentally observed distributions of both extracellular and intracellular measures of simple and complex response. PMID:14695891

A Novel Analog Integrated Circuit Design Course Covering Design, Layout, and Resulting Chip Measurement

ERIC Educational Resources Information Center

Lin, Wei-Liang; Cheng, Wang-Chuan; Wu, Chen-Hao; Wu, Hai-Ming; Wu, Chang-Yu; Ho, Kuan-Hsuan; Chan, Chueh-An

2010-01-01

This work describes a novel, first-year graduate-level analog integrated circuit (IC) design course. The course teaches students analog circuit design; an external manufacturer then produces their designs in three different silicon chips. The students, working in pairs, then test these chips to verify their success. All work is completed within…

Exchange circuits for FASTBUS slaves

DOE Office of Scientific and Technical Information (OSTI.GOV)

Bratskii, A.A.; Matseev, M.Y.; Rybakov, V.G.

1985-09-01

This paper describes general-purpose circuits for FASTBUS interfacing of the functional part of a slave device. The circuits contain buffered receivers and transmitters, addressrecognition and data-transfer logic, and the required control/status registers. The described circuits are implemented with series-K500 integrated circuits.

In situ fabricated 3D micro-lenses for photonic integrated circuits.

PubMed

Thomas, R; Li, J; Ladak, Sam; Barrow, D; Smowton, P M

2018-05-14

Aspheric astigmatic polymer micro-lenses were fabricated directly onto photonic integrated circuits using two-photon lithography. We observed a 12.6 dB improvement in the free space coupling efficiency between integrated ridge laser pairs with micro-lenses to those without.

Multi-channel detector readout method and integrated circuit

DOEpatents

Moses, William W.; Beuville, Eric; Pedrali-Noy, Marzio

2006-12-12

An integrated circuit which provides multi-channel detector readout from a detector array. The circuit receives multiple signals from the elements of a detector array and compares the sampled amplitudes of these signals against a noise-floor threshold and against one another. A digital signal is generated which corresponds to the location of the highest of these signal amplitudes which exceeds the noise floor threshold. The digital signal is received by a multiplexing circuit which outputs an analog signal corresponding the highest of the input signal amplitudes. In addition a digital control section provides for programmatic control of the multiplexer circuit, amplifier gain, amplifier reset, masking selection, and test circuit functionality on each input thereof.

Multi-channel detector readout method and integrated circuit

DOEpatents

Moses, William W.; Beuville, Eric; Pedrali-Noy, Marzio

2004-05-18

An integrated circuit which provides multi-channel detector readout from a detector array. The circuit receives multiple signals from the elements of a detector array and compares the sampled amplitudes of these signals against a noise-floor threshold and against one another. A digital signal is generated which corresponds to the location of the highest of these signal amplitudes which exceeds the noise floor threshold. The digital signal is received by a multiplexing circuit which outputs an analog signal corresponding the highest of the input signal amplitudes. In addition a digital control section provides for programmatic control of the multiplexer circuit, amplifier gain, amplifier reset, masking selection, and test circuit functionality on each input thereof.

Investigation for connecting waveguide in off-planar integrated circuits.

PubMed

Lin, Jie; Feng, Zhifang

2017-09-01

The transmission properties of a vertical waveguide connected by different devices in off-planar integrated circuits are designed, investigated, and analyzed in detail by the finite-difference time-domain method. The results show that both guide bandwidth and transmission efficiency can be adjusted effectively by shifting the vertical waveguide continuously. Surprisingly, the wide guide band (0.385[c/a]∼0.407[c/a]) and well transmission (-6  dB) are observed simultaneously in several directions when the vertical waveguide is located at a specific location. The results are very important for all-optical integrated circuits, especially in compact integration.

Synthetic biology: insights into biological computation.

PubMed

Manzoni, Romilde; Urrios, Arturo; Velazquez-Garcia, Silvia; de Nadal, Eulàlia; Posas, Francesc

2016-04-18

Organisms have evolved a broad array of complex signaling mechanisms that allow them to survive in a wide range of environmental conditions. They are able to sense external inputs and produce an output response by computing the information. Synthetic biology attempts to rationally engineer biological systems in order to perform desired functions. Our increasing understanding of biological systems guides this rational design, while the huge background in electronics for building circuits defines the methodology. In this context, biocomputation is the branch of synthetic biology aimed at implementing artificial computational devices using engineered biological motifs as building blocks. Biocomputational devices are defined as biological systems that are able to integrate inputs and return outputs following pre-determined rules. Over the last decade the number of available synthetic engineered devices has increased exponentially; simple and complex circuits have been built in bacteria, yeast and mammalian cells. These devices can manage and store information, take decisions based on past and present inputs, and even convert a transient signal into a sustained response. The field is experiencing a fast growth and every day it is easier to implement more complex biological functions. This is mainly due to advances in in vitro DNA synthesis, new genome editing tools, novel molecular cloning techniques, continuously growing part libraries as well as other technological advances. This allows that digital computation can now be engineered and implemented in biological systems. Simple logic gates can be implemented and connected to perform novel desired functions or to better understand and redesign biological processes. Synthetic biological digital circuits could lead to new therapeutic approaches, as well as new and efficient ways to produce complex molecules such as antibiotics, bioplastics or biofuels. Biological computation not only provides possible biomedical and biotechnological applications, but also affords a greater understanding of biological systems.

Fault tolerant system based on IDDQ testing

NASA Astrophysics Data System (ADS)

Guibane, Badi; Hamdi, Belgacem; Mtibaa, Abdellatif; Bensalem, Brahim

2018-06-01

Offline test is essential to ensure good manufacturing quality. However, for permanent or transient faults that occur during the use of the integrated circuit in an application, an online integrated test is needed as well. This procedure should ensure the detection and possibly the correction or the masking of these faults. This requirement of self-correction is sometimes necessary, especially in critical applications that require high security such as automotive, space or biomedical applications. We propose a fault-tolerant design for analogue and mixed-signal design complementary metal oxide (CMOS) circuits based on the quiescent current supply (IDDQ) testing. A defect can cause an increase in current consumption. IDDQ testing technique is based on the measurement of power supply current to distinguish between functional and failed circuits. The technique has been an effective testing method for detecting physical defects such as gate-oxide shorts, floating gates (open) and bridging defects in CMOS integrated circuits. An architecture called BICS (Built In Current Sensor) is used for monitoring the supply current (IDDQ) of the connected integrated circuit. If the measured current is not within the normal range, a defect is signalled and the system switches connection from the defective to a functional integrated circuit. The fault-tolerant technique is composed essentially by a double mirror built-in current sensor, allowing the detection of abnormal current consumption and blocks allowing the connection to redundant circuits, if a defect occurs. Spices simulations are performed to valid the proposed design.

Cascaded all-optical operations in a hybrid integrated 80-Gb/s logic circuit.

PubMed

LeGrange, J D; Dinu, M; Sochor, T; Bollond, P; Kasper, A; Cabot, S; Johnson, G S; Kang, I; Grant, A; Kay, J; Jaques, J

2014-06-02

We demonstrate logic functionalities in a high-speed all-optical logic circuit based on differential Mach-Zehnder interferometers with semiconductor optical amplifiers as the nonlinear optical elements. The circuit, implemented by hybrid integration of the semiconductor optical amplifiers on a planar lightwave circuit platform fabricated in silica glass, can be flexibly configured to realize a variety of Boolean logic gates. We present both simulations and experimental demonstrations of cascaded all-optical operations for 80-Gb/s on-off keyed data.

Modulation of distributed feedback (DFB) laser diode with the autonomous Chua's circuit: Theory and experiment

NASA Astrophysics Data System (ADS)

Talla Mbé, Jimmi Hervé; Woafo, Paul

2018-03-01

We report on a simple way to generate complex optical waveforms with very cheap and accessible equipments. The general idea consists in modulating a laser diode with an autonomous electronic oscillator, and in the case of this study, we use a distributed feedback (DFB) laser diode pumped with an electronic Chua's circuit. Based on the adiabatic P-I characteristics of the laser diode at low frequencies, we show that when the total pump is greater than the laser threshold, it is possible to convert the electrical waveforms of the Chua's circuit into optical carriers. But, if that is not the case, the on-off dynamical behavior of the laser permits to obtain many other optical waveform signals, mainly pulses. Our numerical results are consistent with experimental measurements. The work presents the advantage of extending the range of possible chaotic dynamics of the laser diodes in the time domains (millisecond) where it is not usually expected with conventional modulation techniques. Moreover, this new technique of laser diodes modulation brings a general benefit in the physical equipment, reduces their cost and congestion so that, it can constitute a step towards photonic integrated circuits.

A programmable heater control circuit for spacecraft

NASA Technical Reports Server (NTRS)

Nguyen, D. D.; Owen, J. W.; Smith, D. A.; Lewter, W. J.

1994-01-01

Spacecraft thermal control is accomplished for many components through use of multilayer insulation systems, electrical heaters, and radiator systems. The heaters are commanded to maintain component temperatures within design specifications. The programmable heater control circuit (PHCC) was designed to obtain an effective and efficient means of spacecraft thermal control. The hybrid circuit provides use of control instrumentation as temperature data, available to the spacecraft central data system, reprogramming capability of the local microprocessor during the spacecraft's mission, and the elimination of significant spacecraft wiring. The hybrid integrated circuit has a temperature sensing and conditioning circuit, a microprocessor, and a heater power and control circuit. The device is miniature and housed in a volume which allows physical integration with the component to be controlled. Applications might include alternate battery-powered logic-circuit configurations. A prototype unit with appropriate physical and functional interfaces was procured for testing. The physical functionality and the feasibility of fabrication of the hybrid integrated circuit were successfully verified. The remaining work to develop a flight-qualified device includes fabrication and testing of a Mil-certified part. An option for completing the PHCC flight qualification testing is to enter into a joint venture with industry.

Design of Arithmetic Circuits for Complex Binary Number System

NASA Astrophysics Data System (ADS)

Jamil, Tariq

2011-08-01

Complex numbers play important role in various engineering applications. To represent these numbers efficiently for storage and manipulation, a (-1+j)-base complex binary number system (CBNS) has been proposed in the literature. In this paper, designs of nibble-size arithmetic circuits (adder, subtractor, multiplier, divider) have been presented. These circuits can be incorporated within von Neumann and associative dataflow processors to achieve higher performance in both sequential and parallel computing paradigms.

Complexity and Competition in Appetitive and Aversive Neural Circuits

PubMed Central

Barberini, Crista L.; Morrison, Sara E.; Saez, Alex; Lau, Brian; Salzman, C. Daniel

2012-01-01

Decision-making often involves using sensory cues to predict possible rewarding or punishing reinforcement outcomes before selecting a course of action. Recent work has revealed complexity in how the brain learns to predict rewards and punishments. Analysis of neural signaling during and after learning in the amygdala and orbitofrontal cortex, two brain areas that process appetitive and aversive stimuli, reveals a dynamic relationship between appetitive and aversive circuits. Specifically, the relationship between signaling in appetitive and aversive circuits in these areas shifts as a function of learning. Furthermore, although appetitive and aversive circuits may often drive opposite behaviors – approaching or avoiding reinforcement depending upon its valence – these circuits can also drive similar behaviors, such as enhanced arousal or attention; these processes also may influence choice behavior. These data highlight the formidable challenges ahead in dissecting how appetitive and aversive neural circuits interact to produce a complex and nuanced range of behaviors. PMID:23189037

Programmable genetic circuits for pathway engineering.

PubMed

Hoynes-O'Connor, Allison; Moon, Tae Seok

2015-12-01

Synthetic biology has the potential to provide decisive advances in genetic control of metabolic pathways. However, there are several challenges that synthetic biologists must overcome before this vision becomes a reality. First, a library of diverse and well-characterized sensors, such as metabolite-sensing or condition-sensing promoters, must be constructed. Second, robust programmable circuits that link input conditions with a specific gene regulation response must be developed. Finally, multi-gene targeting strategies must be integrated with metabolically relevant sensors and complex, robust logic. Achievements in each of these areas, which employ the CRISPR/Cas system, in silico modeling, and dynamic sensor-regulators, among other tools, provide a strong basis for future research. Overall, the future for synthetic biology approaches in metabolic engineering holds immense promise. Copyright © 2015 Elsevier Ltd. All rights reserved.

Conformation-based signal transfer and processing at the single-molecule level

NASA Astrophysics Data System (ADS)

Li, Chao; Wang, Zhongping; Lu, Yan; Liu, Xiaoqing; Wang, Li

2017-11-01

Building electronic components made of individual molecules is a promising strategy for the miniaturization and integration of electronic devices. However, the practical realization of molecular devices and circuits for signal transmission and processing at room temperature has proven challenging. Here, we present room-temperature intermolecular signal transfer and processing using SnCl2Pc molecules on a Cu(100) surface. The in-plane orientations of the molecules are effectively coupled via intermolecular interaction and serve as the information carrier. In the coupled molecular arrays, the signal can be transferred from one molecule to another in the in-plane direction along predesigned routes and processed to realize logical operations. These phenomena enable the use of molecules displaying intrinsic bistable states as complex molecular devices and circuits with novel functions.

Propagation of eigenmodes and transfer functions in waveguide WDM structures

NASA Astrophysics Data System (ADS)

Mashkov, Vladimir A.; Francoeur, S.; Geuss, U.; Neiser, K.; Temkin, Henryk

1998-02-01

A method of propagation functions and transfer amplitudes suitable for the design of integrated optical circuits is presented. The method is based on vectorial formulation of electrodynamics: the distributions and propagation of electromagnetic fields in optical circuits is described by equivalent surface sources. This approach permits a division of complex optical waveguide structures into sets of primitive blocks and to separately calculate the transfer function and the transfer amplitude for each block. The transfer amplitude of the entire optical system is represented by a convolution of transfer amplitudes of its primitive blocks. The eigenvalues and eigenfunctions of arbitrary waveguide structure are obtained in the WKB approximation and compared with other methods. The general approach is illustrated with the transfer amplitude calculations for Dragone's star coupler and router.

A microfabricated fringing field capacitive pH sensor with an integrated readout circuit

NASA Astrophysics Data System (ADS)

Arefin, Md Shamsul; Bulut Coskun, M.; Alan, Tuncay; Redoute, Jean-Michel; Neild, Adrian; Rasit Yuce, Mehmet

2014-06-01

This work presents a microfabricated fringe-field capacitive pH sensor using interdigitated electrodes and an integrated modulation-based readout circuit. The changes in capacitance of the sensor result from the permittivity changes due to pH variations and are converted to frequency shifts using a crossed-coupled voltage controlled oscillator readout circuit. The shift in resonant frequency of the readout circuit is 30.96 MHz for a change in pH of 1.0-5.0. The sensor can be used for the measurement of low pH levels, such as gastric acid, and can be integrated with electronic pills. The measurement results show high repeatability, low noise, and a stable output.

Multislice imaging of integrated circuits by precession X-ray ptychography.

PubMed

Shimomura, Kei; Hirose, Makoto; Takahashi, Yukio

2018-01-01

A method for nondestructively visualizing multisection nanostructures of integrated circuits by X-ray ptychography with a multislice approach is proposed. In this study, tilt-series ptychographic diffraction data sets of a two-layered circuit with a ∼1.4 µm gap at nine incident angles are collected in a wide Q range and then artifact-reduced phase images of each layer are successfully reconstructed at ∼10 nm resolution. The present method has great potential for the three-dimensional observation of flat specimens with thickness on the order of 100 µm, such as three-dimensional stacked integrated circuits based on through-silicon vias, without laborious sample preparation.

On-chip synthesis of circularly polarized emission of light with integrated photonic circuits.

PubMed

He, Li; Li, Mo

2014-05-01

The helicity of circularly polarized (CP) light plays an important role in the light-matter interaction in magnetic and quantum material systems. Exploiting CP light in integrated photonic circuits could lead to on-chip integration of novel optical helicity-dependent devices for applications ranging from spintronics to quantum optics. In this Letter, we demonstrate a silicon photonic circuit coupled with a 2D grating emitter operating at a telecom wavelength to synthesize vertically emitting, CP light from a quasi-TE waveguide mode. Handedness of the emitted circular polarized light can be thermally controlled with an integrated microheater. The compact device footprint enables a small beam diameter, which is desirable for large-scale integration.

The Role of the Medial Prefrontal Cortex in Trace Fear Extinction

ERIC Educational Resources Information Center

Kwapis, Janine L.; Jarome, Timothy J.; Helmstetter, Fred J.

2015-01-01

The extinction of delay fear conditioning relies on a neural circuit that has received much attention and is relatively well defined. Whether this established circuit also supports the extinction of more complex associations, however, is unclear. Trace fear conditioning is a better model of complex relational learning, yet the circuit that…

A More Accurate and Efficient Technique Developed for Using Computational Methods to Obtain Helical Traveling-Wave Tube Interaction Impedance

NASA Technical Reports Server (NTRS)

Kory, Carol L.

1999-01-01

The phenomenal growth of commercial communications has created a great demand for traveling-wave tube (TWT) amplifiers. Although the helix slow-wave circuit remains the mainstay of the TWT industry because of its exceptionally wide bandwidth, until recently it has been impossible to accurately analyze a helical TWT using its exact dimensions because of the complexity of its geometrical structure. For the first time, an accurate three-dimensional helical model was developed that allows accurate prediction of TWT cold-test characteristics including operating frequency, interaction impedance, and attenuation. This computational model, which was developed at the NASA Lewis Research Center, allows TWT designers to obtain a more accurate value of interaction impedance than is possible using experimental methods. Obtaining helical slow-wave circuit interaction impedance is an important part of the design process for a TWT because it is related to the gain and efficiency of the tube. This impedance cannot be measured directly; thus, conventional methods involve perturbing a helical circuit with a cylindrical dielectric rod placed on the central axis of the circuit and obtaining the difference in resonant frequency between the perturbed and unperturbed circuits. A mathematical relationship has been derived between this frequency difference and the interaction impedance (ref. 1). However, because of the complex configuration of the helical circuit, deriving this relationship involves several approximations. In addition, this experimental procedure is time-consuming and expensive, but until recently it was widely accepted as the most accurate means of determining interaction impedance. The advent of an accurate three-dimensional helical circuit model (ref. 2) made it possible for Lewis researchers to fully investigate standard approximations made in deriving the relationship between measured perturbation data and interaction impedance. The most prominent approximations made in the analysis were addressed and fully investigated for their accuracy by using the three-dimensional electromagnetic simulation code MAFIA (Solution of Maxwell's Equations by the Finite Integration Algorithm) (refs. 3 and 4). We found that several approximations introduced significant error (ref. 5).

Smart Power: New power integrated circuit technologies and their applications

NASA Astrophysics Data System (ADS)

Kuivalainen, Pekka; Pohjonen, Helena; Yli-Pietilae, Timo; Lenkkeri, Jaakko

1992-05-01

Power Integrated Circuits (PIC) is one of the most rapidly growing branches of the semiconductor technology. The PIC markets has been forecast to grow from 660 million dollars in 1990 to 1658 million dollars in 1994. It has even been forecast that at the end of the 1990's the PIC markets would correspond to the value of the whole semiconductor production in 1990. Automotive electronics will play the leading role in the development of the standard PIC's. Integrated motor drivers (36 V/4 A), smart integrated switches (60 V/30 A), solenoid drivers, integrated switch-mode power supplies and regulators are the latest standard devices of the PIC manufactures. ASIC (Application Specific Integrated Circuits) PIC solutions are needed for the same reasons as other ASIC devices: there are no proper standard devices, a company has a lot of application knowhow, which should be kept inside the company, the size of the product must be reduced, and assembly costs are wished to be reduced by decreasing the number of discrete devices. During the next few years the most probable ASIC PIC applications in Finland will be integrated solenoid and motor drivers, an integrated electronic lamp ballast circuit and various sensor interface circuits. Application of the PIC technologies to machines and actuators will strongly be increased all over the world. This means that various PIC's, either standard PIC's or full custom ASIC circuits, will appear in many products which compete with the corresponding Finnish products. Therefore the development of the PIC technologies must be followed carefully in order to immediately be able to apply the latest development in the smart power technologies and their design methods.

Cascade photonic integrated circuit architecture for electro-optic in-phase quadrature/single sideband modulation or frequency conversion.

PubMed

Hasan, Mehedi; Hall, Trevor

2015-11-01

A photonic integrated circuit architecture for implementing frequency upconversion is proposed. The circuit consists of a 1×2 splitter and 2×1 combiner interconnected by two stages of differentially driven phase modulators having 2×2 multimode interference coupler between the stages. A transfer matrix approach is used to model the operation of the architecture. The predictions of the model are validated by simulations performed using an industry standard software tool. The intrinsic conversion efficiency of the proposed design is improved by 6 dB over the alternative functionally equivalent circuit based on dual parallel Mach-Zehnder modulators known in the prior art. A two-tone analysis is presented to study the linearity of the proposed circuit, and a comparison is provided over the alternative. The proposed circuit is suitable for integration in any platform that offers linear electro-optic phase modulation such as LiNbO(3), silicon, III-V, or hybrid technology.

CMOS-based carbon nanotube pass-transistor logic integrated circuits

PubMed Central

Ding, Li; Zhang, Zhiyong; Liang, Shibo; Pei, Tian; Wang, Sheng; Li, Yan; Zhou, Weiwei; Liu, Jie; Peng, Lian-Mao

2012-01-01

Field-effect transistors based on carbon nanotubes have been shown to be faster and less energy consuming than their silicon counterparts. However, ensuring these advantages are maintained for integrated circuits is a challenge. Here we demonstrate that a significant reduction in the use of field-effect transistors can be achieved by constructing carbon nanotube-based integrated circuits based on a pass-transistor logic configuration, rather than a complementary metal-oxide semiconductor configuration. Logic gates are constructed on individual carbon nanotubes via a doping-free approach and with a single power supply at voltages as low as 0.4 V. The pass-transistor logic configurarion provides a significant simplification of the carbon nanotube-based circuit design, a higher potential circuit speed and a significant reduction in power consumption. In particular, a full adder, which requires a total of 28 field-effect transistors to construct in the usual complementary metal-oxide semiconductor circuit, uses only three pairs of n- and p-field-effect transistors in the pass-transistor logic configuration. PMID:22334080

Dual-function photonic integrated circuit for frequency octo-tupling or single-side-band modulation.

PubMed

Hasan, Mehedi; Maldonado-Basilio, Ramón; Hall, Trevor J

2015-06-01

A dual-function photonic integrated circuit for microwave photonic applications is proposed. The circuit consists of four linear electro-optic phase modulators connected optically in parallel within a generalized Mach-Zehnder interferometer architecture. The photonic circuit is arranged to have two separate output ports. A first port provides frequency up-conversion of a microwave signal from the electrical to the optical domain; equivalently single-side-band modulation. A second port provides tunable millimeter wave carriers by frequency octo-tupling of an appropriate amplitude RF carrier. The circuit exploits the intrinsic relative phases between the ports of multi-mode interference couplers to provide substantially all the static optical phases needed. The operation of the proposed dual-function photonic integrated circuit is verified by computer simulations. The performance of the frequency octo-tupling and up-conversion functions is analyzed in terms of the electrical signal to harmonic distortion ratio and the optical single side band to unwanted harmonics ratio, respectively.

Coherent optical monolithic phased-array antenna steering system

DOEpatents

Hietala, Vincent M.; Kravitz, Stanley H.; Vawter, Gregory A.

1994-01-01

An optical-based RF beam steering system for phased-array antennas comprising a photonic integrated circuit (PIC). The system is based on optical heterodyning employed to produce microwave phase shifting by a monolithic PIC constructed entirely of passive components. Microwave power and control signal distribution to the antenna is accomplished by optical fiber, permitting physical separation of the PIC and its control functions from the antenna. The system reduces size, weight, complexity, and cost of phased-array antenna systems.

Mirror mechanism and dedicated circuits are the scaffold for mirroring processes.

PubMed

Fogassi, Leonardo

2014-04-01

In the past decade many studies have demonstrated the existence of a mirror mechanism that matches the sensory representation of a biological stimulus with its somatomotor and visceromotor representation. This mechanism, likely phylogenetically very old, explains several types of mirroring behaviours, at different levels of complexity. The presence in primates of dedicated neuroanatomical pathways for specific sensorimotor integrations processes implies, at least in the primate lineage, a hard-wired mirror mechanism for social cognitive functions.

Improved Photon-Emission-Microscope System

NASA Technical Reports Server (NTRS)

Vu, Duc

2006-01-01

An improved photon-emission-microscope (PEM) instrumentation system has been developed for use in diagnosing failure conditions in semiconductor devices, including complex integrated circuits. This system is designed primarily to image areas that emit photons, at wavelengths from 400 to 1,100 nm, associated with device failures caused by leakage of electric current through SiO2 and other dielectric materials used in multilayer semiconductor structures. In addition, the system is sensitive enough to image areas that emit photons during normal operation.

Compensated gain control circuit for buck regulator command charge circuit

DOEpatents

Barrett, David M.

1996-01-01

A buck regulator command charge circuit includes a compensated-gain control signal for compensating for changes in the component values in order to achieve optimal voltage regulation. The compensated-gain control circuit includes an automatic-gain control circuit for generating a variable-gain control signal. The automatic-gain control circuit is formed of a precision rectifier circuit, a filter network, an error amplifier, and an integrator circuit.

Compensated gain control circuit for buck regulator command charge circuit

DOEpatents

Barrett, D.M.

1996-11-05

A buck regulator command charge circuit includes a compensated-gain control signal for compensating for changes in the component values in order to achieve optimal voltage regulation. The compensated-gain control circuit includes an automatic-gain control circuit for generating a variable-gain control signal. The automatic-gain control circuit is formed of a precision rectifier circuit, a filter network, an error amplifier, and an integrator circuit. 5 figs.

An integrated circuit switch

NASA Technical Reports Server (NTRS)

Bonin, E. L.

1969-01-01

Multi-chip integrated circuit switch consists of a GaAs photon-emitting diode in close proximity with S1 phototransistor. A high current gain is obtained when the transistor has a high forward common-emitter current gain.

Chemical etching for automatic processing of integrated circuits

NASA Technical Reports Server (NTRS)

Kennedy, B. W.

1981-01-01

Chemical etching for automatic processing of integrated circuits is discussed. The wafer carrier and loading from a receiving air track into automatic furnaces and unloading onto a sending air track are included.

Multiple network interface core apparatus and method

DOEpatents

Underwood, Keith D [Albuquerque, NM; Hemmert, Karl Scott [Albuquerque, NM

2011-04-26

A network interface controller and network interface control method comprising providing a single integrated circuit as a network interface controller and employing a plurality of network interface cores on the single integrated circuit.

Circuit engineering principles for construction of bipolar large-scale integrated circuit storage devices and very large-scale main memory

NASA Astrophysics Data System (ADS)

Neklyudov, A. A.; Savenkov, V. N.; Sergeyez, A. G.

1984-06-01

Memories are improved by increasing speed or the memory volume on a single chip. The most effective means for increasing speeds in bipolar memories are current control circuits with the lowest extraction times for a specific power consumption (1/4 pJ/bit). The control current circuitry involves multistage current switches and circuits accelerating transient processes in storage elements and links. Circuit principles for the design of bipolar memories with maximum speeds for an assigned minimum of circuit topology are analyzed. Two main classes of storage with current control are considered: the ECL type and super-integrated injection type storage with data capacities of N = 1/4 and N 4/16, respectively. The circuits reduce logic voltage differentials and the volumes of lexical and discharge buses and control circuit buses. The limiting speed is determined by the antiinterference requirements of the memory in storage and extraction modes.

Functional Laser Trimming Of Thin Film Resistors On Silicon ICs

NASA Astrophysics Data System (ADS)

Mueller, Michael J.; Mickanin, Wes

1986-07-01

Modern Laser Wafer Trimming (LWT) technology achieves exceptional analog circuit performance and precision while maintain-ing the advantages of high production throughput and yield. Microprocessor-driven instrumentation has both emphasized the role of data conversion circuits and demanded sophisticated signal conditioning functions. Advanced analog semiconductor circuits with bandwidths over 1 GHz, and high precision, trimmable, thin-film resistors meet many of todays emerging circuit requirements. Critical to meeting these requirements are optimum choices of laser characteristics, proper materials, trimming process control, accurate modeling of trimmed resistor performance, and appropriate circuit design. Once limited exclusively to hand-crafted, custom integrated circuits, designs are now available in semi-custom circuit configurations. These are similar to those provided for digital designs and supported by computer-aided design (CAD) tools. Integrated with fully automated measurement and trimming systems, these quality circuits can now be produced in quantity to meet the requirements of communications, instrumentation, and signal processing markets.

Nanoscale integration is the next frontier for nanotechnology

DOE Office of Scientific and Technical Information (OSTI.GOV)

Picraux, Samuel T

2009-01-01

Nanoscale integration of materials and structures is the next critical step to exploit the promise of nanomaterials. Many novel and fascinating properties have been revealed for nanostructured materials. But if nanotechnology is to live up to its promise we must incorporate these nanoscale building blocks into functional systems that connect to the micro- and macroscale world. To do this we will inevitably need to understand and exploit the resulting combined unique properties of these integrated nanosystems. Much science waits to be discovered in the process. Nanoscale integration extends from the synthesis and fabrication of individual nanoscale building blocks, to themore » assembly of these building blocks into composite structures, and finally to the formation of complex functional systems. As illustrated in Figure 1, the building blocks may be homogeneous or heterogeneous, the composite materials may be nanocomposite or patterned structures, and the functional systems will involve additional combinations of materials. Nanoscale integration involves assembling diverse nanoscale materials across length scales to design and achieve new properties and functionality. At each stage size-dependent properties, the influence of surfaces in close proximity, and a multitude of interfaces all come into play. Whether the final system involves coherent electrons in a quantum computing approach, the combined flow of phonons and electrons for a high efficiency thermoelectric micro-generator, or a molecular recognition structure for bio-sensing, the combined effects of size, surface, and interface will be critical. In essence, one wants to combine the novel functions available through nanoscale science to achieve unique multi-functionalities not available in bulk materials. Perhaps the best-known example of integration is that of combining electronic components together into very large scale integrated circuits (VLSI). The integrated circuit has revolutionized electronics in many ways, from exploiting field-effect transistor devices and low power complementary logic to enable the electronic watch and hand calculator in the 1970's, to today's microprocessors and memories with billions of devices and a computational power not imagined a few decades ago. The manipulation of charges on a chip, the new concepts in combining devices for logic functions, and the new approaches to computation, information processing, and imaging have all emerged from Kilby and Noyce's simple concept of integrating devices on a single chip. Moving from hard to soft materials, a second more recent example of integration is the DNA microarray. These microarrays, with up to millions of elements in a planar array that can be optically read out, can simultaneously measure the expression of 10's of thousands of genes to study the effects of disease and treatment, or screen for single nucleotide polymorphisms for uses ranging from forensics to predisposition to disease. While still at an early stage, microarrays have revolutionized biosciences by providing the means to interrogate the complex genetic control of biological functions. Just as integrated circuits and microarrays have led to completely new functionalities and performance, the integration of nanoscale materials and structures is anticipated to lead to new performance and enable the design of new functionalities not previously envisioned. The fundamental questions underlying integration go beyond just complex fabrication or the engineering of known solutions; they lead to new discoveries and new science. The scientific challenges around nanoscale integration necessitate the development of new knowledge that is central to the advance of nanotechnology. To move forward one must address key science questions that arise in nanoscience integration and go beyond a single system or materials area. New science and discoveries especially await around three questions. How does one: (1) Control energy transfer and other interactions across interfaces and over mUltiple length scales? (2) Understand and control the interactions between nanoscale building blocks to assemble specific integrated structures? (3) Design and exploit interactions within assembled structures to achieve new properties and specific functionalities? These high level questions can serve to drive research, and to advance understanding of the complex phenomena and multifunctionality that may emerge from integration. For example, in photonics there is considerable effort to understand and control the response of nanoscale conducting structures on dielectrics, to allow one to localize, manipulate, and control electromagnetic energy in integrated systems such as in the field known as metamaterials. Essential to this area is a fundamental understanding of energy transfer across multiple length scales (question 1 above).« less

Fabrication of multijunction high voltage concentrator solar cells by integrated circuit technology

NASA Technical Reports Server (NTRS)

Valco, G. J.; Kapoor, V. J.; Evans, J. C., Jr.; Chai, A.-T.

1981-01-01

Standard integrated circuit technology has been developed for the design and fabrication of planar multijunction (PMJ) solar cell chips. Each 1 cm x 1 cm solar chip consisted of six n(+)/p, back contacted, internally series interconnected unit cells. These high open circuit voltage solar cells were fabricated on 2 ohm-cm, p-type 75 microns thick, silicon substrates. A five photomask level process employing contact photolithography was used to pattern for boron diffusions, phorphorus diffusions, and contact metallization. Fabricated devices demonstrated an open circuit voltage of 3.6 volts and a short circuit current of 90 mA at 80 AMl suns. An equivalent circuit model of the planar multi-junction solar cell was developed.

Towards a whole-cell modeling approach for synthetic biology

NASA Astrophysics Data System (ADS)

Purcell, Oliver; Jain, Bonny; Karr, Jonathan R.; Covert, Markus W.; Lu, Timothy K.

2013-06-01

Despite rapid advances over the last decade, synthetic biology lacks the predictive tools needed to enable rational design. Unlike established engineering disciplines, the engineering of synthetic gene circuits still relies heavily on experimental trial-and-error, a time-consuming and inefficient process that slows down the biological design cycle. This reliance on experimental tuning is because current modeling approaches are unable to make reliable predictions about the in vivo behavior of synthetic circuits. A major reason for this lack of predictability is that current models view circuits in isolation, ignoring the vast number of complex cellular processes that impinge on the dynamics of the synthetic circuit and vice versa. To address this problem, we present a modeling approach for the design of synthetic circuits in the context of cellular networks. Using the recently published whole-cell model of Mycoplasma genitalium, we examined the effect of adding genes into the host genome. We also investigated how codon usage correlates with gene expression and find agreement with existing experimental results. Finally, we successfully implemented a synthetic Goodwin oscillator in the whole-cell model. We provide an updated software framework for the whole-cell model that lays the foundation for the integration of whole-cell models with synthetic gene circuit models. This software framework is made freely available to the community to enable future extensions. We envision that this approach will be critical to transforming the field of synthetic biology into a rational and predictive engineering discipline.

PUZZLE - A program for computer-aided design of printed circuit artwork

NASA Technical Reports Server (NTRS)

Harrell, D. A. W.; Zane, R.

1971-01-01

Program assists in solving spacing problems encountered in printed circuit /PC/ design. It is intended to have maximum use for two-sided PC boards carrying integrated circuits, and also aids design of discrete component circuits.

Open-loop digital frequency multiplier

NASA Technical Reports Server (NTRS)

Moore, R. C.

1977-01-01

Monostable multivibrator is implemented by using digital integrated circuits where multiplier constant is too large for conventional phase-locked-loop integrated circuit. A 400 Hz clock is generated by divide-by-N counter from 1 Hz timing reference.

Integrated circuit cooled turbine blade

DOE Office of Scientific and Technical Information (OSTI.GOV)

Lee, Ching-Pang; Jiang, Nan; Um, Jae Y.

A turbine rotor blade includes at least two integrated cooling circuits that are formed within the blade that include a leading edge circuit having a first cavity and a second cavity and a trailing edge circuit that includes at least a third cavity located aft of the second cavity. The trailing edge circuit flows aft with at least two substantially 180-degree turns at the tip end and the root end of the blade providing at least a penultimate cavity and a last cavity. The last cavity is located along a trailing edge of the blade. A tip axial cooling channelmore » connects to the first cavity of the leading edge circuit and the penultimate cavity of the trailing edge circuit. At least one crossover hole connects the penultimate cavity to the last cavity substantially near the tip end of the blade.« less

Implementation of Complex Biological Logic Circuits Using Spatially Distributed Multicellular Consortia

PubMed Central

Urrios, Arturo; de Nadal, Eulàlia; Solé, Ricard; Posas, Francesc

2016-01-01

Engineered synthetic biological devices have been designed to perform a variety of functions from sensing molecules and bioremediation to energy production and biomedicine. Notwithstanding, a major limitation of in vivo circuit implementation is the constraint associated to the use of standard methodologies for circuit design. Thus, future success of these devices depends on obtaining circuits with scalable complexity and reusable parts. Here we show how to build complex computational devices using multicellular consortia and space as key computational elements. This spatial modular design grants scalability since its general architecture is independent of the circuit’s complexity, minimizes wiring requirements and allows component reusability with minimal genetic engineering. The potential use of this approach is demonstrated by implementation of complex logical functions with up to six inputs, thus demonstrating the scalability and flexibility of this method. The potential implications of our results are outlined. PMID:26829588

Non-invasive Brain Stimulation: Probing Intracortical Circuits and Improving Cognition in the Aging Brain

PubMed Central

Gomes-Osman, Joyce; Indahlastari, Aprinda; Fried, Peter J.; Cabral, Danylo L. F.; Rice, Jordyn; Nissim, Nicole R.; Aksu, Serkan; McLaren, Molly E.; Woods, Adam J.

2018-01-01

The impact of cognitive aging on brain function and structure is complex, and the relationship between aging-related structural changes and cognitive function are not fully understood. Physiological and pathological changes to the aging brain are highly variable, making it difficult to estimate a cognitive trajectory with which to monitor the conversion to cognitive decline. Beyond the information on the structural and functional consequences of cognitive aging gained from brain imaging and neuropsychological studies, non-invasive brain stimulation techniques such as transcranial magnetic stimulation (TMS) and transcranial direct current stimulation (tDCS) can enable stimulation of the human brain in vivo, offering useful insights into the functional integrity of intracortical circuits using electrophysiology and neuromodulation. TMS measurements can be used to identify and monitor changes in cortical reactivity, the integrity of inhibitory and excitatory intracortical circuits, the mechanisms of long-term potentiation (LTP)/depression-like plasticity and central cholinergic function. Repetitive TMS and tDCS can be used to modulate neuronal excitability and enhance cortical function, and thus offer a potential means to slow or reverse cognitive decline. This review will summarize and critically appraise relevant literature regarding the use of TMS and tDCS to probe cortical areas affected by the aging brain, and as potential therapeutic tools to improve cognitive function in the aging population. Challenges arising from intra-individual differences, limited reproducibility, and methodological differences will be discussed.

Electro pneumatic trainer embedded with programmable integrated circuit (PIC) microcontroller and graphical user interface platform for aviation industries training purposes

NASA Astrophysics Data System (ADS)

Burhan, I.; Azman, A. A.; Othman, R.

2016-10-01

An electro pneumatic trainer embedded with programmable integrated circuit (PIC) microcontroller and Visual Basic (VB) platform is fabricated as a supporting tool to existing teaching and learning process, and to achieve the objectives and learning outcomes towards enhancing the student's knowledge and hands-on skill, especially in electro pneumatic devices. The existing learning process for electro pneumatic courses conducted in the classroom does not emphasize on simulation and complex practical aspects. VB is used as the platform for graphical user interface (GUI) while PIC as the interface circuit between the GUI and hardware of electro pneumatic apparatus. Fabrication of electro pneumatic trainer interfacing between PIC and VB has been designed and improved by involving multiple types of electro pneumatic apparatus such as linear drive, air motor, semi rotary motor, double acting cylinder and single acting cylinder. Newly fabricated electro pneumatic trainer microcontroller interface can be programmed and re-programmed for numerous combination of tasks. Based on the survey to 175 student participants, 97% of the respondents agreed that the newly fabricated trainer is user friendly, safe and attractive, and 96.8% of the respondents strongly agreed that there is improvement in knowledge development and also hands-on skill in their learning process. Furthermore, the Lab Practical Evaluation record has indicated that the respondents have improved their academic performance (hands-on skills) by an average of 23.5%.

Orosensory and Homeostatic Functions of the Insular Taste Cortex.

PubMed

de Araujo, Ivan E; Geha, Paul; Small, Dana M

2012-03-01

The gustatory aspect of the insular cortex is part of the brain circuit that controls ingestive behaviors based on chemosensory inputs. However, the sensory properties of foods are not restricted to taste and should also include salient features such as odor, texture, temperature, and appearance. Therefore, it is reasonable to hypothesize that specialized circuits within the central taste pathways must be involved in representing several other oral sensory modalities in addition to taste. In this review, we evaluate current evidence indicating that the insular gustatory cortex functions as an integrative circuit, with taste-responsive regions also showing heightened sensitivity to olfactory, somatosensory, and even visual stimulation. We also review evidence for modulation of taste-responsive insular areas by changes in physiological state, with taste-elicited neuronal responses varying according to the nutritional state of the organism. We then examine experimental support for a functional map within the insular cortex that might reflect the various sensory and homeostatic roles associated with this region. Finally, we evaluate the potential role of the taste insular cortex in weight-gain susceptibility. Taken together, the current experimental evidence favors the view that the insular gustatory cortex functions as an orosensory integrative system that not only enables the formation of complex flavor representations but also mediates their modulation by the internal state of the body, playing therefore a central role in food intake regulation.

Magnetophoretic circuits for digital control of single particles and cells

NASA Astrophysics Data System (ADS)

Lim, Byeonghwa; Reddy, Venu; Hu, Xinghao; Kim, Kunwoo; Jadhav, Mital; Abedini-Nassab, Roozbeh; Noh, Young-Woock; Lim, Yong Taik; Yellen, Benjamin B.; Kim, Cheolgi

2014-05-01

The ability to manipulate small fluid droplets, colloidal particles and single cells with the precision and parallelization of modern-day computer hardware has profound applications for biochemical detection, gene sequencing, chemical synthesis and highly parallel analysis of single cells. Drawing inspiration from general circuit theory and magnetic bubble technology, here we demonstrate a class of integrated circuits for executing sequential and parallel, timed operations on an ensemble of single particles and cells. The integrated circuits are constructed from lithographically defined, overlaid patterns of magnetic film and current lines. The magnetic patterns passively control particles similar to electrical conductors, diodes and capacitors. The current lines actively switch particles between different tracks similar to gated electrical transistors. When combined into arrays and driven by a rotating magnetic field clock, these integrated circuits have general multiplexing properties and enable the precise control of magnetizable objects.

Multi-format all-optical processing based on a large-scale, hybridly integrated photonic circuit.

PubMed

Bougioukos, M; Kouloumentas, Ch; Spyropoulou, M; Giannoulis, G; Kalavrouziotis, D; Maziotis, A; Bakopoulos, P; Harmon, R; Rogers, D; Harrison, J; Poustie, A; Maxwell, G; Avramopoulos, H

2011-06-06

We investigate through numerical studies and experiments the performance of a large scale, silica-on-silicon photonic integrated circuit for multi-format regeneration and wavelength-conversion. The circuit encompasses a monolithically integrated array of four SOAs inside two parallel Mach-Zehnder structures, four delay interferometers and a large number of silica waveguides and couplers. Exploiting phase-incoherent techniques, the circuit is capable of processing OOK signals at variable bit rates, DPSK signals at 22 or 44 Gb/s and DQPSK signals at 44 Gbaud. Simulation studies reveal the wavelength-conversion potential of the circuit with enhanced regenerative capabilities for OOK and DPSK modulation formats and acceptable quality degradation for DQPSK format. Regeneration of 22 Gb/s OOK signals with amplified spontaneous emission (ASE) noise and DPSK data signals degraded with amplitude, phase and ASE noise is experimentally validated demonstrating a power penalty improvement up to 1.5 dB.

System and method for interfacing large-area electronics with integrated circuit devices

DOEpatents

Verma, Naveen; Glisic, Branko; Sturm, James; Wagner, Sigurd

2016-07-12

A system and method for interfacing large-area electronics with integrated circuit devices is provided. The system may be implemented in an electronic device including a large area electronic (LAE) device disposed on a substrate. An integrated circuit IC is disposed on the substrate. A non-contact interface is disposed on the substrate and coupled between the LAE device and the IC. The non-contact interface is configured to provide at least one of a data acquisition path or control path between the LAE device and the IC.

Relay Protection and Automation Systems Based on Programmable Logic Integrated Circuits

DOE Office of Scientific and Technical Information (OSTI.GOV)

Lashin, A. V., E-mail: LashinAV@lhp.ru; Kozyrev, A. V.

One of the most promising forms of developing the apparatus part of relay protection and automation devices is considered. The advantages of choosing programmable logic integrated circuits to obtain adaptive technological algorithms in power system protection and control systems are pointed out. The technical difficulties in the problems which today stand in the way of using relay protection and automation systems are indicated and a new technology for solving these problems is presented. Particular attention is devoted to the possibility of reconfiguring the logic of these devices, using programmable logic integrated circuits.

Insulator photocurrents: Application to dose rate hardening of CMOS/SOI integrated circuits

DOE Office of Scientific and Technical Information (OSTI.GOV)

Dupont-Nivet, E.; Coiec, Y.M.; Flament, O.

1998-06-01

Irradiation of insulators with a pulse of high energy x-rays can induce photocurrents in the interconnections of integrated circuits. The authors present, here, a new method to measure and analyze this effect together with a simple model. They also demonstrate that these insulator photocurrents have to be taken into account to obtain high levels of dose-rate hardness with CMOS on SOI integrated circuits, especially flip-flops or memory blocks of ASICs. They show that it explains some of the upsets observed in a SRAM embedded in an ASIC.

Long-Term Characterization of 6H-SiC Transistor Integrated Circuit Technology Operating at 500 C

NASA Technical Reports Server (NTRS)

Neudeck, Philip G.; Spry, David J.; Chen, Liang-Yu; Chang, Carl W.; Beheim, Glenn M.; Okojie, Robert S.; Evans, Laura J.; Meredith Roger D.; Ferrier, Terry L.; Krasowski, Michael J.;

Spatially selective hydrogen irradiation of dilute nitride semiconductors: a brief review

NASA Astrophysics Data System (ADS)

Felici, Marco; Pettinari, Giorgio; Biccari, Francesco; Capizzi, Mario; Polimeni, Antonio

2018-05-01

We provide a brief survey of the most recent results obtained by performing spatially selective hydrogen irradiation of dilute nitride semiconductors. The striking effects of the formation of stable N–H complexes in these compounds—coupled to the ultrasharp diffusion profile of H therein—can be exploited to tailor the structural (lattice constant) and optoelectronic (energy gap, refractive index, electron effective mass) properties of the material in the growth plane, with a spatial resolution of a few nm. This can be applied to the fabrication of site-controlled quantum dots (QDs) and wires, but also to the realization of the optical elements required for the on-chip manipulation and routing of qubits in fully integrated photonic circuits. The fabricated QDs—which have shown the ability to emit single photons—can also be deterministically coupled with photonic crystal microcavities, proving their inherent suitability to act as integrated light sources in complex nanophotonic devices.

Photolithography-Based Patterning of Liquid Metal Interconnects for Monolithically Integrated Stretchable Circuits.

PubMed

Park, Chan Woo; Moon, Yu Gyeong; Seong, Hyejeong; Jung, Soon Won; Oh, Ji-Young; Na, Bock Soon; Park, Nae-Man; Lee, Sang Seok; Im, Sung Gap; Koo, Jae Bon

2016-06-22

We demonstrate a new patterning technique for gallium-based liquid metals on flat substrates, which can provide both high pattern resolution (∼20 μm) and alignment precision as required for highly integrated circuits. In a very similar manner as in the patterning of solid metal films by photolithography and lift-off processes, the liquid metal layer painted over the whole substrate area can be selectively removed by dissolving the underlying photoresist layer, leaving behind robust liquid patterns as defined by the photolithography. This quick and simple method makes it possible to integrate fine-scale interconnects with preformed devices precisely, which is indispensable for realizing monolithically integrated stretchable circuits. As a way for constructing stretchable integrated circuits, we propose a hybrid configuration composed of rigid device regions and liquid interconnects, which is constructed on a rigid substrate first but highly stretchable after being transferred onto an elastomeric substrate. This new method can be useful in various applications requiring both high-resolution and precisely aligned patterning of gallium-based liquid metals.

Integrated Optoelectronic Position Sensor for Scanning Micromirrors

PubMed Central

Cheng, Xiang; Sun, Xinglin; Liu, Yan; Zhu, Lijun; Zhang, Xiaoyang; Zhou, Liang

2018-01-01

Scanning micromirrors have been used in a wide range of areas, but many of them do not have position sensing built in, which significantly limits their application space. This paper reports an integrated optoelectronic position sensor (iOE-PS) that can measure the linear displacement and tilting angle of electrothermal MEMS (Micro-electromechanical Systems) scanning mirrors. The iOE-PS integrates a laser diode and its driving circuits, a quadrant photo-detector (QPD) and its readout circuits, and a band-gap reference all on a single chip, and it has been fabricated in a standard 0.5 μm CMOS (Complementary Metal Oxide Semiconductor) process. The footprint of the iOE-PS chip is 5 mm × 5 mm. Each quadrant of the QPD has a photosensitive area of 500 µm × 500 µm and the spacing between adjacent quadrants is 500 μm. The iOE-PS chip is simply packaged underneath of an electrothermally-actuated MEMS mirror. Experimental results show that the iOE-PS has a linear response when the MEMS mirror plate moves vertically between 2.0 mm and 3.0 mm over the iOE-PS chip or scans from −5 to +5°. Such MEMS scanning mirrors integrated with the iOE-PS can greatly reduce the complexity and cost of the MEMS mirrors-enabled modules and systems. PMID:29587451

Parallel-Processing Equalizers for Multi-Gbps Communications

NASA Technical Reports Server (NTRS)

Gray, Andrew; Ghuman, Parminder; Hoy, Scott; Satorius, Edgar H.

2004-01-01

Architectures have been proposed for the design of frequency-domain least-mean-square complex equalizers that would be integral parts of parallel- processing digital receivers of multi-gigahertz radio signals and other quadrature-phase-shift-keying (QPSK) or 16-quadrature-amplitude-modulation (16-QAM) of data signals at rates of multiple gigabits per second. Equalizers as used here denotes receiver subsystems that compensate for distortions in the phase and frequency responses of the broad-band radio-frequency channels typically used to convey such signals. The proposed architectures are suitable for realization in very-large-scale integrated (VLSI) circuitry and, in particular, complementary metal oxide semiconductor (CMOS) application- specific integrated circuits (ASICs) operating at frequencies lower than modulation symbol rates. A digital receiver of the type to which the proposed architecture applies (see Figure 1) would include an analog-to-digital converter (A/D) operating at a rate, fs, of 4 samples per symbol period. To obtain the high speed necessary for sampling, the A/D and a 1:16 demultiplexer immediately following it would be constructed as GaAs integrated circuits. The parallel-processing circuitry downstream of the demultiplexer, including a demodulator followed by an equalizer, would operate at a rate of only fs/16 (in other words, at 1/4 of the symbol rate). The output from the equalizer would be four parallel streams of in-phase (I) and quadrature (Q) samples.

Chip-integrated optical power limiter based on an all-passive micro-ring resonator

NASA Astrophysics Data System (ADS)

Yan, Siqi; Dong, Jianji; Zheng, Aoling; Zhang, Xinliang

2014-10-01

Recent progress in silicon nanophotonics has dramatically advanced the possible realization of large-scale on-chip optical interconnects integration. Adopting photons as information carriers can break the performance bottleneck of electronic integrated circuit such as serious thermal losses and poor process rates. However, in integrated photonics circuits, few reported work can impose an upper limit of optical power therefore prevent the optical device from harm caused by high power. In this study, we experimentally demonstrate a feasible integrated scheme based on a single all-passive micro-ring resonator to realize the optical power limitation which has a similar function of current limiting circuit in electronics. Besides, we analyze the performance of optical power limiter at various signal bit rates. The results show that the proposed device can limit the signal power effectively at a bit rate up to 20 Gbit/s without deteriorating the signal. Meanwhile, this ultra-compact silicon device can be completely compatible with the electronic technology (typically complementary metal-oxide semiconductor technology), which may pave the way of very large scale integrated photonic circuits for all-optical information processors and artificial intelligence systems.

Development of brain-wide connectivity architecture in awake rats.

PubMed

Ma, Zilu; Ma, Yuncong; Zhang, Nanyin

2018-08-01

Childhood and adolescence are both critical developmental periods, evidenced by complex neurophysiological changes the brain undergoes and high occurrence rates of neuropsychiatric disorders during these periods. Despite substantial progress in elucidating the developmental trajectories of individual neural circuits, our knowledge of developmental changes of whole-brain connectivity architecture in animals is sparse. To fill this gap, here we longitudinally acquired rsfMRI data in awake rats during five developmental stages from juvenile to adulthood. We found that the maturation timelines of brain circuits were heterogeneous and system specific. Functional connectivity (FC) tended to decrease in subcortical circuits, but increase in cortical circuits during development. In addition, the developing brain exhibited hemispheric functional specialization, evidenced by reduced inter-hemispheric FC between homotopic regions, and lower similarity of region-to-region FC patterns between the two hemispheres. Finally, we showed that whole-brain network development was characterized by reduced clustering (i.e. local communication) but increased integration (distant communication). Taken together, the present study has systematically characterized the development of brain-wide connectivity architecture from juvenile to adulthood in awake rats. It also serves as a critical reference point for understanding circuit- and network-level changes in animal models of brain development-related disorders. Furthermore, FC data during brain development in awake rodents contain high translational value and can shed light onto comparative neuroanatomy. Copyright © 2018 Elsevier Inc. All rights reserved.

An Integrated-Circuit Temperature Sensor for Calorimetry and Differential Temperature Measurement.

ERIC Educational Resources Information Center

Muyskens, Mark A.

1997-01-01

Describes the application of an integrated-circuit (IC) chip which provides an easy-to-use, inexpensive, rugged, computer-interfaceable temperature sensor for calorimetry and differential temperature measurement. Discusses its design and advantages. (JRH)

Magnet-wire wrapping tool for integrated circuits

NASA Technical Reports Server (NTRS)

Takahashi, T. H.

1972-01-01

Wire-dispensing tool which resembles mechanical pencil is used to wrap magnet wire around integrated circuit terminals uniformly and securely without damaging insulative coating on wire. Tool is hand-held and easily manipulated to execute wire wrapping movements.

A zirconium dioxide ammonia microsensor integrated with a readout circuit manufactured using the 0.18 μm CMOS process.

PubMed

Lin, Guan-Ming; Dai, Ching-Liang; Yang, Ming-Zhi

2013-03-15

The study presents an ammonia microsensor integrated with a readout circuit on-a-chip fabricated using the commercial 0.18 μm complementary metal oxide semiconductor (CMOS) process. The integrated sensor chip consists of a heater, an ammonia sensor and a readout circuit. The ammonia sensor is constructed by a sensitive film and the interdigitated electrodes. The sensitive film is zirconium dioxide that is coated on the interdigitated electrodes. The heater is used to provide a working temperature to the sensitive film. A post-process is employed to remove the sacrificial layer and to coat zirconium dioxide on the sensor. When the sensitive film adsorbs or desorbs ammonia gas, the sensor produces a change in resistance. The readout circuit converts the resistance variation of the sensor into the output voltage. The experiments show that the integrated ammonia sensor has a sensitivity of 4.1 mV/ppm.

Dendritic nonlinearities are tuned for efficient spike-based computations in cortical circuits.

PubMed

Ujfalussy, Balázs B; Makara, Judit K; Branco, Tiago; Lengyel, Máté

2015-12-24

Cortical neurons integrate thousands of synaptic inputs in their dendrites in highly nonlinear ways. It is unknown how these dendritic nonlinearities in individual cells contribute to computations at the level of neural circuits. Here, we show that dendritic nonlinearities are critical for the efficient integration of synaptic inputs in circuits performing analog computations with spiking neurons. We developed a theory that formalizes how a neuron's dendritic nonlinearity that is optimal for integrating synaptic inputs depends on the statistics of its presynaptic activity patterns. Based on their in vivo preynaptic population statistics (firing rates, membrane potential fluctuations, and correlations due to ensemble dynamics), our theory accurately predicted the responses of two different types of cortical pyramidal cells to patterned stimulation by two-photon glutamate uncaging. These results reveal a new computational principle underlying dendritic integration in cortical neurons by suggesting a functional link between cellular and systems--level properties of cortical circuits.

Monolithic circuits for barium fluoride detectors used in nuclear physics experiments. CRADA final report

DOE Office of Scientific and Technical Information (OSTI.GOV)

Varner, R.L.; Blankenship, J.L.; Beene, J.R.

1998-02-01

Custom monolithic electronic circuits have been developed recently for large detector applications in high energy physics where subsystems require tens of thousands of channels of signal processing and data acquisition. In the design and construction of these enormous detectors, it has been found that monolithic circuits offer significant advantages over discrete implementations through increased performance, flexible packaging, lower power and reduced cost per channel. Much of the integrated circuit design for the high energy physics community is directly applicable to intermediate energy heavy-ion and electron physics. This STTR project conducted in collaboration with researchers at the Holifield Radioactive Ion Beammore » Facility (HRIBF) at Oak Ridge National Laboratory, sought to develop a new integrated circuit chip set for barium fluoride (BaF{sub 2}) detector arrays based upon existing CMOS monolithic circuit designs created for the high energy physics experiments. The work under the STTR Phase 1 demonstrated through the design, simulation, and testing of several prototype chips the feasibility of using custom CMOS integrated circuits for processing signals from BaF{sub 2} detectors. Function blocks including charge-sensitive amplifiers, comparators, one shots, time-to-amplitude converters, analog memory circuits and buffer amplifiers were implemented during Phase 1 effort. Experimental results from bench testing and laboratory testing with sources were documented.« less

MET receptor tyrosine kinase controls dendritic complexity, spine morphogenesis, and glutamatergic synapse maturation in the hippocampus.

PubMed

Qiu, Shenfeng; Lu, Zhongming; Levitt, Pat

2014-12-03

The MET receptor tyrosine kinase (RTK), implicated in risk for autism spectrum disorder (ASD) and in functional and structural circuit integrity in humans, is a temporally and spatially regulated receptor enriched in dorsal pallial-derived structures during mouse forebrain development. Here we report that loss or gain of function of MET in vitro or in vivo leads to changes, opposite in nature, in dendritic complexity, spine morphogenesis, and the timing of glutamatergic synapse maturation onto hippocampus CA1 neurons. Consistent with the morphological and biochemical changes, deletion of Met in mutant mice results in precocious maturation of excitatory synapse, as indicated by a reduction of the proportion of silent synapses, a faster GluN2A subunit switch, and an enhanced acquisition of AMPA receptors at synaptic sites. Thus, MET-mediated signaling appears to serve as a mechanism for controlling the timing of neuronal growth and functional maturation. These studies suggest that mistimed maturation of glutamatergic synapses leads to the aberrant neural circuits that may be associated with ASD risk. Copyright © 2014 the authors 0270-6474/14/3416166-14$15.00/0.

MET Receptor Tyrosine Kinase Controls Dendritic Complexity, Spine Morphogenesis, and Glutamatergic Synapse Maturation in the Hippocampus

PubMed Central

Lu, Zhongming; Levitt, Pat

2014-01-01

The MET receptor tyrosine kinase (RTK), implicated in risk for autism spectrum disorder (ASD) and in functional and structural circuit integrity in humans, is a temporally and spatially regulated receptor enriched in dorsal pallial-derived structures during mouse forebrain development. Here we report that loss or gain of function of MET in vitro or in vivo leads to changes, opposite in nature, in dendritic complexity, spine morphogenesis, and the timing of glutamatergic synapse maturation onto hippocampus CA1 neurons. Consistent with the morphological and biochemical changes, deletion of Met in mutant mice results in precocious maturation of excitatory synapse, as indicated by a reduction of the proportion of silent synapses, a faster GluN2A subunit switch, and an enhanced acquisition of AMPA receptors at synaptic sites. Thus, MET-mediated signaling appears to serve as a mechanism for controlling the timing of neuronal growth and functional maturation. These studies suggest that mistimed maturation of glutamatergic synapses leads to the aberrant neural circuits that may be associated with ASD risk. PMID:25471559

Capillarics: pre-programmed, self-powered microfluidic circuits built from capillary elements.

PubMed

Safavieh, Roozbeh; Juncker, David

2013-11-07

Microfluidic capillary systems employ surface tension effects to manipulate liquids, and are thus self-powered and self-regulated as liquid handling is structurally and chemically encoded in microscale conduits. However, capillary systems have been limited to perform simple fluidic operations. Here, we introduce complex capillary flow circuits that encode sequential flow of multiple liquids with distinct flow rates and flow reversal. We first introduce two novel microfluidic capillary elements including (i) retention burst valves and (ii) robust low aspect ratio trigger valves. These elements are combined with flow resistors, capillary retention valves, capillary pumps, and open and closed reservoirs to build a capillary circuit that, following sample addition, autonomously delivers a defined sequence of multiple chemicals according to a preprogrammed and predetermined flow rate and time. Such a circuit was used to measure the concentration of C-reactive protein. This work illustrates that as in electronics, complex capillary circuits may be built by combining simple capillary elements. We define such circuits as "capillarics", and introduce symbolic representations. We believe that more complex circuits will become possible by expanding the library of building elements and formulating abstract design rules.

Flagellar region 3b supports strong expression of integrated DNA and the highest chromosomal integration efficiency of the Escherichia coli flagellar regions.

PubMed

Juhas, Mario; Ajioka, James W

2015-07-01

The Gram-negative bacterium Escherichia coli is routinely used as the chassis for a variety of biotechnology and synthetic biology applications. Identification and analysis of reliable chromosomal integration and expression target loci is crucial for E. coli engineering. Chromosomal loci differ significantly in their ability to support integration and expression of the integrated genetic circuits. In this study, we investigate E. coli K12 MG1655 flagellar regions 2 and 3b. Integration of the genetic circuit into seven and nine highly conserved genes of the flagellar regions 2 (motA, motB, flhD, flhE, cheW, cheY and cheZ) and 3b (fliE, F, G, J, K, L, M, P, R), respectively, showed significant variation in their ability to support chromosomal integration and expression of the integrated genetic circuit. While not reducing the growth of the engineered strains, the integrations into all 16 target sites led to the loss of motility. In addition to high expression, the flagellar region 3b supports the highest efficiency of integration of all E. coli K12 MG1655 flagellar regions and is therefore potentially the most suitable for the integration of synthetic genetic circuits. © 2015 The Authors. Microbial Biotechnology published by John Wiley & Sons Ltd and Society for Applied Microbiology.

Compact Interconnection Networks Based on Quantum Dots

NASA Technical Reports Server (NTRS)

Fijany, Amir; Toomarian, Nikzad; Modarress, Katayoon; Spotnitz, Matthew

2003-01-01

Architectures that would exploit the distinct characteristics of quantum-dot cellular automata (QCA) have been proposed for digital communication networks that connect advanced digital computing circuits. In comparison with networks of wires in conventional very-large-scale integrated (VLSI) circuitry, the networks according to the proposed architectures would be more compact. The proposed architectures would make it possible to implement complex interconnection schemes that are required for some advanced parallel-computing algorithms and that are difficult (and in many cases impractical) to implement in VLSI circuitry. The difficulty of implementation in VLSI and the major potential advantage afforded by QCA were described previously in Implementing Permutation Matrices by Use of Quantum Dots (NPO-20801), NASA Tech Briefs, Vol. 25, No. 10 (October 2001), page 42. To recapitulate: Wherever two wires in a conventional VLSI circuit cross each other and are required not to be in electrical contact with each other, there must be a layer of electrical insulation between them. This, in turn, makes it necessary to resort to a noncoplanar and possibly a multilayer design, which can be complex, expensive, and even impractical. As a result, much of the cost of designing VLSI circuits is associated with minimization of data routing and assignment of layers to minimize crossing of wires. Heretofore, these considerations have impeded the development of VLSI circuitry to implement complex, advanced interconnection schemes. On the other hand, with suitable design and under suitable operating conditions, QCA-based signal paths can be allowed to cross each other in the same plane without adverse effect. In principle, this characteristic could be exploited to design compact, coplanar, simple (relative to VLSI) QCA-based networks to implement complex, advanced interconnection schemes. The proposed architectures require two advances in QCA-based circuitry beyond basic QCA-based binary-signal wires described in the cited prior article. One of these advances would be the development of QCA-based wires capable of bidirectional transmission of signals. The other advance would be the development of QCA circuits capable of high-impedance state outputs. The high-impedance states would be utilized along with the 0- and 1-state outputs of QCA.

Novel immunoassay formats for integrated microfluidic circuits: diffusion immunoassays (DIA)

NASA Astrophysics Data System (ADS)

Weigl, Bernhard H.; Hatch, Anson; Kamholz, Andrew E.; Yager, Paul

2000-03-01

Novel designs of integrated fluidic microchips allow separations, chemical reactions, and calibration-free analytical measurements to be performed directly in very small quantities of complex samples such as whole blood and contaminated environmental samples. This technology lends itself to applications such as clinical diagnostics, including tumor marker screening, and environmental sensing in remote locations. Lab-on-a-Chip based systems offer many *advantages over traditional analytical devices: They consume extremely low volumes of both samples and reagents. Each chip is inexpensive and small. The sampling-to-result time is extremely short. They perform all analytical functions, including sampling, sample pretreatment, separation, dilution, and mixing steps, chemical reactions, and detection in an integrated microfluidic circuit. Lab-on-a-Chip systems enable the design of small, portable, rugged, low-cost, easy to use, yet extremely versatile and capable diagnostic instruments. In addition, fluids flowing in microchannels exhibit unique characteristics ('microfluidics'), which allow the design of analytical devices and assay formats that would not function on a macroscale. Existing Lab-on-a-chip technologies work very well for highly predictable and homogeneous samples common in genetic testing and drug discovery processes. One of the biggest challenges for current Labs-on-a-chip, however, is to perform analysis in the presence of the complexity and heterogeneity of actual samples such as whole blood or contaminated environmental samples. Micronics has developed a variety of Lab-on-a-Chip assays that can overcome those shortcomings. We will now present various types of novel Lab- on-a-Chip-based immunoassays, including the so-called Diffusion Immunoassays (DIA) that are based on the competitive laminar diffusion of analyte molecules and tracer molecules into a region of the chip containing antibodies that target the analyte molecules. Advantages of this technique are a reduction in reagents, higher sensitivity, minimal preparation of complex samples such as blood, real-time calibration, and extremely rapid analysis.

Modular thought in the circuit analysis

NASA Astrophysics Data System (ADS)

Wang, Feng

2018-04-01

Applied to solve the problem of modular thought, provides a whole for simplification's method, the complex problems have become of, and the study of circuit is similar to the above problems: the complex connection between components, make the whole circuit topic solution seems to be more complex, and actually components the connection between the have rules to follow, this article mainly tells the story of study on the application of the circuit modular thought. First of all, this paper introduces the definition of two-terminal network and the concept of two-terminal network equivalent conversion, then summarizes the common source resistance hybrid network modular approach, containing controlled source network modular processing method, lists the common module, typical examples analysis.

Photonic Integrated Circuits

NASA Technical Reports Server (NTRS)

Krainak, Michael; Merritt, Scott

2016-01-01

Integrated photonics generally is the integration of multiple lithographically defined photonic and electronic components and devices (e.g. lasers, detectors, waveguides passive structures, modulators, electronic control and optical interconnects) on a single platform with nanometer-scale feature sizes. The development of photonic integrated circuits permits size, weight, power and cost reductions for spacecraft microprocessors, optical communication, processor buses, advanced data processing, and integrated optic science instrument optical systems, subsystems and components. This is particularly critical for small spacecraft platforms. We will give an overview of some NASA applications for integrated photonics.

Waveshaping electronic circuit

NASA Technical Reports Server (NTRS)

Harper, T. P.

1971-01-01

Circuit provides output signal with sinusoidal function in response to bipolar transition of input signal. Instantaneous transition shapes into linear rate of change and linear rate of change shapes into sinusoidal rate of change. Circuit contains only active components; therefore, compatibility with integrated circuit techniques is assured.

Conception et realisation d'un echantillonneur de grande vitesse en technologie HIGFET (transistor a effet de champ avec heterostructure et grille isolee)

NASA Astrophysics Data System (ADS)

Tazlauanu, Mihai

The research work reported in this thesis details a new fabrication technology for high speed integrated circuits in the broadest sense, including original contributions to device modeling, circuit simulation, integrated circuit design, wafer fabrication, micro-physical and electrical characterization, process flow and final device testing as part of an electrical system. The primary building block of this technology is the heterostructure insulated gate field effect transistor, HIGFET. We used an InP/InGaAs epitaxial heterostructure to ensure a high charge carrier mobility and hence obtain a higher operating frequency than that currently possible for silicon devices. We designed and built integrated circuits with two system architectures. The first architecture integrates the clock signal generator with the sample and hold circuitry on the InP die, while the second is a hybrid architecture of an InP sample and hold assembled with an external clock signal generator made with ECL circuits on GaAs. To generate the clock signals on the same die with the sample and hold circuits, we developed a digital circuit family based on an original inverter, appropriate for depletion mode NMOS technology. We used this circuit to design buffer amplifiers and ring oscillators. Four mask sets produced in a Cadence environment, have permitted the fabrication of test and working devices. Each new mask generation has reflected the previous achievements and has implemented new structures and circuit techniques. The fabrication technology has undergone successive modifications and refinements to optimize device manufacturing. Particular attention has been paid to the technological robustness. The plasma enhanced etching process (RIE) had been used for an exhaustive study for the statistical simulation of the technological steps. Electrical measurements, performed on the experimental samples, have permitted the modeling of the devices, technological processing to be adjusted and circuit design improved. Electrical measurements performed on dedicated test structures, during the fabrication cycle, allowed the identification and correction of some technological problems (ohmic contacts, current leakage, interconnection integrity, and thermal instabilities). Feedback corrections were validated by dedicated experiments with the experimental effort optimized by statistical techniques (factorial fractional design). (Abstract shortened by UMI.)

Playing Tic-Tac-Toe with a Sugar-Based Molecular Computer.

PubMed

Elstner, M; Schiller, A

2015-08-24

Today, molecules can perform Boolean operations and circuits at a level of higher complexity. However, concatenation of logic gates and inhomogeneous inputs and outputs are still challenging tasks. Novel approaches for logic gate integration are possible when chemical programming and software programming are combined. Here it is shown that a molecular finite automaton based on the concatenated implication function (IMP) of a fluorescent two-component sugar probe via a wiring algorithm is able to play tic-tac-toe.

Geometry of Quantum Computation with Qudits

PubMed Central

Luo, Ming-Xing; Chen, Xiu-Bo; Yang, Yi-Xian; Wang, Xiaojun

2014-01-01

The circuit complexity of quantum qubit system evolution as a primitive problem in quantum computation has been discussed widely. We investigate this problem in terms of qudit system. Using the Riemannian geometry the optimal quantum circuits are equivalent to the geodetic evolutions in specially curved parametrization of SU(dn). And the quantum circuit complexity is explicitly dependent of controllable approximation error bound. PMID:24509710

Monolithic 3D CMOS Using Layered Semiconductors.

PubMed

Sachid, Angada B; Tosun, Mahmut; Desai, Sujay B; Hsu, Ching-Yi; Lien, Der-Hsien; Madhvapathy, Surabhi R; Chen, Yu-Ze; Hettick, Mark; Kang, Jeong Seuk; Zeng, Yuping; He, Jr-Hau; Chang, Edward Yi; Chueh, Yu-Lun; Javey, Ali; Hu, Chenming

2016-04-06

Monolithic 3D integrated circuits using transition metal dichalcogenide materials and low-temperature processing are reported. A variety of digital and analog circuits are implemented on two sequentially integrated layers of devices. Inverter circuit operation at an ultralow supply voltage of 150 mV is achieved, paving the way to high-density, ultralow-voltage, and ultralow-power applications. © 2016 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

Neuronal integration of dynamic sources: Bayesian learning and Bayesian inference.

PubMed

Siegelmann, Hava T; Holzman, Lars E

2010-09-01

One of the brain's most basic functions is integrating sensory data from diverse sources. This ability causes us to question whether the neural system is computationally capable of intelligently integrating data, not only when sources have known, fixed relative dependencies but also when it must determine such relative weightings based on dynamic conditions, and then use these learned weightings to accurately infer information about the world. We suggest that the brain is, in fact, fully capable of computing this parallel task in a single network and describe a neural inspired circuit with this property. Our implementation suggests the possibility that evidence learning requires a more complex organization of the network than was previously assumed, where neurons have different specialties, whose emergence brings the desired adaptivity seen in human online inference.

Comprehensive photonics-electronics convergent simulation and its application to high-speed electronic circuit integration on a Si/Ge photonic chip

NASA Astrophysics Data System (ADS)

Takeda, Kotaro; Honda, Kentaro; Takeya, Tsutomu; Okazaki, Kota; Hiraki, Tatsurou; Tsuchizawa, Tai; Nishi, Hidetaka; Kou, Rai; Fukuda, Hiroshi; Usui, Mitsuo; Nosaka, Hideyuki; Yamamoto, Tsuyoshi; Yamada, Koji

2015-01-01

We developed a design technique for a photonics-electronics convergence system by using an equivalent circuit of optical devices in an electrical circuit simulator. We used the transfer matrix method to calculate the response of an optical device. This method used physical parameters and dimensions of optical devices as calculation parameters to design a device in the electrical circuit simulator. It also used an intermediate frequency to express the wavelength dependence of optical devices. By using both techniques, we simulated bit error rates and eye diagrams of optical and electrical integrated circuits and calculated influences of device structure change and wavelength shift penalty.

Interface For MIL-STD-1553B Data Bus

NASA Technical Reports Server (NTRS)

Davies, Bryan L.; Osborn, Stephen H.; Sullender, Craig C.

1993-01-01

Electronic control-logic subsystem acts as interface between microcontroller and MIL-STD-1553B data bus. Subsystem made of relatively small number of integrated circuits. Advantages include low power, few integrated-circuit chips, and little need for control signals.

Package Holds Five Monolithic Microwave Integrated Circuits

NASA Technical Reports Server (NTRS)

Mysoor, Narayan R.; Decker, D. Richard; Olson, Hilding M.

1996-01-01

Packages protect and hold monolithic microwave integrated circuit (MMIC) chips while providing dc and radio-frequency (RF) electrical connections for chips undergoing development. Required to be compact, lightweight, and rugged. Designed to minimize undesired resonances, reflections, losses, and impedance mismatches.

Integrated neuron circuit for implementing neuromorphic system with synaptic device

NASA Astrophysics Data System (ADS)

Lee, Jeong-Jun; Park, Jungjin; Kwon, Min-Woo; Hwang, Sungmin; Kim, Hyungjin; Park, Byung-Gook

2018-02-01

In this paper, we propose and fabricate Integrate & Fire neuron circuit for implementing neuromorphic system. Overall operation of the circuit is verified by measuring discrete devices and the output characteristics of the circuit. Since the neuron circuit shows asymmetric output characteristic that can drive synaptic device with Spike-Timing-Dependent-Plasticity (STDP) characteristic, the autonomous weight update process is also verified by connecting the synaptic device and the neuron circuit. The timing difference of the pre-neuron and the post-neuron induce autonomous weight change of the synaptic device. Unlike 2-terminal devices, which is frequently used to implement neuromorphic system, proposed scheme of the system enables autonomous weight update and simple configuration by using 4-terminal synapse device and appropriate neuron circuit. Weight update process in the multi-layer neuron-synapse connection ensures implementation of the hardware-based artificial intelligence, based on Spiking-Neural- Network (SNN).

System-Level Integrated Circuit (SLIC) Technology Development for Phased Array Antenna Applications

NASA Technical Reports Server (NTRS)

Windyka, John A.; Zablocki, Ed G.

1997-01-01

This report documents the efforts and progress in developing a 'system-level' integrated circuit, or SLIC, for application in advanced phased array antenna systems. The SLIC combines radio-frequency (RF) microelectronics, digital and analog support circuitry, and photonic interfaces into a single micro-hybrid assembly. Together, these technologies provide not only the amplitude and phase control necessary for electronic beam steering in the phased array, but also add thermally-compensated automatic gain control, health and status feedback, bias regulation, and reduced interconnect complexity. All circuitry is integrated into a compact, multilayer structure configured for use as a two-by-four element phased array module, operating at 20 Gigahertz, using a Microwave High-Density Interconnect (MHDI) process. The resultant hardware is constructed without conventional wirebonds, maintains tight inter-element spacing, and leads toward low-cost mass production. The measured performances and development issues associated with both the two-by-four element module and the constituent elements are presented. Additionally, a section of the report describes alternative architectures and applications supported by the SLIC electronics. Test results show excellent yield and performance of RF circuitry and full automatic gain control for multiple, independent channels. Digital control function, while suffering from lower manufacturing yield, also proved successful.

Broadband image sensor array based on graphene-CMOS integration

NASA Astrophysics Data System (ADS)

Goossens, Stijn; Navickaite, Gabriele; Monasterio, Carles; Gupta, Shuchi; Piqueras, Juan José; Pérez, Raúl; Burwell, Gregory; Nikitskiy, Ivan; Lasanta, Tania; Galán, Teresa; Puma, Eric; Centeno, Alba; Pesquera, Amaia; Zurutuza, Amaia; Konstantatos, Gerasimos; Koppens, Frank

2017-06-01

Integrated circuits based on complementary metal-oxide-semiconductors (CMOS) are at the heart of the technological revolution of the past 40 years, enabling compact and low-cost microelectronic circuits and imaging systems. However, the diversification of this platform into applications other than microcircuits and visible-light cameras has been impeded by the difficulty to combine semiconductors other than silicon with CMOS. Here, we report the monolithic integration of a CMOS integrated circuit with graphene, operating as a high-mobility phototransistor. We demonstrate a high-resolution, broadband image sensor and operate it as a digital camera that is sensitive to ultraviolet, visible and infrared light (300-2,000 nm). The demonstrated graphene-CMOS integration is pivotal for incorporating 2D materials into the next-generation microelectronics, sensor arrays, low-power integrated photonics and CMOS imaging systems covering visible, infrared and terahertz frequencies.

Packaging Of Control Circuits In A Robot Arm

NASA Technical Reports Server (NTRS)

Kast, William

1994-01-01

Packaging system houses and connects control circuitry mounted on circuit boards within shoulder, upper section, and lower section of seven-degree-of-freedom robot arm. Has modular design that incorporates surface-mount technology, multilayer circuit boards, large-scale integrated circuits, and multi-layer flat cables between sections for compactness. Three sections of robot arm contain circuit modules in form of stardardized circuit boards. Each module contains two printed-circuit cards, one of each face.

Bit-Serial Adder Based on Quantum Dots

NASA Technical Reports Server (NTRS)

Fijany, Amir; Toomarian, Nikzad; Modarress, Katayoon; Spotnitz, Mathew

2003-01-01

A proposed integrated circuit based on quantum-dot cellular automata (QCA) would function as a bit-serial adder. This circuit would serve as a prototype building block for demonstrating the feasibility of quantum-dots computing and for the further development of increasingly complex and increasingly capable quantum-dots computing circuits. QCA-based bit-serial adders would be especially useful in that they would enable the development of highly parallel and systolic processors for implementing fast Fourier, cosine, Hartley, and wavelet transforms. The proposed circuit would complement the QCA-based circuits described in "Implementing Permutation Matrices by Use of Quantum Dots" (NPO-20801), NASA Tech Briefs, Vol. 25, No. 10 (October 2001), page 42 and "Compact Interconnection Networks Based on Quantum Dots" (NPO-20855), which appears elsewhere in this issue. Those articles described the limitations of very-large-scale-integrated (VLSI) circuitry and the major potential advantage afforded by QCA. To recapitulate: In a VLSI circuit, signal paths that are required not to interact with each other must not cross in the same plane. In contrast, for reasons too complex to describe in the limited space available for this article, suitably designed and operated QCA-based signal paths that are required not to interact with each other can nevertheless be allowed to cross each other in the same plane without adverse effect. In principle, this characteristic could be exploited to design compact, coplanar, simple (relative to VLSI) QCA-based networks to implement complex, advanced interconnection schemes. To enable a meaningful description of the proposed bit-serial adder, it is necessary to further recapitulate the description of a quantum-dot cellular automation from the first-mentioned prior article: A quantum-dot cellular automaton contains four quantum dots positioned at the corners of a square cell. The cell contains two extra mobile electrons that can tunnel (in the quantum-mechanical sense) between neighboring dots within the cell. The Coulomb repulsion between the two electrons tends to make them occupy antipodal dots in the cell. For an isolated cell, there are two energetically equivalent arrangements (denoted polarization states) of the extra electrons. The cell polarization is used to encode binary information. Because the polarization of a nonisolated cell depends on Coulomb-repulsion interactions with neighboring cells, universal logic gates and binary wires could be constructed, in principle, by arraying QCA of suitable design in suitable patterns. Again, for reasons too complex to describe here, in order to ensure accuracy and timeliness of the output of a QCA array, it is necessary to resort to an adiabatic switching scheme in which the QCA array is divided into subarrays, each controlled by a different phase of a multiphase clock signal. In this scheme, each subarray is given time to perform its computation, then its state is frozen by raising its inter-dot potential barriers and its output is fed as the input to the successor subarray. The successor subarray is kept in an unpolarized state so it does not influence the calculation of preceding subarray. Such a clocking scheme is consistent with pipeline computation in the sense that each different subarray can perform a different part of an overall computation. In other words, QCA arrays are inherently suitable for pipeline and, moreover, systolic computations. This sequential or pipeline aspect of QCA would be utilized in the proposed bit-serial adders.

Assessment of Durable SiC JFET Technology for +600 C to -125 C Integrated Circuit Operation

NASA Technical Reports Server (NTRS)

Neudeck, P. G.; Krasowski, M. J.; Prokop, N. F.

2011-01-01

Electrical characteristics and circuit design considerations for prototype 6H-SiC JFET integrated circuits (ICs) operating over the broad temperature range of -125 C to +600 C are described. Strategic implementation of circuits with transistors and resistors in the same 6H-SiC n-channel layer enabled ICs with nearly temperature-independent functionality to be achieved. The frequency performance of the circuits declined at temperatures increasingly below or above room temperature, roughly corresponding to the change in 6H-SiC n-channel resistance arising from incomplete carrier ionization at low temperature and decreased electron mobility at high temperature. In addition to very broad temperature functionality, these simple digital and analog demonstration integrated circuits successfully operated with little change in functional characteristics over the course of thousands of hours at 500 C before experiencing interconnect-related failures. With appropriate further development, these initial results establish a new technology foundation for realizing durable 500 C ICs for combustion engine sensing and control, deep-well drilling, and other harsh-environment applications.

Nonlinear system analysis in bipolar integrated circuits

NASA Astrophysics Data System (ADS)

Fang, T. F.; Whalen, J. J.

1980-01-01

Since analog bipolar integrated circuits (IC's) have become important components in modern communication systems, the study of the Radio Frequency Interference (RFI) effects in bipolar IC amplifiers is an important subject for electromagnetic compatibility (EMC) engineering. The investigation has focused on using the nonlinear circuit analysis program (NCAP) to predict RF demodulation effects in broadband bipolar IC amplifiers. The audio frequency (AF) voltage at the IC amplifier output terminal caused by an amplitude modulated (AM) RF signal at the IC amplifier input terminal was calculated and compared to measured values. Two broadband IC amplifiers were investigated: (1) a cascode circuit using a CA3026 dual differential pair; (2) a unity gain voltage follower circuit using a micro A741 operational amplifier (op amp). Before using NCAP for RFI analysis, the model parameters for each bipolar junction transistor (BJT) in the integrated circuit were determined. Probe measurement techniques, manufacturer's data, and other researcher's data were used to obtain the required NCAP BJT model parameter values. An important contribution included in this effort is a complete set of NCAP BJT model parameters for most of the transistor types used in linear IC's.

Capacitive charge generation apparatus and method for testing circuits

DOEpatents

Cole, E.I. Jr.; Peterson, K.A.; Barton, D.L.

1998-07-14

An electron beam apparatus and method for testing a circuit are disclosed. The electron beam apparatus comprises an electron beam incident on an outer surface of an insulating layer overlying one or more electrical conductors of the circuit for generating a time varying or alternating current electrical potential on the surface; and a measurement unit connected to the circuit for measuring an electrical signal capacitively coupled to the electrical conductors to identify and map a conduction state of each of the electrical conductors, with or without an electrical bias signal being applied to the circuit. The electron beam apparatus can further include a secondary electron detector for forming a secondary electron image for registration with a map of the conduction state of the electrical conductors. The apparatus and method are useful for failure analysis or qualification testing to determine the presence of any open-circuits or short-circuits, and to verify the continuity or integrity of electrical conductors buried below an insulating layer thickness of 1-100 {micro}m or more without damaging or breaking down the insulating layer. The types of electrical circuits that can be tested include integrated circuits, multi-chip modules, printed circuit boards and flexible printed circuits. 7 figs.

Capacitive charge generation apparatus and method for testing circuits

DOEpatents

Cole, Jr., Edward I.; Peterson, Kenneth A.; Barton, Daniel L.

1998-01-01

An electron beam apparatus and method for testing a circuit. The electron beam apparatus comprises an electron beam incident on an outer surface of an insulating layer overlying one or more electrical conductors of the circuit for generating a time varying or alternating current electrical potential on the surface; and a measurement unit connected to the circuit for measuring an electrical signal capacitively coupled to the electrical conductors to identify and map a conduction state of each of the electrical conductors, with or without an electrical bias signal being applied to the circuit. The electron beam apparatus can further include a secondary electron detector for forming a secondary electron image for registration with a map of the conduction state of the electrical conductors. The apparatus and method are useful for failure analysis or qualification testing to determine the presence of any open-circuits or short-circuits, and to verify the continuity or integrity of electrical conductors buried below an insulating layer thickness of 1-100 .mu.m or more without damaging or breaking down the insulating layer. The types of electrical circuits that can be tested include integrated circuits, multi-chip modules, printed circuit boards and flexible printed circuits.

Lightwave Circuits in Lithium Niobate through Hybrid Waveguides with Silicon Photonics

PubMed Central

Weigel, Peter O.; Savanier, Marc; DeRose, Christopher T.; Pomerene, Andrew T.; Starbuck, Andrew L.; Lentine, Anthony L.; Stenger, Vincent; Mookherjea, Shayan

2016-01-01

We demonstrate a photonic waveguide technology based on a two-material core, in which light is controllably and repeatedly transferred back and forth between sub-micron thickness crystalline layers of Si and LN bonded to one another, where the former is patterned and the latter is not. In this way, the foundry-based wafer-scale fabrication technology for silicon photonics can be leveraged to form lithium-niobate based integrated optical devices. Using two different guided modes and an adiabatic mode transition between them, we demonstrate a set of building blocks such as waveguides, bends, and couplers which can be used to route light underneath an unpatterned slab of LN, as well as outside the LN-bonded region, thus enabling complex and compact lightwave circuits in LN alongside Si photonics with fabrication ease and low cost. PMID:26927022

Lightwave Circuits in Lithium Niobate through Hybrid Waveguides with Silicon Photonics.

PubMed

Weigel, Peter O; Savanier, Marc; DeRose, Christopher T; Pomerene, Andrew T; Starbuck, Andrew L; Lentine, Anthony L; Stenger, Vincent; Mookherjea, Shayan

2016-03-01

We demonstrate a photonic waveguide technology based on a two-material core, in which light is controllably and repeatedly transferred back and forth between sub-micron thickness crystalline layers of Si and LN bonded to one another, where the former is patterned and the latter is not. In this way, the foundry-based wafer-scale fabrication technology for silicon photonics can be leveraged to form lithium-niobate based integrated optical devices. Using two different guided modes and an adiabatic mode transition between them, we demonstrate a set of building blocks such as waveguides, bends, and couplers which can be used to route light underneath an unpatterned slab of LN, as well as outside the LN-bonded region, thus enabling complex and compact lightwave circuits in LN alongside Si photonics with fabrication ease and low cost.

High stability amplifier

NASA Technical Reports Server (NTRS)

Adams, W. A.; Reinhardt, V. S. (Inventor)

1983-01-01

An electrical RF signal amplifier for providing high temperature stability and RF isolation and comprised of an integrated circuit voltage regulator, a single transistor, and an integrated circuit operational amplifier mounted on a circuit board such that passive circuit elements are located on side of the circuit board while the active circuit elements are located on the other side is described. The active circuit elements are embedded in a common heat sink so that a common temperature reference is provided for changes in ambient temperature. The single transistor and operational amplifier are connected together to form a feedback amplifier powered from the voltage regulator with transistor implementing primarily the desired signal gain while the operational amplifier implements signal isolation. Further RF isolation is provided by the voltage regulator which inhibits cross-talk from other like amplifiers powered from a common power supply. Input and output terminals consisting of coaxial connectors are located on the sides of a housing in which all the circuit components and heat sink are located.

Two integrator loop quadrature oscillators: A review.

PubMed

Soliman, Ahmed M

2013-01-01

A review of the two integrator loop oscillator circuits providing two quadrature sinusoidal output voltages is given. All the circuits considered employ the minimum number of capacitors namely two except one circuit which uses three capacitors. The circuits considered are classified to four different classes. The first class includes floating capacitors and floating resistors and the active building blocks realizing these circuits are the Op Amp or the OTRA. The second class employs grounded capacitors and includes floating resistors and the active building blocks realizing these circuits are the DCVC or the unity gain cells or the CFOA. The third class employs grounded capacitors and grounded resistors and the active building blocks realizing these circuits are the CCII. The fourth class employs grounded capacitors and no resistors and the active building blocks realizing these circuits are the TA. Transformation methods showing the generation of different classes from each other is given in details and this is one of the main objectives of this paper.

Implementation of Basic and Universal Gates In a single Circuit Based On Quantum-dot Cellular Automata Using Multi-Layer Crossbar Wire

NASA Astrophysics Data System (ADS)

Bhowmik, Dhrubajyoti; Saha, Apu Kr; Dutta, Paramartha; Nandi, Supratim

2017-08-01

Quantum-dot Cellular Automata (QCA) is one of the most substitutes developing nanotechnologies for electronic circuits, as a result of lower force utilization, higher speed and smaller size in correlation with CMOS innovation. The essential devices, a Quantum-dot cell can be utilized to logic gates and wires. As it is the key building block on nanotechnology circuits. By applying simple gates, the hardware requirements for a QCA circuit can be decreased and circuits can be less complex as far as level, delay and cell check. This article exhibits an unobtrusive methodology for actualizing novel upgraded simple and universal gates, which can be connected to outline numerous variations of complex QCA circuits. Proposed gates are straightforward in structure and capable as far as implementing any digital circuits. The main aim is to build all basic and universal gates in a simple circuit with and without crossbar-wire. Simulation results and physical relations affirm its handiness in actualizing each advanced circuit.

Materials Integration and Doping of Carbon Nanotube-based Logic Circuits

NASA Astrophysics Data System (ADS)

Geier, Michael

Over the last 20 years, extensive research into the structure and properties of single- walled carbon nanotube (SWCNT) has elucidated many of the exceptional qualities possessed by SWCNTs, including record-setting tensile strength, excellent chemical stability, distinctive optoelectronic features, and outstanding electronic transport characteristics. In order to exploit these remarkable qualities, many application-specific hurdles must be overcome before the material can be implemented in commercial products. For electronic applications, recent advances in sorting SWCNTs by electronic type have enabled significant progress towards SWCNT-based integrated circuits. Despite these advances, demonstrations of SWCNT-based devices with suitable characteristics for large-scale integrated circuits have been limited. The processing methodologies, materials integration, and mechanistic understanding of electronic properties developed in this dissertation have enabled unprecedented scales of SWCNT-based transistor fabrication and integrated circuit demonstrations. Innovative materials selection and processing methods are at the core of this work and these advances have led to transistors with the necessary transport properties required for modern circuit integration. First, extensive collaborations with other research groups allowed for the exploration of SWCNT thin-film transistors (TFTs) using a wide variety of materials and processing methods such as new dielectric materials, hybrid semiconductor materials systems, and solution-based printing of SWCNT TFTs. These materials were integrated into circuit demonstrations such as NOR and NAND logic gates, voltage-controlled ring oscillators, and D-flip-flops using both rigid and flexible substrates. This dissertation explores strategies for implementing complementary SWCNT-based circuits, which were developed by using local metal gate structures that achieve enhancement-mode p-type and n-type SWCNT TFTs with widely separated and symmetric threshold voltages. Additionally, a novel n-type doping procedure for SWCNT TFTs was also developed utilizing a solution-processed organometallic small molecule to demonstrate the first network top-gated n-type SWCNT TFTs. Lastly, new doping and encapsulation layers were incorporated to stabilize both p-type and n-type SWCNT TFT electronic properties, which enabled the fabrication of large-scale memory circuits. Employing these materials and processing advances has addressed many application specific barriers to commercialization. For instance, the first thin-film SWCNT complementary metal-oxide-semi-conductor (CMOS) logic devices are demonstrated with sub-nanowatt static power consumption and full rail-to-rail voltage transfer characteristics. With the introduction of a new n-type Rh-based molecular dopant, the first SWCNT TFTs are fabricated in top-gate geometries over large areas with high yield. Then by utilizing robust encapsulation methods, stable and uniform electronic performance of both p-type and n-type SWCNT TFTs has been achieved. Based on these complementary SWCNT TFTs, it is possible to simulate, design, and fabricate arrays of low-power static random access memory (SRAM) circuits, achieving large-scale integration for the first time based on solution-processed semiconductors. Together, this work provides a direct pathway for solution processable, large scale, power-efficient advanced integrated logic circuits and systems.

Coulomb wave functions with complex values of the variable and the parameters

NASA Astrophysics Data System (ADS)

Dzieciol, Aleksander; Yngve, Staffan; Fröman, Per Olof

1999-12-01

The motivation for the present paper lies in the fact that the literature concerning the Coulomb wave functions FL(η,ρ) and GL(η,ρ) is a jungle in which it may be hard to find a safe way when one needs general formulas for the Coulomb wave functions with complex values of the variable ρ and the parameters L and η. For the Coulomb wave functions and certain linear combinations of these functions we discuss the connection with the Whittaker function, the Coulomb phase shift, Wronskians, reflection formulas (L→-L-1), integral representations, series expansions, circuital relations (ρ→ρe±iπ) and asymptotic formulas on a Riemann surface for the variable ρ. The parameters L and η are allowed to assume complex values.

Magnetic force microscopy method and apparatus to detect and image currents in integrated circuits

DOEpatents

Campbell, Ann. N.; Anderson, Richard E.; Cole, Jr., Edward I.

1995-01-01

A magnetic force microscopy method and improved magnetic tip for detecting and quantifying internal magnetic fields resulting from current of integrated circuits. Detection of the current is used for failure analysis, design verification, and model validation. The interaction of the current on the integrated chip with a magnetic field can be detected using a cantilevered magnetic tip. Enhanced sensitivity for both ac and dc current and voltage detection is achieved with voltage by an ac coupling or a heterodyne technique. The techniques can be used to extract information from analog circuits.

Magnetic force microscopy method and apparatus to detect and image currents in integrated circuits

DOEpatents

Campbell, A.N.; Anderson, R.E.; Cole, E.I. Jr.

1995-11-07

A magnetic force microscopy method and improved magnetic tip for detecting and quantifying internal magnetic fields resulting from current of integrated circuits are disclosed. Detection of the current is used for failure analysis, design verification, and model validation. The interaction of the current on the integrated chip with a magnetic field can be detected using a cantilevered magnetic tip. Enhanced sensitivity for both ac and dc current and voltage detection is achieved with voltage by an ac coupling or a heterodyne technique. The techniques can be used to extract information from analog circuits. 17 figs.

A SPICE2 Model for the M732 Analog Timer Integrated Circuit.

DTIC Science & Technology

1982-06-01

I AD-All? 019 ARMY ARMAMENT RESEARCH AND DEVELOPMENT C01MAND DOVER-ETC F/ S 1/ I A SPICES MODEL FOR THE M739 ANALOG TIMER INTEGRATED CIRCUIT. (U) I...JUN $I .J P TOBAK UNCLASSIFIED AR ID-20Di S I-AD-E06 3 NL ADI- A SPICE2 MODEL FOR THE M3 ANALOG TIMR INTERNATED CIRCIT, JOHN P. TOMA DTIC JUNE 1992 13...ARrIID-TR-82001 -;AZ/ 4 " 4. TITLE (and Subtitle) S . TYPE OF REPORT & PERIOD COVERED A SPICE2 MODEL FOR THE M732 ANALOG TIMER Final INTEGRATED CIRCUIT

Vertically integrated logic circuits constructed using ZnO-nanowire-based field-effect transistors on plastic substrates.

PubMed

Kang, Jeongmin; Moon, Taeho; Jeon, Youngin; Kim, Hoyoung; Kim, Sangsig

2013-05-01

ZnO-nanowire-based logic circuits were constructed by the vertical integration of multilayered field-effect transistors (FETs) on plastic substrates. ZnO nanowires with an average diameter of -100 nm were synthesized by thermal chemical vapor deposition for use as the channel material in FETs. The ZnO-based FETs exhibited a high I(ON)/I(OFF) of > 10(6), with the characteristic of n-type depletion modes. For vertically integrated logic circuits, three multilayer FETs were sequentially prepared. The stacked FETs were connected in series via electrodes, and C-PVPs were used for the layer-isolation material. The NOT and NAND gates exhibited large logic-swing values of -93%. These results demonstrate the feasibility of three dimensional flexible logic circuits.

Integrated electrofluidic circuits: pressure sensing with analog and digital operation functionalities for microfluidics.

PubMed

Wu, Chueh-Yu; Lu, Jau-Ching; Liu, Man-Chi; Tung, Yi-Chung

2012-10-21

Microfluidic technology plays an essential role in various lab on a chip devices due to its desired advantages. An automated microfluidic system integrated with actuators and sensors can further achieve better controllability. A number of microfluidic actuation schemes have been well developed. In contrast, most of the existing sensing methods still heavily rely on optical observations and external transducers, which have drawbacks including: costly instrumentation, professional operation, tedious interfacing, and difficulties of scaling up and further signal processing. This paper reports the concept of electrofluidic circuits - electrical circuits which are constructed using ionic liquid (IL)-filled fluidic channels. The developed electrofluidic circuits can be fabricated using a well-developed multi-layer soft lithography (MSL) process with polydimethylsiloxane (PDMS) microfluidic channels. Electrofluidic circuits allow seamless integration of pressure sensors with analog and digital operation functions into microfluidic systems and provide electrical readouts for further signal processing. In the experiments, the analog operation device is constructed based on electrofluidic Wheatstone bridge circuits with electrical outputs of the addition and subtraction results of the applied pressures. The digital operation (AND, OR, and XOR) devices are constructed using the electrofluidic pressure controlled switches, and output electrical signals of digital operations of the applied pressures. The experimental results demonstrate the designed functions for analog and digital operations of applied pressures are successfully achieved using the developed electrofluidic circuits, making them promising to develop integrated microfluidic systems with capabilities of precise pressure monitoring and further feedback control for advanced lab on a chip applications.

Testing interconnected VLSI circuits in the Big Viterbi Decoder

NASA Technical Reports Server (NTRS)

Onyszchuk, I. M.

1991-01-01

The Big Viterbi Decoder (BVD) is a powerful error-correcting hardware device for the Deep Space Network (DSN), in support of the Galileo and Comet Rendezvous Asteroid Flyby (CRAF)/Cassini Missions. Recently, a prototype was completed and run successfully at 400,000 or more decoded bits per second. This prototype is a complex digital system whose core arithmetic unit consists of 256 identical very large scale integration (VLSI) gate-array chips, 16 on each of 16 identical boards which are connected through a 28-layer, printed-circuit backplane using 4416 wires. Special techniques were developed for debugging, testing, and locating faults inside individual chips, on boards, and within the entire decoder. The methods are based upon hierarchical structure in the decoder, and require that chips or boards be wired themselves as Viterbi decoders. The basic procedure consists of sending a small set of known, very noisy channel symbols through a decoder, and matching observables against values computed by a software simulation. Also, tests were devised for finding open and short-circuited wires which connect VLSI chips on the boards and through the backplane.

Printed 2 V-operating organic inverter arrays employing a small-molecule/polymer blend

NASA Astrophysics Data System (ADS)

Shiwaku, Rei; Takeda, Yasunori; Fukuda, Takashi; Fukuda, Kenjiro; Matsui, Hiroyuki; Kumaki, Daisuke; Tokito, Shizuo

2016-10-01

Printed organic thin-film transistors (OTFTs) are well suited for low-cost electronic applications, such as radio frequency identification (RFID) tags and sensors. Achieving both high carrier mobility and uniform electrical characteristics in printed OTFT devices is essential in these applications. Here, we report on printed high-performance OTFTs and circuits using silver nanoparticle inks for the source/drain electrodes and a blend of dithieno[2,3-d2‧,3‧-d‧]benzo[1,2-b4,5-b‧]dithiophene (DTBDT-C6) and polystyrene for the organic semiconducting layer. A high saturation region mobility of 1.0 cm2 V-1 s-1 at low operation voltage of -5 V was obtained for relatively short channel lengths of 9 μm. All fifteen of the printed pseudo-CMOS inverter circuits were formed on a common substrate and operated at low operation voltage of 2 V with the total variation in threshold voltage of 0.35 V. Consequently, the printed OTFT devices can be used in more complex integrated circuit applications requiring low manufacturing cost over large areas.

Rectifying the output of vibrational piezoelectric energy harvester using quantum dots

NASA Astrophysics Data System (ADS)

Li, Lijie

2017-03-01

Piezoelectric energy harvester scavenges mechanical vibrations and generates electricity. Researchers have strived to optimize the electromechanical structures and to design necessary external power management circuits, aiming to deliver high power and rectified outputs ready for serving as batteries. Complex deformation of the mechanical structure results in charges with opposite polarities appearing on same surface, leading to current loss in the attached metal electrode. External power management circuits such as rectifiers comprise diodes that consume power and have undesirable forward bias. To address the above issues, we devise a novel integrated piezoelectric energy harvesting device that is structured by stacking a layer of quantum dots (QDs) and a layer of piezoelectric material. We find that the QD can rectify electrical charges generated from the piezoelectric material because of its adaptable conductance to the electrochemical potentials of both sides of the QDs layer, so that electrical current causing energy loss on the same surface of the piezoelectric material can be minimized. The QDs layer has the potential to replace external rectification circuits providing a much more compact and less power-consumption solution.

Printed 2 V-operating organic inverter arrays employing a small-molecule/polymer blend.

PubMed

Shiwaku, Rei; Takeda, Yasunori; Fukuda, Takashi; Fukuda, Kenjiro; Matsui, Hiroyuki; Kumaki, Daisuke; Tokito, Shizuo

2016-10-04

Printed organic thin-film transistors (OTFTs) are well suited for low-cost electronic applications, such as radio frequency identification (RFID) tags and sensors. Achieving both high carrier mobility and uniform electrical characteristics in printed OTFT devices is essential in these applications. Here, we report on printed high-performance OTFTs and circuits using silver nanoparticle inks for the source/drain electrodes and a blend of dithieno[2,3-d;2',3'-d']benzo[1,2-b;4,5-b']dithiophene (DTBDT-C 6 ) and polystyrene for the organic semiconducting layer. A high saturation region mobility of 1.0 cm 2  V -1  s -1 at low operation voltage of -5 V was obtained for relatively short channel lengths of 9 μm. All fifteen of the printed pseudo-CMOS inverter circuits were formed on a common substrate and operated at low operation voltage of 2 V with the total variation in threshold voltage of 0.35 V. Consequently, the printed OTFT devices can be used in more complex integrated circuit applications requiring low manufacturing cost over large areas.

Maximum Temperature Detection System for Integrated Circuits

NASA Astrophysics Data System (ADS)

Frankiewicz, Maciej; Kos, Andrzej

2015-03-01

The paper describes structure and measurement results of the system detecting present maximum temperature on the surface of an integrated circuit. The system consists of the set of proportional to absolute temperature sensors, temperature processing path and a digital part designed in VHDL. Analogue parts of the circuit where designed with full-custom technique. The system is a part of temperature-controlled oscillator circuit - a power management system based on dynamic frequency scaling method. The oscillator cooperates with microprocessor dedicated for thermal experiments. The whole system is implemented in UMC CMOS 0.18 μm (1.8 V) technology.

Slow-wave propagation on monolithic microwave integrated circuits with layered and non-layered structures

DOE Office of Scientific and Technical Information (OSTI.GOV)

Tzuang, C.K.C.

1986-01-01

Various MMIC (monolithic microwave integrated circuit) planar waveguides have shown possible existence of a slow-wave propagation. In many practical applications of these slow-wave circuits, the semiconductor devices have nonuniform material properties that may affect the slow-wave propagation. In the first part of the dissertation, the effects of the nonuniform material properties are studied by a finite-element method. In addition, the transient pulse excitations of these slow-wave circuits also have great theoretical and practical interests. In the second part, the time-domain analysis of a slow-wave coplanar waveguide is presented.

Compiler-aided systematic construction of large-scale DNA strand displacement circuits using unpurified components

NASA Astrophysics Data System (ADS)

Thubagere, Anupama J.; Thachuk, Chris; Berleant, Joseph; Johnson, Robert F.; Ardelean, Diana A.; Cherry, Kevin M.; Qian, Lulu

2017-02-01

Biochemical circuits made of rationally designed DNA molecules are proofs of concept for embedding control within complex molecular environments. They hold promise for transforming the current technologies in chemistry, biology, medicine and material science by introducing programmable and responsive behaviour to diverse molecular systems. As the transformative power of a technology depends on its accessibility, two main challenges are an automated design process and simple experimental procedures. Here we demonstrate the use of circuit design software, combined with the use of unpurified strands and simplified experimental procedures, for creating a complex DNA strand displacement circuit that consists of 78 distinct species. We develop a systematic procedure for overcoming the challenges involved in using unpurified DNA strands. We also develop a model that takes synthesis errors into consideration and semi-quantitatively reproduces the experimental data. Our methods now enable even novice researchers to successfully design and construct complex DNA strand displacement circuits.

Radome Positioner for the RFSS (Radio Frequency Simulation System).

DTIC Science & Technology

1978-02-27

its associated circuits contained on the Motorola M68MM01A-I micro- module (See Drawing 64). This board contains the 6800 microprocessor. Ik bytes of...D 00 1~ 0 41 + C.) ) -44 208 g. Small encoder diameter achieved by using integrated circuit modules . h. Stainless steel case. U...to the 30 integrated circuits which actually comprise the heart of the-microcomputer. This dramatic reduction in parts count re- sults in a similar

Toward a multiscale modeling framework for understanding serotonergic function

PubMed Central

Wong-Lin, KongFatt; Wang, Da-Hui; Moustafa, Ahmed A; Cohen, Jeremiah Y; Nakamura, Kae

2017-01-01

Despite its importance in regulating emotion and mental wellbeing, the complex structure and function of the serotonergic system present formidable challenges toward understanding its mechanisms. In this paper, we review studies investigating the interactions between serotonergic and related brain systems and their behavior at multiple scales, with a focus on biologically-based computational modeling. We first discuss serotonergic intracellular signaling and neuronal excitability, followed by neuronal circuit and systems levels. At each level of organization, we will discuss the experimental work accompanied by related computational modeling work. We then suggest that a multiscale modeling approach that integrates the various levels of neurobiological organization could potentially transform the way we understand the complex functions associated with serotonin. PMID:28417684

Split-cross-bridge resistor for testing for proper fabrication of integrated circuits

NASA Technical Reports Server (NTRS)

Buehler, M. G. (Inventor)

1985-01-01

An electrical testing structure and method is described whereby a test structure is fabricated on a large scale integrated circuit wafer along with the circuit components and has a van der Pauw cross resistor in conjunction with a bridge resistor and a split bridge resistor, the latter having two channels each a line width wide, corresponding to the line width of the wafer circuit components, and with the two channels separated by a space equal to the line spacing of the wafer circuit components. The testing structure has associated voltage and current contact pads arranged in a two by four array for conveniently passing currents through the test structure and measuring voltages at appropriate points to calculate the sheet resistance, line width, line spacing, and line pitch of the circuit components on the wafer electrically.

Flow control using audio tones in resonant microfluidic networks: towards cell-phone controlled lab-on-a-chip devices.

PubMed

Phillips, Reid H; Jain, Rahil; Browning, Yoni; Shah, Rachana; Kauffman, Peter; Dinh, Doan; Lutz, Barry R

2016-08-16

Fluid control remains a challenge in development of portable lab-on-a-chip devices. Here, we show that microfluidic networks driven by single-frequency audio tones create resonant oscillating flow that is predicted by equivalent electrical circuit models. We fabricated microfluidic devices with fluidic resistors (R), inductors (L), and capacitors (C) to create RLC networks with band-pass resonance in the audible frequency range available on portable audio devices. Microfluidic devices were fabricated from laser-cut adhesive plastic, and a "buzzer" was glued to a diaphragm (capacitor) to integrate the actuator on the device. The AC flowrate magnitude was measured by imaging oscillation of bead tracers to allow direct comparison to the RLC circuit model across the frequency range. We present a systematic build-up from single-channel systems to multi-channel (3-channel) networks, and show that RLC circuit models predict complex frequency-dependent interactions within multi-channel networks. Finally, we show that adding flow rectifying valves to the network creates pumps that can be driven by amplified and non-amplified audio tones from common audio devices (iPod and iPhone). This work shows that RLC circuit models predict resonant flow responses in multi-channel fluidic networks as a step towards microfluidic devices controlled by audio tones.

Integrated Circuits in the Introductory Electronics Laboratory

ERIC Educational Resources Information Center

English, Thomas C.; Lind, David A.

1973-01-01

Discusses the use of an integrated circuit operational amplifier in an introductory electronics laboratory course for undergraduate science majors. The advantages of this approach and the implications for scientific instrumentation are identified. Describes a number of experiments suitable for the undergraduate laboratory. (Author/DF)

Chemical vapor deposition for automatic processing of integrated circuits

NASA Technical Reports Server (NTRS)

Kennedy, B. W.

1980-01-01

Chemical vapor deposition for automatic processing of integrated circuits including the wafer carrier and loading from a receiving air track into automatic furnaces and unloading on to a sending air track is discussed. Passivation using electron beam deposited quartz is also considered.

75 FR 75694 - Certain Semiconductor Integration Circuits Using Tungsten Metallization and Products Containing...

Federal Register 2010, 2011, 2012, 2013, 2014

2010-12-06

... INTERNATIONAL TRADE COMMISSION [Investigation No. 337-TA-648] Certain Semiconductor Integration Circuits Using Tungsten Metallization and Products Containing Same; Notice of Commission Decision To Dismiss the Investigation as Moot AGENCY: U.S. International Trade Commission. ACTION: Notice. SUMMARY...

Optoelectronic Integrated Circuits For Neural Networks

NASA Technical Reports Server (NTRS)

Psaltis, D.; Katz, J.; Kim, Jae-Hoon; Lin, S. H.; Nouhi, A.

1990-01-01

Many threshold devices placed on single substrate. Integrated circuits containing optoelectronic threshold elements developed for use as planar arrays of artificial neurons in research on neural-network computers. Mounted with volume holograms recorded in photorefractive crystals serving as dense arrays of variable interconnections between neurons.

A Program in Semiconductor Processing.

ERIC Educational Resources Information Center

McConica, Carol M.

1984-01-01

A graduate program at Colorado State University which focuses on integrated circuit processing is described. The program utilizes courses from several departments while allowing students to apply chemical engineering techniques to an integrated circuit fabrication research topic. Information on employment of chemical engineers by electronics…

AIN-Based Packaging for SiC High-Temperature Electronics

NASA Technical Reports Server (NTRS)

Savrun, Ender

2004-01-01

Packaging made primarily of aluminum nitride has been developed to enclose silicon carbide-based integrated circuits (ICs), including circuits containing SiC-based power diodes, that are capable of operation under conditions more severe than can be withstood by silicon-based integrated circuits. A major objective of this development was to enable packaged SiC electronic circuits to operate continuously at temperatures up to 500 C. AlN-packaged SiC electronic circuits have commercial potential for incorporation into high-power electronic equipment and into sensors that must withstand high temperatures and/or high pressures in diverse applications that include exploration in outer space, well logging, and monitoring of nuclear power systems. This packaging embodies concepts drawn from flip-chip packaging of silicon-based integrated circuits. One or more SiC-based circuit chips are mounted on an aluminum nitride package substrate or sandwiched between two such substrates. Intimate electrical connections between metal conductors on the chip(s) and the metal conductors on external circuits are made by direct bonding to interconnections on the package substrate(s) and/or by use of holes through the package substrate(s). This approach eliminates the need for wire bonds, which have been the most vulnerable links in conventional electronic circuitry in hostile environments. Moreover, the elimination of wire bonds makes it possible to pack chips more densely than was previously possible.

Highly Uniform Carbon Nanotube Field-Effect Transistors and Medium Scale Integrated Circuits.

PubMed

Chen, Bingyan; Zhang, Panpan; Ding, Li; Han, Jie; Qiu, Song; Li, Qingwen; Zhang, Zhiyong; Peng, Lian-Mao

2016-08-10

Top-gated p-type field-effect transistors (FETs) have been fabricated in batch based on carbon nanotube (CNT) network thin films prepared from CNT solution and present high yield and highly uniform performance with small threshold voltage distribution with standard deviation of 34 mV. According to the property of FETs, various logical and arithmetical gates, shifters, and d-latch circuits were designed and demonstrated with rail-to-rail output. In particular, a 4-bit adder consisting of 140 p-type CNT FETs was demonstrated with higher packing density and lower supply voltage than other published integrated circuits based on CNT films, which indicates that CNT based integrated circuits can reach to medium scale. In addition, a 2-bit multiplier has been realized for the first time. Benefitted from the high uniformity and suitable threshold voltage of CNT FETs, all of the fabricated circuits based on CNT FETs can be driven by a single voltage as small as 2 V.

Readout circuit with novel background suppression for long wavelength infrared focal plane arrays

NASA Astrophysics Data System (ADS)

Xie, L.; Xia, X. J.; Zhou, Y. F.; Wen, Y.; Sun, W. F.; Shi, L. X.

2011-02-01

In this article, a novel pixel readout circuit using a switched-capacitor integrator mode background suppression technique is presented for long wavelength infrared focal plane arrays. This circuit can improve dynamic range and signal-to-noise ratio by suppressing the large background current during integration. Compared with other background suppression techniques, the new background suppression technique is less sensitive to the process mismatch and has no additional shot noise. The proposed circuit is theoretically analysed and simulated while taking into account the non-ideal characteristics. The result shows that the background suppression non-uniformity is ultra-low even for a large process mismatch. The background suppression non-uniformity of the proposed circuit can also remain very small with technology scaling.

V-band integrated quadriphase modulator

NASA Technical Reports Server (NTRS)

Grote, A.; Chang, K.

1983-01-01

A V-band integrated circuit quadriphase shift keyed modulator/exciter for space communications systems was developed. Intersatellite communications systems require direct modulation at 60 GHz to enhance signal processing capability. For most systems, particularly space applications, small and lightweight components are essential to alleviate severe system design constraints. Thus to achieve wideband, high data rate systems, direct modulation techniques at millimeter waves using solid state integrated circuit technology are an integral part of the overall technology developments.

Integration of a photonic crystal polarization beam splitter and waveguide bend.

PubMed

Zheng, Wanhua; Xing, Mingxin; Ren, Gang; Johnson, Steven G; Zhou, Wenjun; Chen, Wei; Chen, Lianghui

2009-05-11

In this work, we present the design of an integrated photonic-crystal polarization beam splitter (PC-PBS) and a low-loss photonic-crystal 60 degrees waveguide bend. Firstly, the modal properties of the PC-PBS and the mechanism of the low-loss waveguide bend are investigated by the two-dimensional finite-difference time-domain (FDTD) method, and then the integration of the two devices is studied. It shows that, although the individual devices perform well separately, the performance of the integrated circuit is poor due to the multi-mode property of the PC-PBS. By introducing deformed airhole structures, a single-mode PC-PBS is proposed, which significantly enhance the performance of the circuit with the extinction ratios remaining above 20 dB for both transverse-electric (TE) and transverse-magnetic (TM) polarizations. Both the specific result and the general idea of integration design are promising in the photonic crystal integrated circuits in the future.

Fully chip-embedded automation of a multi-step lab-on-a-chip process using a modularized timer circuit.

PubMed

Kang, Junsu; Lee, Donghyeon; Heo, Young Jin; Chung, Wan Kyun

2017-11-07

For highly-integrated microfluidic systems, an actuation system is necessary to control the flow; however, the bulk of actuation devices including pumps or valves has impeded the broad application of integrated microfluidic systems. Here, we suggest a microfluidic process control method based on built-in microfluidic circuits. The circuit is composed of a fluidic timer circuit and a pneumatic logic circuit. The fluidic timer circuit is a serial connection of modularized timer units, which sequentially pass high pressure to the pneumatic logic circuit. The pneumatic logic circuit is a NOR gate array designed to control the liquid-controlling process. By using the timer circuit as a built-in signal generator, multi-step processes could be done totally inside the microchip without any external controller. The timer circuit uses only two valves per unit, and the number of process steps can be extended without limitation by adding timer units. As a demonstration, an automation chip has been designed for a six-step droplet treatment, which entails 1) loading, 2) separation, 3) reagent injection, 4) incubation, 5) clearing and 6) unloading. Each process was successfully performed for a pre-defined step-time without any external control device.

Deconstructing and constructing innate immune functions using molecular sensors and actuators

NASA Astrophysics Data System (ADS)

Coutinho, Kester; Inoue, Takanari

2016-05-01

White blood cells such as neutrophils and macrophages are made competent for chemotaxis and phagocytosis -- the dynamic cellular behaviors that are hallmarks of their innate immune functions -- by the reorganization of complex biological circuits during differentiation. Conventional loss-of-function approaches have revealed that more than 100 genes participate in these cellular functions, and we have begun to understand the intricate signaling circuits that are built up from these gene products. We now appreciate: (1) that these circuits come in a variety of flavors -- so that we can make a distinction between genetic circuits, metabolic circuits and signaling circuits; and (2) that they are usually so complex that the assumption of multiple feedback loops, as well as that of crosstalk between seemingly independent pathways, is now routine. It has not escaped our notice, however, that just as physicists and electrical engineers have long been able to disentangle complex electric circuits simply by repetitive cycles of probing and measuring electric currents using a voltmeter, we might similarly be able to dissect these intricate biological circuits by incorporating equivalent approaches in the fields of cell biology and bioengineering. Existing techniques in biology for probing individual circuit components are unfortunately lacking, so that the overarching goal of drawing an exact circuit diagram for the whole cell -- complete with kinetic parameters for connections between individual circuit components -- is not yet in near sight. My laboratory and others have thus begun the development of a new series of molecular tools that can measurably investigate the circuit connectivity inside living cells, as if we were doing so on a silicon board. In these proceedings, I will introduce some of these techniques, provide examples of their implementation, and offer a perspective on directions moving forward.

Certification of highly complex safety-related systems.

PubMed

Reinert, D; Schaefer, M

1999-01-01

The BIA has now 15 years of experience with the certification of complex electronic systems for safety-related applications in the machinery sector. Using the example of machining centres this presentation will show the systematic procedure for verifying and validating control systems using Application Specific Integrated Circuits (ASICs) and microcomputers for safety functions. One section will describe the control structure of machining centres with control systems using "integrated safety." A diverse redundant architecture combined with crossmonitoring and forced dynamization is explained. In the main section the steps of the systematic certification procedure are explained showing some results of the certification of drilling machines. Specification reviews, design reviews with test case specification, statistical analysis, and walk-throughs are the analytical measures in the testing process. Systematic tests based on the test case specification, Electro Magnetic Interference (EMI), and environmental testing, and site acceptance tests on the machines are the testing measures for validation. A complex software driven system is always undergoing modification. Most of the changes are not safety-relevant but this has to be proven. A systematic procedure for certifying software modifications is presented in the last section of the paper.

Millimeter-wave and terahertz integrated circuit antennas

NASA Technical Reports Server (NTRS)

Rebeiz, Gabriel M.

1992-01-01

This paper presents a comprehensive review of integrated circuit antennas suitable for millimeter and terahertz applications. A great deal of research was done on integrated circuit antennas in the last decade and many of the problems associated with electrically thick dielectric substrates, such as substrate modes and poor radiation patterns, have been understood and solved. Several new antennas, such as the integrated horn antenna, the dielectric-filled parabola, the Fresnel plate antenna, the dual-slot antenna, and the log-periodic and spiral antennas on extended hemispherical lenses, have resulted in excellent performance at millimeter-wave frequencies, and are covered in detail in this paper. Also, a review of the efficiency definitions used with planar antennas is given in detail in the appendix.

A scalable neural chip with synaptic electronics using CMOS integrated memristors.

PubMed

Cruz-Albrecht, Jose M; Derosier, Timothy; Srinivasa, Narayan

2013-09-27

The design and simulation of a scalable neural chip with synaptic electronics using nanoscale memristors fully integrated with complementary metal-oxide-semiconductor (CMOS) is presented. The circuit consists of integrate-and-fire neurons and synapses with spike-timing dependent plasticity (STDP). The synaptic conductance values can be stored in memristors with eight levels, and the topology of connections between neurons is reconfigurable. The circuit has been designed using a 90 nm CMOS process with via connections to on-chip post-processed memristor arrays. The design has about 16 million CMOS transistors and 73 728 integrated memristors. We provide circuit level simulations of the entire chip performing neuronal and synaptic computations that result in biologically realistic functional behavior.

Ring resonator-based on-chip modulation transformer for high-performance phase-modulated microwave photonic links.

PubMed

Zhuang, Leimeng; Taddei, Caterina; Hoekman, Marcel; Leinse, Arne; Heideman, René; van Dijk, Paulus; Roeloffzen, Chris

2013-11-04

In this paper, we propose and experimentally demonstrate a novel wideband on-chip photonic modulation transformer for phase-modulated microwave photonic links. The proposed device is able to transform phase-modulated optical signals into intensity-modulated versions (or vice versa) with nearly zero conversion of laser phase noise to intensity noise. It is constructed using waveguide-based ring resonators, which features simple architecture, stable operation, and easy reconfigurability. Beyond the stand-alone functionality, the proposed device can also be integrated with other functional building blocks of photonic integrated circuits (PICs) to create on-chip complex microwave photonic signal processors. As an application example, a PIC consisting of two such modulation transformers and a notch filter has been designed and realized in TriPleX(TM) waveguide technology. The realized device uses a 2 × 2 splitting circuit and 3 ring resonators with a free spectral range of 25 GHz, which are all equipped with continuous tuning elements. The device can perform phase-to-intensity modulation transform and carrier suppression simultaneously, which enables high-performance phase-modulated microwave photonics links (PM-MPLs). Associated with the bias-free and low-complexity advantages of the phase modulators, a single-fiber-span PM-MPL with a RF bandwidth of 12 GHz (3 dB-suppression band 6 to 18 GHz) has been demonstrated comprising the proposed PIC, where the achieved spurious-free dynamic range performance is comparable to that of Class-AB MPLs using low-biased Mach-Zehnder modulators.

Intelligent layered nanoflare: ``lab-on-a-nanoparticle'' for multiple DNA logic gate operations and efficient intracellular delivery

NASA Astrophysics Data System (ADS)

Yang, Bin; Zhang, Xiao-Bing; Kang, Li-Ping; Huang, Zhi-Mei; Shen, Guo-Li; Yu, Ru-Qin; Tan, Weihong

2014-07-01

DNA strand displacement cascades have been engineered to construct various fascinating DNA circuits. However, biological applications are limited by the insufficient cellular internalization of naked DNA structures, as well as the separated multicomponent feature. In this work, these problems are addressed by the development of a novel DNA nanodevice, termed intelligent layered nanoflare, which integrates DNA computing at the nanoscale, via the self-assembly of DNA flares on a single gold nanoparticle. As a ``lab-on-a-nanoparticle'', the intelligent layered nanoflare could be engineered to perform a variety of Boolean logic gate operations, including three basic logic gates, one three-input AND gate, and two complex logic operations, in a digital non-leaky way. In addition, the layered nanoflare can serve as a programmable strategy to sequentially tune the size of nanoparticles, as well as a new fingerprint spectrum technique for intelligent multiplex biosensing. More importantly, the nanoflare developed here can also act as a single entity for intracellular DNA logic gate delivery, without the need of commercial transfection agents or other auxiliary carriers. By incorporating DNA circuits on nanoparticles, the presented layered nanoflare will broaden the applications of DNA circuits in biological systems, and facilitate the development of DNA nanotechnology.DNA strand displacement cascades have been engineered to construct various fascinating DNA circuits. However, biological applications are limited by the insufficient cellular internalization of naked DNA structures, as well as the separated multicomponent feature. In this work, these problems are addressed by the development of a novel DNA nanodevice, termed intelligent layered nanoflare, which integrates DNA computing at the nanoscale, via the self-assembly of DNA flares on a single gold nanoparticle. As a ``lab-on-a-nanoparticle'', the intelligent layered nanoflare could be engineered to perform a variety of Boolean logic gate operations, including three basic logic gates, one three-input AND gate, and two complex logic operations, in a digital non-leaky way. In addition, the layered nanoflare can serve as a programmable strategy to sequentially tune the size of nanoparticles, as well as a new fingerprint spectrum technique for intelligent multiplex biosensing. More importantly, the nanoflare developed here can also act as a single entity for intracellular DNA logic gate delivery, without the need of commercial transfection agents or other auxiliary carriers. By incorporating DNA circuits on nanoparticles, the presented layered nanoflare will broaden the applications of DNA circuits in biological systems, and facilitate the development of DNA nanotechnology. Electronic supplementary information (ESI) available: Additional figures (Table S1, Fig. S1-S5). See DOI: 10.1039/c4nr01676a

Integrated circuit with dissipative layer for photogenerated carriers

DOEpatents

Myers, David R.

1989-01-01

The sensitivity of an integrated circuit to single-event upsets is decreased by providing a dissi The U.S. Government has rights in this invention pursuant to Contract No. DE-ACO4-76DP00789 between the Department of Energy and AT&T Technologies, Inc.

Integrated circuit with dissipative layer for photogenerated carriers

DOEpatents

Myers, D.R.

1989-09-12

The sensitivity of an integrated circuit to single-event upsets is decreased by providing a dissi The U.S. Government has rights in this invention pursuant to Contract No. DE-ACO4-76DP00789 between the Department of Energy and AT&T Technologies, Inc.

Scalable, Lightweight, Integrated and Quick-to-Assemble (SLIQ) Hyperdrives for Functional Circuit Dissection.

PubMed

Liang, Li; Oline, Stefan N; Kirk, Justin C; Schmitt, Lukas Ian; Komorowski, Robert W; Remondes, Miguel; Halassa, Michael M

2017-01-01

Independently adjustable multielectrode arrays are routinely used to interrogate neuronal circuit function, enabling chronic in vivo monitoring of neuronal ensembles in freely behaving animals at a single-cell, single spike resolution. Despite the importance of this approach, its widespread use is limited by highly specialized design and fabrication methods. To address this, we have developed a Scalable, Lightweight, Integrated and Quick-to-assemble multielectrode array platform. This platform additionally integrates optical fibers with independently adjustable electrodes to allow simultaneous single unit recordings and circuit-specific optogenetic targeting and/or manipulation. In current designs, the fully assembled platforms are scalable from 2 to 32 microdrives, and yet range 1-3 g, light enough for small animals. Here, we describe the design process starting from intent in computer-aided design, parameter testing through finite element analysis and experimental means, and implementation of various applications across mice and rats. Combined, our methods may expand the utility of multielectrode recordings and their continued integration with other tools enabling functional dissection of intact neural circuits.

Dendritic nonlinearities are tuned for efficient spike-based computations in cortical circuits

PubMed Central

Ujfalussy, Balázs B; Makara, Judit K; Branco, Tiago; Lengyel, Máté

2015-01-01

Cortical neurons integrate thousands of synaptic inputs in their dendrites in highly nonlinear ways. It is unknown how these dendritic nonlinearities in individual cells contribute to computations at the level of neural circuits. Here, we show that dendritic nonlinearities are critical for the efficient integration of synaptic inputs in circuits performing analog computations with spiking neurons. We developed a theory that formalizes how a neuron's dendritic nonlinearity that is optimal for integrating synaptic inputs depends on the statistics of its presynaptic activity patterns. Based on their in vivo preynaptic population statistics (firing rates, membrane potential fluctuations, and correlations due to ensemble dynamics), our theory accurately predicted the responses of two different types of cortical pyramidal cells to patterned stimulation by two-photon glutamate uncaging. These results reveal a new computational principle underlying dendritic integration in cortical neurons by suggesting a functional link between cellular and systems--level properties of cortical circuits. DOI: http://dx.doi.org/10.7554/eLife.10056.001 PMID:26705334

5A Zirconium Dioxide Ammonia Microsensor Integrated with a Readout Circuit Manufactured Using the 0.18 μm CMOS Process

PubMed Central

Lin, Guan-Ming; Dai, Ching-Liang; Yang, Ming-Zhi

2013-01-01

The study presents an ammonia microsensor integrated with a readout circuit on-a-chip fabricated using the commercial 0.18 μm complementary metal oxide semiconductor (CMOS) process. The integrated sensor chip consists of a heater, an ammonia sensor and a readout circuit. The ammonia sensor is constructed by a sensitive film and the interdigitated electrodes. The sensitive film is zirconium dioxide that is coated on the interdigitated electrodes. The heater is used to provide a working temperature to the sensitive film. A post-process is employed to remove the sacrificial layer and to coat zirconium dioxide on the sensor. When the sensitive film adsorbs or desorbs ammonia gas, the sensor produces a change in resistance. The readout circuit converts the resistance variation of the sensor into the output voltage. The experiments show that the integrated ammonia sensor has a sensitivity of 4.1 mV/ppm. PMID:23503294

An assessment of the impact of the Department of Defense very high speed integrated circuit program

NASA Astrophysics Data System (ADS)

1982-01-01

The technical and economic effects of the Department of Defense's (DoD) development program for very-high-speed integrated circuits (VHSIC) are examined. The probable effects of this program on the domestic aspects and international position of the integrated-circuit (IC) industry as they relate to the interests of the general public and the DoD are considered. The report presents a review of the unique DoD needs that motivate VHSIC research and development; an estimate of the degree of which these needs are likely to be met by the VHSIC program; a discussion of the effects of the program's demands for manpower, materials, and design and processing technologies; the problems connected with the program's technology export controls; and an assessment of the impact of the program on the structure of the U.S. integrated-circuit industry, its continued development and production of civilian consumer products, and its international competitive position.

Design of a Low-Power, Small-Area AEC-Q100-Compliant SENT Transmitter in Signal Conditioning IC for Automotive Pressure and Temperature Complex Sensors in 180 Nm CMOS Technology.

PubMed

Ali, Imran; Rikhan, Behnam Samadpoor; Kim, Dong-Gyu; Lee, Dong-Soo; Rehman, Muhammad Riaz Ur; Abbasizadeh, Hamed; Asif, Muhammad; Lee, Minjae; Hwang, Keum Cheol; Yang, Youngoo; Lee, Kang-Yoon

2018-05-14

In this paper, a low-power and small-area Single Edge Nibble Transmission (SENT) transmitter design is proposed for automotive pressure and temperature complex sensor applications. To reduce the cost and size of the hardware, the pressure and temperature information is processed with a single integrated circuit (IC) and transmitted at the same time to the electronic control unit (ECU) through SENT. Due to its digital nature, it is immune to noise, has reduced sensitivity to electromagnetic interference (EMI), and generates low EMI. It requires only one PAD for its connectivity with ECU, and thus reduces the pin requirements, simplifies the connectivity, and minimizes the printed circuit board (PCB) complexity. The design is fully synthesizable, and independent of technology. The finite state machine-based approach is employed for area efficient implementation, and to translate the proposed architecture into hardware. The IC is fabricated in 1P6M 180 nm CMOS process with an area of (116 μm × 116 μm) and 4.314 K gates. The current consumption is 50 μA from a 1.8 V supply with a total 90 μW power. For compliance with AEC-Q100 for automotive reliability, a reverse and over voltage protection circuit is also implemented with human body model (HBM) electro-static discharge (ESD) of +6 kV, reverse voltage of -16 V to 0 V, over voltage of 8.2 V to 16 V, and fabricated area of 330 μm × 680 μm. The extensive testing, measurement, and simulation results prove that the design is fully compliant with SAE J2716 standard.

Design of a Low-Power, Small-Area AEC-Q100-Compliant SENT Transmitter in Signal Conditioning IC for Automotive Pressure and Temperature Complex Sensors in 180 Nm CMOS Technology

PubMed Central

Rikhan, Behnam Samadpoor; Kim, Dong-Gyu; Lee, Dong-Soo; Rehman, Muhammad Riaz Ur; Abbasizadeh, Hamed; Asif, Muhammad; Lee, Minjae; Yang, Youngoo; Lee, Kang-Yoon

2018-01-01

In this paper, a low-power and small-area Single Edge Nibble Transmission (SENT) transmitter design is proposed for automotive pressure and temperature complex sensor applications. To reduce the cost and size of the hardware, the pressure and temperature information is processed with a single integrated circuit (IC) and transmitted at the same time to the electronic control unit (ECU) through SENT. Due to its digital nature, it is immune to noise, has reduced sensitivity to electromagnetic interference (EMI), and generates low EMI. It requires only one PAD for its connectivity with ECU, and thus reduces the pin requirements, simplifies the connectivity, and minimizes the printed circuit board (PCB) complexity. The design is fully synthesizable, and independent of technology. The finite state machine-based approach is employed for area efficient implementation, and to translate the proposed architecture into hardware. The IC is fabricated in 1P6M 180 nm CMOS process with an area of (116 μm × 116 μm) and 4.314 K gates. The current consumption is 50 μA from a 1.8 V supply with a total 90 μW power. For compliance with AEC-Q100 for automotive reliability, a reverse and over voltage protection circuit is also implemented with human body model (HBM) electro-static discharge (ESD) of +6 kV, reverse voltage of −16 V to 0 V, over voltage of 8.2 V to 16 V, and fabricated area of 330 μm × 680 μm. The extensive testing, measurement, and simulation results prove that the design is fully compliant with SAE J2716 standard. PMID:29757996