Verification of the FtCayuga fault-tolerant microprocessor system. Volume 2: Formal specification and correctness theorems

NASA Technical Reports Server (NTRS)

Bickford, Mark; Srivas, Mandayam

1991-01-01

Presented here is a formal specification and verification of a property of a quadruplicately redundant fault tolerant microprocessor system design. A complete listing of the formal specification of the system and the correctness theorems that are proved are given. The system performs the task of obtaining interactive consistency among the processors using a special instruction on the processors. The design is based on an algorithm proposed by Pease, Shostak, and Lamport. The property verified insures that an execution of the special instruction by the processors correctly accomplishes interactive consistency, providing certain preconditions hold, using a computer aided design verification tool, Spectool, and the theorem prover, Clio. A major contribution of the work is the demonstration of a significant fault tolerant hardware design that is mechanically verified by a theorem prover.

Creating raptor benefits from powerline problems

USGS Publications Warehouse

Kochert, Michael N.; Olendorff, R.R.

1999-01-01

Powerlines benefit raptors by providing enhanced nesting and roosting sites. However, they also can kill raptors by electrocution and raptors can interfere with power transmission. The electrocution problem has been reduced by correcting existing lethal lines and implementing electrocution safe designs for new lines. Remedial actions include pole modifications, perch management and insulation of wires and hardware. New line designs provide for proper insulation and adequate spacing of conductors and grounded hardware. Nesting platforms can reduce power transmission problems and enhance the benefits of nesting on powerlines. A combination of perch deterrents and insulator shields is a positive, cost-effective approach to managing bird contamination that allows birds to continue roosting on the towers.

Application of Fault-Tolerant Computing For Spacecraft Using Commercial-Off-The-Shelf Microprocessors

DTIC Science & Technology

2000-06-01

real - time operating system and design of a human-computer interface (HCI) for a triple modular redundant (TMR) fault-tolerant microprocessor for use in space-based applications. Once disadvantage of using COTS hardware components is their susceptibility to the radiation effects present in the space environment. and specifically, radiation-induced single-event upsets (SEUs). In the event of an SEU, a fault-tolerant system can mitigate the effects of the upset and continue to process from the last known correct system state. The TMR basic hardware

A proposed microcomputer implementation of an Omega navigation processor

NASA Technical Reports Server (NTRS)

Abel, J. D.

1976-01-01

A microprocessor navigation systems using the Omega process is discussed. Several methods for correcting incoming sky waves are presented along with the hardware design which depends on a microcomputer. The control program is discussed, and block diagrams of the Omega processor and interface systems are presented.

The Quantum Socket: Wiring for Superconducting Qubits - Part 3

NASA Astrophysics Data System (ADS)

Mariantoni, M.; Bejianin, J. H.; McConkey, T. G.; Rinehart, J. R.; Bateman, J. D.; Earnest, C. T.; McRae, C. H.; Rohanizadegan, Y.; Shiri, D.; Penava, B.; Breul, P.; Royak, S.; Zapatka, M.; Fowler, A. G.

The implementation of a quantum computer requires quantum error correction codes, which allow to correct errors occurring on physical quantum bits (qubits). Ensemble of physical qubits will be grouped to form a logical qubit with a lower error rate. Reaching low error rates will necessitate a large number of physical qubits. Thus, a scalable qubit architecture must be developed. Superconducting qubits have been used to realize error correction. However, a truly scalable qubit architecture has yet to be demonstrated. A critical step towards scalability is the realization of a wiring method that allows to address qubits densely and accurately. A quantum socket that serves this purpose has been designed and tested at microwave frequencies. In this talk, we show results where the socket is used at millikelvin temperatures to measure an on-chip superconducting resonator. The control electronics is another fundamental element for scalability. We will present a proposal based on the quantum socket to interconnect a classical control hardware to a superconducting qubit hardware, where both are operated at millikelvin temperatures.

Highly efficient simulation environment for HDTV video decoder in VLSI design

NASA Astrophysics Data System (ADS)

Mao, Xun; Wang, Wei; Gong, Huimin; He, Yan L.; Lou, Jian; Yu, Lu; Yao, Qingdong; Pirsch, Peter

2002-01-01

With the increase of the complex of VLSI such as the SoC (System on Chip) of MPEG-2 Video decoder with HDTV scalability especially, simulation and verification of the full design, even as high as the behavior level in HDL, often proves to be very slow, costly and it is difficult to perform full verification until late in the design process. Therefore, they become bottleneck of the procedure of HDTV video decoder design, and influence it's time-to-market mostly. In this paper, the architecture of Hardware/Software Interface of HDTV video decoder is studied, and a Hardware-Software Mixed Simulation (HSMS) platform is proposed to check and correct error in the early design stage, based on the algorithm of MPEG-2 video decoding. The application of HSMS to target system could be achieved by employing several introduced approaches. Those approaches speed up the simulation and verification task without decreasing performance.

Moving formal methods into practice. Verifying the FTPP Scoreboard: Results, phase 1

NASA Technical Reports Server (NTRS)

Srivas, Mandayam; Bickford, Mark

1992-01-01

This report documents the Phase 1 results of an effort aimed at formally verifying a key hardware component, called Scoreboard, of a Fault-Tolerant Parallel Processor (FTPP) being built at Charles Stark Draper Laboratory (CSDL). The Scoreboard is part of the FTPP virtual bus that guarantees reliable communication between processors in the presence of Byzantine faults in the system. The Scoreboard implements a piece of control logic that approves and validates a message before it can be transmitted. The goal of Phase 1 was to lay the foundation of the Scoreboard verification. A formal specification of the functional requirements and a high-level hardware design for the Scoreboard were developed. The hardware design was based on a preliminary Scoreboard design developed at CSDL. A main correctness theorem, from which the functional requirements can be established as corollaries, was proved for the Scoreboard design. The goal of Phase 2 is to verify the final detailed design of Scoreboard. This task is being conducted as part of a NASA-sponsored effort to explore integration of formal methods in the development cycle of current fault-tolerant architectures being built in the aerospace industry.

Commercial Aircraft Maintenance Experience Relating to Engine External Hardware

NASA Technical Reports Server (NTRS)

Soditus, Sharon M.

2006-01-01

Airlines are extremely sensitive to the amount of dollars spent on maintaining the external engine hardware in the field. Analysis reveals that many problems revolve around a central issue, reliability. Fuel and oil leakage due to seal failure and electrical fault messages due to wire harness failures play a major role in aircraft delays and cancellations (D&C's) and scheduled maintenance. Correcting these items on the line requires a large investment of engineering resources and manpower after the fact. The smartest and most cost effective philosophy is to build the best hardware the first time. The only way to do that is to completely understand and model the operating environment, study the field experience of similar designs and to perform extensive testing.

Mixel camera--a new push-broom camera concept for high spatial resolution keystone-free hyperspectral imaging.

PubMed

Høye, Gudrun; Fridman, Andrei

2013-05-06

Current high-resolution push-broom hyperspectral cameras introduce keystone errors to the captured data. Efforts to correct these errors in hardware severely limit the optical design, in particular with respect to light throughput and spatial resolution, while at the same time the residual keystone often remains large. The mixel camera solves this problem by combining a hardware component--an array of light mixing chambers--with a mathematical method that restores the hyperspectral data to its keystone-free form, based on the data that was recorded onto the sensor with large keystone. A Virtual Camera software, that was developed specifically for this purpose, was used to compare the performance of the mixel camera to traditional cameras that correct keystone in hardware. The mixel camera can collect at least four times more light than most current high-resolution hyperspectral cameras, and simulations have shown that the mixel camera will be photon-noise limited--even in bright light--with a significantly improved signal-to-noise ratio compared to traditional cameras. A prototype has been built and is being tested.

Expecting the Unexpected: Radiation Hardened Software

NASA Technical Reports Server (NTRS)

Penix, John; Mehlitz, Peter C.

2005-01-01

Radiation induced Single Event Effects (SEEs) are a serious problem for spacecraft flight software, potentially leading to a complete loss of mission. Conventional risk mitigation has been focused on hardware, leading to slow, expensive and outdated on-board computing devices, increased power consumption and launch mass. Our approach is to look at SEEs from a software perspective, and to explicitly design flight software so that it can detect and correct the majority of SEES. Radiation hardened flight software will reduce the significant residual residual risk for critical missions and flight phases, and enable more use of inexpensive and fast COTS hardware.

First incremental buy for Increment 2 of the Space Transportation System (STS)

NASA Technical Reports Server (NTRS)

1989-01-01

Thiokol manufactured and delivered 9 flight motors to KSC on schedule. All test flights were successful. All spent SRMs were recovered. Design, development, manufacture, and delivery of required transportation, handling, and checkout equipment to MSFC and to KSC were completed on schedule. All items of data required by DPD 400 were prepared and delivered as directed. In the system requirements and analysis area, the point of departure from Buy 1 to the operational phase was developed in significant detail with a complete set of transition documentation available. The documentation prepared during the Buy 1 program was maintained and updated where required. The following flight support activities should be continued through other production programs: as-built materials usage tracking on all flight hardware; mass properties reporting for all flight hardware until sample size is large enough to verify that the weight limit requirements were met; ballistic predictions and postflight performance assessments for all production flights; and recovered SRM hardware inspection and anomaly identification. In the safety, reliability, and quality assurance area, activities accomplished were assurance oriented in nature and specifically formulated to prevent problems and hardware failures. The flight program to date has adequately demonstrated the success of this assurance approach. The attention focused on details of design, analysis, manufacture, and inspection to assure the production of high-quality hardware has resulted in the absence of flight failures. The few anomalies which did occur were evaluated, design or manufacturing changes incorporated, and corrective actions taken to preclude recurrence.

An Overview of Starfish: A Table-Centric Tool for Interactive Synthesis

NASA Technical Reports Server (NTRS)

Tsow, Alex

2008-01-01

Engineering is an interactive process that requires intelligent interaction at many levels. My thesis [1] advances an engineering discipline for high-level synthesis and architectural decomposition that integrates perspicuous representation, designer interaction, and mathematical rigor. Starfish, the software prototype for the design method, implements a table-centric transformation system for reorganizing control-dominated system expressions into high-level architectures. Based on the digital design derivation (DDD) system a designer-guided synthesis technique that applies correctness preserving transformations to synchronous data flow specifications expressed as co- recursive stream equations Starfish enhances user interaction and extends the reachable design space by incorporating four innovations: behavior tables, serialization tables, data refinement, and operator retiming. Behavior tables express systems of co-recursive stream equations as a table of guarded signal updates. Developers and users of the DDD system used manually constructed behavior tables to help them decide which transformations to apply and how to specify them. These design exercises produced several formally constructed hardware implementations: the FM9001 microprocessor, an SECD machine for evaluating LISP, and the SchemEngine, garbage collected machine for interpreting a byte-code representation of compiled Scheme programs. Bose and Tuna, two of DDD s developers, have subsequently commercialized the design derivation methodology at Derivation Systems, Inc. (DSI). DSI has formally derived and validated PCI bus interfaces and a Java byte-code processor; they further executed a contract to prototype SPIDER-NASA's ultra-reliable communications bus. To date, most derivations from DDD and DRS have targeted hardware due to its synchronous design paradigm. However, Starfish expressions are independent of the synchronization mechanism; there is no commitment to hardware or globally broadcast clocks. Though software back-ends for design derivation are limited to the DDD stream-interpreter, targeting synchronous or real-time software is not substantively different from targeting hardware.

Software requirements flow-down and preliminary software design for the G-CLEF spectrograph

NASA Astrophysics Data System (ADS)

Evans, Ian N.; Budynkiewicz, Jamie A.; DePonte Evans, Janet; Miller, Joseph B.; Onyuksel, Cem; Paxson, Charles; Plummer, David A.

2016-08-01

The Giant Magellan Telescope (GMT)-Consortium Large Earth Finder (G-CLEF) is a fiber-fed, precision radial velocity (PRV) optical echelle spectrograph that will be the first light instrument on the GMT. The G-CLEF instrument device control subsystem (IDCS) provides software control of the instrument hardware, including the active feedback loops that are required to meet the G-CLEF PRV stability requirements. The IDCS is also tasked with providing operational support packages that include data reduction pipelines and proposal preparation tools. A formal, but ultimately pragmatic approach is being used to establish a complete and correct set of requirements for both the G-CLEF device control and operational support packages. The device control packages must integrate tightly with the state-machine driven software and controls reference architecture designed by the GMT Organization. A model-based systems engineering methodology is being used to develop a preliminary design that meets these requirements. Through this process we have identified some lessons that have general applicability to the development of software for ground-based instrumentation. For example, tasking an individual with overall responsibility for science/software/hardware integration is a key step to ensuring effective integration between these elements. An operational concept document that includes detailed routine and non- routine operational sequences should be prepared in parallel with the hardware design process to tie together these elements and identify any gaps. Appropriate time-phasing of the hardware and software design phases is important, but revisions to driving requirements that impact software requirements and preliminary design are inevitable. Such revisions must be carefully managed to ensure efficient use of resources.

On verifying a high-level design. [cost and error analysis

NASA Technical Reports Server (NTRS)

Mathew, Ben; Wehbeh, Jalal A.; Saab, Daniel G.

1993-01-01

An overview of design verification techniques is presented, and some of the current research in high-level design verification is described. Formal hardware description languages that are capable of adequately expressing the design specifications have been developed, but some time will be required before they can have the expressive power needed to be used in real applications. Simulation-based approaches are more useful in finding errors in designs than they are in proving the correctness of a certain design. Hybrid approaches that combine simulation with other formal design verification techniques are argued to be the most promising over the short term.

A Method of Sky Ripple Residual Nonuniformity Reduction for a Cooled Infrared Imager and Hardware Implementation.

PubMed

Li, Yiyang; Jin, Weiqi; Li, Shuo; Zhang, Xu; Zhu, Jin

2017-05-08

Cooled infrared detector arrays always suffer from undesired ripple residual nonuniformity (RNU) in sky scene observations. The ripple residual nonuniformity seriously affects the imaging quality, especially for small target detection. It is difficult to eliminate it using the calibration-based techniques and the current scene-based nonuniformity algorithms. In this paper, we present a modified temporal high-pass nonuniformity correction algorithm using fuzzy scene classification. The fuzzy scene classification is designed to control the correction threshold so that the algorithm can remove ripple RNU without degrading the scene details. We test the algorithm on a real infrared sequence by comparing it to several well-established methods. The result shows that the algorithm has obvious advantages compared with the tested methods in terms of detail conservation and convergence speed for ripple RNU correction. Furthermore, we display our architecture with a prototype built on a Xilinx Virtex-5 XC5VLX50T field-programmable gate array (FPGA), which has two advantages: (1) low resources consumption; and (2) small hardware delay (less than 10 image rows). It has been successfully applied in an actual system.

Dataflow models for fault-tolerant control systems

NASA Technical Reports Server (NTRS)

Papadopoulos, G. M.

1984-01-01

Dataflow concepts are used to generate a unified hardware/software model of redundant physical systems which are prone to faults. Basic results in input congruence and synchronization are shown to reduce to a simple model of data exchanges between processing sites. Procedures are given for the construction of congruence schemata, the distinguishing features of any correctly designed redundant system.

Development of Hardware-in-the-Loop Simulation Based on Gazebo and Pixhawk for Unmanned Aerial Vehicles

NASA Astrophysics Data System (ADS)

Nguyen, Khoa Dang; Ha, Cheolkeun

2018-04-01

Hardware-in-the-loop simulation (HILS) is well known as an effective approach in the design of unmanned aerial vehicles (UAV) systems, enabling engineers to test the control algorithm on a hardware board with a UAV model on the software. Performance of HILS is determined by performances of the control algorithm, the developed model, and the signal transfer between the hardware and software. The result of HILS is degraded if any signal could not be transferred to the correct destination. Therefore, this paper aims to develop a middleware software to secure communications in HILS system for testing the operation of a quad-rotor UAV. In our HILS, the Gazebo software is used to generate a nonlinear six-degrees-of-freedom (6DOF) model, sensor model, and 3D visualization for the quad-rotor UAV. Meanwhile, the flight control algorithm is designed and implemented on the Pixhawk hardware. New middleware software, referred to as the control application software (CAS), is proposed to ensure the connection and data transfer between Gazebo and Pixhawk using the multithread structure in Qt Creator. The CAS provides a graphical user interface (GUI), allowing the user to monitor the status of packet transfer, and perform the flight control commands and the real-time tuning parameters for the quad-rotor UAV. Numerical implementations have been performed to prove the effectiveness of the middleware software CAS suggested in this paper.

Circuit Design Optimization Using Genetic Algorithm with Parameterized Uniform Crossover

NASA Astrophysics Data System (ADS)

Bao, Zhiguo; Watanabe, Takahiro

Evolvable hardware (EHW) is a new research field about the use of Evolutionary Algorithms (EAs) to construct electronic systems. EHW refers in a narrow sense to use evolutionary mechanisms as the algorithmic drivers for system design, while in a general sense to the capability of the hardware system to develop and to improve itself. Genetic Algorithm (GA) is one of typical EAs. We propose optimal circuit design by using GA with parameterized uniform crossover (GApuc) and with fitness function composed of circuit complexity, power, and signal delay. Parameterized uniform crossover is much more likely to distribute its disruptive trials in an unbiased manner over larger portions of the space, then it has more exploratory power than one and two-point crossover, so we have more chances of finding better solutions. Its effectiveness is shown by experiments. From the results, we can see that the best elite fitness, the average value of fitness of the correct circuits and the number of the correct circuits of GApuc are better than that of GA with one-point crossover or two-point crossover. The best case of optimal circuits generated by GApuc is 10.18% and 6.08% better in evaluating value than that by GA with one-point crossover and two-point crossover, respectively.

Physics Model-Based Scatter Correction in Multi-Source Interior Computed Tomography.

PubMed

Gong, Hao; Li, Bin; Jia, Xun; Cao, Guohua

2018-02-01

Multi-source interior computed tomography (CT) has a great potential to provide ultra-fast and organ-oriented imaging at low radiation dose. However, X-ray cross scattering from multiple simultaneously activated X-ray imaging chains compromises imaging quality. Previously, we published two hardware-based scatter correction methods for multi-source interior CT. Here, we propose a software-based scatter correction method, with the benefit of no need for hardware modifications. The new method is based on a physics model and an iterative framework. The physics model was derived analytically, and was used to calculate X-ray scattering signals in both forward direction and cross directions in multi-source interior CT. The physics model was integrated to an iterative scatter correction framework to reduce scatter artifacts. The method was applied to phantom data from both Monte Carlo simulations and physical experimentation that were designed to emulate the image acquisition in a multi-source interior CT architecture recently proposed by our team. The proposed scatter correction method reduced scatter artifacts significantly, even with only one iteration. Within a few iterations, the reconstructed images fast converged toward the "scatter-free" reference images. After applying the scatter correction method, the maximum CT number error at the region-of-interests (ROIs) was reduced to 46 HU in numerical phantom dataset and 48 HU in physical phantom dataset respectively, and the contrast-noise-ratio at those ROIs increased by up to 44.3% and up to 19.7%, respectively. The proposed physics model-based iterative scatter correction method could be useful for scatter correction in dual-source or multi-source CT.

Solar adaptive optics with the DKIST: status report

NASA Astrophysics Data System (ADS)

Johnson, Luke C.; Cummings, Keith; Drobilek, Mark; Gregory, Scott; Hegwer, Steve; Johansson, Erik; Marino, Jose; Richards, Kit; Rimmele, Thomas; Sekulic, Predrag; Wöger, Friedrich

2014-08-01

The DKIST wavefront correction system will be an integral part of the telescope, providing active alignment control, wavefront correction, and jitter compensation to all DKIST instruments. The wavefront correction system will operate in four observing modes, diffraction-limited, seeing-limited on-disk, seeing-limited coronal, and limb occulting with image stabilization. Wavefront correction for DKIST includes two major components: active optics to correct low-order wavefront and alignment errors, and adaptive optics to correct wavefront errors and high-frequency jitter caused by atmospheric turbulence. The adaptive optics system is built around a fast tip-tilt mirror and a 1600 actuator deformable mirror, both of which are controlled by an FPGA-based real-time system running at 2 kHz. It is designed to achieve on-axis Strehl of 0.3 at 500 nm in median seeing (r0 = 7 cm) and Strehl of 0.6 at 630 nm in excellent seeing (r0 = 20 cm). We present the current status of the DKIST high-order adaptive optics, focusing on system design, hardware procurements, and error budget management.

AP-102/104 Retrieval control system qualification test procedure

DOE Office of Scientific and Technical Information (OSTI.GOV)

RIECK, C.A.

1999-05-18

This Qualification Test Procedure documents the results of the qualification testing that was performed on the Project W-211, ''Initial Tank Retrieval Systems,'' retrieval control system (RCS) for tanks 241-AP-102 and 241-AP-104. The results confirm that the RCS has been programmed correctly and that the two related hardware enclosures have been assembled in accordance with the design documents.

Apollo Multiplexer operations manual

DOE Office of Scientific and Technical Information (OSTI.GOV)

Miller, M.M.

1985-04-01

This report describes the operation of the the Apollo Multiplexer, a microprocessor based communications device designed to process data between an Apollo computer and up to four Gandalf PACXIV data switches. Details are given on overall operation, hardware, and troubleshooting. The reader should gain sufficient knowledge from this report to understand the operation of the multiplexer and effectively analyze and correct any problems that might occur.

Temporal high-pass non-uniformity correction algorithm based on grayscale mapping and hardware implementation

NASA Astrophysics Data System (ADS)

Jin, Minglei; Jin, Weiqi; Li, Yiyang; Li, Shuo

2015-08-01

In this paper, we propose a novel scene-based non-uniformity correction algorithm for infrared image processing-temporal high-pass non-uniformity correction algorithm based on grayscale mapping (THP and GM). The main sources of non-uniformity are: (1) detector fabrication inaccuracies; (2) non-linearity and variations in the read-out electronics and (3) optical path effects. The non-uniformity will be reduced by non-uniformity correction (NUC) algorithms. The NUC algorithms are often divided into calibration-based non-uniformity correction (CBNUC) algorithms and scene-based non-uniformity correction (SBNUC) algorithms. As non-uniformity drifts temporally, CBNUC algorithms must be repeated by inserting a uniform radiation source which SBNUC algorithms do not need into the view, so the SBNUC algorithm becomes an essential part of infrared imaging system. The SBNUC algorithms' poor robustness often leads two defects: artifacts and over-correction, meanwhile due to complicated calculation process and large storage consumption, hardware implementation of the SBNUC algorithms is difficult, especially in Field Programmable Gate Array (FPGA) platform. The THP and GM algorithm proposed in this paper can eliminate the non-uniformity without causing defects. The hardware implementation of the algorithm only based on FPGA has two advantages: (1) low resources consumption, and (2) small hardware delay: less than 20 lines, it can be transplanted to a variety of infrared detectors equipped with FPGA image processing module, it can reduce the stripe non-uniformity and the ripple non-uniformity.

Relative gravimeter prototype based on micro electro mechanical system

NASA Astrophysics Data System (ADS)

Rozy, A. S. A.; Nugroho, H. A.; Yusuf, M.

2018-03-01

This research to make gravity measurement system by utilizing micro electro mechanical system based sensor in Gal order. System design consists of three parts, design of hardware, software, and interface. The design of the hardware include of designing the sensor design to measure the value of a stable gravity acceleration. The ADXL345 and ADXL335 sensors are tuned to obtain stable measurements. The design of the instrumentation system the next stage by creating a design to integrate between the sensor, microcontroller, and GPS. The design of programming algorithm is done with Arduino IDE software. The interface design uses a 20x4 LCD display to display the gravity acceleration value and store data on the storage media. The system uses a box made of iron and plate leveling to minimize measurement errors. The sensor test shows the ADXL345 sensor has a more stable value. The system is examined by comparing with gravity measurement of gravimeter A-10 results in Bandung observation post. The result of system test resulted the average of system correction value equal to 0.19 Gal. The system is expected to use for mineral exploration, water supply analyze, and earthquake precursor.

A Method of Sky Ripple Residual Nonuniformity Reduction for a Cooled Infrared Imager and Hardware Implementation

PubMed Central

Li, Yiyang; Jin, Weiqi; Li, Shuo; Zhang, Xu; Zhu, Jin

2017-01-01

Cooled infrared detector arrays always suffer from undesired ripple residual nonuniformity (RNU) in sky scene observations. The ripple residual nonuniformity seriously affects the imaging quality, especially for small target detection. It is difficult to eliminate it using the calibration-based techniques and the current scene-based nonuniformity algorithms. In this paper, we present a modified temporal high-pass nonuniformity correction algorithm using fuzzy scene classification. The fuzzy scene classification is designed to control the correction threshold so that the algorithm can remove ripple RNU without degrading the scene details. We test the algorithm on a real infrared sequence by comparing it to several well-established methods. The result shows that the algorithm has obvious advantages compared with the tested methods in terms of detail conservation and convergence speed for ripple RNU correction. Furthermore, we display our architecture with a prototype built on a Xilinx Virtex-5 XC5VLX50T field-programmable gate array (FPGA), which has two advantages: (1) low resources consumption; and (2) small hardware delay (less than 10 image rows). It has been successfully applied in an actual system. PMID:28481320

MIDAS - A microcomputer-based image display and analysis system with full Landsat frame processing capabilities

NASA Technical Reports Server (NTRS)

Hofman, L. B.; Erickson, W. K.; Donovan, W. E.

1984-01-01

Image Display and Analysis Systems (MIDAS) developed at NASA/Ames for the analysis of Landsat MSS images is described. The MIDAS computer power and memory, graphics, resource-sharing, expansion and upgrade, environment and maintenance, and software/user-interface requirements are outlined; the implementation hardware (including 32-bit microprocessor, 512K error-correcting RAM, 70 or 140-Mbyte formatted disk drive, 512 x 512 x 24 color frame buffer, and local-area-network transceiver) and applications software (ELAS, CIE, and P-EDITOR) are characterized; and implementation problems, performance data, and costs are examined. Planned improvements in MIDAS hardware and design goals and areas of exploration for MIDAS software are discussed.

Efficient architecture for spike sorting in reconfigurable hardware.

PubMed

Hwang, Wen-Jyi; Lee, Wei-Hao; Lin, Shiow-Jyu; Lai, Sheng-Ying

2013-11-01

This paper presents a novel hardware architecture for fast spike sorting. The architecture is able to perform both the feature extraction and clustering in hardware. The generalized Hebbian algorithm (GHA) and fuzzy C-means (FCM) algorithm are used for feature extraction and clustering, respectively. The employment of GHA allows efficient computation of principal components for subsequent clustering operations. The FCM is able to achieve near optimal clustering for spike sorting. Its performance is insensitive to the selection of initial cluster centers. The hardware implementations of GHA and FCM feature low area costs and high throughput. In the GHA architecture, the computation of different weight vectors share the same circuit for lowering the area costs. Moreover, in the FCM hardware implementation, the usual iterative operations for updating the membership matrix and cluster centroid are merged into one single updating process to evade the large storage requirement. To show the effectiveness of the circuit, the proposed architecture is physically implemented by field programmable gate array (FPGA). It is embedded in a System-on-Chip (SOC) platform for performance measurement. Experimental results show that the proposed architecture is an efficient spike sorting design for attaining high classification correct rate and high speed computation.

Motion compensation in digital subtraction angiography using graphics hardware.

PubMed

Deuerling-Zheng, Yu; Lell, Michael; Galant, Adam; Hornegger, Joachim

2006-07-01

An inherent disadvantage of digital subtraction angiography (DSA) is its sensitivity to patient motion which causes artifacts in the subtraction images. These artifacts could often reduce the diagnostic value of this technique. Automated, fast and accurate motion compensation is therefore required. To cope with this requirement, we first examine a method explicitly designed to detect local motions in DSA. Then, we implement a motion compensation algorithm by means of block matching on modern graphics hardware. Both methods search for maximal local similarity by evaluating a histogram-based measure. In this context, we are the first who have mapped an optimizing search strategy on graphics hardware while paralleling block matching. Moreover, we provide an innovative method for creating histograms on graphics hardware with vertex texturing and frame buffer blending. It turns out that both methods can effectively correct the artifacts in most case, as the hardware implementation of block matching performs much faster: the displacements of two 1024 x 1024 images can be calculated at 3 frames/s with integer precision or 2 frames/s with sub-pixel precision. Preliminary clinical evaluation indicates that the computation with integer precision could already be sufficient.

Integration of a Portfolio-based Approach to Evaluate Aerospace R and D Problem Formulation Into a Parametric Synthesis Tool

NASA Astrophysics Data System (ADS)

Oza, Amit R.

The focus of this study is to improve R&D effectiveness towards aerospace and defense planning in the early stages of the product development lifecycle. Emphasis is on: correct formulation of a decision problem, with special attention to account for data relationships between the individual design problem and the system capability required to size the aircraft, understanding of the meaning of the acquisition strategy objective and subjective data requirements that are required to arrive at a balanced analysis and/or "correct" mix of technology projects, understanding the meaning of the outputs that can be created from the technology analysis, and methods the researcher can use at effectively support decisions at the acquisition and conceptual design levels through utilization of a research and development portfolio strategy. The primary objectives of this study are to: (1) determine what strategy should be used to initialize conceptual design parametric sizing processes during requirements analysis for the materiel solution analysis stage of the product development lifecycle when utilizing data already constructed in the latter phase when working with a generic database management system synthesis tool integration architecture for aircraft design , and (2) assess how these new data relationships can contribute for innovative decision-making when solving acquisition hardware/technology portfolio problems. As such, an automated composable problem formulation system is developed to consider data interactions for the system architecture that manages acquisition pre-design concept refinement portfolio management, and conceptual design parametric sizing requirements. The research includes a way to: • Formalize the data storage and implement the data relationship structure with a system architecture automated through a database management system. • Allow for composable modeling, in terms of level of hardware abstraction, for the product model, mission model, and operational constraint model data blocks in the pre-design stages. • Allow the product model, mission model, and operational constraint model to be cross referenced with a generic aircraft synthesis capability to identify disciplinary analysis methods and processes. • Allow for matching, comparison, and balancing of the aircraft hardware portfolio to the associated developmental and technology risk metrics. • Allow for visualization technology portfolio decision space. The problem formulation architecture is finally implemented and verified for a generic hypersonic vehicle research demonstrator where a portfolio of technology hardware are measured for developmental and technology risks, prioritized by the researcher risk constraints, and the data generated delivered to a novel aircraft synthesis tool to confirm vehicle feasibility.

Hardware Design for a Fixed-Wing Airborne Gravity Measurement System

DTIC Science & Technology

1986-12-22

worldwide navigation system currently available that is sufficiently accurate for deter- mining Eotvos correction in airborne gravimetry is the Global...better in defining the strength of precipitation . The radar display is compact enough to be mounted on the cockpit, thus giving the pilots better...of the proposed AGMS version 3 MISCELLANEOUS AIRCRAFT CONSIDERATIONS Autopilot One of the most important considerations in airborne gravimetry is

Concepts for on-board satellite image registration. Volume 2: IAS prototype performance evaluation standard definition

NASA Astrophysics Data System (ADS)

Daluge, D. R.; Ruedger, W. H.

1981-06-01

Problems encountered in testing onboard signal processing hardware designed to achieve radiometric and geometric correction of satellite imaging data are considered. These include obtaining representative image and ancillary data for simulation and the transfer and storage of a large quantity of image data at very high speed. The high resolution, high speed preprocessing of LANDSAT-D imagery is considered.

A CLIPS based personal computer hardware diagnostic system

NASA Technical Reports Server (NTRS)

Whitson, George M.

1991-01-01

Often the person designated to repair personal computers has little or no knowledge of how to repair a computer. Described here is a simple expert system to aid these inexperienced repair people. The first component of the system leads the repair person through a number of simple system checks such as making sure that all cables are tight and that the dip switches are set correctly. The second component of the system assists the repair person in evaluating error codes generated by the computer. The final component of the system applies a large knowledge base to attempt to identify the component of the personal computer that is malfunctioning. We have implemented and tested our design with a full system to diagnose problems for an IBM compatible system based on the 8088 chip. In our tests, the inexperienced repair people found the system very useful in diagnosing hardware problems.

Enabling three-dimensional densitometric measurements using laboratory source X-ray micro-computed tomography

NASA Astrophysics Data System (ADS)

Pankhurst, M. J.; Fowler, R.; Courtois, L.; Nonni, S.; Zuddas, F.; Atwood, R. C.; Davis, G. R.; Lee, P. D.

2018-01-01

We present new software allowing significantly improved quantitative mapping of the three-dimensional density distribution of objects using laboratory source polychromatic X-rays via a beam characterisation approach (c.f. filtering or comparison to phantoms). One key advantage is that a precise representation of the specimen material is not required. The method exploits well-established, widely available, non-destructive and increasingly accessible laboratory-source X-ray tomography. Beam characterisation is performed in two stages: (1) projection data are collected through a range of known materials utilising a novel hardware design integrated into the rotation stage; and (2) a Python code optimises a spectral response model of the system. We provide hardware designs for use with a rotation stage able to be tilted, yet the concept is easily adaptable to virtually any laboratory system and sample, and implicitly corrects the image artefact known as beam hardening.

Fast and Flexible Successive-Cancellation List Decoders for Polar Codes

NASA Astrophysics Data System (ADS)

Hashemi, Seyyed Ali; Condo, Carlo; Gross, Warren J.

2017-11-01

Polar codes have gained significant amount of attention during the past few years and have been selected as a coding scheme for the next generation of mobile broadband standard. Among decoding schemes, successive-cancellation list (SCL) decoding provides a reasonable trade-off between the error-correction performance and hardware implementation complexity when used to decode polar codes, at the cost of limited throughput. The simplified SCL (SSCL) and its extension SSCL-SPC increase the speed of decoding by removing redundant calculations when encountering particular information and frozen bit patterns (rate one and single parity check codes), while keeping the error-correction performance unaltered. In this paper, we improve SSCL and SSCL-SPC by proving that the list size imposes a specific number of bit estimations required to decode rate one and single parity check codes. Thus, the number of estimations can be limited while guaranteeing exactly the same error-correction performance as if all bits of the code were estimated. We call the new decoding algorithms Fast-SSCL and Fast-SSCL-SPC. Moreover, we show that the number of bit estimations in a practical application can be tuned to achieve desirable speed, while keeping the error-correction performance almost unchanged. Hardware architectures implementing both algorithms are then described and implemented: it is shown that our design can achieve 1.86 Gb/s throughput, higher than the best state-of-the-art decoders.

Real-time lens distortion correction: speed, accuracy and efficiency

NASA Astrophysics Data System (ADS)

Bax, Michael R.; Shahidi, Ramin

2014-11-01

Optical lens systems suffer from nonlinear geometrical distortion. Optical imaging applications such as image-enhanced endoscopy and image-based bronchoscope tracking require correction of this distortion for accurate localization, tracking, registration, and measurement of image features. Real-time capability is desirable for interactive systems and live video. The use of a texture-mapping graphics accelerator, which is standard hardware on current motherboard chipsets and add-in video graphics cards, to perform distortion correction is proposed. Mesh generation for image tessellation, an error analysis, and performance results are presented. It is shown that distortion correction using commodity graphics hardware is substantially faster than using the main processor and can be performed at video frame rates (faster than 30 frames per second), and that the polar-based method of mesh generation proposed here is more accurate than a conventional grid-based approach. Using graphics hardware to perform distortion correction is not only fast and accurate but also efficient as it frees the main processor for other tasks, which is an important issue in some real-time applications.

Concepts for on-board satellite image registration. Volume 2: IAS prototype performance evaluation standard definition. [NEEDS Information Adaptive System

NASA Technical Reports Server (NTRS)

Daluge, D. R.; Ruedger, W. H.

1981-01-01

Problems encountered in testing onboard signal processing hardware designed to achieve radiometric and geometric correction of satellite imaging data are considered. These include obtaining representative image and ancillary data for simulation and the transfer and storage of a large quantity of image data at very high speed. The high resolution, high speed preprocessing of LANDSAT-D imagery is considered.

Development of a preprototype times wastewater recovery subsystem, addendum

NASA Technical Reports Server (NTRS)

Dehner, G. F.

1984-01-01

Six tasks are described reflecting subsystem hardware and software modifications and test evaluation of a TIMES wastewater recovery subsystem. The overall results are illustrated in a figure which shows the water production rate, the specific energy corrected to 26.5 VDC, and the product water conductivity at various points in the testing. Four tasks are described reflecting studies performed to develop a preliminary design concept for a next generation TIMES. The overall results of the study are the completion of major design analyses and preliminary configuration layout drawings.

Space Shuttle Abort Evolution

NASA Technical Reports Server (NTRS)

Henderson, Edward M.; Nguyen, Tri X.

2011-01-01

This paper documents some of the evolutionary steps in developing a rigorous Space Shuttle launch abort capability. The paper addresses the abort strategy during the design and development and how it evolved during Shuttle flight operations. The Space Shuttle Program made numerous adjustments in both the flight hardware and software as the knowledge of the actual flight environment grew. When failures occurred, corrections and improvements were made to avoid a reoccurrence and to provide added capability for crew survival. Finally some lessons learned are summarized for future human launch vehicle designers to consider.

A novel visual hardware behavioral language

NASA Technical Reports Server (NTRS)

Li, Xueqin; Cheng, H. D.

1992-01-01

Most hardware behavioral languages just use texts to describe the behavior of the desired hardware design. This is inconvenient for VLSI designers who enjoy using the schematic approach. The proposed visual hardware behavioral language has the ability to graphically express design information using visual parallel models (blocks), visual sequential models (processes) and visual data flow graphs (which consist of primitive operational icons, control icons, and Data and Synchro links). Thus, the proposed visual hardware behavioral language can not only specify hardware concurrent and sequential functionality, but can also visually expose parallelism, sequentiality, and disjointness (mutually exclusive operations) for the hardware designers. That would make the hardware designers capture the design ideas easily and explicitly using this visual hardware behavioral language.

Intracavity adaptive optics. 1: Astigmatism correction performance.

PubMed

Spinhirne, J M; Anafi, D; Freeman, R H; Garcia, H R

1981-03-15

A detailed experimental study has been conducted on adaptive optical control methodologies inside a laser resonator. A comparison is presented of several optimization techniques using a multidither zonal coherent optical adaptive technique system within a laser resonator for the correction of astigmatism. A dramatic performance difference is observed when optimizing on beam quality compared with optimizing on power-in-the-bucket. Experimental data are also presented on proper selection criteria for dither frequencies when controlling phase front errors. The effects of hardware limitations and design considerations on the performance of the system are presented, and general conclusions and physical interpretations on the results are made when possible.

Parallel transmission RF pulse design for eddy current correction at ultra high field.

PubMed

Zheng, Hai; Zhao, Tiejun; Qian, Yongxian; Ibrahim, Tamer; Boada, Fernando

2012-08-01

Multidimensional spatially selective RF pulses have been used in MRI applications such as B₁ and B₀ inhomogeneities mitigation. However, the long pulse duration has limited their practical applications. Recently, theoretical and experimental studies have shown that parallel transmission can effectively shorten pulse duration without sacrificing the quality of the excitation pattern. Nonetheless, parallel transmission with accelerated pulses can be severely impeded by hardware and/or system imperfections. One of such imperfections is the effect of the eddy current field. In this paper, we first show the effects of the eddy current field on the excitation pattern and then report an RF pulse the design method to correct eddy current fields caused by the RF coil and the gradient system. Experimental results on a 7 T human eight-channel parallel transmit system show substantial improvements on excitation patterns with the use of eddy current correction. Moreover, the proposed model-based correction method not only demonstrates comparable excitation patterns as the trajectory measurement method, but also significantly improves time efficiency. Copyright © 2012. Published by Elsevier Inc.

The signal extraction of fetal heart rate based on wavelet transform and BP neural network

NASA Astrophysics Data System (ADS)

Yang, Xiao Hong; Zhang, Bang-Cheng; Fu, Hu Dai

2005-04-01

This paper briefly introduces the collection and recognition of bio-medical signals, designs the method to collect FM signals. A detailed discussion on the system hardware, structure and functions is also given. Under LabWindows/CVI,the hardware and the driver do compatible, the hardware equipment work properly actively. The paper adopts multi threading technology for real-time analysis and makes use of latency time of CPU effectively, expedites program reflect speed, improves the program to perform efficiency. One threading is collecting data; the other threading is analyzing data. Using the method, it is broaden to analyze the signal in real-time. Wavelet transform to remove the main interference in the FM and by adding time-window to recognize with BP network; Finally the results of collecting signals and BP networks are discussed. 8 pregnant women's signals of FM were collected successfully by using the sensor. The correctness rate of BP network recognition is about 83.3% by using the above measure.

Solid Rocket Booster (SRB) Flight System Integration at Its Best

NASA Technical Reports Server (NTRS)

Wood, T. David; Kanner, Howard S.; Freeland, Donna M.; Olson, Derek T.

2011-01-01

The Solid Rocket Booster (SRB) element integrates all the subsystems needed for ascent flight, entry, and recovery of the combined Booster and Motor system. These include the structures, avionics, thrust vector control, pyrotechnic, range safety, deceleration, thermal protection, and retrieval systems. This represents the only human-rated, recoverable and refurbishable solid rocket ever developed and flown. Challenges included subsystem integration, thermal environments and severe loads (including water impact), sometimes resulting in hardware attrition. Several of the subsystems evolved during the program through design changes. These included the thermal protection system, range safety system, parachute/recovery system, and others. Because the system was recovered, the SRB was ideal for data and imagery acquisition, which proved essential for understanding loads, environments and system response. The three main parachutes that lower the SRBs to the ocean are the largest parachutes ever designed, and the SRBs are the largest structures ever to be lowered by parachutes. SRB recovery from the ocean was a unique process and represented a significant operational challenge; requiring personnel, facilities, transportation, and ground support equipment. The SRB element achieved reliability via extensive system testing and checkout, redundancy management, and a thorough postflight assessment process. However, the in-flight data and postflight assessment process revealed the hardware was affected much more strongly than originally anticipated. Assembly and integration of the booster subsystems required acceptance testing of reused hardware components for each build. Extensive testing was done to assure hardware functionality at each level of stage integration. Because the booster element is recoverable, subsystems were available for inspection and testing postflight, unique to the Shuttle launch vehicle. Problems were noted and corrective actions were implemented as needed. The postflight assessment process was quite detailed and a significant portion of flight operations. The SRBs provided fully redundant critical systems including thrust vector control, mission critical pyrotechnics, avionics, and parachute recovery system. The design intent was to lift off with full redundancy. On occasion, the redundancy management scheme was needed during flight operations. This paper describes some of the design challenges and technical issues, how the design evolved with time, and key areas where hardware reusability contributed to improved system level understanding.

Space shuttle holddown post blast shield

NASA Technical Reports Server (NTRS)

Larracas, F. B.

1991-01-01

The original and subsequent designs of the Solid Rocket Booster/Holddown Post blast shield assemblies and their associated hardware are described. It presents the major problems encountered during their early use in the Space Shuttle Program, during the Return-to-Flight Modification Phase, and during their fabrication and validation testing phases. The actions taken to correct the problems are discussed, along with the various concepts now being considered to increase the useful life of the blast shield.

Real-time look-up table-based color correction for still image stabilization of digital cameras without using frame memory

NASA Astrophysics Data System (ADS)

Luo, Lin-Bo; An, Sang-Woo; Wang, Chang-Shuai; Li, Ying-Chun; Chong, Jong-Wha

2012-09-01

Digital cameras usually decrease exposure time to capture motion-blur-free images. However, this operation will generate an under-exposed image with a low-budget complementary metal-oxide semiconductor image sensor (CIS). Conventional color correction algorithms can efficiently correct under-exposed images; however, they are generally not performed in real time and need at least one frame memory if they are implemented by hardware. The authors propose a real-time look-up table-based color correction method that corrects under-exposed images with hardware without using frame memory. The method utilizes histogram matching of two preview images, which are exposed for a long and short time, respectively, to construct an improved look-up table (ILUT) and then corrects the captured under-exposed image in real time. Because the ILUT is calculated in real time before processing the captured image, this method does not require frame memory to buffer image data, and therefore can greatly save the cost of CIS. This method not only supports single image capture, but also bracketing to capture three images at a time. The proposed method was implemented by hardware description language and verified by a field-programmable gate array with a 5 M CIS. Simulations show that the system can perform in real time with a low cost and can correct the color of under-exposed images well.

Can your software engineer program your PLC?

NASA Astrophysics Data System (ADS)

Borrowman, Alastair J.; Taylor, Philip

2016-07-01

The use of Programmable Logic Controllers (PLCs) in the control of large physics experiments is ubiquitous1, 2, 3. The programming of these controllers is normally the domain of engineers with a background in electronics, this paper introduces PLC program development from the software engineer's perspective. PLC programs provide the link between control software running on PC architecture systems and physical hardware controlled and monitored by digital and analog signals. The higher-level software running on the PC is typically responsible for accepting operator input and from this deciding when and how hardware connected to the PLC is controlled. The PLC accepts demands from the PC, considers the current state of its connected hardware and if correct to do so (based upon interlocks or other constraints) adjusts its hardware output signals appropriately for the PC's demands. A published ICD (Interface Control Document) defines the PLC memory locations available to be written and read by the PC to control and monitor the hardware. Historically the method of programming PLCs has been ladder diagrams that closely resemble circuit diagrams, however, PLC manufacturers nowadays also provide, and promote, the use of higher-level programming languages4. Based on techniques used in the development of high-level PC software to control PLCs for multiple telescopes, this paper examines the development of PLC programs to operate the hardware of a medical cyclotron beamline controlled from a PC using the Experimental Physics and Industrial Control System (EPICS), which is also widely used in telescope control5, 6, 7. The PLC used is the new generation Siemens S7-1200 programmed using Siemens Pascal based Structured Control Language (SCL), which is their implementation of Structured Text (ST). The approach described is that from a software engineer's perspective, utilising Siemens Totally Integrated Automation (TIA) Portal integrated development environment (IDE) to create modular PLC programs based upon reusable functions capable of being unit tested without the PLC connected to hardware. Emphasis has been placed on designing an interface between EPICS and SCL that enforces correct operation of hardware through stringent separation of PC accessible PLC memory and hardware I/O addresses used only by the PLC. The paper also introduces the method used to automate the creation, from the same source document, the PLC memory structure (tag) definitions (defining memory used to access hardware I/O and that accessed by the PC) and creation of the PC program data structures (EPICS database records) used to access the permitted PLC addresses. From direct experience this paper demonstrates the advantages of PLC program development being shared between electronic and software engineers, to enable use of the most appropriate processes from both the perspective of the hardware and the higher-level software used to control it.

Formal development of a clock synchronization circuit

NASA Technical Reports Server (NTRS)

Miner, Paul S.

1995-01-01

This talk presents the latest stage in formal development of a fault-tolerant clock synchronization circuit. The development spans from a high level specification of the required properties to a circuit realizing the core function of the system. An abstract description of an algorithm has been verified to satisfy the high-level properties using the mechanical verification system EHDM. This abstract description is recast as a behavioral specification input to the Digital Design Derivation system (DDD) developed at Indiana University. DDD provides a formal design algebra for developing correct digital hardware. Using DDD as the principle design environment, a core circuit implementing the clock synchronization algorithm was developed. The design process consisted of standard DDD transformations augmented with an ad hoc refinement justified using the Prototype Verification System (PVS) from SRI International. Subsequent to the above development, Wilfredo Torres-Pomales discovered an area-efficient realization of the same function. Establishing correctness of this optimization requires reasoning in arithmetic, so a general verification is outside the domain of both DDD transformations and model-checking techniques. DDD represents digital hardware by systems of mutually recursive stream equations. A collection of PVS theories was developed to aid in reasoning about DDD-style streams. These theories include a combinator for defining streams that satisfy stream equations, and a means for proving stream equivalence by exhibiting a stream bisimulation. DDD was used to isolate the sub-system involved in Torres-Pomales' optimization. The equivalence between the original design and the optimized verified was verified in PVS by exhibiting a suitable bisimulation. The verification depended upon type constraints on the input streams and made extensive use of the PVS type system. The dependent types in PVS provided a useful mechanism for defining an appropriate bisimulation.

The Application of Acoustic Measurements and Audio Recordings for Diagnosis of In-Flight Hardware Anomalies

NASA Technical Reports Server (NTRS)

Welsh, David; Denham, Samuel; Allen, Christopher

2011-01-01

In many cases, an initial symptom of hardware malfunction is unusual or unexpected acoustic noise. Many industries such as automotive, heating and air conditioning, and petro-chemical processing use noise and vibration data along with rotating machinery analysis techniques to identify noise sources and correct hardware defects. The NASA/Johnson Space Center Acoustics Office monitors the acoustic environment of the International Space Station (ISS) through periodic sound level measurement surveys. Trending of the sound level measurement survey results can identify in-flight hardware anomalies. The crew of the ISS also serves as a "detection tool" in identifying unusual hardware noises; in these cases the spectral analysis of audio recordings made on orbit can be used to identify hardware defects that are related to rotating components such as fans, pumps, and compressors. In this paper, three examples of the use of sound level measurements and audio recordings for the diagnosis of in-flight hardware anomalies are discussed: identification of blocked inter-module ventilation (IMV) ducts, diagnosis of abnormal ISS Crew Quarters rack exhaust fan noise, and the identification and replacement of a defective flywheel assembly in the Treadmill with Vibration Isolation (TVIS) hardware. In each of these examples, crew time was saved by identifying the off nominal component or condition that existed and in directing in-flight maintenance activities to address and correct each of these problems.

Topex Microwave Radiometer thermal control - Post-system-test modifications and on-orbit performance

NASA Technical Reports Server (NTRS)

Lin, Edward I.

1993-01-01

The Topex Microwave Radiometer has had an excellent thermal performance since launch. The instrument, however, went through a hardware modification right before launch to correct for a thermal design inadequacy that was uncovered during the spacecraft thermal vacuum test. This paper reports on how the initially obscure problem was tracked down, and how the thermal models were revised, validated, and utilized to investigate the solution options and guide the hardware modification decisions. Details related to test data interpretation, analytical uncertainties, and model-prediction vs. test-data correlation, are documented. Instrument/spacecraft interface issues, where the problem originated and where in general pitfalls abound, are dealt with specifically. Finally, on-orbit thermal performance data are presented, which exhibit good agreement with flight predictions, and lessons learned are discussed.

Advances in time-of-flight PET

PubMed Central

Surti, Suleman; Karp, Joel S.

2016-01-01

This paper provides a review and an update on time-of-flight PET imaging with a focus on PET instrumentation, ranging from hardware design to software algorithms. We first present a short introduction to PET, followed by a description of TOF PET imaging and its history from the early days. Next, we introduce the current state-of-art in TOF PET technology and briefly summarize the benefits of TOF PET imaging. This is followed by a discussion of the various technological advancements in hardware (scintillators, photo-sensors, electronics) and software (image reconstruction) that have led to the current widespread use of TOF PET technology, and future developments that have the potential for further improvements in the TOF imaging performance. We conclude with a discussion of some new research areas that have opened up in PET imaging as a result of having good system timing resolution, ranging from new algorithms for attenuation correction, through efficient system calibration techniques, to potential for new PET system designs. PMID:26778577

Modeling and design of a cone-beam CT head scanner using task-based imaging performance optimization

NASA Astrophysics Data System (ADS)

Xu, J.; Sisniega, A.; Zbijewski, W.; Dang, H.; Stayman, J. W.; Wang, X.; Foos, D. H.; Aygun, N.; Koliatsos, V. E.; Siewerdsen, J. H.

2016-04-01

Detection of acute intracranial hemorrhage (ICH) is important for diagnosis and treatment of traumatic brain injury, stroke, postoperative bleeding, and other head and neck injuries. This paper details the design and development of a cone-beam CT (CBCT) system developed specifically for the detection of low-contrast ICH in a form suitable for application at the point of care. Recognizing such a low-contrast imaging task to be a major challenge in CBCT, the system design began with a rigorous analysis of task-based detectability including critical aspects of system geometry, hardware configuration, and artifact correction. The imaging performance model described the three-dimensional (3D) noise-equivalent quanta using a cascaded systems model that included the effects of scatter, scatter correction, hardware considerations of complementary metal-oxide semiconductor (CMOS) and flat-panel detectors (FPDs), and digitization bit depth. The performance was analyzed with respect to a low-contrast (40-80 HU), medium-frequency task representing acute ICH detection. The task-based detectability index was computed using a non-prewhitening observer model. The optimization was performed with respect to four major design considerations: (1) system geometry (including source-to-detector distance (SDD) and source-to-axis distance (SAD)); (2) factors related to the x-ray source (including focal spot size, kVp, dose, and tube power); (3) scatter correction and selection of an antiscatter grid; and (4) x-ray detector configuration (including pixel size, additive electronics noise, field of view (FOV), and frame rate, including both CMOS and a-Si:H FPDs). Optimal design choices were also considered with respect to practical constraints and available hardware components. The model was verified in comparison to measurements on a CBCT imaging bench as a function of the numerous design parameters mentioned above. An extended geometry (SAD  =  750 mm, SDD  =  1100 mm) was found to be advantageous in terms of patient dose (20 mGy) and scatter reduction, while a more isocentric configuration (SAD  =  550 mm, SDD  =  1000 mm) was found to give a more compact and mechanically favorable configuration with minor tradeoff in detectability. An x-ray source with a 0.6 mm focal spot size provided the best compromise between spatial resolution requirements and x-ray tube power. Use of a modest anti-scatter grid (8:1 GR) at a 20 mGy dose provided slight improvement (~5-10%) in the detectability index, but the benefit was lost at reduced dose. The potential advantages of CMOS detectors over FPDs were quantified, showing that both detectors provided sufficient spatial resolution for ICH detection, while the former provided a potentially superior low-dose performance, and the latter provided the requisite FOV for volumetric imaging in a centered-detector geometry. Task-based imaging performance modeling provides an important starting point for CBCT system design, especially for the challenging task of ICH detection, which is somewhat beyond the capabilities of existing CBCT platforms. The model identifies important tradeoffs in system geometry and hardware configuration, and it supports the development of a dedicated CBCT system for point-of-care application. A prototype suitable for clinical studies is in development based on this analysis.

Towards composition of verified hardware devices

NASA Technical Reports Server (NTRS)

Schubert, E. Thomas; Levitt, K.; Cohen, G. C.

1991-01-01

Computers are being used where no affordable level of testing is adequate. Safety and life critical systems must find a replacement for exhaustive testing to guarantee their correctness. Through a mathematical proof, hardware verification research has focused on device verification and has largely ignored system composition verification. To address these deficiencies, we examine how the current hardware verification methodology can be extended to verify complete systems.

A DSP-based neural network non-uniformity correction algorithm for IRFPA

NASA Astrophysics Data System (ADS)

Liu, Chong-liang; Jin, Wei-qi; Cao, Yang; Liu, Xiu

2009-07-01

An effective neural network non-uniformity correction (NUC) algorithm based on DSP is proposed in this paper. The non-uniform response in infrared focal plane array (IRFPA) detectors produces corrupted images with a fixed-pattern noise(FPN).We introduced and analyzed the artificial neural network scene-based non-uniformity correction (SBNUC) algorithm. A design of DSP-based NUC development platform for IRFPA is described. The DSP hardware platform designed is of low power consumption, with 32-bit fixed point DSP TMS320DM643 as the kernel processor. The dependability and expansibility of the software have been improved by DSP/BIOS real-time operating system and Reference Framework 5. In order to realize real-time performance, the calibration parameters update is set at a lower task priority then video input and output in DSP/BIOS. In this way, calibration parameters updating will not affect video streams. The work flow of the system and the strategy of real-time realization are introduced. Experiments on real infrared imaging sequences demonstrate that this algorithm requires only a few frames to obtain high quality corrections. It is computationally efficient and suitable for all kinds of non-uniformity.

Optically buffered Jones-matrix-based multifunctional optical coherence tomography with polarization mode dispersion correction

PubMed Central

Hong, Young-Joo; Makita, Shuichi; Sugiyama, Satoshi; Yasuno, Yoshiaki

2014-01-01

Polarization mode dispersion (PMD) degrades the performance of Jones-matrix-based polarization-sensitive multifunctional optical coherence tomography (JM-OCT). The problem is specially acute for optically buffered JM-OCT, because the long fiber in the optical buffering module induces a large amount of PMD. This paper aims at presenting a method to correct the effect of PMD in JM-OCT. We first mathematically model the PMD in JM-OCT and then derive a method to correct the PMD. This method is a combination of simple hardware modification and subsequent software correction. The hardware modification is introduction of two polarizers which transform the PMD into global complex modulation of Jones matrix. Subsequently, the software correction demodulates the global modulation. The method is validated with an experimentally obtained point spread function with a mirror sample, as well as by in vivo measurement of a human retina. PMID:25657888

Generation of Unbiased Ionospheric Corrections in Brazilian Region for GNSS positioning based on SSR concept

NASA Astrophysics Data System (ADS)

Monico, J. F. G.; De Oliveira, P. S., Jr.; Morel, L.; Fund, F.; Durand, S.; Durand, F.

2017-12-01

Mitigation of ionospheric effects on GNSS (Global Navigation Satellite System) signals is very challenging, especially for GNSS positioning applications based on SSR (State Space Representation) concept, which requires the knowledge of spatial correlated errors with considerable accuracy level (centimeter). The presence of satellite and receiver hardware biases on GNSS measurements difficult the proper estimation of ionospheric corrections, reducing their physical meaning. This problematic can lead to ionospheric corrections biased of several meters and often presenting negative values, which is physically not possible. In this contribution, we discuss a strategy to obtain SSR ionospheric corrections based on GNSS measurements from CORS (Continuous Operation Reference Stations) Networks with minimal presence of hardware biases and consequently physical meaning. Preliminary results are presented on generation and application of such corrections for simulated users located in Brazilian region under high level of ionospheric activity.

Vacuum Technology Considerations For Mass Metrology

PubMed Central

Abbott, Patrick J.; Jabour, Zeina J.

2011-01-01

Vacuum weighing of mass artifacts eliminates the necessity of air buoyancy correction and its contribution to the measurement uncertainty. Vacuum weighing is also an important process in the experiments currently underway for the redefinition of the SI mass unit, the kilogram. Creating the optimum vacuum environment for mass metrology requires careful design and selection of construction materials, plumbing components, pumping, and pressure gauging technologies. We review the vacuum technology1 required for mass metrology and suggest procedures and hardware for successful and reproducible operation. PMID:26989593

Protecting quantum memories using coherent parity check codes

NASA Astrophysics Data System (ADS)

Roffe, Joschka; Headley, David; Chancellor, Nicholas; Horsman, Dominic; Kendon, Viv

2018-07-01

Coherent parity check (CPC) codes are a new framework for the construction of quantum error correction codes that encode multiple qubits per logical block. CPC codes have a canonical structure involving successive rounds of bit and phase parity checks, supplemented by cross-checks to fix the code distance. In this paper, we provide a detailed introduction to CPC codes using conventional quantum circuit notation. We demonstrate the implementation of a CPC code on real hardware, by designing a [[4, 2, 2

The ac power system testbed

NASA Technical Reports Server (NTRS)

Mildice, J.; Sundberg, R.

1987-01-01

The object of this program was to design, build, test, and deliver a high frequency (20 kHz) Power System Testbed which would electrically approximate a single, separable power channel of an IOC Space Station. That program is described, including the technical background, and the results are discussed showing that the major assumptions about the characteristics of this class of hardware (size, mass, efficiency, control, etc.) were substantially correct. This testbed equipment was completed and delivered and is being operated as part of the Space Station Power System Test Facility.

The FONT5 Bunch-by-Bunch Position and Angle Feedback System at ATF2

NASA Astrophysics Data System (ADS)

Apsimon, R. J.; Bett, D. R.; Burrows, P. N.; Christian, G. B.; Constance, B.; Davis, M. R.; Gerbershagen, A.; Perry, C.; Resta-Lopez, J.

The FONT5 upstream beam-based feedback system at ATF2 is designed to correct the position and angle jitter at the entrance to the ATF2 final-focus system, and also to demonstrate a prototype intra-train feedback system for the International Linear Collider interaction point. We discuss the hardware, from stripline BPMs to kickers, and RF and digital signal processing, as well as presenting results from the latest beam tests at ATF2.

High-fidelity real-time maritime scene rendering

NASA Astrophysics Data System (ADS)

Shyu, Hawjye; Taczak, Thomas M.; Cox, Kevin; Gover, Robert; Maraviglia, Carlos; Cahill, Colin

2011-06-01

The ability to simulate authentic engagements using real-world hardware is an increasingly important tool. For rendering maritime environments, scene generators must be capable of rendering radiometrically accurate scenes with correct temporal and spatial characteristics. When the simulation is used as input to real-world hardware or human observers, the scene generator must operate in real-time. This paper introduces a novel, real-time scene generation capability for rendering radiometrically accurate scenes of backgrounds and targets in maritime environments. The new model is an optimized and parallelized version of the US Navy CRUISE_Missiles rendering engine. It was designed to accept environmental descriptions and engagement geometry data from external sources, render a scene, transform the radiometric scene using the electro-optical response functions of a sensor under test, and output the resulting signal to real-world hardware. This paper reviews components of the scene rendering algorithm, and details the modifications required to run this code in real-time. A description of the simulation architecture and interfaces to external hardware and models is presented. Performance assessments of the frame rate and radiometric accuracy of the new code are summarized. This work was completed in FY10 under Office of Secretary of Defense (OSD) Central Test and Evaluation Investment Program (CTEIP) funding and will undergo a validation process in FY11.

GPU accelerated manifold correction method for spinning compact binaries

NASA Astrophysics Data System (ADS)

Ran, Chong-xi; Liu, Song; Zhong, Shuang-ying

2018-04-01

The graphics processing unit (GPU) acceleration of the manifold correction algorithm based on the compute unified device architecture (CUDA) technology is designed to simulate the dynamic evolution of the Post-Newtonian (PN) Hamiltonian formulation of spinning compact binaries. The feasibility and the efficiency of parallel computation on GPU have been confirmed by various numerical experiments. The numerical comparisons show that the accuracy on GPU execution of manifold corrections method has a good agreement with the execution of codes on merely central processing unit (CPU-based) method. The acceleration ability when the codes are implemented on GPU can increase enormously through the use of shared memory and register optimization techniques without additional hardware costs, implying that the speedup is nearly 13 times as compared with the codes executed on CPU for phase space scan (including 314 × 314 orbits). In addition, GPU-accelerated manifold correction method is used to numerically study how dynamics are affected by the spin-induced quadrupole-monopole interaction for black hole binary system.

Scout fourth stage attitude and velocity control (AVC) system feasibility study

NASA Technical Reports Server (NTRS)

Byars, L. B.

1975-01-01

The feasibility of incorporating a guidance system in the Scout fourth stage to achieve a significant improvement in expected payload delivery accuracy is studied. The technical investigations included the determination of the AVC equipment performance requirements, establishment of qualification and acceptance test levels, generation of layouts illustrating design approaches for the upper D and payload transition sections to incorporate the hardware, and the preparation of a vendor bid package. Correction concepts, utilizing inertial velocity and attitude, were identified and evaluated. Fourth stage attitude adjustments as determined from inertial velocity variation through the first three stages and a final velocity correction based upon the measured in-plane component errors at injection were employed. Results show radical reductions in apogee-perigee deviations.

A programmable and portable NMES device for drop foot correction and blood flow assist applications.

PubMed

Breen, Paul P; Corley, Gavin J; O'Keeffe, Derek T; Conway, Richard; Olaighin, Gearóid

2009-04-01

The Duo-STIM, a new, programmable and portable neuromuscular stimulation system for drop foot correction and blood flow assist applications is presented. The system consists of a programmer unit and a portable, programmable stimulator unit. The portable stimulator features fully programmable, sensor-controlled, constant-voltage, dual-channel stimulation and accommodates a range of customized stimulation profiles. Trapezoidal and free-form adaptive stimulation intensity envelope algorithms are provided for drop foot correction applications, while time dependent and activity dependent algorithms are provided for blood flow assist applications. A variety of sensor types can be used with the portable unit, including force sensitive resistor-based foot switches and MEMS-based accelerometer and gyroscope devices. The paper provides a detailed description of the hardware and block-level system design for both units. The programming and operating procedures for the system are also presented. Finally, functional bench test results for the system are presented.

A programmable and portable NMES device for drop foot correction and blood flow assist applications.

PubMed

Breen, Paul P; Corley, Gavin J; O'Keeffe, Derek T; Conway, Richard; OLaighin, Gearoid

2007-01-01

The Duo-STIM, a new, programmable and portable neuromuscular stimulation system for drop foot correction and blood flow assist applications is presented. The system consists of a programmer unit and a portable, programmable stimulator unit. The portable stimulator features fully programmable, sensor-controlled, constant-voltage, dual-channel stimulation and accommodates a range of customized stimulation profiles. Trapezoidal and free-form adaptive stimulation intensity envelope algorithms are provided for drop foot correction applications, while time dependent and activity dependent algorithms are provided for blood flow assist applications. A variety of sensor types can be used with the portable unit, including force sensitive resistor based foot switches and NMES based accelerometer and gyroscope devices. The paper provides a detailed description of the hardware and block-level system design for both units. The programming and operating procedures for the system are also presented. Finally, functional bench test results for the system are presented.

A Very Low Cost BCH Decoder for High Immunity of On-Chip Memories

NASA Astrophysics Data System (ADS)

Seo, Haejun; Han, Sehwan; Heo, Yoonseok; Cho, Taewon

BCH(Bose-Chaudhuri-Hoquenbhem) code, a type of block codes-cyclic codes, has very strong error-correcting ability which is vital for performing the error protection on the memory system. BCH code has many kinds of dual algorithms, PGZ(Pererson-Gorenstein-Zierler) algorithm out of them is advantageous in view of correcting the errors through the simple calculation in t value. However, this is problematic when this becomes 0 (divided by zero) in case ν ≠ t. In this paper, the circuit would be simplified by suggesting the multi-mode hardware architecture in preparation that v were 0~3. First, production cost would be less thanks to the smaller number of gates. Second, lessening power consumption could lengthen the recharging period. The very low cost and simple datapath make our design a good choice in small-footprint SoC(System on Chip) as ECC(Error Correction Code/Circuit) in memory system.

Apollo experience report: Power generation system

NASA Technical Reports Server (NTRS)

Bell, D., III; Plauche, F. M.

1973-01-01

A comprehensive review of the design philosophy and experience of the Apollo electrical power generation system is presented. The review of the system covers a period of 8 years, from conception through the Apollo 12 lunar-landing mission. The program progressed from the definition phase to hardware design, system development and qualification, and, ultimately, to the flight phase. Several problems were encountered; however, a technology evolved that enabled resolution of the problems and resulted in a fully manrated power generation system. These problems are defined and examined, and the corrective action taken is discussed. Several recommendations are made to preclude similar occurrences and to provide a more reliable fuel-cell power system.

A 20 MHz CMOS reorder buffer for a superscalar microprocessor

NASA Technical Reports Server (NTRS)

Lenell, John; Wallace, Steve; Bagherzadeh, Nader

1992-01-01

Superscalar processors can achieve increased performance by issuing instructions out-of-order from the original sequential instruction stream. Implementing an out-of-order instruction issue policy requires a hardware mechanism to prevent incorrectly executed instructions from updating register values. A reorder buffer can be used to allow a superscalar processor to issue instructions out-of-order and maintain program correctness. This paper describes the design and implementation of a 20MHz CMOS reorder buffer for superscalar processors. The reorder buffer is designed to accept and retire two instructions per cycle. A full-custom layout in 1.2 micron has been implemented, measuring 1.1058 mm by 1.3542 mm.

Advanced Ultra-Violet (UV) Aircraft Fire Detection System. Volume 2. System Hardware Design, Software Design, and Test

DTIC Science & Technology

1982-08-01

REPORT SHT",, -ENGLAND A W*nson Match Company Saftey and Protion Division ISSUE " 3 (contd) HEADS 1 2 3 4 5 6 7 8 ,7 0 BITS iii ii The 832 tm inspection...input data buffering and output data buffering. 2.2.2.3.1. Power up, Reset Circuit To ensure correct system operation when power is first applied the...act in conjunction with R2, R3 and two buffer sections of IC2. When power is first applied , Cl is discharged, Via the pot chain divider of R2 and R3 the

Formal hardware verification of digital circuits

NASA Technical Reports Server (NTRS)

Joyce, J.; Seger, C.-J.

1991-01-01

The use of formal methods to verify the correctness of digital circuits is less constrained by the growing complexity of digital circuits than conventional methods based on exhaustive simulation. This paper briefly outlines three main approaches to formal hardware verification: symbolic simulation, state machine analysis, and theorem-proving.

Runtime verification of embedded real-time systems.

PubMed

Reinbacher, Thomas; Függer, Matthias; Brauer, Jörg

We present a runtime verification framework that allows on-line monitoring of past-time Metric Temporal Logic (ptMTL) specifications in a discrete time setting. We design observer algorithms for the time-bounded modalities of ptMTL, which take advantage of the highly parallel nature of hardware designs. The algorithms can be translated into efficient hardware blocks, which are designed for reconfigurability, thus, facilitate applications of the framework in both a prototyping and a post-deployment phase of embedded real-time systems. We provide formal correctness proofs for all presented observer algorithms and analyze their time and space complexity. For example, for the most general operator considered, the time-bounded Since operator, we obtain a time complexity that is doubly logarithmic both in the point in time the operator is executed and the operator's time bounds. This result is promising with respect to a self-contained, non-interfering monitoring approach that evaluates real-time specifications in parallel to the system-under-test. We implement our framework on a Field Programmable Gate Array platform and use extensive simulation and logic synthesis runs to assess the benefits of the approach in terms of resource usage and operating frequency.

Hardware acceleration and verification of systems designed with hardware description languages (HDL)

NASA Astrophysics Data System (ADS)

Wisniewski, Remigiusz; Wegrzyn, Marek

2005-02-01

Hardware description languages (HDLs) allow creating bigger and bigger designs nowadays. The size of prototyped systems very often exceeds million gates. Therefore verification process of the designs takes several hours or even days. The solution for this problem can be solved by hardware acceleration of simulation.

Fault Detection and Correction for the Solar Dynamics Observatory Attitude Control System

NASA Technical Reports Server (NTRS)

Starin, Scott R.; Vess, Melissa F.; Kenney, Thomas M.; Maldonado, Manuel D.; Morgenstern, Wendy M.

2007-01-01

The Solar Dynamics Observatory is an Explorer-class mission that will launch in early 2009. The spacecraft will operate in a geosynchronous orbit, sending data 24 hours a day to a devoted ground station in White Sands, New Mexico. It will carry a suite of instruments designed to observe the Sun in multiple wavelengths at unprecedented resolution. The Atmospheric Imaging Assembly includes four telescopes with focal plane CCDs that can image the full solar disk in four different visible wavelengths. The Extreme-ultraviolet Variability Experiment will collect time-correlated data on the activity of the Sun's corona. The Helioseismic and Magnetic Imager will enable study of pressure waves moving through the body of the Sun. The attitude control system on Solar Dynamics Observatory is responsible for four main phases of activity. The physical safety of the spacecraft after separation must be guaranteed. Fine attitude determination and control must be sufficient for instrument calibration maneuvers. The mission science mode requires 2-arcsecond control according to error signals provided by guide telescopes on the Atmospheric Imaging Assembly, one of the three instruments to be carried. Lastly, accurate execution of linear and angular momentum changes to the spacecraft must be provided for momentum management and orbit maintenance. In thsp aper, single-fault tolerant fault detection and correction of the Solar Dynamics Observatory attitude control system is described. The attitude control hardware suite for the mission is catalogued, with special attention to redundancy at the hardware level. Four reaction wheels are used where any three are satisfactory. Four pairs of redundant thrusters are employed for orbit change maneuvers and momentum management. Three two-axis gyroscopes provide full redundancy for rate sensing. A digital Sun sensor and two autonomous star trackers provide two-out-of-three redundancy for fine attitude determination. The use of software to maximize chances of recovery from any hardware or software fault is detailed. A generic fault detection and correction software structure is used, allowing additions, deletions, and adjustments to fault detection and correction rules. This software structure is fed by in-line fault tests that are also able to take appropriate actions to avoid corruption of the data stream.

Optimization of the Multi-Spectral Euclidean Distance Calculation for FPGA-based Spaceborne Systems

NASA Technical Reports Server (NTRS)

Cristo, Alejandro; Fisher, Kevin; Perez, Rosa M.; Martinez, Pablo; Gualtieri, Anthony J.

2012-01-01

Due to the high quantity of operations that spaceborne processing systems must carry out in space, new methodologies and techniques are being presented as good alternatives in order to free the main processor from work and improve the overall performance. These include the development of ancillary dedicated hardware circuits that carry out the more redundant and computationally expensive operations in a faster way, leaving the main processor free to carry out other tasks while waiting for the result. One of these devices is SpaceCube, a FPGA-based system designed by NASA. The opportunity to use FPGA reconfigurable architectures in space allows not only the optimization of the mission operations with hardware-level solutions, but also the ability to create new and improved versions of the circuits, including error corrections, once the satellite is already in orbit. In this work, we propose the optimization of a common operation in remote sensing: the Multi-Spectral Euclidean Distance calculation. For that, two different hardware architectures have been designed and implemented in a Xilinx Virtex-5 FPGA, the same model of FPGAs used by SpaceCube. Previous results have shown that the communications between the embedded processor and the circuit create a bottleneck that affects the overall performance in a negative way. In order to avoid this, advanced methods including memory sharing, Native Port Interface (NPI) connections and Data Burst Transfers have been used.

DDL:Digital systems design language

NASA Technical Reports Server (NTRS)

Shival, S. G.

1980-01-01

Hardware description languages are valuable tools in such applications as hardware design, system documentation, and logic design training. DDL is convenient medium for inputting design details into hardware-design automation system. It is suitable for describing digital systems at gate, register transfer, and major combinational block level.

Wind tunnel evaluation of YF-12 inlet response to internal airflow disturbances with and without control. [Lewis 10 by 10 ft supersonic wind tunnel tests

NASA Technical Reports Server (NTRS)

Cole, G. L.; Neiner, G. H.; Dustin, M. O.

1978-01-01

The response of terminal-shock position and static pressures in the subsonic duct of a YF-12 aircraft flight-hardware inlet to perturbations in simulated engine corrected airflow were obtained with and without inlet control. Frequency response data, obtained with inlet controls inactive, indicated the general nature of the inherent inlet dynamics, assisted in the design of controls, and provided a baseline reference for responses with active controls. All the control laws were implemented by means of a digital computer that could be programmed to behave like the flight inlet's existing analog control. The experimental controls were designed using an analytical optimization technique. The capabilities of the controls were limited primarily by the actuation hardware. The experimental controls provided somewhat better attenuation of terminal shock excursions than did the YF-13 inlet control. Controls using both the forward and aft bypass systems also provided somewhat better attenuation than those using just the forward bypass. The main advantage of using both bypasses is in the greater control flexibility that is achieved.

Design of a cardiac monitor in terms of parameters of QRS complex.

PubMed

Chen, Zhen-cheng; Ni, Li-li; Su, Ke-ping; Wang, Hong-yan; Jiang, Da-zong

2002-08-01

Objective. To design a portable cardiac monitor system based on the available ordinary ECG machine and works on the basis of QRS parameters. Method. The 80196 single chip microcomputer was used as the central microprocessor and real time electrocardiac signal was collected and analyzed [correction of analysized] in the system. Result. Apart from the performance of an ordinary monitor, this machine possesses also the following functions: arrhythmia analysis, HRV analysis, alarm, freeze, and record of automatic papering. Convenient in carrying, the system is powered by AC or DC sources. Stability, low power and low cost are emphasized in the hardware design; and modularization method is applied in software design. Conclusion. Popular in usage and low cost made the portable monitor system suitable for use under simple conditions.

Solid Rocket Booster (SRB) - Evolution and Lessons Learned During the Shuttle Program

NASA Technical Reports Server (NTRS)

Kanner, Howard S.; Freeland, Donna M.; Olson, Derek T.; Wood, T. David; Vaccaro, Mark V.

2011-01-01

The Solid Rocket Booster (SRB) element integrates all the subsystems needed for ascent flight, entry, and recovery of the combined Booster and Motor system. These include the structures, avionics, thrust vector control, pyrotechnic, range safety, deceleration, thermal protection, and retrieval systems. This represents the only human-rated, recoverable and refurbishable solid rocket ever developed and flown. Challenges included subsystem integration, thermal environments and severe loads (including water impact), sometimes resulting in hardware attrition. Several of the subsystems evolved during the program through design changes. These included the thermal protection system, range safety system, parachute/recovery system, and others. Obsolescence issues occasionally required component recertification. Because the system was recovered, the SRB was ideal for data and imagery acquisition, which proved essential for understanding loads and system response. The three main parachutes that lower the SRBs to the ocean are the largest parachutes ever designed, and the SRBs are the largest structures ever to be lowered by parachutes. SRB recovery from the ocean was a unique process and represented a significant operational challenge; requiring personnel, facilities, transportation, and ground support equipment. The SRB element achieved reliability via extensive system testing and checkout, redundancy management, and a thorough postflight assessment process. Assembly and integration of the booster subsystems was a unique process and acceptance testing of reused hardware components was required for each build. Extensive testing was done to assure hardware functionality at each level of stage integration. Because the booster element is recoverable, subsystems were available for inspection and testing postflight, unique to the Shuttle launch vehicle. Problems were noted and corrective actions were implemented as needed. The postflight assessment process was quite detailed and a significant portion of flight operations. The SRBs provided fully redundant critical systems including thrust vector control, mission critical pyrotechnics, avionics, and parachute recovery system. The design intent was to lift off with full redundancy. On occasion, the redundancy management scheme was needed during flight operations. This paper describes some of the design challenges, how the design evolved with time, and key areas where hardware reusability contributed to improved system level understanding.

Wavefront measurement using computational adaptive optics.

PubMed

South, Fredrick A; Liu, Yuan-Zhi; Bower, Andrew J; Xu, Yang; Carney, P Scott; Boppart, Stephen A

2018-03-01

In many optical imaging applications, it is necessary to correct for aberrations to obtain high quality images. Optical coherence tomography (OCT) provides access to the amplitude and phase of the backscattered optical field for three-dimensional (3D) imaging samples. Computational adaptive optics (CAO) modifies the phase of the OCT data in the spatial frequency domain to correct optical aberrations without using a deformable mirror, as is commonly done in hardware-based adaptive optics (AO). This provides improvement of image quality throughout the 3D volume, enabling imaging across greater depth ranges and in highly aberrated samples. However, the CAO aberration correction has a complicated relation to the imaging pupil and is not a direct measurement of the pupil aberrations. Here we present new methods for recovering the wavefront aberrations directly from the OCT data without the use of hardware adaptive optics. This enables both computational measurement and correction of optical aberrations.

Enhancement of vehicle dynamics via an innovative magnetorheological fluid limited slip differential

NASA Astrophysics Data System (ADS)

Russo, Riccardo; Strano, Salvatore; Terzo, Mario

2016-03-01

A new automotive controllable differential is proposed and tested, firstly in software environment and, successively, following a hardware in the loop procedure based on the employment of the physical prototype. The device is based on the employment of magnetorheological fluid, whose magnetization allows to generate the locking torque and, consequently, the corrective yaw moment. A vehicle model has been derived and adopted for the design of a yaw moment controller based on the sliding mode approach. Some feedbacks requested by the controller have been estimated by means of an extended Kalman filter. The obtained results show the effectiveness of the device in terms of vehicle dynamics improvement. Indeed, the results reached by the vehicle in presence of the new differential confirm the improved performances for both steady and unsteady state manoeuvres. Moreover, the hardware in the loop testing allows to overcome the limits due to the modelling of the differential, fully validating the physical prototype.

DRS: Derivational Reasoning System

NASA Technical Reports Server (NTRS)

Bose, Bhaskar

1995-01-01

The high reliability requirements for airborne systems requires fault-tolerant architectures to address failures in the presence of physical faults, and the elimination of design flaws during the specification and validation phase of the design cycle. Although much progress has been made in developing methods to address physical faults, design flaws remain a serious problem. Formal methods provides a mathematical basis for removing design flaws from digital systems. DRS (Derivational Reasoning System) is a formal design tool based on advanced research in mathematical modeling and formal synthesis. The system implements a basic design algebra for synthesizing digital circuit descriptions from high level functional specifications. DRS incorporates an executable specification language, a set of correctness preserving transformations, verification interface, and a logic synthesis interface, making it a powerful tool for realizing hardware from abstract specifications. DRS integrates recent advances in transformational reasoning, automated theorem proving and high-level CAD synthesis systems in order to provide enhanced reliability in designs with reduced time and cost.

MM wave SAR sensor design: Concept for an airborne low level reconnaissance system

NASA Astrophysics Data System (ADS)

Boesswetter, C.

1986-07-01

The basic system design considerations for a high resolution SAR system operating at 35 GHz or 94 GHz are given. First it is shown that only the focussed SAR concept in the side looking configuration matches the requirements and constraints. After definition of illumination geometry and airborne modes the fundamental SAR parameters in range and azimuth direction are derived. A review of the performance parameters of some critical mm wave components (coherent pulsed transmitters, front ends, antennas) establish the basis for further analysis. The power and contrast budget in the processed SAR image shows the feasibility of a 35/94 GHz SAR sensor design. The discussion of the resulting system parameters points out that this unusual system design implies both benefits and new risk areas. One of the benefits besides the compactness of sensor hardware turns out to be the short synthetic aperture length simplifying the design of the digital SAR processor, preferably operating in real time. A possible architecture based on current state-of-the-art correlator hardware is shown. One of the potential risk areas in achieving high resolution SAR imagery in the mm wave frequency band is motion compensation. However, it is shown that the short range and short synthetic aperture lengths ease the problem so that correction of motion induced phase errors and thus focussed synthetic aperture processing should be possible.

Apollo experience report: The problem of stress-corrosion cracking

NASA Technical Reports Server (NTRS)

Johnson, R. E.

1973-01-01

Stress-corrosion cracking has been the most common cause of structural-material failures in the Apollo Program. The frequency of stress-corrosion cracking has been high and the magnitude of the problem, in terms of hardware lost and time and money expended, has been significant. In this report, the significant Apollo Program experiences with stress-corrosion cracking are discussed. The causes of stress-corrosion cracking and the corrective actions are discussed, in terminology familiar to design engineers and management personnel, to show how stress-corrosion cracking can be prevented.

A /31,15/ Reed-Solomon Code for large memory systems

NASA Technical Reports Server (NTRS)

Lim, R. S.

1979-01-01

This paper describes the encoding and the decoding of a (31,15) Reed-Solomon Code for multiple-burst error correction for large memory systems. The decoding procedure consists of four steps: (1) syndrome calculation, (2) error-location polynomial calculation, (3) error-location numbers calculation, and (4) error values calculation. The principal features of the design are the use of a hardware shift register for both high-speed encoding and syndrome calculation, and the use of a commercially available (31,15) decoder for decoding Steps 2, 3 and 4.

AC power system breadboard

NASA Technical Reports Server (NTRS)

Wappes, Loran J.; Sundberg, R.; Mildice, J.; Peterson, D.; Hushing, S.

1987-01-01

The object of this program was to design, build, test, and deliver a high-frequency (20-kHz) Power System Breadboard which would electrically approximate a pair of dual redundant power channels of an IOC Space Station. This report describes that program, including the technical background, and discusses the results, showing that the major assumptions about the characteristics of this class of hardware (size, mass, efficiency, control, etc.) were substantially correct. This testbed equipment has been completed and delivered to LeRC, where it is operating as a part of the Space Station Power System Test Facility.

Open-source hardware for medical devices

PubMed Central

2016-01-01

Open-source hardware is hardware whose design is made publicly available so anyone can study, modify, distribute, make and sell the design or the hardware based on that design. Some open-source hardware projects can potentially be used as active medical devices. The open-source approach offers a unique combination of advantages, including reducing costs and faster innovation. This article compares 10 of open-source healthcare projects in terms of how easy it is to obtain the required components and build the device. PMID:27158528

Open-source hardware for medical devices.

PubMed

Niezen, Gerrit; Eslambolchilar, Parisa; Thimbleby, Harold

2016-04-01

Open-source hardware is hardware whose design is made publicly available so anyone can study, modify, distribute, make and sell the design or the hardware based on that design. Some open-source hardware projects can potentially be used as active medical devices. The open-source approach offers a unique combination of advantages, including reducing costs and faster innovation. This article compares 10 of open-source healthcare projects in terms of how easy it is to obtain the required components and build the device.

Frame Decoder for Consultative Committee for Space Data Systems (CCSDS)

NASA Technical Reports Server (NTRS)

Reyes, Miguel A. De Jesus

2014-01-01

GNU Radio is a free and open source development toolkit that provides signal processing to implement software radios. It can be used with low-cost external RF hardware to create software defined radios, or without hardware in a simulation-like environment. GNU Radio applications are primarily written in Python and C++. The Universal Software Radio Peripheral (USRP) is a computer-hosted software radio designed by Ettus Research. The USRP connects to a host computer via high-speed Gigabit Ethernet. Using the open source Universal Hardware Driver (UHD), we can run GNU Radio applications using the USRP. An SDR is a "radio in which some or all physical layer functions are software defined"(IEEE Definition). A radio is any kind of device that wirelessly transmits or receives radio frequency (RF) signals in the radio frequency. An SDR is a radio communication system where components that have been typically implemented in hardware are implemented in software. GNU Radio has a generic packet decoder block that is not optimized for CCSDS frames. Using this generic packet decoder will add bytes to the CCSDS frames and will not permit for bit error correction using Reed-Solomon. The CCSDS frames consist of 256 bytes, including a 32-bit sync marker (0x1ACFFC1D). This frames are generated by the Space Data Processor and GNU Radio will perform the modulation and framing operations, including frame synchronization.

Optoelectronic date acquisition system based on FPGA

NASA Astrophysics Data System (ADS)

Li, Xin; Liu, Chunyang; Song, De; Tong, Zhiguo; Liu, Xiangqing

2015-11-01

An optoelectronic date acquisition system is designed based on FPGA. FPGA chip that is EP1C3T144C8 of Cyclone devices from Altera corporation is used as the centre of logic control, XTP2046 chip is used as A/D converter, host computer that communicates with the date acquisition system through RS-232 serial communication interface are used as display device and photo resistance is used as photo sensor. We use Verilog HDL to write logic control code about FPGA. It is proved that timing sequence is correct through the simulation of ModelSim. Test results indicate that this system meets the design requirement, has fast response and stable operation by actual hardware circuit test.

Involuntary eye motion correction in retinal optical coherence tomography: Hardware or software solution?

PubMed

Baghaie, Ahmadreza; Yu, Zeyun; D'Souza, Roshan M

2017-04-01

In this paper, we review state-of-the-art techniques to correct eye motion artifacts in Optical Coherence Tomography (OCT) imaging. The methods for eye motion artifact reduction can be categorized into two major classes: (1) hardware-based techniques and (2) software-based techniques. In the first class, additional hardware is mounted onto the OCT scanner to gather information about the eye motion patterns during OCT data acquisition. This information is later processed and applied to the OCT data for creating an anatomically correct representation of the retina, either in an offline or online manner. In software based techniques, the motion patterns are approximated either by comparing the acquired data to a reference image, or by considering some prior assumptions about the nature of the eye motion. Careful investigations done on the most common methods in the field provides invaluable insight regarding future directions of the research in this area. The challenge in hardware-based techniques lies in the implementation aspects of particular devices. However, the results of these techniques are superior to those obtained from software-based techniques because they are capable of capturing secondary data related to eye motion during OCT acquisition. Software-based techniques on the other hand, achieve moderate success and their performance is highly dependent on the quality of the OCT data in terms of the amount of motion artifacts contained in them. However, they are still relevant to the field since they are the sole class of techniques with the ability to be applied to legacy data acquired using systems that do not have extra hardware to track eye motion. Copyright © 2017 Elsevier B.V. All rights reserved.

Hardware Testing and System Evaluation: Procedures to Evaluate Commodity Hardware for Production Clusters

DOE Office of Scientific and Technical Information (OSTI.GOV)

Goebel, J

2004-02-27

Without stable hardware any program will fail. The frustration and expense of supporting bad hardware can drain an organization, delay progress, and frustrate everyone involved. At Stanford Linear Accelerator Center (SLAC), we have created a testing method that helps our group, SLAC Computer Services (SCS), weed out potentially bad hardware and purchase the best hardware at the best possible cost. Commodity hardware changes often, so new evaluations happen periodically each time we purchase systems and minor re-evaluations happen for revised systems for our clusters, about twice a year. This general framework helps SCS perform correct, efficient evaluations. This article outlinesmore » SCS's computer testing methods and our system acceptance criteria. We expanded the basic ideas to other evaluations such as storage, and we think the methods outlined in this article has helped us choose hardware that is much more stable and supportable than our previous purchases. We have found that commodity hardware ranges in quality, so systematic method and tools for hardware evaluation were necessary. This article is based on one instance of a hardware purchase, but the guidelines apply to the general problem of purchasing commodity computer systems for production computational work.« less

Space biology initiative program definition review. Trade study 4: Design modularity and commonality

NASA Technical Reports Server (NTRS)

Jackson, L. Neal; Crenshaw, John, Sr.; Davidson, William L.; Herbert, Frank J.; Bilodeau, James W.; Stoval, J. Michael; Sutton, Terry

1989-01-01

The relative cost impacts (up or down) of developing Space Biology hardware using design modularity and commonality is studied. Recommendations for how the hardware development should be accomplished to meet optimum design modularity requirements for Life Science investigation hardware will be provided. In addition, the relative cost impacts of implementing commonality of hardware for all Space Biology hardware are defined. Cost analysis and supporting recommendations for levels of modularity and commonality are presented. A mathematical or statistical cost analysis method with the capability to support development of production design modularity and commonality impacts to parametric cost analysis is provided.

75 FR 70150 - Airworthiness Directives; McDonnell Douglas Corporation Model MD-11 and MD-11F Airplanes

Federal Register 2010, 2011, 2012, 2013, 2014

2010-11-17

... installation of hardware. Boeing stated that the original NPRM implies that only wiring changes would be required; installation of brackets and supporting hardware, however, are required in addition to the wiring... tail tank fuel system, a wiring change, and corrective actions if necessary. That NPRM was prompted by...

Hardware design for the Autonomous Visibility Monitoring (AVM) observatory

NASA Technical Reports Server (NTRS)

Cowles, K.

1993-01-01

The hardware for the three Autonomous Visibility Monitoring (AVM) observatories was redesigned. Changes in hardware design include electronics components, weather sensors, and the telescope drive system. Operation of the new hardware is discussed, as well as some of its features. The redesign will allow reliable automated operation.

A Framework for the Development of Scalable Heterogeneous Robot Teams with Dynamically Distributed Processing

NASA Astrophysics Data System (ADS)

Martin, Adrian

As the applications of mobile robotics evolve it has become increasingly less practical for researchers to design custom hardware and control systems for each problem. This research presents a new approach to control system design that looks beyond end-of-lifecycle performance and considers control system structure, flexibility, and extensibility. Toward these ends the Control ad libitum philosophy is proposed, stating that to make significant progress in the real-world application of mobile robot teams the control system must be structured such that teams can be formed in real-time from diverse components. The Control ad libitum philosophy was applied to the design of the HAA (Host, Avatar, Agent) architecture: a modular hierarchical framework built with provably correct distributed algorithms. A control system for exploration and mapping, search and deploy, and foraging was developed to evaluate the architecture in three sets of hardware-in-the-loop experiments. First, the basic functionality of the HAA architecture was studied, specifically the ability to: a) dynamically form the control system, b) dynamically form the robot team, c) dynamically form the processing network, and d) handle heterogeneous teams. Secondly, the real-time performance of the distributed algorithms was tested, and proved effective for the moderate sized systems tested. Furthermore, the distributed Just-in-time Cooperative Simultaneous Localization and Mapping (JC-SLAM) algorithm demonstrated accuracy equal to or better than traditional approaches in resource starved scenarios, while reducing exploration time significantly. The JC-SLAM strategies are also suitable for integration into many existing particle filter SLAM approaches, complementing their unique optimizations. Thirdly, the control system was subjected to concurrent software and hardware failures in a series of increasingly complex experiments. Even with unrealistically high rates of failure the control system was able to successfully complete its tasks. The HAA implementation designed following the Control ad libitum philosophy proved to be capable of dynamic team formation and extremely robust against both hardware and software failure; and, due to the modularity of the system there is significant potential for reuse of assets and future extensibility. One future goal is to make the source code publically available and establish a forum for the development and exchange of new agents.

Design and Realization of Controllable Ultrasonic Fault Detector Automatic Verification System

NASA Astrophysics Data System (ADS)

Sun, Jing-Feng; Liu, Hui-Ying; Guo, Hui-Juan; Shu, Rong; Wei, Kai-Li

The ultrasonic flaw detection equipment with remote control interface is researched and the automatic verification system is developed. According to use extensible markup language, the building of agreement instruction set and data analysis method database in the system software realizes the controllable designing and solves the diversification of unreleased device interfaces and agreements. By using the signal generator and a fixed attenuator cascading together, a dynamic error compensation method is proposed, completes what the fixed attenuator does in traditional verification and improves the accuracy of verification results. The automatic verification system operating results confirms that the feasibility of the system hardware and software architecture design and the correctness of the analysis method, while changes the status of traditional verification process cumbersome operations, and reduces labor intensity test personnel.

An executable specification for the message processor in a simple combining network

NASA Technical Reports Server (NTRS)

Middleton, David

1995-01-01

While the primary function of the network in a parallel computer is to communicate data between processors, it is often useful if the network can also perform rudimentary calculations. That is, some simple processing ability in the network itself, particularly for performing parallel prefix computations, can reduce both the volume of data being communicated and the computational load on the processors proper. Unfortunately, typical implementations of such networks require a large fraction of the hardware budget, and so combining networks are viewed as being impractical. The FFP Machine has such a combining network, and various characteristics of the machine allow a good deal of simplification in the network design. Despite being simple in construction however, the network relies on many subtle details to work correctly. This paper describes an executable model of the network which will serve several purposes. It provides a complete and detailed description of the network which can substantiate its ability to support necessary functions. It provides an environment in which algorithms to be run on the network can be designed and debugged more easily than they would on physical hardware. Finally, it provides the foundation for exploring the design of the message receiving facility which connects the network to the individual processors.

Optimization of moisture content for wheat seedling germination in a cellulose acetate medium for a space flight experiment

NASA Technical Reports Server (NTRS)

Johnson, Corinne F.; Dreschel, Thomas W.; Brown, Christopher S.; Wheeler, Raymond M.

1994-01-01

The Porous Tube Plant Nutrient Delivery System (PTPNDS), a hydrophilic, microporous ceramic tube hydroponic system designed for microgravity, will be tested in a middeck locker of the Space Shuttle. The flight experiment will focus on hardware operation and assess its ability to support seed germination and early seedling growth in microgravity. The water controlling system of the PTPNDS hardware has been successfully tested during the parabolic flight of the KC-135. One challenge to the development of the spaceflight experiment was to devise a method of holding seeds to the cylindrical porous tube. The seed holder must provide water and air to the seed, absorb water from the porous tube, withstand sterilization, provide a clear path for shoots and roots to emerge, and be composed of flight qualified materials. In preparation for the flight experiment, a wheat seed-holder has been designed that utilizes a cellulose acetate plug to facilitate imbibition and to hold the wheat seeds in contact with the porous tube in the correct orientation during the vibration of launch and the microgravity environment of orbit. Germination and growth studies with wheat at a range of temperatures showed that optimal moisture was 78% (by weight) in the cellulose acetate seed holders. These and other design considerations are discussed.

Optimization of moisture content for wheat seedling germination in a cellulose acetate medium for a space flight experiment

NASA Technical Reports Server (NTRS)

Johnson, C. F.; Dreschel, T. W.; Brown, C. S.; Wheeler, R. M.

1996-01-01

The Porous Tube Plant Nutrient Delivery System (PTPNDS), a hydrophilic, microporous ceramic tube hydroponic system designed for microgravity, will be tested in a middeck locker of the Space Shuttle. The flight experiment will focus on hardware operation and assess its ability to support seed germination and early seedling growth in microgravity. The water controlling system of the PTPNDS hardware has been successfully tested during the parabolic flight of the KC-135. One challenge to the development of the space flight experiment was to devise a method of holding seeds to the cylindrical porous tube. The seed-holder must provide water and air to the seed, absorb water from the porous tube, withstand sterilization, provide a clear path for shoots and roots to emerge, and be composed of flight qualified materials. In preparation for the flight experiment, a wheat seed-holder has been designed that utilizes a cellulose acetate plug to facilitate imbibition and to hold the wheat seeds in contact with the porous tube in the correct orientation during the vibration of launch and the microgravity environment of orbit. Germination and growth studies with wheat at a range of temperatures showed that optimal moisture was 78% (by weight) in the cellulose acetate seed holders. These and other design considerations are discussed.

Characterization and correction of cupping effect artefacts in cone beam CT

PubMed Central

Hunter, AK; McDavid, WD

2012-01-01

Objective The purpose of this study was to demonstrate and correct the cupping effect artefact that occurs owing to the presence of beam hardening and scatter radiation during image acquisition in cone beam CT (CBCT). Methods A uniform aluminium cylinder (6061) was used to demonstrate the cupping effect artefact on the Planmeca Promax 3D CBCT unit (Planmeca OY, Helsinki, Finland). The cupping effect was studied using a line profile plot of the grey level values using ImageJ software (National Institutes of Health, Bethesda, MD). A hardware-based correction method using copper pre-filtration was used to address this artefact caused by beam hardening and a software-based subtraction algorithm was used to address scatter contamination. Results The hardware-based correction used to address the effects of beam hardening suppressed the cupping effect artefact but did not eliminate it. The software-based correction used to address the effects of scatter resulted in elimination of the cupping effect artefact. Conclusion Compensating for the presence of beam hardening and scatter radiation improves grey level uniformity in CBCT. PMID:22378754

On-Site Inspection RadioIsotopic Spectroscopy (Osiris) System Development

DOE Office of Scientific and Technical Information (OSTI.GOV)

Caffrey, Gus J.; Egger, Ann E.; Krebs, Kenneth M.

2015-09-01

We have designed and tested hardware and software for the acquisition and analysis of high-resolution gamma-ray spectra during on-site inspections under the Comprehensive Nuclear-Test-Ban Treaty (CTBT). The On-Site Inspection RadioIsotopic Spectroscopy—Osiris—software filters the spectral data to display only radioisotopic information relevant to CTBT on-site inspections, e.g.,132I. A set of over 100 fission-product spectra was employed for Osiris testing. These spectra were measured, where possible, or generated by modeling. The synthetic test spectral compositions include non-nuclear-explosion scenarios, e.g., a severe nuclear reactor accident, and nuclear-explosion scenarios such as a vented underground nuclear test. Comparing its computer-based analyses to expert visual analysesmore » of the test spectra, Osiris correctly identifies CTBT-relevant fission product isotopes at the 95% level or better.The Osiris gamma-ray spectrometer is a mechanically-cooled, battery-powered ORTEC Transpec-100, chosen to avoid the need for liquid nitrogen during on-site inspections. The spectrometer was used successfully during the recent 2014 CTBT Integrated Field Exercise in Jordan. The spectrometer is controlled and the spectral data analyzed by a Panasonic Toughbook notebook computer. To date, software development has been the main focus of the Osiris project. In FY2016-17, we plan to modify the Osiris hardware, integrate the Osiris software and hardware, and conduct rigorous field tests to ensure that the Osiris system will function correctly during CTBT on-site inspections. The planned development will raise Osiris to technology readiness level TRL-8; transfer the Osiris technology to a commercial manufacturer, and demonstrate Osiris to potential CTBT on-site inspectors.« less

Parameterized hardware description as object oriented hardware model implementation

NASA Astrophysics Data System (ADS)

Drabik, Pawel K.

2010-09-01

The paper introduces novel model for design, visualization and management of complex, highly adaptive hardware systems. The model settles component oriented environment for both hardware modules and software application. It is developed on parameterized hardware description research. Establishment of stable link between hardware and software, as a purpose of designed and realized work, is presented. Novel programming framework model for the environment, named Graphic-Functional-Components is presented. The purpose of the paper is to present object oriented hardware modeling with mentioned features. Possible model implementation in FPGA chips and its management by object oriented software in Java is described.

Progress on PEEM3 -- An Aberration Corrected X-Ray Photoemission Electron Microscope at the ALS

DOE Office of Scientific and Technical Information (OSTI.GOV)

MacDowell, A. A.; Feng, J.; DeMello, A.

2007-01-19

A new ultrahigh-resolution photoemission electron microscope called PEEM3 is being developed and built at the Advanced Light Source (ALS). An electron mirror combined with a much-simplified magnetic dipole separator is to be used to provide simultaneous correction of spherical and chromatic aberrations. It is installed on an elliptically polarized undulator (EPU) beamline, and will be operated with very high spatial resolution and high flux to study the composition, structure, electric and magnetic properties of complex materials. The instrument has been designed and is described. The instrumental hardware is being deployed in 2 phases. The first phase is the deployment ofmore » a standard PEEM type microscope consisting of the standard linear array of electrostatic electron lenses. The second phase will be the installation of the aberration corrected upgrade to improve resolution and throughput. This paper describes progress as the instrument enters the commissioning part of the first phase.« less

Progress on PEEM3 - An Aberration Corrected X-Ray PhotoemissionElectron Microscope at the ALS

DOE Office of Scientific and Technical Information (OSTI.GOV)

MacDowell, Alastair A.; Feng, J.; DeMello, A.

2006-05-20

A new ultrahigh-resolution photoemission electron microscope called PEEM3 is being developed and built at the Advanced Light Source (ALS). An electron mirror combined with a much-simplified magnetic dipole separator is to be used to provide simultaneous correction of spherical and chromatic aberrations. It is installed on an elliptically polarized undulator (EPU) beamline, and will be operated with very high spatial resolution and high flux to study the composition, structure, electric and magnetic properties of complex materials. The instrument has been designed and is described. The instrumental hardware is being deployed in 2 phases. The first phase is the deployment ofmore » a standard PEEM type microscope consisting of the standard linear array of electrostatic electron lenses. The second phase will be the installation of the aberration corrected upgrade to improve resolution and throughput. This paper describes progress as the instrument enters the commissioning part of the first phase.« less

New Ways Of Doing Business (NWODB) cost quantification analysis

NASA Technical Reports Server (NTRS)

Hamaker, Joseph W.; Rosmait, Russell L.

1992-01-01

The cost of designing, producing, and operating typical aerospace flight hardware is necessarily more expensive than most other human endeavors. Because of the more stringent environment of space, hardware designed to operate there will probably always be more expensive than similar hardware which is designed for less taxing environments. It is the thesis of this study that there are very significant improvements that can be made in the cost of aerospace flight hardware.

Hardware description languages

NASA Technical Reports Server (NTRS)

Tucker, Jerry H.

1994-01-01

Hardware description languages are special purpose programming languages. They are primarily used to specify the behavior of digital systems and are rapidly replacing traditional digital system design techniques. This is because they allow the designer to concentrate on how the system should operate rather than on implementation details. Hardware description languages allow a digital system to be described with a wide range of abstraction, and they support top down design techniques. A key feature of any hardware description language environment is its ability to simulate the modeled system. The two most important hardware description languages are Verilog and VHDL. Verilog has been the dominant language for the design of application specific integrated circuits (ASIC's). However, VHDL is rapidly gaining in popularity.

Space Station Freedom biomedical monitoring and countermeasures: Biomedical facility hardware catalog

NASA Technical Reports Server (NTRS)

1990-01-01

This hardware catalog covers that hardware proposed under the Biomedical Monitoring and Countermeasures Development Program supported by the Johnson Space Center. The hardware items are listed separately by item, and are in alphabetical order. Each hardware item specification consists of four pages. The first page describes background information with an illustration, definition and a history/design status. The second page identifies the general specifications, performance, rack interface requirements, problems, issues, concerns, physical description, and functional description. The level of hardware design reliability is also identified under the maintainability and reliability category. The third page specifies the mechanical design guidelines and assumptions. Described are the material types and weights, modules, and construction methods. Also described is an estimation of percentage of construction which utilizes a particular method, and the percentage of required new mechanical design is documented. The fourth page analyzes the electronics, the scope of design effort, and the software requirements. Electronics are described by percentages of component types and new design. The design effort, as well as, the software requirements are identified and categorized.

RighTime: A real time clock correcting program for MS-DOS-based computer systems

NASA Technical Reports Server (NTRS)

Becker, G. Thomas

1993-01-01

A computer program is described which effectively eliminates the misgivings of the DOS system clock in PC/AT-class computers. RighTime is a small, sophisticated memory-resident program that automatically corrects both the DOS system clock and the hardware 'CMOS' real time clock (RTC) in real time. RighTime learns what corrections are required without operator interaction beyond the occasional accurate time set. Both warm (power on) and cool (power off) errors are corrected, usually yielding better than one part per million accuracy in the typical desktop computer with no additional hardware, and RighTime increases the system clock resolution from approximately 0.0549 second to 0.01 second. Program tools are also available which allow visualization of RighTime's actions, verification of its performance, display of its history log, and which provide data for graphing of the system clock behavior. The program has found application in a wide variety of industries, including astronomy, satellite tracking, communications, broadcasting, transportation, public utilities, manufacturing, medicine, and the military.

Improving the treatment planning and delivery process of Xoft electronic skin brachytherapy.

PubMed

Manger, Ryan; Rahn, Douglas; Hoisak, Jeremy; Dragojević, Irena

2018-05-14

To develop an improved Xoft electronic skin brachytherapy process and identify areas of further improvement. A multidisciplinary team conducted a failure modes and effects analysis (FMEA) by developing a process map and a corresponding list of failure modes. The failure modes were scored for their occurrence, severity, and detectability, and a risk priority number (RPN) was calculated for each failure mode as the product of occurrence, severity, and detectability. Corrective actions were implemented to address the higher risk failure modes, and a revised process was generated. The RPNs of the failure modes were compared between the initial process and final process to assess the perceived benefits of the corrective actions. The final treatment process consists of 100 steps and 114 failure modes. The FMEA took approximately 20 person-hours (one physician, three physicists, and two therapists) to complete. The 10 most dangerous failure modes had RPNs ranging from 336 to 630. Corrective actions were effective at addressing most failure modes (10 riskiest RPNs ranging from 189 to 310), yet the RPNs were higher than those published for alternative systems. Many of these high-risk failure modes remained due to hardware design limitations. FMEA helps guide process improvement efforts by emphasizing the riskiest steps. Significant risks are apparent when using a Xoft treatment unit for skin brachytherapy due to hardware limitations such as the lack of several interlocks, a short source lifespan, and variability in source output. The process presented in this article is expected to reduce but not eliminate these risks. Copyright © 2018 American Brachytherapy Society. Published by Elsevier Inc. All rights reserved.

Phaser.MRage: automated molecular replacement

PubMed Central

Bunkóczi, Gábor; Echols, Nathaniel; McCoy, Airlie J.; Oeffner, Robert D.; Adams, Paul D.; Read, Randy J.

2013-01-01

Phaser.MRage is a molecular-replacement automation framework that implements a full model-generation workflow and provides several layers of model exploration to the user. It is designed to handle a large number of models and can distribute calculations efficiently onto parallel hardware. In addition, phaser.MRage can identify correct solutions and use this information to accelerate the search. Firstly, it can quickly score all alternative models of a component once a correct solution has been found. Secondly, it can perform extensive analysis of identified solutions to find protein assemblies and can employ assembled models for subsequent searches. Thirdly, it is able to use a priori assembly information (derived from, for example, homologues) to speculatively place and score molecules, thereby customizing the search procedure to a certain class of protein molecule (for example, antibodies) and incorporating additional biological information into molecular replacement. PMID:24189240

Phaser.MRage: automated molecular replacement.

PubMed

Bunkóczi, Gábor; Echols, Nathaniel; McCoy, Airlie J; Oeffner, Robert D; Adams, Paul D; Read, Randy J

2013-11-01

Phaser.MRage is a molecular-replacement automation framework that implements a full model-generation workflow and provides several layers of model exploration to the user. It is designed to handle a large number of models and can distribute calculations efficiently onto parallel hardware. In addition, phaser.MRage can identify correct solutions and use this information to accelerate the search. Firstly, it can quickly score all alternative models of a component once a correct solution has been found. Secondly, it can perform extensive analysis of identified solutions to find protein assemblies and can employ assembled models for subsequent searches. Thirdly, it is able to use a priori assembly information (derived from, for example, homologues) to speculatively place and score molecules, thereby customizing the search procedure to a certain class of protein molecule (for example, antibodies) and incorporating additional biological information into molecular replacement.

COTD: Reference-free Hardware Trojan Detection in Gate-level Netlist

DTIC Science & Technology

2017-03-01

modern designs , the constraint of time- to-market window, and the cost restriction of final product highly drive the horizontal design process. The...third-party intellectual properties (3PIPs) are widely used while they expose a design to hardware Trojans (HTs) that may tamper with the design and...activated. Some work have investigated hardware Trojans in early design stages and several techniques have been proposed to study the switching

Pratt and Whitney Overview and Advanced Health Management Program

NASA Technical Reports Server (NTRS)

Inabinett, Calvin

2008-01-01

Hardware Development Activity: Design and Test Custom Multi-layer Circuit Boards for use in the Fault Emulation Unit; Logic design performed using VHDL; Layout power system for lab hardware; Work lab issues with software developers and software testers; Interface with Engine Systems personnel with performance of Engine hardware components; Perform off nominal testing with new engine hardware.

The Art of Space Flight Exercise Hardware: Design and Implementation

NASA Technical Reports Server (NTRS)

Beyene, Nahom M.

2004-01-01

The design of space flight exercise hardware depends on experience with crew health maintenance in a microgravity environment, history in development of flight-quality exercise hardware, and a foundation for certifying proper project management and design methodology. Developed over the past 40 years, the expertise in designing exercise countermeasures hardware at the Johnson Space Center stems from these three aspects of design. The medical community has steadily pursued an understanding of physiological changes in humans in a weightless environment and methods of counteracting negative effects on the cardiovascular and musculoskeletal system. The effects of weightlessness extend to the pulmonary and neurovestibular system as well with conditions ranging from motion sickness to loss of bone density. Results have shown losses in water weight and muscle mass in antigravity muscle groups. With the support of university-based research groups and partner space agencies, NASA has identified exercise to be the primary countermeasure for long-duration space flight. The history of exercise hardware began during the Apollo Era and leads directly to the present hardware on the International Space Station. Under the classifications of aerobic and resistive exercise, there is a clear line of development from the early devices to the countermeasures hardware used today. In support of all engineering projects, the engineering directorate has created a structured framework for project management. Engineers have identified standards and "best practices" to promote efficient and elegant design of space exercise hardware. The quality of space exercise hardware depends on how well hardware requirements are justified by exercise performance guidelines and crew health indicators. When considering the microgravity environment of the device, designers must consider performance of hardware separately from the combined human-in-hardware system. Astronauts are the caretakers of the hardware while it is deployed and conduct all sanitization, calibration, and maintenance for the devices. Thus, hardware designs must account for these issues with a goal of minimizing crew time on orbit required to complete these tasks. In the future, humans will venture to Mars and exercise countermeasures will play a critical role in allowing us to continue in our spirit of exploration. NASA will benefit from further experimentation on Earth, through the International Space Station, and with advanced biomechanical models to quantify how each device counteracts specific symptoms of weightlessness. With the continued support of international space agencies and the academic research community, we will usher the next frontier in human space exploration.

Single stage, low noise, advanced technology fan. Volume 1: Aerodynamic design

NASA Technical Reports Server (NTRS)

Sullivan, T. J.; Younghans, J. L.; Little, D. R.

1976-01-01

The aerodynamic design for a half-scale fan vehicle, which would have application on an advanced transport aircraft, is described. The single stage advanced technology fan was designed to a pressure ratio of 1.8 at a tip speed of 503 m/sec 11,650 ft/sec). The fan and booster components are designed in a scale model flow size convenient for testing with existing facility and vehicle hardware. The design corrected flow per unit annulus area at the fan face is 215 kg/sec sq m (44.0 lb m/sec sq ft) with a hub-tip ratio of 0.38 at the leading edge of the fan rotor. This results in an inlet corrected airflow of 117.9 kg/sec (259.9 lb m/sec) for the selected rotor tip diameter if 90.37 cm (35.58 in.). The variable geometry inlet is designed utilizing a combination of high throat Mach number and acoustic treatment in the inlet diffuser for noise suppression (hybrid inlet). A variable fan exhaust nozzle was assumed in conjunction with the variable inlet throat area to limit the required area change of the inlet throat at approach and hence limit the overall diffusion and inlet length. The fan exit duct design was primarily influenced by acoustic requirements, including length of suppressor wall treatment; length, thickness and position on a duct splitter for additional suppressor treatment; and duct surface Mach numbers.

The role of hardware in learning engineering fundamentals: An empirical study of engineering design and product analysis activity

NASA Astrophysics Data System (ADS)

Brereton, Margot Felicity

A series of short engineering exercises and design projects was created to help students learn to apply abstract knowledge to physical experiences with hardware. The exercises involved designing machines from kits of materials and dissecting and analyzing familiar household products. Students worked in teams. During the activities students brought their knowledge of engineering fundamentals to bear. Videotape analysis was used to identify and characterize the ways in which hardware contributed to learning fundamental concepts. Structural and qualitative analyses of videotaped activities were undertaken. Structural analysis involved counting the references to theory and hardware and the extent of interleaving of references in activity. The analysis found that there was much more discussion linking fundamental concepts to hardware in some activities than in others. The analysis showed that the interleaving of references to theory and hardware in activity is observable and quantifiable. Qualitative analysis was used to investigate the dialog linking concepts and hardware. Students were found to advance their designs and their understanding of engineering fundamentals through a negotiation process in which they pitted abstract concepts against hardware behavior. Through this process students sorted out theoretical assumptions and causal relations. In addition they discovered design assumptions, functional connections and physical embodiments of abstract concepts in hardware, developing a repertoire of familiar hardware components and machines. Hardware was found to be integral to learning, affecting the course of inquiry and the dynamics of group interaction. Several case studies are presented to illustrate the processes at work. The research illustrates the importance of working across the boundary between abstractions and experiences with hardware in order to learn engineering and physical sciences. The research findings are: (a) the negotiation process by which students discover fundamental concepts in hardware (and three central causes of negotiation breakdown); (b) a characterization of the ways that material systems contribute to learning activities, (the seven roles of hardware in learning); (c) the characteristics of activities that support discovering fundamental concepts in hardware (plus several engineering exercises); (d) a research methodology to examine how students learn in practice.

Reducing Bolt Preload Variation with Angle-of-Twist Bolt Loading

NASA Technical Reports Server (NTRS)

Thompson, Bryce; Nayate, Pramod; Smith, Doug; McCool, Alex (Technical Monitor)

2001-01-01

Critical high-pressure sealing joints on the Space Shuttle reusable solid rocket motor require precise control of bolt preload to ensure proper joint function. As the reusable solid rocket motor experiences rapid internal pressurization, correct bolt preloads maintain the sealing capability and structural integrity of the hardware. The angle-of-twist process provides the right combination of preload accuracy, reliability, process control, and assembly-friendly design. It improves significantly over previous methods. The sophisticated angle-of-twist process controls have yielded answers to all discrepancies encountered while the simplicity of the root process has assured joint preload reliability.

A design approach for ultrareliable real-time systems

NASA Technical Reports Server (NTRS)

Lala, Jaynarayan H.; Harper, Richard E.; Alger, Linda S.

1991-01-01

A design approach developed over the past few years to formalize redundancy management and validation is described. Redundant elements are partitioned into individual fault-containment regions (FCRs). An FCR is a collection of components that operates correctly regardless of any arbitrary logical or electrical fault outside the region. Conversely, a fault in an FCR cannot cause hardware outside the region to fail. The outputs of all channels are required to agree bit-for-bit under no-fault conditions (exact bitwise consensus). Synchronization, input agreement, and input validity conditions are discussed. The Advanced Information Processing System (AIPS), which is a fault-tolerant distributed architecture based on this approach, is described. A brief overview of recent applications of these systems and current research is presented.

HTTM - Design and Implementation of a Type-2 Hypervisor for MIPS64 Based Systems

NASA Astrophysics Data System (ADS)

Ain, Qurrat ul; Anwar, Usama; Mehmood, Muhammad Amir; Waheed, Abdul

2017-01-01

Virtualization has emerged as an attractive software solution for many problems in server domain. Recently, it has started to enrich embedded systems domain by offering features such as hardware consolidation, security, and isolation. Our objective is to bring virtualization to high-end MIPS64 based systems, such as network routers, switches, wireless base station, etc. For this purpose a Type-2 hypervisor is a viable software solution which is easy to deploy and requires no changes in host system. In this paper we present the internal design HTTM -A Type-2 hypervisor for MIPS64 based systems and demonstrate its functional correctness by using Linux Testing Project (LTP) tests. Finally, we performed LMbench tests for performance evaluation.

Intrinsic Hardware Evolution for the Design and Reconfiguration of Analog Speed Controllers for a DC Motor

NASA Technical Reports Server (NTRS)

Gwaltney, David A.; Ferguson, Michael I.

2003-01-01

Evolvable hardware provides the capability to evolve analog circuits to produce amplifier and filter functions. Conventional analog controller designs employ these same functions. Analog controllers for the control of the shaft speed of a DC motor are evolved on an evolvable hardware platform utilizing a second generation Field Programmable Transistor Array (FPTA2). The performance of an evolved controller is compared to that of a conventional proportional-integral (PI) controller. It is shown that hardware evolution is able to create a compact design that provides good performance, while using considerably less functional electronic components than the conventional design. Additionally, the use of hardware evolution to provide fault tolerance by reconfiguring the design is explored. Experimental results are presented showing that significant recovery of capability can be made in the face of damaging induced faults.

DOE Office of Scientific and Technical Information (OSTI.GOV)

Bachan, John

Chisel is a new open-source hardware construction language developed at UC Berkeley that supports advanced hardware design using highly parameterized generators and layered domain-specific hardware languages. Chisel is embedded in the Scala programming language, which raises the level of hardware design abstraction by providing concepts including object orientation, functional programming, parameterized types, and type inference. From the same source, Chisel can generate a high-speed C++-based cycle-accurate software simulator, or low-level Verilog designed to pass on to standard ASIC or FPGA tools for synthesis and place and route.

Final report for CCS cross-layer reliability visioning study

DOE Office of Scientific and Technical Information (OSTI.GOV)

Quinn, Heather M; Dehon, Andre; Carter, Nicj

The geometric rate of improvement of transistor size and integrated circuit performance known as Moore's Law has been an engine of growth for our economy, enabling new products and services, creating new value and wealth, increasing safety, and removing menial tasks from our daily lives. Affordable, highly integrated components have enabled both life-saving technologies and rich entertainment applications. Anti-lock brakes, insulin monitors, and GPS-enabled emergency response systems save lives. Cell phones, internet appliances, virtual worlds, realistic video games, and mp3 players enrich our lives and connect us together. Over the past 40 years of silicon scaling, the increasing capabilities ofmore » inexpensive computation have transformed our society through automation and ubiquitous communications. Looking forward, increasing unpredictability threatens our ability to continue scaling integrated circuits at Moore's Law rates. As the transistors and wires that make up integrated circuits become smaller, they display both greater differences in behavior among devices designed to be identical and greater vulnerability to transient and permanent faults. Conventional design techniques expend energy to tolerate this unpredictability by adding safety margins to a circuit's operating voltage, clock frequency or charge stored per bit. However, the rising energy costs needed to compensate for increasing unpredictability are rapidly becoming unacceptable in today's environment where power consumption is often the limiting factor on integrated circuit performance and energy efficiency is a national concern. Reliability and energy consumption are both reaching key inflection points that, together, threaten to reduce or end the benefits of feature size reduction. To continue beneficial scaling, we must use a cross-layer, Jull-system-design approach to reliability. Unlike current systems, which charge every device a substantial energy tax in order to guarantee correct operation in spite of rare events, such as one high-threshold transistor in a billion or one erroneous gate evaluation in an hour of computation, cross-layer reliability schemes make reliability management a cooperative effort across the system stack, sharing information across layers so that they only expend energy on reliability when an error actually occurs. Figure 1 illustrates an example of such a system that uses a combination of information from the application and cheap architecture-level techniques to detect errors. When an error occurs, mechanisms at higher levels in the stack correct the error, efficiently delivering correct operation to the user in spite of errors at the device or circuit levels. In the realms of memory and communication, engineers have a long history of success in tolerating unpredictable effects such as fabrication variability, transient upsets, and lifetime wear using information sharing, limited redundancy, and cross-layer approaches that anticipate, accommodate, and suppress errors. Networks use a combination of hardware and software to guarantee end-toend correctness. Error-detection and correction codes use additional information to correct the most common errors, single-bit transmission errors. When errors occur that cannot be corrected by these codes, the network protocol requests re-transmission of one or more packets until the correct data is received. Similarly, computer memory systems exploit a cross-layer division of labor to achieve high performance with modest hardware. Rather than demanding that hardware alone provide the virtual memory abstraction, software page-fault and TLB-miss handlers allow a modest piece of hardware, the TLB, to handle the common-case operations on a cyc1e-by-cycle basis while infrequent misses are handled in system software. Unfortunately, mitigating logic errors is not as simple or as well researched as memory or communication systems. This lack of understanding has led to very expensive solutions. For example, triple-modular redundancy masks errors by triplicating computations in either time or area. This mitigation methods imposes a 200% increase in energy consumption for every operation, not just the uncommon failure cases. At a time when computation is rapidly becoming part of our critical civilian and military infrastructure and decreasing costsfor computation are fueling our economy and our well being, we cannot afford increasingly unreliable electronics or a stagnation in capabilities per dollar, watt, or cubic meter. If researchers are able to develop techniques that tolerate the growing unpredictability of silicon devices, Moore's Law scaling should continue until at least 2022. During this 12-year time period, transistors, which are the building blocks of electronic devices, will scale their dimensions (feature sizes) from 45nm to 4.5nm.« less

Adaptive Neurotechnology for Making Neural Circuits Functional .

NASA Astrophysics Data System (ADS)

Jung, Ranu

2008-03-01

Two of the most important trends in recent technological developments are that technology is increasingly integrated with biological systems and that it is increasingly adaptive in its capabilities. Neuroprosthetic systems that provide lost sensorimotor function after a neural disability offer a platform to investigate this interplay between biological and engineered systems. Adaptive neurotechnology (hardware and software) could be designed to be biomimetic, guided by the physical and programmatic constraints observed in biological systems, and allow for real-time learning, stability, and error correction. An example will present biomimetic neural-network hardware that can be interfaced with the isolated spinal cord of a lower vertebrate to allow phase-locked real-time neural control. Another will present adaptive neural network control algorithms for functional electrical stimulation of the peripheral nervous system to provide desired movements of paralyzed limbs in rodents or people. Ultimately, the frontier lies in being able to utilize the adaptive neurotechnology to promote neuroplasticity in the living system on a long-time scale under co-adaptive conditions.

Energy efficient engine: Fan test hardware detailed design report

NASA Technical Reports Server (NTRS)

Sullivan, T. J.

1980-01-01

A single stage fan and quarter stage booster were designed for the energy efficient engine. The fan has an inlet radius ratio of 0.342 and a specific flow rate of 208.9 Kg/S sq m (42.8 lbm/sec sq ft). The fan rotor has 32 medium aspect ratio (2.597) titanium blades with a partspan shroud at 55% blade height. The design corrected fan tip speed is 411.5 M/S (1350 ft/sec). The quarter stage island splits the total fan flow with approximately 22% of the flow being supercharged by the quarter stage rotor. The fan bypass ratio is 6.8. The core flow total pressure ratio is 1.67 and the fan bypass pressure ratio is 1.65. The design details of the fan and booster blading, and the fan frame and static structure for the fan configuration are presented.

NASA-STD-(I)-6016, Standard Materials and Processes Requirements for Spacecraft

NASA Technical Reports Server (NTRS)

Pedley, Michael; Griffin, Dennis

2006-01-01

This document is directed toward Materials and Processes (M&P) used in the design, fabrication, and testing of flight components for all NASA manned, unmanned, robotic, launch vehicle, lander, in-space and surface systems, and spacecraft program/project hardware elements. All flight hardware is covered by the M&P requirements of this document, including vendor designed, off-the-shelf, and vendor furnished items. Materials and processes used in interfacing ground support equipment (GSE); test equipment; hardware processing equipment; hardware packaging; and hardware shipment shall be controlled to prevent damage to or contamination of flight hardware.

Programming time-multiplexed reconfigurable hardware using a scalable neuromorphic compiler.

PubMed

Minkovich, Kirill; Srinivasa, Narayan; Cruz-Albrecht, Jose M; Cho, Youngkwan; Nogin, Aleksey

2012-06-01

Scalability and connectivity are two key challenges in designing neuromorphic hardware that can match biological levels. In this paper, we describe a neuromorphic system architecture design that addresses an approach to meet these challenges using traditional complementary metal-oxide-semiconductor (CMOS) hardware. A key requirement in realizing such neural architectures in hardware is the ability to automatically configure the hardware to emulate any neural architecture or model. The focus for this paper is to describe the details of such a programmable front-end. This programmable front-end is composed of a neuromorphic compiler and a digital memory, and is designed based on the concept of synaptic time-multiplexing (STM). The neuromorphic compiler automatically translates any given neural architecture to hardware switch states and these states are stored in digital memory to enable desired neural architectures. STM enables our proposed architecture to address scalability and connectivity using traditional CMOS hardware. We describe the details of the proposed design and the programmable front-end, and provide examples to illustrate its capabilities. We also provide perspectives for future extensions and potential applications.

Design Process of Flight Vehicle Structures for a Common Bulkhead and an MPCV Spacecraft Adapter

NASA Technical Reports Server (NTRS)

Aggarwal, Pravin; Hull, Patrick V.

2015-01-01

Design and manufacturing space flight vehicle structures is a skillset that has grown considerably at NASA during that last several years. Beginning with the Ares program and followed by the Space Launch System (SLS); in-house designs were produced for both the Upper Stage and the SLS Multipurpose crew vehicle (MPCV) spacecraft adapter. Specifically, critical design review (CDR) level analysis and flight production drawing were produced for the above mentioned hardware. In particular, the experience of this in-house design work led to increased manufacturing infrastructure for both Marshal Space Flight Center (MSFC) and Michoud Assembly Facility (MAF), improved skillsets in both analysis and design, and hands on experience in building and testing (MSA) full scale hardware. The hardware design and development processes from initiation to CDR and finally flight; resulted in many challenges and experiences that produced valuable lessons. This paper builds on these experiences of NASA in recent years on designing and fabricating flight hardware and examines the design/development processes used, as well as the challenges and lessons learned, i.e. from the initial design, loads estimation and mass constraints to structural optimization/affordability to release of production drawing to hardware manufacturing. While there are many documented design processes which a design engineer can follow, these unique experiences can offer insight into designing hardware in current program environments and present solutions to many of the challenges experienced by the engineering team.

Space Biology Initiative. Trade Studies, volume 2

NASA Technical Reports Server (NTRS)

1989-01-01

The six studies which are the subjects of this report are entitled: Design Modularity and Commonality; Modification of Existing Hardware (COTS) vs. New Hardware Build Cost Analysis; Automation Cost vs. Crew Utilization; Hardware Miniaturization versus Cost; Space Station Freedom/Spacelab Modules Compatibility vs. Cost; and Prototype Utilization in the Development of Space Hardware. The product of these six studies was intended to provide a knowledge base and methodology that enables equipment produced for the Space Biology Initiative program to meet specific design and functional requirements in the most efficient and cost effective form consistent with overall mission integration parameters. Each study promulgates rules of thumb, formulas, and matrices that serves as a handbook for the use and guidance of designers and engineers in design, development, and procurement of Space Biology Initiative (SBI) hardware and software.

Space Biology Initiative. Trade Studies, volume 1

NASA Technical Reports Server (NTRS)

1989-01-01

The six studies which are addressed are entitled: Design Modularity and Commonality; Modification of Existing Hardware (COTS) vs. New Hardware Build Cost Analysis; Automation Cost vs. Crew Utilization; Hardware Miniaturization versus Cost; Space Station Freedom/Spacelab Modules Compatibility vs. Cost; and Prototype Utilization in the Development of Space Hardware. The product of these six studies was intended to provide a knowledge base and methodology that enables equipment produced for the Space Biology Initiative program to meet specific design and functional requirements in the most efficient and cost effective form consistent with overall mission integration parameters. Each study promulgates rules of thumb, formulas, and matrices that serves has a handbook for the use and guidance of designers and engineers in design, development, and procurement of Space Biology Initiative (SBI) hardware and software.

Proof of concept of a simple computer-assisted technique for correcting bone deformities.

PubMed

Ma, Burton; Simpson, Amber L; Ellis, Randy E

2007-01-01

We propose a computer-assisted technique for correcting bone deformities using the Ilizarov method. Our technique is an improvement over prior art in that it does not require a tracking system, navigation hardware and software, or intraoperative registration. Instead, we rely on a postoperative CT scan to obtain all of the information necessary to plan the correction and compute a correction schedule for the patient. Our laboratory experiments using plastic phantoms produced deformity corrections accurate to within 3.0 degrees of rotation and 1 mm of lengthening.

Hardware architecture design of image restoration based on time-frequency domain computation

NASA Astrophysics Data System (ADS)

Wen, Bo; Zhang, Jing; Jiao, Zipeng

2013-10-01

The image restoration algorithms based on time-frequency domain computation is high maturity and applied widely in engineering. To solve the high-speed implementation of these algorithms, the TFDC hardware architecture is proposed. Firstly, the main module is designed, by analyzing the common processing and numerical calculation. Then, to improve the commonality, the iteration control module is planed for iterative algorithms. In addition, to reduce the computational cost and memory requirements, the necessary optimizations are suggested for the time-consuming module, which include two-dimensional FFT/IFFT and the plural calculation. Eventually, the TFDC hardware architecture is adopted for hardware design of real-time image restoration system. The result proves that, the TFDC hardware architecture and its optimizations can be applied to image restoration algorithms based on TFDC, with good algorithm commonality, hardware realizability and high efficiency.

Scaling Retro-Commissioning to Small Commercial Buildings: A Turnkey Automated Hardware-Software Solution

DOE Office of Scientific and Technical Information (OSTI.GOV)

Lin, Guanjing; Granderson, J.; Brambley, Michael R.

2015-07-01

In the United States, small commercial buildings represent 51% of total floor space of all commercial buildings and consume nearly 3 quadrillion Btu (3.2 quintillion joule) of site energy annually, presenting an enormous opportunity for energy savings. Retro-commissioning (RCx), the process through which professional energy service providers identify and correct operational problems, has proven to be a cost-effective means to achieve median energy savings of 16%. However, retro-commissioning is not typically conducted at scale throughout the commercial stock. Very few small commercial buildings are retro-commissioned because utility expenses are relatively modest, margins are tighter, and capital for improvements is limited.more » In addition, small buildings do not have in-house staff with the expertise to identify improvement opportunities. In response, a turnkey hardware-software solution was developed to enable cost-effective, monitoring-based RCx of small commercial buildings. This highly tailored solution enables non-commissioning providers to identify energy and comfort problems, as well as associated cost impacts and remedies. It also facilitates scale by offering energy service providers the means to streamline their existing processes and reduce costs by more than half. The turnkey RCx sensor suitcase consists of two primary components: a suitcase of sensors for short-term building data collection that guides users through the process of deploying and retrieving their data and a software application that automates analysis of sensor data, identifies problems and generates recommendations. This paper presents the design and testing of prototype models, including descriptions of the hardware design, analysis algorithms, performance testing, and plans for dissemination.« less

SensoTube: A Scalable Hardware Design Architecture for Wireless Sensors and Actuators Networks Nodes in the Agricultural Domain.

PubMed

Piromalis, Dimitrios; Arvanitis, Konstantinos

2016-08-04

Wireless Sensor and Actuators Networks (WSANs) constitute one of the most challenging technologies with tremendous socio-economic impact for the next decade. Functionally and energy optimized hardware systems and development tools maybe is the most critical facet of this technology for the achievement of such prospects. Especially, in the area of agriculture, where the hostile operating environment comes to add to the general technological and technical issues, reliable and robust WSAN systems are mandatory. This paper focuses on the hardware design architectures of the WSANs for real-world agricultural applications. It presents the available alternatives in hardware design and identifies their difficulties and problems for real-life implementations. The paper introduces SensoTube, a new WSAN hardware architecture, which is proposed as a solution to the various existing design constraints of WSANs. The establishment of the proposed architecture is based, firstly on an abstraction approach in the functional requirements context, and secondly, on the standardization of the subsystems connectivity, in order to allow for an open, expandable, flexible, reconfigurable, energy optimized, reliable and robust hardware system. The SensoTube implementation reference model together with its encapsulation design and installation are analyzed and presented in details. Furthermore, as a proof of concept, certain use cases have been studied in order to demonstrate the benefits of migrating existing designs based on the available open-source hardware platforms to SensoTube architecture.

Development and characteristics of the hardware for Skylab experiment S015

NASA Technical Reports Server (NTRS)

Thirolf, R. G.

1975-01-01

Details are given regarding the hardware for the Skylab S015 experiment, which was designed to detect the effects of zero gravity on cell growth rates. Experience gained in hardware-related considerations is presented for use of researchers concerned with future research of this type and further study of the S015 results. Brief descriptions are given of the experiment hardware, the hardware configuration for the critical design review, the major configuration changes, the final configuration, and the postflight review and analysis. An appendix describes pertinent documentation, film, and hardware that are available to qualified researchers; sources for additional or special information are given.

Component-Level Electronic-Assembly Repair (CLEAR) Synthetic Instrument Capabilities Assessment and Test Report

NASA Technical Reports Server (NTRS)

Oeftering, Richard C.; Bradish, Martin A.

2011-01-01

The role of synthetic instruments (SIs) for Component-Level Electronic-Assembly Repair (CLEAR) is to provide an external lower-level diagnostic and functional test capability beyond the built-in-test capabilities of spacecraft electronics. Built-in diagnostics can report faults and symptoms, but isolating the root cause and performing corrective action requires specialized instruments. Often a fault can be revealed by emulating the operation of external hardware. This implies complex hardware that is too massive to be accommodated in spacecraft. The SI strategy is aimed at minimizing complexity and mass by employing highly reconfigurable instruments that perform diagnostics and emulate external functions. In effect, SI can synthesize an instrument on demand. The SI architecture section of this document summarizes the result of a recent program diagnostic and test needs assessment based on the International Space Station. The SI architecture addresses operational issues such as minimizing crew time and crew skill level, and the SI data transactions between the crew and supporting ground engineering searching for the root cause and formulating corrective actions. SI technology is described within a teleoperations framework. The remaining sections describe a lab demonstration intended to show that a single SI circuit could synthesize an instrument in hardware and subsequently clear the hardware and synthesize a completely different instrument on demand. An analysis of the capabilities and limitations of commercially available SI hardware and programming tools is included. Future work in SI technology is also described.

75 FR 39472 - Airworthiness Directives; Eclipse Aerospace, Inc. Model EA500 Airplanes

Federal Register 2010, 2011, 2012, 2013, 2014

2010-07-09

..., altitude preselect, and/or transponder codes. We are proposing this AD to correct faulty integration of... determined to be a software communication integration issue between the EFIS display interface and associated... transponder codes. We are issuing this AD to correct faulty integration of hardware and software, which could...

Laser Measurements Based for Volumetric Accuracy Improvement of Multi-axis Systems

NASA Astrophysics Data System (ADS)

Vladimir, Sokolov; Konstantin, Basalaev

The paper describes a new developed approach to CNC-controlled multi-axis systems geometric errors compensation based on optimal error correction strategy. Multi-axis CNC-controlled systems - machine-tools and CMM's are the basis of modern engineering industry. Similar design principles of both technological and measurement equipment allow usage of similar approaches to precision management. The approach based on geometric errors compensation are widely used at present time. The paper describes a system for compensation of geometric errors of multi-axis equipment based on the new approach. The hardware basis of the developed system is a multi-function laser interferometer. The principles of system's implementation, results of measurements and system's functioning simulation are described. The effectiveness of application of described principles to multi-axis equipment of different sizes and purposes for different machining directions and zones within workspace is presented. The concepts of optimal correction strategy is introduced and dynamic accuracy control is proposed.

Design for Assured Safe Jettison Operations

NASA Astrophysics Data System (ADS)

Herd, Andrew; Shea, Matt

2010-09-01

The International Space Station is coming toward the end of the assembly process and will enter "steady state" operations. During this time and also in the future, there arises the need for removing items from station, and in some instances this is achieved through jettison, either robotic or crew initiated. To control this practice at the ISS Partner level, a policy document has been developed. The policy states: "While there are risks inherent in jettisoning objects, the ISS Program recognizes that there may be significant benefits in terms of operational flexibility, crew safety, etc. A thorough assessment of the risks vs. the benefits will be conducted whenever a proposal to jettison an object is made. It is the intent of the ISS Program to limit the number of objects that are jettisoned from the ISS ...". The policy addresses hardware that: "may fall into one or more of the following categories: 1. Items that pose a safety issue for the ISS or for return onboard a visiting vehicle(contamination, materials degradation, etc.) 2. Items that negatively impact ISS utilization, return or on-orbit stowage manifests 3. Items that represent an Extravehicular Activity(EVA) timeline savings large enough to reduce the sum of the risks of EVA exposure time and the orbital environment’s hazardous debris population, compared to the sum of such risks without a jettison. 4. Items that are designed for jettison ". [1] Through the use of jettison to date, as a disposal means, operational experiences have been gained during and as a result of post-disposal event analysis. The data collected has allowed a generic assessment of issues(and best practices) and the proposal of ways in which process corrective action can be taken to assure future safe jettison operations. The improvements proposed emphasize the ways in which design can offer key interface and hardware response characteristics to the jettison event and the subsequent orbital and re-entry profile. There exist simple and effective ways to address key issues(a number but not all are covered by specific requirements) and credible rationale for the case that any limited life spaceflight hardware integrated into the extravehicular environment shall be capable of being safely jettisoned(for reasons 1, 2 & 3). While most hardware was not initially intended to be disposed of in this manner, the approval process for reason 4 can accommodate necessary, and in some cases inevitable, programmatic decisions to jettison. This should be achieved either through the hardware itself being compatible with the jettison best-practice design guidelines, or the design offering an interface compatible with a generic jettison platform that inherently minimizes risk.

The DISCUS Hardware System,

DTIC Science & Technology

1982-07-01

blocks. DISCUS has no form of hardware synchronisation between the processors. The only synchronisation is at an operating system level. ;ach processor is... operations in global store so that semaphoring on global objects can be done correctly. Write Protect is used by the operating system for read-only...the appropriate operating system program. String Handling primitives . The Z8000 has a rich set of string primitives . However as we saw before if a

Hardware Testing for the Optical PAyload for Lasercomm Science (OPALS)

NASA Technical Reports Server (NTRS)

Slagle, Amanda

2011-01-01

Hardware for several subsystems of the proposed Optical PAyload for Lasercomm Science (OPALS), including the gimbal and avionics, was tested. Microswitches installed on the gimbal were evaluated to verify that their point of actuation would remain within the acceptable range even if the switches themselves move slightly during launch. An inspection of the power board was conducted to ensure that all power and ground signals were isolated, that polarized components were correctly oriented, and that all components were intact and securely soldered. Initial testing on the power board revealed several minor problems, but once they were fixed the power board was shown to function correctly. All tests and inspections were documented for future use in verifying launch requirements.

Hardware synthesis from DDL. [Digital Design Language for computer aided design and test of LSI

NASA Technical Reports Server (NTRS)

Shah, A. M.; Shiva, S. G.

1981-01-01

The details of the digital systems can be conveniently input into the design automation system by means of Hardware Description Languages (HDL). The Computer Aided Design and Test (CADAT) system at NASA MSFC is used for the LSI design. The Digital Design Language (DDL) has been selected as HDL for the CADAT System. DDL translator output can be used for the hardware implementation of the digital design. This paper addresses problems of selecting the standard cells from the CADAT standard cell library to realize the logic implied by the DDL description of the system.

Safe to Fly: Certifying COTS Hardware for Spaceflight

NASA Technical Reports Server (NTRS)

Fichuk, Jessica L.

2011-01-01

Providing hardware for the astronauts to use on board the Space Shuttle or International Space Station (ISS) involves a certification process that entails evaluating hardware safety, weighing risks, providing mitigation, and verifying requirements. Upon completion of this certification process, the hardware is deemed safe to fly. This process from start to finish can be completed as quickly as 1 week or can take several years in length depending on the complexity of the hardware and whether the item is a unique custom design. One area of cost and schedule savings that NASA implements is buying Commercial Off the Shelf (COTS) hardware and certifying it for human spaceflight as safe to fly. By utilizing commercial hardware, NASA saves time not having to develop, design and build the hardware from scratch, as well as a timesaving in the certification process. By utilizing COTS hardware, the current detailed certification process can be simplified which results in schedule savings. Cost savings is another important benefit of flying COTS hardware. Procuring COTS hardware for space use can be more economical than custom building the hardware. This paper will investigate the cost savings associated with certifying COTS hardware to NASA s standards rather than performing a custom build.

[Network Design of the Spaceport Command and Control System

NASA Technical Reports Server (NTRS)

Teijeiro, Antonio

2017-01-01

I helped the Launch Control System (LCS) hardware team sustain the network design of the Spaceport Command and Control System. I wrote the procedure that will be used to satisfy an official hardware test for the hardware carrying data from the Launch Vehicle. I installed hardware and updated design documents in support of the ongoing development of the Spaceport Command and Control System and applied firewall experience I gained during my spring 2017 semester to inspect and create firewall security policies as requested. Finally, I completed several online courses concerning networking fundamentals and Unix operating systems.

A verified design of a fault-tolerant clock synchronization circuit: Preliminary investigations

NASA Technical Reports Server (NTRS)

Miner, Paul S.

1992-01-01

Schneider demonstrates that many fault tolerant clock synchronization algorithms can be represented as refinements of a single proven correct paradigm. Shankar provides mechanical proof that Schneider's schema achieves Byzantine fault tolerant clock synchronization provided that 11 constraints are satisfied. Some of the constraints are assumptions about physical properties of the system and cannot be established formally. Proofs are given that the fault tolerant midpoint convergence function satisfies three of the constraints. A hardware design is presented, implementing the fault tolerant midpoint function, which is shown to satisfy the remaining constraints. The synchronization circuit will recover completely from transient faults provided the maximum fault assumption is not violated. The initialization protocol for the circuit also provides a recovery mechanism from total system failure caused by correlated transient faults.

Design and implementation of a general main axis controller for the ESO telescopes

NASA Astrophysics Data System (ADS)

Sandrock, Stefan; Di Lieto, Nicola; Pettazzi, Lorenzo; Erm, Toomas

2012-09-01

Most of the real-time control systems at the existing ESO telescopes were developed with "traditional" methods, using general purpose VMEbus electronics, and running applications that were coded by hand, mostly using the C programming language under VxWorks. As we are moving towards more modern design methods, we have explored a model-based design approach for real-time applications in the telescope area, and used the control algorithm of a standard telescope main axis as a first example. We wanted to have a clear work-flow that follows the "correct-by-construction" paradigm, where the implementation is testable in simulation on the development host, and where the testing time spent by debugging on target is minimized. It should respect the domains of control, electronics, and software engineers in the choice of tools. It should be a targetindependent approach so that the result could be deployed on various platforms. We have selected the Mathworks tools Simulink, Stateflow, and Embedded Coder for design and implementation, and LabVIEW with NI hardware for hardware-in-the-loop testing, all of which are widely used in industry. We describe how these tools have been used in order to model, simulate, and test the application. We also evaluate the benefits of this approach compared to the traditional method with respect to testing effort and maintainability. For a specific axis controller application we have successfully integrated the result into the legacy platform of the existing VLT software, as well as demonstrated how to use the same design for a new development with a completely different environment.

Impact of the column hardware volume on resolution in very high pressure liquid chromatography non-invasive investigations.

PubMed

Gritti, Fabrice; McDonald, Thomas; Gilar, Martin

2015-11-13

The impact of the column hardware volume (≃ 1.7 μL) on the optimum reduced plate heights of a series of short 2.1 mm × 50 mm columns (hold-up volume ≃ 80-90 μL) packed with 1.8 μm HSS-T3, 1.7 μm BEH-C18, 1.7 μm CSH-C18, 1.6 μm CORTECS-C18+, and 1.7 μm BEH-C4 particles was investigated. A rapid and non-invasive method based on the reduction of the system dispersion (to only 0.15 μL(2)) of an I-class Acquity system and on the corrected plate heights (for system dispersion) of five weakly retained n-alkanophenones in RPLC was proposed. Evidence for sample dispersion through the column hardware volume was also revealed from the experimental plot of the peak capacities for smooth linear gradients versus the corrected efficiency of a weakly retained alkanophenone (isocratic runs). The plot is built for a constant gradient steepness irrespective of the applied flow rates (0.01-0.30 mL/min) and column lengths (2, 3, 5, and 10 cm). The volume variance caused by column endfittings and frits was estimated in between 0.1 and 0.7 μL(2) depending on the applied flow rate. After correction for system and hardware dispersion, the minimum reduced plate heights of short (5 cm) and narrow-bore (2.1mm i.d.) beds packed with sub-2 μm fully and superficially porous particles were found close to 1.5 and 0.7, respectively, instead of the classical h values of 2.0 and 1.4 for the whole column assembly. Copyright © 2015 Elsevier B.V. All rights reserved.

An airborne sunphotometer for use with helicopters

DOE Office of Scientific and Technical Information (OSTI.GOV)

Walthall, C.L.; Halthore, R.N.; Elman, G.C.

1996-04-01

One solution for atmospheric correction and calibration of remotely sensed data from airborne platforms is the use of radiometrically calibrated instruments, sunphotometers and an atmospheric radiative transfer model. Sunphotometers are used to measure the direct solar irradiance at the level at which they are operating and the data are used in the computation of atmospheric optical depth. Atmospheric optical depth is an input to atmospheric correction algorithms that convert at-sensor radiance to required surface properties such as reflectance and temperature. Airborne sun photometry has thus far seen limited use and has not been used with a helicopter platform. The hardware,more » software, calibration and deployment of an automatic sun-tracking sunphotometer specifically designed for use on a helicopter are described. Sample data sets taken with the system during the 1994 Boreal Ecosystem and Atmosphere Study (BOREAS) are presented. The addition of the sun photometer to the helicopter system adds another tool for monitoring the environment and makes the helicopter remote sensing system capable of collecting calibrated, atmospherically corrected data independent of the need for measurements from other systems.« less

A fast event preprocessor for the Simbol-X Low-Energy Detector

NASA Astrophysics Data System (ADS)

Schanz, T.; Tenzer, C.; Kendziorra, E.; Santangelo, A.

2008-07-01

The Simbol-X1 Low Energy Detector (LED), a 128 × 128 pixel DEPFET array, will be read out very fast (8000 frames/second). This requires a very fast onboard data preprocessing of the raw data. We present an FPGA based Event Preprocessor (EPP) which can fulfill this requirements. The design is developed in the hardware description language VHDL and can be later ported on an ASIC technology. The EPP performs a pixel related offset correction and can apply different energy thresholds to each pixel of the frame. It also provides a line related common-mode correction to reduce noise that is unavoidably caused by the analog readout chip of the DEPFET. An integrated pattern detector can block all invalid pixel patterns. The EPP has an internal pipeline structure and can perform all operation in realtime (< 2 μs per line of 64 pixel) with a base clock frequency of 100 MHz. It is utilizing a fast median-value detection algorithm for common-mode correction and a new pattern scanning algorithm to select only valid events. Both new algorithms were developed during the last year at our institute.

Co-design of software and hardware to implement remote sensing algorithms

NASA Astrophysics Data System (ADS)

Theiler, James P.; Frigo, Janette R.; Gokhale, Maya; Szymanski, John J.

2002-01-01

Both for offline searches through large data archives and for onboard computation at the sensor head, there is a growing need for ever-more rapid processing of remote sensing data. For many algorithms of use in remote sensing, the bulk of the processing takes place in an ``inner loop'' with a large number of simple operations. For these algorithms, dramatic speedups can often be obtained with specialized hardware. The difficulty and expense of digital design continues to limit applicability of this approach, but the development of new design tools is making this approach more feasible, and some notable successes have been reported. On the other hand, it is often the case that processing can also be accelerated by adopting a more sophisticated algorithm design. Unfortunately, a more sophisticated algorithm is much harder to implement in hardware, so these approaches are often at odds with each other. With careful planning, however, it is sometimes possible to combine software and hardware design in such a way that each complements the other, and the final implementation achieves speedup that would not have been possible with a hardware-only or a software-only solution. We will in particular discuss the co-design of software and hardware to achieve substantial speedup of algorithms for multispectral image segmentation and for endmember identification.

Modified ACES Portable Life Support Integration, Design, and Testing for Exploration Missions

NASA Technical Reports Server (NTRS)

Kelly, Cody

2014-01-01

NASA's next generation of exploration missions provide a unique challenge to designers of EVA life support equipment, especially in a fiscally-constrained environment. In order to take the next steps of manned space exploration, NASA is currently evaluating the use of the Modified ACES (MACES) suit in conjunction with the Advanced Portable Life Support System (PLSS) currently under development. This paper will detail the analysis and integration of the PLSS thermal and ventilation subsystems into the MACES pressure garment, design of prototype hardware, and hardware-in-the-loop testing during the spring 2014 timeframe. Prototype hardware was designed with a minimal impact philosophy in order to mitigate design constraints becoming levied on either the advanced PLSS or MACES subsystems. Among challenges faced by engineers were incorporation of life support thermal water systems into the pressure garment cavity, operational concept definition between vehicle/portable life support system hardware, and structural attachment mechanisms while still enabling maximum EVA efficiency from a crew member's perspective. Analysis was completed in late summer 2013 to 'bound' hardware development, with iterative analysis cycles throughout the hardware development process. The design effort will cumulate in the first ever manned integration of NASA's advanced PLSS system with a pressure garment originally intended primarily for use in a contingency survival scenario.

Results of adaptive feedforward on GTA

DOE Office of Scientific and Technical Information (OSTI.GOV)

Ziomek, C.D.; Denney, P.M.; Regan, A.H.

1993-01-01

This paper presents the results of the adaptive feedforward system in use on the Ground Test Accelerator (GTA). The adaptive feedforward system was shown to correct repetitive, high-frequency errors in the amplitude and phase of the RF field of the pulsed accelerator. The adaptive feedforward system was designed as an augmentation to the RF field feedback control system and was able to extend the closed-loop bandwidth and disturbance rejection by a factor of ten. Within a second implementation, the adaptive feedforward hardware was implemented in place of the feedback control system and was shown to negate both beam transients andmore » phase droop in the klystron amplifier.« less

Results of adaptive feedforward on GTA

DOE Office of Scientific and Technical Information (OSTI.GOV)

Ziomek, C.D.; Denney, P.M.; Regan, A.H.

1993-06-01

This paper presents the results of the adaptive feedforward system in use on the Ground Test Accelerator (GTA). The adaptive feedforward system was shown to correct repetitive, high-frequency errors in the amplitude and phase of the RF field of the pulsed accelerator. The adaptive feedforward system was designed as an augmentation to the RF field feedback control system and was able to extend the closed-loop bandwidth and disturbance rejection by a factor of ten. Within a second implementation, the adaptive feedforward hardware was implemented in place of the feedback control system and was shown to negate both beam transients andmore » phase droop in the klystron amplifier.« less

Design of an integrated hardware interface for AOSLO image capture and cone-targeted stimulus delivery

PubMed Central

Yang, Qiang; Arathorn, David W.; Tiruveedhula, Pavan; Vogel, Curtis R.; Roorda, Austin

2010-01-01

We demonstrate an integrated FPGA solution to project highly stabilized, aberration-corrected stimuli directly onto the retina by means of real-time retinal image motion signals in combination with high speed modulation of a scanning laser. By reducing the latency between target location prediction and stimulus delivery, the stimulus location accuracy, in a subject with good fixation, is improved to 0.15 arcminutes from 0.26 arcminutes in our earlier solution. We also demonstrate the new FPGA solution is capable of delivering stabilized large stimulus pattern (up to 256x256 pixels) to the retina. PMID:20721171

Copilot: Monitoring Embedded Systems

NASA Technical Reports Server (NTRS)

Pike, Lee; Wegmann, Nis; Niller, Sebastian; Goodloe, Alwyn

2012-01-01

Runtime verification (RV) is a natural fit for ultra-critical systems, where correctness is imperative. In ultra-critical systems, even if the software is fault-free, because of the inherent unreliability of commodity hardware and the adversity of operational environments, processing units (and their hosted software) are replicated, and fault-tolerant algorithms are used to compare the outputs. We investigate both software monitoring in distributed fault-tolerant systems, as well as implementing fault-tolerance mechanisms using RV techniques. We describe the Copilot language and compiler, specifically designed for generating monitors for distributed, hard real-time systems. We also describe two case-studies in which we generated Copilot monitors in avionics systems.

SensoTube: A Scalable Hardware Design Architecture for Wireless Sensors and Actuators Networks Nodes in the Agricultural Domain

PubMed Central

Piromalis, Dimitrios; Arvanitis, Konstantinos

2016-01-01

Wireless Sensor and Actuators Networks (WSANs) constitute one of the most challenging technologies with tremendous socio-economic impact for the next decade. Functionally and energy optimized hardware systems and development tools maybe is the most critical facet of this technology for the achievement of such prospects. Especially, in the area of agriculture, where the hostile operating environment comes to add to the general technological and technical issues, reliable and robust WSAN systems are mandatory. This paper focuses on the hardware design architectures of the WSANs for real-world agricultural applications. It presents the available alternatives in hardware design and identifies their difficulties and problems for real-life implementations. The paper introduces SensoTube, a new WSAN hardware architecture, which is proposed as a solution to the various existing design constraints of WSANs. The establishment of the proposed architecture is based, firstly on an abstraction approach in the functional requirements context, and secondly, on the standardization of the subsystems connectivity, in order to allow for an open, expandable, flexible, reconfigurable, energy optimized, reliable and robust hardware system. The SensoTube implementation reference model together with its encapsulation design and installation are analyzed and presented in details. Furthermore, as a proof of concept, certain use cases have been studied in order to demonstrate the benefits of migrating existing designs based on the available open-source hardware platforms to SensoTube architecture. PMID:27527180

NASA Ames Research Center R and D Services Directorate Biomedical Systems Development

NASA Technical Reports Server (NTRS)

Pollitt, J.; Flynn, K.

1999-01-01

The Ames Research Center R&D Services Directorate teams with NASA, other government agencies and/or industry investigators for the development, design, fabrication, manufacturing and qualification testing of space-flight and ground-based experiment hardware for biomedical and general aerospace applications. In recent years, biomedical research hardware and software has been developed to support space-flight and ground-based experiment needs including the E 132 Biotelemetry system for the Research Animal Holding Facility (RAHF), E 100 Neurolab neuro-vestibular investigation systems, the Autogenic Feedback Systems, and the Standard Interface Glove Box (SIGB) experiment workstation module. Centrifuges, motion simulators, habitat design, environmental control systems, and other unique experiment modules and fixtures have also been developed. A discussion of engineered systems and capabilities will be provided to promote understanding of possibilities for future system designs in biomedical applications. In addition, an overview of existing engineered products will be shown. Examples of hardware and literature that demonstrate the organization's capabilities will be displayed. The Ames Research Center R&D Services Directorate is available to support the development of new hardware and software systems or adaptation of existing systems to meet the needs of academic, commercial/industrial, and government research requirements. The Ames R&D Services Directorate can provide specialized support for: System concept definition and feasibility Mathematical modeling and simulation of system performance Prototype hardware development Hardware and software design Data acquisition systems Graphical user interface development Motion control design Hardware fabrication and high-fidelity machining Composite materials development and application design Electronic/electrical system design and fabrication System performance verification testing and qualification.

Distributed digital signal processors for multi-body structures

NASA Technical Reports Server (NTRS)

Lee, Gordon K.

1990-01-01

Several digital filter designs were investigated which may be used to process sensor data from large space structures and to design digital hardware to implement the distributed signal processing architecture. Several experimental tests articles are available at NASA Langley Research Center to evaluate these designs. A summary of some of the digital filter designs is presented, an evaluation of their characteristics relative to control design is discussed, and candidate hardware microcontroller/microcomputer components are given. Future activities include software evaluation of the digital filter designs and actual hardware inplementation of some of the signal processor algorithms on an experimental testbed at NASA Langley.

Hardware synthesis from DDL description. [simulating a digital system for computerized design of large scale integrated circuits

NASA Technical Reports Server (NTRS)

Shiva, S. G.; Shah, A. M.

1980-01-01

The details of digital systems can be conveniently input into the design automation system by means of hardware description language (HDL). The computer aided design and test (CADAT) system at NASA MSFC is used for the LSI design. The digital design language (DDL) was selected as HDL for the CADAT System. DDL translator output can be used for the hardware implementation of the digital design. Problems of selecting the standard cells from the CADAT standard cell library to realize the logic implied by the DDL description of the system are addressed.

Design and development of data acquisition system based on WeChat hardware

NASA Astrophysics Data System (ADS)

Wang, Zhitao; Ding, Lei

2018-06-01

Data acquisition system based on WeChat hardware provides methods for popularization and practicality of data acquisition. The whole system is based on WeChat hardware platform, where the hardware part is developed on DA14580 development board and the software part is based on Alibaba Cloud. We designed service module, logic processing module, data processing module and database module. The communication between hardware and software uses AirSync Protocal. We tested this system by collecting temperature and humidity data, and the result shows that the system can aquisite the temperature and humidity in real time according to settings.

Space vehicle onboard command encoder

NASA Technical Reports Server (NTRS)

1975-01-01

A flexible onboard encoder system was designed for the space shuttle. The following areas were covered: (1) implementation of the encoder design into hardware to demonstrate the various encoding algorithms/code formats, (2) modulation techniques in a single hardware package to maintain comparable reliability and link integrity of the existing link systems and to integrate the various techniques into a single design using current technology. The primary function of the command encoder is to accept input commands, generated either locally onboard the space shuttle or remotely from the ground, format and encode the commands in accordance with the payload input requirements and appropriately modulate a subcarrier for transmission by the baseband RF modulator. The following information was provided: command encoder system design, brassboard hardware design, test set hardware and system packaging, and software.

Launch Window Trade Analysis for the James Webb Space Telescope

NASA Technical Reports Server (NTRS)

Yu, Wayne H.; Richon, Karen

2014-01-01

The James Webb Space Telescope (JWST) is a large-scale space telescope mission designed to study fundamental astrophysical questions ranging from the formation of the universe to the origin of planetary systems and the origins of life. JWSTs orbit design is a Libration Point Orbit (LPO) around the Sun-Earth/Moon (SEM) L2 point for a planned mission lifetime of 10.5 years. The launch readiness period for JWST is from Oct 1st, 2018 November 30th, 2018. This paper presents the first launch window analysis for the JWST observatory using finite-burn modeling; previous analysis assumed a single impulsive midcourse correction to achieve the mission orbit. The physical limitations of the JWST hardware stemming primarily from propulsion, communication and thermal requirements alongside updated mission design requirements result in significant launch window within the launch readiness period. Future plans are also discussed.

James Webb Space Telescope Launch Window Trade Analysis

NASA Technical Reports Server (NTRS)

Yu, Wayne; Richon, Karen

2014-01-01

The James Webb Space Telescope (JWST) is a large-scale space telescope mission designed to study fundamental astrophysical questions ranging from the formation of the universe to the origin of planetary systems and the origins of life. JWSTs orbit design is a Libration Point Orbit (LPO) around the Sun-EarthMoon (SEM) L2 point for a planned mission lifetime of 10.5 years. The launch readiness period for JWST is from Oct 1st, 2018 November 30th, 2018. This paper presents the first launch window analysis for the JWST observatory using finite-burn modeling; previous analysis assumed a single impulsive midcourse correction to achieve the mission orbit. The physical limitations of the JWST hardware stemming primarily from propulsion, communication and thermal requirements alongside updated mission design requirements result in significant launch window within the launch readiness period. Future plans are also discussed.

Touching proteins with virtual bare hands - Visualizing protein-drug complexes and their dynamics in self-made virtual reality using gaming hardware

NASA Astrophysics Data System (ADS)

Ratamero, Erick Martins; Bellini, Dom; Dowson, Christopher G.; Römer, Rudolf A.

2018-06-01

The ability to precisely visualize the atomic geometry of the interactions between a drug and its protein target in structural models is critical in predicting the correct modifications in previously identified inhibitors to create more effective next generation drugs. It is currently common practice among medicinal chemists while attempting the above to access the information contained in three-dimensional structures by using two-dimensional projections, which can preclude disclosure of useful features. A more accessible and intuitive visualization of the three-dimensional configuration of the atomic geometry in the models can be achieved through the implementation of immersive virtual reality (VR). While bespoke commercial VR suites are available, in this work, we present a freely available software pipeline for visualising protein structures through VR. New consumer hardware, such as the uc(HTC Vive) and the uc(Oculus Rift) utilized in this study, are available at reasonable prices. As an instructive example, we have combined VR visualization with fast algorithms for simulating intramolecular motions of protein flexibility, in an effort to further improve structure-led drug design by exposing molecular interactions that might be hidden in the less informative static models. This is a paradigmatic test case scenario for many similar applications in computer-aided molecular studies and design.

Touching proteins with virtual bare hands : Visualizing protein-drug complexes and their dynamics in self-made virtual reality using gaming hardware.

PubMed

Ratamero, Erick Martins; Bellini, Dom; Dowson, Christopher G; Römer, Rudolf A

2018-06-07

The ability to precisely visualize the atomic geometry of the interactions between a drug and its protein target in structural models is critical in predicting the correct modifications in previously identified inhibitors to create more effective next generation drugs. It is currently common practice among medicinal chemists while attempting the above to access the information contained in three-dimensional structures by using two-dimensional projections, which can preclude disclosure of useful features. A more accessible and intuitive visualization of the three-dimensional configuration of the atomic geometry in the models can be achieved through the implementation of immersive virtual reality (VR). While bespoke commercial VR suites are available, in this work, we present a freely available software pipeline for visualising protein structures through VR. New consumer hardware, such as the HTC VIVE and the OCULUS RIFT utilized in this study, are available at reasonable prices. As an instructive example, we have combined VR visualization with fast algorithms for simulating intramolecular motions of protein flexibility, in an effort to further improve structure-led drug design by exposing molecular interactions that might be hidden in the less informative static models. This is a paradigmatic test case scenario for many similar applications in computer-aided molecular studies and design.

The Additional Secondary Phase Correction System for AIS Signals

PubMed Central

Wang, Xiaoye; Zhang, Shufang; Sun, Xiaowen

2017-01-01

This paper looks at the development and implementation of the additional secondary phase factor (ASF) real-time correction system for the Automatic Identification System (AIS) signal. A large number of test data were collected using the developed ASF correction system and the propagation characteristics of the AIS signal that transmits at sea and the ASF real-time correction algorithm of the AIS signal were analyzed and verified. Accounting for the different hardware of the receivers in the land-based positioning system and the variation of the actual environmental factors, the ASF correction system corrects original measurements of positioning receivers in real time and provides corrected positioning accuracy within 10 m. PMID:28362330

Eye gaze correction with stereovision for video-teleconferencing.

PubMed

Yang, Ruigang; Zhang, Zhengyou

2004-07-01

The lack of eye contact in desktop video teleconferencing substantially reduces the effectiveness of video contents. While expensive and bulky hardware is available on the market to correct eye gaze, researchers have been trying to provide a practical software-based solution to bring video-teleconferencing one step closer to the mass market. This paper presents a novel approach: Based on stereo analysis combined with rich domain knowledge (a personalized face model), we synthesize, using graphics hardware, a virtual video that maintains eye contact. A 3D stereo head tracker with a personalized face model is used to compute initial correspondences across two views. More correspondences are then added through template and feature matching. Finally, all the correspondence information is fused together for view synthesis using view morphing techniques. The combined methods greatly enhance the accuracy and robustness of the synthesized views. Our current system is able to generate an eye-gaze corrected video stream at five frames per second on a commodity 1 GHz PC.

Build 3 of an Accelerated Mission Test of a TF41 with Block 76 Hardware.

DTIC Science & Technology

1979-12-01

Temperature and Calculated Turbine 28 Stator Inlet Temperature Time History 7 ACU/DCU Time Checks 31 8 Oil Consumption Between Fills 32 9 Overall Oil...Consumption 33 10 Engine Vibration History 36 11 Corrected "A" Cycle Performance Trends 33 12 Corrected "A" Cycle Performance Trends 39 13 Corrected...records of engine histories during actual flight. An extensive program of pilot interviews 12 0 Li) 05 ____ ____ ___ ____ ____ ___ ____ ____ __ F

Application and design of solar photovoltaic system

NASA Astrophysics Data System (ADS)

Tianze, Li; Hengwei, Lu; Chuan, Jiang; Luan, Hou; Xia, Zhang

2011-02-01

Solar modules, power electronic equipments which include the charge-discharge controller, the inverter, the test instrumentation and the computer monitoring, and the storage battery or the other energy storage and auxiliary generating plant make up of the photovoltaic system which is shown in the thesis. PV system design should follow to meet the load supply requirements, make system low cost, seriously consider the design of software and hardware, and make general software design prior to hardware design in the paper. To take the design of PV system for an example, the paper gives the analysis of the design of system software and system hardware, economic benefit, and basic ideas and steps of the installation and the connection of the system. It elaborates on the information acquisition, the software and hardware design of the system, the evaluation and optimization of the system. Finally, it shows the analysis and prospect of the application of photovoltaic technology in outer space, solar lamps, freeways and communications.

Media processors using a new microsystem architecture designed for the Internet era

NASA Astrophysics Data System (ADS)

Wyland, David C.

1999-12-01

The demands of digital image processing, communications and multimedia applications are growing more rapidly than traditional design methods can fulfill them. Previously, only custom hardware designs could provide the performance required to meet the demands of these applications. However, hardware design has reached a crisis point. Hardware design can no longer deliver a product with the required performance and cost in a reasonable time for a reasonable risk. Software based designs running on conventional processors can deliver working designs in a reasonable time and with low risk but cannot meet the performance requirements. What is needed is a media processing approach that combines very high performance, a simple programming model, complete programmability, short time to market and scalability. The Universal Micro System (UMS) is a solution to these problems. The UMS is a completely programmable (including I/O) system on a chip that combines hardware performance with the fast time to market, low cost and low risk of software designs.

New cardiac cameras: single-photon emission CT and PET.

PubMed

Slomka, Piotr J; Berman, Daniel S; Germano, Guido

2014-07-01

Nuclear cardiology instrumentation has evolved significantly in the recent years. Concerns about radiation dose and long acquisition times have propelled developments of dedicated high-efficiency cardiac SPECT scanners. Novel collimator designs, such as multipinhole or locally focusing collimators arranged in geometries that are optimized for cardiac imaging, have been implemented to enhance photon-detection sensitivity. Some of these new SPECT scanners use solid-state photon detectors instead of photomultipliers to improve image quality and to reduce the scanner footprint. These new SPECT devices allow dramatic up to 7-fold reduction in acquisition times or similar reduction in radiation dose. In addition, new hardware for photon attenuation correction allowing ultralow radiation doses has been offered by some vendors. To mitigate photon attenuation artifacts for the new SPECT scanners not equipped with attenuation correction hardware, 2-position (upright-supine or prone-supine) imaging has been proposed. PET hardware developments have been primarily driven by the requirements of oncologic imaging, but cardiac imaging can benefit from improved PET image quality and improved sensitivity of 3D systems. The time-of-flight reconstruction combined with resolution recovery techniques is now implemented by all major PET vendors. These new methods improve image contrast and image resolution and reduce image noise. High-sensitivity 3D PET without interplane septa allows reduced radiation dose for cardiac perfusion imaging. Simultaneous PET/MR hybrid system has been developed. Solid-state PET detectors with avalanche photodiodes or digital silicon photomultipliers have been introduced, and they offer improved imaging characteristics and reduced sensitivity to electromagnetic MR fields. Higher maximum count rate of the new PET detectors allows routine first-pass Rb-82 imaging, with 3D PET acquisition enabling clinical utilization of dynamic imaging with myocardial flow measurements for this tracer. The availability of high-end CT component in most PET/CT configurations enables hybrid multimodality cardiac imaging protocols with calcium scoring or CT angiography or both. Copyright © 2014. Published by Elsevier Inc.

Low-power hardware implementation of movement decoding for brain computer interface with reduced-resolution discrete cosine transform.

PubMed

Minho Won; Albalawi, Hassan; Xin Li; Thomas, Donald E

2014-01-01

This paper describes a low-power hardware implementation for movement decoding of brain computer interface. Our proposed hardware design is facilitated by two novel ideas: (i) an efficient feature extraction method based on reduced-resolution discrete cosine transform (DCT), and (ii) a new hardware architecture of dual look-up table to perform discrete cosine transform without explicit multiplication. The proposed hardware implementation has been validated for movement decoding of electrocorticography (ECoG) signal by using a Xilinx FPGA Zynq-7000 board. It achieves more than 56× energy reduction over a reference design using band-pass filters for feature extraction.

Energy efficient engine low-pressure compressor component test hardware detailed design report

NASA Technical Reports Server (NTRS)

Michael, C. J.; Halle, J. E.

1981-01-01

The aerodynamic and mechanical design description of the low pressure compressor component of the Energy Efficient Engine were used. The component was designed to meet the requirements of the Flight Propulsion System while maintaining a low cost approach in providing a low pressure compressor design for the Integrated Core/Low Spool test required in the Energy Efficient Engine Program. The resulting low pressure compressor component design meets or exceeds all design goals with the exception of surge margin. In addition, the expense of hardware fabrication for the Integrated Core/Low Spool test has been minimized through the use of existing minor part hardware.

Time maintenance system for the BMDO MSX spacecraft

NASA Technical Reports Server (NTRS)

Hermes, Martin J.

1994-01-01

The Johns Hopkins University Applied Physics Laboratory (APL) is responsible for designing and implementing a clock maintenance system for the Ballistic Missile Defense Organizations (BMDO) Midcourse Space Experiment (MSX) spacecraft. The MSX spacecraft has an on-board clock that will be used to control execution of time-dependent commands and to time tag all science and housekeeping data received from the spacecraft. MSX mission objectives have dictated that this spacecraft time, UTC(MSX), maintain a required accuracy with respect to UTC(USNO) of +/- 10 ms with a +/- 1 ms desired accuracy. APL's atomic time standards and the downlinked spacecraft time were used to develop a time maintenance system that will estimate the current MSX clock time offset during an APL pass and make estimates of the clock's drift and aging using the offset estimates from many passes. Using this information, the clock's accuracy will be maintained by uplinking periodic clock correction commands. The resulting time maintenance system is a combination of offset measurement, command/telemetry, and mission planning hardware and computing assets. All assets provide necessary inputs for deciding when corrections to the MSX spacecraft clock must be made to maintain its required accuracy without inhibiting other mission objectives. The MSX time maintenance system is described as a whole and the clock offset measurement subsystem, a unique combination of precision time maintenance and measurement hardware controlled by a Macintosh computer, is detailed. Simulations show that the system estimates the MSX clock offset to less than+/- 33 microseconds.

Online Learning Flight Control for Intelligent Flight Control Systems (IFCS)

NASA Technical Reports Server (NTRS)

Niewoehner, Kevin R.; Carter, John (Technical Monitor)

2001-01-01

The research accomplishments for the cooperative agreement 'Online Learning Flight Control for Intelligent Flight Control Systems (IFCS)' include the following: (1) previous IFC program data collection and analysis; (2) IFC program support site (configured IFC systems support network, configured Tornado/VxWorks OS development system, made Configuration and Documentation Management Systems Internet accessible); (3) Airborne Research Test Systems (ARTS) II Hardware (developed hardware requirements specification, developing environmental testing requirements, hardware design, and hardware design development); (4) ARTS II software development laboratory unit (procurement of lab style hardware, configured lab style hardware, and designed interface module equivalent to ARTS II faceplate); (5) program support documentation (developed software development plan, configuration management plan, and software verification and validation plan); (6) LWR algorithm analysis (performed timing and profiling on algorithm); (7) pre-trained neural network analysis; (8) Dynamic Cell Structures (DCS) Neural Network Analysis (performing timing and profiling on algorithm); and (9) conducted technical interchange and quarterly meetings to define IFC research goals.

The Evolution of Exercise Hardware on ISS: Past, Present, and Future

NASA Technical Reports Server (NTRS)

Buxton, R. E.; Kalogera, K. L.; Hanson, A. M.

2017-01-01

During 16 years in low-Earth orbit, the suite of exercise hardware aboard the International Space Station (ISS) has matured significantly. Today, the countermeasure system supports an array of physical-training protocols and serves as an extensive research platform. Future hardware designs are required to have smaller operational envelopes and must also mitigate known physiologic issues observed in long-duration spaceflight. Taking lessons learned from the long history of space exercise will be important to successful development and implementation of future, compact exercise hardware. The evolution of exercise hardware as deployed on the ISS has implications for future exercise hardware and operations. Key lessons learned from the early days of ISS have helped to: 1. Enhance hardware performance (increased speed and loads). 2. Mature software interfaces. 3. Compare inflight exercise workloads to pre-, in-, and post-flight musculoskeletal and aerobic conditions. 4. Improve exercise comfort. 5. Develop complimentary hardware for research and operations. Current ISS exercise hardware includes both custom and commercial-off-the-shelf (COTS) hardware. Benefits and challenges to this approach have prepared engineering teams to take a hybrid approach when designing and implementing future exercise hardware. Significant effort has gone into consideration of hardware instrumentation and wearable devices that provide important data to monitor crew health and performance.

14 CFR 171.323 - Fabrication and installation requirements.

Code of Federal Regulations, 2011 CFR

2011-01-01

... must be located, constructed, and installed in accordance with best commercial engineering practices... software and/or hardware in space provided in the original equipment. (d) The mean corrective maintenance...

14 CFR 171.323 - Fabrication and installation requirements.

Code of Federal Regulations, 2014 CFR

2014-01-01

... must be located, constructed, and installed in accordance with best commercial engineering practices... software and/or hardware in space provided in the original equipment. (d) The mean corrective maintenance...

14 CFR 171.323 - Fabrication and installation requirements.

Code of Federal Regulations, 2012 CFR

2012-01-01

... must be located, constructed, and installed in accordance with best commercial engineering practices... software and/or hardware in space provided in the original equipment. (d) The mean corrective maintenance...

14 CFR 171.323 - Fabrication and installation requirements.

Code of Federal Regulations, 2013 CFR

2013-01-01

... must be located, constructed, and installed in accordance with best commercial engineering practices... software and/or hardware in space provided in the original equipment. (d) The mean corrective maintenance...

75 FR 1297 - Airworthiness Directives; Boeing Model 737-600, -700, -700C, -800, -900, and -900ER Series Airplanes

Federal Register 2010, 2011, 2012, 2013, 2014

2010-01-11

... installed, one-time torquing of the nut and bolt, and corrective actions if necessary. This proposed AD... nut and bolt, and corrective actions if necessary. That AD resulted from reports of parts coming off... of the slat track hardware (i.e., the bolt, washers, downstops, stop location, and nut shown in...

Using Transom Jack in the Human Engineering Analysis of the Materials Science Research Rack-1 and Quench Module Insert

NASA Technical Reports Server (NTRS)

Dunn, Mariea C.; Alves, Jeffrey R.; Hutchinson, Sonya L.

1999-01-01

This paper describes the human engineering analysis performed on the Materials Science Research Rack-1 and Quench Module Insert (MSRR-1/QMI) using Transom Jack (Jack) software. The Jack software was used to model a virtual environment consisting of the MSRR-1/QMI hardware configuration and human figures representing the 95th percentile male and 5th percentile female. The purpose of the simulation was to assess the human interfaces in the design for their ability to meet the requirements of the Pressurized Payloads Interface Requirements Document - International Space Program, Revision C (SSP 57000). Jack was used in the evaluation because of its ability to correctly model anthropometric body measurements and the physical behavior of astronauts working in microgravity, which is referred to as the neutral body posture. The Jack model allows evaluation of crewmember interaction with hardware through task simulation including but not limited to collision avoidance behaviors, hand/eye coordination, reach path planning, and automatic grasping to part contours. Specifically, this virtual simulation depicts the human figures performing the QMI installation and check-out, sample cartridge insertion and removal, and gas bottle drawer removal. These tasks were evaluated in terms of adequate clearance in reach envelopes, adequate accessibility in work envelopes, appropriate line of sight in visual envelopes, and accommodation of full size range for male and female stature maneuverability. The results of the human engineering analysis virtual simulation indicate that most of the associated requirements of SSP 57000 were met. However, some hardware design considerations and crew procedures modifications are recommended to improve accessibility, provide an adequate work envelope, reduce awkward body posture, and eliminate permanent protrusions.

Fault-tolerant, high-level quantum circuits: form, compilation and description

NASA Astrophysics Data System (ADS)

Paler, Alexandru; Polian, Ilia; Nemoto, Kae; Devitt, Simon J.

2017-06-01

Fault-tolerant quantum error correction is a necessity for any quantum architecture destined to tackle interesting, large-scale problems. Its theoretical formalism has been well founded for nearly two decades. However, we still do not have an appropriate compiler to produce a fault-tolerant, error-corrected description from a higher-level quantum circuit for state-of the-art hardware models. There are many technical hurdles, including dynamic circuit constructions that occur when constructing fault-tolerant circuits with commonly used error correcting codes. We introduce a package that converts high-level quantum circuits consisting of commonly used gates into a form employing all decompositions and ancillary protocols needed for fault-tolerant error correction. We call this form the (I)initialisation, (C)NOT, (M)measurement form (ICM) and consists of an initialisation layer of qubits into one of four distinct states, a massive, deterministic array of CNOT operations and a series of time-ordered X- or Z-basis measurements. The form allows a more flexible approach towards circuit optimisation. At the same time, the package outputs a standard circuit or a canonical geometric description which is a necessity for operating current state-of-the-art hardware architectures using topological quantum codes.

Pile-up correction by Genetic Algorithm and Artificial Neural Network

NASA Astrophysics Data System (ADS)

Kafaee, M.; Saramad, S.

2009-08-01

Pile-up distortion is a common problem for high counting rates radiation spectroscopy in many fields such as industrial, nuclear and medical applications. It is possible to reduce pulse pile-up using hardware-based pile-up rejections. However, this phenomenon may not be eliminated completely by this approach and the spectrum distortion caused by pile-up rejection can be increased as well. In addition, inaccurate correction or rejection of pile-up artifacts in applications such as energy dispersive X-ray (EDX) spectrometers can lead to losses of counts, will give poor quantitative results and even false element identification. Therefore, it is highly desirable to use software-based models to predict and correct any recognized pile-up signals in data acquisition systems. The present paper describes two new intelligent approaches for pile-up correction; the Genetic Algorithm (GA) and Artificial Neural Networks (ANNs). The validation and testing results of these new methods have been compared, which shows excellent agreement with the measured data with 60Co source and NaI detector. The Monte Carlo simulation of these new intelligent algorithms also shows their advantages over hardware-based pulse pile-up rejection methods.

Performance/price estimates for cortex-scale hardware: a design space exploration.

PubMed

Zaveri, Mazad S; Hammerstrom, Dan

2011-04-01

In this paper, we revisit the concept of virtualization. Virtualization is useful for understanding and investigating the performance/price and other trade-offs related to the hardware design space. Moreover, it is perhaps the most important aspect of a hardware design space exploration. Such a design space exploration is a necessary part of the study of hardware architectures for large-scale computational models for intelligent computing, including AI, Bayesian, bio-inspired and neural models. A methodical exploration is needed to identify potentially interesting regions in the design space, and to assess the relative performance/price points of these implementations. As an example, in this paper we investigate the performance/price of (digital and mixed-signal) CMOS and hypothetical CMOL (nanogrid) technology based hardware implementations of human cortex-scale spiking neural systems. Through this analysis, and the resulting performance/price points, we demonstrate, in general, the importance of virtualization, and of doing these kinds of design space explorations. The specific results suggest that hybrid nanotechnology such as CMOL is a promising candidate to implement very large-scale spiking neural systems, providing a more efficient utilization of the density and storage benefits of emerging nano-scale technologies. In general, we believe that the study of such hypothetical designs/architectures will guide the neuromorphic hardware community towards building large-scale systems, and help guide research trends in intelligent computing, and computer engineering. Copyright © 2010 Elsevier Ltd. All rights reserved.

TRANSTRAIN: A program to compute strain transformations in composite materials

NASA Technical Reports Server (NTRS)

Ahmed, Rafiq

1990-01-01

Over the years, the solid rocket motor community has made increasing use of composite materials for thermal and structural applications. This is particularly true of solid rocket nozzles, which have used carbon phenolic and, increasingly, carbon-carbon materials to provide structural integrity and thermal protection at the high temperatures encountered during motor burn. To evaluate the degree of structural performance of nozzles and their materials and to verify analysis models, many subscale and full-scale tests are run. These provide engineers with valuable data needed to optimize design and to analyze nozzle hardware. Included among these data are strains, pressures, thrust, temperatures, and displacements. Recent nozzle test hardware has made increasing use of strain gauges embedded in the carbon composite material to measure internal strains. In order to evaluate strength, these data must be transformed into strains along the fiber directions. The fiber-direction stresses can then be calculated. A computer program written to help engineers correctly manipulate the strain data into a form that can be used to evaluate structural integrity of the nozzle is examined.

Digital simulation of a communication link for Pioneer Saturn Uranus atmospheric entry probe, part 1

NASA Technical Reports Server (NTRS)

Hinrichs, C. A.

1975-01-01

A digital simulation study is presented for a candidate modulator/demodulator design in an atmospheric scintillation environment with Doppler, Doppler rate, and signal attenuation typical of the conditions of an outer planet atmospheric probe. The simulation results indicate that the mean channel error rate with and without scintillation are similar to theoretical characterizations of the link. The simulation gives information for calculating other channel statistics and generates a quantized symbol stream on magnetic tape from which error correction decoding is analyzed. Results from the magnetic tape data analyses are also included. The receiver and bit synchronizer are modeled in the simulation at the level of hardware component parameters rather than at the loop equation level and individual hardware parameters are identified. The atmospheric scintillation amplitude and phase are modeled independently. Normal and log normal amplitude processes are studied. In each case the scintillations are low pass filtered. The receiver performance is given for a range of signal to noise ratios with and without the effects of scintillation. The performance is reviewed for critical reciever parameter variations.

Flight Hardware Packaging Design for Stringent EMC Radiated Emission Requirements

NASA Technical Reports Server (NTRS)

Lortz, Charlene L.; Huang, Chi-Chien N.; Ravich, Joshua A.; Steiner, Carl N.

2013-01-01

This packaging design approach can help heritage hardware meet a flight project's stringent EMC radiated emissions requirement. The approach requires only minor modifications to a hardware's chassis and mainly concentrates on its connector interfaces. The solution is to raise the surface area where the connector is mounted by a few millimeters using a pedestal, and then wrapping with conductive tape from the cable backshell down to the surface-mounted connector. This design approach has been applied to JPL flight project subsystems. The EMC radiated emissions requirements for flight projects can vary from benign to mission critical. If the project's EMC requirements are stringent, the best approach to meet EMC requirements would be to design an EMC control program for the project early on and implement EMC design techniques starting with the circuit board layout. This is the ideal scenario for hardware that is built from scratch. Implementation of EMC radiated emissions mitigation techniques can mature as the design progresses, with minimal impact to the design cycle. The real challenge exists for hardware that is planned to be flown following a built-to-print approach, in which heritage hardware from a past project with a different set of requirements is expected to perform satisfactorily for a new project. With acceptance of heritage, the design would already be established (circuit board layout and components have already been pre-determined), and hence any radiated emissions mitigation techniques would only be applicable at the packaging level. The key is to take a heritage design with its known radiated emissions spectrum and repackage, or modify its chassis design so that it would have a better chance of meeting the new project s radiated emissions requirements.

Propulsion/flight control integration technology (PROFIT) design analysis status

NASA Technical Reports Server (NTRS)

Carlin, C. M.; Hastings, W. J.

1978-01-01

The propulsion flight control integration technology (PROFIT) program was designed to develop a flying testbed dedicated to controls research. The preliminary design, analysis, and feasibility studies conducted in support of the PROFIT program are reported. The PROFIT system was built around existing IPCS hardware. In order to achieve the desired system flexibility and capability, additional interfaces between the IPCS hardware and F-15 systems were required. The requirements for additions and modifications to the existing hardware were defined. Those interfaces involving the more significant changes were studied. The DCU memory expansion to 32K with flight qualified hardware was completed on a brassboard basis. The uplink interface breadboard and a brassboard of the central computer interface were also tested. Two preliminary designs and corresponding program plans are presented.

Virtex-5QV Self Scrubber

DOE Office of Scientific and Technical Information (OSTI.GOV)

Wojahn, Christopher K.

2015-10-20

This HDL code (hereafter referred to as "software") implements circuitry in Xilinx Virtex-5QV Field Programmable Gate Array (FPGA) hardware. This software allows the device to self-check the consistency of its own configuration memory for radiation-induced errors. The software then provides the capability to correct any single-bit errors detected in the memory using the device's inherent circuitry, or reload corrupted memory frames when larger errors occur that cannot be corrected with the device's built-in error correction and detection scheme.

Human Machine Interface Programming and Testing

NASA Technical Reports Server (NTRS)

Foster, Thomas Garrison

2013-01-01

Human Machine Interface (HMI) Programming and Testing is about creating graphical displays to mimic mission critical ground control systems in order to provide NASA engineers with the ability to monitor the health management of these systems in real time. The Health Management System (HMS) is an online interactive human machine interface system that monitors all Kennedy Ground Control Subsystem (KGCS) hardware in the field. The Health Management System is essential to NASA engineers because it allows remote control and monitoring of the health management systems of all the Programmable Logic Controllers (PLC) and associated field devices. KGCS will have equipment installed at the launch pad, Vehicle Assembly Building, Mobile Launcher, as well as the Multi-Purpose Processing Facility. I am designing graphical displays to monitor and control new modules that will be integrated into the HMS. The design of the display screen will closely mimic the appearance and functionality of the actual modules. There are many different field devices used to monitor health management and each device has its own unique set of health management related data, therefore each display must also have its own unique way to display this data. Once the displays are created, the RSLogix5000 application is used to write software that maps all the required data read from the hardware to the graphical display. Once this data is mapped to its corresponding display item, the graphical display and hardware device will be connected through the same network in order to test all possible scenarios and types of data the graphical display was designed to receive. Test Procedures will be written to thoroughly test out the displays and ensure that they are working correctly before being deployed to the field. Additionally, the Kennedy Ground Controls Subsystem's user manual will be updated to explain to the NASA engineers how to use the new module displays.

James Webb Space Telescope Integrated Science Instrument Module Thermal Vacuum Thermal Balance Test Campaign at NASA's Goddard Space Flight Center

NASA Technical Reports Server (NTRS)

Glazer, Stuart; Comber, Brian (Inventor)

2016-01-01

The James Webb Space Telescope is a large infrared telescope with a 6.5-meter primary mirror, designed as a successor to the Hubble Space Telescope when launched in 2018. Three of the four science instruments contained within the Integrated Science Instrument Module (ISIM) are passively cooled to their operational temperature range of 36K to 40K with radiators, and the fourth instrument is actively cooled to its operational temperature of approximately 6K. Thermal-vacuum testing of the flight science instruments at the ISIM element level has taken place in three separate highly challenging and extremely complex thermal tests within a gaseous helium-cooled shroud inside Goddard Space Flight Centers Space Environment Simulator. Special data acquisition software was developed for these tests to monitor over 1700 flight and test sensor measurements, track over 50 gradients, component rates, and temperature limits in real time against defined constraints and limitations, and guide the complex transition from ambient to final cryogenic temperatures and back. This extremely flexible system has proven highly successful in safeguarding the nearly $2B science payload during the 3.5-month-long thermal tests. Heat flow measurement instrumentation, or Q-meters, were also specially developed for these tests. These devices provide thermal boundaries o the flight hardware while measuring instrument heat loads up to 600 mW with an estimated uncertainty of 2 mW in test, enabling accurate thermal model correlation, hardware design validation, and workmanship verification. The high accuracy heat load measurements provided first evidence of a potentially serious hardware design issue that was subsequently corrected. This paper provides an overview of the ISIM-level thermal-vacuum tests and thermal objectives; explains the thermal test configuration and thermal balances; describes special measurement instrumentation and monitoring and control software; presents key test thermal results; lists problems encountered during testing and lessons learned.

FPS-RAM: Fast Prefix Search RAM-Based Hardware for Forwarding Engine

NASA Astrophysics Data System (ADS)

Zaitsu, Kazuya; Yamamoto, Koji; Kuroda, Yasuto; Inoue, Kazunari; Ata, Shingo; Oka, Ikuo

Ternary content addressable memory (TCAM) is becoming very popular for designing high-throughput forwarding engines on routers. However, TCAM has potential problems in terms of hardware and power costs, which limits its ability to deploy large amounts of capacity in IP routers. In this paper, we propose new hardware architecture for fast forwarding engines, called fast prefix search RAM-based hardware (FPS-RAM). We designed FPS-RAM hardware with the intent of maintaining the same search performance and physical user interface as TCAM because our objective is to replace the TCAM in the market. Our RAM-based hardware architecture is completely different from that of TCAM and has dramatically reduced the costs and power consumption to 62% and 52%, respectively. We implemented FPS-RAM on an FPGA to examine its lookup operation.

Functional design specification for Stowage List And Hardware Tracking System (SLAHTS). [space shuttles

NASA Technical Reports Server (NTRS)

Keltner, D. J.

1975-01-01

This functional design specification defines the total systems approach to meeting the requirements stated in the Detailed Requirements Document for Stowage List and Hardware Tracking System for the space shuttle program. The stowage list and hardware tracking system is identified at the system and subsystem level with each subsystem defined as a function of the total system.

Handling the satellite inter-frequency biases in triple-frequency observations

NASA Astrophysics Data System (ADS)

Zhao, Lewen; Ye, Shirong; Song, Jia

2017-04-01

The new generation of GNSS satellites, including BDS, Galileo, modernized GPS, and GLONASS, transmit navigation sdata at more frequencies. Multi-frequency signals open new prospects for precise positioning, but satellite code and phase inter-frequency biases (IFB) induced by the third frequency need to be handled. Satellite code IFB can be corrected using products estimated by different strategies, the theoretical and numerical compatibility of these methods need to be proved. Furthermore, a new type of phase IFB, which changes with the relative sun-spacecraft-earth geometry, has been observed. It is necessary to investigate the cause and possible impacts of phase Time-variant IFB (TIFB). Therefore, we present systematic analysis to illustrate the relevancy between satellite clocks and phase TIFB, and compare the handling strategies of the code and phase IFB in triple-frequency positioning. First, the un-differenced L1/L2 satellite clock corrections considering the hardware delays are derived. And IFB induced by the dual-frequency satellite clocks to triple-frequency PPP model is detailed. The analysis shows that estimated satellite clocks actually contain the time-variant phase hardware delays, which can be compensated in L1/L2 ionosphere-free combinations. However, the time-variant hardware delays will lead to TIFB if the third frequency is used. Then, the methods used to correct the code and phase IFB are discussed. Standard point positioning (SPP) and precise point positioning (PPP) using BDS observations are carried out to validate the improvement of different IFB correction strategies. Experiments show that code IFB derived from DCB or geometry-free and ionosphere-free combination show an agreement of 0.3 ns for all satellites. Positioning results and error distribution with two different code IFB correcting strategies achieve similar tendency, which shows their substitutability. The original and wavelet filtered phase TIFB long-term series show significant periodical characteristic for most GEO and IGSO satellites, with the magnitude varies between - 5 cm and 5 cm. Finally, BDS L1/L3 kinematic PPP is conducted with code IFB corrected with DCB combinations, and TIFB corrected with filtered series. Results show that the IFB corrected L1/L3 PPP can achieve comparable convergence and positioning accuracy as L1/L2 combinations in static and kinematic mode.

Development of an automatic subsea blowout preventer stack control system using PLC based SCADA.

PubMed

Cai, Baoping; Liu, Yonghong; Liu, Zengkai; Wang, Fei; Tian, Xiaojie; Zhang, Yanzhen

2012-01-01

An extremely reliable remote control system for subsea blowout preventer stack is developed based on the off-the-shelf triple modular redundancy system. To meet a high reliability requirement, various redundancy techniques such as controller redundancy, bus redundancy and network redundancy are used to design the system hardware architecture. The control logic, human-machine interface graphical design and redundant databases are developed by using the off-the-shelf software. A series of experiments were performed in laboratory to test the subsea blowout preventer stack control system. The results showed that the tested subsea blowout preventer functions could be executed successfully. For the faults of programmable logic controllers, discrete input groups and analog input groups, the control system could give correct alarms in the human-machine interface. Copyright © 2011 ISA. Published by Elsevier Ltd. All rights reserved.

Electro-mechanical probe positioning system for large volume plasma device

NASA Astrophysics Data System (ADS)

Sanyasi, A. K.; Sugandhi, R.; Srivastava, P. K.; Srivastav, Prabhakar; Awasthi, L. M.

2018-05-01

An automated electro-mechanical system for the positioning of plasma diagnostics has been designed and implemented in a Large Volume Plasma Device (LVPD). The system consists of 12 electro-mechanical assemblies, which are orchestrated using the Modbus communication protocol on 4-wire RS485 communications to meet the experimental requirements. Each assembly has a lead screw-based mechanical structure, Wilson feed-through-based vacuum interface, bipolar stepper motor, micro-controller-based stepper drive, and optical encoder for online positioning correction of probes. The novelty of the system lies in the orchestration of multiple drives on a single interface, fabrication and installation of the system for a large experimental device like the LVPD, in-house developed software, and adopted architectural practices. The paper discusses the design, description of hardware and software interfaces, and performance results in LVPD.

Wavefront correction and high-resolution in vivo OCT imaging with an objective integrated multi-actuator adaptive lens.

PubMed

Bonora, Stefano; Jian, Yifan; Zhang, Pengfei; Zam, Azhar; Pugh, Edward N; Zawadzki, Robert J; Sarunic, Marinko V

2015-08-24

Adaptive optics is rapidly transforming microscopy and high-resolution ophthalmic imaging. The adaptive elements commonly used to control optical wavefronts are liquid crystal spatial light modulators and deformable mirrors. We introduce a novel Multi-actuator Adaptive Lens that can correct aberrations to high order, and which has the potential to increase the spread of adaptive optics to many new applications by simplifying its integration with existing systems. Our method combines an adaptive lens with an imaged-based optimization control that allows the correction of images to the diffraction limit, and provides a reduction of hardware complexity with respect to existing state-of-the-art adaptive optics systems. The Multi-actuator Adaptive Lens design that we present can correct wavefront aberrations up to the 4th order of the Zernike polynomial characterization. The performance of the Multi-actuator Adaptive Lens is demonstrated in a wide field microscope, using a Shack-Hartmann wavefront sensor for closed loop control. The Multi-actuator Adaptive Lens and image-based wavefront-sensorless control were also integrated into the objective of a Fourier Domain Optical Coherence Tomography system for in vivo imaging of mouse retinal structures. The experimental results demonstrate that the insertion of the Multi-actuator Objective Lens can generate arbitrary wavefronts to correct aberrations down to the diffraction limit, and can be easily integrated into optical systems to improve the quality of aberrated images.

A novel cloning template designing method by using an artificial bee colony algorithm for edge detection of CNN based imaging sensors.

PubMed

Parmaksızoğlu, Selami; Alçı, Mustafa

2011-01-01

Cellular Neural Networks (CNNs) have been widely used recently in applications such as edge detection, noise reduction and object detection, which are among the main computer imaging processes. They can also be realized as hardware based imaging sensors. The fact that hardware CNN models produce robust and effective results has attracted the attention of researchers using these structures within image sensors. Realization of desired CNN behavior such as edge detection can be achieved by correctly setting a cloning template without changing the structure of the CNN. To achieve different behaviors effectively, designing a cloning template is one of the most important research topics in this field. In this study, the edge detecting process that is used as a preliminary process for segmentation, identification and coding applications is conducted by using CNN structures. In order to design the cloning template of goal-oriented CNN architecture, an Artificial Bee Colony (ABC) algorithm which is inspired from the foraging behavior of honeybees is used and the performance analysis of ABC for this application is examined with multiple runs. The CNN template generated by the ABC algorithm is tested by using artificial and real test images. The results are subjectively and quantitatively compared with well-known classical edge detection methods, and other CNN based edge detector cloning templates available in the imaging literature. The results show that the proposed method is more successful than other methods.

A Novel Cloning Template Designing Method by Using an Artificial Bee Colony Algorithm for Edge Detection of CNN Based Imaging Sensors

PubMed Central

Parmaksızoğlu, Selami; Alçı, Mustafa

2011-01-01

Cellular Neural Networks (CNNs) have been widely used recently in applications such as edge detection, noise reduction and object detection, which are among the main computer imaging processes. They can also be realized as hardware based imaging sensors. The fact that hardware CNN models produce robust and effective results has attracted the attention of researchers using these structures within image sensors. Realization of desired CNN behavior such as edge detection can be achieved by correctly setting a cloning template without changing the structure of the CNN. To achieve different behaviors effectively, designing a cloning template is one of the most important research topics in this field. In this study, the edge detecting process that is used as a preliminary process for segmentation, identification and coding applications is conducted by using CNN structures. In order to design the cloning template of goal-oriented CNN architecture, an Artificial Bee Colony (ABC) algorithm which is inspired from the foraging behavior of honeybees is used and the performance analysis of ABC for this application is examined with multiple runs. The CNN template generated by the ABC algorithm is tested by using artificial and real test images. The results are subjectively and quantitatively compared with well-known classical edge detection methods, and other CNN based edge detector cloning templates available in the imaging literature. The results show that the proposed method is more successful than other methods. PMID:22163903

Toward a Model-Based Approach to Flight System Fault Protection

NASA Technical Reports Server (NTRS)

Day, John; Murray, Alex; Meakin, Peter

2012-01-01

Fault Protection (FP) is a distinct and separate systems engineering sub-discipline that is concerned with the off-nominal behavior of a system. Flight system fault protection is an important part of the overall flight system systems engineering effort, with its own products and processes. As with other aspects of systems engineering, the FP domain is highly amenable to expression and management in models. However, while there are standards and guidelines for performing FP related analyses, there are not standards or guidelines for formally relating the FP analyses to each other or to the system hardware and software design. As a result, the material generated for these analyses are effectively creating separate models that are only loosely-related to the system being designed. Development of approaches that enable modeling of FP concerns in the same model as the system hardware and software design enables establishment of formal relationships that has great potential for improving the efficiency, correctness, and verification of the implementation of flight system FP. This paper begins with an overview of the FP domain, and then continues with a presentation of a SysML/UML model of the FP domain and the particular analyses that it contains, by way of showing a potential model-based approach to flight system fault protection, and an exposition of the use of the FP models in FSW engineering. The analyses are small examples, inspired by current real-project examples of FP analyses.

Virtual Reality as Innovative Approach to the Interior Designing

NASA Astrophysics Data System (ADS)

Kaleja, Pavol; Kozlovská, Mária

2017-06-01

We can observe significant potential of information and communication technologies (ICT) in interior designing field, by development of software and hardware virtual reality tools. Using ICT tools offer realistic perception of proposal in its initial idea (the study). A group of real-time visualization, supported by hardware tools like Oculus Rift HTC Vive, provides free walkthrough and movement in virtual interior with the possibility of virtual designing. By improving of ICT software tools for designing in virtual reality we can achieve still more realistic virtual environment. The contribution presented proposal of an innovative approach of interior designing in virtual reality, using the latest software and hardware ICT virtual reality technologies

Conical scan impact study. Volume 1: General central data processing facility. [multispectral band scanner design alternatives for earth resources data

NASA Technical Reports Server (NTRS)

Ebert, D. H.; Eppes, T. A.; Thomas, D. J.

1973-01-01

The impact of a conical scan versus a linear scan multispectral scanner (MSS) instrument was studied in terms of: (1) design modifications required in framing and continuous image recording devices; and (2) changes in configurations of an all-digital precision image processor. A baseline system was defined to provide the framework for comparison, and included pertinent spacecraft parameters, a conical MSS, a linear MSS, an image recording system, and an all-digital precision processor. Lateral offset pointing of the sensors over a range of plus or minus 20 deg was considered. The study addressed the conical scan impact on geometric, radiometric, and aperture correction of MSS data in terms of hardware and software considerations, system complexity, quality of corrections, throughput, and cost of implementation. It was concluded that: (1) if the MSS data are to be only film recorded, then there is only a nomial concial scan impact on the ground data processing system; and (2) if digital data are to be provided to users on computer compatible tapes in rectilinear format, then there is a significant conical scan impact on the ground data processing system.

Door Hardware and Installations; Carpentry: 901894.

ERIC Educational Resources Information Center

Dade County Public Schools, Miami, FL.

The curriculum guide outlines a course designed to provide instruction in the selection, preparation, and installation of hardware for door assemblies. The course is divided into five blocks of instruction (introduction to doors and hardware, door hardware, exterior doors and jambs, interior doors and jambs, and a quinmester post-test) totaling…

The Systems Engineering Process for Human Support Technology Development

NASA Technical Reports Server (NTRS)

Jones, Harry

2005-01-01

Systems engineering is designing and optimizing systems. This paper reviews the systems engineering process and indicates how it can be applied in the development of advanced human support systems. Systems engineering develops the performance requirements, subsystem specifications, and detailed designs needed to construct a desired system. Systems design is difficult, requiring both art and science and balancing human and technical considerations. The essential systems engineering activity is trading off and compromising between competing objectives such as performance and cost, schedule and risk. Systems engineering is not a complete independent process. It usually supports a system development project. This review emphasizes the NASA project management process as described in NASA Procedural Requirement (NPR) 7120.5B. The process is a top down phased approach that includes the most fundamental activities of systems engineering - requirements definition, systems analysis, and design. NPR 7120.5B also requires projects to perform the engineering analyses needed to ensure that the system will operate correctly with regard to reliability, safety, risk, cost, and human factors. We review the system development project process, the standard systems engineering design methodology, and some of the specialized systems analysis techniques. We will discuss how they could apply to advanced human support systems development. The purpose of advanced systems development is not directly to supply human space flight hardware, but rather to provide superior candidate systems that will be selected for implementation by future missions. The most direct application of systems engineering is in guiding the development of prototype and flight experiment hardware. However, anticipatory systems engineering of possible future flight systems would be useful in identifying the most promising development projects.

Performance of the Extravehicular Mobility Unit (EMU) Airlock Coolant Loop Remediation (A/L CLR) Hardware - Final

NASA Technical Reports Server (NTRS)

Steele, John W.; Rector, Tony; Gazda, Daniel; Lewis, John

2011-01-01

An EMU water processing kit (Airlock Coolant Loop Recovery -- A/L CLR) was developed as a corrective action to Extravehicular Mobility Unit (EMU) coolant flow disruptions experienced on the International Space Station (ISS) in May of 2004 and thereafter. A conservative duty cycle and set of use parameters for A/L CLR use and component life were initially developed and implemented based on prior analysis results and analytical modeling. Several initiatives were undertaken to optimize the duty cycle and use parameters of the hardware. Examination of post-flight samples and EMU Coolant Loop hardware provided invaluable information on the performance of the A/L CLR and has allowed for an optimization of the process. The intent of this paper is to detail the evolution of the A/L CLR hardware, efforts to optimize the duty cycle and use parameters, and the final recommendations for implementation in the post-Shuttle retirement era.

Satellite Communication Hardware Emulation System (SCHES)

NASA Technical Reports Server (NTRS)

Kaplan, Ted

1993-01-01

Satellite Communication Hardware Emulator System (SCHES) is a powerful simulator that emulates the hardware used in TDRSS links. SCHES is a true bit-by-bit simulator that models communications hardware accurately enough to be used as a verification mechanism for actual hardware tests on user spacecraft. As a credit to its modular design, SCHES is easily configurable to model any user satellite communication link, though some development may be required to tailor existing software to user specific hardware.

Real-Time Data Processing Onboard Remote Sensor Platforms: Annual Review #3 Data Package

NASA Technical Reports Server (NTRS)

Cook, Sid; Harsanyi, Joe

2003-01-01

The current program status reviewed by this viewgraph presentation includes: 1) New Evaluation Results; 2) Algorithm Improvement Investigations; 3) Electronic Hardware Design; 4) Software Hardware Interface Design.

General, database-driven fast-feedback system for the Stanford Linear Collider

DOE Office of Scientific and Technical Information (OSTI.GOV)

Rouse, F.; Allison, S.; Castillo, S.

A new feedback system has been developed for stabilizing the SLC beams at many locations. The feedback loops are designed to sample and correct at the 60 Hz repetition rate of the accelerator. Each loop can be distributed across several of the standard 80386 microprocessors which control the SLC hardware. A new communications system, KISNet, has been implemented to pass signals between the microprocessors at this rate. The software is written in a general fashion using the state space formalism of digital control theory. This allows a new loop to be implemented by just setting up the online database andmore » perhaps installing a communications link. 3 refs., 4 figs.« less

Single-sensor multispeaker listening with acoustic metamaterials

PubMed Central

Xie, Yangbo; Tsai, Tsung-Han; Konneker, Adam; Popa, Bogdan-Ioan; Brady, David J.; Cummer, Steven A.

2015-01-01

Designing a “cocktail party listener” that functionally mimics the selective perception of a human auditory system has been pursued over the past decades. By exploiting acoustic metamaterials and compressive sensing, we present here a single-sensor listening device that separates simultaneous overlapping sounds from different sources. The device with a compact array of resonant metamaterials is demonstrated to distinguish three overlapping and independent sources with 96.67% correct audio recognition. Segregation of the audio signals is achieved using physical layer encoding without relying on source characteristics. This hardware approach to multichannel source separation can be applied to robust speech recognition and hearing aids and may be extended to other acoustic imaging and sensing applications. PMID:26261314

Model-Based Verification and Validation of Spacecraft Avionics

NASA Technical Reports Server (NTRS)

Khan, M. Omair; Sievers, Michael; Standley, Shaun

2012-01-01

Verification and Validation (V&V) at JPL is traditionally performed on flight or flight-like hardware running flight software. For some time, the complexity of avionics has increased exponentially while the time allocated for system integration and associated V&V testing has remained fixed. There is an increasing need to perform comprehensive system level V&V using modeling and simulation, and to use scarce hardware testing time to validate models; the norm for thermal and structural V&V for some time. Our approach extends model-based V&V to electronics and software through functional and structural models implemented in SysML. We develop component models of electronics and software that are validated by comparison with test results from actual equipment. The models are then simulated enabling a more complete set of test cases than possible on flight hardware. SysML simulations provide access and control of internal nodes that may not be available in physical systems. This is particularly helpful in testing fault protection behaviors when injecting faults is either not possible or potentially damaging to the hardware. We can also model both hardware and software behaviors in SysML, which allows us to simulate hardware and software interactions. With an integrated model and simulation capability we can evaluate the hardware and software interactions and identify problems sooner. The primary missing piece is validating SysML model correctness against hardware; this experiment demonstrated such an approach is possible.

Digital Hardware Design Teaching: An Alternative Approach

ERIC Educational Resources Information Center

Benkrid, Khaled; Clayton, Thomas

2012-01-01

This article presents the design and implementation of a complete review of undergraduate digital hardware design teaching in the School of Engineering at the University of Edinburgh. Four guiding principles have been used in this exercise: learning-outcome driven teaching, deep learning, affordability, and flexibility. This has identified…

Protocol Processing for 100 Gbit/s and Beyond - A Soft Real-Time Approach in Hardware and Software

NASA Astrophysics Data System (ADS)

Büchner, Steffen; Lopacinski, Lukasz; Kraemer, Rolf; Nolte, Jörg

2017-09-01

100 Gbit/s wireless communication protocol processing stresses all parts of a communication system until the outermost. The efficient use of upcoming 100 Gbit/s and beyond transmission technology requires the rethinking of the way protocols are processed by the communication endpoints. This paper summarizes the achievements of the project End2End100. We will present a comprehensive soft real-time stream processing approach that allows the protocol designer to develop, analyze, and plan scalable protocols for ultra high data rates of 100 Gbit/s and beyond. Furthermore, we will present an ultra-low power, adaptable, and massively parallelized FEC (Forward Error Correction) scheme that detects and corrects bit errors at line rate with an energy consumption between 1 pJ/bit and 13 pJ/bit. The evaluation results discussed in this publication show that our comprehensive approach allows end-to-end communication with a very low protocol processing overhead.

A fully automated and scalable timing probe-based method for time alignment of the LabPET II scanners

NASA Astrophysics Data System (ADS)

Samson, Arnaud; Thibaudeau, Christian; Bouchard, Jonathan; Gaudin, Émilie; Paulin, Caroline; Lecomte, Roger; Fontaine, Réjean

2018-05-01

A fully automated time alignment method based on a positron timing probe was developed to correct the channel-to-channel coincidence time dispersion of the LabPET II avalanche photodiode-based positron emission tomography (PET) scanners. The timing probe was designed to directly detect positrons and generate an absolute time reference. The probe-to-channel coincidences are recorded and processed using firmware embedded in the scanner hardware to compute the time differences between detector channels. The time corrections are then applied in real-time to each event in every channel during PET data acquisition to align all coincidence time spectra, thus enhancing the scanner time resolution. When applied to the mouse version of the LabPET II scanner, the calibration of 6 144 channels was performed in less than 15 min and showed a 47% improvement on the overall time resolution of the scanner, decreasing from 7 ns to 3.7 ns full width at half maximum (FWHM).

Detection and classification of human body odor using an electronic nose.

PubMed

Wongchoosuk, Chatchawal; Lutz, Mario; Kerdcharoen, Teerakiat

2009-01-01

An electronic nose (E-nose) has been designed and equipped with software that can detect and classify human armpit body odor. An array of metal oxide sensors was used for detecting volatile organic compounds. The measurement circuit employs a voltage divider resistor to measure the sensitivity of each sensor. This E-nose was controlled by in-house developed software through a portable USB data acquisition card with a principle component analysis (PCA) algorithm implemented for pattern recognition and classification. Because gas sensor sensitivity in the detection of armpit odor samples is affected by humidity, we propose a new method and algorithms combining hardware/software for the correction of the humidity noise. After the humidity correction, the E-nose showed the capability of detecting human body odor and distinguishing the body odors from two persons in a relative manner. The E-nose is still able to recognize people, even after application of deodorant. In conclusion, this is the first report of the application of an E-nose for armpit odor recognition.

Detection and Classification of Human Body Odor Using an Electronic Nose

PubMed Central

Wongchoosuk, Chatchawal; Lutz, Mario; Kerdcharoen, Teerakiat

2009-01-01

An electronic nose (E-nose) has been designed and equipped with software that can detect and classify human armpit body odor. An array of metal oxide sensors was used for detecting volatile organic compounds. The measurement circuit employs a voltage divider resistor to measure the sensitivity of each sensor. This E-nose was controlled by in-house developed software through a portable USB data acquisition card with a principle component analysis (PCA) algorithm implemented for pattern recognition and classification. Because gas sensor sensitivity in the detection of armpit odor samples is affected by humidity, we propose a new method and algorithms combining hardware/software for the correction of the humidity noise. After the humidity correction, the E-nose showed the capability of detecting human body odor and distinguishing the body odors from two persons in a relative manner. The E-nose is still able to recognize people, even after application of deodorant. In conclusion, this is the first report of the application of an E-nose for armpit odor recognition. PMID:22399995

A pipelined architecture for real time correction of non-uniformity in infrared focal plane arrays imaging system using multiprocessors

NASA Astrophysics Data System (ADS)

Zou, Liang; Fu, Zhuang; Zhao, YanZheng; Yang, JunYan

2010-07-01

This paper proposes a kind of pipelined electric circuit architecture implemented in FPGA, a very large scale integrated circuit (VLSI), which efficiently deals with the real time non-uniformity correction (NUC) algorithm for infrared focal plane arrays (IRFPA). Dual Nios II soft-core processors and a DSP with a 64+ core together constitute this image system. Each processor undertakes own systematic task, coordinating its work with each other's. The system on programmable chip (SOPC) in FPGA works steadily under the global clock frequency of 96Mhz. Adequate time allowance makes FPGA perform NUC image pre-processing algorithm with ease, which has offered favorable guarantee for the work of post image processing in DSP. And at the meantime, this paper presents a hardware (HW) and software (SW) co-design in FPGA. Thus, this systematic architecture yields an image processing system with multiprocessor, and a smart solution to the satisfaction with the performance of the system.

Fifty Years of Observing Hardware and Human Behavior

NASA Technical Reports Server (NTRS)

McMann, Joe

2011-01-01

During this half-day workshop, Joe McMann presented the lessons learned during his 50 years of experience in both industry and government, which included all U.S. manned space programs, from Mercury to the ISS. He shared his thoughts about hardware and people and what he has learned from first-hand experience. Included were such topics as design, testing, design changes, development, failures, crew expectations, hardware, requirements, and meetings.

A Framework for an Automated Compilation System for Reconfigurable Architectures

DTIC Science & Technology

1997-03-01

HDLs, Hardware C requires the designer to be thoroughly familiar with digital hardware design. 48 Vahid, Gong, and Gajski focus on the partitioning...of hardware used. Vahid, Gong, and Gajski suggest that the greedy approach used by Gupta and De Micheli is easily trapped in local minimums [46:216...iterative algorithm. To overcome this limitation, the Vahid, Gong, and Gajski suggest a binary constraint partitioning approach. The partitioning

Environmental qualification testing of payload G-534, the Pool Boiling Experiment

NASA Technical Reports Server (NTRS)

Sexton, J. Andrew

1992-01-01

Payload G-534, the prototype Pool Boiling Experiment (PBE), is scheduled to fly on the STS-47 mission in September 1992. This paper describes the purpose of the experiment and the environmental qualification testing program that was used to prove the integrity of the hardware. Component and box level vibration and thermal cycling tests were performed to give an early level of confidence in the hardware designs. At the system level, vibration, thermal extreme soaks, and thermal vacuum cycling tests were performed to qualify the complete design for the expected shuttle environment. The system level vibration testing included three axis sine sweeps and random inputs. The system level hot and cold soak tests demonstrated the hardware's capability to operate over a wide range of temperatures and gave wider latitude in determining which shuttle thermal attitudes were compatible with the experiment. The system level thermal vacuum cycling tests demonstrated the hardware's capability to operate in a convection free environment. A unique environmental chamber was designed and fabricated by the PBE team and allowed most of the environmental testing to be performed within the hardware build laboratory. The completion of the test program gave the project team high confidence in the hardware's ability to function as designed during flight.

Nonuniformity correction algorithm with efficient pixel offset estimation for infrared focal plane arrays.

PubMed

Orżanowski, Tomasz

2016-01-01

This paper presents an infrared focal plane array (IRFPA) response nonuniformity correction (NUC) algorithm which is easy to implement by hardware. The proposed NUC algorithm is based on the linear correction scheme with the useful method of pixel offset correction coefficients update. The new approach to IRFPA response nonuniformity correction consists in the use of pixel response change determined at the actual operating conditions in relation to the reference ones by means of shutter to compensate a pixel offset temporal drift. Moreover, it permits to remove any optics shading effect in the output image as well. To show efficiency of the proposed NUC algorithm some test results for microbolometer IRFPA are presented.

Design Report for Low Power Acoustic Detector

DTIC Science & Technology

2013-08-01

high speed integrated circuit (VHSIC) hardware description language ( VHDL ) implementation of both the HED and DCD detectors. Figures 4 and 5 show the...the hardware design, target detection algorithm design in both MATLAB and VHDL , and typical performance results. 15. SUBJECT TERMS Acoustic low...5 2.4 Algorithm Implementation ..............................................................................................6 3. Testing

Design considerations for space flight hardware

NASA Technical Reports Server (NTRS)

Glover, Daniel

1990-01-01

The environmental and design constraints are reviewed along with some insight into the established design and quality assurance practices that apply to low earth orbit (LEO) space flight hardware. It is intended as an introduction for people unfamiliar with space flight considerations. Some basic data and a bibliography are included.

75 FR 61345 - Airworthiness Directives; Eclipse Aerospace, Inc. Model EA500 Airplanes

Federal Register 2010, 2011, 2012, 2013, 2014

2010-10-05

... faulty integration of hardware and software, which could result in unannunciated, uncommanded changes in..., altitude preselect, and/or transponder codes. We are issuing this AD to correct faulty integration of...

Computational adaptive optics for broadband interferometric tomography of tissues and cells

NASA Astrophysics Data System (ADS)

Adie, Steven G.; Mulligan, Jeffrey A.

2016-03-01

Adaptive optics (AO) can shape aberrated optical wavefronts to physically restore the constructive interference needed for high-resolution imaging. With access to the complex optical field, however, many functions of optical hardware can be achieved computationally, including focusing and the compensation of optical aberrations to restore the constructive interference required for diffraction-limited imaging performance. Holography, which employs interferometric detection of the complex optical field, was developed based on this connection between hardware and computational image formation, although this link has only recently been exploited for 3D tomographic imaging in scattering biological tissues. This talk will present the underlying imaging science behind computational image formation with optical coherence tomography (OCT) -- a beam-scanned version of broadband digital holography. Analogous to hardware AO (HAO), we demonstrate computational adaptive optics (CAO) and optimization of the computed pupil correction in 'sensorless mode' (Zernike polynomial corrections with feedback from image metrics) or with the use of 'guide-stars' in the sample. We discuss the concept of an 'isotomic volume' as the volumetric extension of the 'isoplanatic patch' introduced in astronomical AO. Recent CAO results and ongoing work is highlighted to point to the potential biomedical impact of computed broadband interferometric tomography. We also discuss the advantages and disadvantages of HAO vs. CAO for the effective shaping of optical wavefronts, and highlight opportunities for hybrid approaches that synergistically combine the unique advantages of hardware and computational methods for rapid volumetric tomography with cellular resolution.

Low-Cost Telemetry System for Small/Micro Satellites

NASA Technical Reports Server (NTRS)

Sims, William; Varnavas, Kosta

2012-01-01

A Software Defined Radio (SDR) concept uses a minimum amount of analog/radio frequency components to up/downconvert the RF signal to/from a digital format. Once in the digital domain, all other processing (filtering, modulation, demodulation, etc.) is done in software. The project will leverage existing designs and enhance capabilities in the commercial sector to provide a path to a radiation-hardened SDR transponder. The SDR transponder would incorporate baseline technologies dealing with improved Forward Error Correcting (FEC) codes to be deployed to all Near Earth Network (NEN) ground stations. By incorporating this FEC, at least a tenfold increase in data throughput can be achieved. A family of transponder products can be implemented using common platform architecture, allowing new products to be more quickly introduced into the market. Software can be reused across products, reducing software/hardware costs dramatically. New features and capabilities, such as encoding and decoding algorithms, filters, and bit synchronizers, can be added to the existing infrastructure without requiring major new capital expenditures, allowing implementation of advanced features in the communication systems. As new telecommunication technologies emerge, incorporating them into the SDR fabric will be easily accomplished with little or no requirements for new hardware. There are no preferred flight platforms for the SDR technology, so it can be used on any type of orbital or sub-orbital platform, all within a fully radiation hardened design.

Without Gravity: Designing Science Equipment for the International Space Station and Beyond

NASA Technical Reports Server (NTRS)

Sato, Kevin Y.

2016-01-01

This presentation discusses space biology research, the space flight factors needed to design hardware to conduct biological science in microgravity, and examples of NASA and commercial hardware that enable space biology study.

A haptic interface for virtual simulation of endoscopic surgery.

PubMed

Rosenberg, L B; Stredney, D

1996-01-01

Virtual reality can be described as a convincingly realistic and naturally interactive simulation in which the user is given a first person illusion of being immersed within a computer generated environment While virtual reality systems offer great potential to reduce the cost and increase the quality of medical training, many technical challenges must be overcome before such simulation platforms offer effective alternatives to more traditional training means. A primary challenge in developing effective virtual reality systems is designing the human interface hardware which allows rich sensory information to be presented to users in natural ways. When simulating a given manual procedure, task specific human interface requirements dictate task specific human interface hardware. The following paper explores the design of human interface hardware that satisfies the task specific requirements of virtual reality simulation of Endoscopic surgical procedures. Design parameters were derived through direct cadaver studies and interviews with surgeons. Final hardware design is presented.

Extravehicular Activity training and hardware design considerations

NASA Technical Reports Server (NTRS)

Thuot, Pierre J.; Harbaugh, Gregory J.

1993-01-01

Designing hardware that can be successfully operated by EVA astronauts for EVA tasks required to assemble and maintain Space Station Freedom requires a thorough understanding of human factors and of the capabilities and limitations of the space-suited astronaut, as well as of the effect of microgravity environment on the crew member's capabilities and on the overhead associated with EVA. This paper describes various training methods and facilities that are being designed for training EVA astronauts for Space Station assembly and maintenance, taking into account the above discussed factors. Particular attention is given to the user-friendly hardware design for EVA and to recent EVA flight experience.

Comparative Modal Analysis of Sieve Hardware Designs

NASA Technical Reports Server (NTRS)

Thompson, Nathaniel

2012-01-01

The CMTB Thwacker hardware operates as a testbed analogue for the Flight Thwacker and Sieve components of CHIMRA, a device on the Curiosity Rover. The sieve separates particles with a diameter smaller than 150 microns for delivery to onboard science instruments. The sieving behavior of the testbed hardware should be similar to the Flight hardware for the results to be meaningful. The elastodynamic behavior of both sieves was studied analytically using the Rayleigh Ritz method in conjunction with classical plate theory. Finite element models were used to determine the mode shapes of both designs, and comparisons between the natural frequencies and mode shapes were made. The analysis predicts that the performance of the CMTB Thwacker will closely resemble the performance of the Flight Thwacker within the expected steady state operating regime. Excitations of the testbed hardware that will mimic the flight hardware were recommended, as were those that will improve the efficiency of the sieving process.

Space Shuttle Star Tracker Challenges

NASA Technical Reports Server (NTRS)

Herrera, Linda M.

2010-01-01

The space shuttle fleet of avionics was originally designed in the 1970's. Many of the subsystems have been upgraded and replaced, however some original hardware continues to fly. Not only fly, but has proven to be the best design available to perform its designated task. The shuttle star tracker system is currently flying as a mixture of old and new designs, each with a unique purpose to fill for the mission. Orbiter missions have tackled many varied missions in space over the years. As the orbiters began flying to the International Space Station (ISS), new challenges were discovered and overcome as new trusses and modules were added. For the star tracker subsystem, the growing ISS posed an unusual problem, bright light. With two star trackers on board, the 1970's vintage image dissector tube (IDT) star trackers track the ISS, while the new solid state design is used for dim star tracking. This presentation focuses on the challenges and solutions used to ensure star trackers can complete the shuttle missions successfully. Topics include KSC team and industry partner methods used to correct pressurized case failures and track system performance.

A Stream lined Approach for the Payload Customer in Identifying Payload Design Requirements

NASA Technical Reports Server (NTRS)

Miller, Ladonna J.; Schneider, Walter F.; Johnson, Dexer E.; Roe, Lesa B.

2001-01-01

NASA payload developers from across various disciplines were asked to identify areas where process changes would simplify their task of developing and flying flight hardware. Responses to this query included a central location for consistent hardware design requirements for middeck payloads. The multidisciplinary team assigned to review the numerous payload interface design documents is assessing the Space Shuttle middeck, the SPACEHAB Inc. locker, as well as the MultiPurpose Logistics Module (MPLM) and EXpedite the PRocessing of Experiments to Space Station (EXPRESS) rack design requirements for the payloads. They are comparing the multiple carriers and platform requirements and developing a matrix which illustrates the individual requirements, and where possible, the envelope that encompasses all of the possibilities. The matrix will be expanded to form an overall envelope that the payload developers will have the option to utilize when designing their payload's hardware. This will optimize the flexibility for payload hardware and ancillary items to be manifested on multiple carriers and platforms with minimal impact to the payload developer.

Modular hardware synthesis using an HDL. [Hardware Description Language

NASA Technical Reports Server (NTRS)

Covington, J. A.; Shiva, S. G.

1981-01-01

Although hardware description languages (HDL) are becoming more and more necessary to automated design systems, their application is complicated due to the difficulty in translating the HDL description into an implementable format, nonfamiliarity of hardware designers with high-level language programming, nonuniform design methodologies and the time and costs involved in transfering HDL design software. Digital design language (DDL) suffers from all of the above problems and in addition can only by synthesized on a complete system and not on its subparts, making it unsuitable for synthesis using standard modules or prefabricated chips such as those required in LSI or VLSI circuits. The present paper presents a method by which the DDL translator can be made to generate modular equations that will allow the system to be synthesized as an interconnection of lower-level modules. The method involves the introduction of a new language construct called a Module which provides for the separate translation of all equations bounded by it.

Towards improved hardware component attenuation correction in PET/MR hybrid imaging

NASA Astrophysics Data System (ADS)

Paulus, D. H.; Tellmann, L.; Quick, H. H.

2013-11-01

In positron emission tomography/computed tomography (PET/CT) hybrid imaging attenuation correction (AC) of the patient tissue and patient table is performed by converting the CT-based Hounsfield units (HU) to linear attenuation coefficients (LAC) of PET. When applied to the new field of hardware component AC in PET/magnetic resonance (MR) hybrid imaging, this conversion method may result in local overcorrection of PET activity values. The aim of this study thus was to optimize the conversion parameters for CT-based AC of hardware components in PET/MR. Systematic evaluation and optimization of the HU to LAC conversion parameters has been performed for the hardware component attenuation map (µ-map) of a flexible radiofrequency (RF) coil used in PET/MR imaging. Furthermore, spatial misregistration of this RF coil to its µ-map was simulated by shifting the µ-map in different directions and the effect on PET quantification was evaluated. Measurements of a PET NEMA standard emission phantom were performed on an integrated hybrid PET/MR system. Various CT parameters were used to calculate different µ-maps for the flexible RF coil and to evaluate the impact on the PET activity concentration. A 511 keV transmission scan of the local RF coil was used as standard of reference to adapt the slope of the conversion from HUs to LACs at 511 keV. The average underestimation of the PET activity concentration due to the non-attenuation corrected RF coil in place was calculated to be 5.0% in the overall phantom. When considering attenuation only in the upper volume of the phantom, the average difference to the reference scan without RF coil is 11.0%. When the PET/CT conversion is applied, an average overestimation of 3.1% (without extended CT scale) and 4.2% (with extended CT scale) is observed in the top volume of the NEMA phantom. Using the adapted conversion resulting from this study, the deviation in the top volume of the phantom is reduced to -0.5% and shows the lowest standard deviation inside the phantom in comparison to all other conversions. Simulation of a µ-map misregistration shows acceptable results for shifts below 5 mm for the flexible surface RF coil. The adapted conversion from HUs to LAC at 511 keV within this study can improve hardware component AC in PET/MR hybrid imaging as shown for a flexible RF surface coil. Furthermore, these results have a direct impact on the improvement of the hardware component AC of the examined flexible RF coil in conjunction with position determination.

Representation and matching of knowledge to design digital systems

NASA Technical Reports Server (NTRS)

Jones, J. U.; Shiva, S. G.

1988-01-01

A knowledge-based expert system is described that provides an approach to solve a problem requiring an expert with considerable domain expertise and facts about available digital hardware building blocks. To design digital hardware systems from their high level VHDL (Very High Speed Integrated Circuit Hardware Description Language) representation to their finished form, a special data representation is required. This data representation as well as the functioning of the overall system is described.

ALMA Correlator Real-Time Data Processor

NASA Astrophysics Data System (ADS)

Pisano, J.; Amestica, R.; Perez, J.

2005-10-01

The design of a real-time Linux application utilizing Real-Time Application Interface (RTAI) to process real-time data from the radio astronomy correlator for the Atacama Large Millimeter Array (ALMA) is described. The correlator is a custom-built digital signal processor which computes the cross-correlation function of two digitized signal streams. ALMA will have 64 antennas with 2080 signal streams each with a sample rate of 4 giga-samples per second. The correlator's aggregate data output will be 1 gigabyte per second. The software is defined by hard deadlines with high input and processing data rates, while requiring interfaces to non real-time external computers. The designed computer system - the Correlator Data Processor or CDP, consists of a cluster of 17 SMP computers, 16 of which are compute nodes plus a master controller node all running real-time Linux kernels. Each compute node uses an RTAI kernel module to interface to a 32-bit parallel interface which accepts raw data at 64 megabytes per second in 1 megabyte chunks every 16 milliseconds. These data are transferred to tasks running on multiple CPUs in hard real-time using RTAI's LXRT facility to perform quantization corrections, data windowing, FFTs, and phase corrections for a processing rate of approximately 1 GFLOPS. Highly accurate timing signals are distributed to all seventeen computer nodes in order to synchronize them to other time-dependent devices in the observatory array. RTAI kernel tasks interface to the timing signals providing sub-millisecond timing resolution. The CDP interfaces, via the master node, to other computer systems on an external intra-net for command and control, data storage, and further data (image) processing. The master node accesses these external systems utilizing ALMA Common Software (ACS), a CORBA-based client-server software infrastructure providing logging, monitoring, data delivery, and intra-computer function invocation. The software is being developed in tandem with the correlator hardware which presents software engineering challenges as the hardware evolves. The current status of this project and future goals are also presented.

Water Processor and Oxygen Generation Assembly

NASA Technical Reports Server (NTRS)

Bedard, John

1997-01-01

This report documents the results of the tasks which initiated efforts on design issues relating to the Water Processor (WP) and the Oxygen Generation Assembly (OGA) Flight Hardware for the International Space Station. This report fulfills the Statement of Work deliverables requirement for contract H-29387D. The following lists the tasks required by contract H-29387D: (1) HSSSI shall coordinate a detailed review of WP/OGA Flight Hardware program requirements with personnel from MSFC to identify requirements that can be eliminated without affecting the technical integrity of the WP/OGA Hardware; (2) HSSSI shall conduct the technical interchanges with personnel from MSFC to resolve design issues related to WP/OGA Flight Hardware; (3) HSSSI will initiate discussions with Zellwegger Analytics, Inc. to address design issues related to WP and PCWQM interfaces.

Applying reconfigurable hardware to the analysis of multispectral and hyperspectral imagery

NASA Astrophysics Data System (ADS)

Leeser, Miriam E.; Belanovic, Pavle; Estlick, Michael; Gokhale, Maya; Szymanski, John J.; Theiler, James P.

2002-01-01

Unsupervised clustering is a powerful technique for processing multispectral and hyperspectral images. Last year, we reported on an implementation of k-means clustering for multispectral images. Our implementation in reconfigurable hardware processed 10 channel multispectral images two orders of magnitude faster than a software implementation of the same algorithm. The advantage of using reconfigurable hardware to accelerate k-means clustering is clear; the disadvantage is the hardware implementation worked for one specific dataset. It is a non-trivial task to change this implementation to handle a dataset with different number of spectral channels, bits per spectral channel, or number of pixels; or to change the number of clusters. These changes required knowledge of the hardware design process and could take several days of a designer's time. Since multispectral data sets come in many shapes and sizes, being able to easily change the k-means implementation for these different data sets is important. For this reason, we have developed a parameterized implementation of the k-means algorithm. Our design is parameterized by the number of pixels in an image, the number of channels per pixel, and the number of bits per channel as well as the number of clusters. These parameters can easily be changed in a few minutes by someone not familiar with the design process. The resulting implementation is very close in performance to the original hardware implementation. It has the added advantage that the parameterized design compiles approximately three times faster than the original.

FEC combined burst-modem for business satellite communications use

NASA Astrophysics Data System (ADS)

Murakami, K.; Miyake, M.; Fuji, T.; Moritani, Y.; Fujino, T.

The authors recently developed two types of FEC (forward error correction) combined modems both applicable to low-data-rate and intermediate-data-rate TDMA international satellite communications. Each FEC combined modem consists of a QPSK (quadrature phase-shift keyed) modem, a convolutional encoder, and a Viterbi decoder. Both modems are designed taking into consideration the fast acquisition of the carrier and bit timing and the low cycle slipping rate in the low-carrier-to-noise-ratio environment. Attention is paid to designing the Viterbi decoder to be operated in a situation in which successive bursts may have different coding rates according to the punctured coding scheme. The overall scheme of the FEC combined modems are presented, and some of the key technologies applied in developing them are outlined. The hardware implementation and experimentation are also discussed. The measured data are compared with results of theoretical analysis, and relatively good performances are obtained.

Automated Methodologies for the Design of Flow Diagrams for Development and Maintenance Activities

NASA Astrophysics Data System (ADS)

Shivanand M., Handigund; Shweta, Bhat

The Software Requirements Specification (SRS) of the organization is a text document prepared by strategic management incorporating the requirements of the organization. These requirements of ongoing business/ project development process involve the software tools, the hardware devices, the manual procedures, the application programs and the communication commands. These components are appropriately ordered for achieving the mission of the concerned process both in the project development and the ongoing business processes, in different flow diagrams viz. activity chart, workflow diagram, activity diagram, component diagram and deployment diagram. This paper proposes two generic, automatic methodologies for the design of various flow diagrams of (i) project development activities, (ii) ongoing business process. The methodologies also resolve the ensuing deadlocks in the flow diagrams and determine the critical paths for the activity chart. Though both methodologies are independent, each complements other in authenticating its correctness and completeness.

Reusable Rocket Engine Operability Modeling and Analysis

NASA Technical Reports Server (NTRS)

Christenson, R. L.; Komar, D. R.

1998-01-01

This paper describes the methodology, model, input data, and analysis results of a reusable launch vehicle engine operability study conducted with the goal of supporting design from an operations perspective. Paralleling performance analyses in schedule and method, this requires the use of metrics in a validated operations model useful for design, sensitivity, and trade studies. Operations analysis in this view is one of several design functions. An operations concept was developed given an engine concept and the predicted operations and maintenance processes incorporated into simulation models. Historical operations data at a level of detail suitable to model objectives were collected, analyzed, and formatted for use with the models, the simulations were run, and results collected and presented. The input data used included scheduled and unscheduled timeline and resource information collected into a Space Transportation System (STS) Space Shuttle Main Engine (SSME) historical launch operations database. Results reflect upon the importance not only of reliable hardware but upon operations and corrective maintenance process improvements.

HARMONI instrument control electronics

NASA Astrophysics Data System (ADS)

Gigante, José V.; Rodríguez Ramos, Luis F.; Zins, Gerard; Schnetler, Hermine; Pecontal, Arlette; Herreros, José Miguel; Clarke, Fraser; Bryson, Ian; Thatte, Niranjan

2014-07-01

HARMONI is an integral field spectrograph working at visible and near-infrared wavelengths over a range of spatial scales from ground layer corrected to fully diffraction-limited. The instrument has been chosen to be part of the first-light complement at the European Extremely Large Telescope (E-ELT). This paper describes the instrument control electronics to be developed at IAC. The large size of the HARMONI instrument, its cryogenic operation, and the fact that it must operate with enhanced reliability is a challenge from the point of view of the control electronics design. The present paper describes a design proposal based on the current instrument requirements and intended to be fully compliant with the ESO E-ELT standards, as well as with the European EMC and safety standards. The modularity of the design and the use of COTS standard hardware will benefit the project in several aspects, as reduced costs, shorter schedule by the use of commercially available components, and improved quality by the use of well proven solutions.

Computer-aided design and computer science technology

NASA Technical Reports Server (NTRS)

Fulton, R. E.; Voigt, S. J.

1976-01-01

A description is presented of computer-aided design requirements and the resulting computer science advances needed to support aerospace design. The aerospace design environment is examined, taking into account problems of data handling and aspects of computer hardware and software. The interactive terminal is normally the primary interface between the computer system and the engineering designer. Attention is given to user aids, interactive design, interactive computations, the characteristics of design information, data management requirements, hardware advancements, and computer science developments.

Design guidelines for robotically serviceable hardware

NASA Technical Reports Server (NTRS)

Gordon, Scott A.

1988-01-01

Research being conducted at the Goddard Space Flight Center into the development of guidelines for the design of robotically serviceable spaceflight hardware is described. A mock-up was built based on an existing spaceflight system demonstrating how these guidelines can be applied to actual hardware. The report examines the basic servicing philosophy being studied and how this philosophy is reflected in the formulation of design guidelines for robotic servicing. A description of the mock-up is presented with emphasis on the design features that make it robot friendly. Three robotic servicing schemes fulfilling the design guidelines were developed for the mock-up. These servicing schemes are examined as to how their implementation was affected by the constraints of the spacecraft system on which the mock-up is based.

Vestibular Function Research (VFR) experiment. Phase B: Design definition study

NASA Technical Reports Server (NTRS)

1978-01-01

The Vestibular Functions Research (VFR) Experiment was established to investigate the neurosensory and related physiological processes believed to be associated with the space flight nausea syndrome and to develop logical means for its prediction, prevention and treatment. The VFR Project consists of ground and spaceflight experimentation using frogs as specimens. The phase B Preliminary Design Study provided for the preliminary design of the experiment hardware, preparation of performance and hardware specification and a Phase C/D development plan, establishment of STS (Space Transportation System) interfaces and mission operations, and the study of a variety of hardware, experiment and mission options. The study consist of three major tasks: (1) mission mode trade-off; (2) conceptual design; and (3) preliminary design.

Resilience Design Patterns - A Structured Approach to Resilience at Extreme Scale (version 1.0)

DOE Office of Scientific and Technical Information (OSTI.GOV)

Hukerikar, Saurabh; Engelmann, Christian

Reliability is a serious concern for future extreme-scale high-performance computing (HPC) systems. Projections based on the current generation of HPC systems and technology roadmaps suggest that very high fault rates in future systems. The errors resulting from these faults will propagate and generate various kinds of failures, which may result in outcomes ranging from result corruptions to catastrophic application crashes. Practical limits on power consumption in HPC systems will require future systems to embrace innovative architectures, increasing the levels of hardware and software complexities. The resilience challenge for extreme-scale HPC systems requires management of various hardware and software technologies thatmore » are capable of handling a broad set of fault models at accelerated fault rates. These techniques must seek to improve resilience at reasonable overheads to power consumption and performance. While the HPC community has developed various solutions, application-level as well as system-based solutions, the solution space of HPC resilience techniques remains fragmented. There are no formal methods and metrics to investigate and evaluate resilience holistically in HPC systems that consider impact scope, handling coverage, and performance & power eciency across the system stack. Additionally, few of the current approaches are portable to newer architectures and software ecosystems, which are expected to be deployed on future systems. In this document, we develop a structured approach to the management of HPC resilience based on the concept of resilience-based design patterns. A design pattern is a general repeatable solution to a commonly occurring problem. We identify the commonly occurring problems and solutions used to deal with faults, errors and failures in HPC systems. The catalog of resilience design patterns provides designers with reusable design elements. We define a design framework that enhances our understanding of the important constraints and opportunities for solutions deployed at various layers of the system stack. The framework may be used to establish mechanisms and interfaces to coordinate flexible fault management across hardware and software components. The framework also enables optimization of the cost-benefit trade-os among performance, resilience, and power consumption. The overall goal of this work is to enable a systematic methodology for the design and evaluation of resilience technologies in extreme-scale HPC systems that keep scientific applications running to a correct solution in a timely and cost-ecient manner in spite of frequent faults, errors, and failures of various types.« less

Mitigating Communication Delays in Remotely Connected Hardware-in-the-loop Experiments

DOE Office of Scientific and Technical Information (OSTI.GOV)

Cale, James; Johnson, Brian; Dall'Anese, Emiliano

Here, this paper introduces a potential approach for mitigating the effects of communication delays between multiple, closed-loop hardware-in-the-loop experiments which are virtually connected, yet physically separated. The method consists of an analytical method for the compensation of communication delays, along with the supporting computational and communication infrastructure. The control design leverages tools for the design of observers for the compensation of measurement errors in systems with time-varying delays. The proposed methodology is validated through computer simulation and hardware experimentation connecting hardware-in-the-loop experiments conducted between laboratories separated by a distance of over 100 km.

Mitigating Communication Delays in Remotely Connected Hardware-in-the-loop Experiments

DOE PAGES

Cale, James; Johnson, Brian; Dall'Anese, Emiliano; ...

2018-03-30

Here, this paper introduces a potential approach for mitigating the effects of communication delays between multiple, closed-loop hardware-in-the-loop experiments which are virtually connected, yet physically separated. The method consists of an analytical method for the compensation of communication delays, along with the supporting computational and communication infrastructure. The control design leverages tools for the design of observers for the compensation of measurement errors in systems with time-varying delays. The proposed methodology is validated through computer simulation and hardware experimentation connecting hardware-in-the-loop experiments conducted between laboratories separated by a distance of over 100 km.

Applying a Genetic Algorithm to Reconfigurable Hardware

NASA Technical Reports Server (NTRS)

Wells, B. Earl; Weir, John; Trevino, Luis; Patrick, Clint; Steincamp, Jim

2004-01-01

This paper investigates the feasibility of applying genetic algorithms to solve optimization problems that are implemented entirely in reconfgurable hardware. The paper highlights the pe$ormance/design space trade-offs that must be understood to effectively implement a standard genetic algorithm within a modem Field Programmable Gate Array, FPGA, reconfgurable hardware environment and presents a case-study where this stochastic search technique is applied to standard test-case problems taken from the technical literature. In this research, the targeted FPGA-based platform and high-level design environment was the Starbridge Hypercomputing platform, which incorporates multiple Xilinx Virtex II FPGAs, and the Viva TM graphical hardware description language.

Dedicated hardware processor and corresponding system-on-chip design for real-time laser speckle imaging.

PubMed

Jiang, Chao; Zhang, Hongyan; Wang, Jia; Wang, Yaru; He, Heng; Liu, Rui; Zhou, Fangyuan; Deng, Jialiang; Li, Pengcheng; Luo, Qingming

2011-11-01

Laser speckle imaging (LSI) is a noninvasive and full-field optical imaging technique which produces two-dimensional blood flow maps of tissues from the raw laser speckle images captured by a CCD camera without scanning. We present a hardware-friendly algorithm for the real-time processing of laser speckle imaging. The algorithm is developed and optimized specifically for LSI processing in the field programmable gate array (FPGA). Based on this algorithm, we designed a dedicated hardware processor for real-time LSI in FPGA. The pipeline processing scheme and parallel computing architecture are introduced into the design of this LSI hardware processor. When the LSI hardware processor is implemented in the FPGA running at the maximum frequency of 130 MHz, up to 85 raw images with the resolution of 640×480 pixels can be processed per second. Meanwhile, we also present a system on chip (SOC) solution for LSI processing by integrating the CCD controller, memory controller, LSI hardware processor, and LCD display controller into a single FPGA chip. This SOC solution also can be used to produce an application specific integrated circuit for LSI processing.

Using Modern Design Tools for Digital Avionics Development

NASA Technical Reports Server (NTRS)

Hyde, David W.; Lakin, David R., II; Asquith, Thomas E.

2000-01-01

Using Modem Design Tools for Digital Avionics Development Shrinking development time and increased complexity of new avionics forces the designer to use modem tools and methods during hardware development. Engineers at the Marshall Space Flight Center have successfully upgraded their design flow and used it to develop a Mongoose V based radiation tolerant processor board for the International Space Station's Water Recovery System. The design flow, based on hardware description languages, simulation, synthesis, hardware models, and full functional software model libraries, allowed designers to fully simulate the processor board from reset, through initialization before any boards were built. The fidelity of a digital simulation is limited to the accuracy of the models used and how realistically the designer drives the circuit's inputs during simulation. By using the actual silicon during simulation, device modeling errors are reduced. Numerous design flaws were discovered early in the design phase when they could be easily fixed. The use of hardware models and actual MIPS software loaded into full functional memory models also provided checkout of the software development environment. This paper will describe the design flow used to develop the processor board and give examples of errors that were found using the tools. An overview of the processor board firmware will also be covered.

CD-ROM Hardware Configurations: Selection and Design.

ERIC Educational Resources Information Center

Jaffe, Lee David; Watkins, Steven G.

1992-01-01

Presents selection and design considerations to help libraries make informed decisions about hardware configurations of CD-ROM systems. Highlights include CD-ROM configurations, including single drive workstations, daisychains, and jukeboxes; network configurations, including remote access; microcomputer features; CD-ROM drive selection; and…

Proceedings of the First NASA Formal Methods Symposium

NASA Technical Reports Server (NTRS)

Denney, Ewen (Editor); Giannakopoulou, Dimitra (Editor); Pasareanu, Corina S. (Editor)

2009-01-01

Topics covered include: Model Checking - My 27-Year Quest to Overcome the State Explosion Problem; Applying Formal Methods to NASA Projects: Transition from Research to Practice; TLA+: Whence, Wherefore, and Whither; Formal Methods Applications in Air Transportation; Theorem Proving in Intel Hardware Design; Building a Formal Model of a Human-Interactive System: Insights into the Integration of Formal Methods and Human Factors Engineering; Model Checking for Autonomic Systems Specified with ASSL; A Game-Theoretic Approach to Branching Time Abstract-Check-Refine Process; Software Model Checking Without Source Code; Generalized Abstract Symbolic Summaries; A Comparative Study of Randomized Constraint Solvers for Random-Symbolic Testing; Component-Oriented Behavior Extraction for Autonomic System Design; Automated Verification of Design Patterns with LePUS3; A Module Language for Typing by Contracts; From Goal-Oriented Requirements to Event-B Specifications; Introduction of Virtualization Technology to Multi-Process Model Checking; Comparing Techniques for Certified Static Analysis; Towards a Framework for Generating Tests to Satisfy Complex Code Coverage in Java Pathfinder; jFuzz: A Concolic Whitebox Fuzzer for Java; Machine-Checkable Timed CSP; Stochastic Formal Correctness of Numerical Algorithms; Deductive Verification of Cryptographic Software; Coloured Petri Net Refinement Specification and Correctness Proof with Coq; Modeling Guidelines for Code Generation in the Railway Signaling Context; Tactical Synthesis Of Efficient Global Search Algorithms; Towards Co-Engineering Communicating Autonomous Cyber-Physical Systems; and Formal Methods for Automated Diagnosis of Autosub 6000.

Stand-alone development system using a KIM-1 microcomputer module

NASA Technical Reports Server (NTRS)

Nickum, J. D.

1978-01-01

A small microprocessor-based system designed to: contain all or most of the interface hardware, designed to be easy to access and modify the hardware, to be capable of being strapped to the seat of a small general aviation aircraft, and to be independent of the aircraft power system is described. The system is used to develop a low cost Loran C sensor processor, but is designed such that the Loran interface boards may be removed and other hardware interfaces inserted into the same connectors. This flexibility is achieved through memory-mapping techniques into the microprocessor.

Criticality as a Set-Point for Adaptive Behavior in Neuromorphic Hardware

PubMed Central

Srinivasa, Narayan; Stepp, Nigel D.; Cruz-Albrecht, Jose

2015-01-01

Neuromorphic hardware are designed by drawing inspiration from biology to overcome limitations of current computer architectures while forging the development of a new class of autonomous systems that can exhibit adaptive behaviors. Several designs in the recent past are capable of emulating large scale networks but avoid complexity in network dynamics by minimizing the number of dynamic variables that are supported and tunable in hardware. We believe that this is due to the lack of a clear understanding of how to design self-tuning complex systems. It has been widely demonstrated that criticality appears to be the default state of the brain and manifests in the form of spontaneous scale-invariant cascades of neural activity. Experiment, theory and recent models have shown that neuronal networks at criticality demonstrate optimal information transfer, learning and information processing capabilities that affect behavior. In this perspective article, we argue that understanding how large scale neuromorphic electronics can be designed to enable emergent adaptive behavior will require an understanding of how networks emulated by such hardware can self-tune local parameters to maintain criticality as a set-point. We believe that such capability will enable the design of truly scalable intelligent systems using neuromorphic hardware that embrace complexity in network dynamics rather than avoiding it. PMID:26648839

Compiler-Assisted Multiple Instruction Rollback Recovery Using a Read Buffer. Ph.D. Thesis

NASA Technical Reports Server (NTRS)

Alewine, Neal Jon

1993-01-01

Multiple instruction rollback (MIR) is a technique to provide rapid recovery from transient processor failures and was implemented in hardware by researchers and slow in mainframe computers. Hardware-based MIR designs eliminate rollback data hazards by providing data redundancy implemented in hardware. Compiler-based MIR designs were also developed which remove rollback data hazards directly with data flow manipulations, thus eliminating the need for most data redundancy hardware. Compiler-assisted techniques to achieve multiple instruction rollback recovery are addressed. It is observed that data some hazards resulting from instruction rollback can be resolved more efficiently by providing hardware redundancy while others are resolved more efficiently with compiler transformations. A compiler-assisted multiple instruction rollback scheme is developed which combines hardware-implemented data redundancy with compiler-driven hazard removal transformations. Experimental performance evaluations were conducted which indicate improved efficiency over previous hardware-based and compiler-based schemes. Various enhancements to the compiler transformations and to the data redundancy hardware developed for the compiler-assisted MIR scheme are described and evaluated. The final topic deals with the application of compiler-assisted MIR techniques to aid in exception repair and branch repair in a speculative execution architecture.

Wavefront correction and high-resolution in vivo OCT imaging with an objective integrated multi-actuator adaptive lens

PubMed Central

Bonora, Stefano; Jian, Yifan; Zhang, Pengfei; Zam, Azhar; Pugh, Edward N.; Zawadzki, Robert J.; Sarunic, Marinko V.

2015-01-01

Adaptive optics is rapidly transforming microscopy and high-resolution ophthalmic imaging. The adaptive elements commonly used to control optical wavefronts are liquid crystal spatial light modulators and deformable mirrors. We introduce a novel Multi-actuator Adaptive Lens that can correct aberrations to high order, and which has the potential to increase the spread of adaptive optics to many new applications by simplifying its integration with existing systems. Our method combines an adaptive lens with an imaged-based optimization control that allows the correction of images to the diffraction limit, and provides a reduction of hardware complexity with respect to existing state-of-the-art adaptive optics systems. The Multi-actuator Adaptive Lens design that we present can correct wavefront aberrations up to the 4th order of the Zernike polynomial characterization. The performance of the Multi-actuator Adaptive Lens is demonstrated in a wide field microscope, using a Shack-Hartmann wavefront sensor for closed loop control. The Multi-actuator Adaptive Lens and image-based wavefront-sensorless control were also integrated into the objective of a Fourier Domain Optical Coherence Tomography system for in vivo imaging of mouse retinal structures. The experimental results demonstrate that the insertion of the Multi-actuator Objective Lens can generate arbitrary wavefronts to correct aberrations down to the diffraction limit, and can be easily integrated into optical systems to improve the quality of aberrated images. PMID:26368169

Environmental qualification testing of the prototype pool boiling experiment

NASA Technical Reports Server (NTRS)

Sexton, J. Andrew

1992-01-01

The prototype Pool Boiling Experiment (PBE) flew on the STS-47 mission in September 1992. This report describes the purpose of the experiment and the environmental qualification testing program that was used to prove the integrity of the prototype hardware. Component and box level vibration and thermal cycling tests were performed to give an early level of confidence in the hardware designs. At the system level, vibration, thermal extreme soaks, and thermal vacuum cycling tests were performed to qualify the complete design for the expected shuttle environment. The system level vibration testing included three axis sine sweeps and random inputs. The system level hot and cold soak tests demonstrated the hardware's capability to operate over a wide range of temperatures and gave the project team a wider latitude in determining which shuttle thermal altitudes were compatible with the experiment. The system level thermal vacuum cycling tests demonstrated the hardware's capability to operate in a convection free environment. A unique environmental chamber was designed and fabricated by the PBE team and allowed most of the environmental testing to be performed within the project's laboratory. The completion of the test program gave the project team high confidence in the hardware's ability to function as designed during flight.

Computational adaptive optics for broadband optical interferometric tomography of biological tissue.

PubMed

Adie, Steven G; Graf, Benedikt W; Ahmad, Adeel; Carney, P Scott; Boppart, Stephen A

2012-05-08

Aberrations in optical microscopy reduce image resolution and contrast, and can limit imaging depth when focusing into biological samples. Static correction of aberrations may be achieved through appropriate lens design, but this approach does not offer the flexibility of simultaneously correcting aberrations for all imaging depths, nor the adaptability to correct for sample-specific aberrations for high-quality tomographic optical imaging. Incorporation of adaptive optics (AO) methods have demonstrated considerable improvement in optical image contrast and resolution in noninterferometric microscopy techniques, as well as in optical coherence tomography. Here we present a method to correct aberrations in a tomogram rather than the beam of a broadband optical interferometry system. Based on Fourier optics principles, we correct aberrations of a virtual pupil using Zernike polynomials. When used in conjunction with the computed imaging method interferometric synthetic aperture microscopy, this computational AO enables object reconstruction (within the single scattering limit) with ideal focal-plane resolution at all depths. Tomographic reconstructions of tissue phantoms containing subresolution titanium-dioxide particles and of ex vivo rat lung tissue demonstrate aberration correction in datasets acquired with a highly astigmatic illumination beam. These results also demonstrate that imaging with an aberrated astigmatic beam provides the advantage of a more uniform depth-dependent signal compared to imaging with a standard gaussian beam. With further work, computational AO could enable the replacement of complicated and expensive optical hardware components with algorithms implemented on a standard desktop computer, making high-resolution 3D interferometric tomography accessible to a wider group of users and nonspecialists.

Modeling and Compensation Design for a Power Hardware-in-the-Loop Simulation of an AC Distribution System

DOE Office of Scientific and Technical Information (OSTI.GOV)

Ainsworth, Nathan; Hariri, Ali; Prabakar, Kumaraguru

Power hardware-in-the-loop (PHIL) simulation, where actual hardware under text is coupled with a real-time digital model in closed loop, is a powerful tool for analyzing new methods of control for emerging distributed power systems. However, without careful design and compensation of the interface between the simulated and actual systems, PHIL simulations may exhibit instability and modeling inaccuracies. This paper addresses issues that arise in the PHIL simulation of a hardware battery inverter interfaced with a simulated distribution feeder. Both the stability and accuracy issues are modeled and characterized, and a methodology for design of PHIL interface compensation to ensure stabilitymore » and accuracy is presented. The stability and accuracy of the resulting compensated PHIL simulation is then shown by experiment.« less

Modeling and Compensation Design for a Power Hardware-in-the-Loop Simulation of an AC Distribution System: Preprint

DOE Office of Scientific and Technical Information (OSTI.GOV)

Prabakar, Kumaraguru; Ainsworth, Nathan; Pratt, Annabelle

Power hardware-in-the-loop (PHIL) simulation, where actual hardware under text is coupled with a real-time digital model in closed loop, is a powerful tool for analyzing new methods of control for emerging distributed power systems. However, without careful design and compensation of the interface between the simulated and actual systems, PHIL simulations may exhibit instability and modeling inaccuracies. This paper addresses issues that arise in the PHIL simulation of a hardware battery inverter interfaced with a simulated distribution feeder. Both the stability and accuracy issues are modeled and characterized, and a methodology for design of PHIL interface compensation to ensure stabilitymore » and accuracy is presented. The stability and accuracy of the resulting compensated PHIL simulation is then shown by experiment.« less

Onboard FPGA-based SAR processing for future spaceborne systems

NASA Technical Reports Server (NTRS)

Le, Charles; Chan, Samuel; Cheng, Frank; Fang, Winston; Fischman, Mark; Hensley, Scott; Johnson, Robert; Jourdan, Michael; Marina, Miguel; Parham, Bruce;

Thirty Meter Telescope narrow-field infrared adaptive optics system real-time controller prototyping results

NASA Astrophysics Data System (ADS)

Smith, Malcolm; Kerley, Dan; Chapin, Edward L.; Dunn, Jennifer; Herriot, Glen; Véran, Jean-Pierre; Boyer, Corinne; Ellerbroek, Brent; Gilles, Luc; Wang, Lianqi

2016-07-01

Prototyping and benchmarking was performed for the Real-Time Controller (RTC) of the Narrow Field InfraRed Adaptive Optics System (NFIRAOS). To perform wavefront correction, NFIRAOS utilizes two deformable mirrors (DM) and one tip/tilt stage (TTS). The RTC receives wavefront information from six Laser Guide Star (LGS) Shack- Hartmann WaveFront Sensors (WFS), one high-order Natural Guide Star Pyramid WaveFront Sensor (PWFS) and multiple low-order instrument detectors. The RTC uses this information to determine the commands to send to the wavefront correctors. NFIRAOS is the first light AO system for the Thirty Meter Telescope (TMT). The prototyping was performed using dual-socket high performance Linux servers with the real-time (PREEMPT_RT) patch and demonstrated the viability of a commercial off-the-shelf (COTS) hardware approach to large scale AO reconstruction. In particular, a large custom matrix vector multiplication (MVM) was benchmarked which met the required latency requirements. In addition all major inter-machine communication was verified to be adequate using 10Gb and 40Gb Ethernet. The results of this prototyping has enabled a CPU-based NFIRAOS RTC design to proceed with confidence and that COTS hardware can be used to meet the demanding performance requirements.

Use of monocortical miniplates for the intraoral treatment of mandibular fractures.

PubMed

Chiodo, Thomas A; Milles, Maano

2009-03-01

Fixation of mandibular fractures using rigid hardware has gained wide acceptance over the past 3 decades. The goal of rigid internal fixation is to allow for fracture healing with limited, or no, time in maxillo-mandibular fixation. There has been significant evolution in plate and screw materials and design over the past 30 years. The term miniplate is used to describe a fracture plate with a screw diameter of 2.0 mm or less. With correct diagnosis and understanding of the forces affecting mandible fractures, miniplates can be applied transorally in various situations, allowing for less invasive treatment with open reduction of mandible fractures. This article describes the use of monocortical miniplates for the intraoral treatment of mandibular fractures.

A top-down approach in control engineering third-level teaching: The case of hydrogen-generation

NASA Astrophysics Data System (ADS)

Setiawan, Eko; Habibi, M. Afnan; Fall, Cheikh; Hodaka, Ichijo

2017-09-01

This paper presents a top-down approach in control engineering third-level teaching. The paper shows the control engineering solution for the issue of practical implementation in order to motivate students. The proposed strategy only focuses on one technique of control engineering to lead student correctly. The proposed teaching steps are 1) defining the problem, 2) listing of acquired knowledge or required skill, 3) selecting of one control engineering technique, 4) arrangement the order of teaching: problem introduction, implementation of control engineering technique, explanation of system block diagram, model derivation, controller design, and 5) enrichment knowledge by the other control techniques. The approach presented highlights hardware implementation and the use of software simulation as a self-learning tool for students.

MR-CBCT image-guided system for radiotherapy of orthotopic rat prostate tumors.

PubMed

Chiu, Tsuicheng D; Arai, Tatsuya J; Campbell Iii, James; Jiang, Steve B; Mason, Ralph P; Stojadinovic, Strahinja

2018-01-01

Multi-modality image-guided radiotherapy is the standard of care in contemporary cancer management; however, it is not common in preclinical settings due to both hardware and software limitations. Soft tissue lesions, such as orthotopic prostate tumors, are difficult to identify using cone beam computed tomography (CBCT) imaging alone. In this study, we characterized a research magnetic resonance (MR) scanner for preclinical studies and created a protocol for combined MR-CBCT image-guided small animal radiotherapy. Two in-house dual-modality, MR and CBCT compatible, phantoms were designed and manufactured using 3D printing technology. The phantoms were used for quality assurance tests and to facilitate end-to-end testing for combined preclinical MR and CBCT based treatment planning. MR and CBCT images of the phantoms were acquired utilizing a Varian 4.7 T scanner and XRad-225Cx irradiator, respectively. The geometry distortion was assessed by comparing MR images to phantom blueprints and CBCT. The corrected MR scans were co-registered with CBCT and subsequently used for treatment planning. The fidelity of 3D printed phantoms compared to the blueprint design yielded favorable agreement as verified with the CBCT measurements. The geometric distortion, which varied between -5% and 11% throughout the scanning volume, was substantially reduced to within 0.4% after correction. The distortion free MR images were co-registered with the corresponding CBCT images and imported into a commercial treatment planning software SmART Plan. The planning target volume (PTV) was on average 19% smaller when contoured on the corrected MR-CBCT images relative to raw images without distortion correction. An MR-CBCT based preclinical workflow was successfully designed and implemented for small animal radiotherapy. Combined MR-CBCT image-guided radiotherapy for preclinical research potentially delivers enhanced relevance to human radiotherapy for various disease sites. This novel protocol is wide-ranging and not limited to the orthotopic prostate tumor study presented in the study.

Automated power distribution system hardware. [for space station power supplies

NASA Technical Reports Server (NTRS)

Anderson, Paul M.; Martin, James A.; Thomason, Cindy

1989-01-01

An automated power distribution system testbed for the space station common modules has been developed. It incorporates automated control and monitoring of a utility-type power system. Automated power system switchgear, control and sensor hardware requirements, hardware design, test results, and potential applications are discussed. The system is designed so that the automated control and monitoring of the power system is compatible with both a 208-V, 20-kHz single-phase AC system and a high-voltage (120 to 150 V) DC system.

MSFC Skylab structures and mechanical systems mission evaluation

NASA Technical Reports Server (NTRS)

1974-01-01

A performance analysis for structural and mechanical major hardware systems and components is presented. Development background testing, modifications, and requirement adjustments are included. Functional narratives are provided for comparison purposes as are predicted design performance criterion. Each item is evaluated on an individual basis: that is, (1) history (requirements, design, manufacture, and test); (2) in-orbit performance (description and analysis); and (3) conclusions and recommendations regarding future space hardware application. Overall, the structural and mechanical performance of the Skylab hardware was outstanding.

Resilience Design Patterns - A Structured Approach to Resilience at Extreme Scale (version 1.1)

DOE Office of Scientific and Technical Information (OSTI.GOV)

Hukerikar, Saurabh; Engelmann, Christian

Reliability is a serious concern for future extreme-scale high-performance computing (HPC) systems. Projections based on the current generation of HPC systems and technology roadmaps suggest the prevalence of very high fault rates in future systems. The errors resulting from these faults will propagate and generate various kinds of failures, which may result in outcomes ranging from result corruptions to catastrophic application crashes. Therefore the resilience challenge for extreme-scale HPC systems requires management of various hardware and software technologies that are capable of handling a broad set of fault models at accelerated fault rates. Also, due to practical limits on powermore » consumption in HPC systems future systems are likely to embrace innovative architectures, increasing the levels of hardware and software complexities. As a result the techniques that seek to improve resilience must navigate the complex trade-off space between resilience and the overheads to power consumption and performance. While the HPC community has developed various resilience solutions, application-level techniques as well as system-based solutions, the solution space of HPC resilience techniques remains fragmented. There are no formal methods and metrics to investigate and evaluate resilience holistically in HPC systems that consider impact scope, handling coverage, and performance & power efficiency across the system stack. Additionally, few of the current approaches are portable to newer architectures and software environments that will be deployed on future systems. In this document, we develop a structured approach to the management of HPC resilience using the concept of resilience-based design patterns. A design pattern is a general repeatable solution to a commonly occurring problem. We identify the commonly occurring problems and solutions used to deal with faults, errors and failures in HPC systems. Each established solution is described in the form of a pattern that addresses concrete problems in the design of resilient systems. The complete catalog of resilience design patterns provides designers with reusable design elements. We also define a framework that enhances a designer's understanding of the important constraints and opportunities for the design patterns to be implemented and deployed at various layers of the system stack. This design framework may be used to establish mechanisms and interfaces to coordinate flexible fault management across hardware and software components. The framework also supports optimization of the cost-benefit trade-offs among performance, resilience, and power consumption. The overall goal of this work is to enable a systematic methodology for the design and evaluation of resilience technologies in extreme-scale HPC systems that keep scientific applications running to a correct solution in a timely and cost-efficient manner in spite of frequent faults, errors, and failures of various types.« less

Preliminary design polymeric materials experiment. [for space shuttles and Spacelab missions

NASA Technical Reports Server (NTRS)

Mattingly, S. G.; Rude, E. T.; Marshner, R. L.

1975-01-01

A typical Advanced Technology Laboratory mission flight plan was developed and used as a guideline for the identification of a number of experiment considerations. The experiment logistics beginning with sample preparation and ending with sample analysis are then overlaid on the mission in order to have a complete picture of the design requirements. The results of this preliminary design study fall into two categories. First specific preliminary designs of experiment hardware which is adaptable to a variety of mission requirements. Second, identification of those mission considerations which affect hardware design and will require further definition prior to final design. Finally, a program plan is presented which will provide the necessary experiment hardware in a realistic time period to match the planned shuttle flights. A bibliography of all material reviewed and consulted but not specifically referenced is provided.

Hardware development process for Human Research facility applications

NASA Astrophysics Data System (ADS)

Bauer, Liz

2000-01-01

The simple goal of the Human Research Facility (HRF) is to conduct human research experiments on the International Space Station (ISS) astronauts during long-duration missions. This is accomplished by providing integration and operation of the necessary hardware and software capabilities. A typical hardware development flow consists of five stages: functional inputs and requirements definition, market research, design life cycle through hardware delivery, crew training, and mission support. The purpose of this presentation is to guide the audience through the early hardware development process: requirement definition through selecting a development path. Specific HRF equipment is used to illustrate the hardware development paths. .

Design Tools for Reconfigurable Hardware in Orbit (RHinO)

NASA Technical Reports Server (NTRS)

French, Mathew; Graham, Paul; Wirthlin, Michael; Larchev, Gregory; Bellows, Peter; Schott, Brian

2004-01-01

The Reconfigurable Hardware in Orbit (RHinO) project is focused on creating a set of design tools that facilitate and automate design techniques for reconfigurable computing in space, using SRAM-based field-programmable-gate-array (FPGA) technology. These tools leverage an established FPGA design environment and focus primarily on space effects mitigation and power optimization. The project is creating software to automatically test and evaluate the single-event-upsets (SEUs) sensitivities of an FPGA design and insert mitigation techniques. Extensions into the tool suite will also allow evolvable algorithm techniques to reconfigure around single-event-latchup (SEL) events. In the power domain, tools are being created for dynamic power visualiization and optimization. Thus, this technology seeks to enable the use of Reconfigurable Hardware in Orbit, via an integrated design tool-suite aiming to reduce risk, cost, and design time of multimission reconfigurable space processors using SRAM-based FPGAs.

FPGA Based Reconfigurable ATM Switch Test Bed

NASA Technical Reports Server (NTRS)

Chu, Pong P.; Jones, Robert E.

1998-01-01

Various issues associated with "FPGA Based Reconfigurable ATM Switch Test Bed" are presented in viewgraph form. Specific topics include: 1) Network performance evaluation; 2) traditional approaches; 3) software simulation; 4) hardware emulation; 5) test bed highlights; 6) design environment; 7) test bed architecture; 8) abstract sheared-memory switch; 9) detailed switch diagram; 10) traffic generator; 11) data collection circuit and user interface; 12) initial results; and 13) the following conclusions: Advances in FPGA make hardware emulation feasible for performance evaluation, hardware emulation can provide several orders of magnitude speed-up over software simulation; due to the complexity of hardware synthesis process, development in emulation is much more difficult than simulation and requires knowledge in both networks and digital design.

Space biology initiative program definition review. Trade study 2: Prototype utilization in the development of space biology hardware

NASA Technical Reports Server (NTRS)

Jackson, L. Neal; Crenshaw, John, Sr.; Schulze, Arthur E.; Wood, H. J., Jr.

1989-01-01

The objective was to define the factors which space flight hardware developers and planners should consider when determining: (1) the number of hardware units required to support program; (2) design level of the units; and (3) most efficient means of utilization of the units. The analysis considered technology risk, maintainability, reliability, and safety design requirements for achieving the delivery of highest quality flight hardware. Relative cost impacts of the utilization of prototyping were identified. The development of Space Biology Initiative research hardware will involve intertwined hardware/software activities. Experience has shown that software development can be an expensive portion of a system design program. While software prototyping could imply the development of a significantly different end item, an operational system prototype must be considered to be a combination of software and hardware. Hundreds of factors were identified that could be considered in determining the quantity and types of prototypes that should be constructed. In developing the decision models, these factors were combined and reduced by approximately ten-to-one in order to develop a manageable structure based on the major determining factors. The Baseline SBI hardware list of Appendix D was examined and reviewed in detail; however, from the facts available it was impossible to identify the exact types and quantities of prototypes required for each of these items. Although the factors that must be considered could be enumerated for each of these pieces of equipment, the exact status and state of development of the equipment is variable and uncertain at this time.

Study of the adaptability of existing hardware designs to a Pioneer Saturn/Uranus probe

NASA Technical Reports Server (NTRS)

1973-01-01

The basic concept of designing a scientific entry probe for the expected range of environments at Saturn or Uranus and making the probe compatible with the interface constraints of the Pioneer spacecraft was investigated for launches in the early 1980's. It was found that the amount of hardware commonality between that used in the Pioneer Venus program and that for the Saturn/Uranus probe was approximately 85%. It is recommended that additional development studies be conducted to improve the hardware definitions of the probe design for the following: heat shield, battery, nose cap jettisoning, and thermal control insulation.

System-level protection and hardware Trojan detection using weighted voting.

PubMed

Amin, Hany A M; Alkabani, Yousra; Selim, Gamal M I

2014-07-01

The problem of hardware Trojans is becoming more serious especially with the widespread of fabless design houses and design reuse. Hardware Trojans can be embedded on chip during manufacturing or in third party intellectual property cores (IPs) during the design process. Recent research is performed to detect Trojans embedded at manufacturing time by comparing the suspected chip with a golden chip that is fully trusted. However, Trojan detection in third party IP cores is more challenging than other logic modules especially that there is no golden chip. This paper proposes a new methodology to detect/prevent hardware Trojans in third party IP cores. The method works by gradually building trust in suspected IP cores by comparing the outputs of different untrusted implementations of the same IP core. Simulation results show that our method achieves higher probability of Trojan detection over a naive implementation of simple voting on the output of different IP cores. In addition, experimental results show that the proposed method requires less hardware overhead when compared with a simple voting technique achieving the same degree of security.

Shuttle mission simulator hardware conceptual design report

NASA Technical Reports Server (NTRS)

Burke, J. F.

1973-01-01

The detailed shuttle mission simulator hardware requirements are discussed. The conceptual design methods, or existing technology, whereby those requirements will be fulfilled are described. Information of a general nature on the total design problem plus specific details on how these requirements are to be satisfied are reported. The configuration of the simulator is described and the capabilities for various types of training are identified.

The modified distal horizontal metatarsal osteotomy for correction of bunionette deformity.

PubMed

Radl, Roman; Leithner, Andreas; Koehler, Wolfgang; Scheipl, Susanne; Windhager, Reinhard

2005-06-01

Bunionette is a common deformity for which a number of operative procedures have been described. The objective of this study was to evaluate the results of a modified distal horizontal metatarsal osteotomy in the correction of symptomatic bunionette. Metatarsal osteotomies were done in 21 feet in 14 patients (11 females, three males) with an average age of 44 (range 20 to 67) years at the time of operation. The average followup was 32 (range 12 to 52) months. The average Lesser Toe Metatarsophalangeal-Interphalangeal Score of the American Orthopaedic Foot and Ankle Society increased from 42 points (range 24 to 50) preoperatively to 87 points (range 60 to 100) at the last followup. The fifth metatarsophalangeal angle averaged 18 degrees (5 to 38 degrees) preoperatively and 5 degrees (-5 to 26 degrees) at final followup. The 4-5 intermetatarsal angle averaged 14 degrees (10 to 20 degrees) preoperatively and 9 degrees (5 to 12 degrees) at final followup. Hardware was removed from two feet and scheduled for a third foot because of symptomatic skin irritation. The modified distal horizontal metatarsal osteotomy is a stable and reliable method for correction of bunionette. Unsatisfactory results in our patients were related to prominent hardware.

Lessons Learned from the Space Shuttle Engine Cutoff System (ECO) Anomalies

NASA Technical Reports Server (NTRS)

Martinez, Hugo E.; Welzyn, Ken

2011-01-01

The Space Shuttle Orbiter's main engine cutoff (ECO) system first failed ground checkout in April, 2005 during a first tanking test prior to Return-to-Flight. Despite significant troubleshooting and investigative efforts that followed, the root cause could not be found and intermittent anomalies continued to plague the Program. By implementing hardware upgrades, enhancing monitoring capability, and relaxing the launch rules, the Shuttle fleet was allowed to continue flying in spite of these unexplained failures. Root cause was finally determined following the launch attempts of STS-122 in December, 2007 when the anomalies repeated, which allowed drag-on instrumentation to pinpoint the fault (the ET feedthrough connector). The suspect hardware was removed and provided additional evidence towards root cause determination. Corrective action was implemented and the system has performed successfully since then. This white paper presents the lessons learned from the entire experience, beginning with the anomalies since Return-to-Flight through discovery and correction of the problem. To put these lessons in better perspective for the reader, an overview of the ECO system is presented first. Next, a chronological account of the failures and associated investigation activities is discussed. Root cause and corrective action are summarized, followed by the lessons learned.

Real-Time Hardware-in-the-Loop Simulation of Ares I Launch Vehicle

NASA Technical Reports Server (NTRS)

Tobbe, Patrick; Matras, Alex; Walker, David; Wilson, Heath; Fulton, Chris; Alday, Nathan; Betts, Kevin; Hughes, Ryan; Turbe, Michael

2009-01-01

The Ares Real-Time Environment for Modeling, Integration, and Simulation (ARTEMIS) has been developed for use by the Ares I launch vehicle System Integration Laboratory at the Marshall Space Flight Center. The primary purpose of the Ares System Integration Laboratory is to test the vehicle avionics hardware and software in a hardware - in-the-loop environment to certify that the integrated system is prepared for flight. ARTEMIS has been designed to be the real-time simulation backbone to stimulate all required Ares components for verification testing. ARTE_VIIS provides high -fidelity dynamics, actuator, and sensor models to simulate an accurate flight trajectory in order to ensure realistic test conditions. ARTEMIS has been designed to take advantage of the advances in underlying computational power now available to support hardware-in-the-loop testing to achieve real-time simulation with unprecedented model fidelity. A modular realtime design relying on a fully distributed computing architecture has been implemented.

A distributed, graphical user interface based, computer control system for atomic physics experiments

NASA Astrophysics Data System (ADS)

Keshet, Aviv; Ketterle, Wolfgang

2013-01-01

Atomic physics experiments often require a complex sequence of precisely timed computer controlled events. This paper describes a distributed graphical user interface-based control system designed with such experiments in mind, which makes use of off-the-shelf output hardware from National Instruments. The software makes use of a client-server separation between a user interface for sequence design and a set of output hardware servers. Output hardware servers are designed to use standard National Instruments output cards, but the client-server nature should allow this to be extended to other output hardware. Output sequences running on multiple servers and output cards can be synchronized using a shared clock. By using a field programmable gate array-generated variable frequency clock, redundant buffers can be dramatically shortened, and a time resolution of 100 ns achieved over effectively arbitrary sequence lengths.

A distributed, graphical user interface based, computer control system for atomic physics experiments.

PubMed

Keshet, Aviv; Ketterle, Wolfgang

2013-01-01

Atomic physics experiments often require a complex sequence of precisely timed computer controlled events. This paper describes a distributed graphical user interface-based control system designed with such experiments in mind, which makes use of off-the-shelf output hardware from National Instruments. The software makes use of a client-server separation between a user interface for sequence design and a set of output hardware servers. Output hardware servers are designed to use standard National Instruments output cards, but the client-server nature should allow this to be extended to other output hardware. Output sequences running on multiple servers and output cards can be synchronized using a shared clock. By using a field programmable gate array-generated variable frequency clock, redundant buffers can be dramatically shortened, and a time resolution of 100 ns achieved over effectively arbitrary sequence lengths.

Hardware architecture for projective model calculation and false match refining using random sample consensus algorithm

NASA Astrophysics Data System (ADS)

Azimi, Ehsan; Behrad, Alireza; Ghaznavi-Ghoushchi, Mohammad Bagher; Shanbehzadeh, Jamshid

2016-11-01

The projective model is an important mapping function for the calculation of global transformation between two images. However, its hardware implementation is challenging because of a large number of coefficients with different required precisions for fixed point representation. A VLSI hardware architecture is proposed for the calculation of a global projective model between input and reference images and refining false matches using random sample consensus (RANSAC) algorithm. To make the hardware implementation feasible, it is proved that the calculation of the projective model can be divided into four submodels comprising two translations, an affine model and a simpler projective mapping. This approach makes the hardware implementation feasible and considerably reduces the required number of bits for fixed point representation of model coefficients and intermediate variables. The proposed hardware architecture for the calculation of a global projective model using the RANSAC algorithm was implemented using Verilog hardware description language and the functionality of the design was validated through several experiments. The proposed architecture was synthesized by using an application-specific integrated circuit digital design flow utilizing 180-nm CMOS technology as well as a Virtex-6 field programmable gate array. Experimental results confirm the efficiency of the proposed hardware architecture in comparison with software implementation.

Computer hardware description languages - A tutorial

NASA Technical Reports Server (NTRS)

Shiva, S. G.

1979-01-01

The paper introduces hardware description languages (HDL) as useful tools for hardware design and documentation. The capabilities and limitations of HDLs are discussed along with the guidelines needed in selecting an appropriate HDL. The directions for future work are provided and attention is given to the implementation of HDLs in microcomputers.

Laboratory automation: trajectory, technology, and tactics.

PubMed

Markin, R S; Whalen, S A

2000-05-01

Laboratory automation is in its infancy, following a path parallel to the development of laboratory information systems in the late 1970s and early 1980s. Changes on the horizon in healthcare and clinical laboratory service that affect the delivery of laboratory results include the increasing age of the population in North America, the implementation of the Balanced Budget Act (1997), and the creation of disease management companies. Major technology drivers include outcomes optimization and phenotypically targeted drugs. Constant cost pressures in the clinical laboratory have forced diagnostic manufacturers into less than optimal profitability states. Laboratory automation can be a tool for the improvement of laboratory services and may decrease costs. The key to improvement of laboratory services is implementation of the correct automation technology. The design of this technology should be driven by required functionality. Automation design issues should be centered on the understanding of the laboratory and its relationship to healthcare delivery and the business and operational processes in the clinical laboratory. Automation design philosophy has evolved from a hardware-based approach to a software-based approach. Process control software to support repeat testing, reflex testing, and transportation management, and overall computer-integrated manufacturing approaches to laboratory automation implementation are rapidly expanding areas. It is clear that hardware and software are functionally interdependent and that the interface between the laboratory automation system and the laboratory information system is a key component. The cost-effectiveness of automation solutions suggested by vendors, however, has been difficult to evaluate because the number of automation installations are few and the precision with which operational data have been collected to determine payback is suboptimal. The trend in automation has moved from total laboratory automation to a modular approach, from a hardware-driven system to process control, from a one-of-a-kind novelty toward a standardized product, and from an in vitro diagnostics novelty to a marketing tool. Multiple vendors are present in the marketplace, many of whom are in vitro diagnostics manufacturers providing an automation solution coupled with their instruments, whereas others are focused automation companies. Automation technology continues to advance, acceptance continues to climb, and payback and cost justification methods are developing.

Marshall Space Flight Center CFD overview

NASA Technical Reports Server (NTRS)

Schutzenhofer, Luke A.

1989-01-01

Computational Fluid Dynamics (CFD) activities at Marshall Space Flight Center (MSFC) have been focused on hardware specific and research applications with strong emphasis upon benchmark validation. The purpose here is to provide insight into the MSFC CFD related goals, objectives, current hardware related CFD activities, propulsion CFD research efforts and validation program, future near-term CFD hardware related programs, and CFD expectations. The current hardware programs where CFD has been successfully applied are the Space Shuttle Main Engines (SSME), Alternate Turbopump Development (ATD), and Aeroassist Flight Experiment (AFE). For the future near-term CFD hardware related activities, plans are being developed that address the implementation of CFD into the early design stages of the Space Transportation Main Engine (STME), Space Transportation Booster Engine (STBE), and the Environmental Control and Life Support System (ECLSS) for the Space Station. Finally, CFD expectations in the design environment will be delineated.

Web-Compatible Graphics Visualization Framework for Online Instruction and Assessment of Hardware Concepts

ERIC Educational Resources Information Center

Chandramouli, Magesh; Chittamuru, Siva-Teja

2016-01-01

This paper explains the design of a graphics-based virtual environment for instructing computer hardware concepts to students, especially those at the beginner level. Photorealistic visualizations and simulations are designed and programmed with interactive features allowing students to practice, explore, and test themselves on computer hardware…

Automated biowaste sampling system improved feces collection, mass measurement and sampling. [by use of a breadboard model

NASA Technical Reports Server (NTRS)

Fogal, G. L.; Mangialardi, J. K.; Young, R.

1974-01-01

The capability of the basic automated Biowaste Sampling System (ABSS) hardware was extended and improved through the design, fabrication and test of breadboard hardware. A preliminary system design effort established the feasibility of integrating the breadboard concepts into the ABSS.

Bistatic radar sea state monitoring system design

NASA Technical Reports Server (NTRS)

Ruck, G. T.; Krichbaum, C. K.; Everly, J. O.

1975-01-01

Remote measurement of the two-dimensional surface wave height spectrum of the ocean by the use of bistatic radar techniques was examined. Potential feasibility and experimental verification by field experiment are suggested. The required experimental hardware is defined along with the designing, assembling, and testing of several required experimental hardware components.

When "Less is More": The Optimal Design of Language Laboratory Hardware.

ERIC Educational Resources Information Center

Kershaw, Gary; Boyd, Gary

1980-01-01

The results of a process of designing, building, and "de-bugging" two replacement language laboratory hardware systems at Concordia University (Montreal) are described. Because commercially available systems did not meet specifications within budgetary constraints, the systems were built by the university technical department. The systems replaced…

Programmable data collection platform study

NASA Technical Reports Server (NTRS)

1976-01-01

The results of a feasibility study incorporating microprocessors in data collection platforms in described. An introduction to microcomputer hardware and software concepts is provided. The influence of microprocessor technology on the design of programmable data collection platform hardware is discussed. A standard modular PDCP design capable of meeting the design goals is proposed, and the process of developing PDCP programs is examined. A description of design and construction of the UT PDCP development system is given.

Developments at the Advanced Design Technologies Testbed

NASA Technical Reports Server (NTRS)

VanDalsem, William R.; Livingston, Mary E.; Melton, John E.; Torres, Francisco J.; Stremel, Paul M.

2003-01-01

A report presents background and historical information, as of August 1998, on the Advanced Design Technologies Testbed (ADTT) at Ames Research Center. The ADTT is characterized as an activity initiated to facilitate improvements in aerospace design processes; provide a proving ground for product-development methods and computational software and hardware; develop bridging methods, software, and hardware that can facilitate integrated solutions to design problems; and disseminate lessons learned to the aerospace and information technology communities.

Environmental Controls and Life Support System (ECLSS) Design for a Multi-Mission Space Exploration Vehicle (MMSEV)

NASA Technical Reports Server (NTRS)

Stambaugh, Imelda; Baccus, Shelley; Buffington, Jessie; Hood, Andrew; Naids, Adam; Borrego, Melissa; Hanford, Anthony J.; Eckhardt, Brad; Allada, Rama Kumar; Yagoda, Evan

2013-01-01

Engineers at Johnson Space Center (JSC) are developing an Environmental Control and Life Support System (ECLSS) design for the Multi-Mission Space Exploration Vehicle (MMSEV). The purpose of the MMSEV is to extend the human exploration envelope for Lunar, Near Earth Object (NEO), or Deep Space missions by using pressurized exploration vehicles. The MMSEV, formerly known as the Space Exploration Vehicle (SEV), employs ground prototype hardware for various systems and tests it in manned and unmanned configurations. Eventually, the system hardware will evolve and become part of a flight vehicle capable of supporting different design reference missions. This paper will discuss the latest MMSEV ECLSS architectures developed for a variety of design reference missions, any work contributed toward the development of the ECLSS design, lessons learned from testing prototype hardware, and the plan to advance the ECLSS toward a flight design.

Environmental Controls and Life Support System (ECLSS) Design for a Multi-Mission Space Exploration Vehicle (MMSEV)

NASA Technical Reports Server (NTRS)

Stambaugh, Imelda; Baccus, Shelley; Naids, Adam; Hanford, Anthony

2012-01-01

Engineers at Johnson Space Center (JSC) are developing an Environmental Control and Life Support System (ECLSS) design for the Multi-Mission Space Exploration Vehicle (MMSEV). The purpose of the MMSEV is to extend the human exploration envelope for Lunar, Near Earth Object (NEO), or Deep Space missions by using pressurized exploration vehicles. The MMSEV, formerly known as the Space Exploration Vehicle (SEV), employs ground prototype hardware for various systems and tests it in manned and unmanned configurations. Eventually, the system hardware will evolve and become part of a flight vehicle capable of supporting different design reference missions. This paper will discuss the latest MMSEV ECLSS architectures developed for a variety of design reference missions, any work contributed toward the development of the ECLSS design, lessons learned from testing prototype hardware, and the plan to advance the ECLSS toward a flight design.

Web survey data collection and retrieval to plan teleradiology implementation

NASA Astrophysics Data System (ADS)

Alaoui, Adil; Collmann, Jeff R.; Johnson, Jeffrey A.; Lindisch, David; Nguyen, Dan; Mun, Seong K.

2003-05-01

This case study details the experience of system engineers of the Imaging Science and Information Systems Center, Georgetown University Medical Center (ISIS) and radiologists from the department of Radiology in the implementation of a new Teleradiology system. The Teleradiology system enables radiologists to view medical images from remote sites under those circumstances where a resident radiologist needs assistance in evaluating the images after hours and during weekends; it also enables clinicians access to patients" medical images from different workstations within the hospital. The Implementation of the Teleradiology project was preceded by an evaluation phase to perform testing, gather users feedback using a web site and collect information that helped eliminate system bugs, complete recommendations regarding minimum hardware configuration and bandwidth and enhance system"s functions, this phase included a survey-based system assessment of computer configurations, Internet connections, problem identification, and recommendations for improvement, and a testing period with 2 radiologists and ISIS engineers; The second phase was designed to launch the system and make it available to all attending radiologists in the department. To accomplish the first phase of the project a web site was designed and ASP pages were created to enable users to securely logon and enter feedback and recommendations into an SQL database. This efficient, accurate data flow alleviated networking, software and hardware problems. Corrective recommendations were immediately forwarded to the software vendor. The vendor responded with software updates that better met the needs of the radiologists. The ISIS Center completed recommendations for minimum hardware and bandwidth requirements. This experience illustrates that the approach used in collecting the data and facilitating the teamwork between the system engineers and radiologists was instrumental in the project"s success. Major problems with the Teleradiology system were discovered and remedied early by linking the actual practice experience of the physicians to the system improvements.

Impact of uniform electrode current distribution on ETF. [Engineering Test Facility MHD generator

NASA Technical Reports Server (NTRS)

Bents, D. J.

1982-01-01

A basic reason for the complexity and sheer volume of electrode consolidation hardware in the MHD ETF Powertrain system is the channel electrode current distribution, which is non-uniform. If the channel design is altered to provide uniform electrode current distribution, the amount of hardware required decreases considerably, but at the possible expense of degraded channel performance. This paper explains the design impacts on the ETF electrode consolidation network associated with uniform channel electrode current distribution, and presents the alternate consolidation designs which occur. They are compared to the baseline (non-uniform current) design with respect to performance, and hardware requirements. A rational basis is presented for comparing the requirements for the different designs and the savings that result from uniform current distribution. Performance and cost impacts upon the combined cycle plant are discussed.

Post-processing procedure for industrial quantum key distribution systems

NASA Astrophysics Data System (ADS)

Kiktenko, Evgeny; Trushechkin, Anton; Kurochkin, Yury; Fedorov, Aleksey

2016-08-01

We present algorithmic solutions aimed on post-processing procedure for industrial quantum key distribution systems with hardware sifting. The main steps of the procedure are error correction, parameter estimation, and privacy amplification. Authentication of classical public communication channel is also considered.

Monitoring and Hardware Management for Critical Fusion Plasma Instrumentation

NASA Astrophysics Data System (ADS)

Carvalho, Paulo F.; Santos, Bruno; Correia, Miguel; Combo, Álvaro M.; Rodrigues, AntÓnio P.; Pereira, Rita C.; Fernandes, Ana; Cruz, Nuno; Sousa, Jorge; Carvalho, Bernardo B.; Batista, AntÓnio J. N.; Correia, Carlos M. B. A.; Gonçalves, Bruno

2018-01-01

Controlled nuclear fusion aims to obtain energy by particles collision confined inside a nuclear reactor (Tokamak). These ionized particles, heavier isotopes of hydrogen, are the main elements inside of plasma that is kept at high temperatures (millions of Celsius degrees). Due to high temperatures and magnetic confinement, plasma is exposed to several sources of instabilities which require a set of procedures by the control and data acquisition systems throughout fusion experiments processes. Control and data acquisition systems often used in nuclear fusion experiments are based on the Advanced Telecommunication Computer Architecture (AdvancedTCA®) standard introduced by the Peripheral Component Interconnect Industrial Manufacturers Group (PICMG®), to meet the demands of telecommunications that require large amount of data (TB) transportation at high transfer rates (Gb/s), to ensure high availability including features such as reliability, serviceability and redundancy. For efficient plasma control, systems are required to collect large amounts of data, process it, store for later analysis, make critical decisions in real time and provide status reports either from the experience itself or the electronic instrumentation involved. Moreover, systems should also ensure the correct handling of detected anomalies and identified faults, notify the system operator of occurred events, decisions taken to acknowledge and implemented changes. Therefore, for everything to work in compliance with specifications it is required that the instrumentation includes hardware management and monitoring mechanisms for both hardware and software. These mechanisms should check the system status by reading sensors, manage events, update inventory databases with hardware system components in use and maintenance, store collected information, update firmware and installed software modules, configure and handle alarms to detect possible system failures and prevent emergency scenarios occurrences. The goal is to ensure high availability of the system and provide safety operation, experiment security and data validation for the fusion experiment. This work aims to contribute to the joint effort of the IPFN control and data acquisition group to develop a hardware management and monitoring application for control and data acquisition instrumentation especially designed for large scale tokamaks like ITER.

High-Speed Isolation Board for Flight Hardware Testing

NASA Technical Reports Server (NTRS)

Yamamoto, Clifford K.; Goodpasture, Richard L.

2011-01-01

There is a need to provide a portable and cost-effective galvanic isolation between ground support equipment and flight hardware such that any unforeseen voltage differential between ground and power supplies is eliminated. An interface board was designed for use between the ground support equipment and the flight hardware that electrically isolates all input and output signals and faithfully reproduces them on each side of the interface. It utilizes highly integrated multi-channel isolating devices to minimize size and reduce assembly time. This single-board solution provides appropriate connector hardware and breakout of required flight signals to individual connectors as needed for various ground support equipment. The board utilizes multi-channel integrated circuits that contain transformer coupling, thereby allowing input and output signals to be isolated from one another while still providing high-fidelity reproduction of the signal up to 90 MHz. The board also takes in a single-voltage power supply input from the ground support equipment and in turn provides a transformer-derived isolated voltage supply to power the portion of the circuitry that is electrically connected to the flight hardware. Prior designs used expensive opto-isolated couplers that were required for each signal to isolate and were time-consuming to assemble. In addition, these earlier designs were bulky and required a 2U rack-mount enclosure. The new design is smaller than a piece of 8.5 11-in. (.22 28-mm) paper and can be easily hand-carried where needed. The flight hardware in question is based on a lineage of existing software-defined radios (SDRs) that utilize a common interface connector with many similar input-output signals present. There are currently four to five variations of this SDR, and more upcoming versions are planned based on the more recent design.

Solid State Audio/Speech Processor Analysis.

DTIC Science & Technology

1980-03-01

techniques. The techniques were demonstrated to be worthwhile in an efficient realtime AWR system. Finally, microprocessor architectures were designed to...do not include custom chip development, detailed hardware design , construction or testing. ITTDCD is very encouraged by the results obtained in this...California, Berkley, was responsible for furnishing the simulation data of OD speech analysis techniques and for the design and development of the hardware OD

Enhancements and Algorithms for Avionic Information Processing System Design Methodology.

DTIC Science & Technology

1982-06-16

programming algorithm is enhanced by incorporating task precedence constraints and hardware failures. Stochastic network methods are used to analyze...allocations in the presence of random fluctuations. Graph theoretic methods are used to analyze hardware designs, and new designs are constructed with...There, spatial dynamic programming (SDP) was used to solve a static, deterministic software allocation problem. Under the current contract the SDP

The Triangle: a Multiprocessor Architecture for Fast Curve and Surface Generation.

DTIC Science & Technology

1987-08-01

design , curves and surfaces, graphics hardware. 20...curves, B-splines, computer-aided geometric design ; curves and sur- faces, graphics hardware. (k 12). -/ .... This work was supported in part by the...34 Electronic Design , October 30, 1986. 21. M. A. Penna and R. R. Patterson, Projective Geometry and its Applications to Computer Graphics , Prentice-Hall, Englewood Cliffs, N.J., 1985. 70,e, 41100vr -~ ~ - -- --

Aberration compensation of an ultrasound imaging instrument with a reduced number of channels.

PubMed

Jiang, Wei; Astheimer, Jeffrey P; Waag, Robert C

2012-10-01

Focusing and imaging qualities of an ultrasound imaging system that uses aberration correction were experimentally investigated as functions of the number of parallel channels. Front-end electronics that consolidate signals from multiple physical elements can be used to lower hardware and computational costs by reducing the number of parallel channels. However, the signals from sparse arrays of synthetic elements yield poorer aberration estimates. In this study, aberration estimates derived from synthetic arrays of varying element sizes are evaluated by comparing compensated receive focuses, compensated transmit focuses, and compensated b-scan images of a point target and a cyst phantom. An array of 80 x 80 physical elements with a pitch of 0.6 x 0.6 mm was used for all of the experiments and the aberration was produced by a phantom selected to mimic propagation through abdominal wall. The results show that aberration correction derived from synthetic arrays with pitches that have a diagonal length smaller than 70% of the correlation length of the aberration yield focuses and images of approximately the same quality. This connection between correlation length of the aberration and synthetic element size provides a guideline for determining the number of parallel channels that are required when designing imaging systems that employ aberration correction.

Human Systems Engineering for Launch processing at Kennedy Space Center (KSC)

NASA Technical Reports Server (NTRS)

Henderson, Gena; Stambolian, Damon B.; Stelges, Katrine

2012-01-01

Launch processing at Kennedy Space Center (KSC) is primarily accomplished by human users of expensive and specialized equipment. In order to reduce the likelihood of human error, to reduce personal injuries, damage to hardware, and loss of mission the design process for the hardware needs to include the human's relationship with the hardware. Just as there is electrical, mechanical, and fluids, the human aspect is just as important. The focus of this presentation is to illustrate how KSC accomplishes the inclusion of the human aspect in the design using human centered hardware modeling and engineering. The presentations also explain the current and future plans for research and development for improving our human factors analysis tools and processes.

Stretched Lens Array (SLA) Photovoltaic Concentrator Hardware Development and Testing

NASA Technical Reports Server (NTRS)

Piszczor, Michael; O'Neill, Mark J.; Eskenazi, Michael

2003-01-01

Over the past two years, the Stretched Lens Array (SLA) photovoltaic concentrator has evolved, under a NASA contract, from a concept with small component demonstrators to operational array hardware that is ready for space validation testing. A fully-functional four panel SLA solar array has been designed, built and tested. This paper will summarize the focus of the hardware development effort, discuss the results of recent testing conducted under this program and present the expected performance of a full size 7kW array designed to meet the requirements of future space missions.

Experimental Validation of Advanced Dispersed Fringe Sensing (ADFS) Algorithm Using Advanced Wavefront Sensing and Correction Testbed (AWCT)

NASA Technical Reports Server (NTRS)

Wang, Xu; Shi, Fang; Sigrist, Norbert; Seo, Byoung-Joon; Tang, Hong; Bikkannavar, Siddarayappa; Basinger, Scott; Lay, Oliver

2012-01-01

Large aperture telescope commonly features segment mirrors and a coarse phasing step is needed to bring these individual segments into the fine phasing capture range. Dispersed Fringe Sensing (DFS) is a powerful coarse phasing technique and its alteration is currently being used for JWST.An Advanced Dispersed Fringe Sensing (ADFS) algorithm is recently developed to improve the performance and robustness of previous DFS algorithms with better accuracy and unique solution. The first part of the paper introduces the basic ideas and the essential features of the ADFS algorithm and presents the some algorithm sensitivity study results. The second part of the paper describes the full details of algorithm validation process through the advanced wavefront sensing and correction testbed (AWCT): first, the optimization of the DFS hardware of AWCT to ensure the data accuracy and reliability is illustrated. Then, a few carefully designed algorithm validation experiments are implemented, and the corresponding data analysis results are shown. Finally the fiducial calibration using Range-Gate-Metrology technique is carried out and a <10nm or <1% algorithm accuracy is demonstrated.

Atmospheric Dynamics on Venus, Jupiter, and Saturn: An Observational and Analytical Study

NASA Technical Reports Server (NTRS)

Bridger, Alison; Magalhaes, Julio A.; Young, Richard E.

2000-01-01

Determining the static stability of Jupiter's atmosphere below the visible cloud levels is important for understanding the dynamical modes by which energy and momentum are transported through Jupiter's deep troposphere. The Galileo Probe Atmospheric Structure Investigation (ASI) employed pressure and temperature sensors to directly measure these state variables during the parachute-descent phase, which started at a pressure (p) of 0.4 bars and ended at p= 22 bars. The internal temperature of the probe underwent large temperature fluctuations which significantly exceeded design specifications. Corrections for these anomalous interior temperatures have been evaluated based on laboratory data acquired after the mission using the flight spare hardware. The corrections to the pressure sensor readings was particularly large and the uncertainties in the atmospheric pressures derived from the p sensor measurements may still be significant. We have sought to estimate the formal uncertainties in the static stability derived from the p and T sensor measurements directly and to devise means of assessing the static stability of Jupiter's atmosphere which do not rely on the p sensor data.

A software methodology for compiling quantum programs

NASA Astrophysics Data System (ADS)

Häner, Thomas; Steiger, Damian S.; Svore, Krysta; Troyer, Matthias

2018-04-01

Quantum computers promise to transform our notions of computation by offering a completely new paradigm. To achieve scalable quantum computation, optimizing compilers and a corresponding software design flow will be essential. We present a software architecture for compiling quantum programs from a high-level language program to hardware-specific instructions. We describe the necessary layers of abstraction and their differences and similarities to classical layers of a computer-aided design flow. For each layer of the stack, we discuss the underlying methods for compilation and optimization. Our software methodology facilitates more rapid innovation among quantum algorithm designers, quantum hardware engineers, and experimentalists. It enables scalable compilation of complex quantum algorithms and can be targeted to any specific quantum hardware implementation.

Round Girls in Square Computers: Feminist Perspectives on the Aesthetics of Computer Hardware.

ERIC Educational Resources Information Center

Carr-Chellman, Alison A.; Marra, Rose M.; Roberts, Shari L.

2002-01-01

Considers issues related to computer hardware, aesthetics, and gender. Explores how gender has influenced the design of computer hardware and how these gender-driven aesthetics may have worked to maintain, extend, or alter gender distinctions, roles, and stereotypes; discusses masculine media representations; and presents an alternative model.…

Teaching Robotics Software with the Open Hardware Mobile Manipulator

ERIC Educational Resources Information Center

Vona, M.; Shekar, N. H.

2013-01-01

The "open hardware mobile manipulator" (OHMM) is a new open platform with a unique combination of features for teaching robotics software and algorithms. On-board low- and high-level processors support real-time embedded programming and motor control, as well as higher-level coding with contemporary libraries. Full hardware designs and…

Study and design of cryogenic propellant acquisition systems. Volume 1: Design studies

NASA Technical Reports Server (NTRS)

Burge, G. W.; Blackmon, J. B.

1973-01-01

An in-depth study and selection of practical propellant surface tension acquisition system designs for two specific future cryogenic space vehicles, an advanced cryogenic space shuttle auxiliary propulsion system and an advanced space propulsion module is reported. A supporting laboratory scale experimental program was also conducted to provide design information critical to concept finalization and selection. Designs using localized pressure isolated surface tension screen devices were selected for each application and preliminary designs were generated. Based on these designs, large scale acquisition prototype hardware was designed and fabricated to be compatible with available NASA-MSFC feed system hardware.

Lab at Home: Hardware Kits for a Digital Design Lab

ERIC Educational Resources Information Center

Oliver, J. P.; Haim, F.

2009-01-01

An innovative laboratory methodology for an introductory digital design course is presented. Instead of having traditional lab experiences, where students have to come to school classrooms, a "lab at home" concept is proposed. Students perform real experiments in their own homes, using hardware kits specially developed for this purpose. They…

Microprocessor Design Using Hardware Description Language

ERIC Educational Resources Information Center

Mita, Rosario; Palumbo, Gaetano

2008-01-01

The following paper has been conceived to deal with the contents of some lectures aimed at enhancing courses on digital electronic, microelectronic or VLSI systems. Those lectures show how to use a hardware description language (HDL), such as the VHDL, to specify, design and verify a custom microprocessor. The general goal of this work is to teach…

49 CFR Appendix C to Part 236 - Safety Assurance Criteria and Processes

Code of Federal Regulations, 2010 CFR

2010-10-01

... system (all its elements including hardware and software) must be designed to assure safe operation with... unsafe errors in the software due to human error in the software specification, design, or coding phases... (hardware or software, or both) are used in combination to ensure safety. If a common mode failure exists...

Accelerating a MPEG-4 video decoder through custom software/hardware co-design

NASA Astrophysics Data System (ADS)

Díaz, Jorge L.; Barreto, Dacil; García, Luz; Marrero, Gustavo; Carballo, Pedro P.; Núñez, Antonio

2007-05-01

In this paper we present a novel methodology to accelerate an MPEG-4 video decoder using software/hardware co-design for wireless DAB/DMB networks. Software support includes the services provided by the embedded kernel μC/OS-II, and the application tasks mapped to software. Hardware support includes several custom co-processors and a communication architecture with bridges to the main system bus and with a dual port SRAM. Synchronization among tasks is achieved at two levels, by a hardware protocol and by kernel level scheduling services. Our reference application is an MPEG-4 video decoder composed of several software functions and written using a special C++ library named CASSE. Profiling and space exploration techniques were used previously over the Advanced Simple Profile (ASP) MPEG-4 decoder to determinate the best HW/SW partition developed here. This research is part of the ARTEMI project and its main goal is the establishment of methodologies for the design of real-time complex digital systems using Programmable Logic Devices with embedded microprocessors as target technology and the design of multimedia systems for broadcasting networks as reference application.

Novel SPECT Technologies and Approaches in Cardiac Imaging

PubMed Central

Slomka, Piotr; Hung, Guang-Uei; Germano, Guido; Berman, Daniel S.

2017-01-01

Recent novel approaches in myocardial perfusion single photon emission CT (SPECT) have been facilitated by new dedicated high-efficiency hardware with solid-state detectors and optimized collimators. New protocols include very low-dose (1 mSv) stress-only, two-position imaging to mitigate attenuation artifacts, and simultaneous dual-isotope imaging. Attenuation correction can be performed by specialized low-dose systems or by previously obtained CT coronary calcium scans. Hybrid protocols using CT angiography have been proposed. Image quality improvements have been demonstrated by novel reconstructions and motion correction. Fast SPECT acquisition facilitates dynamic flow and early function measurements. Image processing algorithms have become automated with virtually unsupervised extraction of quantitative imaging variables. This automation facilitates integration with clinical variables derived by machine learning to predict patient outcome or diagnosis. In this review, we describe new imaging protocols made possible by the new hardware developments. We also discuss several novel software approaches for the quantification and interpretation of myocardial perfusion SPECT scans. PMID:29034066

Self-Adaptive Correction of Heading Direction in Stair Climbing for Tracked Mobile Robots Using Visual Servoing Approach

NASA Astrophysics Data System (ADS)

Ji, Peng; Song, Aiguo; Song, Zimo; Liu, Yuqing; Jiang, Guohua; Zhao, Guopu

2017-02-01

In this paper, we describe a heading direction correction algorithm for a tracked mobile robot. To save hardware resources as far as possible, the mobile robot’s wrist camera is used as the only sensor, which is rotated to face stairs. An ensemble heading deviation detector is proposed to help the mobile robot correct its heading direction. To improve the generalization ability, a multi-scale Gabor filter is used to process the input image previously. Final deviation result is acquired by applying the majority vote strategy on all the classifiers’ results. The experimental results show that our detector is able to enable the mobile robot to correct its heading direction adaptively while it is climbing the stairs.

Research and implementation of the algorithm for unwrapped and distortion correction basing on CORDIC for panoramic image

NASA Astrophysics Data System (ADS)

Zhang, Zhenhai; Li, Kejie; Wu, Xiaobing; Zhang, Shujiang

2008-03-01

The unwrapped and correcting algorithm based on Coordinate Rotation Digital Computer (CORDIC) and bilinear interpolation algorithm was presented in this paper, with the purpose of processing dynamic panoramic annular image. An original annular panoramic image captured by panoramic annular lens (PAL) can be unwrapped and corrected to conventional rectangular image without distortion, which is much more coincident with people's vision. The algorithm for panoramic image processing is modeled by VHDL and implemented in FPGA. The experimental results show that the proposed panoramic image algorithm for unwrapped and distortion correction has the lower computation complexity and the architecture for dynamic panoramic image processing has lower hardware cost and power consumption. And the proposed algorithm is valid.

Energy Efficient Engine combustor test hardware detailed design report

NASA Technical Reports Server (NTRS)

Burrus, D. L.; Chahrour, C. A.; Foltz, H. L.; Sabla, P. E.; Seto, S. P.; Taylor, J. R.

1984-01-01

The Energy Efficient Engine (E3) Combustor Development effort was conducted as part of the overall NASA/GE E3 Program. This effort included the selection of an advanced double-annular combustion system design. The primary intent was to evolve a design which meets the stringent emissions and life goals of the E3 as well as all of the usual performance requirements of combustion systems for modern turbofan engines. Numerous detailed design studies were conducted to define the features of the combustion system design. Development test hardware was fabricated, and an extensive testing effort was undertaken to evaluate the combustion system subcomponents in order to verify and refine the design. Technology derived from this development effort will be incorporated into the engine combustion system hardware design. This advanced engine combustion system will then be evaluated in component testing to verify the design intent. What is evolving from this development effort is an advanced combustion system capable of satisfying all of the combustion system design objectives and requirements of the E3. Fuel nozzle, diffuser, starting, and emissions design studies are discussed.

Space Station galley design

NASA Technical Reports Server (NTRS)

Trabanino, Rudy; Murphy, George L.; Yakut, M. M.

1986-01-01

An Advanced Food Hardware System galley for the initial operating capability (IOC) Space Station is discussed. Space Station will employ food hardware items that have never been flown in space, such as a dishwasher, microwave oven, blender/mixer, bulk food and beverage dispensers, automated food inventory management, a trash compactor, and an advanced technology refrigerator/freezer. These new technologies and designs are described and the trades, design, development, and testing associated with each are summarized.

Space biology initiative program definition review. Trade study 3: Hardware miniaturization versus cost

NASA Technical Reports Server (NTRS)

Jackson, L. Neal; Crenshaw, John, Sr.; Davidson, William L.; Herbert, Frank J.; Bilodeau, James W.; Stoval, J. Michael; Sutton, Terry

1989-01-01

The optimum hardware miniaturization level with the lowest cost impact for space biology hardware was determined. Space biology hardware and/or components/subassemblies/assemblies which are the most likely candidates for application of miniaturization are to be defined and relative cost impacts of such miniaturization are to be analyzed. A mathematical or statistical analysis method with the capability to support development of parametric cost analysis impacts for levels of production design miniaturization are provided.

No-hardware-signature cybersecurity-crypto-module: a resilient cyber defense agent

NASA Astrophysics Data System (ADS)

Zaghloul, A. R. M.; Zaghloul, Y. A.

2014-06-01

We present an optical cybersecurity-crypto-module as a resilient cyber defense agent. It has no hardware signature since it is bitstream reconfigurable, where single hardware architecture functions as any selected device of all possible ones of the same number of inputs. For a two-input digital device, a 4-digit bitstream of 0s and 1s determines which device, of a total of 16 devices, the hardware performs as. Accordingly, the hardware itself is not physically reconfigured, but its performance is. Such a defense agent allows the attack to take place, rendering it harmless. On the other hand, if the system is already infected with malware sending out information, the defense agent allows the information to go out, rendering it meaningless. The hardware architecture is immune to side attacks since such an attack would reveal information on the attack itself and not on the hardware. This cyber defense agent can be used to secure a point-to-point, point-to-multipoint, a whole network, and/or a single entity in the cyberspace. Therefore, ensuring trust between cyber resources. It can provide secure communication in an insecure network. We provide the hardware design and explain how it works. Scalability of the design is briefly discussed. (Protected by United States Patents No.: US 8,004,734; US 8,325,404; and other National Patents worldwide.)

Design of Measure and Control System for Precision Pesticide Deploying Dynamic Simulating Device

NASA Astrophysics Data System (ADS)

Liang, Yong; Liu, Pingzeng; Wang, Lu; Liu, Jiping; Wang, Lang; Han, Lei; Yang, Xinxin

A measure and control system for precision deploying pesticide simulating equipment is designed in order to study pesticide deployment technology. The system can simulate every state of practical pesticide deployment, and carry through precise, simultaneous measure to every factor affecting pesticide deployment effects. The hardware and software incorporates a structural design of modularization. The system is divided into many different function modules of hardware and software, and exploder corresponding modules. The modules’ interfaces are uniformly defined, which is convenient for module connection, enhancement of system’s universality, explodes efficiency and systemic reliability, and make the program’s characteristics easily extended and easy maintained. Some relevant hardware and software modules can be adapted to other measures and control systems easily. The paper introduces the design of special numeric control system, the main module of information acquisition system and the speed acquisition module in order to explain the design process of the module.

Fast BPM data distribution for global orbit feedback using commercial gigabit ethernet technology

DOE Office of Scientific and Technical Information (OSTI.GOV)

Hulsart, R.; Cerniglia, P.; Michnoff, R.

2011-03-28

In order to correct beam perturbations in RHIC around 10Hz, a new fast data distribution network was required to deliver BPM position data at rates several orders of magnitude above the capability of the existing system. The urgency of the project limited the amount of custom hardware that could be developed, which dictated the use of as much commercially available equipment as possible. The selected architecture uses a custom hardware interface to the existing RHIC BPM electronics together with commercially available Gigabit Ethernet switches to distribute position data to devices located around the collider ring. Using the minimum Ethernet packetmore » size and a field programmable gate array (FPGA) based state machine logic instead of a software based driver, real-time and deterministic data delivery is possible using Ethernet. The method of adapting this protocol for low latency data delivery, bench testing of Ethernet hardware, and the logic to construct Ethernet packets using FPGA hardware will be discussed. A robust communications system using almost all commercial off-the-shelf equipment was developed in under a year which enabled retrofitting of the existing RHIC BPM system to provide 10 KHz data delivery for a global orbit feedback scheme using 72 BPMs. Total latencies from data acquisition at the BPMs to delivery at the controller modules, including very long transmission distances, were kept under 100 {micro}s, which provide very little phase error in correcting the 10 Hz oscillations. Leveraging off of the speed of Gigabit Ethernet and wide availability of Ethernet products enabled this solution to be fully implemented in a much shorter time and at lower cost than if a similar network was developed using a proprietary method.« less

Current Progresses of Midass: Microbial Detection in Air System for Space

NASA Astrophysics Data System (ADS)

Abaibou, Hafid; Lasseur, Christophe; Mabilat, Claude; Storrs-Mabilat, Michele; Guy, Michel; Raffestin, Stephanie; Sole Bosquet, Jaume

For the long term manned missions, microbial contamination is a major risk for crew members and hardware. This risk has first been documented by Russian scientists then by other organizations as a consequence of the contamination of metabolic consumables (water, air), and also the hardware degradation. Rapid molecular biology techniques offer an attractive alternative to traditional culture-based methods. They allow fast time to results for contamination detection and quick implementation of appropriate corrective action when required. However, to date, there are no such available system due to the technical challenges required to meet the sensitivity and specificity needs of the test and the requirement for full automation, from sampling to results interpretation. In response to this, over the last decade, the European Space Agency (ESA) and bioMérieux initiated a co-development of MIDASS, the world’s first fully automated system for the monitoring of the environmental microbial load in confined spaces, including clean rooms and hospital wards. The system is based on molecular technologies (sample preparation/amplification/detection) and enables rapid and simple determination of the microbiological contamination level in less than 3 hours. It relies on NASBA-amplification for the detection of selected micro-organisms (indicators or pathogens) at determined risk-levels (200 and 1 CFU /m3 air, respectively). Successful progresses were recently made for the space-application workpackage of this project: a lab-on-a-card design for air-testing in a first scope was endorsed by a successful ESA Preliminary Design Review, paving the way to spatialization steps (phases C and D). Data will be presented with regards to system design and biological performances.

A Neuromorphic Architecture for Object Recognition and Motion Anticipation Using Burst-STDP

PubMed Central

Balduzzi, David; Tononi, Giulio

2012-01-01

In this work we investigate the possibilities offered by a minimal framework of artificial spiking neurons to be deployed in silico. Here we introduce a hierarchical network architecture of spiking neurons which learns to recognize moving objects in a visual environment and determine the correct motor output for each object. These tasks are learned through both supervised and unsupervised spike timing dependent plasticity (STDP). STDP is responsible for the strengthening (or weakening) of synapses in relation to pre- and post-synaptic spike times and has been described as a Hebbian paradigm taking place both in vitro and in vivo. We utilize a variation of STDP learning, called burst-STDP, which is based on the notion that, since spikes are expensive in terms of energy consumption, then strong bursting activity carries more information than single (sparse) spikes. Furthermore, this learning algorithm takes advantage of homeostatic renormalization, which has been hypothesized to promote memory consolidation during NREM sleep. Using this learning rule, we design a spiking neural network architecture capable of object recognition, motion detection, attention towards important objects, and motor control outputs. We demonstrate the abilities of our design in a simple environment with distractor objects, multiple objects moving concurrently, and in the presence of noise. Most importantly, we show how this neural network is capable of performing these tasks using a simple leaky-integrate-and-fire (LIF) neuron model with binary synapses, making it fully compatible with state-of-the-art digital neuromorphic hardware designs. As such, the building blocks and learning rules presented in this paper appear promising for scalable fully neuromorphic systems to be implemented in hardware chips. PMID:22615855

Design and implementation of digital controllers for smart structures using field-programmable gate arrays

NASA Astrophysics Data System (ADS)

Kelly, Jamie S.; Bowman, Hiroshi C.; Rao, Vittal S.; Pottinger, Hardy J.

1997-06-01

Implementation issues represent an unfamiliar challenge to most control engineers, and many techniques for controller design ignore these issues outright. Consequently, the design of controllers for smart structural systems usually proceeds without regard for their eventual implementation, thus resulting either in serious performance degradation or in hardware requirements that squander power, complicate integration, and drive up cost. The level of integration assumed by the Smart Patch further exacerbates these difficulties, and any design inefficiency may render the realization of a single-package sensor-controller-actuator system infeasible. The goal of this research is to automate the controller implementation process and to relieve the design engineer of implementation concerns like quantization, computational efficiency, and device selection. We specifically target Field Programmable Gate Arrays (FPGAs) as our hardware platform because these devices are highly flexible, power efficient, and reprogrammable. The current study develops an automated implementation sequence that minimizes hardware requirements while maintaining controller performance. Beginning with a state space representation of the controller, the sequence automatically generates a configuration bitstream for a suitable FPGA implementation. MATLAB functions optimize and simulate the control algorithm before translating it into the VHSIC hardware description language. These functions improve power efficiency and simplify integration in the final implementation by performing a linear transformation that renders the controller computationally friendly. The transformation favors sparse matrices in order to reduce multiply operations and the hardware necessary to support them; simultaneously, the remaining matrix elements take on values that minimize limit cycles and parameter sensitivity. The proposed controller design methodology is implemented on a simple cantilever beam test structure using FPGA hardware. The experimental closed loop response is compared with that of an automated FPGA controller implementation. Finally, we explore the integration of FPGA based controllers into a multi-chip module, which we believe represents the next step towards the realization of the Smart Patch.

From Goal-Oriented Requirements to Event-B Specifications

NASA Technical Reports Server (NTRS)

Aziz, Benjamin; Arenas, Alvaro E.; Bicarregui, Juan; Ponsard, Christophe; Massonet, Philippe

2009-01-01

In goal-oriented requirements engineering methodologies, goals are structured into refinement trees from high-level system-wide goals down to fine-grained requirements assigned to specific software/ hardware/human agents that can realise them. Functional goals assigned to software agents need to be operationalised into specification of services that the agent should provide to realise those requirements. In this paper, we propose an approach for operationalising requirements into specifications expressed in the Event-B formalism. Our approach has the benefit of aiding software designers by bridging the gap between declarative requirements and operational system specifications in a rigorous manner, enabling powerful correctness proofs and allowing further refinements down to the implementation level. Our solution is based on verifying that a consistent Event-B machine exhibits properties corresponding to requirements.

Controls in new construction reactors-factory testing of the non-safety portion of the Lungmen nuclear power plant distributed control system

DOE Office of Scientific and Technical Information (OSTI.GOV)

Wu, Y. S.; Dick, J. W.; Tetirick, C. W.

2006-07-01

The construction permit for Taipower's Lungmen Nuclear Units 1 and 2, two ABWR plants, was issued on March 17, 1999[1], The construction of these units is progressing actively at site. The digital I and C system supplied by GE, which is designated as the Distributed Control and Information System (DCIS) in this project, is being implemented primarily at one vendor facility. In order to ensure the reliability, safety and availability of the DCIS, it is required to comprehensively test the whole DCIS in factory. This article describes the test requirements and acceptance criteria for functional testing of the Non-Safety Distributedmore » Control and Information system (DCIS) for Taiwan Power's Lungmen Units 1 and 2 GE selected Invensys as the equipment supplier for this Non-Safety portion of DCIS. The DCIS system of the Lungmen Units is a physically distributed control system. Field transmitters are connected to hard I/O terminal inputs on the Invensys I/A system. Once the signal is digitized on FBMs (Field Bus Modules) in Remote Multiplexing Units (RMUs), the signal is passed into an integrated control software environment. Control is based on the concept of compounds and blocks where each compound is a logical collection of blocks that performs a control function. Each point identified by control compound and block can be individually used throughout the DCIS system by referencing its unique name. In the Lungmen Project control logic and HSI (Human System Interface) requirements are divided into individual process systems called MPLs (Master Parts List). Higher-level Plant Computer System (PCS) algorithms access control compounds and blocks in these MPLs to develop functions. The test requirements and acceptance criteria for the DCIS system of the Lungmen Project are divided into three general categories (see 1,2,3 below) of verification, which in turn are divided into several specific tests: 1. DCIS System Physical Checks a) RMU Test - To confirm that the hard I/O database is installed on the DCIS and is physically addressed correctly. Test process is injecting a signal at each DCIS hard I/O terminal boundary and verifying correct receipt on the DCIS. b) DCIS Network Stress Test - Confirms system viability under extreme high load conditions beyond the plant could ever experience. Load conditions include alarm showers on the DCIS system to emulate plant upsets. c) System Hardware Configuration Test - These are typical checks of the DCIS system hardware including fault reporting, redundancy, and normal computer functions. d) Performance Test - Test confirms high level hardware and system capability attributes such as control system time response, 'cold start' reboots, and processor loading e) Electromagnetic compatibility tests - To verify the electromagnetic viability of the system and individual components 2. Implementation of Plant Systems and Systems Integration a) MPL Logic Tests -To confirm control functions implemented to system logic performs as expected, and that parameters are passed correctly between system control schemes. b) Data Link (Gateway) Tests- To verify third party interfaces to the DCIS. c) Plant Computer System (PCS) Logic Tests- Tests to verify that higher-level PCS logic is correctly implemented, performs as expected, and parameters are passed correctly between PCS sub-systems and MPL systems. Included the PCS sub-systems, Safety Parameter Display System, Historian, Alarms, Maintenance monitoring etc. 3. Unique Third Party Interfacing and Integration into the DCIS The set of controls for Automatic Power Regulation, Feedwater, and Recirculation Flow are specific in that these systems are implemented on third party Triple Modular Redundant (TMR) hardware, which was connected to the DCIS and are tested via full simulation. The TMR system is supplied by GE Control Solutions on the Mark Vie platform. (authors)« less

Compiler-assisted multiple instruction rollback recovery using a read buffer

NASA Technical Reports Server (NTRS)

Alewine, N. J.; Chen, S.-K.; Fuchs, W. K.; Hwu, W.-M.

1993-01-01

Multiple instruction rollback (MIR) is a technique that has been implemented in mainframe computers to provide rapid recovery from transient processor failures. Hardware-based MIR designs eliminate rollback data hazards by providing data redundancy implemented in hardware. Compiler-based MIR designs have also been developed which remove rollback data hazards directly with data-flow transformations. This paper focuses on compiler-assisted techniques to achieve multiple instruction rollback recovery. We observe that some data hazards resulting from instruction rollback can be resolved efficiently by providing an operand read buffer while others are resolved more efficiently with compiler transformations. A compiler-assisted multiple instruction rollback scheme is developed which combines hardware-implemented data redundancy with compiler-driven hazard removal transformations. Experimental performance evaluations indicate improved efficiency over previous hardware-based and compiler-based schemes.

Failure Analysis Results and Corrective Actions Implemented for the Extravehicular Mobility Unit 3011 Water in the Helmet Mishap

NASA Technical Reports Server (NTRS)

Steele, John; Metselaar, Carol; Peyton, Barbara; Rector, Tony; Rossato, Robert; Macias, Brian; Weigel, Dana; Holder, Don

2015-01-01

Water entered the Extravehicular Mobility Unit (EMU) helmet during extravehicular activity (EVA) no. 23 aboard the International Space Station on July 16, 2013, resulting in the termination of the EVA approximately 1 hour after it began. It was estimated that 1.5 liters of water had migrated up the ventilation loop into the helmet, adversely impacting the astronaut's hearing, vision, and verbal communication. Subsequent on-board testing and ground-based test, tear-down, and evaluation of the affected EMU hardware components determined that the proximate cause of the mishap was blockage of all water separator drum holes with a mixture of silica and silicates. The blockages caused a failure of the water separator degassing function, which resulted in EMU cooling water spilling into the ventilation loop, migrating around the circulating fan, and ultimately pushing into the helmet. The root cause of the failure was determined to be ground-processing shortcomings of the Airlock Cooling Loop Recovery (ALCLR) Ion Filter Beds, which led to various levels of contaminants being introduced into the filters before they left the ground. Those contaminants were thereafter introduced into the EMU hardware on-orbit during ALCLR scrubbing operations. This paper summarizes the failure analysis results along with identified process, hardware, and operational corrective actions that were implemented as a result of findings from this investigation.

Failure Analysis Results and Corrective Actions Implemented for the EMU 3011 Water in the Helmet Mishap

NASA Technical Reports Server (NTRS)

Steele, John; Metselaar, Carol; Peyton, Barbara; Rector, Tony; Rossato, Robert; Macias, Brian; Weigel, Dana; Holder, Don

2015-01-01

During EVA (Extravehicular Activity) No. 23 aboard the ISS (International Space Station) on 07/16/2013 water entered the EMU (Extravehicular Mobility Unit) helmet resulting in the termination of the EVA (Extravehicular Activity) approximately 1-hour after it began. It was estimated that 1.5-L of water had migrated up the ventilation loop into the helmet, adversely impacting the astronauts hearing, vision and verbal communication. Subsequent on-board testing and ground-based TT and E (Test, Tear-down and Evaluation) of the affected EMU hardware components led to the determination that the proximate cause of the mishap was blockage of all water separator drum holes with a mixture of silica and silicates. The blockages caused a failure of the water separator function which resulted in EMU cooling water spilling into the ventilation loop, around the circulating fan, and ultimately pushing into the helmet. The root cause of the failure was determined to be ground-processing short-comings of the ALCLR (Airlock Cooling Loop Recovery) Ion Filter Beds which led to various levels of contaminants being introduced into the Filters before they left the ground. Those contaminants were thereafter introduced into the EMU hardware on-orbit during ALCLR scrubbing operations. This paper summarizes the failure analysis results along with identified process, hardware and operational corrective actions that were implemented as a result of findings from this investigation.

Software compensation of eddy current fields in multislice high order dynamic shimming.

PubMed

Sengupta, Saikat; Avison, Malcolm J; Gore, John C; Brian Welch, E

2011-06-01

Dynamic B(0) shimming (DS) can produce better field homogeneity than static global shimming by dynamically updating slicewise shim values in a multislice acquisition. The performance of DS however is limited by eddy current fields produced by the switching of 2nd and 3rd order unshielded shims. In this work, we present a novel method of eddy field compensation (EFC) applied to higher order shim induced eddy current fields in multislice DS. This method does not require shim shielding, extra hardware for eddy current compensation or subject specific prescanning. The interactions between shim harmonics are modeled assuming steady state of the medium and long time constant, cross and self term eddy fields in a DS experiment and 'correction factors' characterizing the entire set of shim interactions are derived. The correction factors for a given time between shim switches are shown to be invariable with object scanned, shim switching pattern and actual shim values, allowing for their generalized prospective use. Phantom and human head, 2nd and 3rd order DS experiments performed without any hardware eddy current compensation using the technique show large reductions in field gradients and offsets leading to significant improvements in image quality. This method holds promise as an alternative to expensive hardware based eddy current compensation required in 2nd and 3rd order DS. Copyright © 2011 Elsevier Inc. All rights reserved.

Development and Application of a Portable Health Algorithms Test System

NASA Technical Reports Server (NTRS)

Melcher, Kevin J.; Fulton, Christopher E.; Maul, William A.; Sowers, T. Shane

2007-01-01

This paper describes the development and initial demonstration of a Portable Health Algorithms Test (PHALT) System that is being developed by researchers at the NASA Glenn Research Center (GRC). The PHALT System was conceived as a means of evolving the maturity and credibility of algorithms developed to assess the health of aerospace systems. Comprising an integrated hardware-software environment, the PHALT System allows systems health management algorithms to be developed in a graphical programming environment; to be tested and refined using system simulation or test data playback; and finally, to be evaluated in a real-time hardware-in-the-loop mode with a live test article. In this paper, PHALT System development is described through the presentation of a functional architecture, followed by the selection and integration of hardware and software. Also described is an initial real-time hardware-in-the-loop demonstration that used sensor data qualification algorithms to diagnose and isolate simulated sensor failures in a prototype Power Distribution Unit test-bed. Success of the initial demonstration is highlighted by the correct detection of all sensor failures and the absence of any real-time constraint violations.

Effects of Augmented Reality on Student Achievement and Self-Efficacy in Vocational Education and Training

ERIC Educational Resources Information Center

Sirakaya, Mustafa; Cakmak, Ebru Kilic

2018-01-01

This study aimed to test the impact of augmented reality (AR) use on student achievement and self-efficacy in vocational education and training. For this purpose, a marker-based AR application, called HardwareAR, was developed. HardwareAR provides information about characteristics of hardware components, ports and assembly. The research design was…

A Flexible Hardware Test and Demonstration Platform for the Fractionated System Architecture YETE

NASA Astrophysics Data System (ADS)

Kempf, Florian; Haber, Roland; Tzschichholz, Tristan; Mikschl, Tobias; Hilgarth, Alexander; Montenegro, Sergio; Schilling, Klaus

2016-08-01

This paper introduces a hardware-in-the loop test and demonstration platform for the YETE system architecture for fractionated spacecraft. It is designed for rapid prototyping and testing of distributed control approaches for the YETE architecture subject to varying network topologies and transmission channel properties between the individual YETE hardware nodes.

Automated culture system experiments hardware: developing test results and design solutions.

PubMed

Freddi, M; Covini, M; Tenconi, C; Ricci, C; Caprioli, M; Cotronei, V

2002-07-01

The experiment proposed by Prof. Ricci University of Milan is funded by ASI with Laben as industrial Prime Contractor. ACS-EH (Automated Culture System-Experiment Hardware) will support the multigenerational experiment on weightlessness with rotifers and nematodes within four Experiment Containers (ECs) located inside the European Modular Cultivation System (EMCS) facility..Actually the Phase B is in progress and a concept design solution has been defined. The most challenging aspects for the design of such hardware are, from biological point of view the provision of an environment which permits animal's survival and to maintain desiccated generations separated and from the technical point of view, the miniaturisation of the hardware itself due to the reduce EC provided volume (160mmx60mmx60mm). The miniaturisation will allow a better use of the available EMCS Facility resources (e.g. volume. power etc.) and to fulfil the experiment requirements. ACS-EH, will be ready to fly in the year 2005 on boar the ISS.

Extending the Capture Volume of an Iris Recognition System Using Wavefront Coding and Super-Resolution.

PubMed

Hsieh, Sheng-Hsun; Li, Yung-Hui; Tien, Chung-Hao; Chang, Chin-Chen

2016-12-01

Iris recognition has gained increasing popularity over the last few decades; however, the stand-off distance in a conventional iris recognition system is too short, which limits its application. In this paper, we propose a novel hardware-software hybrid method to increase the stand-off distance in an iris recognition system. When designing the system hardware, we use an optimized wavefront coding technique to extend the depth of field. To compensate for the blurring of the image caused by wavefront coding, on the software side, the proposed system uses a local patch-based super-resolution method to restore the blurred image to its clear version. The collaborative effect of the new hardware design and software post-processing showed great potential in our experiment. The experimental results showed that such improvement cannot be achieved by using a hardware-or software-only design. The proposed system can increase the capture volume of a conventional iris recognition system by three times and maintain the system's high recognition rate.

Anthropometric Accommodation in Space Suit Design

NASA Technical Reports Server (NTRS)

Rajulu, Sudhakar; Thaxton, Sherry

2007-01-01

Design requirements for next generation hardware are in process at NASA. Anthropometry requirements are given in terms of minimum and maximum sizes for critical dimensions that hardware must accommodate. These dimensions drive vehicle design and suit design, and implicitly have an effect on crew selection and participation. At this stage in the process, stakeholders such as cockpit and suit designers were asked to provide lists of dimensions that will be critical for their design. In addition, they were asked to provide technically feasible minimum and maximum ranges for these dimensions. Using an adjusted 1988 Anthropometric Survey of U.S. Army (ANSUR) database to represent a future astronaut population, the accommodation ranges provided by the suit critical dimensions were calculated. This project involved participation from the Anthropometry and Biomechanics facility (ABF) as well as suit designers, with suit designers providing expertise about feasible hardware dimensions and the ABF providing accommodation analysis. The initial analysis provided the suit design team with the accommodation levels associated with the critical dimensions provided early in the study. Additional outcomes will include a comparison of principal components analysis as an alternate method for anthropometric analysis.

Project SERAPHIM Report.

ERIC Educational Resources Information Center

Moore, John W.

1983-01-01

Lists and briefly describes computer programs recently added to those currently available from Project SERAPHIM. Program name, subject, hardware, author, supplier, and cost are provided in separate listings for Apple, PET, TRS-80 I or III, IBM, VIC-20, TERAK, and PDP-11 microcomputers. Includes corrections for two current Apple programs. (JN)

Parallel Guessing: A Strategy for High-Speed Computation

DTIC Science & Technology

1984-09-19

for using additional hardware to obtain higher processing speed). In this paper we argue that parallel guessing for image analysis is a useful...from a true solution, or the correctness of a guess, can be readily checked. We review image - analysis algorithms having a parallel guessing or

Error detection method

DOEpatents

Olson, Eric J.

2013-06-11

An apparatus, program product, and method that run an algorithm on a hardware based processor, generate a hardware error as a result of running the algorithm, generate an algorithm output for the algorithm, compare the algorithm output to another output for the algorithm, and detect the hardware error from the comparison. The algorithm is designed to cause the hardware based processor to heat to a degree that increases the likelihood of hardware errors to manifest, and the hardware error is observable in the algorithm output. As such, electronic components may be sufficiently heated and/or sufficiently stressed to create better conditions for generating hardware errors, and the output of the algorithm may be compared at the end of the run to detect a hardware error that occurred anywhere during the run that may otherwise not be detected by traditional methodologies (e.g., due to cooling, insufficient heat and/or stress, etc.).

Long life assurance study for manned spacecraft long life hardware. Volume 1: Summary of long life assurance guidelines

NASA Technical Reports Server (NTRS)

1972-01-01

A long life assurance program for the development of design, process, test, and application guidelines for achieving reliable spacecraft hardware was conducted. The study approach consisted of a review of technical data performed concurrently with a survey of the aerospace industry. The data reviewed included design and operating characteristics, failure histories and solutions, and similar documents. The topics covered by the guidelines are reported. It is concluded that long life hardware is achieved through meticulous attention to many details and no simple set of rules can suffice.

Lessons learnt on biases and uncertainties in personal exposure measurement surveys of radiofrequency electromagnetic fields with exposimeters.

PubMed

Bolte, John F B

2016-09-01

Personal exposure measurements of radio frequency electromagnetic fields are important for epidemiological studies and developing prediction models. Minimizing biases and uncertainties and handling spatial and temporal variability are important aspects of these measurements. This paper reviews the lessons learnt from testing the different types of exposimeters and from personal exposure measurement surveys performed between 2005 and 2015. Applying them will improve the comparability and ranking of exposure levels for different microenvironments, activities or (groups of) people, such that epidemiological studies are better capable of finding potential weak correlations with health effects. Over 20 papers have been published on how to prevent biases and minimize uncertainties due to: mechanical errors; design of hardware and software filters; anisotropy; and influence of the body. A number of biases can be corrected for by determining multiplicative correction factors. In addition a good protocol on how to wear the exposimeter, a sufficiently small sampling interval and sufficiently long measurement duration will minimize biases. Corrections to biases are possible for: non-detects through detection limit, erroneous manufacturer calibration and temporal drift. Corrections not deemed necessary, because no significant biases have been observed, are: linearity in response and resolution. Corrections difficult to perform after measurements are for: modulation/duty cycle sensitivity; out of band response aka cross talk; temperature and humidity sensitivity. Corrections not possible to perform after measurements are for: multiple signals detection in one band; flatness of response within a frequency band; anisotropy to waves of different elevation angle. An analysis of 20 microenvironmental surveys showed that early studies using exposimeters with logarithmic detectors, overestimated exposure to signals with bursts, such as in uplink signals from mobile phones and WiFi appliances. Further, the possible corrections for biases have not been fully applied. The main findings are that if the biases are not corrected for, the actual exposure will on average be underestimated. Copyright © 2016 Elsevier Ltd. All rights reserved.

Three-Dimensional Nanobiocomputing Architectures With Neuronal Hypercells

DTIC Science & Technology

2007-06-01

Neumann architectures, and CMOS fabrication. Novel solutions of massive parallel distributed computing and processing (pipelined due to systolic... and processing platforms utilizing molecular hardware within an enabling organization and architecture. The design technology is based on utilizing a...Microsystems and Nanotechnologies investigated a novel 3D3 (Hardware Software Nanotechnology) technology to design super-high performance computing

Marketing and Distributive Education Curriculum Guide: Hardware-Building Materials, Farm and Garden.

ERIC Educational Resources Information Center

Cluck, Janice Bora

Designed to be used with the General Marketing Curriculum Planning Guide (ED 156 860), this guide is intended to provide the curriculum coordinator with a basis for planning a comprehensive program in the field of marketing for farm and garden hardware building materials; it is designed also to allow marketing and distributive education…

A Systematic Software, Firmware, and Hardware Codesign Methodology for Digital Signal Processing

DTIC Science & Technology

2014-03-01

possible mappings ...................................................60 Table 25. Possible optimal leaf -nodes... size weight and power UAV unmanned aerial vehicle UHF ultra-high frequency UML universal modeling language Verilog verify logic VHDL VHSIC...optimal leaf -nodes to some design patterns for embedded system design. Software and hardware partitioning is a very difficult challenge in the field of

Organizational Analysis of the United States Army Evaluation Center

DTIC Science & Technology

2014-12-01

analysis of qualitative or quantitative data obtained from design reviews, hardware inspections, M&S, hardware and software testing , metrics review... Research Development Test & Evaluation (RDT&E) appropriation account. The Defense Acquisition Portal ACQuipedia website describes RDT&E as “ one of the... research , design , development, test and evaluation, production, installation, operation, and maintenance; data collection; processing and analysis

Reliability achievement in high technology space systems

NASA Technical Reports Server (NTRS)

Lindstrom, D. L.

1981-01-01

The production of failure-free hardware is discussed. The elements required to achieve such hardware are: technical expertise to design, analyze, and fully understand the design; use of high reliability parts and materials control in the manufacturing process; and testing to understand the system and weed out defects. The durability of the Hughes family of satellites is highlighted.

Error protection capability of space shuttle data bus designs

NASA Technical Reports Server (NTRS)

Proch, G. E.

1974-01-01

Error protection assurance in the reliability of digital data communications is discussed. The need for error protection on the space shuttle data bus system has been recognized and specified as a hardware requirement. The error protection techniques of particular concern are those designed into the Shuttle Main Engine Interface (MEI) and the Orbiter Multiplex Interface Adapter (MIA). The techniques and circuit design details proposed for these hardware are analyzed in this report to determine their error protection capability. The capability is calculated in terms of the probability of an undetected word error. Calculated results are reported for a noise environment that ranges from the nominal noise level stated in the hardware specifications to burst levels which may occur in extreme or anomalous conditions.

Thruster-Specific Force Estimation and Trending of Cassini Hydrazine Thrusters at Saturn

NASA Technical Reports Server (NTRS)

Stupik, Joan; Burk, Thomas A.

2016-01-01

The Cassini spacecraft has been in orbit around Saturn since 2004 and has since been approved for both a first and second extended mission. As hardware reaches and exceeds its documented life expectancy, it becomes vital to closely monitor hardware performance. The performance of the 1-N hydrazine attitude control thrusters is especially important to study, because the spacecraft is currently operating on the back-up thruster branch. Early identification of hardware degradation allows more time to develop mitigation strategies. There is no direct measure of an individual thruster's thrust magnitude, but these values can be estimated by post-processing spacecraft telemetry. This paper develops an algorithm to calculate the individual thrust magnitudes using Euler's equation. The algorithm correctly shows the known degradation in the first thruster branch, validating the approach. Results for the current thruster branch show nominal performance as of August, 2015.

The use of COSMIC NASTRAN in an integrated conceptual design environment

NASA Technical Reports Server (NTRS)

White, Gil

1989-01-01

Changes in both software and hardware are rapidly bringing conceptual engineering tools like finite element analysis into mainstream mechanical design. Systems that integrate all phases of the manufacturing process provide the most cost benefits. The application of programming concepts like object oriented programming allow for the encapsulation of intelligent data within the design geometry. This combined with declining cost in per seat hardware bring new alternatives to the user.

Static analysis techniques for semiautomatic synthesis of message passing software skeletons

DOE PAGES

Sottile, Matthew; Dagit, Jason; Zhang, Deli; ...

2015-06-29

The design of high-performance computing architectures demands performance analysis of large-scale parallel applications to derive various parameters concerning hardware design and software development. The process of performance analysis and benchmarking an application can be done in several ways with varying degrees of fidelity. One of the most cost-effective ways is to do a coarse-grained study of large-scale parallel applications through the use of program skeletons. The concept of a “program skeleton” that we discuss in this article is an abstracted program that is derived from a larger program where source code that is determined to be irrelevant is removed formore » the purposes of the skeleton. In this work, we develop a semiautomatic approach for extracting program skeletons based on compiler program analysis. Finally, we demonstrate correctness of our skeleton extraction process by comparing details from communication traces, as well as show the performance speedup of using skeletons by running simulations in the SST/macro simulator.« less

Concept and development of a computerized positioning of prosthetic teeth for complete dentures.

PubMed

Busch, M; Kordass, B

2006-04-01

To date, CAD/CAM technology has made no noteworthy inroads into removable dentures. We want to present a new area of application for this in our study. Models of the maxilla and edentulous mandible were 3D scanned. The software detects and automatically reconstructs the reference structures that are anatomically important for the set-up of artificial teeth, such as the alveolar ridge centerlines and the interalveolar relations between the alveolar ridges. In a further step, the occlusal plane is semiautomatically defined and the front dental arch is designed. After these design features have been determined, artificial teeth are selected from a database and set up automatically. The dental technician can assess the esthetics and function of the suggested dental set-up on the computer screen and make slight corrections if necessary. Summarizing: The interplay of hardware and software components within on integrated solution including conversion of the "virtual" into a real positioning of prosthetic teeth is presented.

Airborne and Ground-Based Measurements Using a High-Performance Raman Lidar. Part 2; Ground Based

NASA Technical Reports Server (NTRS)

Whiteman, David N.; Cadirola, Martin; Venable, Demetrius; Connell, Rasheen; Rush, Kurt; Leblanc, Thierry; McDermid, Stuart

2009-01-01

The same RASL hardware as described in part I was installed in a ground-based mobile trailer and used in a water vapor lidar intercomparison campaign, hosted at Table Mountain, CA, under the auspices of the Network for the Detection of Atmospheric Composition Change (NDACC). The converted RASL hardware demonstrated high sensitivity to lower stratospheric water vapor indicating that profiling water vapor at those altitudes with sufficient accuracy to monitor climate change is possible. The measurements from Table Mountain also were used to explain the reason, and correct , for sub-optimal airborne aerosol extinction performance during the flight campaign.

A Low-Complexity and High-Performance 2D Look-Up Table for LDPC Hardware Implementation

NASA Astrophysics Data System (ADS)

Chen, Jung-Chieh; Yang, Po-Hui; Lain, Jenn-Kaie; Chung, Tzu-Wen

In this paper, we propose a low-complexity, high-efficiency two-dimensional look-up table (2D LUT) for carrying out the sum-product algorithm in the decoding of low-density parity-check (LDPC) codes. Instead of employing adders for the core operation when updating check node messages, in the proposed scheme, the main term and correction factor of the core operation are successfully merged into a compact 2D LUT. Simulation results indicate that the proposed 2D LUT not only attains close-to-optimal bit error rate performance but also enjoys a low complexity advantage that is suitable for hardware implementation.

Innovations in Small-Animal PET/MR Imaging Instrumentation.

PubMed

Tsoumpas, Charalampos; Visvikis, Dimitris; Loudos, George

2016-04-01

Multimodal imaging has led to a more detailed exploration of different physiologic processes with integrated PET/MR imaging being the most recent entry. Although the clinical need is still questioned, it is well recognized that it represents one of the most active and promising fields of medical imaging research in terms of software and hardware. The hardware developments have moved from small detector components to high-performance PET inserts and new concepts in full systems. Conversely, the software focuses on the efficient performance of necessary corrections without the use of CT data. The most recent developments in both directions are reviewed. Copyright © 2016 Elsevier Inc. All rights reserved.

Integrated Application of Active Controls (IAAC) technology to an advanced subsonic transport project: Test act system validation

NASA Technical Reports Server (NTRS)

1985-01-01

The primary objective of the Test Active Control Technology (ACT) System laboratory tests was to verify and validate the system concept, hardware, and software. The initial lab tests were open loop hardware tests of the Test ACT System as designed and built. During the course of the testing, minor problems were uncovered and corrected. Major software tests were run. The initial software testing was also open loop. These tests examined pitch control laws, wing load alleviation, signal selection/fault detection (SSFD), and output management. The Test ACT System was modified to interface with the direct drive valve (DDV) modules. The initial testing identified problem areas with DDV nonlinearities, valve friction induced limit cycling, DDV control loop instability, and channel command mismatch. The other DDV issue investigated was the ability to detect and isolate failures. Some simple schemes for failure detection were tested but were not completely satisfactory. The Test ACT System architecture continues to appear promising for ACT/FBW applications in systems that must be immune to worst case generic digital faults, and be able to tolerate two sequential nongeneric faults with no reduction in performance. The challenge in such an implementation would be to keep the analog element sufficiently simple to achieve the necessary reliability.

Expert system for UNIX system reliability and availability enhancement

NASA Astrophysics Data System (ADS)

Xu, Catherine Q.

1993-02-01

Highly reliable and available systems are critical to the airline industry. However, most off-the-shelf computer operating systems and hardware do not have built-in fault tolerant mechanisms, the UNIX workstation is one example. In this research effort, we have developed a rule-based Expert System (ES) to monitor, command, and control a UNIX workstation system with hot-standby redundancy. The ES on each workstation acts as an on-line system administrator to diagnose, report, correct, and prevent certain types of hardware and software failures. If a primary station is approaching failure, the ES coordinates the switch-over to a hot-standby secondary workstation. The goal is to discover and solve certain fatal problems early enough to prevent complete system failure from occurring and therefore to enhance system reliability and availability. Test results show that the ES can diagnose all targeted faulty scenarios and take desired actions in a consistent manner regardless of the sequence of the faults. The ES can perform designated system administration tasks about ten times faster than an experienced human operator. Compared with a single workstation system, our hot-standby redundancy system downtime is predicted to be reduced by more than 50 percent by using the ES to command and control the system.

Expert System for UNIX System Reliability and Availability Enhancement

NASA Technical Reports Server (NTRS)

Xu, Catherine Q.

1993-01-01

Highly reliable and available systems are critical to the airline industry. However, most off-the-shelf computer operating systems and hardware do not have built-in fault tolerant mechanisms, the UNIX workstation is one example. In this research effort, we have developed a rule-based Expert System (ES) to monitor, command, and control a UNIX workstation system with hot-standby redundancy. The ES on each workstation acts as an on-line system administrator to diagnose, report, correct, and prevent certain types of hardware and software failures. If a primary station is approaching failure, the ES coordinates the switch-over to a hot-standby secondary workstation. The goal is to discover and solve certain fatal problems early enough to prevent complete system failure from occurring and therefore to enhance system reliability and availability. Test results show that the ES can diagnose all targeted faulty scenarios and take desired actions in a consistent manner regardless of the sequence of the faults. The ES can perform designated system administration tasks about ten times faster than an experienced human operator. Compared with a single workstation system, our hot-standby redundancy system downtime is predicted to be reduced by more than 50 percent by using the ES to command and control the system.

FocusStack and StimServer: a new open source MATLAB toolchain for visual stimulation and analysis of two-photon calcium neuronal imaging data.

PubMed

Muir, Dylan R; Kampa, Björn M

2014-01-01

Two-photon calcium imaging of neuronal responses is an increasingly accessible technology for probing population responses in cortex at single cell resolution, and with reasonable and improving temporal resolution. However, analysis of two-photon data is usually performed using ad-hoc solutions. To date, no publicly available software exists for straightforward analysis of stimulus-triggered two-photon imaging experiments. In addition, the increasing data rates of two-photon acquisition systems imply increasing cost of computing hardware required for in-memory analysis. Here we present a Matlab toolbox, FocusStack, for simple and efficient analysis of two-photon calcium imaging stacks on consumer-level hardware, with minimal memory footprint. We also present a Matlab toolbox, StimServer, for generation and sequencing of visual stimuli, designed to be triggered over a network link from a two-photon acquisition system. FocusStack is compatible out of the box with several existing two-photon acquisition systems, and is simple to adapt to arbitrary binary file formats. Analysis tools such as stack alignment for movement correction, automated cell detection and peri-stimulus time histograms are already provided, and further tools can be easily incorporated. Both packages are available as publicly-accessible source-code repositories.

FocusStack and StimServer: a new open source MATLAB toolchain for visual stimulation and analysis of two-photon calcium neuronal imaging data

PubMed Central

Muir, Dylan R.; Kampa, Björn M.

2015-01-01

Two-photon calcium imaging of neuronal responses is an increasingly accessible technology for probing population responses in cortex at single cell resolution, and with reasonable and improving temporal resolution. However, analysis of two-photon data is usually performed using ad-hoc solutions. To date, no publicly available software exists for straightforward analysis of stimulus-triggered two-photon imaging experiments. In addition, the increasing data rates of two-photon acquisition systems imply increasing cost of computing hardware required for in-memory analysis. Here we present a Matlab toolbox, FocusStack, for simple and efficient analysis of two-photon calcium imaging stacks on consumer-level hardware, with minimal memory footprint. We also present a Matlab toolbox, StimServer, for generation and sequencing of visual stimuli, designed to be triggered over a network link from a two-photon acquisition system. FocusStack is compatible out of the box with several existing two-photon acquisition systems, and is simple to adapt to arbitrary binary file formats. Analysis tools such as stack alignment for movement correction, automated cell detection and peri-stimulus time histograms are already provided, and further tools can be easily incorporated. Both packages are available as publicly-accessible source-code repositories1. PMID:25653614

Hardware problems encountered in solar heating and cooling systems

NASA Technical Reports Server (NTRS)

Cash, M.

1978-01-01

Numerous problems in the design, production, installation, and operation of solar energy systems are discussed. Described are hardware problems, which range from simple to obscure and complex, and their resolution.

Analyzing SystemC Designs: SystemC Analysis Approaches for Varying Applications

PubMed Central

Stoppe, Jannis; Drechsler, Rolf

2015-01-01

The complexity of hardware designs is still increasing according to Moore's law. With embedded systems being more and more intertwined and working together not only with each other, but also with their environments as cyber physical systems (CPSs), more streamlined development workflows are employed to handle the increasing complexity during a system's design phase. SystemC is a C++ library for the design of hardware/software systems, enabling the designer to quickly prototype, e.g., a distributed CPS without having to decide about particular implementation details (such as whether to implement a feature in hardware or in software) early in the design process. Thereby, this approach reduces the initial implementation's complexity by offering an abstract layer with which to build a working prototype. However, as SystemC is based on C++, analyzing designs becomes a difficult task due to the complex language features that are available to the designer. Several fundamentally different approaches for analyzing SystemC designs have been suggested. This work illustrates several different SystemC analysis approaches, including their specific advantages and shortcomings, allowing designers to pick the right tools to assist them with a specific problem during the design of a system using SystemC. PMID:25946632

Analyzing SystemC Designs: SystemC Analysis Approaches for Varying Applications.

PubMed

Stoppe, Jannis; Drechsler, Rolf

2015-05-04

The complexity of hardware designs is still increasing according to Moore's law. With embedded systems being more and more intertwined and working together not only with each other, but also with their environments as cyber physical systems (CPSs), more streamlined development workflows are employed to handle the increasing complexity during a system's design phase. SystemC is a C++ library for the design of hardware/software systems, enabling the designer to quickly prototype, e.g., a distributed CPS without having to decide about particular implementation details (such as whether to implement a feature in hardware or in software) early in the design process. Thereby, this approach reduces the initial implementation's complexity by offering an abstract layer with which to build a working prototype. However, as SystemC is based on C++, analyzing designs becomes a difficult task due to the complex language features that are available to the designer. Several fundamentally different approaches for analyzing SystemC designs have been suggested. This work illustrates several different SystemC analysis approaches, including their specific advantages and shortcomings, allowing designers to pick the right tools to assist them with a specific problem during the design of a system using SystemC.

Standard high-reliability integrated circuit logic packaging. [for deep space tracking stations

NASA Technical Reports Server (NTRS)

Slaughter, D. W.

1977-01-01

A family of standard, high-reliability hardware used for packaging digital integrated circuits is described. The design transition from early prototypes to production hardware is covered and future plans are discussed. Interconnections techniques are described as well as connectors and related hardware available at both the microcircuit packaging and main-frame level. General applications information is also provided.

Apollo experience report: Battery subsystem

NASA Technical Reports Server (NTRS)

Trout, J. B.

1972-01-01

Experience with the Apollo command service module and lunar module batteries is discussed. Significant hardware development concepts and hardware test results are summarized, and the operational performance of batteries on the Apollo 7 to 13 missions is discussed in terms of performance data, mission constraints, and basic hardware design and capability. Also, the flight performance of the Apollo battery charger is discussed. Inflight data are presented.

Thermal Hardware for the Thermal Analyst

NASA Technical Reports Server (NTRS)

Steinfeld, David

2015-01-01

The presentation will be given at the 26th Annual Thermal Fluids Analysis Workshop (TFAWS 2015) hosted by the Goddard Space Flight Center (GSFC) Thermal Engineering Branch (Code 545). NCTS 21070-1. Most Thermal analysts do not have a good background into the hardware which thermally controls the spacecraft they design. SINDA and Thermal Desktop models are nice, but knowing how this applies to the actual thermal hardware (heaters, thermostats, thermistors, MLI blanketing, optical coatings, etc...) is just as important. The course will delve into the thermal hardware and their application techniques on actual spacecraft. Knowledge of how thermal hardware is used and applied will make a thermal analyst a better engineer.

Study of the GPS inter-frequency calibration of timing receivers

NASA Astrophysics Data System (ADS)

Defraigne, P.; Huang, W.; Bertrand, B.; Rovera, D.

2018-02-01

When calibrating Global Positioning System (GPS) stations dedicated to timing, the hardware delays of P1 and P2, the P(Y)-codes on frequencies L1 and L2, are determined separately. In the international atomic time (TAI) network the GPS stations of the time laboratories are calibrated relatively against reference stations. This paper aims at determining the consistency between the P1 and P2 hardware delays (called dP1 and dP2) of these reference stations, and to look at the stability of the inter-signal hardware delays dP1-dP2 of all the stations in the network. The method consists of determining the dP1-dP2 directly from the GPS pseudorange measurements corrected for the frequency-dependent antenna phase center and the frequency-dependent ionosphere corrections, and then to compare these computed dP1-dP2 to the calibrated values. Our results show that the differences between the computed and calibrated dP1-dP2 are well inside the expected combined uncertainty of the two quantities. Furthermore, the consistency between the calibrated time transfer solution obtained from either single-frequency P1 or dual-frequency P3 for reference laboratories is shown to be about 1.0 ns, well inside the 2.1 ns uB uncertainty of a time transfer link based on GPS P3 or Precise Point Positioning. This demonstrates the good consistency between the P1 and P2 hardware delays of the reference stations used for calibration in the TAI network. The long-term stability of the inter-signal hardware delays is also analysed from the computed dP1-dP2. It is shown that only variations larger than 2 ns can be detected for a particular station, while variations of 200 ps can be detected when differentiating the results between two stations. Finally, we also show that in the differential calibration process as used in the TAI network, using the same antenna phase center or using different positions for L1 and L2 signals gives maximum differences of 200 ps on the hardware delays of the separate codes P1 and P2; however, the final impact on the P3 combination is less than 10 ps.

DRFM Cordic Processor and Sea Clutter Modeling for Enhancing Structured False Target Synthesis

DTIC Science & Technology

2017-09-01

was implemented using the Verilog hardware description language. The second investigation concerns generating sea clutter to impose on the false target...to achieve accuracy at 5.625o. The resulting design was implemented using the Verilog hardware description language. The second investigation...33 3. Initialization of the Angle Accumulator ....................................34 4. Design Methodology for I/Q Phase

Embedded algorithms within an FPGA-based system to process nonlinear time series data

NASA Astrophysics Data System (ADS)

Jones, Jonathan D.; Pei, Jin-Song; Tull, Monte P.

2008-03-01

This paper presents some preliminary results of an ongoing project. A pattern classification algorithm is being developed and embedded into a Field-Programmable Gate Array (FPGA) and microprocessor-based data processing core in this project. The goal is to enable and optimize the functionality of onboard data processing of nonlinear, nonstationary data for smart wireless sensing in structural health monitoring. Compared with traditional microprocessor-based systems, fast growing FPGA technology offers a more powerful, efficient, and flexible hardware platform including on-site (field-programmable) reconfiguration capability of hardware. An existing nonlinear identification algorithm is used as the baseline in this study. The implementation within a hardware-based system is presented in this paper, detailing the design requirements, validation, tradeoffs, optimization, and challenges in embedding this algorithm. An off-the-shelf high-level abstraction tool along with the Matlab/Simulink environment is utilized to program the FPGA, rather than coding the hardware description language (HDL) manually. The implementation is validated by comparing the simulation results with those from Matlab. In particular, the Hilbert Transform is embedded into the FPGA hardware and applied to the baseline algorithm as the centerpiece in processing nonlinear time histories and extracting instantaneous features of nonstationary dynamic data. The selection of proper numerical methods for the hardware execution of the selected identification algorithm and consideration of the fixed-point representation are elaborated. Other challenges include the issues of the timing in the hardware execution cycle of the design, resource consumption, approximation accuracy, and user flexibility of input data types limited by the simplicity of this preliminary design. Future work includes making an FPGA and microprocessor operate together to embed a further developed algorithm that yields better computational and power efficiency.

Systems design study of the Pioneer Venus spacecraft. Appendices to volume 1, sections 8-11 (part 3 of 3). [power subsystem/cost tradeoffs for Venus probe

NASA Technical Reports Server (NTRS)

1973-01-01

Power subsystem cost/weight tradeoffs are discussed for the Venus probe spacecraft. The cost estimations of power subsystem units were based upon DSCS-2, DSP, and Pioneer 10 and 11 hardware design and development and manufacturing experience. Parts count and degree of modification of existing hardware were factored into the estimate of manufacturing and design and development costs. Cost data includes sufficient quantities of units to equip probe bus and orbiter versions. It was based on the orbiter complement of equipment, but the savings in fewer slices for the probe bus balance the cost of the different probe bus battery. The preferred systems for the Thor/Delta and for the Atlas/Centaur are discussed. The weights of the candidate designs were based upon slice or tray weights for functionally equivalent circuitry measured on existing hardware such as Pioneers 10 and 11, Intelsat 3, DSCS-2, or DSP programs. Battery weights were based on measured cell weight data adjusted for case weight or off-the-shelf battery weights. The solar array weight estimate was based upon recent hardware experience on DSCS-2 and DSP arrays.

Computerized atmospheric trace contaminant control simulation for manned spacecraft

NASA Technical Reports Server (NTRS)

Perry, J. L.

1993-01-01

Buildup of atmospheric trace contaminants in enclosed volumes such as a spacecraft may lead to potentially serious health problems for the crew members. For this reason, active control methods must be implemented to minimize the concentration of atmospheric contaminants to levels that are considered safe for prolonged, continuous exposure. Designing hardware to accomplish this has traditionally required extensive testing to characterize and select appropriate control technologies. Data collected since the Apollo project can now be used in a computerized performance simulation to predict the performance and life of contamination control hardware to allow for initial technology screening, performance prediction, and operations and contingency studies to determine the most suitable hardware approach before specific design and testing activities begin. The program, written in FORTRAN 77, provides contaminant removal rate, total mass removed, and per pass efficiency for each control device for discrete time intervals. In addition, projected cabin concentration is provided. Input and output data are manipulated using commercial spreadsheet and data graphing software. These results can then be used in analyzing hardware design parameters such as sizing and flow rate, overall process performance and program economics. Test performance may also be predicted to aid test design.

NASA's Space Launch System Program Update

NASA Technical Reports Server (NTRS)

May, Todd; Lyles, Garry

2015-01-01

Hardware and software for the world's most powerful launch vehicle for exploration is being welded, assembled, and tested today in high bays, clean rooms and test stands across the United States. NASA's Space Launch System (SLS) continued to make significant progress in the past year, including firing tests of both main propulsion elements, manufacturing of flight hardware, and the program Critical Design Review (CDR). Developed with the goals of safety, affordability, and sustainability, SLS will deliver unmatched capability for human and robotic exploration. The initial Block 1 configuration will deliver more than 70 metric tons (t) (154,000 pounds) of payload to low Earth orbit (LEO). The evolved Block 2 design will deliver some 130 t (286,000 pounds) to LEO. Both designs offer enormous opportunity and flexibility for larger payloads, simplifying payload design as well as ground and on-orbit operations, shortening interplanetary transit times, and decreasing overall mission risk. Over the past year, every vehicle element has manufactured or tested hardware, including flight hardware for Exploration Mission 1 (EM-1). This paper will provide an overview of the progress made over the past year and provide a glimpse of upcoming milestones on the way to a 2018 launch readiness date.

System and Mass Storage Study for Defense Mapping Agency Topographic Center (DMATC/HC)

DTIC Science & Technology

1977-04-01

34•»-—•—■»■—- view. The assessment should be based on carefully designed control condi- tions—data volume, resolution, function, etc...egories: hardware control and library management support. This software is designed to interface with IBM 360/370 OS and OS/VS. No interface with a...laser re- cording unit includes a programmable recorder control subsystem which can be designed to provide a hardware and software interface compatible

Project based, Collaborative, Algorithmic Robotics for High School Students: Programming Self Driving Race Cars at MIT

DTIC Science & Technology

2017-02-19

software systems: the students design and build robotics software towards real-world applications, without being distracted by hardware issues; (ii) it...high school students require the students to focus on building and integrating the hardware that make up the robot, at the expense of designing and...robotics programs focus on the mechanics; as a result, they do not have room for students to design and implement relatively complex software systems, as

Multi-Mission System Architecture Platform: Design and Verification of the Remote Engineering Unit

NASA Technical Reports Server (NTRS)

Sartori, John

2005-01-01

The Multi-Mission System Architecture Platform (MSAP) represents an effort to bolster efficiency in the spacecraft design process. By incorporating essential spacecraft functionality into a modular, expandable system, the MSAP provides a foundation on which future spacecraft missions can be developed. Once completed, the MSAP will provide support for missions with varying objectives, while maintaining a level of standardization that will minimize redesign of general system components. One subsystem of the MSAP, the Remote Engineering Unit (REU), functions by gathering engineering telemetry from strategic points on the spacecraft and providing these measurements to the spacecraft's Command and Data Handling (C&DH) subsystem. Before the MSAP Project reaches completion, all hardware, including the REU, must be verified. However, the speed and complexity of the REU circuitry rules out the possibility of physical prototyping. Instead, the MSAP hardware is designed and verified using the Verilog Hardware Definition Language (HDL). An increasingly popular means of digital design, HDL programming provides a level of abstraction, which allows the designer to focus on functionality while logic synthesis tools take care of gate-level design and optimization. As verification of the REU proceeds, errors are quickly remedied, preventing costly changes during hardware validation. After undergoing the careful, iterative processes of verification and validation, the REU and MSAP will prove their readiness for use in a multitude of spacecraft missions.

Stripe nonuniformity correction for infrared imaging system based on single image optimization

NASA Astrophysics Data System (ADS)

Hua, Weiping; Zhao, Jufeng; Cui, Guangmang; Gong, Xiaoli; Ge, Peng; Zhang, Jiang; Xu, Zhihai

2018-06-01

Infrared imaging is often disturbed by stripe nonuniformity noise. Scene-based correction method can effectively reduce the impact of stripe noise. In this paper, a stripe nonuniformity correction method based on differential constraint is proposed. Firstly, the gray distribution of stripe nonuniformity is analyzed and the penalty function is constructed by the difference of horizontal gradient and vertical gradient. With the weight function, the penalty function is optimized to obtain the corrected image. Comparing with other single-frame approaches, experiments show that the proposed method performs better in both subjective and objective analysis, and does less damage to edge and detail. Meanwhile, the proposed method runs faster. We have also discussed the differences between the proposed idea and multi-frame methods. Our method is finally well applied in hardware system.

Thermal management of advanced fuel cell power systems

NASA Technical Reports Server (NTRS)

Vanderborgh, N. E.; Hedstrom, J.; Huff, J.

1990-01-01

It is shown that fuel cell devices are particularly attractive for the high-efficiency, high-reliability space hardware necessary to support upcoming space missions. These low-temperature hydrogen-oxygen systems necessarily operate with two-phase water. In either PEMFCs (proton exchange membrane fuel cells) or AFCs (alkaline fuel cells), engineering design must be critically focused on both stack temperature control and on the relative humidity control necessary to sustain appropriate conductivity within the ionic conductor. Water must also be removed promptly from the hardware. Present designs for AFC space hardware accomplish thermal management through two coupled cooling loops, both driven by a heat transfer fluid, and involve a recirculation fan to remove water and heat from the stack. There appears to be a certain advantage in using product water for these purposes within PEM hardware, because in that case a single fluid can serve both to control stack temperature, operating simultaneously as a heat transfer medium and through evaporation, and to provide the gas-phase moisture levels necessary to set the ionic conductor at appropriate performance levels. Moreover, the humidification cooling process automatically follows current loads. This design may remove the necessity for recirculation gas fans, thus demonstrating the long-term reliability essential for future space power hardware.

Skylab SO71/SO72 circadian periodicity experiment. [experimental design and checkout of hardware

NASA Technical Reports Server (NTRS)

Fairchild, M. K.; Hartmann, R. A.

1973-01-01

The circadian rhythm hardware activities from 1965 through 1973 are considered. A brief history of the programs leading to the development of the combined Skylab SO71/SO72 Circadian Periodicity Experiment (CPE) is given. SO71 is the Skylab experiment number designating the pocket mouse circadian experiment, and SO72 designates the vinegar gnat circadian experiment. Final design modifications and checkout of the CPE, integration testing with the Apollo service module CSM 117 and the launch preparation and support tasks at Kennedy Space Center are reported.

Design and implementation of interface units for high speed fiber optics local area networks and broadband integrated services digital networks

NASA Technical Reports Server (NTRS)

Tobagi, Fouad A.; Dalgic, Ismail; Pang, Joseph

1990-01-01

The design and implementation of interface units for high speed Fiber Optic Local Area Networks and Broadband Integrated Services Digital Networks are discussed. During the last years, a number of network adapters that are designed to support high speed communications have emerged. This approach to the design of a high speed network interface unit was to implement package processing functions in hardware, using VLSI technology. The VLSI hardware implementation of a buffer management unit, which is required in such architectures, is described.

Optical System Design for the Next Generation Space Telescope

NASA Technical Reports Server (NTRS)

Solomon, Leonard H. (Principal Investigator); Kahan, Mark A.

1996-01-01

This report provides considerations and suggested approaches for design of the Optical Telescope Assembly and the segmented primary mirror of a Next Generation Space Telescope (NGST). Based on prior studies and hardware development, we provide data and design information on low-risk materials and hardware configurations most likely to meet low weight, low temperature and long-life requirements of the nominal 8-meter aperture NGST. We also provide preliminary data for cost and performance trades, and recommendations for technology development and demonstration required to support the system design effort.

System design of the Pioneer Venus spacecraft. Volume 7: Communication subsystem studies

NASA Technical Reports Server (NTRS)

Newlands, D. M.

1973-01-01

Communications subsystem tradeoffs were undertaken to establish a low cost and low weight design consistent with the mission requirements. Because of the weight constraint of the Thor/Delta launched configuration, minimum weight was emphasized in determining the Thor/Delta design. In contrast, because of the greatly relaxed weight constraint of the Atlas/Centaur launched configuration, minimum cost and off the shelf hardware were emphasized and the attendant weight penalities accepted. Communication subsystem hardware elements identified for study included probe and bus antennas (CM-6, CM-17), power amplifiers (CM-10), and the large probe transponder and small probe stable oscillator required for doppler tracking (CM-11, CM-16). In addition, particular hardware problems associated with the probe high temperature and high-g environment were investigated (CM-7).

APRON: A Cellular Processor Array Simulation and Hardware Design Tool

NASA Astrophysics Data System (ADS)

Barr, David R. W.; Dudek, Piotr

2009-12-01

We present a software environment for the efficient simulation of cellular processor arrays (CPAs). This software (APRON) is used to explore algorithms that are designed for massively parallel fine-grained processor arrays, topographic multilayer neural networks, vision chips with SIMD processor arrays, and related architectures. The software uses a highly optimised core combined with a flexible compiler to provide the user with tools for the design of new processor array hardware architectures and the emulation of existing devices. We present performance benchmarks for the software processor array implemented on standard commodity microprocessors. APRON can be configured to use additional processing hardware if necessary and can be used as a complete graphical user interface and development environment for new or existing CPA systems, allowing more users to develop algorithms for CPA systems.

JSC Metal Finishing Waste Minimization Methods

NASA Technical Reports Server (NTRS)

Sullivan, Erica

2003-01-01

THe paper discusses the following: Johnson Space Center (JSC) has achieved VPP Star status and is ISO 9001 compliant. The Structural Engineering Division in the Engineering Directorate is responsible for operating the metal finishing facility at JSC. The Engineering Directorate is responsible for $71.4 million of space flight hardware design, fabrication and testing. The JSC Metal Finishing Facility processes flight hardware to support the programs in particular schedule and mission critical flight hardware. The JSC Metal Finishing Facility is operated by Rothe Joint Venture. The Facility provides following processes: anodizing, alodining, passivation, and pickling. JSC Metal Finishing Facility completely rebuilt in 1998. Total cost of $366,000. All new tanks, electrical, plumbing, and ventilation installed. Designed to meet modern safety, environmental, and quality requirements. Designed to minimize contamination and provide the highest quality finishes.

Coupled Loads Analysis of the Modified NASA Barge Pegasus and Space Launch System Hardware

NASA Technical Reports Server (NTRS)

Knight, J. Brent

2015-01-01

A Coupled Loads Analysis (CLA) has been performed for barge transport of Space Launch System hardware on the recently modified NASA barge Pegasus. The barge re-design was facilitated with detailed finite element analyses by the ARMY Corps of Engineers - Marine Design Center. The Finite Element Model (FEM) utilized in the design was also used in the subject CLA. The Pegasus FEM and CLA results are presented as well as a comparison of the analysis process to that of a payload being transported to space via the Space Shuttle. Discussion of the dynamic forcing functions is included as well. The process of performing a dynamic CLA of NASA hardware during marine transport is thought to be a first and can likely support minimization of undue conservatism.

High-pressure LOX/hydrocarbon preburners and gas generators

NASA Technical Reports Server (NTRS)

Huebner, A. W.

1981-01-01

The objective of the program was to conduct a small scale hardware test program to establish the technology base required for LOX/hydrocarbon preburners and gas generators. The program consisted of six major tasks; Task I reviewed and assessed the performance prediction models and defined a subscale test program. Task II designed and fabricated this subscale hardware. Task III tested and analyzed the data from this hardware. Task IV analyzed the hot fire results and formulated a preliminary design for 40K preburner assemblies. Task V took the preliminary design and detailed and fabricated three 40K size preburner assemblies, one each fuel-rich LOX/CH, and LOX/RP-1 and one oxidizer rich LOX/CH4. Task VI delivered these preburner assemblies to MSFC for subsequent evaluation.

VLSI 'smart' I/O module development

NASA Astrophysics Data System (ADS)

Kirk, Dan

The developmental history, design, and operation of the MIL-STD-1553A/B discrete and serial module (DSM) for the U.S. Navy AN/AYK-14(V) avionics computer are described and illustrated with diagrams. The ongoing preplanned product improvement for the AN/AYK-14(V) includes five dual-redundant MIL-STD-1553 channels based on DSMs. The DSM is a front-end processor for transferring data to and from a common memory, sharing memory with a host processor to provide improved 'smart' input/output performance. Each DSM comprises three hardware sections: three VLSI-6000 semicustomized CMOS arrays, memory units to support the arrays, and buffers and resynchronization circuits. The DSM hardware module design, VLSI-6000 design tools, controlware and test software, and checkout procedures (using a hardware simulator) are characterized in detail.

Interim Service ISDN Satellite (ISIS) hardware experiment design for advanced ISDN satellite design and experiments

NASA Technical Reports Server (NTRS)

Pepin, Gerard R.

1992-01-01

The Interim Service Integrated Services Digital Network (ISDN) Satellite (ISIS) Hardware Experiment Design for Advanced Satellite Designs describes the design of the ISDN Satellite Terminal Adapter (ISTA) capable of translating ISDN protocol traffic into time division multiple access (TDMA) signals for use by a communications satellite. The ISTA connects the Type 1 Network Termination (NT1) via the U-interface on the line termination side of the CPE to the V.35 interface for satellite uplink. The same ISTA converts in the opposite direction the V.35 to U-interface data with a simple switch setting.

Design of a nickel-hydrogen battery simulator for the NASA EOS testbed

NASA Technical Reports Server (NTRS)

Gur, Zvi; Mang, Xuesi; Patil, Ashok R.; Sable, Dan M.; Cho, Bo H.; Lee, Fred C.

1992-01-01

The hardware and software design of a nickel-hydrogen (Ni-H2) battery simulator (BS) with application to the NASA Earth Observation System (EOS) satellite is presented. The battery simulator is developed as a part of a complete testbed for the EOS satellite power system. The battery simulator involves both hardware and software components. The hardware component includes the capability of sourcing and sinking current at a constant programmable voltage. The software component includes the capability of monitoring the battery's ampere-hours (Ah) and programming the battery voltage according to an empirical model of the nickel-hydrogen battery stored in a computer.

Human Centered Hardware Modeling and Collaboration

NASA Technical Reports Server (NTRS)

Stambolian Damon; Lawrence, Brad; Stelges, Katrine; Henderson, Gena

2013-01-01

In order to collaborate engineering designs among NASA Centers and customers, to in clude hardware and human activities from multiple remote locations, live human-centered modeling and collaboration across several sites has been successfully facilitated by Kennedy Space Center. The focus of this paper includes innovative a pproaches to engineering design analyses and training, along with research being conducted to apply new technologies for tracking, immersing, and evaluating humans as well as rocket, vehic le, component, or faci lity hardware utilizing high resolution cameras, motion tracking, ergonomic analysis, biomedical monitoring, wor k instruction integration, head-mounted displays, and other innovative human-system integration modeling, simulation, and collaboration applications.

Rocketdyne automated dynamics data analysis and management system

NASA Technical Reports Server (NTRS)

Tarn, Robert B.

1988-01-01

An automated dynamics data analysis and management systems implemented on a DEC VAX minicomputer cluster is described. Multichannel acquisition, Fast Fourier Transformation analysis, and an online database have significantly improved the analysis of wideband transducer responses from Space Shuttle Main Engine testing. Leakage error correction to recover sinusoid amplitudes and correct for frequency slewing is described. The phase errors caused by FM recorder/playback head misalignment are automatically measured and used to correct the data. Data compression methods are described and compared. The system hardware is described. Applications using the data base are introduced, including software for power spectral density, instantaneous time history, amplitude histogram, fatigue analysis, and rotordynamics expert system analysis.

The structure and dynamics of interactive documents

DOE Office of Scientific and Technical Information (OSTI.GOV)

Rocha, J.T.

1999-04-01

Advances in information technology continue to accelerate as the new millennium approaches. With these advances, electronic information management is becoming increasingly important and is now supported by a seemingly bewildering array of hardware and software whose sole purpose is the design and implementation of interactive documents employing multimedia applications. Multimedia memory and storage applications such as Compact Disk-Read Only Memory (CD-ROMs) are already a familiar interactive tool in both the entertainment and business sectors. Even home enthusiasts now have the means at their disposal to design and produce CD-ROMs. More recently, Digital Video Disk (DVD) technology is carving its ownmore » niche in these markets and may (once application bugs are corrected and prices are lowered) eventually supplant CD-ROM technology. CD-ROM and DVD are not the only memory and storage applications capable of supporting interactive media. External, high-capacity drives and disks such as the Iomega{copyright} zip{reg_sign} and jaz{reg_sign} are also useful platforms for launching interactive documents without the need for additional hardware such as CD-ROM burners and copiers. The main drawback here, however, is the relatively high unit price per disk when compared to the unit cost of CD-ROMs. Regardless of the application chosen, there are fundamental structural characteristics that must be considered before effective interactive documents can be created. Additionally, the dynamics of interactive documents employing hypertext links are unique and bear only slight resemblance to those of their traditional hard-copy counterparts. These two considerations form the essential content of this paper.« less

Prototype solar heating and combined heating and cooling systems

NASA Technical Reports Server (NTRS)

1978-01-01

Designs were completed, hardware was received, and hardware was shipped to two sites. A change was made in the heat pump working fluid. Problem investigation of shroud coatings for the collector received emphasis.

Input/output models for general aviation piston-prop aircraft fuel economy

NASA Technical Reports Server (NTRS)

Sweet, L. M.

1982-01-01

A fuel efficient cruise performance model for general aviation piston engine airplane was tested. The following equations were made: (1) for the standard atmosphere; (2) airframe-propeller-atmosphere cruise performance; and (3) naturally aspirated engine cruise performance. Adjustments are made to the compact cruise performance model as follows: corrected quantities, corrected performance plots, algebraic equations, maximize R with or without constraints, and appears suitable for airborne microprocessor implementation. The following hardwares are recommended: ignition timing regulator, fuel-air mass ration controller, microprocessor, sensors and displays.

Efficient color correction method for smartphone camera-based health monitoring application.

PubMed

Duc Dang; Chae Ho Cho; Daeik Kim; Oh Seok Kwon; Jo Woon Chong

2017-07-01

Smartphone health monitoring applications are recently highlighted due to the rapid development of hardware and software performance of smartphones. However, color characteristics of images captured by different smartphone models are dissimilar each other and this difference may give non-identical health monitoring results when the smartphone health monitoring applications monitor physiological information using their embedded smartphone cameras. In this paper, we investigate the differences in color properties of the captured images from different smartphone models and apply a color correction method to adjust dissimilar color values obtained from different smartphone cameras. Experimental results show that the color corrected images using the correction method provide much smaller color intensity errors compared to the images without correction. These results can be applied to enhance the consistency of smartphone camera-based health monitoring applications by reducing color intensity errors among the images obtained from different smartphones.

Hardware Evolution of Closed-Loop Controller Designs

NASA Technical Reports Server (NTRS)

Gwaltney, David; Ferguson, Ian

2002-01-01

Poster presentation will outline on-going efforts at NASA, MSFC to employ various Evolvable Hardware experimental platforms in the evolution of digital and analog circuitry for application to automatic control. Included will be information concerning the application of commercially available hardware and software along with the use of the JPL developed FPTA2 integrated circuit and supporting JPL developed software. Results to date will be presented.

Large - scale Rectangular Ruler Automated Verification Device

NASA Astrophysics Data System (ADS)

Chen, Hao; Chang, Luping; Xing, Minjian; Xie, Xie

2018-03-01

This paper introduces a large-scale rectangular ruler automated verification device, which consists of photoelectric autocollimator and self-designed mechanical drive car and data automatic acquisition system. The design of mechanical structure part of the device refer to optical axis design, drive part, fixture device and wheel design. The design of control system of the device refer to hardware design and software design, and the hardware mainly uses singlechip system, and the software design is the process of the photoelectric autocollimator and the automatic data acquisition process. This devices can automated achieve vertical measurement data. The reliability of the device is verified by experimental comparison. The conclusion meets the requirement of the right angle test procedure.

ExaSAT: An exascale co-design tool for performance modeling

DOE PAGES

Unat, Didem; Chan, Cy; Zhang, Weiqun; ...

2015-02-09

One of the emerging challenges to designing HPC systems is understanding and projecting the requirements of exascale applications. In order to determine the performance consequences of different hardware designs, analytic models are essential because they can provide fast feedback to the co-design centers and chip designers without costly simulations. However, current attempts to analytically model program performance typically rely on the user manually specifying a performance model. Here we introduce the ExaSAT framework that automates the extraction of parameterized performance models directly from source code using compiler analysis. The parameterized analytic model enables quantitative evaluation of a broad range ofmore » hardware design trade-offs and software optimizations on a variety of different performance metrics, with a primary focus on data movement as a metric. Finally, we demonstrate the ExaSAT framework’s ability to perform deep code analysis of a proxy application from the Department of Energy Combustion Co-design Center to illustrate its value to the exascale co-design process. ExaSAT analysis provides insights into the hardware and software trade-offs and lays the groundwork for exploring a more targeted set of design points using cycle-accurate architectural simulators.« less

Vehicle characteristics associated with LATCH use and correct use in real-world child restraint installations.

PubMed

Cicchino, Jessica B; Jermakian, Jessica S

2015-06-01

The objective of this study was to determine if vehicle features associated with LATCH ease-of-use in laboratory studies with volunteers predict LATCH use and misuse in real-world child restraint installations. Vehicle characteristics were extracted from prior surveys of more than 100 top-selling 2010-13 vehicles. Use and correct use of LATCH was determined from records of more than 14,000 child restraint installations in these vehicles that were inspected by child passenger safety technicians at Safe Kids car seat checkup events during 2010-12. Logistic regression was used to examine the association between vehicle features and use and correct use of lower anchors and top tethers, controlling for other relevant installation features. Lower anchors were more likely to be used and correctly used when the clearance angle around them was greater than 54°, the force required to attach them to the lower anchors was less than 178N, and their depth within the seat bight was less than 4cm. Restraints were more likely to be attached correctly when installed with the lower anchors than with the seat belt. After controlling for lower anchor use and other installation features, the likelihood of tether use and correct use in installations of forward-facing restraints was significantly higher when there was no hardware present that could potentially be confused with the tether anchor or when the tether anchor was located on the rear deck, which is typical in sedans. There is converging evidence from laboratory studies with volunteers and real-world child restraint installations that vehicle features are associated with correct LATCH use. Vehicle designs that improve the ease of installing child restraints with LATCH could improve LATCH use rates and reduce child restraint misuse. Copyright © 2015 Elsevier Ltd and National Safety Council. All rights reserved.

Extravehicular activity training and hardware design consideration

NASA Technical Reports Server (NTRS)

Thuot, P. J.; Harbaugh, G. J.

1995-01-01

Preparing astronauts to perform the many complex extravehicular activity (EVA) tasks required to assemble and maintain Space Station will be accomplished through training simulations in a variety of facilities. The adequacy of this training is dependent on a thorough understanding of the task to be performed, the environment in which the task will be performed, high-fidelity training hardware and an awareness of the limitations of each particular training facility. Designing hardware that can be successfully operated, or assembled, by EVA astronauts in an efficient manner, requires an acute understanding of human factors and the capabilities and limitations of the space-suited astronaut. Additionally, the significant effect the microgravity environment has on the crew members' capabilities has to be carefully considered not only for each particular task, but also for all the overhead related to the task and the general overhead associated with EVA. This paper will describe various training methods and facilities that will be used to train EVA astronauts for Space Station assembly and maintenance. User-friendly EVA hardware design considerations and recent EVA flight experience will also be presented.

Design and FPGA Implementation of a Universal Chaotic Signal Generator Based on the Verilog HDL Fixed-Point Algorithm and State Machine Control

NASA Astrophysics Data System (ADS)

Qiu, Mo; Yu, Simin; Wen, Yuqiong; Lü, Jinhu; He, Jianbin; Lin, Zhuosheng

In this paper, a novel design methodology and its FPGA hardware implementation for a universal chaotic signal generator is proposed via the Verilog HDL fixed-point algorithm and state machine control. According to continuous-time or discrete-time chaotic equations, a Verilog HDL fixed-point algorithm and its corresponding digital system are first designed. In the FPGA hardware platform, each operation step of Verilog HDL fixed-point algorithm is then controlled by a state machine. The generality of this method is that, for any given chaotic equation, it can be decomposed into four basic operation procedures, i.e. nonlinear function calculation, iterative sequence operation, iterative values right shifting and ceiling, and chaotic iterative sequences output, each of which corresponds to only a state via state machine control. Compared with the Verilog HDL floating-point algorithm, the Verilog HDL fixed-point algorithm can save the FPGA hardware resources and improve the operation efficiency. FPGA-based hardware experimental results validate the feasibility and reliability of the proposed approach.

Extravehicular activity training and hardware design consideration.

PubMed

Thuot, P J; Harbaugh, G J

1995-07-01

Preparing astronauts to perform the many complex extravehicular activity (EVA) tasks required to assemble and maintain Space Station will be accomplished through training simulations in a variety of facilities. The adequacy of this training is dependent on a thorough understanding of the task to be performed, the environment in which the task will be performed, high-fidelity training hardware and an awareness of the limitations of each particular training facility. Designing hardware that can be successfully operated, or assembled, by EVA astronauts in an efficient manner, requires an acute understanding of human factors and the capabilities and limitations of the space-suited astronaut. Additionally, the significant effect the microgravity environment has on the crew members' capabilities has to be carefully considered not only for each particular task, but also for all the overhead related to the task and the general overhead associated with EVA. This paper will describe various training methods and facilities that will be used to train EVA astronauts for Space Station assembly and maintenance. User-friendly EVA hardware design considerations and recent EVA flight experience will also be presented.

Jet Noise Reduction

NASA Technical Reports Server (NTRS)

Kenny, Patrick

2004-01-01

The Acoustics Branch is responsible for reducing noise levels for jet and fan components on aircraft engines. To do this, data must be measured and calibrated accurately to ensure validity of test results. This noise reduction is accomplished by modifications to hardware such as jet nozzles, and by the use of other experimental hardware such as fluidic chevrons, elliptic cores, and fluidic shields. To insure validity of data calibration, a variety of software is used. This software adjusts the sound amplitude and frequency to be consistent with data taken on another day. Both the software and the hardware help make noise reduction possible. work properly. These software programs were designed to make corrections for atmosphere, shear, attenuation, electronic, and background noise. All data can be converted to a one-foot lossless condition, using the proper software corrections, making a reading independent of weather and distance. Also, data can be transformed from model scale to full scale for noise predictions of a real flight. Other programs included calculations of Over All Sound Pressure Level (OASPL), Effective Perceived Noise Level (EPNL). OASPL is the integration of sound with respect to frequency, and EPNL is weighted for a human s response to different sound frequencies and integrated with respect to time. With the proper software correction, data taken in the NATR are useful in determining ways to reduce noise. display any difference between two or more data files. Using this program and graphs of the data, the actual and predicted data can be compared. This software was tested on data collected at the Aero Acoustic Propulsion Laboratory (AAPL) using a variety of window types and overlaps. Similarly, short scripts were written to test each individual program in the software suite for verification. Each graph displays both the original points and the adjusted points connected with lines. During this summer, data points were taken during a live experiment at the AAPL to measure Nozzle Acoustic Test Rig (NATR) background noise levels. Six condenser microphones were placed in strategic locations around the dome and the inlet tunnel to measure different noise sources. From the control room the jet was monitored with the help of video cameras and other sensors. The data points were recorded, reduced, and plotted, and will be used to plan future modifications to the NATR. The primary goal to create data reduction test programs and provide verification was completed. As a result of the internship, I learned C/C++, UNIX/LINUX, Excel, and acoustic data processing methods. I also recorded data at the AAPL, then processed and plotted it. These data would be useful to compare against existing data. In addition, I adjusted software to work on the Mac OSX platform. And I used the available training resources.

Indoor Unmanned Airship System Airborne Control Module Design

NASA Astrophysics Data System (ADS)

YongXia, Gao; YiBo, Li

By adopting STC12C5A60S2 SCM as a system control unit, assisted by appropriate software and hardware resources, we complete the airborne control module's design of unmanned airship system. This paper introduces hardware control module's structure, airship-driven composition and software realization. Verified by the China Science and Technology Museum special-shaped airship,this control module can work well.

Burn Resuscitation Decision Support System (BRDSS)

DTIC Science & Technology

2013-09-01

effective for burn care in the deployed and en route care settings. In this period, we completed Human Factors studies, hardware testing , software design ... designated U.S. Army Institute of Surgical Research (USAISR) clinical team. Phase 1 System Requirements and Software Development Arcos will draft a...airworthiness testing . The hardware finalists will be sent to U.S. Army Aeromedical Research Laboratory (USAARL) for critical airworthiness testing . Phase

Research on an autonomous vision-guided helicopter

NASA Technical Reports Server (NTRS)

Amidi, Omead; Mesaki, Yuji; Kanade, Takeo

1994-01-01

Integration of computer vision with on-board sensors to autonomously fly helicopters was researched. The key components developed were custom designed vision processing hardware and an indoor testbed. The custom designed hardware provided flexible integration of on-board sensors with real-time image processing resulting in a significant improvement in vision-based state estimation. The indoor testbed provided convenient calibrated experimentation in constructing real autonomous systems.

The Hermod Behavioral Synthesis System

DTIC Science & Technology

1988-06-08

LDescription 1 lib tech-independent Transformation & Parser Optimization lib Hardware • g - utSynhesze Generator li Datapath lb Hardware liCotllb...Proc. 22nd Design Automation Conference, ACM/IEEE, June 1985, pp. 475-481. [7] G . De Micheli, "Synthesis of Control Systems", in Design Systems for...VLSI Circuits: Logic Synthesis and Silicon Compilation, G . De Micheli, A. Sangiovanni-Vincentelli, and P. Antognetti, (editor), Martinus Nijhoff

Best bang for your buck: GPU nodes for GROMACS biomolecular simulations

PubMed Central

Páll, Szilárd; Fechner, Martin; Esztermann, Ansgar; de Groot, Bert L.; Grubmüller, Helmut

2015-01-01

The molecular dynamics simulation package GROMACS runs efficiently on a wide variety of hardware from commodity workstations to high performance computing clusters. Hardware features are well‐exploited with a combination of single instruction multiple data, multithreading, and message passing interface (MPI)‐based single program multiple data/multiple program multiple data parallelism while graphics processing units (GPUs) can be used as accelerators to compute interactions off‐loaded from the CPU. Here, we evaluate which hardware produces trajectories with GROMACS 4.6 or 5.0 in the most economical way. We have assembled and benchmarked compute nodes with various CPU/GPU combinations to identify optimal compositions in terms of raw trajectory production rate, performance‐to‐price ratio, energy efficiency, and several other criteria. Although hardware prices are naturally subject to trends and fluctuations, general tendencies are clearly visible. Adding any type of GPU significantly boosts a node's simulation performance. For inexpensive consumer‐class GPUs this improvement equally reflects in the performance‐to‐price ratio. Although memory issues in consumer‐class GPUs could pass unnoticed as these cards do not support error checking and correction memory, unreliable GPUs can be sorted out with memory checking tools. Apart from the obvious determinants for cost‐efficiency like hardware expenses and raw performance, the energy consumption of a node is a major cost factor. Over the typical hardware lifetime until replacement of a few years, the costs for electrical power and cooling can become larger than the costs of the hardware itself. Taking that into account, nodes with a well‐balanced ratio of CPU and consumer‐class GPU resources produce the maximum amount of GROMACS trajectory over their lifetime. © 2015 The Authors. Journal of Computational Chemistry Published by Wiley Periodicals, Inc. PMID:26238484

Best bang for your buck: GPU nodes for GROMACS biomolecular simulations.

PubMed

Kutzner, Carsten; Páll, Szilárd; Fechner, Martin; Esztermann, Ansgar; de Groot, Bert L; Grubmüller, Helmut

2015-10-05

The molecular dynamics simulation package GROMACS runs efficiently on a wide variety of hardware from commodity workstations to high performance computing clusters. Hardware features are well-exploited with a combination of single instruction multiple data, multithreading, and message passing interface (MPI)-based single program multiple data/multiple program multiple data parallelism while graphics processing units (GPUs) can be used as accelerators to compute interactions off-loaded from the CPU. Here, we evaluate which hardware produces trajectories with GROMACS 4.6 or 5.0 in the most economical way. We have assembled and benchmarked compute nodes with various CPU/GPU combinations to identify optimal compositions in terms of raw trajectory production rate, performance-to-price ratio, energy efficiency, and several other criteria. Although hardware prices are naturally subject to trends and fluctuations, general tendencies are clearly visible. Adding any type of GPU significantly boosts a node's simulation performance. For inexpensive consumer-class GPUs this improvement equally reflects in the performance-to-price ratio. Although memory issues in consumer-class GPUs could pass unnoticed as these cards do not support error checking and correction memory, unreliable GPUs can be sorted out with memory checking tools. Apart from the obvious determinants for cost-efficiency like hardware expenses and raw performance, the energy consumption of a node is a major cost factor. Over the typical hardware lifetime until replacement of a few years, the costs for electrical power and cooling can become larger than the costs of the hardware itself. Taking that into account, nodes with a well-balanced ratio of CPU and consumer-class GPU resources produce the maximum amount of GROMACS trajectory over their lifetime. © 2015 The Authors. Journal of Computational Chemistry Published by Wiley Periodicals, Inc.

STRS Compliant FPGA Waveform Development

NASA Technical Reports Server (NTRS)

Nappier, Jennifer; Downey, Joseph; Mortensen, Dale

2008-01-01

The Space Telecommunications Radio System (STRS) Architecture Standard describes a standard for NASA space software defined radios (SDRs). It provides a common framework that can be used to develop and operate a space SDR in a reconfigurable and reprogrammable manner. One goal of the STRS Architecture is to promote waveform reuse among multiple software defined radios. Many space domain waveforms are designed to run in the special signal processing (SSP) hardware. However, the STRS Architecture is currently incomplete in defining a standard for designing waveforms in the SSP hardware. Therefore, the STRS Architecture needs to be extended to encompass waveform development in the SSP hardware. The extension of STRS to the SSP hardware will promote easier waveform reconfiguration and reuse. A transmit waveform for space applications was developed to determine ways to extend the STRS Architecture to a field programmable gate array (FPGA). These extensions include a standard hardware abstraction layer for FPGAs and a standard interface between waveform functions running inside a FPGA. A FPGA-based transmit waveform implementation of the proposed standard interfaces on a laboratory breadboard SDR will be discussed.

Getting expert systems off the ground: Lessons learned from integrating model-based diagnostics with prototype flight hardware

NASA Technical Reports Server (NTRS)

Stephan, Amy; Erikson, Carol A.

1991-01-01

As an initial attempt to introduce expert system technology into an onboard environment, a model based diagnostic system using the TRW MARPLE software tool was integrated with prototype flight hardware and its corresponding control software. Because this experiment was designed primarily to test the effectiveness of the model based reasoning technique used, the expert system ran on a separate hardware platform, and interactions between the control software and the model based diagnostics were limited. While this project met its objective of showing that model based reasoning can effectively isolate failures in flight hardware, it also identified the need for an integrated development path for expert system and control software for onboard applications. In developing expert systems that are ready for flight, artificial intelligence techniques must be evaluated to determine whether they offer a real advantage onboard, identify which diagnostic functions should be performed by the expert systems and which are better left to the procedural software, and work closely with both the hardware and the software developers from the beginning of a project to produce a well designed and thoroughly integrated application.

Image-guided radiotherapy using megavoltage cone-beam computed tomography for treatment of paraspinous tumors in the presence of orthopedic hardware

DOE Office of Scientific and Technical Information (OSTI.GOV)

Hansen, Eric K.; Larson, David A.; Aubin, Michele

Purpose: This report describes a new image-guided radiotherapy (IGRT) technique using megavoltage cone-beam computed tomography (MV-CBCT) to treat paraspinous tumors in the presence of orthopedic hardware. Methods and Materials: A patient with a resected paraspinous high-grade sarcoma was treated to 59.4 Gy with an IMRT plan. Daily MV-CBCT imaging was used to ensure accurate positioning. The displacement between MV-CBCT and planning CT images were determined daily and applied remotely to the treatment couch. The dose-volume histograms of the original and a hypothetical IMRT plan (shifted by the average daily setup errors) were compared to estimate the impact on dosimetry. Results:more » The mean setup corrections in the lateral, longitudinal, and vertical directions were 3.6 mm (95% CI, 2.6-4.6 mm), 4.1 mm (95% CI, 3.2-5.0 mm), and 1.0 mm (95% CI, 0.6-1.3 mm), respectively. Without corrected positioning, the dose to 0.1 cc of the spinal cord increased by 9.4 Gy, and the doses to 95% of clinical target volumes 1 and 2 were reduced by 4 Gy and 4.8 Gy, respectively. Conclusions: Megavoltage-CBCT provides a new alternative image-guided radiotherapy approach for treatment of paraspinous tumors in the presence of orthopedic hardware by providing 3D anatomic information in the treatment position, with clear imaging of metallic objects and without compromising soft-tissue information.« less

Hardware-Based Security: Trouble and Hope

DTIC Science & Technology

2007-02-22

comes out at the end correctly embody the specification that went in. * The recent calls for a "Cyber Manhattan project " seem to implicitly assume that...original Manhattan project only had to build a few bombs it didn’t have to change the way all of humanity used refrigerators. One might even go out

Performing quantum computing experiments in the cloud

NASA Astrophysics Data System (ADS)

Devitt, Simon J.

2016-09-01

Quantum computing technology has reached a second renaissance in the past five years. Increased interest from both the private and public sector combined with extraordinary theoretical and experimental progress has solidified this technology as a major advancement in the 21st century. As anticipated my many, some of the first realizations of quantum computing technology has occured over the cloud, with users logging onto dedicated hardware over the classical internet. Recently, IBM has released the Quantum Experience, which allows users to access a five-qubit quantum processor. In this paper we take advantage of this online availability of actual quantum hardware and present four quantum information experiments. We utilize the IBM chip to realize protocols in quantum error correction, quantum arithmetic, quantum graph theory, and fault-tolerant quantum computation by accessing the device remotely through the cloud. While the results are subject to significant noise, the correct results are returned from the chip. This demonstrates the power of experimental groups opening up their technology to a wider audience and will hopefully allow for the next stage of development in quantum information technology.

Three Corner Sat Communications System

NASA Technical Reports Server (NTRS)

Anderson, Bobby; Horan, Stephen

2000-01-01

Three Corner Satellite is a constellation of three nanosatellites designed and built by students. New Mexico State University has taken on the design of the communications system for this constellation. The system includes the forward link, return link, and the crosslink. Due to size, mass, power, and financial constraints, we must design a small, light, power efficient, and inexpensive communications system. This thesis presents the design of a radio system to accomplish the data transmission requirements in light of the system constraints. In addition to the hardware design, the operational commands needed by the satellite's on-board computer to control and communicate with the communications hardware will be presented. In order for the hardware to communicate with the ground stations, we will examine the link budgets derived from the radiated power of the transmitters, link distance, data modulation, and data rate for each link. The antenna design for the constellation is analyzed using software and testing the physical antennas on a model satellite. After the analysis and testing, a combination of different systems will meet and exceed the requirements and constraints of the Three Corner Satellite constellation.

A preferential design approach for energy-efficient and robust implantable neural signal processing hardware.

PubMed

Narasimhan, Seetharam; Chiel, Hillel J; Bhunia, Swarup

2009-01-01

For implantable neural interface applications, it is important to compress data and analyze spike patterns across multiple channels in real time. Such a computational task for online neural data processing requires an innovative circuit-architecture level design approach for low-power, robust and area-efficient hardware implementation. Conventional microprocessor or Digital Signal Processing (DSP) chips would dissipate too much power and are too large in size for an implantable system. In this paper, we propose a novel hardware design approach, referred to as "Preferential Design" that exploits the nature of the neural signal processing algorithm to achieve a low-voltage, robust and area-efficient implementation using nanoscale process technology. The basic idea is to isolate the critical components with respect to system performance and design them more conservatively compared to the noncritical ones. This allows aggressive voltage scaling for low power operation while ensuring robustness and area efficiency. We have applied the proposed approach to a neural signal processing algorithm using the Discrete Wavelet Transform (DWT) and observed significant improvement in power and robustness over conventional design.

Towards Evolving Electronic Circuits for Autonomous Space Applications

NASA Technical Reports Server (NTRS)

Lohn, Jason D.; Haith, Gary L.; Colombano, Silvano P.; Stassinopoulos, Dimitris

2000-01-01

The relatively new field of Evolvable Hardware studies how simulated evolution can reconfigure, adapt, and design hardware structures in an automated manner. Space applications, especially those requiring autonomy, are potential beneficiaries of evolvable hardware. For example, robotic drilling from a mobile platform requires high-bandwidth controller circuits that are difficult to design. In this paper, we present automated design techniques based on evolutionary search that could potentially be used in such applications. First, we present a method of automatically generating analog circuit designs using evolutionary search and a circuit construction language. Our system allows circuit size (number of devices), circuit topology, and device values to be evolved. Using a parallel genetic algorithm, we present experimental results for five design tasks. Second, we investigate the use of coevolution in automated circuit design. We examine fitness evaluation by comparing the effectiveness of four fitness schedules. The results indicate that solution quality is highest with static and co-evolving fitness schedules as compared to the other two dynamic schedules. We discuss these results and offer two possible explanations for the observed behavior: retention of useful information, and alignment of problem difficulty with circuit proficiency.

Automatic Digital Hardware Synthesis

DTIC Science & Technology

1990-09-01

VHDL to PALASM, a hardware synthesis language. The PALASM description is then directly implemented into a field programmable gate array (FPGAI using...process of translating VHDL to PALASM, a hardware synthesis language. The PALASM description is then directly implemented into a field programmable gate...allows the engineer to use VHDL to create and validate a design, and then to implement it in a gate array. The development of software o translate VHDL

Hardware Evolution of Analog Speed Controllers for a DC Motor

NASA Technical Reports Server (NTRS)

Gwaltney, David A.; Ferguson, Michael I.

2003-01-01

Evolvable hardware provides the capability to evolve analog circuits to produce amplifier and filter functions. Conventional analog controller designs employ these same functions. Analog controllers for the control of the shaft speed of a DC motor are evolved on an evolvable hardware platform utilizing a Field Programmable Transistor Array (FPTA). The performance of these evolved controllers is compared to that of a conventional proportional-integral (PI) controller.

Framework for Development and Distribution of Hardware Acceleration

NASA Astrophysics Data System (ADS)

Thomas, David B.; Luk, Wayne W.

2002-07-01

This paper describes IGOL, a framework for developing reconfigurable data processing applications. While IGOL was originally designed to target imaging and graphics systems, its structure is sufficiently general to support a broad range of applications. IGOL adopts a four-layer architecture: application layer, operation layer, appliance layer and configuration layer. This architecture is intended to separate and co-ordinate both the development and execution of hardware and software components. Hardware developers can use IGOL as an instance testbed for verification and benchmarking, as well as for distribution. Software application developers can use IGOL to discover hardware accelerated data processors, and to access them in a transparent, non-hardware specific manner. IGOL provides extensive support for the RC1000-PP board via the Handel-C language, and a wide selection of image processing filters have been developed. IGOL also supplies plug-ins to enable such filters to be incorporated in popular applications such as Premiere, Winamp, VirtualDub and DirectShow. Moreover, IGOL allows the automatic use of multiple cards to accelerate an application, demonstrated using DirectShow. To enable transparent acceleration without sacrificing performance, a three-tiered COM (Component Object Model) API has been designed and implemented. This API provides a well-defined and extensible interface which facilitates the development of hardware data processors that can accelerate multiple applications.

A digital matched filter for reverse time chaos.

PubMed

Bailey, J Phillip; Beal, Aubrey N; Dean, Robert N; Hamilton, Michael C

2016-07-01

The use of reverse time chaos allows the realization of hardware chaotic systems that can operate at speeds equivalent to existing state of the art while requiring significantly less complex circuitry. Matched filter decoding is possible for the reverse time system since it exhibits a closed form solution formed partially by a linear basis pulse. Coefficients have been calculated and are used to realize the matched filter digitally as a finite impulse response filter. Numerical simulations confirm that this correctly implements a matched filter that can be used for detection of the chaotic signal. In addition, the direct form of the filter has been implemented in hardware description language and demonstrates performance in agreement with numerical results.

A methodology for testing fault-tolerant software

NASA Technical Reports Server (NTRS)

Andrews, D. M.; Mahmood, A.; Mccluskey, E. J.

1985-01-01

A methodology for testing fault tolerant software is presented. There are problems associated with testing fault tolerant software because many errors are masked or corrected by voters, limiter, or automatic channel synchronization. This methodology illustrates how the same strategies used for testing fault tolerant hardware can be applied to testing fault tolerant software. For example, one strategy used in testing fault tolerant hardware is to disable the redundancy during testing. A similar testing strategy is proposed for software, namely, to move the major emphasis on testing earlier in the development cycle (before the redundancy is in place) thus reducing the possibility that undetected errors will be masked when limiters and voters are added.

Effects of long-term exposure on LDEF fastener assemblies

NASA Astrophysics Data System (ADS)

Spear, Steve; Dursch, Harry

1992-09-01

This presentation summarizes the Systems Special Investigations Group (SIG) findings from testing and analysis of fastener assemblies used on the Long Duration Exposure Facility (LDEF) structure, the tray mounting clamps, and by the various experimenters. The LDEF deintegration team and several experimenters noted severe fastener damage and hardware removal difficulties during post-flight activities. The System SIG has investigated all reported instances, and in all cases examined to date, the difficulties were attributed to galling during installation or post-flight removal. To date, no evidence of coldwelding was found. Correct selection of materials and lubricants as well as proper mechanical procedures is essential to ensure successful on-orbit or post-flight installation and removal of hardware.

MetAlign 3.0: performance enhancement by efficient use of advances in computer hardware.

PubMed

Lommen, Arjen; Kools, Harrie J

2012-08-01

A new, multi-threaded version of the GC-MS and LC-MS data processing software, metAlign, has been developed which is able to utilize multiple cores on one PC. This new version was tested using three different multi-core PCs with different operating systems. The performance of noise reduction, baseline correction and peak-picking was 8-19 fold faster compared to the previous version on a single core machine from 2008. The alignment was 5-10 fold faster. Factors influencing the performance enhancement are discussed. Our observations show that performance scales with the increase in processor core numbers we currently see in consumer PC hardware development.

Effects of long-term exposure on LDEF fastener assemblies

NASA Technical Reports Server (NTRS)

Spear, Steve; Dursch, Harry

1992-01-01

This presentation summarizes the Systems Special Investigations Group (SIG) findings from testing and analysis of fastener assemblies used on the Long Duration Exposure Facility (LDEF) structure, the tray mounting clamps, and by the various experimenters. The LDEF deintegration team and several experimenters noted severe fastener damage and hardware removal difficulties during post-flight activities. The System SIG has investigated all reported instances, and in all cases examined to date, the difficulties were attributed to galling during installation or post-flight removal. To date, no evidence of coldwelding was found. Correct selection of materials and lubricants as well as proper mechanical procedures is essential to ensure successful on-orbit or post-flight installation and removal of hardware.

A digital matched filter for reverse time chaos

NASA Astrophysics Data System (ADS)

Bailey, J. Phillip; Beal, Aubrey N.; Dean, Robert N.; Hamilton, Michael C.

2016-07-01

The use of reverse time chaos allows the realization of hardware chaotic systems that can operate at speeds equivalent to existing state of the art while requiring significantly less complex circuitry. Matched filter decoding is possible for the reverse time system since it exhibits a closed form solution formed partially by a linear basis pulse. Coefficients have been calculated and are used to realize the matched filter digitally as a finite impulse response filter. Numerical simulations confirm that this correctly implements a matched filter that can be used for detection of the chaotic signal. In addition, the direct form of the filter has been implemented in hardware description language and demonstrates performance in agreement with numerical results.

The EMIR experience in the use of software control simulators to speed up the time to telescope

NASA Astrophysics Data System (ADS)

Lopez Ramos, Pablo; López-Ruiz, J. C.; Moreno Arce, Heidy; Rosich, Josefina; Perez Menor, José Maria

2012-09-01

One of the main problems facing development teams working on instrument control systems consists on the need to access mechanisms which are not available until well into the integration phase. The need to work with real hardware creates additional problems like, among others: certain faults cannot be tested due to the possibility of hardware damage, taking the system to the limit may shorten its operational lifespan and the full system may not be available during some periods due to maintenance and/or testing of individual components. These problems can be treated with the use of simulators and by applying software/hardware standards. Since information on the construction and performance of electro-mechanical systems is available at relatively early stages of the project, simulators are developed in advance (before the existence of the mechanism) or, if conventions and standards have been correctly followed, a previously developed simulator might be used. This article describes our experience in building software simulators and the main advantages we have identified, which are: the control software can be developed even in the absence of real hardware, critical tests can be prepared using the simulated systems, test system behavior for hardware failure situations that represent a risk of the real system, and the speed up of in house integration of the entire instrument. The use of simulators allows us to reduce development, testing and integration time.

A pluggable framework for parallel pairwise sequence search.

PubMed

Archuleta, Jeremy; Feng, Wu-chun; Tilevich, Eli

2007-01-01

The current and near future of the computing industry is one of multi-core and multi-processor technology. Most existing sequence-search tools have been designed with a focus on single-core, single-processor systems. This discrepancy between software design and hardware architecture substantially hinders sequence-search performance by not allowing full utilization of the hardware. This paper presents a novel framework that will aid the conversion of serial sequence-search tools into a parallel version that can take full advantage of the available hardware. The framework, which is based on a software architecture called mixin layers with refined roles, enables modules to be plugged into the framework with minimal effort. The inherent modular design improves maintenance and extensibility, thus opening up a plethora of opportunities for advanced algorithmic features to be developed and incorporated while routine maintenance of the codebase persists.

Automated control and data acquisition for a tunable diode laser heterodyne spectrometer

NASA Technical Reports Server (NTRS)

Shull, T. S.; Rinsland, P. L.

1983-01-01

This paper describes the hardware and software design, development, and implementation of the control and data electronics of a laser heterodyne spectrometer instrument being built at NASA Langley Research Center for a technology demonstration. Functional partitioning, applied at all levels of hardware and software, has been found to provide expedient design, development, and testing of the instrument. The instrument is composed of distributed microprocessor-based units. A master/slave protocol is presented which can be simulated by a terminal for unit checkout. All but one of the units are implemented using a set of core boards, plus unique boards where necessary. This design has led to reduced hardware development, reduced parts inventory, and replication of software modules, while providing the flexibility needed for a development instrument. The development tools and documentation guidelines are discussed.

21 CFR 882.1440 - Neuropsychiatric interpretive electroencephalograph assessment aid.

Code of Federal Regulations, 2014 CFR

2014-04-01

... described in detail in the software requirements specification and software design specification... the device, hardware and software, must be fully characterized and must demonstrate a reasonable assurance of safety and effectiveness. (i) Hardware specifications must be provided. Appropriate...

On-Board, Real-Time Preprocessing System for Optical Remote-Sensing Imagery

PubMed Central

Qi, Baogui; Zhuang, Yin; Chen, He; Chen, Liang

2018-01-01

With the development of remote-sensing technology, optical remote-sensing imagery processing has played an important role in many application fields, such as geological exploration and natural disaster prevention. However, relative radiation correction and geometric correction are key steps in preprocessing because raw image data without preprocessing will cause poor performance during application. Traditionally, remote-sensing data are downlinked to the ground station, preprocessed, and distributed to users. This process generates long delays, which is a major bottleneck in real-time applications for remote-sensing data. Therefore, on-board, real-time image preprocessing is greatly desired. In this paper, a real-time processing architecture for on-board imagery preprocessing is proposed. First, a hierarchical optimization and mapping method is proposed to realize the preprocessing algorithm in a hardware structure, which can effectively reduce the computation burden of on-board processing. Second, a co-processing system using a field-programmable gate array (FPGA) and a digital signal processor (DSP; altogether, FPGA-DSP) based on optimization is designed to realize real-time preprocessing. The experimental results demonstrate the potential application of our system to an on-board processor, for which resources and power consumption are limited. PMID:29693585

Fringe-jump corrected far infrared tangential interferometer/polarimeter for a real-time density feedback control system of NSTX plasmasa)

NASA Astrophysics Data System (ADS)

Juhn, J.-W.; Lee, K. C.; Hwang, Y. S.; Domier, C. W.; Luhmann, N. C.; Leblanc, B. P.; Mueller, D.; Gates, D. A.; Kaita, R.

2010-10-01

The far infrared tangential interferometer/polarimeter (FIReTIP) of the National Spherical Torus Experiment (NSTX) has been set up to provide reliable electron density signals for a real-time density feedback control system. This work consists of two main parts: suppression of the fringe jumps that have been prohibiting the plasma density from use in the direct feedback to actuators and the conceptual design of a density feedback control system including the FIReTIP, control hardware, and software that takes advantage of the NSTX plasma control system (PCS). By investigating numerous shot data after July 2009 when the new electronics were installed, fringe jumps in the FIReTIP are well characterized, and consequently the suppressing algorithms are working properly as shown in comparisons with the Thomson scattering diagnostic. This approach is also applicable to signals taken at a 5 kHz sampling rate, which is a fundamental constraint imposed by the digitizers providing inputs to the PCS. The fringe jump correction algorithm, as well as safety and feedback modules, will be included as submodules either in the gas injection system category or a new category of density in the PCS.

On-Board, Real-Time Preprocessing System for Optical Remote-Sensing Imagery.

PubMed

Qi, Baogui; Shi, Hao; Zhuang, Yin; Chen, He; Chen, Liang

2018-04-25

With the development of remote-sensing technology, optical remote-sensing imagery processing has played an important role in many application fields, such as geological exploration and natural disaster prevention. However, relative radiation correction and geometric correction are key steps in preprocessing because raw image data without preprocessing will cause poor performance during application. Traditionally, remote-sensing data are downlinked to the ground station, preprocessed, and distributed to users. This process generates long delays, which is a major bottleneck in real-time applications for remote-sensing data. Therefore, on-board, real-time image preprocessing is greatly desired. In this paper, a real-time processing architecture for on-board imagery preprocessing is proposed. First, a hierarchical optimization and mapping method is proposed to realize the preprocessing algorithm in a hardware structure, which can effectively reduce the computation burden of on-board processing. Second, a co-processing system using a field-programmable gate array (FPGA) and a digital signal processor (DSP; altogether, FPGA-DSP) based on optimization is designed to realize real-time preprocessing. The experimental results demonstrate the potential application of our system to an on-board processor, for which resources and power consumption are limited.

Holodeck: Telepresence Dome Visualization System Simulations

NASA Technical Reports Server (NTRS)

Hite, Nicolas

2012-01-01

This paper explores the simulation and consideration of different image-projection strategies for the Holodeck, a dome that will be used for highly immersive telepresence operations in future endeavors of the National Aeronautics and Space Administration (NASA). Its visualization system will include a full 360 degree projection onto the dome's interior walls in order to display video streams from both simulations and recorded video. Because humans innately trust their vision to precisely report their surroundings, the Holodeck's visualization system is crucial to its realism. This system will be rigged with an integrated hardware and software infrastructure-namely, a system of projectors that will relay with a Graphics Processing Unit (GPU) and computer to both project images onto the dome and correct warping in those projections in real-time. Using both Computer-Aided Design (CAD) and ray-tracing software, virtual models of various dome/projector geometries were created and simulated via tracking and analysis of virtual light sources, leading to the selection of two possible configurations for installation. Research into image warping and the generation of dome-ready video content was also conducted, including generation of fisheye images, distortion correction, and the generation of a reliable content-generation pipeline.

VME rollback hardware for time warp multiprocessor systems

NASA Technical Reports Server (NTRS)

Robb, Michael J.; Buzzell, Calvin A.

1992-01-01

The purpose of the research effort is to develop and demonstrate innovative hardware to implement specific rollback and timing functions required for efficient queue management and precision timekeeping in multiprocessor discrete event simulations. The previously completed phase 1 effort demonstrated the technical feasibility of building hardware modules which eliminate the state saving overhead of the Time Warp paradigm used in distributed simulations on multiprocessor systems. The current phase 2 effort will build multiple pre-production rollback hardware modules integrated with a network of Sun workstations, and the integrated system will be tested by executing a Time Warp simulation. The rollback hardware will be designed to interface with the greatest number of multiprocessor systems possible. The authors believe that the rollback hardware will provide for significant speedup of large scale discrete event simulation problems and allow multiprocessors using Time Warp to dramatically increase performance.

Design and implementation of encrypted and decrypted file system based on USBKey and hardware code

NASA Astrophysics Data System (ADS)

Wu, Kehe; Zhang, Yakun; Cui, Wenchao; Jiang, Ting

2017-05-01

To protect the privacy of sensitive data, an encrypted and decrypted file system based on USBKey and hardware code is designed and implemented in this paper. This system uses USBKey and hardware code to authenticate a user. We use random key to encrypt file with symmetric encryption algorithm and USBKey to encrypt random key with asymmetric encryption algorithm. At the same time, we use the MD5 algorithm to calculate the hash of file to verify its integrity. Experiment results show that large files can be encrypted and decrypted in a very short time. The system has high efficiency and ensures the security of documents.

Requirements analysis for a hardware, discrete-event, simulation engine accelerator

NASA Astrophysics Data System (ADS)

Taylor, Paul J., Jr.

1991-12-01

An analysis of a general Discrete Event Simulation (DES), executing on the distributed architecture of an eight mode Intel PSC/2 hypercube, was performed. The most time consuming portions of the general DES algorithm were determined to be the functions associated with message passing of required simulation data between processing nodes of the hypercube architecture. A behavioral description, using the IEEE standard VHSIC Hardware Description and Design Language (VHDL), for a general DES hardware accelerator is presented. The behavioral description specifies the operational requirements for a DES coprocessor to augment the hypercube's execution of DES simulations. The DES coprocessor design implements the functions necessary to perform distributed discrete event simulations using a conservative time synchronization protocol.

Language Classification using N-grams Accelerated by FPGA-based Bloom Filters

DOE Office of Scientific and Technical Information (OSTI.GOV)

Jacob, A; Gokhale, M

N-Gram (n-character sequences in text documents) counting is a well-established technique used in classifying the language of text in a document. In this paper, n-gram processing is accelerated through the use of reconfigurable hardware on the XtremeData XD1000 system. Our design employs parallelism at multiple levels, with parallel Bloom Filters accessing on-chip RAM, parallel language classifiers, and parallel document processing. In contrast to another hardware implementation (HAIL algorithm) that uses off-chip SRAM for lookup, our highly scalable implementation uses only on-chip memory blocks. Our implementation of end-to-end language classification runs at 85x comparable software and 1.45x the competing hardware design.

Quantum annealing correction with minor embedding

NASA Astrophysics Data System (ADS)

Vinci, Walter; Albash, Tameem; Paz-Silva, Gerardo; Hen, Itay; Lidar, Daniel A.

2015-10-01

Quantum annealing provides a promising route for the development of quantum optimization devices, but the usefulness of such devices will be limited in part by the range of implementable problems as dictated by hardware constraints. To overcome constraints imposed by restricted connectivity between qubits, a larger set of interactions can be approximated using minor embedding techniques whereby several physical qubits are used to represent a single logical qubit. However, minor embedding introduces new types of errors due to its approximate nature. We introduce and study quantum annealing correction schemes designed to improve the performance of quantum annealers in conjunction with minor embedding, thus leading to a hybrid scheme defined over an encoded graph. We argue that this scheme can be efficiently decoded using an energy minimization technique provided the density of errors does not exceed the per-site percolation threshold of the encoded graph. We test the hybrid scheme using a D-Wave Two processor on problems for which the encoded graph is a two-level grid and the Ising model is known to be NP-hard. The problems we consider are frustrated Ising model problem instances with "planted" (a priori known) solutions. Applied in conjunction with optimized energy penalties and decoding techniques, we find that this approach enables the quantum annealer to solve minor embedded instances with significantly higher success probability than it would without error correction. Our work demonstrates that quantum annealing correction can and should be used to improve the robustness of quantum annealing not only for natively embeddable problems but also when minor embedding is used to extend the connectivity of physical devices.

Conceptual design of two-phase fluid mechanics and heat transfer facility for spacelab

NASA Technical Reports Server (NTRS)

North, B. F.; Hill, M. E.

1980-01-01

Five specific experiments were analyzed to provide definition of experiments designed to evaluate two phase fluid behavior in low gravity. The conceptual design represents a fluid mechanics and heat transfer facility for a double rack in Spacelab. The five experiments are two phase flow patterns and pressure drop, flow boiling, liquid reorientation, and interface bubble dynamics. Hardware was sized, instrumentation and data recording requirements defined, and the five experiments were installed as an integrated experimental package. Applicable available hardware was selected in the experiment design and total experiment program costs were defined.

Multicore Architectures for Multiple Independent Levels of Security Applications

DTIC Science & Technology

2012-09-01

to bolster the MILS effort. However, current MILS operating systems are not designed for multi-core platforms. They do not have the hardware support...current MILS operating systems are not designed for multi‐core platforms. They do not have the hardware support to ensure that the separation...the availability of information at different security classification levels while increasing the overall security of the computing system . Due to the

Demonstration of spectral calibration for stellar interferometry

NASA Technical Reports Server (NTRS)

Demers, Richard T.; An, Xin; Tang, Hong; Rud, Mayer; Wayne, Leonard; Kissil, Andrew; Kwack, Eug-Yun

2006-01-01

A breadboard is under development to demonstrate the calibration of spectral errors in microarcsecond stellar interferometers. Analysis shows that thermally and mechanically stable hardware in addition to careful optical design can reduce the wavelength dependent error to tens of nanometers. Calibration of the hardware can further reduce the error to the level of picometers. The results of thermal, mechanical and optical analysis supporting the breadboard design will be shown.

The design of flight hardware: Organizational and technical ideas from the MITRE/WPI Shuttle Program

NASA Technical Reports Server (NTRS)

Looft, F. J.

1986-01-01

The Mitre Corporation of Bedford Mass. and the Worcester Polytechnic Institute are developing several experiments for a future Shuttle flight. Several design practices for the development of the electrical equipment for the flight hardware have been standardized. Some of the ideas are presented, not as hard and fast rules but rather in the interest of stimulating discussions for sharing such ideas.

Development of hardwares and computer interface for a two-degree-of-freedom robot

NASA Technical Reports Server (NTRS)

Nguyen, Charles C.; Pooran, Farhad J.

1987-01-01

The research results that were obtained are reviewed. Then the robot actuator, the selection of the data acquisition system, and the design of the power amplifier will be discussed. The machine design of the robot manipulator will then be presented. After that, the integration of the developed hardware into the open-loop system will also be discussed. Current and future research work is addressed.

An ultra-low-voltage electronic implementation of inertial neuron model with nonmonotonous Liao's activation function.

PubMed

Kant, Nasir Ali; Dar, Mohamad Rafiq; Khanday, Farooq Ahmad

2015-01-01

The output of every neuron in neural network is specified by the employed activation function (AF) and therefore forms the heart of neural networks. As far as the design of artificial neural networks (ANNs) is concerned, hardware approach is preferred over software one because it promises the full utilization of the application potential of ANNs. Therefore, besides some arithmetic blocks, designing AF in hardware is the most important for designing ANN. While attempting to design the AF in hardware, the designs should be compatible with the modern Very Large Scale Integration (VLSI) design techniques. In this regard, the implemented designs should: only be in Metal Oxide Semiconductor (MOS) technology in order to be compatible with the digital designs, provide electronic tunability feature, and be able to operate at ultra-low voltage. Companding is one of the promising circuit design techniques for achieving these goals. In this paper, 0.5 V design of Liao's AF using sinh-domain technique is introduced. Furthermore, the function is tested by implementing inertial neuron model. The performance of the AF and inertial neuron model have been evaluated through simulation results, using the PSPICE software with the MOS transistor models provided by the 0.18-μm Taiwan Semiconductor Manufacturer Complementary Metal Oxide Semiconductor (TSM CMOS) process.

Intelligent Flexible Materials for Space Structures: Expandable Habitat Engineering Development Unit

NASA Technical Reports Server (NTRS)

Hinkle, Jon; Sharpe, George; Lin, John; Wiley, Cliff; Timmers, Richard

2010-01-01

Expandable habitable elements are an enabling technology for human exploration in space and on planetary surfaces. Large geometries can be deployed from a small launch volume, allowing greater mission capability while reducing mass and improving robustness over traditional rigid shells. This report describes research performed by ILC Dover under the Intelligent Flexible Materials for Space Structures program on the design and manufacture of softgoods for LaRC's Expandable Habitat Engineering Development Unit (EDU). The EDU is a full-scale structural test article of an expandable hybrid habitat, integrating an expandable softgoods center section with two rigid end caps. The design of the bladder, restraint layer and a mock-up Thermal Micrometeoroid Cover is detailed together with the design of the interface hardware used to attach them to the end caps. The integration and design of two windows and a floor are also covered. Analysis was performed to study the effects of the open weave design, and to determine the correct webbing and fabric configuration. Stress analyses were also carried out on the interfaces between the softgoods and the end caps and windows. Testing experimentally determined the strength of the fabric and straps, and component testing was used to proof several critical parts of the design. This program established new manufacturing and design techniques that can be applied to future applications in expandable structures.

Combining Topological Hardware and Topological Software: Color-Code Quantum Computing with Topological Superconductor Networks

NASA Astrophysics Data System (ADS)

Litinski, Daniel; Kesselring, Markus S.; Eisert, Jens; von Oppen, Felix

2017-07-01

We present a scalable architecture for fault-tolerant topological quantum computation using networks of voltage-controlled Majorana Cooper pair boxes and topological color codes for error correction. Color codes have a set of transversal gates which coincides with the set of topologically protected gates in Majorana-based systems, namely, the Clifford gates. In this way, we establish color codes as providing a natural setting in which advantages offered by topological hardware can be combined with those arising from topological error-correcting software for full-fledged fault-tolerant quantum computing. We provide a complete description of our architecture, including the underlying physical ingredients. We start by showing that in topological superconductor networks, hexagonal cells can be employed to serve as physical qubits for universal quantum computation, and we present protocols for realizing topologically protected Clifford gates. These hexagonal-cell qubits allow for a direct implementation of open-boundary color codes with ancilla-free syndrome read-out and logical T gates via magic-state distillation. For concreteness, we describe how the necessary operations can be implemented using networks of Majorana Cooper pair boxes, and we give a feasibility estimate for error correction in this architecture. Our approach is motivated by nanowire-based networks of topological superconductors, but it could also be realized in alternative settings such as quantum-Hall-superconductor hybrids.

Event and Pulse Node Hardware Design for Nuclear Fusion Experiments

NASA Astrophysics Data System (ADS)

Fortunato, J. C.; Batista, A.; Sousa, J.; Fernandes, H.; Varandas, C. A. F.

2008-04-01

This article presents an event and pulse node hardware module (EPN) developed for use in control and data acquisition (CODAC) in current and upcoming long discharges nuclear fusion experiments. Its purpose is to allow real time event management and trigger distribution. The use of a mixture of digital signal processing and field programmable gate arrays, with fiber optic channels for event broadcast between CODAC nodes, and short length paths between the EPN and CODAC hardware, allows an effective and low latency communication path. This hardware will be integrated in the ISTTOK CODAC to allow long AC plasma discharges.

The JPL telerobot operator control station. Part 1: Hardware

NASA Technical Reports Server (NTRS)

Kan, Edwin P.; Tower, John T.; Hunka, George W.; Vansant, Glenn J.

1989-01-01

The Operator Control Station of the Jet Propulsion Laboratory (JPL)/NASA Telerobot Demonstrator System provides the man-machine interface between the operator and the system. It provides all the hardware and software for accepting human input for the direct and indirect (supervised) manipulation of the robot arms and tools for task execution. Hardware and software are also provided for the display and feedback of information and control data for the operator's consumption and interaction with the task being executed. The hardware design, system architecture, and its integration and interface with the rest of the Telerobot Demonstrator System are discussed.

Use of Field Programmable Gate Array Technology in Future Space Avionics

NASA Technical Reports Server (NTRS)

Ferguson, Roscoe C.; Tate, Robert

2005-01-01

Fulfilling NASA's new vision for space exploration requires the development of sustainable, flexible and fault tolerant spacecraft control systems. The traditional development paradigm consists of the purchase or fabrication of hardware boards with fixed processor and/or Digital Signal Processing (DSP) components interconnected via a standardized bus system. This is followed by the purchase and/or development of software. This paradigm has several disadvantages for the development of systems to support NASA's new vision. Building a system to be fault tolerant increases the complexity and decreases the performance of included software. Standard bus design and conventional implementation produces natural bottlenecks. Configuring hardware components in systems containing common processors and DSPs is difficult initially and expensive or impossible to change later. The existence of Hardware Description Languages (HDLs), the recent increase in performance, density and radiation tolerance of Field Programmable Gate Arrays (FPGAs), and Intellectual Property (IP) Cores provides the technology for reprogrammable Systems on a Chip (SOC). This technology supports a paradigm better suited for NASA's vision. Hardware and software production are melded for more effective development; they can both evolve together over time. Designers incorporating this technology into future avionics can benefit from its flexibility. Systems can be designed with improved fault isolation and tolerance using hardware instead of software. Also, these designs can be protected from obsolescence problems where maintenance is compromised via component and vendor availability.To investigate the flexibility of this technology, the core of the Central Processing Unit and Input/Output Processor of the Space Shuttle AP101S Computer were prototyped in Verilog HDL and synthesized into an Altera Stratix FPGA.

Effect of color visualization and display hardware on the visual assessment of pseudocolor medical images

PubMed Central

Zabala-Travers, Silvina; Choi, Mina; Cheng, Wei-Chung

2015-01-01

Purpose: Even though the use of color in the interpretation of medical images has increased significantly in recent years, the ad hoc manner in which color is handled and the lack of standard approaches have been associated with suboptimal and inconsistent diagnostic decisions with a negative impact on patient treatment and prognosis. The purpose of this study is to determine if the choice of color scale and display device hardware affects the visual assessment of patterns that have the characteristics of functional medical images. Methods: Perfusion magnetic resonance imaging (MRI) was the basis for designing and performing experiments. Synthetic images resembling brain dynamic-contrast enhanced MRI consisting of scaled mixtures of white, lumpy, and clustered backgrounds were used to assess the performance of a rainbow (“jet”), a heated black-body (“hot”), and a gray (“gray”) color scale with display devices of different quality on the detection of small changes in color intensity. The authors used a two-alternative, forced-choice design where readers were presented with 600 pairs of images. Each pair consisted of two images of the same pattern flipped along the vertical axis with a small difference in intensity. Readers were asked to select the image with the highest intensity. Three differences in intensity were tested on four display devices: a medical-grade three-million-pixel display, a consumer-grade monitor, a tablet device, and a phone. Results: The estimates of percent correct show that jet outperformed hot and gray in the high and low range of the color scales for all devices with a maximum difference in performance of 18% (confidence intervals: 6%, 30%). Performance with hot was different for high and low intensity, comparable to jet for the high range, and worse than gray for lower intensity values. Similar performance was seen between devices using jet and hot, while gray performance was better for handheld devices. Time of performance was shorter with jet. Conclusions: Our findings demonstrate that the choice of color scale and display hardware affects the visual comparative analysis of pseudocolor images. Follow-up studies in clinical settings are being considered to confirm the results with patient images. PMID:26127048

On two new trends in evolvable hardware: employment of HDL-based structuring, and design of multi-functional circuits

NASA Technical Reports Server (NTRS)

Stoica, A.; Keymeulen, D.; Zebulum, R. S.; Ferguson, M. I.; Guo, X.

2002-01-01

This paper comments on some directions of growth for evolvable hardware, proposes research directions that address the scalability problem and gives examples of results in novel areas approached by EHW.

Open source hardware and software platform for robotics and artificial intelligence applications

NASA Astrophysics Data System (ADS)

Liang, S. Ng; Tan, K. O.; Lai Clement, T. H.; Ng, S. K.; Mohammed, A. H. Ali; Mailah, Musa; Azhar Yussof, Wan; Hamedon, Zamzuri; Yussof, Zulkifli

2016-02-01

Recent developments in open source hardware and software platforms (Android, Arduino, Linux, OpenCV etc.) have enabled rapid development of previously expensive and sophisticated system within a lower budget and flatter learning curves for developers. Using these platform, we designed and developed a Java-based 3D robotic simulation system, with graph database, which is integrated in online and offline modes with an Android-Arduino based rubbish picking remote control car. The combination of the open source hardware and software system created a flexible and expandable platform for further developments in the future, both in the software and hardware areas, in particular in combination with graph database for artificial intelligence, as well as more sophisticated hardware, such as legged or humanoid robots.

Medical evaluations on the KC-135 1990 flight report summary

NASA Technical Reports Server (NTRS)

Lloyd, Charles W.; Guess, Terrell M.; Whiting, Charles W.; Doarn, Charles R.

1991-01-01

The medical investigations completed on the KC-135 during FY 1990 in support of the development of the Health Maintenance Facility and Medical Operations are discussed. The experiments are comprised of engineering evaluations of medical hardware and medical procedures. The investigating teams are made up of both medical and engineering personnel responsible for the development of medical hardware and medical operations. The hardware evaluated includes dental equipment, a coagulation analyzer, selected pharmaceutical aerosol devices, a prototype air/fluid separator, a prototype packaging and stowage system for medical supplies, a microliter metering system, and a workstation for minor surgical procedures. The results of these engineering evaluations will be used in the design of fleet hardware as well as to identify hardware specific training requirements.

MSFC Skylab corollary experiment systems mission evaluation

NASA Technical Reports Server (NTRS)

1974-01-01

Evaluations are presented of the performances of corollary experiment hardware developed by the George C. Marshall Space Flight Center and operated during the three manned Skylab missions. Also presented are assessments of the functional adequacy of the experiment hardware and its supporting systems, and indications are given as to the degrees by which experiment constraints and interfaces were met. It is shown that most of the corollary experiment hardware performed satisfactorily and within design specifications.

Development of robotics facility docking test hardware

NASA Technical Reports Server (NTRS)

Loughead, T. E.; Winkler, R. V.

1984-01-01

Design and fabricate test hardware for NASA's George C. Marshall Space Flight Center (MSFC) are reported. A docking device conceptually developed was fabricated, and two docking targets which provide high and low mass docking loads were required and were represented by an aft 61.0 cm section of a Hubble space telescope (ST) mockup and an upgrading of an existing multimission modular spacecraft (MSS) mockup respectively. A test plan is developed for testing the hardware.

Electrically Driven Single Phase Thermal Management: STP-H5 EHD Experiment

NASA Technical Reports Server (NTRS)

Didion, Jeffrey R.

2016-01-01

The Electrically Driven Single Phase Thermal Management: STP-H5 iEHDS Experiment is a technology demonstration of prototype proof of concept hardware to establish the feasilibilty and long term operation of this hardware. This is a structural thermal plate that will operate continuous as part of the STP-H5 ISEM experiment for up to 18 months. This presentation discusses the design, fabrication and environmental operational paramertes of the experiment hardware.

Design study of RL10 derivatives. Volume 3, part 2: Operational and flight support plan. [analysis of transportation requirements for rocket engine in support of space tug program

NASA Technical Reports Server (NTRS)

Shubert, W. C.

1973-01-01

Transportation requirements are considered during the engine design layout reviews and maintenance engineering analyses. Where designs cannot be influenced to avoid transportation problems, the transportation representative is advised of the problems permitting remedies early in the program. The transportation representative will monitor and be involved in the shipment of development engine and GSE hardware between FRDC and vehicle manufacturing plant and thereby will be provided an early evaluation of the transportation plans, methods and procedures to be used in the space tug support program. Unanticipated problems discovered in the shipment of development hardware will be known early enough to permit changes in packaging designs and transportation plans before the start of production hardware and engine shipments. All conventional transport media can be used for the movement of space tug engines. However, truck transport is recommended for ready availability, variety of routes, short transit time, and low cost.

Reconfigurable Hardware for Compressing Hyperspectral Image Data

NASA Technical Reports Server (NTRS)

Aranki, Nazeeh; Namkung, Jeffrey; Villapando, Carlos; Kiely, Aaron; Klimesh, Matthew; Xie, Hua

2010-01-01

High-speed, low-power, reconfigurable electronic hardware has been developed to implement ICER-3D, an algorithm for compressing hyperspectral-image data. The algorithm and parts thereof have been the topics of several NASA Tech Briefs articles, including Context Modeler for Wavelet Compression of Hyperspectral Images (NPO-43239) and ICER-3D Hyperspectral Image Compression Software (NPO-43238), which appear elsewhere in this issue of NASA Tech Briefs. As described in more detail in those articles, the algorithm includes three main subalgorithms: one for computing wavelet transforms, one for context modeling, and one for entropy encoding. For the purpose of designing the hardware, these subalgorithms are treated as modules to be implemented efficiently in field-programmable gate arrays (FPGAs). The design takes advantage of industry- standard, commercially available FPGAs. The implementation targets the Xilinx Virtex II pro architecture, which has embedded PowerPC processor cores with flexible on-chip bus architecture. It incorporates an efficient parallel and pipelined architecture to compress the three-dimensional image data. The design provides for internal buffering to minimize intensive input/output operations while making efficient use of offchip memory. The design is scalable in that the subalgorithms are implemented as independent hardware modules that can be combined in parallel to increase throughput. The on-chip processor manages the overall operation of the compression system, including execution of the top-level control functions as well as scheduling, initiating, and monitoring processes. The design prototype has been demonstrated to be capable of compressing hyperspectral data at a rate of 4.5 megasamples per second at a conservative clock frequency of 50 MHz, with a potential for substantially greater throughput at a higher clock frequency. The power consumption of the prototype is less than 6.5 W. The reconfigurability (by means of reprogramming) of the FPGAs makes it possible to effectively alter the design to some extent to satisfy different requirements without adding hardware. The implementation could be easily propagated to future FPGA generations and/or to custom application-specific integrated circuits.

Space Station Freedom - Approaching the critical design phase

NASA Technical Reports Server (NTRS)

Kohrs, Richard H.; Huckins, Earle, III

1992-01-01

The status and future developments of the Space Station Freedom are discussed. To date detailed design drawings are being produced to manufacture SSF hardware. A critical design review (CDR) for the man-tended capability configuration is planned to be performed in 1993 under the SSF program. The main objective of the CDR is to enable the program to make a full commitment to proceed to manufacture parts and assemblies. NASA recently signed a contract with the Russian space company, NPO Energia, to evaluate potential applications of various Russian space hardware for on-going NASA programs.

Use of CCSDS Packets Over SpaceWire to Control Hardware

NASA Technical Reports Server (NTRS)

Haddad, Omar; Blau, Michael; Haghani, Noosha; Yuknis, William; Albaijes, Dennis

2012-01-01

For the Lunar Reconnaissance Orbiter, the Command and Data Handling subsystem consisted of several electronic hardware assemblies that were connected with SpaceWire serial links. Electronic hardware would be commanded/controlled and telemetry data was obtained using the SpaceWire links. Prior art focused on parallel data buses and other types of serial buses, which were not compatible with the SpaceWire and the core flight executive (CFE) software bus. This innovation applies to anything that utilizes both SpaceWire networks and the CFE software. The CCSDS (Consultative Committee for Space Data Systems) packet contains predetermined values in its payload fields that electronic hardware attached at the terminus of the SpaceWire node would decode, interpret, and execute. The hardware s interpretation of the packet data would enable the hardware to change its state/configuration (command) or generate status (telemetry). The primary purpose is to provide an interface that is compatible with the hardware and the CFE software bus. By specifying the format of the CCSDS packet, it is possible to specify how the resulting hardware is to be built (in terms of digital logic) that results in a hardware design that can be controlled by the CFE software bus in the final application

Design and Control of Compliant Tensegrity Robots Through Simulation and Hardware Validation

NASA Technical Reports Server (NTRS)

Caluwaerts, Ken; Despraz, Jeremie; Iscen, Atil; Sabelhaus, Andrew P.; Bruce, Jonathan; Schrauwen, Benjamin; Sunspiral, Vytas

2014-01-01

To better understand the role of tensegrity structures in biological systems and their application to robotics, the Dynamic Tensegrity Robotics Lab at NASA Ames Research Center has developed and validated two different software environments for the analysis, simulation, and design of tensegrity robots. These tools, along with new control methodologies and the modular hardware components developed to validate them, are presented as a system for the design of actuated tensegrity structures. As evidenced from their appearance in many biological systems, tensegrity ("tensile-integrity") structures have unique physical properties which make them ideal for interaction with uncertain environments. Yet these characteristics, such as variable structural compliance, and global multi-path load distribution through the tension network, make design and control of bio-inspired tensegrity robots extremely challenging. This work presents the progress in using these two tools in tackling the design and control challenges. The results of this analysis includes multiple novel control approaches for mobility and terrain interaction of spherical tensegrity structures. The current hardware prototype of a six-bar tensegrity, code-named ReCTeR, is presented in the context of this validation.

Cobalt: A GPU-based correlator and beamformer for LOFAR

NASA Astrophysics Data System (ADS)

Broekema, P. Chris; Mol, J. Jan David; Nijboer, R.; van Amesfoort, A. S.; Brentjens, M. A.; Loose, G. Marcel; Klijn, W. F. A.; Romein, J. W.

2018-04-01

For low-frequency radio astronomy, software correlation and beamforming on general purpose hardware is a viable alternative to custom designed hardware. LOFAR, a new-generation radio telescope centered in the Netherlands with international stations in Germany, France, Ireland, Poland, Sweden and the UK, has successfully used software real-time processors based on IBM Blue Gene technology since 2004. Since then, developments in technology have allowed us to build a system based on commercial off-the-shelf components that combines the same capabilities with lower operational cost. In this paper, we describe the design and implementation of a GPU-based correlator and beamformer with the same capabilities as the Blue Gene based systems. We focus on the design approach taken, and show the challenges faced in selecting an appropriate system. The design, implementation and verification of the software system show the value of a modern test-driven development approach. Operational experience, based on three years of operations, demonstrates that a general purpose system is a good alternative to the previous supercomputer-based system or custom-designed hardware.

Hardware Trojans - Prevention, Detection, Countermeasures (A Literature Review)

DTIC Science & Technology

2011-07-01

Phase and Location . . . . . . . . . . . . . . . . . . . . . . . . . 4 2.2 Hardware Trojan Actions...12 3.4 Trigger Design Issues . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 4 Prevention 14 4.1 Prevention...The specification is then realised into specific tar- 4 UNCLASSIFIED UNCLASSIFIED DSTO–TN–1012 get technologies with consideration of functional and

Fastener Retention Requirements and Practices in Spaceflight Hardware

NASA Technical Reports Server (NTRS)

Dasgupta, Rajib

2004-01-01

This presentation reviews the requirements for safety critical fasteners in spaceflight hardware. Included in the presentation are design guidelines and information for Locking Helicoils, key locked inserts and thinwalled inserts, self locking screws and bolts. locknuts, and a locking adhesives, Loctite and Vibratite.

Design and Calibration of the X-33 Flush Airdata Sensing (FADS) System

NASA Technical Reports Server (NTRS)

Whitmore, Stephen A.; Cobleigh, Brent R.; Haering, Edward A.

1998-01-01

This paper presents the design of the X-33 Flush Airdata Sensing (FADS) system. The X-33 FADS uses a matrix of pressure orifices on the vehicle nose to estimate airdata parameters. The system is designed with dual-redundant measurement hardware, which produces two independent measurement paths. Airdata parameters that correspond to the measurement path with the minimum fit error are selected as the output values. This method enables a single sensor failure to occur with minimal degrading of the system performance. The paper shows the X-33 FADS architecture, derives the estimating algorithms, and demonstrates a mathematical analysis of the FADS system stability. Preliminary aerodynamic calibrations are also presented here. The calibration parameters, the position error coefficient (epsilon), and flow correction terms for the angle of attack (delta alpha), and angle of sideslip (delta beta) are derived from wind tunnel data. Statistical accuracy of' the calibration is evaluated by comparing the wind tunnel reference conditions to the airdata parameters estimated. This comparison is accomplished by applying the calibrated FADS algorithm to the sensed wind tunnel pressures. When the resulting accuracy estimates are compared to accuracy requirements for the X-33 airdata, the FADS system meets these requirements.

A High Power Density Power System Electronics for NASA's Lunar Reconnaissance Orbiter

NASA Technical Reports Server (NTRS)

Hernandez-Pellerano, A.; Stone, R.; Travis, J.; Kercheval, B.; Alkire, G.; Ter-Minassian, V.

2009-01-01

A high power density, modular and state-of-the-art Power System Electronics (PSE) has been developed for the Lunar Reconnaissance Orbiter (LRO) mission. This paper addresses the hardware architecture and performance, the power handling capabilities, and the fabrication technology. The PSE was developed by NASA s Goddard Space Flight Center (GSFC) and is the central location for power handling and distribution of the LRO spacecraft. The PSE packaging design manages and distributes 2200W of solar array input power in a volume less than a cubic foot. The PSE architecture incorporates reliable standard internal and external communication buses, solid state circuit breakers and LiIon battery charge management. Although a single string design, the PSE achieves high reliability by elegantly implementing functional redundancy and internal fault detection and correction. The PSE has been environmentally tested and delivered to the LRO spacecraft for the flight Integration and Test. This modular design is scheduled to flight in early 2009 on board the LRO and Lunar Crater Observation and Sensing Satellite (LCROSS) spacecrafts and is the baseline architecture for future NASA missions such as Global Precipitation Measurement (GPM) and Magnetospheric MultiScale (MMS).

High frequency flow-structural interaction in dense subsonic fluids

NASA Technical Reports Server (NTRS)

Liu, Baw-Lin; Ofarrell, J. M.

1995-01-01

Prediction of the detailed dynamic behavior in rocket propellant feed systems and engines and other such high-energy fluid systems requires precise analysis to assure structural performance. Designs sometimes require placement of bluff bodies in a flow passage. Additionally, there are flexibilities in ducts, liners, and piping systems. A design handbook and interactive data base have been developed for assessing flow/structural interactions to be used as a tool in design and development, to evaluate applicable geometries before problems develop, or to eliminate or minimize problems with existing hardware. This is a compilation of analytical/empirical data and techniques to evaluate detailed dynamic characteristics of both the fluid and structures. These techniques have direct applicability to rocket engine internal flow passages, hot gas drive systems, and vehicle propellant feed systems. Organization of the handbook is by basic geometries for estimating Strouhal numbers, added mass effects, mode shapes for various end constraints, critical onset flow conditions, and possible structural response amplitudes. Emphasis is on dense fluids and high structural loading potential for fatigue at low subsonic flow speeds where high-frequency excitations are possible. Avoidance and corrective measure illustrations are presented together with analytical curve fits for predictions compiled from a comprehensive data base.

Design of extensible meteorological data acquisition system based on FPGA

NASA Astrophysics Data System (ADS)

Zhang, Wen; Liu, Yin-hua; Zhang, Hui-jun; Li, Xiao-hui

2015-02-01

In order to compensate the tropospheric refraction error generated in the process of satellite navigation and positioning. Temperature, humidity and air pressure had to be used in concerned models to calculate the value of this error. While FPGA XC6SLX16 was used as the core processor, the integrated silicon pressure sensor MPX4115A and digital temperature-humidity sensor SHT75 are used as the basic meteorological parameter detection devices. The core processer was used to control the real-time sampling of ADC AD7608 and to acquire the serial output data of SHT75. The data was stored in the BRAM of XC6SLX16 and used to generate standard meteorological parameters in NEMA format. The whole design was based on Altium hardware platform and ISE software platform. The system was described in the VHDL language and schematic diagram to realize the correct detection of temperature, humidity, air pressure. The 8-channel synchronous sampling characteristics of AD7608 and programmable external resources of FPGA laid the foundation for the increasing of analog or digital meteorological element signal. The designed meteorological data acquisition system featured low cost, high performance, multiple expansions.

Automated recognition of helium speech. Phase I: Investigation of microprocessor based analysis/synthesis system

NASA Astrophysics Data System (ADS)

Jelinek, H. J.

1986-01-01

This is the Final Report of Electronic Design Associates on its Phase I SBIR project. The purpose of this project is to develop a method for correcting helium speech, as experienced in diver-surface communication. The goal of the Phase I study was to design, prototype, and evaluate a real time helium speech corrector system based upon digital signal processing techniques. The general approach was to develop hardware (an IBM PC board) to digitize helium speech and software (a LAMBDA computer based simulation) to translate the speech. As planned in the study proposal, this initial prototype may now be used to assess expected performance from a self contained real time system which uses an identical algorithm. The Final Report details the work carried out to produce the prototype system. Four major project tasks were: a signal processing scheme for converting helium speech to normal sounding speech was generated. The signal processing scheme was simulated on a general purpose (LAMDA) computer. Actual helium speech was supplied to the simulation and the converted speech was generated. An IBM-PC based 14 bit data Input/Output board was designed and built. A bibliography of references on speech processing was generated.

AFOSR BRI: Co-Design of Hardware/Software for Predicting MAV Aerodynamics

DTIC Science & Technology

2016-09-27

DOCUMENTATION PAGE Form ApprovedOMB No. 0704-0188 1. REPORT DATE (DD-MM-YYYY) 2. REPORT TYPE 4. TITLE AND SUBTITLE 5a. CONTRACT NUMBER 6. AUTHOR(S) 7...703-588-8494 AFOSR BRI While Moore’s Law theoretically doubles processor performance every 24 months, much of the realizable performance remains...past efforts to develop such CFD codes on accelerated processors showed limited success, our hardware/software co-design approach created malleable

Hardware demonstration of flexible beam control

NASA Technical Reports Server (NTRS)

Schaechter, D. B.

1980-01-01

An experiment employing a pinned-free flexible beam has been constructed to demonstrate and verify several facets of the control of flexible structures. The desired features of the experiment are to demonstrate active shape control, active dynamic control, adaptive control, various control law design approaches, and associated hardware requirements and mechanization difficulties. This paper contains the analytical work performed in support of the facility development, the final design specifications, control law synthesis, and some preliminary results.

The design, fabrication and installation of cable routing mockups in support of Spacelab 2

NASA Technical Reports Server (NTRS)

1981-01-01

From flight and mockup drawings of Spacelab 2 (SL 2) experiments and hardware, shop ready mockup drawings were produced. Floor panels were the first items considered for fabrication. Cold plate and orthogrid mockups were designed and fabricated. Experiment and other hardware mockups were fabricated of aluminum or plywood, depending on size and configuration. Eighty-three cable routing bracket mockups were fabricated of aluminum and delivered for painting.

Guidelines for Applying Video Simulation Technology to Training Land Design

DTIC Science & Technology

1993-02-01

Training Land Design for Realism." The technical monitor was Dr. Victor Diersing, CEHSC-FN. This study was performed by the Environmental Resources...technology to their land management activities. 5 Objective The objective of this study was to provide a general overview of the use of video simulation...4). A market study of currently available hardware and software provided the basis for descriptions of hardware and software systems, and their

Digital avionics design and reliability analyzer

NASA Technical Reports Server (NTRS)

1981-01-01

The description and specifications for a digital avionics design and reliability analyzer are given. Its basic function is to provide for the simulation and emulation of the various fault-tolerant digital avionic computer designs that are developed. It has been established that hardware emulation at the gate-level will be utilized. The primary benefit of emulation to reliability analysis is the fact that it provides the capability to model a system at a very detailed level. Emulation allows the direct insertion of faults into the system, rather than waiting for actual hardware failures to occur. This allows for controlled and accelerated testing of system reaction to hardware failures. There is a trade study which leads to the decision to specify a two-machine system, including an emulation computer connected to a general-purpose computer. There is also an evaluation of potential computers to serve as the emulation computer.

Wearable and low-stress ambulatory blood pressure monitoring technology for hypertension diagnosis.

PubMed

Altintas, Ersin; Takoh, Kimiyasu; Ohno, Yuji; Abe, Katsumi; Akagawa, Takeshi; Ariyama, Tetsuri; Kubo, Masahiro; Tsuda, Kenichiro; Tochikubo, Osamu

2015-01-01

We propose a highly wearable, upper-arm type, oscillometric-based blood pressure monitoring technology with low-stress. The low-stress is realized by new developments in the hardware and software design. In the hardware design, conventional armband; cuff, is almost halved in volume thanks to a flexible plastic core and a liquid bag which enhances the fitness and pressure uniformity over the arm. Reduced air bag volume enables smaller motor pump size and battery leading to a thinner, more compact and more wearable unified device. In the software design, a new prediction algorithm enabled to apply less stress (and less pain) on arm of the patient. Proof-of-concept experiments on volunteers show a high accuracy on both technologies. This paper mainly introduces hardware developments. The system is promising for less-painful and less-stressful 24-hour blood pressure monitoring in hypertension managements and related healthcare solutions.

A SOPC-BASED Evaluation of AES for 2.4 GHz Wireless Network

NASA Astrophysics Data System (ADS)

Ken, Cai; Xiaoying, Liang

In modern systems, data security is needed more than ever before and many cryptographic algorithms are utilized for security services. Wireless Sensor Networks (WSN) is an example of such technologies. In this paper an innovative SOPC-based approach for the security services evaluation in WSN is proposed that addresses the issues of scalability, flexible performance, and silicon efficiency for the hardware acceleration of encryption system. The design includes a Nios II processor together with custom designed modules for the Advanced Encryption Standard (AES) which has become the default choice for various security services in numerous applications. The objective of this mechanism is to present an efficient hardware realization of AES using very high speed integrated circuit hardware description language (Verilog HDL) and expand the usability for various applications. As compared to traditional customize processor design, the mechanism provides a very broad range of cost/performance points.

What can formal methods offer to digital flight control systems design

NASA Technical Reports Server (NTRS)

Good, Donald I.

1990-01-01

Formal methods research begins to produce methods which will enable mathematic modeling of the physical behavior of digital hardware and software systems. The development of these methods directly supports the NASA mission of increasing the scope and effectiveness of flight system modeling capabilities. The conventional, continuous mathematics that is used extensively in modeling flight systems is not adequate for accurate modeling of digital systems. Therefore, the current practice of digital flight control system design has not had the benefits of extensive mathematical modeling which are common in other parts of flight system engineering. Formal methods research shows that by using discrete mathematics, very accurate modeling of digital systems is possible. These discrete modeling methods will bring the traditional benefits of modeling to digital hardware and hardware design. Sound reasoning about accurate mathematical models of flight control systems can be an important part of reducing risk of unsafe flight control.

Hardware Design of the Energy Efficient Fall Detection Device

NASA Astrophysics Data System (ADS)

Skorodumovs, A.; Avots, E.; Hofmanis, J.; Korāts, G.

2016-04-01

Health issues for elderly people may lead to different injuries obtained during simple activities of daily living. Potentially the most dangerous are unintentional falls that may be critical or even lethal to some patients due to the heavy injury risk. In the project "Wireless Sensor Systems in Telecare Application for Elderly People", we have developed a robust fall detection algorithm for a wearable wireless sensor. To optimise the algorithm for hardware performance and test it in field, we have designed an accelerometer based wireless fall detector. Our main considerations were: a) functionality - so that the algorithm can be applied to the chosen hardware, and b) power efficiency - so that it can run for a very long time. We have picked and tested the parts, built a prototype, optimised the firmware for lowest consumption, tested the performance and measured the consumption parameters. In this paper, we discuss our design choices and present the results of our work.

Aircraft Survivability: Susceptibility Reduction, Spring 2003

DTIC Science & Technology

2003-01-01

approach to implementing the real-time nonuniformity correction (NUC) hardware. Packaging and size constraints would not prohibit the future...92 Hz MWIR #3 Imager 640x512 InSb FPA Band: 3µm–5µm Pixel size: 24µm Max frame rate: 92 Hz LWIR Imager 640x512 HgCdTe FPA Band: 3µm–5µm Pixel size

Brake control system modification, augmentor Wing Jet STOL Research Airplane (AWJSRA)

NASA Technical Reports Server (NTRS)

Amberg, R. L.; Arline, J. A.; Jenny, R. W.

1974-01-01

The braking system for a short takeoff aircraft is discussed and the deficiencies are described. The installation of a Boeing 727 aircraft brake system was made to correct the deficiencies. Tests of the modified system were conducted using an analog computer/hardware simulator. Actual performance tests were conducted and the characteristics of the system were satisfactory.