Science.gov

Sample records for correct hardware design

  1. A hardware implementation of a provably correct design of a fault-tolerant clock synchronization circuit

    NASA Technical Reports Server (NTRS)

    Torres-Pomales, Wilfredo

    1993-01-01

    A fault-tolerant clock synchronization system was designed to a proven correct formal specification. Formal methods were used in the development of this specification. A description of the system and an analysis of the tests performed are presented. Plots of typical experimental results are included.

  2. X-15 Hardware Design Challenges

    NASA Technical Reports Server (NTRS)

    Storms, Harrison A., Jr.

    1991-01-01

    Historical events in the development of the X-15 hardware design are presented. Some of the topics covered include: (1) drivers that led to the development of the X-15; (2) X-15 space research objectives; (3) original performance targets; (4) the X-15 typical mission; (5) X-15 dimensions and weight; (5) the propulsion system; (6) X-15 development milestones; (7) engineering and manufacturing challenges; (8) the X-15 structure; (9) ballistic flight control; (10) landing gear; (11) nose gear; and (12) an X-15 program recap.

  3. Hardware design for Hash functions

    NASA Astrophysics Data System (ADS)

    Lee, Yong Ki; Knežević, Miroslav; Verbauwhede, Ingrid M. R.

    Due to its cryptographic and operational key features such as the one-way function property, high speed and a fixed output size independent of input size the hash algorithm is one of the most important cryptographic primitives. A critical drawback of most cryptographic algorithms is the large computational overhead. This is getting more critical since the data amount to process or communicate is increasing a lot. In many cases, a proper use of the hash algorithm reduces the computational overhead. Digital signature generation and the message authentication are the most common applications of the hash algorithms. The increasing data size also motivates hardware designers to have a throughput optimal architecture for a given hash algorithm. In this chapter, some popular hash algorithms and their cryptanalysis are briefly introduced, and a design methodology for throughput optimal architectures of MD4-based hash algorithms is described in detail.

  4. Hardware

    NASA Technical Reports Server (NTRS)

    1999-01-01

    The full complement of EDOMP investigations called for a broad spectrum of flight hardware ranging from commercial items, modified for spaceflight, to custom designed hardware made to meet the unique requirements of testing in the space environment. In addition, baseline data collection before and after spaceflight required numerous items of ground-based hardware. Two basic categories of ground-based hardware were used in EDOMP testing before and after flight: (1) hardware used for medical baseline testing and analysis, and (2) flight-like hardware used both for astronaut training and medical testing. To ensure post-landing data collection, hardware was required at both the Kennedy Space Center (KSC) and the Dryden Flight Research Center (DFRC) landing sites. Items that were very large or sensitive to the rigors of shipping were housed permanently at the landing site test facilities. Therefore, multiple sets of hardware were required to adequately support the prime and backup landing sites plus the Johnson Space Center (JSC) laboratories. Development of flight hardware was a major element of the EDOMP. The challenges included obtaining or developing equipment that met the following criteria: (1) compact (small size and light weight), (2) battery-operated or requiring minimal spacecraft power, (3) sturdy enough to survive the rigors of spaceflight, (4) quiet enough to pass acoustics limitations, (5) shielded and filtered adequately to assure electromagnetic compatibility with spacecraft systems, (6) user-friendly in a microgravity environment, and (7) accurate and efficient operation to meet medical investigative requirements.

  5. Comparative Modal Analysis of Sieve Hardware Designs

    NASA Technical Reports Server (NTRS)

    Thompson, Nathaniel

    2012-01-01

    The CMTB Thwacker hardware operates as a testbed analogue for the Flight Thwacker and Sieve components of CHIMRA, a device on the Curiosity Rover. The sieve separates particles with a diameter smaller than 150 microns for delivery to onboard science instruments. The sieving behavior of the testbed hardware should be similar to the Flight hardware for the results to be meaningful. The elastodynamic behavior of both sieves was studied analytically using the Rayleigh Ritz method in conjunction with classical plate theory. Finite element models were used to determine the mode shapes of both designs, and comparisons between the natural frequencies and mode shapes were made. The analysis predicts that the performance of the CMTB Thwacker will closely resemble the performance of the Flight Thwacker within the expected steady state operating regime. Excitations of the testbed hardware that will mimic the flight hardware were recommended, as were those that will improve the efficiency of the sieving process.

  6. Extravehicular Activity training and hardware design considerations

    NASA Technical Reports Server (NTRS)

    Thuot, Pierre J.; Harbaugh, Gregory J.

    1993-01-01

    Designing hardware that can be successfully operated by EVA astronauts for EVA tasks required to assemble and maintain Space Station Freedom requires a thorough understanding of human factors and of the capabilities and limitations of the space-suited astronaut, as well as of the effect of microgravity environment on the crew member's capabilities and on the overhead associated with EVA. This paper describes various training methods and facilities that are being designed for training EVA astronauts for Space Station assembly and maintenance, taking into account the above discussed factors. Particular attention is given to the user-friendly hardware design for EVA and to recent EVA flight experience.

  7. Space hardware designs, volume 1

    NASA Technical Reports Server (NTRS)

    Meyer, Rudolf X.; Cribbs, Richard; Honda, Mark; Ma, Christina; Robson, Christopher

    1994-01-01

    The design of a solar sail space vehicle with a novel sail deployment mechanism is described. The sail is triangular in shape and is deployed and stabilized by three miniature spacecraft, one at each corner of the triangle. A concept demonstrator for a spherical microrover for the exploration of a planetary surface is described. Lastly, laboratory experiments have been conducted to study the migration of thin oil films on metal surfaces in the presence of a thermal gradient.

  8. Digital Hardware Design Teaching: An Alternative Approach

    ERIC Educational Resources Information Center

    Benkrid, Khaled; Clayton, Thomas

    2012-01-01

    This article presents the design and implementation of a complete review of undergraduate digital hardware design teaching in the School of Engineering at the University of Edinburgh. Four guiding principles have been used in this exercise: learning-outcome driven teaching, deep learning, affordability, and flexibility. This has identified…

  9. Design considerations for space flight hardware

    NASA Technical Reports Server (NTRS)

    Glover, Daniel

    1990-01-01

    The environmental and design constraints are reviewed along with some insight into the established design and quality assurance practices that apply to low earth orbit (LEO) space flight hardware. It is intended as an introduction for people unfamiliar with space flight considerations. Some basic data and a bibliography are included.

  10. Shuttle mission simulator hardware conceptual design report

    NASA Technical Reports Server (NTRS)

    Burke, J. F.

    1973-01-01

    The detailed shuttle mission simulator hardware requirements are discussed. The conceptual design methods, or existing technology, whereby those requirements will be fulfilled are described. Information of a general nature on the total design problem plus specific details on how these requirements are to be satisfied are reported. The configuration of the simulator is described and the capabilities for various types of training are identified.

  11. Digital Hardware Design Teaching: An Alternative Approach

    ERIC Educational Resources Information Center

    Benkrid, Khaled; Clayton, Thomas

    2012-01-01

    This article presents the design and implementation of a complete review of undergraduate digital hardware design teaching in the School of Engineering at the University of Edinburgh. Four guiding principles have been used in this exercise: learning-outcome driven teaching, deep learning, affordability, and flexibility. This has identified…

  12. Microprocessor Design Using Hardware Description Language

    ERIC Educational Resources Information Center

    Mita, Rosario; Palumbo, Gaetano

    2008-01-01

    The following paper has been conceived to deal with the contents of some lectures aimed at enhancing courses on digital electronic, microelectronic or VLSI systems. Those lectures show how to use a hardware description language (HDL), such as the VHDL, to specify, design and verify a custom microprocessor. The general goal of this work is to teach…

  13. Microprocessor Design Using Hardware Description Language

    ERIC Educational Resources Information Center

    Mita, Rosario; Palumbo, Gaetano

    2008-01-01

    The following paper has been conceived to deal with the contents of some lectures aimed at enhancing courses on digital electronic, microelectronic or VLSI systems. Those lectures show how to use a hardware description language (HDL), such as the VHDL, to specify, design and verify a custom microprocessor. The general goal of this work is to teach…

  14. Design guidelines for robotically serviceable hardware

    NASA Technical Reports Server (NTRS)

    Gordon, Scott A.

    1988-01-01

    Research being conducted at the Goddard Space Flight Center into the development of guidelines for the design of robotically serviceable spaceflight hardware is described. A mock-up was built based on an existing spaceflight system demonstrating how these guidelines can be applied to actual hardware. The report examines the basic servicing philosophy being studied and how this philosophy is reflected in the formulation of design guidelines for robotic servicing. A description of the mock-up is presented with emphasis on the design features that make it robot friendly. Three robotic servicing schemes fulfilling the design guidelines were developed for the mock-up. These servicing schemes are examined as to how their implementation was affected by the constraints of the spacecraft system on which the mock-up is based.

  15. Extravehicular activity training and hardware design consideration

    NASA Technical Reports Server (NTRS)

    Thuot, P. J.; Harbaugh, G. J.

    1995-01-01

    Preparing astronauts to perform the many complex extravehicular activity (EVA) tasks required to assemble and maintain Space Station will be accomplished through training simulations in a variety of facilities. The adequacy of this training is dependent on a thorough understanding of the task to be performed, the environment in which the task will be performed, high-fidelity training hardware and an awareness of the limitations of each particular training facility. Designing hardware that can be successfully operated, or assembled, by EVA astronauts in an efficient manner, requires an acute understanding of human factors and the capabilities and limitations of the space-suited astronaut. Additionally, the significant effect the microgravity environment has on the crew members' capabilities has to be carefully considered not only for each particular task, but also for all the overhead related to the task and the general overhead associated with EVA. This paper will describe various training methods and facilities that will be used to train EVA astronauts for Space Station assembly and maintenance. User-friendly EVA hardware design considerations and recent EVA flight experience will also be presented.

  16. Extravehicular activity training and hardware design consideration.

    PubMed

    Thuot, P J; Harbaugh, G J

    1995-07-01

    Preparing astronauts to perform the many complex extravehicular activity (EVA) tasks required to assemble and maintain Space Station will be accomplished through training simulations in a variety of facilities. The adequacy of this training is dependent on a thorough understanding of the task to be performed, the environment in which the task will be performed, high-fidelity training hardware and an awareness of the limitations of each particular training facility. Designing hardware that can be successfully operated, or assembled, by EVA astronauts in an efficient manner, requires an acute understanding of human factors and the capabilities and limitations of the space-suited astronaut. Additionally, the significant effect the microgravity environment has on the crew members' capabilities has to be carefully considered not only for each particular task, but also for all the overhead related to the task and the general overhead associated with EVA. This paper will describe various training methods and facilities that will be used to train EVA astronauts for Space Station assembly and maintenance. User-friendly EVA hardware design considerations and recent EVA flight experience will also be presented.

  17. Design Space Issues for Intrinsic Evolvable Hardware

    NASA Technical Reports Server (NTRS)

    Hereford, James; Gwaltney, David

    2004-01-01

    This paper discusses the problem of increased programming time for intrinsic evolvable hardware (EM) as the complexity of the circuit grows. As the circuit becomes more complex, then more components will be required and a longer programming string, L, is required. We develop equations for the size of the population, n, and the number of generations required for the population to converge, based on L. Our analytical results show that even though the design search space grows as 2L (assuming a binary programming string), the number of circuit evaluations, n*ngen, only grows as O(Lg3), or slightly less than O(L). This makes evolvable techniques a good tool for exploring large design spaces. The major hurdle for intrinsic EHW is evaluation time for each possible circuit. The evaluation time involves downloading the bit string to the device, updating the device configuration, measuring the output and then transferring the output data to the control processor. Each of these steps must be done for each member of the population. The processing time of the computer becomes negligible since the selection/crossover/mutation steps are only done once per generation. Evaluation time presently limits intrinsic evolvable hardware techniques to designing only small or medium-sized circuits. To evolve large or complicated circuits, several researchers have proposed using hierarchical design or reuse techniques where submodules are combined together to form complex circuits. However, these practical approaches limit the search space of available designs and preclude utilizing parasitic coupling or other effects within the programmable device. The practical approaches also raise the issue of why intrinsic EHW techniques do not easily apply to large design spaces, since the analytical results show only an O(L) complexity growth.

  18. Theorem Proving in Intel Hardware Design

    NASA Technical Reports Server (NTRS)

    O'Leary, John

    2009-01-01

    For the past decade, a framework combining model checking (symbolic trajectory evaluation) and higher-order logic theorem proving has been in production use at Intel. Our tools and methodology have been used to formally verify execution cluster functionality (including floating-point operations) for a number of Intel products, including the Pentium(Registered TradeMark)4 and Core(TradeMark)i7 processors. Hardware verification in 2009 is much more challenging than it was in 1999 - today s CPU chip designs contain many processor cores and significant firmware content. This talk will attempt to distill the lessons learned over the past ten years, discuss how they apply to today s problems, outline some future directions.

  19. Design Space Issues for Intrinsic Evolvable Hardware

    NASA Technical Reports Server (NTRS)

    Hereford, James; Gwaltney, David

    2004-01-01

    This paper discuss the problem of increased programming time for intrinsic evolvable hardware (EHW) as the complexity of the circuit grows. We develop equations for the size of the population, n, and the number of generations required for the population to converge, ngen, based on L, the length of the programming string. We show that the processing time of the computer becomes negligible for intrinsic EHW since the selection/crossover/mutation steps are only done once per generation, suggesting there is room for use of more complex evolutionary algorithms m intrinsic EHW. F i y , we review the state of the practice and discuss the notion of a system design approach for intrinsic EHW.

  20. Hardware design for the Autonomous Visibility Monitoring (AVM) observatory

    NASA Technical Reports Server (NTRS)

    Cowles, K.

    1993-01-01

    The hardware for the three Autonomous Visibility Monitoring (AVM) observatories was redesigned. Changes in hardware design include electronics components, weather sensors, and the telescope drive system. Operation of the new hardware is discussed, as well as some of its features. The redesign will allow reliable automated operation.

  1. An improved non-uniformity correction algorithm and its hardware implementation on FPGA

    NASA Astrophysics Data System (ADS)

    Rong, Shenghui; Zhou, Huixin; Wen, Zhigang; Qin, Hanlin; Qian, Kun; Cheng, Kuanhong

    2017-09-01

    The Non-uniformity of Infrared Focal Plane Arrays (IRFPA) severely degrades the infrared image quality. An effective non-uniformity correction (NUC) algorithm is necessary for an IRFPA imaging and application system. However traditional scene-based NUC algorithm suffers the image blurring and artificial ghosting. In addition, few effective hardware platforms have been proposed to implement corresponding NUC algorithms. Thus, this paper proposed an improved neural-network based NUC algorithm by the guided image filter and the projection-based motion detection algorithm. First, the guided image filter is utilized to achieve the accurate desired image to decrease the artificial ghosting. Then a projection-based moving detection algorithm is utilized to determine whether the correction coefficients should be updated or not. In this way the problem of image blurring can be overcome. At last, an FPGA-based hardware design is introduced to realize the proposed NUC algorithm. A real and a simulated infrared image sequences are utilized to verify the performance of the proposed algorithm. Experimental results indicated that the proposed NUC algorithm can effectively eliminate the fix pattern noise with less image blurring and artificial ghosting. The proposed hardware design takes less logic elements in FPGA and spends less clock cycles to process one frame of image.

  2. Employing ISRU Models to Improve Hardware Design

    NASA Technical Reports Server (NTRS)

    Linne, Diane L.

    2010-01-01

    An analytical model for hydrogen reduction of regolith was used to investigate the effects of several key variables on the energy and mass performance of reactors for a lunar in-situ resource utilization oxygen production plant. Reactor geometry, reaction time, number of reactors, heat recuperation, heat loss, and operating pressure were all studied to guide hardware designers who are developing future prototype reactors. The effects of heat recuperation where the incoming regolith is pre-heated by the hot spent regolith before transfer was also investigated for the first time. In general, longer reaction times per batch provide a lower overall energy, but also result in larger and heavier reactors. Three reactors with long heat-up times results in similar energy requirements as a two-reactor system with all other parameters the same. Three reactors with heat recuperation results in energy reductions of 20 to 40 percent compared to a three-reactor system with no heat recuperation. Increasing operating pressure can provide similar energy reductions as heat recuperation for the same reaction times.

  3. Design of hardware correlator for BOC(1,1) baseband signal

    NASA Astrophysics Data System (ADS)

    Yang, Dong-Kai; Li, Wei-Qiang; Liu, Xian-Yang; Feng, Yuan

    2009-12-01

    BOC signal structure was introduced in this paper. BOC signal modulation and BOC(1,1) auto-correlation function were analyzed in detail. Based on the signal acquisition, tracking loop for BOC(1,1), a hardware design with FPGA chip was presented for the correlator, implemented using EP2S60 from Altera Co. The hardware correlator architecture and functions were described with two key modules, i.e. Pseudo-Random Noise (PRN) code generator and Numerical Control Oscillator(NCO). The practical test results show that the designed hardware correlator can work steadily and correctly, which is valid for the BOC(1,1) signal acquisition and tracking.

  4. The Art of Space Flight Exercise Hardware: Design and Implementation

    NASA Technical Reports Server (NTRS)

    Beyene, Nahom M.

    2004-01-01

    The design of space flight exercise hardware depends on experience with crew health maintenance in a microgravity environment, history in development of flight-quality exercise hardware, and a foundation for certifying proper project management and design methodology. Developed over the past 40 years, the expertise in designing exercise countermeasures hardware at the Johnson Space Center stems from these three aspects of design. The medical community has steadily pursued an understanding of physiological changes in humans in a weightless environment and methods of counteracting negative effects on the cardiovascular and musculoskeletal system. The effects of weightlessness extend to the pulmonary and neurovestibular system as well with conditions ranging from motion sickness to loss of bone density. Results have shown losses in water weight and muscle mass in antigravity muscle groups. With the support of university-based research groups and partner space agencies, NASA has identified exercise to be the primary countermeasure for long-duration space flight. The history of exercise hardware began during the Apollo Era and leads directly to the present hardware on the International Space Station. Under the classifications of aerobic and resistive exercise, there is a clear line of development from the early devices to the countermeasures hardware used today. In support of all engineering projects, the engineering directorate has created a structured framework for project management. Engineers have identified standards and "best practices" to promote efficient and elegant design of space exercise hardware. The quality of space exercise hardware depends on how well hardware requirements are justified by exercise performance guidelines and crew health indicators. When considering the microgravity environment of the device, designers must consider performance of hardware separately from the combined human-in-hardware system. Astronauts are the caretakers of the hardware

  5. Automated Hardware Design via Evolutionary Search

    NASA Technical Reports Server (NTRS)

    Lohn, Jason D.; Colombano, Silvano P.

    2000-01-01

    The goal of this research is to investigate the application of evolutionary search to the process of automated engineering design. Evolutionary search techniques involve the simulation of Darwinian mechanisms by computer algorithms. In recent years, such techniques have attracted much attention because they are able to tackle a wide variety of difficult problems and frequently produce acceptable solutions. The results obtained are usually functional, often surprising, and typically "messy" because the algorithms are told to concentrate on the overriding objective and not elegance or simplicity. advantages. First, faster design cycles translate into time and, hence, cost savings. Second, automated design techniques can be made to scale well and hence better deal with increasing amounts of design complexity. Third, design quality can increase because design properties can be specified a priori. For example, size and weight specifications of a device, smaller and lighter than the best known design, might be optimized by the automated design technique. The domain of electronic circuit design is an advantageous platform in which to study automated design techniques because it is a rich design space that is well understood, permitting human-created designs to be compared to machine- generated designs. developed for circuit design was to automatically produce high-level integrated electronic circuit designs whose properties permit physical implementation in silicon. This process entailed designing an effective evolutionary algorithm and solving a difficult multiobjective optimization problem. FY 99 saw many accomplishments in this effort.

  6. Hardware design methodology for efficient reuse

    SciTech Connect

    Seepold, R.; Kunzmann, A.; Rosenstiel, W.

    1996-12-31

    The approach presented offers a design methodology for efficient reuse that is based on a Reuse Management System (RMS) and a detailed analysis of component reuse. After the presentation of the current level of work being done in this field, RMS is introduced and a basic model is shown to describe fundamental mechanisms before design for reuse techniques can be introduced. In contrast to conventional reuse approaches, which are restricted to specific support, this new approach bridges the gap between design and reuse integration. The new methodology incorporates RMS requirements and it achieves several initial targets requested for a powerful system to provide comprehensive reuse. Based on the object-oriented internal data model and the sketched architecture, easy access via common Internet services is offered, and therefore, quick access to reuse data is possible. In summary, the approach helps to reduce long term development costs, and therefore, it is an innovative way to reach the objectives of efficient cost management.

  7. Hardware Design and Implementation of IP-over-1394 Protocol Stack and Its Evaluation

    NASA Astrophysics Data System (ADS)

    Abe, Kôki; Hassan, Mohd Yusairi Bin Abu

    This paper describes the hardware design of core functions of the Internet protocol IP over IEEE1394 interface (IP over 1394) and its implementation on an FPGA. The design was evaluated by counting the number of FPGA logic elements required for the implementation. Using a system clock of 49.152MHz, we verified that packets sent from an application on top of the protocol stack were correctly received by the other protocol stack via the IEEE1394 port at a transfer rate of 400 Mbps. We also verified the communication behaviors of the design with an isochronous resource manager to reserve a channel prior to data transmissions. The hardware cost of the core IP layer was less than that of the link layer. The evaluation results will help the IP-over-1394 designers explore quantitatively various spectrum of the software/hardware design alternatives.

  8. Magnetic resonance elastography hardware design: a survey.

    PubMed

    Tse, Z T H; Janssen, H; Hamed, A; Ristic, M; Young, I; Lamperth, M

    2009-05-01

    Magnetic resonance elastography (MRE) is an emerging technique capable of measuring the shear modulus of tissue. A suspected tumour can be identified by comparing its properties with those of tissues surrounding it; this can be achieved even in deep-lying areas as long as mechanical excitation is possible. This would allow non-invasive methods for cancer-related diagnosis in areas not accessible with conventional palpation. An actuating mechanism is required to generate the necessary tissue displacements directly on the patient in the scanner and three different approaches, in terms of actuator action and position, exist to derive stiffness measurements. However, the magnetic resonance (MR) environment places considerable constraints on the design of such devices, such as the possibility of mutual interference between electrical components, the scanner field, and radio frequency pulses, and the physical space restrictions of the scanner bore. This paper presents a review of the current solutions that have been developed for MRE devices giving particular consideration to the design criteria including the required vibration frequency and amplitude in different applications, the issue of MR compatibility, actuation principles, design complexity, and scanner synchronization issues. The future challenges in this field are also described.

  9. Flight Hardware Packaging Design for Stringent EMC Radiated Emission Requirements

    NASA Technical Reports Server (NTRS)

    Lortz, Charlene L.; Huang, Chi-Chien N.; Ravich, Joshua A.; Steiner, Carl N.

    2013-01-01

    This packaging design approach can help heritage hardware meet a flight project's stringent EMC radiated emissions requirement. The approach requires only minor modifications to a hardware's chassis and mainly concentrates on its connector interfaces. The solution is to raise the surface area where the connector is mounted by a few millimeters using a pedestal, and then wrapping with conductive tape from the cable backshell down to the surface-mounted connector. This design approach has been applied to JPL flight project subsystems. The EMC radiated emissions requirements for flight projects can vary from benign to mission critical. If the project's EMC requirements are stringent, the best approach to meet EMC requirements would be to design an EMC control program for the project early on and implement EMC design techniques starting with the circuit board layout. This is the ideal scenario for hardware that is built from scratch. Implementation of EMC radiated emissions mitigation techniques can mature as the design progresses, with minimal impact to the design cycle. The real challenge exists for hardware that is planned to be flown following a built-to-print approach, in which heritage hardware from a past project with a different set of requirements is expected to perform satisfactorily for a new project. With acceptance of heritage, the design would already be established (circuit board layout and components have already been pre-determined), and hence any radiated emissions mitigation techniques would only be applicable at the packaging level. The key is to take a heritage design with its known radiated emissions spectrum and repackage, or modify its chassis design so that it would have a better chance of meeting the new project s radiated emissions requirements.

  10. MLAA-based attenuation correction of flexible hardware components in hybrid PET/MR imaging.

    PubMed

    Heußer, Thorsten; Rank, Christopher M; Berker, Yannick; Freitag, Martin T; Kachelrieß, Marc

    2017-12-01

    Accurate PET quantification demands attenuation correction (AC) for both patient and hardware attenuation of the 511 keV annihilation photons. In hybrid PET/MR imaging, AC for stationary hardware components such as patient table and MR head coil is straightforward, employing CT-derived attenuation templates. AC for flexible hardware components such as MR-safe headphones and MR radiofrequency (RF) surface coils is more challenging. Registration-based approaches, aligning CT-based attenuation templates with the current patient position, have been proposed but are not used in clinical routine. Ignoring headphone or RF coil attenuation has been shown to result in regional activity underestimation values of up to 18%. We propose to employ the maximum-likelihood reconstruction of attenuation and activity (MLAA) algorithm to estimate the attenuation of flexible hardware components. Starting with an initial attenuation map not including flexible hardware components, the attenuation update of MLAA is applied outside the body outline only, allowing to estimate hardware attenuation without modifying the patient attenuation map. Appropriate prior expectations on the attenuation coefficients are incorporated into MLAA. The proposed method is investigated for non-TOF PET phantom and (18)F-FDG patient data acquired with a clinical PET/MR device, using headphones or RF surface coils as flexible hardware components. Although MLAA cannot recover the exact physical shape of the hardware attenuation maps, the overall attenuation of the hardware components is accurately estimated. Therefore, the proposed algorithm significantly improves PET quantification. Using the phantom data, local activity underestimation when neglecting hardware attenuation was reduced from up to 25% to less than 3% under- or overestimation as compared to reference scans without hardware present or to CT-derived AC. For the patient data, we found an average activity underestimation of 7.9% evaluated in the full

  11. Design Tools for Reconfigurable Hardware in Orbit (RHinO)

    NASA Technical Reports Server (NTRS)

    French, Mathew; Graham, Paul; Wirthlin, Michael; Larchev, Gregory; Bellows, Peter; Schott, Brian

    2004-01-01

    The Reconfigurable Hardware in Orbit (RHinO) project is focused on creating a set of design tools that facilitate and automate design techniques for reconfigurable computing in space, using SRAM-based field-programmable-gate-array (FPGA) technology. These tools leverage an established FPGA design environment and focus primarily on space effects mitigation and power optimization. The project is creating software to automatically test and evaluate the single-event-upsets (SEUs) sensitivities of an FPGA design and insert mitigation techniques. Extensions into the tool suite will also allow evolvable algorithm techniques to reconfigure around single-event-latchup (SEL) events. In the power domain, tools are being created for dynamic power visualiization and optimization. Thus, this technology seeks to enable the use of Reconfigurable Hardware in Orbit, via an integrated design tool-suite aiming to reduce risk, cost, and design time of multimission reconfigurable space processors using SRAM-based FPGAs.

  12. Lab at Home: Hardware Kits for a Digital Design Lab

    ERIC Educational Resources Information Center

    Oliver, J. P.; Haim, F.

    2009-01-01

    An innovative laboratory methodology for an introductory digital design course is presented. Instead of having traditional lab experiences, where students have to come to school classrooms, a "lab at home" concept is proposed. Students perform real experiments in their own homes, using hardware kits specially developed for this purpose. They…

  13. Hardware Design of the Energy Efficient Fall Detection Device

    NASA Astrophysics Data System (ADS)

    Skorodumovs, A.; Avots, E.; Hofmanis, J.; Korāts, G.

    2016-04-01

    Health issues for elderly people may lead to different injuries obtained during simple activities of daily living. Potentially the most dangerous are unintentional falls that may be critical or even lethal to some patients due to the heavy injury risk. In the project "Wireless Sensor Systems in Telecare Application for Elderly People", we have developed a robust fall detection algorithm for a wearable wireless sensor. To optimise the algorithm for hardware performance and test it in field, we have designed an accelerometer based wireless fall detector. Our main considerations were: a) functionality - so that the algorithm can be applied to the chosen hardware, and b) power efficiency - so that it can run for a very long time. We have picked and tested the parts, built a prototype, optimised the firmware for lowest consumption, tested the performance and measured the consumption parameters. In this paper, we discuss our design choices and present the results of our work.

  14. Energy Efficient Engine combustor test hardware detailed design report

    NASA Technical Reports Server (NTRS)

    Burrus, D. L.; Chahrour, C. A.; Foltz, H. L.; Sabla, P. E.; Seto, S. P.; Taylor, J. R.

    1984-01-01

    The Energy Efficient Engine (E3) Combustor Development effort was conducted as part of the overall NASA/GE E3 Program. This effort included the selection of an advanced double-annular combustion system design. The primary intent was to evolve a design which meets the stringent emissions and life goals of the E3 as well as all of the usual performance requirements of combustion systems for modern turbofan engines. Numerous detailed design studies were conducted to define the features of the combustion system design. Development test hardware was fabricated, and an extensive testing effort was undertaken to evaluate the combustion system subcomponents in order to verify and refine the design. Technology derived from this development effort will be incorporated into the engine combustion system hardware design. This advanced engine combustion system will then be evaluated in component testing to verify the design intent. What is evolving from this development effort is an advanced combustion system capable of satisfying all of the combustion system design objectives and requirements of the E3. Fuel nozzle, diffuser, starting, and emissions design studies are discussed.

  15. Hardware Design Improvements to the Major Constituent Analyzer

    NASA Technical Reports Server (NTRS)

    Combs, Scott; Schwietert, Daniel; Anaya, Marcial; DeWolf, Shannon; Merrill, Dave; Gardner, Ben D.; Thoresen, Souzan; Granahan, John; Belcher, Paul; Matty, Chris

    2011-01-01

    The Major Constituent Analyzer (MCA) onboard the International Space Station (ISS) is designed to monitor the major constituents of the ISS's internal atmosphere. This mass spectrometer based system is an integral part of the Environmental Control and Life Support System (ECLSS) and is a primary tool for the management of ISS atmosphere composition. As a part of NASA Change Request CR10773A, several alterations to the hardware have been made to accommodate improved MCA logistics. First, the ORU 08 verification gas assembly has been modified to allow the verification gas cylinder to be installed on orbit. The verification gas is an essential MCA consumable that requires periodic replenishment. Designing the cylinder for subassembly transport reduces the size and weight of the maintained item for launch. The redesign of the ORU 08 assembly includes a redesigned housing, cylinder mounting apparatus, and pneumatic connection. The second hardware change is a redesigned wiring harness for the ORU 02 analyzer. The ORU 02 electrical connector interface was damaged in a previous on-orbit installation, and this necessitated the development of a temporary fix while a more permanent solution was developed. The new wiring harness design includes flexible cable as well as indexing fasteners and guide-pins, and provides better accessibility during the on-orbit maintenance operation. This presentation will describe the hardware improvements being implemented for MCA as well as the expected improvement to logistics and maintenance.

  16. HSCT Sector Combustor Hardware Modifications for Improved Combustor Design

    NASA Technical Reports Server (NTRS)

    Greenfield, Stuart C.; Heberling, Paul V.; Moertle, George E.

    2005-01-01

    An alternative to the stepped-dome design for the lean premixed prevaporized (LPP) combustor has been developed. The new design uses the same premixer types as the stepped-dome design: integrated mixer flameholder (IMFH) tubes and a cyclone swirler pilot. The IMFH fuel system has been taken to a new level of development. Although the IMFH fuel system design developed in this Task is not intended to be engine-like hardware, it does have certain characteristics of engine hardware, including separate fuel circuits for each of the fuel stages. The four main stage fuel circuits are integrated into a single system which can be withdrawn from the combustor as a unit. Additionally, two new types of liner cooling have been designed. The resulting lean blowout data was found to correlate well with the Lefebvre parameter. As expected, CO and unburned hydrocarbons emissions were shown to have an approximately linear relationship, even though some scatter was present in the data, and the CO versus flame temperature data showed the typical cupped shape. Finally, the NOx emissions data was shown to agree well with a previously developed correlation based on emissions data from Configuration 3 tests performed at GEAE. The design variations of the cyclone swirler pilot that were investigated in this study did not significantly change the NOx emissions from the baseline design (GEAE Configuration 3) at supersonic cruise conditions.

  17. [Software and hardware for computer equipment designed for psychophysiological examination].

    PubMed

    Matveev, E V; Gal'etov, I V; Vasil'ev, A A; Kravchuk, A Iu; Tereshkina, D V

    2005-01-01

    Principles of designing software and hardware for new computer equipment for psychophysiological examination were elaborated on the basis of theoretical prerequisites and of analysis of the use of equipment manufactured serially for quantitation of indices of the human higher nervous activity (HNA). The hierarchic structuring of software and hardware enabled, through unification of solutions, the development of new modifications of two equipment sets: computer-based unit "Psihomat" KPFK-99 for psychophysiological examination and computer-based unit "STABILOTEST" ST-01 for the evaluation of the central nervous system by the stability parameters in maintaining the vertical posture. The units have new improved functional features and provide the users with new computer technologies for dealing with research and practical tasks related with examination of human HNA parameters in health and pathology.

  18. Involuntary eye motion correction in retinal optical coherence tomography: Hardware or software solution?

    PubMed

    Baghaie, Ahmadreza; Yu, Zeyun; D'Souza, Roshan M

    2017-04-01

    In this paper, we review state-of-the-art techniques to correct eye motion artifacts in Optical Coherence Tomography (OCT) imaging. The methods for eye motion artifact reduction can be categorized into two major classes: (1) hardware-based techniques and (2) software-based techniques. In the first class, additional hardware is mounted onto the OCT scanner to gather information about the eye motion patterns during OCT data acquisition. This information is later processed and applied to the OCT data for creating an anatomically correct representation of the retina, either in an offline or online manner. In software based techniques, the motion patterns are approximated either by comparing the acquired data to a reference image, or by considering some prior assumptions about the nature of the eye motion. Careful investigations done on the most common methods in the field provides invaluable insight regarding future directions of the research in this area. The challenge in hardware-based techniques lies in the implementation aspects of particular devices. However, the results of these techniques are superior to those obtained from software-based techniques because they are capable of capturing secondary data related to eye motion during OCT acquisition. Software-based techniques on the other hand, achieve moderate success and their performance is highly dependent on the quality of the OCT data in terms of the amount of motion artifacts contained in them. However, they are still relevant to the field since they are the sole class of techniques with the ability to be applied to legacy data acquired using systems that do not have extra hardware to track eye motion. Copyright © 2017 Elsevier B.V. All rights reserved.

  19. IDEAS and App Development Internship in Hardware and Software Design

    NASA Technical Reports Server (NTRS)

    Alrayes, Rabab D.

    2016-01-01

    In this report, I will discuss the tasks and projects I have completed while working as an electrical engineering intern during the spring semester of 2016 at NASA Kennedy Space Center. In the field of software development, I completed tasks for the G-O Caching Mobile App and the Asbestos Management Information System (AMIS) Web App. The G-O Caching Mobile App was written in HTML, CSS, and JavaScript on the Cordova framework, while the AMIS Web App is written in HTML, CSS, JavaScript, and C# on the AngularJS framework. My goals and objectives on these two projects were to produce an app with an eye-catching and intuitive User Interface (UI), which will attract more employees to participate; to produce a fully-tested, fully functional app which supports workforce engagement and exploration; to produce a fully-tested, fully functional web app that assists technicians working in asbestos management. I also worked in hardware development on the Integrated Display and Environmental Awareness System (IDEAS) wearable technology project. My tasks on this project were focused in PCB design and camera integration. My goals and objectives for this project were to successfully integrate fully functioning custom hardware extenders on the wearable technology headset to minimize the size of hardware on the smart glasses headset for maximum user comfort; to successfully integrate fully functioning camera onto the headset. By the end of this semester, I was able to successfully develop four extender boards to minimize hardware on the headset, and assisted in integrating a fully-functioning camera into the system.

  20. Design-to-fabricate: maker hardware requires maker software.

    PubMed

    Schmidt, Ryan; Ratto, Matt

    2013-01-01

    As a result of consumer-level 3D printers' increasing availability and affordability, the audience for 3D-design tools has grown considerably. However, current tools are ill-suited for these users. They have steep learning curves and don't take into account that the end goal is a physical object, not a digital model. A new class of "maker"-level design tools is needed to accompany this new commodity hardware. However, recent examples of such tools achieve accessibility primarily by constraining functionality. In contrast, the meshmixer project is building tools that provide accessibility and expressive power by leveraging recent computer graphics research in geometry processing. The project members have had positive experiences with several 3D-design-to-print workshops and are exploring several design-to-fabricate problems. This article is part of a special issue on 3D printing.

  1. Towards improved hardware component attenuation correction in PET/MR hybrid imaging

    NASA Astrophysics Data System (ADS)

    Paulus, D. H.; Tellmann, L.; Quick, H. H.

    2013-11-01

    In positron emission tomography/computed tomography (PET/CT) hybrid imaging attenuation correction (AC) of the patient tissue and patient table is performed by converting the CT-based Hounsfield units (HU) to linear attenuation coefficients (LAC) of PET. When applied to the new field of hardware component AC in PET/magnetic resonance (MR) hybrid imaging, this conversion method may result in local overcorrection of PET activity values. The aim of this study thus was to optimize the conversion parameters for CT-based AC of hardware components in PET/MR. Systematic evaluation and optimization of the HU to LAC conversion parameters has been performed for the hardware component attenuation map (µ-map) of a flexible radiofrequency (RF) coil used in PET/MR imaging. Furthermore, spatial misregistration of this RF coil to its µ-map was simulated by shifting the µ-map in different directions and the effect on PET quantification was evaluated. Measurements of a PET NEMA standard emission phantom were performed on an integrated hybrid PET/MR system. Various CT parameters were used to calculate different µ-maps for the flexible RF coil and to evaluate the impact on the PET activity concentration. A 511 keV transmission scan of the local RF coil was used as standard of reference to adapt the slope of the conversion from HUs to LACs at 511 keV. The average underestimation of the PET activity concentration due to the non-attenuation corrected RF coil in place was calculated to be 5.0% in the overall phantom. When considering attenuation only in the upper volume of the phantom, the average difference to the reference scan without RF coil is 11.0%. When the PET/CT conversion is applied, an average overestimation of 3.1% (without extended CT scale) and 4.2% (with extended CT scale) is observed in the top volume of the NEMA phantom. Using the adapted conversion resulting from this study, the deviation in the top volume of the phantom is reduced to -0.5% and shows the lowest

  2. Health Maintenance System (HMS) Hardware Research, Design, and Collaboration

    NASA Technical Reports Server (NTRS)

    Gonzalez, Stefanie M.

    2010-01-01

    The Space Life Sciences division (SLSD) concentrates on optimizing a crew member's health. Developments are translated into innovative engineering solutions, research growth, and community awareness. This internship incorporates all those areas by targeting various projects. The main project focuses on integrating clinical and biomedical engineering principles to design, develop, and test new medical kits scheduled for launch in the Spring of 2011. Additionally, items will be tagged with Radio Frequency Interference Devices (RFID) to keep track of the inventory. The tags will then be tested to optimize Radio Frequency feed and feed placement. Research growth will occur with ground based experiments designed to measure calcium encrusted deposits in the International Space Station (ISS). The tests will assess the urine calcium levels with Portable Clinical Blood Analyzer (PCBA) technology. If effective then a model for urine calcium will be developed and expanded to microgravity environments. To support collaboration amongst the subdivisions of SLSD the architecture of the Crew Healthcare Systems (CHeCS) SharePoint site has been redesigned for maximum efficiency. Community collaboration has also been established with the University of Southern California, Dept. of Aeronautical Engineering and the Food and Drug Administration (FDA). Hardware disbursements will transpire within these communities to support planetary surface exploration and to serve as an educational tool demonstrating how ground based medicine influenced the technological development of space hardware.

  3. Design and test hardware for a solar array switching unit

    NASA Technical Reports Server (NTRS)

    Patil, A. R.; Cho, B. H.; Sable, D.; Lee, F. C.

    1992-01-01

    This paper describes the control of a pulse width modulated (PWM) type sequential shunt switching unit (SSU) for spacecraft applications. It is found that the solar cell output capacitance has a significant impact on SSU design. Shorting of this cell capacitance by the PWM switch causes input current surges. These surges are minimized by the use of a series filter inductor. The system with a filter is analyzed for ripple and the control to output-voltage transfer function. Stable closed loop design considerations are discussed. The results are supported by modeling and measurements of loop gain and of closed-loop bus impedance on test hardware for NASA's 120 V Earth Observation System (EOS). The analysis and modeling are also applicable to NASA's 160 V Space Station power system.

  4. Modular implementation of a digital hardware design automation system

    NASA Astrophysics Data System (ADS)

    Masud, M.

    An automation system based on AHPL (A Hardware Programming Language) was developed. The project may be divided into three distinct phases: (1) Upgrading of AHPL to make it more universally applicable; (2) Implementation of a compiler for the language; and (3) illustration of how the compiler may be used to support several phases of design activities. Several new features were added to AHPL. These include: application-dependent parameters, mutliple clocks, asynchronous results, functional registers and primitive functions. The new language, called Universal AHPL, has been defined rigorously. The compiler design is modular. The parsing is done by an automatic parser generated from the SLR(1)BNF grammar of the language. The compiler produces two data bases from the AHPL description of a circuit. The first one is a tabular representation of the circuit, and the second one is a detailed interconnection linked list. The two data bases provide a means to interface the compiler to application-dependent CAD systems.

  5. Hardware accelerator design for tracking in smart camera

    NASA Astrophysics Data System (ADS)

    Singh, Sanjay; Dunga, Srinivasa Murali; Saini, Ravi; Mandal, A. S.; Shekhar, Chandra; Vohra, Anil

    2011-10-01

    Smart Cameras are important components in video analysis. For video analysis, smart cameras needs to detect interesting moving objects, track such objects from frame to frame, and perform analysis of object track in real time. Therefore, the use of real-time tracking is prominent in smart cameras. The software implementation of tracking algorithm on a general purpose processor (like PowerPC) could achieve low frame rate far from real-time requirements. This paper presents the SIMD approach based hardware accelerator designed for real-time tracking of objects in a scene. The system is designed and simulated using VHDL and implemented on Xilinx XUP Virtex-IIPro FPGA. Resulted frame rate is 30 frames per second for 250x200 resolution video in gray scale.

  6. A hardware Kalman-based offset estimator for nonuniformity correction on IRFPA

    NASA Astrophysics Data System (ADS)

    Contreras, Javier; Redlich, Rodolfo; Figueroa, Miguel; Torres, Sergio

    2012-10-01

    This paper presents a digital hardware filter that estimates the nonuniformity (NU) noise in an Infrared Focal Plane Array (IRFPA) and corrects it in real time. Implementing the algorithm in hardware results in a fast, compact, low-power nonuniformity correction (NUC) system that can be embedded into an intelligent imager at a very low cost. Because it does not use an external reference, our NUC circuit works in real time during normal operation, and can track parameter drift over time. Our NUC system models NU noise as a spatially regular source of additive noise, uses a Kalman filter to estimate the offset in each detector of the array and applies an inverse model to recover the original information captured by the detector. The NUC board uses a low-cost Xilinx Spartan 3E XC3S500E FPGA operating at 75MHz. The NUC circuit consumes 17.3mW of dynamic power and uses only 10% of the logic resources of the FPGA. Despite ignoring the multiplicative effects of nonuniformity, our NUC circuit reaches a Peak Signal-to-Noise Ratio (PSNR) of 35dB in under 50 frames, referenced to two-point calibration using black bodies. This performance lies within 0.35dB of a double-precision Matlab implementation of the algorithm. Without the bandwidth limitations currently imposed by the external RAM that stores the offset estimations, our circuit can correct 320x240-pixel video at up to 1,254 frames per second.

  7. Design Time Optimization for Hardware Watermarking Protection of HDL Designs

    PubMed Central

    Castillo, E.; Morales, D. P.; García, A.; Parrilla, L.; Todorovich, E.; Meyer-Baese, U.

    2015-01-01

    HDL-level design offers important advantages for the application of watermarking to IP cores, but its complexity also requires tools automating these watermarking algorithms. A new tool for signature distribution through combinational logic is proposed in this work. IPP@HDL, a previously proposed high-level watermarking technique, has been employed for evaluating the tool. IPP@HDL relies on spreading the bits of a digital signature at the HDL design level using combinational logic included within the original system. The development of this new tool for the signature distribution has not only extended and eased the applicability of this IPP technique, but it has also improved the signature hosting process itself. Three algorithms were studied in order to develop this automated tool. The selection of a cost function determines the best hosting solutions in terms of area and performance penalties on the IP core to protect. An 1D-DWT core and MD5 and SHA1 digital signatures were used in order to illustrate the benefits of the new tool and its optimization related to the extraction logic resources. Among the proposed algorithms, the alternative based on simulated annealing reduces the additional resources while maintaining an acceptable computation time and also saving designer effort and time. PMID:25861681

  8. Design time optimization for hardware watermarking protection of HDL designs.

    PubMed

    Castillo, E; Morales, D P; García, A; Parrilla, L; Todorovich, E; Meyer-Baese, U

    2015-01-01

    HDL-level design offers important advantages for the application of watermarking to IP cores, but its complexity also requires tools automating these watermarking algorithms. A new tool for signature distribution through combinational logic is proposed in this work. IPP@HDL, a previously proposed high-level watermarking technique, has been employed for evaluating the tool. IPP@HDL relies on spreading the bits of a digital signature at the HDL design level using combinational logic included within the original system. The development of this new tool for the signature distribution has not only extended and eased the applicability of this IPP technique, but it has also improved the signature hosting process itself. Three algorithms were studied in order to develop this automated tool. The selection of a cost function determines the best hosting solutions in terms of area and performance penalties on the IP core to protect. An 1D-DWT core and MD5 and SHA1 digital signatures were used in order to illustrate the benefits of the new tool and its optimization related to the extraction logic resources. Among the proposed algorithms, the alternative based on simulated annealing reduces the additional resources while maintaining an acceptable computation time and also saving designer effort and time.

  9. Hardware accelerator design for change detection in smart camera

    NASA Astrophysics Data System (ADS)

    Singh, Sanjay; Dunga, Srinivasa Murali; Saini, Ravi; Mandal, A. S.; Shekhar, Chandra; Chaudhury, Santanu; Vohra, Anil

    2011-10-01

    Smart Cameras are important components in Human Computer Interaction. In any remote surveillance scenario, smart cameras have to take intelligent decisions to select frames of significant changes to minimize communication and processing overhead. Among many of the algorithms for change detection, one based on clustering based scheme was proposed for smart camera systems. However, such an algorithm could achieve low frame rate far from real-time requirements on a general purpose processors (like PowerPC) available on FPGAs. This paper proposes the hardware accelerator capable of detecting real time changes in a scene, which uses clustering based change detection scheme. The system is designed and simulated using VHDL and implemented on Xilinx XUP Virtex-IIPro FPGA board. Resulted frame rate is 30 frames per second for QVGA resolution in gray scale.

  10. Hardware design and implementation of the closed-orbit feedback system at APS

    SciTech Connect

    Barr, D.; Chung, Youngjoo

    1996-10-01

    The Advanced Photon Source (APS) storage ring will utilize a closed-orbit feedback system in order to produce a more stable beam. The specified orbit measurement resolution is 25 microns for global feedback and 1 micron for local feedback. The system will sample at 4 kHz and provide a correction bandwidth of 100 Hz. At this bandwidth, standard rf BPMs will provide a resolution of 0.7 micron, while specialized miniature BPMs positioned on either side of the insertion devices for local feedback will provide a resolution of 0.2 micron (1). The measured BPM noise floor for standard BPMs is 0.06 micron per root hertz mA. Such a system has been designed, simulated, and tested on a small scale (2). This paper covers the actual hardware design and layout of the entire closed-loop system. This includes commercial hardware components, in addition to many components designed and built in-house. The paper will investigate the large-scale workings of all these devices, as well as an overall view of each piece of hardware used.

  11. Hardware synthesis from DDL. [Digital Design Language for computer aided design and test of LSI

    NASA Technical Reports Server (NTRS)

    Shah, A. M.; Shiva, S. G.

    1981-01-01

    The details of the digital systems can be conveniently input into the design automation system by means of Hardware Description Languages (HDL). The Computer Aided Design and Test (CADAT) system at NASA MSFC is used for the LSI design. The Digital Design Language (DDL) has been selected as HDL for the CADAT System. DDL translator output can be used for the hardware implementation of the digital design. This paper addresses problems of selecting the standard cells from the CADAT standard cell library to realize the logic implied by the DDL description of the system.

  12. Hardware synthesis from DDL. [Digital Design Language for computer aided design and test of LSI

    NASA Technical Reports Server (NTRS)

    Shah, A. M.; Shiva, S. G.

    1981-01-01

    The details of the digital systems can be conveniently input into the design automation system by means of Hardware Description Languages (HDL). The Computer Aided Design and Test (CADAT) system at NASA MSFC is used for the LSI design. The Digital Design Language (DDL) has been selected as HDL for the CADAT System. DDL translator output can be used for the hardware implementation of the digital design. This paper addresses problems of selecting the standard cells from the CADAT standard cell library to realize the logic implied by the DDL description of the system.

  13. INO340 telescope control system: hardware design and development

    NASA Astrophysics Data System (ADS)

    Jafarzadeh, Asghar; Ravanmehr, Reza

    2014-07-01

    In order to meet high image quality requirements of the INO340 telescope, one of the significant issues is the design and development of the Telescope Control System (TCS) architecture. The architecture of TCS is designed based on distributed control system configuration, which consists of four major subsystems: Telescope Control System supervisor (TCSS), Dome Control System (DCS), Mount Control System (MCS), and Active Optic System (AOS). Another system which plays important role in the hardware architecture is Interlock System (ILS), which is responsible for safety of staff, telescope and data. ILS architecture is also designed, using distributed system method based on the fail-safe PLCs. All subsystems of TCS are designed with an adequate safety subsystem, which are responsible for the safety of the subsystem and communicates through reliable lines with the main controller, placed in control room. In this paper, we explain the innovative architecture of Telescope Control System together with Interlock System and in brief show the interface control issues between different subsystems.

  14. Towards improved hardware component attenuation correction in PET/MR hybrid imaging.

    PubMed

    Paulus, D H; Tellmann, L; Quick, H H

    2013-11-21

    In positron emission tomography/computed tomography (PET/CT) hybrid imaging attenuation correction (AC) of the patient tissue and patient table is performed by converting the CT-based Hounsfield units (HU) to linear attenuation coefficients (LAC) of PET. When applied to the new field of hardware component AC in PET/magnetic resonance (MR) hybrid imaging, this conversion method may result in local overcorrection of PET activity values. The aim of this study thus was to optimize the conversion parameters for CT-based AC of hardware components in PET/MR. Systematic evaluation and optimization of the HU to LAC conversion parameters has been performed for the hardware component attenuation map (µ-map) of a flexible radiofrequency (RF) coil used in PET/MR imaging. Furthermore, spatial misregistration of this RF coil to its µ-map was simulated by shifting the µ-map in different directions and the effect on PET quantification was evaluated. Measurements of a PET NEMA standard emission phantom were performed on an integrated hybrid PET/MR system. Various CT parameters were used to calculate different µ-maps for the flexible RF coil and to evaluate the impact on the PET activity concentration. A 511 keV transmission scan of the local RF coil was used as standard of reference to adapt the slope of the conversion from HUs to LACs at 511 keV. The average underestimation of the PET activity concentration due to the non-attenuation corrected RF coil in place was calculated to be 5.0% in the overall phantom. When considering attenuation only in the upper volume of the phantom, the average difference to the reference scan without RF coil is 11.0%. When the PET/CT conversion is applied, an average overestimation of 3.1% (without extended CT scale) and 4.2% (with extended CT scale) is observed in the top volume of the NEMA phantom. Using the adapted conversion resulting from this study, the deviation in the top volume of the phantom is reduced to -0.5% and shows the lowest

  15. Scalability, Timing, and System Design Issues for Intrinsic Evolvable Hardware

    NASA Technical Reports Server (NTRS)

    Hereford, James; Gwaltney, David

    2004-01-01

    In this paper we address several issues pertinent to intrinsic evolvable hardware (EHW). The first issue is scalability; namely, how the design space scales as the programming string for the programmable device gets longer. We develop a model for population size and the number of generations as a function of the programming string length, L, and show that the number of circuit evaluations is an O(L2) process. We compare our model to several successful intrinsic EHW experiments and discuss the many implications of our model. The second issue that we address is the timing of intrinsic EHW experiments. We show that the processing time is a small part of the overall time to derive or evolve a circuit and that major improvements in processor speed alone will have only a minimal impact on improving the scalability of intrinsic EHW. The third issue we consider is the system-level design of intrinsic EHW experiments. We review what other researchers have done to break the scalability barrier and contend that the type of reconfigurable platform and the evolutionary algorithm are tied together and impose limits on each other.

  16. Energy efficient engine: fan test hardware detailed design report

    SciTech Connect

    Sullivan, T.J.

    1980-10-01

    A single stage fan and quarter stage booster were designed for the energy efficient engine. The fan has an inlet radius ratio of 0.342 and a specific flow rate of 208.9 Kg/S sq m (42.8 lbm/sec sq ft). The fan rotor has 32 medium aspect ratio (2.597) titanium blades with a partspan shroud at 55% blade height. The design corrected fan tip speed is 411.5 M/S (1350 ft/sec). The quarter stage island splits the total fan flow with approximately 22% of the flow being supercharged by the quarter stage rotor. The fan bypass ratio is 6.8. The core flow total pressure ratio is 1.67 and the fan bypass pressure ratio is 1.65. The design details of the fan and booster blading, and the fan frame and static structure for the fan configuration are presented.

  17. Energy efficient engine: Fan test hardware detailed design report

    NASA Technical Reports Server (NTRS)

    Sullivan, T. J.

    1980-01-01

    A single stage fan and quarter stage booster were designed for the energy efficient engine. The fan has an inlet radius ratio of 0.342 and a specific flow rate of 208.9 Kg/S sq m (42.8 lbm/sec sq ft). The fan rotor has 32 medium aspect ratio (2.597) titanium blades with a partspan shroud at 55% blade height. The design corrected fan tip speed is 411.5 M/S (1350 ft/sec). The quarter stage island splits the total fan flow with approximately 22% of the flow being supercharged by the quarter stage rotor. The fan bypass ratio is 6.8. The core flow total pressure ratio is 1.67 and the fan bypass pressure ratio is 1.65. The design details of the fan and booster blading, and the fan frame and static structure for the fan configuration are presented.

  18. Facilitating Preemptive Hardware System Design Using Partial Reconfiguration Techniques

    PubMed Central

    Rincon, Fernando; Vaderrama, Carlos; Villanueva, Felix; Caba, Julian; Lopez, Juan Carlos

    2014-01-01

    In FPGA-based control system design, partial reconfiguration is especially well suited to implement preemptive systems. In real-time systems, the deadline for critical task can compel the preemption of noncritical one. Besides, an asynchronous event can demand immediate attention and, then, force launching a reconfiguration process for high-priority task implementation. If the asynchronous event is previously scheduled, an explicit activation of the reconfiguration process is performed. If the event cannot be previously programmed, such as in dynamically scheduled systems, an implicit activation to the reconfiguration process is demanded. This paper provides a hardware-based approach to explicit and implicit activation of the partial reconfiguration process in dynamically reconfigurable SoCs and includes all the necessary tasks to cope with this issue. Furthermore, the reconfiguration service introduced in this work allows remote invocation of the reconfiguration process and then the remote integration of off-chip components. A model that offers component location transparency is also presented to enhance and facilitate system integration. PMID:24672292

  19. RF control hardware design for CYCIAE-100 cyclotron

    NASA Astrophysics Data System (ADS)

    Yin, Zhiguo; Fu, Xiaoliang; Ji, Bin; Zhao, Zhenlu; Zhang, Tianjue; Li, Pengzhan; Wei, Junyi; Xing, Jiansheng; Wang, Chuan

    2015-11-01

    The Beijing Radioactive Ion-beam Facility project is being constructed by BRIF division of China Institute of Atomic Energy. In this project, a 100 MeV high intensity compact proton cyclotron is built for multiple applications. The first successful beam extraction of CYCIAE-100 cyclotron was done in the middle of 2014. The extracted proton beam energy is 100 MeV and the beam current is more than 20 μA. The RF system of the CYCIAE-100 cyclotron includes two half-wavelength cavities, two 100 kW tetrode amplifiers and power transmission line systems (all above are independent from each other) and two sets of Low Level RF control crates. Each set of LLRF control includes an amplitude control unit, a tuning control unit, a phase control unit, a local Digital Signal Process control unit and an Advanced RISC Machines based EPICS IOC unit. These two identical LLRF control crates share one common reference clock and take advantages of modern digital technologies (e.g. DSP and Direct Digital Synthesizer) to achieve closed loop voltage and phase regulations of the dee-voltage. In the beam commission, the measured dee-voltage stability of RF system is better than 0.1% and phase stability is better than 0.03°. The hardware design of the LLRF system will be reviewed in this paper.

  20. Facilitating preemptive hardware system design using partial reconfiguration techniques.

    PubMed

    Dondo Gazzano, Julio; Rincon, Fernando; Vaderrama, Carlos; Villanueva, Felix; Caba, Julian; Lopez, Juan Carlos

    2014-01-01

    In FPGA-based control system design, partial reconfiguration is especially well suited to implement preemptive systems. In real-time systems, the deadline for critical task can compel the preemption of noncritical one. Besides, an asynchronous event can demand immediate attention and, then, force launching a reconfiguration process for high-priority task implementation. If the asynchronous event is previously scheduled, an explicit activation of the reconfiguration process is performed. If the event cannot be previously programmed, such as in dynamically scheduled systems, an implicit activation to the reconfiguration process is demanded. This paper provides a hardware-based approach to explicit and implicit activation of the partial reconfiguration process in dynamically reconfigurable SoCs and includes all the necessary tasks to cope with this issue. Furthermore, the reconfiguration service introduced in this work allows remote invocation of the reconfiguration process and then the remote integration of off-chip components. A model that offers component location transparency is also presented to enhance and facilitate system integration.

  1. Electronic hardware design of electrical capacitance tomography systems.

    PubMed

    Saied, I; Meribout, M

    2016-06-28

    Electrical tomography techniques for process imaging are very prominent for industrial applications, such as the oil and gas industry and chemical refineries, owing to their ability to provide the flow regime of a flowing fluid within a relatively high throughput. Among the various techniques, electrical capacitance tomography (ECT) is gaining popularity due to its non-invasive nature and its capability to differentiate between different phases based on their permittivity distribution. In recent years, several hardware designs have been provided for ECT systems that have improved its resolution of measurements to be around attofarads (aF, 10(-18) F), or the number of channels, that is required to be large for some applications that require a significant amount of data. In terms of image acquisition time, some recent systems could achieve a throughput of a few hundred frames per second, while data processing time could be achieved in only a few milliseconds per frame. This paper outlines the concept and main features of the most recent front-end and back-end electronic circuits dedicated for ECT systems. In this paper, multiple-excitation capacitance polling, a front-end electronic technique, shows promising results for ECT systems to acquire fast data acquisition speeds. A highly parallel field-programmable gate array (FPGA) based architecture for a fast reconstruction algorithm is also described. This article is part of the themed issue 'Supersensing through industrial process tomography'. © 2016 The Author(s).

  2. Design of Test Support Hardware for Advanced Space Suits

    NASA Technical Reports Server (NTRS)

    Watters, Jeffrey A.; Rhodes, Richard

    2013-01-01

    As a member of the Space Suit Assembly Development Engineering Team, I designed and built test equipment systems to support the development of the next generation of advanced space suits. During space suit testing it is critical to supply the subject with two functions: (1) cooling to remove metabolic heat, and (2) breathing air to pressurize the space suit. The objective of my first project was to design, build, and certify an improved Space Suit Cooling System for manned testing in a 1-G environment. This design had to be portable and supply a minimum cooling rate of 2500 BTU/hr. The Space Suit Cooling System is a robust, portable system that supports very high metabolic rates. It has a highly adjustable cool rate and is equipped with digital instrumentation to monitor the flowrate and critical temperatures. It can supply a variable water temperature down to 34 deg., and it can generate a maximum water flowrate of 2.5 LPM. My next project was to design and build a Breathing Air System that was capable of supply facility air to subjects wearing the Z-2 space suit. The system intakes 150 PSIG breathing air and regulates it to two operating pressures: 4.3 and 8.3 PSIG. It can also provide structural capabilities at 1.5x operating pressure: 6.6 and 13.2 PSIG, respectively. It has instrumentation to monitor flowrate, as well as inlet and outlet pressures. The system has a series of relief valves to fully protect itself in case of regulator failure. Both projects followed a similar design methodology. The first task was to perform research on existing concepts to develop a sufficient background knowledge. Then mathematical models were developed to size components and simulate system performance. Next, mechanical and electrical schematics were generated and presented at Design Reviews. After the systems were approved by the suit team, all the hardware components were specified and procured. The systems were then packaged, fabricated, and thoroughly tested. The next step

  3. Pyroshock Simulation Systems: Are We Correctly Qualifying Flight Hardware for Pyroshock Environments?

    NASA Technical Reports Server (NTRS)

    Kolaini, Ali R.; Nayeri, Reza; Kern, Dennis L.

    2009-01-01

    There are several methods of shock testing that are commonly used by the aerospace industry to qualify flight hardware to pyroshock environments. In some cases the shock results and in particular the shock response spectra computed from these tests were interpreted in such a way as to satisfy the testing requirements and were often considered successful for flight hardware qualification. However, close scrutiny of these acquired shock data suggest gross violation of the pyroshock qualification requirements. There are several issues, both in terms of the shock generation mechanisms and the shock signature acquisition and analysis that have led to improper qualification of flight hardware. In this paper some factors contributing to the misinterpretation of the shock data are reviewed. First, issues with the hardware fixturing and instrumentation that may lead to incorrect shock testing are discussed. Second, issues facing the shock simulation systems and pyrotechnic testing are reviewed. Finally, issues pertaining to the data acquisition and analysis are briefly discussed.

  4. Functional design specification for Stowage List And Hardware Tracking System (SLAHTS). [space shuttles

    NASA Technical Reports Server (NTRS)

    Keltner, D. J.

    1975-01-01

    This functional design specification defines the total systems approach to meeting the requirements stated in the Detailed Requirements Document for Stowage List and Hardware Tracking System for the space shuttle program. The stowage list and hardware tracking system is identified at the system and subsystem level with each subsystem defined as a function of the total system.

  5. Interim Service ISDN Satellite (ISIS) hardware experiment design for advanced ISDN satellite design and experiments

    NASA Technical Reports Server (NTRS)

    Pepin, Gerard R.

    1992-01-01

    The Interim Service Integrated Services Digital Network (ISDN) Satellite (ISIS) Hardware Experiment Design for Advanced Satellite Designs describes the design of the ISDN Satellite Terminal Adapter (ISTA) capable of translating ISDN protocol traffic into time division multiple access (TDMA) signals for use by a communications satellite. The ISTA connects the Type 1 Network Termination (NT1) via the U-interface on the line termination side of the CPE to the V.35 interface for satellite uplink. The same ISTA converts in the opposite direction the V.35 to U-interface data with a simple switch setting.

  6. Programming languages and compiler design for realistic quantum hardware

    NASA Astrophysics Data System (ADS)

    Chong, Frederic T.; Franklin, Diana; Martonosi, Margaret

    2017-09-01

    Quantum computing sits at an important inflection point. For years, high-level algorithms for quantum computers have shown considerable promise, and recent advances in quantum device fabrication offer hope of utility. A gap still exists, however, between the hardware size and reliability requirements of quantum computing algorithms and the physical machines foreseen within the next ten years. To bridge this gap, quantum computers require appropriate software to translate and optimize applications (toolflows) and abstraction layers. Given the stringent resource constraints in quantum computing, information passed between layers of software and implementations will differ markedly from in classical computing. Quantum toolflows must expose more physical details between layers, so the challenge is to find abstractions that expose key details while hiding enough complexity.

  7. Programming languages and compiler design for realistic quantum hardware.

    PubMed

    Chong, Frederic T; Franklin, Diana; Martonosi, Margaret

    2017-09-13

    Quantum computing sits at an important inflection point. For years, high-level algorithms for quantum computers have shown considerable promise, and recent advances in quantum device fabrication offer hope of utility. A gap still exists, however, between the hardware size and reliability requirements of quantum computing algorithms and the physical machines foreseen within the next ten years. To bridge this gap, quantum computers require appropriate software to translate and optimize applications (toolflows) and abstraction layers. Given the stringent resource constraints in quantum computing, information passed between layers of software and implementations will differ markedly from in classical computing. Quantum toolflows must expose more physical details between layers, so the challenge is to find abstractions that expose key details while hiding enough complexity.

  8. Intrinsic Hardware Evolution for the Design and Reconfiguration of Analog Speed Controllers for a DC Motor

    NASA Technical Reports Server (NTRS)

    Gwaltney, David A.; Ferguson, Michael I.

    2003-01-01

    Evolvable hardware provides the capability to evolve analog circuits to produce amplifier and filter functions. Conventional analog controller designs employ these same functions. Analog controllers for the control of the shaft speed of a DC motor are evolved on an evolvable hardware platform utilizing a second generation Field Programmable Transistor Array (FPTA2). The performance of an evolved controller is compared to that of a conventional proportional-integral (PI) controller. It is shown that hardware evolution is able to create a compact design that provides good performance, while using considerably less functional electronic components than the conventional design. Additionally, the use of hardware evolution to provide fault tolerance by reconfiguring the design is explored. Experimental results are presented showing that significant recovery of capability can be made in the face of damaging induced faults.

  9. Intrinsic Hardware Evolution for the Design and Reconfiguration of Analog Speed Controllers for a DC Motor

    NASA Technical Reports Server (NTRS)

    Gwaltney, David A.; Ferguson, Michael I.

    2003-01-01

    Evolvable hardware provides the capability to evolve analog circuits to produce amplifier and filter functions. Conventional analog controller designs employ these same functions. Analog controllers for the control of the shaft speed of a DC motor are evolved on an evolvable hardware platform utilizing a second generation Field Programmable Transistor Array (FPTA2). The performance of an evolved controller is compared to that of a conventional proportional-integral (PI) controller. It is shown that hardware evolution is able to create a compact design that provides good performance, while using considerably less functional electronic components than the conventional design. Additionally, the use of hardware evolution to provide fault tolerance by reconfiguring the design is explored. Experimental results are presented showing that significant recovery of capability can be made in the face of damaging induced faults.

  10. Designing Epistemologically Correct Science Narratives

    ERIC Educational Resources Information Center

    Sachin, Datt; Poovaiah, Ravi

    2012-01-01

    In recent years use of narratives for teaching science at secondary school level has gained impetus. This paper deals with the problem of designing narratives for teaching scientific concept. The central issue of the problem of designing narratives for carrying scientific information is that science belongs to the domain of objective observation…

  11. Energy efficient engine low-pressure compressor component test hardware detailed design report

    NASA Technical Reports Server (NTRS)

    Michael, C. J.; Halle, J. E.

    1981-01-01

    The aerodynamic and mechanical design description of the low pressure compressor component of the Energy Efficient Engine were used. The component was designed to meet the requirements of the Flight Propulsion System while maintaining a low cost approach in providing a low pressure compressor design for the Integrated Core/Low Spool test required in the Energy Efficient Engine Program. The resulting low pressure compressor component design meets or exceeds all design goals with the exception of surge margin. In addition, the expense of hardware fabrication for the Integrated Core/Low Spool test has been minimized through the use of existing minor part hardware.

  12. Hardware design document for the Infrasound Prototype for a CTBT IMS station

    SciTech Connect

    Breding, D.R.; Kromer, R.P.; Whitaker, R.W.; Sandoval, T.

    1997-11-01

    The Hardware Design Document (HDD) describes the various hardware components used in the Comprehensive Test Ban Treaty (CTBT) Infrasound Prototype and their interrelationships. It divides the infrasound prototype into hardware configurations items (HWCIs). The HDD uses techniques such as block diagrams and parts lists to present this information. The level of detail provided in the following sections should be sufficient to allow potential users to procure and install the infrasound system. Infrasonic monitoring is a low cost, robust, and effective technology for detecting atmospheric explosions. Low frequencies from explosion signals propagate to long ranges (few thousand kilometers) where they can be detected with an array of sensors.

  13. Design methodology for optimal hardware implementation of wavelet transform domain algorithms

    NASA Astrophysics Data System (ADS)

    Johnson-Bey, Charles; Mickens, Lisa P.

    2005-05-01

    The work presented in this paper lays the foundation for the development of an end-to-end system design methodology for implementing wavelet domain image/video processing algorithms in hardware using Xilinx field programmable gate arrays (FPGAs). With the integration of the Xilinx System Generator toolbox, this methodology will allow algorithm developers to design and implement their code using the familiar MATLAB/Simulink development environment. By using this methodology, algorithm developers will not be required to become proficient in the intricacies of hardware design, thus reducing the design cycle and time-to-market.

  14. Multiple IMU system hardware interface design, volume 2

    NASA Technical Reports Server (NTRS)

    Landey, M.; Brown, D.

    1975-01-01

    The design of each system component is described. Emphasis is placed on functional requirements unique in this system, including data bus communication, data bus transmitters and receivers, and ternary-to-binary torquing decision logic. Mechanization drawings are presented.

  15. A Parameterized Design Framework for Hardware Implementation of Particle Filters

    DTIC Science & Technology

    2008-03-01

    explore differ- ent design options for implementing two different particle filtering applications on field-programmable gate arrays ( FPGAs ), and we present...associated results on trade-offs between area ( FPGA resource requirements) and execution speed. Index Terms — Field programmable gate arrays, Parallel...programmable gate arrays ( FPGAs ) is proposed to enable comprehensive design space exploration of the whole system with attention to the interaction

  16. Performance/price estimates for cortex-scale hardware: a design space exploration.

    PubMed

    Zaveri, Mazad S; Hammerstrom, Dan

    2011-04-01

    In this paper, we revisit the concept of virtualization. Virtualization is useful for understanding and investigating the performance/price and other trade-offs related to the hardware design space. Moreover, it is perhaps the most important aspect of a hardware design space exploration. Such a design space exploration is a necessary part of the study of hardware architectures for large-scale computational models for intelligent computing, including AI, Bayesian, bio-inspired and neural models. A methodical exploration is needed to identify potentially interesting regions in the design space, and to assess the relative performance/price points of these implementations. As an example, in this paper we investigate the performance/price of (digital and mixed-signal) CMOS and hypothetical CMOL (nanogrid) technology based hardware implementations of human cortex-scale spiking neural systems. Through this analysis, and the resulting performance/price points, we demonstrate, in general, the importance of virtualization, and of doing these kinds of design space explorations. The specific results suggest that hybrid nanotechnology such as CMOL is a promising candidate to implement very large-scale spiking neural systems, providing a more efficient utilization of the density and storage benefits of emerging nano-scale technologies. In general, we believe that the study of such hypothetical designs/architectures will guide the neuromorphic hardware community towards building large-scale systems, and help guide research trends in intelligent computing, and computer engineering.

  17. Energy efficient engine combustor test hardware detailed design report

    NASA Technical Reports Server (NTRS)

    Zeisser, M. H.; Greene, W.; Dubiel, D. J.

    1982-01-01

    The combustor for the Energy Efficient Engine is an annular, two-zone component. As designed, it either meets or exceeds all program goals for performance, safety, durability, and emissions, with the exception of oxides of nitrogen. When compared to the configuration investigated under the NASA-sponsored Experimental Clean Combustor Program, which was used as a basis for design, the Energy Efficient Engine combustor component has several technology advancements. The prediffuser section is designed with short, strutless, curved-walls to provide a uniform inlet airflow profile. Emissions control is achieved by a two-zone combustor that utilizes two types of fuel injectors to improve fuel atomization for more complete combustion. The combustor liners are a segmented configuration to meet the durability requirements at the high combustor operating pressures and temperatures. Liner cooling is accomplished with a counter-parallel FINWALL technique, which provides more effective heat transfer with less coolant.

  18. Operational experience and design recommendations for teleoperated flight hardware

    NASA Technical Reports Server (NTRS)

    Burgess, T. W.; Kuban, D. P.; Hankins, W. W.; Mixon, R. W.

    1988-01-01

    Teleoperation (remote manipulation) will someday supplement/minimize astronaut extravehicular activity in space to perform such tasks as satellite servicing and repair, and space station construction and servicing. This technology is being investigated by NASA with teleoperation of two space-related tasks having been demonstrated at the Oak Ridge National Lab. The teleoperator experiments are discussed and the results of these experiments are summarized. The related equipment design recommendations are also presented. In addition, a general discussion of equipment design for teleoperation is also presented.

  19. Hybrid Positron Emission Tomography/Magnetic Resonance Imaging: Challenges, Methods, and State of the Art of Hardware Component Attenuation Correction.

    PubMed

    Paulus, Daniel H; Quick, Harald H

    2016-10-01

    Attenuation correction (AC) is an essential step in the positron emission tomography (PET) data reconstruction process to provide accurate and quantitative PET images. The introduction of PET/magnetic resonance (MR) hybrid systems has raised new challenges but also possibilities regarding PET AC. While in PET/computed tomography (CT) imaging, CT images can be converted to attenuation maps, MR images in PET/MR do not provide a direct relation to attenuation. For the AC of patient tissues, new methods have been suggested, for example, based on image segmentation, atlas registration, or ultrashort echo time MR sequences. Another challenge in PET/MR hybrid imaging is AC of hardware components that are placed in the PET/MR field of view, such as the patient table or various radiofrequency (RF) coils covering the body of the patient for MR signal detection. Hardware components can be categorized into 4 different groups: (1) patient table, (2) RF receiver coils, (3) radiation therapy equipment, and (4) PET and MR imaging phantoms. For rigid and stationary objects, such as the patient table and some RF coils like the head/neck coil, predefined CT-based attenuation maps stored on the system can be used for automatic AC. Flexible RF coils are not included into the AC process till now because they can vary in position as well as in shape and are not accurately detectable with the PET/MR system.This work summarizes challenges, established methods, new concepts, and the state of art in hardware component AC in the context of PET/MR hybrid imaging. The work also gives an overview of PET/MR hardware devices, their attenuation properties, and their effect on PET quantification.

  20. Co-design of software and hardware to implement remote sensing algorithms

    SciTech Connect

    Theiler, J. P.; Frigo, J.; Gokhale, M.; Szymanski, J. J.

    2001-01-01

    Both for offline searches through large data archives and for onboard computation at the sensor head, there is a growing need for ever-more rapid processing of remote sensing data. For many algorithms of use in remote sensing, the bulk of the processing takes place in an 'inner loop' with a large number of simple operations. For these algorithms, dramatic speedups can often be obtained with specialized hardware. The difficulty and expense of digital design continues to limit applicability of this approach, but the development of new design tools is making this approach more feasible, and some notable successes have been reported. On the other hand, it is often the case that processing can also be accelerated by adopting a more sophisticated algorithm design. Unfortunately, a more sophisticated algorithm is much harder to implement in hardware, so these approaches are often at odds with each other. With careful planning, however, it is sometimes possible to combine software and hardware design in such a way that each complements the other, and the final implementation achieves speedup that would not have been possible with a hardware-only or a software-only solution. We will in particular discuss the co-design of software and hardware to achieve substantial speedup of algorithms for multispectral image segmentation and for endmember identification.

  1. Internet-based hardware/software co-design framework for embedded 3D graphics applications

    NASA Astrophysics Data System (ADS)

    Yeh, Chi-Tsai; Wang, Chun-Hao; Huang, Ing-Jer; Wong, Weng-Fai

    2011-12-01

    Advances in technology are making it possible to run three-dimensional (3D) graphics applications on embedded and handheld devices. In this article, we propose a hardware/software co-design environment for 3D graphics application development that includes the 3D graphics software, OpenGL ES application programming interface (API), device driver, and 3D graphics hardware simulators. We developed a 3D graphics system-on-a-chip (SoC) accelerator using transaction-level modeling (TLM). This gives software designers early access to the hardware even before it is ready. On the other hand, hardware designers also stand to gain from the more complex test benches made available in the software for verification. A unique aspect of our framework is that it allows hardware and software designers from geographically dispersed areas to cooperate and work on the same framework. Designs can be entered and executed from anywhere in the world without full access to the entire framework, which may include proprietary components. This results in controlled and secure transparency and reproducibility, granting leveled access to users of various roles.

  2. Conceptual Hardware Design for the Drama Service Channel Controller.

    DTIC Science & Technology

    1983-05-01

    likely at another site, is performed within the controller. Any of a variety of technologies could be used to implement the service channel controller...The technology selected for presentation in this report is based on statistical multiplexing. To provide a comparison, an implementation using fixed...from production, the design presented herein would be unworkable. A redesign using available technology would be very difficult. Vendor literature for

  3. Hardware Design and Testing of SUPERball, A Modular Tensegrity Robot

    NASA Technical Reports Server (NTRS)

    Sabelhaus, Andrew P.; Bruce, Jonathan; Caluwaerts, Ken; Chen, Yangxin; Lu, Dizhou; Liu, Yuejia; Agogino, Adrian K.; SunSpiral, Vytas; Agogino, Alice M.

    2014-01-01

    We are developing a system of modular, autonomous "tensegrity end-caps" to enable the rapid exploration of untethered tensegrity robot morphologies and functions. By adopting a self-contained modular approach, different end-caps with various capabilities (such as peak torques, or motor speeds), can be easily combined into new tensegrity robots composed of rods, cables, and actuators of different scale (such as in length, mass, peak loads, etc). As a first step in developing this concept, we are in the process of designing and testing the end-caps for SUPERball (Spherical Underactuated Planetary Exploration Robot), a project at the Dynamic Tensegrity Robotics Lab (DTRL) within NASA Ames's Intelligent Robotics Group. This work discusses the evolving design concepts and test results that have gone into the structural, mechanical, and sensing aspects of SUPERball. This representative tensegrity end-cap design supports robust and repeatable untethered mobility tests of the SUPERball, while providing high force, high displacement actuation, with a low-friction, compliant cabling system.

  4. The LSST calibration hardware system design and development

    NASA Astrophysics Data System (ADS)

    Ingraham, Patrick; Stubbs, Christopher W.; Claver, Charles; Lupton, Robert; Araujo, Constanza; Liang, Ming; Andrew, John; Barr, Jeff; Brannon, Kairn; Coughlin, Michael; Fisher-Lavine, Merlin; Gressler, William; Sebag, Jacques; Thomas, Sandrine; Wiecha, Oliver; Yoachim, Peter

    2016-08-01

    The Large Synoptic Survey Telescope (LSST) is currently under construction and upon completion will perform precision photometry over the visible sky at a 3-day cadence. To meet the stringent relative photometry goals, LSST will employ multiple calibration systems to measure and compensate for systematic errors. This paper describes the design and development of these systems including: a dedicated calibration telescope and spectrograph to measure the atmospheric transmission function, a collimated beam projector to characterize the spatial dependence of the LSST transmission function and an at-field screen illumination system to measure the high-frequency variations in the global system response function.

  5. Hardware and circuit design of a vibrational cleaner

    NASA Astrophysics Data System (ADS)

    Fhong Soon, Chin; Thong, Kok Tung; Sek Tee, Kian; Nayan, Nafarizal; Khairul Ahmad, Mohd; Nurashikin Nordin, Anis

    2016-11-01

    Microtissue can be grown on soft substrates of hydrogel or liquid crystal gel. These gels are adherent to the microtissues and they may interfere fluorescence imaging as background noise due to their absorbance property. A microfluidic vibrational cleaner with polydimethylsiloxane (PDMS) microfluidic chip platform was proposed and developed to remove the residual gel of liquid crystal adhered to the microtissues. The microtissues were placed in a microfluidic chip attaching to a microfluidic vibrational platform. In the system design, two motorised vibrators vibrating attached to a microfluidic platform and generating vibration signals at 148 Hz and 0.89 Grms to clean the microtissues. The acceleration of the vibration increased gradually from 0 to 0.96 Grms when the duty cycle of PWM pulses increased from 50 - 90%. It dropped slightly to 0.89 Grms at 100% duty cycle. Irrigation water valve was designed to control the fluid flow from water pump during cleaning process. Water pumps were included to flush the channels of the microfluidic device. The signals in controlling the pump, motor and valve were linearly proportional to the duty cycles of the pulse width modulation signals generated from a microcontroller.

  6. OpenPET Hardware, Firmware, Software, and Board Design Files

    SciTech Connect

    Abu-Nimeh, Faisal; Choong, Woon-Sengq; Moses, William W.; Peng, Qiyu

    2016-03-29

    OpenPET is an open source, flexible, high-performance, and modular data acquisition system for a variety of applications. The OpenPET electronics are capable of reading analog voltage or current signals from a wide variety of sensors. The electronics boards make extensive use of field programmable gate arrays (FPGAs) to provide flexibility and scalability. Firmware and software for the FPGAs and computer are used to control and acquire data from the system. The command and control flow is similar to the data flow, however, the commands are initiated from the computer similar to a tree topology (i.e., from top-to-bottom). Each node in the tree discovers its parent and children, and all addresses are configured accordingly. A user (or a script) initiates a command from the computer. This command will be translated and encoded to the corresponding child (e.g., SB, MB, DB, etc.). Consecutively, each node will pass the command to its corresponding child(ren) by looking at the destination address. Finally, once the command reaches its desired destination(s) the corresponding node(s) execute(s) the command and send(s) a reply, if required. All the firmware, software, and the electronics board design files are distributed through the OpenPET website (http://openpet.lbl.gov).

  7. An FPGA hardware/software co-design towards evolvable spiking neural networks for robotics application.

    PubMed

    Johnston, S P; Prasad, G; Maguire, L; McGinnity, T M

    2010-12-01

    This paper presents an approach that permits the effective hardware realization of a novel Evolvable Spiking Neural Network (ESNN) paradigm on Field Programmable Gate Arrays (FPGAs). The ESNN possesses a hybrid learning algorithm that consists of a Spike Timing Dependent Plasticity (STDP) mechanism fused with a Genetic Algorithm (GA). The design and implementation direction utilizes the latest advancements in FPGA technology to provide a partitioned hardware/software co-design solution. The approach achieves the maximum FPGA flexibility obtainable for the ESNN paradigm. The algorithm was applied as an embedded intelligent system robotic controller to solve an autonomous navigation and obstacle avoidance problem.

  8. Study of the adaptability of existing hardware designs to a Pioneer Saturn/Uranus probe

    NASA Technical Reports Server (NTRS)

    1973-01-01

    The basic concept of designing a scientific entry probe for the expected range of environments at Saturn or Uranus and making the probe compatible with the interface constraints of the Pioneer spacecraft was investigated for launches in the early 1980's. It was found that the amount of hardware commonality between that used in the Pioneer Venus program and that for the Saturn/Uranus probe was approximately 85%. It is recommended that additional development studies be conducted to improve the hardware definitions of the probe design for the following: heat shield, battery, nose cap jettisoning, and thermal control insulation.

  9. Scatter correction associated with dedicated dual-source CT hardware improves accuracy of lung air measures.

    PubMed

    Mobberley, Sean D; Fuld, Matthew K; Sieren, Jered P; Primak, Andrew N; Hoffman, Eric A

    2013-11-01

    Accurate assessment of air density used to quantitatively characterize amount and distribution of emphysema in chronic obstructive pulmonary disease (COPD) subjects has remained challenging. Hounsfield units (HU) within tracheal air can be considerably less negative than -1000 HU. This study has sought to characterize the effects of improved scatter correction used in dual-source pulmonary computed tomography (CT). Dual-source dual-energy (DSDE) and single-source (SS) scans taken at multiple energy levels and scan settings were acquired for quantitative comparison using anesthetized ovine (n = 6), swine (n = 13), and a lung phantom. Data were evaluated for the lung, inferior vena cava, and tracheal segments. To minimize the effect of cross-scatter, the phantom scans in the DSDE mode were obtained by reducing the current of one of the tubes to near zero. A significant shift in mean HU values in the tracheal regions of animals and the phantom is observed, with values consistently closer to -1000 HU in DSDE mode. HU values associated with SS mode demonstrated a positive shift of up to 32 HU. In vivo tracheal air measurements demonstrated considerable variability with SS scanning, whereas these values were more consistent with DSDE imaging. Scatter effects in the lung parenchyma differed from adjacent tracheal measures. Data suggest that the scatter correction introduced into the dual-energy mode of imaging has served to provide more accurate CT lung density measures sought to quantitatively assess the presence and distribution of emphysema in COPD subjects. Data further suggest that CT images, acquired without adequate scatter correction, cannot be corrected by linear algorithms given the variability in tracheal air HU values and the independent scatter effects on lung parenchyma. Copyright © 2013 AUR. Published by Elsevier Inc. All rights reserved.

  10. Rapid resorption of calcium sulfate and hardware failure following corrective radius osteotomy: 2 case reports.

    PubMed

    Jepegnanam, Thilak S; von Schroeder, Herbert P

    2012-03-01

    Bone substitutes are being increasingly used and may avert the need for autogenous bone graft in orthopedic surgery. Thus it is important to note complications that occur with them to better understand the limitations. We report on early mechanical failure of injectable calcium sulfate leading to implant failure in 2 elderly patients who had corrective osteotomies for malunited distal radius fractures. We hypothesize that these occurred because there was inadequate new bone formation to replace the resorbing bone substitute. We advise caution when using bone substitutes in patients with expected delayed fracture healing.

  11. Hardware-Efficient and Fully Autonomous Quantum Error Correction in Superconducting Circuits.

    PubMed

    Kapit, Eliot

    2016-04-15

    Superconducting qubits are among the most promising platforms for building a quantum computer. However, individual qubit coherence times are not far past the scalability threshold for quantum error correction, meaning that millions of physical devices would be required to construct a useful quantum computer. Consequently, further increases in coherence time are very desirable. In this Letter, we blueprint a simple circuit consisting of two transmon qubits and two additional lossy qubits or resonators, which is passively protected against all single-qubit quantum error channels through a combination of continuous driving and engineered dissipation. Photon losses are rapidly corrected through two-photon drive fields implemented with driven superconducting quantum interference device couplings, and dephasing from random potential fluctuations is heavily suppressed by the drive fields used to implement the multiqubit Hamiltonian. Comparing our theoretical model to published noise estimates from recent experiments on flux and transmon qubits, we find that logical state coherence could be improved by a factor of 40 or more compared to the individual qubit T_{1} and T_{2} using this technique. We thus demonstrate that there is substantial headroom for improving the coherence of modern superconducting qubits with a fairly modest increase in device complexity.

  12. Hardware-Efficient and Fully Autonomous Quantum Error Correction in Superconducting Circuits

    NASA Astrophysics Data System (ADS)

    Kapit, Eliot

    2016-04-01

    Superconducting qubits are among the most promising platforms for building a quantum computer. However, individual qubit coherence times are not far past the scalability threshold for quantum error correction, meaning that millions of physical devices would be required to construct a useful quantum computer. Consequently, further increases in coherence time are very desirable. In this Letter, we blueprint a simple circuit consisting of two transmon qubits and two additional lossy qubits or resonators, which is passively protected against all single-qubit quantum error channels through a combination of continuous driving and engineered dissipation. Photon losses are rapidly corrected through two-photon drive fields implemented with driven superconducting quantum interference device couplings, and dephasing from random potential fluctuations is heavily suppressed by the drive fields used to implement the multiqubit Hamiltonian. Comparing our theoretical model to published noise estimates from recent experiments on flux and transmon qubits, we find that logical state coherence could be improved by a factor of 40 or more compared to the individual qubit T1 and T2 using this technique. We thus demonstrate that there is substantial headroom for improving the coherence of modern superconducting qubits with a fairly modest increase in device complexity.

  13. Design Considerations in Development of Minicomputer-Based Computer Aided Instructional Hardware Systems.

    ERIC Educational Resources Information Center

    Wells, C. H.

    A minicomputer-based computer-assisted instructional (CAI) system was designed at the University of Texas Medical Branch in an attempt to lower both the excessive hardware costs and the inordinate amount of time required for the preparation of each hour of instructional material associated with traditional CAI systems. A prototype system with an…

  14. The design of flight hardware: Organizational and technical ideas from the MITRE/WPI Shuttle Program

    NASA Technical Reports Server (NTRS)

    Looft, F. J.

    1986-01-01

    The Mitre Corporation of Bedford Mass. and the Worcester Polytechnic Institute are developing several experiments for a future Shuttle flight. Several design practices for the development of the electrical equipment for the flight hardware have been standardized. Some of the ideas are presented, not as hard and fast rules but rather in the interest of stimulating discussions for sharing such ideas.

  15. The design of flight hardware: Organizational and technical ideas from the MITRE/WPI Shuttle Program

    NASA Technical Reports Server (NTRS)

    Looft, F. J.

    1986-01-01

    The Mitre Corporation of Bedford Mass. and the Worcester Polytechnic Institute are developing several experiments for a future Shuttle flight. Several design practices for the development of the electrical equipment for the flight hardware have been standardized. Some of the ideas are presented, not as hard and fast rules but rather in the interest of stimulating discussions for sharing such ideas.

  16. Design and implementation of encrypted and decrypted file system based on USBKey and hardware code

    NASA Astrophysics Data System (ADS)

    Wu, Kehe; Zhang, Yakun; Cui, Wenchao; Jiang, Ting

    2017-05-01

    To protect the privacy of sensitive data, an encrypted and decrypted file system based on USBKey and hardware code is designed and implemented in this paper. This system uses USBKey and hardware code to authenticate a user. We use random key to encrypt file with symmetric encryption algorithm and USBKey to encrypt random key with asymmetric encryption algorithm. At the same time, we use the MD5 algorithm to calculate the hash of file to verify its integrity. Experiment results show that large files can be encrypted and decrypted in a very short time. The system has high efficiency and ensures the security of documents.

  17. Full chip correction of EUV design

    NASA Astrophysics Data System (ADS)

    Lorusso, G. F.; Hendrickx, E.; Fenger, G. L.; Niroomand, A.

    2010-04-01

    Extreme Ultraviolet Lithography (EUVL) is currently the most promising technology for advanced manufacturing nodes: it recently demonstrated the feasibility of 32nm and 22nm node devices, and pre-production tools are expected to be delivered by 2010. Generally speaking, EUVL is less in need of Optical Proximity Correction (OPC) as compared to 193nm lithography, and the device feasibility studies were indeed carried out with limited or no correction. However, a rigorous optical correction strategy and an appropriate Electronic Design Automation (EDA) infrastructure is critical to face the challenges of the 22nm node and beyond, and EUV-specific effects such as flare and shadowing have to be fully integrated in the correction flow and properly tested. This study aims to assess in detail the quality of a full chip optical correction for a EUV design, as well to discuss the available approaches to compensate for EUV-specific effects. Extensive data sets have been collected on the ASML EUV Alpha-Demo Tool (ADT) using the latest IMEC baseline resist Shin-Etsu SEVR59. In total about 1300 CD measurements at wafer level and 700 at mask level were used as input for model calibration and validation. The smallest feature size in the data set was 32nm. Both one-dimensional and two-dimensional structures through CD and pitch were measured. The mask used in this calibration exercise allowed the authors to modulate flare by varying tiling densities within the range expected in the final design. The OPC model was fitted and validated against the CD data collected on the EUV ADT. The shadowing effect was modeled by means of a single bias correction throughout the design. Horizontal and vertical features of different type through pitch and CD were used to calibrate the shadowing correction, and the extent of the validity of the single bias approach is discussed. In addition, the quality of the generated full-chip flare maps has been tested against experimental results, and the model

  18. High-precision optical systems with inexpensive hardware: a unified alignment and structural design approach

    NASA Astrophysics Data System (ADS)

    Winrow, Edward G.; Chavez, Victor H.

    2011-09-01

    High-precision opto-mechanical structures have historically been plagued by high costs for both hardware and the associated alignment and assembly process. This problem is especially true for space applications where only a few production units are produced. A methodology for optical alignment and optical structure design is presented which shifts the mechanism of maintaining precision from tightly toleranced, machined flight hardware to reusable, modular tooling. Using the proposed methodology, optical alignment error sources are reduced by the direct alignment of optics through their surface retroreflections (pips) as seen through a theodolite. Optical alignment adjustments are actualized through motorized, sub-micron precision actuators in 5 degrees of freedom. Optical structure hardware costs are reduced through the use of simple shapes (tubes, plates) and repeated components. This approach produces significantly cheaper hardware and more efficient assembly without sacrificing alignment precision or optical structure stability. The design, alignment plan and assembly of a 4" aperture, carbon fiber composite, Schmidt-Cassegrain concept telescope is presented.

  19. Test Hardware Design for Flightlike Operation of Advanced Stirling Convertors (ASC-E3)

    NASA Technical Reports Server (NTRS)

    Oriti, Salvatore M.

    2012-01-01

    NASA Glenn Research Center (GRC) has been supporting development of the Advanced Stirling Radioisotope Generator (ASRG) since 2006. A key element of the ASRG project is providing life, reliability, and performance testing of the Advanced Stirling Convertor (ASC). For this purpose, the Thermal Energy Conversion branch at GRC has been conducting extended operation of a multitude of free-piston Stirling convertors. The goal of this effort is to generate long-term performance data (tens of thousands of hours) simultaneously on multiple units to build a life and reliability database. The test hardware for operation of these convertors was designed to permit in-air investigative testing, such as performance mapping over a range of environmental conditions. With this, there was no requirement to accurately emulate the flight hardware. For the upcoming ASC-E3 units, the decision has been made to assemble the convertors into a flight-like configuration. This means the convertors will be arranged in the dual-opposed configuration in a housing that represents the fit, form, and thermal function of the ASRG. The goal of this effort is to enable system level tests that could not be performed with the traditional test hardware at GRC. This offers the opportunity to perform these system-level tests much earlier in the ASRG flight development, as they would normally not be performed until fabrication of the qualification unit. This paper discusses the requirements, process, and results of this flight-like hardware design activity.

  20. Test Hardware Design for Flight-Like Operation of Advanced Stirling Convertors

    NASA Technical Reports Server (NTRS)

    Oriti, Salvatore M.

    2012-01-01

    NASA Glenn Research Center (GRC) has been supporting development of the Advanced Stirling Radioisotope Generator (ASRG) since 2006. A key element of the ASRG project is providing life, reliability, and performance testing of the Advanced Stirling Convertor (ASC). For this purpose, the Thermal Energy Conversion branch at GRC has been conducting extended operation of a multitude of free-piston Stirling convertors. The goal of this effort is to generate long-term performance data (tens of thousands of hours) simultaneously on multiple units to build a life and reliability database. The test hardware for operation of these convertors was designed to permit in-air investigative testing, such as performance mapping over a range of environmental conditions. With this, there was no requirement to accurately emulate the flight hardware. For the upcoming ASC-E3 units, the decision has been made to assemble the convertors into a flight-like configuration. This means the convertors will be arranged in the dual-opposed configuration in a housing that represents the fit, form, and thermal function of the ASRG. The goal of this effort is to enable system level tests that could not be performed with the traditional test hardware at GRC. This offers the opportunity to perform these system-level tests much earlier in the ASRG flight development, as they would normally not be performed until fabrication of the qualification unit. This paper discusses the requirements, process, and results of this flight-like hardware design activity.

  1. A Comprehensive Reliability Methodology for Assessing Risk of Reusing Failed Hardware Without Corrective Actions with and Without Redundancy

    NASA Technical Reports Server (NTRS)

    Putcha, Chandra S.; Mikula, D. F. Kip; Dueease, Robert A.; Dang, Lan; Peercy, Robert L.

    1997-01-01

    This paper deals with the development of a reliability methodology to assess the consequences of using hardware, without failure analysis or corrective action, that has previously demonstrated that it did not perform per specification. The subject of this paper arose from the need to provide a detailed probabilistic analysis to calculate the change in probability of failures with respect to the base or non-failed hardware. The methodology used for the analysis is primarily based on principles of Monte Carlo simulation. The random variables in the analysis are: Maximum Time of Operation (MTO) and operation Time of each Unit (OTU) The failure of a unit is considered to happen if (OTU) is less than MTO for the Normal Operational Period (NOP) in which this unit is used. NOP as a whole uses a total of 4 units. Two cases are considered. in the first specialized scenario, the failure of any operation or system failure is considered to happen if any of the units used during the NOP fail. in the second specialized scenario, the failure of any operation or system failure is considered to happen only if any two of the units used during the MOP fail together. The probability of failure of the units and the system as a whole is determined for 3 kinds of systems - Perfect System, Imperfect System 1 and Imperfect System 2. in a Perfect System, the operation time of the failed unit is the same as that of the MTO. In an Imperfect System 1, the operation time of the failed unit is assumed as 1 percent of the MTO. In an Imperfect System 2, the operation time of the failed unit is assumed as zero. in addition, simulated operation time of failed units is assumed as 10 percent of the corresponding units before zero value. Monte Carlo simulation analysis is used for this study. Necessary software has been developed as part of this study to perform the reliability calculations. The results of the analysis showed that the predicted change in failure probability (P(sub F)) for the

  2. Object oriented design (OOD) in real-time hardware-in-the-loop (HWIL) simulations

    NASA Astrophysics Data System (ADS)

    Morris, Joe; Richard, Henri; Lowman, Alan; Youngren, Rob

    2006-05-01

    Using Object Oriented Design (OOD) concepts in AMRDEC's Hardware-in-the Loop (HWIL) real-time simulations allows the user to interchange parts of the simulation to meet test requirements. A large-scale three-spectral band simulator connected via a high speed reflective memory ring for time-critical data transfers to PC controllers connected by non real-time Ethernet protocols is used to separate software objects from logical entities close to their respective controlled hardware. Each standalone object does its own dynamic initialization, real-time processing, and end of run processing; therefore it can be easily maintained and updated. A Resource Allocation Program (RAP) is also utilized along with a device table to allocate, organize, and document the communication protocol between the software and hardware components. A GUI display program lists all allocations and deallocations of HWIL memory and hardware resources. This interactive program is also used to clean up defunct allocations of dead processes. Three examples are presented using the OOD and RAP concepts. The first is the control of an ACUTRONICS built three-axis flight table using the same control for calibration and real-time functions. The second is the transportability of a six-degree-of-freedom (6-DOF) simulation from an Onyx residence to a Linux-PC. The third is the replacement of the 6-DOF simulation with a replay program to drive the facility with archived run data for demonstration or analysis purposes.

  3. The design and hardware implementation of a low-power real-time seizure detection algorithm.

    PubMed

    Raghunathan, Shriram; Gupta, Sumeet K; Ward, Matthew P; Worth, Robert M; Roy, Kaushik; Irazoqui, Pedro P

    2009-10-01

    Epilepsy affects more than 1% of the world's population. Responsive neurostimulation is emerging as an alternative therapy for the 30% of the epileptic patient population that does not benefit from pharmacological treatment. Efficient seizure detection algorithms will enable closed-loop epilepsy prostheses by stimulating the epileptogenic focus within an early onset window. Critically, this is expected to reduce neuronal desensitization over time and lead to longer-term device efficacy. This work presents a novel event-based seizure detection algorithm along with a low-power digital circuit implementation. Hippocampal depth-electrode recordings from six kainate-treated rats are used to validate the algorithm and hardware performance in this preliminary study. The design process illustrates crucial trade-offs in translating mathematical models into hardware implementations and validates statistical optimizations made with empirical data analyses on results obtained using a real-time functioning hardware prototype. Using quantitatively predicted thresholds from the depth-electrode recordings, the auto-updating algorithm performs with an average sensitivity and selectivity of 95.3 +/- 0.02% and 88.9 +/- 0.01% (mean +/- SE(alpha = 0.05)), respectively, on untrained data with a detection delay of 8.5 s [5.97, 11.04] from electrographic onset. The hardware implementation is shown feasible using CMOS circuits consuming under 350 nW of power from a 250 mV supply voltage from simulations on the MIT 180 nm SOI process.

  4. Rapid prototyping of an automated video surveillance system: a hardware-software co-design approach

    NASA Astrophysics Data System (ADS)

    Ngo, Hau T.; Rakvic, Ryan N.; Broussard, Randy P.; Ives, Robert W.

    2011-06-01

    FPGA devices with embedded DSP and memory blocks, and high-speed interfaces are ideal for real-time video processing applications. In this work, a hardware-software co-design approach is proposed to effectively utilize FPGA features for a prototype of an automated video surveillance system. Time-critical steps of the video surveillance algorithm are designed and implemented in the FPGAs logic elements to maximize parallel processing. Other non timecritical tasks are achieved by executing a high level language program on an embedded Nios-II processor. Pre-tested and verified video and interface functions from a standard video framework are utilized to significantly reduce development and verification time. Custom and parallel processing modules are integrated into the video processing chain by Altera's Avalon Streaming video protocol. Other data control interfaces are achieved by connecting hardware controllers to a Nios-II processor using Altera's Avalon Memory Mapped protocol.

  5. Hardware-Software Co-design of QRD-RLS Algorithm with Microblaze Soft Core Processor

    NASA Astrophysics Data System (ADS)

    Lodha, Nupur; Rai, Nivesh; Dubey, Rahul; Venkataraman, Hrishikesh

    This paper presents the implementation of QR Decomposition based Recursive Least Square (QRD-RLS) algorithm on Field Programmable Gate Arrays (FPGA). The design is based on hardware-software co-design. The hardware part consists of a custom peripheral that solves the part of the algorithm with higher computational costs and the software part consists of an embedded soft core processor that manages the control functions and rest of the algorithm. The use of Givens Rotation and Systolic Arrays make this architecture suitable for FPGA implementation. Moreover, the speed and flexibility of FPGAs render them viable for such computationally intensive application. The system has been implemented on Xilinx Spartan 3E FPGA with Microblaze soft core processor using Embedded Development Kit (EDK). The paper also presents the implementation results and their analysis.

  6. EPIC optical design, calibration, and data correction

    NASA Astrophysics Data System (ADS)

    Cede, A.; Kowalewski, M. G.

    2016-12-01

    The Deep Space Climate Observatory (DSCOVR) observes Space Weather and Earth's Climate from a unique position at the Lagrange 1 point, where it can continuously see the sunlit-side of the Earth. The Earth Polychromatic Imaging Camera (EPIC) on board of DSCOVR takes images of the Earth in 10 ultraviolet and visible channels approximately every 75 minutes. The measurement are converted into color images and also into global maps of atmospheric parameters such as ozone and sulfur dioxide columns, aerosol properties, cloud distribution, height and thickness, as well as surface parameters such as vegetation and leaf area index. This presentation gives an overview of the EPIC optical design, the calibrations performed, and the corrections applied to the raw data to obtain corrected count rates.

  7. Skylab SO71/SO72 circadian periodicity experiment. [experimental design and checkout of hardware

    NASA Technical Reports Server (NTRS)

    Fairchild, M. K.; Hartmann, R. A.

    1973-01-01

    The circadian rhythm hardware activities from 1965 through 1973 are considered. A brief history of the programs leading to the development of the combined Skylab SO71/SO72 Circadian Periodicity Experiment (CPE) is given. SO71 is the Skylab experiment number designating the pocket mouse circadian experiment, and SO72 designates the vinegar gnat circadian experiment. Final design modifications and checkout of the CPE, integration testing with the Apollo service module CSM 117 and the launch preparation and support tasks at Kennedy Space Center are reported.

  8. Corona streamer onset as an optimization criterion for design of high voltage hardware on transmission lines

    SciTech Connect

    Pedrow, P.D.; Olsen, R.G.

    1996-12-31

    To design hardware for compact high voltage lines it is necessary to predict conditions for which corona streamers are initiated. Existing techniques for optimizing hardware shape and calculating streamer onset are based on corona measurements in a coaxial geometry that uses concentric cylinders for electrodes. Peek`s law shows that the formation of corona streamers is related not only to electric field but also to surface curvature. It is not clear that Peek`s law (developed in a coaxial geometry for which radius of curvature in the axial direction is infinite) is appropriate for designing hardware surfaces which are defined at any point by two finite radii of curvature. In this work the authors seek a corona onset criterion for these more general surfaces which reduces to Peeks law in the limit that one of the radii of curvature is infinite. An existing electrostatic code is being modified to allow for iterative optimization of electrode shapes based on results of previous field calculations. Experimental corona performance testing of electrode shapes will take place in an air-filled chamber with ac voltage as high as 100 kV rms. Experiments will be used to evaluate various electrode shapes designed by the trial optimization criterion.

  9. Design of the cooled IRFPA real-time non-uniformity correction system based on FPGA

    NASA Astrophysics Data System (ADS)

    Sheng, Yicheng; Yun, Lijun; Shi, Junsheng; Zhang, Chao

    2011-11-01

    Non-Uniformity Correction (NUC) is a key technology for Infrared Focal Plane Array (IRFPA) real-time image processing system. In this paper, an IRFPA real-time two-point calibration (TPC) algorithm hardware system was designed. The system use CycloneIII-EP3C120F780 FPGA of the ALTERA as the controller, and has following features: simple structure, high precision, stability, portability, and real-time. The timing simulation and measurement for the developed hardware system verified the effectiveness of the scheme.

  10. A Principled Kernel Testbed for Hardware/Software Co-Design Research

    SciTech Connect

    Kaiser, Alex; Williams, Samuel; Madduri, Kamesh; Ibrahim, Khaled; Bailey, David; Demmel, James; Strohmaier, Erich

    2010-04-01

    Recently, advances in processor architecture have become the driving force for new programming models in the computing industry, as ever newer multicore processor designs with increasing number of cores are introduced on schedules regimented by marketing demands. As a result, collaborative parallel (rather than simply concurrent) implementations of important applications, programming languages, models, and even algorithms have been forced to adapt to these architectures to exploit the available raw performance. We believe that this optimization regime is flawed. In this paper, we present an alternate approach that, rather than starting with an existing hardware/software solution laced with hidden assumptions, defines the computational problems of interest and invites architects, researchers and programmers to implement novel hardware/software co-designed solutions. Our work builds on the previous ideas of computational dwarfs, motifs, and parallel patterns by selecting a representative set of essential problems for which we provide: An algorithmic description; scalable problem definition; illustrative reference implementations; verification schemes. This testbed will enable comparative research in areas such as parallel programming models, languages, auto-tuning, and hardware/software codesign. For simplicity, we focus initially on the computational problems of interest to the scientific computing community but proclaim the methodology (and perhaps a subset of the problems) as applicable to other communities. We intend to broaden the coverage of this problem space through stronger community involvement.

  11. Automated culture system experiments hardware: developing test results and design solutions.

    PubMed

    Freddi, M; Covini, M; Tenconi, C; Ricci, C; Caprioli, M; Cotronei, V

    2002-07-01

    The experiment proposed by Prof. Ricci University of Milan is funded by ASI with Laben as industrial Prime Contractor. ACS-EH (Automated Culture System-Experiment Hardware) will support the multigenerational experiment on weightlessness with rotifers and nematodes within four Experiment Containers (ECs) located inside the European Modular Cultivation System (EMCS) facility..Actually the Phase B is in progress and a concept design solution has been defined. The most challenging aspects for the design of such hardware are, from biological point of view the provision of an environment which permits animal's survival and to maintain desiccated generations separated and from the technical point of view, the miniaturisation of the hardware itself due to the reduce EC provided volume (160mmx60mmx60mm). The miniaturisation will allow a better use of the available EMCS Facility resources (e.g. volume. power etc.) and to fulfil the experiment requirements. ACS-EH, will be ready to fly in the year 2005 on boar the ISS.

  12. Hardware design to accelerate PNG encoder for binary mask compression on FPGA

    NASA Astrophysics Data System (ADS)

    Kachouri, Rostom; Akil, Mohamed

    2015-02-01

    PNG (Portable Network Graphics) is a lossless compression method for real-world pictures. Since its specification, it continues to attract the interest of the image processing community. Indeed, PNG is an extensible file format for portable and well-compressed storage of raster images. In addition, it supports all of Black and White (binary mask), grayscale, indexed-color, and truecolor images. Within the framework of the Demat+ project which intend to propose a complete solution for storage and retrieval of scanned documents, we address in this paper a hardware design to accelerate the PNG encoder for binary mask compression on FPGA. For this, an optimized architecture is proposed as part of an hybrid software and hardware co-operating system. For its evaluation, the new designed PNG IP has been implemented on the ALTERA Arria II GX EP2AGX125EF35" FPGA. The experimental results show a good match between the achieved compression ratio, the computational cost and the used hardware resources.

  13. A hardware-algorithm co-design approach to optimize seizure detection algorithms for implantable applications.

    PubMed

    Raghunathan, Shriram; Gupta, Sumeet K; Markandeya, Himanshu S; Roy, Kaushik; Irazoqui, Pedro P

    2010-10-30

    Implantable neural prostheses that deliver focal electrical stimulation upon demand are rapidly emerging as an alternate therapy for roughly a third of the epileptic patient population that is medically refractory. Seizure detection algorithms enable feedback mechanisms to provide focally and temporally specific intervention. Real-time feasibility and computational complexity often limit most reported detection algorithms to implementations using computers for bedside monitoring or external devices communicating with the implanted electrodes. A comparison of algorithms based on detection efficacy does not present a complete picture of the feasibility of the algorithm with limited computational power, as is the case with most battery-powered applications. We present a two-dimensional design optimization approach that takes into account both detection efficacy and hardware cost in evaluating algorithms for their feasibility in an implantable application. Detection features are first compared for their ability to detect electrographic seizures from micro-electrode data recorded from kainate-treated rats. Circuit models are then used to estimate the dynamic and leakage power consumption of the compared features. A score is assigned based on detection efficacy and the hardware cost for each of the features, then plotted on a two-dimensional design space. An optimal combination of compared features is used to construct an algorithm that provides maximal detection efficacy per unit hardware cost. The methods presented in this paper would facilitate the development of a common platform to benchmark seizure detection algorithms for comparison and feasibility analysis in the next generation of implantable neuroprosthetic devices to treat epilepsy.

  14. Hardware design for a cable-free fully insertable wireless laparoscopic robotic camera.

    PubMed

    Ning Li; Mancini, Gregory J; Jindong Tan

    2016-08-01

    The field of insertable laparoscopic robotic camera is gaining increasing attentions from researchers, surgeons, and also patients. Although many insertable laparoscope prototypes have been introduced, few of them get rid of the encumbrance tethering cable. In this paper, we proposed a hardware architecture for a magnetic actuated robotic surgical (MARS) camera, which facilitates a cable-free fully insertable laparoscopic surgical robotic camera with adequate in-vivo mobility. Modular design and preliminary test of on-board functional payloads have shown feasibility of a cable-free insertable wireless laparoscopic surgical camera based on off-the-shelf electronics and industrial wireless standards operating in ISM frequency bands at 2.4GHz. Potential improvements for laparoscopic surgery benefited from this hardware architecture include more dexterous in-vivo camera mobility and intuitive closed-loop robotic camera control.

  15. Thermal Performance of a Customized Multilayer Insulation (MLI). Design and Fabrication of Test Facility Hardware

    NASA Technical Reports Server (NTRS)

    Leonhard, K. E.

    1975-01-01

    The design, fabrication, and assembly of hardware for testing the performance of a customized multilayer insulation are discussed. System components described include the thermal payload simulator, the modified cryoshroud, and a tank back pressure control device designed to maintain a constant liquid boiling point during the thermal evaluation of the multilayer insulation. The thermal payload simulator will provide a constant temperature surface in the range of 20.5 to 417K (37 to 750R) for the insulated tank to view. The cryoshroud was modified to establish a low temperature black body cavity while limiting liquid hydrogen usage to a minimum feasible rate.

  16. A preferential design approach for energy-efficient and robust implantable neural signal processing hardware.

    PubMed

    Narasimhan, Seetharam; Chiel, Hillel J; Bhunia, Swarup

    2009-01-01

    For implantable neural interface applications, it is important to compress data and analyze spike patterns across multiple channels in real time. Such a computational task for online neural data processing requires an innovative circuit-architecture level design approach for low-power, robust and area-efficient hardware implementation. Conventional microprocessor or Digital Signal Processing (DSP) chips would dissipate too much power and are too large in size for an implantable system. In this paper, we propose a novel hardware design approach, referred to as "Preferential Design" that exploits the nature of the neural signal processing algorithm to achieve a low-voltage, robust and area-efficient implementation using nanoscale process technology. The basic idea is to isolate the critical components with respect to system performance and design them more conservatively compared to the noncritical ones. This allows aggressive voltage scaling for low power operation while ensuring robustness and area efficiency. We have applied the proposed approach to a neural signal processing algorithm using the Discrete Wavelet Transform (DWT) and observed significant improvement in power and robustness over conventional design.

  17. AirSTAR Hardware and Software Design for Beyond Visual Range Flight Research

    NASA Technical Reports Server (NTRS)

    Laughter, Sean; Cox, David

    2016-01-01

    The National Aeronautics and Space Administration (NASA) Airborne Subscale Transport Aircraft Research (AirSTAR) Unmanned Aerial System (UAS) is a facility developed to study the flight dynamics of vehicles in emergency conditions, in support of aviation safety research. The system was upgraded to have its operational range significantly expanded, going beyond the line of sight of a ground-based pilot. A redesign of the airborne flight hardware was undertaken, as well as significant changes to the software base, in order to provide appropriate autonomous behavior in response to a number of potential failures and hazards. Ground hardware and system monitors were also upgraded to include redundant communication links, including ADS-B based position displays and an independent flight termination system. The design included both custom and commercially available avionics, combined to allow flexibility in flight experiment design while still benefiting from tested configurations in reversionary flight modes. A similar hierarchy was employed in the software architecture, to allow research codes to be tested, with a fallback to more thoroughly validated flight controls. As a remotely piloted facility, ground systems were also developed to ensure the flight modes and system state were communicated to ground operations personnel in real-time. Presented in this paper is a general overview of the concept of operations for beyond visual range flight, and a detailed review of the airborne hardware and software design. This discussion is held in the context of the safety and procedural requirements that drove many of the design decisions for the AirSTAR UAS Beyond Visual Range capability.

  18. Design and control of compliant tensegrity robots through simulation and hardware validation.

    PubMed

    Caluwaerts, Ken; Despraz, Jérémie; Işçen, Atıl; Sabelhaus, Andrew P; Bruce, Jonathan; Schrauwen, Benjamin; SunSpiral, Vytas

    2014-09-06

    To better understand the role of tensegrity structures in biological systems and their application to robotics, the Dynamic Tensegrity Robotics Lab at NASA Ames Research Center, Moffett Field, CA, USA, has developed and validated two software environments for the analysis, simulation and design of tensegrity robots. These tools, along with new control methodologies and the modular hardware components developed to validate them, are presented as a system for the design of actuated tensegrity structures. As evidenced from their appearance in many biological systems, tensegrity ('tensile-integrity') structures have unique physical properties that make them ideal for interaction with uncertain environments. Yet, these characteristics make design and control of bioinspired tensegrity robots extremely challenging. This work presents the progress our tools have made in tackling the design and control challenges of spherical tensegrity structures. We focus on this shape since it lends itself to rolling locomotion. The results of our analyses include multiple novel control approaches for mobility and terrain interaction of spherical tensegrity structures that have been tested in simulation. A hardware prototype of a spherical six-bar tensegrity, the Reservoir Compliant Tensegrity Robot, is used to empirically validate the accuracy of simulation. © 2014 The Author(s) Published by the Royal Society. All rights reserved.

  19. Design and Control of Compliant Tensegrity Robots Through Simulation and Hardware Validation

    NASA Technical Reports Server (NTRS)

    Caluwaerts, Ken; Despraz, Jeremie; Iscen, Atil; Sabelhaus, Andrew P.; Bruce, Jonathan; Schrauwen, Benjamin; Sunspiral, Vytas

    2014-01-01

    To better understand the role of tensegrity structures in biological systems and their application to robotics, the Dynamic Tensegrity Robotics Lab at NASA Ames Research Center has developed and validated two different software environments for the analysis, simulation, and design of tensegrity robots. These tools, along with new control methodologies and the modular hardware components developed to validate them, are presented as a system for the design of actuated tensegrity structures. As evidenced from their appearance in many biological systems, tensegrity ("tensile-integrity") structures have unique physical properties which make them ideal for interaction with uncertain environments. Yet these characteristics, such as variable structural compliance, and global multi-path load distribution through the tension network, make design and control of bio-inspired tensegrity robots extremely challenging. This work presents the progress in using these two tools in tackling the design and control challenges. The results of this analysis includes multiple novel control approaches for mobility and terrain interaction of spherical tensegrity structures. The current hardware prototype of a six-bar tensegrity, code-named ReCTeR, is presented in the context of this validation.

  20. Design and control of compliant tensegrity robots through simulation and hardware validation

    PubMed Central

    Caluwaerts, Ken; Despraz, Jérémie; Işçen, Atıl; Sabelhaus, Andrew P.; Bruce, Jonathan; Schrauwen, Benjamin; SunSpiral, Vytas

    2014-01-01

    To better understand the role of tensegrity structures in biological systems and their application to robotics, the Dynamic Tensegrity Robotics Lab at NASA Ames Research Center, Moffett Field, CA, USA, has developed and validated two software environments for the analysis, simulation and design of tensegrity robots. These tools, along with new control methodologies and the modular hardware components developed to validate them, are presented as a system for the design of actuated tensegrity structures. As evidenced from their appearance in many biological systems, tensegrity (‘tensile–integrity’) structures have unique physical properties that make them ideal for interaction with uncertain environments. Yet, these characteristics make design and control of bioinspired tensegrity robots extremely challenging. This work presents the progress our tools have made in tackling the design and control challenges of spherical tensegrity structures. We focus on this shape since it lends itself to rolling locomotion. The results of our analyses include multiple novel control approaches for mobility and terrain interaction of spherical tensegrity structures that have been tested in simulation. A hardware prototype of a spherical six-bar tensegrity, the Reservoir Compliant Tensegrity Robot, is used to empirically validate the accuracy of simulation. PMID:24990292

  1. Radiation Mitigation and Power Optimization Design Tools for Reconfigurable Hardware in Orbit

    NASA Technical Reports Server (NTRS)

    French, Matthew; Graham, Paul; Wirthlin, Michael; Wang, Li; Larchev, Gregory

    2005-01-01

    The Reconfigurable Hardware in Orbit (RHinO)project is focused on creating a set of design tools that facilitate and automate design techniques for reconfigurable computing in space, using SRAM-based field-programmable-gate-array (FPGA) technology. In the second year of the project, design tools that leverage an established FPGA design environment have been created to visualize and analyze an FPGA circuit for radiation weaknesses and power inefficiencies. For radiation, a single event Upset (SEU) emulator, persistence analysis tool, and a half-latch removal tool for Xilinx/Virtex-II devices have been created. Research is underway on a persistence mitigation tool and multiple bit upsets (MBU) studies. For power, synthesis level dynamic power visualization and analysis tools have been completed. Power optimization tools are under development and preliminary test results are positive.

  2. Combined Cycle Engine Large-Scale Inlet for Mode Transition Experiments: System Identification Rack Hardware Design

    NASA Technical Reports Server (NTRS)

    Thomas, Randy; Stueber, Thomas J.

    2013-01-01

    The System Identification (SysID) Rack is a real-time hardware-in-the-loop data acquisition (DAQ) and control instrument rack that was designed and built to support inlet testing in the NASA Glenn Research Center 10- by 10-Foot Supersonic Wind Tunnel. This instrument rack is used to support experiments on the Combined-Cycle Engine Large-Scale Inlet for Mode Transition Experiment (CCE? LIMX). The CCE?LIMX is a testbed for an integrated dual flow-path inlet configuration with the two flow paths in an over-and-under arrangement such that the high-speed flow path is located below the lowspeed flow path. The CCE?LIMX includes multiple actuators that are designed to redirect airflow from one flow path to the other; this action is referred to as "inlet mode transition." Multiple phases of experiments have been planned to support research that investigates inlet mode transition: inlet characterization (Phase-1) and system identification (Phase-2). The SysID Rack hardware design met the following requirements to support Phase-1 and Phase-2 experiments: safely and effectively move multiple actuators individually or synchronously; sample and save effector control and position sensor feedback signals; automate control of actuator positioning based on a mode transition schedule; sample and save pressure sensor signals; and perform DAQ and control processes operating at 2.5 KHz. This document describes the hardware components used to build the SysID Rack including their function, specifications, and system interface. Furthermore, provided in this document are a SysID Rack effectors signal list (signal flow); system identification experiment setup; illustrations indicating a typical SysID Rack experiment; and a SysID Rack performance overview for Phase-1 and Phase-2 experiments. The SysID Rack described in this document was a useful tool to meet the project objectives.

  3. Hardware design of a grappling/docking device accommodating large lateral and angular misalignments

    NASA Astrophysics Data System (ADS)

    Baker, Myles

    In this hardware project, continued from last year, the students developed ideas for a new grappling and docking mechanism that would be able to accommodate a very large initial misalignment (up to one half of the spacecraft radius) and simultaneously a large angular misalignment (up to 20 degrees) between space tug and space vehicle. The students were made familiar with the project by visiting TRW, where they could study the prototype of the NASA Orbiting Maneuvering Vehicle (OMV, since canceled). The students' objective was to design a model, built in the University machine shop, that would demonstrate the potential for much larger misalignments than was possible with the OMV.

  4. Hardware design of a grappling/docking device accommodating large lateral and angular misalignments

    NASA Technical Reports Server (NTRS)

    Baker, Myles

    1992-01-01

    In this hardware project, continued from last year, the students developed ideas for a new grappling and docking mechanism that would be able to accommodate a very large initial misalignment (up to one half of the spacecraft radius) and simultaneously a large angular misalignment (up to 20 degrees) between space tug and space vehicle. The students were made familiar with the project by visiting TRW, where they could study the prototype of the NASA Orbiting Maneuvering Vehicle (OMV, since canceled). The students' objective was to design a model, built in the University machine shop, that would demonstrate the potential for much larger misalignments than was possible with the OMV.

  5. A Hardware Design For Topographical Classification Of Pixels In An Image

    NASA Astrophysics Data System (ADS)

    Salari, Ezzatollah; Bumrungthum, Paisit

    1988-10-01

    The gray level geographical structure (GLGS) is a simple method to represent the local intensity variation of an image in symbolic description. This representation can be used in higher level image processing in subsequent steps. The advent of VLSI microelectronic technology has led to the idea of implementing the GLGS directly in hardware. A two dimensional pipelined systolic pixel classification array is proposed in this paper. In the design, each pair of processing elements processes the data in a pipelined fashion and the data in each pair of processing elements is processed in a parallel fashion to further enhance the system performance.

  6. Interim Service ISDN Satellite (ISIS) hardware experiment development for advanced ISDN satellite designs and experiments

    NASA Technical Reports Server (NTRS)

    Pepin, Gerard R.

    1992-01-01

    The Interim Service Integrated Service Digital Network (ISDN) Satellite (ISIS) Hardware Experiment Development for Advanced Satellite Designs describes the development of the ISDN Satellite Terminal Adapter (ISTA) capable of translating ISDN protocol traffic into Time Division Multiple Access (TDMA) signals for use by a communications satellite. The ISTA connects the Type 1 Network Termination (NT1) via the U-interface on the line termination side of the CPE to the RS-499 interface for satellite uplink. The same ISTA converts in the opposite direction the RS-499 to U-interface data with a simple switch setting.

  7. Hardware-efficient low-power 2-bit ternary ALU design in CNTFET technology

    NASA Astrophysics Data System (ADS)

    Lata Murotiya, Sneh; Gupta, Anu

    2016-05-01

    This paper proposes a hardware-efficient low-power 2-bit ternary arithmetic logic unit (TALU) design in carbon nano tube field effect transistor technology. The proposed TALU architecture combines adder-subtractor and Ex-OR cell in one cell, thereby reducing the number of transistors by 71% in comparison with other TALU architecture. Further, the proposed TALU is optimised at transistor level with a new pass-transistor logic-based encoder circuit. Hspice simulation results show that the proposed design attains great advantages in power and power-delay product for addition and multiplication operations than reported designs. For instant, at power supply of 0.9 V, the proposed TALU consumes on average 91% and 95% less energy compared to their existing counterparts, for addition and multiplication operations, respectively.

  8. Hardware design of the cortical-diencephalic centre of the lower urinary tract neuroregulator system.

    PubMed

    Maciá-Pérez, Francisco; Zambrano-Mendez, Leandro; Berna-Martínez, José-Vicente; Sepúlveda-Lima, Roberto

    2016-10-01

    The neuroregulator system in humans controls organ and system functioning. This system comprises a set of neural centres that are distributed along the spinal cord and act independently together with their nerve interconnections. The centres involved in this task were isolated in previous studies through investigations of the functioning and composition of the neuroregulator system of the lower urinary tract to elucidate their individual performances and enable the creation of a general neuroregulator system model capable of operating at the neuronal level. Although the long-term goal of our research is the development of a system on chip (SoC) capable of behaving as a fully programmable neuroregulator system, this work is another step in which we test the viability of the hardware design of one of these neuroregulator centres (specifically the cortical-diencephalic centre) to achieve a first prototype and architectural proposal. To this end, the behaviour of this centre has been isolated, a hardware design implemented on FPGA has been proposed to create a prototype, a simulation environment has been built for the evaluation, and finally, the results have been analysed. This system verified that the functional behaviour corresponded to the expected behaviour in humans and that the operational requirements for the implementation were technically and architecturally viable. Copyright © 2016 Elsevier Ltd. All rights reserved.

  9. A hardware-software co-design approach to a JPEG encoder design for a planetary micro-rover application

    NASA Astrophysics Data System (ADS)

    Sarma, S.; Udupa, S.; Bhardwaj, K. M.; Parameswaran, K.; Malik, N. K.

    2011-01-01

    Micro-rovers aimed with the objective of planetary exploration of moons and heavenly bodies are becoming focus of many space missions. These micro-rover missions face hard challenges of harsh environment and resource constraints such as power and transmission bandwidth. The image data collected by the on-board cameras are often not possible to transmit to ground due to low bandwidth or adequate transmission duration. The JPEG image compression standard that is developed by the Joint Photographic Experts Group committee for use in compressing digital images and full color photographic images is ubiquitous and is a useful solution to the problem. In this paper, a hardware-software based co-design approach is presented with the aim to implement a JPEG encoder for reducing the transmission bandwidth requirement of a planetary micro-rover. A pipelined hardware architecture of the JPEG encoder requiring reduced hardware resources and power is designed for PowerPC and MIL-1750 processor interface and its performance and resource utilization using standard images of various sizes and quality settings for both these processor architecture is compared. Results are substantiated using extensive simulation and RTL implementation in FPGA. Based on these studies an efficient architecture is arrived at for use in a planetary microrover for future exploration by an Indian moon mission.

  10. SensoTube: A Scalable Hardware Design Architecture for Wireless Sensors and Actuators Networks Nodes in the Agricultural Domain.

    PubMed

    Piromalis, Dimitrios; Arvanitis, Konstantinos

    2016-08-04

    Wireless Sensor and Actuators Networks (WSANs) constitute one of the most challenging technologies with tremendous socio-economic impact for the next decade. Functionally and energy optimized hardware systems and development tools maybe is the most critical facet of this technology for the achievement of such prospects. Especially, in the area of agriculture, where the hostile operating environment comes to add to the general technological and technical issues, reliable and robust WSAN systems are mandatory. This paper focuses on the hardware design architectures of the WSANs for real-world agricultural applications. It presents the available alternatives in hardware design and identifies their difficulties and problems for real-life implementations. The paper introduces SensoTube, a new WSAN hardware architecture, which is proposed as a solution to the various existing design constraints of WSANs. The establishment of the proposed architecture is based, firstly on an abstraction approach in the functional requirements context, and secondly, on the standardization of the subsystems connectivity, in order to allow for an open, expandable, flexible, reconfigurable, energy optimized, reliable and robust hardware system. The SensoTube implementation reference model together with its encapsulation design and installation are analyzed and presented in details. Furthermore, as a proof of concept, certain use cases have been studied in order to demonstrate the benefits of migrating existing designs based on the available open-source hardware platforms to SensoTube architecture.

  11. SensoTube: A Scalable Hardware Design Architecture for Wireless Sensors and Actuators Networks Nodes in the Agricultural Domain

    PubMed Central

    Piromalis, Dimitrios; Arvanitis, Konstantinos

    2016-01-01

    Wireless Sensor and Actuators Networks (WSANs) constitute one of the most challenging technologies with tremendous socio-economic impact for the next decade. Functionally and energy optimized hardware systems and development tools maybe is the most critical facet of this technology for the achievement of such prospects. Especially, in the area of agriculture, where the hostile operating environment comes to add to the general technological and technical issues, reliable and robust WSAN systems are mandatory. This paper focuses on the hardware design architectures of the WSANs for real-world agricultural applications. It presents the available alternatives in hardware design and identifies their difficulties and problems for real-life implementations. The paper introduces SensoTube, a new WSAN hardware architecture, which is proposed as a solution to the various existing design constraints of WSANs. The establishment of the proposed architecture is based, firstly on an abstraction approach in the functional requirements context, and secondly, on the standardization of the subsystems connectivity, in order to allow for an open, expandable, flexible, reconfigurable, energy optimized, reliable and robust hardware system. The SensoTube implementation reference model together with its encapsulation design and installation are analyzed and presented in details. Furthermore, as a proof of concept, certain use cases have been studied in order to demonstrate the benefits of migrating existing designs based on the available open-source hardware platforms to SensoTube architecture. PMID:27527180

  12. Hardware synthesis from DDL description. [simulating a digital system for computerized design of large scale integrated circuits

    NASA Technical Reports Server (NTRS)

    Shiva, S. G.; Shah, A. M.

    1980-01-01

    The details of digital systems can be conveniently input into the design automation system by means of hardware description language (HDL). The computer aided design and test (CADAT) system at NASA MSFC is used for the LSI design. The digital design language (DDL) was selected as HDL for the CADAT System. DDL translator output can be used for the hardware implementation of the digital design. Problems of selecting the standard cells from the CADAT standard cell library to realize the logic implied by the DDL description of the system are addressed.

  13. Design of a terminal node controller hardware for CubeSat tracking applications

    NASA Astrophysics Data System (ADS)

    Ahmad, Y. A.; Nazim, N. J.; Yuhaniz, S. S.

    2016-10-01

    CubeSats enable low-cost experiment and missions to be performed by universities and research institution in space. CubeSats for research use UHF and VHF communication for its tracking and telemetry applications. The current practice of a CubeSat communication is to modify radio amateur's Terminal Node Controller (TNC) to enable data to be received in the ground station. The objective of this research is to design a hardware specifically for use as a TNC for CubeSat tracking applications. A TNC is developed as an interface to the terminal and to serve as data packetization platform. The modem is integrated with a microcontroller unit (MCU) and an audio amplifier to enable the audio signals to be smoothened, amplified and interfaced with the radio. The modem, MCU and audio amplifier circuitry are designed and integrated to form a TNC platform suitable for CubeSat communication.

  14. Design and development of ground segment software and hardware for nanosatellite space missions

    NASA Astrophysics Data System (ADS)

    Mehradnia, Payam

    Contributions to two nanosatellite missions are discussed. First, the design and development of a test system for an advanced nanosatellite power board is discussed. Details of software and hardware design process involved in the implementation of automated test procedures are presented. The system has been deployed for unit-level testing of power boards for several nanosatellite missions, significantly reducing testing cost and time. Next, a Mission Planning and Scheduling Software platform is proposed for Earth Observation missions. The motivation is described for the development of a stand-alone application enabling satellite operations teams to identify suitable observation scenario parameters. Attitude and orbital trajectory estimation algorithms constituting the computational model are integrated and implemented within a graphical visualization environment to allow interaction with the user in an efficient and intuitive manner. Key results of major component-level testing are presented, showing the behaviour and accuracy of analytical components satisfy mission requirements.

  15. Preliminary design of flight hardware for two-phase fluid research

    NASA Technical Reports Server (NTRS)

    Hustvedt, D. C.; Oonk, R. L.

    1982-01-01

    This study defined the preliminary designs of flight software for the Space Shuttle Orbiter for three two-phase fluid research experiments: (1) liquid reorientation - to study the motion of liquid in tanks subjected to small accelerations; (2) pool boiling - to study low-gravity boiling from horizontal cylinders; and (3) flow boiling - to study low-gravity forced flow boiling heat transfer and flow phenomena in a heated horizontal tube. The study consisted of eight major tasks: reassessment of the existing experiment designs, assessment of the Spacelab facility approach, assessment of the individual carry-on approach, selection of the preferred approach, preliminary design of flight hardware, safety analysis, preparation of a development plan, estimates of detailed design, fabrication and ground testing costs. The most cost effective design approach for the experiments is individual carry-ons in the Orbiter middeck. The experiments were designed to fit into one or two middeck lockers. Development schedules for the detailed design, fabrication and ground testing ranged from 15 1/2 to 18 months. Minimum costs (in 1981 dollars) ranged from $463K for the liquid reorientation experiment to $998K for the pool boiling experiment.

  16. Color correction strategies in optical design

    NASA Astrophysics Data System (ADS)

    Pfisterer, Richard N.; Vorndran, Shelby D.

    2014-12-01

    An overview of color correction strategies is presented. Starting with basic first-order aberration theory, we identify known color corrected solutions for doublets and triplets. Reviewing the modern approaches of Robb-Mercado, Rayces-Aguilar, and C. de Albuquerque et al, we find that they confirm the existence of glass combinations for doublets and triplets that yield color corrected solutions that we already know exist. Finally we explore the use of the y, ӯ diagram in conjunction with aberration theory to identify the solution space of glasses capable of leading to color corrected solutions in arbitrary optical systems.

  17. Acoustical Testing Laboratory Developed to Support the Low-Noise Design of Microgravity Space Flight Hardware

    NASA Technical Reports Server (NTRS)

    Cooper, Beth A.

    2001-01-01

    The NASA John H. Glenn Research Center at Lewis Field has designed and constructed an Acoustical Testing Laboratory to support the low-noise design of microgravity space flight hardware. This new laboratory will provide acoustic emissions testing and noise control services for a variety of customers, particularly for microgravity space flight hardware that must meet International Space Station limits on noise emissions. These limits have been imposed by the space station to support hearing conservation, speech communication, and safety goals as well as to prevent noise-induced vibrations that could impact microgravity research data. The Acoustical Testing Laboratory consists of a 23 by 27 by 20 ft (height) convertible hemi/anechoic chamber and separate sound-attenuating test support enclosure. Absorptive 34-in. fiberglass wedges in the test chamber provide an anechoic environment down to 100 Hz. A spring-isolated floor system affords vibration isolation above 3 Hz. These criteria, along with very low design background levels, will enable the acquisition of accurate and repeatable acoustical measurements on test articles, up to a full space station rack in size, that produce very little noise. Removable floor wedges will allow the test chamber to operate in either a hemi/anechoic or anechoic configuration, depending on the size of the test article and the specific test being conducted. The test support enclosure functions as a control room during normal operations but, alternatively, may be used as a noise-control enclosure for test articles that require the operation of noise-generating test support equipment.

  18. Structural Design Requirements and Factors of Safety for Spaceflight Hardware: For Human Spaceflight. Revision A

    NASA Technical Reports Server (NTRS)

    Bernstein, Karen S.; Kujala, Rod; Fogt, Vince; Romine, Paul

    2011-01-01

    This document establishes the structural requirements for human-rated spaceflight hardware including launch vehicles, spacecraft and payloads. These requirements are applicable to Government Furnished Equipment activities as well as all related contractor, subcontractor and commercial efforts. These requirements are not imposed on systems other than human-rated spacecraft, such as ground test articles, but may be tailored for use in specific cases where it is prudent to do so such as for personnel safety or when assets are at risk. The requirements in this document are focused on design rather than verification. Implementation of the requirements is expected to be described in a Structural Verification Plan (SVP), which should describe the verification of each structural item for the applicable requirements. The SVP may also document unique verifications that meet or exceed these requirements with NASA Technical Authority approval.

  19. Final Scientific/Technical Report for "Enabling Exascale Hardware and Software Design through Scalable System Virtualization"

    SciTech Connect

    Dinda, Peter August

    2015-03-17

    This report describes the activities, findings, and products of the Northwestern University component of the "Enabling Exascale Hardware and Software Design through Scalable System Virtualization" project. The purpose of this project has been to extend the state of the art of systems software for high-end computing (HEC) platforms, and to use systems software to better enable the evaluation of potential future HEC platforms, for example exascale platforms. Such platforms, and their systems software, have the goal of providing scientific computation at new scales, thus enabling new research in the physical sciences and engineering. Over time, the innovations in systems software for such platforms also become applicable to more widely used computing clusters, data centers, and clouds. This was a five-institution project, centered on the Palacios virtual machine monitor (VMM) systems software, a project begun at Northwestern, and originally developed in a previous collaboration between Northwestern University and the University of New Mexico. In this project, Northwestern (including via our subcontract to the University of Pittsburgh) contributed to the continued development of Palacios, along with other team members. We took the leadership role in (1) continued extension of support for emerging Intel and AMD hardware, (2) integration and performance enhancement of overlay networking, (3) connectivity with architectural simulation, (4) binary translation, and (5) support for modern Non-Uniform Memory Access (NUMA) hosts and guests. We also took a supporting role in support for specialized hardware for I/O virtualization, profiling, configurability, and integration with configuration tools. The efforts we led (1-5) were largely successful and executed as expected, with code and papers resulting from them. The project demonstrated the feasibility of a virtualization layer for HEC computing, similar to such layers for cloud or datacenter computing. For effort (3

  20. Streamlined design and self reliant hardware for active control of precision space structures

    NASA Technical Reports Server (NTRS)

    Hyland, David C.; King, James A.; Phillips, Douglas J.

    1994-01-01

    Precision space structures may require active vibration control to satisfy critical performance requirements relating to line-of-sight pointing accuracy and the maintenance of precise, internal alignments. In order for vibration control concepts to become operational, it is necessary that their benefits be practically demonstrated in large scale ground-based experiments. A unique opportunity to carry out such demonstrations on a wide variety of experimental testbeds was provided by the NASA Control-Structure Integration (CSI) Guest Investigator (GI) Program. This report surveys the experimental results achieved by the Harris Corporation GI team on both Phases 1 and 2 of the program and provides a detailed description of Phase 2 activities. The Phase 1 results illustrated the effectiveness of active vibration control for space structures and demonstrated a systematic methodology for control design, implementation test. In Phase 2, this methodology was significantly streamlined to yield an on-site, single session design/test capability. Moreover, the Phase 2 research on adaptive neural control techniques made significant progress toward fully automated, self-reliant space structure control systems. As a further thrust toward productized, self-contained vibration control systems, the Harris Phase II activity concluded with experimental demonstration of new vibration isolation hardware suitable for a wide range of space-flight and ground-based commercial applications.The CSI GI Program Phase 1 activity was conducted under contract NASA1-18872, and the Phase 2 activity was conducted under NASA1-19372.

  1. Design and fabrication of an autonomous rendezvous and docking sensor using off-the-shelf hardware

    NASA Astrophysics Data System (ADS)

    Grimm, Gary E.; Bryan, Thomas C.; Howard, Richard T.; Book, Michael L.

    NASA Marshall Space Flight Center (MSFC) has developed and tested an engineering model of an automated rendezvous and docking sensor system composed of a video camera ringed with laser diodes at two wavelengths and a standard remote manipulator system target that has been modified with retro-reflective tape and 830 and 780 mm optical filters. TRW has provided additional engineering analysis, design, and manufacturing support, resulting in a robust, low cost, automated rendezvous and docking sensor design. We have addressed the issue of space qualification using off-the-shelf hardware components. We have also addressed the performance problems of increased signal to noise ratio, increased range, increased frame rate, graceful degradation through component redundancy, and improved range calibration. Next year, we will build a breadboard of this sensor. The phenomenology of the background scene of a target vehicle as viewed against earth and space backgrounds under various lighting conditions will be simulated using the TRW Dynamic Scene Generator Facility (DSGF). Solar illumination angles of the target vehicle and candidate docking target ranging from eclipse to full sun will be explored. The sensor will be transportable for testing at the MSFC Flight Robotics Laboratory (EB24) using the Dynamic Overhead Telerobotic Simulator (DOTS).

  2. Space Technology 5: Changing the Mission Design without Changing the Hardware

    NASA Technical Reports Server (NTRS)

    Carlisle, Candace C.; Webb, Evan H.; Slavin, James A.

    2005-01-01

    The Space Technology 5 (ST-5) Project is part of NASA's New Millennium Program. The validation objectives are to demonstrate the research-quality science capability of the ST-5 spacecraft; to operate the three spacecraft as a constellation; and to design, develop, test and flight-validate three capable micro-satellites with new technologies. A three-month flight demonstration phase is planned, beginning in March 2006. This year, the mission was re-planned for a Pegasus XL dedicated launch into an elliptical polar orbit (instead of the Originally-planned Geosynchronous Transfer Orbit.) The re-plan allows the mission to achieve the same high-level technology validation objectives with a different launch vehicle. The new mission design involves a revised science validation strategy, a new orbit and different communication strategy, while minimizing changes to the ST-5 spacecraft itself. The constellation operations concepts have also been refined. While the system engineers, orbit analysts, and operations teams were re-planning the mission, the implementation team continued to make progress on the flight hardware. Most components have been delivered, and the first spacecraft is well into integration and test.

  3. Modeling and Compensation Design for a Power Hardware-in-the-Loop Simulation of an AC Distribution System

    SciTech Connect

    Ainsworth, Nathan; Hariri, Ali; Prabakar, Kumaraguru; Pratt, Annabelle; Baggu, Murali

    2016-11-21

    Power hardware-in-the-loop (PHIL) simulation, where actual hardware under text is coupled with a real-time digital model in closed loop, is a powerful tool for analyzing new methods of control for emerging distributed power systems. However, without careful design and compensation of the interface between the simulated and actual systems, PHIL simulations may exhibit instability and modeling inaccuracies. This paper addresses issues that arise in the PHIL simulation of a hardware battery inverter interfaced with a simulated distribution feeder. Both the stability and accuracy issues are modeled and characterized, and a methodology for design of PHIL interface compensation to ensure stability and accuracy is presented. The stability and accuracy of the resulting compensated PHIL simulation is then shown by experiment.

  4. Dedicated hardware processor and corresponding system-on-chip design for real-time laser speckle imaging.

    PubMed

    Jiang, Chao; Zhang, Hongyan; Wang, Jia; Wang, Yaru; He, Heng; Liu, Rui; Zhou, Fangyuan; Deng, Jialiang; Li, Pengcheng; Luo, Qingming

    2011-11-01

    Laser speckle imaging (LSI) is a noninvasive and full-field optical imaging technique which produces two-dimensional blood flow maps of tissues from the raw laser speckle images captured by a CCD camera without scanning. We present a hardware-friendly algorithm for the real-time processing of laser speckle imaging. The algorithm is developed and optimized specifically for LSI processing in the field programmable gate array (FPGA). Based on this algorithm, we designed a dedicated hardware processor for real-time LSI in FPGA. The pipeline processing scheme and parallel computing architecture are introduced into the design of this LSI hardware processor. When the LSI hardware processor is implemented in the FPGA running at the maximum frequency of 130 MHz, up to 85 raw images with the resolution of 640×480 pixels can be processed per second. Meanwhile, we also present a system on chip (SOC) solution for LSI processing by integrating the CCD controller, memory controller, LSI hardware processor, and LCD display controller into a single FPGA chip. This SOC solution also can be used to produce an application specific integrated circuit for LSI processing.

  5. Design of Low-Cost FPGA Hardware for Real-time ICA-Based Blind Source Separation Algorithm

    NASA Astrophysics Data System (ADS)

    Charoensak, Charayaphan; Sattar, Farook

    2005-12-01

    Blind source separation (BSS) of independent sources from their convolutive mixtures is a problem in many real-world multisensor applications. In this paper, we propose and implement an efficient FPGA hardware architecture for the realization of a real-time BSS. The architecture can be implemented using a low-cost FPGA (field programmable gate array). The architecture offers a good balance between hardware requirement (gate count and minimal clock speed) and separation performance. The FPGA design implements the modified Torkkola's BSS algorithm for audio signals based on ICA (independent component analysis) technique. Here, the separation is performed by implementing noncausal filters, instead of the typical causal filters, within the feedback network. This reduces the required length of the unmixing filters as well as provides better separation and faster convergence. Description of the hardware as well as discussion of some issues regarding the practical hardware realization are presented. Results of various FPGA simulations as well as real-time testing of the final hardware design in real environment are given.

  6. Hardware design and implementation of a wavelet de-noising procedure for medical signal preprocessing.

    PubMed

    Chen, Szi-Wen; Chen, Yuan-Ho

    2015-10-16

    In this paper, a discrete wavelet transform (DWT) based de-noising with its applications into the noise reduction for medical signal preprocessing is introduced. This work focuses on the hardware realization of a real-time wavelet de-noising procedure. The proposed de-noising circuit mainly consists of three modules: a DWT, a thresholding, and an inverse DWT (IDWT) modular circuits. We also proposed a novel adaptive thresholding scheme and incorporated it into our wavelet de-noising procedure. Performance was then evaluated on both the architectural designs of the software and. In addition, the de-noising circuit was also implemented by downloading the Verilog codes to a field programmable gate array (FPGA) based platform so that its ability in noise reduction may be further validated in actual practice. Simulation experiment results produced by applying a set of simulated noise-contaminated electrocardiogram (ECG) signals into the de-noising circuit showed that the circuit could not only desirably meet the requirement of real-time processing, but also achieve satisfactory performance for noise reduction, while the sharp features of the ECG signals can be well preserved. The proposed de-noising circuit was further synthesized using the Synopsys Design Compiler with an Artisan Taiwan Semiconductor Manufacturing Company (TSMC, Hsinchu, Taiwan) 40 nm standard cell library. The integrated circuit (IC) synthesis simulation results showed that the proposed design can achieve a clock frequency of 200 MHz and the power consumption was only 17.4 mW, when operated at 200 MHz.

  7. Hardware Design and Implementation of a Wavelet De-Noising Procedure for Medical Signal Preprocessing

    PubMed Central

    Chen, Szi-Wen; Chen, Yuan-Ho

    2015-01-01

    In this paper, a discrete wavelet transform (DWT) based de-noising with its applications into the noise reduction for medical signal preprocessing is introduced. This work focuses on the hardware realization of a real-time wavelet de-noising procedure. The proposed de-noising circuit mainly consists of three modules: a DWT, a thresholding, and an inverse DWT (IDWT) modular circuits. We also proposed a novel adaptive thresholding scheme and incorporated it into our wavelet de-noising procedure. Performance was then evaluated on both the architectural designs of the software and. In addition, the de-noising circuit was also implemented by downloading the Verilog codes to a field programmable gate array (FPGA) based platform so that its ability in noise reduction may be further validated in actual practice. Simulation experiment results produced by applying a set of simulated noise-contaminated electrocardiogram (ECG) signals into the de-noising circuit showed that the circuit could not only desirably meet the requirement of real-time processing, but also achieve satisfactory performance for noise reduction, while the sharp features of the ECG signals can be well preserved. The proposed de-noising circuit was further synthesized using the Synopsys Design Compiler with an Artisan Taiwan Semiconductor Manufacturing Company (TSMC, Hsinchu, Taiwan) 40 nm standard cell library. The integrated circuit (IC) synthesis simulation results showed that the proposed design can achieve a clock frequency of 200 MHz and the power consumption was only 17.4 mW, when operated at 200 MHz. PMID:26501290

  8. Simulation verification techniques study: Simulation self test hardware design and techniques report

    NASA Technical Reports Server (NTRS)

    1974-01-01

    The final results are presented of the hardware verification task. The basic objectives of the various subtasks are reviewed along with the ground rules under which the overall task was conducted and which impacted the approach taken in deriving techniques for hardware self test. The results of the first subtask and the definition of simulation hardware are presented. The hardware definition is based primarily on a brief review of the simulator configurations anticipated for the shuttle training program. The results of the survey of current self test techniques are presented. The data sources that were considered in the search for current techniques are reviewed, and results of the survey are presented in terms of the specific types of tests that are of interest for training simulator applications. Specifically, these types of tests are readiness tests, fault isolation tests and incipient fault detection techniques. The most applicable techniques were structured into software flows that are then referenced in discussions of techniques for specific subsystems.

  9. Design considerations for wet flue gas desulfurization systems - wet scrubber hardware issues

    SciTech Connect

    Hurwitz, H.

    1994-12-31

    About 20 years ago the first wet flue gas desulfurization systems installed on coal fired utility boilers in the United States were experiencing extreme operating problems. In addition to their failure to achieve the necessary SO{sub 2} removal efficiencies, these FGD systems required a major investment in maintenance, both material and labor, just to remain operational. These first generation systems demonstrated that a lack of understanding of the chemistry and operating conditions of wet flue gas desulfurization can lead to diastrous results. As the air pollution control industry developed, both in the United States and in Japan, a second generation of FGD systems was introduced. These designs incorporated major improvements in both system chemistry control and in the equipment utilized in the process. Indeed, the successful introduction of utility gas desulfurization systems in Germany was possible only through the transfer of the technology improvements developed in the US and in Japan. Today, technology has evolved to a third generation of wet flue gas desulfurication systems and these systems are now offered worldwide through a series of international licensing agreements. The rapid economic growth and development in Asia and the Pacific Rim combined with existing problems in ambient air quality in these same geographic areas, has resulted in the use of advanced air pollution control systems; including flue gas desulfurization both for new utility units and for many retrofit projects. To meet the requirements of the utility industry, FGD systems must meet high standards of reliability, operability and performance. Key components in achieving these objectives are: FGD System reliability/operability/performance; FGD system supplier qualifications; process design; equipment selection. This paper will discuss each of the essential factors with a concentration on the equipment selection and wet scrubber hardware issues.

  10. Energy Efficient Engine: High-pressure compressor test hardware detailed design report

    NASA Technical Reports Server (NTRS)

    Howe, David C.; Marchant, R. D.

    1988-01-01

    The objective of the NASA Energy Efficient Engine program is to identify and verify the technology required to achieve significant reductions in fuel consumption and operating cost for future commercial gas turbine engines. The design and analysis is documented of the high pressure compressor which was tested as part of the Pratt and Whitney effort under the Energy Efficient Engine program. This compressor was designed to produce a 14:1 pressure ratio in ten stages with an adiabatic efficiency of 88.2 percent in the flight propulsion system. The corresponding expected efficiency for the compressor component test rig is 86.5 percent. Other performance goals are a surge margin of 20 percent, a corrected flow rate of 35.2 kg/sec (77.5 lb/sec), and a life of 20,000 missions and 30,000 hours. Low loss, highly loaded airfoils are used to increase efficiency while reducing the parts count. Active clearance control and case trenches in abradable strips over the blade tips are included in the compressor component design to further increase the efficiency potential. The test rig incorporates variable geometry stator vanes in all stages to permit maximum flexibility in developing stage-to-stage matching. This provision precluded active clearance control on the rear case of the test rig. Both the component and rig designs meet or exceed design requirements with the exception of life goals, which will be achievable with planned advances in materials technology.

  11. Hardware Acceleration of Non-Uniformity Correction for High-Performance Real-Time Infrared LED Scene Projectors

    DTIC Science & Technology

    2016-03-31

    color, 48-micron pitch superlattice light - emitting diode (SLED) array driven from a digital visual interface (DVI) computer interface at a frame rate... Emitting Diodes (IRLEDs) is described that achieves high performance without requiring a model of temperature levels present. An off-the-shelf...Engineering University of Delaware Newark, DE USA 19716 Abstract: A novel approach to correcting for intensity non-uniformity in the InfraRed Light

  12. Design and evaluation of a fault-tolerant multiprocessor using hardware recovery blocks

    NASA Technical Reports Server (NTRS)

    Lee, Y. H.; Shin, K. G.

    1982-01-01

    A fault-tolerant multiprocessor with a rollback recovery mechanism is discussed. The rollback mechanism is based on the hardware recovery block which is a hardware equivalent to the software recovery block. The hardware recovery block is constructed by consecutive state-save operations and several state-save units in every processor and memory module. When a fault is detected, the multiprocessor reconfigures itself to replace the faulty component and then the process originally assigned to the faulty component retreats to one of the previously saved states in order to resume fault-free execution. A mathematical model is proposed to calculate both the coverage of multi-step rollback recovery and the risk of restart. A performance evaluation in terms of task execution time is also presented.

  13. FPGA design of the fast decoder for burst errors correction

    NASA Astrophysics Data System (ADS)

    Mytsko, E. A.; Malchukov, A. N.; Zoev, I. V.; E Ryzhova, S.; Kim, V. L.

    2017-01-01

    The paper is about FPGA design of the fast single stage decoder for correcting burst errors during data transmission. The decoder allows correcting burst errors with 3 bits for a 15 bit codeword and a 7 bit check unit. The description of a generator polynomial search algorithm for building error-correcting codes was represented. The module structure of the decoder was designed for FPGA implementation. There are modules, such as remainder, check_pattern, decoder2, implemented by asynchronous combinational circuits without memory elements, and they process each codeword shift in parallel. Proposed implementation allows getting high performance about ∼20 ns.

  14. A parallel algorithm for error correction in high-throughput short-read data on CUDA-enabled graphics hardware.

    PubMed

    Shi, Haixiang; Schmidt, Bertil; Liu, Weiguo; Müller-Wittig, Wolfgang

    2010-04-01

    Emerging DNA sequencing technologies open up exciting new opportunities for genome sequencing by generating read data with a massive throughput. However, produced reads are significantly shorter and more error-prone compared to the traditional Sanger shotgun sequencing method. This poses challenges for de novo DNA fragment assembly algorithms in terms of both accuracy (to deal with short, error-prone reads) and scalability (to deal with very large input data sets). In this article, we present a scalable parallel algorithm for correcting sequencing errors in high-throughput short-read data so that error-free reads can be available before DNA fragment assembly, which is of high importance to many graph-based short-read assembly tools. The algorithm is based on spectral alignment and uses the Compute Unified Device Architecture (CUDA) programming model. To gain efficiency we are taking advantage of the CUDA texture memory using a space-efficient Bloom filter data structure for spectrum membership queries. We have tested the runtime and accuracy of our algorithm using real and simulated Illumina data for different read lengths, error rates, input sizes, and algorithmic parameters. Using a CUDA-enabled mass-produced GPU (available for less than US$400 at any local computer outlet), this results in speedups of 12-84 times for the parallelized error correction, and speedups of 3-63 times for both sequential preprocessing and parallelized error correction compared to the publicly available Euler-SR program. Our implementation is freely available for download from http://cuda-ec.sourceforge.net .

  15. The design of a hardware testing system for the D Zero Detector

    SciTech Connect

    Angstadt, R.; Johnson, M.; Martin, M.; Matulik, M.; Utes, M.

    1991-11-01

    Testing a system as large as the D Zero data acquisition system is difficult. This paper describes the use of IBM compatible personal computers in a hardware test system that can run on any size system from an engineer`s test bench to the entire subsystem in the D Zero Detector. The test system uses a PC to VME bus interface for the local testing and the Token Ring network for more global testing. This system has been implemented for several different hardware systems in D Zero.

  16. Hardware-Algorithms Co-Design and Implementation of an Analog-to-Information Converter for Biosignals Based on Compressed Sensing.

    PubMed

    Pareschi, Fabio; Albertini, Pierluigi; Frattini, Giovanni; Mangia, Mauro; Rovatti, Riccardo; Setti, Gianluca

    2016-02-01

    We report the design and implementation of an Analog-to-Information Converter (AIC) based on Compressed Sensing (CS). The system is realized in a CMOS 180 nm technology and targets the acquisition of bio-signals with Nyquist frequency up to 100 kHz. To maximize performance and reduce hardware complexity, we co-design hardware together with acquisition and reconstruction algorithms. The resulting AIC outperforms previously proposed solutions mainly thanks to two key features. First, we adopt a novel method to deal with saturations in the computation of CS measurements. This allows no loss in performance even when 60% of measurements saturate. Second, the system is able to adapt itself to the energy distribution of the input by exploiting the so-called rakeness to maximize the amount of information contained in the measurements. With this approach, the 16 measurement channels integrated into a single device are expected to allow the acquisition and the correct reconstruction of most biomedical signals. As a case study, measurements on real electrocardiograms (ECGs) and electromyograms (EMGs) show signals that these can be reconstructed without any noticeable degradation with a compression rate, respectively, of 8 and 10.

  17. Hardware and Software Design of FPGA-based PCIe Gen3 interface for APEnet+ network interconnect system

    NASA Astrophysics Data System (ADS)

    Ammendola, R.; Biagioni, A.; Frezza, O.; Lo Cicero, F.; Lonardo, A.; Martinelli, M.; Paolucci, P. S.; Pastorelli, E.; Rossetti, D.; Simula, F.; Tosoratto, L.; Vicini, P.

    2015-12-01

    In the attempt to develop an interconnection architecture optimized for hybrid HPC systems dedicated to scientific computing, we designed APEnet+, a point-to-point, low-latency and high-performance network controller supporting 6 fully bidirectional off-board links over a 3D torus topology. The first release of APEnet+ (named V4) was a board based on a 40 nm Altera FPGA, integrating 6 channels at 34 Gbps of raw bandwidth per direction and a PCIe Gen2 x8 host interface. It has been the first-of-its-kind device to implement an RDMA protocol to directly read/write data from/to Fermi and Kepler NVIDIA GPUs using NVIDIA peer-to-peer and GPUDirect RDMA protocols, obtaining real zero-copy GPU-to-GPU transfers over the network. The latest generation of APEnet+ systems (now named V5) implements a PCIe Gen3 x8 host interface on a 28 nm Altera Stratix V FPGA, with multi-standard fast transceivers (up to 14.4 Gbps) and an increased amount of configurable internal resources and hardware IP cores to support main interconnection standard protocols. Herein we present the APEnet+ V5 architecture, the status of its hardware and its system software design. Both its Linux Device Driver and the low-level libraries have been redeveloped to support the PCIe Gen3 protocol, introducing optimizations and solutions based on hardware/software co-design.

  18. Hardware design and implementation of fast DOA estimation method based on multicore DSP

    NASA Astrophysics Data System (ADS)

    Guo, Rui; Zhao, Yingxiao; Zhang, Yue; Lin, Qianqiang; Chen, Zengping

    2016-10-01

    In this paper, we present a high-speed real-time signal processing hardware platform based on multicore digital signal processor (DSP). The real-time signal processing platform shows several excellent characteristics including high performance computing, low power consumption, large-capacity data storage and high speed data transmission, which make it able to meet the constraint of real-time direction of arrival (DOA) estimation. To reduce the high computational complexity of DOA estimation algorithm, a novel real-valued MUSIC estimator is used. The algorithm is decomposed into several independent steps and the time consumption of each step is counted. Based on the statistics of the time consumption, we present a new parallel processing strategy to distribute the task of DOA estimation to different cores of the real-time signal processing hardware platform. Experimental results demonstrate that the high processing capability of the signal processing platform meets the constraint of real-time direction of arrival (DOA) estimation.

  19. Design of the high-speed framing, FEC, and interleaving hardware used in a 5.4km free-space optical communication experiment

    NASA Astrophysics Data System (ADS)

    Greco, Joseph A.

    2009-08-01

    The forward error correction (FEC) and interleaver realizations used in a 5.4 km horizontal-path link experiment incorporated several unique elements that were specifically tailored to address turbulence-induced fading. To facilitate optimization studies, this hardware was designed to afford a high degree of flexibility in the FEC code structure and interleaver length. An essential aspect of this structure was the standards-compliant client interface, which provided seamless connectivity to fiber-based terrestrial networks. Through the use of an OTU1 (2.667 Gbaud) architecture with nonstandard interleaving, error-free transmission was achieved in the presence of strong scintillation that produced fade events that frequently exceeded 10 ms in duration. This work was sponsored by the Department of Defense, RRCO DDR&E, under Air Force Contract FA8721-05-C-0002. Opinions, interpretations, conclusions and recommendations are those of the authors and are not necessarily endorsed by the United States Government.

  20. Correcting field harmonics after design in superconducting magnets

    SciTech Connect

    Gupta, R.C.

    1992-01-01

    For a variety of reasons the actual field harmonics, as measured, in the superconducting magnets come out to be somewhat different than what were intended at the time of design. In this paper we shall discuss the schemes which can be used to correct them in the magnets. We shall discuss them for both the allowed and non-allowed harmonics. Since the deviation in field harmonics from their design value is mainly related to the mechanical properties of the coil cross section, in order for a scheme to work as planned, the mechanical configuration of the coil should not be changed significantly while this correction is being implemented.

  1. Correcting field harmonics after design in superconducting magnets

    SciTech Connect

    Gupta, R.C.

    1992-10-01

    For a variety of reasons the actual field harmonics, as measured, in the superconducting magnets come out to be somewhat different than what were intended at the time of design. In this paper we shall discuss the schemes which can be used to correct them in the magnets. We shall discuss them for both the allowed and non-allowed harmonics. Since the deviation in field harmonics from their design value is mainly related to the mechanical properties of the coil cross section, in order for a scheme to work as planned, the mechanical configuration of the coil should not be changed significantly while this correction is being implemented.

  2. State-of-the-art assessment of testing and testability of custom LSI/VLSI circuits. Volume 2: Hardware design verification

    NASA Astrophysics Data System (ADS)

    Carlan, A. J.; Breuer, M. A.

    1982-10-01

    The complexity of digital circuits requires that more emphasis be placed on design specifications and verification. Specification of design requirements currently advocated is done with formal hardware descriptive languages (HDLs) to describe hardware function. Industry's current use of HDLs is primarily for simulation. Verifying a design is a less mature discipline. Three approaches are considered: simulation, symbolic simulation amd formal proofs. While symbolic simulation shows promise, much research and development is required.

  3. Optimal two-stage enrichment design correcting for biomarker misclassification.

    PubMed

    Zang, Yong; Guo, Beibei

    2015-11-26

    The enrichment design is an important clinical trial design to detect the treatment effect of the molecularly targeted agent (MTA) in personalized medicine. Under this design, patients are stratified into marker-positive and marker-negative subgroups based on their biomarker statuses and only the marker-positive patients are enrolled into the trial and randomized to receive either the MTA or a standard treatment. As the biomarker plays a key role in determining the enrollment of the trial, a misclassification of the biomarker can induce substantial bias, undermine the integrity of the trial, and seriously affect the treatment evaluation. In this paper, we propose a two-stage optimal enrichment design that utilizes the surrogate marker to correct for the biomarker misclassification. The proposed design is optimal in the sense that it maximizes the probability of correctly classifying each patient's biomarker status based on the surrogate marker information. In addition, after analytically deriving the bias caused by the biomarker misclassification, we develop a likelihood ratio test based on the EM algorithm to correct for such bias. We conduct comprehensive simulation studies to investigate the operating characteristics of the optimal design and the results confirm the desirable performance of the proposed design.

  4. Design and hardware-in-loop implementation of collision avoidance algorithms for heavy commercial road vehicles

    NASA Astrophysics Data System (ADS)

    Rajaram, Vignesh; Subramanian, Shankar C.

    2016-07-01

    An important aspect from the perspective of operational safety of heavy road vehicles is the detection and avoidance of collisions, particularly at high speeds. The development of a collision avoidance system is the overall focus of the research presented in this paper. The collision avoidance algorithm was developed using a sliding mode controller (SMC) and compared to one developed using linear full state feedback in terms of performance and controller effort. Important dynamic characteristics such as load transfer during braking, tyre-road interaction, dynamic brake force distribution and pneumatic brake system response were considered. The effect of aerodynamic drag on the controller performance was also studied. The developed control algorithms have been implemented on a Hardware-in-Loop experimental set-up equipped with the vehicle dynamic simulation software, IPG/TruckMaker®. The evaluation has been performed for realistic traffic scenarios with different loading and road conditions. The Hardware-in-Loop experimental results showed that the SMC and full state feedback controller were able to prevent the collision. However, when the discrepancies in the form of parametric variations were included, the SMC provided better results in terms of reduced stopping distance and lower controller effort compared to the full state feedback controller.

  5. Study of orbit correction for eRHIC FFAG design

    SciTech Connect

    Liu, C.; Hao, Y.; Litvinenko, V.; Meot, F.; Minty, M.; Ptitsyn, V.; Trbojevic, D.

    2015-05-03

    The unique feature of the orbits in the eRHIC Fixed Field Alternating Gradient (FFAG) design is that multiple accelerating and decelerating bunches pass through the same magnets with different horizontal offsets. Therefore, it is critical for the eRHIC FFAG to correct multiple orbits in the same vacuum pipe for better spin transmission and alignment of colliding beams. In this report, the effects on orbits from multiple error sources will be studied. The orbit correction method will be described and results will be presented.

  6. Utility of an emulation and simulation computer model for air revitalization system hardware design, development, and test

    NASA Technical Reports Server (NTRS)

    Yanosy, J. L.; Rowell, L. F.

    1985-01-01

    Efforts to make increasingly use of suitable computer programs in the design of hardware have the potential to reduce expenditures. In this context, NASA has evaluated the benefits provided by software tools through an application to the Environmental Control and Life Support (ECLS) system. The present paper is concerned with the benefits obtained by an employment of simulation tools in the case of the Air Revitalization System (ARS) of a Space Station life support system. Attention is given to the ARS functions and components, a computer program overview, a SAND (solid amine water desorbed) bed model description, a model validation, and details regarding the simulation benefits.

  7. SIMPL Systems, or: Can We Design Cryptographic Hardware without Secret Key Information?

    NASA Astrophysics Data System (ADS)

    Rührmair, Ulrich

    This paper discusses a new cryptographic primitive termed SIMPL system. Roughly speaking, a SIMPL system is a special type of Physical Unclonable Function (PUF) which possesses a binary description that allows its (slow) public simulation and prediction. Besides this public key like functionality, SIMPL systems have another advantage: No secret information is, or needs to be, contained in SIMPL systems in order to enable cryptographic protocols - neither in the form of a standard binary key, nor as secret information hidden in random, analog features, as it is the case for PUFs. The cryptographic security of SIMPLs instead rests on (i) a physical assumption on their unclonability, and (ii) a computational assumption regarding the complexity of simulating their output. This novel property makes SIMPL systems potentially immune against many known hardware and software attacks, including malware, side channel, invasive, or modeling attacks.

  8. Performance analysis on wideband-interference cancellation based on detailed hardware design

    NASA Astrophysics Data System (ADS)

    Mohamed, Jama

    Use of a stretch waveform in a jamming environment with closely spaced objects such as surface vessels or fighter aircraft is presented. Adaptive cancellation in the sub-banding architecture improves the system cancellation ratio on large sub-array digital receiver systems. Detailed hardware models that capture key system requirements are described. Key model components are system aperture, receive chain with beamforming and digital data processing elements. The model takes error levels at array elements (e.g., quantization and beam pointing), digital receiver (e.g., amplitude and phase errors, time-delays, and aperture dispersions). System performance is evaluated via high-fidelity models and is characterized by the computing system's cancellation ratio.

  9. Design of a hardware track finder (Fast Tracker) for the ATLAS trigger

    NASA Astrophysics Data System (ADS)

    Cavaliere, V.; Adelman, J.; Albicocco, P.; Alison, J.; Ancu, L. S.; Anderson, J.; Andari, N.; Andreani, A.; Andreazza, A.; Annovi, A.; Antonelli, M.; Asbah, N.; Atkinson, M.; Baines, J.; Barberio, E.; Beccherle, R.; Beretta, M.; Bertolucci, F.; Biesuz, N. V.; Blair, R.; Bogdan, M.; Boveia, A.; Britzger, D.; Bryant, P.; Burghgrave, B.; Calderini, G.; Camplani, A.; Cavasinni, V.; Chakraborty, D.; Chang, P.; Cheng, Y.; Citraro, S.; Citterio, M.; Crescioli, F.; Dawe, N.; Dell'Orso, M.; Donati, S.; Dondero, P.; Drake, G.; Gadomski, S.; Gatta, M.; Gentsos, C.; Giannetti, P.; Gkaitatzis, S.; Gramling, J.; Howarth, J. W.; Iizawa, T.; Ilic, N.; Jiang, Z.; Kaji, T.; Kasten, M.; Kawaguchi, Y.; Kim, Y. K.; Kimura, N.; Klimkovich, T.; Kolb, M.; Kordas, K.; Krizka, K.; Kubota, T.; Lanza, A.; Li, H. L.; Liberali, V.; Lisovyi, M.; Liu, L.; Love, J.; Luciano, P.; Luongo, C.; Magalotti, D.; Maznas, I.; Meroni, C.; Mitani, T.; Nasimi, H.; Negri, A.; Neroutsos, P.; Neubauer, M.; Nikolaidis, S.; Okumura, Y.; Pandini, C.; Petridou, C.; Piendibene, M.; Proudfoot, J.; Rados, P.; Roda, C.; Rossi, E.; Sakurai, Y.; Sampsonidis, D.; Saxon, J.; Schmitt, S.; Schoening, A.; Shochet, M.; Shojaii, S.; Soltveit, H.; Sotiropoulou, C. L.; Stabile, A.; Swiatlowski, M.; Tang, F.; Taylor, P. T.; Testa, M.; Tompkins, L.; Vercesi, V.; Volpi, G.; Wang, R.; Watari, R.; Webster, J.; Wu, X.; Yorita, K.; Yurkewicz, A.; Zeng, J. C.; Zhang, J.; Zou, R.

    2016-02-01

    The use of tracking information at the trigger level in the LHC Run II period is crucial for the trigger and data acquisition system and will be even more so as contemporary collisions that occur at every bunch crossing will increase in Run III. The Fast TracKer is part of the ATLAS trigger upgrade project; it is a hardware processor that will provide every Level-1 accepted event (100 kHz) and within 100μs, full tracking information for tracks with momentum as low as 1 GeV . Providing fast, extensive access to tracking information, with resolution comparable to the offline reconstruction, FTK will help in precise detection of the primary and secondary vertices to ensure robust selections and improve the trigger performance.

  10. Hardware description languages

    NASA Technical Reports Server (NTRS)

    Tucker, Jerry H.

    1994-01-01

    Hardware description languages are special purpose programming languages. They are primarily used to specify the behavior of digital systems and are rapidly replacing traditional digital system design techniques. This is because they allow the designer to concentrate on how the system should operate rather than on implementation details. Hardware description languages allow a digital system to be described with a wide range of abstraction, and they support top down design techniques. A key feature of any hardware description language environment is its ability to simulate the modeled system. The two most important hardware description languages are Verilog and VHDL. Verilog has been the dominant language for the design of application specific integrated circuits (ASIC's). However, VHDL is rapidly gaining in popularity.

  11. Groundwater modeling in RCRA assessment, corrective action design and evaluation

    SciTech Connect

    Rybak, I.; Henley, W.

    1995-12-31

    Groundwater modeling was conducted to design, implement, modify, and terminate corrective action at several RCRA sites in EPA Region 4. Groundwater flow, contaminant transport and unsaturated zone air flow models were used depending on the complexity of the site and the corrective action objectives. Software used included Modflow, Modpath, Quickflow, Bioplume 2, and AIR3D. Site assessment data, such as aquifer properties, site description, and surface water characteristics for each facility were used in constructing the models and designing the remedial systems. Modeling, in turn, specified additional site assessment data requirements for the remedial system design. The specific purpose of computer modeling is discussed with several case studies. These consist, among others, of the following: evaluation of the mechanism of the aquifer system and selection of a cost effective remedial option, evaluation of the capture zone of a pumping system, prediction of the system performance for different and difficult hydrogeologic settings, evaluation of the system performance, and trouble-shooting for the remedial system operation. Modeling is presented as a useful tool for corrective action system design, performance, evaluation, and trouble-shooting. The case studies exemplified the integration of diverse data sources, understanding the mechanism of the aquifer system, and evaluation of the performance of alternative remediation systems in a cost-effective manner. Pollutants of concern include metals and PAHs.

  12. Parallel transmission RF pulse design for eddy current correction at ultra high field

    NASA Astrophysics Data System (ADS)

    Zheng, Hai; Zhao, Tiejun; Qian, Yongxian; Ibrahim, Tamer; Boada, Fernando

    2012-08-01

    Multidimensional spatially selective RF pulses have been used in MRI applications such as B1 and B0 inhomogeneities mitigation. However, the long pulse duration has limited their practical applications. Recently, theoretical and experimental studies have shown that parallel transmission can effectively shorten pulse duration without sacrificing the quality of the excitation pattern. Nonetheless, parallel transmission with accelerated pulses can be severely impeded by hardware and/or system imperfections. One of such imperfections is the effect of the eddy current field. In this paper, we first show the effects of the eddy current field on the excitation pattern and then report an RF pulse the design method to correct eddy current fields caused by the RF coil and the gradient system. Experimental results on a 7 T human eight-channel parallel transmit system show substantial improvements on excitation patterns with the use of eddy current correction. Moreover, the proposed model-based correction method not only demonstrates comparable excitation patterns as the trajectory measurement method, but also significantly improves time efficiency.

  13. Design of a hyperstable 60-subunit protein dodecahedron. [corrected].

    PubMed

    Hsia, Yang; Bale, Jacob B; Gonen, Shane; Shi, Dan; Sheffler, William; Fong, Kimberly K; Nattermann, Una; Xu, Chunfu; Huang, Po-Ssu; Ravichandran, Rashmi; Yi, Sue; Davis, Trisha N; Gonen, Tamir; King, Neil P; Baker, David

    2016-07-07

    The dodecahedron [corrected] is the largest of the Platonic solids, and icosahedral protein structures are widely used in biological systems for packaging and transport. There has been considerable interest in repurposing such structures for applications ranging from targeted delivery to multivalent immunogen presentation. The ability to design proteins that self-assemble into precisely specified, highly ordered icosahedral structures would open the door to a new generation of protein containers with properties custom-tailored to specific applications. Here we describe the computational design of a 25-nanometre icosahedral nanocage that self-assembles from trimeric protein building blocks. The designed protein was produced in Escherichia coli, and found by electron microscopy to assemble into a homogenous population of icosahedral particles nearly identical to the design model. The particles are stable in 6.7 molar guanidine hydrochloride at up to 80 degrees Celsius, and undergo extremely abrupt, but reversible, disassembly between 2 molar and 2.25 molar guanidinium thiocyanate. The dodecahedron [corrected] is robust to genetic fusions: one or two copies of green fluorescent protein (GFP) can be fused to each of the 60 subunits to create highly fluorescent ‘standard candles’ for use in light microscopy, and a designed protein pentamer can be placed in the centre of each of the 20 pentameric faces to modulate the size of the entrance/exit channels of the cage. Such robust and customizable nanocages should have considerable utility in targeted drug delivery, vaccine design and synthetic biology.

  14. Design of nanophotonic circuits for autonomous subsystem quantum error correction

    NASA Astrophysics Data System (ADS)

    Kerckhoff, J.; Pavlichin, D. S.; Chalabi, H.; Mabuchi, H.

    2011-05-01

    We reapply our approach to designing nanophotonic quantum memories in order to formulate an optical network that autonomously protects a single logical qubit against arbitrary single-qubit errors. Emulating the nine-qubit Bacon-Shor subsystem code, the network replaces the traditionally discrete syndrome measurement and correction steps by continuous, time-independent optical interactions and coherent feedback of unitarily processed optical fields.

  15. An introduction to the BANNING design automation system for shuttle microelectronic hardware development

    NASA Technical Reports Server (NTRS)

    Mcgrady, W. J.

    1979-01-01

    The BANNING MOS design system is presented. It complements rather than supplant the normal design activities associated with the design and fabrication of low-power digital electronic equipment. BANNING is user-oriented and requires no programming experience to use effectively. It provides the user a simulation capability to aid in his circuit design and it eliminates most of the manual operations involved in the layout and artwork generation of integrated circuits. An example of its operation is given and some additional background reading is provided.

  16. Design of an integrated hardware interface for AOSLO image capture and cone-targeted stimulus delivery.

    PubMed

    Yang, Qiang; Arathorn, David W; Tiruveedhula, Pavan; Vogel, Curtis R; Roorda, Austin

    2010-08-16

    We demonstrate an integrated FPGA solution to project highly stabilized, aberration-corrected stimuli directly onto the retina by means of real-time retinal image motion signals in combination with high speed modulation of a scanning laser. By reducing the latency between target location prediction and stimulus delivery, the stimulus location accuracy, in a subject with good fixation, is improved to 0.15 arcminutes from 0.26 arcminutes in our earlier solution. We also demonstrate the new FPGA solution is capable of delivering stabilized large stimulus pattern (up to 256 x 256 pixels) to the retina.

  17. Parameterized hardware description as object oriented hardware model implementation

    NASA Astrophysics Data System (ADS)

    Drabik, Pawel K.

    2010-09-01

    The paper introduces novel model for design, visualization and management of complex, highly adaptive hardware systems. The model settles component oriented environment for both hardware modules and software application. It is developed on parameterized hardware description research. Establishment of stable link between hardware and software, as a purpose of designed and realized work, is presented. Novel programming framework model for the environment, named Graphic-Functional-Components is presented. The purpose of the paper is to present object oriented hardware modeling with mentioned features. Possible model implementation in FPGA chips and its management by object oriented software in Java is described.

  18. Petite Amateur Naval Satellite Spacecraft Digital Control System: A Hardware Design

    DTIC Science & Technology

    1993-03-01

    1 A. GENERAL .................................... 1 B. REDUNDANCY ................................ 1 C. DESIGN REQUIREMENTS OF A CONTROL BOARD...6 A. GENERAL .................................... 6 B. DESIGN IMPLEMENTATION OF A CONTROL BOARD ....... 6 1. Intel M80C186 CHMOS...Desirable Features ........................... 8 (1) Clock Generator Circuit .................... 8 (2) Two Independent Direct Memory Access (DMA

  19. The hardware and software implications of hospital birth room design: a midwifery perspective.

    PubMed

    Hammond, Athena; Foureur, Maralyn; Homer, Caroline S E

    2014-07-01

    to explore the impacts of physical and aesthetic design of hospital birth rooms on midwives. the design of a workplace, including architecture, equipment, furnishings and aesthetics, can influence the experience and performance of staff. Some research has explored the effects of workplace design in health care environments but very little research has examined the impact of design on midwives working in hospital birth rooms. a video ethnographic study was undertaken and the labours of six women cared for by midwives were filmed. Filming took place in one birth centre and two labour wards within two Australian hospitals. Subsequently, eight midwives participated in video-reflexive interviews whilst viewing the filmed labour of the woman for whom they provided care. Thematic analysis of the midwife interviews was undertaken. midwives were strongly affected by the design of the birth room. Four major themes were identified: finding a space amongst congestion and clutter; trying to work underwater; creating ambience in a clinical space and being equipped for flexible practice. Aesthetic features, room layout and the design of equipment and fixtures all impacted on the midwives and their practice in both birth centre and labour ward settings. the current design of many hospital birth rooms challenges the provision of effective midwifery practice. Changes to the design and aesthetics of the hospital birth room may engender safer, more comfortable and more effective midwifery practice. Copyright © 2013 Elsevier Ltd. All rights reserved.

  20. FPGA-Based Efficient Hardware/Software Co-Design for Industrial Systems with Consideration of Output Selection

    NASA Astrophysics Data System (ADS)

    Deliparaschos, Kyriakos M.; Michail, Konstantinos; Zolotas, Argyrios C.; Tzafestas, Spyros G.

    2016-05-01

    This work presents a field programmable gate array (FPGA)-based embedded software platform coupled with a software-based plant, forming a hardware-in-the-loop (HIL) that is used to validate a systematic sensor selection framework. The systematic sensor selection framework combines multi-objective optimization, linear-quadratic-Gaussian (LQG)-type control, and the nonlinear model of a maglev suspension. A robustness analysis of the closed-loop is followed (prior to implementation) supporting the appropriateness of the solution under parametric variation. The analysis also shows that quantization is robust under different controller gains. While the LQG controller is implemented on an FPGA, the physical process is realized in a high-level system modeling environment. FPGA technology enables rapid evaluation of the algorithms and test designs under realistic scenarios avoiding heavy time penalty associated with hardware description language (HDL) simulators. The HIL technique facilitates significant speed-up in the required execution time when compared to its software-based counterpart model.

  1. Hardware and software design for a National Instrument-based magnetic induction tomography system for prospective biomedical applications.

    PubMed

    Wei, Hsin-Yu; Soleimani, Manuchehr

    2012-05-01

    Magnetic induction tomography (MIT) is a new and emerging type of tomography technique that is able to map the passive electromagnetic properties (in particular conductivity) of an object. Excitation coils are used to induce eddy currents in the medium, and the magnetic field produced by the induced eddy current is then sensed by the receiver coils. Because of its non-invasive and contactless feature, it becomes an attractive technique for many applications (especially in biomedical area) compared to traditional contact electrode-based electrical impedance tomography. Due to the low contrast in conductivity between biological tissues, an accurate and stable hardware system is necessary. Most MIT systems in the literature employ external signal generators, power amplifiers and highly stable down-conversion electronics to obtain a satisfactory phase measurement. However, this would increase design complexity substantially. In this paper, a National Instrument-based MIT system is developed at the University of Bath, aiming for biomedical applications. The system utilizes National Instrument products to accomplish all signal driving, switching and data acquisition tasks, which ease the system design whilst providing satisfactory performance. This paper presents a full-scaled medical MIT system, from the sensor and system hardware design, eddy current model verification to the image reconstruction software: the performance of this MIT instrumentation system is characterized in detail, including the system accuracy and system stability. The methods of solving eddy current problem are presented. The reconstructed images of detecting the presence of saline solutions are also included in this paper, which show the capability of national instrument products to be developed into a full-scaled biomedical MIT system, by demonstrating the practical experimental results.

  2. Converting Paper into Hardware: A Status of the TEMPO Instrument Design and Manufacturing

    NASA Astrophysics Data System (ADS)

    Nicks, D. K., Jr.; Flittner, D. E.; Chance, K.; Liu, X.; Al-Saadi, J. A.; Pennington, W. F.; Suleiman, R. M.; Rosenbaum, D. M.; Canova, B.; Baker, B.; Lasnik, J.

    2015-12-01

    The Tropospheric Emissions: Monitoring of Pollution (TEMPO) instrument is part of NASA's Earth Venture Instrument (EVI) program, and will be the first hosted payload sensor to make tropospheric gas observations from geostationary (GEO) orbit using an ultraviolet/visible spectrometer. The instrument is designed to provide key trace gas measurements important to understanding tropospheric air pollution chemistry. The baseline design measures ozone (O3), nitrogen dioxide (NO2), and formaldehyde (H2CO). The TEMPO instrument will provide hourly daylight measurements of these trace gases on urban-regional spatial scales. These remote sensing measurements augment current ground-based air quality measurements and will offer improvements in air quality modeling and prediction. The TEMPO project has completed its confirmation review as well as the Critical Design Review (CDR). The updated TEMPO design, instrument performance estimates and technical challenges will be presented.

  3. Design requirements for SRB production control system. Volume 3: Package evaluation, modification and hardware

    NASA Technical Reports Server (NTRS)

    1981-01-01

    The software package evaluation was designed to analyze commercially available, field-proven, production control or manufacturing resource planning management technology and software package. The analysis was conducted by comparing SRB production control software requirements and conceptual system design to software package capabilities. The methodology of evaluation and the findings at each stage of evaluation are described. Topics covered include: vendor listing; request for information (RFI) document; RFI response rate and quality; RFI evaluation process; and capabilities versus requirements.

  4. Acoustic Treatment Design Scaling Methods. Volume 3; Test Plans, Hardware, Results, and Evaluation

    NASA Technical Reports Server (NTRS)

    Yu, J.; Kwan, H. W.; Echternach, D. K.; Kraft, R. E.; Syed, A. A.

    1999-01-01

    The ability to design, build, and test miniaturized acoustic treatment panels on scale-model fan rigs representative of the full-scale engine provides not only a cost-savings, but an opportunity to optimize the treatment by allowing tests of different designs. To be able to use scale model treatment as a full-scale design tool, it is necessary that the designer be able to reliably translate the scale model design and performance to an equivalent full-scale design. The primary objective of the study presented in this volume of the final report was to conduct laboratory tests to evaluate liner acoustic properties and validate advanced treatment impedance models. These laboratory tests include DC flow resistance measurements, normal incidence impedance measurements, DC flow and impedance measurements in the presence of grazing flow, and in-duct liner attenuation as well as modal measurements. Test panels were fabricated at three different scale factors (i.e., full-scale, half-scale, and one-fifth scale) to support laboratory acoustic testing. The panel configurations include single-degree-of-freedom (SDOF) perforated sandwich panels, SDOF linear (wire mesh) liners, and double-degree-of-freedom (DDOF) linear acoustic panels.

  5. Conformal dome aberration correction by designing the inner surface

    NASA Astrophysics Data System (ADS)

    Zhang, Wang; Chen, Shouqian; Fan, Zhigang

    2016-12-01

    The ray transmission models of optical domes were established, and the characteristics of the rays while passing through a hemispherical dome and a conformal dome were comparatively analysed. Acquiring the minimum deviated angles from the inner surface of the conformal dome was then determined to be the designing goal for reducing the dynamic aberrations. Based on this, the inner surface of the conformal dome was optimized and thus, the dynamic aberrations were reduced. Finally, a completely cooled conformal optical system was designed. The results show that the optical system have produced good imaging quality within all the fields of regard, which further illustrates that designing the inner surface of a conformal dome is an effective method for aberration correction.

  6. Blackcomb: Hardware-Software Co-design for Non-Volatile Memory in Exascale Systems

    SciTech Connect

    Schreiber, Robert

    2014-11-26

    Summary of technical results of Blackcomb Memory Devices We explored various different memory technologies (STTRAM, PCRAM, FeRAM, and ReRAM). The progress can be classified into three categories, below. Modeling and Tool Releases Various modeling tools have been developed over the last decade to help in the design of SRAM or DRAM-based memory hierarchies. To explore new design opportunities that NVM technologies can bring to the designers, we have developed similar high-level models for NVM, including PCRAMsim [Dong 2009], NVSim [Dong 2012], and NVMain [Poremba 2012]. NVSim is a circuit-level model for NVM performance, energy, and area estimation, which supports various NVM technologies, including STT-RAM, PCRAM, ReRAM, and legacy NAND Flash. NVSim is successfully validated against industrial NVM prototypes, and it is expected to help boost architecture-level NVM-related studies. On the other side, NVMain is a cycle accurate main memory simulator designed to simulate emerging nonvolatile memories at the architectural level. We have released these models as open source tools and provided contiguous support to them. We also proposed PS3-RAM, which is a fast, portable and scalable statistical STT-RAM reliability analysis model [Wen 2012]. Design Space Exploration and Optimization With the support of these models, we explore different device/circuit optimization techniques. For example, in [Niu 2012a] we studied the power reduction technique for the application of ECC scheme in ReRAM designs and proposed to use ECC code to relax the BER (Bit Error Rate) requirement of a single memory to improve the write energy consumption and latency for both 1T1R and cross-point ReRAM designs. In [Xu 2011], we proposed a methodology to design STT-RAM for different optimization goals such as read performance, write performance and write energy by leveraging the trade-off between write current and write time of MTJ. We also studied the tradeoffs in building a reliable crosspoint Re

  7. Hardware and software design for an electromagnetic induction tomography (EMT) system for high contrast metal process applications

    NASA Astrophysics Data System (ADS)

    Ma, X.; Peyton, A. J.; Higson, S. R.; Lyons, A.; Dickinson, S. J.

    2006-01-01

    This paper presents the latest development of an EMT system designed for use in the metal production industry such as imaging molten steel flow profiles during continuous casting. The system that has been developed is based on a commercial data acquisition board residing in a PC host computer and programmed in the LabView graphical language. The paper reviews the new EMT hardware electronics and software. The noise effects and the detectability limits of the system are given in the paper followed by the system sensitivity map analysis. Optimal image reconstructions, including the simultaneous iterative reconstruction technique (SIRT) and non-iterative Tikhonov regularization, truncated singular value decomposition (TSVD), are also discussed and applied for the system. The system has been demonstrated in real time (10 frames s-1 for 5 kHz excitation) with test phantoms that represent typical metal flow profiles such as central, annular stream and multiple streams.

  8. Osseointegration of metallic devices: current trends based on implant hardware design.

    PubMed

    Coelho, Paulo G; Jimbo, Ryo

    2014-11-01

    Osseointegration of metallic devices has been one of the most successful treatments in rehabilitative dentistry and medicine over the past five decades. While highly successful, the quest for designing surgical instrumentation and associated implantable devices that hastens osseointegration has been perpetual and has often been approached as single variable preclinical investigations. The present manuscript presents how the interplay between surgical instrumentation and device macrogeometry not only plays a key role on both early and delayed stages of osseointegration, but may also be key in how efficient smaller length scale designing (at the micrometer and nanometer scale levels) may be in hastening early stages of osseointegration. Copyright © 2014 Elsevier Inc. All rights reserved.

  9. Design, Development, and Testing of a UAV Hardware-in-the-Loop Testbed for Aviation and Airspace Prognostics Research

    NASA Technical Reports Server (NTRS)

    Kulkarni, Chetan; Teubert, Chris; Gorospe, George; Burgett, Drew; Quach, Cuong C.; Hogge, Edward

    2016-01-01

    The airspace is becoming more and more complicated, and will continue to do so in the future with the integration of Unmanned Aerial Vehicles (UAVs), autonomy, spacecraft, other forms of aviation technology into the airspace. The new technology and complexity increases the importance and difficulty of safety assurance. Additionally, testing new technologies on complex aviation systems & systems of systems can be very difficult, expensive, and sometimes unsafe in real life scenarios. Prognostic methodology provides an estimate of the health and risks of a component, vehicle, or airspace and knowledge of how that will change over time. That measure is especially useful in safety determination, mission planning, and maintenance scheduling. The developed testbed will be used to validate prediction algorithms for the real-time safety monitoring of the National Airspace System (NAS) and the prediction of unsafe events. The framework injects flight related anomalies related to ground systems, routing, airport congestion, etc. to test and verify algorithms for NAS safety. In our research work, we develop a live, distributed, hardware-in-the-loop testbed for aviation and airspace prognostics along with exploring further research possibilities to verify and validate future algorithms for NAS safety. The testbed integrates virtual aircraft using the X-Plane simulator and X-PlaneConnect toolbox, UAVs using onboard sensors and cellular communications, and hardware in the loop components. In addition, the testbed includes an additional research framework to support and simplify future research activities. It enables safe, accurate, and inexpensive experimentation and research into airspace and vehicle prognosis that would not have been possible otherwise. This paper describes the design, development, and testing of this system. Software reliability, safety and latency are some of the critical design considerations in development of the testbed. Integration of HITL elements in

  10. Hardly Hardware

    ERIC Educational Resources Information Center

    Lott, Debra

    2007-01-01

    In a never-ending search for new and inspirational still-life objects, the author discovered that home improvement retailers make great resources for art teachers. Hardware and building materials are inexpensive and have interesting and variable shapes. She especially liked the dryer-vent coils and the electrical conduit. These items can be…

  11. Hardly Hardware

    ERIC Educational Resources Information Center

    Lott, Debra

    2007-01-01

    In a never-ending search for new and inspirational still-life objects, the author discovered that home improvement retailers make great resources for art teachers. Hardware and building materials are inexpensive and have interesting and variable shapes. She especially liked the dryer-vent coils and the electrical conduit. These items can be…

  12. The J-2X Upper Stage Engine: From Design to Hardware

    NASA Technical Reports Server (NTRS)

    Byrd, Thomas

    2010-01-01

    NASA is well on its way toward developing a new generation of launch vehicles to support of national space policy to retire the Space Shuttle fleet, complete the International Space Station, and return to the Moon as the first step in resuming this nation s exploration of deep space. The Constellation Program is developing the launch vehicles, spacecraft, surface systems, and ground systems to support those plans. Two launch vehicles will support those ambitious plans the Ares I and Ares V. (Figure 1) The J-2X Upper Stage Engine is a critical element of both of these new launchers. This paper will provide an overview of the J-2X design background, progress to date in design, testing, and manufacturing. The Ares I crew launch vehicle will lift the Orion crew exploration vehicle and up to four astronauts into low Earth orbit (LEO) to rendezvous with the space station or the first leg of mission to the Moon. The Ares V cargo launch vehicle is designed to lift a lunar lander into Earth orbit where it will be docked with the Orion spacecraft, and provide the thrust for the trans-lunar journey. While these vehicles bear some visual resemblance to the 1960s-era Saturn vehicles that carried astronauts to the Moon, the Ares vehicles are designed to carry more crew and more cargo to more places to carry out more ambitious tasks than the vehicles they succeed. The government/industry team designing the Ares rockets is mining a rich history of technology and expertise from the Shuttle, Saturn and other programs and seeking commonality where feasible between the Ares crew and cargo rockets as a way to minimize risk, shorten development times, and live within the budget constraints of its original guidance.

  13. Preliminary control law and hardware designs for a ride quality augmentation system for commuter aircraft. Phase 2

    NASA Technical Reports Server (NTRS)

    Davis, D. J.; Linse, D. J.; Suikat, R.; Entz, D. P.

    1986-01-01

    The continued investigation of the design of Ride Quality Augmentation Systems (RQAS) for commuter aircraft is described. The purpose of these RQAS is the reduction of the vertical and lateral acceleration response of the aircraft due to atmospheric turbulence by the application of active control. The current investigations include the refinement of the sample data feedback control laws based on the control-rate-weighting and output-weighting optimal control design techniqes. These control designs were evaluated using aircraft time simulations driven by Dryden spectra turbulence. Fixed gain controllers were tested throughout the aircrft operating envelope. The preliminary design of the hardware modifications necessary to implement and test the RQAS on a commuter aircraft is included. These include a separate surface elevator and the flap modifications to provide both direct lift and roll control. A preliminary failure mode investigation was made for the proposed configuration. The results indicate that vertical acceleration reductions of 45% and lateral reductions of more than 50% are possible. A fixed gain controller appears to be feasible with only minor response degradation.

  14. The PASM Parallel Processing System: Hardware Design and Intelligent Operating System Concepts

    DTIC Science & Technology

    1986-07-01

    221 Motorola , Inc., M68000 16/2-Bit Microprocessor References Programmer ’& Reference Manual (fourth edition), (1] W. R. Wittmayer, "Array processor...16 prototype under construction uses Motorola MC68010 processors; the final N=1024 system, which the architecture is designed for, may employ custom...prototype, two of which are commer- cial products. These are: 1. CPU (commercial) -- Motorola MC68010 16-bit microprocessor, VMEbus interface, and

  15. AFOSR BRI: Co-Design of Hardware/Software for Predicting MAV Aerodynamics

    DTIC Science & Technology

    2016-09-27

    Regular Structures for GPGPU," Computers & Fluids, 119:149-161, Sept. 2015. H. Zhang, A. Sandu, and P. Tranquilli, "Application of Approximate Matrix ...multiplicative) speed-up beyond Moore’s Law, as noted in the AFOSR BAA. In this project, we propose a formal co-design process for the structured grid and...the structured grid and unstructured grid motifs found in computational fluid dynamics (CFD) in support of aerodynamic predictions for micro-air

  16. Design and Implementation of a New Real-Time Frequency Sensor Used as Hardware Countermeasure

    PubMed Central

    Jiménez-Naharro, Raúl; Gómez-Galán, Juan Antonio; Sánchez-Raya, Manuel; Gómez-Bravo, Fernando; Pedro-Carrasco, Manuel

    2013-01-01

    A new digital countermeasure against attacks related to the clock frequency is –presented. This countermeasure, known as frequency sensor, consists of a local oscillator, a transition detector, a measurement element and an output block. The countermeasure has been designed using a full-custom technique implemented in an Application-Specific Integrated Circuit (ASIC), and the implementation has been verified and characterized with an integrated design using a 0.35 μm standard Complementary Metal Oxide Semiconductor (CMOS) technology (Very Large Scale Implementation—VLSI implementation). The proposed solution is configurable in resolution time and allowed range of period, achieving a minimum resolution time of only 1.91 ns and an initialization time of 5.84 ns. The proposed VLSI implementation shows better results than other solutions, such as digital ones based on semi-custom techniques and analog ones based on band pass filters, all design parameters considered. Finally, a counter has been used to verify the good performance of the countermeasure in avoiding the success of an attack. PMID:24008285

  17. Design and implementation of a new real-time frequency sensor used as hardware countermeasure.

    PubMed

    Jiménez-Naharro, Raúl; Gómez-Galán, Juan Antonio; Sánchez-Raya, Manuel; Gómez-Bravo, Fernando; Pedro-Carrasco, Manuel

    2013-09-04

    A new digital countermeasure against attacks related to the clock frequency is presented. This countermeasure, known as frequency sensor, consists of a local oscillator, a transition detector, a measurement element and an output block. The countermeasure has been designed using a full-custom technique implemented in an Application-Specific Integrated Circuit (ASIC), and the implementation has been verified and characterized with an integrated design using a 0.35 mm standard Complementary Metal Oxide Semiconductor (CMOS) technology (Very Large Scale Implementation-VLSI implementation). The proposed solution is configurable in resolution time and allowed range of period, achieving a minimum resolution time of only 1.91 ns and an initialization time of 5.84 ns. The proposed VLSI implementation shows better results than other solutions, such as digital ones based on semi-custom techniques and analog ones based on band pass filters, all design parameters considered. Finally, a counter has been used to verify the good performance of the countermeasure in avoiding the success of an attack.

  18. Energy efficient engine high pressure turbine test hardware detailed design report

    NASA Technical Reports Server (NTRS)

    Halila, E. E.; Lenahan, D. T.; Thomas, T. T.

    1982-01-01

    The high pressure turbine configuration for the Energy Efficient Engine is built around a two-stage design system. Moderate aerodynamic loading for both stages is used to achieve the high level of turbine efficiency. Flowpath components are designed for 18,000 hours of life, while the static and rotating structures are designed for 36,000 hours of engine operation. Both stages of turbine blades and vanes are air-cooled incorporating advanced state of the art in cooling technology. Direct solidification (DS) alloys are used for blades and one stage of vanes, and an oxide dispersion system (ODS) alloy is used for the Stage 1 nozzle airfoils. Ceramic shrouds are used as the material composition for the Stage 1 shroud. An active clearance control (ACC) system is used to control the blade tip to shroud clearances for both stages. Fan air is used to impinge on the shroud casing support rings, thereby controlling the growth rate of the shroud. This procedure allows close clearance control while minimizing blade tip to shroud rubs.

  19. The Effect of Predicted Vehicle Displacement on Ground Crew Task Performance and Hardware Design

    NASA Technical Reports Server (NTRS)

    Atencio, Laura Ashley; Reynolds, David W.

    2011-01-01

    NASA continues to explore new launch vehicle concepts that will carry astronauts to low- Earth orbit to replace the soon-to-be retired Space Transportation System (STS) shuttle. A tall vertically stacked launch vehicle (> or =300 ft) is exposed to the natural environment while positioned on the launch pad. Varying directional winds and vortex shedding cause the vehicle to sway in an oscillating motion. Ground crews working high on the tower and inside the vehicle during launch preparations will be subjected to this motion while conducting critical closeout tasks such as mating fluid and electrical connectors and carrying heavy objects. NASA has not experienced performing these tasks in such environments since the Saturn V, which was serviced from a movable (but rigid) service structure; commercial launchers are likewise attended by a service structure that moves away from the vehicle for launch. There is concern that vehicle displacement may hinder ground crew operations, impact the ground system designs, and ultimately affect launch availability. The vehicle sway assessment objective is to replicate predicted frequencies and displacements of these tall vehicles, examine typical ground crew tasks, and provide insight into potential vehicle design considerations and ground crew performance guidelines. This paper outlines the methodology, configurations, and motion testing performed while conducting the vehicle displacement assessment that will be used as a Technical Memorandum for future vertically stacked vehicle designs.

  20. Skylab biomedical hardware development

    NASA Technical Reports Server (NTRS)

    Huffstetler, W. J., Jr.; Lem, J. D.

    1974-01-01

    The development of hardware to support biomedical experimentation and operations in the Skylab vehicle presented unique technical problems. Designs were required to enable the accurate measurement of many varied physiological parameters and to compensate for zero g such that uninhibited equipment operation would be possible. Because of problems that occurred during the orbital workshop launch, special tests were run and new equipment was designed and built for use by the first Skylab crew. Design concepts used in the development of hardware to support cardiovascular, pulmonary, vestibular, body, and specimen mass measuring experiments are discussed. Additionally, major problem areas and the corresponding design solutions, as well as knowledge gained that will be pertinent for future life sciences hardware development, are presented.

  1. Design and Implementation of a Hardware Channel Board for Holographic Data Storage

    NASA Astrophysics Data System (ADS)

    Yoon, Pilsang; Kim, Haksun; Park, Jooyoun; Jung, Heungsang; Park, Gwitae

    2009-03-01

    A channel board has been designed, manufactured, and used for real-time recording and reading processes. The channel coding and decoding algorithms were implemented on Xilinx field-programmable gate array (FPGA) devices. For fast data transmission between the channel board and personal computer (PC), a universal serial bus (USB) 2.0 interface is installed in the channel board. The firmware and device driver for USB interface achieved a transfer rate of 34 Mbyte/s. A holographic data storage system records a video stream, which was successfully retrieved and reconstructed without error.

  2. Hardware-Based Non-Optimum Factors for Launch Vehicle Structural Design

    NASA Technical Reports Server (NTRS)

    Wu, K. Chauncey; Cerro, Jeffrey A.

    2010-01-01

    During aerospace vehicle conceptual and preliminary design, empirical non-optimum factors are typically applied to predicted structural component weights to account for undefined manufacturing and design details. Non-optimum factors are developed here for 32 aluminum-lithium 2195 orthogrid panels comprising the liquid hydrogen tank barrel of the Space Shuttle External Tank using measured panel weights and manufacturing drawings. Minimum values for skin thickness, axial and circumferential blade stiffener thickness and spacing, and overall panel thickness are used to estimate individual panel weights. Panel non-optimum factors computed using a coarse weights model range from 1.21 to 1.77, and a refined weights model (including weld lands and skin and stiffener transition details) yields non-optimum factors of between 1.02 and 1.54. Acreage panels have an average 1.24 non-optimum factor using the coarse model, and 1.03 with the refined version. The observed consistency of these acreage non-optimum factors suggests that relatively simple models can be used to accurately predict large structural component weights for future launch vehicles.

  3. The design and fabrication of the Centaur neutral buoyancy trainer and related hardware

    NASA Technical Reports Server (NTRS)

    Ware, Alan S.; Hollingsworth, Michael

    1986-01-01

    Two full scale mockups of the Centaur upper stage were designed, fabricated and delivered to NASA. One was the Centaur Weightless Environment Training Facility (WETF) trainer and the other was the Centaur 1-G mockup. The Centaur upper stage booster is designed to carry the spacecraft Galileo to Jupiter, and the spacecraft Ulysses to an orbit around the Sun after launch from the Space Shuttle. The flight vehicle has several Extravehicular Activity (EVA) contingency tasks that require crew training. This need for crew training generated the requirement for the Centaur WETF crew trainer, which is high fidelity in areas of expected crew interface. During the production of the Centaur WETF crew trainer, the need for a jumper cable from Centaur to the Orbiter was identified. This EVA contingency task would be the installation of a cable from the Orbiter cargo bay sill to various command data boxes on Centaur to allow crew control deployment should a failure occur. This task required the upgrading of volumetric boxes on the trainer to a high fidelity configuration including electrical connector installation and cable routing.

  4. Final Report: Enabling Exascale Hardware and Software Design through Scalable System Virtualization

    SciTech Connect

    Bridges, Patrick G.

    2015-02-01

    In this grant, we enhanced the Palacios virtual machine monitor to increase its scalability and suitability for addressing exascale system software design issues. This included a wide range of research on core Palacios features, large-scale system emulation, fault injection, perfomrance monitoring, and VMM extensibility. This research resulted in large number of high-impact publications in well-known venues, the support of a number of students, and the graduation of two Ph.D. students and one M.S. student. In addition, our enhanced version of the Palacios virtual machine monitor has been adopted as a core element of the Hobbes operating system under active DOE-funded research and development.

  5. Design of software and hardware components for a six-degrees of freedom optical position sensor

    SciTech Connect

    Garcia, F.N.

    1997-06-01

    This report summarizes the evaluation of a fully compatible and operational data acquisition system for a six-degrees of freedom optical sensor (SixDOF). The SixDOF, developed at Lawrence Livermore National Laboratory by Charles Vann, is capable of tracking an object`s position in all its six degrees of freedom without any datum specification by means of two reflective surfaces mounted on the object. To make the SixDOF operational and thus validate its underlying physics, a signal processing system has been designed so that information from the sensor is transferred accurately and efficiently to a computer. In addition, a six-degrees of freedom positioning stage has been built in efforts to calibrate the sensor in real time. A crucial design constraint is the necessity to build the complete data acquisition system so that it be small and most importantly portable. The prototype of the SixDOF system proved to be capable of crudely detecting changes in the position of an object in all six spatial degrees of freedom. An accuracy of around 0.5 mm is estimated presently even though the position of the two reflectors on the object is seen to significantly influence the accuracy of the sensor. The resolution of the sensor is not quite understood yet because of uncertainties in the actual spot size of the laser, however, field of the view has been seen to increase as the resolution decreases. The decoupling (calibration) of the sensor data proved to be rather successful although some coupling still exists. This coupling, however, is almost certain to come from the crudeness in the alignment of the optics within the sensor.

  6. A novel software and conceptual design of the hardware platform for intensity modulated radiation therapy

    PubMed Central

    Nguyen, Dan; Ruan, Dan; O’Connor, Daniel; Woods, Kaley; Low, Daniel A.; Boucher, Salime; Sheng, Ke

    2016-01-01

    Purpose: To deliver high quality intensity modulated radiotherapy (IMRT) using a novel generalized sparse orthogonal collimators (SOCs), the authors introduce a novel direct aperture optimization (DAO) approach based on discrete rectangular representation. Methods: A total of seven patients—two glioblastoma multiforme, three head & neck (including one with three prescription doses), and two lung—were included. 20 noncoplanar beams were selected using a column generation and pricing optimization method. The SOC is a generalized conventional orthogonal collimators with N leaves in each collimator bank, where N = 1, 2, or 4. SOC degenerates to conventional jaws when N = 1. For SOC-based IMRT, rectangular aperture optimization (RAO) was performed to optimize the fluence maps using rectangular representation, producing fluence maps that can be directly converted into a set of deliverable rectangular apertures. In order to optimize the dose distribution and minimize the number of apertures used, the overall objective was formulated to incorporate an L2 penalty reflecting the difference between the prescription and the projected doses, and an L1 sparsity regularization term to encourage a low number of nonzero rectangular basis coefficients. The optimization problem was solved using the Chambolle–Pock algorithm, a first-order primal–dual algorithm. Performance of RAO was compared to conventional two-step IMRT optimization including fluence map optimization and direct stratification for multileaf collimator (MLC) segmentation (DMS) using the same number of segments. For the RAO plans, segment travel time for SOC delivery was evaluated for the N = 1, N = 2, and N = 4 SOC designs to characterize the improvement in delivery efficiency as a function of N. Results: Comparable PTV dose homogeneity and coverage were observed between the RAO and the DMS plans. The RAO plans were slightly superior to the DMS plans in sparing critical structures. On average, the maximum and

  7. A novel software and conceptual design of the hardware platform for intensity modulated radiation therapy

    SciTech Connect

    Nguyen, Dan; Ruan, Dan; O’Connor, Daniel; Woods, Kaley; Low, Daniel A.; Sheng, Ke; Boucher, Salime

    2016-02-15

    Purpose: To deliver high quality intensity modulated radiotherapy (IMRT) using a novel generalized sparse orthogonal collimators (SOCs), the authors introduce a novel direct aperture optimization (DAO) approach based on discrete rectangular representation. Methods: A total of seven patients—two glioblastoma multiforme, three head & neck (including one with three prescription doses), and two lung—were included. 20 noncoplanar beams were selected using a column generation and pricing optimization method. The SOC is a generalized conventional orthogonal collimators with N leaves in each collimator bank, where N = 1, 2, or 4. SOC degenerates to conventional jaws when N = 1. For SOC-based IMRT, rectangular aperture optimization (RAO) was performed to optimize the fluence maps using rectangular representation, producing fluence maps that can be directly converted into a set of deliverable rectangular apertures. In order to optimize the dose distribution and minimize the number of apertures used, the overall objective was formulated to incorporate an L2 penalty reflecting the difference between the prescription and the projected doses, and an L1 sparsity regularization term to encourage a low number of nonzero rectangular basis coefficients. The optimization problem was solved using the Chambolle–Pock algorithm, a first-order primal–dual algorithm. Performance of RAO was compared to conventional two-step IMRT optimization including fluence map optimization and direct stratification for multileaf collimator (MLC) segmentation (DMS) using the same number of segments. For the RAO plans, segment travel time for SOC delivery was evaluated for the N = 1, N = 2, and N = 4 SOC designs to characterize the improvement in delivery efficiency as a function of N. Results: Comparable PTV dose homogeneity and coverage were observed between the RAO and the DMS plans. The RAO plans were slightly superior to the DMS plans in sparing critical structures. On average, the maximum and

  8. Design and implementation of coating hardware for the Hobby-Eberly Telescope wide-field corrector

    NASA Astrophysics Data System (ADS)

    Good, John; Lee, Hanshin; Hill, Gary J.; Vattiat, Brian; Perry, David; Kriel, Herman; Savage, Richard

    2014-07-01

    A major upgrade of the HET is in progress that will substantially increase the pupil size to 10 meters and the field of view to 22 arc-minutes by replacing the spherical aberration corrector. The new Wide Field Corrector is a 4-element assembly weighing 750kg and measuring 1.34 meters diameter by 2.1 meter in length. Special fixtures were required in order to support the mirrors of the Wide-Field Corrector and adapt them to the coaters chamber, during the vacuum coating process. For the 1 meter-class mirrors, the only suitable support interface was located on a 80mm wide cylindrical surface on the periphery of each mirror. The vacuum compatible system had to support the mirrors with the surface facing downward, and accommodate thermal ranges from ambient to 100C without inducing stresses in the substrate. The fixture also had to accommodate washing, as well as support of witness samples during testing and production runs, and provide masking for alignment fixtures in the center apertures of each mirror. Design principles, materials, implementation details, as well as lessons learned are covered*.

  9. Reducing NPR 7120.5D to Practice: Transitioning from Design Reviews to the SIR Hardware Review

    NASA Technical Reports Server (NTRS)

    Taylor, Randall

    2011-01-01

    The Gravity Recovery And Interior Laboratory (GRAIL) mission was the first Jet Propulsion Laboratory (JPL) project initiated under NASA's revised rules for space flight project management, NPR 7120.5D, "NASA Space Flight Program and Project Management Requirements." NASA selected GRAIL through a competitive Announcement of Opportunity process and funded its Phase B Preliminary Design effort. The team's first major milestone was a JPL institutional milestone, the Project Mission System Review (PMSR), which proved an excellent tune-up for the end-of-Phase-B NASA life-cycle review, the Preliminary Design Review (PDR). Building on JPL experience on the Prometheus and Juno projects, the team successfully organized for and conducted these reviews on an aggressive schedule. For the Project Critical Design Review (CDR), lessons learned from the PDR and updated Standing Review Board (SRB) practices from the Agency were factored into the review preparation effort. Additionally, the review was held at the Principal Investigator's institution, the Massachusetts Institute of Technology, rather than at the project management center (JPL), which necessitated additional cross-country coordination steps. The PMSR, PDR, and CDR were design reviews and largely paper-oriented. For the System Integration Review (SIR), the project needed to transition to a hardware review and deal with paper in a very different manner. While many of the practices employed for the design reviews were modified and retained (e.g., review preparation team, gate products management, pre-reviews, SRB coordination), the review agenda, presentation style, and slide templates were significantly changed. A key success factor concerned the handling of project open paper, which was succinctly and effectively communicated to the SRB in presentations.This paper provides a brief overview of the GRAIL mission and its project management challenges, provides a detailed description of project SIR preparation and execution

  10. Reducing NPR 7120.5D to Practice: Transitioning from Design Reviews to the SIR Hardware Review

    NASA Technical Reports Server (NTRS)

    Taylor, Randall

    2011-01-01

    The Gravity Recovery And Interior Laboratory (GRAIL) mission was the first Jet Propulsion Laboratory (JPL) project initiated under NASA's revised rules for space flight project management, NPR 7120.5D, "NASA Space Flight Program and Project Management Requirements." NASA selected GRAIL through a competitive Announcement of Opportunity process and funded its Phase B Preliminary Design effort. The team's first major milestone was a JPL institutional milestone, the Project Mission System Review (PMSR), which proved an excellent tune-up for the end-of-Phase-B NASA life-cycle review, the Preliminary Design Review (PDR). Building on JPL experience on the Prometheus and Juno projects, the team successfully organized for and conducted these reviews on an aggressive schedule. For the Project Critical Design Review (CDR), lessons learned from the PDR and updated Standing Review Board (SRB) practices from the Agency were factored into the review preparation effort. Additionally, the review was held at the Principal Investigator's institution, the Massachusetts Institute of Technology, rather than at the project management center (JPL), which necessitated additional cross-country coordination steps. The PMSR, PDR, and CDR were design reviews and largely paper-oriented. For the System Integration Review (SIR), the project needed to transition to a hardware review and deal with paper in a very different manner. While many of the practices employed for the design reviews were modified and retained (e.g., review preparation team, gate products management, pre-reviews, SRB coordination), the review agenda, presentation style, and slide templates were significantly changed. A key success factor concerned the handling of project open paper, which was succinctly and effectively communicated to the SRB in presentations.This paper provides a brief overview of the GRAIL mission and its project management challenges, provides a detailed description of project SIR preparation and execution

  11. Designing an Ergonomically Correct CNC Workstation on a Shoe String Budget.

    ERIC Educational Resources Information Center

    Lightner, Stan

    2001-01-01

    Describes research to design and construct ergonomically correct work stations for Computer Numerical Control machine tools. By designing ergonomically correct work stations, industrial technology teachers help protect students from repetitive motion injuries. (Contains 12 references.) (JOW)

  12. Designing an Ergonomically Correct CNC Workstation on a Shoe String Budget.

    ERIC Educational Resources Information Center

    Lightner, Stan

    2001-01-01

    Describes research to design and construct ergonomically correct work stations for Computer Numerical Control machine tools. By designing ergonomically correct work stations, industrial technology teachers help protect students from repetitive motion injuries. (Contains 12 references.) (JOW)

  13. The role of the asymptotic dynamics in the design of FPGA-based hardware implementations of gIF-type neural networks.

    PubMed

    Rostro-Gonzalez, Horacio; Cessac, Bruno; Girau, Bernard; Torres-Huitzil, Cesar

    2011-01-01

    This paper presents a numerical analysis of the role of asymptotic dynamics in the design of hardware-based implementations of the generalised integrate-and-fire (gIF) neuron models. These proposed implementations are based on extensions of the discrete-time spiking neuron model, which was introduced by Soula et al., and have been implemented on Field Programmable Gate Array (FPGA) devices using fixed-point arithmetic. Mathematical studies conducted by Cessac have evidenced the existence of three main regimes (neural death, periodic and chaotic regimes) in the activity of such neuron models. These activity regimes are characterised in hardware by considering a precision analysis in the design of an architecture for an FPGA-based implementation. The proposed approach, although based on gIF neuron models and FPGA hardware, can be extended to more complex neuron models as well as to different in silico implementations.

  14. Minicomputer Hardware Monitor Design.

    DTIC Science & Technology

    1980-06-01

    the systems for a variety of distinct reasons (i.e., long - term management planning, individual performance problems), the monitoring "formula" for...services and up to the system throughput level. It will support the generation of long term trending data bdses as well as short- term high resolution data...transfer due to data transfer interlocking. This also allows for the PP to examine and act upon the previous vector before placing it in long term storage

  15. The cell pattern correction through design-based metrology

    NASA Astrophysics Data System (ADS)

    Kim, Yonghyeon; Lee, Kweonjae; Chang, Jinman; Kim, Taeheon; Han, Daehan; Lee, Kyusun; Hong, Aeran; Kang, Jinyoung; Choi, Bumjin; Lee, Joosung; Yeom, Kyehee; Lee, Jooyoung; Hong, Hyeongsun; Lee, Kyupil; Jin, Gyoyoung

    2015-03-01

    Starting with the sub 2Xnm node, the process window becomes smaller and tighter than before. Pattern related error budget is required for accurate critical-dimension control of Cell layers. Therefore, lithography has been faced with its various difficulties, such as weird distribution, overlay error, patterning difficulty etc. The distribution of cell pattern and overlay management are the most important factors in DRAM field. We had been experiencing that the fatal risk is caused by the patterns located in the tail of the distribution. The overlay also induces the various defect sources and misalignment issues. Even though we knew that these elements are important, we could not classify the defect type of Cell patterns. Because there is no way to gather massive small pattern CD samples in cell unit block and to compare layout with cell patterns by the CD-SEM. The CD- SEM is used in order to gather these data through high resolution, but CD-SEM takes long time to inspect and extract data because it measures the small FOV. (Field Of View) However, the NGR(E-beam tool) provides high speed with large FOV and high resolution. Also, it's possible to measure an accurate overlay between the target layout and cell patterns because they provide DBM. (Design Based Metrology) By using massive measured data, we extract the result that it is persuasive by applying the various analysis techniques, as cell distribution and defects, the pattern overlay error correction etc. We introduce how to correct cell pattern, by using the DBM measurement, and new analysis methods.

  16. Correction

    NASA Astrophysics Data System (ADS)

    1995-04-01

    Seismic images of the Brooks Range, Arctic Alaska, reveal crustal-scale duplexing: Correction Geology, v. 23, p. 65 68 (January 1995) The correct Figure 4A, for the loose insert, is given here. See Figure 4A below. Corrected inserts will be available to those requesting copies of the article from the senior author, Gary S. Fuis, U.S. Geological Survey, 345 Middlefield Road, Menlo Park, CA 94025. Figure 4A. P-wave velocity model of Brooks Range region (thin gray contours) with migrated wide-angle reflections (heavy red lines) and migreated vertical-incidence reflections (short black lines) superimposed. Velocity contour interval is 0.25 km/s; 4,5, and 6 km/s contours are labeled. Estimated error in velocities is one contour interval. Symbols on faults shown at top are as in Figure 2 caption.

  17. On two new trends in evolvable hardware: employment of HDL-based structuring, and design of multi-functional circuits

    NASA Technical Reports Server (NTRS)

    Stoica, A.; Keymeulen, D.; Zebulum, R. S.; Ferguson, M. I.; Guo, X.

    2002-01-01

    This paper comments on some directions of growth for evolvable hardware, proposes research directions that address the scalability problem and gives examples of results in novel areas approached by EHW.

  18. On two new trends in evolvable hardware: employment of HDL-based structuring, and design of multi-functional circuits

    NASA Technical Reports Server (NTRS)

    Stoica, A.; Keymeulen, D.; Zebulum, R. S.; Ferguson, M. I.; Guo, X.

    2002-01-01

    This paper comments on some directions of growth for evolvable hardware, proposes research directions that address the scalability problem and gives examples of results in novel areas approached by EHW.

  19. Hardware-software-co-design of parallel and distributed systems using a behavioural programming and multi-process model with high-level synthesis

    NASA Astrophysics Data System (ADS)

    Bosse, Stefan

    2011-05-01

    A new design methodology for parallel and distributed embedded systems is presented using the behavioural hardware compiler ConPro providing an imperative programming model based on concurrently communicating sequential processes (CSP) with an extensive set of interprocess-communication primitives and guarded atomic actions. The programming language and the compiler-based synthesis process enables the design of constrained power- and resourceaware embedded systems with pure Register-Transfer-Logic (RTL) efficiently mapped to FPGA and ASIC technologies. Concurrency is modelled explicitly on control- and datapath level. Additionally, concurrency on data-path level can be automatically explored and optimized by different schedulers. The CSP programming model can be synthesized to hardware (SoC) and software (C,ML) models and targets. A common source for both hardware and software implementation with identical functional behaviour is used. Processes and objects of the entire design can be distributed on different hardware and software platforms, for example, several FPGA components and software executed on several microprocessors, providing a parallel and distributed system. Intersystem-, interprocess-, and object communication is automatically implemented with serial links, not visible on programming level. The presented design methodology has the benefit of high modularity, freedom of choice of target technologies, and system architecture. Algorithms can be well matched to and distributed on different suitable execution platforms and implementation technologies, using a unique programming model, providing a balance of concurrency and resource complexity. An extended case study of a communication protocol used in high-density sensor-actuator networks should demonstrate and compare the design of a hardware and software target. The communication protocol is suited for high-density intra-and interchip networks.

  20. NASA HUNCH Hardware

    NASA Technical Reports Server (NTRS)

    Hall, Nancy R.; Wagner, James; Phelps, Amanda

    2014-01-01

    What is NASA HUNCH? High School Students United with NASA to Create Hardware-HUNCH is an instructional partnership between NASA and educational institutions. This partnership benefits both NASA and students. NASA receives cost-effective hardware and soft goods, while students receive real-world hands-on experiences. The 2014-2015 was the 12th year of the HUNCH Program. NASA Glenn Research Center joined the program that already included the NASA Johnson Space Flight Center, Marshall Space Flight Center, Langley Research Center and Goddard Space Flight Center. The program included 76 schools in 24 states and NASA Glenn worked with the following five schools in the HUNCH Build to Print Hardware Program: Medina Career Center, Medina, OH; Cattaraugus Allegheny-BOCES, Olean, NY; Orleans Niagara-BOCES, Medina, NY; Apollo Career Center, Lima, OH; Romeo Engineering and Tech Center, Washington, MI. The schools built various parts of an International Space Station (ISS) middeck stowage locker and learned about manufacturing process and how best to build these components to NASA specifications. For the 2015-2016 school year the schools will be part of a larger group of schools building flight hardware consisting of 20 ISS middeck stowage lockers for the ISS Program. The HUNCH Program consists of: Build to Print Hardware; Build to Print Soft Goods; Design and Prototyping; Culinary Challenge; Implementation: Web Page and Video Production.

  1. Corrections.

    PubMed

    2015-07-01

    Lai Y-S, Biedermann P, Ekpo UF, et al. Spatial distribution of schistosomiasis and treatment needs in sub-Saharan Africa: a systematic review and geostatistical analysis. Lancet Infect Dis 2015; published online May 22. http://dx.doi.org/10.1016/S1473-3099(15)00066-3—Figure 1 of this Article should have contained a box stating ‘100 references added’ with an arrow pointing inwards, rather than a box stating ‘199 records excluded’, and an asterisk should have been added after ‘1473 records extracted into GNTD’. Additionally, the positioning of the ‘§ and ‘†’ footnotes has been corrected in table 1. These corrections have been made to the online version as of June 4, 2015.

  2. Correction.

    PubMed

    2016-02-01

    In the article by Guessous et al (Guessous I, Pruijm M, Ponte B, Ackermann D, Ehret G, Ansermot N, Vuistiner P, Staessen J, Gu Y, Paccaud F, Mohaupt M, Vogt B, Pechère-Bertschi A, Martin PY, Burnier M, Eap CB, Bochud M. Associations of ambulatory blood pressure with urinary caffeine and caffeine metabolite excretions. Hypertension. 2015;65:691–696. doi: 10.1161/HYPERTENSIONAHA.114.04512), which published online ahead of print December 8, 2014, and appeared in the March 2015 issue of the journal, a correction was needed.One of the author surnames was misspelled. Antoinette Pechère-Berstchi has been corrected to read Antoinette Pechère-Bertschi.The authors apologize for this error.

  3. One Shot to an Asteroid- MASCOT and the Design of an Exclusively Primary Battery Powered Small Spacecraft in Hardware Design Examples and Operations Considerations

    NASA Astrophysics Data System (ADS)

    Grundmann, Jan Thimo; Biele, Jens; Findlay, Ross; Fredon, Stephane; Ho, Tra-Mi; Krause, Christian; Ulamec, Stephan; Ziach, Christian

    2014-08-01

    The Mobile Asteroid Surface Scout, MASCOT, is a small, 11 kg mobile asteroid lander for the Japanese space probe HAYABUSA-2. It carries four science instruments, a redundant command chain, and a mobility mechanism. On-asteroid power is provided by a Li-SOCl2 primary battery, interplanetary cruise power and thermal control by umbilical connection. The power subsystem manages the activation of MASCOT. It uses a mixed configuration of isolated and non-isolated, redundant and non-redundant supply lines to stay within tight system constraints. Due to the short project timeline, extensive and early testing of integrated hardware was used, often combining off-the-shelf available designs and units of different maturity levels. An overview, progress and lessons learned are shown.

  4. Satellite Communication Hardware Emulation System (SCHES)

    NASA Technical Reports Server (NTRS)

    Kaplan, Ted

    1993-01-01

    Satellite Communication Hardware Emulator System (SCHES) is a powerful simulator that emulates the hardware used in TDRSS links. SCHES is a true bit-by-bit simulator that models communications hardware accurately enough to be used as a verification mechanism for actual hardware tests on user spacecraft. As a credit to its modular design, SCHES is easily configurable to model any user satellite communication link, though some development may be required to tailor existing software to user specific hardware.

  5. A novel visual hardware behavioral language

    NASA Technical Reports Server (NTRS)

    Li, Xueqin; Cheng, H. D.

    1992-01-01

    Most hardware behavioral languages just use texts to describe the behavior of the desired hardware design. This is inconvenient for VLSI designers who enjoy using the schematic approach. The proposed visual hardware behavioral language has the ability to graphically express design information using visual parallel models (blocks), visual sequential models (processes) and visual data flow graphs (which consist of primitive operational icons, control icons, and Data and Synchro links). Thus, the proposed visual hardware behavioral language can not only specify hardware concurrent and sequential functionality, but can also visually expose parallelism, sequentiality, and disjointness (mutually exclusive operations) for the hardware designers. That would make the hardware designers capture the design ideas easily and explicitly using this visual hardware behavioral language.

  6. Hardware Device Simulation Framework in the ALMA Control Subsystem

    NASA Astrophysics Data System (ADS)

    Mora, M.; Reyes, C.; Ibsen, J.; Kern, J.; Juerges, T.; Farris, A.; Araya, R.; Troncoso, N.; González, V.

    2009-09-01

    Hardware device simulation development is a fundamental task which has to be addressed when writing control software. Simulations are used to decouple the software from the hardware layer, and provide a powerful tool to ensure the correct functionality of a control system before integrating real devices. This paper presents the design of the ALMA hardware device simulation framework as part of the Control subsystem. This framework provides basic code generation, allows simulation of devices through an external process connected to a real-time FIFO (as the real hardware), and provides an alternative, direct and more flexible simulation. This has simplified development and testing as developers can now focus on the non-trivial aspects of a simulation.

  7. Correction

    NASA Astrophysics Data System (ADS)

    1998-12-01

    Alleged mosasaur bite marks on Late Cretaceous ammonites are limpet (patellogastropod) home scars Geology, v. 26, p. 947 950 (October 1998) This article had the following printing errors: p. 947, Abstract, line 11, “sepia” should be “septa” p. 947, 1st paragraph under Introduction, line 2, “creep” should be “deep” p. 948, column 1, 2nd paragraph, line 7, “creep” should be “deep” p. 949, column 1, 1st paragraph, line 1, “creep” should be “deep” p. 949, column 1, 1st paragraph, line 5, “19774” should be “1977)” p. 949, column 1, 4th paragraph, line 7, “in particular” should be “In particular” CORRECTION Mammalian community response to the latest Paleocene thermal maximum: An isotaphonomic study in the northern Bighorn Basin, Wyoming Geology, v. 26, p. 1011 1014 (November 1998) An error appeared in the References Cited. The correct reference appears below: Fricke, H. C., Clyde, W. C., O'Neil, J. R., and Gingerich, P. D., 1998, Evidence for rapid climate change in North America during the latest Paleocene thermal maximum: Oxygen isotope compositions of biogenic phosphate from the Bighorn Basin (Wyoming): Earth and Planetary Science Letters, v. 160, p. 193 208.

  8. Design of a Single Channel Modulated Wideband Converter for Wideband Spectrum Sensing: Theory, Architecture and Hardware Implementation.

    PubMed

    Liu, Weisong; Huang, Zhitao; Wang, Xiang; Sun, Weichao

    2017-05-04

    In a cognitive radio sensor network (CRSN), wideband spectrum sensing devices which aims to effectively exploit temporarily vacant spectrum intervals as soon as possible are of great importance. However, the challenge of increasingly high signal frequency and wide bandwidth requires an extremely high sampling rate which may exceed today's best analog-to-digital converters (ADCs) front-end bandwidth. Recently, the newly proposed architecture called modulated wideband converter (MWC), is an attractive analog compressed sensing technique that can highly reduce the sampling rate. However, the MWC has high hardware complexity owing to its parallel channel structure especially when the number of signals increases. In this paper, we propose a single channel modulated wideband converter (SCMWC) scheme for spectrum sensing of band-limited wide-sense stationary (WSS) signals. With one antenna or sensor, this scheme can save not only sampling rate but also hardware complexity. We then present a new, SCMWC based, single node CR prototype System, on which the spectrum sensing algorithm was tested. Experiments on our hardware prototype show that the proposed architecture leads to successful spectrum sensing. And the total sampling rate as well as hardware size is only one channel's consumption of MWC.

  9. Design of a Single Channel Modulated Wideband Converter for Wideband Spectrum Sensing: Theory, Architecture and Hardware Implementation

    PubMed Central

    Liu, Weisong; Huang, Zhitao; Wang, Xiang; Sun, Weichao

    2017-01-01

    In a cognitive radio sensor network (CRSN), wideband spectrum sensing devices which aims to effectively exploit temporarily vacant spectrum intervals as soon as possible are of great importance. However, the challenge of increasingly high signal frequency and wide bandwidth requires an extremely high sampling rate which may exceed today’s best analog-to-digital converters (ADCs) front-end bandwidth. Recently, the newly proposed architecture called modulated wideband converter (MWC), is an attractive analog compressed sensing technique that can highly reduce the sampling rate. However, the MWC has high hardware complexity owing to its parallel channel structure especially when the number of signals increases. In this paper, we propose a single channel modulated wideband converter (SCMWC) scheme for spectrum sensing of band-limited wide-sense stationary (WSS) signals. With one antenna or sensor, this scheme can save not only sampling rate but also hardware complexity. We then present a new, SCMWC based, single node CR prototype System, on which the spectrum sensing algorithm was tested. Experiments on our hardware prototype show that the proposed architecture leads to successful spectrum sensing. And the total sampling rate as well as hardware size is only one channel’s consumption of MWC. PMID:28471410

  10. Design of a pseudo-log image transform hardware accelerator in a high-level synthesis-based memory management framework

    NASA Astrophysics Data System (ADS)

    Butt, Shahzad Ahmad; Mancini, Stéphane; Rousseau, Frédéric; Lavagno, Luciano

    2014-09-01

    The pseudo-log image transform belongs to a class of image processing kernels that generate memory references which are nonlinear functions of loop indices. Due to the nonlinearity of the memory references, the usual design methodologies do not allow efficient hardware implementation for nonlinear kernels. For optimized hardware implementation, these kernels require the creation of a customized memory hierarchy and efficient data/memory management strategy. We present the design and real-time hardware implementation of a pseudo-log image transform IP (hardware image processing engine) using a memory management framework. The framework generates a controller which efficiently manages input data movement in the form of tiles between off-chip main memory, on-chip memory, and the core processing unit. The framework can jointly optimize the memory hierarchy and the tile computation schedule to reduce on-chip memory requirements, to maximize throughput, and to increase data reuse for reducing off-chip memory bandwidth requirements. The algorithmic C++ description of the pseudo-log kernel is profiled in the framework to generate an enhanced description with a customized memory hierarchy. The enhanced description of the kernel is then used for high-level synthesis (HLS) to perform architectural design space exploration in order to find an optimal implementation under given performance constraints. The optimized register transfer level implementation of the IP generated after HLS is used for performance estimation. The performance estimation is done in a simulation framework to characterize the IP with different external off-chip memory latencies and a variety of data transfer policies. Experimental results show that the designed IP can be used for real-time implementation and that the generated memory hierarchy is capable of feeding the IP with a sufficiently high bandwidth even in the presence of long external memory latencies.

  11. New Designs for Correctional Education and Training Programs.

    ERIC Educational Resources Information Center

    McCollum, Sylvia G.

    1973-01-01

    The challenge confronting creative educators concerned with using the correctional experience in positive ways is to structure an educational delivery system which takes into account the wide range of individual differences among people whose only common denominator is "serving time." Inherent is the problem of staff and public resistance to…

  12. 78 FR 32988 - Core Principles and Other Requirements for Designated Contract Markets; Correction

    Federal Register 2010, 2011, 2012, 2013, 2014

    2013-06-03

    ... Markets; Correction AGENCY: Commodity Futures Trading Commission. ACTION: Final rule; correction. SUMMARY... Other Requirements for Designated Contract Markets by inserting a missing instruction to add Appendix C... and Other Requirements for Designated Contract Markets (77 FR 36612, June 19, 2012). The final rule...

  13. Sterilization of space hardware.

    NASA Technical Reports Server (NTRS)

    Pflug, I. J.

    1971-01-01

    Discussion of various techniques of sterilization of space flight hardware using either destructive heating or the action of chemicals. Factors considered in the dry-heat destruction of microorganisms include the effects of microbial water content, temperature, the physicochemical properties of the microorganism and adjacent support, and nature of the surrounding gas atmosphere. Dry-heat destruction rates of microorganisms on the surface, between mated surface areas, or buried in the solid material of space vehicle hardware are reviewed, along with alternative dry-heat sterilization cycles, thermodynamic considerations, and considerations of final sterilization-process design. Discussed sterilization chemicals include ethylene oxide, formaldehyde, methyl bromide, dimethyl sulfoxide, peracetic acid, and beta-propiolactone.

  14. Sterilization of space hardware.

    NASA Technical Reports Server (NTRS)

    Pflug, I. J.

    1971-01-01

    Discussion of various techniques of sterilization of space flight hardware using either destructive heating or the action of chemicals. Factors considered in the dry-heat destruction of microorganisms include the effects of microbial water content, temperature, the physicochemical properties of the microorganism and adjacent support, and nature of the surrounding gas atmosphere. Dry-heat destruction rates of microorganisms on the surface, between mated surface areas, or buried in the solid material of space vehicle hardware are reviewed, along with alternative dry-heat sterilization cycles, thermodynamic considerations, and considerations of final sterilization-process design. Discussed sterilization chemicals include ethylene oxide, formaldehyde, methyl bromide, dimethyl sulfoxide, peracetic acid, and beta-propiolactone.

  15. Hardware Accelerated Simulated Radiography

    SciTech Connect

    Laney, D; Callahan, S; Max, N; Silva, C; Langer, S; Frank, R

    2005-04-12

    We present the application of hardware accelerated volume rendering algorithms to the simulation of radiographs as an aid to scientists designing experiments, validating simulation codes, and understanding experimental data. The techniques presented take advantage of 32 bit floating point texture capabilities to obtain validated solutions to the radiative transport equation for X-rays. An unsorted hexahedron projection algorithm is presented for curvilinear hexahedra that produces simulated radiographs in the absorption-only regime. A sorted tetrahedral projection algorithm is presented that simulates radiographs of emissive materials. We apply the tetrahedral projection algorithm to the simulation of experimental diagnostics for inertial confinement fusion experiments on a laser at the University of Rochester. We show that the hardware accelerated solution is faster than the current technique used by scientists.

  16. Door Hardware and Installations; Carpentry: 901894.

    ERIC Educational Resources Information Center

    Dade County Public Schools, Miami, FL.

    The curriculum guide outlines a course designed to provide instruction in the selection, preparation, and installation of hardware for door assemblies. The course is divided into five blocks of instruction (introduction to doors and hardware, door hardware, exterior doors and jambs, interior doors and jambs, and a quinmester post-test) totaling…

  17. 75 FR 38129 - Freescale Semiconductor, Inc., Hardware/Software Design and Manufacturing A Including On-Site...

    Federal Register 2010, 2011, 2012, 2013, 2014

    2010-07-01

    ... Design, Design Solutions, Inc., Veriseo, SiliconElite and MicroLogic, Inc., Austin, TX; Amended..., GDA Technologies, Inc., Manpower, Ion Design, Design Solutions, Inc., Veriseo, SilconElite and Micro... Technologies, Inc., Manpower, Ion Design, Design Solutions, Inc., Veriseo, SiliconElite and MicroLogic,...

  18. The use of real-time, hardware-in-the-loop simulation in the design and development of the new Hughes HS601 spacecraft attitude control system

    NASA Technical Reports Server (NTRS)

    Slafer, Loren I.

    1989-01-01

    Realtime simulation and hardware-in-the-loop testing is being used extensively in all phases of the design, development, and testing of the attitude control system (ACS) for the new Hughes HS601 satellite bus. Realtime, hardware-in-the-loop simulation, integrated with traditional analysis and pure simulation activities is shown to provide a highly efficient and productive overall development program. Implementation of high fidelity simulations of the satellite dynamics and control system algorithms, capable of real-time execution (using applied Dynamics International's System 100), provides a tool which is capable of being integrated with the critical flight microprocessor to create a mixed simulation test (MST). The MST creates a highly accurate, detailed simulated on-orbit test environment, capable of open and closed loop ACS testing, in which the ACS design can be validated. The MST is shown to provide a valuable extension of traditional test methods. A description of the MST configuration is presented, including the spacecraft dynamics simulation model, sensor and actuator emulators, and the test support system. Overall system performance parameters are presented. MST applications are discussed; supporting ACS design, developing on-orbit system performance predictions, flight software development and qualification testing (augmenting the traditional software-based testing), mission planning, and a cost-effective subsystem-level acceptance test. The MST is shown to provide an ideal tool in which the ACS designer can fly the spacecraft on the ground.

  19. Coding design for error correcting output codes based on perceptron

    NASA Astrophysics Data System (ADS)

    Zhou, Jin-Deng; Wang, Xiao-Dan; Zhou, Hong-Jian; Cui, Yong-Hua; Jing, Sun

    2012-05-01

    It is known that error-correcting output codes (ECOC) is a common way to model multiclass classification problems, in which the research of encoding based on data is attracting more and more attention. We propose a method for learning ECOC with the help of a single-layered perception neural network. To achieve this goal, the code elements of ECOC are mapped to the weights of network for the given decoding strategy, and an object function with the constrained weights is used as a cost function of network. After the training, we can obtain a coding matrix including lots of subgroups of class. Experimental results on artificial data and University of California Irvine with logistic linear classifier and support vector machine as the binary learner show that our scheme provides better performance of classification with shorter length of coding matrix than other state-of-the-art encoding strategies.

  20. Factors Influencing the Design, Establishment, Administration, and Governance of Correctional Education for Females

    ERIC Educational Resources Information Center

    Ellis, Johnica; McFadden, Cheryl; Colaric, Susan

    2008-01-01

    This article summarizes the results of a study conducted to investigate factors influencing the organizational design, establishment, administration, and governance of correctional education for females. The research involved interviews with correctional and community college administrators and practitioners representing North Carolina female…

  1. System Design for Detection and Correction of Spelling Errors in Scientific and Scholarly Text.

    ERIC Educational Resources Information Center

    Pollock, Joseph J.; Zamora, Antonio

    1984-01-01

    Describes system design proposed by the Spelling Error Detection Correction Project (SPEEDCOP) at Chemical Abstracts Service. Highlights include principles of detection/correction system; spelling error detection (the dictionary, suffix normalization, bypassing specialized word classes, document-level frequency threshold); spelling error…

  2. System Design for Detection and Correction of Spelling Errors in Scientific and Scholarly Text.

    ERIC Educational Resources Information Center

    Pollock, Joseph J.; Zamora, Antonio

    1984-01-01

    Describes system design proposed by the Spelling Error Detection Correction Project (SPEEDCOP) at Chemical Abstracts Service. Highlights include principles of detection/correction system; spelling error detection (the dictionary, suffix normalization, bypassing specialized word classes, document-level frequency threshold); spelling error…

  3. Factors Influencing the Design, Establishment, Administration, and Governance of Correctional Education for Females

    ERIC Educational Resources Information Center

    Ellis, Johnica; McFadden, Cheryl; Colaric, Susan

    2008-01-01

    This article summarizes the results of a study conducted to investigate factors influencing the organizational design, establishment, administration, and governance of correctional education for females. The research involved interviews with correctional and community college administrators and practitioners representing North Carolina female…

  4. 77 FR 16661 - Tuberculosis in Cattle and Bison; State and Zone Designations; NM; Correction

    Federal Register 2010, 2011, 2012, 2013, 2014

    2012-03-22

    ... Inspection Service 9 CFR Part 77 Tuberculosis in Cattle and Bison; State and Zone Designations; NM... document corrects that error. List of Subjects in 9 CFR Part 77 Animal diseases, Bison, Cattle, Reporting...

  5. Hardware Review: What Hardware Should We Buy?

    ERIC Educational Resources Information Center

    Tinker, Robert

    1984-01-01

    Discusses trends and changes in hardware production. For example Sinclair/Timex has stopped mass marketing its computers while others (such as the IBM junior) has finally made its appearance. Strongly advises schools to re-evaluate their hardware purchasing programs in light of these and other changes. (JN)

  6. Convolution kernel design and efficient algorithm for sampling density correction.

    PubMed

    Johnson, Kenneth O; Pipe, James G

    2009-02-01

    Sampling density compensation is an important step in non-cartesian image reconstruction. One of the common techniques to determine weights that compensate for differences in sampling density involves a convolution. A new convolution kernel is designed for sampling density attempting to minimize the error in a fully reconstructed image. The resulting weights obtained using this new kernel are compared with various previous methods, showing a reduction in reconstruction error. A computationally efficient algorithm is also presented that facilitates the calculation of the convolution of finite kernels. Both the kernel and the algorithm are extended to 3D. Copyright 2009 Wiley-Liss, Inc.

  7. Imaging of current spinal hardware: lumbar spine.

    PubMed

    Ha, Alice S; Petscavage-Thomas, Jonelle M

    2014-09-01

    The purposes of this article are to review the indications for and the materials and designs of hardware more commonly used in the lumbar spine; to discuss alternatives for each of the types of hardware; to review normal postoperative imaging findings; to describe the appropriateness of different imaging modalities for postoperative evaluation; and to show examples of hardware complications. Stabilization and fusion of the lumbar spine with intervertebral disk replacement, artificial ligaments, spinous process distraction devices, plate-and-rod systems, dynamic posterior fusion devices, and newer types of material incorporation are increasingly more common in contemporary surgical practice. These spinal hardware devices will be seen more often in radiology practice. Successful postoperative radiologic evaluation of this spinal hardware necessitates an understanding of fundamental hardware design, physiologic objectives, normal postoperative imaging appearances, and unique complications. Radiologists may have little training and experience with the new and modified types of hardware used in the lumbar spine.

  8. The Space Operations Simulation Center (SOSC) and Closed-loop Hardware Testing for Orion Rendezvous System Design

    NASA Technical Reports Server (NTRS)

    D'Souza, Christopher; Milenkovich, Zoran; Wilson, Zachary; Huich, David; Bendle, John; Kibler, Angela

    2011-01-01

    The Space Operations Simulation Center (SOSC) at the Lockheed Martin (LM) Waterton Campus in Littleton, Colorado is a dynamic test environment focused on Autonomous Rendezvous and Docking (AR&D) development testing and risk reduction activities. The SOSC supports multiple program pursuits and accommodates testing Guidance, Navigation, and Control (GN&C) algorithms for relative navigation, hardware testing and characterization, as well as software and test process development. The SOSC consists of a high bay (60 meters long by 15.2 meters wide by 15.2 meters tall) with dual six degree-of-freedom (6DOF) motion simulators and a single fixed base 6DOF robot. The large testing area (maximum sensor-to-target effective range of 60 meters) allows for large-scale, flight-like simulations of proximity maneuvers and docking events. The facility also has two apertures for access to external extended-range outdoor target test operations. In addition, the facility contains four Mission Operations Centers (MOCs) with connectivity to dual high bay control rooms and a data/video interface room. The high bay is rated at Class 300,000 (. 0.5 m maximum particles/m3) cleanliness and includes orbital lighting simulation capabilities.

  9. The telescope control of the ASTRI SST-2M prototype for the Cherenkov telescope Array: hardware and software design architecture

    NASA Astrophysics Data System (ADS)

    Antolini, Elisa; Cascone, Enrico; Schwarz, Joseph; Stringhetti, Luca; Tanci, Claudio; Tosti, Gino; Aisa, Damiano; Aisa, Simone; Bagaglia, Marco; Busatta, Andrea; Campeggi, Carlo; Cefala, Marco; Farnesini, Lucio; Giacomel, Stefano; Marchiori, Gianpiero; Marcuzzi, Enrico; Nucciarelli, Giuliano; Piluso, Antonfranco

    2014-07-01

    ASTRI (Astrofisica con Specchi a Tecnologia Replicante Italiana) is a flagship project of the Italian Ministry of Research and led by the Italian National Institute of Astrophysics (INAF). One of its aims is to develop, within the Cherenkov Telescope Array (CTA) framework, an end-to-end small-sized telescope prototype in a dual-mirror configuration (SST-2M) in order to investigate the energy range E ~ 1-100 TeV. A long-term goal of the ASTRI program is the production of an ASTRI/CTA mini-array composed of seven SST-2M telescopes. The prototype, named ASTRI SST-2M, is seen as a standalone system that needs only network and power connections to work. The software system that is being developed to control the prototype is the base for the Mini-Array Software System (MASS), which has the task to make possible the operation of both the ASTRI SST-2M prototype and the ASTRI/CTA mini-array. The scope of this contribution is to give an overview of the hardware and software architecture adopted for the ASTRI SST- 2M prototype, showing how to apply state of the art industrial technologies to telescope control and monitoring systems.

  10. Energy efficient engine: Turbine intermediate case and low-pressure turbine component test hardware detailed design report

    NASA Technical Reports Server (NTRS)

    Leach, K.; Thulin, R. D.; Howe, D. C.

    1982-01-01

    A four stage, low pressure turbine component has been designed to power the fan and low pressure compressor system in the Energy Efficient Engine. Designs for a turbine intermediate case and an exit guide vane assembly also have been established. The components incorporate numerous technology features to enhance efficiency, durability, and performance retention. These designs reflect a positive step towards improving engine fuel efficiency on a component level. The aerodynamic and thermal/mechanical designs of the intermediate case and low pressure turbine components are presented and described. An overview of the predicted performance of the various component designs is given.

  11. Constructing Hardware in a Scale Embedded Language

    SciTech Connect

    Bachan, John

    2014-08-21

    Chisel is a new open-source hardware construction language developed at UC Berkeley that supports advanced hardware design using highly parameterized generators and layered domain-specific hardware languages. Chisel is embedded in the Scala programming language, which raises the level of hardware design abstraction by providing concepts including object orientation, functional programming, parameterized types, and type inference. From the same source, Chisel can generate a high-speed C++-based cycle-accurate software simulator, or low-level Verilog designed to pass on to standard ASIC or FPGA tools for synthesis and place and route.

  12. Constructing Hardware in a Scale Embedded Language

    SciTech Connect

    Bachan, John

    2014-08-21

    Chisel is a new open-source hardware construction language developed at UC Berkeley that supports advanced hardware design using highly parameterized generators and layered domain-specific hardware languages. Chisel is embedded in the Scala programming language, which raises the level of hardware design abstraction by providing concepts including object orientation, functional programming, parameterized types, and type inference. From the same source, Chisel can generate a high-speed C++-based cycle-accurate software simulator, or low-level Verilog designed to pass on to standard ASIC or FPGA tools for synthesis and place and route.

  13. Open-source hardware for medical devices.

    PubMed

    Niezen, Gerrit; Eslambolchilar, Parisa; Thimbleby, Harold

    2016-04-01

    Open-source hardware is hardware whose design is made publicly available so anyone can study, modify, distribute, make and sell the design or the hardware based on that design. Some open-source hardware projects can potentially be used as active medical devices. The open-source approach offers a unique combination of advantages, including reducing costs and faster innovation. This article compares 10 of open-source healthcare projects in terms of how easy it is to obtain the required components and build the device.

  14. Open-source hardware for medical devices

    PubMed Central

    2016-01-01

    Open-source hardware is hardware whose design is made publicly available so anyone can study, modify, distribute, make and sell the design or the hardware based on that design. Some open-source hardware projects can potentially be used as active medical devices. The open-source approach offers a unique combination of advantages, including reducing costs and faster innovation. This article compares 10 of open-source healthcare projects in terms of how easy it is to obtain the required components and build the device. PMID:27158528

  15. Growth and development of Arabidopsis in the Advanced Biological Research System (ABRS) hardware designed for the International Space Station

    NASA Astrophysics Data System (ADS)

    Savidge, Rodney

    Wild type (Col 0) Arabidopsis thaliana were grown in a growth chamber within the single mid-deck sized Advanced Biological Research System (ABRS) spaceflight hardware developed by NASA Kennedy Space Center. Before beginning this experiment, the plants, each rooted in individual transferable tubes containing nutrients, were cultivated hydroponically on halfstrength Hoagland's solution beneath either LED lighting similar to that provided by the ABRS growth chamber or white fluorescent lighting. The leaves of the basal whorl of plants pre-grown in ABRS lighting were small and purplish at the start of the experiment, whereas those under fluorescent lighting were larger and green. The plants were transferred to the ABRS soon after their inflorescence axes had started to elongate, and thereafter they were maintained under preset conditions (22 o C, approximately 1500 ppm CO2 , predominantly 125 µmol m-2 s-1 PAR) with pulses of water provided at 1-3 d intervals (as needed) to the module into which the root tubes were inserted. That module was pre-treated with half-strength Hoagland's nutrient solution on day 0, but no additional nutrients were provided the plants thereafter. Strong primary growth of all inflorescence stems occurred soon after initiating the ABRS experiment, and the plants began forming an overarching canopy of flowering stems beneath the LED lighting module within two weeks. After 38 days the root module was littered with seeds, siliques and abscised leaves, but all plants remained alive. Plants pre-grown in ABRS lighting were more advanced toward senescence, and leaves and stems of plants pre-grown in fluorescent lighting although greener were also acquiring a purplish hue. Microscopy revealed that the flowering stems achieved no secondary growth; however, progressive inward conversion of pith parenchyma into sclerenchyma cells did occur resulting in the inflorescence stems becoming abnormally woody.

  16. Application of acoustic surface wave filter-beam lead component technology to deep space multimission hardware design

    NASA Technical Reports Server (NTRS)

    Kermode, A. W.; Boreham, J. F.

    1974-01-01

    This paper discusses the utilization of acoustic surface wave filters, beam lead components, and thin film metallized ceramic substrate technology as applied to the design of deep space, long-life, multimission transponder. The specific design to be presented is for a second mixer local oscillator module, operating at frequencies as high as 249 MHz.

  17. The design and use of an error correction information system for NASTRAN

    NASA Technical Reports Server (NTRS)

    Rosser, D. C., Jr.

    1974-01-01

    Error Correction Information System (ECIS) is a system for a two-way transmittal of NASTRAN maintenance information via a data base stored on a nationwide accessible computer. ECIS consists of two data bases. The first data base is used for comments, reporting NASTRAN Software Problem Reports (SPR's) and bookkeeping information which can be updated by the user or the NASTRAN Office. The second data base is used by the NSMO to store all SPR information and updates. The hardware needed by an accessing user is any desktop computer terminal and a telephone to communicate with the central computer. The instruction format is an engineering oriented language and requires less than an hour to obtain a working knowledge of its functions.

  18. A Modular Approach to Arithmetic and Logic Unit Design on a Reconfigurable Hardware Platform for Educational Purpose

    NASA Astrophysics Data System (ADS)

    Oztekin, Halit; Temurtas, Feyzullah; Gulbag, Ali

    The Arithmetic and Logic Unit (ALU) design is one of the important topics in Computer Architecture and Organization course in Computer and Electrical Engineering departments. There are ALU designs that have non-modular nature to be used as an educational tool. As the programmable logic technology has developed rapidly, it is feasible that ALU design based on Field Programmable Gate Array (FPGA) is implemented in this course. In this paper, we have adopted the modular approach to ALU design based on FPGA. All the modules in the ALU design are realized using schematic structure on Altera's Cyclone II Development board. Under this model, the ALU content is divided into four distinct modules. These are arithmetic unit except for multiplication and division operations, logic unit, multiplication unit and division unit. User can easily design any size of ALU unit since this approach has the modular nature. Then, this approach was applied to microcomputer architecture design named BZK.SAU.FPGA10.0 instead of the current ALU unit.

  19. 78 FR 15755 - Proposed Revision to Design of Structures, Components, Equipment and Systems; Correction

    Federal Register 2010, 2011, 2012, 2013, 2014

    2013-03-12

    ... COMMISSION Proposed Revision to Design of Structures, Components, Equipment and Systems; Correction AGENCY... Chapter 3, ``Design of Structures, Components, Equipment, and Systems'' and is soliciting public comment on NUREG-0800, ``Standard Review Plan for the Review of Safety Analysis Reports for Nuclear Power...

  20. 75 FR 67166 - Designation of Two Individuals Pursuant to Executive Order 13224; Correction

    Federal Register 2010, 2011, 2012, 2013, 2014

    2010-11-01

    ... Office of Foreign Assets Control Designation of Two Individuals Pursuant to Executive Order 13224... designation of two individuals pursuant to Executive Order 13224 of September 23, 2001, ``Blocking Property....gov/ofac ) or via facsimile through a 24-hour fax-on-demand service, tel.: 202/622-0077. Correction In...

  1. Aspherical surfaces design for extreme ultraviolet lithographic objective with correction of thermal aberration

    NASA Astrophysics Data System (ADS)

    Liu, Yan; Li, Yanqiu

    2016-09-01

    At present, few projection objectives for extreme ultraviolet (EUV) lithography pay attention to correct thermal aberration in optical design phase, which would lead to poor image quality in a practical working environment. We present an aspherical modification method for helping the EUV lithographic objective additionally correct the thermal aberration. Based on the thermal aberration and deformation predicted by integrated optomechanical analysis, the aspherical surfaces in an objective are modified by an iterative algorithm. The modified aspherical surfaces could correct the thermal aberration and maintain the initial high image quality in a practical working environment. A six-mirror EUV lithographic objective with 0.33-numerical aperture is taken as an example to illustrate the presented method. The results show that the thermal aberration can be corrected effectively, and the image quality of the thermally deformed system is improved to the initial design level, which proves the availability of the method.

  2. Modular hardware synthesis using an HDL. [Hardware Description Language

    NASA Technical Reports Server (NTRS)

    Covington, J. A.; Shiva, S. G.

    1981-01-01

    Although hardware description languages (HDL) are becoming more and more necessary to automated design systems, their application is complicated due to the difficulty in translating the HDL description into an implementable format, nonfamiliarity of hardware designers with high-level language programming, nonuniform design methodologies and the time and costs involved in transfering HDL design software. Digital design language (DDL) suffers from all of the above problems and in addition can only by synthesized on a complete system and not on its subparts, making it unsuitable for synthesis using standard modules or prefabricated chips such as those required in LSI or VLSI circuits. The present paper presents a method by which the DDL translator can be made to generate modular equations that will allow the system to be synthesized as an interconnection of lower-level modules. The method involves the introduction of a new language construct called a Module which provides for the separate translation of all equations bounded by it.

  3. Modular hardware synthesis using an HDL. [Hardware Description Language

    NASA Technical Reports Server (NTRS)

    Covington, J. A.; Shiva, S. G.

    1981-01-01

    Although hardware description languages (HDL) are becoming more and more necessary to automated design systems, their application is complicated due to the difficulty in translating the HDL description into an implementable format, nonfamiliarity of hardware designers with high-level language programming, nonuniform design methodologies and the time and costs involved in transfering HDL design software. Digital design language (DDL) suffers from all of the above problems and in addition can only by synthesized on a complete system and not on its subparts, making it unsuitable for synthesis using standard modules or prefabricated chips such as those required in LSI or VLSI circuits. The present paper presents a method by which the DDL translator can be made to generate modular equations that will allow the system to be synthesized as an interconnection of lower-level modules. The method involves the introduction of a new language construct called a Module which provides for the separate translation of all equations bounded by it.

  4. CLASSICAL AREAS OF PHENOMENOLOGY: Conformal optical design with combination of static and dynamic aberration corrections

    NASA Astrophysics Data System (ADS)

    Li, Yan; Li, Lin; Huang, Yi-Fan; Liu, Jia-Guo

    2009-02-01

    Conformal domes that are shaped to meet aerodynamic requirements can increase range and speed for the host platform. Because these domes typically deviate greatly from spherical surface descriptions, a variety of aberrations are induced which vary with the field-of-regard (FOR) angle. A system for correcting optical aberrations created by a conformal dome has an outer surface and an inner surface. Optimizing the inner surface is regard as static aberration correction. A deformable mirror is placed at the position of the secondary mirror in the two-mirror all reflective imaging system, which is the dynamic aberration correction. An ellipsoidal MgF2 conformal dome with a fineness ratio of 1.0 is designed as an example. The FOR angle is 0°- 30°, and the design wavelength is 4 μm. After the optimization at 7 zoom positions by using the design tools Code V, the root-mean-square (RMS) spot size is reduced to approximately 0.99 to 1.48 times the diffraction limit. The design results show that the performances of the conformal optical systems can be greatly improved by the combination of the static correction and the dynamic correction.

  5. The correct lens mount lightweighting design of thermal cycle stress in Cassegrain telescope

    NASA Astrophysics Data System (ADS)

    Hsu, M. Y.; Chang, S. T.; Huang, T. M.; Hsu, Ming-Ying

    2011-10-01

    The Cassegrain telescope system was design for space environment. The correct lens mount assembly is included as correct lens, lens mount, spacer, mount barrel and retainer. The system mass budget allocated to correct lens assembly was 5 Kg. Meanwhile, according to optical design the correct lens is made from fused silica, the lens diameter is 130 mm, and the mass is 2.3 Kg. Therefore, remain mass budget is 2.7 Kg; including the lens mount, spacer, mount barrel and retainer. The telescope system deformation is mainly caused by thermal deformation on space orbit. The correct lens mount was made from invar material in initial design. The CTE (Coefficient of Thermal Expansion) of invar is only 1* 10-6/°C, low CTE would be resistant to thermal deformation, but invar density is 8* 10-6 kg/mm3. If all components were made from invar, the total mass was over 2.7 kg. Thus, the components material would consider titanium alloy (CTE is 8.6* 10-6/°C, density is 4.43* 10-6 kg/mm3) or aluminum alloy (CTE is 23.6* 10-6/°C, density is 2.81* 10-6 kg/mm3). The titanium alloy density is 1.83 times lighter than invar, but CTE is 8.6 times higher. The aluminum alloy density is 2.84 times lighter then invar, but CTE is 23.6 times higher. The lens mount thermal deformation would effect correct lens surface wavefront error and introduce optical aberration. This article analyzes the correct lens assembly thermal deformation and optical performance in different lens mount material. From above conditions, using FEM (Finite Element Method) and optical software, simulation and optimization on the lens mount design have been performed to achieve system mass requirement.

  6. The Space Operations Simulation Center (SOSC) and Closed-Loop Hardware Testing for Orion Rendezvous System Design

    NASA Technical Reports Server (NTRS)

    Milenkovic, Zoran; DSouza, Christopher; Huish, David; Bendle, John; Kibler, Angela

    2012-01-01

    The exploration goals of Orion / MPCV Project will require a mature Rendezvous, Proximity Operations and Docking (RPOD) capability. Ground testing autonomous docking with a next-generation sensor such as the Vision Navigation Sensor (VNS) is a critical step along the path of ensuring successful execution of autonomous RPOD for Orion. This paper will discuss the testing rationale, the test configuration, the test limitations and the results obtained from tests that have been performed at the Lockheed Martin Space Operations Simulation Center (SOSC) to evaluate and mature the Orion RPOD system. We will show that these tests have greatly increased the confidence in the maturity of the Orion RPOD design, reduced some of the latent risks and in doing so validated the design philosophy of the Orion RPOD system. This paper is organized as follows: first, the objectives of the test are given. Descriptions of the SOSC facility, and the Orion RPOD system and associated components follow. The details of the test configuration of the components in question are presented prior to discussing preliminary results of the tests. The paper concludes with closing comments.

  7. Customized schematic eye model for refraction correction design based on ocular wavefront and corneal topography measurements

    NASA Astrophysics Data System (ADS)

    Curatu, Eugene O.; Pettit, George H.; Campin, John A.

    2002-06-01

    The subject of this paper relates to the ocular optical design and vision analysis of refractive correction of the eye. After the purpose statement and the assumption list, the concept of the schematic eye matching a particular (measured) wavefront is introduced. This concept is based on the fact that the ocular wavefront, together with the corneal topography, can be seen as the mathematical global representation of the eye working in monochromatic light and having a foveal vision. The discussed design technique, including an iterative optimization method, could be applied in any ocular correction that utilizes cornea topography and/or ocular wavefront, e.g. contact lens or intra-corneal implant. However, the application this paper refers to is the ocular refractive correction by a procedure using the LADARVISION. It consists of surgical removal and subsequent replacement of a corneal flap on a stromal surface whose shape has been changed by laser ablation of the tissue. Subsequent sections of this paper are dedicated to establishing the limits of possible refractive correction, the influences of the flap and corneal topography into the refractive correction calculation. Finally a realistic evaluation of the results and a list of possible developments of this new optical design method are discussed.

  8. Hardware description ADSP-21020 40-bit floating point DSP as designed in a remotely controlled digital CW Doppler radar

    SciTech Connect

    Morrison, R.E.; Robinson, S.H.

    1991-01-01

    A continuous wave Doppler radar system has been designed which is portable, easily deployed, and remotely controlled. The heart of this system is a DSP/control board using Analog Devices ADSP-21020 40-bit floating point digital signal processor (DSP) microprocessor. Two 18-bit audio A/D converters provide digital input to the DSP/controller board for near real time target detection. Program memory for the DSP is dual ported with an Intel 87C51 microcontroller allowing DSP code to be up-loaded or down-loaded from a central controlling computer. The 87C51 provides overall system control for the remote radar and includes a time-of-day/day-of-year real time clock, system identification (ID) switches, and input/output (I/O) expansion by an Intel 82C55 I/O expander. 5 refs., 8 figs., 2 tabs.

  9. Towards composition of verified hardware devices

    NASA Technical Reports Server (NTRS)

    Schubert, E. Thomas; Levitt, K.; Cohen, G. C.

    1991-01-01

    Computers are being used where no affordable level of testing is adequate. Safety and life critical systems must find a replacement for exhaustive testing to guarantee their correctness. Through a mathematical proof, hardware verification research has focused on device verification and has largely ignored system composition verification. To address these deficiencies, we examine how the current hardware verification methodology can be extended to verify complete systems.

  10. Design of macro-filter-lens with simultaneous chromatic and geometric aberration correction.

    PubMed

    Prasad, Dilip K; Brown, Michael S

    2014-01-01

    A macro-filter-lens design that can correct for chromatic and geometric aberrations simultaneously while providing for a long focal length is presented. The filter is easy to fabricate since it involves two spherical surfaces and a planar surface. Chromatic aberration correction is achieved by making all the rays travel the same optical distance inside the filter element (negative meniscus). Geometric aberration is corrected for by the lens element (plano-convex), which makes the output rays parallel to the optic axis. This macro-filter-lens design does not need additional macro lenses and it provides an inexpensive and optically good (aberration compensated) solution for macro imaging of objects not placed close to the camera.

  11. Thermal Hardware for the Thermal Analyst

    NASA Technical Reports Server (NTRS)

    Steinfeld, David

    2015-01-01

    The presentation will be given at the 26th Annual Thermal Fluids Analysis Workshop (TFAWS 2015) hosted by the Goddard Space Flight Center (GSFC) Thermal Engineering Branch (Code 545). NCTS 21070-1. Most Thermal analysts do not have a good background into the hardware which thermally controls the spacecraft they design. SINDA and Thermal Desktop models are nice, but knowing how this applies to the actual thermal hardware (heaters, thermostats, thermistors, MLI blanketing, optical coatings, etc...) is just as important. The course will delve into the thermal hardware and their application techniques on actual spacecraft. Knowledge of how thermal hardware is used and applied will make a thermal analyst a better engineer.

  12. Designedly Incomplete Utterances: A Pedagogical Practice for Eliciting Knowledge Displays in Error Correction Sequences.

    ERIC Educational Resources Information Center

    Koshik, Irene

    2002-01-01

    Uses a conversation analytic framework to analyze a practice used by teachers in 1-0-1, second language writing conferences when eliciting self-correction of students' written language errors. This type of turn used to elicit a knowledge display from the student is labeled designedly incomplete utterance (DIU). Teachers use DIUs made up of…

  13. Bias Corrections for Standardized Effect Size Estimates Used with Single-Subject Experimental Designs

    ERIC Educational Resources Information Center

    Ugille, Maaike; Moeyaert, Mariola; Beretvas, S. Natasha; Ferron, John M.; Van den Noortgate, Wim

    2014-01-01

    A multilevel meta-analysis can combine the results of several single-subject experimental design studies. However, the estimated effects are biased if the effect sizes are standardized and the number of measurement occasions is small. In this study, the authors investigated 4 approaches to correct for this bias. First, the standardized effect…

  14. Visualizing the Future of Research on Post Secondary Correctional Education: Designs, Data, and Deliverables

    ERIC Educational Resources Information Center

    Wheeldon, J.

    2011-01-01

    Providing post-secondary education in correctional settings has emerged as one of the best ways to reduce recidivism, save taxpayer dollars, and promote post release employment and community reintegration. While a number of studies exist, this paper argues persistent challenges connected to research design, data collection, and the communication…

  15. Visualizing the Future of Research on Post Secondary Correctional Education: Designs, Data, and Deliverables

    ERIC Educational Resources Information Center

    Wheeldon, J.

    2011-01-01

    Providing post-secondary education in correctional settings has emerged as one of the best ways to reduce recidivism, save taxpayer dollars, and promote post release employment and community reintegration. While a number of studies exist, this paper argues persistent challenges connected to research design, data collection, and the communication…

  16. Bias Corrections for Standardized Effect Size Estimates Used with Single-Subject Experimental Designs

    ERIC Educational Resources Information Center

    Ugille, Maaike; Moeyaert, Mariola; Beretvas, S. Natasha; Ferron, John M.; Van den Noortgate, Wim

    2014-01-01

    A multilevel meta-analysis can combine the results of several single-subject experimental design studies. However, the estimated effects are biased if the effect sizes are standardized and the number of measurement occasions is small. In this study, the authors investigated 4 approaches to correct for this bias. First, the standardized effect…

  17. Computer hardware description languages - A tutorial

    NASA Technical Reports Server (NTRS)

    Shiva, S. G.

    1979-01-01

    The paper introduces hardware description languages (HDL) as useful tools for hardware design and documentation. The capabilities and limitations of HDLs are discussed along with the guidelines needed in selecting an appropriate HDL. The directions for future work are provided and attention is given to the implementation of HDLs in microcomputers.

  18. 16 CFR 1508.6 - Hardware.

    Code of Federal Regulations, 2010 CFR

    2010-01-01

    ... 16 Commercial Practices 2 2010-01-01 2010-01-01 false Hardware. 1508.6 Section 1508.6 Commercial Practices CONSUMER PRODUCT SAFETY COMMISSION FEDERAL HAZARDOUS SUBSTANCES ACT REGULATIONS REQUIREMENTS FOR FULL-SIZE BABY CRIBS § 1508.6 Hardware. (a) A crib shall be designed and constructed in a manner...

  19. 16 CFR 1508.6 - Hardware.

    Code of Federal Regulations, 2011 CFR

    2011-01-01

    ... 16 Commercial Practices 2 2011-01-01 2011-01-01 false Hardware. 1508.6 Section 1508.6 Commercial Practices CONSUMER PRODUCT SAFETY COMMISSION FEDERAL HAZARDOUS SUBSTANCES ACT REGULATIONS REQUIREMENTS FOR FULL-SIZE BABY CRIBS § 1508.6 Hardware. (a) A crib shall be designed and constructed in a manner...

  20. Creating state of the art, next-generation Virtual Reality exposure therapies for anxiety disorders using consumer hardware platforms: design considerations and future directions.

    PubMed

    Lindner, Philip; Miloff, Alexander; Hamilton, William; Reuterskiöld, Lena; Andersson, Gerhard; Powers, Mark B; Carlbring, Per

    2017-03-08

    Decades of research and more than 20 randomized controlled trials show that Virtual Reality exposure therapy (VRET) is effective in reducing fear and anxiety. Unfortunately, few providers or patients have had access to the costly and technical equipment previously required. Recent technological advances in the form of consumer Virtual Reality (VR) systems (e.g. Oculus Rift and Samsung Gear), however, now make widespread use of VRET in clinical settings and as self-help applications possible. In this literature review, we detail the current state of VR technology and discuss important therapeutic considerations in designing self-help and clinician-led VRETs, such as platform choice, exposure progression design, inhibitory learning strategies, stimuli tailoring, gamification, virtual social learning and more. We illustrate how these therapeutic components can be incorporated and utilized in VRET applications, taking full advantage of the unique capabilities of virtual environments, and showcase some of these features by describing the development of a consumer-ready, gamified self-help VRET application for low-cost commercially available VR hardware. We also raise and discuss challenges in the planning, development, evaluation, and dissemination of VRET applications, including the need for more high-quality research. We conclude by discussing how new technology (e.g. eye-tracking) can be incorporated into future VRETs and how widespread use of VRET self-help applications will enable collection of naturalistic "Big Data" that promises to inform learning theory and behavioral therapy in general.

  1. Open-loop correction of horizontal turbulence: system design and result.

    PubMed

    Mu, Quanquan; Cao, Zhaoliang; Li, Dayu; Hu, Lifa; Xuan, Li

    2008-08-10

    Adaptive optics systems often work in a closed-loop configuration due to the hysteretic and nonlinearity properties of conventional deformable mirrors. Because of the high-precision wavefront generation and nonhysteretic properties of liquid-crystal devices, the open-loop control becomes possible. Open-loop control is a requirement for advanced adaptive optics concepts. We designed an open-loop adaptive optics system with a liquid-crystal-on-silicon wavefront corrector. This system is simple, fast, and can save much more light compared to conventional liquid-crystal-based closed-loop systems. The detailed principle, construction, and operation are discussed. The 500 m horizontal turbulence correction experiment was done using a 250 mm telescope in the laboratory. The whole system can reach a 60 Hz correction frequency. Evaluation of the correction precision was done at closed-loop configuration, which is 0.2 lambda (lambda=0.633 microm) in peak to valley. The dynamic image under open-loop correction got the same resolution compared to closed-loop correction. The whole system reached 0.68 arc sec resolution capability at open-loop correction, which is slightly larger than the system's diffraction-limited resolution of 0.65 arc sec.

  2. Correction of magnetooptic device phase errors in optical correlators through filter design modifications

    NASA Technical Reports Server (NTRS)

    Downie, John D.; Reid, Max B.; Hine, Butler P.

    1991-01-01

    We address the problem of optical phase errors in an optical correlator introduced by the input and filter plane spatial light modulators. Specifically, we study a laboratory correlator with magnetooptic spatial light modulator (MOSLM) devices. We measure and characterize the phase errors, analyze their effects on the correlation process, and discuss a means of correction through a design modification of the binary phase-only optical filter function. The phase correction technique is found to produce correlation results close to those of an error-free correlator.

  3. Correction of magnetooptic device phase errors in optical correlators through filter design modifications

    NASA Technical Reports Server (NTRS)

    Downie, John D.; Reid, Max B.; Hine, Butler P.

    1991-01-01

    We address the problem of optical phase errors in an optical correlator introduced by the input and filter plane spatial light modulators. Specifically, we study a laboratory correlator with magnetooptic spatial light modulator (MOSLM) devices. We measure and characterize the phase errors, analyze their effects on the correlation process, and discuss a means of correction through a design modification of the binary phase-only optical filter function. The phase correction technique is found to produce correlation results close to those of an error-free correlator.

  4. Novel Principles and Techniques to Create a Natural Design in Female Hairline Correction Surgery

    PubMed Central

    2015-01-01

    Abstract Background: Female hairline correction surgery is becoming increasingly popular. However, no guidelines or methods of female hairline design have been introduced to date. Methods: The purpose of this study was to create an initial framework based on the novel principles of female hairline design and then use artistic ability and experience to fine tune this framework. An understanding of the concept of 5 areas (frontal area, frontotemporal recess area, temporal peak, infratemple area, and sideburns) and 5 points (C, A, B, T, and S) is required for female hairline correction surgery (the 5A5P principle). The general concepts of female hairline correction surgery and natural design methods are, herein, explained with a focus on the correlations between these 5 areas and 5 points. Results: A natural and aesthetic female hairline can be created with application of the above-mentioned concepts. Conclusion: The 5A5P principle of forming the female hairline is very useful in female hairline correction surgery. PMID:26894014

  5. Motion compensation in digital subtraction angiography using graphics hardware.

    PubMed

    Deuerling-Zheng, Yu; Lell, Michael; Galant, Adam; Hornegger, Joachim

    2006-07-01

    An inherent disadvantage of digital subtraction angiography (DSA) is its sensitivity to patient motion which causes artifacts in the subtraction images. These artifacts could often reduce the diagnostic value of this technique. Automated, fast and accurate motion compensation is therefore required. To cope with this requirement, we first examine a method explicitly designed to detect local motions in DSA. Then, we implement a motion compensation algorithm by means of block matching on modern graphics hardware. Both methods search for maximal local similarity by evaluating a histogram-based measure. In this context, we are the first who have mapped an optimizing search strategy on graphics hardware while paralleling block matching. Moreover, we provide an innovative method for creating histograms on graphics hardware with vertex texturing and frame buffer blending. It turns out that both methods can effectively correct the artifacts in most case, as the hardware implementation of block matching performs much faster: the displacements of two 1024 x 1024 images can be calculated at 3 frames/s with integer precision or 2 frames/s with sub-pixel precision. Preliminary clinical evaluation indicates that the computation with integer precision could already be sufficient.

  6. Efficient Architecture for Spike Sorting in Reconfigurable Hardware

    PubMed Central

    Hwang, Wen-Jyi; Lee, Wei-Hao; Lin, Shiow-Jyu; Lai, Sheng-Ying

    2013-01-01

    This paper presents a novel hardware architecture for fast spike sorting. The architecture is able to perform both the feature extraction and clustering in hardware. The generalized Hebbian algorithm (GHA) and fuzzy C-means (FCM) algorithm are used for feature extraction and clustering, respectively. The employment of GHA allows efficient computation of principal components for subsequent clustering operations. The FCM is able to achieve near optimal clustering for spike sorting. Its performance is insensitive to the selection of initial cluster centers. The hardware implementations of GHA and FCM feature low area costs and high throughput. In the GHA architecture, the computation of different weight vectors share the same circuit for lowering the area costs. Moreover, in the FCM hardware implementation, the usual iterative operations for updating the membership matrix and cluster centroid are merged into one single updating process to evade the large storage requirement. To show the effectiveness of the circuit, the proposed architecture is physically implemented by field programmable gate array (FPGA). It is embedded in a System-on-Chip (SOC) platform for performance measurement. Experimental results show that the proposed architecture is an efficient spike sorting design for attaining high classification correct rate and high speed computation. PMID:24189331

  7. Secure Hardware Design for Trust

    DTIC Science & Technology

    2014-03-01

    approach. The Grain VHDL code was obtained from [13] and implemented in the same fashion as shown in Figure 5. Approved for Public Release...CRC implementation for USB token protocol was chosen was the main candidate. The VHDL source code was generated from [14] using the standard CRC5

  8. Commercial Aircraft Maintenance Experience Relating to Engine External Hardware

    NASA Technical Reports Server (NTRS)

    Soditus, Sharon M.

    2006-01-01

    Airlines are extremely sensitive to the amount of dollars spent on maintaining the external engine hardware in the field. Analysis reveals that many problems revolve around a central issue, reliability. Fuel and oil leakage due to seal failure and electrical fault messages due to wire harness failures play a major role in aircraft delays and cancellations (D&C's) and scheduled maintenance. Correcting these items on the line requires a large investment of engineering resources and manpower after the fact. The smartest and most cost effective philosophy is to build the best hardware the first time. The only way to do that is to completely understand and model the operating environment, study the field experience of similar designs and to perform extensive testing.

  9. Comparison of classical methods for blade design and the influence of tip correction on rotor performance

    NASA Astrophysics Data System (ADS)

    Sørensen, J. N.; Okulov, V. L.; Mikkelsen, R. F.; Naumov, I. V.; Litvinov, I. V.

    2016-09-01

    The classical blade-element/momentum (BE/M) method, which is used together with different types of corrections (e.g. the Prandtl or Glauert tip correction), is today the most basic tool in the design of wind turbine rotors. However, there are other classical techniques based on a combination of the blade-element approach and lifting-line (BE/LL) methods, which are less used by the wind turbine community. The BE/LL method involves different interpretations for rotors with finite or infinite numbers of blades and different assumptions with respect to the optimum circulation distribution. In the present study we compare the performance and the resulting design of the BE/M method by Glauert [1] and the BE/LL method by Betz [2] for finite as well as for infinite-bladed rotors, corrected for finiteness through the tip correction. In the first part of the paper, expressions are given for the optimum design, including blade plan forms and local pitch distributions. The comparison shows that the resulting geometry of the rotor depends on the method used, but that the differences mainly exist in the inner part of the blade and at relatively small tip speed ratios (TSR<5). An important conclusion is that an infinite-bladed approach combined with a tip correction results in a geometry which is nearly identical to a geometry generated from a finite-bladed approach. Next, the results from an experimental investigation on the influence on rotor performances of the tip correction on two different rotors are presented. Employing BE/M without the tip correction (“Glauert rotor”) and BE/LL with the Goldstein's circulation (“Betz rotor”) two different 3-bladed rotors were designed and manufactured. The two rotors were investigated experimentally in a water flume to compare their performance at different tip speed ratios and pitch angles. As a result of the comparison it was found that the Betz rotor had the best performance.

  10. Computer-aided design and custom-made guide in corrective osteotomy for complex femoral deformity.

    PubMed

    Chai, Wei; Xu, Meng; Zhang, Guo-qiang; Zhang, Li-hai; Gou, Wen-long; Ni, Ming; Chen, Ji-ying

    2013-06-01

    Preoperative planning of corrective osteotomy with traditional radiography has limitations in regards to determining the ideal osteotomy location and orientation in three-dimensional femoral deformities. Though a successful operation can be planned preoperatively, intraoperative contingencies might adhere to the procedural plan in the performance of operation. To efficiently perform a planned procedure, proposed is a design to implement three-dimensional reconstruction photography, based on computer-tomography (CT) scan. A custom-made guide was designed to navigate the osteotomy as planned, and additionally, a personalized intramedullary nail was used for fixation after osteotomy. Three-dimensional (3D) photography of deformed femur was established based on the CT dataset and transferred into 3D photography processing software for further planning. Osteotomy planes were designed and adjusted at deformity sites to correct the 3D deformities. The methodology of a custom-made osteotomy guide was introduced in femoral corrective osteotomy, for the first time, to navigate the operation as planned. After the virtual osteotomy and reduction of bone segments, the parameters of a custom-made intramedullary nail were measured for manufacturing. Findings Virtual operation in computer shows complete correction of the 3D deformity. The osteotomy guide, obtained by rapid-prototyping techniques, navigates mimicking surgery on rapid-prototyping model of the involved femur as planned. Internal fixation was achieved using the custom-made intramedullary nail. Interpretation three-dimensional visualization introduces an advantage in preoperative planning for corrective osteotomy of 3D femoral deformity, and the custom-made osteotomy guide is crucial to realize such a deliberate plan during the actual procedures. The internal fixator, such as an intramedullary nail, can be modified or personalized for fixation in unique cases.

  11. A new aberration-corrected, energy-filtered LEEM/PEEM instrument. I. Principles and design.

    PubMed

    Tromp, R M; Hannon, J B; Ellis, A W; Wan, W; Berghaus, A; Schaff, O

    2010-06-01

    We describe a new design for an aberration-corrected low energy electron microscope (LEEM) and photo electron emission microscope (PEEM), equipped with an in-line electron energy filter. The chromatic and spherical aberrations of the objective lens are corrected with an electrostatic electron mirror that provides independent control over the chromatic and spherical aberration coefficients C(c) and C(3), as well as the mirror focal length, to match and correct the aberrations of the objective lens. For LEEM (PEEM) the theoretical resolution is calculated to be approximately 1.5 nm (approximately 4 nm). Unlike previous designs, this instrument makes use of two magnetic prism arrays to guide the electron beam from the sample to the electron mirror, removing chromatic dispersion in front of the mirror by symmetry. The aberration correction optics was retrofitted to an uncorrected instrument with a base resolution of 4.1 nm in LEEM. Initial results in LEEM show an improvement in resolution to approximately 2 nm. Copyright 2010 Elsevier B.V. All rights reserved.

  12. Hardware-Accelerated Simulated Radiography

    SciTech Connect

    Laney, D; Callahan, S; Max, N; Silva, C; Langer, S; Frank, R

    2005-08-04

    We present the application of hardware accelerated volume rendering algorithms to the simulation of radiographs as an aid to scientists designing experiments, validating simulation codes, and understanding experimental data. The techniques presented take advantage of 32-bit floating point texture capabilities to obtain solutions to the radiative transport equation for X-rays. The hardware accelerated solutions are accurate enough to enable scientists to explore the experimental design space with greater efficiency than the methods currently in use. An unsorted hexahedron projection algorithm is presented for curvilinear hexahedral meshes that produces simulated radiographs in the absorption-only regime. A sorted tetrahedral projection algorithm is presented that simulates radiographs of emissive materials. We apply the tetrahedral projection algorithm to the simulation of experimental diagnostics for inertial confinement fusion experiments on a laser at the University of Rochester.

  13. Hardware Testing and System Evaluation: Procedures to Evaluate Commodity Hardware for Production Clusters

    SciTech Connect

    Goebel, J

    2004-02-27

    Without stable hardware any program will fail. The frustration and expense of supporting bad hardware can drain an organization, delay progress, and frustrate everyone involved. At Stanford Linear Accelerator Center (SLAC), we have created a testing method that helps our group, SLAC Computer Services (SCS), weed out potentially bad hardware and purchase the best hardware at the best possible cost. Commodity hardware changes often, so new evaluations happen periodically each time we purchase systems and minor re-evaluations happen for revised systems for our clusters, about twice a year. This general framework helps SCS perform correct, efficient evaluations. This article outlines SCS's computer testing methods and our system acceptance criteria. We expanded the basic ideas to other evaluations such as storage, and we think the methods outlined in this article has helped us choose hardware that is much more stable and supportable than our previous purchases. We have found that commodity hardware ranges in quality, so systematic method and tools for hardware evaluation were necessary. This article is based on one instance of a hardware purchase, but the guidelines apply to the general problem of purchasing commodity computer systems for production computational work.

  14. Mechanically verified hardware implementing an 8-bit parallel IO Byzantine agreement processor

    NASA Technical Reports Server (NTRS)

    Moore, J. Strother

    1992-01-01

    Consider a network of four processors that use the Oral Messages (Byzantine Generals) Algorithm of Pease, Shostak, and Lamport to achieve agreement in the presence of faults. Bevier and Young have published a functional description of a single processor that, when interconnected appropriately with three identical others, implements this network under the assumption that the four processors step in synchrony. By formalizing the original Pease, et al work, Bevier and Young mechanically proved that such a network achieves fault tolerance. We develop, formalize, and discuss a hardware design that has been mechanically proven to implement their processor. In particular, we formally define mapping functions from the abstract state space of the Bevier-Young processor to a concrete state space of a hardware module and state a theorem that expresses the claim that the hardware correctly implements the processor. We briefly discuss the Brock-Hunt Formal Hardware Description Language which permits designs both to be proved correct with the Boyer-Moore theorem prover and to be expressed in a commercially supported hardware description language for additional electrical analysis and layout. We briefly describe our implementation.

  15. Orbiter CIU/IUS communications hardware evaluation

    NASA Technical Reports Server (NTRS)

    Huth, G. K.

    1979-01-01

    Inertial Upper Stage (IUS) and DoD Communication Interface Unit (CIU) communication system design, hardware specifications, and interfaces were evaluated to determine their compatibility with the Orbiter payload communication and data handling equipment and the Orbiter network communication equipment.

  16. Applying a Genetic Algorithm to Reconfigurable Hardware

    NASA Technical Reports Server (NTRS)

    Wells, B. Earl; Weir, John; Trevino, Luis; Patrick, Clint; Steincamp, Jim

    2004-01-01

    This paper investigates the feasibility of applying genetic algorithms to solve optimization problems that are implemented entirely in reconfgurable hardware. The paper highlights the pe$ormance/design space trade-offs that must be understood to effectively implement a standard genetic algorithm within a modem Field Programmable Gate Array, FPGA, reconfgurable hardware environment and presents a case-study where this stochastic search technique is applied to standard test-case problems taken from the technical literature. In this research, the targeted FPGA-based platform and high-level design environment was the Starbridge Hypercomputing platform, which incorporates multiple Xilinx Virtex II FPGAs, and the Viva TM graphical hardware description language.

  17. Coleman moves MSL Hardware

    NASA Image and Video Library

    2011-01-07

    ISS026-E-016614 (7 Jan. 2011) --- NASA astronaut Catherine (Cady) Coleman, Expedition 26 flight engineer, moves Material Science Laboratory (MSL) hardware from the Harmony node to the Destiny laboratory of the International Space Station.

  18. Hardware removal - extremity

    MedlinePlus

    ... enable JavaScript. Surgeons use hardware such as pins, plates, or screws to help fix a broken bone ... SW, Hotchkiss RN, Pederson WC, Kozin SH, Cohen MS, eds. Green's Operative Hand Surgery . 7th ed. Philadelphia, ...

  19. Initial Hardware Development Schedule

    NASA Technical Reports Server (NTRS)

    Culpepper, William X.

    1991-01-01

    The hardware development schedule for the Common Lunar Lander's (CLLs) tracking system is presented. Among the topics covered are the following: historical perspective, solution options, industry contacts, and the rationale for selection.

  20. A front-end ASIC design for non-uniformity correction

    NASA Astrophysics Data System (ADS)

    Shen, X.; Ding, R. J.; Lin, J. M.; Liu, F.

    2008-12-01

    A front-end design of an ASIC that implements calibration and correction for IRFPA non-uniformity is presented. An algorithm suitable for ASIC implementation is introduced, and one kind of architecture that implements this algorithm has been designed. We map the architecture to TSMC 0.25um process. After evaluating the chip area and operation speed, we confirm that this architect will also be effective when the FPA scale in enlarged to 1Kby1K. Finally the flow of circuit implementation and method of verification are introduced briefly.

  1. Progress in the spectacle correction of presbyopia. Part 1: Design and development of progressive lenses.

    PubMed

    Meister, Darryl J; Fisher, Scott W

    2008-05-01

    Most of the commercial advances in the spectacle correction of presbyopia continue to occur in progressive lens design, which has been the focus of intense research and development over the past 60 years by major spectacle lens manufacturers. While progressive lens design and manufacturing techniques have advanced at a steady pace, recent progress in 'free-form' lens surfacing has opened up many exciting possibilities that will in all likelihood bring about a paradigm shift in the current model of progressive lens fabrication and distribution. The first installment of this two-part series will review the fundamental optical principles and early development work associated with progressive lenses.

  2. Hardware Correlator Development at SHAO

    NASA Astrophysics Data System (ADS)

    Xu, Zhijun; Gan, Jiangying; Guo, Shaoguang

    2016-12-01

    Hardware correlators have been used in the Chinese Chang'E missions. Recently, a hardware correlator based on uniboard has been developed. This article presents the development of the hardware correlator at SHAO and some results.

  3. Design of respiration averaged CT for attenuation correction of the PET data from PET/CT

    SciTech Connect

    Chi, Pai-Chun Melinda; Mawlawi, Osama; Nehmeh, Sadek A.; Erdi, Yusuf E.; Balter, Peter A.; Luo, Dershan; Mohan, Radhe; Pan Tinsu

    2007-06-15

    images only at the four significant phases for the ACT can reduce radiation dose to 1/3 of the current 4DCT dose; however, the implementation of this approach requires additional hardware that is not standard equipment on PET/CT scanners. In the cine approach, we recommend a duration of 6{+-}1 s in order to include variations of respiratory patterns in a larger population. This approach can be easily implemented because cine acquisition mode is available on all GE PET/CT scanners. The CT dose in the cine approach can be reduced to approximately 5 mGy by using the lowest mA setting (10 mA), while still maintaining good quality CT data for PET attenuation correction. In our scanning protocol, the ACT is only acquired if respiration-induced misregistration is observed (determined before the PET scan is completed), and therefore patients do not receive unnecessary CT radiation dose.

  4. Formal hardware verification of digital circuits

    NASA Technical Reports Server (NTRS)

    Joyce, J.; Seger, C.-J.

    1991-01-01

    The use of formal methods to verify the correctness of digital circuits is less constrained by the growing complexity of digital circuits than conventional methods based on exhaustive simulation. This paper briefly outlines three main approaches to formal hardware verification: symbolic simulation, state machine analysis, and theorem-proving.

  5. Microbiologic assay of space hardware.

    NASA Technical Reports Server (NTRS)

    Favero, M. S.

    1971-01-01

    Review of the procedures used in the microbiological examination of space hardware. The general procedure for enumerating aerobic and anaerobic microorganisms and spores is outlined. Culture media and temperature-time cycles used for incubation are reviewed, along with assay systems designed for the enumeration of aerobic and anaerobic spores. The special problems which are discussed are involved in the precise and accurate enumeration of microorganisms on surfaces and in the neutralization of viable organisms buried inside solid materials that could be released to a planet's surface if the solid should be fractured. Special attention is given to sampling procedures including also the indirect techniques of surface assays of space hardware such as those using detachable or fallout strips. Some data on comparative levels of microbial contamination on lunar and planetary spacecraft are presented.

  6. Microbiologic assay of space hardware.

    NASA Technical Reports Server (NTRS)

    Favero, M. S.

    1971-01-01

    Review of the procedures used in the microbiological examination of space hardware. The general procedure for enumerating aerobic and anaerobic microorganisms and spores is outlined. Culture media and temperature-time cycles used for incubation are reviewed, along with assay systems designed for the enumeration of aerobic and anaerobic spores. The special problems which are discussed are involved in the precise and accurate enumeration of microorganisms on surfaces and in the neutralization of viable organisms buried inside solid materials that could be released to a planet's surface if the solid should be fractured. Special attention is given to sampling procedures including also the indirect techniques of surface assays of space hardware such as those using detachable or fallout strips. Some data on comparative levels of microbial contamination on lunar and planetary spacecraft are presented.

  7. Evaluation of a physics-preserving bias correction methodology designed for climate impact simulations

    NASA Astrophysics Data System (ADS)

    Sippel, S.; Otto, F. E. L.; Forkel, M.; Allen, M. R.; Guillod, B. P.; Heimann, M.; Reichstein, M.; Seneviratne, S. I.; Kirsten, T.; Mahecha, M. D.

    2016-12-01

    Understanding and quantifying the impacts of extreme weather and climate events across various sectors is crucial for societal adaptation in a changing climate. However, regional climate model simulations generated for this purpose typically exhibit biases in their output that impede any straightforward assessments of impacts. To overcome this issue, various bias correction strategies are routinely used to alleviate climate model deficiencies, most of which have been criticized for physical inconsistency and their non-preservation of the multivariate correlation structure. Here, we first present a recently introduced resampling-based bias correction scheme designed for assessing the impacts of climate extremes that fully preserves the physical consistency and multivariate correlation structure of the model output. Second, the bias correction scheme is evaluated using large ensemble simulations generated with a regional climate model over Central Europe (HadRM3P, generated through climateprediction.net/weatherathome). The procedure is demonstrated to yield a substantial improvement in the representation of variability and extremes i) in individual climate variables such as summer heat or dryness, and ii) in multivariate heat-health related indicators such as the "wet-bulb globe temperature". Finally, we conduct a climate impact assessment in the terrestrial biosphere by simulating biosphere-atmosphere fluxes of carbon and water using a terrestrial ecosystem model (LPJmL). The resampling-based bias correction yields strongly improved statistical distributions of carbon and water fluxes, including the extremes. Our results thus highlight the importance of physical consistent bias correction schemes for climate impact simulations, particularly if these assessments focus on variability and extremes in climate or its associated impacts. Whilst the resampling-methodology currently requires relatively large ensembles of climate simulations, we present some ideas how the

  8. Effective safety measures with tests followed by design correction for aerospace structures

    NASA Astrophysics Data System (ADS)

    Matsumura, Taiki

    Analytical and computational prediction tools enable us to design aircraft and spacecraft components with high degree of confidence. While the accuracy of such predictions has been improved over the years, uncertainty continues to be added by new materials and new technology introduced in order to improve performance. This requires us to have reality checks, such as tests, in order to make sure that the prediction tools are reliable enough to ensure safety. While tests can reveal unsafe designs and lead to design correction, these tests are very costly. Therefore, it is important to manage such a design-test-correction cycle effectively. In this dissertation, we consider three important test stages in the lifecycle of an aviation system. First, we dealt with characterization tests that reveal failure modes of new materials or new geometrical arrangements. We investigated the challenge associated with getting the best characterization with a limited number of tests. We have found that replicating tests to attenuate the effect of noise in observation is not necessary because some surrogate models can serve as a noise filter without having replicated data. Instead, we should focus on exploring the design space with different structural configurations in order to discover unknown failure modes. Next, we examined post-design tests for design acceptance followed by possible redesign. We looked at the question of how to balance the desire for better performance achieved by redesign against the cost of redesign. We proposed a design optimization framework that provides tradeoff information between the expected performance improvement by redesign and the probability of redesign, equivalent to the cost of redesign. We also demonstrated that the proposed method can reduce the performance loss due to a conservative reliability estimate. The ultimate test, finally, is whether the structures do not fail in flight. Once an accident occurs, an accident investigation takes place

  9. Prime focus wide-field corrector designs with lossless atmospheric dispersion correction

    NASA Astrophysics Data System (ADS)

    Saunders, Will; Gillingham, Peter; Smith, Greg; Kent, Steve; Doel, Peter

    2014-07-01

    Wide-Field Corrector designs are presented for the Blanco and Mayall telescopes, the CFHT and the AAT. The designs are Terezibh-style, with 5 or 6 lenses, and modest negative optical power. They have 2.2°-3° ields of view, with curved and telecentric focal surfaces suitable for fiber spectroscopy. Some variants also allow wide-field imaging, by changing the last WFC element. Apart from the adaptation of the Terebizh design for spectroscopy, the key feature is a new concept for a `Compensating Lateral Atmospheric Dispersion Corrector', with two of the lenses being movable laterally by small amounts. This provides excellent atmospheric dispersion correction, without any additional surfaces or absorption. A novel and simple mechanism for providing the required lens motions is proposed, which requires just 3 linear actuators for each of the two moving lenses.

  10. Prime focus wide-field corrector designs with lossless atmospheric dispersion correction

    SciTech Connect

    Saunders, Will; Gillingham, Peter; Smith, Greg; Kent, Steve; Doel, Peter

    2014-07-18

    Wide-Field Corrector designs are presented for the Blanco and Mayall telescopes, the CFHT and the AAT. The designs are Terezibh-style, with 5 or 6 lenses, and modest negative optical power. They have 2.2-3 degree fields of view, with curved and telecentric focal surfaces suitable for fiber spectroscopy. Some variants also allow wide-field imaging, by changing the last WFC element. Apart from the adaptation of the Terebizh design for spectroscopy, the key feature is a new concept for a 'Compensating Lateral Atmospheric Dispersion Corrector', with two of the lenses being movable laterally by small amounts. This provides excellent atmospheric dispersion correction, without any additional surfaces or absorption. A novel and simple mechanism for providing the required lens motions is proposed, which requires just 3 linear actuators for each of the two moving lenses.

  11. Hardware Trojans - Prevention, Detection, Countermeasures (A Literature Review)

    DTIC Science & Technology

    2011-07-01

    to a software Trojan Horse program (Thompson 1984), a Hardware Trojan is a back-door that can be inserted into hardware. The added advantages of a...characterization for ic authentication and trojan horse detection, in Hardware-Oriented Security and Trust, 2008. HOST 2008. IEEE International Workshop on...47th Design Automation Conference, pp. 633–634. Potkonjak, M., Nahapetian, A., Nelson, M. & Massey, T. (2009) Hardware trojan horse de- tection using

  12. Space shuttle main engine hardware simulation

    NASA Technical Reports Server (NTRS)

    Vick, H. G.; Hampton, P. W.

    1985-01-01

    The Huntsville Simulation Laboratory (HSL) provides a simulation facility to test and verify the space shuttle main engine (SSME) avionics and software system using a maximum complement of flight type hardware. The HSL permits evaluations and analyses of the SSME avionics hardware, software, control system, and mathematical models. The laboratory has performed a wide spectrum of tests and verified operational procedures to ensure system component compatibility under all operating conditions. It is a test bed for integration of hardware/software/hydraulics. The HSL is and has been an invaluable tool in the design and development of the SSME.

  13. High angular resolution diffusion imaging with stimulated echoes: compensation and correction in experiment design and analysis

    PubMed Central

    Lundell, Henrik; Alexander, Daniel C; Dyrby, Tim B

    2014-01-01

    Stimulated echo acquisition mode (STEAM) diffusion MRI can be advantageous over pulsed-gradient spin-echo (PGSE) for diffusion times that are long compared with T2. It therefore has potential for biomedical diffusion imaging applications at 7T and above where T2 is short. However, gradient pulses other than the diffusion gradients in the STEAM sequence contribute much greater diffusion weighting than in PGSE and lead to a disrupted experimental design. Here, we introduce a simple compensation to the STEAM acquisition that avoids the orientational bias and disrupted experiment design that these gradient pulses can otherwise produce. The compensation is simple to implement by adjusting the gradient vectors in the diffusion pulses of the STEAM sequence, so that the net effective gradient vector including contributions from diffusion and other gradient pulses is as the experiment intends. High angular resolution diffusion imaging (HARDI) data were acquired with and without the proposed compensation. The data were processed to derive standard diffusion tensor imaging (DTI) maps, which highlight the need for the compensation. Ignoring the other gradient pulses, a bias in DTI parameters from STEAM acquisition is found, due both to confounds in the analysis and the experiment design. Retrospectively correcting the analysis with a calculation of the full B matrix can partly correct for these confounds, but an acquisition that is compensated as proposed is needed to remove the effect entirely. PMID:24890716

  14. Computer hardware fault administration

    DOEpatents

    Archer, Charles J.; Megerian, Mark G.; Ratterman, Joseph D.; Smith, Brian E.

    2010-09-14

    Computer hardware fault administration carried out in a parallel computer, where the parallel computer includes a plurality of compute nodes. The compute nodes are coupled for data communications by at least two independent data communications networks, where each data communications network includes data communications links connected to the compute nodes. Typical embodiments carry out hardware fault administration by identifying a location of a defective link in the first data communications network of the parallel computer and routing communications data around the defective link through the second data communications network of the parallel computer.

  15. Design and progress toward a multi-conjugate adaptive optics system for distributed aberration correction

    SciTech Connect

    Baker, K; Olivier, S; Tucker, J; Silva, D; Gavel, D; Lim, R; Gratrix, E

    2004-08-17

    This article investigates the use of a multi-conjugate adaptive optics system to improve the field-of-view for the system. The emphasis of this research is to develop techniques to improve the performance of optical systems with applications to horizontal imaging. The design and wave optics simulations of the proposed system are given. Preliminary results from the multi-conjugate adaptive optics system are also presented. The experimental system utilizes a liquid-crystal spatial light modulator and an interferometric wave-front sensor for correction and sensing of the phase aberrations, respectively.

  16. Development of robotics facility docking test hardware

    NASA Technical Reports Server (NTRS)

    Loughead, T. E.; Winkler, R. V.

    1984-01-01

    Design and fabricate test hardware for NASA's George C. Marshall Space Flight Center (MSFC) are reported. A docking device conceptually developed was fabricated, and two docking targets which provide high and low mass docking loads were required and were represented by an aft 61.0 cm section of a Hubble space telescope (ST) mockup and an upgrading of an existing multimission modular spacecraft (MSS) mockup respectively. A test plan is developed for testing the hardware.

  17. The novel chamber hardware design to improve the thin film deposition quality in both 12″ (300 mm) and 18″ (450 mm) wafers with the development of 3D full chamber modeling and experimental visual technique

    NASA Astrophysics Data System (ADS)

    Liao, M.-H.; Chen, C.-H.

    2013-07-01

    The thin film deposition property and the process difference during the wafer size migration from 12″ (300 mm) to 18″ (450 mm) in the Chemical Vapor Deposition (CVD) equipment is improved and reduced, respectively, when the chamber hardware is designed with the help of 3D full chamber modeling and 3D experimental visual technique developed in this work. The accuracy of 3D chamber simulation model is demonstrated with the experimental visual technique measurement. With the CVD chamber hardware design of placing the inlet position and optimizing the distance between the susceptor edge and the reactor wall, the better thin film deposition property and the larger process compatibility during the wafer size migration from 12″ (300 mm) to 18″ (450 mm) for the industry cost reduction can be achieved. Non-dimensional Nusselt parameter is also found to be the effective indicator to monitor the thin film deposition property.

  18. Testing of hardware implementation of infrared image enhancing algorithm

    NASA Astrophysics Data System (ADS)

    Dulski, R.; Sosnowski, T.; PiÄ tkowski, T.; Trzaskawka, P.; Kastek, M.; Kucharz, J.

    2012-10-01

    The interpretation of IR images depends on radiative properties of observed objects and surrounding scenery. Skills and experience of an observer itself are also of great importance. The solution to improve the effectiveness of observation is utilization of algorithm of image enhancing capable to improve the image quality and the same effectiveness of object detection. The paper presents results of testing the hardware implementation of IR image enhancing algorithm based on histogram processing. Main issue in hardware implementation of complex procedures for image enhancing algorithms is high computational cost. As a result implementation of complex algorithms using general purpose processors and software usually does not bring satisfactory results. Because of high efficiency requirements and the need of parallel operation, the ALTERA's EP2C35F672 FPGA device was used. It provides sufficient processing speed combined with relatively low power consumption. A digital image processing and control module was designed and constructed around two main integrated circuits: a FPGA device and a microcontroller. Programmable FPGA device performs image data processing operations which requires considerable computing power. It also generates the control signals for array readout, performs NUC correction and bad pixel mapping, generates the control signals for display module and finally executes complex image processing algorithms. Implemented adaptive algorithm is based on plateau histogram equalization. Tests were performed on real IR images of different types of objects registered in different spectral bands. The simulations and laboratory experiments proved the correct operation of the designed system in executing the sophisticated image enhancement.

  19. Hardware Removal after Osseous Free Flap Reconstruction

    PubMed Central

    Day, Kristine E.; Desmond, Renee; Magnuson, J. Scott; Carroll, William R.; Rosenthal, Eben L.

    2015-01-01

    Objective Identifying risk factors for hardware removal in patients undergoing mandibular reconstruction with vascularized osseous free flaps remains a challenge. The purpose of this study is to identify potential risk factors, including osteocutaneous radial forearm versus fibular flap, for need for removal and to describe the fate of implanted hardware. Study Design Case series with chart review. Setting Academic tertiary care medical center. Subjects and Methods Two hundred thirteen patients undergoing 227 vascularized osseous mandibular reconstructions between the years 2004 and 2012. Data were compiled through a manual chart review, and patients incurring hardware removals were identified. Results Thirty-four of 213 evaluable vascularized osseous free flaps (16%) underwent surgical removal of hardware. The average length of time to removal was 16.2 months (median 10 months), with the majority of removals occurring within the first year. Osteocutaneous radial forearm free flaps (OCRFFF) incurred a slightly higher percentage of hardware removals (9.9%) compared to fibula flaps (6.1%). Partial removal was performed in 8 of 34 cases, and approximately 38% of these required additional surgery for removal. Conclusion Hardware removal was associated with continued tobacco use after mandibular reconstruction (P = .03). Removal of the supporting hardware most commonly occurs from infection or exposure in the first year. In the majority of cases the bone is well healed and the problem resolves with removal. PMID:24201061

  20. DESIGN OF TWO-DIMENSIONAL SUPERSONIC TURBINE ROTOR BLADES WITH BOUNDARY-LAYER CORRECTION

    NASA Technical Reports Server (NTRS)

    Goldman, L. J.

    1994-01-01

    A computer program has been developed for the design of supersonic rotor blades where losses are accounted for by correcting the ideal blade geometry for boundary layer displacement thickness. The ideal blade passage is designed by the method of characteristics and is based on establishing vortex flow within the passage. Boundary-layer parameters (displacement and momentum thicknesses) are calculated for the ideal passage, and the final blade geometry is obtained by adding the displacement thicknesses to the ideal nozzle coordinates. The boundary-layer parameters are also used to calculate the aftermixing conditions downstream of the rotor blades assuming the flow mixes to a uniform state. The computer program input consists essentially of the rotor inlet and outlet Mach numbers, upper- and lower-surface Mach numbers, inlet flow angle, specific heat ratio, and total flow conditions. The program gas properties are set up for air. Additional gases require changes to be made to the program. The computer output consists of the corrected rotor blade coordinates, the principal boundary-layer parameters, and the aftermixing conditions. This program is written in FORTRAN IV for batch execution and has been implemented on an IBM 7094. This program was developed in 1971.

  1. Safe to Fly: Certifying COTS Hardware for Spaceflight

    NASA Technical Reports Server (NTRS)

    Fichuk, Jessica L.

    2011-01-01

    Providing hardware for the astronauts to use on board the Space Shuttle or International Space Station (ISS) involves a certification process that entails evaluating hardware safety, weighing risks, providing mitigation, and verifying requirements. Upon completion of this certification process, the hardware is deemed safe to fly. This process from start to finish can be completed as quickly as 1 week or can take several years in length depending on the complexity of the hardware and whether the item is a unique custom design. One area of cost and schedule savings that NASA implements is buying Commercial Off the Shelf (COTS) hardware and certifying it for human spaceflight as safe to fly. By utilizing commercial hardware, NASA saves time not having to develop, design and build the hardware from scratch, as well as a timesaving in the certification process. By utilizing COTS hardware, the current detailed certification process can be simplified which results in schedule savings. Cost savings is another important benefit of flying COTS hardware. Procuring COTS hardware for space use can be more economical than custom building the hardware. This paper will investigate the cost savings associated with certifying COTS hardware to NASA s standards rather than performing a custom build.

  2. Correction: Theoretical study and design of multifunctional phosphorescent platinum(ii) complexes containing triarylboron moieties for efficient OLED emitters.

    PubMed

    Wu, Yong; Shan, Guo-Gang; Li, Hai-Bin; Wu, Shui-Xing; Ren, Xin-Yao; Geng, Yun; Su, Zhong-Min

    2015-02-14

    Correction for 'Theoretical study and design of multifunctional phosphorescent platinum(ii) complexes containing triarylboron moieties for efficient OLED emitters' by Yong Wu et al., Phys. Chem. Chem. Phys., 2015, DOI: .

  3. DCSP hardware maintenance system

    SciTech Connect

    Pazmino, M.

    1995-11-01

    This paper discusses the necessary changes to be implemented on the hardware side of the DCSP database. DCSP is currently tracking hardware maintenance costs in six separate databases. The goal is to develop a system that combines all data and works off a single database. Some of the tasks that will be discussed in this paper include adding the capability for report generation, creating a help package and preparing a users guide, testing the executable file, and populating the new database with data taken from the old database. A brief description of the basic process used in developing the system will also be discussed. Conclusions about the future of the database and the delivery of the final product are then addressed, based on research and the desired use of the system.

  4. Hardware development process for Human Research facility applications

    NASA Astrophysics Data System (ADS)

    Bauer, Liz

    2000-01-01

    The simple goal of the Human Research Facility (HRF) is to conduct human research experiments on the International Space Station (ISS) astronauts during long-duration missions. This is accomplished by providing integration and operation of the necessary hardware and software capabilities. A typical hardware development flow consists of five stages: functional inputs and requirements definition, market research, design life cycle through hardware delivery, crew training, and mission support. The purpose of this presentation is to guide the audience through the early hardware development process: requirement definition through selecting a development path. Specific HRF equipment is used to illustrate the hardware development paths. .

  5. RRFC hardware operation manual

    SciTech Connect

    Abhold, M.E.; Hsue, S.T.; Menlove, H.O.; Walton, G.

    1996-05-01

    The Research Reactor Fuel Counter (RRFC) system was developed to assay the {sup 235}U content in spent Material Test Reactor (MTR) type fuel elements underwater in a spent fuel pool. RRFC assays the {sup 235}U content using active neutron coincidence counting and also incorporates an ion chamber for gross gamma-ray measurements. This manual describes RRFC hardware, including detectors, electronics, and performance characteristics.

  6. BASS Hardware Setup

    NASA Image and Video Library

    2016-01-27

    ISS046e025945 (01/27/2016) --- NASA astronaut Tim Kopra sets up hardware for the Burning and Suppression of Solids – Milliken, or BASS-M, experiment. The BASS-M investigation tests flame-retardant cotton fabrics to determine how well they resist burning in microgravity. Results benefit research on flame-retardant textiles that can be used on Earth and in space

  7. Cassini Radar hardware technologies

    SciTech Connect

    Wheeler, K.; Renick, P.

    1996-03-01

    The hardware development portion of the Cassini Radar task is complete. The flight model Digital Assembly and Energy Storage Assembly have been integrated and tested, as has the engineering/qualification model Radio Frequency Electronics Assembly. Integration of the flight model Radio Frequency Electronics Assembly is ready to begin. The intent of this paper is to describe some of the more interesting technologies implemented in the electronics to achieve the requirements of the Cassini Radar experiment. {copyright} {ital 1996 American Institute of Physics.}

  8. Imaging near orthopedic hardware.

    PubMed

    Koff, Matthew F; Burge, Alissa J; Koch, Kevin M; Potter, Hollis G

    2017-07-01

    Over one million total joint replacement surgeries were performed in the US in 2013 alone, and this number is expected to more than double by 2030. Traditional imaging techniques for postoperative evaluation of implanted devices, such as radiography, computerized tomography, or ultrasound, utilize ionizing radiation, suffer from beam hardening artifact, or lack the inherent high contrast necessary to adequately evaluate soft tissues around the implants, respectively. Magnetic resonance imaging (MRI), due to its ability to generate multiplanar, high-contrast images without the use of ionizing radiation is ideal for evaluating periprosthetic soft tissues but has traditionally suffered from in-plane and through-plane data misregistration due to the magnetic susceptibility of implanted materials. A recent renaissance in the interest of imaging near arthroplasty and implanted orthopedic hardware has led to the development of new techniques that help to mitigate the effects of magnetic susceptibility. This article describes the challenges of performing imaging near implanted orthopedic hardware, how to generate clinically interpretable images when imaging near implanted devices, and how the images may be interpreted for clinical use. We will also describe current developments of utilizing MRI to evaluate implanted orthopedic hardware. 3 Technical Efficacy: Stage 2 J. MAGN. RESON. IMAGING 2017;46:24-39. © 2017 International Society for Magnetic Resonance in Medicine.

  9. Design and real time implementation of single phase boost power factor correction converter.

    PubMed

    Bouafassa, Amar; Rahmani, Lazhar; Mekhilef, Saad

    2015-03-01

    This paper presents a real time implementation of the single-phase power factor correction (PFC) AC-DC boost converter. A combination of higher order sliding mode controller based on super twisting algorithm and predictive control techniques are implemented to improve the performance of the boost converter. Due to the chattering effects, the higher order sliding mode control (HOSMC) is designed. Also, the predictive technique is modified taking into account the large computational delays. The robustness of the controller is verified conducting simulation in MATLAB, the results show good performances in both steady and transient states. An experiment is conducted through a test bench based on dSPACE 1104. The experimental results proved that the proposed controller enhanced the performance of the converter under different parameters variations.

  10. Subclass problem-dependent design for error-correcting output codes.

    PubMed

    Escalera, Sergio; Tax, David M J; Pujol, Oriol; Radeva, Petia; Duin, Robert P W

    2008-06-01

    A common way to model multi-class classification problems is by means of Error-Correcting Output Codes (ECOC). Given a multi-class problem, the ECOC technique designs a code word for each class, where each position of the code identifies the membership of the class for a given binary problem. A classification decision is obtained by assigning the label of the class with the closest code. One of the main requirements of the ECOC design is that the base classifier is capable of splitting each sub-group of classes from each binary problem. However, we can not guarantee that a linear classifier model convex regions. Furthermore, non-linear classifiers also fail to manage some type of surfaces. In this paper, we present a novel strategy to model multi-class classification problems using sub-class information in the ECOC framework. Complex problems are solved by splitting the original set of classes into sub-classes, and embedding the binary problems in a problem-dependent ECOC design. Experimental results show that the proposed splitting procedure yields a better performance when the class overlap or the distribution of the training objects conceil the decision boundaries for the base classifier. The results are even more significant when one has a sufficiently large training size.

  11. The Design of Flux-Corrected Transport (FCT) Algorithms for Structured Grids

    NASA Astrophysics Data System (ADS)

    Zalesak, Steven T.

    A given flux-corrected transport (FCT) algorithm consists of three components: (1) a high order algorithm to which it reduces in smooth parts of the flow; (2) a low order algorithm to which it reduces in parts of the flow devoid of smoothness; and (3) a flux limiter which calculates the weights assigned to the high and low order fluxes in various regions of the flow field. One way of optimizing an FCT algorithm is to optimize each of these three components individually. We present some of the ideas that have been developed over the past 30 years toward this end. These include the use of very high order spatial operators in the design of the high order fluxes, non-clipping flux limiters, the appropriate choice of constraint variables in the critical flux-limiting step, and the implementation of a "failsafe" flux-limiting strategy. This chapter confines itself to the design of FCT algorithms for structured grids, using a finite volume formalism, for this is the area with which the present author is most familiar. The reader will find excellent material on the design of FCT algorithms for unstructured grids, using both finite volume and finite element formalisms, in the chapters by Professors Löhner, Baum, Kuzmin, Turek, and Möller in the present volume.

  12. Exascale Hardware Architectures Working Group

    SciTech Connect

    Hemmert, S; Ang, J; Chiang, P; Carnes, B; Doerfler, D; Leininger, M; Dosanjh, S; Fields, P; Koch, K; Laros, J; Noe, J; Quinn, T; Torrellas, J; Vetter, J; Wampler, C; White, A

    2011-03-15

    relatively immediate, as there is only a small window of opportunity to influence hardware design for 2018 machines. Given the short timeline a firm co-design methodology with vendors is of prime importance.

  13. Analysis and Design of a Gated Envelope Feedback Technique for Automatic Hardware Reconfiguration of RFIC Power Amplifiers, with Full On-Chip Implementation in Gallium Arsenide Heterojunction Bipolar Transistor Technology

    NASA Astrophysics Data System (ADS)

    Constantin, Nicolas Gerard David

    In this doctoral dissertation, the author presents the theoretical foundation, the analysis and design of analog and RF circuits, the chip level implementation, and the experimental validation pertaining to a new radio frequency integrated circuit (RFIC) power amplifier (PA) architecture that is intended for wireless portable transceivers. A method called Gated Envelope Feedback is proposed to allow the automatic hardware reconfiguration of a stand-alone RFIC PA in multiple states for power efficiency improvement purposes. The method uses self-operating and fully integrated circuitry comprising RF power detection, switching and sequential logic, and RF envelope feedback in conjunction with a hardware gating function for triggering and activating current reduction mechanisms as a function of the transmitted RF power level. Because of the critical role that RFIC PA components occupy in modern wireless transceivers, and given the major impact that these components have on the overall RF performances and energy consumption in wireless transceivers, very significant benefits stem from the underlying innovations. The method has been validated through the successful design of a 1.88GHz COMA RFIC PA with automatic hardware reconfiguration capability, using an industry renowned state-of-the-art GaAs HBT semiconductor process developed and owned by Skyworks Solutions, Inc., USA. The circuit techniques that have enabled the successful and full on-chip embodiment of the technique are analyzed in details. The IC implementation is discussed, and experimental results showing significant current reduction upon automatic hardware reconfiguration, gain regulation performances, and compliance with the stringent linearity requirements for COMA transmission demonstrate that the gated envelope feedback method is a viable and promising approach to automatic hardware reconfiguration of RFIC PA's for current reduction purposes. Moreover, in regard to on-chip integration of advanced PA

  14. Circulation control lift generation experiment: Hardware development

    NASA Technical Reports Server (NTRS)

    Panontin, T. L.

    1985-01-01

    A circulation control airfoil and its accompanying hardware were developed to allow the investigation of lift generation that is independent of airfoil angle of attack and relative flow velocity. The test equipment, designed for use in a water tunnel, includes the blown airfoil, the support systems for both flow visualization and airfoil load measurement, and the fluid control system, which utilizes hydraulic technology. The primary design tasks, the selected solutions, and the unforseen problems involved in the development of these individual components of hardware are described.

  15. Human Centered Hardware Modeling and Collaboration

    NASA Technical Reports Server (NTRS)

    Stambolian Damon; Lawrence, Brad; Stelges, Katrine; Henderson, Gena

    2013-01-01

    In order to collaborate engineering designs among NASA Centers and customers, to in clude hardware and human activities from multiple remote locations, live human-centered modeling and collaboration across several sites has been successfully facilitated by Kennedy Space Center. The focus of this paper includes innovative a pproaches to engineering design analyses and training, along with research being conducted to apply new technologies for tracking, immersing, and evaluating humans as well as rocket, vehic le, component, or faci lity hardware utilizing high resolution cameras, motion tracking, ergonomic analysis, biomedical monitoring, wor k instruction integration, head-mounted displays, and other innovative human-system integration modeling, simulation, and collaboration applications.

  16. A CLIPS based personal computer hardware diagnostic system

    NASA Technical Reports Server (NTRS)

    Whitson, George M.

    1991-01-01

    Often the person designated to repair personal computers has little or no knowledge of how to repair a computer. Described here is a simple expert system to aid these inexperienced repair people. The first component of the system leads the repair person through a number of simple system checks such as making sure that all cables are tight and that the dip switches are set correctly. The second component of the system assists the repair person in evaluating error codes generated by the computer. The final component of the system applies a large knowledge base to attempt to identify the component of the personal computer that is malfunctioning. We have implemented and tested our design with a full system to diagnose problems for an IBM compatible system based on the 8088 chip. In our tests, the inexperienced repair people found the system very useful in diagnosing hardware problems.

  17. Design and simulation of e-calendar system circuits

    NASA Astrophysics Data System (ADS)

    Liu, Li-jun

    2015-02-01

    The digital calendar circuits controlled by 80C52 have been designed based on Proteus simulation software. The whole design process is made of three parts: hardware circuits, software programming and software simulation. Finally, it shows that the circuit design of hardware and software is correct through Proteus software simulation. The method of circuit design is systematic and practical, which will provide certain design ideas and reference value for display circuit in the future.

  18. 78 FR 43853 - Designation for the Champaign-Danville, IL Area; Correction to Geographic Area for Champaign...

    Federal Register 2010, 2011, 2012, 2013, 2014

    2013-07-22

    ... Grain Inspection, Packers and Stockyards Administration Designation for the Champaign-Danville, IL Area; Correction to Geographic Area for Champaign-Danville, IL Area AGENCY: Grain Inspection, Packers and... for designation in the Champaign area, which incorrectly omitted grain elevators located outside of...

  19. Method for Automated Bone Shape Correction within Bone Distraction Procedure

    NASA Astrophysics Data System (ADS)

    Blynskiy, F. Yu

    2016-01-01

    The method for automated bone shape correction within bone distraction procedure is presented. High precision deformation angle measurement is provided by the software for X- Ray images processing. Special BDC v.1.0.1. application is designed. The purpose of the BDC is modeling of the bone geometry structure to calculate the appropriate distraction forces. The correction procedure control is realized by the hardware of the distraction system.

  20. Design and Implementation of an Online Auxiliary System for Correcting Japanese Composition

    ERIC Educational Resources Information Center

    Liu, Yuqin; Jiang, Guohai; Han, Lanling; Lin, Mingxing

    2013-01-01

    In language learning, error correction information given by teachers for student compositions is of great value in both teaching and learning. However, in traditional paper-based error correction mode, error correction information is easily lost and cannot be fed back to students systematically. The aim of this research is to provide maximum…

  1. Hardware, software, brainware, noware

    NASA Astrophysics Data System (ADS)

    Scheeline, Alexander

    1995-04-01

    Developments in politics, communications, economics, and population have all had profound effects on the market for analytical chemical instrumentation. This essay examines the assumptions behind the current training of instrumentation scientists and marketing of instruments, and suggests changes in both. The market must be taken to be all of society, not just technically literate society. Cost tradeoffs between hardware and software are context- dependent. Chemometrics allows extraction of information from data that leaves the typical reductionist scientist queasy. And clever chemistry can sometimes obliterate entire markets. The implications of this evolution are explored.

  2. GRASS Hardware Configurations Guide

    DTIC Science & Technology

    1989-03-01

    portability rather than limit users to a single brand of hardware. Within GRASS, there are many processor inten- sive functions. Therefore, processor...Expansion Unit 2,000 558 RR13 2 60 MB. 1 4V tape drive 1.233 SYSI,2 2-User Licene N, C Total $ 26,710 $ 23,290 IhLs erem is not supplij, bv ,un Nficrosyterms...DOS world there are a ’arge number of vendors that can supply you with the basic 386 personal computer that wili work in place of the brand of computer

  3. Mir hardware heritage

    NASA Technical Reports Server (NTRS)

    Portree, David S. F.

    1995-01-01

    The heritage of the major Mir complex hardware elements is described. These elements include Soyuz-TM and Progress-M; the Kvant, Kvant 2, and Kristall modules; and the Mir base block. Configuration changes and major mission events of the Salyut 6, Salyut 7, and Mir multiport space stations are described in detail for the period 1977-1994. A comparative chronology of U.S. and Soviet/Russian manned spaceflight is also given for that period. The 68 illustrations include comparative scale drawings of U.S. and Russian spacecraft as well as sequential drawings depicting missions and mission events.

  4. Characterization and correction of spherical aberration due to glass substrate in the design and fabrication of Fresnel zone lenses.

    PubMed

    Vijayakumar, A; Bhattacharya, S

    2013-08-20

    As with a conventional lens, a Fresnel zone lens (FZL) can be used to image objects at infinity or nearby. In the latter case, the FZL converts a diverging spherical wavefront into a converging spherical wavefront. The glass substrate on which the FZL is fabricated introduces spherical aberration resulting in a shift of the image plane and blurring of the image. Two novel schemes for correction of this spherical aberration are proposed and studied in this paper. To demonstrate them, FZLs are designed with and without aberration correction. They are fabricated using electron beam direct writing. The devices are evaluated and the accuracy of the proposed aberration correction schemes is validated.

  5. Optimization of system parameters for modulator design in x-ray scatter correction using primary modulation

    NASA Astrophysics Data System (ADS)

    Gao, Hewei; Zhu, Lei; Fahrig, Rebecca

    2010-04-01

    The impact of the system parameters of the modulator on X-ray scatter correction using primary modulation is studied and an optimization of the modulator design is presented. Recently, a promising scatter correction method for X-ray computed tomography (CT) that uses a checkerboard pattern of attenuating blockers (primary modulator) placed between the X-ray source and the object has been developed and experimentally verified. The blocker size, d, and the blocker transmission factor, α, are critical to the performance of the primary modulation method. In this work, an error caused by aliasing of primary whose magnitude depends on the choices of d and α, and the scanned object, is set as the object function to be minimized, with constraints including the X-ray focal spot, the physical size of the detector element, and the noise level. The optimization is carried out in two steps. In the first step, d is chosen as small as possible but should meet a lower-bound condition. In the second step, α should be selected to balance the error level in the scatter estimation and the noise level in the reconstructed image. The lower bound of d on our tabletop CT system is 0.83 mm. Numerical simulations suggest 0.6 < α < 0.8 is appropriate. Using a Catphan 600 phantom, a copper modulator (d = 0.89 mm, α = 0.70) expectedly outperforms an aluminum modulator (d = 2.83 mm, α = 0.90). With the aluminum modulator, our method reduces the average error of CT number in selected contrast rods from 371.4 to 25.4 Hounsfield units (HU) and enhances the contrast to noise ratio (CNR) from 10.9 to 17.2; when the copper modulator is used, the error is further reduced to 21.9 HU and the CNR is further increased to 19.2.

  6. Computer program for design of two-dimensional supersonic turbine rotor blades with boundary-layer correction

    NASA Technical Reports Server (NTRS)

    Goldman, L. J.; Scullin, V. J.

    1971-01-01

    A FORTRAN 4 computer program for the design of two-dimensional supersonic rotor blade sections corrected for boundary-layer displacement thickness is presented. The ideal rotor is designed by the method of characteristics to produce vortex flow within the blade passage. The boundary-layer parameters are calculated by Cohen and Reshotoko's method for laminar flow and Sasman and Cresci's method for turbulent flow. The program input consists essentially of the blade surface Mach number distribution and total flow conditions. The primary output is the corrected blade profile and the boundary-layer parameters.

  7. Architectural Support for Detection and Recovery using Hardware Wrappers

    DTIC Science & Technology

    2013-04-01

    SECRYPT 2011, Seville, Spain 2011. 5. A. Baumgarten, M. Steffen, M. Clausman, and J. Zambreno. "A Case Study in Hardware Trojan Design and...AFRL-OSR-VA-TR-2013-0204 Architectural Support for Detection and Recovery using Hardware Wrappers Bhagirath Narahari Rahul...Include area code) 02-26-2013 FINAL REPORT March 1, 2009 - Nov 30, 2012 Architectural Support for Detection and Recovery using Hardware Wrappers

  8. Robustness in Digital Hardware

    NASA Astrophysics Data System (ADS)

    Woods, Roger; Lightbody, Gaye

    The growth in electronics has probably been the equivalent of the Industrial Revolution in the past century in terms of how much it has transformed our daily lives. There is a great dependency on technology whether it is in the devices that control travel (e.g., in aircraft or cars), our entertainment and communication systems, or our interaction with money, which has been empowered by the onset of Internet shopping and banking. Despite this reliance, there is still a danger that at some stage devices will fail within the equipment's lifetime. The purpose of this chapter is to look at the factors causing failure and address possible measures to improve robustness in digital hardware technology and specifically chip technology, giving a long-term forecast that will not reassure the reader!

  9. Ripple FPN reduced algorithm based on temporal high-pass filter and hardware implementation

    NASA Astrophysics Data System (ADS)

    Li, Yiyang; Li, Shuo; Zhang, Zhipeng; Jin, Weiqi; Wu, Lei; Jin, Minglei

    2016-11-01

    Cooled infrared detector arrays always suffer from undesired Ripple Fixed-Pattern Noise (FPN) when observe the scene of sky. The Ripple Fixed-Pattern Noise seriously affect the imaging quality of thermal imager, especially for small target detection and tracking. It is hard to eliminate the FPN by the Calibration based techniques and the current scene-based nonuniformity algorithms. In this paper, we present a modified space low-pass and temporal high-pass nonuniformity correction algorithm using adaptive time domain threshold (THP&GM). The threshold is designed to significantly reduce ghosting artifacts. We test the algorithm on real infrared in comparison to several previously published methods. This algorithm not only can effectively correct common FPN such as Stripe, but also has obviously advantage compared with the current methods in terms of detail protection and convergence speed, especially for Ripple FPN correction. Furthermore, we display our architecture with a prototype built on a Xilinx Virtex-5 XC5VLX50T field-programmable gate array (FPGA). The hardware implementation of the algorithm based on FPGA has two advantages: (1) low resources consumption, and (2) small hardware delay (less than 20 lines). The hardware has been successfully applied in actual system.

  10. Magnetic Field Apparatus (MFA) Hardware Test

    NASA Technical Reports Server (NTRS)

    Anderson, Ken; Boody, April; Reed, Dave; Wang, Chung; Stuckey, Bob; Cox, Dave

    1999-01-01

    The objectives of this study are threefold: (1) Provide insight into water delivery in microgravity and determine optimal germination paper wetting for subsequent seed germination in microgravity; (2) Observe the behavior of water exposed to a strong localized magnetic field in microgravity; and (3) Simulate the flow of fixative (using water) through the hardware. The Magnetic Field Apparatus (MFA) is a new piece of hardware slated to fly on the Space Shuttle in early 2001. MFA is designed to expose plant tissue to magnets in a microgravity environment, deliver water to the plant tissue, record photographic images of plant tissue, and deliver fixative to the plant tissue.

  11. Hardware accelerator for genomic sequence alignment.

    PubMed

    Chiang, Jason; Studniberg, Michael; Shaw, Jack; Seto, Shaw; Truong, Kevin

    2006-01-01

    To infer homology and subsequently gene function, the Smith-Waterman algorithm is used to find the optimal local alignment between two sequences. When searching sequence databases that may contain billions of sequences, this algorithm becomes computationally expensive. Consequently, in this paper, we focused on accelerating the Smith-Waterman algorithm by modifying the computationally repeated portion of the algorithm by FPGA hardware custom instructions. These simple modifications accelerated the algorithm runtime by an average of 287% compared to the pure software implementation. Therefore, further design of FPGA accelerated hardware offers a promising direction to seeking runtime improvement of genomic database searching.

  12. Magnetic Field Apparatus (MFA) Hardware Test

    NASA Technical Reports Server (NTRS)

    Anderson, Ken; Boody, April; Reed, Dave; Wang, Chung; Stuckey, Bob; Cox, Dave

    1999-01-01

    The objectives of this study are threefold: (1) Provide insight into water delivery in microgravity and determine optimal germination paper wetting for subsequent seed germination in microgravity; (2) Observe the behavior of water exposed to a strong localized magnetic field in microgravity; and (3) Simulate the flow of fixative (using water) through the hardware. The Magnetic Field Apparatus (MFA) is a new piece of hardware slated to fly on the Space Shuttle in early 2001. MFA is designed to expose plant tissue to magnets in a microgravity environment, deliver water to the plant tissue, record photographic images of plant tissue, and deliver fixative to the plant tissue.

  13. Codem: software/hardware codesign for embedded multicore systems supporting hardware services

    NASA Astrophysics Data System (ADS)

    Wang, Chao; Li, Xi; Zhou, Xuehai; Nedjah, Nadia; Wang, Aili

    2015-01-01

    Efficient software/hardware codesign is posing significant challenges to embedded systems. This paper proposes Codem, a software/hardware codesign flow for embedded systems, which models both processors and Intellectual Property (IP) cores as services. Tasks are regarded as abstract instructions which can be scheduled to IP cores for parallel execution automatically. In order to guide the hardware implementations of the hot spot functions, this paper incorporates a novel hot spot-based profiling technique to observe the hot spot functions while the application is being simulated. Furthermore, based on the hot spot of various applications, an adaptive mapping algorithm is presented to partition the application into multiple software/hardware tasks. We test the profiling-based design flow with classic Sort applications. Experimental results demonstrate that Codem can efficiently help researchers to identify the hot spots, and also outline a new direction to combine profiling techniques with state-of-the-art reconfigurable computing platforms for specific task acceleration.

  14. Structural design and analysis for an ultra low CTE optical bench for the Hubble Space Telescope corrective optics

    NASA Technical Reports Server (NTRS)

    Neam, Douglas C.; Gerber, John D.

    1992-01-01

    The stringent stability requirements of the Corrective Optics Space Telescope Axial Replacement (COSTAR) necessitates a Deployable Optical Bench (DOB) with both a low CTE and high resonant frequency. The DOB design consists of a monocoque thin shell structure which marries metallic machined parts with graphite epoxy formed structure. Structural analysis of the DOB has been integrated into the laminate design and optimization process. Also, the structural analytical results are compared with vibration and thermal test data to assess the reliability of the analysis.

  15. Hardware multiplier processor

    DOEpatents

    Pierce, P.E.

    A hardware processor is disclosed which in the described embodiment is a memory mapped multiplier processor that can operate in parallel with a 16 bit microcomputer. The multiplier processor decodes the address bus to receive specific instructions so that in one access it can write and automatically perform single or double precision multiplication involving a number written to it with or without addition or subtraction with a previously stored number. It can also, on a single read command automatically round and scale a previously stored number. The multiplier processor includes two concatenated 16 bit multiplier registers, two 16 bit concatenated 16 bit multipliers, and four 16 bit product registers connected to an internal 16 bit data bus. A high level address decoder determines when the multiplier processor is being addressed and first and second low level address decoders generate control signals. In addition, certain low order address lines are used to carry uncoded control signals. First and second control circuits coupled to the decoders generate further control signals and generate a plurality of clocking pulse trains in response to the decoded and address control signals.

  16. Hardware multiplier processor

    DOEpatents

    Pierce, Paul E.

    1986-01-01

    A hardware processor is disclosed which in the described embodiment is a memory mapped multiplier processor that can operate in parallel with a 16 bit microcomputer. The multiplier processor decodes the address bus to receive specific instructions so that in one access it can write and automatically perform single or double precision multiplication involving a number written to it with or without addition or subtraction with a previously stored number. It can also, on a single read command automatically round and scale a previously stored number. The multiplier processor includes two concatenated 16 bit multiplier registers, two 16 bit concatenated 16 bit multipliers, and four 16 bit product registers connected to an internal 16 bit data bus. A high level address decoder determines when the multiplier processor is being addressed and first and second low level address decoders generate control signals. In addition, certain low order address lines are used to carry uncoded control signals. First and second control circuits coupled to the decoders generate further control signals and generate a plurality of clocking pulse trains in response to the decoded and address control signals.

  17. [Hardware and software for X-ray therapy planning].

    PubMed

    Zhizniakov, A L; Semenov, S I; Sushkova, L T; Troitskii, D P; Chirkov, K V

    2007-01-01

    Hardware, circuitry, and software suggested in this work make it possible to use the SLS-9 X-ray simulator for classical and computer tomographic imaging. The suggested hardware and software can be used as a basis for designing special-purpose tomographic systems.

  18. Teaching Robotics Software with the Open Hardware Mobile Manipulator

    ERIC Educational Resources Information Center

    Vona, M.; Shekar, N. H.

    2013-01-01

    The "open hardware mobile manipulator" (OHMM) is a new open platform with a unique combination of features for teaching robotics software and algorithms. On-board low- and high-level processors support real-time embedded programming and motor control, as well as higher-level coding with contemporary libraries. Full hardware designs and…

  19. The Microcomputer in the Library: II. Hardware and Operating Systems.

    ERIC Educational Resources Information Center

    Leggate, Peter; Dyer, Hilary

    1985-01-01

    This second in a series of six articles introducing microcomputer applications in smaller libraries describes the main microcomputer hardware components--processors, internal and external memory, buses, printers, communications, hardware. Importance of ergonomic factors in equipment design, multi-user and network configurations, and the role of…

  20. The Microcomputer in the Library: II. Hardware and Operating Systems.

    ERIC Educational Resources Information Center

    Leggate, Peter; Dyer, Hilary

    1985-01-01

    This second in a series of six articles introducing microcomputer applications in smaller libraries describes the main microcomputer hardware components--processors, internal and external memory, buses, printers, communications, hardware. Importance of ergonomic factors in equipment design, multi-user and network configurations, and the role of…

  1. Teaching Robotics Software with the Open Hardware Mobile Manipulator

    ERIC Educational Resources Information Center

    Vona, M.; Shekar, N. H.

    2013-01-01

    The "open hardware mobile manipulator" (OHMM) is a new open platform with a unique combination of features for teaching robotics software and algorithms. On-board low- and high-level processors support real-time embedded programming and motor control, as well as higher-level coding with contemporary libraries. Full hardware designs and…

  2. Hardware Removal in Craniomaxillofacial Trauma

    PubMed Central

    Cahill, Thomas J.; Gandhi, Rikesh; Allori, Alexander C.; Marcus, Jeffrey R.; Powers, David; Erdmann, Detlev; Hollenbeck, Scott T.; Levinson, Howard

    2015-01-01

    Background Craniomaxillofacial (CMF) fractures are typically treated with open reduction and internal fixation. Open reduction and internal fixation can be complicated by hardware exposure or infection. The literature often does not differentiate between these 2 entities; so for this study, we have considered all hardware exposures as hardware infections. Approximately 5% of adults with CMF trauma are thought to develop hardware infections. Management consists of either removing the hardware versus leaving it in situ. The optimal approach has not been investigated. Thus, a systematic review of the literature was undertaken and a resultant evidence-based approach to the treatment and management of CMF hardware infections was devised. Materials and Methods A comprehensive search of journal articles was performed in parallel using MEDLINE, Web of Science, and ScienceDirect electronic databases. Keywords and phrases used were maxillofacial injuries; facial bones; wounds and injuries; fracture fixation, internal; wound infection; and infection. Our search yielded 529 articles. To focus on CMF fractures with hardware infections, the full text of English-language articles was reviewed to identify articles focusing on the evaluation and management of infected hardware in CMF trauma. Each article’s reference list was manually reviewed and citation analysis performed to identify articles missed by the search strategy. There were 259 articles that met the full inclusion criteria and form the basis of this systematic review. The articles were rated based on the level of evidence. There were 81 grade II articles included in the meta-analysis. Result Our meta-analysis revealed that 7503 patients were treated with hardware for CMF fractures in the 81 grade II articles. Hardware infection occurred in 510 (6.8%) of these patients. Of those infections, hardware removal occurred in 264 (51.8%) patients; hardware was left in place in 166 (32.6%) patients; and in 80 (15.6%) cases

  3. Economic impact of syndesmosis hardware removal.

    PubMed

    Lalli, Trapper A J; Matthews, Leslie J; Hanselman, Andrew E; Hubbard, David F; Bramer, Michelle A; Santrock, Robert D

    2015-09-01

    Ankle syndesmosis injuries are commonly seen with 5-10% of sprains and 10% of ankle fractures involving injury to the ankle syndesmosis. Anatomic reduction has been shown to be the most important predictor of clinical outcomes. Optimal surgical management has been a subject of debate in the literature. The method of fixation, number of screws, screw size, and number of cortices are all controversial. Postoperative hardware removal has also been widely debated in the literature. Some surgeons advocate for elective hardware removal prior to resuming full weightbearing. Returning to the operating room for elective hardware removal results in increased cost to the patient, potential for infection or complication(s), and missed work days for the patient. Suture button devices and bioabsorbable screw fixation present other options, but cortical screw fixation remains the gold standard. This retrospective review was designed to evaluate the economic impact of a second operative procedure for elective removal of 3.5mm cortical syndesmosis screws. Two hundred and two patients with ICD-9 code for "open treatment of distal tibiofibular joint (syndesmosis) disruption" were identified. The medical records were reviewed for those who underwent elective syndesmosis hardware removal. The primary outcome measurements included total hospital billing charges and total hospital billing collection. Secondary outcome measurements included average individual patient operative costs and average operating room time. Fifty-six patients were included in the study. Our institution billed a total of $188,271 (USD) and collected $106,284 (55%). The average individual patient operating room cost was $3579. The average operating room time was 67.9 min. To the best of our knowledge, no study has previously provided cost associated with syndesmosis hardware removal. Our study shows elective syndesmosis hardware removal places substantial economic burden on both the patient and the healthcare system

  4. CHeCS Commanding Hardware

    NASA Technical Reports Server (NTRS)

    Moore, Jamie

    2010-01-01

    This slide presentation reviews the Crew Health Care System (CHeCS) commanding hardware. It includes information on the hardware status, commanding plan, and command training status with specific information the EV-CPDS 2 and 3, TEPC, MEC, and T2

  5. Design-corrected variation by centre in mortality reduction in the ERSPC randomised prostate cancer screening trial.

    PubMed

    Hakama, Matti; Moss, Sue M; Stenman, Ulf-Hakan; Roobol, Monique J; Zappa, Marco; Carlsson, Sigrid; Randazzo, Marco; Nelen, Vera; Hugosson, Jonas

    2017-06-01

    Objectives To calculate design-corrected estimates of the effect of screening on prostate cancer mortality by centre in the European Randomised Study of Screening for Prostate Cancer (ERSPC). Setting The ERSPC has shown a 21% reduction in prostate cancer mortality in men invited to screening with follow-up truncated at 13 years. Centres either used pre-consent randomisation (effectiveness design) or post-consent randomisation (efficacy design). Methods In six centres (three effectiveness design, three efficacy design) with follow-up until the end of 2010, or maximum 13 years, the effect of screening was estimated as both effectiveness (mortality reduction in the target population) and efficacy (reduction in those actually screened). Results The overall crude prostate cancer mortality risk ratio in the intervention arm vs control arm for the six centres was 0.79 ranging from a 14% increase to a 38% reduction. The risk ratio was 0.85 in centres with effectiveness design and 0.73 in those with efficacy design. After correcting for design, overall efficacy was 27%, 24% in pre-consent and 29% in post-consent centres, ranging between a 12% increase and a 52% reduction. Conclusion The estimated overall effect of screening in attenders (efficacy) was a 27% reduction in prostate cancer mortality at 13 years' follow-up. The variation in efficacy between centres was greater than the range in risk ratio without correction for design. The centre-specific variation in the mortality reduction could not be accounted for by the randomisation method.

  6. Flight Avionics Hardware Roadmap

    NASA Technical Reports Server (NTRS)

    Some, Raphael; Goforth, Monte; Chen, Yuan; Powell, Wes; Paulick, Paul; Vitalpur, Sharada; Buscher, Deborah; Wade, Ray; West, John; Redifer, Matt; hide

    2014-01-01

    The Avionics Technology Roadmap takes an 80% approach to technology investment in spacecraft avionics. It delineates a suite of technologies covering foundational, component, and subsystem-levels, which directly support 80% of future NASA space mission needs. The roadmap eschews high cost, limited utility technologies in favor of lower cost, and broadly applicable technologies with high return on investment. The roadmap is also phased to support future NASA mission needs and desires, with a view towards creating an optimized investment portfolio that matures specific, high impact technologies on a schedule that matches optimum insertion points of these technologies into NASA missions. The roadmap looks out over 15+ years and covers some 114 technologies, 58 of which are targeted for TRL6 within 5 years, with 23 additional technologies to be at TRL6 by 2020. Of that number, only a few are recommended for near term investment: 1. Rad Hard High Performance Computing 2. Extreme temperature capable electronics and packaging 3. RFID/SAW-based spacecraft sensors and instruments 4. Lightweight, low power 2D displays suitable for crewed missions 5. Radiation tolerant Graphics Processing Unit to drive crew displays 6. Distributed/reconfigurable, extreme temperature and radiation tolerant, spacecraft sensor controller and sensor modules 7. Spacecraft to spacecraft, long link data communication protocols 8. High performance and extreme temperature capable C&DH subsystem In addition, the roadmap team recommends several other activities that it believes are necessary to advance avionics technology across NASA: center dot Engage the OCT roadmap teams to coordinate avionics technology advances and infusion into these roadmaps and their mission set center dot Charter a team to develop a set of use cases for future avionics capabilities in order to decouple this roadmap from specific missions center dot Partner with the Software Steering Committee to coordinate computing hardware

  7. Lunar and Martian hardware commonality

    NASA Technical Reports Server (NTRS)

    Davis, Hubert P.; Johnson, Robert E.; Phillips, Paul G.; Spear, Donald S.; Stump, William R.; Williams, Franklin U.

    1986-01-01

    A number of different hardware elements were examined for possible Moon/Mars program commonality. These include manned landers; cargo landers, a trans-Mars injection (TMI) stage, traverse vehicles, unmanned surface rovers, habitation modules, and power supplies. Preliminary analysis indicates that it is possible to build a common two-stage manned lander. A single-stage, reusable lander may be practical for the lunar cast, but much less so for the Martian case, and commonality may therefore exist only at the subsystem level. A modified orbit transfer vehicle was examined as a potential cargo lander. Potential cargoes to various destinations were calculated for a Shuttle external tank sized TMI stage. A nuclear powered, long range traverse vehicle was conceptually designed and commonality is considered feasible. Short range, unmanned rovers can be made common without great effort. A surface habitation module may be difficult to make common due to difficulties in landing certain shapes on the Martian surface with aerobraking landers. Common nuclear power sources appear feasible. High temperature radiators appear easy to make common. Low temperature radiators may be difficult to make common. In most of these cases, Martian requirements determine the design.

  8. Experiences with the design and construction of wideband spectral line and pulsar instrumentation with CASPER hardware and software: the digital backend system

    NASA Astrophysics Data System (ADS)

    Ford, John M.; Prestage, Richard M.; Bloss, Marty

    2014-07-01

    NRAO recently built the Digital Backend System (DIBAS) for the Shanghai Astronomical Observatory's (SHAO) 65 meter radio telescope. The machine was created from the design of the VErsatile GBT Astronomical Spec- trometer (VEGAS) by adding pulsar search and timing modes to complement the VEGAS spectral line modes. Together the pulsar and spectral line modes cover all anticipated science requirements for the 65 meter, except VLBI. This paper introduces the radio telescope backend and explores the project management challenges of the project. These include managing the high level of reuse of existing FPGA designs, an aggressive schedule for the project, and the software design constraints imposed on the project.

  9. Fine figure correction and other applications using novel MRF fluid designed for ultra-low roughness

    NASA Astrophysics Data System (ADS)

    Maloney, Chris; Oswald, Eric S.; Dumas, Paul

    2015-10-01

    An increasing number of technologies require ultra-low roughness (ULR) surfaces. Magnetorheological Finishing (MRF) is one of the options for meeting the roughness specifications for high-energy laser, EUV and X-ray applications. A novel MRF fluid, called C30, has been developed to finish surfaces to ULR. This novel MRF fluid is able to achieve <1.5Å RMS roughness on fused silica and other materials, but has a lower material removal rate with respect to other MRF fluids. As a result of these properties, C30 can also be used for applications in addition to finishing ULR surfaces. These applications include fine figure correction, figure correcting extremely soft materials and removing cosmetic defects. The effectiveness of these new applications is explored through experimental data. The low removal rate of C30 gives MRF the capability to fine figure correct low amplitude errors that are usually difficult to correct with higher removal rate fluids. The ability to figure correct extremely soft materials opens up MRF to a new realm of materials that are difficult to polish. C30 also offers the ability to remove cosmetic defects that often lead to failure during visual quality inspections. These new applications for C30 expand the niche in which MRF is typically used for.

  10. The design of the control algorithm for corrective manufacturing of 5 axis machining centre

    NASA Astrophysics Data System (ADS)

    Beneš, J.; Procháska, F.; Matoušek, O.

    2016-11-01

    The work deals with the creation of correction data when generating spherical and aspherical surfaces. Generation is performed on the converted 5-axis milling machine, for which it is necessary to generate control programs. In the process of generating surfaces may be formed random errors. Hence the need to measure workpieces, and errors corrected. There is thus solved a measurement of generated surface on coordinate measuring machine Mitutoyo LEGEX 744 and draft methods of data processing by using polynomial of nth order. The measured data are processed by Matlab, specifically CFTool module. This method is further tested and subsequently the experiment evaluated.

  11. Exercise Countermeasure Hardware Evolution on ISS: The First Decade.

    PubMed

    Korth, Deborah W

    2015-12-01

    The hardware systems necessary to support exercise countermeasures to the deconditioning associated with microgravity exposure have evolved and improved significantly during the first decade of the International Space Station (ISS), resulting in both new types of hardware and enhanced performance capabilities for initial hardware items. The original suite of countermeasure hardware supported the first crews to arrive on the ISS and the improved countermeasure system delivered in later missions continues to serve the astronauts today with increased efficacy. Due to aggressive hardware development schedules and constrained budgets, the initial approach was to identify existing spaceflight-certified exercise countermeasure equipment, when available, and modify it for use on the ISS. Program management encouraged the use of commercial-off-the-shelf (COTS) hardware, or hardware previously developed (heritage hardware) for the Space Shuttle Program. However, in many cases the resultant hardware did not meet the additional requirements necessary to support crew health maintenance during long-duration missions (3 to 12 mo) and anticipated future utilization activities in support of biomedical research. Hardware development was further complicated by performance requirements that were not fully defined at the outset and tended to evolve over the course of design and fabrication. Modifications, ranging from simple to extensive, were necessary to meet these evolving requirements in each case where heritage hardware was proposed. Heritage hardware was anticipated to be inherently reliable without the need for extensive ground testing, due to its prior positive history during operational spaceflight utilization. As a result, developmental budgets were typically insufficient and schedules were too constrained to permit long-term evaluation of dedicated ground-test units ("fleet leader" type testing) to identify reliability issues when applied to long-duration use. In most cases

  12. Using the FLUKA Monte Carlo Code to Simulate the Interactions of Ionizing Radiation with Matter to Assist and Aid Our Understanding of Ground Based Accelerator Testing, Space Hardware Design, and Secondary Space Radiation Environments

    NASA Technical Reports Server (NTRS)

    Reddell, Brandon

    2015-01-01

    Designing hardware to operate in the space radiation environment is a very difficult and costly activity. Ground based particle accelerators can be used to test for exposure to the radiation environment, one species at a time, however, the actual space environment cannot be duplicated because of the range of energies and isotropic nature of space radiation. The FLUKA Monte Carlo code is an integrated physics package based at CERN that has been under development for the last 40+ years and includes the most up-to-date fundamental physics theory and particle physics data. This work presents an overview of FLUKA and how it has been used in conjunction with ground based radiation testing for NASA and improve our understanding of secondary particle environments resulting from the interaction of space radiation with matter.

  13. Design and mathematical analysis of a three-mirror X-ray telescope based on ATM S-056 X-ray telescope hardware

    NASA Technical Reports Server (NTRS)

    Foreman, J. W., Jr.; Cardone, J. M.

    1973-01-01

    The mathematical design of the aspheric third mirror for the three-mirror X-ray telescope (TMXRT) is presented, along with the imaging characteristics of the telescope obtained by a ray trace analysis. The present design effort has been directed entirely toward obtaining an aspheric third mirror which will be compatible with existing S-056 paraboloidal-hyperboloidal mirrors. This compatability will facilitate the construction of a prototype model of the TMXRT, since it will only be necessary to fabricate one new mirror in order to obtain a working model.

  14. Computer hardware for radiologists: Part I.

    PubMed

    Indrajit, Ik; Alam, A

    2010-08-01

    Computers are an integral part of modern radiology practice. They are used in different radiology modalities to acquire, process, and postprocess imaging data. They have had a dramatic influence on contemporary radiology practice. Their impact has extended further with the emergence of Digital Imaging and Communications in Medicine (DICOM), Picture Archiving and Communication System (PACS), Radiology information system (RIS) technology, and Teleradiology. A basic overview of computer hardware relevant to radiology practice is presented here. The key hardware components in a computer are the motherboard, central processor unit (CPU), the chipset, the random access memory (RAM), the memory modules, bus, storage drives, and ports. The personnel computer (PC) has a rectangular case that contains important components called hardware, many of which are integrated circuits (ICs). The fiberglass motherboard is the main printed circuit board and has a variety of important hardware mounted on it, which are connected by electrical pathways called "buses". The CPU is the largest IC on the motherboard and contains millions of transistors. Its principal function is to execute "programs". A Pentium(®) 4 CPU has transistors that execute a billion instructions per second. The chipset is completely different from the CPU in design and function; it controls data and interaction of buses between the motherboard and the CPU. Memory (RAM) is fundamentally semiconductor chips storing data and instructions for access by a CPU. RAM is classified by storage capacity, access speed, data rate, and configuration.

  15. Computer hardware for radiologists: Part I

    PubMed Central

    Indrajit, IK; Alam, A

    2010-01-01

    Computers are an integral part of modern radiology practice. They are used in different radiology modalities to acquire, process, and postprocess imaging data. They have had a dramatic influence on contemporary radiology practice. Their impact has extended further with the emergence of Digital Imaging and Communications in Medicine (DICOM), Picture Archiving and Communication System (PACS), Radiology information system (RIS) technology, and Teleradiology. A basic overview of computer hardware relevant to radiology practice is presented here. The key hardware components in a computer are the motherboard, central processor unit (CPU), the chipset, the random access memory (RAM), the memory modules, bus, storage drives, and ports. The personnel computer (PC) has a rectangular case that contains important components called hardware, many of which are integrated circuits (ICs). The fiberglass motherboard is the main printed circuit board and has a variety of important hardware mounted on it, which are connected by electrical pathways called “buses”. The CPU is the largest IC on the motherboard and contains millions of transistors. Its principal function is to execute “programs”. A Pentium® 4 CPU has transistors that execute a billion instructions per second. The chipset is completely different from the CPU in design and function; it controls data and interaction of buses between the motherboard and the CPU. Memory (RAM) is fundamentally semiconductor chips storing data and instructions for access by a CPU. RAM is classified by storage capacity, access speed, data rate, and configuration. PMID:21042437

  16. Transistor Level Circuit Experiments using Evolvable Hardware

    NASA Technical Reports Server (NTRS)

    Stoica, A.; Zebulum, R. S.; Keymeulen, D.; Ferguson, M. I.; Daud, Taher; Thakoor, A.

    2005-01-01

    The Jet Propulsion Laboratory (JPL) performs research in fault tolerant, long life, and space survivable electronics for the National Aeronautics and Space Administration (NASA). With that focus, JPL has been involved in Evolvable Hardware (EHW) technology research for the past several years. We have advanced the technology not only by simulation and evolution experiments, but also by designing, fabricating, and evolving a variety of transistor-based analog and digital circuits at the chip level. EHW refers to self-configuration of electronic hardware by evolutionary/genetic search mechanisms, thereby maintaining existing functionality in the presence of degradations due to aging, temperature, and radiation. In addition, EHW has the capability to reconfigure itself for new functionality when required for mission changes or encountered opportunities. Evolution experiments are performed using a genetic algorithm running on a DSP as the reconfiguration mechanism and controlling the evolvable hardware mounted on a self-contained circuit board. Rapid reconfiguration allows convergence to circuit solutions in the order of seconds. The paper illustrates hardware evolution results of electronic circuits and their ability to perform under 230 C temperature as well as radiations of up to 250 kRad.

  17. Support for Diagnosis of Custom Computer Hardware

    NASA Technical Reports Server (NTRS)

    Molock, Dwaine S.

    2008-01-01

    The Coldfire SDN Diagnostics software is a flexible means of exercising, testing, and debugging custom computer hardware. The software is a set of routines that, collectively, serve as a common software interface through which one can gain access to various parts of the hardware under test and/or cause the hardware to perform various functions. The routines can be used to construct tests to exercise, and verify the operation of, various processors and hardware interfaces. More specifically, the software can be used to gain access to memory, to execute timer delays, to configure interrupts, and configure processor cache, floating-point, and direct-memory-access units. The software is designed to be used on diverse NASA projects, and can be customized for use with different processors and interfaces. The routines are supported, regardless of the architecture of a processor that one seeks to diagnose. The present version of the software is configured for Coldfire processors on the Subsystem Data Node processor boards of the Solar Dynamics Observatory. There is also support for the software with respect to Mongoose V, RAD750, and PPC405 processors or their equivalents.

  18. Onboard utilization of ground control points for image correction. Volume 4: Correlation analysis software design

    NASA Technical Reports Server (NTRS)

    1981-01-01

    The software utilized for image correction accuracy measurement is described. The correlation analysis program is written to allow the user various tools to analyze different correlation algorithms. The algorithms were tested using LANDSAT imagery in two different spectral bands. Three classification algorithms are implemented.

  19. Design and commissioning of an aberration-corrected ultrafast spin-polarized low energy electron microscope with multiple electron sources.

    PubMed

    Wan, Weishi; Yu, Lei; Zhu, Lin; Yang, Xiaodong; Wei, Zheng; Liu, Jefferson Zhe; Feng, Jun; Kunze, Kai; Schaff, Oliver; Tromp, Ruud; Tang, Wen-Xin

    2016-12-27

    We describe the design and commissioning of a novel aberration-corrected low energy electron microscope (AC-LEEM). A third magnetic prism array (MPA) is added to the standard AC-LEEM with two prism arrays, allowing the incorporation of an ultrafast spin-polarized electron source alongside the standard cold field emission electron source, without degrading spatial resolution. The high degree of symmetries of the AC-LEEM are utilized while we design the electron optics of the ultrafast spin-polarized electron source, so as to minimize the deleterious effect of time broadening, while maintaining full control of electron spin. A spatial resolution of 2nm and temporal resolution of 10ps (ps) are expected in the future time resolved aberration-corrected spin-polarized LEEM (TR-AC-SPLEEM). The commissioning of the three-prism AC-LEEM has been successfully finished with the cold field emission source, with a spatial resolution below 2nm.

  20. Manipulation hardware for microgravity research

    SciTech Connect

    Herndon, J.N.; Glassell, R.L.; Butler, P.L.; Williams, D.M. ); Rohn, D.A. . Lewis Research Center); Miller, J.H. )

    1990-01-01

    The establishment of permanent low earth orbit occupation on the Space Station Freedom will present new opportunities for the introduction of productive flexible automation systems into the microgravity environment of space. The need for robust and reliable robotic systems to support experimental activities normally intended by astronauts will assume great importance. Many experimental modules on the space station are expected to require robotic systems for ongoing experimental operations. When implementing these systems, care must be taken not to introduce deleterious effects on the experiments or on the space station itself. It is important to minimize the acceleration effects on the experimental items being handled while also minimizing manipulator base reaction effects on adjacent experiments and on the space station structure. NASA Lewis Research Center has been performing research on these manipulator applications, focusing on improving the basic manipulator hardware, as well as developing improved manipulator control algorithms. By utilizing the modular manipulator concepts developed during the Laboratory Telerobotic Manipulator program, Oak Ridge National Laboratory has developed an experimental testbed system called the Microgravity Manipulator, incorporating two pitch-yaw modular positioners to provide a 4 dof experimental manipulator arm. A key feature in the design for microgravity manipulation research was the use of traction drives for torque transmission in the modular pitch-yaw differentials.

  1. Hardware problems encountered in solar heating and cooling systems

    NASA Technical Reports Server (NTRS)

    Cash, M.

    1978-01-01

    Numerous problems in the design, production, installation, and operation of solar energy systems are discussed. Described are hardware problems, which range from simple to obscure and complex, and their resolution.

  2. New hardware realizations of nonrecursive digital filters.

    NASA Technical Reports Server (NTRS)

    Zohar, S.

    1973-01-01

    Analysis of the bit-level operations involved in the convolution realizing a nonrecursive digital filter leads to hardware designs of digital filters based on the operation of counting. Two distinct designs are outlined: the first one is capable of very high speed but is rather expensive; the second is quite slow but has the advantages of low cost and high flexibility. The basic designs considered utilize fixed-point representation for the data and filter coefficients. Variants allowing floating-point representation of the coefficients are also described.

  3. Explosive-actuated valve design concept that eliminates blow-by. [for the TOPS spacecraft trajectory correction propulsion subsystem

    NASA Technical Reports Server (NTRS)

    Hagler, R., Jr.

    1974-01-01

    A method of evaluating the normally open normally closed, explosive actuated valves that were selected for use in the trajectory correction propulsion subsystem of the Thermoelectric Outer Planet Spacecraft (TOPS) program is presented. The design philosophy which determined the requirements for highly reliable valves that could provide the performance capability during long duration (10 year) missions to the outer planets is discussed. The techniques that were used to fabricate the valves and manifold ten valves into an assembly with the capability of five propellant-flow initiation/isolation sequences are described. The test program, which was conducted to verify valve design requirements, is outlined and the more significant results are shown.

  4. Making the right hardware choices.

    PubMed

    DeGaspari, John

    2011-12-01

    A rapid expansion of computing hardware options is paving the way to better patient engagement and increased productivity. For that to happen, CIOs must balance their choices against workflow issues, infrastructure requirements, and budgetary constraints.

  5. NDAS Hardware Translation Layer Development

    NASA Technical Reports Server (NTRS)

    Nazaretian, Ryan N.; Holladay, Wendy T.

    2011-01-01

    The NASA Data Acquisition System (NDAS) project is aimed to replace all DAS software for NASA s Rocket Testing Facilities. There must be a software-hardware translation layer so the software can properly talk to the hardware. Since the hardware from each test stand varies, drivers for each stand have to be made. These drivers will act more like plugins for the software. If the software is being used in E3, then the software should point to the E3 driver package. If the software is being used at B2, then the software should point to the B2 driver package. The driver packages should also be filled with hardware drivers that are universal to the DAS system. For example, since A1, A2, and B2 all use the Preston 8300AU signal conditioners, then the driver for those three stands should be the same and updated collectively.

  6. Capabilities and constraints of typical space flight hardware

    NASA Technical Reports Server (NTRS)

    Koudelka, John M.

    1993-01-01

    The Space Experiments Division is in the business of performing ground based low gravity testing and designing experiment hardware for space flight on the Space Shuttle and in the future, Space Station Freedom. As witnessed in combustion work, the reduction of gravity brings forward previously negligible processes and parameters. In a similar manner, the design of experiments for microgravity operation aboard the Space Shuttle must consider parameters that are often not factors for laboratory hardware.

  7. Fifty Years of Observing Hardware and Human Behavior

    NASA Technical Reports Server (NTRS)

    McMann, Joe

    2011-01-01

    During this half-day workshop, Joe McMann presented the lessons learned during his 50 years of experience in both industry and government, which included all U.S. manned space programs, from Mercury to the ISS. He shared his thoughts about hardware and people and what he has learned from first-hand experience. Included were such topics as design, testing, design changes, development, failures, crew expectations, hardware, requirements, and meetings.

  8. Hardware Index to Permutation Converter

    DTIC Science & Technology

    2012-05-01

    Hardware Index to Permutation Converter J. T. Butler T. Sasao Department of Electrical and Computer Engineering Department of Computer Science...generates a permutation in response to an index. Since there are n! n-element permutations , the index ranges from 0 to n! − 1. Such a circuit is needed...in the hardware implementation of unique- permutation hash functions to specify how parallel machines interact through a shared memory. Such a circuit

  9. PEP-II Hardware Reliability

    SciTech Connect

    Allen, C. W.

    2005-04-28

    Hardware reliability takes on special importance in large accelerator facilities intended to work as factories; i.e., when they are expected to deliver design performance for extended periods of time. The PEP-II B-Factory at SLAC is such a facility. In this paper, we summarize PEP-II reliability statistics from the first four years of production running. The four running periods extended from January 12 through October 31, 2000, from February 4, 2001 through June 30, 2002, from November 15, 2002 through June 30, 2003, and from September 9, 2003 through July 31, 2004. These four periods are designated Runs 1, 2, 3, and 4 in the discussion and tables presented in the paper. The first four runs encompassed 30,359 hours. During this time, PEP-II was delivering luminosity to the BaBar detector 57.9 percent of the time. In addition, 5.3 percent of the time was used for scheduled dedicated machine development work, and 4.5 percent was scheduled off for maintenance, installations, or safety checks. Injection and tuning accounted for 19.9 percent. The remaining 12.4 percent was lost due to malfunctions. During this time period, a total of 9701 malfunctions were reported, but most did not interrupt the running program. The unscheduled down time, a total of 3883 hours, was attributed to 1724 of these malfunctions. Mean Time to Fail (MTTF) and Mean Time to Repair (MTTR) are presented for each of the major subsystems, and long-term availability trends are discussed.

  10. Design and flight experience with a digital fly-by-wire control system using Apollo guidance system hardware on an F-8 aircraft.

    NASA Technical Reports Server (NTRS)

    Deets, D. A.; Szalai, K. J.

    1972-01-01

    This paper discusses the design and initial flight tests of the first digital fly-by-wire system to be flown in an aircraft. The system, which used components from the Apollo guidance system, was installed in an F-8 aircraft. A lunar module guidance computer is the central element in the three-axis, single-channel, multimode, digital, primary control system. An electrohydraulic triplex system providing unaugmented control of the F-8 aircraft is the only backup to the digital system. Emphasis is placed on the digital system in its role as a control augmentor, a logic processor, and a failure detector. A sampled-data design synthesis example is included to demonstrate the role of various analytical and simulation methods. The use of a digital system to implement conventional control laws was shown to be practical for flight. Logic functions coded as an integral part of the control laws were found to be advantageous. Verification of software required an extensive effort, but confidence in the software was achieved. Initial flight results showed highly successful system operation, although quantization of pilot's stick and trim were areas of minor concern from the piloting standpoint.

  11. Hardware-Efficient Monitoring of I/O Signals

    NASA Technical Reports Server (NTRS)

    Driscoll, Kevin R.; Hall, Brendan; Paulitsch, Michael

    2009-01-01

    In this invention, command and monitor functionality is moved between the two independent pieces of hardware, in which one had been dedicated to command and the other had been dedicated to monitor, such that some command and some monitor functionality appears in each. The only constraint is that the monitor for signal cannot be in the same hardware as the command I/O it is monitoring. The splitting of the command outputs between independent pieces of hardware may require some communication between them, i.e. an intra-switch trunk line. This innovation reduces the amount of wasted hardware and allows the two independent pieces of hardware to be designed identically in order to save development costs.

  12. VME rollback hardware for time warp multiprocessor systems

    NASA Technical Reports Server (NTRS)

    Robb, Michael J.; Buzzell, Calvin A.

    1992-01-01

    The purpose of the research effort is to develop and demonstrate innovative hardware to implement specific rollback and timing functions required for efficient queue management and precision timekeeping in multiprocessor discrete event simulations. The previously completed phase 1 effort demonstrated the technical feasibility of building hardware modules which eliminate the state saving overhead of the Time Warp paradigm used in distributed simulations on multiprocessor systems. The current phase 2 effort will build multiple pre-production rollback hardware modules integrated with a network of Sun workstations, and the integrated system will be tested by executing a Time Warp simulation. The rollback hardware will be designed to interface with the greatest number of multiprocessor systems possible. The authors believe that the rollback hardware will provide for significant speedup of large scale discrete event simulation problems and allow multiprocessors using Time Warp to dramatically increase performance.

  13. Low cost design of microprocessor EDAC circuit

    NASA Astrophysics Data System (ADS)

    Li, Hao; Lixin, Yu; Heping, Peng; Wei, Zhuang

    2015-11-01

    An optimization method of error detection and correction (EDAC) circuit design is proposed. The method involves selecting or constructing EDAC codes of low cost hardware, associated with operation scheduling implementation based on 2-input XOR gates structure, and two actions for reducing hardware cells, which can reduce the delay penalties and area costs of the EDAC circuit effectively. The 32-bit EDAC circuit hardware implementation is selected to make a prototype, based on the 180 nm process. The delay penalties and area costs of the EDAC circuit are evaluated. Results show that the time penalty and area cost of the EDAC circuitries are affected with different parity-check matrices and different hardware implementation for the EDAC codes with the same capability of correction and detection code. This method can be used as a guide for low-cost radiation-hardened microprocessor EDAC circuit design and for more advanced technologies.

  14. Cognitive Processing Hardware Elements

    DTIC Science & Technology

    2005-01-31

    approach . It is too early now to decide on final cognitive memory architecture. We must have a great deal more experi- ence with applications and know of...system is contemplated, a memory system that may also serve as a model for many aspects of human memory. The cognitive memory design would be able to store...correlates with or relates to the present real-time sensory inputs. The search would be done by a retrieval system that makes use of autoassociative

  15. Scattering correction algorithm in the PET sinogram using the factorial design of experimental method: A phantom study.

    PubMed

    Chen, Huei-Yung; Lu, Nan-Han; Huang, Yung-Hui; Chen, Tai-Been

    2015-01-01

    Positron emission tomography (PET) had been utilized to image gene therapy, estimate tumor growth, detect neural function of the brain, and diagnose disease. However, sinogram noise always results inaccurate PET images. The factorial design of experiment (DOE), a statistical method, was applied to investigate, correct and estimate the fraction of scattering of 2D sinogram in PET. The DOE was included as factors of angle views and scatter media with two levels designed. The PET sinogram after scattering correction was then reconstructed by filtered back projection (FBP). Both Ge-68 uniform phantom and Jaszczak anthropomorphic torso phantom were applied to exam the performance of presented scattering correction algorithm. The signal-to-noise ratio (SNR), standard deviation (STD) of background, and full width at half maximum (FWHM), and uniformity test were applied to validate the performance of presented method. The proposed method provides a narrower FWHM, smaller STD of the background, higher SNR and better uniformity than those of original protocols. This method should be tested for accuracy and feasibility with three-dimensional phantoms or real animal studies and consideration effects of cross-talk between slices in future work.

  16. Digital Hardware Architecture Implementation

    DTIC Science & Technology

    1993-02-15

    ergonomic design mechanical mouse that requires no mouse pad. i Its 1 /O capabilities include a 4MB/s SCSI- 11 interface, a high-throughput Ethernet ...Snated. The Frame Sta- 62 612 4 1 1 tus (FS) byte contains the SD AC FC IDESTI SRC IINFORMATION FCS ED FS5s A and C flags, which are used for...alternate topologies. 3.1.2.5 FDDI Bridges and Routers When migrating from IEEE 802 networks such as 10Mbps Ethernet and 16 Mbps Token ring to LANs

  17. Improving Arecibo Observatory's Hardware

    NASA Astrophysics Data System (ADS)

    Van Rooy, Paula; Whitlow, Dana; Seymour, Andrew

    2017-01-01

    The Puerto-rican Ultimate Pulsar Processing Instrument (PUPPI) is a key backend for time-domain observations at Arecibo Observatory. PUPPI enables pulsar timing used for gravitational wave studies, single pulse studies of pulsars, searches for new pulsars, and allows in depth studies of Fast Radio Bursts (FRBs). Unfortunately, PUPPI is presently restricted to only certain Arecibo receivers due to its input frequency and bandwidth requirements. Here we present the design process, building, bench testing, and updates on the implementation of a one-channel breadboard of a new frequency mixer at the Arecibo Observatory. The function of the frequency mixer design is to translate a 1.1-1.9 GHz band to 0.8 - 1.6 GHz band, where PUPPI samples the data at the second Nyquist zone. When this seemingly simple device is fully implemented, it will allow for the further expansion of the abilities of PUPPI. Mainly it will expand PUPPI's frequency agility to higher frequencies from 4 to 10 GHz, by enabling it to work with many more of Arecibo's receivers. We hope this becomes particularly useful, now that a FRB has been detected at these higher frequencies. The Arecibo Observatory is operated by SRI International under a cooperative agreement with the National Science Foundation (AST-1100968), and in alliance with Ana G. Méndez-Universidad Metropolitana, and the Universities Space Research Association. The Arecibo Observatory REU is funded under grant AST-1559849 to Universidad Metropolitana

  18. FUGM hardware operation manual

    SciTech Connect

    Wenz, T.R.; Menlove, H.O.; Halbig, J.K.

    1997-05-01

    This manual describes the detector design features, performance, and operating characteristics of the Fugen reactor gate monitor for monitoring fresh and spent fuel transfers between the core and storage ponds. This system consists of two monitors located at each end of the transfer chute. The larger monitor contains two {sup 3}He tubes, two fission chambers, and two ion chambers. The smaller monitor, used for direction of motion redundancy, contains two ion chambers. All detectors provide information for identifying the type, fresh or spent UOX or MOX fuel, and direction of the fuel transfer. The gamma-ray and neutron detector (GRAND-3) electronics package supplies power to the radiation sensors and collects the radiation data for storage on a laptop computer. The system is designed to operate unattended with data collection by the inspectors occurring on 90-day time intervals. This manual also includes radiation data for the six types of fuel transfers and equipment transfers along with the direction of motion information collected during the installation at the Fugen reactor.

  19. Reconfigurable Hardware Adapts to Changing Mission Demands

    NASA Technical Reports Server (NTRS)

    2003-01-01

    A new class of computing architectures and processing systems, which use reconfigurable hardware, is creating a revolutionary approach to implementing future spacecraft systems. With the increasing complexity of electronic components, engineers must design next-generation spacecraft systems with new technologies in both hardware and software. Derivation Systems, Inc., of Carlsbad, California, has been working through NASA s Small Business Innovation Research (SBIR) program to develop key technologies in reconfigurable computing and Intellectual Property (IP) soft cores. Founded in 1993, Derivation Systems has received several SBIR contracts from NASA s Langley Research Center and the U.S. Department of Defense Air Force Research Laboratories in support of its mission to develop hardware and software for high-assurance systems. Through these contracts, Derivation Systems began developing leading-edge technology in formal verification, embedded Java, and reconfigurable computing for its PF3100, Derivational Reasoning System (DRS ), FormalCORE IP, FormalCORE PCI/32, FormalCORE DES, and LavaCORE Configurable Java Processor, which are designed for greater flexibility and security on all space missions.

  20. Design and Benchmarking of a Network-In-the-Loop Simulation for Use in a Hardware-In-the-Loop System

    NASA Technical Reports Server (NTRS)

    Aretskin-Hariton, Eliot; Thomas, George; Culley, Dennis; Kratz, Jonathan

    2017-01-01

    Distributed engine control (DEC) systems alter aircraft engine design constraints because of fundamental differences in the input and output communication between DEC and centralized control architectures. The change in the way communication is implemented may create new optimum engine-aircraft configurations. This paper continues the exploration of digital network communication by demonstrating a Network-In-the-Loop simulation at the NASA Glenn Research Center. This simulation incorporates a real-time network protocol, the Engine Area Distributed Interconnect Network Lite (EADIN Lite), with the Commercial Modular Aero-Propulsion System Simulation 40k (C-MAPSS40k) software. The objective of this study is to assess digital control network impact to the control system. Performance is evaluated relative to a truth model for large transient maneuvers and a typical flight profile for commercial aircraft. Results show that a decrease in network bandwidth from 250 Kbps (sampling all sensors every time step) to 40 Kbps, resulted in very small differences in control system performance.

  1. Design and Benchmarking of a Network-In-the-Loop Simulation for Use in a Hardware-In-the-Loop System

    NASA Technical Reports Server (NTRS)

    Aretskin-Hariton, Eliot D.; Thomas, George Lindsey; Culley, Dennis E.; Kratz, Jonathan L.

    2017-01-01

    Distributed engine control (DEC) systems alter aircraft engine design constraints be- cause of fundamental differences in the input and output communication between DEC and centralized control architectures. The change in the way communication is implemented may create new optimum engine-aircraft configurations. This paper continues the exploration of digital network communication by demonstrating a Network-In-the-Loop simulation at the NASA Glenn Research Center. This simulation incorporates a real-time network protocol, the Engine Area Distributed Interconnect Network Lite (EADIN Lite), with the Commercial Modular Aero-Propulsion System Simulation 40k (C-MAPSS40k) software. The objective of this study is to assess digital control network impact to the control system. Performance is evaluated relative to a truth model for large transient maneuvers and a typical flight profile for commercial aircraft. Results show that a decrease in network bandwidth from 250 Kbps (sampling all sensors every time step) to 40 Kbps, resulted in very small differences in control system performance.

  2. Design and implementation of laser target simulator in hardware-in-the-loop simulation system based on LabWindows/CVI and RTX

    NASA Astrophysics Data System (ADS)

    Tong, Qiujie; Wang, Qianqian; Li, Xiaoyang; Shan, Bin; Cui, Xuntai; Li, Chenyu; Peng, Zhong

    2016-11-01

    In order to satisfy the requirements of the real-time and generality, a laser target simulator in semi-physical simulation system based on RTX+LabWindows/CVI platform is proposed in this paper. Compared with the upper-lower computers simulation platform architecture used in the most of the real-time system now, this system has better maintainability and portability. This system runs on the Windows platform, using Windows RTX real-time extension subsystem to ensure the real-time performance of the system combining with the reflective memory network to complete some real-time tasks such as calculating the simulation model, transmitting the simulation data, and keeping real-time communication. The real-time tasks of simulation system run under the RTSS process. At the same time, we use the LabWindows/CVI to compile a graphical interface, and complete some non-real-time tasks in the process of simulation such as man-machine interaction, display and storage of the simulation data, which run under the Win32 process. Through the design of RTX shared memory and task scheduling algorithm, the data interaction between the real-time tasks process of RTSS and non-real-time tasks process of Win32 is completed. The experimental results show that this system has the strongly real-time performance, highly stability, and highly simulation accuracy. At the same time, it also has the good performance of human-computer interaction.

  3. Correction of facial and mandibular asymmetry using a computer aided design/computer aided manufacturing prefabricated titanium implant.

    PubMed

    Watson, Jason; Hatamleh, Muhanad; Alwahadni, Ahed; Srinivasan, Dilip

    2014-05-01

    Patients with significant craniofacial asymmetry may have functional problems associated with their occlusion and aesthetic concerns related to the imbalance in soft and hard tissue profiles. This report details a case of facial asymmetry secondary to left mandible angle deficiency due to undergoing previous radiotherapy. We describe the correction of the bony deformity using computer aided design/computer aided manufacturing custom-made titanium onlay using novel direct metal laser sintering. The direct metal laser sintering onlay proved a very accurate operative fit and showed a good aesthetic correction of the bony defect with no reported complications postoperatively. It is a useful low-morbidity technique, and there is no resorption or associated donor-site complications.

  4. Design and calibration of a six-axis MEMS sensor array for use in scoliosis correction surgery

    NASA Astrophysics Data System (ADS)

    Benfield, David; Yue, Shichao; Lou, Edmond; Moussa, Walied A.

    2014-08-01

    A six-axis sensor array has been developed to quantify the 3D force and moment loads applied in scoliosis correction surgery. Initially this device was developed to be applied during scoliosis correction surgery and augmented onto existing surgical instrumentation, however, use as a general load sensor is also feasible. The development has included the design, microfabrication, deployment and calibration of a sensor array. The sensor array consists of four membrane devices, each containing piezoresistive sensing elements, generating a total of 16 differential voltage outputs. The calibration procedure has made use of a custom built load application frame, which allows quantified forces and moments to be applied and compared to the outputs from the sensor array. Linear or non-linear calibration equations are generated to convert the voltage outputs from the sensor array back into 3D force and moment information for display or analysis.

  5. HARDWARE AND SOFTWARE STATUS OF QCDOC.

    SciTech Connect

    BOYLE,P.A.; CHEN,D.; CHRIST,N.H.; PETROV.K.; ET AL.

    2003-07-15

    QCDOC is a massively parallel supercomputer whose processing nodes are based on an application-specific integrated circuit (ASIC). This ASIC was custom-designed so that crucial lattice QCD kernels achieve an overall sustained performance of 50% on machines with several 10,000 nodes. This strong scalability, together with low power consumption and a price/performance ratio of $1 per sustained MFlops, enable QCDOC to attack the most demanding lattice QCD problems. The first ASICs became available in June of 2003, and the testing performed so far has shown all systems functioning according to specification. We review the hardware and software status of QCDOC and present performance figures obtained in real hardware as well as in simulation.

  6. Hardware neural network on an SOPC platform

    NASA Astrophysics Data System (ADS)

    Liu, Yifei; Ding, Mingyue; Hu, Xia; Zhou, Yanhong

    2009-10-01

    SOPC (System on Programmable Chip) is an on-chip programmable system based on large scale Field Programmable Arrays (FPGAs). This paper presented an implementation of an SOPC system with a custom hardware neural network using Altera FPGA chip-EP2C35F672C. The embedded Nios processor was used as the test bench. The test result showed that the SOPC Platform with hardware neural network is faster than the software implementation respectively and the accuracy of the design meets the requirement of system. The verified SOPC system can closely model real-world system, which will have wide applications in different areas such as pattern recognition, data mining and signal processing.

  7. Imaging current spine hardware: part 1, cervical spine and fracture fixation.

    PubMed

    Petscavage-Thomas, Jonelle M; Ha, Alice S

    2014-08-01

    The goals of this article are to review the indications for use, the materials, and the designs of hardware more commonly used in the cervical spine; to discuss alternatives for each of the different types of hardware; to review normal postoperative imaging findings; to describe the appropriateness of different imaging modalities for postoperative evaluation; and to illustrate examples of hardware complications. This article will also review vertebral body fracture fixation. Stabilization and fusion of the spine with intervertebral disk replacement, artificial ligaments, spinous process distraction devices, plate-and-rod systems, dynamic posterior fusion devices, and implants composed of new types of material are increasingly more common in the contemporary surgical practice. These spinal hardware devices will be seen more often in radiology practice. Successful postoperative radiologic evaluation of spinal hardware necessitates an understanding of the fundamental design of the hardware, the physiologic objective of the hardware, normal and abnormal postoperative imaging appearances, and complications unique to the hardware.

  8. MSAP Hardware Verification: Testing Multi-Mission System Architecture Platform Hardware Using Simulation and Bench Test Equipment

    NASA Technical Reports Server (NTRS)

    Crossin, Kent R.

    2005-01-01

    The Multi-Mission System Architecture Platform (MSAP) project aims to develop a system of hardware and software that will provide the core functionality necessary in many JPL missions and can be tailored to accommodate mission-specific requirements. The MSAP flight hardware is being developed in the Verilog hardware description language, allowing developers to simulate their design before releasing it to a field programmable gate array (FPGA). FPGAs can be updated in a matter of minutes, drastically reducing the time and expense required to produce traditional application-specific integrated circuits. Bench test equipment connected to the FPGAs can then probe and run Tcl scripts on the hardware. The Verilog and Tcl code can be reused or modified with each design. These steps are effective in confirming that the design operates according specifications.

  9. MSAP Hardware Verification: Testing Multi-Mission System Architecture Platform Hardware Using Simulation and Bench Test Equipment

    NASA Technical Reports Server (NTRS)

    Crossin, Kent R.

    2005-01-01

    The Multi-Mission System Architecture Platform (MSAP) project aims to develop a system of hardware and software that will provide the core functionality necessary in many JPL missions and can be tailored to accommodate mission-specific requirements. The MSAP flight hardware is being developed in the Verilog hardware description language, allowing developers to simulate their design before releasing it to a field programmable gate array (FPGA). FPGAs can be updated in a matter of minutes, drastically reducing the time and expense required to produce traditional application-specific integrated circuits. Bench test equipment connected to the FPGAs can then probe and run Tcl scripts on the hardware. The Verilog and Tcl code can be reused or modified with each design. These steps are effective in confirming that the design operates according specifications.

  10. The Correction of Myopia Evaluation Trial (COMET): design and general baseline characteristics.

    PubMed

    Hyman, L; Gwiazda, J; Marsh-Tootle, W L; Norton, T T; Hussein, M

    2001-10-01

    The Correction of Myopia Evaluation Trial (COMET) is a multicenter, randomized, double-masked, controlled clinical trial evaluating whether there is a difference in the progression of myopia between children wearing progressive addition lenses (PALs) versus conventional single vision lenses (SVLs), as measured by cycloplegic autorefraction. Axial length, measured by A-scan ultrasonography, is an additional outcome measure. To meet the recruitment goal of 450 participants, eligible children ages 6-11 years (inclusive) with myopia in both eyes (spherical equivalent between -1.25 diopters (D) and -4.50 D, astigmatism < or = 1.50 D, and anisometropia < 1.00 D) were recruited at four clinical centers between September 1997 and September 1998. Children who participated were assigned to receive PALs (Varilux Comfort with a +2.00 D addition) or SVLs. Measures include standardized cycloplegic autorefraction (Nidek ARK700A autorefractor), axial length (Sonomed A2500 ultrasound), subjective refraction (Marco TRS system), visual acuity (modified Early Treatment Diabetic Retinopathy Study protocol), accommodation (Canon R-1), and phoria (cover test and Maddox rod). Outcome measures are collected annually; adherence is assessed and prescriptions updated semiannually. Participants are being followed for at least 3 years. COMET enrolled 469 children. Their mean age is 9.3 years (range 6-11 years); 52% are female. COMET children are ethnically diverse, according to a self-report with 46% White, 26% African American, 14% Hispanic, and 8% Asian. Best-corrected visual acuity is better than 20/32 in both eyes. Baseline mean (+/-SD) cycloplegic refractive correction is -2.38 D (+/-0.81) in the right eye and -2.40 D (+/-0.82) in the left eye; mean (+/-SD) axial length is 24.1 mm (+/-0.7) in both eyes. Follow-up of these children will provide a first step in answering the important question of whether there are effective means to slow myopia progression. Study results should be applicable

  11. Hardware cleanliness methodology and certification

    NASA Technical Reports Server (NTRS)

    Harvey, Gale A.; Lash, Thomas J.; Rawls, J. Richard

    1995-01-01

    Inadequacy of mass loss cleanliness criteria for selection of materials for contamination sensitive uses, and processing of flight hardware for contamination sensitive instruments is discussed. Materials selection for flight hardware is usually based on mass loss (ASTM E-595). However, flight hardware cleanliness (MIL 1246A) is a surface cleanliness assessment. It is possible for materials (e.g. Sil-Pad 2000) to pass ASTM E-595 and fail MIL 1246A class A by orders of magnitude. Conversely, it is possible for small amounts of nonconforming material (Huma-Seal conformal coating) to not present significant cleanliness problems to an optical flight instrument. Effective cleaning (precleaning, precision cleaning, and ultra cleaning) and cleanliness verification are essential for contamination sensitive flight instruments. Polish cleaning of hardware, e.g. vacuum baking for vacuum applications, and storage of clean hardware, e.g. laser optics, is discussed. Silicone materials present special concerns for use in space because of the rapid conversion of the outgassed residues to glass by solar ultraviolet radiation and/or atomic oxygen. Non ozone depleting solvent cleaning and institutional support for cleaning and certification are also discussed.

  12. Improved design of subcritical and supercritical cascades using complex characteristics and boundary layer correction

    NASA Technical Reports Server (NTRS)

    Sanz, J. M.

    1983-01-01

    The method of complex characteristics and hodograph transformation for the design of shockless airfoils was extended to design supercritical cascades with high solidities and large inlet angles. This capability was achieved by introducing a conformal mapping of the hodograph domain onto an ellipse and expanding the solution in terms of Tchebycheff polynomials. A computer code was developd based on this idea. A number of airfoils designed with the code are presented. Various supercritical and subcritical compressor, turbine and propeller sections are shown. The lag-entrainment method for the calculation of a turbulent boundary layer was incorporated to the inviscid design code. The results of this calculation are shown for the airfoils described. The elliptic conformal transformation developed to map the hodograph domain onto an ellipse can be used to generate a conformal grid in the physical domain of a cascade of airfoils with open trailing edges with a single transformation. A grid generated with this transformation is shown for the Korn airfoil.

  13. The JPL telerobot operator control station. Part 1: Hardware

    NASA Technical Reports Server (NTRS)

    Kan, Edwin P.; Tower, John T.; Hunka, George W.; Vansant, Glenn J.

    1989-01-01

    The Operator Control Station of the Jet Propulsion Laboratory (JPL)/NASA Telerobot Demonstrator System provides the man-machine interface between the operator and the system. It provides all the hardware and software for accepting human input for the direct and indirect (supervised) manipulation of the robot arms and tools for task execution. Hardware and software are also provided for the display and feedback of information and control data for the operator's consumption and interaction with the task being executed. The hardware design, system architecture, and its integration and interface with the rest of the Telerobot Demonstrator System are discussed.

  14. Hardware implementation of an electrostatic MEMS-actuator linearization

    NASA Astrophysics Data System (ADS)

    Mair, F.; Egretzberger, M.; Kugi, A.

    2011-06-01

    In this paper, an electrostatic actuator linearization will be introduced, which is based on an existing hardware-efficient iterative square root algorithm. The algorithm is solely based on add and shift operations while just needing n/2 iterations for an n bit wide input signal. As a practical example, the nonlinear input transformation will be utilized for the design of the primary mode controller of a capacitive MEMS gyroscope and an implementation of the algorithm in the Verilog hardware description language will be instantiated. Finally, measurement results will validate the feasibility of the presented control concept and its hardware implementation.

  15. 3D correction of AIS in braces designed using CAD/CAM and FEM: a randomized controlled trial.

    PubMed

    Cobetto, Nikita; Aubin, Carl-Éric; Parent, Stefan; Barchi, Soraya; Turgeon, Isabelle; Labelle, Hubert

    2017-01-01

    Recent studies showed that finite element model (FEM) combined to CAD/CAM improves the design of braces for the conservative treatment of adolescent idiopathic scoliosis (AIS), using 2D measurements from in-brace radiographs. We aim to assess the immediate effectiveness on curve correction in all three planes of braces designed using CAD/CAM and numerical simulation compared to braces designed with CAD/CAM only. SRS standardized criteria for bracing were followed to recruit 48 AIS patients who were randomized into two groups. For both groups, 3D reconstructions of the spine and patient's torso, respectively built from bi-planar radiographs and surface topography, were obtained and braces were designed using the CAD/CAM approach. For the test group, 3D reconstructions of the spine and patient's torso were additionally used to generate a personalized FEM to simulate and iteratively improve the brace design with the objective of curve correction maximization in three planes and brace material minimization. For the control group (CtrlBraces), average Cobb angle prior to bracing was 29° (thoracic, T) and 25° (lumbar, L) with the planes of maximal curvature (PMC) respectively oriented at 63° and 57° on average with respect to the sagittal plane. Average apical axial rotation prior to bracing was 7° (T) and 9° (L). For the test group (FEMBraces), initial Cobb angles were 33° (T) and 28° (L) with the PMC at 68° (T) and 56° (L) and average apical axial rotation prior to bracing at 9° (T and L). On average, FEMBraces were 50% thinner and had 20% less covering surface than CtrlBraces while reducing T and L curves by 47 and 48%, respectively, compared to 25 and 26% for CtrlBraces. FEMBraces corrected apical axial rotation by 46% compared to 30% for CtrlBraces. The combination of numerical simulation and CAD/CAM approach allowed designing more efficient braces in all three planes, with the advantages of being lighter than standard CAD/CAM braces. Bracing in AIS may

  16. Optimal Design for Nonperiodic Fine Grating Structure Controlled by Proximity Correction with Electron-Beam Lithography

    NASA Astrophysics Data System (ADS)

    Okano, Masato; Hirai, Yoshihiko; Kikuta, Hisao

    2007-02-01

    We describe a method for designing nonperiodic fine grating structures such as a small F-number diffractive cylindrical lens, to be fabricated by direct-writing electron-beam lithography. The design is based on a resist development simulator for estimating a proximity effect of electron dose and the finite difference time domain (FDTD) method for simulating an electromagnetic field. The surface profile and electron dose distribution are simultaneously optimized to obtain the high diffraction efficiency. For the design of a diffractive lens of 50 μm width and 25 μm focal length, the calculated diffraction efficiency is 49% for 650-nm-wavelength light, which is slightly lower than that of a diffractive lens profile optimized by electromagnetic analysis without restrictions on fabrication limits.

  17. Reconfigurable Hardware for Compressing Hyperspectral Image Data

    NASA Technical Reports Server (NTRS)

    Aranki, Nazeeh; Namkung, Jeffrey; Villapando, Carlos; Kiely, Aaron; Klimesh, Matthew; Xie, Hua

    2010-01-01

    High-speed, low-power, reconfigurable electronic hardware has been developed to implement ICER-3D, an algorithm for compressing hyperspectral-image data. The algorithm and parts thereof have been the topics of several NASA Tech Briefs articles, including Context Modeler for Wavelet Compression of Hyperspectral Images (NPO-43239) and ICER-3D Hyperspectral Image Compression Software (NPO-43238), which appear elsewhere in this issue of NASA Tech Briefs. As described in more detail in those articles, the algorithm includes three main subalgorithms: one for computing wavelet transforms, one for context modeling, and one for entropy encoding. For the purpose of designing the hardware, these subalgorithms are treated as modules to be implemented efficiently in field-programmable gate arrays (FPGAs). The design takes advantage of industry- standard, commercially available FPGAs. The implementation targets the Xilinx Virtex II pro architecture, which has embedded PowerPC processor cores with flexible on-chip bus architecture. It incorporates an efficient parallel and pipelined architecture to compress the three-dimensional image data. The design provides for internal buffering to minimize intensive input/output operations while making efficient use of offchip memory. The design is scalable in that the subalgorithms are implemented as independent hardware modules that can be combined in parallel to increase throughput. The on-chip processor manages the overall operation of the compression system, including execution of the top-level control functions as well as scheduling, initiating, and monitoring processes. The design prototype has been demonstrated to be capable of compressing hyperspectral data at a rate of 4.5 megasamples per second at a conservative clock frequency of 50 MHz, with a potential for substantially greater throughput at a higher clock frequency. The power consumption of the prototype is less than 6.5 W. The reconfigurability (by means of reprogramming) of

  18. Functional design specification for the problem data system. [space shuttle

    NASA Technical Reports Server (NTRS)

    Boatman, T. W.

    1975-01-01

    The purpose of the Functional Design Specification is to outline the design for the Problem Data System. The Problem Data System is a computer-based data management system designed to track the status of problems and corrective actions pertinent to space shuttle hardware.

  19. Testing Microgravity Flight Hardware Concepts on the NASA KC-135

    NASA Technical Reports Server (NTRS)

    Motil, Susan M.; Harrivel, Angela R.; Zimmerli, Gregory A.

    2001-01-01

    This paper provides an overview of utilizing the NASA KC-135 Reduced Gravity Aircraft for the Foam Optics and Mechanics (FOAM) microgravity flight project. The FOAM science requirements are summarized, and the KC-135 test-rig used to test hardware concepts designed to meet the requirements are described. Preliminary results regarding foam dispensing, foam/surface slip tests, and dynamic light scattering data are discussed in support of the flight hardware development for the FOAM experiment.

  20. Hardware Evolution of Analog Speed Controllers for a DC Motor

    NASA Technical Reports Server (NTRS)

    Gwaltney, David A.; Ferguson, Michael I.

    2003-01-01

    Evolvable hardware provides the capability to evolve analog circuits to produce amplifier and filter functions. Conventional analog controller designs employ these same functions. Analog controllers for the control of the shaft speed of a DC motor are evolved on an evolvable hardware platform utilizing a Field Programmable Transistor Array (FPTA). The performance of these evolved controllers is compared to that of a conventional proportional-integral (PI) controller.

  1. Hardware Evolution of Analog Speed Controllers for a DC Motor

    NASA Technical Reports Server (NTRS)

    Gwaltney, David A.; Ferguson, Michael I.

    2003-01-01

    Evolvable hardware provides the capability to evolve analog circuits to produce amplifier and filter functions. Conventional analog controller designs employ these same functions. Analog controllers for the control of the shaft speed of a DC motor are evolved on an evolvable hardware platform utilizing a Field Programmable Transistor Array (FPTA). The performance of these evolved controllers is compared to that of a conventional proportional-integral (PI) controller.

  2. 78 FR 28291 - Unblocking of 1 Individual Designated Pursuant to Executive Order 13572; Correction

    Federal Register 2010, 2011, 2012, 2013, 2014

    2013-05-14

    ... Persons with Respect to Human Rights Abuses in Syria'' from the list of Specially Designated Nationals and... Abuses in Syria,'' (the ``Order'') pursuant to, inter alia, the International Emergency Economic Powers....a. KUZBARI, Ahmad Nabil; a.k.a. KUZBARI, Nabil R.); DOB 20 Sep 1936; POB Damascus, Syria;...

  3. Improved design of subcritical and supercritical cascades using complex characteristics and boundary-layer correction

    NASA Technical Reports Server (NTRS)

    Sanz, J. M.

    1984-01-01

    The method of complex characteristics and hodograph transformation for the design of shockless airfoils was extended to design supercritical cascades with high solidities and large inlet angles. This capability was achieved by introducing a conformal mapping of the hodograph domain onto an ellipse and expanding the solution in terms of Tchebycheff polynomials. A computer code was developed based on this idea. A number of airfoils designed with the code are presented. Various supercritical and subcritical compressor, turbine and propeller sections are shown. The lag-entrainment method for the calculation of a turbulent boundary layer was incorporated to the inviscid design code. The results of this calculation are shown for the airfoils described. The elliptic conformal transformation developed to map the hodograph domain onto an ellipse can be used to generate a conformal grid in the physical domain of a cascade of airfoils with open trailing edges with a single transformation. A grid generated with this transformation is shown for the Korn airfoil. Previously announced in STAR as N83-24474

  4. ROMPS critical design review. Volume 1: Hardware

    NASA Technical Reports Server (NTRS)

    Dobbs, M. E.

    1992-01-01

    Topics concerning the Robot-Operated Material Processing in Space (ROMPS) Program are presented in viewgraph form and include the following: a systems overview; servocontrol and servomechanisms; testbed and simulation results; system V controller; robot module; furnace module; SCL experiment supervisor; SCL script sample processing control; SCL experiment supervisor fault handling; block diagrams; hitchhiker interfaces; battery systems; watchdog timers; mechanical/thermal systems; and fault conditions and recovery.

  5. Design Specifications for Hardware Assisted Rollback Computation

    DTIC Science & Technology

    1988-06-01

    Disto 89 1 25 059 1.0 Overview of the Rollback Mechanism for Time Warp Simulation Rollback computations are a method of implementation for parallel...is in the archive frame. The archive frame resides in a fixed place In VCM, so Its address s known immediately. First. the MRV machine must initialize

  6. Design and Hardware Implementation of Neural Systems.

    DTIC Science & Technology

    1991-12-15

    orientation specificity in a neuron network for visual image decomposition. AIP Conference on Neuronal Networks for Computing, Snowbird, Utah, April, 1989...P. and Blackman, D. Orientation tuning and orientation specificity in a neuron network for visual image decomposition. AIP Conference on Neuronal ... Networks for Computing, Snowbird, Utah, April, 1989. Mueller, P., Neural computation of pattern primitives, (Abstract) AIP Conference, Snowbird, Utah

  7. Design for an aberration-corrected concave grating for a mid-infrared long-slit spectrometer.

    PubMed

    Onaka, T; Miyata, T; Kataza, H; Okamoto, Y

    2000-04-01

    A new design for an aberration-corrected concave grating for the spectral region near 10 microm is presented. It was designed for use in the ground-based astronomical medium-resolution (lambda/Dlambda approximately 100) Mid-Infrared Camera and Spectrometer (MICS). It provides a flat focal plane for a wide spectral range (7.5-13.5 microm) with small aberrations, permitting efficient long-slit observations in the mid-infrared region. It permits a simple design of the spectrometer without collimator and camera mirrors, which is quite advantageous for cryogenic instruments. The grating has variable spacing grooves to reduce aberrations. In addition, the grating surface figure is designed to be toroidal and in the direction perpendicular to the grooves, aspherical, to suppress the aberrations further over a wide spectral range. The angle of the grooves is also varied to yield better efficiency near the blaze angle. The grating was fabricated by high-quality ultraprecision machining, which made these features possible. Test observations confirmed that the designed spectral resolution was achieved.

  8. Modulator design for x-ray scatter correction using primary modulation: Material selection

    SciTech Connect

    Gao Hewei; Zhu Lei; Fahrig, Rebecca

    2010-08-15

    Purpose: An optimal material selection for primary modulator is proposed in order to minimize beam hardening of the modulator in x-ray cone-beam computed tomography (CBCT). Recently, a measurement-based scatter correction method using primary modulation has been developed and experimentally verified. In the practical implementation, beam hardening of the modulator blocker is a limiting factor because it causes inconsistency in the primary signal and therefore degrades the accuracy of scatter correction. Methods: This inconsistency can be purposely assigned to the effective transmission factor of the modulator whose variation as a function of object filtration represents the magnitude of beam hardening of the modulator. In this work, the authors show that the variation reaches a minimum when the K-edge of the modulator material is near the mean energy of the system spectrum. Accordingly, an optimal material selection can be carried out in three steps. First, estimate and evaluate the polychromatic spectrum for a given x-ray system including both source and detector; second, calculate the mean energy of the spectrum and decide the candidate materials whose K-edge energies are near the mean energy; third, select the optimal material from the candidates after considering both the magnitude of beam hardening and the physical and chemical properties. Results: A tabletop x-ray CBCT system operated at 120 kVp is used to validate the material selection method in both simulations and experiments, from which the optimal material for this x-ray system is then chosen. With the transmission factor initially being 0.905 and 0.818, simulations show that erbium provides the least amount of variation as a function of object filtrations (maximum variations are 2.2% and 4.3%, respectively, only one-third of that for copper). With different combinations of aluminum and copper filtrations (simulating a range of object thicknesses), measured overall variations are 2.5%, 1.0%, and 8

  9. Microcomputer Hardware. Energy Technology Series.

    ERIC Educational Resources Information Center

    Technical Education Research Centre-Southwest, Waco, TX.

    This course in microcomputer hardware is one of 16 courses in the Energy Technology Series developed for an Energy Conservation-and-Use Technology curriculum. Intended for use in two-year postsecondary technical institutions to prepare technicians for employment, the courses are also useful in industry for updating employees in company-sponsored…

  10. Police Communications: Humans and Hardware.

    ERIC Educational Resources Information Center

    Zannes, Estelle

    This volume presents an overview of police communications and analyzes the relationships between the people and hardware in the police system. Chapters discuss the development and use of such communication devices as the telegraph, telephone, and computers; the role of mass media, feedback, and communicative settings in human communication;…

  11. Hardware Selection: A Nontechnical Approach.

    ERIC Educational Resources Information Center

    Kiteka, Sebastian F.

    Presented in nontechnical language, this guide suggests criteria for the selection of three computer hardware essentials--a microcomputer, a monitor, and a printer. Factors to be considered in selecting the microcomputer are identified and discussed, including what the computer is to be used for, dealer support, software availability, modem…

  12. Line array transmission sources for SPECT attenuation correction: design and reconstruction

    NASA Astrophysics Data System (ADS)

    Hawman, E. G.; Rempel, T. D.; Vija, A. H.; Engdahl, J. C.

    2005-04-01

    Correction for non-uniform attenuation in SPECT generally requires measurements of radiation transmittance through the patient and reconstruction of the data to form an attenuation image, or mu-map. For nuclear cardiac studies it useful if the emission and transmission data for each projection view can be acquired simultaneously using non-overlapping energy windows. This simplifies the registration of the emission and transmission data. Large area transmission sources are desirable to avoid data truncation; however, 2D-planar liquid sources are cumbersome and extended solid area sources of Gd-153 or Am-247 are impractical. Co-57 sheet sources present spectral overlap problems for imaging of Tc-99m tracers. With Gd-153 line arrays, one can achieve the benefits of 2D-planar sources, low truncation and simultaneous emission/transmission measurements, using lightweight static mechanical attachments to the SPECT camera system. A new method is proposed to determine optimal positions for the lines of the transmission array based on maximizing the entropy of the transmitted flux through the patient. Transmission reconstruction using parallel beam filtered back-projection yields attenuation maps with poor spatial resolution and significant aliasing effects. The degradations of image quality become worse as the angular separations of the lines as seen by the detector increase. To improve the reconstruction of line array transmission data a maximum likelihood modified gradient algorithm was derived. The algorithm takes into account emission-to-transmission down scatter as well as the overlapping of radiation patterns of the individual lines. Ordered subset versions of algorithms are explored. Image quality is assessed with simulations based on an attenuation map derived from CT.

  13. Design of microcamera for field curvature and distortion correction in monocentric multiscale foveated imaging system

    NASA Astrophysics Data System (ADS)

    Wu, Xiongxiong; Wang, Xiaorui; Zhang, Jianlei; Yuan, Ying; Chen, Xiaoxiang

    2017-04-01

    To realize large field of view (FOV) and high-resolution dynamic gaze of the moving target, this paper proposes the monocentric multiscale foveated (MMF) imaging system based on monocentric multiscale design and foveated imaging. First we present the MMF imaging system concept. Then we analyze large field curvature and distortion of the secondary image when the spherical intermediate image produced by the primary monocentric objective lens is relayed by the microcameras. Further a type of zoom endoscope objective lens is selected as the initial structure and optimized to minimize the field curvature and distortion with ZEMAX optical design software. The simulation results show that the maximum field curvature in full field of view is below 0.25 mm and the maximum distortion in full field of view is below 0.6%, which can meet the requirements of the microcamera in the proposed MMF imaging system. In addition, a simple doublet is used to design the foveated imaging system. Results of the microcamera together with the foveated imager compose the results of the whole MMF imaging system.

  14. Design of splints based on the NiTi alloy for the correction of joint deformities in the fingers

    PubMed Central

    2010-01-01

    Background The proximal interphalange joint (PIP) is fundamental for the functional nature of the hand. The contracture in flexion of the PIP, secondary to traumatisms or illnesses leads to an important functional loss. The use of correcting splints is the common procedure for treating this problem. Its functioning is based on the application of a small load and a prolonged stress which can be dynamic, static progressive or static serial. It is important that the therapist has a splint available which can release a constant and sufficient force to correct the contracture in flexion. Nowadays NiTi is commonly used in bio-engineering, due to its superelastical characteristics. The experience of the authors in the design of other devices based on the NiTi alloy, makes it possible to carry out a new design in this work - the production of a finger splint for the treatment of the contracture in flexion of the PIP joint. Methods Commercial orthosis have been characterized using a universal INSTRON 5565 machine. A computational simulation of the proposed design has been conducted, reproducing its performance and using a model "ad hoc" for the NiTi material. Once the parameters have been adjusted, the design is validated using the same type of test as those carried out on commercial orthosis. Results and Discussion For commercial splint the recovering force falls to excessively low values as the angle increases. Angle curves for different lengths and thicknesses of the proposed design have been obtained, with a practically constant recovering force value over a wide range of angles that vary between 30° and 150° in every case. Then the whole treatment is possible with only one splint, and without the need of progressive replacements as the joint recovers. Conclusions A new model of splint based on NiTi alloy has been designed, simulated and tested comparing its behaviour with two of the most regularly used splints. Its uses is recommended instead of other dynamic

  15. Hardware Development Process for Human Research Facility Applications

    NASA Technical Reports Server (NTRS)

    Bauer, Liz

    2000-01-01

    The simple goal of the Human Research Facility (HRF) is to conduct human research experiments on the International Space Station (ISS) astronauts during long-duration missions. This is accomplished by providing integration and operation of the necessary hardware and software capabilities. A typical hardware development flow consists of five stages: functional inputs and requirements definition, market research, design life cycle through hardware delivery, crew training, and mission support. The purpose of this presentation is to guide the audience through the early hardware development process: requirement definition through selecting a development path. Specific HRF equipment is used to illustrate the hardware development paths. The source of hardware requirements is the science community and HRF program. The HRF Science Working Group, consisting of SCientists from various medical disciplines, defined a basic set of equipment with functional requirements. This established the performance requirements of the hardware. HRF program requirements focus on making the hardware safe and operational in a space environment. This includes structural, thermal, human factors, and material requirements. Science and HRF program requirements are defined in a hardware requirements document which includes verification methods. Once the hardware is fabricated, requirements are verified by inspection, test, analysis, or demonstration. All data is compiled and reviewed to certify the hardware for flight. Obviously, the basis for all hardware development activities is requirement definition. Full and complete requirement definition is ideal prior to initiating the hardware development. However, this is generally not the case, but the hardware team typically has functional inputs as a guide. The first step is for engineers to conduct market research based on the functional inputs provided by scientists. CommerCially available products are evaluated against the science requirements as

  16. Workmanship Challenges for NASA Mission Hardware

    NASA Technical Reports Server (NTRS)

    Plante, Jeannette

    2010-01-01

    This slide presentation reviews several challenges in workmanship for NASA mission hardware development. Several standards for NASA workmanship exist, that are required for all programs, projects, contracts and subcontracts. These Standards contain our best known methods for avoiding past assembly problems and defects. These best practices may not be available if suppliers are used who are not compliant with them. Compliance includes having certified operators and inspectors. Some examples of problems that have occured from the lack of requirements flow-down to contractors are reviewed. The presentation contains a detailed example of the challenge in regards to The Packaging "Design" Dilemma.

  17. Orbiter CIU/IUS communications hardware evaluation

    NASA Technical Reports Server (NTRS)

    Huth, G. K.

    1979-01-01

    The DOD and NASA inertial upper stage communication system design, hardware specifications and interfaces were analyzed to determine their compatibility with the Orbiter payload communications equipment (Payload Interrogator, Payload Signal Processors, Communications Interface Unit, and the Orbiter operational communications equipment (the S-Band and Ku-band systems). Topics covered include (1) IUS/shuttle Orbiter communications interface definition; (2) Orbiter avionics equipment serving the IUS; (3) IUS communication equipment; (4) IUS/shuttle Orbiter RF links; (5) STDN/TDRS S-band related activities; and (6) communication interface unit/Orbiter interface issues. A test requirement plan overview is included.

  18. INTEGRATED MONITORING HARDWARE DEVELOPMENTS AT LOS ALAMOS

    SciTech Connect

    R. PARKER; J. HALBIG; ET AL

    1999-09-01

    The hardware of the integrated monitoring system supports a family of instruments having a common internal architecture and firmware. Instruments can be easily configured from application-specific personality boards combined with common master-processor and high- and low-voltage power supply boards, and basic operating firmware. The instruments are designed to function autonomously to survive power and communication outages and to adapt to changing conditions. The personality boards allow measurement of gross gammas and neutrons, neutron coincidence and multiplicity, and gamma spectra. In addition, the Intelligent Local Node (ILON) provides a moderate-bandwidth network to tie together instruments, sensors, and computers.

  19. Open Hardware for CERN's accelerator control systems

    NASA Astrophysics Data System (ADS)

    van der Bij, E.; Serrano, J.; Wlostowski, T.; Cattin, M.; Gousiou, E.; Alvarez Sanchez, P.; Boccardi, A.; Voumard, N.; Penacoba, G.

    2012-01-01

    The accelerator control systems at CERN will be upgraded and many electronics modules such as analog and digital I/O, level converters and repeaters, serial links and timing modules are being redesigned. The new developments are based on the FPGA Mezzanine Card, PCI Express and VME64x standards while the Wishbone specification is used as a system on a chip bus. To attract partners, the projects are developed in an `Open' fashion. Within this Open Hardware project new ways of working with industry are being evaluated and it has been proven that industry can be involved at all stages, from design to production and support.

  20. Optical design considerations when imaging the fundus with an adaptive optics correction

    NASA Astrophysics Data System (ADS)

    Wang, Weiwei; Campbell, Melanie C. W.; Kisilak, Marsha L.; Boyd, Shelley R.

    2008-06-01

    Adaptive Optics (AO) technology has been used in confocal scanning laser ophthalmoscopes (CSLO) which are analogous to confocal scanning laser microscopes (CSLM) with advantages of real-time imaging, increased image contrast, a resistance to image degradation by scattered light, and improved optical sectioning. With AO, the instrumenteye system can have low enough aberrations for the optical quality to be limited primarily by diffraction. Diffraction-limited, high resolution imaging would be beneficial in the understanding and early detection of eye diseases such as diabetic retinopathy. However, to maintain diffraction-limited imaging, sufficient pixel sampling over the field of view is required, resulting in the need for increased data acquisition rates for larger fields. Imaging over smaller fields may be a disadvantage with clinical subjects because of fixation instability and the need to examine larger areas of the retina. Reduction in field size also reduces the amount of light sampled per pixel, increasing photon noise. For these reasons, we considered an instrument design with a larger field of view. When choosing scanners to be used in an AOCSLO, the ideal frame rate should be above the flicker fusion rate for the human observer and would also allow user control of targets projected onto the retina. In our AOCSLO design, we have studied the tradeoffs between field size, frame rate and factors affecting resolution. We will outline optical approaches to overcome some of these tradeoffs and still allow detection of the earliest changes in the fundus in diabetic retinopathy.

  1. A successful 3D seismic survey in the ``no-data zone,`` offshore Mississippi delta: Survey design and refraction static correction processing

    SciTech Connect

    Carvill, C.; Faris, N.; Chambers, R.

    1996-12-31

    This is a success story of survey design and refraction static correction processing of a large 3D seismic survey in the South Pass area of the Mississippi delta. In this transition zone, subaqueous mudflow gullies and lobes of the delta, in various states of consolidation and gas saturation, are strong absorbers of seismic energy. Seismic waves penetrating the mud are severely restricted in bandwidth and variously delayed by changes in mud velocity and thickness. Using a delay-time refraction static correction method, the authors find compensation for the various delays, i.e., static corrections, commonly vary 150 ms over a short distance. Application of the static corrections markedly improves the seismic stack volume. This paper shows that intelligent survey design and delay-time refraction static correction processing economically eliminate the historic no data status of this area.

  2. Performance requirements of real-time continuous media computing: specification techniques and hardware/software implications

    NASA Astrophysics Data System (ADS)

    Krishnaswamy, Venkatesh; Subrahmanyam, P. A.

    1996-01-01

    Today's typical multimedia computer consists of a fast CPU and multimedia peripherals such as attached sound and video support hardware. In such a machine, the low-level audio and video handling may be performed by these peripherals while any significant processing on these media requires the intimate involvement of the CPU, main memory system and the operating system. Given that these components are not typically designed to meet the real-time requirements of continuous media, there are a number of constraints on the nature of multimedia applications that can be executed. To get around these constraints, demanding multimedia applications may typically be offloaded to attached peripheral compute engines which are customized to execute the applications. This approach requires dedicating resources to specific applications and suffers from the problem that such applications are not flexible integrated with the main system. We posit that new software and hardware technologies are needed to truly integrate real-time multimedia processing capabilities within a multimedia computer. The design of these technologies must be based on a thorough understanding of the timing and real-time computing requirements of various types of continuous media. Formal mechanisms are needed to express and analyze these requirements in order for multimedia operating systems to efficiently and correctly schedule the use of computing and communication resources. Indeed such mechanisms may be used to guide the specification and design of hardware and software processing component. In this paper, we present a framework for specifying the timing properties and computational requirements of continuous media. We discuss the usefulness of this framework in the context of some common audio and video data formats. We also discuss the impact of this framework on the design of resource scheduling mechanisms. Finally we offer some insights on designing audio/video processing engines based on real

  3. CASIS Fact Sheet: Hardware and Facilities

    NASA Technical Reports Server (NTRS)

    Solomon, Michael R.; Romero, Vergel

    2016-01-01

    Vencore is a proven information solutions, engineering, and analytics company that helps our customers solve their most complex challenges. For more than 40 years, we have designed, developed and delivered mission-critical solutions as our customers' trusted partner. The Engineering Services Contract, or ESC, provides engineering and design services to the NASA organizations engaged in development of new technologies at the Kennedy Space Center. Vencore is the ESC prime contractor, with teammates that include Stinger Ghaffarian Technologies, Sierra Lobo, Nelson Engineering, EASi, and Craig Technologies. The Vencore team designs and develops systems and equipment to be used for the processing of space launch vehicles, spacecraft, and payloads. We perform flight systems engineering for spaceflight hardware and software; develop technologies that serve NASA's mission requirements and operations needs for the future. Our Flight Payload Support (FPS) team at Kennedy Space Center (KSC) provides engineering, development, and certification services as well as payload integration and management services to NASA and commercial customers. Our main objective is to assist principal investigators (PIs) integrate their science experiments into payload hardware for research aboard the International Space Station (ISS), commercial spacecraft, suborbital vehicles, parabolic flight aircrafts, and ground-based studies. Vencore's FPS team is AS9100 certified and a recognized implementation partner for the Center for Advancement of Science in Space (CASIS

  4. Monte Carlo-based diode design for correction-less small field dosimetry

    NASA Astrophysics Data System (ADS)

    Charles, P. H.; Crowe, S. B.; Kairn, T.; Knight, R. T.; Hill, B.; Kenny, J.; Langton, C. M.; Trapp, J. V.

    2013-07-01

    Due to their small collecting volume, diodes are commonly used in small field dosimetry. However, the relative sensitivity of a diode increases with decreasing small field size. Conversely, small air gaps have been shown to cause a significant decrease in the sensitivity of a detector as the field size is decreased. Therefore, this study uses Monte Carlo simulations to look at introducing air upstream to diodes such that they measure with a constant sensitivity across all field sizes in small field dosimetry. Varying thicknesses of air were introduced onto the upstream end of two commercial diodes (PTW 60016 photon diode and PTW 60017 electron diode), as well as a theoretical unenclosed silicon chip using field sizes as small as 5 mm × 5 mm. The metric \\frac{{D_{w,Q} }}{{D_{Det,Q} }} used in this study represents the ratio of the dose to a point of water to the dose to the diode active volume, for a particular field size and location. The optimal thickness of air required to provide a constant sensitivity across all small field sizes was found by plotting \\frac{{D_{w,Q} }}{{D_{Det,Q} }} as a function of introduced air gap size for various field sizes, and finding the intersection point of these plots. That is, the point at which \\frac{{D_{w,Q} }}{{D_{Det,Q} }} was constant for all field sizes was found. The optimal thickness of air was calculated to be 3.3, 1.15 and 0.10 mm for the photon diode, electron diode and unenclosed silicon chip, respectively. The variation in these results was due to the different design of each detector. When calculated with the new diode design incorporating the upstream air gap, k_{Q_{clin} ,Q_{msr} }^{f_{clin} ,f_{msr} } was equal to unity to within statistical uncertainty (0.5%) for all three diodes. Cross-axis profile measurements were also improved with the new detector design. The upstream air gap could be implanted on the commercial diodes via a cap consisting of the air cavity surrounded by water equivalent material. The

  5. Monte Carlo-based diode design for correction-less small field dosimetry.

    PubMed

    Charles, P H; Crowe, S B; Kairn, T; Knight, R T; Hill, B; Kenny, J; Langton, C M; Trapp, J V

    2013-07-07

    Due to their small collecting volume, diodes are commonly used in small field dosimetry. However, the relative sensitivity of a diode increases with decreasing small field size. Conversely, small air gaps have been shown to cause a significant decrease in the sensitivity of a detector as the field size is decreased. Therefore, this study uses Monte Carlo simulations to look at introducing air upstream to diodes such that they measure with a constant sensitivity across all field sizes in small field dosimetry. Varying thicknesses of air were introduced onto the upstream end of two commercial diodes (PTW 60016 photon diode and PTW 60017 electron diode), as well as a theoretical unenclosed silicon chip using field sizes as small as 5 mm × 5 mm. The metric D(w,Q)/D(Det,Q) used in this study represents the ratio of the dose to a point of water to the dose to the diode active volume, for a particular field size and location. The optimal thickness of air required to provide a constant sensitivity across all small field sizes was found by plotting D(w,Q)/D(Det,Q) as a function of introduced air gap size for various field sizes, and finding the intersection point of these plots. That is, the point at which D(w,Q)/D(Det,Q) was constant for all field sizes was found. The optimal thickness of air was calculated to be 3.3, 1.15 and 0.10 mm for the photon diode, electron diode and unenclosed silicon chip, respectively. The variation in these results was due to the different design of each detector. When calculated with the new diode design incorporating the upstream air gap, k(f(clin),f(msr))(Q(clin),Q(msr)) was equal to unity to within statistical uncertainty (0.5%) for all three diodes. Cross-axis profile measurements were also improved with the new detector design. The upstream air gap could be implanted on the commercial diodes via a cap consisting of the air cavity surrounded by water equivalent material. The results for the unclosed silicon chip show that an ideal small

  6. Mapping of topological quantum circuits to physical hardware.

    PubMed

    Paler, Alexandru; Devitt, Simon J; Nemoto, Kae; Polian, Ilia

    2014-04-11

    Topological quantum computation is a promising technique to achieve large-scale, error-corrected computation. Quantum hardware is used to create a large, 3-dimensional lattice of entangled qubits while performing computation requires strategic measurement in accordance with a topological circuit specification. The specification is a geometric structure that defines encoded information and fault-tolerant operations. The compilation of a topological circuit is one important aspect of programming a quantum computer, another is the mapping of the topological circuit into the operations performed by the hardware. Each qubit has to be controlled, and measurement results are needed to propagate encoded quantum information from input to output. In this work, we introduce an algorithm for mapping an topological circuit to the operations needed by the physical hardware. We determine the control commands for each qubit in the computer and the relevant measurements that are needed to track information as it moves through the circuit.

  7. Hardware acceleration of image recognition through a visual cortex model

    NASA Astrophysics Data System (ADS)

    Rice, Kenneth L.; Taha, Tarek M.; Vutsinas, Christopher N.

    2008-09-01

    Recent findings in neuroscience have led to the development of several new models describing the processes in the neocortex. These models excel at cognitive applications such as image analysis and movement control. This paper presents a hardware architecture to speed up image content recognition through a recently proposed model of the visual cortex. The system is based on a set of parallel computation nodes implemented in an FPGA. The design was optimized for hardware by reducing the data storage requirements, and removing the need for multiplies and divides. The reconfigurable logic hardware implementation running at 121 MHz provided a speedup of 148 times over a 2 GHz AMD Opteron processor. The results indicate the feasibility of specialized hardware to accelerate larger biological scale implementations of the model.

  8. Human-machine interface hardware: The next decade

    NASA Technical Reports Server (NTRS)

    Marcus, Elizabeth A.

    1991-01-01

    In order to understand where human-machine interface hardware is headed, it is important to understand where we are today, how we got there, and what our goals for the future are. As computers become more capable, faster, and programs become more sophisticated, it becomes apparent that the interface hardware is the key to an exciting future in computing. How can a user interact and control a seemingly limitless array of parameters effectively? Today, the answer is most often a limitless array of controls. The link between these controls and human sensory motor capabilities does not utilize existing human capabilities to their full extent. Interface hardware for teleoperation and virtual environments is now facing a crossroad in design. Therefore, we as developers need to explore how the combination of interface hardware, human capabilities, and user experience can be blended to get the best performance today and in the future.

  9. Open Source Hardware for DIY Environmental Sensing

    NASA Astrophysics Data System (ADS)

    Aufdenkampe, A. K.; Hicks, S. D.; Damiano, S. G.; Montgomery, D. S.

    2014-12-01

    The Arduino open source electronics platform has been very popular within the DIY (Do It Yourself) community for several years, and it is now providing environmental science researchers with an inexpensive alternative to commercial data logging and transmission hardware. Here we present the designs for our latest series of custom Arduino-based dataloggers, which include wireless communication options like self-meshing radio networks and cellular phone modules. The main Arduino board uses a custom interface board to connect to various research-grade sensors to take readings of turbidity, dissolved oxygen, water depth and conductivity, soil moisture, solar radiation, and other parameters. Sensors with SDI-12 communications can be directly interfaced to the logger using our open Arduino-SDI-12 software library (https://github.com/StroudCenter/Arduino-SDI-12). Different deployment options are shown, like rugged enclosures to house the loggers and rigs for mounting the sensors in both fresh water and marine environments. After the data has been collected and transmitted by the logger, the data is received by a mySQL-PHP stack running on a web server that can be accessed from anywhere in the world. Once there, the data can be visualized on web pages or served though REST requests and Water One Flow (WOF) services. Since one of the main benefits of using open source hardware is the easy collaboration between users, we are introducing a new web platform for discussion and sharing of ideas and plans for hardware and software designs used with DIY environmental sensors and data loggers.

  10. RCP: a novel probe design bias correction method for Illumina Methylation BeadChip

    PubMed Central

    Niu, Liang; Xu, Zongli; Taylor, Jack A.

    2016-01-01

    Motivation: The Illumina HumanMethylation450 BeadChip has been extensively utilized in epigenome-wide association studies. This array and its successor, the MethylationEPIC array, use two types of probes—Infinium I (type I) and Infinium II (type II)—in order to increase genome coverage but differences in probe chemistries result in different type I and II distributions of methylation values. Ignoring the difference in distributions between the two probe types may bias downstream analysis. Results: Here, we developed a novel method, called Regression on Correlated Probes (RCP), which uses the existing correlation between pairs of nearby type I and II probes to adjust the beta values of all type II probes. We evaluate the effect of this adjustment on reducing probe design type bias, reducing technical variation in duplicate samples, improving accuracy of measurements against known standards, and retention of biological signal. We find that RCP is statistically significantly better than unadjusted data or adjustment with alternative methods including SWAN and BMIQ. Availability: We incorporated the method into the R package ENmix, which is freely available from the Bioconductor website (https://www.bioconductor.org/packages/release/bioc/html/ENmix.html). Contact: niulg@ucmail.uc.edu Supplementary information: Supplementary data are available at Bioinformatics online. PMID:27153672

  11. RCP: a novel probe design bias correction method for Illumina Methylation BeadChip.

    PubMed

    Niu, Liang; Xu, Zongli; Taylor, Jack A

    2016-09-01

    The Illumina HumanMethylation450 BeadChip has been extensively utilized in epigenome-wide association studies. This array and its successor, the MethylationEPIC array, use two types of probes-Infinium I (type I) and Infinium II (type II)-in order to increase genome coverage but differences in probe chemistries result in different type I and II distributions of methylation values. Ignoring the difference in distributions between the two probe types may bias downstream analysis. Here, we developed a novel method, called Regression on Correlated Probes (RCP), which uses the existing correlation between pairs of nearby type I and II probes to adjust the beta values of all type II probes. We evaluate the effect of this adjustment on reducing probe design type bias, reducing technical variation in duplicate samples, improving accuracy of measurements against known standards, and retention of biological signal. We find that RCP is statistically significantly better than unadjusted data or adjustment with alternative methods including SWAN and BMIQ. We incorporated the method into the R package ENmix, which is freely available from the Bioconductor website (https://www.bioconductor.org/packages/release/bioc/html/ENmix.html). niulg@ucmail.uc.edu Supplementary data are available at Bioinformatics online. Published by Oxford University Press 2016. This work is written by US Government employees and is in the public domain in the US.

  12. Hardware Support for Software Debugging

    DTIC Science & Technology

    2011-05-01

    Architecture • Concurrency Debugging - ReEnact • Conclusions Cost of Software Defects • Financial Costs • In a study by NIST in 2002 it was found that... ReEnact • Leverages modified Thread-Level Speculation (TLS) hardware • Create partial orderings of threads in a multithreaded program using...logical vector clocks • Using these orderings, ReEnact is able to detect and often repair data race conditions in a multithreaded program • Experiments

  13. LWH & ACH Helmet Hardware Study

    DTIC Science & Technology

    2015-11-30

    in the microstructures. 2.3 Hardness Tests on Polished Cross Sections Rockwell hardness ( ASTM E18 Standard Test Methods for Rockwell Hardness of...microhardness measurements ( ASTM E384 Standard Test Method for Microindentation Hardness of Materials) were made on the exterior surfaces of screws...using conventional techniques (e.g. ASTM E3 Preparation of Metallographic Specimens). The hardware pieces were cross- sectioned using a low-speed diamond

  14. Hunting for hardware changes in data centres

    NASA Astrophysics Data System (ADS)

    Coelho dos Santos, M.; Steers, I.; Szebenyi, I.; Xafi, A.; Barring, O.; Bonfillou, E.

    2012-12-01

    With many servers and server parts the environment of warehouse sized data centres is increasingly complex. Server life-cycle management and hardware failures are responsible for frequent changes that need to be managed. To manage these changes better a project codenamed “hardware hound” focusing on hardware failure trending and hardware inventory has been started at CERN. By creating and using a hardware oriented data set - the inventory - with detailed information on servers and their parts as well as tracking changes to this inventory, the project aims at, for example, being able to discover trends in hardware failure rates.

  15. UniBoard: generic hardware for radio astronomy signal processing

    NASA Astrophysics Data System (ADS)

    Hargreaves, J. E.

    2012-09-01

    UniBoard is a generic high-performance computing platform for radio astronomy, developed as a Joint Research Activity in the RadioNet FP7 Programme. The hardware comprises eight Altera Stratix IV Field Programmable Gate Arrays (FPGAs) interconnected by a high speed transceiver mesh. Each FPGA is connected to two DDR3 memory modules and three external 10Gbps ports. In addition, a total of 128 low voltage differential input lines permit connection to external ADC cards. The DSP capability of the board exceeds 644E9 complex multiply-accumulate operations per second. The first production run of eight boards was distributed to partners in The Netherlands, France, Italy, UK, China and Korea in May 2011, with a further production runs completed in December 2011 and early 2012. The function of the board is determined by the firmware loaded into its FPGAs. Current applications include beamformers, correlators, digital receivers, RFI mitigation for pulsar astronomy, and pulsar gating and search machines The new UniBoard based correlator for the European VLBI network (EVN) uses an FX architecture with half the resources of the board devoted to station based processing: delay and phase correction and channelization, and half to the correlation function. A single UniBoard can process a 64MHz band from 32 stations, 2 polarizations, sampled at 8 bit. Adding more UniBoards can expand the total bandwidth of the correlator. The design is able to process both prerecorded and real time (eVLBI) data.

  16. Methodology for Assessing Reusability of Spaceflight Hardware

    NASA Technical Reports Server (NTRS)

    Childress-Thompson, Rhonda; Thomas, L. Dale; Farrington, Phillip

    2017-01-01

    In 2011 the Space Shuttle, the only Reusable Launch Vehicle (RLV) in the world, returned to earth for the final time. Upon retirement of the Space Shuttle, the United States (U.S.) no longer possessed a reusable vehicle or the capability to send American astronauts to space. With the National Aeronautics and Space Administration (NASA) out of the RLV business and now only pursuing Expendable Launch Vehicles (ELV), not only did companies within the U.S. start to actively pursue the development of either RLVs or reusable components, but entities around the world began to venture into the reusable market. For example, SpaceX and Blue Origin are developing reusable vehicles and engines. The Indian Space Research Organization is developing a reusable space plane and Airbus is exploring the possibility of reusing its first stage engines and avionics housed in the flyback propulsion unit referred to as the Advanced Expendable Launcher with Innovative engine Economy (Adeline). Even United Launch Alliance (ULA) has announced plans for eventually replacing the Atlas and Delta expendable rockets with a family of RLVs called Vulcan. Reuse can be categorized as either fully reusable, the situation in which the entire vehicle is recovered, or partially reusable such as the National Space Transportation System (NSTS) where only the Space Shuttle, Space Shuttle Main Engines (SSME), and Solid Rocket Boosters (SRB) are reused. With this influx of renewed interest in reusability for space applications, it is imperative that a systematic approach be developed for assessing the reusability of spaceflight hardware. The partially reusable NSTS offered many opportunities to glean lessons learned; however, when it came to efficient operability for reuse the Space Shuttle and its associated hardware fell short primarily because of its two to four-month turnaround time. Although there have been several attempts at designing RLVs in the past with the X-33, Venture Star and Delta Clipper

  17. Evaluation of next generation hardware for lithography processing

    NASA Astrophysics Data System (ADS)

    Shimoaoki, T.; Enomoto, M.; Nafus, K.; Marumoto, H.; Kosugi, H.; Mallmann, J.; Maas, R.; Verspaget, C.; van der Heijden, E.; Wang, S.

    2010-04-01

    This work is the summary of improvements in processing capability implemented and tested on the LITHIUS ProTM -i / TWINSCANTM XT:1950Hi litho cluster installed at ASML's development clean room at Veldhoven, the Netherlands. Process performance with regards to CD uniformity (CDU) and defectivity are investigated to confirm adherence to ITRS roadmaps specifications. Specifically, imaging capabilities are tested for 40nm line 80nm pitch with the new bake plate hardware for below hp 3Xnm generation. For defectivity, the combination of Coater/Developer defect reduction hardware with the novel immersion hood design will be tested. For CDU improvements, the enhanced Post Exposure Bake (PEB) plate hardware was verified versus performance of the previous technology plate. Additionally, after the PEB improvement, a remaining across wafer signature was reduced with an optimized develop process. The total CDU budget was analyzed and compared to previous results. Finally the optimized process was applied to a non top coat resist process. For defectivity improvements, the effectiveness of ASML's new immersion hood and TEL's defect reduction hardware were evaluated. The new immersion hood performance was optimal on very hydrophobic materials, which requires optimization of the track hardware and process. The high contact angle materials could be shown to be successfully processed by using TEL's Advanced Defect Reduction (ADR) for residues related to the high contact angle and optimized bevel cut strategy with new bevel rinse hardware. Finally all the optimized processes were combined to obtain defect counts on a highly hydrophobic resist well within manufacturing specifications.

  18. On the use of inexact, pruned hardware in atmospheric modelling.

    PubMed

    Düben, Peter D; Joven, Jaume; Lingamneni, Avinash; McNamara, Hugh; De Micheli, Giovanni; Palem, Krishna V; Palmer, T N

    2014-06-28

    Inexact hardware design, which advocates trading the accuracy of computations in exchange for significant savings in area, power and/or performance of computing hardware, has received increasing prominence in several error-tolerant application domains, particularly those involving perceptual or statistical end-users. In this paper, we evaluate inexact hardware for its applicability in weather and climate modelling. We expand previous studies on inexact techniques, in particular probabilistic pruning, to floating point arithmetic units and derive several simulated set-ups of pruned hardware with reasonable levels of error for applications in atmospheric modelling. The set-up is tested on the Lorenz '96 model, a toy model for atmospheric dynamics, using software emulation for the proposed hardware. The results show that large parts of the computation tolerate the use of pruned hardware blocks without major changes in the quality of short- and long-time diagnostics, such as forecast errors and probability density functions. This could open the door to significant savings in computational cost and to higher resolution simulations with weather and climate models.

  19. On the use of inexact, pruned hardware in atmospheric modelling

    PubMed Central

    Düben, Peter D.; Joven, Jaume; Lingamneni, Avinash; McNamara, Hugh; De Micheli, Giovanni; Palem, Krishna V.; Palmer, T. N.

    2014-01-01

    Inexact hardware design, which advocates trading the accuracy of computations in exchange for significant savings in area, power and/or performance of computing hardware, has received increasing prominence in several error-tolerant application domains, particularly those involving perceptual or statistical end-users. In this paper, we evaluate inexact hardware for its applicability in weather and climate modelling. We expand previous studies on inexact techniques, in particular probabilistic pruning, to floating point arithmetic units and derive several simulated set-ups of pruned hardware with reasonable levels of error for applications in atmospheric modelling. The set-up is tested on the Lorenz ‘96 model, a toy model for atmospheric dynamics, using software emulation for the proposed hardware. The results show that large parts of the computation tolerate the use of pruned hardware blocks without major changes in the quality of short- and long-time diagnostics, such as forecast errors and probability density functions. This could open the door to significant savings in computational cost and to higher resolution simulations with weather and climate models. PMID:24842031

  20. Apollo Guidance, Navigation, and Control (GNC) Hardware Overview

    NASA Technical Reports Server (NTRS)

    Interbartolo, Michael

    2009-01-01

    This viewgraph presentation reviews basic guidance, navigation and control (GNC) concepts, examines the Command and Service Module (CSM) and Lunar Module (LM) GNC organization and discusses the primary GNC and the CSM Stabilization and Control System (SCS), as well as other CSM-specific hardware. The LM Abort Guidance System (AGS), Control Electronics System (CES) and other LM-specific hardware are also addressed. Three subsystems exist on each vehicle: the computer subsystem (CSS), the inertial subsystem (ISS) and the optical subsystem (OSS). The CSS and ISS are almost identical between CSM and LM and each is designed to operate independently. CSM SCS hardware are highlighted, including translation control, rotation controls, gyro assemblies, a gyro display coupler and flight director attitude indicators. The LM AGS hardware are also highlighted and include the abort electronics assembly and the abort sensor assembly; while the LM CES hardware includes the attitude controller assembly, thrust/translation controller assemblies and the ascent engine arming assemble. Other common hardware including the Orbital Rate Display - Earth and Lunar (ORDEAL) and the Crewman Optical Alignment Sight (COAS), a docking aid, are also highlighted.

  1. Stretched Lens Array (SLA) Photovoltaic Concentrator Hardware Development and Testing

    NASA Technical Reports Server (NTRS)

    Piszczor, Michael; O'Neill, Mark J.; Eskenazi, Michael

    2003-01-01

    Over the past two years, the Stretched Lens Array (SLA) photovoltaic concentrator has evolved, under a NASA contract, from a concept with small component demonstrators to operational array hardware that is ready for space validation testing. A fully-functional four panel SLA solar array has been designed, built and tested. This paper will summarize the focus of the hardware development effort, discuss the results of recent testing conducted under this program and present the expected performance of a full size 7kW array designed to meet the requirements of future space missions.

  2. Hardware and software reliability estimation using simulations

    NASA Technical Reports Server (NTRS)

    Swern, Frederic L.

    1994-01-01

    The simulation technique is used to explore the validation of both hardware and software. It was concluded that simulation is a viable means for validating both hardware and software and associating a reliability number with each. This is useful in determining the overall probability of system failure of an embedded processor unit, and improving both the code and the hardware where necessary to meet reliability requirements. The methodologies were proved using some simple programs, and simple hardware models.

  3. Extensible Hardware Architecture for Mobile Robots

    NASA Technical Reports Server (NTRS)

    Park, Eric; Kobayashi, Linda; Lee, Susan Y.

    2005-01-01

    The Intelligent Robotics Group at NASA Ames Research Center has developed a new mobile robot hardware architecture designed for extensibility and reconfigurability. Currently implemented on the k9 rover. and won to be integrated onto the K10 series of human-robot collaboration research robots, this architecture allows for rapid changes in instrumentation configuration and provides a high degree of modularity through a synergistic mix of off-the-shelf and custom designed components, allowing eased transplantation into a wide vane6 of mobile robot platforms. A component level overview of this architecture is presented along with a description of the changes required for implementation on K10 , followed by plans for future work.

  4. Efficient BinDCT hardware architecture exploration and implementation on FPGA.

    PubMed

    Ben Abdelali, Abdessalem; Chatti, Ichraf; Hannachi, Marwa; Mtibaa, Abdellatif

    2016-11-01

    This paper presents a hardware module design for the forward Binary Discrete Cosine Transform (BinDCT) and its implementation on a field programmable gate array device. Different architectures of the BinDCT module were explored to ensure the maximum efficiency. The elaboration of these architectures included architectural design, timing and pipeline analysis, hardware description language modeling, design synthesis, and implementation. The developed BinDCT hardware module presents a high efficiency in terms of operating frequency and hardware resources, which has made it suitable for the most recent video standards with high image resolution and refresh frequency. Additionally, the high hardware efficiency of the BinDCT would make it a very good candidate for time and resource-constrained applications. By comparison with several recent implementations of discrete cosine transform approximations, it has been shown that the proposed hardware BinDCT module presents the best performances.

  5. Solid-Liquid Interface Characterization Hardware

    NASA Technical Reports Server (NTRS)

    Peters, Palmer N.

    2000-01-01

    The objective is to develop enabling technology to characterize the solid-liquid interface during directional solidification to unprecedented levels with real-time measurement hardware. Existing x-ray imaging hardware is combined with compact Seebeck furnaces and thermal profiling hardware, under development, to accomplish the measurements. Furnace thermal profiles are continuously measured in addition to the sample characteristics.

  6. Instrumentation Hardware Abstraction Language (IHAL) Handbook

    DTIC Science & Technology

    2017-01-01

    Telemetry Group DOCUMENT 128-17 INSTRUMENTATION HARDWARE ABSTRACTION LANGUAGE (IHAL) HANDBOOK DISTRIBUTION A...intentionally left blank DOCUMENT 128-17 INSTRUMENTATION HARDWARE ABSTRACTION LANGUAGE (IHAL) HANDBOOK January 2017...5100 This page intentionally left blank. Instrumentation Hardware Abstract Language (IHAL) Handbook, RCC Document 128-17, January 2017 iii

  7. Effects of the preventive and corrective adjustments in economical designs for online process control for attributes with misclassification errors

    NASA Astrophysics Data System (ADS)

    Quinino, Roberto C.; Ho, Linda Lee

    2010-01-01

    The procedure for online process control by attributes consists of inspecting a single item at every m produced items. It is decided on the basis of the inspection result whether the process is in-control (the conforming fraction is stable) or out-of-control (the conforming fraction is decreased, for example). Most articles about online process control have cited the stoppage of the production process for an adjustment when the inspected item is non-conforming (then the production is restarted in-control, here denominated as corrective adjustment). Moreover, the articles related to this subject do not present semi-economical designs (which may yield high quantities of non-conforming items), as they do not include a policy of preventive adjustments (in such case no item is inspected), which can be more economical, mainly if the inspected item can be misclassified. In this article, the possibility of preventive or corrective adjustments in the process is decided at every m produced item. If a preventive adjustment is decided upon, then no item is inspected. On the contrary, the m-th item is inspected; if it conforms, the production goes on, otherwise, an adjustment takes place and the process restarts in-control. This approach is economically feasible for some practical situations and the parameters of the proposed procedure are determined minimizing an average cost function subject to some statistical restrictions (for example, to assure a minimal level-fixed in advance-of conforming items in the production process). Numerical examples illustrate the proposal.

  8. GENI: Grid Hardware and Software

    SciTech Connect

    2012-01-09

    GENI Project: The 15 projects in ARPA-E’s GENI program, short for “Green Electricity Network Integration,” aim to modernize the way electricity is transmitted in the U.S. through advances in hardware and software for the electric grid. These advances will improve the efficiency and reliability of electricity transmission, increase the amount of renewable energy the grid can utilize, and provide energy suppliers and consumers with greater control over their power flows in order to better manage peak power demand and cost.

  9. [Correction of cronic liver failure by transplantation of liver cells suspension and cell-engineering designs (experimental investigation)].

    PubMed

    Got'e, S V; Shagidulin, M Iu; Onishchenko, N A; Krasheninnikov, M E; Il'inskiĭ, I M; Mozheĭko, N P; Liundup, A V; Volkova, E A; Petrakov, K I; Avramov, P V; Perova, N V; Sevast'ianov, V I

    2013-01-01

    On an experimental model of chronic fibrotic liver damage (male rats Wistar (n-60), damage of CCl4, the duration of the experiment 90 days) it was studied the effectiveness of cell therapy for the correction of chronic liver failure. These rats were divided into 3 experimental groups: in the Ist-group (control, n=10) isotonic saline (650 mkl.) was injected; in the IInd-group (n=20) suspension of liver cells was applicated in a dose 8 - l0 x 10(6) cells; in the IIIrd-group (n=30) suspension of liver cells and bone marrow cells (mesenchymal stromal cells) in ratio 5:1 were used as cell associates on microparticles intjectable heterogeneous biopolymer hydrogel "SpheroGEL" (cell-engineering design) in common dose 8 - l0 x 10(6) It was ascertained that in the 2nd and in the 3rd groups the accelerated normalization of disturbed liver functional indices (ALT, AST, ALP) took place - to 30 days, but in the control group only to 90 days. The reliable differences in rats ofnormalization offunctional indices were absent between the IInd and the IIIrd groups. But in 90 days by using special histological dyeing it was found out that defibrotic processes in liver tissue were more expressed in the IIIrd group in comparison with the IIIrd group. Received results were consequence of prolonged vital activity of cells (liver cells and mesenchymal stromal bone marrow cells) into cell-engineering designs, which were transplanted in the IIIrd group. The obtained effect can be explained by that the developed cell-engineering designs provide adequate conditions for prolonged vital activity of the transplanted cells.

  10. Design study of Software-Implemented Fault-Tolerance (SIFT) computer

    NASA Technical Reports Server (NTRS)

    Wensley, J. H.; Goldberg, J.; Green, M. W.; Kutz, W. H.; Levitt, K. N.; Mills, M. E.; Shostak, R. E.; Whiting-Okeefe, P. M.; Zeidler, H. M.

    1982-01-01

    Software-implemented fault tolerant (SIFT) computer design for commercial aviation is reported. A SIFT design concept is addressed. Alternate strategies for physical implementation are considered. Hardware and software design correctness is addressed. System modeling and effectiveness evaluation are considered from a fault-tolerant point of view.

  11. Electronic processing and control system with programmable hardware

    NASA Technical Reports Server (NTRS)

    Alkalaj, Leon (Inventor); Fang, Wai-Chi (Inventor); Newell, Michael A. (Inventor)

    1998-01-01

    A computer system with reprogrammable hardware allowing dynamically allocating hardware resources for different functions and adaptability for different processors and different operating platforms. All hardware resources are physically partitioned into system-user hardware and application-user hardware depending on the specific operation requirements. A reprogrammable interface preferably interconnects the system-user hardware and application-user hardware.

  12. KENNEDY SPACE CENTER, FLA. - A KSC employee dressed in a "bunny suit," standard clean room apparel, disposes of some waste material into a container designated for the purpose. The apparel is designed to cover the hair, clothing and shoes of employees entering a clean room to prevent particulate matter from contaminating the space flight hardware being stored or processed in the room. The suit and container are both part of KSC's Foreign Object Debris (FOD) control program, an important safety initiative.

    NASA Image and Video Library

    2003-08-29

    KENNEDY SPACE CENTER, FLA. - A KSC employee dressed in a "bunny suit," standard clean room apparel, disposes of some waste material into a container designated for the purpose. The apparel is designed to cover the hair, clothing and shoes of employees entering a clean room to prevent particulate matter from contaminating the space flight hardware being stored or processed in the room. The suit and container are both part of KSC's Foreign Object Debris (FOD) control program, an important safety initiative.

  13. STS-71 hardware assembly view

    NASA Image and Video Library

    1994-12-02

    S94-47810 (2 Dec. 1994) --- Lockheed Space Operations Company workers in the Extended Duration Orbiter (EDO) Facility, located inside the Vehicle Assembly Building (VAB), carefully hoist the Orbiter Docking System (ODS) from its shipping container into a test stand. The ODS was shipped in a horizontal position to the Kennedy Space Center (KSC) from contractor Rockwell Aerospace's Downey plant. Once the ODS is upright, work can continue to prepare the hardware for the first docking of the United States Space Shuttle and Russian Space Station MIR in 1995. The ODS contains both United States-made and Russian-made hardware. The black band is Russian-made thermal insulation protecting part of the docking mechanism, also Russian-made, called the Androgynous Peripheral Docking System (APDS). A red protective cap covers the APDS itself. Other elements of the ODS, most of it protected by white United States-made thermal insulation, were developed by Rockwell, which also integrated and checked out the assembled Russian-United States system.

  14. Political Correctness--Correct?

    ERIC Educational Resources Information Center

    Boase, Paul H.

    1993-01-01

    Examines the phenomenon of political correctness, its roots and objectives, and its successes and failures in coping with the conflicts and clashes of multicultural campuses. Argues that speech codes indicate failure in academia's primary mission to civilize and educate through talk, discussion, thought,166 and persuasion. (SR)

  15. Toward Composable Hardware Agnostic Communications Blocks Lessons Learned

    DTIC Science & Technology

    2016-11-01

    been in use for over 40 years. Airborne tactical systems are often stove-piped, highly integrated, and designed to be hardware-specific, making insertion...developed in software. By enabling more functionality in software, system designs are more easily modifiable and extensible. This paradigm change has...integrated systems that provide a single, clearly defined capability [3]. In fact, the design of many airborne communication systems is tightly

  16. Hardware-efficient low-power image processing system for wireless capsule endoscopy.

    PubMed

    Turcza, Pawel; Duplaga, Mariusz

    2013-11-01

    This paper presents the design of a hardware-efficient, low-power image processing system for next-generation wireless endoscopy. The presented system is composed of a custom CMOS image sensor, a dedicated image compressor, a forward error correction (FEC) encoder protecting radio transmitted data against random and burst errors, a radio data transmitter, and a controller supervising all operations of the system. The most significant part of the system is the image compressor. It is based on an integer version of a discrete cosine transform and a novel, low complexity yet efficient, entropy encoder making use of an adaptive Golomb-Rice algorithm instead of Huffman tables. The novel hardware-efficient architecture designed for the presented system enables on-the-fly compression of the acquired image. Instant compression, together with elimination of the necessity of retransmitting erroneously received data by their prior FEC encoding, significantly reduces the size of the required memory in comparison to previous systems. The presented system was prototyped in a single, low-power, 65-nm field programmable gate arrays (FPGA) chip. Its power consumption is low and comparable to other application-specific-integrated-circuits-based systems, despite FPGA-based implementation.

  17. Field-programmable gate array-based hardware architecture for high-speed camera with KAI-0340 CCD image sensor

    NASA Astrophysics Data System (ADS)

    Wang, Hao; Yan, Su; Zhou, Zuofeng; Cao, Jianzhong; Yan, Aqi; Tang, Linao; Lei, Yangjie

    2013-08-01

    We present a field-programmable gate array (FPGA)-based hardware architecture for high-speed camera which have fast auto-exposure control and colour filter array (CFA) demosaicing. The proposed hardware architecture includes the design of charge coupled devices (CCD) drive circuits, image processing circuits, and power supply circuits. CCD drive circuits transfer the TTL (Transistor-Transistor-Logic) level timing Sequences which is produced by image processing circuits to the timing Sequences under which CCD image sensor can output analog image signals. Image processing circuits convert the analog signals to digital signals which is processing subsequently, and the TTL timing, auto-exposure control, CFA demosaicing, and gamma correction is accomplished in this module. Power supply circuits provide the power for the whole system, which is very important for image quality. Power noises effect image quality directly, and we reduce power noises by hardware way, which is very effective. In this system, the CCD is KAI-0340 which is can output 210 full resolution frame-per-second, and our camera can work outstandingly in this mode. The speed of traditional auto-exposure control algorithms to reach a proper exposure level is so slow that it is necessary to develop a fast auto-exposure control method. We present a new auto-exposure algorithm which is fit high-speed camera. Color demosaicing is critical for digital cameras, because it converts a Bayer sensor mosaic output to a full color image, which determines the output image quality of the camera. Complexity algorithm can acquire high quality but cannot implement in hardware. An low-complexity demosaicing method is presented which can implement in hardware and satisfy the demand of quality. The experiment results are given in this paper in last.

  18. Correction of a skeletal Class II malocclusion with severe crowding by a specially designed rapid maxillary expander.

    PubMed

    Wang, Honghong; Feng, Jing; Lu, Peijun; Shen, Gang

    2015-02-01

    To correct an Angle Class II malocclusion or to create spaces in the maxillary arch by nonextraction treatment, distal movement of the maxillary molars is required. Various modalities for distalizing the buccal segment have been reported. Conventional extraoral appliances can be used to obtain maximum anchorage. However, many patients reject headgear wear because of social and esthetic concerns, and the success of this treatment depends on patient compliance. Intraoral appliances, such as repelling magnets, nickel-titanium coils, pendulum appliance, Jones jig appliance, distal jet appliance, and modified Nance appliance, have been introduced to distalize the molars with little or no patient cooperation. However, intraoral appliances can result in anchorage loss of the anterior teeth and distal tipping of the maxillary molars. In this case report, we introduce a diversified rapid maxillary expansion appliance that was custom designed and fabricated for the treatment of a growing girl with a skeletal Class II malocclusion and severe crowding from a totally lingually positioned lateral incisor. The appliance concomitantly expanded the maxilla transversely and retracted the buccal segment sagittally, distalizing the maxillary molars to reach a Class I relationship and creating the spaces to displace the malpositioned lateral incisor. The uniqueness of this special diversified rapid maxillary expansion appliance was highlighted by a series of reconstructions and modifications at different stages of the treatment to reinforce the anchorage.

  19. Field curvature correction method for ultrashort throw ratio projection optics design using an odd polynomial mirror surface.

    PubMed

    Zhuang, Zhenfeng; Chen, Yanting; Yu, Feihong; Sun, Xiaowei

    2014-08-01

    This paper presents a field curvature correction method of designing an ultrashort throw ratio (TR) projection lens for an imaging system. The projection lens is composed of several refractive optical elements and an odd polynomial mirror surface. A curved image is formed in a direction away from the odd polynomial mirror surface by the refractive optical elements from the image formed on the digital micromirror device (DMD) panel, and the curved image formed is its virtual image. Then the odd polynomial mirror surface enlarges the curved image and a plane image is formed on the screen. Based on the relationship between the chief ray from the exit pupil of each field of view (FOV) and the corresponding predescribed position on the screen, the initial profile of the freeform mirror surface is calculated by using segments of the hyperbolic according to the laws of reflection. For further optimization, the value of the high-order odd polynomial surface is used to express the freeform mirror surface through a least-squares fitting method. As an example, an ultrashort TR projection lens that realizes projection onto a large 50 in. screen at a distance of only 510 mm is presented. The optical performance for the designed projection lens is analyzed by ray tracing method. Results show that an ultrashort TR projection lens modulation transfer function of over 60% at 0.5 cycles/mm for all optimization fields is achievable with f-number of 2.0, 126° full FOV, <1% distortion, and 0.46 TR. Moreover, in comparing the proposed projection lens' optical specifications to that of traditional projection lenses, aspheric mirror projection lenses, and conventional short TR projection lenses, results indicate that this projection lens has the advantages of ultrashort TR, low f-number, wide full FOV, and small distortion.

  20. Review of Maxillofacial Hardware Complications and Indications for Salvage

    PubMed Central

    Hernandez Rosa, Jonatan; Villanueva, Nathaniel L.; Sanati-Mehrizy, Paymon; Factor, Stephanie H.; Taub, Peter J.

    2015-01-01

    From 2002 to 2006, more than 117,000 facial fractures were recorded in the U.S. National Trauma Database. These fractures are commonly treated with open reduction and internal fixation. While in place, the hardware facilitates successful bony union. However, when postoperative complications occur, the plates may require removal before bony union. Indications for salvage versus removal of the maxillofacial hardware are not well defined. A literature review was performed to identify instances when hardware may be salvaged. Articles considered for inclusion were found in the PubMed and Web of Science databases in August 2014 with the keywords maxillofacial trauma AND hardware complications OR indications for hardware removal. Included studies looked at human patients with only facial trauma and miniplate fixation, and presented data on complications and/or hardware removal. Fifteen articles were included. None were clinical trials. Complication data were presented by patient, fractures, and/or plate without consistency. The data described 1,075 fractures, 2,961 patients, and 2,592 plates, nonexclusive. Complication rates varied from 6 to 8% by fracture and 6 to 13% by patient. When their data were combined, 50% of complications were treated with plate removal; this was consistent across the mandible, midface, and upper face. All complications caused by loosening, nonunion, broken hardware, and severe/prolonged pain were treated with removal. Some complications caused by exposures, deformities, and infections were treated with salvage. Exposed plates were treated with flaps, plates with deformities were treated with secondary procedures including hardware revision, and hardware infections were treated with antibiotics alone or in conjunction with soft-tissue debridement and/or tooth extraction. Well-designed clinical trials evaluating hardware removal versus salvage are lacking. Some postoperative complications caused by exposure, deformity, and/or infection may be

  1. Review of Maxillofacial Hardware Complications and Indications for Salvage.

    PubMed

    Hernandez Rosa, Jonatan; Villanueva, Nathaniel L; Sanati-Mehrizy, Paymon; Factor, Stephanie H; Taub, Peter J

    2016-06-01

    From 2002 to 2006, more than 117,000 facial fractures were recorded in the U.S. National Trauma Database. These fractures are commonly treated with open reduction and internal fixation. While in place, the hardware facilitates successful bony union. However, when postoperative complications occur, the plates may require removal before bony union. Indications for salvage versus removal of the maxillofacial hardware are not well defined. A literature review was performed to identify instances when hardware may be salvaged. Articles considered for inclusion were found in the PubMed and Web of Science databases in August 2014 with the keywords maxillofacial trauma AND hardware complications OR indications for hardware removal. Included studies looked at human patients with only facial trauma and miniplate fixation, and presented data on complications and/or hardware removal. Fifteen articles were included. None were clinical trials. Complication data were presented by patient, fractures, and/or plate without consistency. The data described 1,075 fractures, 2,961 patients, and 2,592 plates, nonexclusive. Complication rates varied from 6 to 8% by fracture and 6 to 13% by patient. When their data were combined, 50% of complications were treated with plate removal; this was consistent across the mandible, midface, and upper face. All complications caused by loosening, nonunion, broken hardware, and severe/prolonged pain were treated with removal. Some complications caused by exposures, deformities, and infections were treated with salvage. Exposed plates were treated with flaps, plates with deformities were treated with secondary procedures including hardware revision, and hardware infections were treated with antibiotics alone or in conjunction with soft-tissue debridement and/or tooth extraction. Well-designed clinical trials evaluating hardware removal versus salvage are lacking. Some postoperative complications caused by exposure, deformity, and/or infection may be

  2. Product Assurance for Spaceflight Hardware

    NASA Technical Reports Server (NTRS)

    Monroe, Mike

    1995-01-01

    This report contains information about the tasks I have completed and the valuable experience I have gained at NASA. The report is divided into two different sections followed by a program summary sheet. The first section describes the two reports I have completed for the Office of Mission Assurance (OMA). I describe the approach and the resources and facilities used to complete each report. The second section describes my experience working in the Receipt Inspection/Quality Assurance Lab (RI/QA). The first report described is a Product Assurance Plan for the Gas Permeable Polymer Materials (GPPM) mission. The purpose of the Product Assurance Plan is to define the various requirements which are to be met through completion of the GPPM mission. The GPPM experiment is a space payload which will be flown in the shuttle's SPACEHAB module. The experiment will use microgravity to enable production of complex polymeric gas permeable materials. The second report described in the first section is a Fracture Analysis for the Mir Environmental Effects Payload (MEEP). The Fracture Analysis report is a summary of the fracture control classifications for all structural elements of the MEEP. The MEEP hardware consists of four experiment carriers, each of which contains an experiment container holding a passive experiment. The MEEP hardware will be attached to the cargo bay of the space shuttle. It will be transferred by Extravehicular Activity and mounted on the Mir space station. The second section of this report describes my experiences in the RVQA lab. I listed the different equipment I used at the lab and their functions. I described the extensive inspection process that must be completed for spaceflight hardware. Included, at the end of this section, are pictures of most of the equipment used in the lab. There is a summary sheet located at the end of this report. It briefly describes the valuable experience I have gained at NASA this summer and what I will be able to take

  3. Neural Networks Based Approach to Enhance Space Hardware Reliability

    NASA Technical Reports Server (NTRS)

    Zebulum, Ricardo S.; Thakoor, Anilkumar; Lu, Thomas; Franco, Lauro; Lin, Tsung Han; McClure, S. S.

    2011-01-01

    This paper demonstrates the use of Neural Networks as a device modeling tool to increase the reliability analysis accuracy of circuits targeted for space applications. The paper tackles a number of case studies of relevance to the design of Flight hardware. The results show that the proposed technique generates more accurate models than the ones regularly used to model circuits.

  4. Neural Networks Based Approach to Enhance Space Hardware Reliability

    NASA Technical Reports Server (NTRS)

    Zebulum, Ricardo S.; Thakoor, Anilkumar; Lu, Thomas; Franco, Lauro; Lin, Tsung Han; McClure, S. S.

    2011-01-01

    This paper demonstrates the use of Neural Networks as a device modeling tool to increase the reliability analysis accuracy of circuits targeted for space applications. The paper tackles a number of case studies of relevance to the design of Flight hardware. The results show that the proposed technique generates more accurate models than the ones regularly used to model circuits.

  5. Combine Security and Safety with the Right Door Hardware.

    ERIC Educational Resources Information Center

    Olmstead, Patrick R.

    1999-01-01

    Discusses how door design and construction can add safety and security to educational facilities. Exit device variations, and electromagnetic locks and access control are explored. Also discussed are inexpensive ways to improve the safety and security profiles of a building using door hardware. (GR)

  6. A Multi-User Shared Hardware Audio Response System.

    ERIC Educational Resources Information Center

    Voth, Brian

    A flexible surface disc device serves as the basis for the design of a computer operated multi-user shared hardware audio response system. The device employs a slow moving flexible, air supported surface in contact with a large number of heads. Relatively instantaneous distribution of audio from any portion of the disc to the users in accomplished…

  7. Fastener Retention Requirements and Practices in Spaceflight Hardware

    NASA Technical Reports Server (NTRS)

    Dasgupta, Rajib

    2004-01-01

    This presentation reviews the requirements for safety critical fasteners in spaceflight hardware. Included in the presentation are design guidelines and information for Locking Helicoils, key locked inserts and thinwalled inserts, self locking screws and bolts. locknuts, and a locking adhesives, Loctite and Vibratite.

  8. The Certification of Environmental Chambers for Testing Flight Hardware

    NASA Technical Reports Server (NTRS)

    Fields, Keith

    2009-01-01

    The JPL chamber certification process for ensuring that test chambers used to test flight hardware meet a minimum standard is critical to the safety of the hardware and personnel. Past history as demonstrated that this process is important due to the catastrophic incidents that could occur if the chamber is not set up correctly. Environmental testing is one of the last phases in the development of a subsystem, and it typically occurs just before integration of flight hardware into the fully assembled flight system. A seemingly insignificant -miscalculation or missed step can necessitate rebuilding or replacing a subsystem due to over-testing or damage from the test chamber. Conversely, under-testing might fail to detect weaknesses that might cause failure when the hardware is in service. This paper describes the process that identifies the many variables that comprise the testing scenario and screening of as built chambers, the training of qualified operators, and a general "what-to-look-for" in minimum standards.

  9. The Certification of Environmental Chambers for Testing Flight Hardware

    NASA Technical Reports Server (NTRS)

    Fields, Keith

    2010-01-01

    The JPL chamber certification process for ensuring that test chambers used to test flight hardware meet a minimum standard is critical to the safety of the hardware and personnel. Past history has demonstrated that this process is important due to the catastrophic incidents that could occur if the chamber is not set up correctly. Environmental testing is one of the last phases in the development of a subsystem, and it typically occurs just before integration of flight hardware into the fully assembled flight system. A seemingly insignificant -miscalculation or missed step can necessitate rebuilding or replacing a subsystem due to over-testing or damage from the test chamber. Conversely, under-testing might fail to detect weaknesses that might cause failure when the hardware is in service. This paper describes the process that identifies the many variables that comprise the testing scenario and screening of as built chambers, the training of qualified operators, and a general "what-to-look-for" in minimum standards.

  10. Space biology initiative program definition review. Trade study 3: Hardware miniaturization versus cost

    NASA Technical Reports Server (NTRS)

    Jackson, L. Neal; Crenshaw, John, Sr.; Davidson, William L.; Herbert, Frank J.; Bilodeau, James W.; Stoval, J. Michael; Sutton, Terry

    1989-01-01

    The optimum hardware miniaturization level with the lowest cost impact for space biology hardware was determined. Space biology hardware and/or components/subassemblies/assemblies which are the most likely candidates for application of miniaturization are to be defined and relative cost impacts of such miniaturization are to be analyzed. A mathematical or statistical analysis method with the capability to support development of parametric cost analysis impacts for levels of production design miniaturization are provided.

  11. Surface moisture measurement system hardware acceptance test report

    SciTech Connect

    Ritter, G.A., Westinghouse Hanford

    1996-05-28

    This document summarizes the results of the hardware acceptance test for the Surface Moisture Measurement System (SMMS). This test verified that the mechanical and electrical features of the SMMS functioned as designed and that the unit is ready for field service. The bulk of hardware testing was performed at the 306E Facility in the 300 Area and the Fuels and Materials Examination Facility in the 400 Area. The SMMS was developed primarily in support of Tank Waste Remediation System (TWRS) Safety Programs for moisture measurement in organic and ferrocyanide watch list tanks.

  12. Automating an EXAFS facility: hardware and software considerations

    SciTech Connect

    Georgopoulos, P; Sayers, D E; Bunker, B; Elam, T; Grote, W A

    1981-01-01

    The basic design considerations for computer hardware and software, applicable not only to laboratory EXAFS facilities, but also to synchrotron installations, are reviewed. Uniformity and standardization of both hardware configurations and program packages for data collection and analysis are heavily emphasized. Specific recommendations are made with respect to choice of computers, peripherals, and interfaces, and guidelines for the development of software packages are set forth. A description of two working computer-interfaced EXAFS facilities is presented which can serve as prototypes for future developments. 3 figures.

  13. Low-power hardware for neural spike compression in BMIs.

    PubMed

    Lapolli, Ângelo C; Coppa, Bertrand; Héliot, Rodolphe

    2013-01-01

    Within brain-machine interface systems, cortically implanted microelectrode arrays and associated hardware have a low-power budget for data sampling, processing, and transmission. Recent studies have shown the feasibility of data transmission rate reduction using compressed sensing on detected neural spikes. They provide power savings while maintaining clustering and classification abilities. We propose and analyze here a low-power hardware implementation for spike detection and compression. The resulting integrated circuit, designed in CMOS 65 nm technology, consumes 2.83 µW and provides 97% of data rate reduction.

  14. Designing corrections for the trajectory of the Spektr-R spacecraft in the event of immersions into the Moon's sphere of influence

    NASA Astrophysics Data System (ADS)

    Zaslavskii, G. S.; Zakhvatkin, M. V.; Kardashev, N. S.; Kovalev, Yu. Yu.; Mikhailov, E. A.; Popov, M. V.; Sokolovskii, K. V.; Stepan'yants, V. A.; Tuchin, A. G.

    2017-07-01

    The results of updating the parameters of motion of the Spektr-R spacecraft at the end of 2016 have shown that, in January 2018, with a probability close to unity, the condition that a spacecraft stay in the Earth's shadow is violated; however, in May of the same year, the ballistic life of the spacecraft will be terminated. Thus, in 2017, the question arose of how to design the correction of flight of this spacecraft using its onboard propulsion system. The correction was designed with allowance for the fact that, for the first time since it was launched, the spacecraft in the course of several years, beginning with 2017, repeatedly approaches the Moon, deeply immersing into its sphere of influence. This paper presents the technologically and organizationally convenient, allowable versions of upcoming correction of the Spektr-R spacecraft trajectory and justifies the particular scheme of its implementation.

  15. Hardware friendly adaptive support-weight approach for stereo matching

    NASA Astrophysics Data System (ADS)

    Hou, Zuoxun; Han, Pei; Zhang, Hongwei; An, Ran

    2016-10-01

    In this paper, the hardware friendly adaptive support-weight approach is proposed to simplify the weight calculation process of the standard approach, which employs the support region to simplify the calculation of the similarity and uses the fixed distance dependent weight to present the proximity. In addition, the complete stereo matching algorithm and the hardware structure for FPGA implementation compatible with the approach is proposed. The experimental results show that the algorithm produces the disparity map accurately in different illumination conditions and different scenes, and its processing average bad pixel rate is only 6.65% for the standard test images of the Middlebury database, which is approximate to the performance of the standard adaptive support-weight approach. The proposed hardware structure provides a basis for design and implementation of real-time accurate stereo matching FPGA system.

  16. Development of Enhanced Avionics Flight Hardware Selection Process

    NASA Technical Reports Server (NTRS)

    Smith, K.; Watson, G. L.

    2003-01-01

    The primary objective of this research was to determine the processes and feasibility of using commercial off-the-shelf PC104 hardware for flight applications. This would lead to a faster, better, and cheaper approach to low-budget programs as opposed to the design, procurement. and fabrication of space flight hardware. This effort will provide experimental evaluation with results of flight environmental testing. Also, a method and/or suggestion used to bring test hardware up to flight standards will be given. Several microgravity programs, such as the Equiaxed Dendritic Solidification Experiment, Self-Diffusion in Liquid Elements, and various other programs, are interested in PC104 environmental testing to establish the limits of this technology.

  17. High-Speed Isolation Board for Flight Hardware Testing

    NASA Technical Reports Server (NTRS)

    Yamamoto, Clifford K.; Goodpasture, Richard L.

    2011-01-01

    There is a need to provide a portable and cost-effective galvanic isolation between ground support equipment and flight hardware such that any unforeseen voltage differential between ground and power supplies is eliminated. An interface board was designed for use between the ground support equipment and the flight hardware that electrically isolates all input and output signals and faithfully reproduces them on each side of the interface. It utilizes highly integrated multi-channel isolating devices to minimize size and reduce assembly time. This single-board solution provides appropriate connector hardware and breakout of required flight signals to individual connectors as needed for various ground support equipment. The board utilizes multi-channel integrated circuits that contain transformer coupling, thereby allowing input and output signals to be isolated from one another while still providing high-fidelity reproduction of the signal up to 90 MHz. The board also takes in a single-voltage power supply input from the ground support equipment and in turn provides a transformer-derived isolated voltage supply to power the portion of the circuitry that is electrically connected to the flight hardware. Prior designs used expensive opto-isolated couplers that were required for each signal to isolate and were time-consuming to assemble. In addition, these earlier designs were bulky and required a 2U rack-mount enclosure. The new design is smaller than a piece of 8.5 11-in. (.22 28-mm) paper and can be easily hand-carried where needed. The flight hardware in question is based on a lineage of existing software-defined radios (SDRs) that utilize a common interface connector with many similar input-output signals present. There are currently four to five variations of this SDR, and more upcoming versions are planned based on the more recent design.

  18. Design for the correction system of the real time nonuniformity of large area-array CCD image

    NASA Astrophysics Data System (ADS)

    Wang, Yan; Li, Chunmei; Lei, Ning

    2012-10-01

    With the robust thriving of aviation cameras and remote sensing technology, the linear-array CCD (charge-coupled device) and area CCD have developed toward large area CCD, which has a broad coverage and avoids the difficulty in jointing small area CCDs in addition to improving time resolution. However, due to the high amount of pixels and channels of large area CCD, photo-response non-uniformity (PRNU) is severe. In this paper, a real time non-uniformity correction system is introduced for a sort of large area full frame transfer CCD. First, the correction algorithm is elaborated according to CCD's working principle. Secondly, due to the high number of pixels and correction coefficient, ordinary chip memory cannot meet the requirement. The combination of external flash memory and DDR described in the paper satisfies large capacity memory and rapid real time correction. The methods and measurement steps for obtaining correction factors are provided simultaneously. At the end, an imaging test is made. The non-uniformity of the image is reduced to 0.38 % from the pre-correction 2.96 %, achieving an obvious reduction of non-uniformity. The result shows that the real time non-uniformity correction system can meet the demands of large area-array CCD.

  19. Hardware Implementation of Singular Value Decomposition

    NASA Astrophysics Data System (ADS)

    Majumder, Swanirbhar; Shaw, Anil Kumar; Sarkar, Subir Kumar

    2016-06-01

    Singular value decomposition (SVD) is a useful decomposition technique which has important role in various engineering fields such as image compression, watermarking, signal processing, and numerous others. SVD does not involve convolution operation, which make it more suitable for hardware implementation, unlike the most popular transforms. This paper reviews the various methods of hardware implementation for SVD computation. This paper also studies the time complexity and hardware complexity in various methods of SVD computation.

  20. Hardware Assisted ROP Detection Mode (HARD Mode)

    DTIC Science & Technology

    2013-08-01

    Distribution A. Cleared for public release; unlimited distribution. USAFA-CN-2013-457 Hardware Assisted ROP Detection Mode (HARD Mode) NATHANIEL HART...457 This report, "Hardware Assisted ROP Detection Mode (HARD Mode)" is presented as a competent treatment of the subj ect, worthy of publication. The...Technical 20120810-20121215 Hardware Assisted ROP Detection Mode (HARD Mode) NATHANIEL HART MICHAEL WINSTEAD MARTIN CARLISLE RODNEY LYKINS MICHAEL