Area efficient layout design of CMOS circuit for high-density ICs

NASA Astrophysics Data System (ADS)

Mishra, Vimal Kumar; Chauhan, R. K.

2018-01-01

Efficient layouts have been an active area of research to accommodate the greater number of devices fabricated on a given chip area. In this work a new layout of CMOS circuit is proposed, with an aim to improve its electrical performance and reduce the chip area consumed. The study shows that the design of CMOS circuit and SRAM cells comprising tapered body reduced source fully depleted silicon on insulator (TBRS FD-SOI)-based n- and p-type MOS devices. The proposed TBRS FD-SOI n- and p-MOSFET exhibits lower sub-threshold slope and higher Ion to Ioff ratio when compared with FD-SOI MOSFET and FinFET technology. Other parameters like power dissipation, delay time and signal-to-noise margin of CMOS inverter circuits show improvement when compared with available inverter designs. The above device design is used in 6-T SRAM cell so as to see the effect of proposed layout on high density integrated circuits (ICs). The SNM obtained from the proposed SRAM cell is 565 mV which is much better than any other SRAM cell designed at 50 nm gate length MOS device. The Sentaurus TCAD device simulator is used to design the proposed MOS structure.

Manufacturing Methods and Technology Engineering (MM&TE) Program for the Establishment of Production Techniques for High Density Thick Film Circuits Used in Crystal Oscillators. Volume I.

DTIC Science & Technology

1980-04-01

incorporate the high reliability ceramic-packaged quartz crystal resonator developed at ERADCOM, and utilize beam -leaded devices wherever possible...the form of a truncated cylinder. The rather complex module outline is best accomplished through the use of a precast potting shell filled with a low...crossover connections are achieved by means of thick-film dielectric material. Chip components attached to the metallized substrate complete the circuits

High density harp for SSCL linac. [Suerconducting Super Collider Laboratory (SSCL)

DOE Office of Scientific and Technical Information (OSTI.GOV)

Fritsche, C.T.; Krogh, M.L.; Crist, C.E.

1993-05-01

AlliedSignal Inc., Kansas City Division, and the Superconducting Super Collider Laboratory (SSCL) are collaboratively developing a high density harp for the SSCL linac. This harp is designed using hybrid microcircuit (HMC) technology to obtain a higher wire density than previously available. The developed harp contains one hundred twenty-eight 33-micron-diameter carbon wires on 0.38-mm centers. The harp features an onboard broken wire detection circuit. Carbon wire preparation and attachment processes were developed. High density surface mount connectors were located. The status of high density harp development will be presented along with planned future activities.

High density harp for SSCL linac

DOE Office of Scientific and Technical Information (OSTI.GOV)

Fritsche, C.T.; Krogh, M.L.; Crist, C.E.

1993-05-01

AlliedSignal Inc., Kansas City Division, and the Superconducting Super Collider Laboratory (SSCL) are collaboratively developing a high density harp for the SSCL linac. This harp is designed using hybrid microcircuit (HMC) technology to obtain a higher wire density than previously available. The developed harp contains one hundred twenty-eight 33-micron-diameter carbon wires on 0.38-mm centers. The harp features an onboard broken wire detection circuit. Carbon wire preparation and attachment processes were developed. High density surface mount connectors were located. The status of high density harp development will be presented along with planned future activities.

GaAs VLSI technology and circuit elements for DSP

NASA Astrophysics Data System (ADS)

Mikkelson, James M.

1990-10-01

Recent progress in digital GaAs circuit performance and complexity is presented to demonstrate the current capabilities of GaAs components. High density GaAs process technology and circuit design techniques are described and critical issues for achieving favorable complexity speed power and cost tradeoffs are reviewed. Some DSP building blocks are described to provide examples of what types of DSP systems could be implemented with present GaAs technology. DIGITAL GaAs CIRCUIT CAPABILITIES In the past few years the capabilities of digital GaAs circuits have dramatically increased to the VLSI level. Major gains in circuit complexity and power-delay products have been achieved by the use of silicon-like process technologies and simple circuit topologies. The very high speed and low power consumption of digital GaAs VLSI circuits have made GaAs a desirable alternative to high performance silicon in hardware intensive high speed system applications. An example of the performance and integration complexity available with GaAs VLSI circuits is the 64x64 crosspoint switch shown in figure 1. This switch which is the most complex GaAs circuit currently available is designed on a 30 gate GaAs gate array. It operates at 200 MHz and dissipates only 8 watts of power. The reasons for increasing the level of integration of GaAs circuits are similar to the reasons for the continued increase of silicon circuit complexity. The market factors driving GaAs VLSI are system design methodology system cost power and reliability. System designers are hesitant or unwilling to go backwards to previous design techniques and lower levels of integration. A more highly integrated system in a lower performance technology can often approach the performance of a system in a higher performance technology at a lower level of integration. Higher levels of integration also lower the system component count which reduces the system cost size and power consumption while improving the system reliability. For large gate count circuits the power per gate must be minimized to prevent reliability and cooling problems. The technical factors which favor increasing GaAs circuit complexity are primarily related to reducing the speed and power penalties incurred when crossing chip boundaries. Because the internal GaAs chip logic levels are not compatible with standard silicon I/O levels input receivers and output drivers are needed to convert levels. These I/O circuits add significant delay to logic paths consume large amounts of power and use an appreciable portion of the die area. The effects of these I/O penalties can be reduced by increasing the ratio of core logic to I/O on a chip. DSP operations which have a large number of logic stages between the input and the output are ideal candidates to take advantage of the performance of GaAs digital circuits. Figure 2 is a schematic representation of the I/O penalties encountered when converting from ECL levels to GaAs

Extremely flexible nanoscale ultrathin body silicon integrated circuits on plastic.

PubMed

Shahrjerdi, Davood; Bedell, Stephen W

2013-01-09

In recent years, flexible devices based on nanoscale materials and structures have begun to emerge, exploiting semiconductor nanowires, graphene, and carbon nanotubes. This is primarily to circumvent the existing shortcomings of the conventional flexible electronics based on organic and amorphous semiconductors. The aim of this new class of flexible nanoelectronics is to attain high-performance devices with increased packing density. However, highly integrated flexible circuits with nanoscale transistors have not yet been demonstrated. Here, we show nanoscale flexible circuits on 60 Å thick silicon, including functional ring oscillators and memory cells. The 100-stage ring oscillators exhibit the stage delay of ~16 ps at a power supply voltage of 0.9 V, the best reported for any flexible circuits to date. The mechanical flexibility is achieved by employing the controlled spalling technology, enabling the large-area transfer of the ultrathin body silicon devices to a plastic substrate at room temperature. These results provide a simple and cost-effective pathway to enable ultralight flexible nanoelectronics with unprecedented level of system complexity based on mainstream silicon technology.

Lithium-Ion Performance and Abuse Evaluation Using Lithium Technologies 9Ah cell

NASA Technical Reports Server (NTRS)

Hall, Albert Daniel; Jeevarajan, Judith A.

2006-01-01

Lithium-ion batteries in a pouch form offer high energy density and safety in their designs and more recently they are offering performance at higher rates. Lithium Technologies 9Ah high-power pouch cells were studied at different rates, thermal environments, under vacuum and several different conditions of abuse including overcharge, over-discharge and external short circuit. Results of this study will be presented.

Compact beam splitters with deep gratings for miniature photonic integrated circuits: design and implementation aspects.

PubMed

Chen, Chin-Hui; Klamkin, Jonathan; Nicholes, Steven C; Johansson, Leif A; Bowers, John E; Coldren, Larry A

2009-09-01

We present an extensive study of an ultracompact grating-based beam splitter suitable for photonic integrated circuits (PICs) that have stringent density requirements. The 10 microm long beam splitter exhibits equal splitting, low insertion loss, and also provides a high extinction ratio in an integrated coherent balanced receiver. We further present the design strategies for avoiding mode distortion in the beam splitter and discuss optimization of the widths of the detectors to improve insertion loss and extinction ratio of the coherent receiver circuit. In our study, we show that the grating-based beam splitter is a competitive technology having low fabrication complexity for ultracompact PICs.

High density circuit technology, part 3

NASA Technical Reports Server (NTRS)

Wade, T. E.

1982-01-01

Dry processing - both etching and deposition - and present/future trends in semiconductor technology are discussed. In addition to a description of the basic apparatus, terminology, advantages, glow discharge phenomena, gas-surface chemistries, and key operational parameters for both dry etching and plasma deposition processes, a comprehensive survey of dry processing equipment (via vendor listing) is also included. The following topics are also discussed: fine-line photolithography, low-temperature processing, packaging for dense VLSI die, the role of integrated optics, and VLSI and technology innovations.

Flexible Packaging by Film-Assisted Molding for Microintegration of Inertia Sensors

PubMed Central

Hera, Daniel; Berndt, Armin; Günther, Thomas; Schmiel, Stephan; Harendt, Christine; Zimmermann, André

2017-01-01

Packaging represents an important part in the microintegration of sensors based on microelectromechanical system (MEMS). Besides miniaturization and integration density, functionality and reliability in combination with flexibility in packaging design at moderate costs and consequently high-mix, low-volume production are the main requirements for future solutions in packaging. This study investigates possibilities employing printed circuit board (PCB-)based assemblies to provide high flexibility for circuit designs together with film-assisted transfer molding (FAM) to package sensors. The feasibility of FAM in combination with PCB and MEMS as a packaging technology for highly sensitive inertia sensors is being demonstrated. The results prove the technology to be a viable method for damage-free packaging of stress- and pressure-sensitive MEMS. PMID:28653992

Limits on fundamental limits to computation.

PubMed

Markov, Igor L

2014-08-14

An indispensable part of our personal and working lives, computing has also become essential to industries and governments. Steady improvements in computer hardware have been supported by periodic doubling of transistor densities in integrated circuits over the past fifty years. Such Moore scaling now requires ever-increasing efforts, stimulating research in alternative hardware and stirring controversy. To help evaluate emerging technologies and increase our understanding of integrated-circuit scaling, here I review fundamental limits to computation in the areas of manufacturing, energy, physical space, design and verification effort, and algorithms. To outline what is achievable in principle and in practice, I recapitulate how some limits were circumvented, and compare loose and tight limits. Engineering difficulties encountered by emerging technologies may indicate yet unknown limits.

Concepts for on-board satellite image registration. Volume 3: Impact of VLSI/VHSIC on satellite on-board signal processing

NASA Technical Reports Server (NTRS)

Aanstoos, J. V.; Snyder, W. E.

1981-01-01

Anticipated major advances in integrated circuit technology in the near future are described as well as their impact on satellite onboard signal processing systems. Dramatic improvements in chip density, speed, power consumption, and system reliability are expected from very large scale integration. Improvements are expected from very large scale integration enable more intelligence to be placed on remote sensing platforms in space, meeting the goals of NASA's information adaptive system concept, a major component of the NASA End-to-End Data System program. A forecast of VLSI technological advances is presented, including a description of the Defense Department's very high speed integrated circuit program, a seven-year research and development effort.

Interchip link system using an optical wiring method.

PubMed

Cho, In-Kui; Ryu, Jin-Hwa; Jeong, Myung-Yung

2008-08-15

A chip-scale optical link system is presented with a transmitter/receiver and optical wire link. The interchip link system consists of a metal optical bench, a printed circuit board module, a driver/receiver integrated circuit, a vertical cavity surface-emitting laser/photodiode array, and an optical wire link composed of plastic optical fibers (POFs). We have developed a downsized POF and an optical wiring method that allows on-site installation with a simple annealing as optical wiring technologies for achieving high-density optical interchip interconnection within such devices. Successful data transfer measurements are presented.

High density circuit technology, part 2

NASA Technical Reports Server (NTRS)

Wade, T. E.

1982-01-01

A multilevel metal interconnection system for very large scale integration (VLSI) systems utilizing polyimides as the interlayer dielectric material is described. A complete characterization of polyimide materials is given as well as experimental methods accomplished using a double level metal test pattern. A low temperature, double exposure polyimide patterning procedure is also presented.

VLSI technology for smaller, cheaper, faster return link systems

NASA Technical Reports Server (NTRS)

Nanzetta, Kathy; Ghuman, Parminder; Bennett, Toby; Solomon, Jeff; Dowling, Jason; Welling, John

1994-01-01

Very Large Scale Integration (VLSI) Application-specific Integrated Circuit (ASIC) technology has enabled substantially smaller, cheaper, and more capable telemetry data systems. However, the rapid growth in available ASIC fabrication densities has far outpaced the application of this technology to telemetry systems. Available densities have grown by well over an order magnitude since NASA's Goddard Space Flight Center (GSFC) first began developing ASIC's for ground telemetry systems in 1985. To take advantage of these higher integration levels, a new generation of ASIC's for return link telemetry processing is under development. These new submicron devices are designed to further reduce the cost and size of NASA return link processing systems while improving performance. This paper describes these highly integrated processing components.

Three-Dimensional Integrated Circuit (3D IC) Key Technology: Through-Silicon Via (TSV).

PubMed

Shen, Wen-Wei; Chen, Kuan-Neng

2017-12-01

3D integration with through-silicon via (TSV) is a promising candidate to perform system-level integration with smaller package size, higher interconnection density, and better performance. TSV fabrication is the key technology to permit communications between various strata of the 3D integration system. TSV fabrication steps, such as etching, isolation, metallization processes, and related failure modes, as well as other characterizations are discussed in this invited review paper.

Laser Direct Routing for High Density Interconnects

NASA Astrophysics Data System (ADS)

Moreno, Wilfrido Alejandro

The laser restructuring of electronic circuits fabricated using standard Very Large Scale Integration (VLSI) process techniques, is an excellent alternative that allows low-cost quick turnaround production with full circuit similarity between the Laser Restructured prototype and the customized product for mass production. Laser Restructurable VLSI (LRVLSI) would allow design engineers the capability to interconnect cells that implement generic logic functions and signal processing schemes to achieve a higher level of design complexity. LRVLSI of a particular circuit at the wafer or packaged chip level is accomplished using an integrated computer controlled laser system to create low electrical resistance links between conductors and to cut conductor lines. An infrastructure for rapid prototyping and quick turnaround using Laser Restructuring of VLSI circuits was developed to meet three main parallel objectives: to pursue research on novel interconnect technologies using LRVLSI, to develop the capability of operating in a quick turnaround mode, and to maintain standardization and compatibility with commercially available equipment for feasible technology transfer. The system is to possess a high degree of flexibility, high data quality, total controllability, full documentation, short downtime, a user-friendly operator interface, automation, historical record keeping, and error indication and logging. A specially designed chip "SLINKY" was used as the test vehicle for the complete characterization of the Laser Restructuring system. With the use of Design of Experiment techniques the Lateral Diffused Link (LDL), developed originally at MIT Lincoln Laboratories, was completely characterized and for the first time a set of optimum process parameters was obtained. With the designed infrastructure fully operational, the priority objective was the search for a substitute for the high resistance, high current leakage to substrate, and relatively low density Lateral Diffused Link. A high density Laser Vertical Link with resistance values below 10 ohms was developed, studied and tested using design of experiment methodologies. The vertical link offers excellent advantages in the area of quick prototyping of electronic circuits, but even more important, due to having similar characteristics to a foundry produced via, it gives quick transfer from the prototype system verification stage to the mass production stage.

High-density interconnect substrates and device packaging using conductive composites

NASA Astrophysics Data System (ADS)

Gandhi, Pradeep; Gallagher, Catherine; Matijasevic, Goran

1998-02-01

High-end printed circuit board manufacturing technology is receiving increasing attention due to higher functionality in smaller form factors. This is evident from the industry efforts to produced reliable microvias and related trace features to pack as much circuit density as possible. Cost, density and performance requirements have prodded entry into a market that was mainly reserved for ceramic and molded packages for the last forty years. To successfully meet the demanding specifications of this market segment, a worldwide effort is underway for the development of new materials, processes and equipment. A novel base technology that is applicable to most of the major packaging and redistribution elements in an electronic module is presented.High density multilayer circuits with landless blind and buried vias can be fabricated by filling the conductor paste into photoimaged dielectrics and thermally processing it at a relatively lower temperature. Via layers are prepared directly on the inherently planarized circuit layer in an identical fashion. Because these composite materials are applied in an additive fabrication method, metal substrates can be employed for high thermal dissipation and excellent CTE control over a wide temperature range. The conductor material is based on interpenetrating polymer and metal networks that are formed in situ from metal particles and a thermosetting flux/binder. The metal network is formed when the alloy particles melt and react with adjacent high melting point metal particle. Interaction also occurs between the alloy particles and pad, lead or previous trace metallizations provided they are solderable by alloys of tin. The new alloy composition created by the interdiffusion process within the bulk material has a higher melting point than the original alloy and thus solidifies immediately upon formation. This metallurgical reaction, known as transient liquid phase sintering, is facilitated by the polymer mixture. INtegration of the polymer and metal networks is maintained by utilizing a thermosetting polymer system that cures simultaneously with the metallurgical reaction. Although similar in concept and performance to cermet inks, these compositions differ in that their process temperatures are compatible with conventional printed wiring board materials and that the polymeric binder remains to provide adhesion and fatigue resistance to the metallurgical network.

Wideband low-noise variable-gain BiCMOS transimpedance amplifier

NASA Astrophysics Data System (ADS)

Meyer, Robert G.; Mack, William D.

1994-06-01

A new monolithic variable gain transimpedance amplifier is described. The circuit is realized in BiCMOS technology and has measured gain of 98 kilo ohms, bandwidth of 128 MHz, input noise current spectral density of 1.17 pA/square root of Hz and input signal-current handling capability of 3 mA.

Photonic Integrated Circuits for Cost-Effective, High Port Density, and Higher Capacity Optical Communications Systems

NASA Astrophysics Data System (ADS)

Chiappa, Pierangelo

Bandwidth-hungry services, such as higher speed Internet, voice over IP (VoIP), and IPTV, allow people to exchange and store huge amounts of data among worldwide locations. In the age of global communications, domestic users, companies, and organizations around the world generate new contents making bandwidth needs grow exponentially, along with the need for new services. These bandwidth and connectivity demands represent a concern for operators who require innovative technologies to be ready for scaling. To respond efficiently to these demands, Alcatel-Lucent is fast moving toward photonic integration circuits technologies as the key to address best performances at the lowest "bit per second" cost. This article describes Alcatel-Lucent's contribution in strategic directions or achievements, as well as possible new developments.

A silicon-on-insulator complementary-metal-oxide-semiconductor compatible flexible electronics technology

NASA Astrophysics Data System (ADS)

Tu, Hongen; Xu, Yong

2012-07-01

This paper reports a simple flexible electronics technology that is compatible with silicon-on-insulator (SOI) complementary-metal-oxide-semiconductor (CMOS) processes. Compared with existing technologies such as direct fabrication on flexible substrates and transfer printing, the main advantage of this technology is its post-SOI-CMOS compatibility. Consequently, high-performance and high-density CMOS circuits can be first fabricated on SOI wafers using commercial foundry and then be integrated into flexible substrates. The yield is also improved by eliminating the transfer printing step. Furthermore, this technology allows the integration of various sensors and microfluidic devices. To prove the concept of this technology, flexible MOSFETs have been demonstrated.

High-voltage solar-cell chip

NASA Technical Reports Server (NTRS)

Kapoor, V. J.; Valco, G. J.; Skebe, G. G.; Evans, J. C., Jr.

1985-01-01

Integrated circuit technology has been successfully applied to the design and fabrication of 0.5 x 0.5-cm planar multijunction solar-cell chips. Each of these solar cells consisted of six voltage-generating unit cells monolithically connected in series and fabricated on a 75-micron-thick, p-type, single crystal, silicon substrate. A contact photolithic process employing five photomask levels together with a standard microelectronics batch-processing technique were used to construct the solar-cell chip. The open-circuit voltage increased rapidly with increasing illumination up to 5 AM1 suns where it began to saturate at the sum of the individual unit-cell voltages at a maximum of 3.0 V. A short-circuit current density per unit cell of 240 mA/sq cm was observed at 10 AM1 suns.

Advances in integrated photonic circuits for packet-switched interconnection

NASA Astrophysics Data System (ADS)

Williams, Kevin A.; Stabile, Ripalta

2014-03-01

Sustained increases in capacity and connectivity are needed to overcome congestion in a range of broadband communication network nodes. Packet routing and switching in the electronic domain are leading to unsustainable energy- and bandwidth-densities, motivating research into hybrid solutions: optical switching engines are introduced for massive-bandwidth data transport while the electronic domain is clocked at more modest GHz rates to manage routing. Commercially-deployed optical switching engines using MEMS technologies are unwieldy and too slow to reconfigure for future packet-based networking. Optoelectronic packet-compliant switch technologies have been demonstrated as laboratory prototypes, but they have so far mostly used discretely pigtailed components, which are impractical for control plane development and product assembly. Integrated photonics has long held the promise of reduced hardware complexity and may be the critical step towards packet-compliant optical switching engines. Recently a number of laboratories world-wide have prototyped optical switching circuits using monolithic integration technology with up to several hundreds of integrated optical components per chip. Our own work has focused on multi-input to multi-output switching matrices. Recently we have demonstrated 8×8×8λ space and wavelength selective switches using gated cyclic routers and 16×16 broadband switching chips using monolithic multi-stage networks. We now operate these advanced circuits with custom control planes implemented with FPGAs to explore real time packet routing in multi-wavelength, multi-port test-beds. We review our contributions in the context of state of the art photonic integrated circuit technology and packet optical switching hardware demonstrations.

Self-Patterning of Silica/Epoxy Nanocomposite Underfill by Tailored Hydrophilic-Superhydrophobic Surfaces for 3D Integrated Circuit (IC) Stacking.

PubMed

Tuan, Chia-Chi; James, Nathan Pataki; Lin, Ziyin; Chen, Yun; Liu, Yan; Moon, Kyoung-Sik; Li, Zhuo; Wong, C P

2017-03-15

As microelectronics are trending toward smaller packages and integrated circuit (IC) stacks nowadays, underfill, the polymer composite filled in between the IC chip and the substrate, becomes increasingly important for interconnection reliability. However, traditional underfills cannot meet the requirements for low-profile and fine pitch in high density IC stacking packages. Post-applied underfills have difficulties in flowing into the small gaps between the chip and the substrate, while pre-applied underfills face filler entrapment at bond pads. In this report, we present a self-patterning underfilling technology that uses selective wetting of underfill on Cu bond pads and Si 3 N 4 passivation via surface energy engineering. This novel process, fully compatible with the conventional underfilling process, eliminates the issue of filler entrapment in typical pre-applied underfilling process, enabling high density and fine pitch IC die bonding.

Rectenna Technology Program: Ultra light 2.45 GHz rectenna 20 GHz rectenna

NASA Technical Reports Server (NTRS)

Brown, William C.

1987-01-01

The program had two general objectives. The first objective was to develop the two plane rectenna format for space application at 2.45 GHz. The resultant foreplane was a thin-film, etched-circuit format fabricated from a laminate composed of 2 mil Kapton F sandwiched between sheets of 1 oz copper. The thin-film foreplane contains half wave dipoles, filter circuits, rectifying Schottky diode, and dc bussing lead. It weighs 160 grams per square meter. Efficiency and dc power output density were measured at 85% and 1 kw/sq m, respectively. Special testing techniques to measure temperature of circuit and diode without perturbing microwave operation using the fluoroptic thermometer were developed. A second objective was to investigate rectenna technology for use at 20 GHz and higher frequencies. Several fabrication formats including the thin-film scaled from 2.45 GHz, ceramic substrate and silk-screening, and monolithic were investigated, with the conclusion that the monolithic approach was the best. A preliminary design of the monolithic rectenna structure and the integrated Schottky diode were made.

The integrated design and archive of space-borne signal processing and compression coding

NASA Astrophysics Data System (ADS)

He, Qiang-min; Su, Hao-hang; Wu, Wen-bo

2017-10-01

With the increasing demand of users for the extraction of remote sensing image information, it is very urgent to significantly enhance the whole system's imaging quality and imaging ability by using the integrated design to achieve its compact structure, light quality and higher attitude maneuver ability. At this present stage, the remote sensing camera's video signal processing unit and image compression and coding unit are distributed in different devices. The volume, weight and consumption of these two units is relatively large, which unable to meet the requirements of the high mobility remote sensing camera. This paper according to the high mobility remote sensing camera's technical requirements, designs a kind of space-borne integrated signal processing and compression circuit by researching a variety of technologies, such as the high speed and high density analog-digital mixed PCB design, the embedded DSP technology and the image compression technology based on the special-purpose chips. This circuit lays a solid foundation for the research of the high mobility remote sensing camera.

High density circuit technology, part 1

NASA Technical Reports Server (NTRS)

Wade, T. E.

1982-01-01

The metal (or dielectric) lift-off processes used in the semiconductor industry to fabricate high density very large scale integration (VLSI) systems were reviewed. The lift-off process consists of depositing the light-sensitive material onto the wafer and patterning first in such a manner as to form a stencil for the interconnection material. Then the interconnection layer is deposited and unwanted areas are lifted off by removing the underlying stencil. Several of these lift-off techniques were examined experimentally. The use of an auxiliary layer of polyimide to form a lift-off stencil offers considerable promise.

Feedforward, high density, programmable read only neural network based memory system

NASA Technical Reports Server (NTRS)

Daud, Taher; Moopenn, Alex; Lamb, James; Thakoor, Anil; Khanna, Satish

1988-01-01

Neural network-inspired, nonvolatile, programmable associative memory using thin-film technology is demonstrated. The details of the architecture, which uses programmable resistive connection matrices in synaptic arrays and current summing and thresholding amplifiers as neurons, are described. Several synapse configurations for a high-density array of a binary connection matrix are also described. Test circuits are evaluated for operational feasibility and to demonstrate the speed of the read operation. The results are discussed to highlight the potential for a read data rate exceeding 10 megabits/sec.

High density circuit technology, part 4

NASA Technical Reports Server (NTRS)

Wade, T. E.

1982-01-01

An accurate study and evaluation of dielectric thin films is conducted in order to find the material or combination of materials which would optimize NASA'S double layer metal process. Emphasis is placed on polyimide dielectrics because of their reported outstanding dielectric characteristics (including electrical, chemical, thermal, and mechanical) and ease of processing, as well as their rapid acceptance by the semiconductor industry.

Performance of conversion efficiency of a crystalline silicon solar cell with base doping density

NASA Astrophysics Data System (ADS)

Sahin, Gokhan; Kerimli, Genber; Barro, Fabe Idrissa; Sane, Moustapha; Alma, Mehmet Hakkı

In this study, we investigate theoretically the electrical parameters of a crystalline silicon solar cell in steady state. Based on a one-dimensional modeling of the cell, the short circuit current density, the open circuit voltage, the shunt and series resistances and the conversion efficiency are calculated, taking into account the base doping density. Either the I-V characteristic, series resistance, shunt resistance and conversion efficiency are determined and studied versus base doping density. The effects applied of base doping density on these parameters have been studied. The aim of this work is to show how short circuit current density, open circuit voltage and parasitic resistances are related to the base doping density and to exhibit the role played by those parasitic resistances on the conversion efficiency of the crystalline silicon solar.

CMOL: A New Concept for Nanoelectronics

NASA Astrophysics Data System (ADS)

Likharev, Konstantin

2005-03-01

I will review the recent work on devices and architectures for future hybrid semiconductor/molecular integrated circuits, in particular those of ``CMOL'' variety [1]. Such circuits would combine an advanced CMOS subsystem fabricated by the usual lithographic patterning, two layers of parallel metallic nanowires formed, e.g., by nanoimprint, and two-terminal molecular devices self-assembled on the nanowire crosspoints. Estimates show that this powerful combination may allow CMOL circuits to reach an unparalleled density (up to 10^12 functions per cm^2) and ultrahigh rate of information processing (up to 10^20 operations per second on a single chip), at acceptable power dissipation. The main challenges on the way toward practical CMOL technology are: (i) reliable chemically-directed self-assembly of mid-size organic molecules, and (ii) the development of efficient defect-tolerant architectures for CMOL circuits. Our recent work has shown that such architectures may be developed not only for terabit-scale memories and naturally defect-tolerant mixed-signal neuromorphic networks, but (rather unexpectedly) also for FPGA-style digital Boolean circuits. [1] For details, see http://rsfq1.physics.sunysb.edu/˜likharev/nano/Springer04.pdf

Interfacing spin qubits in quantum dots and donors—hot, dense, and coherent

NASA Astrophysics Data System (ADS)

Vandersypen, L. M. K.; Bluhm, H.; Clarke, J. S.; Dzurak, A. S.; Ishihara, R.; Morello, A.; Reilly, D. J.; Schreiber, L. R.; Veldhorst, M.

2017-09-01

Semiconductor spins are one of the few qubit realizations that remain a serious candidate for the implementation of large-scale quantum circuits. Excellent scalability is often argued for spin qubits defined by lithography and controlled via electrical signals, based on the success of conventional semiconductor integrated circuits. However, the wiring and interconnect requirements for quantum circuits are completely different from those for classical circuits, as individual direct current, pulsed and in some cases microwave control signals need to be routed from external sources to every qubit. This is further complicated by the requirement that these spin qubits currently operate at temperatures below 100 mK. Here, we review several strategies that are considered to address this crucial challenge in scaling quantum circuits based on electron spin qubits. Key assets of spin qubits include the potential to operate at 1 to 4 K, the high density of quantum dots or donors combined with possibilities to space them apart as needed, the extremely long-spin coherence times, and the rich options for integration with classical electronics based on the same technology.

High density electronic circuit and process for making

DOEpatents

Morgan, William P.

1999-01-01

High density circuits with posts that protrude beyond one surface of a substrate to provide easy mounting of devices such as integrated circuits. The posts also provide stress relief to accommodate differential thermal expansion. The process allows high interconnect density with fewer alignment restrictions and less wasted circuit area than previous processes. The resulting substrates can be test platforms for die testing and for multi-chip module substrate testing. The test platform can contain active components and emulate realistic operational conditions, replacing shorts/opens net testing.

Advantages and Challenges of 10-Gbps Transmission on High-Density Interconnect Boards

NASA Astrophysics Data System (ADS)

Yee, Chang Fei; Jambek, Asral Bahari; Al-Hadi, Azremi Abdullah

2016-06-01

This paper provides a brief introduction to high-density interconnect (HDI) technology and its implementation on printed circuit boards (PCBs). The advantages and challenges of implementing 10-Gbps signal transmission on high-density interconnect boards are discussed in detail. The advantages (e.g., smaller via dimension and via stub removal) and challenges (e.g., crosstalk due to smaller interpair separation) of HDI are studied by analyzing the S-parameter, time-domain reflectometry (TDR), and transmission-line eye diagrams obtained by three-dimensional electromagnetic modeling (3DEM) and two-dimensional electromagnetic modeling (2DEM) using Mentor Graphics HyperLynx and Keysight Advanced Design System (ADS) electronic computer-aided design (ECAD) software. HDI outperforms conventional PCB technology in terms of signal integrity, but proper routing topology should be applied to overcome the challenge posed by crosstalk due to the tight spacing between traces.

Moore's law and the impact on trusted and radiation-hardened microelectronics.

DOE Office of Scientific and Technical Information (OSTI.GOV)

Ma, Kwok Kee

2011-12-01

In 1965 Gordon Moore wrote an article claiming that integrated circuit density would scale exponentially. His prediction has remained valid for more than four decades. Integrated circuits have changed all aspects of everyday life. They are also the 'heart and soul' of modern systems for defense, national infrastructure, and intelligence applications. The United States government needs an assured and trusted microelectronics supply for military systems. However, migration of microelectronics design and manufacturing from the United States to other countries in recent years has placed the supply of trusted microelectronics in jeopardy. Prevailing wisdom dictates that it is necessary to usemore » microelectronics fabricated in a state-of-the-art technology for highest performance and military system superiority. Close examination of silicon microelectronics technology evolution and Moore's Law reveals that this prevailing wisdom is not necessarily true. This presents the US government the possibility of a totally new approach to acquire trusted microelectronics.« less

A power management circuit with 50% efficiency and large load capacity for triboelectric nanogenerator

NASA Astrophysics Data System (ADS)

Bao, Dechun; Luo, Lichuan; Zhang, Zhaohua; Ren, Tianling

2017-09-01

Recently, triboelectric nanogenerators (TENGs), as a collection technology with characteristics of high reliability, high energy density and low cost, has attracted more and more attention. However, the energy coming from TENGs needs to be stored in a storage unit effectively due to its unstable ac output. The traditional energy storage circuit has an extremely low energy storage efficiency for TENGs because of their high internal impedance. This paper presents a new power management circuit used to optimize the energy using efficiency of TENGs, and realize large load capacity. The power management circuit mainly includes rectification storage circuit and DC-DC management circuit. A rotating TENG with maximal energy output of 106 mW at 170 rpm based on PCB is used for the experimental verification. Experimental results show that the power energy transforming to the storage capacitor reach up to 53 mW and the energy using efficiency is calculated as 50%. When different loading resistances range from 0.82 to 34.5 k {{Ω }} are connected to the storage capacitor in parallel, the power energy stored in the storage capacitor is all about 52.5 mW. Getting through the circuit, the power energy coming from the TENGs can be used to drive numerous conventional electronics, such as wearable watches.

Vertically integrated, three-dimensional nanowire complementary metal-oxide-semiconductor circuits.

PubMed

Nam, SungWoo; Jiang, Xiaocheng; Xiong, Qihua; Ham, Donhee; Lieber, Charles M

2009-12-15

Three-dimensional (3D), multi-transistor-layer, integrated circuits represent an important technological pursuit promising advantages in integration density, operation speed, and power consumption compared with 2D circuits. We report fully functional, 3D integrated complementary metal-oxide-semiconductor (CMOS) circuits based on separate interconnected layers of high-mobility n-type indium arsenide (n-InAs) and p-type germanium/silicon core/shell (p-Ge/Si) nanowire (NW) field-effect transistors (FETs). The DC voltage output (V(out)) versus input (V(in)) response of vertically interconnected CMOS inverters showed sharp switching at close to the ideal value of one-half the supply voltage and, moreover, exhibited substantial DC gain of approximately 45. The gain and the rail-to-rail output switching are consistent with the large noise margin and minimal static power consumption of CMOS. Vertically interconnected, three-stage CMOS ring oscillators were also fabricated by using layer-1 InAs NW n-FETs and layer-2 Ge/Si NW p-FETs. Significantly, measurements of these circuits demonstrated stable, self-sustained oscillations with a maximum frequency of 108 MHz, which represents the highest-frequency integrated circuit based on chemically synthesized nanoscale materials. These results highlight the flexibility of bottom-up assembly of distinct nanoscale materials and suggest substantial promise for 3D integrated circuits.

Analysis and Design Considerations of a High-Power Density, Dual Air Gap, Axial-Field Brushless, Permanent Magnet Motor.

NASA Astrophysics Data System (ADS)

Cho, Chahee Peter

1995-01-01

Until recently, brush dc motors have been the dominant drive system because they provide easily controlled motor speed over a wide range, rapid acceleration and deceleration, convenient control of position, and lower product cost. Despite these capabilities, the brush dc motor configuration does not satisfy the design requirements for the U.S. Navy's underwater propulsion applications. Technical advances in rare-earth permanent magnet materials, in high-power semiconductor transistor technology, and in various rotor position-sensing devices have made using brushless permanent magnet motors a viable alternative. This research investigates brushless permanent magnet motor technology, studying the merits of dual-air gap, axial -field, brushless, permanent magnet motor configuration in terms of power density, efficiency, and noise/vibration levels. Because the design objectives for underwater motor applications include high-power density, high-performance, and low-noise/vibration, the traditional, simplified equivalent circuit analysis methods to assist in meeting these goals were inadequate. This study presents the development and verification of detailed finite element analysis (FEA) models and lumped parameter circuit models that can calculate back electromotive force waveforms, inductance, cogging torque, energized torque, and eddy current power losses. It is the first thorough quantification of dual air-gap, axial -field, brushless, permanent magnet motor parameters and performance characteristics. The new methodology introduced in this research not only facilitates the design process of an axial field, brushless, permanent magnet motor but reinforces the idea that the high-power density, high-efficiency, and low-noise/vibration motor is attainable.

Mechanical Computing Redux: Limitations at the Nanoscale

NASA Astrophysics Data System (ADS)

Liu, Tsu-Jae King

2014-03-01

Technology solutions for overcoming the energy efficiency limits of nanoscale complementary metal oxide semiconductor (CMOS) technology ultimately will be needed in order to address the growing issue of integrated-circuit chip power density. Off-state leakage current sets a fundamental lower limit in energy per operation for any voltage-level-based digital logic implemented with transistors (CMOS and beyond), which leads to practical limits for device density (i.e. cost) and operating frequency (i.e. system performance). Mechanical switches have zero off-state leakag and hence can overcome this fundamental limit. Contact adhesive force sets a lower limit for the switching energy of a mechanical switch, however, and also directly impacts its performance. This paper will review recent progress toward the development of nano-electro-mechanical relay technology and discuss remaining challenges for realizing the promise of mechanical computing for ultra-low-power computing. Supported by the Center for Energy Efficient Electronics Science (NSF Award 0939514).

High density electronic circuit and process for making

DOEpatents

Morgan, W.P.

1999-06-29

High density circuits with posts that protrude beyond one surface of a substrate to provide easy mounting of devices such as integrated circuits are disclosed. The posts also provide stress relief to accommodate differential thermal expansion. The process allows high interconnect density with fewer alignment restrictions and less wasted circuit area than previous processes. The resulting substrates can be test platforms for die testing and for multi-chip module substrate testing. The test platform can contain active components and emulate realistic operational conditions, replacing shorts/opens net testing. 8 figs.

High-density Schottky barrier IRCCD sensors for remote sensing applications

NASA Astrophysics Data System (ADS)

Elabd, H.; Tower, J. R.; McCarthy, B. M.

1983-01-01

It is pointed out that the ambitious goals envisaged for the next generation of space-borne sensors challenge the state-of-the-art in solid-state imaging technology. Studies are being conducted with the aim to provide focal plane array technology suitable for use in future Multispectral Linear Array (MLA) earth resource instruments. An important new technology for IR-image sensors involves the use of monolithic Schottky barrier infrared charge-coupled device arrays. This technology is suitable for earth sensing applications in which moderate quantum efficiency and intermediate operating temperatures are required. This IR sensor can be fabricated by using standard integrated circuit (IC) processing techniques, and it is possible to employ commercial IC grade silicon. For this reason, it is feasible to construct Schottky barrier area and line arrays with large numbers of elements and high-density designs. A Pd2Si Schottky barrier sensor for multispectral imaging in the 1 to 3.5 micron band is under development.

Demonstration of a 4H SiC Betavoltaic Nuclear Battery Based on Schottky Barrier Diode

NASA Astrophysics Data System (ADS)

Qiao, Da-Yong; Yuan, Wei-Zheng; Gao, Peng; Yao, Xian-Wang; Zang, Bo; Zhang, Lin; Guo, Hui; Zhang, Hong-Jian

2008-10-01

A 4H SiC betavoltaic nuclear battery is demonstrated. A Schottky barrier diode is utilized for carrier separation. Under illumination of Ni-63 source with an apparent activity of 4 mCi/cm2 an open circuit voltage of 0.49 V and a short circuit current density of 29.44 nA/cm2 are measured. A power conversion efficiency of 1.2% is obtained. The performance of the device is limited by low shunt resistance, backscattering and attenuation of electron energy in air and Schottky electrode. It is expected to be significantly improved by optimizing the design and processing technology of the device.

Majority logic gate for 3D magnetic computing.

PubMed

Eichwald, Irina; Breitkreutz, Stephan; Ziemys, Grazvydas; Csaba, György; Porod, Wolfgang; Becherer, Markus

2014-08-22

For decades now, microelectronic circuits have been exclusively built from transistors. An alternative way is to use nano-scaled magnets for the realization of digital circuits. This technology, known as nanomagnetic logic (NML), may offer significant improvements in terms of power consumption and integration densities. Further advantages of NML are: non-volatility, radiation hardness, and operation at room temperature. Recent research focuses on the three-dimensional (3D) integration of nanomagnets. Here we show, for the first time, a 3D programmable magnetic logic gate. Its computing operation is based on physically field-interacting nanometer-scaled magnets arranged in a 3D manner. The magnets possess a bistable magnetization state representing the Boolean logic states '0' and '1.' Magneto-optical and magnetic force microscopy measurements prove the correct operation of the gate over many computing cycles. Furthermore, micromagnetic simulations confirm the correct functionality of the gate even for a size in the nanometer-domain. The presented device demonstrates the potential of NML for three-dimensional digital computing, enabling the highest integration densities.

Development of beam leaded low power logic circuits

NASA Technical Reports Server (NTRS)

Smith, B. W.; Malone, F.

1972-01-01

The technologies of low power TTL and beam lead processing were merged into a single product family. This family offers the power and thermal advantages of low power(54L), while providing the additional reliability advantages of beam leads. The reduction in the power and heat levels also allows the system designer to take advantage, through beam lead, multichip assemblies, of increased package density to reduce system size and weight.

Scaling and application of commercial, feature-rich, modular mixed-signal technology platforms for large format ROICs

NASA Astrophysics Data System (ADS)

Kar-Roy, Arjun; Racanelli, Marco; Howard, David; Miyagi, Glenn; Bowler, Mark; Jordan, Scott; Zhang, Tao; Krieger, William

2010-04-01

Today's modular, mixed-signal CMOS process platforms are excellent choices for manufacturing of highly integrated, large-format read out integrated circuits (ROICs). Platform features, that can be used for both cooled and un-cooled ROIC applications, can include (1) quality passives such as 4fFμm2 stacked MIM capacitors for linearity and higher density capacitance per pixel, 1kOhm high-value poly-silicon resistors, 2.8μm thick metals for efficient power distribution and reduced I-R drop; (2) analog active devices such as low noise single gate 3.3V, and 1.8V/3.3V or 1.8V/5V dual gate configurations, 40V LDMOS FETs, and NPN and PNP devices, deep n-well for substrate isolation for analog blocks and digital logic; (3) tools to assist the circuit designer such as models for cryogenic temperatures, CAD assistance for metal density uniformity determination, statistical, X-sigma and PCM-based models for corner validation and to simulate design sensitivity, and (4) sub-field stitching for large die. The TowerJazz platform of technology for 0.50μm, 0.25μm and 0.18μm CMOS nodes, with features as described above, is described in detail in this paper.

10 K gate I(2)L and 1 K component analog compatible bipolar VLSI technology - HIT-2

NASA Astrophysics Data System (ADS)

Washio, K.; Watanabe, T.; Okabe, T.; Horie, N.

1985-02-01

An advanced analog/digital bipolar VLSI technology that combines on the same chip 2-ns 10 K I(2)L gates with 1 K analog devices is proposed. The new technology, called high-density integration technology-2, is based on a new structure concept that consists of three major techniques: shallow grooved-isolation, I(2)L active layer etching, and I(2)L current gain increase. I(2)L circuits with 80-MHz maximum toggle frequency have developed compatibly with n-p-n transistors having a BV(CE0) of more than 10 V and an f(T) of 5 GHz, and lateral p-n-p transistors having an f(T) of 150 MHz.

Cathodic Protection Measurement Through Inline Inspection Technology Uses and Observations

NASA Astrophysics Data System (ADS)

Ferguson, Briana Ley

This research supports the evaluation of an impressed current cathodic protection (CP) system of a buried coated steel pipeline through alternative technology and methods, via an inline inspection device (ILI, CP ILI tool, or tool), in order to prevent and mitigate external corrosion. This thesis investigates the ability to measure the current density of a pipeline's CP system from inside of a pipeline rather than manually from outside, and then convert that CP ILI tool reading into a pipe-to-soil potential as required by regulations and standards. This was demonstrated through a mathematical model that utilizes applications of Ohm's Law, circuit concepts, and attenuation principles in order to match the results of the ILI sample data by varying parameters of the model (i.e., values for over potential and coating resistivity). This research has not been conducted previously in order to determine if the protected potential range can be achieved with respect to the predicted current density from the CP ILI device. Kirchhoff's method was explored, but certain principals could not be used in the model as manual measurements were required. This research was based on circuit concepts which indirectly affected electrochemical processes. Through Ohm's law, the results show that a constant current density is possible in the protected potential range; therefore, indicates polarization of the pipeline, which leads to calcareous deposit development with respect to electrochemistry. Calcareous deposit is desirable in industry since it increases the resistance of the pipeline coating and lowers current, thus slowing the oxygen diffusion process. This research conveys that an alternative method for CP evaluation from inside of the pipeline is possible where the pipe-to-soil potential can be estimated (as required by regulations) from the ILI tool's current density measurement.

Open circuit voltage-decay behavior in amorphous p-i-n solar due to injection

NASA Astrophysics Data System (ADS)

Smrity, Manu; Dhariwal, S. R.

2018-05-01

The paper deals with the basic recombination processes at the dangling bond and the band tail states at various levels of injection, expressed in terms of short-circuit current density and their role in the behavior of amorphous solar cells. As the level of injection increases the fill factor decreases whereas the open circuit voltage increases very slowly, showing a saturation tendency. Calculations have been done for two values of tail state densities and shows that with an increase in tail state densities both, the fill factor and open circuit voltage decreases, results an overall degradation of the solar cell.

[Measurements of the flux densities of static magnetic fields generated by two types of dental magnetic attachments and their retentive forces].

PubMed

Xu, Chun; Chao, Yong-lie; Du, Li; Yang, Ling

2004-05-01

To measure and analyze the flux densities of static magnetic fields generated by two types of commonly used dental magnetic attachments and their retentive forces, and to provide guidance for the clinical application of magnetic attachments. A digital Gaussmeter was used to measure the flux densities of static magnetic fields generated by two types of magnetic attachments, under four circumstances: open-field circuit; closed-field circuit; keeper and magnet slid laterally for a certain distance; and existence of air gap between keeper and magnet. The retentive forces of the magnetic attachments in standard closed-field circuit, with the keeper and magnet sliding laterally for a certain distance or with a certain air gap between keeper and magnet were measured by a tensile testing machine. There were flux leakages under both the open-field circuit and closed-field circuit of the two types of magnetic attachments. The flux densities on the surfaces of MAGNEDISC 800 (MD800) and MAGFIT EX600W (EX600) magnetic attachments under open-field circuit were 275.0 mT and 147.0 mT respectively. The flux leakages under closed-field circuit were smaller than those under open-field circuit. The respective flux densities on the surfaces of MD800 and EX600 magnetic attachments decreased to 11.4 mT and 4.5 mT under closed-field circuit. The flux density around the magnetic attachment decreased as the distance from the surface of the attachment increased. When keeper and magnet slid laterally for a certain distance or when air gap existed between keeper and magnet, the flux leakage increased in comparison with that under closed-field circuit. Under the standard closed-field circuit, the two types of magnetic attachments achieved the largest retentive forces. The retentive forces of MD800 and EX600 magnetic attachments under the standard closed-field circuit were 6.20 N and 4.80 N respectively. The retentive forces decreased with the sliding distance or with the increase of air gap between keeper and magnet. The magnetic attachments have flux leakages. When they are used in patients' oral cavities, if keeper and magnet are not attached accurately, the flux leakage will increase, and at the same time the retentive force will decrease. Therefore the keeper and magnet should be attached accurately in clinical application.

Design of a Multi-Level/Analog Ferroelectric Memory Device

NASA Technical Reports Server (NTRS)

MacLeod, Todd C.; Phillips, Thomas A.; Ho, Fat D.

2006-01-01

Increasing the memory density and utilizing the dove1 characteristics of ferroelectric devices is important in making ferroelectric memory devices more desirable to the consumer. This paper describes a design that allows multiple levels to be stored in a ferroelectric based memory cell. It can be used to store multiple bits or analog values in a high speed nonvolatile memory. The design utilizes the hysteresis characteristic of ferroelectric transistors to store an analog value in the memory cell. The design also compensates for the decay of the polarization of the ferroelectric material over time. This is done by utilizing a pair of ferroelectric transistors to store the data. One transistor is used as a reference to determine the amount of decay that has occurred since the pair was programmed. The second transistor stores the analog value as a polarization value between zero and saturated. The design allows digital data to be stored as multiple bits in each memory cell. The number of bits per cell that can be stored will vary with the decay rate of the ferroelectric transistors and the repeatability of polarization between transistors. It is predicted that each memory cell may be able to store 8 bits or more. The design is based on data taken from actual ferroelectric transistors. Although the circuit has not been fabricated, a prototype circuit is now under construction. The design of this circuit is different than multi-level FLASH or silicon transistor circuits. The differences between these types of circuits are described in this paper. This memory design will be useful because it allows higher memory density, compensates for the environmental and ferroelectric aging processes, allows analog values to be directly stored in memory, compensates for the thermal and radiation environments associated with space operations, and relies only on existing technologies.

Development Of A Three-Dimensional Circuit Integration Technology And Computer Architecture

NASA Astrophysics Data System (ADS)

Etchells, R. D.; Grinberg, J.; Nudd, G. R.

1981-12-01

This paper is the first of a series 1,2,3 describing a range of efforts at Hughes Research Laboratories, which are collectively referred to as "Three-Dimensional Microelectronics." The technology being developed is a combination of a unique circuit fabrication/packaging technology and a novel processing architecture. The packaging technology greatly reduces the parasitic impedances associated with signal-routing in complex VLSI structures, while simultaneously allowing circuit densities orders of magnitude higher than the current state-of-the-art. When combined with the 3-D processor architecture, the resulting machine exhibits a one- to two-order of magnitude simultaneous improvement over current state-of-the-art machines in the three areas of processing speed, power consumption, and physical volume. The 3-D architecture is essentially that commonly referred to as a "cellular array", with the ultimate implementation having as many as 512 x 512 processors working in parallel. The three-dimensional nature of the assembled machine arises from the fact that the chips containing the active circuitry of the processor are stacked on top of each other. In this structure, electrical signals are passed vertically through the chips via thermomigrated aluminum feedthroughs. Signals are passed between adjacent chips by micro-interconnects. This discussion presents a broad view of the total effort, as well as a more detailed treatment of the fabrication and packaging technologies themselves. The results of performance simulations of the completed 3-D processor executing a variety of algorithms are also presented. Of particular pertinence to the interests of the focal-plane array community is the simulation of the UNICORNS nonuniformity correction algorithms as executed by the 3-D architecture.

High density circuit technology

NASA Technical Reports Server (NTRS)

Wade, T. E.

1979-01-01

Polyimide dielectric materials were acquired for comparative and evaluative studies in double layer metal processes. Preliminary experiments were performed. Also, the literature indicates that sputtered aluminum films may be successfully patterned using the left-off technique provided the substrate temperature remains low and the argon pressure in the chamber is relatively high at the time of sputtering. Vendors associated with dry processing equipment are identified. A literature search relative to future trends in VLSI fabrication techniques is described.

An innovative approach to predict technology evolution for the desoldering of printed circuit boards: A perspective from China and America.

PubMed

Wang, Chen; Zhao, Wu; Wang, Jie; Chen, Ling; Luo, Chun-Jing

2016-06-01

The printed circuit boards basis of electronic equipment have seen a rapid growth in recent years and played a significant role in modern life. Nowadays, the fact that electronic devices upgrade quickly necessitates a proper management of waste printed circuit boards. Non-destructive desoldering of waste printed circuit boards becomes the first and the most crucial step towards recycling electronic components. Owing to the diversity of materials and components, the separation process is difficult, which results in complex and expensive recovery of precious materials and electronic components from waste printed circuit boards. To cope with this problem, we proposed an innovative approach integrating Theory of Inventive Problem Solving (TRIZ) evolution theory and technology maturity mapping system to forecast the evolution trends of desoldering technology of waste printed circuit boards. This approach can be applied to analyse the technology evolution, as well as desoldering technology evolution, then research and development strategy and evolution laws can be recommended. As an example, the maturity of desoldering technology is analysed with a technology maturity mapping system model. What is more, desoldering methods in different stages are analysed and compared. According to the analysis, the technological evolution trends are predicted to be 'the law of energy conductivity' and 'increasing the degree of idealisation'. And the potential technology and evolutionary state of waste printed circuit boards are predicted, offering reference for future waste printed circuit boards recycling. © The Author(s) 2016.

Present Status of Power Circuit Breaker and its Future

NASA Astrophysics Data System (ADS)

Yoshioka, Yoshio

Gas circuit breaker and vacuum circuit breaker are the 2 main types of circuit breaker used in extra high voltage and medium voltage networks. After reviewing the history of these circuit breakers, their present status and technologies are described. As for future technology, computation of interrupting phenomena, SF6 gas less apparatus and expectation of the high voltage vacuum circuit breaker are discussed.

Graphene/MoS2 hybrid technology for large-scale two-dimensional electronics.

PubMed

Yu, Lili; Lee, Yi-Hsien; Ling, Xi; Santos, Elton J G; Shin, Yong Cheol; Lin, Yuxuan; Dubey, Madan; Kaxiras, Efthimios; Kong, Jing; Wang, Han; Palacios, Tomás

2014-06-11

Two-dimensional (2D) materials have generated great interest in the past few years as a new toolbox for electronics. This family of materials includes, among others, metallic graphene, semiconducting transition metal dichalcogenides (such as MoS2), and insulating boron nitride. These materials and their heterostructures offer excellent mechanical flexibility, optical transparency, and favorable transport properties for realizing electronic, sensing, and optical systems on arbitrary surfaces. In this paper, we demonstrate a novel technology for constructing large-scale electronic systems based on graphene/molybdenum disulfide (MoS2) heterostructures grown by chemical vapor deposition. We have fabricated high-performance devices and circuits based on this heterostructure, where MoS2 is used as the transistor channel and graphene as contact electrodes and circuit interconnects. We provide a systematic comparison of the graphene/MoS2 heterojunction contact to more traditional MoS2-metal junctions, as well as a theoretical investigation, using density functional theory, of the origin of the Schottky barrier height. The tunability of the graphene work function with electrostatic doping significantly improves the ohmic contact to MoS2. These high-performance large-scale devices and circuits based on this 2D heterostructure pave the way for practical flexible transparent electronics.

Disruptive Technologies in Workmanship: pH-neutral Flux, CDM ESD Events, HDI PCBs

NASA Technical Reports Server (NTRS)

Plante, Jeannette F.

2010-01-01

This slide presentation describes what it calls "disruptive technologies", i.e., "Low-end disruption" occurs when the rate at which products improve exceeds the rate at which customers can adopt the new performance. Therefore, at some point the performance of the product overshoots the needs of certain customer segments. At this point, a disruptive technology may enter the market and provide a product which has lower performance than the incumbent but which exceeds the requirements of certain segments, thereby gaining a foothold in the market. This concept is viewed in impacting incumbent technologies Rosin Flux, with a pH-neutral water soluble Flux; electrostatic discharge models being disrupted by the charge device model (CDM) concept; and High Density Interconnect Printed Circuit Boards (HDI PCB).

Nano-engineered Multiwall Carbon Nanotube-copper Composite Thermal Interface Material for Efficient Heat Conduction

NASA Technical Reports Server (NTRS)

Ngo, Quoc; Cruden, Brett A.; Cassell, Alan M.; Sims, Gerard; Li, Jun; Meyyappa, M.; Yang, Cary Y.

2005-01-01

Efforts in integrated circuit (IC) packaging technologies have recently been focused on management of increasing heat density associated with high frequency and high density circuit designs. While current flip-chip package designs can accommodate relatively high amounts of heat density, new materials need to be developed to manage thermal effects of next-generation integrated circuits. Multiwall carbon nanotubes (MWNT) have been shown to significantly enhance thermal conduction in the axial direction and thus can be considered to be a candidate for future thermal interface materials by facilitating efficient thermal transport. This work focuses on fabrication and characterization of a robust MWNT-copper composite material as an element in IC package designs. We show that using vertically aligned MWNT arrays reduces interfacial thermal resistance by increasing conduction surface area, and furthermore, the embedded copper acts as a lateral heat spreader to efficiently disperse heat, a necessary function for packaging materials. In addition, we demonstrate reusability of the material, and the absence of residue on the contacting material, both novel features of the MWNT-copper composite that are not found in most state-of-the-art thermal interface materials. Electrochemical methods such as metal deposition and etch are discussed for the creation of the MWNT-Cu composite, detailing issues and observations with using such methods. We show that precise engineering of the composite surface affects the ability of this material to act as an efficient thermal interface material. A thermal contact resistance measurement has been designed to obtain a value of thermal contact resistance for a variety of different thermal contact materials.

DOE Office of Scientific and Technical Information (OSTI.GOV)

Fertig, Fabian, E-mail: fabian.fertig@ise.fraunhofer.de; Greulich, Johannes; Rein, Stefan

We present a spatially resolved method to determine the short-circuit current density of crystalline silicon solar cells by means of lock-in thermography. The method utilizes the property of crystalline silicon solar cells that the short-circuit current does not differ significantly from the illuminated current under moderate reverse bias. Since lock-in thermography images locally dissipated power density, this information is exploited to extract values of spatially resolved current density under short-circuit conditions. In order to obtain an accurate result, one or two illuminated lock-in thermography images and one dark lock-in thermography image need to be recorded. The method can be simplifiedmore » in a way that only one image is required to generate a meaningful short-circuit current density map. The proposed method is theoretically motivated, and experimentally validated for monochromatic illumination in comparison to the reference method of light-beam induced current.« less

Penetration of High Intensity Radiated Fields (HIRF) Into General Aviation Aircraft

NASA Technical Reports Server (NTRS)

Balanis, Constantine A.; Birtcher, Craig R.; Georgakopoulos, Stavros V.; Panaretos, Anastasios H.

2004-01-01

The ability to design and achieve electromagnetic compatibility is becoming more challenging with the rapid development of new electronic products and technologies. The importance of electromagnetic interference (EMI) and electromagnetic compatibility (EMC) issues stems from the fact that the ambient electromagnetic environment has become very hostile; that is, it increases both in density and intensity, while the current trend in technology suggests the number of electronic devices increases in homes, businesses, factories, and transportation vehicles. Furthermore, the operating frequency of products coming into the market continuously increases. While cell phone technology has exceeded 1 GHz and Bluetooth operates at 2.4 GHz, products involving satellite communications operate near 10 GHz and automobile radar systems involve frequencies above 40 GHz. The concern about higher frequencies is that they correspond to smaller wavelengths, therefore electromagnetic waves are able to penetrate equipment enclosure through apertures or even small cracks more easily. In addition, electronic circuits have become small in size, and they are usually placed on motherboards or housed in boxes in very close proximity. Cosite interference and coupling in all electrical and electronic circuit assemblies are two essential issues that have to be examined in every design.

Product assurance technology for custom LSI/VLSI electronics

NASA Technical Reports Server (NTRS)

Buehler, M. G.; Blaes, B. R.; Jennings, G. A.; Moore, B. T.; Nixon, R. H.; Pina, C. A.; Sayah, H. R.; Sievers, M. W.; Stahlberg, N. F.

1985-01-01

The technology for obtaining custom integrated circuits from CMOS-bulk silicon foundries using a universal set of layout rules is presented. The technical efforts were guided by the requirement to develop a 3 micron CMOS test chip for the Combined Release and Radiation Effects Satellite (CRRES). This chip contains both analog and digital circuits. The development employed all the elements required to obtain custom circuits from silicon foundries, including circuit design, foundry interfacing, circuit test, and circuit qualification.

Conversion of Biomass Derivatives to Electricity in Photo Fuel Cells using Undoped and Tungsten-doped Bismuth Vanadate Photoanodes.

PubMed

Zhang, Bingqing; Shi, Jingying; Ding, Chunmei; Chong, Ruifeng; Zhang, Bao; Wang, Zhiliang; Li, Ailong; Liang, Zhenxing; Liao, Shijun; Li, Can

2015-12-07

The photo fuel cell (PFC) is a promising technology for simultaneously converting solar energy and bioenergy into electricity. Here, we present a miniature air-breathing PFC that uses either BiVO4 or W-doped BiVO4 as the photoanode and a Pt/C catalyst as the air-breathing cathode. The PFC exhibited excellent performance under solar illumination and when fed with several types of biomaterial. We found the PFC performance could be significantly enhanced using W-doping into the BiVO4 photoanode. With glucose as the fuel and simulated sunlight (AM 1.5 G) as the light source, the open-circuit voltage increased from 0.74 to 0.92 V, the short-circuit current density rose from 0.46 to 1.62 mA cm(-2) , and the maximum power density was boosted from 0.05 to 0.38 mW cm(-2) , compared to a PFC using undoped BiVO4 as the anode. © 2015 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

Towards a rechargeable alcohol biobattery

NASA Astrophysics Data System (ADS)

Addo, Paul K.; Arechederra, Robert L.; Minteer, Shelley D.

This research focused on the transition of biofuel cell technology to rechargeable biobatteries. The bioanode compartment of the biobattery consisted of NAD-dependent alcohol dehydrogenase (ADH) immobilized into a carbon composite paste with butyl-3-methylimidazolium chloride (BMIMCl) ionic liquid serving as the electrolyte. Ferrocene was added to shuttle electrons to/from the electrode surface/current collector. The bioanode catalyzed the oxidation of ethanol to acetaldehyde in discharge mode. This bioanode was coupled to a cathode that consisted of Prussian Blue in a carbon composite paste with Nafion 212 acting as the separator between the two compartments. The biobattery can be fabricated in a charged mode with ethanol and have an open circuit potential of 0.8 V in the original state prior to charging or in the discharged mode with acetaldehyde and have an open circuit potential of 0.05 V. After charging it has an open circuit potential of 1.2 V and a maximum power density of 13.0 μW cm -3 and a maximum current density of 35.0 μA cm -3, respectively. The stability and efficiency of the biobattery were studied by cycling continuously at a discharging current of 0.4 mA and the results obtained showed reasonable stability over 50 cycles. This is a new type of secondary battery inspired by the metabolic processes of the living cell, which is an effective energy conversion system.

Enhancing the performance of NaNbO3 triboelectric nanogenerators by dielectric modulation and electronegative modification

NASA Astrophysics Data System (ADS)

Lai, Meihui; Cheng, Lu; Xi, Yi; Wu, Yinghui; Hu, Chengguo; Guo, Hengyu; Du, Bolun; Liu, Guanlin; Liu, Qipeng; Liu, Ruchuan

2018-01-01

Increasing the triboelectric charge density on the friction layer of polydimethylsiloxane (PDMS) is a basic approach towards improving the output performance of a triboelectric nanogenerator (TENG). Most previous work focuses on the surface structure or dielectric properties, nonetheless, a few studies have focused on electronegative modification. NaNbO3-PDMS TENG (N-TENG) devices are fabricated by dispersing cubic NaNbO3, which is a lead-free piezoelectric material with molecular oxygen dangling bonds on the surface of the crystal, into the PDMS at different mass ratios. When the mass ratio is 7 wt%, the maximum output performance of the N-TENG is obtained. The open-circuit voltage is 550 V, the short-circuit current is 16 µA, and the effective power densities reach up to 5.5 W m-2 at a load resistance of ~100 MΩ. The N-TENG has been used to assemble self-powered electronic watches and illuminate commercial light-emitting diodes, respectively. Its fundamental mechanism has also been discussed in detail from the perspective of dielectric modulation and electronegative modification. This N-TENG technology is revealed to be a splendid candidate for application in large-scale device fabrication, flexible sensors and biological devices thanks to its easy fabrication process, low consumption, high output power density and biocompatibility.

Heterojunction bipolar transistor technology for data acquisition and communication

NASA Technical Reports Server (NTRS)

Wang, C.; Chang, M.; Beccue, S.; Nubling, R.; Zampardi, P.; Sheng, N.; Pierson, R.

1992-01-01

Heterojunction Bipolar Transistor (HBT) technology has emerged as one of the most promising technologies for ultrahigh-speed integrated circuits. HBT circuits for digital and analog applications, data conversion, and power amplification have been realized, with speed performance well above 20 GHz. At Rockwell, a baseline AlGaAs/GaAs HBT technology has been established in a manufacturing facility. This paper describes the HBT technology, transistor characteristics, and HBT circuits for data acquisition and communication.

Advanced Electrical Materials and Components Being Developed

NASA Technical Reports Server (NTRS)

Schwarze, Gene E.

2004-01-01

All aerospace systems require power management and distribution (PMAD) between the energy and power source and the loads. The PMAD subsystem can be broadly described as the conditioning and control of unregulated power from the energy source and its transmission to a power bus for distribution to the intended loads. All power and control circuits for PMAD require electrical components for switching, energy storage, voltage-to-current transformation, filtering, regulation, protection, and isolation. Advanced electrical materials and component development technology is a key technology to increasing the power density, efficiency, reliability, and operating temperature of the PMAD. The primary means to develop advanced electrical components is to develop new and/or significantly improved electronic materials for capacitors, magnetic components, and semiconductor switches and diodes. The next important step is to develop the processing techniques to fabricate electrical and electronic components that exceed the specifications of presently available state-of-the-art components. The NASA Glenn Research Center's advanced electrical materials and component development technology task is focused on the following three areas: 1) New and/or improved dielectric materials for the development of power capacitors with increased capacitance volumetric efficiency, energy density, and operating temperature; 2) New and/or improved high-frequency, high-temperature soft magnetic materials for the development of transformers and inductors with increased power density, energy density, electrical efficiency, and operating temperature; 3) Packaged high-temperature, high-power density, high-voltage, and low-loss SiC diodes and switches.

Quo vadis, unimolecular electronics?

PubMed

Metzger, Robert Melville

2018-06-07

This paper reviews the present status of unimolecular electronics (UME). The field started in the 1970s with a hope that some day organic molecules (∼2 nm in size), when used as electronic components, would challenge Si-based inorganic electronics in ultimate-high-density integrated circuits. The technological push to ever smaller inorganic device sizes (Moore's "law") was driven by a profit motive and by vast investments. UME, the underfunded pauper, may have lost that "race to the bottom", but some excellent science is left to be done.

A Thermally-Regenerative Ammonia-Based Flow Battery for Electrical Energy Recovery from Waste Heat.

PubMed

Zhu, Xiuping; Rahimi, Mohammad; Gorski, Christopher A; Logan, Bruce

2016-04-21

Large amounts of low-grade waste heat (temperatures <130 °C) are released during many industrial, geothermal, and solar-based processes. Using thermally-regenerative ammonia solutions, low-grade thermal energy can be converted to electricity in battery systems. To improve reactor efficiency, a compact, ammonia-based flow battery (AFB) was developed and tested at different solution concentrations, flow rates, cell pairs, and circuit connections. The AFB achieved a maximum power density of 45 W m(-2) (15 kW m(-3) ) and an energy density of 1260 Wh manolyte (-3) , with a thermal energy efficiency of 0.7 % (5 % relative to the Carnot efficiency). The power and energy densities of the AFB were greater than those previously reported for thermoelectrochemical and salinity-gradient technologies, and the voltage or current could be increased using stacked cells. These results demonstrated that an ammonia-based flow battery is a promising technology to convert low-grade thermal energy to electricity. © 2016 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

High-density stretchable microelectrode arrays: An integrated technology platform for neural and muscular surface interfacing

NASA Astrophysics Data System (ADS)

Guo, Liang

2011-12-01

Numerous applications in neuroscience research and neural prosthetics, such as retinal prostheses, spinal-cord surface stimulation for prosthetics, electrocorticogram (ECoG) recording for epilepsy detection, etc., involve electrical interaction with soft excitable tissues using a surface stimulation and/or recording approach. These applications require an interface that is able to set up electrical communications with a high throughput between electronics and the excitable tissue and that can dynamically conform to the shape of the soft tissue. Being a compliant and biocompatible material with mechanical impedance close to that of soft tissues, polydimethylsiloxane (PDMS) offers excellent potential as the substrate material for such neural interfaces. However, fabrication of electrical functionalities on PDMS has long been very challenging. This thesis work has successfully overcome many challenges associated with PDMS-based microfabrication and achieved an integrated technology platform for PDMS-based stretchable microelectrode arrays (sMEAs). This platform features a set of technological advances: (1) we have fabricated uniform current density profile microelectrodes as small as 10 mum in diameter; (2) we have patterned high-resolution (feature as small as 10 mum), high-density (pitch as small as 20 mum) thin-film gold interconnects on PDMS substrate; (3) we have developed a multilayer wiring interconnect technology within the PDMS substrate to further boost the achievable integration density of such sMEA; and (4) we have invented a bonding technology---via-bonding---to facilitate high-resolution, high-density integration of the sMEA with integrated circuits (ICs) to form a compact implant. Taken together, this platform provides a high-resolution, high-density integrated system solution for neural and muscular surface interfacing. sMEAs of example designs are evaluated through in vitro and in vivo experimentations on their biocompatibility, surface conformability, and surface recording/stimulation capabilities, with a focus on epimysial (i.e. on the surface of muscle) applications. Finally, as an example medical application, we investigate a prosthesis for unilateral vocal cord paralysis (UVCP) based on simultaneous multichannel epimysial recording and stimulation.

A Hearing Aid Primer 1

ERIC Educational Resources Information Center

Yetter, Carol J.

2009-01-01

This hearing aid primer is designed to define the differences among the three levels of hearing instrument technology: conventional analog circuit technology (most basic), digitally programmable/analog circuit technology (moderately advanced), and fully digital technology (most advanced). Both moderate and advanced technologies mean that hearing…

Skin electronics from scalable fabrication of an intrinsically stretchable transistor array.

PubMed

Wang, Sihong; Xu, Jie; Wang, Weichen; Wang, Ging-Ji Nathan; Rastak, Reza; Molina-Lopez, Francisco; Chung, Jong Won; Niu, Simiao; Feig, Vivian R; Lopez, Jeffery; Lei, Ting; Kwon, Soon-Ki; Kim, Yeongin; Foudeh, Amir M; Ehrlich, Anatol; Gasperini, Andrea; Yun, Youngjun; Murmann, Boris; Tok, Jeffery B-H; Bao, Zhenan

2018-03-01

Skin-like electronics that can adhere seamlessly to human skin or within the body are highly desirable for applications such as health monitoring, medical treatment, medical implants and biological studies, and for technologies that include human-machine interfaces, soft robotics and augmented reality. Rendering such electronics soft and stretchable-like human skin-would make them more comfortable to wear, and, through increased contact area, would greatly enhance the fidelity of signals acquired from the skin. Structural engineering of rigid inorganic and organic devices has enabled circuit-level stretchability, but this requires sophisticated fabrication techniques and usually suffers from reduced densities of devices within an array. We reasoned that the desired parameters, such as higher mechanical deformability and robustness, improved skin compatibility and higher device density, could be provided by using intrinsically stretchable polymer materials instead. However, the production of intrinsically stretchable materials and devices is still largely in its infancy: such materials have been reported, but functional, intrinsically stretchable electronics have yet to be demonstrated owing to the lack of a scalable fabrication technology. Here we describe a fabrication process that enables high yield and uniformity from a variety of intrinsically stretchable electronic polymers. We demonstrate an intrinsically stretchable polymer transistor array with an unprecedented device density of 347 transistors per square centimetre. The transistors have an average charge-carrier mobility comparable to that of amorphous silicon, varying only slightly (within one order of magnitude) when subjected to 100 per cent strain for 1,000 cycles, without current-voltage hysteresis. Our transistor arrays thus constitute intrinsically stretchable skin electronics, and include an active matrix for sensory arrays, as well as analogue and digital circuit elements. Our process offers a general platform for incorporating other intrinsically stretchable polymer materials, enabling the fabrication of next-generation stretchable skin electronic devices.

Skin electronics from scalable fabrication of an intrinsically stretchable transistor array

NASA Astrophysics Data System (ADS)

Wang, Sihong; Xu, Jie; Wang, Weichen; Wang, Ging-Ji Nathan; Rastak, Reza; Molina-Lopez, Francisco; Chung, Jong Won; Niu, Simiao; Feig, Vivian R.; Lopez, Jeffery; Lei, Ting; Kwon, Soon-Ki; Kim, Yeongin; Foudeh, Amir M.; Ehrlich, Anatol; Gasperini, Andrea; Yun, Youngjun; Murmann, Boris; Tok, Jeffery B.-H.; Bao, Zhenan

2018-03-01

Skin-like electronics that can adhere seamlessly to human skin or within the body are highly desirable for applications such as health monitoring, medical treatment, medical implants and biological studies, and for technologies that include human-machine interfaces, soft robotics and augmented reality. Rendering such electronics soft and stretchable—like human skin—would make them more comfortable to wear, and, through increased contact area, would greatly enhance the fidelity of signals acquired from the skin. Structural engineering of rigid inorganic and organic devices has enabled circuit-level stretchability, but this requires sophisticated fabrication techniques and usually suffers from reduced densities of devices within an array. We reasoned that the desired parameters, such as higher mechanical deformability and robustness, improved skin compatibility and higher device density, could be provided by using intrinsically stretchable polymer materials instead. However, the production of intrinsically stretchable materials and devices is still largely in its infancy: such materials have been reported, but functional, intrinsically stretchable electronics have yet to be demonstrated owing to the lack of a scalable fabrication technology. Here we describe a fabrication process that enables high yield and uniformity from a variety of intrinsically stretchable electronic polymers. We demonstrate an intrinsically stretchable polymer transistor array with an unprecedented device density of 347 transistors per square centimetre. The transistors have an average charge-carrier mobility comparable to that of amorphous silicon, varying only slightly (within one order of magnitude) when subjected to 100 per cent strain for 1,000 cycles, without current-voltage hysteresis. Our transistor arrays thus constitute intrinsically stretchable skin electronics, and include an active matrix for sensory arrays, as well as analogue and digital circuit elements. Our process offers a general platform for incorporating other intrinsically stretchable polymer materials, enabling the fabrication of next-generation stretchable skin electronic devices.

A silicon technology for millimeter-wave monolithic circuits

NASA Astrophysics Data System (ADS)

Stabile, P. J.; Rosen, A.

1984-12-01

A silicon millimeter-wave integrated-circuit (SIMMWIC) technology that includes high-energy ion implantation and pulsed-laser annealing, secondary ion mass spectrometry (SIMS) profile diagnostics, and novel wafer thinning has been developed. This technology has been applied to a SIMMWIC single-pole single-throw (SPST) switch and to IMPATT and p-i-n diode fabrication schemes. Thus, the SIMMWIC technology is a proven base for monolithic millimeter-wave sources and control circuit applications.

An integrated semiconductor device enabling non-optical genome sequencing.

PubMed

Rothberg, Jonathan M; Hinz, Wolfgang; Rearick, Todd M; Schultz, Jonathan; Mileski, William; Davey, Mel; Leamon, John H; Johnson, Kim; Milgrew, Mark J; Edwards, Matthew; Hoon, Jeremy; Simons, Jan F; Marran, David; Myers, Jason W; Davidson, John F; Branting, Annika; Nobile, John R; Puc, Bernard P; Light, David; Clark, Travis A; Huber, Martin; Branciforte, Jeffrey T; Stoner, Isaac B; Cawley, Simon E; Lyons, Michael; Fu, Yutao; Homer, Nils; Sedova, Marina; Miao, Xin; Reed, Brian; Sabina, Jeffrey; Feierstein, Erika; Schorn, Michelle; Alanjary, Mohammad; Dimalanta, Eileen; Dressman, Devin; Kasinskas, Rachel; Sokolsky, Tanya; Fidanza, Jacqueline A; Namsaraev, Eugeni; McKernan, Kevin J; Williams, Alan; Roth, G Thomas; Bustillo, James

2011-07-20

The seminal importance of DNA sequencing to the life sciences, biotechnology and medicine has driven the search for more scalable and lower-cost solutions. Here we describe a DNA sequencing technology in which scalable, low-cost semiconductor manufacturing techniques are used to make an integrated circuit able to directly perform non-optical DNA sequencing of genomes. Sequence data are obtained by directly sensing the ions produced by template-directed DNA polymerase synthesis using all-natural nucleotides on this massively parallel semiconductor-sensing device or ion chip. The ion chip contains ion-sensitive, field-effect transistor-based sensors in perfect register with 1.2 million wells, which provide confinement and allow parallel, simultaneous detection of independent sequencing reactions. Use of the most widely used technology for constructing integrated circuits, the complementary metal-oxide semiconductor (CMOS) process, allows for low-cost, large-scale production and scaling of the device to higher densities and larger array sizes. We show the performance of the system by sequencing three bacterial genomes, its robustness and scalability by producing ion chips with up to 10 times as many sensors and sequencing a human genome.

Stretched Lens Array Squarerigger (SLASR) Technology Maturation

NASA Technical Reports Server (NTRS)

O'Neill, Mark; McDanal, A.J.; Howell, Joe; Lollar, Louis; Carrington, Connie; Hoppe, David; Piszczor, Michael; Suszuki, Nantel; Eskenazi, Michael; Aiken, Dan;

Electronic circuits

NASA Technical Reports Server (NTRS)

1976-01-01

Twenty-nine circuits and circuit techniques developed for communications and instrumentation technology are described. Topics include pulse-code modulation, phase-locked loops, data coding, data recording, detection circuits, logic circuits, oscillators, and amplifiers.

Emerging applications of high temperature superconductors for space communications

NASA Technical Reports Server (NTRS)

Heinen, Vernon O.; Bhasin, Kul B.; Long, Kenwyn J.

1990-01-01

Proposed space missions require longevity of communications system components, high input power levels, and high speed digital logic devices. The complexity of these missions calls for a high data bandwidth capacity. Incorporation of high temperature superconducting (HTS) thin films into some of these communications system components may provide a means of meeting these requirements. Space applications of superconducting technology has previously been limited by the requirement of cooling to near liquid helium temperatures. Development of HTS materials with transition temperatures above 77 K along with the natural cooling ability of space suggest that space applications may lead the way in the applications of high temperature superconductivity. In order for HTS materials to be incorporated into microwave and millimeter wave devices, the material properties such as electrical conductivity, current density, surface resistivity and others as a function of temperature and frequency must be well characterized and understood. The millimeter wave conductivity and surface resistivity were well characterized, and at 77 K are better than copper. Basic microwave circuits such as ring resonators were used to determine transmission line losses. Higher Q values than those of gold resonator circuits were observed below the transition temperature. Several key HTS circuits including filters, oscillators, phase shifters and phased array antenna feeds are feasible in the near future. For technology to improve further, good quality, large area films must be reproducibly grown on low dielectric constant, low loss microwave substrates.

Minimized open-circuit voltage reduction in GaAs/InGaAs quantum well solar cells with bandgap-engineered graded quantum well depths

NASA Astrophysics Data System (ADS)

Li, Xiaohan; Dasika, Vaishno D.; Li, Ping-Chun; Ji, Li; Bank, Seth R.; Yu, Edward T.

2014-09-01

The use of InGaAs quantum wells with composition graded across the intrinsic region to increase open-circuit voltage in p-i-n GaAs/InGaAs quantum well solar cells is demonstrated and analyzed. By engineering the band-edge energy profile to reduce photo-generated carrier concentration in the quantum wells at high forward bias, simultaneous increases in both open-circuit voltage and short-circuit current density are achieved, compared to those for a structure with the same average In concentration, but constant rather than graded quantum well composition across the intrinsic region. This approach is combined with light trapping to further increase short-circuit current density.

Conception et realisation d'un echantillonneur de grande vitesse en technologie HIGFET (transistor a effet de champ avec heterostructure et grille isolee)

NASA Astrophysics Data System (ADS)

Tazlauanu, Mihai

The research work reported in this thesis details a new fabrication technology for high speed integrated circuits in the broadest sense, including original contributions to device modeling, circuit simulation, integrated circuit design, wafer fabrication, micro-physical and electrical characterization, process flow and final device testing as part of an electrical system. The primary building block of this technology is the heterostructure insulated gate field effect transistor, HIGFET. We used an InP/InGaAs epitaxial heterostructure to ensure a high charge carrier mobility and hence obtain a higher operating frequency than that currently possible for silicon devices. We designed and built integrated circuits with two system architectures. The first architecture integrates the clock signal generator with the sample and hold circuitry on the InP die, while the second is a hybrid architecture of an InP sample and hold assembled with an external clock signal generator made with ECL circuits on GaAs. To generate the clock signals on the same die with the sample and hold circuits, we developed a digital circuit family based on an original inverter, appropriate for depletion mode NMOS technology. We used this circuit to design buffer amplifiers and ring oscillators. Four mask sets produced in a Cadence environment, have permitted the fabrication of test and working devices. Each new mask generation has reflected the previous achievements and has implemented new structures and circuit techniques. The fabrication technology has undergone successive modifications and refinements to optimize device manufacturing. Particular attention has been paid to the technological robustness. The plasma enhanced etching process (RIE) had been used for an exhaustive study for the statistical simulation of the technological steps. Electrical measurements, performed on the experimental samples, have permitted the modeling of the devices, technological processing to be adjusted and circuit design improved. Electrical measurements performed on dedicated test structures, during the fabrication cycle, allowed the identification and correction of some technological problems (ohmic contacts, current leakage, interconnection integrity, and thermal instabilities). Feedback corrections were validated by dedicated experiments with the experimental effort optimized by statistical techniques (factorial fractional design). (Abstract shortened by UMI.)

Logic Circuits as a Vehicle for Technological Literacy.

ERIC Educational Resources Information Center

Hazeltine, Barrett

1985-01-01

Provides basic information on logic circuits, points out that the topic is a good vehicle for developing technological literacy. The subject could be included in such courses as philosophy, computer science, communications, as well as in courses dealing with electronic circuits. (JN)

Performance of ceramic superconductors in magnetic bearings

NASA Technical Reports Server (NTRS)

Kirtley, James L., Jr.; Downer, James R.

1993-01-01

Magnetic bearings are large-scale applications of magnet technology, quite similar in certain ways to synchronous machinery. They require substantial flux density over relatively large volumes of space. Large flux density is required to have satisfactory force density. Satisfactory dynamic response requires that magnetic circuit permeances not be too large, implying large air gaps. Superconductors, which offer large magnetomotive forces and high flux density in low permeance circuits, appear to be desirable in these situations. Flux densities substantially in excess of those possible with iron can be produced, and no ferromagnetic material is required. Thus the inductance of active coils can be made low, indicating good dynamic response of the bearing system. The principal difficulty in using superconductors is, of course, the deep cryogenic temperatures at which they must operate. Because of the difficulties in working with liquid helium, the possibility of superconductors which can be operated in liquid nitrogen is thought to extend the number and range of applications of superconductivity. Critical temperatures of about 98 degrees Kelvin were demonstrated in a class of materials which are, in fact, ceramics. Quite a bit of public attention was attracted to these new materials. There is a difficulty with the ceramic superconducting materials which were developed to date. Current densities sufficient for use in large-scale applications have not been demonstrated. In order to be useful, superconductors must be capable of carrying substantial currents in the presence of large magnetic fields. The possible use of ceramic superconductors in magnetic bearings is investigated and discussed and requirements that must be achieved by superconductors operating at liquid nitrogen temperatures to make their use comparable with niobium-titanium superconductors operating at liquid helium temperatures are identified.

Monolithic Microwave Integrated Circuits Based on GaAs Mesfet Technology

NASA Astrophysics Data System (ADS)

Bahl, Inder J.

Advanced military microwave systems are demanding increased integration, reliability, radiation hardness, compact size and lower cost when produced in large volume, whereas the microwave commercial market, including wireless communications, mandates low cost circuits. Monolithic Microwave Integrated Circuit (MMIC) technology provides an economically viable approach to meeting these needs. In this paper the design considerations for several types of MMICs and their performance status are presented. Multifunction integrated circuits that advance the MMIC technology are described, including integrated microwave/digital functions and a highly integrated transceiver at C-band.

Noise performance limits of advanced x-ray imagers employing poly-Si-based active pixel architectures

NASA Astrophysics Data System (ADS)

Koniczek, Martin; El-Mohri, Youcef; Antonuk, Larry E.; Liang, Albert; Zhao, Qihua; Jiang, Hao

2011-03-01

A decade after the clinical introduction of active matrix, flat-panel imagers (AMFPIs), the performance of this technology continues to be limited by the relatively large additive electronic noise of these systems - resulting in significant loss of detective quantum efficiency (DQE) under conditions of low exposure or high spatial frequencies. An increasingly promising approach for overcoming such limitations involves the incorporation of in-pixel amplification circuits, referred to as active pixel architectures (AP) - based on low-temperature polycrystalline silicon (poly-Si) thin-film transistors (TFTs). In this study, a methodology for theoretically examining the limiting noise and DQE performance of circuits employing 1-stage in-pixel amplification is presented. This methodology involves sophisticated SPICE circuit simulations along with cascaded systems modeling. In these simulations, a device model based on the RPI poly-Si TFT model is used with additional controlled current sources corresponding to thermal and flicker (1/f) noise. From measurements of transfer and output characteristics (as well as current noise densities) performed upon individual, representative, poly-Si TFTs test devices, model parameters suitable for these simulations are extracted. The input stimuli and operating-point-dependent scaling of the current sources are derived from the measured current noise densities (for flicker noise), or from fundamental equations (for thermal noise). Noise parameters obtained from the simulations, along with other parametric information, is input to a cascaded systems model of an AP imager design to provide estimates of DQE performance. In this paper, this method of combining circuit simulations and cascaded systems analysis to predict the lower limits on additive noise (and upper limits on DQE) for large area AP imagers with signal levels representative of those generated at fluoroscopic exposures is described, and initial results are reported.

Fundamentals handbook of electrical and computer engineering. Volume 1 Circuits fields and electronics

NASA Astrophysics Data System (ADS)

Chang, S. S. L.

State of the art technology in circuits, fields, and electronics is discussed. The principles and applications of these technologies to industry, digital processing, microwave semiconductors, and computer-aided design are explained. Important concepts and methodologies in mathematics and physics are reviewed, and basic engineering sciences and associated design methods are dealt with, including: circuit theory and the design of magnetic circuits and active filter synthesis; digital signal processing, including FIR and IIR digital filter design; transmission lines, electromagnetic wave propagation and surface acoustic wave devices. Also considered are: electronics technologies, including power electronics, microwave semiconductors, GaAs devices, and magnetic bubble memories; digital circuits and logic design.

Human skin based triboelectric nanogenerators for harvesting biomechanical energy and as self-powered active tactile sensor system.

PubMed

Yang, Ya; Zhang, Hulin; Lin, Zong-Hong; Zhou, Yu Sheng; Jing, Qingshen; Su, Yuanjie; Yang, Jin; Chen, Jun; Hu, Chenguo; Wang, Zhong Lin

2013-10-22

We report human skin based triboelectric nanogenerators (TENG) that can either harvest biomechanical energy or be utilized as a self-powered tactile sensor system for touch pad technology. We constructed a TENG utilizing the contact/separation between an area of human skin and a polydimethylsiloxane (PDMS) film with a surface of micropyramid structures, which was attached to an ITO electrode that was grounded across a loading resistor. The fabricated TENG delivers an open-circuit voltage up to -1000 V, a short-circuit current density of 8 mA/m(2), and a power density of 500 mW/m(2) on a load of 100 MΩ, which can be used to directly drive tens of green light-emitting diodes. The working mechanism of the TENG is based on the charge transfer between the ITO electrode and ground via modulating the separation distance between the tribo-charged skin patch and PDMS film. Furthermore, the TENG has been used in designing an independently addressed matrix for tracking the location and pressure of human touch. The fabricated matrix has demonstrated its self-powered and high-resolution tactile sensing capabilities by recording the output voltage signals as a mapping figure, where the detection sensitivity of the pressure is about 0.29 ± 0.02 V/kPa and each pixel can have a size of 3 mm × 3 mm. The TENGs may have potential applications in human-machine interfacing, micro/nano-electromechanical systems, and touch pad technology.

Fabrication of polymer electrolyte membrane fuel cell MEAs utilizing inkjet print technology

NASA Astrophysics Data System (ADS)

Towne, Silas; Viswanathan, Vish; Holbery, James; Rieke, Peter

Utilizing drop-on-demand technology, we have successfully fabricated hydrogen-air polymer electrolyte membrane fuel cells (PEMFC), demonstrated some of the processing advantages of this technology and have demonstrated that the performance is comparable to conventionally fabricated membrane electrode assemblies (MEAs). Commercial desktop inkjet printers were used to deposit the active catalyst electrode layer directly from print cartridges onto Nafion ® polymer membranes in the hydrogen form. The layers were well-adhered and withstood simple tape peel, bending and abrasion tests and did so without any post-deposition hot press step. The elimination of this processing step suggests that inkjet-based fabrication or similar processing technologies may provide a route to less expensive large-scale fabrication of PEMFCs. When tested in our experimental apparatus, open circuit voltages up to 0.87 V and power densities of up to 155 mW cm -2 were obtained with a catalyst loading of 0.20 mg Pt cm -2. A commercially available membrane under identical, albeit not optimized test conditions, showed about 7% greater power density. The objective of this work was to demonstrate some of the processing advantages of drop-on-demand technology for fabrication of MEAs. It remains to be determined if inkjet fabrication offers performance advantages or leads to more efficient utilization of expensive catalyst materials.

Fundamental energy limits of SET-based Brownian NAND and half-adder circuits. Preliminary findings from a physical-information-theoretic methodology

NASA Astrophysics Data System (ADS)

Ercan, İlke; Suyabatmaz, Enes

2018-06-01

The saturation in the efficiency and performance scaling of conventional electronic technologies brings about the development of novel computational paradigms. Brownian circuits are among the promising alternatives that can exploit fluctuations to increase the efficiency of information processing in nanocomputing. A Brownian cellular automaton, where signals propagate randomly and are driven by local transition rules, can be made computationally universal by embedding arbitrary asynchronous circuits on it. One of the potential realizations of such circuits is via single electron tunneling (SET) devices since SET technology enable simulation of noise and fluctuations in a fashion similar to Brownian search. In this paper, we perform a physical-information-theoretic analysis on the efficiency limitations in a Brownian NAND and half-adder circuits implemented using SET technology. The method we employed here establishes a solid ground that enables studying computational and physical features of this emerging technology on an equal footing, and yield fundamental lower bounds that provide valuable insights into how far its efficiency can be improved in principle. In order to provide a basis for comparison, we also analyze a NAND gate and half-adder circuit implemented in complementary metal oxide semiconductor technology to show how the fundamental bound of the Brownian circuit compares against a conventional paradigm.

Measurement of electron density using reactance cutoff probe

DOE Office of Scientific and Technical Information (OSTI.GOV)

You, K. H.; Seo, B. H.; Kim, J. H.

2016-05-15

This paper proposes a new measurement method of electron density using the reactance spectrum of the plasma in the cutoff probe system instead of the transmission spectrum. The highly accurate reactance spectrum of the plasma-cutoff probe system, as expected from previous circuit simulations [Kim et al., Appl. Phys. Lett. 99, 131502 (2011)], was measured using the full two-port error correction and automatic port extension methods of the network analyzer. The electron density can be obtained from the analysis of the measured reactance spectrum, based on circuit modeling. According to the circuit simulation results, the reactance cutoff probe can measure themore » electron density more precisely than the previous cutoff probe at low densities or at higher pressure. The obtained results for the electron density are presented and discussed for a wide range of experimental conditions, and this method is compared with previous methods (a cutoff probe using the transmission spectrum and a single Langmuir probe).« less

Novel Low Loss Wide-Band Multi-Port Integrated Circuit Technology for RF/Microwave Applications

NASA Technical Reports Server (NTRS)

Simons, Rainee N.; Goverdhanam, Kavita; Katehi, Linda P. B.; Burke, Thomas P. (Technical Monitor)

2001-01-01

In this paper, novel low loss, wide-band coplanar stripline technology for radio frequency (RF)/microwave integrated circuits is demonstrated on high resistivity silicon wafer. In particular, the fabrication process for the deposition of spin-on-glass (SOG) as a dielectric layer, the etching of microvias for the vertical interconnects, the design methodology for the multiport circuits and their measured/simulated characteristics are graphically illustrated. The study shows that circuits with very low loss, large bandwidth, and compact size are feasible using this technology. This multilayer planar technology has potential to significantly enhance RF/microwave IC performance when combined with semi-conductor devices and microelectromechanical systems (MEMS).

Design Techniques for Power-Aware Combinational Logic SER Mitigation

NASA Astrophysics Data System (ADS)

Mahatme, Nihaar N.

The history of modern semiconductor devices and circuits suggests that technologists have been able to maintain scaling at the rate predicted by Moore's Law [Moor-65]. With improved performance, speed and lower area, technology scaling has also exacerbated reliability issues such as soft errors. Soft errors are transient errors that occur in microelectronic circuits due to ionizing radiation particle strikes on reverse biased semiconductor junctions. These radiation induced errors at the terrestrial-level are caused due to radiation particle strikes by (1) alpha particles emitted as decay products of packing material (2) cosmic rays that produce energetic protons and neutrons, and (3) thermal neutrons [Dodd-03], [Srou-88] and more recently muons and electrons [Ma-79] [Nara-08] [Siew-10] [King-10]. In the space environment radiation induced errors are a much bigger threat and are mainly caused by cosmic heavy-ions, protons etc. The effects of radiation exposure on circuits and measures to protect against them have been studied extensively for the past 40 years, especially for parts operating in space. Radiation particle strikes can affect memory as well as combinational logic. Typically when these particles strike semiconductor junctions of transistors that are part of feedback structures such as SRAM memory cells or flip-flops, it can lead to an inversion of the cell content. Such a failure is formally called a bit-flip or single-event upset (SEU). When such particles strike sensitive junctions part of combinational logic gates they produce transient voltage spikes or glitches called single-event transients (SETs) that could be latched by receiving flip-flops. As the circuits are clocked faster, there are more number of clocking edges which increases the likelihood of latching these transients. In older technology generations the probability of errors in flip-flops due to SETs being latched was much lower compared to direct strikes on flip-flops or SRAMs leading to SEUs. This was mainly because the operating frequencies were much lower for older technology generations. The Intel Pentium II for example was fabricated using 0.35 microm technology and operated between 200-330 MHz. With technology scaling however, operating frequencies have increased tremendously and the contribution of soft errors due to latched SETs from combinational logic could account for a significant proportion of the chip-level soft error rate [Sief-12][Maha-11][Shiv02] [Bu97]. Therefore there is a need to systematically characterize the problem of combinational logic single-event effects (SEE) and understand the various factors that affect the combinational logic single-event error rate. Just as scaling has led to soft errors emerging as a reliability-limiting failure mode for modern digital ICs, the problem of increasing power consumption has arguably been a bigger bane of scaling. While Moore's Law loftily states the blessing of technology scaling to be smaller and faster transistor it fails to highlight that the power density increases exponentially with every technology generation. The power density problem was partially solved in the 1970's and 1980's by moving from bipolar and GaAs technologies to full-scale silicon CMOS technologies. Following this however, technology miniaturization that enabled high-speed, multicore and parallel computing has steadily increased the power density and the power consumption problem. Today minimizing the power consumption is as much critical for power hungry server farms as it for portable devices, all pervasive sensor networks and future eco-bio-sensors. Low-power consumption is now regularly part of design philosophies for various digital products with diverse applications from computing to communication to healthcare. Thus designers in today's world are left grappling with both a "power wall" as well as a "reliability wall". Unfortunately, when it comes to improving reliability through soft error mitigation, most approaches are invariably straddled with overheads in terms of area or speed and more importantly power. Thus, the cost of protecting combinational logic through the use of power hungry mitigation approaches can disrupt the power budget significantly. Therefore there is a strong need to develop techniques that can provide both power minimization as well as combinational logic soft error mitigation. This dissertation, advances hitherto untapped opportunities to jointly reduce power consumption and deliver soft error resilient designs. Circuit as well as architectural approaches are employed to achieve this objective and the advantages of cross-layer optimization for power and soft error reliability are emphasized.

Source-gated transistors for order-of-magnitude performance improvements in thin-film digital circuits

NASA Astrophysics Data System (ADS)

Sporea, R. A.; Trainor, M. J.; Young, N. D.; Shannon, J. M.; Silva, S. R. P.

2014-03-01

Ultra-large-scale integrated (ULSI) circuits have benefited from successive refinements in device architecture for enormous improvements in speed, power efficiency and areal density. In large-area electronics (LAE), however, the basic building-block, the thin-film field-effect transistor (TFT) has largely remained static. Now, a device concept with fundamentally different operation, the source-gated transistor (SGT) opens the possibility of unprecedented functionality in future low-cost LAE. With its simple structure and operational characteristics of low saturation voltage, stability under electrical stress and large intrinsic gain, the SGT is ideally suited for LAE analog applications. Here, we show using measurements on polysilicon devices that these characteristics lead to substantial improvements in gain, noise margin, power-delay product and overall circuit robustness in digital SGT-based designs. These findings have far-reaching consequences, as LAE will form the technological basis for a variety of future developments in the biomedical, civil engineering, remote sensing, artificial skin areas, as well as wearable and ubiquitous computing, or lightweight applications for space exploration.

Aeroelastic flutter energy harvesters self-polarized by triboelectric effects

NASA Astrophysics Data System (ADS)

Perez, M.; Boisseau, S.; Geisler, M.; Gasnier, P.; Willemin, J.; Despesse, G.; Reboud, J. L.

2018-01-01

This paper presents the performances of several electrostatic flutter energy harvesters tested in a wind tunnel between 0 and 20 m s-1. The main idea is to use the flutter capability of thin flexible films confined between lateral walls to induce simultaneously the capacitance variations and the electrostatic polarization required by the triboelectric/electrostatic conversion. This technology provides thin and flexible devices and solve the electret’s stability issue (Perez et al 2015 Smart Mater. Struct., Perez et al 2015 New Circuits and Systems). Our prototypes (<16 cm2) have a quick startup (from 3 m s-1) and an electrical power-flux density from 0.35 μW cm-2@3 m s-1 (light breeze) to 35 μW cm-2@20 m s-1 (fresh gale). A Maximum Power Point circuit has been developed to efficiently use the power provided by the energy harvesters. The energy harvester combined with its power management circuit has finally been used to supply an 868 MHz wireless sensor node with temperature and acceleration measurements, validating the complete energy harvesting chain.

Source-gated transistors for order-of-magnitude performance improvements in thin-film digital circuits

PubMed Central

Sporea, R. A.; Trainor, M. J.; Young, N. D.; Shannon, J. M.; Silva, S. R. P.

2014-01-01

Ultra-large-scale integrated (ULSI) circuits have benefited from successive refinements in device architecture for enormous improvements in speed, power efficiency and areal density. In large-area electronics (LAE), however, the basic building-block, the thin-film field-effect transistor (TFT) has largely remained static. Now, a device concept with fundamentally different operation, the source-gated transistor (SGT) opens the possibility of unprecedented functionality in future low-cost LAE. With its simple structure and operational characteristics of low saturation voltage, stability under electrical stress and large intrinsic gain, the SGT is ideally suited for LAE analog applications. Here, we show using measurements on polysilicon devices that these characteristics lead to substantial improvements in gain, noise margin, power-delay product and overall circuit robustness in digital SGT-based designs. These findings have far-reaching consequences, as LAE will form the technological basis for a variety of future developments in the biomedical, civil engineering, remote sensing, artificial skin areas, as well as wearable and ubiquitous computing, or lightweight applications for space exploration. PMID:24599023

Toward the 5nm technology: layout optimization and performance benchmark for logic/SRAMs using lateral and vertical GAA FETs

NASA Astrophysics Data System (ADS)

Huynh-Bao, Trong; Ryckaert, Julien; Sakhare, Sushil; Mercha, Abdelkarim; Verkest, Diederik; Thean, Aaron; Wambacq, Piet

2016-03-01

In this paper, we present a layout and performance analysis of logic and SRAM circuits for vertical and lateral GAA FETs using 5nm (iN5) design rules. Extreme ultra-violet lithography (EUVL) processes are exploited to print the critical features: 32 nm gate pitch and 24 nm metal pitch. Layout architectures and patterning compromises for enabling the 5nm node will be discussed in details. A distinct standard-cell template for vertical FETs is proposed and elaborated for the first time. To assess electrical performances, a BSIM-CMG model has been developed and calibrated with TCAD simulations, which accounts for the quasi-ballistic transport in the nanowire channel. The results show that the inbound power rail layout construct for vertical devices could achieve the highest density while the interleaving diffusion template can maximize the port accessibility. By using a representative critical path circuit of a generic low power SoCs, it is shown that the VFET-based circuit is 40% more energy efficient than LFET designs at iso-performance. Regarding SRAMs, benefits given by vertical channel orientation in VFETs has reduced the SRAM area by 20%~30% compared to lateral SRAMs. A double exposures with EUV canner is needed to reach a minimum tip-to-tip (T2T) of 16 nm for middle-of-line (MOL) layers. To enable HD SRAMs with two metal layers, a fully self-aligned gate contact for LFETs and 2D routing of the top electrode for VFETs are required. The standby leakage of vertical SRAMs is 4~6X lower than LFET-based SRAMs at iso-performance and iso-area. The minimum operating voltage (Vmin) of vertical SRAMs is 170 mV lower than lateral SRAMs. A high-density SRAM bitcell of 0.014 um2 can be obtained for the iN5 technology node, which fully follows the SRAM scaling trend for the 45nm nodes and beyond.

Technological Literacy Learning with Cumulative and Stepwise Integration of Equations into Electrical Circuit Diagrams

ERIC Educational Resources Information Center

Ozogul, G.; Johnson, A. M.; Moreno, R.; Reisslein, M.

2012-01-01

Technological literacy education involves the teaching of basic engineering principles and problem solving, including elementary electrical circuit analysis, to non-engineering students. Learning materials on circuit analysis typically rely on equations and schematic diagrams, which are often unfamiliar to non-engineering students. The goal of…

Carbon nanotube circuit integration up to sub-20 nm channel lengths.

PubMed

Shulaker, Max Marcel; Van Rethy, Jelle; Wu, Tony F; Liyanage, Luckshitha Suriyasena; Wei, Hai; Li, Zuanyi; Pop, Eric; Gielen, Georges; Wong, H-S Philip; Mitra, Subhasish

2014-04-22

Carbon nanotube (CNT) field-effect transistors (CNFETs) are a promising emerging technology projected to achieve over an order of magnitude improvement in energy-delay product, a metric of performance and energy efficiency, compared to silicon-based circuits. However, due to substantial imperfections inherent with CNTs, the promise of CNFETs has yet to be fully realized. Techniques to overcome these imperfections have yielded promising results, but thus far only at large technology nodes (1 μm device size). Here we demonstrate the first very large scale integration (VLSI)-compatible approach to realizing CNFET digital circuits at highly scaled technology nodes, with devices ranging from 90 nm to sub-20 nm channel lengths. We demonstrate inverters functioning at 1 MHz and a fully integrated CNFET infrared light sensor and interface circuit at 32 nm channel length. This demonstrates the feasibility of realizing more complex CNFET circuits at highly scaled technology nodes.

A statistical-based material and process guidelines for design of carbon nanotube field-effect transistors in gigascale integrated circuits.

PubMed

Ghavami, Behnam; Raji, Mohsen; Pedram, Hossein

2011-08-26

Carbon nanotube field-effect transistors (CNFETs) show great promise as building blocks of future integrated circuits. However, synthesizing single-walled carbon nanotubes (CNTs) with accurate chirality and exact positioning control has been widely acknowledged as an exceedingly complex task. Indeed, density and chirality variations in CNT growth can compromise the reliability of CNFET-based circuits. In this paper, we present a novel statistical compact model to estimate the failure probability of CNFETs to provide some material and process guidelines for the design of CNFETs in gigascale integrated circuits. We use measured CNT spacing distributions within the framework of detailed failure analysis to demonstrate that both the CNT density and the ratio of metallic to semiconducting CNTs play dominant roles in defining the failure probability of CNFETs. Besides, it is argued that the large-scale integration of these devices within an integrated circuit will be feasible only if a specific range of CNT density with an acceptable ratio of semiconducting to metallic CNTs can be adjusted in a typical synthesis process.

Electronic circuits and systems: A compilation. [including integrated circuits, logic circuits, varactor diode circuits, low pass filters, and optical equipment circuits

NASA Technical Reports Server (NTRS)

1975-01-01

Technological information is presented electronic circuits and systems which have potential utility outside the aerospace community. Topics discussed include circuit components such as filters, converters, and integrators, circuits designed for use with specific equipment or systems, and circuits designed primarily for use with optical equipment or displays.

Power efficient, clock gated multiplexer based full adder cell using 28 nm technology

NASA Astrophysics Data System (ADS)

Gupta, Ashutosh; Murgai, Shruti; Gulati, Anmol; Kumar, Pradeep

2016-03-01

Clock gating is a leading technique used for power saving. Full adders is one of the basic circuit that can be found in maximum VLSI circuits. In this paper clock gated multiplexer based full adder cell is implemented on 28 nm technology. We have designed a full adder cell using a multiplexer with a gated clock without degrading its performance of the cell. We have negative latch circuit for generating gated clock. This gated clock is used to control the multiplexer based full adder cell. The circuit has been synthesized on kintex FPGA through Xilinx ISE Design Suite 14.7 using 28 nm technology in Verilog HDL. The circuit has been simulated on Modelsim 10.3c. The design is verified using System Verilog on QuestaSim in UVM environment. The total power of the circuit has been reduced by 7.41% without degrading the performance of original circuit. The power has been calculated using XPower Analyzer tool of XILINX ISE DESIGN SUITE 14.3.

Latest Trends of Vacuum Circuit Breaker and Related Technologies

NASA Astrophysics Data System (ADS)

Kozono, Hideaki; Tanimizu, Toru

Vacuum Circuit Breakers (VCBs) have been widely used for medium voltage level, because of their performance: compact size, light weight, maintenance free operations and environment-friendly characteristics. They become most comfortable breakers for our needs from other breakers: oil, air, magnetic blast and gas. In this paper the history of vacuum, and latest trends of circuit breakers and related technologies are described, as well as merits or demerits of using vacuum technologies.

High-density carrier-accumulated and electrically stable oxide thin-film transistors from ion-gel gate dielectric

PubMed Central

Fujii, Mami N.; Ishikawa, Yasuaki; Miwa, Kazumoto; Okada, Hiromi; Uraoka, Yukiharu; Ono, Shimpei

2015-01-01

The use of indium–gallium–zinc oxide (IGZO) has paved the way for high-resolution uniform displays or integrated circuits with transparent and flexible devices. However, achieving highly reliable devices that use IGZO for low-temperature processes remains a technological challenge. We propose the use of IGZO thin-film transistors (TFTs) with an ionic-liquid gate dielectric in order to achieve high-density carrier-accumulated IGZO TFTs with high reliability, and we discuss a distinctive mechanism for the degradation of this organic–inorganic hybrid device under long-term electrical stress. Our results demonstrated that an ionic liquid or gel gate dielectric provides highly reliable and low-voltage operation with IGZO TFTs. Furthermore, high-density carrier accumulation helps improve the TFT characteristics and reliability, and it is highly relevant to the electronic phase control of oxide materials and the degradation mechanism for organic–inorganic hybrid devices. PMID:26677773

High-density carrier-accumulated and electrically stable oxide thin-film transistors from ion-gel gate dielectric.

PubMed

Fujii, Mami N; Ishikawa, Yasuaki; Miwa, Kazumoto; Okada, Hiromi; Uraoka, Yukiharu; Ono, Shimpei

2015-12-18

The use of indium-gallium-zinc oxide (IGZO) has paved the way for high-resolution uniform displays or integrated circuits with transparent and flexible devices. However, achieving highly reliable devices that use IGZO for low-temperature processes remains a technological challenge. We propose the use of IGZO thin-film transistors (TFTs) with an ionic-liquid gate dielectric in order to achieve high-density carrier-accumulated IGZO TFTs with high reliability, and we discuss a distinctive mechanism for the degradation of this organic-inorganic hybrid device under long-term electrical stress. Our results demonstrated that an ionic liquid or gel gate dielectric provides highly reliable and low-voltage operation with IGZO TFTs. Furthermore, high-density carrier accumulation helps improve the TFT characteristics and reliability, and it is highly relevant to the electronic phase control of oxide materials and the degradation mechanism for organic-inorganic hybrid devices.

Face-to-face confrontation: effects of closed-circuit technology on children's eyewitness testimony and jurors' decisions.

PubMed

Goodman, G S; Tobey, A E; Batterman-Faunce, J M; Orcutt, H; Thomas, S; Shapiro, C; Sachsenmaier, T

1998-04-01

The present study was designed to examine effects of closed-circuit technology on children's testimony and jurors' perceptions of child witnesses. For the study, a series of elaborately staged mock trials was held. First, 5- to 6-year-old and 8- to 9-year-old children individually participated in a play session with an unfamiliar male confederate. Approximately 2 weeks later, children individually testified about the event at downtown city courtroom. Mock juries composed of community recruits viewed the trials, with the child's testimony presented either live in open court or over closed-circuit television. Mock jurors made ratings concerning the child witness and the defendant, and deliberated to reach a verdict. Results indicated that overall, older children were more accurate witnesses than younger children. However, older, not younger children produced more inaccurate information in free recall. Compared to live testimony in open court, use of closed-circuit technology led to decreased suggestibility for younger children. Testifying in open court was also associated with children experiencing greater pretrial anxiety. Closed-circuit technology did not diminish fact finders' abilities to discriminate accurate from inaccurate child testimony, nor did it directly bias jurors against the defendant. However, closed-circuit testimony biased jurors against child witnesses. Moreover, jurors tended to base their impressions of witness credibility on perceived confidence and consistency. Implications for the use of closed-circuit technology when children testify are discussed.

Multi-Layer E-Textile Circuits

NASA Technical Reports Server (NTRS)

Dunne, Lucy E.; Bibeau, Kaila; Mulligan, Lucie; Frith, Ashton; Simon, Cory

2012-01-01

Stitched e-textile circuits facilitate wearable, flexible, comfortable wearable technology. However, while stitched methods of e-textile circuits are common, multi-layer circuit creation remains a challenge. Here, we present methods of stitched multi-layer circuit creation using accessible tools and techniques.

Interior Permanent Magnet Reluctance Machine with Brushless Field Excitation

DOE Office of Scientific and Technical Information (OSTI.GOV)

Wiles, R.H.

2005-10-07

In a conventional permanent magnet (PM) machine, the air-gap flux produced by the PM is fixed. It is difficult to enhance the air-gap flux density due to limitations of the PM in a series-magnetic circuit. However, the air-gap flux density can be weakened by using power electronic field weakening to the limit of demagnetization of the PMs. This paper presents the test results of controlling the PM air-gap flux density through the use of a stationary brushless excitation coil in a reluctance interior permanent magnet with brushless field excitation (RIPM-BFE) motor. Through the use of this technology the air-gap fluxmore » density can be either enhanced or weakened. There is no concern with demagnetizing the PMs during field weakening. The leakage flux of the excitation coil through the PMs is blocked. The prototype motor built on this principle confirms the concept of flux enhancement and weakening through the use of excitation coils.« less

Review of silicon photonics: history and recent advances

NASA Astrophysics Data System (ADS)

Ye, Winnie N.; Xiong, Yule

2013-09-01

Silicon photonics has attracted tremendous attention and research effort as a promising technology in optoelectronic integration for computing, communications, sensing, and solar harvesting. Mainly due to the combination of its excellent material properties and the complementary metal-oxide semiconductor (CMOS) fabrication processing technology, silicon has becoming the material choice for photonic and optoelectronic circuits with low cost, ultra-compact device footprint, and high-density integration. This review paper provides an overview on silicon photonics, by highlighting the early work from the mid-1980s on the fundamental building blocks such as silicon platforms and waveguides, and the main milestones that have been achieved so far in the field. A summary of reported work on functional elements in both passive and active devices, as well as the applications of the technology in interconnect, sensing, and solar cells, is identified.

An e-Learning System with MR for Experiments Involving Circuit Construction to Control a Robot

ERIC Educational Resources Information Center

Takemura, Atsushi

2016-01-01

This paper proposes a novel e-Learning system for technological experiments involving electronic circuit-construction and controlling robot motion that are necessary in the field of technology. The proposed system performs automated recognition of circuit images transmitted from individual learners and automatically supplies the learner with…

Impact of VLSI/VHSIC on satellite on-board signal processing

NASA Astrophysics Data System (ADS)

Aanstoos, J. V.; Ruedger, W. H.; Snyder, W. E.; Kelly, W. L.

Forecasted improvements in IC fabrication techniques, such as the use of X-ray lithography, are expected to yield submicron circuit feature sizes within the decade of the 1980s. As dimensions decrease, reliability, cost, speed, power consumption and density improvements will be realized which have a significant impact on the capabilities of onboard spacecraft signal processing functions. This will in turn result in increases of the intelligence that may be deployed on spaceborne remote sensing platforms. Among programs oriented toward such goals are the silicon-based Very High Speed Integrated Circuit (VHSIC) researches sponsored by the U.S. Department of Defense, and efforts toward the development of GaAs devices which will compete with silicon VLSI technology for future applications. GaAs has an electron mobility which is five to six times that of silicon, and promises commensurate computation speed increases under low field conditions.

Photo-degradation of high efficiency fullerene-free polymer solar cells.

PubMed

Upama, Mushfika Baishakhi; Wright, Matthew; Mahmud, Md Arafat; Elumalai, Naveen Kumar; Mahboubi Soufiani, Arman; Wang, Dian; Xu, Cheng; Uddin, Ashraf

2017-12-07

Polymer solar cells are a promising technology for the commercialization of low cost, large scale organic solar cells. With the evolution of high efficiency (>13%) non-fullerene polymer solar cells, the stability of the cells has become a crucial parameter to be considered. Among the several degradation mechanisms of polymer solar cells, burn-in photo-degradation is relatively less studied. Herein, we present the first systematic study of photo-degradation of novel PBDB-T:ITIC fullerene-free polymer solar cells. The thermally treated and as-prepared PBDB-T:ITIC solar cells were exposed to continuous 1 sun illumination for 5 hours. The aged devices exhibited rapid losses in the short-circuit current density and fill factor. The severe short-circuit current and fill factor burn in losses were attributed to trap mediated charge recombination, as evidenced by an increase in Urbach energy for aged devices.

A fast low-power optical memory based on coupled micro-ring lasers

NASA Astrophysics Data System (ADS)

Hill, Martin T.; Dorren, Harmen J. S.; de Vries, Tjibbe; Leijtens, Xaveer J. M.; den Besten, Jan Hendrik; Smalbrugge, Barry; Oei, Yok-Siang; Binsma, Hans; Khoe, Giok-Djan; Smit, Meint K.

2004-11-01

The increasing speed of fibre-optic-based telecommunications has focused attention on high-speed optical processing of digital information. Complex optical processing requires a high-density, high-speed, low-power optical memory that can be integrated with planar semiconductor technology for buffering of decisions and telecommunication data. Recently, ring lasers with extremely small size and low operating power have been made, and we demonstrate here a memory element constructed by interconnecting these microscopic lasers. Our device occupies an area of 18 × 40µm2 on an InP/InGaAsP photonic integrated circuit, and switches within 20ps with 5.5fJ optical switching energy. Simulations show that the element has the potential for much smaller dimensions and switching times. Large numbers of such memory elements can be densely integrated and interconnected on a photonic integrated circuit: fast digital optical information processing systems employing large-scale integration should now be viable.

Controlled data storage for non-volatile memory cells embedded in nano magnetic logic

NASA Astrophysics Data System (ADS)

Riente, Fabrizio; Ziemys, Grazvydas; Mattersdorfer, Clemens; Boche, Silke; Turvani, Giovanna; Raberg, Wolfgang; Luber, Sebastian; Breitkreutz-v. Gamm, Stephan

2017-05-01

Among the beyond-CMOS technologies, perpendicular Nano Magnetic Logic (pNML) is a promising candidate due to its low power consumption, its non-volatility and its monolithic 3D integrability, which makes it possible to integrate memory and logic into the same device by exploiting the interaction of bi-stable nanomagnets with perpendicular magnetic anisotropy. Logic computation and signal synchronization are achieved by focus ion beam irradiation and by pinning domain walls in magnetic notches. However, in realistic circuits, the information storage and their read-out are crucial issues, often ignored in the exploration of beyond-CMOS devices. In this paper we address these issues by experimentally demonstrating a pNML memory element, whose read and write operations can be controlled by two independent pulsed currents. Our results prove the correct behavior of the proposed structure that enables high density memory embedded in the logic plane of 3D-integrated pNML circuits.

Thermal Peak Management Using Organic Phase Change Materials for Latent Heat Storage in Electronic Applications

PubMed Central

Maxa, Jacob; Novikov, Andrej; Nowottnick, Mathias

2017-01-01

Modern high power electronics devices consists of a large amount of integrated circuits for switching and supply applications. Beside the benefits, the technology exhibits the problem of an ever increasing power density. Nowadays, heat sinks that are directly mounted on a device, are used to reduce the on-chip temperature and dissipate the thermal energy to the environment. This paper presents a concept of a composite coating for electronic components on printed circuit boards or electronic assemblies that is able to buffer a certain amount of thermal energy, dissipated from a device. The idea is to suppress temperature peaks in electronic components during load peaks or electronic shorts, which otherwise could damage or destroy the device, by using a phase change material to buffer the thermal energy. The phase change material coating could be directly applied on the chip package or the PCB using different mechanical retaining jigs.

Effect of Joule heating and current crowding on electromigration in mobile technology

NASA Astrophysics Data System (ADS)

Tu, K. N.; Liu, Yingxia; Li, Menglu

2017-03-01

In the present era of big data and internet of things, the use of microelectronic products in all aspects of our life is manifested by the ubiquitous presence of mobile devices as i-phones and wearable i-products. These devices are facing the need for higher power and greater functionality applications such as in i-health, yet they are limited by physical size. At the moment, software (Apps) is much ahead of hardware in mobile technology. To advance hardware, the end of Moore's law in two-dimensional integrated circuits can be extended by three-dimensional integrated circuits (3D ICs). The concept of 3D ICs has been with us for more than ten years. The challenge in 3D IC technology is dense packing by using both vertical and horizontal interconnections. Mass production of 3D IC devices is behind schedule due to cost because of low yield and uncertain reliability. Joule heating is serious in a dense structure because of heat generation and dissipation. A change of reliability paradigm has advanced from failure at a specific circuit component to failure at a system level weak-link. Currently, the electronic industry is introducing 3D IC devices in mainframe computers, where cost is not an issue, for the purpose of collecting field data of failure, especially the effect of Joule heating and current crowding on electromigration. This review will concentrate on the positive feedback between Joule heating and electromigration, resulting in an accelerated system level weak-link failure. A new driving force of electromigration, the electric potential gradient force due to current crowding, will be reviewed critically. The induced failure tends to occur in the low current density region.

High performance of PbSe/PbS core/shell quantum dot heterojunction solar cells: short circuit current enhancement without the loss of open circuit voltage by shell thickness control.

PubMed

Choi, Hyekyoung; Song, Jung Hoon; Jang, Jihoon; Mai, Xuan Dung; Kim, Sungwoo; Jeong, Sohee

2015-11-07

We fabricated heterojunction solar cells with PbSe/PbS core shell quantum dots and studied the precisely controlled PbS shell thickness dependency in terms of optical properties, electronic structure, and solar cell performances. When the PbS shell thickness increases, the short circuit current density (JSC) increases from 6.4 to 11.8 mA cm(-2) and the fill factor (FF) enhances from 30 to 49% while the open circuit voltage (VOC) remains unchanged at 0.46 V even with the decreased effective band gap. We found that the Fermi level and the valence band maximum level remain unchanged in both the PbSe core and PbSe/PbS core/shell with a less than 1 nm thick PbS shell as probed via ultraviolet photoelectron spectroscopy (UPS). The PbS shell reduces their surface trap density as confirmed by relative quantum yield measurements. Consequently, PbS shell formation on the PbSe core mitigates the trade-off relationship between the open circuit voltage and the short circuit current density. Finally, under the optimized conditions, the PbSe core with a 0.9 nm thick shell yielded a power conversion efficiency of 6.5% under AM 1.5.

Advances in gallium arsenide monolithic microwave integrated-circuit technology for space communications systems

NASA Technical Reports Server (NTRS)

Bhasin, K. B.; Connolly, D. J.

1986-01-01

Future communications satellites are likely to use gallium arsenide (GaAs) monolithic microwave integrated-circuit (MMIC) technology in most, if not all, communications payload subsystems. Multiple-scanning-beam antenna systems are expected to use GaAs MMIC's to increase functional capability, to reduce volume, weight, and cost, and to greatly improve system reliability. RF and IF matrix switch technology based on GaAs MMIC's is also being developed for these reasons. MMIC technology, including gigabit-rate GaAs digital integrated circuits, offers substantial advantages in power consumption and weight over silicon technologies for high-throughput, on-board baseband processor systems. In this paper, current developments in GaAs MMIC technology are described, and the status and prospects of the technology are assessed.

Biobatteries and biofuel cells with biphenylated carbon nanotubes

NASA Astrophysics Data System (ADS)

Stolarczyk, Krzysztof; Kizling, Michał; Majdecka, Dominika; Żelechowska, Kamila; Biernat, Jan F.; Rogalski, Jerzy; Bilewicz, Renata

2014-03-01

Single-walled carbon nanotubes (SWCNTs) covalently biphenylated are used for the construction of cathodes in a flow biobattery and in flow biofuel cell. Zinc covered with a hopeite layer is the anode in the biobattery and glassy carbon electrode covered with bioconjugates of single-walled carbon nanotubes with glucose oxidase and catalase is the anode of the biofuel cell. The potentials of the electrodes are measured vs. the Ag/AgCl reference electrode under changing loads of the fuel cell/biobattery. The power density of the biobattery with biphenylated nanotubes at the cathode is ca. 0.6 mW cm-2 and the open circuit potential is ca. 1.6 V. In order to obtain larger power densities and voltages three biobatteries are connected in a series which leads to the open circuit potential of ca. 4.8 V and power density 2.1 mW cm-2 at 3.9 V under 100 kΩ load. The biofuel cell shows power densities of ca. 60 μW cm-2 at 20 kΩ external resistance but the open circuit potential for such biofuel cell is only 0.5 V. The biobattery showing significantly larger power densities and open circuit voltages are especially useful for testing novel cathodes and applications such as powering units for clocks and sensing devices.

Twin-bit via resistive random access memory in 16 nm FinFET logic technologies

NASA Astrophysics Data System (ADS)

Shih, Yi-Hong; Hsu, Meng-Yin; King, Ya-Chin; Lin, Chrong Jung

2018-04-01

A via resistive random access memory (RRAM) cell fully compatible with the standard CMOS logic process has been successfully demonstrated for high-density logic nonvolatile memory (NVM) modules in advanced FinFET circuits. In this new cell, the transition metal layers are formed on both sides of a via, given two storage bits per via. In addition to its compact cell area (1T + 14 nm × 32 nm), the twin-bit via RRAM cell features a low operation voltage, a large read window, good data retention, and excellent cycling capability. As fine alignments between mask layers become possible, the twin-bit via RRAM cell is expected to be highly scalable in advanced FinFET technology.

Expediting analog design retargeting by design knowledge re-use and circuit synthesis: a practical example on a Delta-Sigma modulator

NASA Astrophysics Data System (ADS)

Webb, Matthew; Tang, Hua

2016-08-01

In the past decade or two, due to constant and rapid technology changes, analog design re-use or design retargeting to newer technologies has been brought to the table in order to expedite the design process and improve time-to-market. If properly conducted, analog design retargeting could significantly cut down design cycle compared to designs starting from the scratch. In this article, we present an empirical and general method for efficient analog design retargeting by design knowledge re-use and circuit synthesis (CS). The method first identifies circuit blocks that compose the source system and extracts the performance parameter specifications of each circuit block. Then, for each circuit block, it scales the values of design variables (DV) from the source design to derive an initial design in the target technology. Depending on the performance of this initial target design, a design space is defined for synthesis. Subsequently, each circuit block is automatically synthesised using state-of-art analog synthesis tools based on a combination of global and local optimisation techniques to achieve comparable performance specifications to those extracted from the source system. Finally, the overall system is composed of those synthesised circuit blocks in the target technology. We illustrate the method using a practical example of a complex Delta-Sigma modulator (DSM) circuit.

Commercially developed mixed-signal CMOS process features for application in advanced ROICs in 0.18μm technology node

NASA Astrophysics Data System (ADS)

Kar-Roy, Arjun; Hurwitz, Paul; Mann, Richard; Qamar, Yasir; Chaudhry, Samir; Zwingman, Robert; Howard, David; Racanelli, Marco

2012-06-01

Increasingly complex specifications for next-generation focal plane arrays (FPAs) require smaller pixels, larger array sizes, reduced power consumption and lower cost. We have previously reported on the favorable features available in the commercially available TowerJazz CA18 0.18μm mixed-signal CMOS technology platform for advanced read-out integrated circuit (ROIC) applications. In his paper, new devices in development for commercial purposes and which may have applications in advanced ROICs are reported. First, results of buried-channel 3.3V field effect transistors (FETs) are detailed. The buried-channel pFETs show flicker (1/f) noise reductions of ~5X in comparison to surface-channel pFETs along with a significant reduction of the body constant parameter. The buried-channel nFETs show ~2X reduction of 1/f noise versus surface-channel nFETs. Additional reduced threshold voltage nFETs and pFETs are also described. Second, a high-density capacitor solution with a four-stacked linear (metal-insulator-metal) MIM capacitor having capacitance density of 8fF/μm2 is reported. Additional stacking with MOS capacitor in a 5V tolerant process results in >50fC/μm2 charge density. Finally, one-time programmable (OTP) and multi-time programmable (MTP) non-volatile memory options in the CA18 technology platform are outlined.

Producibility of Vertically Integrated Photodiode (VIP)tm scanning focal plane arrays

NASA Astrophysics Data System (ADS)

Turner, Arthur M.; Teherani, Towfik; Ehmke, John C.; Pettitt, Cindy; Conlon, Peggy; Beck, Jeffrey D.; McCormack, Kent; Colombo, Luigi; Lahutsky, Tom; Murphy, Terry; Williams, Robert L.

1994-07-01

Vertically integrated photodiode, VIPTM, technology is now being used to produce second generation infrared focal plane arrays with high yields and performance. The VIPTM process employs planar, ion implanted, n on p diodes in HgCdTe which is epoxy hybridized directly to the read out integrated circuits on 100 mm Si wafers. The process parameters that are critical for high performance and yield include: HgCdTe dislocation density and thickness, backside passivation, frontside passivation, and junction formation. Producibility of infrared focal plane arrays (IRFPAs) is also significantly enhanced by read out integrated circuits (ROICs) which have the ability to deselect defective pixels. Cold probe screening before lab dewar assembly reduces costs and improves cycle times. The 240 X 1 and 240 X 2 scanning array formats are used to demonstrate the effect of process optimization, deselect, and cold probe screening on yield and cycle time. The versatility of the VIPTM technology and its extension to large area arrays is demonstrated using 240/288 X 4 and 480 X 5 TDI formats. Finally, the high performance of VIPTM IRFPAs is demonstrated by comparing data from a 480 X 5 to the SADA-II specification.

Nanowire surface fastener fabrication on flexible substrate.

PubMed

Toku, Yuhki; Uchida, Keita; Morita, Yasuyuki; Ju, Yang

2018-07-27

The market for wearable devices has increased considerably in recent years. In response to this demand, flexible electronic circuit technology has become more important. The conventional bonding technology in electronic assembly depends on high-temperature processes such as reflow soldering, which result in undesired thermal damages and residual stress at a bonding interface. In addition, it exhibits poor compatibility with bendable or stretchable device applications. Therefore, there is an urgent requirement to attach electronic parts on printed circuit boards with good mechanical and electrical properties at room temperature. Nanowire surface fasteners (NSFs) are candidates for resolving these problems. This paper describes the fabrication of an NSF on a flexible substrate, which can be used for room temperature conductive bonding. The template method is used for preparing high-density nanowire arrays. A Cu thin film is layered on the template as the flexible substrate. After etching the template, a Cu NSF is obtained on the Cu film substrate. In addition, the electrical and mechanical properties of the Cu NSF are studied under various fabrication conditions. The Cu NSF exhibits high shear adhesion strength (∼234 N cm -2 ) and low contact resistivity (2.2 × 10 -4 Ω cm 2 ).

Nanowire surface fastener fabrication on flexible substrate

NASA Astrophysics Data System (ADS)

Toku, Yuhki; Uchida, Keita; Morita, Yasuyuki; Ju, Yang

2018-07-01

The market for wearable devices has increased considerably in recent years. In response to this demand, flexible electronic circuit technology has become more important. The conventional bonding technology in electronic assembly depends on high-temperature processes such as reflow soldering, which result in undesired thermal damages and residual stress at a bonding interface. In addition, it exhibits poor compatibility with bendable or stretchable device applications. Therefore, there is an urgent requirement to attach electronic parts on printed circuit boards with good mechanical and electrical properties at room temperature. Nanowire surface fasteners (NSFs) are candidates for resolving these problems. This paper describes the fabrication of an NSF on a flexible substrate, which can be used for room temperature conductive bonding. The template method is used for preparing high-density nanowire arrays. A Cu thin film is layered on the template as the flexible substrate. After etching the template, a Cu NSF is obtained on the Cu film substrate. In addition, the electrical and mechanical properties of the Cu NSF are studied under various fabrication conditions. The Cu NSF exhibits high shear adhesion strength (∼234 N cm‑2) and low contact resistivity (2.2 × 10‑4 Ω cm2).

Porous Diblock Copolymer Thin Films in High-Performance Semiconductor Microelectronics

DOE Office of Scientific and Technical Information (OSTI.GOV)

Black, C.T.

2011-02-01

The engine fueling more than 40 years of performance improvements in semiconductor integrated circuits (ICs) has been industry's ability to pattern circuit elements at ever-higher resolution and with ever-greater precision. Steady advances in photolithography - the process wherein ultraviolet light chemically changes a photosensitive polymer resist material in order to create a latent image - have resulted in scaling of minimum printed feature sizes from tens of microns during the 1980s to sub-50 nanometer transistor gate lengths in today's state-of-the-art ICs. The history of semiconductor technology scaling as well as future technology requirements is documented in the International Technology Roadmapmore » for Semiconductors (ITRS). The progression of the semiconductor industry to the realm of nanometer-scale sizes has brought enormous challenges to device and circuit fabrication, rendering performance improvements by conventional scaling alone increasingly difficult. Most often this discussion is couched in terms of field effect transistor (FET) feature sizes such as the gate length or gate oxide thickness, however these challenges extend to many other aspects of the IC, including interconnect dimensions and pitch, device packing density, power consumption, and heat dissipation. The ITRS Technology Roadmap forecasts a difficult set of scientific and engineering challenges with no presently-known solutions. The primary focus of this chapter is the research performed at IBM on diblock copolymer films composed of polystyrene (PS) and poly(methyl-methacrylate) (PMMA) (PS-b-PMMA) with total molecular weights M{sub n} in the range of {approx}60K (g/mol) and polydispersities (PD) of {approx}1.1. These materials self assemble to form patterns having feature sizes in the range of 15-20nm. PS-b-PMMA was selected as a self-assembling patterning material due to its compatibility with the semiconductor microelectronics manufacturing infrastructure, as well as the significant body of existing research on understanding its material properties.« less

CMOS-based optical energy harvesting circuit for biomedical and Internet of Things devices

NASA Astrophysics Data System (ADS)

Nattakarn, Wuthibenjaphonchai; Ishizu, Takaaki; Haruta, Makito; Noda, Toshihiko; Sasagawa, Kiyotaka; Tokuda, Takashi; Sawan, Mohamad; Ohta, Jun

2018-04-01

In this work, we present a novel CMOS-based optical energy harvesting technology for implantable and Internet of Things (IoT) devices. In the proposed system, a CMOS energy-harvesting circuit accumulates a small amount of photoelectrically converted energy in an external capacitor, and intermittently supplies this power to a target device. Two optical energy-harvesting circuit types were implemented and evaluated. Furthermore, we developed a photoelectrically powered optical identification (ID) circuit that is suitable for IoT technology applications.

DOE Office of Scientific and Technical Information (OSTI.GOV)

Fertig, Fabian, E-mail: fabian.fertig@ise.fraunhofer.de; Greulich, Johannes; Rein, Stefan

Spatially resolved determination of solar cell parameters is beneficial for loss analysis and optimization of conversion efficiency. One key parameter that has been challenging to access by an imaging technique on solar cell level is short-circuit current density. This work discusses the robustness of a recently suggested approach to determine short-circuit current density spatially resolved based on a series of lock-in thermography images and options for a simplified image acquisition procedure. For an accurate result, one or two emissivity-corrected illuminated lock-in thermography images and one dark lock-in thermography image have to be recorded. The dark lock-in thermography image can bemore » omitted if local shunts are negligible. Furthermore, it is shown that omitting the correction of lock-in thermography images for local emissivity variations only leads to minor distortions for standard silicon solar cells. Hence, adequate acquisition of one image only is sufficient to generate a meaningful map of short-circuit current density. Beyond that, this work illustrates the underlying physics of the recently proposed method and demonstrates its robustness concerning varying excitation conditions and locally increased series resistance. Experimentally gained short-circuit current density images are validated for monochromatic illumination in comparison to the reference method of light-beam induced current.« less

Photonic technology revolution influence on the defence area

NASA Astrophysics Data System (ADS)

Galas, Jacek; Litwin, Dariusz; Błocki, Narcyz; Daszkiewicz, Marek

2017-10-01

Revolutionary progress in the photonic technology provides the ability to develop military systems of new properties not possible to obtain with the use of classical technologies. In recent years, this progress has resulted in developing advanced, complex, multifunctional and relatively cheap Photonic Integrated Circuits (PIC) or Hybrid Photonics Circuits (HPC) built of a collection of standardized optical, optoelectronic and photonic components. This idea is similar to the technology of Electronic Integrated Circuits, which has revolutionized the microelectronic market. The novel approach to photonic technology is now revolutionizing the photonics' market. It simplifies the photonics technology and enables creation of technological centers for designing, development and production of advanced optical and photonic systems in the EU and other countries. This paper presents some selected photonic technologies and their impact on such defense systems like radars, radiolocation, telecommunication, and radio-communication systems.

Reproducible Operating Margins on a 72800-Device Digital Superconducting Chip (Open Access)

DTIC Science & Technology

2015-10-28

superconductor digital logic. Keywords: flux trapping, yield, digital Superconductor digital technology offers fundamental advantages over conventional...trapping in the superconductor films can degrade or preclude correct circuit operation. Scaling superconductor technology is now possible due to recent...advances in circuit design embodied in reciprocal quantum logic (RQL) [2, 3] and recent advances in superconductor integrated circuit fabrication, which

Selective Processing Techniques for Electronics and Opto-Electronic Applications: Quantum-Well Devices and Integrated Optic Circuits

DTIC Science & Technology

1993-02-10

new technology is to have sufficient control of processing to *- describable by an appropriate elecromagnetic model . build useful devices. For example...3. W aveguide Modulators .................................. 7 B. Integrated Optical Device and Circuit Modeling ... ................... .. 10 C...following categories: A. Integrated Optical Devices and Technology B. Integrated Optical Device and Circuit Modeling C. Cryogenic Etching for Low

Design of a digital multiradian phase detector and its application in fusion plasma interferometry.

PubMed

Mlynek, A; Schramm, G; Eixenberger, H; Sips, G; McCormick, K; Zilker, M; Behler, K; Eheberg, J

2010-03-01

We discuss the circuit design of a digital multiradian phase detector that measures the phase difference between two 10 kHz square wave TTL signals and provides the result as a binary number. The phase resolution of the circuit is 1/64 period and its dynamic range is 256 periods. This circuit has been developed for fusion plasma interferometry with submillimeter waves on the ASDEX Upgrade tokamak. The results from interferometric density measurement are discussed and compared to those obtained with the previously used phase detectors, especially with respect to the occurrence of phase jumps. It is illustrated that the new phase measurement provides a powerful tool for automatic real-time validation of the measured density, which is important for feedback algorithms that are sensitive to spurious density signals.

Recycle technology for recovering resources and products from waste printed circuit boards.

PubMed

Li, Jia; Lu, Hongzhou; Guo, Jie; Xu, Zhenming; Zhou, Yaohe

2007-03-15

The printed circuit board (PCB) contains nearly 28% metals that are abundant non-ferrous metals such as Cu, Al, Sn, etc. The purity of precious metals in PCBs is more than 10 times higher than that of rich-content minerals. Therefore, recycling of PCBs is an important subject not only from the treatment of waste but also from the recovery of valuable materials. Chemical and mechanical methods are two traditional recycling processes for waste PCBs. However, the prospect of chemical methods will be limited since the emission of toxic liquid or gas brings secondary pollution to the environment during the process. Mechanical processes, such as shape separation, jigging, density-based separation, and electrostatic separation have been widely utilized in the recycling industry. But, recycling of waste PCBs is only beginning. In this study, a total of 400 kg of waste PCBs was processed by a recycle technology without negative impact to the environment. The technology contained mechanical two-step crushing, corona electrostatic separating, and recovery. The results indicated that (i) two-step crushing was an effect process to strip metals from base plates completely; (ii) the size of particles between 0.6 and 1.2 mm was suitable for corona electrostatic separating during industrial application; and (iii) the nonmetal of waste PCBs attained 80% weight of a kind of nonmetallic plate that expanded the applying prospect of waste nonmetallic materials.

Controlled conjugated backbone twisting for an increased open-circuit voltage while having a high short-circuit current in poly(hexylthiophene) derivatives.

PubMed

Ko, Sangwon; Hoke, Eric T; Pandey, Laxman; Hong, Sanghyun; Mondal, Rajib; Risko, Chad; Yi, Yuanping; Noriega, Rodrigo; McGehee, Michael D; Brédas, Jean-Luc; Salleo, Alberto; Bao, Zhenan

2012-03-21

Conjugated polymers with nearly planar backbones have been the most commonly investigated materials for organic-based electronic devices. More twisted polymer backbones have been shown to achieve larger open-circuit voltages in solar cells, though with decreased short-circuit current densities. We systematically impose twists within a family of poly(hexylthiophene)s and examine their influence on the performance of polymer:fullerene bulk heterojunction (BHJ) solar cells. A simple chemical modification concerning the number and placement of alkyl side chains along the conjugated backbone is used to control the degree of backbone twisting. Density functional theory calculations were carried out on a series of oligothiophene structures to provide insights on how the sterically induced twisting influences the geometric, electronic, and optical properties. Grazing incidence X-ray scattering measurements were performed to investigate how the thin-film packing structure was affected. The open-circuit voltage and charge-transfer state energy of the polymer:fullerene BHJ solar cells increased substantially with the degree of twist induced within the conjugated backbone--due to an increase in the polymer ionization potential--while the short-circuit current decreased as a result of a larger optical gap and lower hole mobility. A controlled, moderate degree of twist along the poly(3,4-dihexyl-2,2':5',2''-terthiophene) (PDHTT) conjugated backbone led to a 19% enhancement in the open-circuit voltage (0.735 V) vs poly(3-hexylthiophene)-based devices, while similar short-circuit current densities, fill factors, and hole-carrier mobilities were maintained. These factors resulted in a power conversion efficiency of 4.2% for a PDHTT:[6,6]-phenyl-C(71)-butyric acid methyl ester (PC(71)BM) blend solar cell without thermal annealing. This simple approach reveals a molecular design avenue to increase open-circuit voltage while retaining the short-circuit current.

Fabrication of multijunction high voltage concentrator solar cells by integrated circuit technology

NASA Technical Reports Server (NTRS)

Valco, G. J.; Kapoor, V. J.; Evans, J. C., Jr.; Chai, A.-T.

1981-01-01

Standard integrated circuit technology has been developed for the design and fabrication of planar multijunction (PMJ) solar cell chips. Each 1 cm x 1 cm solar chip consisted of six n(+)/p, back contacted, internally series interconnected unit cells. These high open circuit voltage solar cells were fabricated on 2 ohm-cm, p-type 75 microns thick, silicon substrates. A five photomask level process employing contact photolithography was used to pattern for boron diffusions, phorphorus diffusions, and contact metallization. Fabricated devices demonstrated an open circuit voltage of 3.6 volts and a short circuit current of 90 mA at 80 AMl suns. An equivalent circuit model of the planar multi-junction solar cell was developed.

Simulation of a spiking neuron circuit using carbon nanotube transistors

DOE Office of Scientific and Technical Information (OSTI.GOV)

Najari, Montassar, E-mail: malnjar@jazanu.edu.sa; IKCE unit, Jazan University, Jazan; El-Grour, Tarek, E-mail: grour-tarek@hotmail.fr

2016-06-10

Neuromorphic engineering is related to the existing analogies between the physical semiconductor VLSI (Very Large Scale Integration) and biophysics. Neuromorphic systems propose to reproduce the structure and function of biological neural systems for transferring their calculation capacity on silicon. Since the innovative research of Carver Mead, the neuromorphic engineering continues to emerge remarkable implementation of biological system. This work presents a simulation of an elementary neuron cell with a carbon nanotube transistor (CNTFET) based technology. The model of the cell neuron which was simulated is called integrate and fire (I&F) model firstly introduced by G. Indiveri in 2009. This circuitmore » has been simulated with CNTFET technology using ADS environment to verify the neuromorphic activities in terms of membrane potential. This work has demonstrated the efficiency of this emergent device; i.e CNTFET on the design of such architecture in terms of power consumption and technology integration density.« less

LEC GaAs for integrated circuit applications

NASA Technical Reports Server (NTRS)

Kirkpatrick, C. G.; Chen, R. T.; Homes, D. E.; Asbeck, P. M.; Elliott, K. R.; Fairman, R. D.; Oliver, J. D.

1984-01-01

Recent developments in liquid encapsulated Czochralski techniques for the growth of semiinsulating GaAs for integrated circuit applications have resulted in significant improvements in the quality and quantity of GaAs material suitable for device processing. The emergence of high performance GaAs integrated circuit technologies has accelerated the demand for high quality, large diameter semiinsulating GaAs substrates. The new device technologies, including digital integrated circuits, monolithic microwave integrated circuits and charge coupled devices have largely adopted direct ion implantation for the formation of doped layers. Ion implantation lends itself to good uniformity and reproducibility, high yield and low cost; however, this technique also places stringent demands on the quality of the semiinsulating GaAs substrates. Although significant progress was made in developing a viable planar ion implantation technology, the variability and poor quality of GaAs substrates have hindered progress in process development.

Designing Nanoscale Counter Using Reversible Gate Based on Quantum-Dot Cellular Automata

NASA Astrophysics Data System (ADS)

Moharrami, Elham; Navimipour, Nima Jafari

2018-04-01

Some new technologies such as Quantum-dot Cellular Automata (QCA) is suggested to solve the physical limits of the Complementary Metal-Oxide Semiconductor (CMOS) technology. The QCA as one of the novel technologies at nanoscale has potential applications in future computers. This technology has some advantages such as minimal size, high speed, low latency, and low power consumption. As a result, it is used for creating all varieties of memory. Counter circuits as one of the important circuits in the digital systems are composed of some latches, which are connected to each other in series and actually they count input pulses in the circuit. On the other hand, the reversible computations are very important because of their ability in reducing energy in nanometer circuits. Improving the energy efficiency, increasing the speed of nanometer circuits, increasing the portability of system, making smaller components of the circuit in a nuclear size and reducing the power consumption are considered as the usage of reversible logic. Therefore, this paper aims to design a two-bit reversible counter that is optimized on the basis of QCA using an improved reversible gate. The proposed reversible structure of 2-bit counter can be increased to 3-bit, 4-bit and more. The advantages of the proposed design have been shown using QCADesigner in terms of the delay in comparison with previous circuits.

Carbon Based Transistors and Nanoelectronic Devices

NASA Astrophysics Data System (ADS)

Rouhi, Nima

Carbon based materials (carbon nanotube and graphene) has been extensively researched during the past decade as one of the promising materials to be used in high performance device technology. In long term it is thought that they may replace digital and/or analog electronic devices, due to their size, near-ballistic transport, and high stability. However, a more realistic point of insertion into market may be the printed nanoelectronic circuits and sensors. These applications include printed circuits for flexible electronics and displays, large-scale bendable electrical contacts, bio-membranes and bio sensors, RFID tags, etc. In order to obtain high performance thin film transistors (as the basic building block of electronic circuits) one should be able to manufacture dense arrays of all semiconducting nanotubes. Besides, graphene synthesize and transfer technology is in its infancy and there is plenty of room to improve the current techniques. To realize the performance of nanotube and graphene films in such systems, we need to economically fabricate large-scale devices based on these materials. Following that the performance control over such devices should also be considered for future design variations for broad range of applications. Here we have first investigated carbon nanotube ink as the base material for our devices. The primary ink used consisted of both metallic and semiconducting nanotubes which resulted in networks suitable for moderate-resistivity electrical connections (such as interconnects) and rfmatching circuits. Next, purified all-semiconducting nanotube ink was used to fabricate waferscale, high performance (high mobility, and high on/off ratio) thin film transistors for printed electronic applications. The parameters affecting device performance were studied in detail to establish a roadmap for the future of purified nanotube ink printed thin film transistors. The trade of between mobility and on/off ratio of such devices was studied and the effect of nanotube network density was explained in detail. On the other hand, graphene transfer technology was explored here as well. Annealing techniques were utilized to deposit clean graphene on arbitrary substrates. Raman spectroscopy and Raman data analysis was used to confirm the clean process. Furthermore, suspended graphene membrane was fabricated using single and multi-layer graphene films. This can make a major impact on graphene based transistors and bio-nano sensors technology.

Benzothiadiazole-based polymer for single and double junction solar cells with high open circuit voltage.

PubMed

Venkatesan, Swaminathan; Ngo, Evan C; Chen, Qiliang; Dubey, Ashish; Mohammad, Lal; Adhikari, Nirmal; Mitul, Abu Farzan; Qiao, Qiquan

2014-06-21

Single and double junction solar cells with high open circuit voltage were fabricated using poly{thiophene-2,5-diyl-alt-[5,6-bis(dodecyloxy)benzo[c][1,2,5]thiadiazole]-4,7-diyl} (PBT-T1) blended with fullerene derivatives in different weight ratios. The role of fullerene loading on structural and morphological changes was investigated using atomic force microscopy (AFM) and X-ray diffraction (XRD). The XRD and AFM measurements showed that a higher fullerene mixing ratio led to breaking of inter-chain packing and hence resulted in smaller disordered polymer domains. When the PBT-T1:PC60BM weight ratio was 1 : 1, the polymer retained its structural order; however, large aggregated domains formed, leading to poor device performance due to low fill factor and short circuit current density. When the ratio was increased to 1 : 2 and then 1 : 3, smaller amorphous domains were observed, which improved photovoltaic performance. The 1 : 2 blending ratio was optimal due to adequate charge transport pathways giving rise to moderate short circuit current density and fill factor. Adding 1,8-diiodooctane (DIO) additive into the 1 : 2 blend films further improved both the short circuit current density and fill factor, leading to an increased efficiency to 4.5% with PC60BM and 5.65% with PC70BM. These single junction solar cells exhibited a high open circuit voltage at ∼ 0.9 V. Photo-charge extraction by linearly increasing voltage (Photo-CELIV) measurements showed the highest charge carrier mobility in the 1 : 2 film among the three ratios, which was further enhanced by introducing the DIO. The Photo-CELIV measurements with varying delay times showed significantly higher extracted charge carrier density for cells processed with DIO. Tandem devices using P3HT:IC60BA as bottom cell and PBT-T1:PC60BM as top cell exhibited a high open circuit voltage of 1.62 V with 5.2% power conversion efficiency.

The Need for Optical Means as an Alternative for Electronic Computing

NASA Technical Reports Server (NTRS)

Adbeldayem, Hossin; Frazier, Donald; Witherow, William; Paley, Steve; Penn, Benjamin; Bank, Curtis; Whitaker, Ann F. (Technical Monitor)

2001-01-01

An increasing demand for faster computers is rapidly growing to encounter the fast growing rate of Internet, space communication, and robotic industry. Unfortunately, the Very Large Scale Integration technology is approaching its fundamental limits beyond which the device will be unreliable. Optical interconnections and optical integrated circuits are strongly believed to provide the way out of the extreme limitations imposed on the growth of speed and complexity of nowadays computations by conventional electronics. This paper demonstrates two ultra-fast, all-optical logic gates and a high-density storage medium, which are essential components in building the future optical computer.

A 16K-bit static IIL RAM with 25-ns access time

NASA Astrophysics Data System (ADS)

Inabe, Y.; Hayashi, T.; Kawarada, K.; Miwa, H.; Ogiue, K.

1982-04-01

A 16,384 x 1-bit RAM with 25-ns access time, 600-mW power dissipation, and 33 sq mm chip size has been developed. Excellent speed-power performance with high packing density has been achieved by an oxide isolation technology in conjunction with novel ECL circuit techniques and IIL flip-flop memory cells, 980 sq microns (35 x 28 microns) in cell size. Development results have shown that IIL flip-flop memory cell is a trump card for assuring achievement of a high-performance large-capacity bipolar RAM, in the above 16K-bit/chip area.

Computer programs: Electronic circuit design criteria: A compilation

NASA Technical Reports Server (NTRS)

1973-01-01

A Technology Utilization Program for the dissemination of information on technological developments which have potential utility outside the aerospace community is presented. The 21 items reported herein describe programs that are applicable to electronic circuit design procedures.

Physically separating printed circuit boards with a resilient, conductive contact

NASA Technical Reports Server (NTRS)

Baker, John D. (Inventor); Montalvo, Alberto (Inventor)

1999-01-01

A multi-board module provides high density electronic packaging in which multiple printed circuit boards are stacked. Electrical power, or signals, are conducted between the boards through a resilient contact. One end of the contact is located at a via in the lower circuit board and soldered to a pad near the via. The top surface of the contact rests against a via of the facing printed circuit board.

Efficient electricity production and simultaneously wastewater treatment via a high-performance photocatalytic fuel cell.

PubMed

Liu, Yanbiao; Li, Jinhua; Zhou, Baoxue; Li, Xuejin; Chen, Hongchong; Chen, Quanpeng; Wang, Zhongsheng; Li, Lei; Wang, Jiulin; Cai, Weimin

2011-07-01

A great quantity of wastewater were discharged into water body, causing serious environmental pollution. Meanwhile, the organic compounds in wastewater are important sources of energy. In this work, a high-performance short TiO(2) nanotube array (STNA) electrode was applied as photoanode material in a novel photocatalytic fuel cell (PFC) system for electricity production and simultaneously wastewater treatment. The results of current work demonstrate that various model compounds as well as real wastewater samples can be used as substrates for the PFC system. As a representative of model compounds, the acetic acid solution produces the highest cell performance with short-circuit current density 1.42 mA cm(-2), open-circuit voltage 1.48 V and maximum power density output 0.67 mW cm(-2). The STNA photoanode reveals obviously enhanced cell performance compared with TiO(2) nanoparticulate film electrode or other long nanotubes electrode. Moreover, the photoanode material, electrolyte concentration, pH of the initial solution, and cathode material were found to be important factors influencing the system performance of PFC. Therefore, the proposed fuel cell system provides a novel way of energy conversion and effective disposal mode of organics and serves well as a promising technology for wastewater treatment. Copyright © 2011 Elsevier Ltd. All rights reserved.

Diagnostic of capacitively coupled radio frequency plasma from electrical discharge characteristics: comparison with optical emission spectroscopy and fluid model simulation

NASA Astrophysics Data System (ADS)

Xiang, HE; Chong, LIU; Yachun, ZHANG; Jianping, CHEN; Yudong, CHEN; Xiaojun, ZENG; Bingyan, CHEN; Jiaxin, PANG; Yibing, WANG

2018-02-01

The capacitively coupled radio frequency (CCRF) plasma has been widely used in various fields. In some cases, it requires us to estimate the range of key plasma parameters simpler and quicker in order to understand the behavior in plasma. In this paper, a glass vacuum chamber and a pair of plate electrodes were designed and fabricated, using 13.56 MHz radio frequency (RF) discharge technology to ionize the working gas of Ar. This discharge was mathematically described with equivalent circuit model. The discharge voltage and current of the plasma were measured at different pressures and different powers. Based on the capacitively coupled homogeneous discharge model, the equivalent circuit and the analytical formula were established. The plasma density and temperature were calculated by using the equivalent impedance principle and energy balance equation. The experimental results show that when RF discharge power is 50-300 W and pressure is 25-250 Pa, the average electron temperature is about 1.7-2.1 eV and the average electron density is about 0.5 × 1017-3.6 × 1017 m-3. Agreement was found when the results were compared to those given by optical emission spectroscopy and COMSOL simulation.

Novel Three-Dimensional Vertical Interconnect Technology for Microwave and RF Applications

NASA Technical Reports Server (NTRS)

Goverdhanam, Kavita; Simons, Rainee N.; Katehi, Linda P. B.

1999-01-01

In this paper, novel 3D interconnects suitable for applications in microwave and RF integrated circuit technology have been presented. The interconnect fabrication process and design details are presented. In addition, measured and numerically modeled results of the performance of the interconnects have been shown. The results indicate that the proposed technology has tremendous potential applications in integrated circuit technology. C,

Evaluating waste printed circuit boards recycling: Opportunities and challenges, a mini review.

PubMed

Awasthi, Abhishek Kumar; Zlamparet, Gabriel Ionut; Zeng, Xianlai; Li, Jinhui

2017-04-01

Rapid generation of waste printed circuit boards has become a very serious issue worldwide. Numerous techniques have been developed in the last decade to resolve the pollution from waste printed circuit boards, and also recover valuable metals from the waste printed circuit boards stream on a large-scale. However, these techniques have their own certain specific drawbacks that need to be rectified properly. In this review article, these recycling technologies are evaluated based on a strength, weaknesses, opportunities and threats analysis. Furthermore, it is warranted that, the substantial research is required to improve the current technologies for waste printed circuit boards recycling in the outlook of large-scale applications.

Low-Cost HTS Based Magnet System with an Inductively Coupled Pulsed Energy Extraction Protection System

DOE Office of Scientific and Technical Information (OSTI.GOV)

Agustsson, Ronald

In this project, RadiaBeam Technologies was tasked with developing a novel solution for a cost effective quench protection based on fast expansion of the normal zone. By inductively coupling a strong electromagnetic pulse via a resonant LC circuit, we attempted to demonstrate accelerated normal zone propagation. The AC field induces currents in the superconducting layer with the current density exceeding that of the critical current density, J c. This creates a large normal zone, uniformly distributing the dissipation through the magnet body. The method does not rely on thermal heating of the conductor, thus enabling nearly instantaneous protection. Through themore » course of the Phase II project, RadiaBeam Technologies continued extensive numerical modeling of the inductive quench system, re-designed and built several iterations of the POC system for testing and observed evidence of a transient partial quench being induced. However the final device was not fabricated. This was a consequence of the fundamentally complex nature of the energy extraction process and the challenges associated even with demonstrating the proof of concept in a bench top device.« less

A review of emerging non-volatile memory (NVM) technologies and applications

NASA Astrophysics Data System (ADS)

Chen, An

2016-11-01

This paper will review emerging non-volatile memory (NVM) technologies, with the focus on phase change memory (PCM), spin-transfer-torque random-access-memory (STTRAM), resistive random-access-memory (RRAM), and ferroelectric field-effect-transistor (FeFET) memory. These promising NVM devices are evaluated in terms of their advantages, challenges, and applications. Their performance is compared based on reported parameters of major industrial test chips. Memory selector devices and cell structures are discussed. Changing market trends toward low power (e.g., mobile, IoT) and data-centric applications create opportunities for emerging NVMs. High-performance and low-cost emerging NVMs may simplify memory hierarchy, introduce non-volatility in logic gates and circuits, reduce system power, and enable novel architectures. Storage-class memory (SCM) based on high-density NVMs could fill the performance and density gap between memory and storage. Some unique characteristics of emerging NVMs can be utilized for novel applications beyond the memory space, e.g., neuromorphic computing, hardware security, etc. In the beyond-CMOS era, emerging NVMs have the potential to fulfill more important functions and enable more efficient, intelligent, and secure computing systems.

Packaging Of Control Circuits In A Robot Arm

NASA Technical Reports Server (NTRS)

Kast, William

1994-01-01

Packaging system houses and connects control circuitry mounted on circuit boards within shoulder, upper section, and lower section of seven-degree-of-freedom robot arm. Has modular design that incorporates surface-mount technology, multilayer circuit boards, large-scale integrated circuits, and multi-layer flat cables between sections for compactness. Three sections of robot arm contain circuit modules in form of stardardized circuit boards. Each module contains two printed-circuit cards, one of each face.

High density printed electrical circuit board card connection system

DOEpatents

Baumbaugh, Alan E.

1997-01-01

A zero insertion/extraction force printed circuit board card connection system comprises a cam-operated locking mechanism disposed along an edge portion of the printed circuit board. The extrusions along the circuit board mate with an extrusion fixed to the card cage having a plurality of electrical connectors. The card connection system allows the connectors to be held away from the circuit board during insertion/extraction and provides a constant mating force once the circuit board is positioned. The card connection system provides a simple solution to the need for a greater number of electrical signal connections.

A readout integrated circuit based on DBI-CTIA and cyclic ADC for MEMS-array-based focal plane

NASA Astrophysics Data System (ADS)

Miao, Liu; Dong, Wu; Zheyao, Wang

2016-11-01

A readout integrated circuit (ROIC) for a MEMS (microelectromechanical system)-array-based focal plane (MAFP) intended for imaging applications is presented. The ROIC incorporates current sources for diode detectors, scanners, timing sequence controllers, differential buffered injection-capacitive trans-impedance amplifier (DBI-CTIA) and 10-bit cyclic ADCs, and is integrated with MAFP using 3-D integration technology. A small-signal equivalent model is built to include thermal detectors into circuit simulations. The biasing current is optimized in terms of signal-to-noise ratio and power consumption. Layout design is tailored to fulfill the requirements of 3-D integration and to adapt to the size of MAFP elements, with not all but only the 2 bottom metal layers to complete nearly all the interconnections in DBI-CTIA and ADC in a 40 μm wide column. Experimental chips are designed and fabricated in a 0.35 μm CMOS mixed signal process, and verified in a code density test of which the results indicate a (0.29/-0.31) LSB differential nonlinearity (DNL) and a (0.61/-0.45) LSB integral nonlinearity (INL). Spectrum analysis shows that the effective number of bits (ENOB) is 9.09. The ROIC consumes 248 mW of power at most if not to cut off quiescent current paths when not needed. Project supported by by National Natural Science Foundation of China (No. 61271130), the Beijing Municipal Science and Tech Project (No. D13110100290000), the Tsinghua University Initiative Scientific Research Program (No. 20131089225), and the Shenzhen Science and Technology Development Fund (No. CXZZ20130322170740736).

Electronic circuits: A compilation. [for electronic equipment in telecommunication

NASA Technical Reports Server (NTRS)

1976-01-01

A compilation containing articles on newly developed electronic circuits and systems is presented. It is divided into two sections: (1) section 1 on circuits and techniques of particular interest in communications technology, and (2) section 2 on circuits designed for a variety of specific applications. The latest patent information available is also given. Circuit diagrams are shown.

Si photonics technology for future optical interconnection

NASA Astrophysics Data System (ADS)

Zheng, Xuezhe; Krishnamoorthy, Ashok V.

2011-12-01

Scaling of computing systems require ultra-efficient interconnects with large bandwidth density. Silicon photonics offers a disruptive solution with advantages in reach, energy efficiency and bandwidth density. We review our progress in developing building blocks for ultra-efficient WDM silicon photonic links. Employing microsolder based hybrid integration with low parasitics and high density, we optimize photonic devices on SOI platforms and VLSI circuits on more advanced bulk CMOS technology nodes independently. Progressively, we successfully demonstrated single channel hybrid silicon photonic transceivers at 5 Gbps and 10 Gbps, and 80 Gbps arrayed WDM silicon photonic transceiver using reverse biased depletion ring modulators and Ge waveguide photo detectors. Record-high energy efficiency of less than 100fJ/bit and 385 fJ/bit were achieved for the hybrid integrated transmitter and receiver, respectively. Waveguide grating based optical proximity couplers were developed with low loss and large optical bandwidth to enable multi-layer intra/inter-chip optical interconnects. Thermal engineering of WDM devices by selective substrate removal, together with WDM link using synthetic wavelength comb, we significantly improved the device tuning efficiency and reduced the tuning range. Using these innovative techniques, two orders of magnitude tuning power reduction was achieved. And tuning cost of only a few 10s of fJ/bit is expected for high data rate WDM silicon photonic links.

Flexible MEMS: A novel technology to fabricate flexible sensors and electronics

NASA Astrophysics Data System (ADS)

Tu, Hongen

This dissertation presents the design and fabrication techniques used to fabricate flexible MEMS (Micro Electro Mechanical Systems) devices. MEMS devices and CMOS(Complementary Metal-Oxide-Semiconductor) circuits are traditionally fabricated on rigid substrates with inorganic semiconductor materials such as Silicon. However, it is highly desirable that functional elements like sensors, actuators or micro fluidic components to be fabricated on flexible substrates for a wide variety of applications. Due to the fact that flexible substrate is temperature sensitive, typically only low temperature materials, such as polymers, metals, and organic semiconductor materials, can be directly fabricated on flexible substrates. A novel technology based on XeF2(xenon difluoride) isotropic silicon etching and parylene conformal coating, which is able to monolithically incorporate high temperature materials and fluidic channels, was developed at Wayne State University. The technology was first implemented in the development of out-of-plane parylene microneedle arrays that can be individually addressed by integrated flexible micro-channels. These devices enable the delivery of chemicals with controlled temporal and spatial patterns and allow us to study neurotransmitter-based retinal prosthesis. The technology was further explored by adopting the conventional SOI-CMOS processes. High performance and high density CMOS circuits can be first fabricated on SOI wafers, and then be integrated into flexible substrates. Flexible p-channel MOSFETs (Metal-Oxide-Semiconductor Field-Effect-Transistors) were successfully integrated and tested. Integration of pressure sensors and flow sensors based on single crystal silicon has also been demonstrated. A novel smart yarn technology that enables the invisible integration of sensors and electronics into fabrics has been developed. The most significant advantage of this technology is its post-MEMS and post-CMOS compatibility. Various high-performance MEMS devices and electronics can be integrated into flexible substrates. The potential of our technology is enormous. Many wearable and implantable devices can be developed based on this technology.

Advanced Power Electronics Components

NASA Technical Reports Server (NTRS)

Schwarze, Gene E.

2004-01-01

This paper will give a description and status of the Advanced Power Electronics Materials and Components Technology program being conducted by the NASA Glenn Research Center for future aerospace power applications. The focus of this research program is on the following: 1) New and/or significantly improved dielectric materials for the development of power capacitors with increased volumetric efficiency, energy density, and operating temperature. Materials being investigated include nanocrystalline and composite ceramic dielectrics and diamond-like carbon films; 2) New and/or significantly improved high frequency, high temperature, low loss soft magnetic materials for the development of transformers/inductors with increased power/energy density, electrical efficiency, and operating temperature. Materials being investigated include nanocrystalline and nanocomposite soft magnetic materials; 3) Packaged high temperature, high power density, high voltage, and low loss SiC diodes and switches. Development of high quality 4H- and 6H- SiC atomically smooth substrates to significantly improve device performance is a major emphasis of the SiC materials program; 4) Demonstration of high temperature (> 200 C) circuits using the components developed above.

1990 MTT-S International Microwave Symposium and Exhibition and Microwave and Millimeter-Wave Monolithic IC Symposium, Dallas, TX, May 7-10, 1990, Proceedings

NASA Astrophysics Data System (ADS)

McQuiddy, David N., Jr.; Sokolov, Vladimir

1990-12-01

The present conference discusses microwave filters, lightwave technology for microwave antennas, planar and quasi-planar guides, mixers and VCOs, cavity filters, discontinuity and coupling effects, control circuits, power dividers and phase shifters, microwave ICs, biological effects and medical applications, CAD and modeling for MMICs, directional couplers, MMIC design trends, microwave packaging and manufacturing, monolithic ICs, and solid-state devices and circuits. Also discussed are microwave and mm-wave superconducting technology, MICs for communication systems, the merging of optical and microwave technologies, microwave power transistors, ferrite devices, network measurements, advanced transmission-line structures, FET devices and circuits, field theory of IC discontinuities, active quasi-optical techniques, phased-array techniques and circuits, nonlinear CAD, sub-mm wave devices, and high power devices.

Delineation of separate brain regions used for scientific versus engineering modes of thinking

NASA Astrophysics Data System (ADS)

Patterson, Clair C.

1994-08-01

Powerful, latent abilities for extreme sophistication in abstract rationalization as potential biological adaptive behavioral responses were installed entirely through accident and inadvertence by biological evolution in the Homo sapiens sapiens species of brain. These potentials were never used, either in precursor species as factors in evolutionary increase in hominid brain mass, nor in less sophisticated forms within social environments characterized by Hss tribal brain population densities. Those latent abilities for unnatural biological adaptive behavior were forced to become manifest in various ways by growths in sophistication of communication interactions engendered by large growths in brain population densities brought on by developments in agriculture at the onset of the Holocene. It is proposed that differences probably exist between regions of the Hss brain involved in utilitarian, engineering types of problem conceptualization-solving versus regions of the brain involved in nonutilitarian, artistic-scientific types of problem conceptualization-solving. Populations isolated on separate continents from diffusive contact and influence on cultural developments, and selected for comparison of developments during equivalent stages of technological and social sophistication in matching 4000 year periods, show, at the ends of those periods, marked differences in aesthetic attributes expressed in cosmogonies, music, and writing (nonutilitarian thinking related to science and art). On the other hand the two cultures show virtually identical developments in three major stages of metallurgical technologies (utilitarian thinking related to engineering). Such archaeological data suggest that utilitarian modes of thought may utilize combinations of neuronal circuits in brain regions that are conserved among tribal populations territorially separated from each other for tens of thousands of years. Such conservation may not be true for neuronal circuits involved in nonutilitarian modes of thought. It is postulated that neuronal circuits involved in nonutilitarian modes of thought are located in specific regions of the brain that are divergent features between populations that have been territorially separated for tens of thousands of years. Anatomical PET and NMRI studies of brains of modern descendants of these cultures are proposed that would seek to define these inferred differences through proper protocols of stimulation devised by those investigators.

Carbon nanotube macroelectronics

NASA Astrophysics Data System (ADS)

Zhang, Jialu

In this dissertation, I discuss the application of carbon nanotubes in macroelectronis. Due to the extraordinary electrical properties such as high intrinsic carrier mobility and current-carrying capacity, single wall carbon nanotubes are very desirable for thin-film transistor (TFT) applications such as flat panel display, transparent electronics, as well as flexible and stretchable electronics. Compared with other popular channel material for TFTs, namely amorphous silicon, polycrystalline silicon and organic materials, nanotube thin-films have the advantages of low-temperature processing compatibility, transparency, and flexibility, as well as high device performance. In order to demonstrate scalable, practical carbon nanotube macroelectroncis, I have developed a platform to fabricate high-density, uniform separated nanotube based thin-film transistors. In addition, many other essential analysis as well as technology components, such as nanotube film density control, purity and diameter dependent semiconducting nanotube electrical performance study, air-stable n-type transistor fabrication, and CMOS integration platform have also been demonstrated. On the basis of the above achievement, I have further demonstrated various kinds of applications including AMOLED display electronics, PMOS and CMOS logic circuits, flexible and transparent electronics. The dissertation is structured as follows. First, chapter 1 gives a brief introduction to the electronic properties of carbon nanotubes, which serves as the background knowledge for the following chapters. In chapter 2, I will present our approach of fabricating wafer-scale uniform semiconducting carbon nanotube thin-film transistors and demonstrate their application in display electronics and logic circuits. Following that, more detailed information about carbon nanotube thin-film transistor based active matrix organic light-emitting diode (AMOLED) displays is discussed in chapter 3. And in chapter 4, a technology to fabricate air-stable n-type semiconducting nanotube thin-film transistor is developed and complementary metal--oxide--semiconductor (CMOS) logic circuits are demonstrated. Chapter 5 discusses the application of carbon nanotubes in transparent and flexible electronics. After that, in chapter 6, a simple and low cost nanotube separation method is introduced and the electrical performance of separated nanotubes with different diameter is studied. Finally, in chapter 7 a brief summary is drawn and some future research directions are proposed with preliminary results.

Packaging Technologies for 500 C SiC Electronics and Sensors: Challenges in Material Science and Technology

NASA Technical Reports Server (NTRS)

Chen, Liang-Yu; Neudeck, Philip G.; Behelm, Glenn M.; Spry, David J.; Meredith, Roger D.; Hunter, Gary W.

2015-01-01

This paper presents ceramic substrates and thick-film metallization based packaging technologies in development for 500C silicon carbide (SiC) electronics and sensors. Prototype high temperature ceramic chip-level packages and printed circuit boards (PCBs) based on ceramic substrates of aluminum oxide (Al2O3) and aluminum nitride (AlN) have been designed and fabricated. These ceramic substrate-based chip-level packages with gold (Au) thick-film metallization have been electrically characterized at temperatures up to 550C. The 96 alumina packaging system composed of chip-level packages and PCBs has been successfully tested with high temperature SiC discrete transistor devices at 500C for over 10,000 hours. In addition to tests in a laboratory environment, a SiC junction field-effect-transistor (JFET) with a packaging system composed of a 96 alumina chip-level package and an alumina printed circuit board was tested on low earth orbit for eighteen months via a NASA International Space Station experiment. In addition to packaging systems for electronics, a spark-plug type sensor package based on this high temperature interconnection system for high temperature SiC capacitive pressure sensors was also developed and tested. In order to further significantly improve the performance of packaging system for higher packaging density, higher operation frequency, power rating, and even higher temperatures, some fundamental material challenges must be addressed. This presentation will discuss previous development and some of the challenges in material science (technology) to improve high temperature dielectrics for packaging applications.

BiCMOS circuit technology for a 704 MHz ATM switch LSI

NASA Astrophysics Data System (ADS)

Ohtomo, Yusuke; Yasuda, Sadayuki; Togashi, Minoru; Ino, Masayuki; Tanabe, Yasuyuki; Inoue, Jun-Ichi; Nogawa, Masafumi; Hino, Shigeki

1994-05-01

This paper describes BiCMOS level-converter circuits and clock circuits that increase VLSI interface speed to 1 GHz, and their application to a 704 MHz ATM switch LSI. An LSI with high speed interface requires a BiCMOS multiplexer/demultiplexer (MUX/DEMUX) on the chip to reduce internal operation speed. A MUX/DEMUX with minimum power dissipation and a minimum pattern area can be designed using the proposed converter circuits. The converter circuits, using weakly cross-coupled CMOS inverters and a voltage regulator circuit, can convert signal levels between LCML and positive CMOS at a speed of 500 MHz. Data synchronization in the high speed region is ensured by a new BiCMOS clock circuit consisting of a pure ECL path and retiming circuits. The clock circuit reduces the chip latency fluctuation of the clock signal and absorbs the delay difference between the ECL clock and data through the CMOS circuits. A rerouting-Banyan (RRB) ATM switch, employing both the proposed converter circuits and the clock circuits, has been fabricated with 0.5 micron BiCMOS technology. The LSI, composed of CMOS 15 K gate LOGIC, 8 Kb RAM, 1 Kb FIFO and ECL 1.6 K gate LOGIC, achieved an operation speed of 704-MHz with power dissipation of 7.2 W.

De-embedding technique for accurate modeling of compact 3D MMIC CPW transmission lines

NASA Astrophysics Data System (ADS)

Pohan, U. H.; KKyabaggu, P. B.; Sinulingga, E. P.

2018-02-01

Requirement for high-density and high-functionality microwave and millimeter-wave circuits have led to the innovative circuit architectures such as three-dimensional multilayer MMICs. The major advantage of the multilayer techniques is that one can employ passive and active components based on CPW technology. In this work, MMIC Coplanar Waveguide(CPW)components such as Transmission Line (TL) are modeled in their 3D layouts. Main characteristics of CPWTL suffered from the probe pads’ parasitic and resonant frequency effects have been studied. By understanding the parasitic effects, then the novel de-embedding technique are developed accurately in order to predict high frequency characteristics of the designed MMICs. The novel de-embedding technique has shown to be critical in reducing the probe pad parasitic significantly from the model. As results, high frequency characteristics of the designed MMICs have been presented with minimumparasitic effects of the probe pads. The de-embedding process optimises the determination of main characteristics of Compact 3D MMIC CPW transmission lines.

Theoretical and experimental characterization of the DUal-BAse transistor (DUBAT)

NASA Astrophysics Data System (ADS)

Wu, Chung-Yu; Wu, Ching-Yuan

1980-11-01

A new A-type integrated voltage controlled differential negative resistance device using an extra effective base region to form a lateral pnp (npn) bipolar transistor beside the original base region of a vertical npn (pnp) bipolar junction transistor, and so called the DUal BAse Transistor (DUBAT), is studied both experimentally and theoretically, The DUBAT has three terminals and is fully comparible with the existing bipolar integrated circuits technologies. Based upon the equivalent circuit of the DUBAT, a simple first-order analytical theory is developed, and important device parameters, such as: the I-V characteristic, the differential negative resistance, and the peak and valley points, are also characterized. One of the proposed integrated structures of the DUBAT, which is similar in structure to I 2L but with similar high density and a normally operated vertical npn transistor, has been successfully fabricated and studied. Comparisons between the experimental data and theoretical analyses are made, and show in satisfactory agreements.

Photon Statistics of Propagating Thermal Microwaves

NASA Astrophysics Data System (ADS)

Deppe, F.; Goetz, J.; Eder, P.; Fischer, M.; Pogorzalek, S.; Xie, E.; Fedorov, K. G.; Marx, A.; Gross, R.

In experiments with superconducting quantum circuits, characterizing the photon statistics of propagating microwave fields is a fundamental task. This task is in particular relevant for thermal fields, which are omnipresent noise sources in superconducting quantum circuits covering all relevant frequency regimes. We quantify the n2 + n photon number variance of thermal microwave photons emitted from a black-body radiator for mean photon numbers 0 . 05 <= n <= 1 . 5. In addition, we also use the fields as a sensitive probe for second-order decoherence effects of the qubit. Specifically, we investigate the influence of thermal fields on the low-frequency spectrum of the qubit parameter fluctuations. We find an enhacement of the white noise contribution of the noise power spectral density. Our data confirms a model of thermally activated two-level states interacting with the qubit. Supported by the German Research Foundation through FE 1564/1-1, the doctorate programs ExQM of the Elite Network of Bavaria, and the IMPRS Quantum Science and Technology.

Scale Up Considerations for Sediment Microbial Fuel Cells

DTIC Science & Technology

2013-01-01

density calculations were made once WPs stabilized for each system. Linear sweep voltametry was then used on these systems to generate polarization and...power density curves. The systems were allowed to equilibrate under open circuit conditions (about 12 h) before a potential sweep was performed with a...reference. The potential sweep was set to begin at the anode potential under open circuit conditions (20.4 V vs. Ag/AgCl) and was raised to the

Intelligent structures technology

NASA Astrophysics Data System (ADS)

Crawley, Edward F.

1991-07-01

Viewgraphs on intelligent structures technology are presented. Topics covered include: embedding electronics; electrical and mechanical compatibility; integrated circuit chip packaged for embedding; embedding devices within composite structures; test of embedded circuit in G/E coupon; temperature/humidity/bias test; single-chip microcomputer control experiment; and structural shape determination.

Intelligent structures technology

NASA Technical Reports Server (NTRS)

Crawley, Edward F.

1991-01-01

Viewgraphs on intelligent structures technology are presented. Topics covered include: embedding electronics; electrical and mechanical compatibility; integrated circuit chip packaged for embedding; embedding devices within composite structures; test of embedded circuit in G/E coupon; temperature/humidity/bias test; single-chip microcomputer control experiment; and structural shape determination.

Marching to the beat of Moore's Law

NASA Astrophysics Data System (ADS)

Borodovsky, Yan

2006-03-01

Area density scaling in integrated circuits, defined as transistor count per unit area, has followed the famous observation-cum-prediction by Gordon Moore for many generations. Known as "Moore's Law" which predicts density doubling every 18-24 month, it has provided all important synchronizing guidance and reference for tools and materials suppliers, IC manufacturers and their customers as to what minimal requirements their products and services need to meet to satisfy technical and financial expectations in support of the infrastructure required for the development and manufacturing of corresponding technology generation nodes. Multiple lithography solutions are usually under considerations for any given node. In general, three broad classes of solutions are considered: evolutionary - technology that is extension of existing technology infrastructure at similar or slightly higher cost and risk to schedule; revolutionary - technology that discards significant parts of the existing infrastructure at similar cost, higher risk to schedule but promises higher capability as compared to the evolutionary approach; and last but not least, disruptive - approach that as a rule promises similar or better capabilities, much lower cost and wholly unpredictable risk to schedule and products yields. This paper examines various lithography approaches, their respective merits against criteria of respective infrastructure availability, affordability and risk to IC manufacturer's schedules and strategy involved in developing and selecting best solution in an attempt to sort out key factors that will impact the decision on the lithography choice for large-scale manufacturing for the future technology nodes.

Analytical expressions for noise and crosstalk voltages of the High Energy Silicon Particle Detector

NASA Astrophysics Data System (ADS)

Yadav, I.; Shrimali, H.; Liberali, V.; Andreazza, A.

2018-01-01

The paper presents design and implementation of a silicon particle detector array with the derived closed form equations of signal-to-noise ratio (SNR) and crosstalk voltages. The noise analysis demonstrates the effect of interpixel capacitances (IPC) between center pixel (where particle hits) and its neighbouring pixels, resulting as a capacitive crosstalk. The pixel array has been designed and simulated in a 180 nm BCD technology of STMicroelectronics. The technology uses the supply voltage (VDD) of 1.8 V and the substrate potential of -50 V. The area of unit pixel is 250×50 μm2 with the substrate resistivity of 125 Ωcm and the depletion depth of 30 μm. The mathematical model includes the effects of various types of noise viz. the shot noise, flicker noise, thermal noise and the capacitive crosstalk. This work compares the results of noise and crosstalk analysis from the proposed mathematical model with the circuit simulation results for a given simulation environment. The results show excellent agreement with the circuit simulations and the mathematical model. The average relative error (AVR) generated for the noise spectral densities with respect to the simulations and the model is 12% whereas the comparison gives the errors of 3% and 11.5% for the crosstalk voltages and the SNR results respectively.

System-Level Integrated Circuit (SLIC) Technology Development for Phased Array Antenna Applications

NASA Technical Reports Server (NTRS)

Windyka, John A.; Zablocki, Ed G.

1997-01-01

This report documents the efforts and progress in developing a 'system-level' integrated circuit, or SLIC, for application in advanced phased array antenna systems. The SLIC combines radio-frequency (RF) microelectronics, digital and analog support circuitry, and photonic interfaces into a single micro-hybrid assembly. Together, these technologies provide not only the amplitude and phase control necessary for electronic beam steering in the phased array, but also add thermally-compensated automatic gain control, health and status feedback, bias regulation, and reduced interconnect complexity. All circuitry is integrated into a compact, multilayer structure configured for use as a two-by-four element phased array module, operating at 20 Gigahertz, using a Microwave High-Density Interconnect (MHDI) process. The resultant hardware is constructed without conventional wirebonds, maintains tight inter-element spacing, and leads toward low-cost mass production. The measured performances and development issues associated with both the two-by-four element module and the constituent elements are presented. Additionally, a section of the report describes alternative architectures and applications supported by the SLIC electronics. Test results show excellent yield and performance of RF circuitry and full automatic gain control for multiple, independent channels. Digital control function, while suffering from lower manufacturing yield, also proved successful.

Monolithic Microwave Integrated Circuit (MMIC) technology for space communications applications

NASA Technical Reports Server (NTRS)

Connolly, Denis J.; Bhasin, Kul B.; Romanofsky, Robert R.

1987-01-01

Future communications satellites are likely to use gallium arsenide (GaAs) monolithic microwave integrated-circuit (MMIC) technology in most, if not all, communications payload subsystems. Multiple-scanning-beam antenna systems are expected to use GaAs MMIC's to increase functional capability, to reduce volume, weight, and cost, and to greatly improve system reliability. RF and IF matrix switch technology based on GaAs MMIC's is also being developed for these reasons. MMIC technology, including gigabit-rate GaAs digital integrated circuits, offers substantial advantages in power consumption and weight over silicon technologies for high-throughput, on-board baseband processor systems. For the more distant future pseudomorphic indium gallium arsenide (InGaAs) and other advanced III-V materials offer the possibility of MMIC subsystems well up into the millimeter wavelength region. All of these technology elements are in NASA's MMIC program. Their status is reviewed.

Monolithic Microwave Integrated Circuit (MMIC) technology for space communications applications

NASA Technical Reports Server (NTRS)

Connolly, Denis J.; Bhasin, Kul B.; Romanofsky, Robert R.

1987-01-01

Future communications satellites are likely to use gallium arsenide (GaAs) monolithic microwave integrated-circuit (MMIC) technology in most, if not all, communications payload subsystems. Multiple-scanning-beam antenna systems are expected to use GaAs MMICs to increase functional capability, to reduce volume, weight, and cost, and to greatly improve system reliability. RF and IF matrix switch technology based on GaAs MMICs is also being developed for these reasons. MMIC technology, including gigabit-rate GaAs digital integrated circuits, offers substantial advantages in power consumption and weight over silicon technologies for high-throughput, on-board baseband processor systems. For the more distant future pseudomorphic indium gallium arsenide (InGaAs) and other advanced III-V materials offer the possibility of MMIC subsystems well up into the millimeter wavelength region. All of these technology elements are in NASA's MMIC program. Their status is reviewed.

Development of wavelength locking circuit for 1.53 micron water vapor monitoring coherent differential absorption LIDAR

NASA Astrophysics Data System (ADS)

Imaki, Masaharu; Kojima, Ryota; Kameyama, Shumpei

2018-04-01

We have studied a ground based coherent differential absorption LIDAR (DIAL) for vertical profiling of water vapor density using a 1.5μm laser wavelength. A coherent LIDAR has an advantage in daytime measurement compared with incoherent LIDAR because the influence of background light is greatly suppressed. In addition, the LIDAR can simultaneously measure wind speed and water vapor density. We had developed a wavelength locking circuit using the phase modulation technique and offset locking technique, and wavelength stabilities of 0.123 pm which corresponds to 16 MHz are realized. In this paper, we report the wavelength locking circuits for the 1.5 um wavelength.

Direct Analysis of JV-Curves Applied to an Outdoor-Degrading CdTe Module (Presentation)

DOE Office of Scientific and Technical Information (OSTI.GOV)

Jordan, D; Kurtz, S.; Ulbrich, C.

2014-03-01

We present the application of a phenomenological four parameter equation to fit and analyze regularly measured current density-voltage JV curves of a CdTe module during 2.5 years of outdoor operation. The parameters are physically meaningful, i.e. the short circuit current density Jsc, open circuit voltage Voc and differential resistances Rsc, and Roc. For the chosen module, the fill factor FF degradation overweighs the degradation of Jsc and Voc. Interestingly, with outdoor exposure, not only the conductance at short circuit, Gsc, increases but also the Gsc(Jsc)-dependence. This is well explained with an increase in voltage dependent charge carrier collection in CdTe.

[Flexible print circuit technology application in biomedical engineering].

PubMed

Jiang, Lihua; Cao, Yi; Zheng, Xiaolin

2013-06-01

Flexible print circuit (FPC) technology has been widely applied in variety of electric circuits with high precision due to its advantages, such as low-cost, high specific fabrication ability, and good flexibility, etc. Recently, this technology has also been used in biomedical engineering, especially in the development of microfluidic chip and microelectrode array. The high specific fabrication can help making microelectrode and other micro-structure equipment. And good flexibility allows the micro devices based on FPC technique to be easily packaged with other parts. In addition, it also reduces the damage of microelectrodes to the tissue. In this paper, the application of FPC technology in biomedical engineering is introduced. Moreover, the important parameters of FPC technique and the development trend of prosperous applications is also discussed.

Characterization of oscillator circuits for monitoring the density-viscosity of liquids by means of piezoelectric MEMS microresonators

NASA Astrophysics Data System (ADS)

Toledo, J.; Ruiz-Díez, V.; Pfusterschmied, G.; Schmid, U.; Sánchez-Rojas, J. L.

2017-06-01

Real-time monitoring of the physical properties of liquids, such as lubricants, is a very important issue for the automotive industry. For example, contamination of lubricating oil by diesel soot has a significant impact on engine wear. Resonant microstructures are regarded as a precise and compact solution for tracking the viscosity and density of lubricant oils. In this work, we report a piezoelectric resonator, designed to resonate with the 4th order out-of-plane modal vibration, 15-mode, and the interface circuit and calibration process for the monitoring of oil dilution with diesel fuel. In order to determine the resonance parameters of interest, i.e. resonant frequency and quality factor, an interface circuit was implemented and included within a closed-loop scheme. Two types of oscillator circuits were tested, a Phase-Locked Loop based on instrumentation, and a more compact version based on discrete electronics, showing similar resolution. Another objective of this work is the assessment of a calibration method for piezoelectric MEMS resonators in simultaneous density and viscosity sensing. An advanced calibration model, based on a Taylor series of the hydrodynamic function, was established as a suitable method for determining the density and viscosity with the lowest calibration error. Our results demonstrate the performance of the resonator in different oil samples with viscosities up to 90 mPa•s. At the highest value, the quality factor measured at 25°C was around 22. The best resolution obtained was 2.4•10-6 g/ml for the density and 2.7•10-3 mPa•s for the viscosity, in pure lubricant oil SAE 0W30 at 90°C. Furthermore, the estimated density and viscosity values with the MEMS resonator were compared to those obtained with a commercial density-viscosity meter, reaching a mean calibration error in the best scenario of around 0.08% for the density and 3.8% for the viscosity.

Large-scale, high-density (up to 512 channels) recording of local circuits in behaving animals

PubMed Central

Berényi, Antal; Somogyvári, Zoltán; Nagy, Anett J.; Roux, Lisa; Long, John D.; Fujisawa, Shigeyoshi; Stark, Eran; Leonardo, Anthony; Harris, Timothy D.

2013-01-01

Monitoring representative fractions of neurons from multiple brain circuits in behaving animals is necessary for understanding neuronal computation. Here, we describe a system that allows high-channel-count recordings from a small volume of neuronal tissue using a lightweight signal multiplexing headstage that permits free behavior of small rodents. The system integrates multishank, high-density recording silicon probes, ultraflexible interconnects, and a miniaturized microdrive. These improvements allowed for simultaneous recordings of local field potentials and unit activity from hundreds of sites without confining free movements of the animal. The advantages of large-scale recordings are illustrated by determining the electroanatomic boundaries of layers and regions in the hippocampus and neocortex and constructing a circuit diagram of functional connections among neurons in real anatomic space. These methods will allow the investigation of circuit operations and behavior-dependent interregional interactions for testing hypotheses of neural networks and brain function. PMID:24353300

Spiers Memorial Lecture. Molecular mechanics and molecular electronics.

PubMed

Beckman, Robert; Beverly, Kris; Boukai, Akram; Bunimovich, Yuri; Choi, Jang Wook; DeIonno, Erica; Green, Johnny; Johnston-Halperin, Ezekiel; Luo, Yi; Sheriff, Bonnie; Stoddart, Fraser; Heath, James R

2006-01-01

We describe our research into building integrated molecular electronics circuitry for a diverse set of functions, and with a focus on the fundamental scientific issues that surround this project. In particular, we discuss experiments aimed at understanding the function of bistable rotaxane molecular electronic switches by correlating the switching kinetics and ground state thermodynamic properties of those switches in various environments, ranging from the solution phase to a Langmuir monolayer of the switching molecules sandwiched between two electrodes. We discuss various devices, low bit-density memory circuits, and ultra-high density memory circuits that utilize the electrochemical switching characteristics of these molecules in conjunction with novel patterning methods. We also discuss interconnect schemes that are capable of bridging the micrometre to submicrometre length scales of conventional patterning approaches to the near-molecular length scales of the ultra-dense memory circuits. Finally, we discuss some of the challenges associated with fabricated ultra-dense molecular electronic integrated circuits.

Data storage technology comparisons

NASA Technical Reports Server (NTRS)

Katti, Romney R.

1990-01-01

The role of data storage and data storage technology is an integral, though conceptually often underestimated, portion of data processing technology. Data storage is important in the mass storage mode in which generated data is buffered for later use. But data storage technology is also important in the data flow mode when data are manipulated and hence required to flow between databases, datasets and processors. This latter mode is commonly associated with memory hierarchies which support computation. VLSI devices can reasonably be defined as electronic circuit devices such as channel and control electronics as well as highly integrated, solid-state devices that are fabricated using thin film deposition technology. VLSI devices in both capacities play an important role in data storage technology. In addition to random access memories (RAM), read-only memories (ROM), and other silicon-based variations such as PROM's, EPROM's, and EEPROM's, integrated devices find their way into a variety of memory technologies which offer significant performance advantages. These memory technologies include magnetic tape, magnetic disk, magneto-optic disk, and vertical Bloch line memory. In this paper, some comparison between selected technologies will be made to demonstrate why more than one memory technology exists today, based for example on access time and storage density at the active bit and system levels.

Study of CMOS-SOI Integrated Temperature Sensing Circuits for On-Chip Temperature Monitoring.

PubMed

Malits, Maria; Brouk, Igor; Nemirovsky, Yael

2018-05-19

This paper investigates the concepts, performance and limitations of temperature sensing circuits realized in complementary metal-oxide-semiconductor (CMOS) silicon on insulator (SOI) technology. It is shown that the MOSFET threshold voltage ( V t ) can be used to accurately measure the chip local temperature by using a V t extractor circuit. Furthermore, the circuit's performance is compared to standard circuits used to generate an accurate output current or voltage proportional to the absolute temperature, i.e., proportional-to-absolute temperature (PTAT), in terms of linearity, sensitivity, power consumption, speed, accuracy and calibration needs. It is shown that the V t extractor circuit is a better solution to determine the temperature of low power, analog and mixed-signal designs due to its accuracy, low power consumption and no need for calibration. The circuit has been designed using 1 µm partially depleted (PD) CMOS-SOI technology, and demonstrates a measurement inaccuracy of ±1.5 K across 300 K⁻500 K temperature range while consuming only 30 µW during operation.

Graphene Ink Laminate Structures on Poly(vinylidene difluoride) (PVDF) for Pyroelectric Thermal Energy Harvesting and Waste Heat Recovery.

PubMed

Zabek, Daniel; Seunarine, Kris; Spacie, Chris; Bowen, Chris

2017-03-15

Thermal energy can be effectively converted into electricity using pyroelectrics, which act as small scale power generator and energy harvesters providing nanowatts to milliwatts of electrical power. In this paper, a novel pyroelectric harvester based on free-standing poly(vinylidene difluoride) (PVDF) was manufactured that exploits the high thermal radiation absorbance of a screen printed graphene ink electrode structure to facilitate the conversion of the available thermal radiation energy into electrical energy. The use of interconnected graphene nanoplatelets (GNPs) as an electrode enable high thermal radiation absorbance and high electrical conductivity along with the ease of deposition using a screen print technique. For the asymmetric structure, the pyroelectric open-circuit voltage and closed-circuit current were measured, and the harvested electrical energy was stored in an external capacitor. For the graphene ink/PVDF/aluminum system the closed circuit pyroelectric current improves by 7.5 times, the open circuit voltage by 3.4 times, and the harvested energy by 25 times compared to a standard aluminum/PVDF/aluminum system electrode design, with a peak energy density of 1.13 μJ/cm 3 . For the pyroelectric device employed in this work, a complete manufacturing process and device characterization of these structures are reported along with the thermal conductivity of the graphene ink. The material combination presented here provides a new approach for delivering smart materials and structures, wireless technologies, and Internet of Things (IoT) devices.

Circuit models and three-dimensional electromagnetic simulations of a 1-MA linear transformer driver stage

NASA Astrophysics Data System (ADS)

Rose, D. V.; Miller, C. L.; Welch, D. R.; Clark, R. E.; Madrid, E. A.; Mostrom, C. B.; Stygar, W. A.; Lechien, K. R.; Mazarakis, M. A.; Langston, W. L.; Porter, J. L.; Woodworth, J. R.

2010-09-01

A 3D fully electromagnetic (EM) model of the principal pulsed-power components of a high-current linear transformer driver (LTD) has been developed. LTD systems are a relatively new modular and compact pulsed-power technology based on high-energy density capacitors and low-inductance switches located within a linear-induction cavity. We model 1-MA, 100-kV, 100-ns rise-time LTD cavities [A. A. Kim , Phys. Rev. ST Accel. Beams 12, 050402 (2009)PRABFM1098-440210.1103/PhysRevSTAB.12.050402] which can be used to drive z-pinch and material dynamics experiments. The model simulates the generation and propagation of electromagnetic power from individual capacitors and triggered gas switches to a radially symmetric output line. Multiple cavities, combined to provide voltage addition, drive a water-filled coaxial transmission line. A 3D fully EM model of a single 1-MA 100-kV LTD cavity driving a simple resistive load is presented and compared to electrical measurements. A new model of the current loss through the ferromagnetic cores is developed for use both in circuit representations of an LTD cavity and in the 3D EM simulations. Good agreement between the measured core current, a simple circuit model, and the 3D simulation model is obtained. A 3D EM model of an idealized ten-cavity LTD accelerator is also developed. The model results demonstrate efficient voltage addition when driving a matched impedance load, in good agreement with an idealized circuit model.

Novel Vertical Interconnects With 180 Degree Phase Shift for Amplifiers, Filters, and Integrated Antennas

NASA Technical Reports Server (NTRS)

Goverdhanam, Kavita; Simons, Rainee N.; Katehi, Linda P. B.; Burke, Thomas P. (Technical Monitor)

2001-01-01

In this paper, novel low loss, wide-band coplanar stripline technology for RF/microwave integrated circuits is demonstrated on high resistivity silicon wafer. In particular, the fabrication process for the deposition of spin-on-glass (SOG) as a dielectric layer, the etching of microvias for the vertical interconnects, the design methodology for the multiport circuits and their measured/simulated characteristics are graphically illustrated. The study shows that circuits with very low loss, large bandwidth and compact size are feasible using this technology. This multilayer planar technology has potential to significantly enhance RF/microwave IC performance when combined with semiconductor devices and microelectromechanical systems (MEMS).

Grain boundary modification to suppress lithium penetration through garnet-type solid electrolyte

NASA Astrophysics Data System (ADS)

Hongahally Basappa, Rajendra; Ito, Tomoko; Morimura, Takao; Bekarevich, Raman; Mitsuishi, Kazutaka; Yamada, Hirotoshi

2017-09-01

Garnet-type solid electrolytes are one of key materials to enable practical usage of lithium metal anode for high-energy-density batteries. However, it suffers from lithium growth in pellets on charging, which causes short circuit. In this study, grain boundaries of Li6.5La3Zr1.5Ta0.5O12 (LLZT) pellets are modified with Li2CO3 and LiOH to investigate the influence of the microstructure of grain boundaries on lithium growth and to study the mechanism of the lithium growth. In spite of similar properties (relative density of ca. 96% and total ionic conductivity of 7 × 10-4 S cm-1 at 25 °C), the obtained pellets exhibit different tolerance on the short circuit. The LLZT pellets prepared from LiOH-modified LLZT powders exhibit rather high critical current density of 0.6 mA cm-2, at which short circuit occurs. On the other hand, the LLZT pellets without grain boundary modification short-circuited at 0.15 mA cm-2. Microstructural analyses by means of SEM, STEM and EIS suggest that lithium grows through interconnected open voids, and reveal that surface layers such as Li2CO3 and LiOH are not only plug voids but also facilitate the sintering of LLZT to suppress the lithium growth. The results indicate a strategy towards short-circuit-free lithium metal batteries.

Study of Variable Frequency Induction Heating in Steel Making Process

NASA Astrophysics Data System (ADS)

Fukutani, Kazuhiko; Umetsu, Kenji; Itou, Takeo; Isobe, Takanori; Kitahara, Tadayuki; Shimada, Ryuichi

Induction heating technologies have been the standard technologies employed in steel making processes because they are clean, they have a high energy density, they are highly the controllable, etc. However, there is a problem in using them; in general, frequencies of the electric circuits have to be kept fixed to improve their power factors, and this constraint makes the processes inflexible. In order to overcome this problem, we have developed a new heating technique-variable frequency power supply with magnetic energy recovery switching. This technique helps us in improving the quality of steel products as well as the productivity. We have also performed numerical calculations and experiments to evaluate its effect on temperature distributions on heated steel plates. The obtained results indicate that the application of the technique in steel making processes would be advantageous.

Characterization of silicon-gate CMOS/SOS integrated circuits processed with ion implantation

NASA Technical Reports Server (NTRS)

Woo, D. S.

1980-01-01

The double layer metallization technology applied on p type silicon gate CMOS/SOS integrated circuits is described. A smooth metal surface was obtained by using the 2% Si-sputtered Al. More than 10% probe yield was achieved on solar cell controller circuit TCS136 (or MSFC-SC101). Reliability tests were performed on 15 arrays at 150 C. Only three arrays failed during the burn in, and 18 arrays out of 22 functioning arrays maintained the leakage current below 100 milli-A. Analysis indicates that this technology will be a viable process if the metal short circuit problem between the two metals can be reduced.

Aperture efficiency of integrated-circuit horn antennas

NASA Technical Reports Server (NTRS)

Guo, Yong; Lee, Karen; Stimson, Philip; Potter, Kent; Rutledge, David

1991-01-01

The aperture efficiency of silicon integrated-circuit horn antennas has been improved by optimizing the length of the dipole probes and by coating the entire horn walls with gold. To make these measurements, a new thin-film power-density meter was developed for measuring power density with accuracies better than 5 percent. The measured aperture efficiency improved from 44 percent to 72 percent at 93 GHz. This is sufficient for use in many applications which now use machined waveguide horns.

The dc power circuits: A compilation

NASA Technical Reports Server (NTRS)

1972-01-01

A compilation of reports concerning power circuits is presented for the dissemination of aerospace information to the general public as part of the NASA Technology Utilization Program. The descriptions for the electronic circuits are grouped as follows: dc power supplies, power converters, current-voltage power supply regulators, overload protection circuits, and dc constant current power supplies.

PCB-level Electro thermal Coupling Simulation Analysis

NASA Astrophysics Data System (ADS)

Zhou, Runjing; Shao, Xuchen

2017-10-01

Power transmission network needs to transmit more current with the increase of the power density. The problem of temperature rise and the reliability is becoming more and more serious. In order to accurately design the power supply system, we must consider the influence of the power supply system including Joule heat, air convection and other factors. Therefore, this paper analyzes the relationship between the electric circuit and the thermal circuit on the basis of the theory of electric circuit and thermal circuit.

Ultrahigh-Energy Density Lithium-Ion Cable Battery Based on the Carbon-Nanotube Woven Macrofilms.

PubMed

Wu, Ziping; Liu, Kaixi; Lv, Chao; Zhong, Shengwen; Wang, Qinghui; Liu, Ting; Liu, Xianbin; Yin, Yanhong; Hu, Yingyan; Wei, Di; Liu, Zhongfan

2018-05-01

Moore's law predicts the performance of integrated circuit doubles every two years, lasting for more than five decades. However, the improvements of the performance of energy density in batteries lag far behind that. In addition, the poor flexibility, insufficient-energy density, and complexity of incorporation into wearable electronics remain considerable challenges for current battery technology. Herein, a lithium-ion cable battery is invented, which is insensitive to deformation due to its use of carbon nanotube (CNT) woven macrofilms as the charge collectors. An ultrahigh-tap density of 10 mg cm -2 of the electrodes can be obtained, which leads to an extremely high-energy density of 215 mWh cm -3 . The value is approximately seven times than that of the highest performance reported previously. In addition, the battery displays very stable rate performance and lower internal resistance than conventional lithium-ion batteries using metal charge collectors. Moreover, it demonstrates excellent convenience for connecting electronics as a new strategy is applied, in which both electrodes can be integrated into one end by a CNT macrorope. Such an ultrahigh-energy density lithium-ion cable battery provides a feasible way to power wearable electronics with commercial viability. © 2018 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

A spin transfer torque magnetoresistance random access memory-based high-density and ultralow-power associative memory for fully data-adaptive nearest neighbor search with current-mode similarity evaluation and time-domain minimum searching

NASA Astrophysics Data System (ADS)

Ma, Yitao; Miura, Sadahiko; Honjo, Hiroaki; Ikeda, Shoji; Hanyu, Takahiro; Ohno, Hideo; Endoh, Tetsuo

2017-04-01

A high-density nonvolatile associative memory (NV-AM) based on spin transfer torque magnetoresistive random access memory (STT-MRAM), which achieves highly concurrent and ultralow-power nearest neighbor search with full adaptivity of the template data format, has been proposed and fabricated using the 90 nm CMOS/70 nm perpendicular-magnetic-tunnel-junction hybrid process. A truly compact current-mode circuitry is developed to realize flexibly controllable and high-parallel similarity evaluation, which makes the NV-AM adaptable to any dimensionality and component-bit of template data. A compact dual-stage time-domain minimum searching circuit is also developed, which can freely extend the system for more template data by connecting multiple NM-AM cores without additional circuits for integrated processing. Both the embedded STT-MRAM module and the computing circuit modules in this NV-AM chip are synchronously power-gated to completely eliminate standby power and maximally reduce operation power by only activating the currently accessed circuit blocks. The operations of a prototype chip at 40 MHz are demonstrated by measurement. The average operation power is only 130 µW, and the circuit density is less than 11 µm2/bit. Compared with the latest conventional works in both volatile and nonvolatile approaches, more than 31.3% circuit area reductions and 99.2% power improvements are achieved, respectively. Further power performance analyses are discussed, which verify the special superiority of the proposed NV-AM in low-power and large-memory-based VLSIs.

Study on the Mathematical Model of Dielectric Recovery Characteristics in High Voltage SF6 Circuit Breaker

NASA Astrophysics Data System (ADS)

Lin, Xin; Wang, Feiming; Xu, Jianyuan; Xia, Yalong; Liu, Weidong

2016-03-01

According to the stream theory, this paper proposes a mathematical model of the dielectric recovery characteristic based on the two-temperature ionization equilibrium equation. Taking the dynamic variation of charged particle's ionization and attachment into account, this model can be used in collaboration with the Coulomb collision model, which gives the relationship of the heavy particle temperature and electron temperature to calculate the electron density and temperature under different pressure and electric field conditions, so as to deliver the breakdown electric field strength under different pressure conditions. Meanwhile an experiment loop of the circuit breaker has been built to measure the breakdown voltage. It is shown that calculated results are in conformity with experiment results on the whole while results based on the stream criterion are larger than experiment results. This indicates that the mathematical model proposed here is more accurate for calculating the dielectric recovery characteristic, it is derived from the stream model with some improvement and refinement and has great significance for increasing the simulation accuracy of circuit breaker's interruption characteristic. supported by Science and Technology Project of State Grid Corporation of China (No. GY17201200063), National Natural Science Foundation of China (No. 51277123), Basic Research Project of Liaoning Key Laboratory of Education Department (LZ2015055)

Memristor-based cellular nonlinear/neural network: design, analysis, and applications.

PubMed

Duan, Shukai; Hu, Xiaofang; Dong, Zhekang; Wang, Lidan; Mazumder, Pinaki

2015-06-01

Cellular nonlinear/neural network (CNN) has been recognized as a powerful massively parallel architecture capable of solving complex engineering problems by performing trillions of analog operations per second. The memristor was theoretically predicted in the late seventies, but it garnered nascent research interest due to the recent much-acclaimed discovery of nanocrossbar memories by engineers at the Hewlett-Packard Laboratory. The memristor is expected to be co-integrated with nanoscale CMOS technology to revolutionize conventional von Neumann as well as neuromorphic computing. In this paper, a compact CNN model based on memristors is presented along with its performance analysis and applications. In the new CNN design, the memristor bridge circuit acts as the synaptic circuit element and substitutes the complex multiplication circuit used in traditional CNN architectures. In addition, the negative differential resistance and nonlinear current-voltage characteristics of the memristor have been leveraged to replace the linear resistor in conventional CNNs. The proposed CNN design has several merits, for example, high density, nonvolatility, and programmability of synaptic weights. The proposed memristor-based CNN design operations for implementing several image processing functions are illustrated through simulation and contrasted with conventional CNNs. Monte-Carlo simulation has been used to demonstrate the behavior of the proposed CNN due to the variations in memristor synaptic weights.

Quantum information density scaling and qubit operation time constraints of CMOS silicon-based quantum computer architectures

NASA Astrophysics Data System (ADS)

Rotta, Davide; Sebastiano, Fabio; Charbon, Edoardo; Prati, Enrico

2017-06-01

Even the quantum simulation of an apparently simple molecule such as Fe2S2 requires a considerable number of qubits of the order of 106, while more complex molecules such as alanine (C3H7NO2) require about a hundred times more. In order to assess such a multimillion scale of identical qubits and control lines, the silicon platform seems to be one of the most indicated routes as it naturally provides, together with qubit functionalities, the capability of nanometric, serial, and industrial-quality fabrication. The scaling trend of microelectronic devices predicting that computing power would double every 2 years, known as Moore's law, according to the new slope set after the 32-nm node of 2009, suggests that the technology roadmap will achieve the 3-nm manufacturability limit proposed by Kelly around 2020. Today, circuital quantum information processing architectures are predicted to take advantage from the scalability ensured by silicon technology. However, the maximum amount of quantum information per unit surface that can be stored in silicon-based qubits and the consequent space constraints on qubit operations have never been addressed so far. This represents one of the key parameters toward the implementation of quantum error correction for fault-tolerant quantum information processing and its dependence on the features of the technology node. The maximum quantum information per unit surface virtually storable and controllable in the compact exchange-only silicon double quantum dot qubit architecture is expressed as a function of the complementary metal-oxide-semiconductor technology node, so the size scale optimizing both physical qubit operation time and quantum error correction requirements is assessed by reviewing the physical and technological constraints. According to the requirements imposed by the quantum error correction method and the constraints given by the typical strength of the exchange coupling, we determine the workable operation frequency range of a silicon complementary metal-oxide-semiconductor quantum processor to be within 1 and 100 GHz. Such constraint limits the feasibility of fault-tolerant quantum information processing with complementary metal-oxide-semiconductor technology only to the most advanced nodes. The compatibility with classical complementary metal-oxide-semiconductor control circuitry is discussed, focusing on the cryogenic complementary metal-oxide-semiconductor operation required to bring the classical controller as close as possible to the quantum processor and to enable interfacing thousands of qubits on the same chip via time-division, frequency-division, and space-division multiplexing. The operation time range prospected for cryogenic control electronics is found to be compatible with the operation time expected for qubits. By combining the forecast of the development of scaled technology nodes with operation time and classical circuitry constraints, we derive a maximum quantum information density for logical qubits of 2.8 and 4 Mqb/cm2 for the 10 and 7-nm technology nodes, respectively, for the Steane code. The density is one and two orders of magnitude less for surface codes and for concatenated codes, respectively. Such values provide a benchmark for the development of fault-tolerant quantum algorithms by circuital quantum information based on silicon platforms and a guideline for other technologies in general.

Optimization of Magneto-Rheological Damper for Maximizing Magnetic Flux Density in the Fluid Flow Gap Through FEA and GA Approaches

NASA Astrophysics Data System (ADS)

Krishna, Hemanth; Kumar, Hemantha; Gangadharan, Kalluvalappil

2017-08-01

A magneto rheological (MR) fluid damper offers cost effective solution for semiactive vibration control in an automobile suspension. The performance of MR damper is significantly depends on the electromagnetic circuit incorporated into it. The force developed by MR fluid damper is highly influenced by the magnetic flux density induced in the fluid flow gap. In the present work, optimization of electromagnetic circuit of an MR damper is discussed in order to maximize the magnetic flux density. The optimization procedure was proposed by genetic algorithm and design of experiments techniques. The result shows that the fluid flow gap size less than 1.12 mm cause significant increase of magnetic flux density.

High density electrical card connector system

DOEpatents

Haggard, J. Eric; Trotter, Garrett R.

2000-01-01

An electrical circuit board card connection system is disclosed which comprises a wedge-operated locking mechanism disposed along an edge portion of the printed circuit board. An extrusion along the edge of the circuit board mates with an extrusion fixed to the card cage having a plurality of electrical connectors. The connection system allows the connectors to be held away from the circuit board during insertion/extraction and provides a constant mating force once the circuit board is positioned and the wedge inserted. The disclosed connection system is a simple solution to the need for a greater number of electrical signal connections.

Accurate time delay technology in simulated test for high precision laser range finder

NASA Astrophysics Data System (ADS)

Chen, Zhibin; Xiao, Wenjian; Wang, Weiming; Xue, Mingxi

2015-10-01

With the continuous development of technology, the ranging accuracy of pulsed laser range finder (LRF) is higher and higher, so the maintenance demand of LRF is also rising. According to the dominant ideology of "time analog spatial distance" in simulated test for pulsed range finder, the key of distance simulation precision lies in the adjustable time delay. By analyzing and comparing the advantages and disadvantages of fiber and circuit delay, a method was proposed to improve the accuracy of the circuit delay without increasing the count frequency of the circuit. A high precision controllable delay circuit was designed by combining the internal delay circuit and external delay circuit which could compensate the delay error in real time. And then the circuit delay accuracy could be increased. The accuracy of the novel circuit delay methods proposed in this paper was actually measured by a high sampling rate oscilloscope actual measurement. The measurement result shows that the accuracy of the distance simulated by the circuit delay is increased from +/- 0.75m up to +/- 0.15m. The accuracy of the simulated distance is greatly improved in simulated test for high precision pulsed range finder.

Cathodic reduction of hexavalent chromium [Cr(VI)] coupled with electricity generation in microbial fuel cells.

PubMed

Wang, Gang; Huang, Liping; Zhang, Yifeng

2008-11-01

A novel approach to Cr(VI)-contaminated wastewater treatment was investigated using microbial fuel cell technologies in fed-batch mode. By using synthetic Cr(VI)-containing wastewater as catholyte and anaerobic microorganisms as anodic biocatalyst, Cr(VI) at 100 mg/l was completely removed during 150 h (initial pH 2). The maximum power density of 150 mW/m(2) (0.04 mA/cm(2)) and the maximum open circuit voltage of 0.91 V were generated with Cr(VI) at 200 mg/l as electron acceptor. This work verifies the possibility of simultaneous electricity production and cathodic Cr(VI) reduction.

Integrated input protection against discharges for Micro Pattern Gas Detectors readout ASICs

NASA Astrophysics Data System (ADS)

Fiutowski, T.; Dąbrowski, W.; Koperny, S.; Wiącek, P.

2017-02-01

Immunity against possible random discharges inside active detector volume of MPGDs is one of the key aspects that should be addressed in the design of the front-end electronics. This issue becomes particularly critical for systems with high channel counts and high density readout employing the front-end electronics built as multichannel ASICs implemented in modern CMOS technologies, for which the breakdown voltages are in the range of a few Volts. The paper presents the design of various input protection structures integrated in the ASIC manufactured in a 350 nm CMOS process and test results using an electrical circuit to mimic discharges in the detectors.

CUGatesDensity—Quantum circuit analyser extended to density matrices

NASA Astrophysics Data System (ADS)

Loke, T.; Wang, J. B.

2013-12-01

CUGatesDensity is an extension of the original quantum circuit analyser CUGates (Loke and Wang, 2011) [7] to provide explicit support for the use of density matrices. The new package enables simulation of quantum circuits involving statistical ensemble of mixed quantum states. Such analysis is of vital importance in dealing with quantum decoherence, measurements, noise and error correction, and fault tolerant computation. Several examples involving mixed state quantum computation are presented to illustrate the use of this package. Catalogue identifier: AEPY_v1_0 Program summary URL:http://cpc.cs.qub.ac.uk/summaries/AEPY_v1_0.html Program obtainable from: CPC Program Library, Queen’s University, Belfast, N. Ireland Licensing provisions: Standard CPC licence, http://cpc.cs.qub.ac.uk/licence/licence.html No. of lines in distributed program, including test data, etc.: 5368 No. of bytes in distributed program, including test data, etc.: 143994 Distribution format: tar.gz Programming language: Mathematica. Computer: Any computer installed with a copy of Mathematica 6.0 or higher. Operating system: Any system with a copy of Mathematica 6.0 or higher installed. Classification: 4.15. Nature of problem: To simulate arbitrarily complex quantum circuits comprised of single/multiple qubit and qudit quantum gates with mixed state registers. Solution method: A density matrix representation for mixed states and a state vector representation for pure states are used. The construct is based on an irreducible form of matrix decomposition, which allows a highly efficient implementation of general controlled gates with multiple conditionals. Running time: The examples provided in the notebook CUGatesDensity.nb take approximately 30 s to run on a laptop PC.

A Flipped First-Year Digital Circuits Course for Engineering and Technology Students

ERIC Educational Resources Information Center

Yelamarthi, Kumar; Drake, Eron

2015-01-01

This paper describes a flipped and improved first-year digital circuits (DC) course that incorporates several active learning strategies. With the primary objective of increasing student interest and learning, an integrated instructional design framework is proposed to provide first-year engineering and technology students with practical knowledge…

Metallic borophene polytypes as lightweight anode materials for non-lithium-ion batteries.

PubMed

Xiang, Pan; Chen, Xianfei; Zhang, Wentao; Li, Junfeng; Xiao, Beibei; Li, Longshan; Deng, Kuisen

2017-09-20

Applications of rechargeable non-lithium-ion batteries (Na + , K + , Ca 2+ , Mg 2+ , and Al 3+ NLIBs) are significantly hampered by the deficiency of suitable electrode materials. Searching for anode materials with desirable electrochemical performance is urgent for the large-scale energy storage demands of next generation renewable energy technologies. In this study, three types of recently synthesized borophenes are predicted to serve as high-performing anodes for NLIBs based on density functional theory. All the borophenes considered here are metallic with favorable in-plane stiffness. Dirac fermions were identified in two types of borophenes, guaranteeing their high electron mobility. Moreover, borophene configuration-dependent metal-ion migration, theoretical capacities, and open-circuit voltages were demonstrated with respect to the different adsorption behaviors and atom mass densities of anode materials. Our results provide insights into the configuration-dependent electrode performance of borophene and the corresponding metal-ion storage mechanism.

Possible Contribution of Nuclear Fragmentation Induced by High Energy Cosmic Protons to Single Effects Transients in Modern 3D Technology On-Board Devices

NASA Astrophysics Data System (ADS)

Chechenin, Nikolay; Chumanov, Vladimir; Kadmenskii, Anatolii

There is a tendency in modern integrated circuits manufacturing technology that in line with the growth of the density of transistors, the volume occupied by isolated conductive metallic layers on-chip also increases with copper and tungsten more frequently used instead of aluminum. Spallation reaction of 10 MeV to 1 GeV and above protons with tungsten and copper nuclei leads to formation of a large number of isotopes of elements from O to Ta. Experimental data on the cross sections of nuclear spallation reactions and average speed of residual nuclear fragments in inverse kinematics have been published in the last decade. In our report, we analyze the published data and evaluate ionization effects of the fragments from the reaction W (p, X) in the sensitive areas of transistors in microcircuit made by 3DIC technology with interlayer coupling by tungsten conductive pins (or vias), and metallic in-layer interconnection paths.

Entrainment and high-density three-dimensional mapping in right atrial macroreentry provide critical complementary information: Entrainment may unmask "visual reentry" as passive.

PubMed

Pathik, Bhupesh; Lee, Geoffrey; Nalliah, Chrishan; Joseph, Stephen; Morton, Joseph B; Sparks, Paul B; Sanders, Prashanthan; Kistler, Peter M; Kalman, Jonathan M

2017-10-01

With the recent advent of high-density (HD) 3-dimensional (3D) mapping, the utility of entrainment is uncertain. However, the limitations of visual representation and interpretation of these high-resolution 3D maps are unclear. The purpose of this study was to determine the strengths and limitations of both HD 3D mapping and entrainment mapping during mapping of right atrial macroreentry. Fifteen patients were studied. The number and type of circuits accounting for ≥90% of the tachycardia cycle length using HD 3D mapping were verified using systematic entrainment mapping. Entrainment sites with an unexpectedly long postpacing interval despite proximity to the active circuit were evaluated. Based on HD 3D mapping, 27 circuits were observed: 12 peritricuspid, 2 upper loop reentry, 10 lower loop reentry, and 3 lateral wall circuits. With entrainment, 17 of the 27 circuits were active: all 12 peritricuspid and 2 upper loop reentry. However, lower loop reentry was confirmed in only 3 of 10, and none of the 3 lateral wall circuits were present. Mean percentage of tachycardia cycle length covered by active circuits was 98% ± 1% vs 97% ± 2% for passive circuits (P = .09). None of the 345 entrainment runs terminated tachycardia or changed tachycardia mechanism. In 8 of 15 patients, 13 examples of unexpectedly long postpacing interval were observed at entrainment sites located distal to localized zones of slow conduction seen on HD 3D mapping. Using HD 3D mapping, "visual reentry" may be due to passive circuitous propagation rather than a critical reentrant circuit. HD 3D mapping provides new insights into regional conduction and helps explain unusual entrainment phenomena. Copyright © 2017 Heart Rhythm Society. Published by Elsevier Inc. All rights reserved.

Smart Power: New power integrated circuit technologies and their applications

NASA Astrophysics Data System (ADS)

Kuivalainen, Pekka; Pohjonen, Helena; Yli-Pietilae, Timo; Lenkkeri, Jaakko

1992-05-01

Power Integrated Circuits (PIC) is one of the most rapidly growing branches of the semiconductor technology. The PIC markets has been forecast to grow from 660 million dollars in 1990 to 1658 million dollars in 1994. It has even been forecast that at the end of the 1990's the PIC markets would correspond to the value of the whole semiconductor production in 1990. Automotive electronics will play the leading role in the development of the standard PIC's. Integrated motor drivers (36 V/4 A), smart integrated switches (60 V/30 A), solenoid drivers, integrated switch-mode power supplies and regulators are the latest standard devices of the PIC manufactures. ASIC (Application Specific Integrated Circuits) PIC solutions are needed for the same reasons as other ASIC devices: there are no proper standard devices, a company has a lot of application knowhow, which should be kept inside the company, the size of the product must be reduced, and assembly costs are wished to be reduced by decreasing the number of discrete devices. During the next few years the most probable ASIC PIC applications in Finland will be integrated solenoid and motor drivers, an integrated electronic lamp ballast circuit and various sensor interface circuits. Application of the PIC technologies to machines and actuators will strongly be increased all over the world. This means that various PIC's, either standard PIC's or full custom ASIC circuits, will appear in many products which compete with the corresponding Finnish products. Therefore the development of the PIC technologies must be followed carefully in order to immediately be able to apply the latest development in the smart power technologies and their design methods.

Polyfluorene light-emitting devices and amorphous silicon:hydrogen TFT pixel circuits for active-matrix organic light-emitting displays

NASA Astrophysics Data System (ADS)

He, Yi

2000-10-01

Organic light-emitting devices (OLEDs) made of single-layer and double-layer polymer thin films have been fabricated and studied. The hole transporting (polymer A) and emissive (polymer B) polymers were poly(9,9' -dioctyl fluorene-2,7-diyl)-co-poly(diphenyl-p-tolyl-amine-4,4 '-diyl) and poly(9,9'-dioctyl fluorene-2,7-diyl)-co-poly(benzothiadiazole 2,5-diyl), respectively. The optical bandgaps of polymer A and B were 2.72 and 2.82 eV, respectively. The photoluminescence (PL) peaks for polymer A and B were 502 and 546 nm, respectively. The electroluminescence (EL) peak for polymer B was 547 nm. No EL has been observed from polymer A single layer OLEDs. To obtain the spectral distribution of the emission properties of the light-emitting devices, a new light-output measurement technique was developed. Using this technique, the spectral distribution of the luminance, radiance, photon density emission can be obtained. Moreover, the device external quantum efficiency calculated using this technique is accurate and insensitive to the light emission spectrum shape. Organic light-emitting devices have been fabricated and studied on both glass and flexible plastic substrates. The OLEDs showed a near-linear relationship between the luminance and the applied current density over four orders of magnitude. For the OLEDs fabricated on the glass substrate, luminance ˜9,300 cd/m2, emission efficiency ˜14.5 cd/A, luminescence power efficiency ˜2.26 lm/W, and external quantum efficiency ˜3.85% have been achieved. For the OLEDs fabricated on the flexible plastic substrates, both aluminum and calcium were used as cathode materials. The achieved maximum OLED luminance, emission efficiency, luminescence power efficiency, and external quantum efficiency were ˜13,000 cd/m2, ˜66.1 cd/A, ˜17.2 lm/W, and 16.7%, respectively. To make an active-matrix organic light-emitting display (AM-OLED), a two-TFT pixel electrode circuit was designed and fabricated based on amorphous silicon TFT technology. This circuit was capable of providing continuous pixel excitation and a simple driving scheme. However, it showed an output current variation of ˜40% to 80% due to the drive TFT threshold voltage (V th) shift after long-term operation. To improve the pixel circuit electrical reliability, a four-TFT pixel electrode circuit was proposed and fabricated. This circuit only showed an output current variation <1% for the high currents (>0.5muA) even when a TFT Vth shift as large as 3V was present. This four-TFT pixel electrode circuit was used to fabricate small size active-matrix monochrome organic light-emitting display.

Effects of the unintentional background concentration, indium composition and defect density on the performance of InGaN p-i-n homojunction solar cells

NASA Astrophysics Data System (ADS)

Wu, Shudong; Cheng, Liwen; Wang, Qiang

2018-07-01

We theoretically investigate the effects of the unintentional background concentration, indium composition and defect density of intrinsic layer (i-layer) on the photovoltaic performance of InGaN p-i-n homojunction solar cells by solving the Poisson and steady-state continuity equations. The built-in electric field and carrier generation rate depend on the position within the i-layer. The collection efficiency, short circuit current density, open circuit voltage, fill factor, and conversion efficiency are found to depend strongly on the background concentration, thickness, indium composition, and defect density of the i-layer. With increasing the background concentration, the maximum thickness of field-bearing i-layer decreases, and the width of depletion region may become even too small to cover the whole i-layer, resulting in a serious decrease of the carrier collection. Some oscillations as a function of indium composition are found in the short circuit current density and conversion efficiency at high indium composition and low defect density due to the interference between the absorbance and the generation rate of carriers. The defect density degrades seriously the overall photovoltaic performance, and its effect on the photovoltaic performance is roughly seven orders of magnitude higher than the previously reported values [Feng et al., J. Appl. Phys. 108 (2010) 093118]. As a result, the high crystalline quality InGaN with high indium composition is a key factor in the device performance of III-nitride based solar cells.

Microwave integrated circuits for space applications

NASA Technical Reports Server (NTRS)

Leonard, Regis F.; Romanofsky, Robert R.

1991-01-01

Monolithic microwave integrated circuits (MMIC), which incorporate all the elements of a microwave circuit on a single semiconductor substrate, offer the potential for drastic reductions in circuit weight and volume and increased reliability, all of which make many new concepts in electronic circuitry for space applications feasible, including phased array antennas. NASA has undertaken an extensive program aimed at development of MMICs for space applications. The first such circuits targeted for development were an extension of work in hybrid (discrete component) technology in support of the Advanced Communication Technology Satellite (ACTS). It focused on power amplifiers, receivers, and switches at ACTS frequencies. More recent work, however, focused on frequencies appropriate for other NASA programs and emphasizes advanced materials in an effort to enhance efficiency, power handling capability, and frequency of operation or noise figure to meet the requirements of space systems.

High efficiency silicon solar cell based on asymmetric nanowire.

PubMed

Ko, Myung-Dong; Rim, Taiuk; Kim, Kihyun; Meyyappan, M; Baek, Chang-Ki

2015-07-08

Improving the efficiency of solar cells through novel materials and devices is critical to realize the full potential of solar energy to meet the growing worldwide energy demands. We present here a highly efficient radial p-n junction silicon solar cell using an asymmetric nanowire structure with a shorter bottom core diameter than at the top. A maximum short circuit current density of 27.5 mA/cm(2) and an efficiency of 7.53% were realized without anti-reflection coating. Changing the silicon nanowire (SiNW) structure from conventional symmetric to asymmetric nature improves the efficiency due to increased short circuit current density. From numerical simulation and measurement of the optical characteristics, the total reflection on the sidewalls is seen to increase the light trapping path and charge carrier generation in the radial junction of the asymmetric SiNW, yielding high external quantum efficiency and short circuit current density. The proposed asymmetric structure has great potential to effectively improve the efficiency of the SiNW solar cells.

In-plant testing of a novel coal cleaning circuit using advanced technologies. Final technical report, September 1, 1995--August 31, 1996

DOE Office of Scientific and Technical Information (OSTI.GOV)

Honaker, R.Q.; Reed, S.; Mohanty, M.K.

1997-05-01

A circuit comprised of advanced fine coal cleaning technologies was evaluated in an operating preparation plant to determine circuit performance and to compare the performance with current technologies used to treat -16 mesh fine coal. The circuit integrated a Floatex hydrosizer, a Falcon enhanced gravity concentrator and a Jameson flotation cell. A Packed-Column was used to provide additional reductions in the pyritic sulfur and ash contents by treatment of the Floatex-Falcon-Jameson circuit product. For a low sulfur Illinois No. 5 coal, the pyritic sulfur content was reduced from 0.67% to 0.34% at a combustible recovery of 93.2%. The ash contentmore » was decreased from 27.6% to 5.84%, which equates to an organic efficiency of 95% according to gravity-based washability data. The separation performance achieved on a high sulfur Illinois No. 5 coal resulted in the rejection of 72.7% of the pyritic sulfur and 82.3% of the ash-forming material at a recovery of 8 1 %. Subsequent pulverization of the cleaned product and retreatment in a Falcon concentrator and Packed-Column resulted in overall circuit ash and pyritic sulfur rejections of 89% and 93%, respectively, which yielded a pyritic sulfur content reduction from 2.43% to 0.30%. This separation reduced the sulfur dioxide emission rating of an Illinois No. 5 coal from 6.21 to 1.75 lbs SO{sub 2}/MBTU, which is Phase I compliance coal. A comparison of the results obtained from the Floatex-Falcon-Jameson circuit with those of the existing circuit revealed that the novel fine coal circuit provides 10% to 20% improvement in mass yield to the concentrate while rejecting greater amounts of ash and pyritic sulfur.« less

Technical Reliability Studies. EOS/ESD Technology Abstracts

DTIC Science & Technology

1982-01-01

RESISTANT BIPOLAR TRANSISTOR DESIGN AND ITS APPLICATIONS TO LINEAR INTEGRATED CIRCUITS 16145 MODULE ELECTROSTATIC DISCHARGE SIMULATOR 15786 SOME...T.M. 16476 STATIC DISCHARGE MODELING TECHNIQUES FOR EVALUATION OF INTEGRATED (FET) CIRCUIT DESTRUCTION 16145 MODULE ELECTAOSTATIC DISCHARGE SIMULATOR...PLASTIC LSI CIRCUITS PRklE, L.A., II 16145 MODULE ELECTROSTATIC DISCHARGE SIMULATOR PRICE, R.D. 13455 EVALUATION OF PLASTIC LSI CIRCUITS PSHAENICH, A

Electronic control circuits: A compilation

NASA Technical Reports Server (NTRS)

1973-01-01

A compilation of technical R and D information on circuits and modular subassemblies is presented as a part of a technology utilization program. Fundamental design principles and applications are given. Electronic control circuits discussed include: anti-noise circuit; ground protection device for bioinstrumentation; temperature compensation for operational amplifiers; hybrid gatling capacitor; automatic signal range control; integrated clock-switching control; and precision voltage tolerance detector.

Monolithic 3D CMOS Using Layered Semiconductors.

PubMed

Sachid, Angada B; Tosun, Mahmut; Desai, Sujay B; Hsu, Ching-Yi; Lien, Der-Hsien; Madhvapathy, Surabhi R; Chen, Yu-Ze; Hettick, Mark; Kang, Jeong Seuk; Zeng, Yuping; He, Jr-Hau; Chang, Edward Yi; Chueh, Yu-Lun; Javey, Ali; Hu, Chenming

2016-04-06

Monolithic 3D integrated circuits using transition metal dichalcogenide materials and low-temperature processing are reported. A variety of digital and analog circuits are implemented on two sequentially integrated layers of devices. Inverter circuit operation at an ultralow supply voltage of 150 mV is achieved, paving the way to high-density, ultralow-voltage, and ultralow-power applications. © 2016 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

High frequency capacitor-diode voltage multiplier dc-dc converter development

NASA Technical Reports Server (NTRS)

Kisch, J. J.; Martinelli, R. M.

1977-01-01

A power conditioner was developed which used a capacitor diode voltage multiplier to provide a high voltage without the use of a step-up transformer. The power conditioner delivered 1200 Vdc at 100 watts and was operated from a 120 Vdc line. The efficiency was in excess of 90 percent. The component weight was 197 grams. A modified boost-add circuit was used for the regulation. A short circuit protection circuit was used which turns off the drive circuit upon a fault condition, and recovers within 5 ms after removal of the short. High energy density polysulfone capacitors and high speed diodes were used in the multiplier circuit.

Designing an optimum pulsed magnetic field by a resistance/self-inductance/capacitance discharge system and alignment of carbon nanotubes embedded in polypyrrole matrix

NASA Astrophysics Data System (ADS)

Kazemikia, Kaveh; Bonabi, Fahimeh; Asadpoorchallo, Ali; Shokrzadeh, Majid

2015-02-01

In this work, an optimized pulsed magnetic field production apparatus is designed based on a RLC (Resistance/Self-inductance/Capacitance) discharge circuit. An algorithm for designing an optimum magnetic coil is presented. The coil is designed to work at room temperature. With a minor physical reinforcement, the magnetic flux density can be set up to 12 Tesla with 2 ms duration time. In our design process, the magnitude and the length of the magnetic pulse are the desired parameters. The magnetic field magnitude in the RLC circuit is maximized on the basis of the optimal design of the coil. The variables which are used in the optimization process are wire diameter and the number of coil layers. The coil design ensures the critically damped response of the RLC circuit. The electrical, mechanical, and thermal constraints are applied to the design process. A locus of probable magnetic flux density values versus wire diameter and coil layer is provided to locate the optimum coil parameters. Another locus of magnetic flux density values versus capacitance and initial voltage of the RLC circuit is extracted to locate the optimum circuit parameters. Finally, the application of high magnetic fields on carbon nanotube-PolyPyrrole (CNT-PPy) nano-composite is presented. Scanning probe microscopy technique is used to observe the orientation of CNTs after exposure to a magnetic field. The result shows alignment of CNTs in a 10.3 Tesla, 1.5 ms magnetic pulse.

A 90 GHz Amplifier Assembled Using a Bump-Bonded InP-Based HEMT

NASA Technical Reports Server (NTRS)

Pinsukanjana, Paul R.; Samoska, Lorene A.; Gaier, Todd C.; Smith, R. Peter; Ksendzov, Alexander; Fitzsimmons, Michael J.; Martin, Suzanne C.

1998-01-01

We report on the performance of a novel W-band amplifier fabricated utilizing very compact bump bonds. We bump-bonded a high-speed, low-noise InP high electron mobility transistor (HEMT) onto a separately fabricated passive circuit having a GaAs substrate. The compact bumps and small chip size were used for efficient coupling and maximum circuit design flexibility. This new quasi-monolithic millimeter-wave integrated circuit (Q-MMIC) amplifier exhibits a peak gain of 5.8 dB at approx. 90 GHz and a 3 dB bandwidth of greater than 25%. To our knowledge, this is the highest frequency amplifier assembled using bump-bonded technology. Our bump-bonding technique is a useful alternative to the high cost of monolithic millimeter-wave integrated circuits (MMIC's). Effects of the bumps on the circuit appear to be minimal. We used the simple matching circuit for demonstrating the technology - future circuits would have all of the elements (resistors, via holes, bias lines, etc.) included 'in conventional MMIC's. Our design in different from other investigators' efforts in that the bumps are only 8 microns thick by 15 microns wide. The bump sizes were sufficiently small that the devices, originally designed for W-band hybrid circuits, could be bonded without alteration. Figure 3 shows the measured and simulated magnitude of S-parameters from 85-120 GHz, of the InP HEMT bump-bonded to the low noise amplifier (LNA) passive. The maximum gain is 5.8 dB at approx. 90 GHz, and gain extends to 117 GHz. Measurement of a single device (without matching networks) shows approx. 1 dB of gain at 90 GHz. The measured gain of the amplifier agrees well with the design in the center of the measurement band, and the agreement falls off at the band edges. Since no accommodation for the bump-bonding parasitics was made in the design, the result implies that the parasitic elements associated with the bonding itself do not dominate the performance of the LNA circuit. It should be noted that this amplifier was designed for good noise performance, which is why the input and output return losses are poorer than one would expect for an amplifier simply matched for gain. However, noise performance has not been measured at this time. While the agreement between modeled vs. experimental data is not exact, the data prove that bump-bonded technology can be used for amplifiers at frequencies at least as high as 100 GHz. JPL is pursuing this technology as a way to economically and quickly incorporate the best available HEMTs into a circuit with all of the reliability and circuit design flexibility offered by MMIC technology. We are currently using the technology to fabricate 4-stage, wide-band, W-band LNA's. We have also performed pull and shear tests which show that the bump bonds are sufficiently robust for any anticipated application.

Relay Protection and Automation Systems Based on Programmable Logic Integrated Circuits

DOE Office of Scientific and Technical Information (OSTI.GOV)

Lashin, A. V., E-mail: LashinAV@lhp.ru; Kozyrev, A. V.

One of the most promising forms of developing the apparatus part of relay protection and automation devices is considered. The advantages of choosing programmable logic integrated circuits to obtain adaptive technological algorithms in power system protection and control systems are pointed out. The technical difficulties in the problems which today stand in the way of using relay protection and automation systems are indicated and a new technology for solving these problems is presented. Particular attention is devoted to the possibility of reconfiguring the logic of these devices, using programmable logic integrated circuits.

A general design strategy for block copolymer directed self-assembly patterning of integrated circuits contact holes using an alphabet approach.

PubMed

Yi, He; Bao, Xin-Yu; Tiberio, Richard; Wong, H-S Philip

2015-02-11

Directed self-assembly (DSA) is a promising lithography candidate for technology nodes beyond 14 nm. Researchers have shown contact hole patterning for random logic circuits using DSA with small physical templates. This paper introduces an alphabet approach that uses a minimal set of small physical templates to pattern all contacts configurations on integrated circuits. We illustrate, through experiments, a general and scalable template design strategy that links the DSA material properties to the technology node requirements.

Compact Circuit Preprocesses Accelerometer Output

NASA Technical Reports Server (NTRS)

Bozeman, Richard J., Jr.

1993-01-01

Compact electronic circuit transfers dc power to, and preprocesses ac output of, accelerometer and associated preamplifier. Incorporated into accelerometer case during initial fabrication or retrofit onto commercial accelerometer. Made of commercial integrated circuits and other conventional components; made smaller by use of micrologic and surface-mount technology.

A Virtual Circuits Lab

ERIC Educational Resources Information Center

Vick, Matthew E.

2010-01-01

The University of Colorado's Physics Education Technology (PhET) website offers free, high-quality simulations of many physics experiments that can be used in the classroom. The Circuit Construction Kit, for example, allows students to safely and constructively play with circuit components while learning the mathematics behind many circuit…

Fabrication of Ultra-Thin Printed Organic TFT CMOS Logic Circuits Optimized for Low-Voltage Wearable Sensor Applications.

PubMed

Takeda, Yasunori; Hayasaka, Kazuma; Shiwaku, Rei; Yokosawa, Koji; Shiba, Takeo; Mamada, Masashi; Kumaki, Daisuke; Fukuda, Kenjiro; Tokito, Shizuo

2016-05-09

Ultrathin electronic circuits that can be manufactured by using conventional printing technologies are key elements necessary to realize wearable health sensors and next-generation flexible electronic devices. Due to their low level of power consumption, complementary (CMOS) circuits using both types of semiconductors can be easily employed in wireless devices. Here, we describe ultrathin CMOS logic circuits, for which not only the source/drain electrodes but also the semiconductor layers were printed. Both p-type and n-type organic thin film transistor devices were employed in a D-flip flop circuit in the newly developed stacked structure and exhibited excellent electrical characteristics, including good carrier mobilities of 0.34 and 0.21 cm(2) V(-1) sec(-1), and threshold voltages of nearly 0 V with low operating voltages. These printed organic CMOS D-flip flop circuits exhibit operating frequencies of 75 Hz and demonstrate great potential for flexible and printed electronics technology, particularly for wearable sensor applications with wireless connectivity.

Fabrication of Ultra-Thin Printed Organic TFT CMOS Logic Circuits Optimized for Low-Voltage Wearable Sensor Applications

PubMed Central

Takeda, Yasunori; Hayasaka, Kazuma; Shiwaku, Rei; Yokosawa, Koji; Shiba, Takeo; Mamada, Masashi; Kumaki, Daisuke; Fukuda, Kenjiro; Tokito, Shizuo

2016-01-01

Ultrathin electronic circuits that can be manufactured by using conventional printing technologies are key elements necessary to realize wearable health sensors and next-generation flexible electronic devices. Due to their low level of power consumption, complementary (CMOS) circuits using both types of semiconductors can be easily employed in wireless devices. Here, we describe ultrathin CMOS logic circuits, for which not only the source/drain electrodes but also the semiconductor layers were printed. Both p-type and n-type organic thin film transistor devices were employed in a D-flip flop circuit in the newly developed stacked structure and exhibited excellent electrical characteristics, including good carrier mobilities of 0.34 and 0.21 cm2 V−1 sec−1, and threshold voltages of nearly 0 V with low operating voltages. These printed organic CMOS D-flip flop circuits exhibit operating frequencies of 75 Hz and demonstrate great potential for flexible and printed electronics technology, particularly for wearable sensor applications with wireless connectivity. PMID:27157914

Methods of fabricating applique circuits

DOEpatents

Dimos, Duane B.; Garino, Terry J.

1999-09-14

Applique circuits suitable for advanced packaging applications are introduced. These structures are particularly suited for the simple integration of large amounts (many nanoFarads) of capacitance into conventional integrated circuit and multichip packaging technology. In operation, applique circuits are bonded to the integrated circuit or other appropriate structure at the point where the capacitance is required, thereby minimizing the effects of parasitic coupling. An immediate application is to problems of noise reduction and control in modern high-frequency circuitry.

Multijunction high voltage concentrator solar cells

NASA Technical Reports Server (NTRS)

Valco, G. J.; Kapoor, V. J.; Evans, J. C.; Chai, A.-T.

1981-01-01

The standard integrated circuit technology has been developed to design and fabricate new innovative planar multi-junction solar cell chips for concentrated sunlight applications. This 1 cm x 1 cm cell consisted of several voltage generating regions called unit cells which were internally connected in series within a single chip resulting in high open circuit voltages. Typical open-circuit voltages of 3.6 V and short-circuit currents of 90 ma were obtained at 80 AM1 suns. A dramatic increase in both short circuit current and open circuit voltage with increased light levels was observed.

Negative Difference Resistance and Its Application to Construct Boolean Logic Circuits

NASA Astrophysics Data System (ADS)

Nikodem, Maciej; Bawiec, Marek A.; Surmacz, Tomasz R.

Electronic circuits based on nanodevices and quantum effect are the future of logic circuits design. Today's technology allows constructing resonant tunneling diodes, quantum cellular automata and nanowires/nanoribbons that are the elementary components of threshold gates. However, synthesizing a threshold circuit for an arbitrary logic function is still a challenging task where no efficient algorithms exist. This paper focuses on Generalised Threshold Gates (GTG), giving the overview of threshold circuit synthesis methods and presenting an algorithm that considerably simplifies the task in case of GTG circuits.

A second generation 50 Mbps VLSI level zero processing system prototype

NASA Technical Reports Server (NTRS)

Harris, Jonathan C.; Shi, Jeff; Speciale, Nick; Bennett, Toby

1994-01-01

Level Zero Processing (LZP) generally refers to telemetry data processing functions performed at ground facilities to remove all communication artifacts from instrument data. These functions typically include frame synchronization, error detection and correction, packet reassembly and sorting, playback reversal, merging, time-ordering, overlap deletion, and production of annotated data sets. The Data Systems Technologies Division (DSTD) at Goddard Space Flight Center (GSFC) has been developing high-performance Very Large Scale Integration Level Zero Processing Systems (VLSI LZPS) since 1989. The first VLSI LZPS prototype demonstrated 20 Megabits per second (Mbp's) capability in 1992. With a new generation of high-density Application-specific Integrated Circuits (ASIC) and a Mass Storage System (MSS) based on the High-performance Parallel Peripheral Interface (HiPPI), a second prototype has been built that achieves full 50 Mbp's performance. This paper describes the second generation LZPS prototype based upon VLSI technologies.

Organo-erbium systems for optical amplification at telecommunications wavelengths.

PubMed

Ye, H Q; Li, Z; Peng, Y; Wang, C C; Li, T Y; Zheng, Y X; Sapelkin, A; Adamopoulos, G; Hernández, I; Wyatt, P B; Gillin, W P

2014-04-01

Modern telecommunications rely on the transmission and manipulation of optical signals. Optical amplification plays a vital part in this technology, as all components in a real telecommunications system produce some loss. The two main issues with present amplifiers, which rely on erbium ions in a glass matrix, are the difficulty in integration onto a single substrate and the need of high pump power densities to produce gain. Here we show a potential organic optical amplifier material that demonstrates population inversion when pumped from above using low-power visible light. This system is integrated into an organic light-emitting diode demonstrating that electrical pumping can be achieved. This opens the possibility of direct electrically driven optical amplifiers and optical circuits. Our results provide an alternative approach to producing low-cost integrated optics that is compatible with existing silicon photonics and a different route to an effective integrated optics technology.

Basic EMC (Electromagnetic compatibility) technology advancement for C3 (Command, control, and communications) systems. Volume 6

NASA Astrophysics Data System (ADS)

Weiner, D.; Paul, C. R.; Whalen, J.

1985-04-01

This research effort was devoted to eliminating some of the basic technological gaps in the two important areas of: (1) electromagnetic effects (EM) on microelectronic circuits and (2) EM coupling and testing. The results are presented in fourteen reports which have been organized into six volumes. The reports are briefly summarized in this volume. In addition, an experiment is described which was performed to demonstrate the feasibility of applying several of the results to a problem involving electromagnetic interference. Specifically, experimental results are provided for the randomness associated with: (1) crosstalk in cable harnesses and (2) demodulation of amplitude modulated (AM) signals in operational amplifiers. These results are combined to predict candidate probability density functions (pdf's) for the amplitude of an AM interfering signal required to turn on a light emitting diode. The candidate pdf's are shown to be statistically consistent with measured data.

Effect of dislocations on the open-circuit voltage, short-circuit current and efficiency of heteroepitaxial indium phosphide solar cells

NASA Technical Reports Server (NTRS)

Jain, Raj K.; Flood, Dennis J.

1990-01-01

Excellent radiation resistance of indium phosphide solar cells makes them a promising candidate for space power applications, but the present high cost of starting substrates may inhibit their large scale use. Thin film indium phosphide cells grown on Si or GaAs substrates have exhibited low efficiencies, because of the generation and propagation of large number of dislocations. Dislocation densities were calculated and its influence on the open circuit voltage, short circuit current, and efficiency of heteroepitaxial indium phosphide cells was studied using the PC-1D. Dislocations act as predominant recombination centers and are required to be controlled by proper transition layers and improved growth techniques. It is shown that heteroepitaxial grown cells could achieve efficiencies in excess of 18 percent AMO by controlling the number of dislocations. The effect of emitter thickness and surface recombination velocity on the cell performance parameters vs. dislocation density is also studied.

11.4% Efficiency non-fullerene polymer solar cells with trialkylsilyl substituted 2D-conjugated polymer as donor

PubMed Central

Bin, Haijun; Gao, Liang; Zhang, Zhi-Guo; Yang, Yankang; Zhang, Yindong; Zhang, Chunfeng; Chen, Shanshan; Xue, Lingwei; Yang, Changduk; Xiao, Min; Li, Yongfang

2016-01-01

Simutaneously high open circuit voltage and high short circuit current density is a big challenge for achieving high efficiency polymer solar cells due to the excitonic nature of organic semdonductors. Herein, we developed a trialkylsilyl substituted 2D-conjugated polymer with the highest occupied molecular orbital level down-shifted by Si–C bond interaction. The polymer solar cells obtained by pairing this polymer with a non-fullerene acceptor demonstrated a high power conversion efficiency of 11.41% with both high open circuit voltage of 0.94 V and high short circuit current density of 17.32 mA cm−2 benefitted from the complementary absorption of the donor and acceptor, and the high hole transfer efficiency from acceptor to donor although the highest occupied molecular orbital level difference between the donor and acceptor is only 0.11 eV. The results indicate that the alkylsilyl substitution is an effective way in designing high performance conjugated polymer photovoltaic materials. PMID:27905397

11.4% Efficiency non-fullerene polymer solar cells with trialkylsilyl substituted 2D-conjugated polymer as donor.

PubMed

Bin, Haijun; Gao, Liang; Zhang, Zhi-Guo; Yang, Yankang; Zhang, Yindong; Zhang, Chunfeng; Chen, Shanshan; Xue, Lingwei; Yang, Changduk; Xiao, Min; Li, Yongfang

2016-12-01

Simutaneously high open circuit voltage and high short circuit current density is a big challenge for achieving high efficiency polymer solar cells due to the excitonic nature of organic semdonductors. Herein, we developed a trialkylsilyl substituted 2D-conjugated polymer with the highest occupied molecular orbital level down-shifted by Si-C bond interaction. The polymer solar cells obtained by pairing this polymer with a non-fullerene acceptor demonstrated a high power conversion efficiency of 11.41% with both high open circuit voltage of 0.94 V and high short circuit current density of 17.32 mA cm -2 benefitted from the complementary absorption of the donor and acceptor, and the high hole transfer efficiency from acceptor to donor although the highest occupied molecular orbital level difference between the donor and acceptor is only 0.11 eV. The results indicate that the alkylsilyl substitution is an effective way in designing high performance conjugated polymer photovoltaic materials.

Compact atmospheric pressure plasma self-resonant drive circuits

NASA Astrophysics Data System (ADS)

Law, V. J.; Anghel, S. D.

2012-02-01

This paper reports on compact solid-state self-resonant drive circuits that are specifically designed to drive an atmospheric pressure plasma jet and a parallel-plate dielectric barrier discharge of small volume (0.5 cm3). The atmospheric pressure plasma (APP) device can be operated with helium, argon or a mixture of both. Equivalent electrical models of the self-resonant drive circuits and discharge are developed and used to estimate the plasma impedance, plasma power density, current density or electron number density of three APP devices. These parameters and the kinetic gas temperature are dependent on the self-resonant frequency of the APP device. For a fixed switching frequency and APP device geometry, the plasma parameters are controlled by adjusting the dc voltage at the primary coil and the gas flow rate. The resonant frequency is controlled by the selection of the switching power transistor and means of step-up voltage transformation (ferrite core, flyback transformer, or Tesla coil). The flyback transformer operates in the tens of kHz, the ferrite core in the hundreds of kHz and Tesla coil in the MHz range. Embedded within this work is the principle of frequency pulling which is exemplified in the flyback transformer circuit that utilizes a pickup coil for feedback control of the switching frequency.

Mask induction despite circuit obstruction: an unrecognized hazard of relying on automated machine check technology.

PubMed

Yang, Kamie K; Lewis, Ian H

2014-06-15

Various equipment malfunctions of anesthesia gas delivery systems have been previously reported. Our profession increasingly uses technology as a means to prevent these errors. We report a case of a near-total anesthesia circuit obstruction that went undetected before the induction of anesthesia despite the use of automated machine check technology. This case highlights that automated machine check modules can fail to detect severe equipment failure and demonstrates how, even in this era of expanding technology, manual checks still remain essential components of safe care.

Enhanced charging kinetics of porous electrodes: surface conduction as a short-circuit mechanism.

PubMed

Mirzadeh, Mohammad; Gibou, Frederic; Squires, Todd M

2014-08-29

We use direct numerical simulations of the Poisson-Nernst-Planck equations to study the charging kinetics of porous electrodes and to evaluate the predictive capabilities of effective circuit models, both linear and nonlinear. The classic transmission line theory of de Levie holds for general electrode morphologies, but only at low applied potentials. Charging dynamics are slowed appreciably at high potentials, yet not as significantly as predicted by the nonlinear transmission line model of Biesheuvel and Bazant. We identify surface conduction as a mechanism which can effectively "short circuit" the high-resistance electrolyte in the bulk of the pores, thus accelerating the charging dynamics and boosting power densities. Notably, the boost in power density holds only for electrode morphologies with continuous conducting surfaces in the charging direction.

Charge Transport in Carbon Nanotubes-Polymer Composite Photovoltaic Cells

PubMed Central

Ltaief, Adnen; Bouazizi, Abdelaziz; Davenas, Joel

2009-01-01

We investigate the dark and illuminated current density-voltage (J/V) characteristics of poly(2-methoxy-5-(2’-ethylhexyloxy)1-4-phenylenevinylene) (MEH-PPV)/single-walled carbon nanotubes (SWNTs) composite photovoltaic cells. Using an exponential band tail model, the conduction mechanism has been analysed for polymer only devices and composite devices, in terms of space charge limited current (SCLC) conduction mechanism, where we determine the power parameters and the threshold voltages. Elaborated devices for MEH-PPV:SWNTs (1:1) composites showed a photoresponse with an open-circuit voltage Voc of 0.4 V, a short-circuit current density JSC of 1 µA/cm² and a fill factor FF of 43%. We have modelised the organic photovoltaic devices with an equivalent circuit, where we calculated the series and shunt resistances.

Effect of the structure and mechanical properties of the near-surface layer of lithium niobate single crystals on the manufacture of integrated optic circuits

NASA Astrophysics Data System (ADS)

Sosunov, A. V.; Ponomarev, R. S.; Yur'ev, V. A.; Volyntsev, A. B.

2017-01-01

This paper shows that the near-surface layer of a lithium niobate single layer 15 μm in depth is essentially different from the rest of the volume of the material from the standpoint of composition, structure, and mechanical properties. The pointed out differences are due to the effect of cutting, polishing, and smoothing of the lithium niobate plates, which increase the density of point defects and dislocations. The increasing density of the structural defects leads to uncontrollable changes in the conditions of the formations of waveguides and the drifting of characteristics of integrated optical circuits. The results obtained are very important for the manufacture of lithium niobate based integrated optical circuits.

Compiler-aided systematic construction of large-scale DNA strand displacement circuits using unpurified components

NASA Astrophysics Data System (ADS)

Thubagere, Anupama J.; Thachuk, Chris; Berleant, Joseph; Johnson, Robert F.; Ardelean, Diana A.; Cherry, Kevin M.; Qian, Lulu

2017-02-01

Biochemical circuits made of rationally designed DNA molecules are proofs of concept for embedding control within complex molecular environments. They hold promise for transforming the current technologies in chemistry, biology, medicine and material science by introducing programmable and responsive behaviour to diverse molecular systems. As the transformative power of a technology depends on its accessibility, two main challenges are an automated design process and simple experimental procedures. Here we demonstrate the use of circuit design software, combined with the use of unpurified strands and simplified experimental procedures, for creating a complex DNA strand displacement circuit that consists of 78 distinct species. We develop a systematic procedure for overcoming the challenges involved in using unpurified DNA strands. We also develop a model that takes synthesis errors into consideration and semi-quantitatively reproduces the experimental data. Our methods now enable even novice researchers to successfully design and construct complex DNA strand displacement circuits.

Building the vision, a series of AZTech ITS model deployment success stories for the Phoenix metropolitan area : number seven : spectacular views sharing closed circuit TV between operations centers

DOT National Transportation Integrated Search

1998-01-01

Advanced communications technology is the engine that continually moves AZTech closer to its goal of integrating transportation systems throughout the region. At the heart of this technology is a state-of-the-art Closed Circuit Television (CCTV) syst...

Large scale in vivo recordings to study neuronal biophysics.

PubMed

Giocomo, Lisa M

2015-06-01

Over the last several years, technological advances have enabled researchers to more readily observe single-cell membrane biophysics in awake, behaving animals. Studies utilizing these technologies have provided important insights into the mechanisms generating functional neural codes in both sensory and non-sensory cortical circuits. Crucial for a deeper understanding of how membrane biophysics control circuit dynamics however, is a continued effort to move toward large scale studies of membrane biophysics, in terms of the numbers of neurons and ion channels examined. Future work faces a number of theoretical and technical challenges on this front but recent technological developments hold great promise for a larger scale understanding of how membrane biophysics contribute to circuit coding and computation. Copyright © 2014 Elsevier Ltd. All rights reserved.

High-speed logic integrated circuits with solution-processed self-assembled carbon nanotubes

NASA Astrophysics Data System (ADS)

Han, Shu-Jen; Tang, Jianshi; Kumar, Bharat; Falk, Abram; Farmer, Damon; Tulevski, George; Jenkins, Keith; Afzali, Ali; Oida, Satoshi; Ott, John; Hannon, James; Haensch, Wilfried

2017-09-01

As conventional monolithic silicon technology struggles to meet the requirements for the 7-nm technology node, there has been tremendous progress in demonstrating the scalability of carbon nanotube field-effect transistors down to the size that satisfies the 3-nm node and beyond. However, to date, circuits built with carbon nanotubes have overlooked key aspects of a practical logic technology and have stalled at simple functionality demonstrations. Here, we report high-performance complementary carbon nanotube ring oscillators using fully manufacturable processes, with a stage switching frequency of 2.82 GHz. The circuit was built on solution-processed, self-assembled carbon nanotube arrays with over 99.9% semiconducting purity, and the complementary feature was achieved by employing two different work function electrodes.

High-speed logic integrated circuits with solution-processed self-assembled carbon nanotubes.

PubMed

Han, Shu-Jen; Tang, Jianshi; Kumar, Bharat; Falk, Abram; Farmer, Damon; Tulevski, George; Jenkins, Keith; Afzali, Ali; Oida, Satoshi; Ott, John; Hannon, James; Haensch, Wilfried

2017-09-01

As conventional monolithic silicon technology struggles to meet the requirements for the 7-nm technology node, there has been tremendous progress in demonstrating the scalability of carbon nanotube field-effect transistors down to the size that satisfies the 3-nm node and beyond. However, to date, circuits built with carbon nanotubes have overlooked key aspects of a practical logic technology and have stalled at simple functionality demonstrations. Here, we report high-performance complementary carbon nanotube ring oscillators using fully manufacturable processes, with a stage switching frequency of 2.82 GHz. The circuit was built on solution-processed, self-assembled carbon nanotube arrays with over 99.9% semiconducting purity, and the complementary feature was achieved by employing two different work function electrodes.

Advanced 3-V semiconductor technology assessment

NASA Technical Reports Server (NTRS)

Nowogrodzki, M.

1983-01-01

Components required for extensions of currently planned space communications systems are discussed for large antennas, crosslink systems, single sideband systems, Aerostat systems, and digital signal processing. Systems using advanced modulation concepts and new concepts in communications satellites are included. The current status and trends in materials technology are examined with emphasis on bulk growth of semi-insulating GaAs and InP, epitaxial growth, and ion implantation. Microwave solid state discrete active devices, multigigabit rate GaAs digital integrated circuits, microwave integrated circuits, and the exploratory development of GaInAs devices, heterojunction devices, and quasi-ballistic devices is considered. Competing technologies such as RF power generation, filter structures, and microwave circuit fabrication are discussed. The fundamental limits of semiconductor devices and problems in implementation are explored.

Product assurance technology for procuring reliable, radiation-hard, custom LSI/VLSI electronics

NASA Technical Reports Server (NTRS)

Buehler, M. G.; Allen, R. A.; Blaes, B. R.; Hicks, K. A.; Jennings, G. A.; Lin, Y.-S.; Pina, C. A.; Sayah, H. R.; Zamani, N.

1989-01-01

Advanced measurement methods using microelectronic test chips are described. These chips are intended to be used in acquiring the data needed to qualify Application Specific Integrated Circuits (ASIC's) for space use. Efforts were focused on developing the technology for obtaining custom IC's from CMOS/bulk silicon foundries. A series of test chips were developed: a parametric test strip, a fault chip, a set of reliability chips, and the CRRES (Combined Release and Radiation Effects Satellite) chip, a test circuit for monitoring space radiation effects. The technical accomplishments of the effort include: (1) development of a fault chip that contains a set of test structures used to evaluate the density of various process-induced defects; (2) development of new test structures and testing techniques for measuring gate-oxide capacitance, gate-overlap capacitance, and propagation delay; (3) development of a set of reliability chips that are used to evaluate failure mechanisms in CMOS/bulk: interconnect and contact electromigration and time-dependent dielectric breakdown; (4) development of MOSFET parameter extraction procedures for evaluating subthreshold characteristics; (5) evaluation of test chips and test strips on the second CRRES wafer run; (6) two dedicated fabrication runs for the CRRES chip flight parts; and (7) publication of two papers: one on the split-cross bridge resistor and another on asymmetrical SRAM (static random access memory) cells for single-event upset analysis.

A new generation of ultra-dense optical I/O for silicon photonics

NASA Astrophysics Data System (ADS)

Wlodawski, Mitchell S.; Kopp, Victor I.; Park, Jongchul; Singer, Jonathan; Hubner, Eric E.; Neugroschl, Daniel; Chao, Norman; Genack, Azriel Z.

2014-03-01

In response to the optical packaging needs of a rapidly growing silicon photonics market, Chiral Photonics, Inc. (CPI) has developed a new generation of ultra-dense-channel, bi-directional, all-optical, input/output (I/O) couplers that bridge the data transport gap between standard optical fibers and photonic integrated circuits. These couplers, called Pitch Reducing Optical Fiber Arrays (PROFAs), provide a means to simultaneously match both the mode field and channel spacing (i.e. pitch) between an optical fiber array and a photonic integrated circuit (PIC). Both primary methods for optically interfacing with PICs, via vertical grating couplers (VGCs) and edge couplers, can be addressed with PROFAs. PROFAs bring the signal-carrying cores, either multimode or singlemode, of many optical fibers into close proximity within an all-glass device that can provide low loss coupling to on-chip components, including waveguides, gratings, detectors and emitters. Two-dimensional (2D) PROFAs offer more than an order of magnitude enhancement in channel density compared to conventional one-dimensional (1D) fiber arrays. PROFAs can also be used with low vertical profile solutions that simplify optoelectronic packaging while reducing PIC I/O real estate usage requirements. PROFA technology is based on a scalable production process for microforming glass preform assemblies as they are pulled through a small oven. An innovative fiber design, called the "vanishing core," enables tailoring the mode field along the length of the PROFA to meet the coupling needs of disparate waveguide technologies, such as fiber and onchip. Examples of single- and multi-channel couplers fabricated using this technology will be presented.

Survey of key technologies on millimeter-wave CMOS integrated circuits

NASA Astrophysics Data System (ADS)

Yu, Fei; Gao, Lei; Li, Lixiang; Cai, Shuo; Wang, Wei; Wang, Chunhua

2018-05-01

In order to provide guidance for the development of high performance millimeter-wave complementary metal oxide semiconductor (MMW-CMOS) integrated circuits (IC), this paper provides a survey of key technologies on MMW-CMOS IC. Technical background of MMW wireless communications is described. Then the recent development of the critical technologies of the MMW-CMOS IC are introduced in detail and compared. A summarization is given, and the development prospects on MMW-CMOS IC are also discussed.

Space shuttle main engine controller assembly, phase C-D. [with lagging system design and analysis

NASA Technical Reports Server (NTRS)

1973-01-01

System design and system analysis and simulation are slightly behind schedule, while design verification testing has improved. Input/output circuit design has improved, but digital computer unit (DCU) and mechanical design continue to lag. Part procurement was impacted by delays in printed circuit board, assembly drawing releases. These are the result of problems in generating suitable printed circuit artwork for the very complex and high density multilayer boards.

CMOS output buffer wave shaper

NASA Technical Reports Server (NTRS)

Albertson, L.; Whitaker, S.; Merrell, R.

1990-01-01

As the switching speeds and densities of Digital CMOS integrated circuits continue to increase, output switching noise becomes more of a problem. A design technique which aids in the reduction of switching noise is reported. The output driver stage is analyzed through the use of an equivalent RLC circuit. The results of the analysis are used in the design of an output driver stage. A test circuit based on these techniques is being submitted to MOSIS for fabrication.

Small-bandgap polymer solar cells with unprecedented short-circuit current density and high fill factor.

PubMed

Choi, Hyosung; Ko, Seo-Jin; Kim, Taehyo; Morin, Pierre-Olivier; Walker, Bright; Lee, Byoung Hoon; Leclerc, Mario; Kim, Jin Young; Heeger, Alan J

2015-06-03

Small-bandgap polymer solar cells (PSCs) with a thick bulk heterojunction film of 340 nm exhibit high power conversion efficiencies of 9.40% resulting from high short-circuit current density (JSC ) of 20.07 mA cm(-2) and fill factor of 0.70. This remarkable efficiency is attributed to maximized light absorption by the thick active layer and minimized recombination by the optimized lateral and vertical morphology through the processing additive. © 2015 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

A continuously pulsed copper halide laser with a cable-capacitor Blumlein discharge circuit

NASA Technical Reports Server (NTRS)

Nerheim, N. M.; Bhanji, A. M.; Russell, G. R.

1978-01-01

Experimental characteristics of a continuously pulsed copper halide laser with a cable-capacitor Blumlein discharge circuit are reported. Quartz laser tubes 1 m in length and 1.5 and 2.5 cm in diameter were employed to study the effects of the electrical circuit, lasant, and buffer gas on laser performance. Measured properties of the Blumlein circuit are compared with an analytic solution for an idealized circuit. Both CuCl and CuBr with neon and helium buffer gas were studied. A maximum average power of 12.5 W was obtained with a 1.5 nF capacitor charged to 8 kV and discharged at 31 kHz with CuCl and neon buffer gas at 0.7 kPa in a 2.5-cm-diam tube. A maximum efficiency of 0.72 percent was obtained at 9 W average power. Measurements of the radial distribution of the power in the laser beam and the variation of laser power at 510.6 and 578.2 nm with halide vapor density are also reported. Double and continuously pulsed laser characteristics are compared, and the role of copper metastable level atoms in limiting the laser pulse energy density is discussed.

The new technological solution for the JT-60SA quench protection circuits

NASA Astrophysics Data System (ADS)

Gaio, E.; Maistrello, A.; Novello, L.; Matsukawa, M.; Perna, M.; Ferro, A.; Yamauchi, K.; Piovan, R.

2018-07-01

An advanced technology has been developed and employed for the main circuit breakers (CB) of the quench protection circuits (QPC) of the superconducting coils of JT-60SA: it consists in a Hybrid mechanical-static CB (HCB) composed of a mechanical Bypass switch (BPS) for conducting the continuous current, in parallel to a static circuit breaker (SCB) based on integrated gate commutated thyristor (IGCT) for current interruption. It was the result of a R&D program carried out since 2006 to identify innovative solutions for the interruption of high dc current, able to improve the maintainability and availability of the CB. The HCB developed for the JT-60SA QPC is the first realization of a dc circuit breaker based on this design approach for interrupting current of some tens of kA with reapplied voltage of some kV. It also represents the first application of hybrid technology with IGCT for protection of superconducting magnets in fusion experiments. The paper aims at giving a comprehensive overview of the main R&D activities devoted to the development of this new technological approach; then, the key aspects of the design, manufacturing and testing of the QPCs for JT-60SA, successfully completed in Naka Site in summer 2015 are presented. Finally, the significance of this research is discussed and the possible future developments, in particular in view of DEMO fusion reactor, are outlined.

GaAs optoelectronic neuron arrays

NASA Technical Reports Server (NTRS)

Lin, Steven; Grot, Annette; Luo, Jiafu; Psaltis, Demetri

1993-01-01

A simple optoelectronic circuit integrated monolithically in GaAs to implement sigmoidal neuron responses is presented. The circuit integrates a light-emitting diode with one or two transistors and one or two photodetectors. The design considerations for building arrays with densities of up to 10,000/sq cm are discussed.

Developing 300°C Ceramic Circuit Boards

DOE Office of Scientific and Technical Information (OSTI.GOV)

Normann, Randy A

2015-02-15

This paper covers the development of a geothermal ceramic circuit board technology using 3D traces in a machinable ceramic. Test results showing the circuit board to be operational to at least 550°C. Discussion on producing this type of board is outlined along with areas needing improvement.

Additive manufacturing of hybrid circuits

DOE PAGES

Bell, Nelson S.; Sarobol, Pylin; Cook, Adam; ...

2016-03-26

There is a rising interest in developing functional electronics using additively manufactured components. Considerations in materials selection and pathways to forming hybrid circuits and devices must demonstrate useful electronic function; must enable integration; and must complement the complex shape, low cost, high volume, and high functionality of structural but generally electronically passive additively manufactured components. This article reviews several emerging technologies being used in industry and research/development to provide integration advantages of fabricating multilayer hybrid circuits or devices. First, we review a maskless, noncontact, direct write (DW) technology that excels in the deposition of metallic colloid inks for electrical interconnects.more » Second, we review a complementary technology, aerosol deposition (AD), which excels in the deposition of metallic and ceramic powder as consolidated, thick conformal coatings and is additionally patternable through masking. As a result, we show examples of hybrid circuits/devices integrated beyond 2-D planes, using combinations of DW or AD processes and conventional, established processes.« less

Radiation Testing and Evaluation Issues for Modern Integrated Circuits

NASA Technical Reports Server (NTRS)

LaBel, Kenneth A.; Cohn, Lew M.

2005-01-01

Abstract. Changes in modern integrated circuit (IC) technologies have modified the way we approach and conduct radiation tolerance and testing of electronics. These changes include scaling of geometries, new materials, new packaging technologies, and overall speed and device complexity challenges. In this short course section, we will identify and discuss these issues as they impact radiation testing, modeling, and effects mitigation of modern integrated circuits. The focus will be on CMOS-based technologies, however, other high performance technologies will be discussed where appropriate. The effects of concern will be: Single-Event Effects (SEE) and steady state total ionizing dose (TID) IC response. However, due to the growing use of opto-electronics in space systems issues concerning displacement damage testing will also be considered. This short course section is not intended to provide detailed "how-to-test" information, but simply provide a snapshot of current challenges and some of the approaches being considered.

NREL Collaboration Breaks 1-Volt Barrier in CdTe Solar Technology

DOE Office of Scientific and Technical Information (OSTI.GOV)

2016-05-01

NREL scientists have worked with Washington State University and the University of Tennessee to improve the maximum voltage available from CdTe solar cells. Changes in dopants, stoichiometry, interface design, and defect chemistry improved the CdTe conductivity and carrier lifetime by orders of magnitude, thus enabling CdTe solar cells with open-circuit voltages exceeding 1 volt for the first time. Values of current density and fill factor for CdTe solar cells are already at high levels, but sub-par voltages has been a barrier to improved efficiencies. With voltages pushed beyond 1 volt, CdTe cells have a path to produce electricity at costsmore » less than fossil fuels.« less

Illuminating Neural Circuits: From Molecules to MRI.

PubMed

Lee, Jin Hyung; Kreitzer, Anatol C; Singer, Annabelle C; Schiff, Nicholas D

2017-11-08

Neurological disease drives symptoms through pathological changes to circuit functions. Therefore, understanding circuit mechanisms that drive behavioral dysfunction is of critical importance for quantitative diagnosis and systematic treatment of neurological disease. Here, we describe key technologies that enable measurement and manipulation of neural activity and neural circuits. Applying these approaches led to the discovery of circuit mechanisms underlying pathological motor behavior, arousal regulation, and protein accumulation. Finally, we discuss how optogenetic functional magnetic resonance imaging reveals global scale circuit mechanisms, and how circuit manipulations could lead to new treatments of neurological diseases. Copyright © 2017 the authors 0270-6474/17/3710817-09$15.00/0.

Laser Integration on Silicon Photonic Circuits Through Transfer Printing

DTIC Science & Technology

2017-03-10

AFRL-AFOSR-UK-TR-2017-0019 Laser integration on silicon photonic circuits through transfer printing Gunther Roelkens UNIVERSITEIT GENT VZW Final...TYPE Final 3. DATES COVERED (From - To) 15 Sep 2015 to 14 Sep 2016 4. TITLE AND SUBTITLE Laser integration on silicon photonic circuits through...parallel integration of III-V lasers on silicon photonic integrated circuits. The report discusses the technological process that has been developed as

The Voltage Distribution Characteristics of a Hybrid Circuit Breaker During High Current Interruption

NASA Astrophysics Data System (ADS)

Cheng, Xian; Duan, Xiongying; Liao, Minfu; Huang, Zhihui; Luo, Yan; Zou, Jiyan

2013-08-01

Hybrid circuit breaker (HCB) technology based on a vacuum interrupter and a SF6 interrupter in series has become a new research direction because of the low-carbon requirements for high voltage switches. The vacuum interrupter has an excellent ability to deal with the steep rising part of the transient recovery voltage (TRV), while the SF6 interrupter can withstand the peak part of the voltage easily. An HCB can take advantage of the interrupters in the current interruption process. In this study, an HCB model based on the vacuum ion diffusion equations, ion density equation, and modified Cassie-Mayr arc equation is explored. A simulation platform is constructed by using a set of software called the alternative transient program (ATP). An HCB prototype is also designed, and the short circuit current is interrupted by the HCB under different action sequences of contacts. The voltage distribution of the HCB is analyzed through simulations and tests. The results demonstrate that if the vacuum interrupter withstands the initial TRV and interrupts the post-arc current first, then the recovery speed of the dielectric strength of the SF6 interrupter will be fast. The voltage distribution between two interrupters is determined by their post-arc resistance, which happens after current-zero, and subsequently, it is determined by the capacitive impedance after the post-arc current decays to zero.

Technology CAD for integrated circuit fabrication technology development and technology transfer

NASA Astrophysics Data System (ADS)

Saha, Samar

2003-07-01

In this paper systematic simulation-based methodologies for integrated circuit (IC) manufacturing technology development and technology transfer are presented. In technology development, technology computer-aided design (TCAD) tools are used to optimize the device and process parameters to develop a new generation of IC manufacturing technology by reverse engineering from the target product specifications. While in technology transfer to manufacturing co-location, TCAD is used for process centering with respect to high-volume manufacturing equipment of the target manufacturing equipment of the target manufacturing facility. A quantitative model is developed to demonstrate the potential benefits of the simulation-based methodology in reducing the cycle time and cost of typical technology development and technology transfer projects over the traditional practices. The strategy for predictive simulation to improve the effectiveness of a TCAD-based project, is also discussed.

Development of analog watch with minute repeater

NASA Astrophysics Data System (ADS)

Okigami, Tomio; Aoyama, Shigeru; Osa, Takashi; Igarashi, Kiyotaka; Ikegami, Tomomi

A complementary metal oxide semiconductor with large scale integration was developed for an electronic minute repeater. It is equipped with the synthetic struck sound circuit to generate natural struck sound necessary for the minute repeater. This circuit consists of an envelope curve drawing circuit, frequency mixer, polyphonic mixer, and booster circuit made by using analog circuit technology. This large scale integration is a single chip microcomputer with motor drivers and input ports in addition to the synthetic struck sound circuit, and it is possible to make an electronic system of minute repeater at a very low cost in comparison with the conventional type.

LDRD report: Smoke effects on electrical equipment

DOE Office of Scientific and Technical Information (OSTI.GOV)

TANAKA,TINA J.; BAYNES JR.,EDWARD E.; NOWLEN,STEVEN P.

2000-03-01

Smoke is known to cause electrical equipment failure, but the likelihood of immediate failure during a fire is unknown. Traditional failure assessment techniques measure the density of ionic contaminants deposited on surfaces to determine the need for cleaning or replacement of electronic equipment exposed to smoke. Such techniques focus on long-term effects, such as corrosion, but do not address the immediate effects of the fire. This document reports the results of tests on the immediate effects of smoke on electronic equipment. Various circuits and components were exposed to smoke from different fields in a static smoke exposure chamber and weremore » monitored throughout the exposure. Electrically, the loss of insulation resistance was the most important change caused by smoke. For direct current circuits, soot collected on high-voltage surfaces sometimes formed semi-conductive soot bridges that shorted the circuit. For high voltage alternating current circuits, the smoke also tended to increase the likelihood of arcing, but did not accumulate on the surfaces. Static random access memory chips failed for high levels of smoke, but hard disk drives did not. High humidity increased the conductive properties of the smoke. The conductivity does not increase linearly with smoke density as first proposed; however, it does increase with quantity. The data can be used to give a rough estimate of the amount of smoke that will cause failures in CMOS memory chips, dc and ac circuits. Comparisons of this data to other fire tests can be made through the optical and mass density measurements of the smoke.« less

Molecular-Beam-Epitaxy Program

NASA Technical Reports Server (NTRS)

Sparks, Patricia D.

1988-01-01

Molecular Beam Epitaxy (MBE) computer program developed to aid in design of single- and double-junction cascade cells made of silicon. Cascade cell has efficiency 1 or 2 percent higher than single cell, with twice the open-circuit voltage. Input parameters include doping density, diffusion lengths, thicknesses of regions, solar spectrum, absorption coefficients of silicon (data included for 101 wavelengths), and surface recombination velocities. Results include maximum power, short-circuit current, and open-circuit voltage. Program written in FORTRAN IV.

Development of a compact permanent magnet helicon plasma source for ion beam bioengineering.

PubMed

Kerdtongmee, P; Srinoum, D; Nisoa, M

2011-10-01

A compact helicon plasma source was developed as a millimeter-sized ion source for ion beam bioengineering. By employing a stacked arrangement of annular-shaped permanent magnets, a uniform axial magnetic flux density up to 2.8 kG was obtained. A cost effective 118 MHz RF generator was built for adjusting forward output power from 0 to 40 W. The load impedance and matching network were then analyzed. A single loop antenna and circuit matching elements were placed on a compact printed circuit board for 50 Ω impedance matching. A plasma density up to 1.1 × 10(12) cm(-3) in the 10 mm diameter tube under the magnetic flux density was achieved with 35 W applied RF power.

Development of a compact permanent magnet helicon plasma source for ion beam bioengineering

NASA Astrophysics Data System (ADS)

Kerdtongmee, P.; Srinoum, D.; Nisoa, M.

2011-10-01

A compact helicon plasma source was developed as a millimeter-sized ion source for ion beam bioengineering. By employing a stacked arrangement of annular-shaped permanent magnets, a uniform axial magnetic flux density up to 2.8 kG was obtained. A cost effective 118 MHz RF generator was built for adjusting forward output power from 0 to 40 W. The load impedance and matching network were then analyzed. A single loop antenna and circuit matching elements were placed on a compact printed circuit board for 50 Ω impedance matching. A plasma density up to 1.1 × 1012 cm-3 in the 10 mm diameter tube under the magnetic flux density was achieved with 35 W applied RF power.

A New Test Method of Circuit Breaker Spring Telescopic Characteristics Based Image Processing

NASA Astrophysics Data System (ADS)

Huang, Huimin; Wang, Feifeng; Lu, Yufeng; Xia, Xiaofei; Su, Yi

2018-06-01

This paper applied computer vision technology to the fatigue condition monitoring of springs, and a new telescopic characteristics test method is proposed for circuit breaker operating mechanism spring based on image processing technology. High-speed camera is utilized to capture spring movement image sequences when high voltage circuit breaker operated. Then the image-matching method is used to obtain the deformation-time curve and speed-time curve, and the spring expansion and deformation parameters are extracted from it, which will lay a foundation for subsequent spring force analysis and matching state evaluation. After performing simulation tests at the experimental site, this image analyzing method could solve the complex problems of traditional mechanical sensor installation and monitoring online, status assessment of the circuit breaker spring.

Sandia National Laboratories: Physical, Chemical, and Nano Sciences

Science.gov Websites

Robotics R&D 100 Awards Laboratory Directed Research & Development Technology Deployment Centers Honey I shrunk the circuit CINT Virtual Tour Center for Integrated Nanotechnologies Honey I shrunk the circuit Ion Beam Lab Virtual Tour: Coming Soon! Honey I shrunk the circuit CINT 10 Year Anniversary Video

Silicon Carbide Integrated Circuit Chip

NASA Image and Video Library

2015-02-17

A multilevel interconnect silicon carbide integrated circuit chip with co-fired ceramic package and circuit board recently developed at the NASA GRC Smart Sensors and Electronics Systems Branch for high temperature applications. High temperature silicon carbide electronics and compatible packaging technologies are elements of instrumentation for aerospace engine control and long term inner-solar planet explorations.

Assessment of Durable SiC JFET Technology for +600 C to -125 C Integrated Circuit Operation

NASA Technical Reports Server (NTRS)

Neudeck, P. G.; Krasowski, M. J.; Prokop, N. F.

2011-01-01

Electrical characteristics and circuit design considerations for prototype 6H-SiC JFET integrated circuits (ICs) operating over the broad temperature range of -125 C to +600 C are described. Strategic implementation of circuits with transistors and resistors in the same 6H-SiC n-channel layer enabled ICs with nearly temperature-independent functionality to be achieved. The frequency performance of the circuits declined at temperatures increasingly below or above room temperature, roughly corresponding to the change in 6H-SiC n-channel resistance arising from incomplete carrier ionization at low temperature and decreased electron mobility at high temperature. In addition to very broad temperature functionality, these simple digital and analog demonstration integrated circuits successfully operated with little change in functional characteristics over the course of thousands of hours at 500 C before experiencing interconnect-related failures. With appropriate further development, these initial results establish a new technology foundation for realizing durable 500 C ICs for combustion engine sensing and control, deep-well drilling, and other harsh-environment applications.

An Efficient and Effective Design of InP Nanowires for Maximal Solar Energy Harvesting.

PubMed

Wu, Dan; Tang, Xiaohong; Wang, Kai; He, Zhubing; Li, Xianqiang

2017-11-25

Solar cells based on subwavelength-dimensions semiconductor nanowire (NW) arrays promise a comparable or better performance than their planar counterparts by taking the advantages of strong light coupling and light trapping. In this paper, we present an accurate and time-saving analytical design for optimal geometrical parameters of vertically aligned InP NWs for maximal solar energy absorption. Short-circuit current densities are calculated for each NW array with different geometrical dimensions under solar illumination. Optimal geometrical dimensions are quantitatively presented for single, double, and multiple diameters of the NW arrays arranged both squarely and hexagonal achieving the maximal short-circuit current density of 33.13 mA/cm 2 . At the same time, intensive finite-difference time-domain numerical simulations are performed to investigate the same NW arrays for the highest light absorption. Compared with time-consuming simulations and experimental results, the predicted maximal short-circuit current densities have tolerances of below 2.2% for all cases. These results unambiguously demonstrate that this analytical method provides a fast and accurate route to guide high performance InP NW-based solar cell design.

An Efficient and Effective Design of InP Nanowires for Maximal Solar Energy Harvesting

NASA Astrophysics Data System (ADS)

Wu, Dan; Tang, Xiaohong; Wang, Kai; He, Zhubing; Li, Xianqiang

2017-11-01

Solar cells based on subwavelength-dimensions semiconductor nanowire (NW) arrays promise a comparable or better performance than their planar counterparts by taking the advantages of strong light coupling and light trapping. In this paper, we present an accurate and time-saving analytical design for optimal geometrical parameters of vertically aligned InP NWs for maximal solar energy absorption. Short-circuit current densities are calculated for each NW array with different geometrical dimensions under solar illumination. Optimal geometrical dimensions are quantitatively presented for single, double, and multiple diameters of the NW arrays arranged both squarely and hexagonal achieving the maximal short-circuit current density of 33.13 mA/cm2. At the same time, intensive finite-difference time-domain numerical simulations are performed to investigate the same NW arrays for the highest light absorption. Compared with time-consuming simulations and experimental results, the predicted maximal short-circuit current densities have tolerances of below 2.2% for all cases. These results unambiguously demonstrate that this analytical method provides a fast and accurate route to guide high performance InP NW-based solar cell design.

Advanced Packaging for VLSI/VHSIC (Very Large Scale Integrated Circuits/Very High Speed Integrated Circuits) Applications: Electrical, Thermal, and Mechanical Considerations - An IR&D Report.

DTIC Science & Technology

1987-11-01

developed that can be used by circuit engineers to extract the maximum performance from the devices on various board technologies including multilayer ceramic...Design guidelines have been developed that can be used by circuit engineers to extract the maxi- mum performance from the devices on various board...25 Attenuation and Dispersion Effects ......................................... 27 Skin Effect

Study of switching transients in high frequency converters

NASA Technical Reports Server (NTRS)

Zinger, Donald S.; Elbuluk, Malik E.; Lee, Tony

1993-01-01

As the semiconductor technologies progress rapidly, the power densities and switching frequencies of many power devices are improved. With the existing technology, high frequency power systems become possible. Use of such a system is advantageous in many aspects. A high frequency ac source is used as the direct input to an ac/ac pulse-density-modulation (PDM) converter. This converter is a new concept which employs zero voltage switching techniques. However, the development of this converter is still in its infancy stage. There are problems associated with this converter such as a high on-voltage drop, switching transients, and zero-crossing detecting. Considering these problems, the switching speed and power handling capabilities of the MOS-Controlled Thyristor (MCT) makes the device the most promising candidate for this application. A complete insight of component considerations for building an ac/ac PDM converter for a high frequency power system is addressed. A power device review is first presented. The ac/ac PDM converter requires switches that can conduct bi-directional current and block bi-directional voltage. These bi-directional switches can be constructed using existing power devices. Different bi-directional switches for the converter are investigated. Detailed experimental studies of the characteristics of the MCT under hard switching and zero-voltage switching are also presented. One disadvantage of an ac/ac converter is that turn-on and turn-off of the switches has to be completed instantaneously when the ac source is at zero voltage. Otherwise shoot-through current or voltage spikes can occur which can be hazardous to the devices. In order for the devices to switch softly in the safe operating area even under non-ideal cases, a unique snubber circuit is used in each bi-directional switch. Detailed theory and experimental results for circuits using these snubbers are presented. A current regulated ac/ac PDM converter built using MCT's and IGBT's is evaluated.

Integrated spectral photocurrent density and reproducibility analyses of excitonic ZnO/NiO heterojunction.

PubMed

Patel, Malkeshkumar; Kim, Joondong

2017-12-01

In this data article, the excitonic ZnO/NiO heterojunction device (Patel et al., 2017) [1] was measured for the integrated photocurrent density and reproducibility. Photograph of the prepared devices of ZnO/NiO on the FTO/glass is presented. Integrated photocurrent density as a function of photon energy from the sunlight is presented. Quantum efficiency measurement system (McScienceK3100, Korea) compliance with International Measurement System was employed to measure ZnO/NIO devices. These data are shown for the 300-440 nm of segment of the sunlight (AM1.5G, http://rredc.nrel.gov/solar/spectra/am1.5/). Reproducibility measure of ZnO/NiO device was presented for nine devices with the estimated device performance parameters including the open circuit voltage, short circuit current density, fill factor and power conversion efficiency.

Integrated semiconductor-magnetic random access memory system

NASA Technical Reports Server (NTRS)

Katti, Romney R. (Inventor); Blaes, Brent R. (Inventor)

2001-01-01

The present disclosure describes a non-volatile magnetic random access memory (RAM) system having a semiconductor control circuit and a magnetic array element. The integrated magnetic RAM system uses CMOS control circuit to read and write data magnetoresistively. The system provides a fast access, non-volatile, radiation hard, high density RAM for high speed computing.

Switched-capacitor realization of presynaptic short-term-plasticity and stop-learning synapses in 28 nm CMOS.

PubMed

Noack, Marko; Partzsch, Johannes; Mayr, Christian G; Hänzsche, Stefan; Scholze, Stefan; Höppner, Sebastian; Ellguth, Georg; Schüffny, Rene

2015-01-01

Synaptic dynamics, such as long- and short-term plasticity, play an important role in the complexity and biological realism achievable when running neural networks on a neuromorphic IC. For example, they endow the IC with an ability to adapt and learn from its environment. In order to achieve the millisecond to second time constants required for these synaptic dynamics, analog subthreshold circuits are usually employed. However, due to process variation and leakage problems, it is almost impossible to port these types of circuits to modern sub-100nm technologies. In contrast, we present a neuromorphic system in a 28 nm CMOS process that employs switched capacitor (SC) circuits to implement 128 short term plasticity presynapses as well as 8192 stop-learning synapses. The neuromorphic system consumes an area of 0.36 mm(2) and runs at a power consumption of 1.9 mW. The circuit makes use of a technique for minimizing leakage effects allowing for real-time operation with time constants up to several seconds. Since we rely on SC techniques for all calculations, the system is composed of only generic mixed-signal building blocks. These generic building blocks make the system easy to port between technologies and the large digital circuit part inherent in an SC system benefits fully from technology scaling.

Design of high precision temperature control system for TO packaged LD

NASA Astrophysics Data System (ADS)

Liang, Enji; Luo, Baoke; Zhuang, Bin; He, Zhengquan

2017-10-01

Temperature is an important factor affecting the performance of TO package LD. In order to ensure the safe and stable operation of LD, a temperature control circuit for LD based on PID technology is designed. The MAX1978 and an external PID circuit are used to form a control circuit that drives the thermoelectric cooler (TEC) to achieve control of temperature and the external load can be changed. The system circuit has low power consumption, high integration and high precision,and the circuit can achieve precise control of the LD temperature. Experiment results show that the circuit can achieve effective and stable control of the laser temperature.

Superconductor Digital Electronics: -- Current Status, Future Prospects

NASA Astrophysics Data System (ADS)

Mukhanov, Oleg

2011-03-01

Two major applications of superconductor electronics: communications and supercomputing will be presented. These areas hold a significant promise of a large impact on electronics state-of-the-art for the defense and commercial markets stemming from the fundamental advantages of superconductivity: simultaneous high speed and low power, lossless interconnect, natural quantization, and high sensitivity. The availability of relatively small cryocoolers lowered the foremost market barrier for cryogenically-cooled superconductor electronic systems. These fundamental advantages enabled a novel Digital-RF architecture - a disruptive technological approach changing wireless communications, radar, and surveillance system architectures dramatically. Practical results were achieved for Digital-RF systems in which wide-band, multi-band radio frequency signals are directly digitized and digital domain is expanded throughout the entire system. Digital-RF systems combine digital and mixed signal integrated circuits based on Rapid Single Flux Quantum (RSFQ) technology, superconductor analog filter circuits, and semiconductor post-processing circuits. The demonstrated cryocooled Digital-RF systems are the world's first and fastest directly digitizing receivers operating with live satellite signals, enabling multi-net data links, and performing signal acquisition from HF to L-band with 30 GHz clock frequencies. In supercomputing, superconductivity leads to the highest energy efficiencies per operation. Superconductor technology based on manipulation and ballistic transfer of magnetic flux quanta provides a superior low-power alternative to CMOS and other charge-transfer based device technologies. The fundamental energy consumption in SFQ circuits defined by flux quanta energy 2 x 10-19 J. Recently, a novel energy-efficient zero-static-power SFQ technology, eSFQ/ERSFQ was invented, which retains all advantages of standard RSFQ circuits: high-speed, dc power, internal memory. The voltage bias regulation, determined by SFQ clock, enables the zero-power at zero-activity regimes, indispensable for sensor and quantum bit readout.

Superconductive Microwave Single-Flux-Quantum Digital Circuits and Corresponding Opto-Electronic Interfaces: On-Going Studies and First Experimental Results

DTIC Science & Technology

2005-07-13

UHLMANN University of Technology Ilmenau– PO Box 105565 – D-98684 Ilmenau - Germany RESUME : Les circuits numériques supraconducteurs micro-ondes...circuits RSFQ. Ce banc de mesure comporte deux types d’interfaces opto-RSFQ, basées sur des matériaux semiconducteurs et supraconducteurs , respectivement

Monolithically Integrated Flexible Black Phosphorus Complementary Inverter Circuits.

PubMed

Liu, Yuanda; Ang, Kah-Wee

2017-07-25

Two-dimensional (2D) inverters are a fundamental building block for flexible logic circuits which have previously been realized by heterogeneously wiring transistors with two discrete channel materials. Here, we demonstrate a monolithically integrated complementary inverter made using a homogeneous black phosphorus (BP) nanosheet on flexible substrates. The digital logic inverter circuit is demonstrated via effective threshold voltage tuning within a single BP material, which offers both electron and hole dominated conducting channels with nearly symmetric pinch-off and current saturation. Controllable electron concentration is achieved by accurately modulating the aluminum (Al) donor doping, which realizes BP n-FET with a room-temperature on/off ratio >10 3 . Simultaneously, work function engineering is employed to obtain a low Schottky barrier contact electrode that facilities hole injection, thus enhancing the current density of the BP p-FET by 9.4 times. The flexible inverter circuit shows a clear digital logic voltage inversion operation along with a larger-than-unity direct current voltage gain, while exhibits alternating current dynamic signal switching at a record high frequency up to 100 kHz and remarkable electrical stability upon mechanical bending with a radii as small as 4 mm. Our study demonstrates a practical monolithic integration strategy for achieving functional logic circuits on one material platform, paving the way for future high-density flexible electronic applications.

Embedded optical interconnect technology in data storage systems

NASA Astrophysics Data System (ADS)

Pitwon, Richard C. A.; Hopkins, Ken; Milward, Dave; Muggeridge, Malcolm

2010-05-01

As both data storage interconnect speeds increase and form factors in hard disk drive technologies continue to shrink, the density of printed channels on the storage array midplane goes up. The dominant interconnect protocol on storage array midplanes is expected to increase to 12 Gb/s by 2012 thereby exacerbating the performance bottleneck in future digital data storage systems. The design challenges inherent to modern data storage systems are discussed and an embedded optical infrastructure proposed to mitigate this bottleneck. The proposed solution is based on the deployment of an electro-optical printed circuit board and active interconnect technology. The connection architecture adopted would allow for electronic line cards with active optical edge connectors to be plugged into and unplugged from a passive electro-optical midplane with embedded polymeric waveguides. A demonstration platform has been developed to assess the viability of embedded electro-optical midplane technology in dense data storage systems and successfully demonstrated at 10.3 Gb/s. Active connectors incorporate optical transceiver interfaces operating at 850 nm and are connected in an in-plane coupling configuration to the embedded waveguides in the midplane. In addition a novel method of passively aligning and assembling passive optical devices to embedded polymer waveguide arrays has also been demonstrated.

Microwave power transmission system studies. Volume 4: Sections 9 through 14 with appendices. [ground tests and antenna design

NASA Technical Reports Server (NTRS)

Maynard, O. E.; Brown, W. C.; Edwards, A.; Haley, J. T.; Meltz, G.; Howell, J. M.; Nathan, A.

1975-01-01

The microwave rectifier technology, approaches to the receiving antenna, topology of rectenna circuits, assembly and construction, ROM cost estimates are discussed. Analyses and cost estimates for the equipment required to transmit the ground power to an external user. Noise and harmonic considerations are presented for both the amplitron and klystron and interference limits are identified and evaluated. The risk assessment discussion is discussed wherein technology risks are rated and ranked with regard to their importance in impacting the microwave power transmission system. The system analyses and evaluation are included of parametric studies of system relationships pertaining to geometry, materials, specific cost, specific weight, efficiency, converter packing, frequency selection, power distribution, power density, power output magnitude, power source, transportation and assembly. Capital costs per kW and energy costs as a function of rate of return, power source and transportation costs as well as build cycle time are presented. The critical technology and ground test program are discussed along with ROM costs and schedule. The orbital test program with associated critical technology and ground based program based on full implementation of the defined objectives is discussed.

Non-Gaussianity in a quasiclassical electronic circuit

NASA Astrophysics Data System (ADS)

Suzuki, Takafumi J.; Hayakawa, Hisao

2017-05-01

We study the non-Gaussian dynamics of a quasiclassical electronic circuit coupled to a mesoscopic conductor. Non-Gaussian noise accompanying the nonequilibrium transport through the conductor significantly modifies the stationary probability density function (PDF) of the flux in the dissipative circuit. We incorporate weak quantum fluctuation of the dissipative LC circuit with a stochastic method and evaluate the quantum correction of the stationary PDF. Furthermore, an inverse formula to infer the statistical properties of the non-Gaussian noise from the stationary PDF is derived in the classical-quantum crossover regime. The quantum correction is indispensable to correctly estimate the microscopic transfer events in the QPC with the quasiclassical inverse formula.

Visible rodent brain-wide networks at single-neuron resolution

PubMed Central

Yuan, Jing; Gong, Hui; Li, Anan; Li, Xiangning; Chen, Shangbin; Zeng, Shaoqun; Luo, Qingming

2015-01-01

There are some unsolvable fundamental questions, such as cell type classification, neural circuit tracing and neurovascular coupling, though great progresses are being made in neuroscience. Because of the structural features of neurons and neural circuits, the solution of these questions needs us to break through the current technology of neuroanatomy for acquiring the exactly fine morphology of neuron and vessels and tracing long-distant circuit at axonal resolution in the whole brain of mammals. Combined with fast-developing labeling techniques, efficient whole-brain optical imaging technology emerging at the right moment presents a huge potential in the structure and function research of specific-function neuron and neural circuit. In this review, we summarize brain-wide optical tomography techniques, review the progress on visible brain neuronal/vascular networks benefit from these novel techniques, and prospect the future technical development. PMID:26074784

DOE Office of Scientific and Technical Information (OSTI.GOV)

Hadi, Pejman; Ning, Chao; Ouyang, Weiyi

Highlights: • Environmental impacts of electronic waste and specifically waste printed circuit boards. • Review of the recycling techniques of waste printed circuit boards. • Advantages of physico-mechanical recycling techniques over chemical methods. • Utilization of nonmetallic fraction of waste printed circuit boards as modifier/filler. • Recent advances in the use of nonmetallic fraction of waste printed circuit boards as precursor. - Abstract: Electronic waste, including printed circuit boards, is growing at an alarming rate due to the accelerated technological progress and the shorter lifespan of the electronic equipment. In the past decades, due to the lack of proper economicmore » and environmentally-benign recycling technologies, a major fraction of e-waste generated was either destined to landfills or incinerated with the sole intention of its disposal disregarding the toxic nature of this waste. Recently, with the increasing public awareness over their environment and health issues and with the enaction of more stringent regulations, environmentally-benign recycling has been driven to be an alternative option partially replacing the traditional eco-unfriendly disposal methods. One of the most favorable green technologies has been the mechanical separation of the metallic and nonmetallic fraction of the waste printed circuit boards. Although metallic fraction, as the most profitable component, is used to generate the revenue of the separation process, the nonmetallic fraction (NMF) has been left isolated. Herein, the recent developments in the application of NMF have been comprehensively reviewed and an eco-friendly emerging usage of NMF as a value-added material for sustainable remediation has been introduced.« less

Grand Research Plan for Neural Circuits of Emotion and Memory--current status of neural circuit studies in China.

PubMed

Zhu, Yuan-Gui; Cao, He-Qi; Dong, Er-Dan

2013-02-01

During recent years, major advances have been made in neuroscience, i.e., asynchronous release, three-dimensional structural data sets, saliency maps, magnesium in brain research, and new functional roles of long non-coding RNAs. Especially, the development of optogenetic technology provides access to important information about relevant neural circuits by allowing the activation of specific neurons in awake mammals and directly observing the resulting behavior. The Grand Research Plan for Neural Circuits of Emotion and Memory was launched by the National Natural Science Foundation of China. It takes emotion and memory as its main objects, making the best use of cutting-edge technologies from medical science, life science and information science. In this paper, we outline the current status of neural circuit studies in China and the technologies and methodologies being applied, as well as studies related to the impairments of emotion and memory. In this phase, we are making efforts to repair the current deficiencies by making adjustments, mainly involving four aspects of core scientific issues to investigate these circuits at multiple levels. Five research directions have been taken to solve important scientific problems while the Grand Research Plan is implemented. Future research into this area will be multimodal, incorporating a range of methods and sciences into each project. Addressing these issues will ensure a bright future, major discoveries, and a higher level of treatment for all affected by debilitating brain illnesses.

New dynamic FET logic and serial memory circuits for VLSI GaAs technology

NASA Technical Reports Server (NTRS)

Eldin, A. G.

1991-01-01

The complexity of GaAs field effect transistor (FET) very large scale integration (VLSI) circuits is limited by the maximum power dissipation while the uniformity of the device parameters determines the functional yield. In this work, digital GaAs FET circuits are presented that eliminate the DC power dissipation and reduce the area to 50% of that of the conventional static circuits. Its larger tolerance to device parameter variations results in higher functional yield.

An adjustable RF tuning element for microwave, millimeter wave, and submillimeter wave integrated circuits

NASA Technical Reports Server (NTRS)

Lubecke, Victor M.; Mcgrath, William R.; Rutledge, David B.

1991-01-01

Planar RF circuits are used in a wide range of applications from 1 GHz to 300 GHz, including radar, communications, commercial RF test instruments, and remote sensing radiometers. These circuits, however, provide only fixed tuning elements. This lack of adjustability puts severe demands on circuit design procedures and materials parameters. We have developed a novel tuning element which can be incorporated into the design of a planar circuit in order to allow active, post-fabrication tuning by varying the electrical length of a coplanar strip transmission line. It consists of a series of thin plates which can slide in unison along the transmission line, and the size and spacing of the plates are designed to provide a large reflection of RF power over a useful frequency bandwidth. Tests of this structure at 1 GHz to 3 Ghz showed that it produced a reflection coefficient greater than 0.90 over a 20 percent bandwidth. A 2 GHz circuit incorporating this tuning element was also tested to demonstrate practical tuning ranges. This structure can be fabricated for frequencies as high as 1000 GHz using existing micromachining techniques. Many commercial applications can benefit from this micromechanical RF tuning element, as it will aid in extending microwave integrated circuit technology into the high millimeter wave and submillimeter wave bands by easing constraints on circuit technology.

Optical Computers and Space Technology

NASA Technical Reports Server (NTRS)

Abdeldayem, Hossin A.; Frazier, Donald O.; Penn, Benjamin; Paley, Mark S.; Witherow, William K.; Banks, Curtis; Hicks, Rosilen; Shields, Angela

1995-01-01

The rapidly increasing demand for greater speed and efficiency on the information superhighway requires significant improvements over conventional electronic logic circuits. Optical interconnections and optical integrated circuits are strong candidates to provide the way out of the extreme limitations imposed on the growth of speed and complexity of nowadays computations by the conventional electronic logic circuits. The new optical technology has increased the demand for high quality optical materials. NASA's recent involvement in processing optical materials in space has demonstrated that a new and unique class of high quality optical materials are processible in a microgravity environment. Microgravity processing can induce improved orders in these materials and could have a significant impact on the development of optical computers. We will discuss NASA's role in processing these materials and report on some of the associated nonlinear optical properties which are quite useful for optical computers technology.

Microelectromechanical accelerometer with resonance-cancelling control circuit including an idle state

DOEpatents

Chu, Dahlon D.; Thelen, Jr., Donald C.; Campbell, David V.

2001-01-01

A digital feedback control circuit is disclosed for use in an accelerometer (e.g. a microelectromechanical accelerometer). The digital feedback control circuit, which periodically re-centers a proof mass in response to a sensed acceleration, is based on a sigma-delta (.SIGMA..DELTA.) configuration that includes a notch filter (e.g. a digital switched-capacitor filter) for rejecting signals due to mechanical resonances of the proof mass and further includes a comparator (e.g. a three-level comparator). The comparator generates one of three possible feedback states, with two of the feedback states acting to re-center the proof mass when that is needed, and with a third feedback state being an "idle" state which does not act to move the proof mass when no re-centering is needed. Additionally, the digital feedback control system includes an auto-zero trim capability for calibration of the accelerometer for accurate sensing of acceleration. The digital feedback control circuit can be fabricated using complementary metal-oxide semiconductor (CMOS) technology, bi-CMOS technology or bipolar technology and used in single- and dual-proof-mass accelerometers.

Recent Progress in the Development of Printed Thin-Film Transistors and Circuits with High-Resolution Printing Technology.

PubMed

Fukuda, Kenjiro; Someya, Takao

2017-07-01

Printed electronics enable the fabrication of large-scale, low-cost electronic devices and systems, and thus offer significant possibilities in terms of developing new electronics/optics applications in various fields. Almost all electronic applications require information processing using logic circuits. Hence, realizing the high-speed operation of logic circuits is also important for printed devices. This report summarizes recent progress in the development of printed thin-film transistors (TFTs) and integrated circuits in terms of materials, printing technologies, and applications. The first part of this report gives an overview of the development of functional inks such as semiconductors, electrodes, and dielectrics. The second part discusses high-resolution printing technologies and strategies to enable high-resolution patterning. The main focus of this report is on obtaining printed electrodes with high-resolution patterning and the electrical performance of printed TFTs using such printed electrodes. In the final part, some applications of printed electronics are introduced to exemplify their potential. © 2016 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

Progress in MMIC technology for satellite communications

NASA Technical Reports Server (NTRS)

Haugland, Edward J.; Leonard, Regis F.

1987-01-01

NASA's Lewis Research Center is actively involved in the development of monolithic microwave and millimeter-wave integrated circuits (MMICs). The approach of the program is to support basic research under grant or in-house, while MMIC development is done under contract, thereby facilitating the transfer of technology to users. Preliminary thrusts of the program have been the extension of technology to higher frequencies (60 GHz), degrees of complexity, and performance (power, efficiency, noise figure) by utilizing novel circuit designs, processes, and materials. A review of the progress made so far is presented.

Assessment of SOI Devices and Circuits at Extreme Temperatures

NASA Technical Reports Server (NTRS)

Elbuluk, Malik; Hammoud, Ahmad; Patterson, Richard L.

2007-01-01

Electronics designed for use in future NASA space exploration missions are expected to encounter extreme temperatures and wide thermal swings. Such missions include planetary surface exploration, bases, rovers, landers, orbiters, and satellites. Electronics designed for such applications must, therefore, be able to withstand exposure to extreme temperatures and to perform properly for the duration of mission. The Low Temperature Electronics Program at the NASA Glenn Research Center focuses on research and development of electrical devices, circuits, and systems suitable for applications in deep space exploration missions and aerospace environment. Silicon-On-Insulator (SOI) technology has been under active consideration in the electronics industry for many years due to the advantages that it can provide in integrated circuit (IC) chips and computer processors. Faster switching, less power, radiationtolerance, reduced leakage, and high temp-erature capability are some of the benefits that are offered by using SOI-based devices. A few SOI circuits are available commercially. However, there is a noticeable interest in SOI technology for different applications. Very little data, however, exist on the performance of such circuits under cryogenic temperatures. In this work, the performance of SOI integrated circuits, evaluated under low temperature and thermal cycling, are reported. In particular, three examples of SOI circuits that have been tested for operation at low at temperatures are given. These circuits are SOI operational amplifiers, timers and power MOSFET drivers. The investigations were carried out to establish a baseline on the functionality and to determine suitability of these circuits for use in space exploration missions at cryogenic temperatures. The findings are useful to mission planners and circuit designers so that proper selection of electronic parts can be made, and risk assessment can be established for such circuits for use in space missions.

Study on magnetic circuit of moving magnet linear compressor

NASA Astrophysics Data System (ADS)

Xia, Ming; Chen, Xiaoping; Chen, Jun

2015-05-01

The moving magnet linear compressors are very popular in the tactical miniature stirling cryocoolers. The magnetic circuit of LFC3600 moving magnet linear compressor, manufactured by Kunming institute of Physics, was studied in this study. Three methods of the analysis theory, numerical calculation and experiment study were applied in the analysis process. The calculated formula of magnetic reluctance and magnetomotive force were given in theoretical analysis model. The magnetic flux density and magnetic flux line were analyzed in numerical analysis model. A testing method was designed to test the magnetic flux density of the linear compressor. When the piston of the motor was in the equilibrium position, the value of the magnetic flux density was at the maximum of 0.27T. The results were almost equal to the ones from numerical analysis.

Possible Circuit Architectures for Molecular Nanoelectronics

NASA Astrophysics Data System (ADS)

Likharev, Konstantin

2003-03-01

Chemically-directed self-assembly of molecular devices is apparently the only feasible way to continue the fast progress of microelectronics after its Moore-Laws-based development runs into the wall of physical and economic limitations [1]. The architectures of VLSI circuits using such devices should be substantially fault-tolerant and accommodate other their features including low transconductance. The most significant feature of all promising suggested architectures is the hybridization of three technologies: advanced CMOS, simple nanowire arrays, and molecular devices self-assembling on these wires. Molecular memory arrays may have a simple structure, and their simple prototypes have already been implemented experimentally [2]. In contrast, the logic circuit development is just starting. I will describe a family of neuromorphic networks based on so-called CrossNet arrays [3] that look promising for advanced information processing, starting from fast image recognition and beyond. This architecture may combine very high density (above 10^12 functions per cm^2) and relatively high speed (100-ns-scale latency of cell-to-cell communications) at acceptable power consumption. In future, these features may allow to put an artificial analog of the human cerebral cortex, capable of processing information and (hopefully) self-evolution at 4 to 5 orders of magnitude faster than its biological prototype, on a 20x20 cm^2 silicon wafer. [1] K. Likharev, "Electronics Below 20-nm", see http://rsfq1.physics.sunysb.edu/ likharev/nano/ForMorkoc.pdf. [2] See, e.g, http://nanotechweb.org/articles/news/1/9/8/1. [3] O. Turel and K. Likharev, Int. J. of Circuit Theory and Applications 31, No.1 (2003); see http://rsfq1.physics.sunysb.edu/ likharev/nano/Preprint070102.pdf.

Lab on a Biomembrane: Rapid prototyping and manipulation of 2D fluidic lipid bilayers circuits

PubMed Central

Ainla, Alar; Gözen, Irep; Hakonen, Bodil; Jesorka, Aldo

2013-01-01

Lipid bilayer membranes are among the most ubiquitous structures in the living world, with intricate structural features and a multitude of biological functions. It is attractive to recreate these structures in the laboratory, as this allows mimicking and studying the properties of biomembranes and their constituents, and to specifically exploit the intrinsic two-dimensional fluidity. Even though diverse strategies for membrane fabrication have been reported, the development of related applications and technologies has been hindered by the unavailability of both versatile and simple methods. Here we report a rapid prototyping technology for two-dimensional fluidic devices, based on in-situ generated circuits of phospholipid films. In this “lab on a molecularly thin membrane”, various chemical and physical operations, such as writing, erasing, functionalization, and molecular transport, can be applied to user-defined regions of a membrane circuit. This concept is an enabling technology for research on molecular membranes and their technological use. PMID:24067786

Modeling of breakdown during the post-arc phase of a vacuum circuit breaker

NASA Astrophysics Data System (ADS)

Sarrailh, P.; Garrigues, L.; Boeuf, J. P.; Hagelaar, G. J. M.

2010-12-01

After a high-current interruption in a vacuum circuit breaker (VCB), the electrode gap is filled with a high density copper vapor plasma in a large copper vapor density (~1022 m-3). The copper vapor density is sustained by electrode evaporation. During the post-arc phase, a rapidly increasing voltage is applied to the gap, and a sheath forms and expands, expelling the plasma from the gap when circuit breaking is successful. There is, however, a risk of breakdown during that phase, leading to the failure of the VCB. Preventing breakdown during the post-arc phase is an important issue for the improvement of VCB reliability. In this paper, we analyze the risk of Townsend breakdown in the high copper vapor density during the post-arc phase using a numerical model that takes into account secondary electron emission, volume ionization, and plasma and neutral transport, for given electrode temperatures. The simulations show that fast neutrals created in the cathode sheath by charge exchange collisions with ions generate a very large secondary electron emission current that can lead to Townsend breakdown. The results also show that the risk of failure of the VCB due to Townsend breakdown strongly depends on the electrode temperatures (which govern the copper vapor density) and becomes important for temperatures greater than 2100 K, which can be reached in vacuum arcs. The simulations also predict that a hotter anode tends to increase the risk of Townsend breakdown.

Microwave monolithic integrated circuit-related metrology at the National Institute of Standards and Technology

NASA Astrophysics Data System (ADS)

Reeve, Gerome; Marks, Roger; Blackburn, David

1990-12-01

How the National Institute of Standards and Technology (NIST) interacts with the GaAs community and the Defense Advanced Research Projects Agency microwave monolithic integrated circuit (MMIC) initiative is described. The organization of a joint industry and government laboratory consortium for MMIC-related metrology research is described along with some of the initial technical developments at NIST done in support of the consortium.

Integrated optical circuit engineering V; Proceedings of the Meeting, San Diego, CA, Aug. 17-20, 1987

NASA Astrophysics Data System (ADS)

Mentzer, Mark A.

Recent advances in the theoretical and practical design and applications of optoelectronic devices and optical circuits are examined in reviews and reports. Topics discussed include system and market considerations, guided-wave phenomena, waveguide devices, processing technology, lithium niobate devices, and coupling problems. Consideration is given to testing and measurement, integrated optics for fiber-optic systems, optical interconnect technology, and optical computing.

Microwave processed NiMg ferrite: Studies on structural and magnetic properties

NASA Astrophysics Data System (ADS)

Chandra Babu Naidu, K.; Madhuri, W.

2016-12-01

Ferrites are magnetic semiconductors realizing an important role in electrical and electronic circuits where electrical and magnetic property coupling is required. Though ferrite materials are known for a long time, there is a large scope in the improvement of their properties (vice sintering and frequency dependence of electrical and magnetic properties) with the current technological trends. Forth coming technology is aimed at miniaturization and smart gadgets, electrical components like inductors and transformers cannot be included in integrated circuits. These components are incorporated into the circuit as surface mount devices whose fabrication involves low temperature co-firing of ceramics and microwave monolithic integrated circuits technologies. These technologies demand low temperature sinter-ability of ferrites. This article presents low temperature microwave sintered Ni-Mg ferrites of general chemical formula Ni1-xMgxFe2O4 (x=0, 0.2, 0.4, 0.5, 0.6, 0.8, 1) for potential applications as transformer core materials. The series of ferrites are characterized using X-ray diffractometer, scanning electron microscopy, Fourier transform infrared and vibrating sample magnetometer for investigating structural, morphological and magnetic properties respectively. The initial permeability is studied with magnesium content, temperature and frequency in the temperature range of 308 K-873 K and 42 Hz-5 MHz.

Progress and opportunities in high-voltage microactuator powering technology towards one-chip MEMS

NASA Astrophysics Data System (ADS)

Mita, Yoshio; Hirakawa, Atsushi; Stefanelli, Bruno; Mori, Isao; Okamoto, Yuki; Morishita, Satoshi; Kubota, Masanori; Lebrasseur, Eric; Kaiser, Andreas

2018-04-01

In this paper, we address issues and solutions for micro-electro-mechanical-systems (MEMS) powering through semiconductor devices towards one-chip MEMS, especially those with microactuators that require high voltage (HV, which is more than 10 V, and is often over 100 V) for operation. We experimentally and theoretically demonstrated that the main reason why MEMS actuators need such HV is the tradeoff between resonant frequency and displacement amplitude. Indeed, the product of frequency and displacement is constant regardless of the MEMS design, but proportional to the input energy, which is the square of applied voltage in an electrostatic actuator. A comprehensive study on the principles of HV device technology and associated circuit technologies, especially voltage shifter circuits, was conducted. From the viewpoint of on-chip energy source, series-connected HV photovoltaic cells have been discussed. Isolation and electrical connection methods were identified to be key enabling technologies. Towards future rapid development of such autonomous devices, a technology to convert standard 5 V CMOS devices into HV circuits using SOI substrate and a MEMS postprocess is presented. HV breakdown experiments demonstrated this technology can hold over 700 to 1000 V, depending on the layout.

Coaxial multishell nanowires with high-quality electronic interfaces and tunable optical cavities for ultrathin photovoltaics.

PubMed

Kempa, Thomas J; Cahoon, James F; Kim, Sun-Kyung; Day, Robert W; Bell, David C; Park, Hong-Gyu; Lieber, Charles M

2012-01-31

Silicon nanowires (NWs) could enable low-cost and efficient photovoltaics, though their performance has been limited by nonideal electrical characteristics and an inability to tune absorption properties. We overcome these limitations through controlled synthesis of a series of polymorphic core/multishell NWs with highly crystalline, hexagonally-faceted shells, and well-defined coaxial (p/n) and p/intrinsic/n (p/i/n) diode junctions. Designed 200-300 nm diameter p/i/n NW diodes exhibit ultralow leakage currents of approximately 1 fA, and open-circuit voltages and fill-factors up to 0.5 V and 73%, respectively, under one-sun illumination. Single-NW wavelength-dependent photocurrent measurements reveal size-tunable optical resonances, external quantum efficiencies greater than unity, and current densities double those for silicon films of comparable thickness. In addition, finite-difference-time-domain simulations for the measured NW structures agree quantitatively with the photocurrent measurements, and demonstrate that the optical resonances are due to Fabry-Perot and whispering-gallery cavity modes supported in the high-quality faceted nanostructures. Synthetically optimized NW devices achieve current densities of 17 mA/cm(2) and power-conversion efficiencies of 6%. Horizontal integration of multiple NWs demonstrates linear scaling of the absolute photocurrent with number of NWs, as well as retention of the high open-circuit voltages and short-circuit current densities measured for single NW devices. Notably, assembly of 2 NW elements into vertical stacks yields short-circuit current densities of 25 mA/cm(2) with a backside reflector, and simulations further show that such stacking represents an attractive approach for further enhancing performance with projected efficiencies of > 15% for 1.2 μm thick 5 NW stacks.

Design of a CMOS readout circuit on ultra-thin flexible silicon chip for printed strain gauges

NASA Astrophysics Data System (ADS)

Elsobky, Mourad; Mahsereci, Yigit; Keck, Jürgen; Richter, Harald; Burghartz, Joachim N.

2017-09-01

Flexible electronics represents an emerging technology with features enabling several new applications such as wearable electronics and bendable displays. Precise and high-performance sensors readout chips are crucial for high quality flexible electronic products. In this work, the design of a CMOS readout circuit for an array of printed strain gauges is presented. The ultra-thin readout chip and the printed sensors are combined on a thin Benzocyclobutene/Polyimide (BCB/PI) substrate to form a Hybrid System-in-Foil (HySiF), which is used as an electronic skin for robotic applications. Each strain gauge utilizes a Wheatstone bridge circuit, where four Aerosol Jet® printed meander-shaped resistors form a full-bridge topology. The readout chip amplifies the output voltage difference (about 5 mV full-scale swing) of the strain gauge. One challenge during the sensor interface circuit design is to compensate for the relatively large dc offset (about 30 mV at 1 mA) in the bridge output voltage so that the amplified signal span matches the input range of an analog-to-digital converter (ADC). The circuit design uses the 0. 5 µm mixed-signal GATEFORESTTM technology. In order to achieve the mechanical flexibility, the chip fabrication is based on either back thinned wafers or the ChipFilmTM technology, which enables the manufacturing of silicon chips with a thickness of about 20 µm. The implemented readout chip uses a supply of 5 V and includes a 5-bit digital-to-analog converter (DAC), a differential difference amplifier (DDA), and a 10-bit successive approximation register (SAR) ADC. The circuit is simulated across process, supply and temperature corners and the simulation results indicate excellent performance in terms of circuit stability and linearity.

Separators - Technology review: Ceramic based separators for secondary batteries

DOE Office of Scientific and Technical Information (OSTI.GOV)

Nestler, Tina; Schmid, Robert; Münchgesang, Wolfram

Besides a continuous increase of the worldwide use of electricity, the electric energy storage technology market is a growing sector. At the latest since the German energy transition ('Energiewende') was announced, technological solutions for the storage of renewable energy have been intensively studied. Storage technologies in various forms are commercially available. A widespread technology is the electrochemical cell. Here the cost per kWh, e. g. determined by energy density, production process and cycle life, is of main interest. Commonly, an electrochemical cell consists of an anode and a cathode that are separated by an ion permeable or ion conductive membranemore » - the separator - as one of the main components. Many applications use polymeric separators whose pores are filled with liquid electrolyte, providing high power densities. However, problems arise from different failure mechanisms during cell operation, which can affect the integrity and functionality of these separators. In the case of excessive heating or mechanical damage, the polymeric separators become an incalculable security risk. Furthermore, the growth of metallic dendrites between the electrodes leads to unwanted short circuits. In order to minimize these risks, temperature stable and non-flammable ceramic particles can be added, forming so-called composite separators. Full ceramic separators, in turn, are currently commercially used only for high-temperature operation systems, due to their comparably low ion conductivity at room temperature. However, as security and lifetime demands increase, these materials turn into focus also for future room temperature applications. Hence, growing research effort is being spent on the improvement of the ion conductivity of these ceramic solid electrolyte materials, acting as separator and electrolyte at the same time. Starting with a short overview of available separator technologies and the separator market, this review focuses on ceramic-based separators. Two prominent examples, the lithium-ion and sodium-sulfur battery, are described to show the current stage of development. New routes are presented as promising technologies for safe and long-life electrochemical storage cells.« less

Separators - Technology review: Ceramic based separators for secondary batteries

NASA Astrophysics Data System (ADS)

Nestler, Tina; Schmid, Robert; Münchgesang, Wolfram; Bazhenov, Vasilii; Schilm, Jochen; Leisegang, Tilmann; Meyer, Dirk C.

2014-06-01

Besides a continuous increase of the worldwide use of electricity, the electric energy storage technology market is a growing sector. At the latest since the German energy transition ("Energiewende") was announced, technological solutions for the storage of renewable energy have been intensively studied. Storage technologies in various forms are commercially available. A widespread technology is the electrochemical cell. Here the cost per kWh, e. g. determined by energy density, production process and cycle life, is of main interest. Commonly, an electrochemical cell consists of an anode and a cathode that are separated by an ion permeable or ion conductive membrane - the separator - as one of the main components. Many applications use polymeric separators whose pores are filled with liquid electrolyte, providing high power densities. However, problems arise from different failure mechanisms during cell operation, which can affect the integrity and functionality of these separators. In the case of excessive heating or mechanical damage, the polymeric separators become an incalculable security risk. Furthermore, the growth of metallic dendrites between the electrodes leads to unwanted short circuits. In order to minimize these risks, temperature stable and non-flammable ceramic particles can be added, forming so-called composite separators. Full ceramic separators, in turn, are currently commercially used only for high-temperature operation systems, due to their comparably low ion conductivity at room temperature. However, as security and lifetime demands increase, these materials turn into focus also for future room temperature applications. Hence, growing research effort is being spent on the improvement of the ion conductivity of these ceramic solid electrolyte materials, acting as separator and electrolyte at the same time. Starting with a short overview of available separator technologies and the separator market, this review focuses on ceramic-based separators. Two prominent examples, the lithium-ion and sodium-sulfur battery, are described to show the current stage of development. New routes are presented as promising technologies for safe and long-life electrochemical storage cells.

Liquid Hydrogen Target Experience at SLAC

DOE Office of Scientific and Technical Information (OSTI.GOV)

Weisend, J.G.; Boyce, R.; Candia, A.

2005-08-29

Liquid hydrogen targets have played a vital role in the physics program at SLAC for the past 40 years. These targets have ranged from small ''beer can'' targets to the 1.5 m long E158 target that was capable of absorbing up to 800 W without any significant density changes. Successful use of these targets has required the development of thin wall designs, liquid hydrogen pumps, remote positioning and alignment systems, safety systems, control and data acquisition systems, cryogenic cooling circuits and heat exchangers. Detailed operating procedures have been created to ensure safety and operational reliability. This paper surveys the evolutionmore » of liquid hydrogen targets at SLAC and discusses advances in several of the enabling technologies that made these targets possible.« less

Triple-junction thin-film silicon solar cell fabricated on periodically textured substrate with a stabilized efficiency of 13.6%

NASA Astrophysics Data System (ADS)

Sai, Hitoshi; Matsui, Takuya; Koida, Takashi; Matsubara, Koji; Kondo, Michio; Sugiyama, Shuichiro; Katayama, Hirotaka; Takeuchi, Yoshiaki; Yoshida, Isao

2015-05-01

We report a high-efficiency triple-junction thin-film silicon solar cell fabricated with the so-called substrate configuration. It was verified whether the design criteria for developing single-junction microcrystalline silicon (μc-Si:H) solar cells are applicable to multijunction solar cells. Furthermore, a notably high short-circuit current density of 32.9 mA/cm2 was achieved in a single-junction μc-Si:H cell fabricated on a periodically textured substrate with a high-mobility front transparent contacting layer. These technologies were also combined into a-Si:H/μc-Si:H/μc-Si:H triple-junction cells, and a world record stabilized efficiency of 13.6% was achieved.

Digital circuits for computer applications: A compilation

NASA Technical Reports Server (NTRS)

1972-01-01

The innovations in this updated series of compilations dealing with electronic technology represent a carefully selected collection of digital circuits which have direct application in computer oriented systems. In general, the circuits have been selected as representative items of each section and have been included on their merits of having universal applications in digital computers and digital data processing systems. As such, they should have wide appeal to the professional engineer and scientist who encounter the fundamentals of digital techniques in their daily activities. The circuits are grouped as digital logic circuits, analog to digital converters, and counters and shift registers.

CMOS Active-Pixel Image Sensor With Simple Floating Gates

NASA Technical Reports Server (NTRS)

Fossum, Eric R.; Nakamura, Junichi; Kemeny, Sabrina E.

1996-01-01

Experimental complementary metal-oxide/semiconductor (CMOS) active-pixel image sensor integrated circuit features simple floating-gate structure, with metal-oxide/semiconductor field-effect transistor (MOSFET) as active circuit element in each pixel. Provides flexibility of readout modes, no kTC noise, and relatively simple structure suitable for high-density arrays. Features desirable for "smart sensor" applications.

Technologies for converter topologies

DOEpatents

Zhou, Yan; Zhang, Haiyu

2017-02-28

In some embodiments of the disclosed inverter topologies, an inverter may include a full bridge LLC resonant converter, a first boost converter, and a second boost converter. In such embodiments, the first and second boost converters operate in an interleaved manner. In other disclosed embodiments, the inverter may include a half-bridge inverter circuit, a resonant circuit, a capacitor divider circuit, and a transformer.

Electronic switches and control circuits: A compilation

NASA Technical Reports Server (NTRS)

1971-01-01

The innovations in this updated series of compilations dealing with electronic technology represents a carefully selected collection of items on electronic switches and control circuits. Most of the items are based on well-known circuit design concepts that have been simplified or refined to meet NASA's demanding requirement for reliability, simplicity, fail-safe characteristics, and the capability of withstanding environmental extremes.

A method for identifying EMI critical circuits during development of a large C3

NASA Astrophysics Data System (ADS)

Barr, Douglas H.

The circuit analysis methods and process Boeing Aerospace used on a large, ground-based military command, control, and communications (C3) system are described. This analysis was designed to help identify electromagnetic interference (EMI) critical circuits. The methodology used the MIL-E-6051 equipment criticality categories as the basis for defining critical circuits, relational database technology to help sort through and account for all of the approximately 5000 system signal cables, and Macintosh Plus personal computers to predict critical circuits based on safety margin analysis. The EMI circuit analysis process systematically examined all system circuits to identify which ones were likely to be EMI critical. The process used two separate, sequential safety margin analyses to identify critical circuits (conservative safety margin analysis, and detailed safety margin analysis). These analyses used field-to-wire and wire-to-wire coupling models using both worst-case and detailed circuit parameters (physical and electrical) to predict circuit safety margins. This process identified the predicted critical circuits that could then be verified by test.

Evolution of Automotive Chopper Circuits Towards Ultra High Efficiency and Power Density

NASA Astrophysics Data System (ADS)

Pavlovsky, Martin; Tsuruta, Yukinori; Kawamura, Atsuo

Automotive industry is considered to be one of the main contributors to environmental pollution and global warming. Therefore, many car manufacturers are in near future planning to introduce hybrid electric vehicles (HEV), fuel cell electric vehicles (FCEV) and pure electric vehicles (EV) to make our cars more environmentally friendly. These new vehicles require highly efficient and small power converters. In recent years, considerable improvements were made in designing such converters. In this paper, an approach based on so called Snubber Assisted Zero Voltage and Zero Current Switching topology otherwise also known as SAZZ is presented. This topology has evolved to be one of the leaders in the field of highly efficient converters with high power densities. Evolution and main features of this topology are briefly discussed. Capabilities of the topology are demonstrated on two case study prototypes based on different design approaches. The prototypes are designed to be fully bi-directional for peak power output of 30kW. Both designs reached efficiencies close to 99% in wide load range. Power densities over 40kW/litre are attainable in the same time. Combination of MOSFET technology and SAZZ topology is shown to be very beneficial to converters designed for EV applications.

Triboelectric nanogenerators as new energy technology for self-powered systems and as active mechanical and chemical sensors.

PubMed

Wang, Zhong Lin

2013-11-26

Triboelectrification is an effect that is known to each and every one probably since ancient Greek time, but it is usually taken as a negative effect and is avoided in many technologies. We have recently invented a triboelectric nanogenerator (TENG) that is used to convert mechanical energy into electricity by a conjunction of triboelectrification and electrostatic induction. As for this power generation unit, in the inner circuit, a potential is created by the triboelectric effect due to the charge transfer between two thin organic/inorganic films that exhibit opposite tribo-polarity; in the outer circuit, electrons are driven to flow between two electrodes attached on the back sides of the films in order to balance the potential. Since the most useful materials for TENG are organic, it is also named organic nanogenerator, which is the first using organic materials for harvesting mechanical energy. In this paper, we review the fundamentals of the TENG in the three basic operation modes: vertical contact-separation mode, in-plane sliding mode, and single-electrode mode. Ever since the first report of the TENG in January 2012, the output power density of TENG has been improved 5 orders of magnitude within 12 months. The area power density reaches 313 W/m(2), volume density reaches 490 kW/m(3), and a conversion efficiency of ∼60% has been demonstrated. The TENG can be applied to harvest all kinds of mechanical energy that is available but wasted in our daily life, such as human motion, walking, vibration, mechanical triggering, rotating tire, wind, flowing water, and more. Alternatively, TENG can also be used as a self-powered sensor for actively detecting the static and dynamic processes arising from mechanical agitation using the voltage and current output signals of the TENG, respectively, with potential applications for touch pad and smart skin technologies. To enhance the performance of the TENG, besides the vast choices of materials in the triboelectric series, from polymer to metal and to fabric, the morphologies of their surfaces can be modified by physical techniques with the creation of pyramid-, square-, or hemisphere-based micro- or nanopatterns, which are effective for enhancing the contact area and possibly the triboelectrification. The surfaces of the materials can be functionalized chemically using various molecules, nanotubes, nanowires, or nanoparticles, in order to enhance the triboelectric effect. The contact materials can be composites, such as embedding nanoparticles in a polymer matrix, which may change not only the surface electrification but also the permittivity of the materials so that they can be effective for electrostatic induction. Therefore, there are numerous ways to enhance the performance of the TENG from the materials point of view. This gives an excellent opportunity for chemists and materials scientists to do extensive study both in the basic science and in practical applications. We anticipate that a better enhancement of the output power density will be achieved in the next few years. The TENG is possible not only for self-powered portable electronics but also as a new energy technology with potential to contribute to the world energy in the near future.

Polymer solar cells with enhanced open-circuit voltage and efficiency

NASA Astrophysics Data System (ADS)

Chen, Hsiang-Yu; Hou, Jianhui; Zhang, Shaoqing; Liang, Yongye; Yang, Guanwen; Yang, Yang; Yu, Luping; Wu, Yue; Li, Gang

2009-11-01

Following the development of the bulk heterojunction structure, recent years have seen a dramatic improvement in the efficiency of polymer solar cells. Maximizing the open-circuit voltage in a low-bandgap polymer is one of the critical factors towards enabling high-efficiency solar cells. Study of the relation between open-circuit voltage and the energy levels of the donor/acceptor in bulk heterojunction polymer solar cells has stimulated interest in modifying the open-circuit voltage by tuning the energy levels of polymers. Here, we show that the open-circuit voltage of polymer solar cells constructed based on the structure of a low-bandgap polymer, PBDTTT, can be tuned, step by step, using different functional groups, to achieve values as high as 0.76 V. This increased open-circuit voltage combined with a high short-circuit current density results in a polymer solar cell with a power conversion efficiency as high as 6.77%, as certified by the National Renewable Energy Laboratory.

The circuit of polychromator for Experimental Advanced Superconducting Tokamak edge Thomson scattering diagnostic.

PubMed

Zang, Qing; Hsieh, C L; Zhao, Junyu; Chen, Hui; Li, Fengjuan

2013-09-01

The detector circuit is the core component of filter polychromator which is used for scattering light analysis in Thomson scattering diagnostic, and is responsible for the precision and stability of a system. High signal-to-noise and stability are primary requirements for the diagnostic. Recently, an upgraded detector circuit for weak light detecting in Experimental Advanced Superconducting Tokamak (EAST) edge Thomson scattering system has been designed, which can be used for the measurement of large electron temperature (T(e)) gradient and low electron density (n(e)). In this new circuit, a thermoelectric-cooled avalanche photodiode with the aid circuit is involved for increasing stability and enhancing signal-to-noise ratio (SNR), especially the circuit will never be influenced by ambient temperature. These features are expected to improve the accuracy of EAST Thomson diagnostic dramatically. Related mechanical construction of the circuit is redesigned as well for heat-sinking and installation. All parameters are optimized, and SNR is dramatically improved. The number of minimum detectable photons is only 10.

International Conference on Integrated Optical Circuit Engineering, 1st, Cambridge, MA, October 23-25, 1984, Proceedings

NASA Astrophysics Data System (ADS)

Ostrowsky, D. B.; Sriram, S.

Aspects of waveguide technology are explored, taking into account waveguide fabrication techniques in GaAs/GaAlAs, the design and fabrication of AlGaAs/GaAs phase couplers for optical integrated circuit applications, ion implanted GaAs integrated optics fabrication technology, a direct writing electron beam lithography based process for the realization of optoelectronic integrated circuits, and advances in the development of semiconductor integrated optical circuits for telecommunications. Other subjects examined are related to optical signal processing, optical switching, and questions of optical bistability and logic. Attention is given to acousto-optic techniques in integrated optics, acousto-optic Bragg diffraction in proton exchanged waveguides, optical threshold logic architectures for hybrid binary/residue processors, integrated optical modulation and switching, all-optic logic devices for waveguide optics, optoelectronic switching, high-speed photodetector switching, and a mechanical optical switch.

Quantum interference in heterogeneous superconducting-photonic circuits on a silicon chip.

PubMed

Schuck, C; Guo, X; Fan, L; Ma, X; Poot, M; Tang, H X

2016-01-21

Quantum information processing holds great promise for communicating and computing data efficiently. However, scaling current photonic implementation approaches to larger system size remains an outstanding challenge for realizing disruptive quantum technology. Two main ingredients of quantum information processors are quantum interference and single-photon detectors. Here we develop a hybrid superconducting-photonic circuit system to show how these elements can be combined in a scalable fashion on a silicon chip. We demonstrate the suitability of this approach for integrated quantum optics by interfering and detecting photon pairs directly on the chip with waveguide-coupled single-photon detectors. Using a directional coupler implemented with silicon nitride nanophotonic waveguides, we observe 97% interference visibility when measuring photon statistics with two monolithically integrated superconducting single-photon detectors. The photonic circuit and detector fabrication processes are compatible with standard semiconductor thin-film technology, making it possible to implement more complex and larger scale quantum photonic circuits on silicon chips.

A power management system for energy harvesting and wireless sensor networks application based on a novel charge pump circuit

NASA Astrophysics Data System (ADS)

Aloulou, R.; De Peslouan, P.-O. Lucas; Mnif, H.; Alicalapa, F.; Luk, J. D. Lan Sun; Loulou, M.

2016-05-01

Energy Harvesting circuits are developed as an alternative solution to supply energy to autonomous sensor nodes in Wireless Sensor Networks. In this context, this paper presents a micro-power management system for multi energy sources based on a novel design of charge pump circuit to allow the total autonomy of self-powered sensors. This work proposes a low-voltage and high performance charge pump (CP) suitable for implementation in standard complementary metal oxide semiconductor (CMOS) technologies. The CP design was implemented using Cadence Virtuoso with AMS 0.35μm CMOS technology parameters. Its active area is 0.112 mm2. Consistent results were obtained between the measured findings of the chip testing and the simulation results. The circuit can operate with an 800 mV supply and generate a boosted output voltage of 2.835 V with 1 MHz as frequency.

4H-SiC JFET Multilayer Integrated Circuit Technologies Tested Up to 1000 K

NASA Technical Reports Server (NTRS)

Spry, D. J.; Neudeck, P. G.; Chen, L.; Chang, C. W.; Lukco, D.; Beheim, G. M.

2015-01-01

Testing of semiconductor electronics at temperatures above their designed operating envelope is recognized as vital to qualification and lifetime prediction of circuits. This work describes the high temperature electrical testing of prototype 4H silicon carbide (SiC) junction field effect transistor (JFET) integrated circuits (ICs) technology implemented with multilayer interconnects; these ICs are intended for prolonged operation at temperatures up to 773K (500 C). A 50 mm diameter sapphire wafer was used in place of the standard NASA packaging for this experiment. Testing was carried out between 300K (27 C) and 1150K (877 C) with successful electrical operation of all devices observed up to 1000K (727 C).

A Wide Range Temperature Sensor Using SOI Technology

NASA Technical Reports Server (NTRS)

Patterson, Richard L.; Elbuluk, Malik E.; Hammoud, Ahmad

2009-01-01

Silicon-on-insulator (SOI) technology is becoming widely used in integrated circuit chips for its advantages over the conventional silicon counterpart. The decrease in leakage current combined with lower power consumption allows electronics to operate in a broader temperature range. This paper describes the performance of an SOIbased temperature sensor under extreme temperatures and thermal cycling. The sensor comprised of a temperature-to-frequency relaxation oscillator circuit utilizing an SOI precision timer chip. The circuit was evaluated under extreme temperature exposure and thermal cycling between -190 C and +210 C. The results indicate that the sensor performed well over the entire test temperature range and it was able to re-start at extreme temperatures.

Proton Tolerance of SiGe Precision Voltage References for Extreme Temperature Range Electronics

NASA Astrophysics Data System (ADS)

Najafizadeh, Laleh; Bellini, Marco; Prakash, A. P. Gnana; Espinel, Gustavo A.; Cressler, John D.; Marshall, Paul W.; Marshall, Cheryl J.

2006-12-01

A comprehensive investigation of the effects of proton irradiation on the performance of SiGe BiCMOS precision voltage references intended for extreme environment operational conditions is presented. The voltage reference circuits were designed in two distinct SiGe BiCMOS technology platforms (first generation (50 GHz) and third generation (200 GHz)) in order to investigate the effect of technology scaling. The circuits were irradiated at both room temperature and at 77 K. Measurement results from the experiments indicate that the proton-induced changes in the SiGe bandgap references are minor, even down to cryogenic temperatures, clearly good news for the potential application of SiGe mixed-signal circuits in emerging extreme environments

Silica-on-silicon waveguide quantum circuits.

PubMed

Politi, Alberto; Cryan, Martin J; Rarity, John G; Yu, Siyuan; O'Brien, Jeremy L

2008-05-02

Quantum technologies based on photons will likely require an integrated optics architecture for improved performance, miniaturization, and scalability. We demonstrate high-fidelity silica-on-silicon integrated optical realizations of key quantum photonic circuits, including two-photon quantum interference with a visibility of 94.8 +/- 0.5%; a controlled-NOT gate with an average logical basis fidelity of 94.3 +/- 0.2%; and a path-entangled state of two photons with fidelity of >92%. These results show that it is possible to directly "write" sophisticated photonic quantum circuits onto a silicon chip, which will be of benefit to future quantum technologies based on photons, including information processing, communication, metrology, and lithography, as well as the fundamental science of quantum optics.

Hybrid-integrated coherent receiver using silica-based planar lightwave circuit technology

NASA Astrophysics Data System (ADS)

Kim, Jong-Hoi; Choe, Joong-Seon; Choi, Kwang-Seong; Youn, Chun-Ju; Kim, Duk-Jun; Jang, Sun-Hyok; Kwon, Yong-Hwan; Nam, Eun-Soo

2011-12-01

A hybrid-integrated coherent receiver module has been achieved using flip-chip bonding technology, consisting of a silica-based 90°-hybrid planar lightwave circuit (PLC) platform, a spot-size converter integrated waveguide photodiode (SSC-WG-PD), and a dual-channel transimpedance amplifier (TIA). The receiver module shows error-free operation up to 40Gb/s and OSNR sensitivity of 11.5 dB for BER = 10-3 at 25 Gb/s.

V-band integrated quadriphase modulator

NASA Technical Reports Server (NTRS)

Grote, A.; Chang, K.

1983-01-01

A V-band integrated circuit quadriphase shift keyed modulator/exciter for space communications systems was developed. Intersatellite communications systems require direct modulation at 60 GHz to enhance signal processing capability. For most systems, particularly space applications, small and lightweight components are essential to alleviate severe system design constraints. Thus to achieve wideband, high data rate systems, direct modulation techniques at millimeter waves using solid state integrated circuit technology are an integral part of the overall technology developments.

Monolithic microwave integrated circuit technology for advanced space communication

NASA Technical Reports Server (NTRS)

Ponchak, George E.; Romanofsky, Robert R.

1988-01-01

Future Space Communications subsystems will utilize GaAs Monolithic Microwave Integrated Circuits (MMIC's) to reduce volume, weight, and cost and to enhance system reliability. Recent advances in GaAs MMIC technology have led to high-performance devices which show promise for insertion into these next generation systems. The status and development of a number of these devices operating from Ku through Ka band will be discussed along with anticipated potential applications.

DOE Office of Scientific and Technical Information (OSTI.GOV)

Bell, Nelson S.; Sarobol, Pylin; Cook, Adam

There is a rising interest in developing functional electronics using additively manufactured components. Considerations in materials selection and pathways to forming hybrid circuits and devices must demonstrate useful electronic function; must enable integration; and must complement the complex shape, low cost, high volume, and high functionality of structural but generally electronically passive additively manufactured components. This article reviews several emerging technologies being used in industry and research/development to provide integration advantages of fabricating multilayer hybrid circuits or devices. First, we review a maskless, noncontact, direct write (DW) technology that excels in the deposition of metallic colloid inks for electrical interconnects.more » Second, we review a complementary technology, aerosol deposition (AD), which excels in the deposition of metallic and ceramic powder as consolidated, thick conformal coatings and is additionally patternable through masking. As a result, we show examples of hybrid circuits/devices integrated beyond 2-D planes, using combinations of DW or AD processes and conventional, established processes.« less

Effects on Organic Photovoltaics Using Femtosecond-Laser-Treated Indium Tin Oxides.

PubMed

Chen, Mei-Hsin; Tseng, Ya-Hsin; Chao, Yi-Ping; Tseng, Sheng-Yang; Lin, Zong-Rong; Chu, Hui-Hsin; Chang, Jan-Kai; Luo, Chih-Wei

2016-09-28

The effects of femtosecond-laser-induced periodic surface structures (LIPSS) on an indium tin oxide (ITO) surface applied to an organic photovoltaic (OPV) system were investigated. The modifications of ITO induced by LIPPS in OPV devices result in more than 14% increase in power conversion efficiency (PCE) and short-circuit current density relative to those of the standard device. The basic mechanisms for the enhanced short-circuit current density are attributed to better light harvesting, increased scattering effects, and more efficient charge collection between the ITO and photoactive layers. Results show that higher PCEs would be achieved by laser-pulse-treated electrodes.

Using high haze (> 90%) light-trapping film to enhance the efficiency of a-Si:H solar cells

NASA Astrophysics Data System (ADS)

Chu, Wei-Ping; Lin, Jian-Shian; Lin, Tien-Chai; Tsai, Yu-Sheng; Kuo, Chen-Wei; Chung, Ming-Hua; Hsieh, Tsung-Eong; Liu, Lung-Chang; Juang, Fuh-Shyang; Chen, Nien-Po

2012-07-01

The high haze light-trapping (LT) film offers enhanced scattering of light and is applied to a-Si:H solar cells. UV glue was spin coated on glass, and then the LT pattern was imprinted. Finally, a UV lamp was used to cure the UV glue on the glass. The LT film effectively increased the Haze ratio of glass and decreased the reflectance of a-Si:H solar cells. Therefore, the photon path length was increased to obtain maximum absorption by the absorber layer. High Haze LT film is able to enhance short circuit current density and efficiency of the device, as partial composite film generates broader scattering light, thereby causing shorter wave length light to be absorbed by the P layer so that the short circuit current density decreases. In case of lab-made a-Si:H thin film solar cells with v-shaped LT films, superior optoelectronic performances have been found (Voc = 0.74 V, Jsc = 15.62 mA/cm2, F.F. = 70%, and η = 8.09%). We observed ~ 35% enhancement of the short-circuit current density and ~ 31% enhancement of the conversion efficiency.

Electrolyte Concentration Effect of a Photoelectrochemical Cell Consisting of TiO 2 Nanotube Anode

DOE PAGES

Ren, Kai; Gan, Yong X.; Nikolaidis, Efstratios; ...

2013-01-01

The photoelectrochemical responses of a TiO 2 nanotube anode in ethylene glycol (EG), glycerol, ammonia, ethanol, urea, and Na 2 S electrolytes with different concentrations were investigated. The TiO 2 nanotube anode was highly efficient in photoelectrocatalysis in these solutions under UV light illumination. The photocurrent density is obviously affected by the concentration change. Na 2 S generated the highest photocurrent density at 0, 1, and 2 V bias voltages, but its concentration does not significantly affect the photocurrent density. Urea shows high open circuit voltage at proper concentration and low photocurrent at different concentrations. Externally applied bias voltage is alsomore » an important factor that changes the photoelectrochemical reaction process. In view of the open circuit voltage, EG, ammonia, and ethanol fuel cells show the trend that the open circuit voltage (OCV) increases with the increase of the concentration of the solutions. Glycerol has the highest OCV compared with others, and it deceases with the increase in the concentration because of the high viscosity. The OCV of the urea and Na 2 S solutions did not show obvious concentration effect.« less

A procedural method for the efficient implementation of full-custom VLSI designs

NASA Technical Reports Server (NTRS)

Belk, P.; Hickey, N.

1987-01-01

An imbedded language system for the layout of very large scale integration (VLSI) circuits is examined. It is shown that through the judicious use of this system, a large variety of circuits can be designed with circuit density and performance comparable to traditional full-custom design methods, but with design costs more comparable to semi-custom design methods. The high performance of this methodology is attributable to the flexibility of procedural descriptions of VLSI layouts and to a number of automatic and semi-automatic tools within the system.

DOE Office of Scientific and Technical Information (OSTI.GOV)

Tanaka, T.J.; Antonescu, C.

A program to assess the impact of smoke on digital instrumentation and control (I and C) safety systems began in 1994, funded by the US Nuclear Regulatory Commission Office of Research. Digital I and C safety systems are likely replacements for today`s analog systems. The nuclear industry has little experience in qualifying digital electronics for critical systems, part of which is understanding system performance during plant fires. The results of tests evaluating the performance of digital circuits and chip technologies exposed to the various smoke and humidity conditions representative of cable fires are discussed. Tests results show that low tomore » moderate smoke densities can cause intermittent failures of digital systems. Smoke increases leakage currents between biased contacts, leading to shorts. Chips with faster switching times, and thus higher output drive currents, are less sensitive to leakage currents and thus to smoke. Contact corrosion from acidic gases in smoke and inductance of stray capacitance are less important contributors to system upset. Transmission line coupling was increased because the smoke acted as a conductive layer between the lines. Permanent circuit damage was not obvious in the 24 hr of circuit monitoring. Test results also show that polyurethane, parylene, and acrylic conformal coatings are more effective in protecting against smoke than epoxy or silicone. Common-sense mitigation measures are discussed. Unfortunately the authors are a long way from standard tests for smoke exposure that capture the variations in smoke exposure possible in an actual fire.« less

The importance of band tail recombination on current collection and open-circuit voltage in CZTSSe solar cells

DOE Office of Scientific and Technical Information (OSTI.GOV)

Moore, James E.; Purdue University, West Lafayette, Indiana 47907; Hages, Charles J.

2016-07-11

Cu{sub 2}ZnSn(S,Se){sub 4} (CZTSSe) solar cells typically exhibit high short-circuit current density (J{sub sc}), but have reduced cell efficiencies relative to other thin film technologies due to a deficit in the open-circuit voltage (V{sub oc}), which prevent these devices from becoming commercially competitive. Recent research has attributed the low V{sub oc} in CZTSSe devices to small scale disorder that creates band tail states within the absorber band gap, but the physical processes responsible for this V{sub oc} reduction have not been elucidated. In this paper, we show that carrier recombination through non-mobile band tail states has a strong voltage dependencemore » and is a significant performance-limiting factor, and including these effects in simulation allows us to simultaneously explain the V{sub oc} deficit, reduced fill factor, and voltage-dependent quantum efficiency with a self-consistent set of material parameters. Comparisons of numerical simulations to measured data show that reasonable values for the band tail parameters (characteristic energy, capture rate) can account for the observed low V{sub oc}, high J{sub sc}, and voltage dependent collection efficiency. These results provide additional evidence that the presence of band tail states accounts for the low efficiencies of CZTSSe solar cells and further demonstrates that recombination through non-mobile band tail states is the dominant efficiency limiting mechanism.« less

Ag Nanoparticle-Based Triboelectric Nanogenerator To Scavenge Wind Energy for a Self-Charging Power Unit.

PubMed

Jiang, Qiang; Chen, Bo; Zhang, Kewei; Yang, Ya

2017-12-20

Li-ion batteries are a green energy storage technology with advantages of high energy density, long lifetime, and sustainability, but they cannot generate electric energy by themselves. As a novel energy-harvesting technology, triboelectric nanogenerators (TENGs) are a promising power source for supplying electronic devices, however it is difficult to directly use their high output voltage and low output current. Here, we designed a Ag nanoparticle-based TENG for scavenging wind energy. After including a transformer and a power management circuit into the system, constant output voltages such as 3.6 V and a pulsed current of about 100 mA can be obtained, which can be used to directly light up a light-emitting diode. Furthermore, the produced electric energy can be effectively stored in a WO 3 /LiMn 2 O 4 electrode based Li-ion battery. Our present work provides a new approach to effectively scavenge wind energy and store the obtained electric energy, which is significant for exploring self-charging power units.

Fast assembly of ordered block copolymer nanostructures through microwave annealing.

PubMed

Zhang, Xiaojiang; Harris, Kenneth D; Wu, Nathanael L Y; Murphy, Jeffrey N; Buriak, Jillian M

2010-11-23

Block copolymer self-assembly is an innovative technology capable of patterning technologically relevant substrates with nanoscale precision for a range of applications from integrated circuit fabrication to tissue interfacing, for example. In this article, we demonstrate a microwave-based method of rapidly inducing order in block copolymer structures. The technique involves the usage of a commercial microwave reactor to anneal block copolymer films in the presence of appropriate solvents, and we explore the effect of various parameters over the polymer assembly speed and defect density. The approach is applied to the commonly used poly(styrene)-b-poly(methyl methacrylate) (PS-b-PMMA) and poly(styrene)-b-poly(2-vinylpyridine) (PS-b-P2VP) families of block copolymers, and it is found that the substrate resistivity, solvent environment, and anneal temperature all critically influence the self-assembly process. For selected systems, highly ordered patterns were achieved in less than 3 min. In addition, we establish the compatibility of the technique with directed assembly by graphoepitaxy.

Switched-capacitor realization of presynaptic short-term-plasticity and stop-learning synapses in 28 nm CMOS

PubMed Central

Noack, Marko; Partzsch, Johannes; Mayr, Christian G.; Hänzsche, Stefan; Scholze, Stefan; Höppner, Sebastian; Ellguth, Georg; Schüffny, Rene

2015-01-01

Synaptic dynamics, such as long- and short-term plasticity, play an important role in the complexity and biological realism achievable when running neural networks on a neuromorphic IC. For example, they endow the IC with an ability to adapt and learn from its environment. In order to achieve the millisecond to second time constants required for these synaptic dynamics, analog subthreshold circuits are usually employed. However, due to process variation and leakage problems, it is almost impossible to port these types of circuits to modern sub-100nm technologies. In contrast, we present a neuromorphic system in a 28 nm CMOS process that employs switched capacitor (SC) circuits to implement 128 short term plasticity presynapses as well as 8192 stop-learning synapses. The neuromorphic system consumes an area of 0.36 mm2 and runs at a power consumption of 1.9 mW. The circuit makes use of a technique for minimizing leakage effects allowing for real-time operation with time constants up to several seconds. Since we rely on SC techniques for all calculations, the system is composed of only generic mixed-signal building blocks. These generic building blocks make the system easy to port between technologies and the large digital circuit part inherent in an SC system benefits fully from technology scaling. PMID:25698914

Polymorphic Electronic Circuits

NASA Technical Reports Server (NTRS)

Stoica, Adrian

2004-01-01

Polymorphic electronics is a nascent technological discipline that involves, among other things, designing the same circuit to perform different analog and/or digital functions under different conditions. For example, a circuit can be designed to function as an OR gate or an AND gate, depending on the temperature (see figure). Polymorphic electronics can also be considered a subset of polytronics, which is a broader technological discipline in which optical and possibly other information- processing systems could also be designed to perform multiple functions. Polytronics is an outgrowth of evolvable hardware (EHW). The basic concepts and some specific implementations of EHW were described in a number of previous NASA Tech Briefs articles. To recapitulate: The essence of EHW is to design, construct, and test a sequence of populations of circuits that function as incrementally better solutions of a given design problem through the selective, repetitive connection and/or disconnection of capacitors, transistors, amplifiers, inverters, and/or other circuit building blocks. The evolution is guided by a search-and-optimization algorithm (in particular, a genetic algorithm) that operates in the space of possible circuits to find a circuit that exhibits an acceptably close approximation of the desired functionality. The evolved circuits can be tested by computational simulation (in which case the evolution is said to be extrinsic), tested in real hardware (in which case the evolution is said to be intrinsic), or tested in random sequences of computational simulation and real hardware (in which case the evolution is said to be mixtrinsic).

Beyond Moore’s technologies: operation principles of a superconductor alternative

PubMed Central

Klenov, Nikolay V; Bakurskiy, Sergey V; Kupriyanov, Mikhail Yu; Gudkov, Alexander L; Sidorenko, Anatoli S

2017-01-01

The predictions of Moore’s law are considered by experts to be valid until 2020 giving rise to “post-Moore’s” technologies afterwards. Energy efficiency is one of the major challenges in high-performance computing that should be answered. Superconductor digital technology is a promising post-Moore’s alternative for the development of supercomputers. In this paper, we consider operation principles of an energy-efficient superconductor logic and memory circuits with a short retrospective review of their evolution. We analyze their shortcomings in respect to computer circuits design. Possible ways of further research are outlined. PMID:29354341

Walk-through survey report: Control technology for integrated circuit fabrication, Xerox Corporation, El Segundo, California

NASA Astrophysics Data System (ADS)

Mihlan, G. J.; Ungers, L. J.; Smith, R. K.; Mitchell, R. I.; Jones, J. H.

1983-05-01

A preliminary control technology assessment survey was conducted at the facility which manufactures N-channel metal oxide semiconductor (NMOS) integrated circuits. The facility has industrial hygiene review procedures for evaluating all new and existing process equipment. Employees are trained in safety, use of personal protective equipment, and emergency response. Workers potentially exposed to arsenic are monitored for urinary arsenic levels. The facility should be considered a candidate for detailed study based on the diversity of process operations encountered and the use of state-of-the-art technology and process equipment.

Design of a 0.13 µm SiGe Limiting Amplifier with 14.6 THz Gain-Bandwidth-Product

NASA Astrophysics Data System (ADS)

Park, Sehoon; Du, Xuan-Quang; Grözing, Markus; Berroth, Manfred

2017-09-01

This paper presents the design of a limiting amplifier with 1-to-3 fan-out implementation in a 0.13 µm SiGe BiCMOS technology and gives a detailed guideline to determine the circuit parameters of the amplifier for optimum high-frequency performance based on simplified gain estimations. The proposed design uses a Cherry-Hooper topology for bandwidth enhancement and is optimized for maximum group delay flatness to minimize phase distortion of the input signal. With regard to a high integration density and a small chip area, the design employs no passive inductors which might be used to boost the circuit bandwidth with inductive peaking. On a RLC-extracted post-layout simulation level, the limiting amplifier exhibits a gain-bandwidth-product of 14.6 THz with 56.6 dB voltage gain and 21.5 GHz 3 dB bandwidth at a peak-to-peak input voltage of 1.5 mV. The group delay variation within the 3 dB bandwidth is less than 0.5 ps and the power dissipation at a power supply voltage of 3 V including output drivers is 837 mW.

Integrated digital printing of flexible circuits for wireless sensing (Conference Presentation)

NASA Astrophysics Data System (ADS)

Mei, Ping; Whiting, Gregory L.; Schwartz, David E.; Ng, Tse Nga; Krusor, Brent S.; Ready, Steve E.; Daniel, George; Veres, Janos; Street, Bob

2016-09-01

Wireless sensing has broad applications in a wide variety of fields such as infrastructure monitoring, chemistry, environmental engineering and cold supply chain management. Further development of sensing systems will focus on achieving light weight, flexibility, low power consumption and low cost. Fully printed electronics provide excellent flexibility and customizability, as well as the potential for low cost and large area applications, but lack solutions for high-density, high-performance circuitry. Conventional electronics mounted on flexible printed circuit boards provide high performance but are not digitally fabricated or readily customizable. Incorporation of small silicon dies or packaged chips into a printed platform enables high performance without compromising flexibility or cost. At PARC, we combine high functionality c-Si CMOS and digitally printed components and interconnects to create an integrated platform that can read and process multiple discrete sensors. Our approach facilitates customization to a wide variety of sensors and user interfaces suitable for a broad range of applications including remote monitoring of health, structures and environment. This talk will describe several examples of printed wireless sensing systems. The technologies required for these sensor systems are a mix of novel sensors, printing processes, conventional microchips, flexible substrates and energy harvesting power solutions.

Harvesting energy from the natural vibration of human walking.

PubMed

Yang, Weiqing; Chen, Jun; Zhu, Guang; Yang, Jin; Bai, Peng; Su, Yuanjie; Jing, Qingsheng; Cao, Xia; Wang, Zhong Lin

2013-12-23

The triboelectric nanogenerator (TENG), a unique technology for harvesting ambient mechanical energy based on the triboelectric effect, has been proven to be a cost-effective, simple, and robust approach for self-powered systems. However, a general challenge is that the output current is usually low. Here, we demonstrated a rationally designed TENG with integrated rhombic gridding, which greatly improved the total current output owing to the structurally multiplied unit cells connected in parallel. With the hybridization of both the contact-separation mode and sliding electrification mode among nanowire arrays and nanopores fabricated onto the surfaces of two contact plates, the newly designed TENG produces an open-circuit voltage up to 428 V, and a short-circuit current of 1.395 mA with the peak power density of 30.7 W/m(2). Relying on the TENG, a self-powered backpack was developed with a vibration-to-electric energy conversion efficiency up to 10.62(±1.19) %. And it was also demonstrated as a direct power source for instantaneously lighting 40 commercial light-emitting diodes by harvesting the vibration energy from natural human walking. The newly designed TENG can be a mobile power source for field engineers, explorers, and disaster-relief workers.

Modular minimally invasive extracorporeal circulation systems; can they become the standard practice for performing cardiac surgery?

PubMed

Anastasiadis, K; Antonitsis, P; Argiriadou, H; Deliopoulos, A; Grosomanidis, V; Tossios, P

2015-04-01

Minimally invasive extracorporeal circulation (MiECC) has been developed in an attempt to integrate all advances in cardiopulmonary bypass technology in one closed circuit that shows improved biocompatibility and minimizes the systemic detrimental effects of CPB. Despite well-evidenced clinical advantages, penetration of MiECC technology into clinical practice is hampered by concerns raised by perfusionists and surgeons regarding air handling together with blood and volume management during CPB. We designed a modular MiECC circuit, bearing an accessory circuit for immediate transition to an open system that can be used in every adult cardiac surgical procedure, offering enhanced safety features. We challenged this modular circuit in a series of 50 consecutive patients. Our results showed that the modular AHEPA circuit design offers 100% technical success rate in a cohort of random, high-risk patients who underwent complex procedures, including reoperation and valve and aortic surgery, together with emergency cases. This pilot study applies to the real world and prompts for further evaluation of modular MiECC systems through multicentre trials. © The Author(s) 2015.

Radiation-Hard Complementary Integrated Circuits Based on Semiconducting Single-Walled Carbon Nanotubes.

PubMed

McMorrow, Julian J; Cress, Cory D; Gaviria Rojas, William A; Geier, Michael L; Marks, Tobin J; Hersam, Mark C

2017-03-28

Increasingly complex demonstrations of integrated circuit elements based on semiconducting single-walled carbon nanotubes (SWCNTs) mark the maturation of this technology for use in next-generation electronics. In particular, organic materials have recently been leveraged as dopant and encapsulation layers to enable stable SWCNT-based rail-to-rail, low-power complementary metal-oxide-semiconductor (CMOS) logic circuits. To explore the limits of this technology in extreme environments, here we study total ionizing dose (TID) effects in enhancement-mode SWCNT-CMOS inverters that employ organic doping and encapsulation layers. Details of the evolution of the device transport properties are revealed by in situ and in operando measurements, identifying n-type transistors as the more TID-sensitive component of the CMOS system with over an order of magnitude larger degradation of the static power dissipation. To further improve device stability, radiation-hardening approaches are explored, resulting in the observation that SWNCT-CMOS circuits are TID-hard under dynamic bias operation. Overall, this work reveals conditions under which SWCNTs can be employed for radiation-hard integrated circuits, thus presenting significant potential for next-generation satellite and space applications.

Transistor Level Circuit Experiments using Evolvable Hardware

NASA Technical Reports Server (NTRS)

Stoica, A.; Zebulum, R. S.; Keymeulen, D.; Ferguson, M. I.; Daud, Taher; Thakoor, A.

2005-01-01

The Jet Propulsion Laboratory (JPL) performs research in fault tolerant, long life, and space survivable electronics for the National Aeronautics and Space Administration (NASA). With that focus, JPL has been involved in Evolvable Hardware (EHW) technology research for the past several years. We have advanced the technology not only by simulation and evolution experiments, but also by designing, fabricating, and evolving a variety of transistor-based analog and digital circuits at the chip level. EHW refers to self-configuration of electronic hardware by evolutionary/genetic search mechanisms, thereby maintaining existing functionality in the presence of degradations due to aging, temperature, and radiation. In addition, EHW has the capability to reconfigure itself for new functionality when required for mission changes or encountered opportunities. Evolution experiments are performed using a genetic algorithm running on a DSP as the reconfiguration mechanism and controlling the evolvable hardware mounted on a self-contained circuit board. Rapid reconfiguration allows convergence to circuit solutions in the order of seconds. The paper illustrates hardware evolution results of electronic circuits and their ability to perform under 230 C temperature as well as radiations of up to 250 kRad.

Enhancement of Open-Circuit Voltage by Using the 58-π Silylmethyl Fullerenes in Small-Molecule Organic Solar Cells.

PubMed

Jeon, Il; Delacou, Clément; Nakagawa, Takafumi; Matsuo, Yutaka

2016-04-20

The application of 58-π-1,4-bis(silylmethyl)[60]fullerenes, C60 (CH2 SiMe2 Ph)(CH2 SiMe2 Ar) (Ar=Ph and 2-methoxylphenyl for SIMEF-1 and SIMEF-2, respectively), in small-molecule organic solar cells with a diketopyrrolopyrrole donor (3,6-bis[5-(benzofuran-2-yl)thiophen-2-yl]-2,5-bis(2-ethylhexyl)pyrrolo[3,4-c]pyrrole-1,4-dione (DPP(TBFu)2 )) is demonstrated. With the 58-π-silylmethyl fullerene acceptor, SIMEF-1, the devices showed the highest efficiency of 4.57 % with an average of 4.10 %. They manifested an improved open-circuit voltage (1.03 V) owing to the high-lying LUMO level of SIMEF-1, while maintaining a high short-circuit density (9.91 mA cm(-2) ) through controlling the crystallinity of DPP by thermal treatment. On the other hand, despite even higher open-circuit voltage (1.05 V), SIMEF-2-based devices showed lower performances of 3.53 %, owing to a low short-circuit current density (8.33 mA cm(-2) ) and fill factor (0.40) arising from the asymmetric structure, which results in a lower mobility and immiscibility. © 2016 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

CdS/p-Si solar cells made by serigraphy

DOE Office of Scientific and Technical Information (OSTI.GOV)

Garcia, F.J.; Ortiz-Conde, A.; Sa-Neto, A.

1988-04-11

CdS/p-Si solar cells have been fabricated depositing the CdS layer by serigraphy. Open circuit voltages of 538 mV, short circuit current densities of 32 mA cm/sup -2/, fill factors of 0.52, and conversion efficiencies of 8.1% have been measured under 100 mW cm/sup -2/ (AM1) simulated solar illumination.

Printed Electronic Devices in Human Spaceflight

NASA Technical Reports Server (NTRS)

Bacon, John B.

2004-01-01

The space environment requires robust sensing, control, and automation, whether in support of human spaceflight or of robotic exploration. Spaceflight embodies the known extremes of temperature, radiation, shock, vibration, and static loads, and demands high reliability at the lowest possible mass. Because printed electronic circuits fulfill all these requirements, printed circuit technology and the exploration of space have been closely coupled throughout their short histories. In this presentation, we will explore the space (and space launch) environments as drivers of printed circuit design, a brief history of NASA's use of printed electronic circuits, and we will examine future requirements for such circuits in our continued exploration of space.

RF-Plasma Source Commissioning in Indian Negative Ion Facility

NASA Astrophysics Data System (ADS)

Singh, M. J.; Bandyopadhyay, M.; Bansal, G.; Gahlaut, A.; Soni, J.; Kumar, Sunil; Pandya, K.; Parmar, K. G.; Sonara, J.; Yadava, Ratnakar; Chakraborty, A. K.; Kraus, W.; Heinemann, B.; Riedl, R.; Obermayer, S.; Martens, C.; Franzen, P.; Fantz, U.

2011-09-01

The Indian program of the RF based negative ion source has started off with the commissioning of ROBIN, the inductively coupled RF based negative ion source facility under establishment at Institute for Plasma research (IPR), India. The facility is being developed under a technology transfer agreement with IPP Garching. It consists of a single RF driver based beam source (BATMAN replica) coupled to a 100 kW, 1 MHz RF generator with a self excited oscillator, through a matching network, for plasma production and ion extraction and acceleration. The delivery of the RF generator and the RF plasma source without the accelerator, has enabled initiation of plasma production experiments. The recent experimental campaign has established the matching circuit parameters that result in plasma production with density in the range of 0.5-1×1018/m3, at operational gas pressures ranging between 0.4-1 Pa. Various configurations of the matching network have been experimented upon to obtain a stable operation of the set up for RF powers ranging between 25-85 kW and pulse lengths ranging between 4-20 s. It has been observed that the range of the parameters of the matching circuit, over which the frequency of the power supply is stable, is narrow and further experiments with increased number of turns in the coil are in the pipeline to see if the range can be widened. In this paper, the description of the experimental system and the commissioning data related to the optimisation of the various parameters of the matching network, to obtain stable plasma of required density, are presented and discussed.

A Single Chip Automotive Control LSI Using SOI Bipolar Complimentary MOS Double-Diffused MOS

NASA Astrophysics Data System (ADS)

Kawamoto, Kazunori; Mizuno, Shoji; Abe, Hirofumi; Higuchi, Yasushi; Ishihara, Hideaki; Fukumoto, Harutsugu; Watanabe, Takamoto; Fujino, Seiji; Shirakawa, Isao

2001-04-01

Using the example of an air bag controller, a single chip solution for automotive sub-control systems is investigated, by using a technological combination of improved circuits, bipolar complimentary metal oxide silicon double-diffused metal oxide silicon (BiCDMOS) and thick silicon on insulator (SOI). For circuits, an automotive specific reduced instruction set computer (RISC) center processing unit (CPU), and a novel, all integrated system clock generator, dividing digital phase-locked loop (DDPLL) are proposed. For the device technologies, the authors use SOI-BiCDMOS with trench dielectric-isolation (TD) which enables integration of various devices in an integrated circuit (IC) while avoiding parasitic miss operations by ideal isolation. The structures of the SOI layer and TD, are optimized for obtaining desired device characteristics and high electromagnetic interference (EMI) immunity. While performing all the air bag system functions over a wide range of supply voltage, and ambient temperature, the resulting single chip reduces the electronic parts to about a half of those in the conventional air bags. The combination of single chip oriented circuits and thick SOI-BiCDMOS technologies offered in this work is valuable for size reduction and improved reliability of automotive electronic control units (ECUs).

Graphene radio frequency receiver integrated circuit.

PubMed

Han, Shu-Jen; Garcia, Alberto Valdes; Oida, Satoshi; Jenkins, Keith A; Haensch, Wilfried

2014-01-01

Graphene has attracted much interest as a future channel material in radio frequency electronics because of its superior electrical properties. Fabrication of a graphene integrated circuit without significantly degrading transistor performance has proven to be challenging, posing one of the major bottlenecks to compete with existing technologies. Here we present a fabrication method fully preserving graphene transistor quality, demonstrated with the implementation of a high-performance three-stage graphene integrated circuit. The circuit operates as a radio frequency receiver performing signal amplification, filtering and downconversion mixing. All circuit components are integrated into 0.6 mm(2) area and fabricated on 200 mm silicon wafers, showing the unprecedented graphene circuit complexity and silicon complementary metal-oxide-semiconductor process compatibility. The demonstrated circuit performance allow us to use graphene integrated circuit to perform practical wireless communication functions, receiving and restoring digital text transmitted on a 4.3-GHz carrier signal.

Functional Laser Trimming Of Thin Film Resistors On Silicon ICs

NASA Astrophysics Data System (ADS)

Mueller, Michael J.; Mickanin, Wes

1986-07-01

Modern Laser Wafer Trimming (LWT) technology achieves exceptional analog circuit performance and precision while maintain-ing the advantages of high production throughput and yield. Microprocessor-driven instrumentation has both emphasized the role of data conversion circuits and demanded sophisticated signal conditioning functions. Advanced analog semiconductor circuits with bandwidths over 1 GHz, and high precision, trimmable, thin-film resistors meet many of todays emerging circuit requirements. Critical to meeting these requirements are optimum choices of laser characteristics, proper materials, trimming process control, accurate modeling of trimmed resistor performance, and appropriate circuit design. Once limited exclusively to hand-crafted, custom integrated circuits, designs are now available in semi-custom circuit configurations. These are similar to those provided for digital designs and supported by computer-aided design (CAD) tools. Integrated with fully automated measurement and trimming systems, these quality circuits can now be produced in quantity to meet the requirements of communications, instrumentation, and signal processing markets.

Graphene radio frequency receiver integrated circuit

NASA Astrophysics Data System (ADS)

Han, Shu-Jen; Garcia, Alberto Valdes; Oida, Satoshi; Jenkins, Keith A.; Haensch, Wilfried

2014-01-01

Graphene has attracted much interest as a future channel material in radio frequency electronics because of its superior electrical properties. Fabrication of a graphene integrated circuit without significantly degrading transistor performance has proven to be challenging, posing one of the major bottlenecks to compete with existing technologies. Here we present a fabrication method fully preserving graphene transistor quality, demonstrated with the implementation of a high-performance three-stage graphene integrated circuit. The circuit operates as a radio frequency receiver performing signal amplification, filtering and downconversion mixing. All circuit components are integrated into 0.6 mm2 area and fabricated on 200 mm silicon wafers, showing the unprecedented graphene circuit complexity and silicon complementary metal-oxide-semiconductor process compatibility. The demonstrated circuit performance allow us to use graphene integrated circuit to perform practical wireless communication functions, receiving and restoring digital text transmitted on a 4.3-GHz carrier signal.

A Wireless Sensor System for Real-Time Measurement of Pressure Profiles at Lower Limb Protheses to Ensure Proper Fitting

DTIC Science & Technology

2011-10-01

been developed. The next step is to develop a the base technology into a grid like mapping sensor, construct the excitation and detection circuits...the project involves advancing the base technology into a grid -like mapping se nsor, constructing the excitation and detection circuits, modifying and...further. In conclusion, the screen printing and etching process allows for precise repeat able production of sensing elements for grid fabrication

Proposal of Magnetic Circuit using Magnetic Shielding with Bulk-Type High Tc Superconductors

NASA Astrophysics Data System (ADS)

Fukuoka, Katsuhiro; Hashimoto, Mitsuo; Tomita, Masaru; Murakami, Masato

Recently, bulk-type high Tc superconductors having a characteristic of critical current density over 104 A/cm2 in liquid nitrogen temperature (77K) on 1T, can be produced. They are promising for many practical applications such as a magnetic bearing, a magnetic levitation, a flywheel, a magnetic shielding and others. In this research, we propose a magnetic circuit that is able to use for the magnetic shield of plural superconductors as an application of bulk-type high Tc superconductors. It is a closed magnetic circuit by means of a toroidal core. Characteristics of the magnetic circuit surrounded with superconductors are evaluated and the possibility is examined. As the magnetic circuit of the ferrite core is surrounded with superconductors, the magnetic flux is shielded even if it leaked from the ferrite core.

Compatibility of Automatic Exposure Control with New Screen Phosphors in Diagnostic Roentgenography.

NASA Astrophysics Data System (ADS)

Mulvaney, James Arthur

1982-03-01

Automatic exposure control systems are used in diagnostic roentgenography to obtain proper film density for a variety of patient examinations and roentgenographic techniques. Most automatic exposure control systems have been designed for use with par speed, calcium tungstate intensifying screens. The use of screens with faster speeds and new phosphor materials has put extreme demands on present systems. The performance of a representative automatic exposure control system is investigated to determine its ability to maintain constant film density over a wide range of x-ray tube voltages and acrylic phantom thicknesses with four different intensifying screen phosphors. The effects of x-ray energy dependence, generator switching time and stored change are investigated. The system is able to maintain film density to within plus or minus 0.2 optical density units for techniques representing adult patients. A single nonadjustable tube voltage compensation circuit is adequate for the four different screen phosphors for x-ray tube voltages above sixty peak kilovolts. For techniques representing pediatric patients at high x-ray tube voltages, excess film density occurs due to stored charge in the transformer and high-voltage cables. An anticipation circuit in the automatic exposure control circuit can be modified to correct for stored charge effects. In a separate experiment the energy dependence of three different ionization chamber detectors used in automatic exposure control systems is compared directly with the energy dependence of three different screen phosphors. The data on detector sensitivity and screen speed are combined to predict the best tube voltage compensation for each combination of screen and detector.

Out-of-plane piezoelectric microresonator and oscillator circuit for monitoring engine oil contamination with diesel

NASA Astrophysics Data System (ADS)

Toledo, J.; Manzaneque, T.; Ruiz-Díez, V.; Jiménez-Márquez, F.; Kucera, M.; Pfusterschmied, G.; Wistrela, E.; Schmid, U.; Sánchez-Rojas, J. L.

2015-05-01

Real-time monitoring of the physical properties of liquids is an important subject in the automotive industry. Contamination of lubricating oil by diesel soot has a significant impact on engine wear. Resonant microstructures are regarded to be a precise and compact solution for tracking the viscosity and density of lubricant oils. Since the measurement of pure shear forces do not allow an independent determination of the density and viscosity, two out-of-plane modes for the monitoring of oil dilution with diesel have been selected. The first one (12-mode) is working at 51 kHz and the second mode (14-mode) at 340 kHz. Two parameters were measured: the quality factor and the resonance frequency from which the viscosity and density of the fluids under test can be determined, requiring only a small amount of test liquid. A PLL-based oscillator circuit was implemented based on each resonator. Our results demonstrate the performance of the resonator in oils with viscosity up to 90 mPa·s. The quality factor measured at 25°C was 7 for the 12-mode and 19 for the 14-mode. A better resolution in density and viscosity was obtained for the 14-mode, showing a resolution of 3.92·10-5 g/ml for the density and 1.27·10-1 mPa·s for the viscosity, in pure lubricant oil SAE 0W30. An alternative tracking system, based on a discrete oscillator circuit, was tested with the same resonator, showing a comparable stability and supporting our approach.

Benchmarks of a III-V TFET technology platform against the 10-nm CMOS FinFET technology node considering basic arithmetic circuits

NASA Astrophysics Data System (ADS)

Strangio, S.; Palestri, P.; Lanuzza, M.; Esseni, D.; Crupi, F.; Selmi, L.

2017-02-01

In this work, a benchmark for low-power digital applications of a III-V TFET technology platform against a conventional CMOS FinFET technology node is proposed. The analysis focuses on full-adder circuits, which are commonly identified as representative of the digital logic environment. 28T and 24T topologies, implemented in complementary-logic and transmission-gate logic, respectively, are investigated. Transient simulations are performed with a purpose-built test-bench on each single-bit full adder solution. The extracted delays and energy characteristics are post-processed and translated into figures-of-merit for multi-bit ripple-carry-adders. Trends related to the different full-adder implementations (for the same device technology platform) and to the different technology platforms (for the same full-adder topology) are presented and discussed.

Redundancy Technology With A Focused Ion Beam

NASA Astrophysics Data System (ADS)

Komano, Haruki; Hashimoto, Kazuhiko; Takigawa, Tadahiro

1989-08-01

Fuse cutting with a focused ion beam to activate redundancy circuits is proposed. In order to verify its potential usefulness, experiments have been performed. Fuse-cutting time was evaluated using aluminum fuses with a thin passivation layer, which are difficult to cut by conventional laser-beam technology due to the material's high reflectivity. The fuse width and thickness were 2 and 0.8 μm, respectively. The fuse was cut in 5 seconds with a 30 keV focused ion beam of 0.3 A/cm2 current density. Since the fuses used in DRAMs will be smaller, their cutting time will become shorter by scanning an ion beam on narrower areas. Moreover, it can be shortened by increasing current density. Fuses for redundancy technology in 256 k CMOS SRAMs were cut with a focused ion beam. The operation of the memories was checked with a memory tester. It was confirmed that memories which had failure cells operated normally after focused-ion-beam fuse-cutting. Focused ion beam irradiation effects upon a device have been studied. When a 30 keV gallium focused ion beam was irradiated near the gate of MOSFETs, a threshold voltage shift was not observed at an ion dose of 0.3 C/cm2 which corresponded to the ion dose in cutting a fuse. However, when irradiated on the gate, a threshold voltage shift was observed at ion doses of more than 8 x 10-4 C/cm2. The voltage shift was caused by the charge of ions within the passivation layer. It is necessary at least not to irradiate a focused ion beam on a device in cutting fuses. It is concluded that the focused-ion-beam method will be advantageous for future redundancy technology application.

Ultrashort pulsed laser ablation for decollation of solid state lithium-ion batteries

NASA Astrophysics Data System (ADS)

Hördemann, C.; Anand, H.; Gillner, A.

2017-08-01

Rechargeable lithium-ion batteries with liquid electrolytes are the main energy source for many electronic devices that we use in our everyday lives. However, one of the main drawbacks of this energy storage technology is the use of liquid electrolyte, which can be hazardous to the user as well as the environment. Moreover, lithium-ion batteries are limited in voltage, energy density and operating temperature range. One of the most novel and promising battery technologies available to overcome the above-mentioned drawbacks is the Solid-State Lithium-Ion Battery (SSLB). This battery type can be produced without limitations to the geometry and is also bendable, which is not possible with conventional batteries1 . Additionally, SSLBs are characterized by high volumetric and gravimetric energy density and are intrinsically safe since no liquid electrolyte is used2-4. Nevertheless, the manufacturing costs of these batteries are still high. The existing production-technologies are comparable to the processes used in the semiconductor industry and single cells are produced in batches with masked-deposition at low deposition rates. In order to decrease manufacturing costs and to move towards continuous production, Roll2Roll production methods are being proposed5, 6. These methods offer the possibility of producing large quantities of substrates with deposited SSLB-layers. From this coated substrate, single cells can be cut out. For the flexible decollation of SSLB-cells from the substrate, new manufacturing technologies have to be developed since blade-cutting, punching or conventional laser-cutting processes lead to short circuiting between the layers. Here, ultra-short pulsed laser ablation and cutting allows the flexible decollation of SSLBs. Through selective ablation of individual layers, an area for the cutting kerf is prepared to ensure a shortcut-free decollation.

A polychromator-type near-infrared spectrometer with a high-sensitivity and high-resolution photodiode array detector for pharmaceutical process monitoring on the millisecond time scale.

PubMed

Murayama, Kodai; Genkawa, Takuma; Ishikawa, Daitaro; Komiyama, Makoto; Ozaki, Yukihiro

2013-02-01

In the fine chemicals industry, particularly in the pharmaceutical industry, advanced sensing technologies have recently begun being incorporated into the process line in order to improve safety and quality in accordance with process analytical technology. For estimating the quality of powders without preparation during drug formulation, near-infrared (NIR) spectroscopy has been considered the most promising sensing approach. In this study, we have developed a compact polychromator-type NIR spectrometer equipped with a photodiode (PD) array detector. This detector is consisting of 640 InGaAs-PD elements with 20-μm pitch. Some high-specification spectrometers, which use InGaAs-PD with 512 elements, have a wavelength resolution of about 1.56 nm when covering 900-1700 nm range. On the other hand, the newly developed detector, having the PD with one of the world's highest density, enables wavelength resolution of below 1.25 nm. Moreover, thanks to the combination with a highly integrated charge amplifier array circuit, measurement speed of the detector is higher by two orders than that of existing PD array detectors. The developed spectrometer is small (120 mm × 220 mm × 200 mm) and light (6 kg), and it contains various key devices including the high-density and high-sensitivity PD array detector, NIR technology, and spectroscopy technology for a spectroscopic analyzer that has the required detection mechanism and high sensitivity for powder measurement, as well as a high-speed measuring function for blenders. Moreover, we have evaluated the characteristics of the developed NIR spectrometer, and the measurement of powder samples confirmed that it has high functionality.

ASDTIC control and standardized interface circuits applied to buck, parallel and buck-boost dc to dc power converters

NASA Technical Reports Server (NTRS)

Schoenfeld, A. D.; Yu, Y.

1973-01-01

Versatile standardized pulse modulation nondissipatively regulated control signal processing circuits were applied to three most commonly used dc to dc power converter configurations: (1) the series switching buck-regulator, (2) the pulse modulated parallel inverter, and (3) the buck-boost converter. The unique control concept and the commonality of control functions for all switching regulators have resulted in improved static and dynamic performance and control circuit standardization. New power-circuit technology was also applied to enhance reliability and to achieve optimum weight and efficiency.

Integrated testing system FiTest for diagnosis of PCBA

NASA Astrophysics Data System (ADS)

Bogdan, Arkadiusz; Lesniak, Adam

2016-12-01

This article presents the innovative integrated testing system FiTest for automatic, quick inspection of printed circuit board assemblies (PCBA) manufactured in Surface Mount Technology (SMT). Integration of Automatic Optical Inspection (AOI), In-Circuit Tests (ICT) and Functional Circuit Tests (FCT) resulted in universal hardware platform for testing variety of electronic circuits. The platform provides increased test coverage, decreased level of false calls and optimization of test duration. The platform is equipped with powerful algorithms performing tests in a stable and repetitive way and providing effective management of diagnosis.

Design, Modeling, and Fabrication of Chemical Vapor Deposition Grown MoS2 Circuits with E-Mode FETs for Large-Area Electronics.

PubMed

Yu, Lili; El-Damak, Dina; Radhakrishna, Ujwal; Ling, Xi; Zubair, Ahmad; Lin, Yuxuan; Zhang, Yuhao; Chuang, Meng-Hsi; Lee, Yi-Hsien; Antoniadis, Dimitri; Kong, Jing; Chandrakasan, Anantha; Palacios, Tomas

2016-10-12

Two-dimensional electronics based on single-layer (SL) MoS 2 offers significant advantages for realizing large-scale flexible systems owing to its ultrathin nature, good transport properties, and stable crystalline structure. In this work, we utilize a gate first process technology for the fabrication of highly uniform enhancement mode FETs with large mobility and excellent subthreshold swing. To enable large-scale MoS 2 circuit, we also develop Verilog-A compact models that accurately predict the performance of the fabricated MoS 2 FETs as well as a parametrized layout cell for the FET to facilitate the design and layout process using computer-aided design (CAD) tools. Using this CAD flow, we designed combinational logic gates and sequential circuits (AND, OR, NAND, NOR, XNOR, latch, edge-triggered register) as well as switched capacitor dc-dc converter, which were then fabricated using the proposed flow showing excellent performance. The fabricated integrated circuits constitute the basis of a standard cell digital library that is crucial for electronic circuit design using hardware description languages. The proposed design flow provides a platform for the co-optimization of the device fabrication technology and circuits design for future ubiquitous flexible and transparent electronics using two-dimensional materials.

Impact of Temporal Masking of Flip-Flop Upsets on Soft Error Rates of Sequential Circuits

NASA Astrophysics Data System (ADS)

Chen, R. M.; Mahatme, N. N.; Diggins, Z. J.; Wang, L.; Zhang, E. X.; Chen, Y. P.; Liu, Y. N.; Narasimham, B.; Witulski, A. F.; Bhuva, B. L.; Fleetwood, D. M.

2017-08-01

Reductions in single-event (SE) upset (SEU) rates for sequential circuits due to temporal masking effects are evaluated. The impacts of supply voltage, combinational-logic delay, flip-flop (FF) SEU performance, and particle linear energy transfer (LET) values are analyzed for SE cross sections of sequential circuits. Alpha particles and heavy ions with different LET values are used to characterize the circuits fabricated at the 40-nm bulk CMOS technology node. Experimental results show that increasing the delay of the logic circuit present between FFs and decreasing the supply voltage are two effective ways of reducing SE error rates for sequential circuits for particles with low LET values due to temporal masking. SEU-hardened FFs benefit less from temporal masking than conventional FFs. Circuit hardening implications for SEU-hardened and unhardened FFs are discussed.

Control technology for integrated circuit fabrication at Micro-Circuit Engineering, Incorporated, West Palm Beach, Florida

NASA Astrophysics Data System (ADS)

Mihlan, G. I.; Mitchell, R. I.; Smith, R. K.

1984-07-01

A survey to assess control technology for integrated circuit fabrication was conducted. Engineering controls included local and general exhaust ventilation, shielding, and personal protective equipment. Devices or work stations that contained toxic materials that were potentially dangerous were controlled by local exhaust ventilation. Less hazardous areas were controlled by general exhaust ventilation. Process isolation was used in the plasma etching, low pressure chemical vapor deposition, and metallization operations. Shielding was used in ion implantation units to control X-ray emissions, in contact mask alignes to limit ultraviolet (UV) emissions, and in plasma etching units to control radiofrequency and UV emissions. Most operations were automated. Use of personal protective equipment varied by job function.

Radiation Tolerant, Low Noise Phase Locked Loops in 65 nm CMOS Technology

NASA Astrophysics Data System (ADS)

Prinzie, Jeffrey; Christiansen, Jorgen; Moreira, Paulo; Steyaert, Michiel; Leroux, Paul

2018-04-01

This work presents an introduction to radiation hardened Phase Locked Loops (PLLs) for nuclear and high-energy physics application. An experimental circuit has been fabricated and irradiated with Xrays up to 600 Mrad. Heavy ions with an LET between 3.2 and 69.2 MeV.cm2/mg were used to verify the SEU cross section of the devices. A Two-photon Absorption (TPA) laser facility has been used to provide detailed results on the SEU sensitivity. The presented circuit employs TMR in the digital logic and an asynchronous phase-frequency detector (PFD) is presented. The PLL has a ringand LC-oscillator to be compared experimentally. The circuit has been fabricated in a 65 nm CMOS technology.

Simple BiCMOS CCCTA design and resistorless analog function realization.

PubMed

Tangsrirat, Worapong

2014-01-01

The simple realization of the current-controlled conveyor transconductance amplifier (CCCTA) in BiCMOS technology is introduced. The proposed BiCMOS CCCTA realization is based on the use of differential pair and basic current mirror, which results in simple structure. Its characteristics, that is, parasitic resistance (R x) and current transfer (i o/i z), are also tunable electronically by external bias currents. The realized circuit is suitable for fabrication using standard 0.35 μm BiCMOS technology. Some simple and compact resistorless applications employing the proposed CCCTA as active elements are also suggested, which show that their circuit characteristics with electronic controllability are obtained. PSPICE simulation results demonstrating the circuit behaviors and confirming the theoretical analysis are performed.

Innovation Incubator: Whisker Labs Technical Evaluation

DOE Office of Scientific and Technical Information (OSTI.GOV)

Sparn, Bethany F.; Frank, Stephen M.; Earle, Lieko

The Wells Fargo Innovation Incubator (IN2) is a program to foster and accelerate startup companies with commercial building energy-efficiency and demand management technologies. The program is funded by the Wells Fargo Foundation and co-administered by the National Renewable Energy Laboratory (NREL). Whisker Labs, an Oakland, California-based company, was one of four awardees in the first IN2 cohort and was invited to participate in the program because of its novel electrical power sensing technology for circuit breakers. The stick-on Whisker meters install directly on the front face of the circuit breakers in an electrical panel using adhesive, eliminating the need tomore » open the panel and install current transducers (CTs) on the circuit wiring.« less

Low-cost warning device industry assessment : research results.

DOT National Transportation Integrated Search

2011-12-01

Virtually all of the grade crossing train detection and warning systems in the United States use a variant of the track circuit technology developed over a century ago. Track circuits have evolved through the years, but the design and principles of o...

Achieving 12.8% Efficiency by Simultaneously Improving Open-Circuit Voltage and Short-Circuit Current Density in Tandem Organic Solar Cells.

PubMed

Qin, Yunpeng; Chen, Yu; Cui, Yong; Zhang, Shaoqing; Yao, Huifeng; Huang, Jiang; Li, Wanning; Zheng, Zhong; Hou, Jianhui

2017-06-01

Tandem organic solar cells (TOSCs), which integrate multiple organic photovoltaic layers with complementary absorption in series, have been proved to be a strong contender in organic photovoltaic depending on their advantages in harvesting a greater part of the solar spectrum and more efficient photon utilization than traditional single-junction organic solar cells. However, simultaneously improving open circuit voltage (V oc ) and short current density (J sc ) is a still particularly tricky issue for highly efficient TOSCs. In this work, by employing the low-bandgap nonfullerene acceptor, IEICO, into the rear cell to extend absorption, and meanwhile introducing PBDD4T-2F into the front cell for improving V oc , an impressive efficiency of 12.8% has been achieved in well-designed TOSC. This result is also one of the highest efficiencies reported in state-of-the-art organic solar cells. © 2017 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

A Survey of Memristive Threshold Logic Circuits.

PubMed

Maan, Akshay Kumar; Jayadevi, Deepthi Anirudhan; James, Alex Pappachen

2017-08-01

In this paper, we review different memristive threshold logic (MTL) circuits that are inspired from the synaptic action of the flow of neurotransmitters in the biological brain. The brainlike generalization ability and the area minimization of these threshold logic circuits aim toward crossing Moore's law boundaries at device, circuits, and systems levels. Fast switching memory, signal processing, control systems, programmable logic, image processing, reconfigurable computing, and pattern recognition are identified as some of the potential applications of MTL systems. The physical realization of nanoscale devices with memristive behavior from materials, such as TiO 2 , ferroelectrics, silicon, and polymers, has accelerated research effort in these application areas, inspiring the scientific community to pursue the design of high-speed, low-cost, low-power, and high-density neuromorphic architectures.

Demonstration of a High Open-Circuit Voltage GaN Betavoltaic Microbattery

NASA Astrophysics Data System (ADS)

Cheng, Zai-Jun; San, Hai-Sheng; Chen, Xu-Yuan; Liu, Bo; Feng, Zhi-Hong

2011-07-01

A high open-circuit voltage betavoltaic microbattery based on a GaN p-i-n diode is demonstrated. Under the irradiation of a 4×4 mm2 planar solid 63Ni source with an activity of 2 mCi, the open-circuit voltage Voc of the fabricated single 2×2mm2 cell reaches as high as 1.62 V, the short-circuit current density Jsc is measured to be 16nA/cm2. The microbattery has a fill factor of 55%, and the energy conversion efficiency of beta radiation into electricity reaches to 1.13%. The results suggest that GaN is a highly promising potential candidate for long-life betavoltaic microbatteries used as power supplies for microelectromechanical system devices.

Sloshing instability and electrolyte layer rupture in liquid metal batteries

NASA Astrophysics Data System (ADS)

Weber, Norbert; Beckstein, Pascal; Herreman, Wietze; Horstmann, Gerrit Maik; Nore, Caroline; Stefani, Frank; Weier, Tom

2017-05-01

Liquid metal batteries (LMBs) are discussed today as a cheap grid scale energy storage, as required for the deployment of fluctuating renewable energies. Built as stable density stratification of two liquid metals separated by a thin molten salt layer, LMBs are susceptible to short-circuit by fluid flows. Using direct numerical simulation, we study a sloshing long wave interface instability in cylindrical cells, which is already known from aluminium reduction cells. After characterising the instability mechanism, we investigate the influence of cell current, layer thickness, density, viscosity, conductivity and magnetic background field. Finally we study the shape of the interface and give a dimensionless parameter for the onset of sloshing as well as for the short-circuit.

Analog Microcontroller Model for an Energy Harvesting Round Counter

DTIC Science & Technology

2012-07-01

densities representing the duration of ≥ for all scaled piezo ................................7 1 INTRODUCTION An accurate count...limited surface area available for mounting piezos on the gun system. Figure 1. Equivalent circuit model for a piezoelectric transducer...circuit model for the linear I-V relationships is parallel combination of six stages, each of which is comprised of a series combination of a resistor , DC

Note: Fully integrated active quenching circuit achieving 100 MHz count rate with custom technology single photon avalanche diodes.

PubMed

Acconcia, G; Labanca, I; Rech, I; Gulinatti, A; Ghioni, M

2017-02-01

The minimization of Single Photon Avalanche Diodes (SPADs) dead time is a key factor to speed up photon counting and timing measurements. We present a fully integrated Active Quenching Circuit (AQC) able to provide a count rate as high as 100 MHz with custom technology SPAD detectors. The AQC can also operate the new red enhanced SPAD and provide the timing information with a timing jitter Full Width at Half Maximum (FWHM) as low as 160 ps.

Photonic integrated circuits based on silica and polymer PLC

NASA Astrophysics Data System (ADS)

Izuhara, T.; Fujita, J.; Gerhardt, R.; Sui, B.; Lin, W.; Grek, B.

2013-03-01

Various methods of hybrid integration of photonic circuits are discussed focusing on merits and challenges. Material platforms discussed in this report are mainly polymer and silica. We categorize the hybridization methods using silica and polymer waveguides into two types, chip-to-chip and on-chip integration. General reviews of these hybridization technologies from the past works are reviewed. An example for each method is discussed in details. We also discuss current status of our silica PLC hybrid integration technology.

Wafer-scale development and experimental verification of 0.36 mm2 228 mV open-circuit-voltage solid-state CMOS-compatible glucose fuel cell

NASA Astrophysics Data System (ADS)

Arata, Shigeki; Hayashi, Kenya; Nishio, Yuya; Kobayashi, Atsuki; Nakazato, Kazuo; Niitsu, Kiichi

2018-04-01

The world’s smallest (0.36 mm2) solid-state CMOS-compatible glucose fuel cell, which exhibits an open-circuit voltage (OCV) of 228 mV and a power generation density of 1.32 µW/cm2 with a 30 mM glucose solution, is reported in this paper. Compared with conventional wet etching, dry etching (reactive ion etching) for patterning minimizes damage to the anode and cathode, resulting in a cell with a small size and a high OCV, sufficient for CMOS circuit operation.

Improving yield and reliability of FIB modifications using electrical testing

NASA Astrophysics Data System (ADS)

Desplats, Romain; Benbrik, Jamel; Benteo, Bruno; Perdu, Philippe

1998-08-01

Focused Ion Beam technology has two main areas of application for ICs: modification and preparation for technological analysis. The most solicited area is modification. This involves physically modifying a circuit by cutting lines and creating new ones in order to change the electrical function of the circuit. IC planar technologies have an increasing number of metal interconnections making FIB modifications more complex and decreasing their changes of success. The yield of FIB operations on ICs reflects a downward trend that imposes a greater number of circuits to be modified in order to successfully correct a small number of them. This requires extended duration, which is not compatible with production line turn around times. To respond to this problem, two solutions can be defined: either, reducing the duration of each FIB operation or increasing the success rate of FIB modifications. Since reducing the time depends mainly on FIB operator experience, insuring a higher success rate represents a more crucial aspect as both experienced and novice operators could benefit from this improvement. In order to insure successful modifications, it is necessary to control each step of a FIB operation. To do this, we have developed a new method using in situ electrical testing which has a direct impact on the yield of FIB modifications. We will present this innovative development through a real case study of a CMOS ASIC for high-speed communications. Monitoring the electrical behavior at each step in a FIB operation makes it possible to reduce the number of circuits to be modified and consequently reduces system costs thanks to better yield control. Knowing the internal electrical behavior also gives us indications about the impact on reliability of FIB modified circuits. Finally, this approach can be applied to failure analysis and FIB operations on flip chip circuits.

Influence of the layer parameters on the performance of the CdTe solar cells

NASA Astrophysics Data System (ADS)

Haddout, Assiya; Raidou, Abderrahim; Fahoume, Mounir

2018-03-01

Influence of the layer parameters on the performances of the CdTe solar cells is analyzed by SCAPS-1D. The ZnO: Al film shows a high efficiency than SnO2:F. Moreover, the thinner window layer and lower defect density of CdS films are the factor in the enhancement of the short-circuit current density. As well, to increase the open-circuit voltage, the responsible factors are low defect density of the absorbing layer CdTe and high metal work function. For the low cost of cell production, ultrathin film CdTe cells are used with a back surface field (BSF) between CdTe and back contact, such as PbTe. Further, the simulation results show that the conversion efficiency of 19.28% can be obtained for the cell with 1-μm-thick CdTe, 0.1-μm-thick PbTe and 30-nm-thick CdS.

Calbindin D-28k and parvalbumin immunoreactivity in the frontal cortex in patients with frontal lobe dementia of non-Alzheimer type associated with amyotrophic lateral sclerosis.

PubMed Central

Ferrer, I; Tuñón, T; Serrano, M T; Casas, R; Alcántara, S; Zújar, M J; Rivera, R M

1993-01-01

The morphology and distribution of local-circuit neurons (interneurons) were examined, by calbindin D-28k and parvalbumin immunocytochemistry, in the frontal cortex (area 8) in two patients with frontal lobe dementia of non-Alzheimer type associated with classical amyotrophic lateral sclerosis (ALS), and in seven normal cases. The density of calbindin D-28k immunoreactive cells was dramatically reduced in ALS patients, but the density of parvalbumin-immunoreactive neurons was preserved. Decreased density of calbindin D-28k-immunoreactive neurons, which are mainly located in the upper cortical layers, may interfere with the normal processing of cortico-cortical connections, whereas integrity of parvalbumin-immunoreactive cells may be associated with the preservation of the major inhibitory intracortical circuits in patients with frontal lobe dementia. Images PMID:8459241

Lithium-Based High Energy Density Flow Batteries

NASA Technical Reports Server (NTRS)

Bugga, Ratnakumar V. (Inventor); West, William C. (Inventor); Kindler, Andrew (Inventor); Smart, Marshall C. (Inventor)

2014-01-01

Systems and methods in accordance with embodiments of the invention implement a lithium-based high energy density flow battery. In one embodiment, a lithium-based high energy density flow battery includes a first anodic conductive solution that includes a lithium polyaromatic hydrocarbon complex dissolved in a solvent, a second cathodic conductive solution that includes a cathodic complex dissolved in a solvent, a solid lithium ion conductor disposed so as to separate the first solution from the second solution, such that the first conductive solution, the second conductive solution, and the solid lithium ionic conductor define a circuit, where when the circuit is closed, lithium from the lithium polyaromatic hydrocarbon complex in the first conductive solution dissociates from the lithium polyaromatic hydrocarbon complex, migrates through the solid lithium ionic conductor, and associates with the cathodic complex of the second conductive solution, and a current is generated.

FAST: a framework for simulation and analysis of large-scale protein-silicon biosensor circuits.

PubMed

Gu, Ming; Chakrabartty, Shantanu

2013-08-01

This paper presents a computer aided design (CAD) framework for verification and reliability analysis of protein-silicon hybrid circuits used in biosensors. It is envisioned that similar to integrated circuit (IC) CAD design tools, the proposed framework will be useful for system level optimization of biosensors and for discovery of new sensing modalities without resorting to laborious fabrication and experimental procedures. The framework referred to as FAST analyzes protein-based circuits by solving inverse problems involving stochastic functional elements that admit non-linear relationships between different circuit variables. In this regard, FAST uses a factor-graph netlist as a user interface and solving the inverse problem entails passing messages/signals between the internal nodes of the netlist. Stochastic analysis techniques like density evolution are used to understand the dynamics of the circuit and estimate the reliability of the solution. As an example, we present a complete design flow using FAST for synthesis, analysis and verification of our previously reported conductometric immunoassay that uses antibody-based circuits to implement forward error-correction (FEC).

The circuit of polychromator for Experimental Advanced Superconducting Tokamak edge Thomson scattering diagnostic

DOE Office of Scientific and Technical Information (OSTI.GOV)

Zang, Qing; Zhao, Junyu; Chen, Hui

2013-09-15

The detector circuit is the core component of filter polychromator which is used for scattering light analysis in Thomson scattering diagnostic, and is responsible for the precision and stability of a system. High signal-to-noise and stability are primary requirements for the diagnostic. Recently, an upgraded detector circuit for weak light detecting in Experimental Advanced Superconducting Tokamak (EAST) edge Thomson scattering system has been designed, which can be used for the measurement of large electron temperature (T{sub e}) gradient and low electron density (n{sub e}). In this new circuit, a thermoelectric-cooled avalanche photodiode with the aid circuit is involved for increasingmore » stability and enhancing signal-to-noise ratio (SNR), especially the circuit will never be influenced by ambient temperature. These features are expected to improve the accuracy of EAST Thomson diagnostic dramatically. Related mechanical construction of the circuit is redesigned as well for heat-sinking and installation. All parameters are optimized, and SNR is dramatically improved. The number of minimum detectable photons is only 10.« less

A methodology of SiP testing based on boundary scan

NASA Astrophysics Data System (ADS)

Qin, He; Quan, Haiyang; Han, Yifei; Zhu, Tianrui; Zheng, Tuo

2017-10-01

System in Package (SiP) play an important role in portable, aerospace and military electronic with the microminiaturization, light weight, high density, and high reliability. At present, SiP system test has encountered the problem on system complexity and malfunction location with the system scale exponentially increase. For SiP system, this paper proposed a testing methodology and testing process based on the boundary scan technology. Combining the character of SiP system and referencing the boundary scan theory of PCB circuit and embedded core test, the specific testing methodology and process has been proposed. The hardware requirement of the under test SiP system has been provided, and the hardware platform of the testing has been constructed. The testing methodology has the character of high test efficiency and accurate malfunction location.

DfM requirements and ROI analysis for system-on-chip

NASA Astrophysics Data System (ADS)

Balasinski, Artur

2005-11-01

DfM (Design-for-Manufacturability) has become staple requirement beyond 100 nm technology node for efficient generation of mask data, cost reduction, and optimal circuit performance. Layout pattern has to comply to many requirements pertaining to database structure and complexity, suitability for image enhancement by the optical proximity correction, and mask data pattern density and distribution over the image field. These requirements are of particular complexity for Systems-on-Chip (SoC). A number of macro-, meso-, and microscopic effects such as reticle macroloading, planarization dishing, and pattern bridging or breaking would compromise fab yield, device performance, or both. In order to determine the optimal set of DfM rules applicable to the particular designs, Return-on-Investment and Failure Mode and Effect Analysis (FMEA) are proposed.

Highly Parallel Computing Architectures by using Arrays of Quantum-dot Cellular Automata (QCA): Opportunities, Challenges, and Recent Results

NASA Technical Reports Server (NTRS)

Fijany, Amir; Toomarian, Benny N.

2000-01-01

There has been significant improvement in the performance of VLSI devices, in terms of size, power consumption, and speed, in recent years and this trend may also continue for some near future. However, it is a well known fact that there are major obstacles, i.e., physical limitation of feature size reduction and ever increasing cost of foundry, that would prevent the long term continuation of this trend. This has motivated the exploration of some fundamentally new technologies that are not dependent on the conventional feature size approach. Such technologies are expected to enable scaling to continue to the ultimate level, i.e., molecular and atomistic size. Quantum computing, quantum dot-based computing, DNA based computing, biologically inspired computing, etc., are examples of such new technologies. In particular, quantum-dots based computing by using Quantum-dot Cellular Automata (QCA) has recently been intensely investigated as a promising new technology capable of offering significant improvement over conventional VLSI in terms of reduction of feature size (and hence increase in integration level), reduction of power consumption, and increase of switching speed. Quantum dot-based computing and memory in general and QCA specifically, are intriguing to NASA due to their high packing density (10(exp 11) - 10(exp 12) per square cm ) and low power consumption (no transfer of current) and potentially higher radiation tolerant. Under Revolutionary Computing Technology (RTC) Program at the NASA/JPL Center for Integrated Space Microelectronics (CISM), we have been investigating the potential applications of QCA for the space program. To this end, exploiting the intrinsic features of QCA, we have designed novel QCA-based circuits for co-planner (i.e., single layer) and compact implementation of a class of data permutation matrices, a class of interconnection networks, and a bit-serial processor. Building upon these circuits, we have developed novel algorithms and QCA-based architectures for highly parallel and systolic computation of signal/image processing applications, such as FFT and Wavelet and Wlash-Hadamard Transforms.

A Boundary Scan Test Vehicle for Direct Chip Attach Testing

NASA Technical Reports Server (NTRS)

Parsons, Heather A.; DAgostino, Saverio; Arakaki, Genji

2000-01-01

To facilitate the new faster, better and cheaper spacecraft designs, smaller more mass efficient avionics and instruments are using higher density electronic packaging technologies such as direct chip attach (DCA). For space flight applications, these technologies need to have demonstrated reliability and reasonably well defined fabrication and assembly processes before they will be accepted as baseline designs in new missions. As electronics shrink in size, not only can repair be more difficult, but 49 probing" circuitry can be very risky and it becomes increasingly more difficult to identify the specific source of a problem. To test and monitor these new technologies, the Direct Chip Attach Task, under NASA's Electronic Parts and Packaging Program (NEPP), chose the test methodology of boundary scan testing. The boundary scan methodology was developed for interconnect integrity and functional testing at hard to access electrical nodes. With boundary scan testing, active devices are used and failures can be identified to the specific device and lead. This technology permits the incorporation of "built in test" into almost any circuit and thus gives detailed test access to the highly integrated electronic assemblies. This presentation will describe boundary scan, discuss the development of the boundary scan test vehicle for DCA and current plans for testing of direct chip attach configurations.

High Density Polymer-Based Integrated Electgrode Array

DOEpatents

Maghribi, Mariam N.; Krulevitch, Peter A.; Davidson, James Courtney; Hamilton, Julie K.

2006-04-25

A high density polymer-based integrated electrode apparatus that comprises a central electrode body and a multiplicity of arms extending from the electrode body. The central electrode body and the multiplicity of arms are comprised of a silicone material with metal features in said silicone material that comprise electronic circuits.

Optics vs copper: from the perspective of "Thunderbolt" interconnect technology

NASA Astrophysics Data System (ADS)

Cheng, Hengju; Krause, Christine; Ko, Jamyuen; Gao, Miaobin; Liu, Guobin; Wu, Huichin; Qi, Mike; Lam, Chun-Chit

2013-02-01

Interconnect technology has been progressed at a very fast pace for the past decade. The signaling rates have steadily increased from 100:Mb/s to 25Gb/s. In every generation of interconnect technology evolution, optics always seems to take over at first, however, at the end, the cost advantage of copper wins over. Because of this, optical interconnects are limited to longer distance links where the attenuation in copper cable is too large for the integrated circuits to compensate. Optical interconnect has long been viewed as the premier solution in compared with copper interconnect. With the release of Thunderbolt technology, we are entering a new era in consumer electronics that runs at 10Gb/s line rate (20Gb/s throughput per connector interface). Thunderbolt interconnect technology includes both active copper cables and active optical cables as the transmission media which have very different physical characteristics. In order for optics to succeed in consumer electronics, several technology hurdles need to be cleared. For example, the optical cable needs to handle the consumer abuses such as pinch and bend. Also, the optical engine used in the active optical cable needs to be physically very small so that we don't change the looks and feels of the cable/connector. Most importantly, the cost of optics needs to come down significantly to effectively compete with the copper solution. Two interconnect technologies are compared and discussed on the relative cost, power consumption, form factor, density, and future scalability.

Multifunctional Logic Gate Controlled by Temperature

NASA Technical Reports Server (NTRS)

Stoica, Adrian; Zebulum, Ricardo

2005-01-01

A complementary metal oxide/semiconductor (CMOS) electronic circuit has been designed to function as a NAND gate at a temperature between 0 and 80 deg C and as a NOR gate at temperatures from 120 to 200 C. In the intermediate temperature range of 80 to 120 C, this circuit is expected to perform a function intermediate between NAND and NOR with degraded noise margin. The process of designing the circuit and the planned fabrication and testing of the circuit are parts of demonstration of polymorphic electronics a technological discipline that emphasizes designing the same circuit to perform different analog and/or digital functions under different conditions. In this case, the different conditions are different temperatures.

Two color interferometric electron density measurement in an axially blown arc

NASA Astrophysics Data System (ADS)

Stoller, Patrick; Carstensen, Jan; Galletti, Bernardo; Doiron, Charles; Sokolov, Alexey; Salzmann, René; Simon, Sandor; Jabs, Philipp

2016-09-01

High voltage circuit breakers protect the power grid by interrupting the current in case of a short circuit. To do so an arc is ignited between two contacts as they separate; transonic gas flow is used to cool and ultimately extinguish the arc at a current-zero crossing of the alternating current. A detailed understanding of the arc interruption process is needed to improve circuit breaker design. The conductivity of the partially ionized gas remaining after the current-zero crossing, a key parameter in determining whether the arc will be interrupted or not, is a function of the electron density. The electron density, in turn, is a function of the detailed dynamics of the arc cooling process, which does not necessarily occur under local thermodynamic equilibrium (LTE) conditions. In this work, we measure the spatially resolved line-integrated index of refraction in a near-current-zero arc stabilized in an axial flow of synthetic air with two nanosecond pulsed lasers at wavelengths of 532 nm and 671 nm. Generating a stable, cylindrically symmetric arc enables us to determine the three-dimensional index of refraction distribution using Abel inversion. Due to the wavelength dependence of the component of the index of refraction related to the free electrons, the information at two different wavelengths can be used to determine the electron density. This information allows us to determine how important it is to take into account non-equilibrium effects for accurate modeling of the physics of decaying arcs.

Integrated circuit with dissipative layer for photogenerated carriers

DOEpatents

Myers, David R.

1989-01-01

The sensitivity of an integrated circuit to single-event upsets is decreased by providing a dissi The U.S. Government has rights in this invention pursuant to Contract No. DE-ACO4-76DP00789 between the Department of Energy and AT&T Technologies, Inc.

Integrated circuit with dissipative layer for photogenerated carriers

DOEpatents

Myers, D.R.

1989-09-12

The sensitivity of an integrated circuit to single-event upsets is decreased by providing a dissi The U.S. Government has rights in this invention pursuant to Contract No. DE-ACO4-76DP00789 between the Department of Energy and AT&T Technologies, Inc.

Design of 2.4Ghz CMOS Floating Active Inductor LNA using 130nm Technology

NASA Astrophysics Data System (ADS)

Muhamad, M.; Soin, N.; Ramiah, H.

2018-03-01

This paper presents about design and optimization of CMOS active inductor integrated circuit. This active inductor implements using Silterra 0.13μm technology and simulated using Cadence Virtuoso and Spectre RF. The center frequency for this active inductor is at 2.4 GHz which follow IEEE 802.11 b/g/n standard. To reduce the chip size of silicon, active inductor is used instead of passive inductor at low noise amplifier LNA circuit. This inductor test and analyse by low noise amplifier circuit. Comparison between active with passive inductor based on LNA circuit has been performed. Result shown that the active inductor has significantly reduce the chip size with 73 % area without sacrificing the noise figure and gain of LNA which is the most important criteria in LNA. The best low noise amplifier provides a power gain (S21) of 20.7 dB with noise figure (NF) of 2.1dB.

Synthetic Gene Expression Circuits for Designing Precision Tools in Oncology

PubMed Central

Re, Angela

2017-01-01

Precision medicine in oncology needs to enhance its capabilities to match diagnostic and therapeutic technologies to individual patients. Synthetic biology streamlines the design and construction of functionalized devices through standardization and rational engineering of basic biological elements decoupled from their natural context. Remarkable improvements have opened the prospects for the availability of synthetic devices of enhanced mechanism clarity, robustness, sensitivity, as well as scalability and portability, which might bring new capabilities in precision cancer medicine implementations. In this review, we begin by presenting a brief overview of some of the major advances in the engineering of synthetic genetic circuits aimed to the control of gene expression and operating at the transcriptional, post-transcriptional/translational, and post-translational levels. We then focus on engineering synthetic circuits as an enabling methodology for the successful establishment of precision technologies in oncology. We describe significant advancements in our capabilities to tailor synthetic genetic circuits to specific applications in tumor diagnosis, tumor cell- and gene-based therapy, and drug delivery. PMID:28894736

Quantum interference in heterogeneous superconducting-photonic circuits on a silicon chip

PubMed Central

Schuck, C.; Guo, X.; Fan, L.; Ma, X.; Poot, M.; Tang, H. X.

2016-01-01

Quantum information processing holds great promise for communicating and computing data efficiently. However, scaling current photonic implementation approaches to larger system size remains an outstanding challenge for realizing disruptive quantum technology. Two main ingredients of quantum information processors are quantum interference and single-photon detectors. Here we develop a hybrid superconducting-photonic circuit system to show how these elements can be combined in a scalable fashion on a silicon chip. We demonstrate the suitability of this approach for integrated quantum optics by interfering and detecting photon pairs directly on the chip with waveguide-coupled single-photon detectors. Using a directional coupler implemented with silicon nitride nanophotonic waveguides, we observe 97% interference visibility when measuring photon statistics with two monolithically integrated superconducting single-photon detectors. The photonic circuit and detector fabrication processes are compatible with standard semiconductor thin-film technology, making it possible to implement more complex and larger scale quantum photonic circuits on silicon chips. PMID:26792424

A novel high-speed CMOS circuit based on a gang of capacitors

NASA Astrophysics Data System (ADS)

Sharroush, Sherif M.

2017-08-01

There is no doubt that complementary metal-oxide semiconductor (CMOS) circuits with wide fan-in suffers from the relatively sluggish operation. In this paper, a circuit that contains a gang of capacitors sharing their charge with each other is proposed as an alternative to long N-channel MOS and P-channel MOS stacks. The proposed scheme is investigated quantitatively and verified by simulation using the 45-nm CMOS technology with VDD = 1 V. The time delay, area and power consumption of the proposed scheme are investigated and compared with the conventional static CMOS logic circuit. It is verified that the proposed scheme achieves 52% saving in the average propagation delay for eight inputs and that it has a smaller area compared to the conventional CMOS logic when the number of inputs exceeds three and a smaller power consumption for a number of inputs exceeding two. The impacts of process variations, component mismatches and technology scaling on the proposed scheme are also investigated.

An assessment of the impact of the Department of Defense very high speed integrated circuit program

NASA Astrophysics Data System (ADS)

1982-01-01

The technical and economic effects of the Department of Defense's (DoD) development program for very-high-speed integrated circuits (VHSIC) are examined. The probable effects of this program on the domestic aspects and international position of the integrated-circuit (IC) industry as they relate to the interests of the general public and the DoD are considered. The report presents a review of the unique DoD needs that motivate VHSIC research and development; an estimate of the degree of which these needs are likely to be met by the VHSIC program; a discussion of the effects of the program's demands for manpower, materials, and design and processing technologies; the problems connected with the program's technology export controls; and an assessment of the impact of the program on the structure of the U.S. integrated-circuit industry, its continued development and production of civilian consumer products, and its international competitive position.

An RF Energy Harvester System Using UHF Micropower CMOS Rectifier Based on a Diode Connected CMOS Transistor

PubMed Central

Shokrani, Mohammad Reza; Hamidon, Mohd Nizar B.; Rokhani, Fakhrul Zaman; Shafie, Suhaidi Bin

2014-01-01

This paper presents a new type diode connected MOS transistor to improve CMOS conventional rectifier's performance in RF energy harvester systems for wireless sensor networks in which the circuits are designed in 0.18 μm TSMC CMOS technology. The proposed diode connected MOS transistor uses a new bulk connection which leads to reduction in the threshold voltage and leakage current; therefore, it contributes to increment of the rectifier's output voltage, output current, and efficiency when it is well important in the conventional CMOS rectifiers. The design technique for the rectifiers is explained and a matching network has been proposed to increase the sensitivity of the proposed rectifier. Five-stage rectifier with a matching network is proposed based on the optimization. The simulation results shows 18.2% improvement in the efficiency of the rectifier circuit and increase in sensitivity of RF energy harvester circuit. All circuits are designed in 0.18 μm TSMC CMOS technology. PMID:24782680

An RF energy harvester system using UHF micropower CMOS rectifier based on a diode connected CMOS transistor.

PubMed

Shokrani, Mohammad Reza; Khoddam, Mojtaba; Hamidon, Mohd Nizar B; Kamsani, Noor Ain; Rokhani, Fakhrul Zaman; Shafie, Suhaidi Bin

2014-01-01

This paper presents a new type diode connected MOS transistor to improve CMOS conventional rectifier's performance in RF energy harvester systems for wireless sensor networks in which the circuits are designed in 0.18  μm TSMC CMOS technology. The proposed diode connected MOS transistor uses a new bulk connection which leads to reduction in the threshold voltage and leakage current; therefore, it contributes to increment of the rectifier's output voltage, output current, and efficiency when it is well important in the conventional CMOS rectifiers. The design technique for the rectifiers is explained and a matching network has been proposed to increase the sensitivity of the proposed rectifier. Five-stage rectifier with a matching network is proposed based on the optimization. The simulation results shows 18.2% improvement in the efficiency of the rectifier circuit and increase in sensitivity of RF energy harvester circuit. All circuits are designed in 0.18 μm TSMC CMOS technology.

Design and Performance of a Miniature Radar L-Band Transceiver

NASA Technical Reports Server (NTRS)

McWatters, D.; Price, D.; Edelstein, W.

2004-01-01

Radar electronics developed for past JPL space missions historically had been custom designed and as such, given budgetary, time, and risk constraints, had not been optimized for maximum flexibility or miniaturization. To help reduce cost and risk of future radar missions, a generic radar module was conceived. The module includes a 1.25-GHz (L-band) transceiver and incorporates miniature high-density packaging of integrated circuits in die/chip form. The technology challenges include overcoming the effect of miniaturization and high packaging density to achieve the performance, reliability, and environmental ruggedness required for space missions. The module was chosen to have representative (generic) functionality most likely required from an L-band radar. For very large aperture phased-array spaceborne radar missions, the large dimensions of the array suggest the benefit of distributing the radar electronics into the antenna array. For such applications, this technology is essential in order to bring down the cost, mass, and power of the radar electronics module replicated in each panel of the array. For smaller sized arrays, a single module can be combined with the central radar controller and still provide the bene.ts of configuration .exibility, low power, and low mass. We present the design approach for the radar electronics module and the test results for its radio frequency (RF) portion: a miniature, low-power, radiation-hard L-band transceiver.

Meta-analysis of Microbial Fuel Cells Using Waste Substrates.

PubMed

Dowdy, F Ryan; Kawakita, Ryan; Lange, Matthew; Simmons, Christopher W

2018-05-01

Microbial fuel cell experimentation using waste streams is an increasingly popular field of study. One obstacle to comparing studies has been the lack of consistent conventions for reporting results such that meta-analysis can be used for large groups of experiments. Here, 134 unique microbial fuel cell experiments using waste substrates were compiled for analysis. Findings include that coulombic efficiency correlates positively with volumetric power density (p < 0.001), negatively with working volume (p < 0.05), and positively with percentage removal of chemical oxygen demand (p < 0.005). Power density in mW/m 2 correlates positively with chemical oxygen demand loading (p < 0.005), and positively with maximum open-circuit voltage (p < 0.05). Finally, single-chamber versus double-chamber reactor configurations differ significantly in maximum open-circuit voltage (p < 0.005). Multiple linear regression to predict either power density or maximum open-circuit voltage produced no significant models due to the amount of multicollinearity between predictor variables. Results indicate that statistically relevant conclusions can be drawn from large microbial fuel cell datasets. Recommendations for future consistency in reporting results following a MIAMFCE convention (Minimum Information About a Microbial Fuel Cell Experiment) are included.

Commercialisation of CMOS integrated circuit technology in multi-electrode arrays for neuroscience and cell-based biosensors.

PubMed

Graham, Anthony H D; Robbins, Jon; Bowen, Chris R; Taylor, John

2011-01-01

The adaptation of standard integrated circuit (IC) technology as a transducer in cell-based biosensors in drug discovery pharmacology, neural interface systems and electrophysiology requires electrodes that are electrochemically stable, biocompatible and affordable. Unfortunately, the ubiquitous Complementary Metal Oxide Semiconductor (CMOS) IC technology does not meet the first of these requirements. For devices intended only for research, modification of CMOS by post-processing using cleanroom facilities has been achieved. However, to enable adoption of CMOS as a basis for commercial biosensors, the economies of scale of CMOS fabrication must be maintained by using only low-cost post-processing techniques. This review highlights the methodologies employed in cell-based biosensor design where CMOS-based integrated circuits (ICs) form an integral part of the transducer system. Particular emphasis will be placed on the application of multi-electrode arrays for in vitro neuroscience applications. Identifying suitable IC packaging methods presents further significant challenges when considering specific applications. The various challenges and difficulties are reviewed and some potential solutions are presented.

Survey Of High Speed Test Techniques

NASA Astrophysics Data System (ADS)

Gheewala, Tushar

1988-02-01

The emerging technologies for the characterization and production testing of high-speed devices and integrated circuits are reviewed. The continuing progress in the field of semiconductor technologies will, in the near future, demand test techniques to test 10ps to lOOps gate delays, 10 GHz to 100 GHz analog functions and 10,000 to 100,000 gates on a single chip. Clearly, no single test technique would provide a cost-effective answer to all the above demands. A divide-and-conquer approach based on a judicial selection of parametric, functional and high-speed tests will be required. In addition, design-for-test methods need to be pursued which will include on-chip test electronics as well as circuit techniques that minimize the circuit performance sensitivity to allowable process variations. The electron and laser beam based test technologies look very promising and may provide the much needed solutions to not only the high-speed test problem but also to the need for high levels of fault coverage during functional testing.

Nanophotonic integrated circuits from nanoresonators grown on silicon.

PubMed

Chen, Roger; Ng, Kar Wei; Ko, Wai Son; Parekh, Devang; Lu, Fanglu; Tran, Thai-Truong D; Li, Kun; Chang-Hasnain, Connie

2014-07-07

Harnessing light with photonic circuits promises to catalyse powerful new technologies much like electronic circuits have in the past. Analogous to Moore's law, complexity and functionality of photonic integrated circuits depend on device size and performance scale. Semiconductor nanostructures offer an attractive approach to miniaturize photonics. However, shrinking photonics has come at great cost to performance, and assembling such devices into functional photonic circuits has remained an unfulfilled feat. Here we demonstrate an on-chip optical link constructed from InGaAs nanoresonators grown directly on a silicon substrate. Using nanoresonators, we show a complete toolkit of circuit elements including light emitters, photodetectors and a photovoltaic power supply. Devices operate with gigahertz bandwidths while consuming subpicojoule energy per bit, vastly eclipsing performance of prior nanostructure-based optoelectronics. Additionally, electrically driven stimulated emission from an as-grown nanostructure is presented for the first time. These results reveal a roadmap towards future ultradense nanophotonic integrated circuits.

VLSI circuits implementing computational models of neocortical circuits.

PubMed

Wijekoon, Jayawan H B; Dudek, Piotr

2012-09-15

This paper overviews the design and implementation of three neuromorphic integrated circuits developed for the COLAMN ("Novel Computing Architecture for Cognitive Systems based on the Laminar Microcircuitry of the Neocortex") project. The circuits are implemented in a standard 0.35 μm CMOS technology and include spiking and bursting neuron models, and synapses with short-term (facilitating/depressing) and long-term (STDP and dopamine-modulated STDP) dynamics. They enable execution of complex nonlinear models in accelerated-time, as compared with biology, and with low power consumption. The neural dynamics are implemented using analogue circuit techniques, with digital asynchronous event-based input and output. The circuits provide configurable hardware blocks that can be used to simulate a variety of neural networks. The paper presents experimental results obtained from the fabricated devices, and discusses the advantages and disadvantages of the analogue circuit approach to computational neural modelling. Copyright © 2012 Elsevier B.V. All rights reserved.

Exploiting absorption-induced self-heating in solar cells (Conference Presentation)

NASA Astrophysics Data System (ADS)

Ullbrich, Sascha; Fischer, Axel; Erdenebileg, Enkhtur; Koerner, Christian; Reineke, Sebastian; Leo, Karl; Vandewal, Koen

2017-04-01

Absorption of light inevitably leads to a self-heating of each type of solar cell, either due to the excess energy of absorbed photons or non-radiative recombination of charge carriers. Although the effect of temperature on solar cell parameters such as the open-circuit voltage are well known, it is often ignored in Suns-Voc measurements [1]. This measurement technique enables direct access to the diode ideality factor without an influence by series resistance. A frequently seen decrease of the ideality factor or a saturation of the open-circuit voltage at high illumination intensities is often attributed solely to surface recombination [2], the shape of the density of states (DOS) [3], or the quality of the back contact in inorganic solar cells [4]. In this work, we present an analytical model for taking into account absorption induced self-heating in Suns-Voc measurements and validate it for various solar cell technologies such as small molecule organic solar cells, perovskite solar cells, and inorganic solar cells. Furthermore, with an adapted Suns-Voc technique, we are able to not only correctly determine the ideality factor, but also the relevant energy gap of the solar cell, which is especially of interest in the field of novel solar cell technologies. [1] R.A. Sinton and A. Cuevas, EU PVSEC, 1152-1155 (2000) [2] K. Tvingstedt and C. Deibel, Adv. Energy Mater. 6, 1502230 (2016) [3] T. Kirchartz and J. Nelson, Phys. Rev. B 86, 165201 (2012) [4] S. Glunz, J. Nekarda, H. Maeckel et al., EU PVSEC, 849-853 (2007)

Initial results for the silicon monolithically interconnected solar cell product

NASA Technical Reports Server (NTRS)

Dinetta, L. C.; Shreve, K. P.; Cotter, J. E.; Barnett, A. M.

1995-01-01

This proprietary technology is based on AstroPower's electrostatic bonding and innovative silicon solar cell processing techniques. Electrostatic bonding allows silicon wafers to be permanently attached to a thermally matched glass superstrate and then thinned to final thicknesses less than 25 micron. These devices are based on the features of a thin, light-trapping silicon solar cell: high voltage, high current, light weight (high specific power) and high radiation resistance. Monolithic interconnection allows the fabrication costs on a per watt basis to be roughly independent of the array size, power or voltage, therefore, the cost effectiveness to manufacture solar cell arrays with output powers ranging from milliwatts up to four watts and output voltages ranging from 5 to 500 volts will be similar. This compares favorably to conventionally manufactured, commercial solar cell arrays, where handling of small parts is very labor intensive and costly. In this way, a wide variety of product specifications can be met using the same fabrication techniques. Prototype solar cells have demonstrated efficiencies greater than 11%. An open-circuit voltage of 5.4 volts, fill factor of 65%, and short-circuit current density of 28 mA/sq cm at AM1.5 illumination are typical. Future efforts are being directed to optimization of the solar cell operating characteristics as well as production processing. The monolithic approach has a number of inherent advantages, including reduced cost per interconnect and increased reliability of array connections. These features make this proprietary technology an excellent candidate for a large number of consumer products.

Primary lithium cell life studies

NASA Technical Reports Server (NTRS)

Capulli, John; Donley, Sam; Deligiannis, Frank; Shen, David

1990-01-01

One solution for providing a truly independent power source is to package, within the critical subsystem element, a primary battery that can remain dormant for time periods as long as the mission life, which can be 10-15 years, maximum. When primary power from the spacecraft solar array/battery system is interrupted, the backup battery system, which is connected through a diode to the power input line, would automatically support the load to avoid a power interruption to the critical load for a time period long enough to ensure that ground control could access the satellite and correct the anomaly by sending appropriate commands to the spacecraft. Critical subsystems identified for the application are telemetry and command circuits, volatile computer memory, attitude control circuits, and some critical payloads. Due to volume packaging and weight restrictions that exist on most spacecraft, coupled with the long storage periods required, lithium cell technology was selected for the backup power source. Because of the high energy density (200-400 Wh/kg), long shelf life, and load capability, soluble cathode primary lithium technology was chosen. The most important lithium cell properties that require detail characterization for this application are capacity loss, shelf life, and the voltage delay mechanism. These are functions of storage time and temperature. During storage, a passive film builds up on the lithium electrode. The film protects the lithium electrode from progressive capacity decay but requires time to break down when a load is applied. This phenomenon results in a depressed voltage during the period of film breakdown which can last from fractions of a second to minutes.

Optimal III-nitride HEMTs: from materials and device design to compact model of the 2DEG charge density

NASA Astrophysics Data System (ADS)

Li, Kexin; Rakheja, Shaloo

2017-02-01

In this paper, we develop a physically motivated compact model of the charge-voltage (Q-V) characteristics in various III-nitride high-electron mobility transistors (HEMTs) operating under highly non-equilibrium transport conditions, i.e. high drain-source current. By solving the coupled Schrödinger-Poisson equation and incorporating the two-dimensional electrostatics in the channel, we obtain the charge at the top-of-the-barrier for various applied terminal voltages. The Q-V model accounts for cutting off of the negative momenta states from the drain terminal under high drain-source bias and when the transmission in the channel is quasi-ballistic. We specifically focus on AlGaN and AlInN as barrier materials and InGaN and GaN as the channel material in the heterostructure. The Q-V model is verified and calibrated against numerical results using the commercial TCAD simulator Sentaurus from Synopsys for a 20-nm channel length III-nitride HEMT. With 10 fitting parameters, most of which have a physical origin and can easily be obtained from numerical or experimental calibration, the compact Q-V model allows us to study the limits and opportunities of III-nitride technology. We also identify optimal material and geometrical parameters of the device that maximize the carrier concentration in the HEMT channel in order to achieve superior RF performance. Additionally, the compact charge model can be easily integrated in a hierarchical circuit simulator, such as Keysight ADS and CADENCE, to facilitate circuit design and optimization of various technology parameters.

Maximum Temperature Detection System for Integrated Circuits

NASA Astrophysics Data System (ADS)

Frankiewicz, Maciej; Kos, Andrzej

2015-03-01

The paper describes structure and measurement results of the system detecting present maximum temperature on the surface of an integrated circuit. The system consists of the set of proportional to absolute temperature sensors, temperature processing path and a digital part designed in VHDL. Analogue parts of the circuit where designed with full-custom technique. The system is a part of temperature-controlled oscillator circuit - a power management system based on dynamic frequency scaling method. The oscillator cooperates with microprocessor dedicated for thermal experiments. The whole system is implemented in UMC CMOS 0.18 μm (1.8 V) technology.

NASA Tech Briefs, June 1993. Volume 17, No. 6

NASA Technical Reports Server (NTRS)

1993-01-01

Topics include: Imaging Technology: Electronic Components and Circuits; Electronic Systems; Physical Sciences; Materials; Computer Programs; Mechanics; Machinery; Fabrication Technology; Mathematics and Information Sciences; Life Sciences.

NASA Tech Briefs, February 1993. Volume 17, No. 2

NASA Technical Reports Server (NTRS)

1993-01-01

Topics include: Communication Technology; Electronic Components and Circuits; Electronic Systems; Physical Sciences; Materials; Computer Programs; Mechanics; Machinery; Fabrication Technology; Mathematics and Information Sciences; Life Sciences.

SQUID magnetometers for low-frequency applications

DOE Office of Scientific and Technical Information (OSTI.GOV)

Ryhaenen, T.; Seppae, H.; Ilmoniemi, R.

1989-09-01

The authors present a novel formulation for SQUID operation, which enables them to evaluate and compare the sensitivity and applicability of different devices. SQUID magnetometers for low-frequency applications are analyzed, taking into account the coupling circuits and electronics. They discuss nonhysteretic and hysteretic single-junction rf SQUIDs, but the main emphasis is on the dynamics, sensitivity, and coupling considerations of dc-SQUID magnetometers. A short review of current ideas on thin-film, dc-SQUID design presents the problems in coupling and the basic limits of sensitivity. The fabrication technology of tunnel-junction devices is discussed with emphasis on how it limits critical current densities, specificmore » capacitances of junctions, minimum linewidths, conductor separations, etc. Properties of high-temperature superconductors are evaluated on the basis of recently published results on increased flux creep, low density of current carriers, and problems in fabricating reliable junctions. The optimization of electronics for different types of SQUIDs is presented. Finally, the most important low-frequency applications of SQUIDs in biomagnetism, metrology, geomagnetism, and some physics experiments demonstrate the various possibilities that state-of-the-art SQUIDs can provide.« less

Advances in space power research and technology at the National Aeronautics and Space Administration

NASA Technical Reports Server (NTRS)

Mullin, J. P.; Randolph, L. P.; Hudson, W. R.; Ambrus, J. H.

1981-01-01

Progress and plans in various areas of the NASA Space Power Program are discussed. Solar cell research is narrowed to GaAs, multibandgap, and thin Si cells for arrays in planar and concentrator configurations, with further work to increase cell efficiency, radiation hardness, develop flexible encapsulants, and reduce cost. Electrochemical research is concentrating on increasing energy and power density, cycle and wet stand life, reliability and cost reduction of batteries. Further development of the Ni-H2 battery and O2-H2 fuel cell to multihundred kW with a 5 year life and 30,000 cycles is noted. Basic research is ongoing for alkali metal anodes for high energy density secondary cells. Nuclear thermoelectric propulsion is being developed for outer planets exploration propulsion systems, using Si-Ge generators, and studies with rare earth chalcogenides and sulfides are mentioned. Power Systems Management seeks to harmonize increasing power supply levels with inner and outer spacecraft environments, circuits, demands, and automatic monitoring. Concomitant development of bipolar transistors, an infrared rectenna, spacecraft charging measurement, and larger heat pipe transport capacity are noted.

Perspective use of direct human blood as an energy source in air-breathing hybrid microfluidic fuel cells

NASA Astrophysics Data System (ADS)

Dector, A.; Escalona-Villalpando, R. A.; Dector, D.; Vallejo-Becerra, V.; Chávez-Ramírez, A. U.; Arriaga, L. G.; Ledesma-García, J.

2015-08-01

This work presents a flexible and light air-breathing hybrid microfluidic fuel cell (HμFC) operated under biological conditions. A mixture of glucose oxidase, glutaraldehyde, multi-walled carbon nanotubes and vulcan carbon (GOx/VC-MWCNT-GA) was used as the bioanode. Meanwhile, integrating an air-exposed electrode (Pt/C) as the cathode enabled direct oxygen delivery from air. The microfluidic fuel cell performance was evaluated using glucose obtained from three different sources as the fuel: 5 mM glucose in phosphate buffer, human serum and human blood. For the last fuel, an open circuit voltage and maximum power density of 0.52 V and 0.20 mW cm-2 (at 0.38 V) were obtained respectively; meanwhile the maximum current density was 1.1 mA cm-2. Furthermore, the stability of the device was measured in terms of recovery after several polarization curves, showing excellent results. Although this air-breathing HμFC requires technological improvements before being tested in a biomedical device, it represents the best performance to date for a microfluidic fuel cell using human blood as glucose source.

Electrically-driven GHz range ultrafast graphene light emitter (Conference Presentation)

NASA Astrophysics Data System (ADS)

Kim, Youngduck; Gao, Yuanda; Shiue, Ren-Jye; Wang, Lei; Aslan, Ozgur Burak; Kim, Hyungsik; Nemilentsau, Andrei M.; Low, Tony; Taniguchi, Takashi; Watanabe, Kenji; Bae, Myung-Ho; Heinz, Tony F.; Englund, Dirk R.; Hone, James

2017-02-01

Ultrafast electrically driven light emitter is a critical component in the development of the high bandwidth free-space and on-chip optical communications. Traditional semiconductor based light sources for integration to photonic platform have therefore been heavily studied over the past decades. However, there are still challenges such as absence of monolithic on-chip light sources with high bandwidth density, large-scale integration, low-cost, small foot print, and complementary metal-oxide-semiconductor (CMOS) technology compatibility. Here, we demonstrate the first electrically driven ultrafast graphene light emitter that operate up to 10 GHz bandwidth and broadband range (400 1600 nm), which are possible due to the strong coupling of charge carriers in graphene and surface optical phonons in hBN allow the ultrafast energy and heat transfer. In addition, incorporation of atomically thin hexagonal boron nitride (hBN) encapsulation layers enable the stable and practical high performance even under the ambient condition. Therefore, electrically driven ultrafast graphene light emitters paves the way towards the realization of ultrahigh bandwidth density photonic integrated circuits and efficient optical communications networks.

High current density sheet-like electron beam generator

NASA Astrophysics Data System (ADS)

Chow-Miller, Cora; Korevaar, Eric; Schuster, John

Sheet electron beams are very desirable for coupling to the evanescent waves in small millimeter wave slow-wave circuits to achieve higher powers. In particular, they are critical for operation of the free-electron-laser-like Orotron. The program was a systematic effort to establish a solid technology base for such a sheet-like electron emitter system that will facilitate the detailed studies of beam propagation stability. Specifically, the effort involved the design and test of a novel electron gun using Lanthanum hexaboride (LaB6) as the thermionic cathode material. Three sets of experiments were performed to measure beam propagation as a function of collector current, beam voltage, and heating power. The design demonstrated its reliability by delivering 386.5 hours of operation throughout the weeks of experimentation. In addition, the cathode survived two venting and pump down cycles without being poisoned or losing its emission characteristics. A current density of 10.7 A/sq cm. was measured while operating at 50 W of ohmic heating power. Preliminary results indicate that the nearby presence of a metal plate can stabilize the beam.

Space Vehicle Power System Comprised of Battery/Capacitor Combinations

NASA Technical Reports Server (NTRS)

Camarotte, C.; Lancaster, G. S.; Eichenberg, D.; Butler, S. M.; Miller, J. R.

2002-01-01

Recent improvements in energy densities of batteries open the possibility of using electric rather that hydraulic actuators in space vehicle systems. However, the systems usually require short-duration, high-power pulses. This power profile requires the battery system to be sized to meet the power requirements rather than stored energy requirements, often resulting in a large and inefficient energy storage system. Similar transient power applications have used a combination of two or more disparate energy storage technologies. For instance, placing a capacitor and a battery side-by-side combines the high energy density of a battery with the high power performance of a capacitor and thus can create a lighter and more compact system. A parametric study was performed to identify favorable scenarios for using capacitors. System designs were then carried out using equivalent circuit models developed for five commercial electrochemical capacitor products. Capacitors were sized to satisfy peak power levels and consequently "leveled" the power requirement of the battery, which can then be sized to meet system energy requirements. Simulation results clearly differentiate the performance offered by available capacitor products for the space vehicle applications.

Final Technical Report - 300°C Capable Electronics Platform and Temperature Sensor System For Enhanced Geothermal Systems

DOE Office of Scientific and Technical Information (OSTI.GOV)

Chen, Cheng-Po; Shaddock, David; Sandvik, Peter

2012-11-30

A silicon carbide (SiC) based electronic temperature sensor prototype has been demonstrated to operate at 300°C. We showed continuous operation of 1,000 hours with SiC operational amplifier and surface mounted discreet resistors and capacitors on a ceramic circuit board. This feasibility demonstration is a major milestone in the development of high temperature electronics in general and high temperature geothermal exploration and well management tools in particular. SiC technology offers technical advantages that are not found in competing technologies such as silicon-on-insulator (SOI) at high temperatures of 200°C to 300°C and beyond. The SiC integrated circuits and packaging methods can bemore » used in new product introduction by GE Oil and Gas for high temperature down-hole tools. The existing SiC fabrication facility at GE is sufficient to support the quantities currently demanded by the marketplace, and there are other entities in the United States and other countries capable of ramping up SiC technology manufacturing. The ceramic circuit boards are different from traditional organic-based electronics circuit boards, but the fabrication process is compatible with existing ceramic substrate manufacturing. This project has brought high temperature electronics forward, and brings us closer to commercializing tools that will enable and reduce the cost of enhanced geothermal technology to benefit the public in terms of providing clean renewable energy at lower costs.« less

Designing learning apparatus to promote twelfth grade students’ understanding of digital technology concept: A preliminary studies

NASA Astrophysics Data System (ADS)

Marlius; Kaniawati, I.; Feranie, S.

2018-05-01

A preliminary learning design using relay to promote twelfth grade student’s understanding of logic gates concept is implemented to see how well it’s to adopted by six high school students, three male students and three female students of twelfth grade. This learning design is considered for next learning of digital technology concept i.e. data digital transmition and analog. This work is a preliminary study to design the learning for large class. So far just a few researches designing learning design related to digital technology with relay. It may due to this concept inserted in Indonesian twelfth grade curriculum recently. This analysis is focus on student difficulties trough video analysis to learn the concept. Based on our analysis, the recommended thing for redesigning learning is: students understand first about symbols and electrical circuits; the Student Worksheet is made in more detail on the assembly steps to the project board; mark with symbols at points in certain places in the circuit for easy assembly; assembly using relays by students is enough until is the NOT’s logic gates and the others that have been assembled so that effective time. The design of learning using relays can make the relay a liaison between the abstract on the digital with the real thing of it, especially in the circuit of symbols and real circuits. Besides it is expected to also enrich the ability of teachers in classroom learning about digital technology.

Educational-research laboratory "electric circuits" on the base of digital technologies

NASA Astrophysics Data System (ADS)

Koroteyev, V. I.; Florentsev, V. V.; Florentseva, N. I.

2017-01-01

The problem of research activity of trainees' activation in the educational-research laboratory "Electric Circuits" using innovative methodological solutions and digital technologies is considered. The main task is in creation of the unified experimental research information-educational environment "Electrical Engineering". The problems arising during the developing and application of the modern software and hardware, experimental and research stands and digital control and measuring systems are presented. This paper presents the main stages of development and creation of educational-research laboratory "Electrical Circuits" at the Department of Electrical Engineering of NRNU MEPhI. The authors also consider the analogues of the described research complex offered by various educational institutions and companies. The analysis of their strengths and weaknesses, on which the advantages of the proposed solution are based, is held.

On the photonic implementation of universal quantum gates, bell states preparation circuit and quantum LDPC encoders and decoders based on directional couplers and HNLF.

PubMed

Djordjevic, Ivan B

2010-04-12

The Bell states preparation circuit is a basic circuit required in quantum teleportation. We describe how to implement it in all-fiber technology. The basic building blocks for its implementation are directional couplers and highly nonlinear optical fiber (HNLF). Because the quantum information processing is based on delicate superposition states, it is sensitive to quantum errors. In order to enable fault-tolerant quantum computing the use of quantum error correction is unavoidable. We show how to implement in all-fiber technology encoders and decoders for sparse-graph quantum codes, and provide an illustrative example to demonstrate this implementation. We also show that arbitrary set of universal quantum gates can be implemented based on directional couplers and HNLFs.

Processing and Characterization of Thousand-Hour 500 C Durable 4H-SiC JFET Integrated Circuits

NASA Technical Reports Server (NTRS)

Spry, David J.; Neudeck, Philip G.; Chen, Liangyu; Lukco, Dorothy; Chang, Carl W.; Beheim, Glenn M.; Krasowski, Michael J.; Prokop, Norman F.

2016-01-01

This work reports fabrication and testing of integrated circuits (ICs) with two levels of interconnect that consistently achieve greater than 1000 hours of stable electrical operation at 500 C in air ambient. These ICs are based on 4H-SiC junction field effect transistor (JFET) technology that integrates hafnium ohmic contacts with TaSi2 interconnects and SiO2 and Si3N4 dielectric layers over 1-m scale vertical topology. Following initial burn-in, important circuit parameters remain stable for more than 1000 hours of 500 C operational testing. These results advance the technology foundation for realizing long-term durable 500 C ICs with increased functional capability for sensing and control combustion engine, planetary, deep-well drilling, and other harsh-environment applications.

Processing and Characterization of Thousand-Hour 500 C Durable 4H-SiC JFET Integrated Circuits

NASA Technical Reports Server (NTRS)

Spry, David J.; Neudeck, Philip G.; Chen, Liang-Yu; Lukco, Dorothy; Chang, Carl W.; Beheim, Glenn M.; Krasowski, Michael J.; Prokop, Norman F.

2016-01-01

This work reports fabrication and testing of integrated circuits (ICs) with two levels of interconnect that consistently achieve greater than 1000 hours of stable electrical operation at 500 C in air ambient. These ICs are based on 4H-SiC junction field effect transistor (JFET) technology that integrates hafnium ohmic contacts with TaSi2 interconnects and SiO2 and Si3N4 dielectric layers over approximately 1-micrometer scale vertical topology. Following initial burn-in, important circuit parameters remain stable for more than 1000 hours of 500 C operational testing. These results advance the technology foundation for realizing long-term durable 500 C ICs with increased functional capability for sensing and control combustion engine, planetary, deep-well drilling, and other harsh-environment applications.

Evaluation of an Ultra-Low Power Reed Solomon Encoder for NASA's Space Technology 5 Mission

NASA Technical Reports Server (NTRS)

Lei, K. E.; Xapsos, M. A.; Poivey, C.; LaBel, K. A.; Stone, R. F.; Yeh, P-S.; Gambles, J.; Hass, J.; Maki, G.; Murguia, J.

2003-01-01

Radiation test results and analyses are presented for ultra-low power Reed Solomon encoder circuits that are being considered for use on the Space Technology 5 (ST5) mission. The total ionizing dose tolerance is in excess of 100 krad(Si) and is due to the low supply voltage and the use of back-bias, which suppresses radiation-induced leakage currents in the n-channel devices. The circuits do not latch-up for ion LET values of at least 90 MeV-sq cm/mg. A hardened-by-design approach to SEU has achieved an upset threshold of about 20 MeV-sq cm/mg. The SEU rate expected for these circuits in the geosynchronous transfer orbit of ST5 is low.

"Printed-circuit" rectenna

NASA Technical Reports Server (NTRS)

Dickinson, R. M.

1977-01-01

Rectifying antenna is less bulky structure for absorbing transmitted microwave power and converting it into electrical current. Printed-circuit approach, using microstrip technology and circularly polarized antenna, makes polarization orientation unimportant and allows much smaller arrays for given performance. Innovation is particularly useful with proposed electric vehicles powered by beam microwaves.

Extra-high short-circuit current for bifacial solar cells in sunny and dark-light conditions.

PubMed

Duan, Jialong; Duan, Yanyan; Zhao, Yuanyuan; He, Benlin; Tang, Qunwei

2017-09-05

We present here a symmetrically structured bifacial solar cell tailored by two fluorescent photoanodes and a platinum/titanium/platinum counter electrode, yielding extra-high short-circuit current densities as high as 28.59 mA cm -2 and 119.9 μA cm -2 in simulated sunlight irradiation (100 mW cm -2 , AM1.5) and dark-light conditions, respectively.

High level white noise generator

DOEpatents

Borkowski, Casimer J.; Blalock, Theron V.

1979-01-01

A wide band, stable, random noise source with a high and well-defined output power spectral density is provided which may be used for accurate calibration of Johnson Noise Power Thermometers (JNPT) and other applications requiring a stable, wide band, well-defined noise power spectral density. The noise source is based on the fact that the open-circuit thermal noise voltage of a feedback resistor, connecting the output to the input of a special inverting amplifier, is available at the amplifier output from an equivalent low output impedance caused by the feedback mechanism. The noise power spectral density level at the noise source output is equivalent to the density of the open-circuit thermal noise or a 100 ohm resistor at a temperature of approximately 64,000 Kelvins. The noise source has an output power spectral density that is flat to within 0.1% (0.0043 db) in the frequency range of from 1 KHz to 100 KHz which brackets typical passbands of the signal-processing channels of JNPT's. Two embodiments, one of higher accuracy that is suitable for use as a standards instrument and another that is particularly adapted for ambient temperature operation, are illustrated in this application.

Density-Gradient Theory: A Macroscopic Approach to Quantum Confinement and Tunneling in Semiconductor Devices

DTIC Science & Technology

2011-01-01

that are attractive as luminescent biolabels, and possibly also for optoelectronic devices and solar cells . The equilibrium nature of such situations...The boundary layers as- sociated with the diffusion and Debye lengths are familiar, while that of LQ defines the layer in which the quantum in...circuits, transmission lines Diffusion -drift, density-gradient Semi-classical electron dynamics, Boltzmann transport Schrödinger, density- matrix, Wigner

One-dimensional particle-in-cell simulation on the influence of electron and ion temperature on the sheath expansion process in the post-arc stage of vacuum circuit breaker

NASA Astrophysics Data System (ADS)

Mo, Yongpeng; Shi, Zongqian; Jia, Shenli; Wang, Lijun

2015-02-01

The inter-contact region of vacuum circuit breakers is filled with residual plasma at the moment when the current is zero after the burning of metal vapor arc. The residual plasma forms an ion sheath in front of the post-arc cathode. The sheath then expands towards the post-arc anode under the influence of a transient recovery voltage. In this study, a one-dimensional particle-in-cell model is developed to investigate the post-arc sheath expansion. The influence of ion and electron temperatures on the decrease in local plasma density at the post-arc cathode side and post-arc anode side is discussed. When the decay in the local plasma density develops from the cathode and anode sides into the high-density region and merges, the overall plasma density in the inter-contact region begins to decrease. Meanwhile, the ion sheath begins to expand faster. Furthermore, the theory of ion rarefaction wave only explains quantitatively the decrease in the overall plasma density at relatively low ion temperatures. With the increase of ion temperature to certain extent, another possible reason for the decrease in the overall plasma density is proposed and results from the more active thermal diffusion of plasma.

The technology on noise reduction of the APD detection circuit

NASA Astrophysics Data System (ADS)

Wu, Xue-ying; Zheng, Yong-chao; Cui, Jian-yong

2013-09-01

The laser pulse detection is widely used in the field of laser range finders, laser communications, laser radar, laser Identification Friend or Foe, et al, for the laser pulse detection has the advantage of high accuracy, high sensitivity and strong anti-interference. The avalanche photodiodes (APD) has the advantage of high quantum efficiency, high response speed and huge gain. The APD is particularly suitable for weak signal detection. The technology that APD acts as the photodetector for weak signal reception and amplification is widely used in laser pulse detection. The APD will convert the laser signal to weak electrical signal. The weak signal is amplified, processed and exported by the circuit. In the circuit design, the optimal signal detection is one key point in photoelectric detection system. The issue discusses how to reduce the noise of the photoelectric signal detection circuit and how to improve the signal-to-noise ratio, related analysis and practice included. The essay analyzes the mathematical model of the signal-to-noise ratio for photoelectric conversion and the noise of the APD photoelectric detection system. By analysis the bandwidth of the detection system is determined, and the circuit devices are selected that match the APD. In the circuit design separated devices with low noise are combined with integrated operational amplifier for the purpose of noise reduction. The methods can effectively suppress the noise, and improve the detection sensitivity.

A novel nanoscaled Schottky barrier based transmission gate and its digital circuit applications

NASA Astrophysics Data System (ADS)

Kumar, Sunil; Loan, Sajad A.; Alamoud, Abdulrahman M.

2017-04-01

In this work we propose and simulate a compact nanoscaled transmission gate (TG) employing a single Schottky barrier based transistor in the transmission path and a single transistor based Sajad-Sunil-Schottky (SSS) device as an inverter. Therefore, just two transistors are employed to realize a complete transmission gate which normally consumes four transistors in the conventional technology. The transistors used to realize the transmission path and the SSS inverter in the proposed TG are the double gate Schottky barrier devices, employing stacks of two metal silicides, platinum silicide (PtSi) and erbium silicide (ErSi). It has been observed that the realization of the TG gate by the proposed technology has resulted into a compact structure, with reduced component count, junctions, interconnections and regions in comparison to the conventional technology. The further focus of this work is on the application part of the proposed technology. So for the first time, the proposed technology has been used to realize various combinational circuits, like a two input AND gate, a 2:1 multiplexer and a two input XOR circuits. It has been observed that the transistor count has got reduced by half in a TG, two input AND gate, 2:1 multiplexer and in a two input XOR gate. Therefore, a significant reduction in transistor count and area requirement can be achieved by using the proposed technology. The proposed technology can be also used to perform the compact realization of other combinational and sequential circuitry in future.

Studies on an ultrasonic atomization feed direct methanol fuel cell.

PubMed

Wu, Chaoqun; Liu, Linghao; Tang, Kai; Chen, Tao

2017-01-01

Direct methanol fuel cell (DMFC) is promising as an energy conversion device for the replacement of conventional chemical cell in future, owing to its convenient fuel storage, high energy density and low working temperature. The development of DMFC technology is currently limited by catalyst poison and methanol crossover. To alleviate the methanol crossover, a novel fuel supply system based on ultrasonic atomization is proposed. Experimental investigations on this fuel supply system to evaluate methanol permeation rates, open circuit voltages (OCVs) and polarization curves under a series of conditions have been carried out and reported in this paper. In comparison with the traditional liquid feed DMFC system, it can be found that the methanol crossover under the ultrasonic atomization feed system was significantly reduced because the DMFC reaches a large stable OCV value. Moreover, the polarization performance does not vary significantly with the liquid feed style. Therefore, the cell fed by ultrasonic atomization can be operated with a high concentration methanol to improve the energy density of DMFC. Under the supply condition of relatively high concentration methanol such as 4M and 8M, the maximum power density fed by ultrasonic atomization is higher than liquid by 6.05% and 12.94% respectively. Copyright © 2016 Elsevier B.V. All rights reserved.

Basic guidelines to introduce electric circuit simulation software in a general physics course

NASA Astrophysics Data System (ADS)

Moya, A. A.

2018-05-01

The introduction of electric circuit simulation software for undergraduate students in a general physics course is proposed in order to contribute to the constructive learning of electric circuit theory. This work focuses on the lab exercises based on dc, transient and ac analysis in electric circuits found in introductory physics courses, and shows how students can use the simulation software to do simple activities associated with a lab exercise itself and with related topics. By introducing electric circuit simulation programs in a general physics course as a brief activitiy complementing lab exercise, students develop basic skills in using simulation software, improve their knowledge on the topology of electric circuits and perceive that the technology contributes to their learning, all without reducing the time spent on the actual content of the course.

High accuracy digital aging monitor based on PLL-VCO circuit

NASA Astrophysics Data System (ADS)

Yuejun, Zhang; Zhidi, Jiang; Pengjun, Wang; Xuelong, Zhang

2015-01-01

As the manufacturing process is scaled down to the nanoscale, the aging phenomenon significantly affects the reliability and lifetime of integrated circuits. Consequently, the precise measurement of digital CMOS aging is a key aspect of nanoscale aging tolerant circuit design. This paper proposes a high accuracy digital aging monitor using phase-locked loop and voltage-controlled oscillator (PLL-VCO) circuit. The proposed monitor eliminates the circuit self-aging effect for the characteristic of PLL, whose frequency has no relationship with circuit aging phenomenon. The PLL-VCO monitor is implemented in TSMC low power 65 nm CMOS technology, and its area occupies 303.28 × 298.94 μm2. After accelerating aging tests, the experimental results show that PLL-VCO monitor improves accuracy about high temperature by 2.4% and high voltage by 18.7%.

Programmable logic devices

NASA Astrophysics Data System (ADS)

Jacobs, J. L.

1993-04-01

Erasable programmable logic devices (EPLD's) were investigated to determine their advantages and/or disadvantages in Test Equipment Engineering applications. It was found that EPLD's performed as well as or better than identical circuits using standard transistor transistor logic (TTL). The chip count in these circuits was reduced, saving printed circuit board space and shortening fabrication and prove-in time. Troubleshooting circuits of EPLD's was also easier with 10 to 100 times fewer wires needed. The reduced number of integrated circuits (IC's) contributed to faster system speeds and an overall lower power consumption. In some cases changes to the circuit became software changes using EPLD's instead of hardware changes for standard logic. Using EPLD's was fairly easy; however, as with any new technology, a learning curve must be overcome before EPLD's can be used efficiently. The many benefits of EPLD's outweighed this initial inconvenience.

Novel Devices Using Multifunctional ZnO and Its Nanostructures

DTIC Science & Technology

2008-12-01

bias, the electron density increases to a very high level, and the SAW will propagate with the slower short- circuit velocity, vsc . For intermediate...will propagate at a velocity v, which is between voc and vsc . The value of v will be determined by the charge density, the effective coupling of the

Open Source Radiation Hardened by Design Technology

NASA Technical Reports Server (NTRS)

Shuler, Robert

2016-01-01

The proposed technology allows use of the latest microcircuit technology with lowest power and fastest speed, with minimal delay and engineering costs, through new Radiation Hardened by Design (RHBD) techniques that do not require extensive process characterization, technique evaluation and re-design at each Moore's Law generation. The separation of critical node groups is explicitly parameterized so it can be increased as microcircuit technologies shrink. The technology will be open access to radiation tolerant circuit vendors. INNOVATION: This technology would enhance computation intensive applications such as autonomy, robotics, advanced sensor and tracking processes, as well as low power applications such as wireless sensor networks. OUTCOME / RESULTS: 1) Simulation analysis indicates feasibility. 2)Compact voting latch 65 nanometer test chip designed and submitted for fabrication -7/2016. INFUSION FOR SPACE / EARTH: This technology may be used in any digital integrated circuit in which a high level of resistance to Single Event Upsets is desired, and has the greatest benefit outside low earth orbit where cosmic rays are numerous.

Communications technology

NASA Astrophysics Data System (ADS)

Sokoloski, Martin M.

1988-09-01

The objective of the Communications Technology Program is to enable data transmission to and from low Earth orbit, geostationary orbit, and solar and deep space missions. This can be achieved by maintaining an effective, balances effort in basic, applied, and demonstration prototype communications technology through work in theory, experimentation, and components. The program consists of three major research and development discipline areas which are: microwave and millimeter wave tube components; solid state monolithic integrated circuit; and free space laser communications components and devices. The research ranges from basic research in surface physics (to study the mechanisms of surface degradation from under high temperature and voltage operating conditions which impacts cathode tube reliability and lifetime) to generic research on the dynamics of electron beams and circuits (for exploitation in various micro- and millimeter wave tube devices). Work is also performed on advanced III-V semiconductor materials and devices for use in monolithic integrated analog circuits (used in adaptive, programmable phased arrays for microwave antenna feeds and receivers) - on the use of electromagnetic theory in antennas and on technology necessary for eventual employment of lasers for free space communications for future low earth, geostationary, and deep space missions requiring high data rates with corresponding directivity and reliability.

Communications technology

NASA Technical Reports Server (NTRS)

Sokoloski, Martin M.

1988-01-01

The objective of the Communications Technology Program is to enable data transmission to and from low Earth orbit, geostationary orbit, and solar and deep space missions. This can be achieved by maintaining an effective, balances effort in basic, applied, and demonstration prototype communications technology through work in theory, experimentation, and components. The program consists of three major research and development discipline areas which are: microwave and millimeter wave tube components; solid state monolithic integrated circuit; and free space laser communications components and devices. The research ranges from basic research in surface physics (to study the mechanisms of surface degradation from under high temperature and voltage operating conditions which impacts cathode tube reliability and lifetime) to generic research on the dynamics of electron beams and circuits (for exploitation in various micro- and millimeter wave tube devices). Work is also performed on advanced III-V semiconductor materials and devices for use in monolithic integrated analog circuits (used in adaptive, programmable phased arrays for microwave antenna feeds and receivers) - on the use of electromagnetic theory in antennas and on technology necessary for eventual employment of lasers for free space communications for future low earth, geostationary, and deep space missions requiring high data rates with corresponding directivity and reliability.

Performance analysis of a brushless dc motor due to magnetization distribution in a continuous ring magnet

NASA Astrophysics Data System (ADS)

Hur, Jin; Jung, In-Soung; Sung, Ha-Gyeong; Park, Soon-Sup

2003-05-01

This paper represents the force performance of a brushless dc motor with a continuous ring-type permanent magnet (PM), considering its magnetization patterns: trapezoidal, trapezoidal with dead zone, and unbalanced trapezoidal magnetization with dead zone. The radial force density in PM motor causes vibration, because vibration is induced the traveling force from the rotating PM acting on the stator. Magnetization distribution of the PM as well as the shape of the teeth determines the distribution of force density. In particular, the distribution has a three-dimensional (3-D) pattern because of overhang, that is, it is not uniform in axial direction. Thus, the analysis of radial force density required dynamic analysis considering the 3-D shape of the teeth and overhang. The results show that the force density as a source of vibration varies considerably depending on the overhang and magnetization distribution patterns. In addition, the validity of the developed method, coupled 3-D equivalent magnetic circuit network method, with driving circuit and motion equation, is confirmed by comparison of conventional method using 3D finite element method.

Stitching Circuits: Learning about Circuitry through E-Textile Materials

ERIC Educational Resources Information Center

Peppler, Kylie; Glosson, Diane

2013-01-01

Central to our understanding of learning is the relationship between various tools and technologies and the structuring of disciplinary subject matter. One of the staples of early science education curriculum is the use of electrical circuit toolkits to engage students in broader discussions of energy. Traditionally, these concepts are introduced…

An Undergraduate Experiment in Alarm System Design.

ERIC Educational Resources Information Center

Martini, R. A.; And Others

1988-01-01

Describes an experiment involving data acquisition by a computer, digital signal transmission from the computer to a digital logic circuit and signal interpretation by this circuit. The system is being used at the Illinois Institute of Technology. Discusses the fundamental concepts involved. Demonstrates the alarm experiment as it is used in…

Multifunctional Logic Gate Controlled by Supply Voltage

NASA Technical Reports Server (NTRS)

Stoica, Adrian; Zebulum, Ricardo

2005-01-01

A complementary metal oxide/semiconductor (CMOS) electronic circuit functions as a NAND gate at a power-supply potential (V(sub dd)) of 3.3 V and as NOR gate for V(sub dd) = 1.8 V. In the intermediate V(sub dd) range of 1.8 to 3.3 V, this circuit performs a function intermediate between NAND and NOR with degraded noise margin. Like the circuit of the immediately preceding article, this circuit serves as a demonstration of the evolutionary approach to design of polymorphic electronics -- a technological discipline that emphasizes evolution of the design of a circuit to perform different analog and/or digital functions under different conditions. In this instance, the different conditions are different values of V(sub dd).

Readout circuit with novel background suppression for long wavelength infrared focal plane arrays

NASA Astrophysics Data System (ADS)

Xie, L.; Xia, X. J.; Zhou, Y. F.; Wen, Y.; Sun, W. F.; Shi, L. X.

2011-02-01

In this article, a novel pixel readout circuit using a switched-capacitor integrator mode background suppression technique is presented for long wavelength infrared focal plane arrays. This circuit can improve dynamic range and signal-to-noise ratio by suppressing the large background current during integration. Compared with other background suppression techniques, the new background suppression technique is less sensitive to the process mismatch and has no additional shot noise. The proposed circuit is theoretically analysed and simulated while taking into account the non-ideal characteristics. The result shows that the background suppression non-uniformity is ultra-low even for a large process mismatch. The background suppression non-uniformity of the proposed circuit can also remain very small with technology scaling.

Contemporary approaches to neural circuit manipulation and mapping: focus on reward and addiction

PubMed Central

Saunders, Benjamin T.; Richard, Jocelyn M.; Janak, Patricia H.

2015-01-01

Tying complex psychological processes to precisely defined neural circuits is a major goal of systems and behavioural neuroscience. This is critical for understanding adaptive behaviour, and also how neural systems are altered in states of psychopathology, such as addiction. Efforts to relate psychological processes relevant to addiction to activity within defined neural circuits have been complicated by neural heterogeneity. Recent advances in technology allow for manipulation and mapping of genetically and anatomically defined neurons, which when used in concert with sophisticated behavioural models, have the potential to provide great insight into neural circuit bases of behaviour. Here we discuss contemporary approaches for understanding reward and addiction, with a focus on midbrain dopamine and cortico-striato-pallidal circuits. PMID:26240425

Nucleic acids for the rational design of reaction circuits.

PubMed

Padirac, Adrien; Fujii, Teruo; Rondelez, Yannick

2013-08-01

Nucleic acid-based circuits are rationally designed in vitro assemblies that can perform complex preencoded programs. They can be used to mimic in silico computations. Recent works emphasized the modularity and robustness of these circuits, which allow their scaling-up. Another new development has led to dynamic, time-responsive systems that can display emergent behaviors like oscillations. These are closely related to biological architectures and provide an in vitro model of in vivo information processing. Nucleic acid circuits have already been used to handle various processes for technological or biotechnological purposes. Future applications of these chemical smart systems will benefit from the rapidly growing ability to design, construct, and model nucleic acid circuits of increasing size. Copyright © 2012 Elsevier Ltd. All rights reserved.

Formation of BaSi2 heterojunction solar cells using transparent MoOx hole transport layers

NASA Astrophysics Data System (ADS)

Du, W.; Takabe, R.; Baba, M.; Takeuchi, H.; Hara, K. O.; Toko, K.; Usami, N.; Suemasu, T.

2015-03-01

Heterojunction solar cells that consist of 15 nm thick molybdenum trioxide (MoOx, x < 3) as a hole transport layer and 600 nm thick unpassivated or passivated n-BaSi2 layers were demonstrated. Rectifying current-voltage characteristics were observed when the surface of BaSi2 was exposed to air. When the exposure time was decreased to 1 min, an open circuit voltage of 200 mV and a short circuit current density of 0.5 mA/cm2 were obtained under AM1.5 illumination. The photocurrent density under a reverse bias voltage of -1 V reached 25 mA/cm2, which demonstrates the significant potential of BaSi2 for solar cell applications.

Advanced technologies and devices for inhalational anesthetic drug dosing.

PubMed

Meyer, J-U; Kullik, G; Wruck, N; Kück, K; Manigel, J

2008-01-01

Technological advances in micromechanics, optical sensing, and computing have led to innovative and reliable concepts of precise dosing and sensing of modern volatile anesthetics. Mixing of saturated desflurane flow with fresh gas flow (FGF) requires differential pressure sensing between the two circuits for precise delivery. The medical gas xenon is administered most economically in a closed circuit breathing system. Sensing of xenon in the breathing system is achieved with miniaturized and unique gas detector systems. Innovative sensing principles such as thermal conductivity and sound velocity are applied. The combination of direct injection of volatile anesthetics and low-flow in a closed circuit system requires simultaneous sensing of the inhaled and exhaled gas concentrations. When anesthetic conserving devices are used for sedation with volatile anesthetics, regular gas concentration monitoring is advised. High minimal alveolar concentration (MAC) of some anesthetics and low-flow conditions bear the risk of hypoxic gas delivery. Oxygen sensing based on paramagnetic thermal transduction has become the choice when long lifetime and one-time calibration are required. Compact design of beam splitters, infrared filters, and detectors have led to multiple spectra detector systems that fit in thimble-sized housings. Response times of less than 500 ms allow systems to distinguish inhaled from exhaled gas concentrations. The compact gas detector systems are a prerequisite to provide "quantitative anesthesia" in closed circuit feedback-controlled breathing systems. Advanced anesthesia devices in closed circuit mode employ multiple feedback systems. Multiple feedbacks include controls of volume, concentrations of anesthetics, and concentration of oxygen with a corresponding safety system. In the ideal case, the feedback system delivers precisely what the patient is consuming. In this chapter, we introduce advanced technologies and device concepts for delivering inhalational anesthetic drugs. First, modern vaporizers are described with special attention to the particularities of delivering desflurane. Delivery of xenon is presented, followed by a discussion of direct injection of volatile anesthetics and of a device designed to conserve anesthetic drugs. Next, innovative sensing technologies are presented for reliable control and precise metering of the delivered volatile anesthetics. Finally, we discuss the technical challenges of automatic control in low-flow and closed circuit breathing systems in anesthesia.

High-Performance WSe2 Complementary Metal Oxide Semiconductor Technology and Integrated Circuits.

PubMed

Yu, Lili; Zubair, Ahmad; Santos, Elton J G; Zhang, Xu; Lin, Yuxuan; Zhang, Yuhao; Palacios, Tomás

2015-08-12

Because of their extraordinary structural and electrical properties, two-dimensional materials are currently being pursued for applications such as thin-film transistors and integrated circuit. One of the main challenges that still needs to be overcome for these applications is the fabrication of air-stable transistors with industry-compatible complementary metal oxide semiconductor (CMOS) technology. In this work, we experimentally demonstrate a novel high performance air-stable WSe2 CMOS technology with almost ideal voltage transfer characteristic, full logic swing and high noise margin with different supply voltages. More importantly, the inverter shows large voltage gain (∼38) and small static power (picowatts), paving the way for low power electronic system in 2D materials.

Optoelectronic Infrastructure for Radio Frequency and Optical Phased Arrays

NASA Technical Reports Server (NTRS)

Cai, Jianhong

2015-01-01

Optoelectronic integrated circuits offer radiation-hardened solutions for satellite systems in addition to improved size, weight, power, and bandwidth characteristics. ODIS, Inc., has developed optoelectronic integrated circuit technology for sensing and data transfer in phased arrays. The technology applies integrated components (lasers, amplifiers, modulators, detectors, and optical waveguide switches) to a radio frequency (RF) array with true time delay for beamsteering. Optical beamsteering is achieved by controlling the current in a two-dimensional (2D) array. In this project, ODIS integrated key components to produce common RF-optical aperture operation.

Semiconductor Cubing

NASA Technical Reports Server (NTRS)

1996-01-01

Through Goddard Space Flight Center and Jet Propulsion Laboratory Small Business Innovation Research contracts, Irvine Sensors developed a three-dimensional memory system for a spaceborne data recorder and other applications for NASA. From these contracts, the company created the Memory Short Stack product, a patented technology for stacking integrated circuits that offers higher processing speeds and levels of integration, and lower power requirements. The product is a three-dimensional semiconductor package in which dozens of integrated circuits are stacked upon each other to form a cube. The technology is being used in various computer and telecommunications applications.

Impedance characterization of AlGaN/GaN Schottky diodes with metal contacts

NASA Astrophysics Data System (ADS)

Donahue, M.; Lübbers, B.; Kittler, M.; Mai, P.; Schober, A.

2013-04-01

To obtain detailed information on structural and electrical properties of AlGaN/GaN Schottky diodes and to determine an appropriate equivalent circuit, impedance spectroscopy and impedance voltage profiling are employed over a frequency range of 1 MHz-1 Hz. In contrast to the commonly assumed parallel connection of capacitive and resistive elements, an equivalent circuit is derived from impedance spectra which utilizes the constant phase element and accounts for frequency dispersion and trap states. The trap density is estimated and is in good agreement with the literature values. The resulting reduced equivalent circuit consists of a capacitor and resistor connected in series.

RF Frequency Oscillations in the Early Stages of Vacuum Arc Collapse

NASA Technical Reports Server (NTRS)

Griffin, Steven T.; Thio, Y. C. Francis

2003-01-01

RF frequency oscillations may be produced in a typical capacitive charging / discharging pulsed power system. These oscillations may be benign, parasitic, destructive or crucial to energy deposition. In some applications, proper damping of oscillations may be critical to proper plasma formation. Because the energy deposited into the plasma is a function of plasma and circuit conditions, the entire plasma / circuit system needs to be considered as a unit To accomplish this, the initiation of plasma is modeled as a time-varying, non-linear element in a circuit analysis model. The predicted spectra are compared to empirical power density spectra including those obtained from vacuum arcs.

NASA Tech Briefs, January 1994. Volume 18, No. 1

NASA Technical Reports Server (NTRS)

1994-01-01

Topics include: Communications Technology; Electronic Components and Circuits; Electronic Systems; Physical Sciences; Materials; Computer Programs; Mechanics; Machinery; Fabrication Technology; Mathematics and Information Sciences; Life Sciences; Books and Reports.

Millimeter-wave technology advances since 1985 and future trends

NASA Astrophysics Data System (ADS)

Meinel, Holger H.

1991-05-01

The author focuses on finline or E-plane technology. Several examples, including AVES, a 61.5-GHz radar sensor for traffic data acquisition, are included. Monolithic integrated 60- and 94-GHz receiver circuits composed of a mixer and IF amplifier in compatible FET technology on GaAs are presented to show the state of the art in this area. A promising approach to the use of silicon technology for monolithic millimeter-wave integrated circuits, called SIMMWIC, is described as well. As millimeter-wave technology has matured, increased interest has been generated for very specific applications: (1) commercial automotive applications such as intelligent cruise control and enhanced vision have attracted great interest, calling for a low-cost design approach; and (2) an almost classical application of millimeter-wave techniques is the field of radar seekers, e.g., for intelligent ammunitions, calling for high performance under extreme environmental conditions. Two examples fulfilling these requirements are described.

Photonic quantum technologies (Presentation Recording)

NASA Astrophysics Data System (ADS)

O'Brien, Jeremy L.

2015-09-01

The impact of quantum technology will be profound and far-reaching: secure communication networks for consumers, corporations and government; precision sensors for biomedical technology and environmental monitoring; quantum simulators for the design of new materials, pharmaceuticals and clean energy devices; and ultra-powerful quantum computers for addressing otherwise impossibly large datasets for machine learning and artificial intelligence applications. However, engineering quantum systems and controlling them is an immense technological challenge: they are inherently fragile; and information extracted from a quantum system necessarily disturbs the system itself. Of the various approaches to quantum technologies, photons are particularly appealing for their low-noise properties and ease of manipulation at the single qubit level. We have developed an integrated waveguide approach to photonic quantum circuits for high performance, miniaturization and scalability. We will described our latest progress in generating, manipulating and interacting single photons in waveguide circuits on silicon chips.

High-Power, High-Frequency Si-Based (SiGe) Transistors Developed

NASA Technical Reports Server (NTRS)

Ponchak, George E.

2002-01-01

Future NASA, DOD, and commercial products will require electronic circuits that have greater functionality and versatility but occupy less space and cost less money to build and integrate than current products. System on a Chip (SOAC), a single semiconductor substrate containing circuits that perform many functions or containing an entire system, is widely recognized as the best technology for achieving low-cost, small-sized systems. Thus, a circuit technology is required that can gather, process, store, and transmit data or communications. Since silicon-integrated circuits are already used for data processing and storage and the infrastructure that supports silicon circuit fabrication is very large, it is sensible to develop communication circuits on silicon so that all the system functions can be integrated onto a single wafer. Until recently, silicon integrated circuits did not function well at the frequencies required for wireless or microwave communications, but with the introduction of small amounts of germanium into the silicon to make silicon-germanium (SiGe) transistors, silicon-based communication circuits are possible. Although microwavefrequency SiGe circuits have been demonstrated, there has been difficulty in obtaining the high power from their transistors that is required for the amplifiers of a transmitter, and many researchers have thought that this could not be done. The NASA Glenn Research Center and collaborators at the University of Michigan have developed SiGe transistors and amplifiers with state-of-the-art output power at microwave frequencies from 8 to 20 GHz. These transistors are fabricated using standard silicon processing and may be integrated with CMOS integrated circuits on a single chip. A scanning electron microscope image of a typical SiGe heterojunction bipolar transistor is shown in the preceding photomicrograph. This transistor achieved a record output power of 550 mW and an associated power-added efficiency of 33 percent at 8.4 GHz, as shown. Record performance was also demonstrated at 12.6 and 18 GHz. Developers have combined these state-of-the-art transistors with transmission lines and micromachined passive circuit components, such as inductors and capacitors, to build multistage amplifiers. Currently, a 1-W, 8.4-GHz power amplifier is being built for NASA deep space communication architectures.

Large-scale quantum photonic circuits in silicon

NASA Astrophysics Data System (ADS)

Harris, Nicholas C.; Bunandar, Darius; Pant, Mihir; Steinbrecher, Greg R.; Mower, Jacob; Prabhu, Mihika; Baehr-Jones, Tom; Hochberg, Michael; Englund, Dirk

2016-08-01

Quantum information science offers inherently more powerful methods for communication, computation, and precision measurement that take advantage of quantum superposition and entanglement. In recent years, theoretical and experimental advances in quantum computing and simulation with photons have spurred great interest in developing large photonic entangled states that challenge today's classical computers. As experiments have increased in complexity, there has been an increasing need to transition bulk optics experiments to integrated photonics platforms to control more spatial modes with higher fidelity and phase stability. The silicon-on-insulator (SOI) nanophotonics platform offers new possibilities for quantum optics, including the integration of bright, nonclassical light sources, based on the large third-order nonlinearity (χ(3)) of silicon, alongside quantum state manipulation circuits with thousands of optical elements, all on a single phase-stable chip. How large do these photonic systems need to be? Recent theoretical work on Boson Sampling suggests that even the problem of sampling from e30 identical photons, having passed through an interferometer of hundreds of modes, becomes challenging for classical computers. While experiments of this size are still challenging, the SOI platform has the required component density to enable low-loss and programmable interferometers for manipulating hundreds of spatial modes. Here, we discuss the SOI nanophotonics platform for quantum photonic circuits with hundreds-to-thousands of optical elements and the associated challenges. We compare SOI to competing technologies in terms of requirements for quantum optical systems. We review recent results on large-scale quantum state evolution circuits and strategies for realizing high-fidelity heralded gates with imperfect, practical systems. Next, we review recent results on silicon photonics-based photon-pair sources and device architectures, and we discuss a path towards large-scale source integration. Finally, we review monolithic integration strategies for single-photon detectors and their essential role in on-chip feed forward operations.

Ultrasonic flow metering system

DOEpatents

Gomm, Tyler J.; Kraft, Nancy C.; Mauseth, Jason A.; Phelps, Larry D.; Taylor, Steven C.

2002-01-01

A system for determining the density, flow velocity, and mass flow of a fluid comprising at least one sing-around circuit that determines the velocity of a signal in the fluid and that is correlatable to a database for the fluid. A system for determining flow velocity uses two of the inventive circuits with directional transmitters and receivers, one of which is set at an angle to the direction of flow that is different from the others.

Designing an Electronics Data Package for Printed Circuit Boards (PCBs)

DTIC Science & Technology

2013-08-01

finished PCB flatness deviation should be less than 0.010 inches per inch. 4  The minimum copper wall thickness of plated-thru holes should be...Memory Card International Association)  IPC-6015 MCM-L (Multi-Chip Module – Laminated )  IPC-6016 HDI (High Density Interconnect)  IPC-6018...Interconnect ICT In Circuit Tester IPC Association Connecting Electronics Industries MCM-L Multi-Chip Module – Laminated MIL Military NEMA National

PILOT-SCALE EVALUATION OF THE IRON-ENHANCED DECHLORINATION TECHNOLOGY FOR REMEDIATION OF CONTAMINATED GROUNDWATER

EPA Science Inventory

An iron-enhanced dechlorination technology was evaluated, under the U.S. Environmental Protection Agency (EPA) Superfund Innovative Technology Evaluation (SITE) program, at a contaminated printed circuit board manufacturing site in New Jersey. This paper describes the feasibility...

From circuits to behaviour in the amygdala

PubMed Central

Janak, Patricia H.; Tye, Kay M.

2015-01-01

The amygdala has long been associated with emotion and motivation, playing an essential part in processing both fearful and rewarding environmental stimuli. How can a single structure be crucial for such different functions? With recent technological advances that allow for causal investigations of specific neural circuit elements, we can now begin to map the complex anatomical connections of the amygdala onto behavioural function. Understanding how the amygdala contributes to a wide array of behaviours requires the study of distinct amygdala circuits. PMID:25592533

A Quatro-Based 65-nm Flip-Flop Circuit for Soft-Error Resilience

NASA Astrophysics Data System (ADS)

Li, Y.-Q.; Wang, H.-B.; Liu, R.; Chen, L.; Nofal, I.; Shi, S.-T.; He, A.-L.; Guo, G.; Baeg, S. H.; Wen, S.-J.; Wong, R.; Chen, M.; Wu, Q.

2017-06-01

A flip-flop circuit hardened against soft errors is presented in this paper. This design is an improved version of Quatro for further enhanced soft-error resilience by integrating the guard-gate technique. The proposed design, as well as reference Quatro and regular flip-flops, was implemented and manufactured in a 65-nm CMOS bulk technology. Experimental characterization results of their alpha and heavy ions soft-error rates verified the superior hardening performance of the proposed design over the other two circuits.

Firefighters' Radios

NASA Technical Reports Server (NTRS)

1976-01-01

Public Technology Inc. asked for NASA assistance to devise the original firefighter's radio. Good short-range radio communications are essential during a fire to coordinate hose lines, rescue victims, and otherwise increase efficiency. Useful firefighting tool is lower cost, more rugged short range two-way radio. Inductorless electronic circuit replaced inductances and coils in radio circuits with combination of transistors and other low-cost components. Substitution promises reduced circuit size and cost. Enhanced electrical performance made radio more durable and improved maintainability by incorporating modular construction.

Fabrication of Circuits on Flexible Substrates Using Conductive SU-8 for Sensing Applications

PubMed Central

Gerardo, Carlos D.; Cretu, Edmond; Rohling, Robert

2017-01-01

This article describes a new low-cost rapid microfabrication technology for high-density interconnects and passive devices on flexible substrates for sensing applications. Silver nanoparticles with an average size of 80 nm were used to create a conductive SU-8 mixture with a concentration of wt 25%. The patterned structures after hard baking have a sheet resistance of 11.17 Ω/☐. This conductive SU-8 was used to pattern planar inductors, capacitors and interconnection lines on flexible Kapton film. The conductive SU-8 structures were used as a seed layer for a subsequent electroplating process to increase the conductivity of the devices. Examples of inductors, resistor-capacitor (RC) and inductor-capacitor (LC) circuits, interconnection lines and a near-field communication (NFC) antenna are presented as a demonstration. As an example of high-resolution miniaturization, we fabricated microinductors having line widths of 5 μm. Mechanical bending tests were successful down to a 5 mm radius. To the best of the authors’ knowledge, this is the first report of conductive SU-8 used to fabricate such planar devices and the first on flexible substrates. This is a proof of concept that this fabrication approach can be used as an alternative for microfabrication of planar passive devices on flexible substrates. PMID:28629134

Antibacterial Composite Film-Based Triboelectric Nanogenerator for Harvesting Walking Energy.

PubMed

Gu, Guang Qin; Han, Chang Bao; Tian, Jing Jing; Lu, Cun Xin; He, Chuan; Jiang, Tao; Li, Zhou; Wang, Zhong Lin

2017-04-05

As a green and eco-friendly technology, triboelectric nanogenerator (TENG) can harvest energy from human motion to generate electricity, so TENGs have been widely applied in wearable electronic devices to replace traditional batteries. However, the surface of these TENGs is easily contaminated and breeds bacteria, which is a threat to human health. Here, we report an antibacterial composite film-based triboelectric nanogenerator (ACF-TENG) that uses Ag-exchanged zeolite (Ag-zeolite) and polypropylene (PP) composite film as the triboelectric layer. Adding a small amount of Ag-zeolite with excellent antibacterial properties can increase the dielectric permittivity and improve the surface charge density of composite films, which enhances the output performance of the ACF-TENG. The open-circuit voltage (V OC ), short-circuit current (I SC ), and transferred charge (Q Tr ) of the ACF-TENG are about 193.3, 225.4, and 233.3% of those of a pure PP film-based TENG, respectively. Because of the silver in the Ag-zeolite, the ACF-TENG can effectively kill Escherichia coli and fungi. When used in insoles, the ACF-TENG can resist the athlete's foot fungus effectively and work as a power source to light up light-emitting diodes and charge capacitors. The ACF-TENG has wide application prospects in self-powered medical and healthcare electronics.

A piezoelectric micro generator worked at low frequency and high acceleration based on PZT and phosphor bronze bonding.

PubMed

Tang, Gang; Yang, Bin; Hou, Cheng; Li, Guimiao; Liu, Jingquan; Chen, Xiang; Yang, Chunsheng

2016-12-08

Recently, piezoelectric energy harvesters (PEHs) have been paid a lot of attention by many researchers to convert mechanical energy into electrical and low level vibration. Currently, most of PEHs worked under high frequency and low level vibration. In this paper, we propose a micro cantilever generator based on the bonding of bulk PZT wafer and phosphor bronze, which is fabricated by MEMS technology, such as mechanical chemical thinning and etching. The experimental results show that the open-circuit output voltage, output power and power density of this fabricated prototype are 35 V, 321 μW and 8664 μW cm -3 at the resonant frequency of 100.8 Hz, respectively, when it matches an optimal loading resistance of 140 kΩ under the excitation of 3.0 g acceleration. The fabricated micro generator can obtain the open-circuit stable output voltage of 61.2 V when the vibration acceleration arrives at 7.0 g. Meanwhile, when this device is pasted on the vibrating vacuum pump, the output voltage is about 11 V. It demonstrates that this novel proposed device can scavenge high vibration level energy at low frequency for powering the inertial sensors in internet of things application.

A piezoelectric micro generator worked at low frequency and high acceleration based on PZT and phosphor bronze bonding

PubMed Central

Tang, Gang; Yang, Bin; Hou, Cheng; Li, Guimiao; Liu, Jingquan; Chen, Xiang; Yang, Chunsheng

2016-01-01

Recently, piezoelectric energy harvesters (PEHs) have been paid a lot of attention by many researchers to convert mechanical energy into electrical and low level vibration. Currently, most of PEHs worked under high frequency and low level vibration. In this paper, we propose a micro cantilever generator based on the bonding of bulk PZT wafer and phosphor bronze, which is fabricated by MEMS technology, such as mechanical chemical thinning and etching. The experimental results show that the open-circuit output voltage, output power and power density of this fabricated prototype are 35 V, 321 μW and 8664 μW cm−3 at the resonant frequency of 100.8 Hz, respectively, when it matches an optimal loading resistance of 140 kΩ under the excitation of 3.0 g acceleration. The fabricated micro generator can obtain the open-circuit stable output voltage of 61.2 V when the vibration acceleration arrives at 7.0 g. Meanwhile, when this device is pasted on the vibrating vacuum pump, the output voltage is about 11 V. It demonstrates that this novel proposed device can scavenge high vibration level energy at low frequency for powering the inertial sensors in internet of things application. PMID:27929139

Quantum Zeno and anti-Zeno effects in open quantum systems

NASA Astrophysics Data System (ADS)

Zhou, Zixian; Lü, Zhiguo; Zheng, Hang; Goan, Hsi-Sheng

2017-09-01

The traditional approach to the quantum Zeno effect (QZE) and quantum anti-Zeno effect (QAZE) in open quantum systems (implicitly) assumes that the bath (environment) state returns to its original state after each instantaneous projective measurement on the system and thus ignores the cross-correlations of the bath operators between different Zeno intervals. However, this assumption is not generally true, especially for a bath with a considerably nonnegligible memory effect and for a system repeatedly projected into an initial general superposition state. We find that, in stark contrast to the result of a constant value found in the traditional approach, the scaled average decay rate in unit Zeno interval of the survival probability is generally time dependent or shows an oscillatory behavior. In the case of a strong bath correlation, the transition between the QZE and the QAZE depends sensitively on the number of measurements N . For a fixed N , a QZE region predicted by the traditional approach may in fact already be in the QAZE region. We illustrate our findings using an exactly solvable open qubit system model with a Lorentzian bath spectral density, which is directly related to realistic circuit cavity quantum electrodynamics systems. Thus the results and dynamics presented here can be verified with current superconducting circuit technology.

HEMT Amplifiers and Equipment for their On-Wafer Testing

NASA Technical Reports Server (NTRS)

Fung, King man; Gaier, Todd; Samoska, Lorene; Deal, William; Radisic, Vesna; Mei, Xiaobing; Lai, Richard

2008-01-01

Power amplifiers comprising InP-based high-electron-mobility transistors (HEMTs) in coplanar-waveguide (CPW) circuits designed for operation at frequencies of hundreds of gigahertz, and a test set for onwafer measurement of their power levels have been developed. These amplifiers utilize an advanced 35-nm HEMT monolithic microwave integrated-circuit (MMIC) technology and have potential utility as local-oscillator drivers and power sources in future submillimeter-wavelength heterodyne receivers and imaging systems. The test set can reduce development time by enabling rapid output power characterization, not only of these and similar amplifiers, but also of other coplanar-waveguide power circuits, without the necessity of packaging the circuits.

A Low-Complexity Circuit for On-Sensor Concurrent A/D Conversion and Compression

NASA Technical Reports Server (NTRS)

Leon-Salas, Walter D.; Balkir, Sina; Sayood, Khalid; Schemm, Nathan; Hoffman, Michael W.

2007-01-01

A low-complexity circuit for on-sensor compression is presented. The proposed circuit achieves complexity savings by combining a single-slope analog-to-digital converter with a Golomb-Rice entropy encoder and by implementing a low-complexity adaptation rule. The adaptation rule monitors the output codewords and minimizes their length by incrementing or decrementing the value of the Golomb-Rice coding parameter k. Its hardware implementation is one order of magnitude lower than existing adaptive algorithms. The compression circuit has been fabricated using a 0.35 micrometers CMOS technology and occupies an area of 0.0918 mm2. Test measurements confirm the validity of the design

Thermally oxidized titania nanotubes enhance the corrosion resistance of Ti6Al4V.

PubMed

Grotberg, John; Hamlekhan, Azhang; Butt, Arman; Patel, Sweetu; Royhman, Dmitry; Shokuhfar, Tolou; Sukotjo, Cortino; Takoudis, Christos; Mathew, Mathew T

2016-02-01

The negative impact of in vivo corrosion of metallic biomedical implants remains a complex problem in the medical field. We aimed to determine the effects of electrochemical anodization (60V, 2h) and thermal oxidation (600°C) on the corrosive behavior of Ti-6Al-4V, with serum proteins, at physiological temperature. Anodization produced a mixture of anatase and amorphous TiO2 nanopores and nanotubes, while the annealing process yielded an anatase/rutile mixture of TiO2 nanopores and nanotubes. The surface area was analyzed by the Brunauer-Emmett-Teller method and was estimated to be 3 orders of magnitude higher than that of polished control samples. Corrosion resistance was evaluated on the parameters of open circuit potential, corrosion potential, corrosion current density, passivation current density, polarization resistance and equivalent circuit modeling. Samples both anodized and thermally oxidized exhibited shifts of open circuit potential and corrosion potential in the noble direction, indicating a more stable nanoporous/nanotube layer, as well as lower corrosion current densities and passivation current densities than the smooth control. They also showed increased polarization resistance and diffusion limited charge transfer within the bulk oxide layer. The treatment groups studied can be ordered from greatest corrosion resistance to least as Anodized+Thermally Oxidized > Anodized > Smooth > Thermally Oxidized for the conditions investigated. This study concludes that anodized surface has a potential to prevent long term implant failure due to corrosion in a complex in-vivo environment. Copyright © 2015 Elsevier B.V. All rights reserved.

Open-Circuit Voltage Losses in Selenium-Substituted Organic Photovoltaic Devices from Increased Density of Charge-Transfer States

DOE PAGES

Sulas, Dana B.; Yao, Kai; Intemann, Jeremy J.; ...

2015-09-12

Using an analysis based on Marcus theory, we characterize losses in open-circuit voltage (V OC) due to changes in charge-transfer state energy, electronic coupling, and spatial density of charge-transfer states in a series of polymer/fullerene solar cells. Here, we use a series of indacenodithiophene polymers and their selenium-substituted analogs as electron donor materials and fullerenes as the acceptors. By combining device measurements and spectroscopic studies (including subgap photocurrent, electroluminescence, and, importantly, time-resolved photoluminescence of the charge-transfer state) we are able to isolate the values for electronic coupling and the density of charge-transfer states (NCT), rather than the more commonly measuredmore » product of these values. We find values for NCT that are surprisingly large (~4.5 × 10 21–6.2 × 10 22 cm -3), and we find that a significant increase in N CT upon selenium substitution in donor polymers correlates with lower VOC for bulk heterojunction photovoltaic devices. The increase in N CT upon selenium substitution is also consistent with nanoscale morphological characterization. Using transmission electron microscopy, selected area electron diffraction, and grazing incidence wide-angle X-ray scattering, we find evidence of more intermixed polymer and fullerene domains in the selenophene blends, which have higher densities of polymer/fullerene interfacial charge-transfer states. Our results provide an important step toward understanding the spatial nature of charge-transfer states and their effect on the open-circuit voltage of polymer/fullerene solar cells« less

Differential regulation of polarized synaptic vesicle trafficking and synapse stability in neural circuit rewiring in Caenorhabditis elegans

PubMed Central

Kurup, Naina; Kono, Karina

2017-01-01

Neural circuits are dynamic, with activity-dependent changes in synapse density and connectivity peaking during different phases of animal development. In C. elegans, young larvae form mature motor circuits through a dramatic switch in GABAergic neuron connectivity, by concomitant elimination of existing synapses and formation of new synapses that are maintained throughout adulthood. We have previously shown that an increase in microtubule dynamics during motor circuit rewiring facilitates new synapse formation. Here, we further investigate cellular control of circuit rewiring through the analysis of mutants obtained in a forward genetic screen. Using live imaging, we characterize novel mutations that alter cargo binding in the dynein motor complex and enhance anterograde synaptic vesicle movement during remodeling, providing in vivo evidence for the tug-of-war between kinesin and dynein in fast axonal transport. We also find that a casein kinase homolog, TTBK-3, inhibits stabilization of nascent synapses in their new locations, a previously unexplored facet of structural plasticity of synapses. Our study delineates temporally distinct signaling pathways that are required for effective neural circuit refinement. PMID:28636662

Effects of /spl gamma/-rays on JFET devices and circuits fabricated in a detector-compatible Process

NASA Astrophysics Data System (ADS)

Betta, G. F. D.; Manghisoni, M.; Ratti, L.; Re, V.; Speziali, V.; Traversi, G.

2003-12-01

This work is concerned with the effects of /spl gamma/-rays on the static, signal and noise characteristics of JFET-based circuits belonging to a fabrication technology made available by the Istituto per la Ricerca Scientifica e Tecnologica (ITC-IRST), Trento, Italy. Such a process has been tuned with the aim of monolithically integrating the readout electronics on the same highly resistive substrate as multielectrode silicon detectors. The radiation tolerance of some test structures, including single devices and charge sensitive amplifiers, was studied in view of low-noise applications in industrial and medical imaging, X- and /spl gamma/-ray astronomy and high energy physics experiments. This paper intends to fill the gap in the study of gamma radiation effects on JFET devices and circuits belonging to detector-compatible technologies.

Comparison of chitosan and chitosan nanoparticles on the performance and charge recombination of water-based gel electrolyte in dye sensitized solar cells.

PubMed

Khalili, Malihe; Abedi, Mohammad; Amoli, Hossein Salar; Mozaffari, Seyed Ahmad

2017-11-01

In commercialization of liquid dye-sensitized solar cells (DSSCs), whose leakage, evaporation and toxicity of organic solvents are limiting factors, replacement of organic solvents with water-based gel electrolyte is recommended. This work reports on utilizing and comparison of chitosan and chitosan nanoparticle as different gelling agents in preparation of water-based gel electrolyte in fabrication of dye sensitized solar cells. All photovoltaic parameters such as open circuit voltage (V oc ), fill factor (FF), short circuit current density (J sc ) and conversion efficiency (η) were measured. For further characterization, electrochemical impedance spectroscopy (EIS) was used to study the charge transfer at Pt/electrolyte interface and charge recombination and electron transport at TiO 2 /dye/electrolyte interface. Significant improvements in conversion efficiency and short circuit current density of DSSCs fabricated by chitosan nanoparticle were observed that can be attributed to the higher mobility of I 3 - due to the lower viscosity and smaller size of chitosan nanoparticles. Copyright © 2017 Elsevier Ltd. All rights reserved.

Effect of povidone-iodine addition on the corrosion behavior of cp-Ti in normal saline.

PubMed

Bhola, Rahul; Bhola, Shaily M; Mishra, Brajendra; Olson, David L

2010-05-01

The effect of various concentrations of povidone-iodine (PI) on the corrosion behavior of a commercially pure titanium alloy (Ti-1) has been investigated in normal saline solution to simulate the povidone-iodine addition in an oral environment. The open circuit potential, electrochemical impedance spectroscopy and potentiodynamic polarization measurements have been used to characterize the electrochemical phenomena occurring on the alloy surface. The open circuit potential values for Ti-1 in various concentrations of PI shift considerably towards noble direction as compared to pure normal saline. In the potentiodynamic polarization curve for Ti-1 in various solutions, the cathodic current density has increased for all concentrations of PI and the anodic current density has decreased. Only the 0.1% PI concentration is able to inhibit corrosion of Ti-1 in normal saline and the other higher concentrations studied, accelerate corrosion. The EIS data for Ti-1 in normal saline and in various concentrations of PI follows a one time constant circuit, suggesting the formation of a single passive film on Ti-1 which is not altered by the addition of PI to normal saline.

Influence of the axial magnetic field on sheath development after current zero in a vacuum circuit breaker

NASA Astrophysics Data System (ADS)

Chen, Yi; Yang, Fei; Sun, Hao; Wu, Yi; Niu, Chunping; Rong, Mingzhe

2017-06-01

After current zero, which is the moment when the vacuum circuit breaker interrupts a vacuum arc, sheath development is the first process in the dielectric recovery process. An axial magnetic field (AMF) is widely used in the vacuum circuit breaker when the high-current vacuum arc is interrupted. Therefore, it is very important to study the influence of different AMF amplitudes on the sheath development. The objective of this paper is to study the influence of different AMF amplitudes on the sheath development from a micro perspective. Thus, the particle in cell-Monte Carlo collisions (PIC-MCC) method was adopted to develop the sheath development model. We compared the simulation results with the experimental results and then validated the simulation. We also obtained the speed of the sheath development and the energy density of the ions under different AMF amplitudes. The results showed that the larger the AMF amplitudes are, the faster the sheath develops and the lower the ion energy density is, meaning the breakdown is correspondingly more difficult.

Amplifier arrays for CMB polarization

NASA Technical Reports Server (NTRS)

Gaier, Todd; Lawrence, Charles R.; Seiffert, Michael D.; Wells, Mary M.; Kangaslahti, Pekka; Dawson, Douglas

2003-01-01

Cryogenic low noise amplifier technology has been successfully used in the study of the cosmic microwave background (CMB). MMIC (Monolithic Millimeter wave Integrated Circuit) technology makes the mass production of coherent detection receivers feasible.

Laser-induced forward transfer for flip-chip packaging of single dies.

PubMed

Kaur, Kamal S; Van Steenberge, Geert

2015-03-20

Flip-chip (FC) packaging is a key technology for realizing high performance, ultra-miniaturized and high-density circuits in the micro-electronics industry. In this technique the chip and/or the substrate is bumped and the two are bonded via these conductive bumps. Many bumping techniques have been developed and intensively investigated since the introduction of the FC technology in 1960(1) such as stencil printing, stud bumping, evaporation and electroless/electroplating2. Despite the progress that these methods have made they all suffer from one or more than one drawbacks that need to be addressed such as cost, complex processing steps, high processing temperatures, manufacturing time and most importantly the lack of flexibility. In this paper, we demonstrate a simple and cost-effective laser-based bump forming technique known as Laser-induced Forward Transfer (LIFT)3. Using the LIFT technique a wide range of bump materials can be printed in a single-step with great flexibility, high speed and accuracy at RT. In addition, LIFT enables the bumping and bonding down to chip-scale, which is critical for fabricating ultra-miniature circuitry.

High efficiency crystalline silicon solar cells

NASA Technical Reports Server (NTRS)

Sah, C. Tang

1986-01-01

A review of the entire research program since its inception ten years ago is given. The initial effort focused on the effects of impurities on the efficiency of silicon solar cells to provide figures of maximum allowable impurity density for efficiencies up to about 16 to 17%. Highly accurate experimental techniques were extended to characterize the recombination properties of the residual imputities in the silicon solar cell. A numerical simulator of the solar cell was also developed, using the Circuit Technique for Semiconductor Analysis. Recent effort focused on the delineation of the material and device parameters which limited the silicon efficiency to below 20% and on an investigation of cell designs to break the 20% barrier. Designs of the cell device structure and geometry can further reduce recombination losses as well as the sensitivity and criticalness of the fabrication technology required to exceed 20%. Further research is needed on the fundamental characterization of the carrier recombination properties at the chemical impurity and physical defect centers. It is shown that only single crystalline silicon cell technology can be successful in attaining efficiencies greater than 20%.