High-temperature performance of MoS2 thin-film transistors: Direct current and pulse current-voltage characteristics

NASA Astrophysics Data System (ADS)

Jiang, C.; Rumyantsev, S. L.; Samnakay, R.; Shur, M. S.; Balandin, A. A.

2015-02-01

We report on fabrication of MoS2 thin-film transistors (TFTs) and experimental investigations of their high-temperature current-voltage characteristics. The measurements show that MoS2 devices remain functional to temperatures of at least as high as 500 K. The temperature increase results in decreased threshold voltage and mobility. The comparison of the direct current (DC) and pulse measurements shows that the direct current sub-linear and super-linear output characteristics of MoS2 thin-films devices result from the Joule heating and the interplay of the threshold voltage and mobility temperature dependences. At temperatures above 450 K, a kink in the drain current occurs at zero gate voltage irrespective of the threshold voltage value. This intriguing phenomenon, referred to as a "memory step," was attributed to the slow relaxation processes in thin films similar to those in graphene and electron glasses. The fabricated MoS2 thin-film transistors demonstrated stable operation after two months of aging. The obtained results suggest new applications for MoS2 thin-film transistors in extreme-temperature electronics and sensors.

Evidence for thermally assisted threshold switching behavior in nanoscale phase-change memory cells

NASA Astrophysics Data System (ADS)

Le Gallo, Manuel; Athmanathan, Aravinthan; Krebs, Daniel; Sebastian, Abu

2016-01-01

In spite of decades of research, the details of electrical transport in phase-change materials are still debated. In particular, the so-called threshold switching phenomenon that allows the current density to increase steeply when a sufficiently high voltage is applied is still not well understood, even though there is wide consensus that threshold switching is solely of electronic origin. However, the high thermal efficiency and fast thermal dynamics associated with nanoscale phase-change memory (PCM) devices motivate us to reassess a thermally assisted threshold switching mechanism, at least in these devices. The time/temperature dependence of the threshold switching voltage and current in doped Ge2Sb2Te5 nanoscale PCM cells was measured over 6 decades in time at temperatures ranging from 40 °C to 160 °C. We observe a nearly constant threshold switching power across this wide range of operating conditions. We also measured the transient dynamics associated with threshold switching as a function of the applied voltage. By using a field- and temperature-dependent description of the electrical transport combined with a thermal feedback, quantitative agreement with experimental data of the threshold switching dynamics was obtained using realistic physical parameters.

A randomized trial of the effect of automated ventricular capture on device longevity and threshold measurement in pacemaker patients.

PubMed

Koplan, Bruce A; Gilligan, David M; Nguyen, Luc S; Lau, Theodore K; Thackeray, Lisa M; Berg, Kellie Chase

2008-11-01

An automatic capture (AC) algorithm adjusts ventricular pacing output to capture the ventricle while optimizing output to 0.5 V above threshold. AC maintains this output and confirms capture on a beat-to-beat basis in bipolar and unipolar pacing and sensing. To assess the AC algorithm and its impact on device longevity. Patients implanted with a pacemaker were randomized 1:1 to have the AC feature on or off for 12 months. Two threshold tests were conducted at each visit- automatic threshold and manual threshold. Average ventricular voltage output and projected device longevity were compared between AC on and off using nonparametric tests. Nine hundred ten patients were enrolled and underwent device implantation. Average ventricular voltage output was 1.6 V for the AC on arm (n = 444) and 3.1 V for the AC off arm (n = 446) (P < 0.001). Projected device longevity was 10.3 years for AC on and 8.9 years for AC off (P < 0.0001), or a 16% increase in longevity for AC on. The proportion of patients in whom there was a difference between automatic threshold and manual threshold of

Composite Material Switches

NASA Technical Reports Server (NTRS)

Javadi, Hamid (Inventor)

2001-01-01

A device to protect electronic circuitry from high voltage transients is constructed from a relatively thin piece of conductive composite sandwiched between two conductors so that conduction is through the thickness of the composite piece. The device is based on the discovery that conduction through conductive composite materials in this configuration switches to a high resistance mode when exposed to voltages above a threshold voltage.

Composite Material Switches

NASA Technical Reports Server (NTRS)

Javadi, Hamid (Inventor)

2002-01-01

A device to protect electronic circuitry from high voltage transients is constructed from a relatively thin piece of conductive composite sandwiched between two conductors so that conduction is through the thickness of the composite piece. The device is based on the discovery that conduction through conductive composite materials in this configuration switches to a high resistance mode when exposed to voltages above a threshold voltage.

Significance of the gate voltage-dependent mobility in the electrical characterization of organic field effect transistors

NASA Astrophysics Data System (ADS)

Kim, Jong Beom; Lee, Dong Ryeol

2018-04-01

We studied the effect of the addition of free hole- and electron-rich organic molecules to organic semiconductors (OSCs) in organic field effect transistors (OFETs) on the gate voltage-dependent mobility. The drain current versus gate voltage characteristics were quantitatively analyzed using an OFET mobility model of power law behavior based on hopping transport in an OSC. This analysis distinguished the threshold voltage shifts, depending on the materials and structures of the OFET device, and properly estimated the hopping transport of the charge carriers induced by the gate bias within the OSC from the power law exponent parameter. The addition of pentacene or C60 molecules to a one-monolayer pentacene-based OFET shifted the threshold voltages negatively or positively, respectively, due to the structural changes that occurred in the OFET device. On the other hand, the power law parameters revealed that the addition of charge carriers of the same or opposite polarity enhanced or hindered hopping transport, respectively. This study revealed the need for a quantitative analysis of the gate voltage-dependent mobility while distinguishing this effect from the threshold voltage effect in order to understand OSC hopping transport in OFETs.

Performance analysis and simulation of vertical gallium nitride nanowire transistors

NASA Astrophysics Data System (ADS)

Witzigmann, Bernd; Yu, Feng; Frank, Kristian; Strempel, Klaas; Fatahilah, Muhammad Fahlesa; Schumacher, Hans Werner; Wasisto, Hutomo Suryo; Römer, Friedhard; Waag, Andreas

2018-06-01

Gallium nitride (GaN) nanowire transistors are analyzed using hydrodynamic simulation. Both p-body and n-body devices are compared in terms of threshold voltage, saturation behavior and transconductance. The calculations are calibrated using experimental data. The threshold voltage can be tuned from enhancement to depletion mode with wire doping. Surface states cause a shift of threshold voltage and saturation current. The saturation current depends on the gate design, with a composite gate acting as field plate in the p-body device. He joined Bell Laboratories, Murray Hill, NJ, as a Technical Staff Member. In October 2001, he joined the Optical Access and Transport Division, Agere Systems, Alhambra, CA. In 2004, he was appointed an Assistant Professor at ETH Zurich,. Since 2008, at the University of Kassel, Kassel, Germany, and he has been a Professor the Head of the Computational Electronics and Photonics Group, and co-director of CINSaT since 2010. His research interests include computational optoelectronics, process and device design of semiconductor photonic devices, microwave components, and electromagnetics modeling for nanophotonics. Dr. Witzigmann is a senior member of the SPIE and IEEE.

Apparatus for Controlling Low Power Voltages in Space Based Processing Systems

NASA Technical Reports Server (NTRS)

Petrick, David J. (Inventor)

2017-01-01

A low power voltage control circuit for use in space missions includes a switching device coupled between an input voltage and an output voltage. The switching device includes a control input coupled to an enable signal, wherein the control input is configured to selectively turn the output voltage on or off based at least in part on the enable signal. A current monitoring circuit is coupled to the output voltage and configured to produce a trip signal, wherein the trip signal is active when a load current flowing through the switching device is determined to exceed a predetermined threshold and is inactive otherwise. The power voltage control circuit is constructed of space qualified components.

Comparative influence study of gate-formation structuring on Al0.22Ga0.78As/In0.16Ga0.84As/Al0.22Ga0.78As double heterojunction high electron mobility transistors

NASA Astrophysics Data System (ADS)

Hsu, M. K.; Chiu, S. Y.; Wu, C. H.; Guo, D. F.; Lour, W. S.

2008-12-01

Pseudomorphic Al0.22Ga0.78As/In0.16Ga0.84As/Al0.22Ga0.78As double heterojunction high electron mobility transistors (DH-HEMTs) fabricated with different gate-formation structures of a single-recess gate (SRG), a double-recess gate (DRG) and a field-plate gate (FPG) were comparatively investigated. FPG devices show the best breakdown characteristics among these devices due to great reduction in the peak electric field between the drain and gate electrodes. The measured gate-drain breakdown voltages defined at a 1 mA mm-1 reverse gate-drain current density were -15.3, -19.1 and -26.0 V for SRG, DRG and FPG devices, respectively. No significant differences in their room-temperature common-source current-voltage characteristics were observed. However, FPG devices exhibit threshold voltages being the least sensitive to temperature. Threshold voltages as a function of temperature indicate a threshold-voltage variation as low as -0.97 mV K-1 for FPG devices. According to the 2.4 GHz load-pull power measurement at VDS = 3.0 V and VGS = -0.5 V, the saturated output power (POUT), power gain (GP) and maximum power-added efficiency (PAE) were 10.3 dBm/13.2 dB/36.6%, 11.2 dBm/13.1 dB/39.7% and 13.06 dBm/12.8 dB/47.3%, respectively, for SRG, DRG and FPG devices with a pi-gate in class AB operation. When the FPG device is biased at a VDS of 10 V, the saturated power density is more than 600 mW mm-1.

TH-CD-201-12: Preliminary Evaluation of Organic Field Effect Transistors as Radiation Detectors

DOE Office of Scientific and Technical Information (OSTI.GOV)

Syme, A; Lin, H; Rubio-Sanchez, J

Purpose: To fabricate organic field effect transistors (OFETs) and evaluate their performance before and after exposure to ionizing radiation. To determine if OFETs have potential to function as radiation dosimeters. Methods: OFETs were fabricated on both Si/SiO{sub 2} wafers and flexible polymer substrates using standard processing techniques. Pentacene was used as the organic semiconductor material and the devices were fabricated in a bottom gate configuration. Devices were irradiated using an orthovoltage treatment unit (120 kVp x-rays). Threshold voltage values were measured with the devices in saturation mode and quantified as a function of cumulative dose. Current-voltage characteristics of the devicesmore » were measured using a Keithley 2614 SourceMeter SMU Instrument. The devices were connected to the reader but unpowered during irradiations. Results: Devices fabricated on Si/SiO2 wafers demonstrated excellent linearity (R{sup 2} > 0.997) with threshold voltages that ranged between 15 and 36 V. Devices fabricated on a flexible polymer substrate had substantially smaller threshold voltages (∼ 4 – 8 V) and slightly worse linearity (R{sup 2} > 0.98). The devices demonstrated excellent stability in I–V characteristics over a large number (>2000) cycles. Conclusion: OFETs have demonstrated excellent potential in radiation dosimetry applications. A key advantage of these devices is their composition, which can be substantially more tissue-equivalent at low photon energies relative to many other types of radiation detector. In addition, fabrication of organic electronics can employ techniques that are faster, simpler and cheaper than conventional silicon-based devices. These results support further development of organic electronic devices for radiation detection purposes. Funding Support, Disclosures, and Conflict of Interest: This work was funded by the Natural Sciences and Engineering Research Council of Canada.« less

Over-voltage protection system and method

DOE Office of Scientific and Technical Information (OSTI.GOV)

Chi, Song; Dong, Dong; Lai, Rixin

An over-voltage protection system includes an electronic valve connected across two terminals of a circuit and an over-voltage detection circuit connected across one of the plurality of semiconductor devices for detecting an over-voltage across the circuit. The electronic valve includes a plurality of semiconductor devices connected in series. The over-voltage detection circuit includes a voltage divider circuit connected to a break-over diode in a way to provide a representative low voltage to the break-over diode and an optocoupler configured to receive a current from the break-over diode when the representative low voltage exceeds a threshold voltage of the break-over diodemore » indicating an over-voltage condition. The representative low voltage provided to the break-over diode represents a voltage across the one semiconductor device. A plurality of self-powered gate drive circuits are connected to the plurality of semiconductor devices, wherein the plurality of self-powered gate drive circuits receive over-voltage triggering pulses from the optocoupler during the over-voltage condition and switch on the plurality of semiconductor devices to bypass the circuit.« less

A theoretical approach to study the optical sensitivity of a MESFET

NASA Astrophysics Data System (ADS)

Dutta, Sutanu

2018-05-01

A theoretical model to study the optical sensitivity of a metal-semiconductor field effect transistor has been proposed for a relatively high drain field. An analytical expression of drain current of the device has been derived for a MESFET under optical illumination considering field dependent mobility of electrons across the channel. The variation of drain current with and without optical illumination has been studied with drain and gate voltages. The optical sensitivity of the drain current has been studied for different biasing conditions and gate lengths. In addition, the shift in threshold voltage of a MESFET under optical illumination is determined and optical sensitivity of the device in terms of its threshold voltage has been studied.

Role of AlGaN/GaN interface traps on negative threshold voltage shift in AlGaN/GaN HEMT

NASA Astrophysics Data System (ADS)

Malik, Amit; Sharma, Chandan; Laishram, Robert; Bag, Rajesh Kumar; Rawal, Dipendra Singh; Vinayak, Seema; Sharma, Rajesh Kumar

2018-04-01

This article reports negative shift in the threshold-voltage in AlGaN/GaN high electron mobility transistor (HEMT) with application of reverse gate bias stress. The device is biased in strong pinch-off and low drain to source voltage condition for a fixed time duration (reverse gate bias stress), followed by measurement of transfer characteristics. Negative threshold voltage shift after application of reverse gate bias stress indicates the presence of more carriers in channel as compared to the unstressed condition. We propose the presence of AlGaN/GaN interface states to be the reason of negative threshold voltage shift, and developed a process to electrically characterize AlGaN/GaN interface states. We verified the results with Technology Computer Aided Design (TCAD) ATLAS simulation and got a good match with experimental measurements.

Evidence for thermally assisted threshold switching behavior in nanoscale phase-change memory cells

DOE Office of Scientific and Technical Information (OSTI.GOV)

Le Gallo, Manuel; Athmanathan, Aravinthan; Krebs, Daniel

2016-01-14

In spite of decades of research, the details of electrical transport in phase-change materials are still debated. In particular, the so-called threshold switching phenomenon that allows the current density to increase steeply when a sufficiently high voltage is applied is still not well understood, even though there is wide consensus that threshold switching is solely of electronic origin. However, the high thermal efficiency and fast thermal dynamics associated with nanoscale phase-change memory (PCM) devices motivate us to reassess a thermally assisted threshold switching mechanism, at least in these devices. The time/temperature dependence of the threshold switching voltage and current inmore » doped Ge{sub 2}Sb{sub 2}Te{sub 5} nanoscale PCM cells was measured over 6 decades in time at temperatures ranging from 40 °C to 160 °C. We observe a nearly constant threshold switching power across this wide range of operating conditions. We also measured the transient dynamics associated with threshold switching as a function of the applied voltage. By using a field- and temperature-dependent description of the electrical transport combined with a thermal feedback, quantitative agreement with experimental data of the threshold switching dynamics was obtained using realistic physical parameters.« less

Limitations of threshold voltage engineering of AlGaN/GaN heterostructures by dielectric interface charge density and manipulation by oxygen plasma surface treatments

NASA Astrophysics Data System (ADS)

Lükens, G.; Yacoub, H.; Kalisch, H.; Vescan, A.

2016-05-01

The interface charge density between the gate dielectric and an AlGaN/GaN heterostructure has a significant impact on the absolute value and stability of the threshold voltage Vth of metal-insulator-semiconductor (MIS) heterostructure field effect transistor. It is shown that a dry-etching step (as typically necessary for normally off devices engineered by gate-recessing) before the Al2O3 gate dielectric deposition introduces a high positive interface charge density. Its origin is most likely donor-type trap states shifting Vth to large negative values, which is detrimental for normally off devices. We investigate the influence of oxygen plasma annealing techniques of the dry-etched AlGaN/GaN surface by capacitance-voltage measurements and demonstrate that the positive interface charge density can be effectively compensated. Furthermore, only a low Vth hysteresis is observable making this approach suitable for threshold voltage engineering. Analysis of the electrostatics in the investigated MIS structures reveals that the maximum Vth shift to positive voltages achievable is fundamentally limited by the onset of accumulation of holes at the dielectric/barrier interface. In the case of the Al2O3/Al0.26Ga0.74N/GaN material system, this maximum threshold voltage shift is limited to 2.3 V.

Redefining the Speed Limit of Phase Change Memory Revealed by Time-resolved Steep Threshold-Switching Dynamics of AgInSbTe Devices

NASA Astrophysics Data System (ADS)

Shukla, Krishna Dayal; Saxena, Nishant; Durai, Suresh; Manivannan, Anbarasu

2016-11-01

Although phase-change memory (PCM) offers promising features for a ‘universal memory’ owing to high-speed and non-volatility, achieving fast electrical switching remains a key challenge. In this work, a correlation between the rate of applied voltage and the dynamics of threshold-switching is investigated at picosecond-timescale. A distinct characteristic feature of enabling a rapid threshold-switching at a critical voltage known as the threshold voltage as validated by an instantaneous response of steep current rise from an amorphous off to on state is achieved within 250 picoseconds and this is followed by a slower current rise leading to crystallization. Also, we demonstrate that the extraordinary nature of threshold-switching dynamics in AgInSbTe cells is independent to the rate of applied voltage unlike other chalcogenide-based phase change materials exhibiting the voltage dependent transient switching characteristics. Furthermore, numerical solutions of time-dependent conduction process validate the experimental results, which reveal the electronic nature of threshold-switching. These findings of steep threshold-switching of ‘sub-50 ps delay time’, opens up a new way for achieving high-speed non-volatile memory for mainstream computing.

Random Dopant Induced Threshold Voltage Lowering and Fluctuations in Sub-0.1 (micron)meter MOSFET's: A 3-D 'Atomistic' Simulation Study

NASA Technical Reports Server (NTRS)

Asenov, Asen

1998-01-01

A three-dimensional (3-D) "atomistic" simulation study of random dopant induced threshold voltage lowering and fluctuations in sub-0.1 microns MOSFET's is presented. For the first time a systematic analysis of random dopant effects down to an individual dopant level was carried out in 3-D on a scale sufficient to provide quantitative statistical predictions. Efficient algorithms based on a single multigrid solution of the Poisson equation followed by the solution of a simplified current continuity equation are used in the simulations. The effects of various MOSFET design parameters, including the channel length and width, oxide thickness and channel doping, on the threshold voltage lowering and fluctuations are studied using typical samples of 200 atomistically different MOSFET's. The atomistic results for the threshold voltage fluctuations were compared with two analytical models based on dopant number fluctuations. Although the analytical models predict the general trends in the threshold voltage fluctuations, they fail to describe quantitatively the magnitude of the fluctuations. The distribution of the atomistically calculated threshold voltage and its correlation with the number of dopants in the channel of the MOSFET's was analyzed based on a sample of 2500 microscopically different devices. The detailed analysis shows that the threshold voltage fluctuations are determined not only by the fluctuation in the dopant number, but also in the dopant position.

Interface engineering in high-performance low-voltage organic thin-film transistors based on 2,7-dialkyl-[1]benzothieno[3,2-b][1]benzothiophenes.

PubMed

Amin, Atefeh Y; Reuter, Knud; Meyer-Friedrichsen, Timo; Halik, Marcus

2011-12-20

We investigated two different (2,7-dialkyl-[1]benzothieno[3,2-b][1]benzothiophenes; C(n)-BTBT-C(n), where n = 12 or 13) semiconductors in low-voltage operating thin-film transistors. By choosing functional molecules in nanoscaled hybrid dielectric layers, we were able to tune the surface energy and improve device characteristics, such as leakage current and hysteresis. The dipolar nature of the self-assembled molecules led to a shift in the threshold voltage. All devices exhibited high charge carrier mobilities of 0.6-7.0 cm(2) V(-1) s(-1). The thin-film morphology of BTBT was studied by means of atomic force microscopy (AFM), presented a dependency upon the surface energy of the self-assembled monolayer (SAM) hybrid dielectrics but not upon the device performance. The use of C(13)-BTBT-C(13) on hybrid dielectrics of AlO(x) and a F(15)C(18)-phosphonic acid monolayer led to devices with a hole mobility of 1.9 cm(2) V(-1) s(-1) at 3 V, on/off ratio of 10(5), small device-device variation of mobility, and a threshold voltage of only -0.9 V, thus providing excellent characteristics for further integration. © 2011 American Chemical Society

Photocurrent Suppression of Transparent Organic Thin Film Transistors

NASA Astrophysics Data System (ADS)

Chuang, Chiao-Shun; Tsai, Shu-Ting; Lin, Yung-Sheng; Chen, Fang-Chung; Shieh, Hang-Ping D.

2007-12-01

Organic thin-film transistors (OTFTs) with high transmittance and low photosensitivity have been demonstrated. By using titanium dioxide nanoparticles as the additives in the polymer gate insulators, the level of device photoresponse has been reduced. The device shows simultaneously a high transparence and a minimal threshold voltage shift under white light illumination. It is inferred that the localized energy levels deep in the energy gap of pentacene behave as the recombination centers, enhancing substantially the recombination process in the conducting channel of the OTFTs. Therefore, the electron trapping is relieved and the shift of threshold voltage is reduced upon illumination.

Indium-gallium-zinc-oxide thin-film transistor with a planar split dual-gate structure

NASA Astrophysics Data System (ADS)

Liu, Yu-Rong; Liu, Jie; Song, Jia-Qi; Lai, Pui-To; Yao, Ruo-He

2017-12-01

An amorphous indium-gallium-zinc-oxide (a-IGZO) thin-film transistor (TFT) with a planar split dual gate (PSDG) structure has been proposed, fabricated and characterized. Experimental results indicate that the two independent gates can provide dynamical control of device characteristics such as threshold voltage, sub-threshold swing, off-state current and saturation current. The transconductance extracted from the output characteristics of the device increases from 4.0 × 10-6S to 1.6 × 10-5S for a change of control gate voltage from -2 V to 2 V, and thus the device could be used in a variable-gain amplifier. A significant advantage of the PSDG structure is its flexibility in controlling the device performance according to the need of practical applications.

Surface Engineering of ITO Substrates to Improve the Memory Performance of an Asymmetric Conjugated Molecule with a Side Chain.

PubMed

Hou, Xiang; Cheng, Xue-Feng; Xiao, Xin; He, Jing-Hui; Xu, Qing-Feng; Li, Hua; Li, Na-Jun; Chen, Dong-Yun; Lu, Jian-Mei

2017-09-05

Organic multilevel random resistive access memory (RRAM) devices with an electrode/organic layer/electrode sandwich-like structure suffer from poor reproducibility, such as low effective ternary device yields and a wide threshold voltage distribution, and improvements through organic material renovation are rather limited. In contrast, engineering of the electrode surfaces rather than molecule design has been demonstrated to boost the performance of organic electronics effectively. Herein, we introduce surface engineering into organic multilevel RRAMs to enhance their ternary memory performance. A new asymmetric conjugated molecule composed of phenothiazine and malononitrile with a side chain (PTZ-PTZO-CN) was fabricated in an indium tin oxide (ITO)/PTZ-PTZO-CN/Al sandwich-like memory device. Modification of the ITO substrate with a phosphonic acid (PA) prior to device fabrication increased the ternary device yield (the ratio of effective ternary device) and narrowed the threshold voltage distribution. The crystallinity analysis revealed that PTZ-PTZO-CN grown on untreated ITO crystallized into two phases. After the surface engineering of ITO, this crystalline ambiguity was eliminated and a sole crystal phase was obtained that was the same as in the powder state. The unified crystal structure and improved grain mosaicity resulted in a lower threshold voltage and, therefore, a higher ternary device yield. Our result demonstrated that PA modification also improved the memory performance of an asymmetric conjugated molecule with a side chain. © 2017 Wiley-VCH Verlag GmbH & Co. KGaA, Weinheim.

Investigation of the novel attributes in double recessed gate SiC MESFETs at drain side

NASA Astrophysics Data System (ADS)

Orouji, Ali A.; Razavi, S. M.; Ebrahim Hosseini, Seyed; Amini Moghadam, Hamid

2011-11-01

In this paper, the potential impact of drain side-double recessed gate (DS-DRG) on silicon carbide (SiC)-based metal semiconductor field effect transistors (MESFETs) is studied. We investigate the device performance focusing on breakdown voltage, threshold voltage, drain current and dc output conductance with two-dimensional and two-carrier device simulation. Our simulation results demonstrate that the channel thickness under the gate in the drain side is an important factor in the breakdown voltage. Also, the positive shift in the threshold voltage for the DS-DRG structure is larger in comparison with that for the source side-double recessed gate (SS-DRG) SiC MESFET. The saturated drain current for the DS-DRG structure is larger compared to that for the SS-DRG structure. The maximum dc output conductance in the DS-DRG structure is smaller than that in the SS-DRG structure.

Reduced distribution of threshold voltage shift in double layer NiSi2 nanocrystals for nano-floating gate memory applications.

PubMed

Choi, Sungjin; Lee, Junhyuk; Kim, Donghyoun; Oh, Seulki; Song, Wangyu; Choi, Seonjun; Choi, Eunsuk; Lee, Seung-Beck

2011-12-01

We report on the fabrication and capacitance-voltage characteristics of double layer nickel-silicide nanocrystals with Si3N4 interlayer tunnel barrier for nano-floating gate memory applications. Compared with devices using SiO2 interlayer, the use of Si3N4 interlayer separation reduced the average size (4 nm) and distribution (+/- 2.5 nm) of NiSi2 nanocrystal (NC) charge traps by more than 50% and giving a two fold increase in NC density to 2.3 x 10(12) cm(-2). The increased density and reduced NC size distribution resulted in a significantly decrease in the distribution of the device C-V characteristics. For each program voltage, the distribution of the shift in the threshold voltage was reduced by more than 50% on average to less than 0.7 V demonstrating possible multi-level-cell operation.

Analytical model of threshold voltage degradation due to localized charges in gate material engineered Schottky barrier cylindrical GAA MOSFETs

NASA Astrophysics Data System (ADS)

Kumar, Manoj; Haldar, Subhasis; Gupta, Mridula; Gupta, R. S.

2016-10-01

The threshold voltage degradation due to the hot carrier induced localized charges (LC) is a major reliability concern for nanoscale Schottky barrier (SB) cylindrical gate all around (GAA) metal-oxide-semiconductor field-effect transistors (MOSFETs). The degradation physics of gate material engineered (GME)-SB-GAA MOSFETs due to LC is still unexplored. An explicit threshold voltage degradation model for GME-SB-GAA-MOSFETs with the incorporation of localized charges (N it) is developed. To accurately model the threshold voltage the minimum channel carrier density has been taken into account. The model renders how +/- LC affects the device subthreshold performance. One-dimensional (1D) Poisson’s and 2D Laplace equations have been solved for two different regions (fresh and damaged) with two different gate metal work-functions. LCs are considered at the drain side with low gate metal work-function as N it is more vulnerable towards the drain. For the reduction of carrier mobility degradation, a lightly doped channel has been considered. The proposed model also includes the effect of barrier height lowering at the metal-semiconductor interface. The developed model results have been verified using numerical simulation data obtained by the ATLAS-3D device simulator and excellent agreement is observed between analytical and simulation results.

Low-Voltage InGaZnO Thin Film Transistors with Small Sub-Threshold Swing.

PubMed

Cheng, C H; Chou, K I; Hsu, H H

2015-02-01

We demonstrate a low-voltage driven, indium-gallium-zinc oxide thin-film transistor using high-κ LaAlO3 gate dielectric. A low VT of 0.42 V, very small sub-threshold swing of 68 mV/dec, field-effect mobility of 4.1 cm2/Ns and low operation voltage of 1.4 V were reached simultaneously in LaAlO3/IGZO TFT device. This low-power and small SS TFT has the potential for fast switching speed and low power applications.

DOE Office of Scientific and Technical Information (OSTI.GOV)

Kumar, S.; Dhar, A., E-mail: adhar@phy.iitkgp.ernet.in

Highlights: • Alternative to chemically crosslinking of PMMA to achieve low leakage in provided. • Effect of LiF in reducing gate leakage through the OFET device is studied. • Effect of gate leakage on transistor performance has been investigated. • Low voltage operable and low temperature processed n-channel OFETs were fabricated. - Abstract: We report low temperature processed, low voltage operable n-channel organic field effect transistors (OFETs) using N,N′-Dioctyl-3,4,9,10-perylenedicarboximide (PTCDI-C{sub 8}) organic semiconductor and poly(methylmethacrylate) (PMMA)/lithium fluoride (LiF) bilayer gate dielectric. We have studied the role of LiF buffer dielectric in effectively reducing the gate leakage through the device andmore » thus obtaining superior performance in contrast to the single layer PMMA dielectric devices. The bilayer OFET devices had a low threshold voltage (V{sub t}) of the order of 5.3 V. The typical values of saturation electron mobility (μ{sub s}), on/off ratio and inverse sub-threshold slope (S) for the range of devices made were estimated to be 2.8 × 10{sup −3} cm{sup 2}/V s, 385, and 3.8 V/decade respectively. Our work thus provides a potential substitution for much complicated process of chemically crosslinking PMMA to achieve low leakage, high capacitance, and thus low operating voltage OFETs.« less

Direct electronic probing of biological complexes formation

NASA Astrophysics Data System (ADS)

Macchia, Eleonora; Magliulo, Maria; Manoli, Kyriaki; Giordano, Francesco; Palazzo, Gerardo; Torsi, Luisa

2014-10-01

Functional bio-interlayer organic field - effect transistors (FBI-OFET), embedding streptavidin, avidin and neutravidin as bio-recognition element, have been studied to probe the electronic properties of protein complexes. The threshold voltage control has been achieved modifying the SiO2 gate diaelectric surface by means of the deposition of an interlayer of bio-recognition elements. A threshold voltage shift with respect to the unmodified dielectric surface toward more negative potential values has been found for the three different proteins, in agreement with their isoelectric points. The relative responses in terms of source - drain current, mobility and threshold voltage upon exposure to biotin of the FBI-OFET devices have been compared for the three bio-recognition elements.

GaN HEMTs with p-GaN gate: field- and time-dependent degradation

NASA Astrophysics Data System (ADS)

Meneghesso, G.; Meneghini, M.; Rossetto, I.; Canato, E.; Bartholomeus, J.; De Santi, C.; Trivellin, N.; Zanoni, E.

2017-02-01

GaN-HEMTs with p-GaN gate have recently demonstrated to be excellent normally-off devices for application in power conversion systems, thanks to the high and robust threshold voltage (VTH>1 V), the high breakdown voltage, and the low dynamic Ron increase. For this reason, studying the stability and reliability of these devices under high stress conditions is of high importance. This paper reports on our most recent results on the field- and time-dependent degradation of GaN-HEMTs with p-GaN gate submitted to stress with positive gate bias. Based on combined step-stress experiments, constant voltage stress and electroluminescence testing we demonstrated that: (i) when submitted to high/positive gate stress, the transistors may show a negative threshold voltage shift, that is ascribed to the injection of holes from the gate metal towards the p-GaN/AlGaN interface; (ii) in a step-stress experiment, the analyzed commercial devices fail at gate voltages higher than 9-10 V, due to the extremely high electric field over the p-GaN/AlGaN stack; (iii) constant voltage stress tests indicate that the failure is also time-dependent and Weibull distributed. The several processes that can explain the time-dependent failure are discussed in the following.

Experimental and Theoretical Study of 4H-SiC JFET Threshold Voltage Body Bias Effect from 25 C to 500 C

NASA Technical Reports Server (NTRS)

Neudeck, Philip G.; Spry, David J.; Chen, Liangyu

2015-01-01

This work reports a theoretical and experimental study of 4H-SiC JFET threshold voltage as a function of substrate body bias, device position on the wafer, and temperature from 25 C (298K) to 500 C (773K). Based on these results, an alternative approach to SPICE circuit simulation of body effect for SiC JFETs is proposed.

SNW 2000 Proceedings. Oxide Thickness Variation Induced Threshold Voltage Fluctuations in Decanano MOSFETs: a 3D Density Gradient Simulation Study

NASA Technical Reports Server (NTRS)

Asenov, Asen; Kaya, S.; Davies, J. H.; Saini, S.

2000-01-01

We use the density gradient (DG) simulation approach to study, in 3D, the effect of local oxide thickness fluctuations on the threshold voltage of decanano MOSFETs in a statistical manner. A description of the reconstruction procedure for the random 2D surfaces representing the 'atomistic' Si-SiO2 interface variations is presented. The procedure is based on power spectrum synthesis in the Fourier domain and can include either Gaussian or exponential spectra. The simulations show that threshold voltage variations induced by oxide thickness fluctuation become significant when the gate length of the devices become comparable to the correlation length of the fluctuations. The extent of quantum corrections in the simulations with respect to the classical case and the dependence of threshold variations on the oxide thickness are examined.

Anatomy of Ag/Hafnia-Based Selectors with 10 10 Nonlinearity

DOE Office of Scientific and Technical Information (OSTI.GOV)

Midya, Rivu; Wang, Zhongrui; Zhang, Jiaming

We developed a novel Ag/oxide-based threshold switching device with attractive features including ≈10 10 nonlinearity. Furthermore, in a high-resolution transmission electron microscopic analysis of the nanoscale crosspoint device it is suggested that elongation of an Ag nanoparticle under voltage bias followed by spontaneous reformation of a more spherical shape after power off, is responsible for the observed threshold switching.

Anatomy of Ag/Hafnia-Based Selectors with 10 10 Nonlinearity

DOE PAGES

Midya, Rivu; Wang, Zhongrui; Zhang, Jiaming; ...

2017-01-30

We developed a novel Ag/oxide-based threshold switching device with attractive features including ≈10 10 nonlinearity. Furthermore, in a high-resolution transmission electron microscopic analysis of the nanoscale crosspoint device it is suggested that elongation of an Ag nanoparticle under voltage bias followed by spontaneous reformation of a more spherical shape after power off, is responsible for the observed threshold switching.

Threshold switching in SiGeAsTeN chalcogenide glass prepared by As ion implantation into sputtered SiGeTeN film

NASA Astrophysics Data System (ADS)

Liu, Guangyu; Wu, Liangcai; Song, Zhitang; Liu, Yan; Li, Tao; Zhang, Sifan; Song, Sannian; Feng, Songlin

2017-12-01

A memory cell composed of a selector device and a storage device is the basic unit of phase change memory. The threshold switching effect, main principle of selectors, is a universal phenomenon in chalcogenide glasses. In this work, we put forward a safe and controllable method to prepare a SiGeAsTeN chalcogenide film by implanting As ions into sputtered SiGeTeN films. For the SiGeAsTeN material, the phase structure maintains the amorphous state, even at high temperature, indicating that no phase transition occurs for this chalcogenide-based material. The electrical test results show that the SiGeAsTeN-based devices exhibit good threshold switching characteristics and the switching voltage decreases with the increasing As content. The decrease in valence alternation pairs, reducing trap state density, may be the physical mechanism for lower switch-on voltage, which makes the SiGeAsTeN material more applicable in selector devices through component optimization.

Wide memory window in graphene oxide charge storage nodes

NASA Astrophysics Data System (ADS)

Wang, Shuai; Pu, Jing; Chan, Daniel S. H.; Cho, Byung Jin; Loh, Kian Ping

2010-04-01

Solution-processable, isolated graphene oxide (GO) monolayers have been used as a charge trapping dielectric in TaN gate/Al2O3/isolated GO sheets/SiO2/p-Si memory device (TANOS). The TANOS type structure serves as memory device with the threshold voltage controlled by the amount of charge trapped in the GO sheet. Capacitance-Voltage hysteresis curves reveal a 7.5 V memory window using the sweep voltage of -5-14 V. Thermal reduction in the GO to graphene reduces the memory window to 1.4 V. The unique charge trapping properties of GO points to the potential applications in flexible organic memory devices.

Band-to-band tunneling field effect transistor for low power logic and memory applications: Design, fabrication and characterization

NASA Astrophysics Data System (ADS)

Mookerjea, Saurabh A.

Over the past decade the microprocessor clock frequency has hit a plateau. The main reason for this has been the inability to follow constant electric field scaling, which requires the transistor supply voltage to be scaled down as the transistor dimensions are reduced. Scaling the supply voltage down reduces the dynamic power quadratically but increases the static leakage power exponentially due to non-scalability of threshold voltage of the transistor, which is required to maintain the same ON state performance. This limitation in supply voltage scaling is directly related to MOSFET's (Metal Oxide Semiconductor Field Effect Transistor) sub-threshold slope (SS) limitation of 60 mV/dec at room temperature. Thus novel device design/materials are required that would allow the transistor to switch with sub-threshold slopes steeper than 60 mV/dec at room temperature, thus facilitating supply voltage scaling. Recently, a new class of devices known as super-steep slope (SS<60 mV/dec) transistors are under intense research for its potential to replace the ubiquitous MOSFET. The focus of this dissertation is on the design, fabrication and characterization of band-to-band tunneling field effect transistor (TFET) which belongs to the family of steep slope transistors. TFET with a gate modulated zener tunnel junction at the source allows sub-kT/q (sub-60 mV/dec at room temperature) sub-threshold slope (SS) device operation over a certain gate bias range near the off-state. This allows TFET to achieve much higher I ON-IOFF ratio over a specified gate voltage swing compared to MOSFETs, thus enabling aggressive supply voltage scaling for low power logic operation without impacting its ON-OFF current ratio. This dissertation presents the operating principle of TFET, the material selection strategy and device design for TFET fabrication. This is followed by a novel 6T SRAM design which circumvents the issue of unidirectional conduction in TFET. The switching behavior of TFET is studied through mixed-mode numerical simulations. The significance of correct benchmarking methodology to estimate the effective drive current and capacitance in TFET is highlighted and compared with MOSFET. This is followed by the fabrication details of homo-junction TFET. Analysis of the electrical characteristics of homo-junction TFET gives key insight into its device operation and identifies the critical factors that impact its performance. In order to boost the ON current, the design and fabrication of hetero-junction TFET is also presented.

Exploring the Short-Channel Characteristics of Asymmetric Junctionless Double-Gate Silicon-on-Nothing MOSFET

NASA Astrophysics Data System (ADS)

Saha, Priyanka; Banerjee, Pritha; Dash, Dinesh Kumar; Sarkar, Subir Kumar

2018-03-01

This paper presents an analytical model of an asymmetric junctionless double-gate (asymmetric DGJL) silicon-on-nothing metal-oxide-semiconductor field-effect transistor (MOSFET). Solving the 2-D Poisson's equation, the expressions for center potential and threshold voltage are calculated. In addition, the response of the device toward the various short-channel effects like hot carrier effect, drain-induced barrier lowering and threshold voltage roll-off has also been examined along with subthreshold swing and drain current characteristics. Performance analysis of the present model is also demonstrated by comparing its short-channel behavior with conventional DGJL MOSFET. The effect of variation of the device features due to the variation of device parameters is also studied. The simulated results obtained using 2D device simulator, namely ATLAS, are in good agreement with the analytical results, hence validating our derived model.

Threshold voltage control in TmSiO/HfO2 high-k/metal gate MOSFETs

NASA Astrophysics Data System (ADS)

Dentoni Litta, E.; Hellström, P.-E.; Östling, M.

2015-06-01

High-k interfacial layers have been proposed as a way to extend the scalability of Hf-based high-k/metal gate CMOS technology, which is currently limited by strong degradations in threshold voltage control, channel mobility and device reliability when the chemical oxide (SiOx) interfacial layer is scaled below 0.4 nm. We have previously demonstrated that thulium silicate (TmSiO) is a promising candidate as a high-k interfacial layer, providing competitive advantages in terms of EOT scalability and channel mobility. In this work, the effect of the TmSiO interfacial layer on threshold voltage control is evaluated, showing that the TmSiO/HfO2 dielectric stack is compatible with threshold voltage control techniques commonly used with SiOx/HfO2 stacks. Specifically, we show that the flatband voltage can be set in the range -1 V to +0.5 V by the choice of gate metal and that the effective workfunction of the stack is properly controlled by the metal workfunction in a gate-last process flow. Compatibility with a gate-first approach is also demonstrated, showing that integration of La2O3 and Al2O3 capping layers can induce a flatband voltage shift of at least 150 mV. Finally, the effect of the annealing conditions on flatband voltage is investigated, finding that the duration of the final forming gas anneal can be used as a further process knob to tune the threshold voltage. The evaluation performed on MOS capacitors is confirmed by the fabrication of TmSiO/HfO2/TiN MOSFETs achieving near-symmetric threshold voltages at sub-nm EOT.

Step buffer layer of Al0.25Ga0.75N/Al0.08Ga0.92N on P-InAlN gate normally-off high electron mobility transistors

NASA Astrophysics Data System (ADS)

Shrestha, Niraj M.; Li, Yiming; Chang, E. Y.

2016-07-01

Normally-off AlGaN/GaN high electron mobility transistors (HEMTs) are indispensable devices for power electronics as they can greatly simplify circuit designs in a cost-effective way. In this work, the electrical characteristics of p-type InAlN gate normally-off AlGaN/GaN HEMTs with a step buffer layer of Al0.25Ga0.75N/Al0.1Ga0.9N is studied numerically. Our device simulation shows that a p-InAlN gate with a step buffer layer allows the transistor to possess normally-off behavior with high drain current and high breakdown voltage simultaneously. The gate modulation by the p-InAlN gate and the induced holes appearing beneath the gate at the GaN/Al0.25Ga0.75N interface is because a hole appearing in the p-InAlN layer can effectively vary the threshold voltage positively. The estimated threshold voltage of the normally-off HEMTs explored is 2.5 V at a drain bias of 25 V, which is 220% higher than the conventional p-AlGaN normally-off AlGaN/GaN gate injection transistor (GIT). Concurrently, the maximum current density of the explored HEMT at a drain bias of 10 V slightly decreases by about 7% (from 240 to 223 mA mm-1). At a drain bias of 15 V, the current density reached 263 mA mm-1. The explored structure is promising owing to tunable positive threshold voltage and the maintenance of similar current density; notably, its breakdown voltage significantly increases by 36% (from 800 V, GIT, to 1086 V). The engineering findings of this study indicate that novel p-InAlN for both the gate and the step buffer layer can feature a high threshold voltage, large current density and high operating voltage for advanced AlGaN/GaN HEMT devices.

Fabrication of arrayed Si nanowire-based nano-floating gate memory devices on flexible plastics.

PubMed

Yoon, Changjoon; Jeon, Youngin; Yun, Junggwon; Kim, Sangsig

2012-01-01

Arrayed Si nanowire (NW)-based nano-floating gate memory (NFGM) devices with Pt nanoparticles (NPs) embedded in Al2O3 gate layers are successfully constructed on flexible plastics by top-down approaches. Ten arrayed Si NW-based NFGM devices are positioned on the first level. Cross-linked poly-4-vinylphenol (PVP) layers are spin-coated on them as isolation layers between the first and second level, and another ten devices are stacked on the cross-linked PVP isolation layers. The electrical characteristics of the representative Si NW-based NFGM devices on the first and second levels exhibit threshold voltage shifts, indicating the trapping and detrapping of electrons in their NPs nodes. They have an average threshold voltage shift of 2.5 V with good retention times of more than 5 x 10(4) s. Moreover, most of the devices successfully retain their electrical characteristics after about one thousand bending cycles. These well-arrayed and stacked Si NW-based NFGM devices demonstrate the potential of nanowire-based devices for large-scale integration.

Graphene quantum dot (GQD)-induced photovoltaic and photoelectric memory elements in a pentacene/GQD field effect transistor as a probe of functional interface

NASA Astrophysics Data System (ADS)

Kim, Youngjun; Cho, Seongeun; Kim, Hyeran; Seo, Soonjoo; Lee, Hyun Uk; Lee, Jouhahn; Ko, Hyungduk; Chang, Mincheol; Park, Byoungnam

2017-09-01

Electric field-induced charge trapping and exciton dissociation were demonstrated at a penatcene/grapheme quantum dot (GQD) interface using a bottom contact bi-layer field effect transistor (FET) as an electrical nano-probe. Large threshold voltage shift in a pentacene/GQD FET in the dark arises from field-induced carrier trapping in the GQD layer or GQD-induced trap states at the pentacene/GQD interface. As the gate electric field increases, hysteresis characterized by the threshold voltage shift depending on the direction of the gate voltage scan becomes stronger due to carrier trapping associated with the presence of a GQD layer. Upon illumination, exciton dissociation and gate electric field-induced charge trapping simultaneously contribute to increase the threshold voltage window, which can potentially be exploited for photoelectric memory and/or photovoltaic devices through interface engineering.

High-wafer-yield, high-performance vertical cavity surface-emitting lasers

NASA Astrophysics Data System (ADS)

Li, Gabriel S.; Yuen, Wupen; Lim, Sui F.; Chang-Hasnain, Constance J.

1996-04-01

Vertical cavity surface emitting lasers (VCSELs) with very low threshold current and voltage of 340 (mu) A and 1.5 V is achieved. The molecular beam epitaxially grown wafers are grown with a highly accurate, low cost and versatile pre-growth calibration technique. One- hundred percent VCSEL wafer yield is obtained. Low threshold current is achieved with a native oxide confined structure with excellent current confinement. Single transverse mode with stable, predetermined polarization direction up to 18 times threshold is also achieved, due to stable index guiding provided by the structure. This is the highest value reported to data for VCSELs. We have established that p-contact annealing in these devices is crucial for low voltage operation, contrary to the general belief. Uniform doping in the mirrors also appears not to be inferior to complicated doping engineering. With these design rules, very low threshold voltage VCSELs are achieved with very simple growth and fabrication steps.

Process dependency on threshold voltage of GaN MOSFET on AlGaN/GaN heterostructure

NASA Astrophysics Data System (ADS)

Wang, Qingpeng; Jiang, Ying; Miyashita, Takahiro; Motoyama, Shin-ichi; Li, Liuan; Wang, Dejun; Ohno, Yasuo; Ao, Jin-Ping

2014-09-01

GaN metal-oxide-semiconductor field-effect transistors (MOSFETs) with recessed gate on AlGaN/GaN heterostructure are reported in which the drain and source ohmic contacts were fabricated on the AlGaN/GaN heterostructure and the electron channel was formed on the GaN buffer layer by removing the AlGaN barrier layer. Negative threshold voltages were commonly observed in all devices. To investigate the reasons of the negative threshold voltages, different oxide thickness, etching gas and bias power of inductively-coupled plasma (ICP) system were utilized in the fabrication process of the GaN MOSFETs. It is found that positive charges of around 1 × 1012 q/cm2 exist near the interface at the just threshold condition in both silane- and tetraethylorthosilicate (TEOS)-based devices. It is also found that the threshold voltages do not obviously change with the different etching gas (SiCl4, BCl3 and two-step etching of SiCl4/Cl2) at the same ICP bias power level (20-25 W) and will become deeper when higher bias power is used in the dry recess process which may be related to the much serious ion bombardment damage. Furthermore, X-ray photoelectron spectroscopy (XPS) experiments were done to investigate the surface conditions. It is found that N 1s peaks become lower with higher bias power of the dry etching process. Also, silicon contamination was found and could be removed by HNO3/HF solution. It indicates that the nitrogen vacancies are mainly responsible for the negative threshold voltages rather than the silicon contamination. It demonstrates that optimization of the ICP recess conditions and improvement of the surface condition are still necessary to realize enhancement-mode GaN MOSFETs on AlGaN/GaN heterostructure.

Heterojunction fully depleted SOI-TFET with oxide/source overlap

NASA Astrophysics Data System (ADS)

Chander, Sweta; Bhowmick, B.; Baishya, S.

2015-10-01

In this work, a hetero-junction fully depleted (FD) Silicon-on-Insulator (SOI) Tunnel Field Effect Transistor (TFET) nanostructure with oxide overlap on the Germanium-source region is proposed. Investigations using Synopsys Technology Computer Aided Design (TCAD) simulation tools reveal that the simple oxide overlap on the Germanium-source region increases the tunneling area as well as the tunneling current without degrading the band-to-band tunneling (BTBT) and improves the device performance. More importantly, the improvement is independent of gate overlap. Simulation study shows improvement in ON current, subthreshold swing (SS), OFF current, ION/IOFF ration, threshold voltage and transconductance. The proposed device with hafnium oxide (HfO2)/Aluminium Nitride (AlN) stack dielectric material offers an average subthreshold swing of 22 mV/decade and high ION/IOFF ratio (∼1010) at VDS = 0.4 V. Compared to conventional TFET, the Miller capacitance of the device shows the enhanced performance. The impact of the drain voltage variation on different parameters such as threshold voltage, subthreshold swing, transconductance, and ION/IOFF ration are also found to be satisfactory. From fabrication point of view also it is easy to utilize the existing CMOS process flows to fabricate the proposed device.

Gate length variation effect on performance of gate-first self-aligned In₀.₅₃Ga₀.₄₇As MOSFET.

PubMed

Mohd Razip Wee, Mohd F; Dehzangi, Arash; Bollaert, Sylvain; Wichmann, Nicolas; Majlis, Burhanuddin Y

2013-01-01

A multi-gate n-type In₀.₅₃Ga₀.₄₇As MOSFET is fabricated using gate-first self-aligned method and air-bridge technology. The devices with different gate lengths were fabricated with the Al2O3 oxide layer with the thickness of 8 nm. In this letter, impact of gate length variation on device parameter such as threshold voltage, high and low voltage transconductance, subthreshold swing and off current are investigated at room temperature. Scaling the gate length revealed good enhancement in all investigated parameters but the negative shift in threshold voltage was observed for shorter gate lengths. The high drain current of 1.13 A/mm and maximum extrinsic transconductance of 678 mS/mm with the field effect mobility of 364 cm(2)/Vs are achieved for the gate length and width of 0.2 µm and 30 µm, respectively. The source/drain overlap length for the device is approximately extracted about 51 nm with the leakage current in order of 10(-8) A. The results of RF measurement for cut-off and maximum oscillation frequency for devices with different gate lengths are compared.

Gate Length Variation Effect on Performance of Gate-First Self-Aligned In0.53Ga0.47As MOSFET

PubMed Central

Mohd Razip Wee, Mohd F.; Dehzangi, Arash; Bollaert, Sylvain; Wichmann, Nicolas; Majlis, Burhanuddin Y.

2013-01-01

A multi-gate n-type In0.53Ga0.47As MOSFET is fabricated using gate-first self-aligned method and air-bridge technology. The devices with different gate lengths were fabricated with the Al2O3 oxide layer with the thickness of 8 nm. In this letter, impact of gate length variation on device parameter such as threshold voltage, high and low voltage transconductance, subthreshold swing and off current are investigated at room temperature. Scaling the gate length revealed good enhancement in all investigated parameters but the negative shift in threshold voltage was observed for shorter gate lengths. The high drain current of 1.13 A/mm and maximum extrinsic transconductance of 678 mS/mm with the field effect mobility of 364 cm2/Vs are achieved for the gate length and width of 0.2 µm and 30µm, respectively. The source/drain overlap length for the device is approximately extracted about 51 nm with the leakage current in order of 10−8 A. The results of RF measurement for cut-off and maximum oscillation frequency for devices with different gate lengths are compared. PMID:24367548

Effect of thermal insulation on the electrical characteristics of NbOx threshold switches

NASA Astrophysics Data System (ADS)

Wang, Ziwen; Kumar, Suhas; Wong, H.-S. Philip; Nishi, Yoshio

2018-02-01

Threshold switches based on niobium oxide (NbOx) are promising candidates as bidirectional selector devices in crossbar memory arrays and building blocks for neuromorphic computing. Here, it is experimentally demonstrated that the electrical characteristics of NbOx threshold switches can be tuned by engineering the thermal insulation. Increasing the thermal insulation by ˜10× is shown to produce ˜7× reduction in threshold current and ˜45% reduction in threshold voltage. The reduced threshold voltage leads to ˜5× reduction in half-selection leakage, which highlights the effectiveness of reducing half-selection leakage of NbOx selectors by engineering the thermal insulation. A thermal feedback model based on Poole-Frenkel conduction in NbOx can explain the experimental results very well, which also serves as a piece of strong evidence supporting the validity of the Poole-Frenkel based mechanism in NbOx threshold switches.

Reliability of gamma-irradiated n-channel ZnO thin-film transistors: electronic and interface properties

NASA Astrophysics Data System (ADS)

Lee, Kin Kiong; Wang, Danna; Shinobu, Onoda; Ohshima, Takeshi

2018-04-01

Radiation-induced charge trapping and interface traps in n-channel ZnO thin film transistors are characterised as a function of total dose and irradiation bias following exposure to gamma-rays. Devices were irradiated up to ∼60 kGy(SiO?) and the electrical characteristic exhibits two distinct regimes. In the first regime, up to a total dose of 40 kGy(SiO?), the threshold voltage increases positively. However, in the second regime with irradiation greater than 40 kGy(SiO?), the threshold voltage moves in the opposite direction. This reversal of threshold voltage is attributed to the influence of the radiation-induced interface and oxide- charge, in which both have opposite polarity, on the electrical performance of the transistors. In the first regime, the generation of the oxide- charge is initially greater than the density of interface traps and caused a positive shift. In the second regime, when the total doses were greater than 40 kGy(SiO?), the radiation-induced interface traps are greater than the density of oxide- charge and caused the threshold voltage to switch direction. Further, the generated interface traps contributed to the degradation of the effective channel mobility, whereas the density of traps at the grain-boundaries did not increase significantly upon irradiation. Isothermal annealing of the devices at 363 K results in a reduction in the trap density and an improvement of the effective channel mobility to ∼90% of its pre-irradiation value.

Improvement in interfacial characteristics of low-voltage carbon nanotube thin-film transistors with solution-processed boron nitride thin films

NASA Astrophysics Data System (ADS)

Jeon, Jun-Young; Ha, Tae-Jun

2017-08-01

In this article, we demonstrate the potential of solution-processed boron nitride (BN) thin films for high performance single-walled carbon nanotube thin-film transistors (SWCNT-TFTs) with low-voltage operation. The use of BN thin films between solution-processed high-k dielectric layers improved the interfacial characteristics of metal-insulator-metal devices, thereby reducing the current density by three orders of magnitude. We also investigated the origin of improved device performance in SWCNT-TFTs by employing solution-processed BN thin films as an encapsulation layer. The BN encapsulation layer improves the electrical characteristics of SWCNT-TFTs, which includes the device key metrics of linear field-effect mobility, sub-threshold swing, and threshold voltage as well as the long-term stability against the aging effect in air. Such improvements can be achieved by reduced interaction of interfacial localized states with charge carriers. We believe that this work can open up a promising route to demonstrate the potential of solution-processed BN thin films on nanoelectronics.

Charge Transport in Carbon Nanotubes-Polymer Composite Photovoltaic Cells

PubMed Central

Ltaief, Adnen; Bouazizi, Abdelaziz; Davenas, Joel

2009-01-01

We investigate the dark and illuminated current density-voltage (J/V) characteristics of poly(2-methoxy-5-(2’-ethylhexyloxy)1-4-phenylenevinylene) (MEH-PPV)/single-walled carbon nanotubes (SWNTs) composite photovoltaic cells. Using an exponential band tail model, the conduction mechanism has been analysed for polymer only devices and composite devices, in terms of space charge limited current (SCLC) conduction mechanism, where we determine the power parameters and the threshold voltages. Elaborated devices for MEH-PPV:SWNTs (1:1) composites showed a photoresponse with an open-circuit voltage Voc of 0.4 V, a short-circuit current density JSC of 1 µA/cm² and a fill factor FF of 43%. We have modelised the organic photovoltaic devices with an equivalent circuit, where we calculated the series and shunt resistances.

Origin of threshold voltage fluctuation caused by ion implantation to source and drain extensions of silicon-on-insulator triple-gate fin-type field-effect transistors using three-dimensional process and device simulations

NASA Astrophysics Data System (ADS)

Tsutsumi, Toshiyuki

2018-06-01

The threshold voltage (V th) fluctuation induced by ion implantation (I/I) in the source and drain extensions (SDEs) of a silicon-on-insulator (SOI) triple-gate (Tri-Gate) fin-type field-effect transistor (FinFET) was analyzed by both three-dimensional (3D) process and device simulations collaboratively. The origin of the V th fluctuation induced by the SDE I/I is basically a variation of a bottleneck barrier height (BBH) due to implanted arsenic (As+) ions. In particular, a very low and broad V th distribution in the saturation region is due to percolative conduction in addition to the BBH variation. Moreover, it is surprisingly found that the V th fluctuation is mostly characterized by the BBH of only a top surface center line of a Si fin of the device. Our collaborative approach by 3D process and device simulations is dispensable for the accurate investigation of variability-tolerant devices. The obtained results are beneficial for the research and development of such future devices.

New Energy-Dependent Soft X-Rav Damage In MOS Devices

NASA Astrophysics Data System (ADS)

Chan, Tung-Yi; Gaw, Henry; Seligson, Daniel; Pan, Lawrence; King, Paul L.; Pianetta, Piero

1988-06-01

An energy-dependent soft x-ray-induced device damage has been discovered in MOS devices fabricated using standard CMOS process. MOS devices were irradiated by monochromatic x-rays in energy range just above and below the silicon K-edge (1.84 keV). Photons below the K-edge is found to create more damage in the oxide and oxide/silicon interface than photons above the K-edge. This energy-dependent damage effect is believed to be due to charge traps generated during device fabrication. It is found that data for both n- and p-type devices lie along a universal curve if normalized threshold voltage shifts are plotted against absorbed dose in the oxide. The threshold voltage shift saturates when the absorbed dose in the oxide exceeds 1.4X105 mJ/cm3, corresponding to 6 Mrad in the oxide. Using isochronal anneals, the trapped charge damage is found to recover with an activation energy of 0.38 eV. A discrete radiation-induced damage state appears in the low frequency C-V curve in a temperature range from 1750C to 325°C.

Rectification of graphene self-switching diodes: First-principles study

NASA Astrophysics Data System (ADS)

Ghaziasadi, Hassan; Jamasb, Shahriar; Nayebi, Payman; Fouladian, Majid

2018-05-01

The first principles calculations based on self-consistent charge density functional tight-binding have performed to investigate the electrical properties and rectification behavior of the graphene self-switching diodes (GSSD). The devices contained two structures called CG-GSSD and DG-GSSD which have metallic or semiconductor gates depending on their side gates have a single or double hydrogen edge functionalized. We have relaxed the devices and calculated I-V curves, transmission spectrums and maximum rectification ratios. We found that the DG-MSM devices are more favorable and more stable. Also, the DG-MSM devices have better maximum rectification ratios and current. Moreover, by changing the side gates widths and behaviors from semiconductor to metal, the threshold voltages under forward bias changed from +1.2 V to +0.3 V. Also, the maximum currents are obtained from 1.12 μA to 10.50 μA. Finally, the MSM and SSS type of all devices have minimum and maximum values of voltage threshold and maximum rectification ratios, but the 769-DG devices don't obey this rule.

AC electrified jets in a flow-focusing device: Jet length scaling

PubMed Central

García-Sánchez, Pablo; Alzaga-Gimeno, Javier; Baret, Jean-Christophe

2016-01-01

We use a microfluidic flow-focusing device with integrated electrodes for controlling the production of water-in-oil drops. In a previous work, we reported that very long jets can be formed upon application of AC fields. We now study in detail the appearance of the long jets as a function of the electrical parameters, i.e., water conductivity, signal frequency, and voltage amplitude. For intermediate frequencies, we find a threshold voltage above which the jet length rapidly increases. Interestingly, this abrupt transition vanishes for high frequencies of the signal and the jet length grows smoothly with voltage. For frequencies below a threshold value, we previously reported a transition from a well-behaved uniform jet to highly unstable liquid structures in which axisymmetry is lost rather abruptly. These liquid filaments eventually break into droplets of different sizes. In this work, we characterize this transition with a diagram as a function of voltage and liquid conductivity. The electrical response of the long jets was studied via a distributed element circuit model. The model allows us to estimate the electric potential at the tip of the jet revealing that, for any combination of the electrical parameters, the breakup of the jet occurs at a critical value of this potential. We show that this voltage is around 550 V for our device geometry and choice of flow rates. PMID:27375826

AC electrified jets in a flow-focusing device: Jet length scaling.

PubMed

Castro-Hernández, Elena; García-Sánchez, Pablo; Alzaga-Gimeno, Javier; Tan, Say Hwa; Baret, Jean-Christophe; Ramos, Antonio

2016-07-01

We use a microfluidic flow-focusing device with integrated electrodes for controlling the production of water-in-oil drops. In a previous work, we reported that very long jets can be formed upon application of AC fields. We now study in detail the appearance of the long jets as a function of the electrical parameters, i.e., water conductivity, signal frequency, and voltage amplitude. For intermediate frequencies, we find a threshold voltage above which the jet length rapidly increases. Interestingly, this abrupt transition vanishes for high frequencies of the signal and the jet length grows smoothly with voltage. For frequencies below a threshold value, we previously reported a transition from a well-behaved uniform jet to highly unstable liquid structures in which axisymmetry is lost rather abruptly. These liquid filaments eventually break into droplets of different sizes. In this work, we characterize this transition with a diagram as a function of voltage and liquid conductivity. The electrical response of the long jets was studied via a distributed element circuit model. The model allows us to estimate the electric potential at the tip of the jet revealing that, for any combination of the electrical parameters, the breakup of the jet occurs at a critical value of this potential. We show that this voltage is around 550 V for our device geometry and choice of flow rates.

Back-and-forth micromotion of aqueous droplets in a dc electric field.

PubMed

Kurimura, Tomo; Ichikawa, Masatoshi; Takinoue, Masahiro; Yoshikawa, Kenichi

2013-10-01

Recently, it was reported that an aqueous droplet in an oil phase exhibited rhythmic back-and-forth motion under stationary dc voltage on the order of 100 V. Here, we demonstrate that the threshold voltage for inducing such oscillation is successfully decreased to the order of 10 V through downsizing of the experimental system. Notably, the threshold electric field tends to decrease with a nonlinear scaling relationship accompanied by the downsizing. We derive a simple theoretical model to interpret the system size dependence of the threshold voltage. This model equation suggests the unique effect of additional noise, which is qualitatively characterized as a coherent resonance by an actual experiment as a kind of coherent resonance. Our result would provide insight into the construction of micrometer-sized self-commutating motors and actuators in microfluidic and micromechanical devices.

Upsets in Erased Floating Gate Cells With High-Energy Protons

DOE PAGES

Gerardin, S.; Bagatin, M.; Paccagnella, A.; ...

2017-01-01

We discuss upsets in erased floating gate cells, due to large threshold voltage shifts, using statistical distributions collected on a large number of memory cells. The spread in the neutral threshold voltage appears to be too low to quantitatively explain the experimental observations in terms of simple charge loss, at least in SLC devices. The possibility that memories exposed to high energy protons and heavy ions exhibit negative charge transfer between programmed and erased cells is investigated, although the analysis does not provide conclusive support to this hypothesis.

Towards highly stable polymer electronics (Conference Presentation)

NASA Astrophysics Data System (ADS)

Nikolka, Mark; Nasrallah, Iyad; Broch, Katharina; Sadhanala, Aditya; Hurhangee, Michael; McCulloch, Iain; Sirringhaus, Henning

2016-11-01

Due to their ease of processing, organic semiconductors are promising candidates for applications in high performance flexible displays and fast organic electronic circuitry. Recently, a lot of advances have been made on organic semiconductors exhibiting surprisingly high performance and carrier mobilities exceeding those of amorphous silicon. However, there remain significant concerns about their operational and environmental stability, particularly in the context of applications that require a very high level of threshold voltage stability, such as active-matrix addressing of organic light-emitting diode (OLED) displays. Here, we report a novel technique for dramatically improving the operational stress stability, performance and uniformity of high mobility polymer field-effect transistors by the addition of specific small molecule additives to the polymer semiconductor film. We demonstrate for the first time polymer FETs that exhibit stable threshold voltages with threshold voltage shifts of less than 1V when subjected to a constant current operational stress for 1 day under conditions that are representative for applications in OLED active matrix displays. The approach constitutes in our view a technological breakthrough; it also makes the device characteristics independent of the atmosphere in which it is operated, causes a significant reduction in contact resistance and significantly improves device uniformity. We will discuss in detail the microscopic mechanism by which the molecular additives lead to this significant improvement in device performance and stability.

Electrical characteristics of silicon percolating nanonet-based field effect transistors in the presence of dispersion

NASA Astrophysics Data System (ADS)

Cazimajou, T.; Legallais, M.; Mouis, M.; Ternon, C.; Salem, B.; Ghibaudo, G.

2018-05-01

We studied the current-voltage characteristics of percolating networks of silicon nanowires (nanonets), operated in back-gated transistor mode, for future use as gas or biosensors. These devices featured P-type field-effect characteristics. It was found that a Lambert W function-based compact model could be used for parameter extraction of electrical parameters such as apparent low field mobility, threshold voltage and subthreshold slope ideality factor. Their variation with channel length and nanowire density was related to the change of conduction regime from direct source/drain connection by parallel nanowires to percolating channels. Experimental results could be related in part to an influence of the threshold voltage dispersion of individual nanowires.

Addressable inverter matrix for process and device characterization

NASA Technical Reports Server (NTRS)

Buehler, M. G.; Sayah, H. R.

1985-01-01

The addressable inverter matrix consists of 222 inverters each accessible with the aid of a shift register. The structure has proven useful in characterizing the variability of inverter transfer curves and in diagnosing processing faults. For good 3-micron CMOS bulk inverters investigated in this study, the percent standard deviation of the inverter threshold voltage was less than one percent and the inverter gain (the slope of the inverter transfer curve at the inverter threshold voltage) was less than 3 percent. The average noise margin for the inverters was near 2 volts for a power supply voltage of 5 volts. The specific faults studied included undersize pull-down transistor widths and various open contacts in the matrix.

Liquid-Solid Dual-Gate Organic Transistors with Tunable Threshold Voltage for Cell Sensing.

PubMed

Zhang, Yu; Li, Jun; Li, Rui; Sbircea, Dan-Tiberiu; Giovannitti, Alexander; Xu, Junling; Xu, Huihua; Zhou, Guodong; Bian, Liming; McCulloch, Iain; Zhao, Ni

2017-11-08

Liquid electrolyte-gated organic field effect transistors and organic electrochemical transistors have recently emerged as powerful technology platforms for sensing and simulation of living cells and organisms. For such applications, the transistors are operated at a gate voltage around or below 0.3 V because prolonged application of a higher voltage bias can lead to membrane rupturing and cell death. This constraint often prevents the operation of the transistors at their maximum transconductance or most sensitive regime. Here, we exploit a solid-liquid dual-gate organic transistor structure, where the threshold voltage of the liquid-gated conduction channel is controlled by an additional gate that is separated from the channel by a metal-oxide gate dielectric. With this design, the threshold voltage of the "sensing channel" can be linearly tuned in a voltage window exceeding 0.4 V. We have demonstrated that the dual-gate structure enables a much better sensor response to the detachment of human mesenchymal stem cells. In general, the capability of tuning the optimal sensing bias will not only improve the device performance but also broaden the material selection for cell-based organic bioelectronics.

Effect of gate bias sweep rate on the threshold voltage of in-plane gate nanowire transistor

NASA Astrophysics Data System (ADS)

Liu, H. X.; Li, J.; Tan, R. R.

2018-01-01

In2O3 nanowire electric-double-layer (EDL) transistors with in-plane gate gated by SiO2 solid-electrolyte are fabricated on transparent glass substrates. The gate voltage sweep rates can effectively modulate the threshold voltage (Vth) of nanowire device. Both depletion mode and enhancement mode are realized, and the Vth shift of the nanowire transistors is estimated to be 0.73V (without light). This phenomenon is due to increased adsorption of oxygen on the nanowire surface by the slower gate voltage sweep rates. Adsorbed oxygens capture electrons and cause a surface of nanowire channel was depleted. The operation voltage of transistor was 1.0 V, because the EDL gate dielectric can lead to high gate dielectric capacitance. These transparent in-plane gate nanowire transistors are promising for “see-through” nanoscale sensors.

Solution-processable alumina: PVP nanocomposite dielectric layer for high-performance organic thin-film transistors

NASA Astrophysics Data System (ADS)

Lin, Hui; Kong, Xiao; Li, Yiran; Kuang, Peng; Tao, Silu

2018-03-01

In this article, we have investigated the effect of nanocomposite gate dielectric layer built by alumina (Al2O3) and poly(4-vinyphenol) (PVP) with solution method which could enhance the dielectric capability and decrease the surface polarity. Then, we used modify layer to optimize the surface morphology of dielectric layer to further improve the insulation capability, and finally we fabricated the high-performance and low-voltage organic thin-film transistors by using this nanocomposite dielectric layer. The result shows that the devices with Al2O3:10%PVP dielectric layer with a modified layer exhibited a mobility of 0.49 cm2/Vs, I on/Ioff ratio of 7.8 × 104, threshold voltage of - 1.2 V, sub-threshold swing of 0.3 V/dec, and operating voltage as low as - 4 V. The improvement of devices performance was owing to the good insulation capability, appropriate capacitance of dielectric layer, and preferable interface contact, smaller crystalline size of active layer.

Microwave annealing effect for highly reliable biosensor: dual-gate ion-sensitive field-effect transistor using amorphous InGaZnO thin-film transistor.

PubMed

Lee, In-Kyu; Lee, Kwan Hyi; Lee, Seok; Cho, Won-Ju

2014-12-24

We used a microwave annealing process to fabricate a highly reliable biosensor using amorphous-InGaZnO (a-IGZO) thin-film transistors (TFTs), which usually experience threshold voltage instability. Compared with furnace-annealed a-IGZO TFTs, the microwave-annealed devices showed superior threshold voltage stability and performance, including a high field-effect mobility of 9.51 cm(2)/V·s, a low threshold voltage of 0.99 V, a good subthreshold slope of 135 mV/dec, and an outstanding on/off current ratio of 1.18 × 10(8). In conclusion, by using the microwave-annealed a-IGZO TFT as the transducer in an extended-gate ion-sensitive field-effect transistor biosensor, we developed a high-performance biosensor with excellent sensing properties in terms of pH sensitivity, reliability, and chemical stability.

Modeling of high composition AlGaN channel high electron mobility transistors with large threshold voltage

DOE Office of Scientific and Technical Information (OSTI.GOV)

Bajaj, Sanyam, E-mail: bajaj.10@osu.edu; Hung, Ting-Hsiang; Akyol, Fatih

2014-12-29

We report on the potential of high electron mobility transistors (HEMTs) consisting of high composition AlGaN channel and barrier layers for power switching applications. Detailed two-dimensional (2D) simulations show that threshold voltages in excess of 3 V can be achieved through the use of AlGaN channel layers. We also calculate the 2D electron gas mobility in AlGaN channel HEMTs and evaluate their power figures of merit as a function of device operating temperature and Al mole fraction in the channel. Our models show that power switching transistors with AlGaN channels would have comparable on-resistance to GaN-channel based transistors for the samemore » operation voltage. The modeling in this paper shows the potential of high composition AlGaN as a channel material for future high threshold enhancement mode transistors.« less

Low power ovonic threshold switching characteristics of thin GeTe{sub 6} films using conductive atomic force microscopy

DOE Office of Scientific and Technical Information (OSTI.GOV)

Manivannan, Anbarasu, E-mail: anbarasu@iiti.ac.in, E-mail: ranjith@iith.ac.in; Sahu, Smriti; Myana, Santosh Kumar

2014-12-15

Minimizing the dimensions of the electrode could directly impact the energy-efficient threshold switching and programming characteristics of phase change memory devices. A ∼12–15 nm AFM probe-tip was employed as one of the electrodes for a systematic study of threshold switching of as-deposited amorphous GeTe{sub 6} thin films. This configuration enables low power threshold switching with an extremely low steady state current in the on state of 6–8 nA. Analysis of over 48 different probe locations on the sample reveals a stable Ovonic threshold switching behavior at threshold voltage, V{sub TH} of 2.4 ± 0.5 V and the off state was retained below a holding voltage,more » V{sub H} of 0.6 ± 0.1 V. All these probe locations exhibit repeatable on-off transitions for more than 175 pulses at each location. Furthermore, by utilizing longer biasing voltages while scanning, a plausible nano-scale control over the phase change behavior from as-deposited amorphous to crystalline phase was studied.« less

Low-cost fabrication and polar-dependent switching uniformity of memory devices using alumina interfacial layer and Ag nanoparticle monolayer

NASA Astrophysics Data System (ADS)

Xia, Peng; Li, Luman; Wang, Pengfei; Gan, Ying; Xu, Wei

2017-11-01

A facile and low-cost process was developed for fabricating write-once-read-many-times (WORM) Cu/Ag NPs/Alumina/Al memory devices, where the alumina passivation layer formed naturally in air at room temperature, whereas the Ag nanoparticle monolayer was in situ prepared through thermal annealing of a 4.5 nm Ag film in air at 150°C. The devices exhibit irreversible transition from initial high resistance (OFF) state to low resistance (ON) state, with ON/OFF ratio of 107, indicating the introduction of Ag nanoparticle monolayer greatly improves ON/OFF ratio by four orders of magnitude. The uniformity of threshold voltages exhibits a polar-dependent behavior, and a narrow range of threshold voltages of 0.40 V among individual devices was achieved upon the forward voltage. The memory device can be regarded as two switching units connected in series. The uniform alumina interfacial layer and the non-uniform distribution of local electric fields originated from Ag nanoparticles might be responsible for excellent switching uniformity. Since silver ions in active layer can act as fast ion conductor, a plausible mechanism relating to the formation of filaments sequentially among the two switching units connected in series is suggested for the polar-dependent switching behavior. Furthermore, we demonstrate both alumina layer and Ag NPs monolayer play essential roles in improving switching parameters based on comparative experiments.

Remarkable reduction in the threshold voltage of pentacene-based thin film transistors with pentacene/CuPc sandwich configuration

NASA Astrophysics Data System (ADS)

Li, Yi; Liu, Qi; Cai, Jing; Li, Yun; Shi, Yi; Wang, Xizhang; Hu, Zheng

2014-06-01

This study investigates the remarkable reduction in the threshold voltage (VT) of pentacene-based thin film transistors with pentacene/copper phthalocyanine (CuPc) sandwich configuration. This reduction is accompanied by increased mobility and lowered sub-threshold slope (S). Sandwich devices coated with a 5 nm layer of CuPc layer are compared with conventional top-contact devices, and results indicate that VT decreased significantly from -20.4 V to -0.2 V, that mobility increased from 0.18 cm2/Vs to 0.51 cm2/Vs, and that S was reduced from 4.1 V/dec to 2.9 V/dec. However, the on/off current ratio remains at 105. This enhanced performance could be attributed to the reduction in charge trap density by the incorporated CuPc layer. Results suggest that this method is simple and effectively generates pentacene-based organic thin film transistors with high mobility and low VT.

Modelling voltage sag mitigation using dynamic voltage restorer and analyzing power quality issue

NASA Astrophysics Data System (ADS)

Ismail, Nor Laili; Hidzir, Hizrin Dayana Mohd; Thanakodi, Suresh; Nazar, Nazatul Shiema Moh; Ibrahim, Pungut; Ali, Che Ku Muhammad Sabri Che Ku

2018-02-01

Power quality problem which are arise due to a fault or a pulsed load can have caused an interruption of critical load. The modern power systems are becoming more sensitive to the quality of the power supplied by the utility company. Voltage sags and swells, flicker, interruptions, harmonic distortion and other distortion to the sinusoidal waveform are the examples of the power quality problems. The most affected due to these problems is industrial customers who use a lot of sensitive equipment. There has suffered a huge loss to these problems. Resulting of broken or damage equipment if voltage sag exceeds the sensitive threshold of the equipment. Thus, device such as Static Synchronous Compensator (STATCOM) and Dynamic Voltage Restorer (DVR) has been created to solve this problem among users. DVR is a custom power device that most effective and efficient. This paper intended to report the DVR operations during voltage sag compensation.

Modeling and simulation of floating gate nanocrystal FET devices and circuits

NASA Astrophysics Data System (ADS)

Hasaneen, El-Sayed A. M.

The nonvolatile memory market has been growing very fast during the last decade, especially for mobile communication systems. The Semiconductor Industry Association International Technology Roadmap for Semiconductors states that the difficult challenge for nonvolatile semiconductor memories is to achieve reliable, low power, low voltage performance and high-speed write/erase. This can be achieved by aggressive scaling of the nonvolatile memory cells. Unfortunately, scaling down of conventional nonvolatile memory will further degrade the retention time due to the charge loss between the floating gate and drain/source contacts and substrate which makes conventional nonvolatile memory unattractive. Using nanocrystals as charge storage sites reduces dramatically the charge leakage through oxide defects and drain/source contacts. Floating gate nanocrystal nonvolatile memory, FG-NCNVM, is a candidate for future memory because it is advantageous in terms of high-speed write/erase, small size, good scalability, low-voltage, low-power applications, and the capability to store multiple bits per cell. Many studies regarding FG-NCNVMs have been published. Most of them have dealt with fabrication improvements of the devices and device characterizations. Due to the promising FG-NCNVM applications in integrated circuits, there is a need for circuit a simulation model to simulate the electrical characteristics of the floating gate devices. In this thesis, a FG-NCNVM circuit simulation model has been proposed. It is based on the SPICE BSIM simulation model. This model simulates the cell behavior during normal operation. Model validation results have been presented. The SPICE model shows good agreement with experimental results. Current-voltage characteristics, transconductance and unity gain frequency (fT) have been studied showing the effect of the threshold voltage shift (DeltaVth) due to nanocrystal charge on the device characteristics. The threshold voltage shift due to nanocrystal charge has a strong effect on the memory characteristics. Also, the programming operation of the memory cell has been investigated. The tunneling rate from quantum well channel to quantum dot (nanocrystal) gate is calculated. The calculations include various memory parameters, wavefunctions, and energies of quantum well channel and quantum dot gate. The use of floating gate nanocrystal memory as a transistor with a programmable threshold voltage has been demonstrated. The incorporation of FG-NCFETs to design programmable integrated circuit building blocks has been discussed. This includes the design of programmable current and voltage reference circuits. Finally, we demonstrated the design of tunable gain op-amp incorporating FG-NCFETs. Programmable integrated circuit building blocks can be used in intelligent analog and digital systems.

Field-effect transistors as electrically controllable nonlinear rectifiers for the characterization of terahertz pulses

NASA Astrophysics Data System (ADS)

Lisauskas, Alvydas; Ikamas, Kestutis; Massabeau, Sylvain; Bauer, Maris; ČibiraitÄ--, DovilÄ--; Matukas, Jonas; Mangeney, Juliette; Mittendorff, Martin; Winnerl, Stephan; Krozer, Viktor; Roskos, Hartmut G.

2018-05-01

We propose to exploit rectification in field-effect transistors as an electrically controllable higher-order nonlinear phenomenon for the convenient monitoring of the temporal characteristics of THz pulses, for example, by autocorrelation measurements. This option arises because of the existence of a gate-bias-controlled super-linear response at sub-threshold operation conditions when the devices are subjected to THz radiation. We present measurements for different antenna-coupled transistor-based THz detectors (TeraFETs) employing (i) AlGaN/GaN high-electron-mobility and (ii) silicon CMOS field-effect transistors and show that the super-linear behavior in the sub-threshold bias regime is a universal phenomenon to be expected if the amplitude of the high-frequency voltage oscillations exceeds the thermal voltage. The effect is also employed as a tool for the direct determination of the speed of the intrinsic TeraFET response which allows us to avoid limitations set by the read-out circuitry. In particular, we show that the build-up time of the intrinsic rectification signal of a patch-antenna-coupled CMOS detector changes from 20 ps in the deep sub-threshold voltage regime to below 12 ps in the vicinity of the threshold voltage.

Electrical switching in cadmium boracite single crystals

NASA Technical Reports Server (NTRS)

Takahashi, T.; Yamada, O.

1981-01-01

Cadmium boracite single crystals at high temperatures ( 300 C) were found to exhibit a reversible electric field-induced transition between a highly insulative and a conductive state. The switching threshold is smaller than a few volts for an electrode spacing of a few tenth of a millimeter corresponding to an electric field of 100 to 1000 V/cm. This is much smaller than the dielectric break-down field for an insulator such as boracite. The insulative state reappears after voltage removal. A pulse technique revealed two different types of switching. Unstable switching occurs when the pulse voltage slightly exceeds the switching threshold and is characterized by a pre-switching delay and also a residual current after voltage pulse removal. A stable type of switching occurs when the voltage becomes sufficiently high. Possible device applications of this switching phenomenon are discussed.

A FPGA-based Measurement System for Nonvolatile Semiconductor Memory Characterization

NASA Astrophysics Data System (ADS)

Bu, Jiankang; White, Marvin

2002-03-01

Low voltage, long retention, high density SONOS nonvolatile semiconductor memory (NVSM) devices are ideally suited for PCMCIA, FLASH and 'smart' cards. The SONOS memory transistor requires characterization with an accurate, rapid measurement system with minimum disturbance to the device. The FPGA-based measurement system includes three parts: 1) a pattern generator implemented with XILINX FPGAs and corresponding software, 2) a high-speed, constant-current, threshold voltage detection circuit, 3) and a data evaluation program, implemented with a LABVIEW program. Fig. 1 shows the general block diagram of the FPGA-based measurement system. The function generator is designed and simulated with XILINX Foundation Software. Under the control of the specific erase/write/read pulses, the analog detect circuit applies operational modes to the SONOS device under test (DUT) and determines the change of the memory-state of the SONOS nonvolatile memory transistor. The TEK460 digitizes the analog threshold voltage output and sends to the PC computer. The data is filtered and averaged with a LABVIEWTM program running on the PC computer and displayed on the monitor in real time. We have implemented the pattern generator with XILINX FPGAs. Fig. 2 shows the block diagram of the pattern generator. We realized the logic control by a method of state machine design. Fig. 3 shows a small part of the state machine. The flexibility of the FPGAs enhances the capabilities of this system and allows measurement variations without hardware changes. The characterization of the nonvolatile memory transistor device under test (DUT), as function of programming voltage and time, is achieved by a high-speed, constant-current threshold voltage detection circuit. The analog detection circuit incorporating fast analog switches controlled digitally with the FPGAs. The schematic circuit diagram is shown in Fig. 4. The various operational modes for the DUT are realized with control signals applied to the analog switches (SW) as shown in Fig. 5. A LABVIEWTM program, on a PC platform, collects and processes the data. The data is displayed on the monitor in real time. This time-domain filtering reduces the digitizing error. Fig. 6 shows the data processing. SONOS nonvolatile semiconductor memories are characterized by erase/write, retention and endurance measurements. Fig. 7 shows the erase/write characteristics of an n-Channel, 5V prog-rammable SONOS memory transistor. Fig.8 shows the retention characteristic of the same SONOS transistor. We have used this system to characterize SONOS nonvolatile semiconductor memory transistors. The attractive features of the test system design lies in the cost-effectiveness and flexibility of the test pattern implementation, fast read-out of memory state, low power, high precision determination of the device threshold voltage, and perhaps most importantly, minimum disturbance, which is indispensable for nonvolatile memory characterization.

Flexible, ferroelectric nanoparticle doped polymer dispersed liquid crystal devices for lower switching voltage and nanoenergy generation

NASA Astrophysics Data System (ADS)

Nimmy John, V.; Varanakkottu, Subramanyan Namboodiri; Varghese, Soney

2018-06-01

Flexible polymer dispersed liquid crystal (F-PDLC) devices were fabricated using transparent conducting ITO/PET film. Polymerization induced phase separation (PIPS) method was used for pure and ferroelectric BaTiO3 (BTO) and ZnO doped PDLC devices. The distribution of nanoparticles in the PDLC and the formation of micro cavities were studied using field emission scanning electron microscopy (FESEM). It was observed that the addition of ferroelectric BTO nanoparticles has reduced the threshold voltage (Vth) and saturation voltage (Vsat) of FNP-PDLC by 85% and 41% respectively due to the spontaneous polarization of ferroelectric nanoparticles. The ferroelectric properties of BTO and ZnO in the fabricated devices were investigated using dynamic contact electrostatic force microscopy (DC EFM). Flexing the device can generate a potential due to the piezo-tribo electric effect of the ferroelectric nanomaterial doped in the PDLC matrix, which could be utilized as an energy generating system. The switching voltage after multiple flexing was also studied and found to be in par with non-flexing situations.

An “ohmic-first” self-terminating gate-recess technique for normally-off Al2O3/GaN MOSFET

NASA Astrophysics Data System (ADS)

Wang, Hongyue; Wang, Jinyan; Li, Mengjun; He, Yandong; Wang, Maojun; Yu, Min; Wu, Wengang; Zhou, Yang; Dai, Gang

2018-04-01

In this article, an ohmic-first AlGaN/GaN self-terminating gate-recess etching technique was demonstrated where ohmic contact formation is ahead of gate-recess-etching/gate-dielectric-deposition (GRE/GDD) process. The ohmic contact exhibits few degradations after the self-terminating gate-recess process. Besides, when comparing with that using the conventional fabrication process, the fabricated device using the ohmic-first fabrication process shows a better gate dielectric quality in terms of more than 3 orders lower forward gate leakage current, more than twice higher reverse breakdown voltage as well as better stability. Based on this proposed technique, the normally-off Al2O3/GaN MOSFET exhibits a threshold voltage (V th) of ˜1.8 V, a maximum drain current of ˜328 mA/mm, a forward gate leakage current of ˜10-6 A/mm and an off-state breakdown voltage of 218 V at room temperature. Meanwhile, high temperature characteristics of the device was also evaluated and small variations (˜7.6%) of the threshold voltage was confirmed up to 300 °C.

Hot-Electron-Induced Device Degradation during Gate-Induced Drain Leakage Stress

NASA Astrophysics Data System (ADS)

Kim, Kwang-Soo; Han, Chang-Hoon; Lee, Jun-Ki; Kim, Dong-Soo; Kim, Hyong-Joon; Shin, Joong-Shik; Lee, Hea-Beoum; Choi, Byoung-Deog

2012-11-01

We studied the interface state generation and electron trapping by hot electrons under gate-induced drain leakage (GIDL) stress in p-type metal oxide semiconductor field-effect transistors (P-MOSFETs), which are used as the high-voltage core circuit of flash memory devices. When negative voltage was applied to a drain in the off-state, a GIDL current was generated, but when high voltage was applied to the drain, electrons had a high energy. The hot electrons produced the interface state and electron trapping. As a result, the threshold voltage shifted and the off-state leakage current (trap-assisted drain junction leakage current) increased. On the other hand, electron trapping mitigated the energy band bending near the drain and thus suppressed the GIDL current generation.

Accurate analytical modeling of junctionless DG-MOSFET by green's function approach

NASA Astrophysics Data System (ADS)

Nandi, Ashutosh; Pandey, Nilesh

2017-11-01

An accurate analytical model of Junctionless double gate MOSFET (JL-DG-MOSFET) in the subthreshold regime of operation is developed in this work using green's function approach. The approach considers 2-D mixed boundary conditions and multi-zone techniques to provide an exact analytical solution to 2-D Poisson's equation. The Fourier coefficients are calculated correctly to derive the potential equations that are further used to model the channel current and subthreshold slope of the device. The threshold voltage roll-off is computed from parallel shifts of Ids-Vgs curves between the long channel and short-channel devices. It is observed that the green's function approach of solving 2-D Poisson's equation in both oxide and silicon region can accurately predict channel potential, subthreshold current (Isub), threshold voltage (Vt) roll-off and subthreshold slope (SS) of both long & short channel devices designed with different doping concentrations and higher as well as lower tsi/tox ratio. All the analytical model results are verified through comparisons with TCAD Sentaurus simulation results. It is observed that the model matches quite well with TCAD device simulations.

Quasi-Two-Dimensional h-BN/β-Ga2O3 Heterostructure Metal-Insulator-Semiconductor Field-Effect Transistor.

PubMed

Kim, Janghyuk; Mastro, Michael A; Tadjer, Marko J; Kim, Jihyun

2017-06-28

β-gallium oxide (β-Ga 2 O 3 ) and hexagonal boron nitride (h-BN) heterostructure-based quasi-two-dimensional metal-insulator-semiconductor field-effect transistors (MISFETs) were demonstrated by integrating mechanical exfoliation of (quasi)-two-dimensional materials with a dry transfer process, wherein nanothin flakes of β-Ga 2 O 3 and h-BN were utilized as the channel and gate dielectric, respectively, of the MISFET. The h-BN dielectric, which has an extraordinarily flat and clean surface, provides a minimal density of charged impurities on the interface between β-Ga 2 O 3 and h-BN, resulting in superior device performances (maximum transconductance, on/off ratio, subthreshold swing, and threshold voltage) compared to those of the conventional back-gated configurations. Also, double-gating of the fabricated device was demonstrated by biasing both top and bottom gates, achieving the modulation of the threshold voltage. This heterostructured wide-band-gap nanodevice shows a new route toward stable and high-power nanoelectronic devices.

2D modeling based comprehensive analysis of short channel effects in DMG strained VSTB FET

NASA Astrophysics Data System (ADS)

Saha, Priyanka; Banerjee, Pritha; Sarkar, Subir Kumar

2018-06-01

The paper aims to develop two dimensional analytical model of the proposed dual material (DM) Vertical Super Thin Body (VSTB) strained Field Effect Transistor (FET) with focus on its short channel behaviour in nanometer regime. Electrostatic potential across gate/channel and dielectric wall/channel interface is derived by solving 2D Poisson's equation with parabolic approximation method by applying appropriate boundary conditions. Threshold voltage is then calculated by using the criteria of minimum surface potential considering both gate and dielectric wall side potential. Performance analysis of the present structure is demonstrated in terms of potential, electric field, threshold voltage characteristics and subthreshold behaviour by varying various device parameters and applied biases. Effect of application of strain in channel is further explored to establish the superiority of the proposed device in comparison to conventional VSTB FET counterpart. All analytical results are compared with Silvaco ATLAS device simulated data to substantiate the accuracy of our derived model.

In situ preparation, electrical and surface analytical characterization of pentacene thin film transistors

PubMed Central

Lassnig, R.; Striedinger, B.; Hollerer, M.; Fian, A.; Stadlober, B.; Winkler, A.

2015-01-01

The fabrication of organic thin film transistors with highly reproducible characteristics presents a very challenging task. We have prepared and analyzed model pentacene thin film transistors under ultra-high vacuum conditions, employing surface analytical tools and methods. Intentionally contaminating the gold contacts and SiO2 channel area with carbon through repeated adsorption, dissociation, and desorption of pentacene proved to be very advantageous in the creation of devices with stable and reproducible parameters. We mainly focused on the device properties, such as mobility and threshold voltage, as a function of film morphology and preparation temperature. At 300 K, pentacene displays Stranski-Krastanov growth, whereas at 200 K fine-grained, layer-like film growth takes place, which predominantly influences the threshold voltage. Temperature dependent mobility measurements demonstrate good agreement with the established multiple trapping and release model, which in turn indicates a predominant concentration of shallow traps in the crystal grains and at the oxide-semiconductor interface. Mobility and threshold voltage measurements as a function of coverage reveal that up to four full monolayers contribute to the overall charge transport. A significant influence on the effective mobility also stems from the access resistance at the gold contact-semiconductor interface, which is again strongly influenced by the temperature dependent, characteristic film growth mode. PMID:25814770

In situ preparation, electrical and surface analytical characterization of pentacene thin film transistors

NASA Astrophysics Data System (ADS)

Lassnig, R.; Striedinger, B.; Hollerer, M.; Fian, A.; Stadlober, B.; Winkler, A.

2014-09-01

The fabrication of organic thin film transistors with highly reproducible characteristics presents a very challenging task. We have prepared and analyzed model pentacene thin film transistors under ultra-high vacuum conditions, employing surface analytical tools and methods. Intentionally contaminating the gold contacts and SiO2 channel area with carbon through repeated adsorption, dissociation, and desorption of pentacene proved to be very advantageous in the creation of devices with stable and reproducible parameters. We mainly focused on the device properties, such as mobility and threshold voltage, as a function of film morphology and preparation temperature. At 300 K, pentacene displays Stranski-Krastanov growth, whereas at 200 K fine-grained, layer-like film growth takes place, which predominantly influences the threshold voltage. Temperature dependent mobility measurements demonstrate good agreement with the established multiple trapping and release model, which in turn indicates a predominant concentration of shallow traps in the crystal grains and at the oxide-semiconductor interface. Mobility and threshold voltage measurements as a function of coverage reveal that up to four full monolayers contribute to the overall charge transport. A significant influence on the effective mobility also stems from the access resistance at the gold contact-semiconductor interface, which is again strongly influenced by the temperature dependent, characteristic film growth mode.

Optimal Dynamic Sub-Threshold Technique for Extreme Low Power Consumption for VLSI

NASA Technical Reports Server (NTRS)

Duong, Tuan A.

2012-01-01

For miniaturization of electronics systems, power consumption plays a key role in the realm of constraints. Considering the very large scale integration (VLSI) design aspect, as transistor feature size is decreased to 50 nm and below, there is sizable increase in the number of transistors as more functional building blocks are embedded in the same chip. However, the consequent increase in power consumption (dynamic and leakage) will serve as a key constraint to inhibit the advantages of transistor feature size reduction. Power consumption can be reduced by minimizing the voltage supply (for dynamic power consumption) and/or increasing threshold voltage (V(sub th), for reducing leakage power). When the feature size of the transistor is reduced, supply voltage (V(sub dd)) and threshold voltage (V(sub th)) are also reduced accordingly; then, the leakage current becomes a bigger factor of the total power consumption. To maintain low power consumption, operation of electronics at sub-threshold levels can be a potentially strong contender; however, there are two obstacles to be faced: more leakage current per transistor will cause more leakage power consumption, and slow response time when the transistor is operated in weak inversion region. To enable low power consumption and yet obtain high performance, the CMOS (complementary metal oxide semiconductor) transistor as a basic element is viewed and controlled as a four-terminal device: source, drain, gate, and body, as differentiated from the traditional approach with three terminals: i.e., source and body, drain, and gate. This technique features multiple voltage sources to supply the dynamic control, and uses dynamic control to enable low-threshold voltage when the channel (N or P) is active, for speed response enhancement and high threshold voltage, and when the transistor channel (N or P) is inactive, to reduce the leakage current for low-leakage power consumption.

A novel gate and drain engineered charge plasma tunnel field-effect transistor for low sub-threshold swing and ambipolar nature

NASA Astrophysics Data System (ADS)

Yadav, Dharmendra Singh; Raad, Bhagwan Ram; Sharma, Dheeraj

2016-12-01

In this paper, we focus on the improvement of figures of merit for charge plasma based tunnel field-effect transistor (TFET) in terms of ON-state current, threshold voltage, sub-threshold swing, ambipolar nature, and gate to drain capacitance which provides better channel controlling of the device with improved high frequency response at ultra-low supply voltages. Regarding this, we simultaneously employ work function engineering on the drain and gate electrode of the charge plasma TFET. The use of gate work function engineering modulates the barrier on the source/channel interface leads to improvement in the ON-state current, threshold voltage, and sub-threshold swing. Apart from this, for the first time use of work function engineering on the drain electrode increases the tunneling barrier for the flow of holes on the drain/channel interface, it results into suppression of ambipolar behavior. The lowering of gate to drain capacitance therefore enhanced high frequency parameters. Whereas, the presence of dual work functionality at the gate electrode and over the drain region improves the overall performance of the charge plasma based TFET.

Dimensionality effects in chalcogenide-based devices

NASA Astrophysics Data System (ADS)

Kostylev, S. A.

2013-06-01

The multiplicity of fundamental bulk effects with small characteristic dimensions and short times and diversity of their combinations attracts a lot of researcher and industrialist attention in nanoelectronics and photonics to chalcogenide materials. Experimental data presented on dimensional effects of electrical chalcogenide switching (threshold voltage and threshold current dependence on device area and the film thickness), and in phase-change memory (switching, programming and read parameters), are analyzed from the point of view of choice of low dimensional materials with S-NDC and participation of electrical instabilities - high current density filaments. New ways of improving parameters of phase-change devices are proposed together with new criteria of material choice.

2D Quantum Transport Modeling in Nanoscale MOSFETs

NASA Technical Reports Server (NTRS)

Svizhenko, Alexei; Anantram, M. P.; Govindan, T. R.; Biegel, Bryan

2001-01-01

With the onset of quantum confinement in the inversion layer in nanoscale MOSFETs, behavior of the resonant level inevitably determines all device characteristics. While most classical device simulators take quantization into account in some simplified manner, the important details of electrostatics are missing. Our work addresses this shortcoming and provides: (a) a framework to quantitatively explore device physics issues such as the source-drain and gate leakage currents, DIBL, and threshold voltage shift due to quantization, and b) a means of benchmarking quantum corrections to semiclassical models (such as density- gradient and quantum-corrected MEDICI). We have developed physical approximations and computer code capable of realistically simulating 2-D nanoscale transistors, using the non-equilibrium Green's function (NEGF) method. This is the most accurate full quantum model yet applied to 2-D device simulation. Open boundary conditions, oxide tunneling and phase-breaking scattering are treated on equal footing. Electrons in the ellipsoids of the conduction band are treated within the anisotropic effective mass approximation. Quantum simulations are focused on MIT 25, 50 and 90 nm "well- tempered" MOSFETs and compared to classical and quantum corrected models. The important feature of quantum model is smaller slope of Id-Vg curve and consequently higher threshold voltage. These results are quantitatively consistent with I D Schroedinger-Poisson calculations. The effect of gate length on gate-oxide leakage and sub-threshold current has been studied. The shorter gate length device has an order of magnitude smaller current at zero gate bias than the longer gate length device without a significant trade-off in on-current. This should be a device design consideration.

Event-driven charge-coupled device design and applications therefor

NASA Technical Reports Server (NTRS)

Doty, John P. (Inventor); Ricker, Jr., George R. (Inventor); Burke, Barry E. (Inventor); Prigozhin, Gregory Y. (Inventor)

2005-01-01

An event-driven X-ray CCD imager device uses a floating-gate amplifier or other non-destructive readout device to non-destructively sense a charge level in a charge packet associated with a pixel. The output of the floating-gate amplifier is used to identify each pixel that has a charge level above a predetermined threshold. If the charge level is above a predetermined threshold the charge in the triggering charge packet and in the charge packets from neighboring pixels need to be measured accurately. A charge delay register is included in the event-driven X-ray CCD imager device to enable recovery of the charge packets from neighboring pixels for accurate measurement. When a charge packet reaches the end of the charge delay register, control logic either dumps the charge packet, or steers the charge packet to a charge FIFO to preserve it if the charge packet is determined to be a packet that needs accurate measurement. A floating-diffusion amplifier or other low-noise output stage device, which converts charge level to a voltage level with high precision, provides final measurement of the charge packets. The voltage level is eventually digitized by a high linearity ADC.

Ultralow power complementary inverter circuits using axially doped p- and n-channel Si nanowire field effect transistors.

PubMed

Van, Ngoc Huynh; Lee, Jae-Hyun; Whang, Dongmok; Kang, Dae Joon

2016-06-09

We have successfully synthesized axially doped p- and n-type regions on a single Si nanowire (NW). Diodes and complementary metal-oxide-semiconductor (CMOS) inverter devices using single axial p- and n-channel Si NW field-effect transistors (FETs) were fabricated. We show that the threshold voltages of both p- and n-channel Si NW FETs can be lowered to nearly zero by effectively controlling the doping concentration. Because of the high performance of the p- and n-type Si NW channel FETs, especially with regard to the low threshold voltage, the fabricated NW CMOS inverters have a low operating voltage (<3 V) while maintaining a high voltage gain (∼6) and ultralow static power dissipation (≤0.3 pW) at an input voltage of ±3 V. This result offers a viable way for the fabrication of a high-performance high-density logic circuit using a low-temperature fabrication process, which makes it suitable for flexible electronics.

Bulk heterojunction polymer memory devices with reduced graphene oxide as electrodes.

PubMed

Liu, Juqing; Yin, Zongyou; Cao, Xiehong; Zhao, Fei; Lin, Anping; Xie, Linghai; Fan, Quli; Boey, Freddy; Zhang, Hua; Huang, Wei

2010-07-27

A unique device structure with a configuration of reduced graphene oxide (rGO) /P3HT:PCBM/Al has been designed for the polymer nonvolatile memory device. The current-voltage (I-V) characteristics of the fabricated device showed the electrical bistability with a write-once-read-many-times (WORM) memory effect. The memory device exhibits a high ON/OFF ratio (10(4)-10(5)) and low switching threshold voltage (0.5-1.2 V), which are dependent on the sheet resistance of rGO electrode. Our experimental results confirm that the carrier transport mechanisms in the OFF and ON states are dominated by the thermionic emission current and ohmic current, respectively. The polarization of PCBM domains and the localized internal electrical field formed among the adjacent domains are proposed to explain the electrical transition of the memory device.

Effects of trap-assisted tunneling on gate-induced drain leakage in silicon-germanium channel p-type FET for scaled supply voltages

NASA Astrophysics Data System (ADS)

Tiwari, Vishal A.; Divakaruni, Rama; Hook, Terence B.; Nair, Deleep R.

2016-04-01

Silicon-germanium is considered as an alternative channel material to silicon p-type FET (pFET) for the development of energy efficient high performance transistors for 28 nm and beyond in a high-k metal gate technology because of its lower threshold voltage and higher mobility. However, gate-induced drain leakage (GIDL) is a concern for high threshold voltage device design because of tunneling at reduced bandgap. In this work, the trap-assisted tunneling and band-to-band tunneling (BTBT) effects on GIDL is analyzed and modeled for SiGe pFETs. Experimental results and Monte Carlo simulation results reveal that the pre-halo germanium pre-amorphization implant used to contain the short channel effects contribute to GIDL at the drain sidewall in addition to GIDL due to BTBT in SiGe devices. The results are validated by comparing the experimental observations with the numerical simulation and a set of calibrated models are used to describe the GIDL mechanisms for various drain and gate bias.

Mobility overestimation due to gated contacts in organic field-effect transistors

PubMed Central

Bittle, Emily G.; Basham, James I.; Jackson, Thomas N.; Jurchescu, Oana D.; Gundlach, David J.

2016-01-01

Parameters used to describe the electrical properties of organic field-effect transistors, such as mobility and threshold voltage, are commonly extracted from measured current–voltage characteristics and interpreted by using the classical metal oxide–semiconductor field-effect transistor model. However, in recent reports of devices with ultra-high mobility (>40 cm2 V−1 s−1), the device characteristics deviate from this idealized model and show an abrupt turn-on in the drain current when measured as a function of gate voltage. In order to investigate this phenomenon, here we report on single crystal rubrene transistors intentionally fabricated to exhibit an abrupt turn-on. We disentangle the channel properties from the contact resistance by using impedance spectroscopy and show that the current in such devices is governed by a gate bias dependence of the contact resistance. As a result, extracted mobility values from d.c. current–voltage characterization are overestimated by one order of magnitude or more. PMID:26961271

Ionizing radiation detector

DOEpatents

Thacker, Louis H.

1990-01-01

An ionizing radiation detector is provided which is based on the principle of analog electronic integration of radiation sensor currents in the sub-pico to nano ampere range between fixed voltage switching thresholds with automatic voltage reversal each time the appropriate threshold is reached. The thresholds are provided by a first NAND gate Schmitt trigger which is coupled with a second NAND gate Schmitt trigger operating in an alternate switching state from the first gate to turn either a visible or audible indicating device on and off in response to the gate switching rate which is indicative of the level of radiation being sensed. The detector can be configured as a small, personal radiation dosimeter which is simple to operate and responsive over a dynamic range of at least 0.01 to 1000 R/hr.

DETECTORS AND EXPERIMENTAL METHODS: Equivalent properties of single event burnout induced by different sources

NASA Astrophysics Data System (ADS)

Yang, Shi-Yu; Cao, Zhou; Da, Dao-An; Xue, Yu-Xiong

2009-05-01

The experimental results of single event burnout induced by heavy ions and 252Cf fission fragments in power MOSFET devices have been investigated. It is concluded that the characteristics of single event burnout induced by 252Cf fission fragments is consistent to that in heavy ions. The power MOSFET in the “turn-off" state is more susceptible to single event burnout than it is in the “turn-on" state. The thresholds of the drain-source voltage for single event burnout induced by 173 MeV bromine ions and 252Cf fission fragments are close to each other, and the burnout cross section is sensitive to variation of the drain-source voltage above the threshold of single event burnout. In addition, the current waveforms of single event burnouts induced by different sources are similar. Different power MOSFET devices may have different probabilities for the occurrence of single event burnout.

Droplet Velocity Measurement Based on Dielectric Layer Thickness Variation Using Digital Microfluidic Devices.

PubMed

Zulkepli, Siti Noor Idora Syafinaz; Hamid, Nor Hisham; Shukla, Vineeta

2018-05-08

In recent years, the number of interdisciplinary research works related to the development of miniaturized systems with integrated chemical and biological analyses is increasing. Digital microfluidic biochips (DMFBs) are one kind of miniaturized systems designed for conducting inexpensive, fast, convenient and reliable biochemical assay procedures focusing on basic scientific research and medical diagnostics. The role of a dielectric layer in the digital microfluidic biochips is prominent as it helps in actuating microliter droplets based on the electrowetting-on-dielectric (EWOD) technique. The advantages of using three different material layers of dielectric such as parafilm, polytetrafluoroethylene (PTFE) and ethylene tetrafluoroethylene (ETFE) were reported in the current work. A simple fabrication process of a digital microfluidic device was performed and good results were obtained. The threshold of the actuation voltage was determined for all dielectric materials of varying thicknesses. Additionally, the OpenDrop device was tested by utilizing a single-plate system to transport microliter droplets for a bioassay operation. With the newly proposed fabrication methods, these dielectric materials showed changes in contact angle and droplet velocity when the actuation voltage was applied. The threshold actuation voltage for the dielectric layers of 10⁻13 μm was 190 V for the open plate DMFBs.

Computer analysis of the negative differential resistance switching phenomenon of double-injection devices

NASA Technical Reports Server (NTRS)

Shieh, Tsay-Jiu

1989-01-01

By directly solving the semiconductor differential equations for the double-injection (DI) devices involving two interacting deep levels, the authors studied the negative differential resistance switching characteristic and its relationship with the device dimension, doping level, and dependence on the deep impurity profile. Computer simulation showed that although one can increase the threshold voltage by increasing the device length, the excessive holding voltage that would follow would put this device in a very limited application such as pulse power source. The excessive leakage current in the low conductance state also jeopardizes the attempt to use the device for any practical purpose. Unless there are new materials and deep impurities found that have a great differential hole and electron capture cross sections and a reasonable energy bandgap for low intrinsic carrier concentration, no big improvement in the fate of DI devices is expected in the near future.

Precision Voltage Referencing Techniques in MOS Technology.

NASA Astrophysics Data System (ADS)

Song, Bang-Sup

With the increasing complexity of functions on a single MOS chip, precision analog cicuits implemented in the same technology are in great demand so as to be integrated together with digital circuits. The future development of MOS data acquisition systems will require precision on-chip MOS voltage references. This dissertation will probe two most promising configurations of on-chip voltage references both in NMOS and CMOS technologies. In NMOS, an ion-implantation effect on the temperature behavior of MOS devices is investigated to identify the fundamental limiting factors of a threshold voltage difference as an NMOS voltage source. For this kind of voltage reference, the temperature stability on the order of 20ppm/(DEGREES)C is achievable with a shallow single-threshold implant and a low-current, high-body bias operation. In CMOS, a monolithic prototype bandgap reference is designed, fabricated and tested which embodies a curvature compensation and exhibits a minimized sensitivity to the process parameter variation. Experimental results imply that an average temperature stability on the order of 10ppm/(DEGREES)C with a production spread of less than 10ppm/(DEGREES)C feasible over the commercial temperature range.

Total Ionizing Dose Effects in MOS Oxides and Devices

NASA Technical Reports Server (NTRS)

Oldham, Timothy R.; McLean, F. B.

2003-01-01

The development of military and space electronics technology has traditionally been heavily influenced by the commercial semiconductor industry. The development of MOS technology, and particularly CMOS technology, as dominant commercial technologies has occurred entirely within the lifetime of the NSREC. For this reason, it is not surprising that the study of radiation interactions with MOS materials, devices and circuits has been a major theme of this conference for most of its history. The basic radiation problem in a MOS transistor is illustrated. The application of an appropriate gate voltage causes a conducting channel to form between the source and drain, so that current flows when the device is turned on. In Fig. lb, the effect of ionizing radiation is illustrated. Radiation-induced trapped charge has built up in the gate oxide, which causes a shift in the threshold voltage (that is, a change in the voltage which must be applied to turn the device on). If this shift is large enough, the device cannot be turned off, even at zero volts applied, and the device is said to have failed by going depletion mode.

Analysis of proton irradiated n- and p-type strained FinFETs at low temperatures down to 100 K

NASA Astrophysics Data System (ADS)

Vicentis Caparroz, Luis Felipe; Mendes Bordallo, Caio Cesar; Martino, Joao Antonio; Simoen, Eddy; Claeys, Cor; Ghedini Der Agopian, Paula

2018-06-01

This paper studies the main low temperature electrical parameters of SOI n- and p-type FinFETs, standard and strained devices, submitted to proton irradiation. The study covers the range from room temperature down to 100 K, focusing on the threshold voltage (VTH), subthreshold swing (SS), the Early voltage VEA, transistor efficiency and the intrinsic gain voltage (AV) for 3 different channel widths. The p-channel devices showed a greater immunity to radiation than the n-channel ones, when considering the basic parameters thanks to the back conduction turn-off tendency, while from the analog parameters point of view, both transistor types presented a similar response to proton radiation at strong inversion.

Single-event upset in highly scaled commercial silicon-on-insulator PowerPc microprocessors

NASA Technical Reports Server (NTRS)

Irom, Farokh; Farmanesh, Farhad H.

2004-01-01

Single event upset effects from heavy ions are measured for Motorola and IBM silicon-on-insulator (SOI) microprocessors with different feature sizes, and core voltages. The results are compared with results for similar devices with build substrates. The cross sections of the SOI processors are lower than their bulk counterparts, but the threshold is about the same, even though the charge collections depth is more than an order of magnitude smaller in the SOI devices. The scaling of the cross section with reduction of feature size and core voltage dependence for SOI microprocessors discussed.

Low-voltage organic thin film transistors (OTFTs) using crosslinked polyvinyl alcohol (PVA)/neodymium oxide (Nd2O3) bilayer gate dielectrics

NASA Astrophysics Data System (ADS)

Khound, Sagarika; Sarma, Ranjit

2018-01-01

We have reported here on the design, processing and dielectric properties of pentacene-based organic thin film transitors (OTFTs) with a bilayer gate dilectrics of crosslinked PVA/Nd2O3 which enables low-voltage organic thin film operations. The dielectric characteristics of PVA/Nd2O3 bilayer films are studied by capacitance-voltage ( C- V) and current-voltage ( I- V) curves in the metal-insulator-metal (MIM) structure. We have analysed the output electrical responses and transfer characteristics of the OTFT devices to determine their performance of OTFT parameters. The mobility of 0.94 cm2/Vs, the threshold voltage of - 2.8 V, the current on-off ratio of 6.2 × 105, the subthreshold slope of 0.61 V/decade are evaluated. Low leakage current of the device is observed from current density-electric field ( J- E) curve. The structure and the morphology of the device are studied using X-ray diffraction (XRD) and atomic force microscope (AFM), respectively. The study demonstrates an effective way to realize low-voltage, high-performance OTFTs at low cost.

An extensive investigation of work function modulated trapezoidal recessed channel MOSFET

NASA Astrophysics Data System (ADS)

Lenka, Annada Shankar; Mishra, Sikha; Mishra, Satyaranjan; Bhanja, Urmila; Mishra, Guru Prasad

2017-11-01

The concept of silicon on insulator (SOI) and grooved gate help to lessen the short channel effects (SCEs). Again the work function modulation along the metal gate gives a better drain current due to the uniform electric field along the channel. So all these concepts are combined and used in the proposed MOSFET structure for more improved performance. In this work, trapezoidal recessed channel silicon on insulator (TRC-SOI) MOSFET and work function modulated trapezoidal recessed channel silicon on insulator (WFM-TRC-SOI) MOSFET are compared with DC and RF parameters and later linearity of both the devices is tested. An analytical model is formulated by using a 2-D Poisson's equation and develops a compact equation for threshold voltage using minimum surface potential. In this work we analyze the effect of negative junction depth and the corner angle on various device parameters such as minimum surface potential, sub-threshold slope (SS), drain induced barrier lowering (DIBL) and threshold voltage. The analysis interprets that the switching performance of WFM-TRC-SOI MOSFET surpasses TRC-SOI MOSFET in terms of high Ion/Ioff ratio and also the proposed structure can minimize the short channel effects (SCEs) in RF application. The validity of proposed model has been verified with simulation result performed on Sentaurus TCAD device simulator.

The use of hydrogenous material for sensitizing pMOS dosimeters to neutrons

NASA Astrophysics Data System (ADS)

Kronenberg, S.; Brucker, G. J.

1995-02-01

This paper is concerned with the application of pMOS dosimeters to measuring neutron dose by the use of hydrogenous materials to convert incident neutron flux to recoil protons. These latter charged particles can generate electron-hole pairs, and consequently, charge trapping takes place at the MOS interfaces, and threshold voltage shifts are produced. The use of pMOS devices for measuring gamma doses has been described extensively in the literature. Clearly, if measurable voltage shifts could be generated in a MOS device by neutrons, then a radiation detection instrument containing two MOS devices, back to back, with hydrogenous shields, and one MOS dosimeter without a converter would allow 4/spl pi/ measurements of neutron and gamma doses to be made. The results obtained in this study indicate that paraffin or polyethylene will convert incident, 2.82 MeV neutrons to recoil protons, which subsequently cause measurable voltage shifts.

Recent advances of high voltage AlGaN/GaN power HFETs

NASA Astrophysics Data System (ADS)

Uemoto, Yasuhiro; Ueda, Tetsuzo; Tanaka, Tsuyoshi; Ueda, Daisuke

2009-02-01

We review our recent advances of GaN-based high voltage power transistors. These are promising owing to low on-state resistance and high breakdown voltage taking advantages of superior material properties. However, there still remain a couple of technical issues to be solved for the GaN devices to replace the existing Si-based power devices. The most critical issue is to achieve normally-off operation which is strongly desired for the safety operation, however, it has been very difficult because of the built-in polarization electric field. Our new device called GIT (Gate Injection Transistor) utilizing conductivity modulation successfully achieves the normally-off operation keeping low on-state resistance. The fabricated GIT on a Si substrate exhibits threshold voltage of +1.0V. The obtained on-state resistance and off-state breakdown voltage were 2.6mΩ•cm2 and 800V, respectively. Remaining technical issue is to further increase the breakdown voltage. So far, the reported highest off-state breakdown voltage of AlGaN/GaN HFETs has been 1900V. Overcoming these issues by a novel device structure, we have demonstrated the world highest breakdown voltages of 10400V using thick poly-crystalline AlN as a passivation film and Via-holes through sapphire which enable very efficient layout of the lateral HFET array avoiding any undesired breakdown of passivation films. Since conventional wet or dry etching cannot be used for chemically stable sapphire, high power pulsed laser is used to form the via-holes. The presented GaN power devices demonstrate that GaN is advantageous for high voltage power switching applications replacing currently used Si-based power MOSFETs and IGBTs.

Hierarchical Approach to 'Atomistic' 3-D MOSFET Simulation

NASA Technical Reports Server (NTRS)

Asenov, Asen; Brown, Andrew R.; Davies, John H.; Saini, Subhash

1999-01-01

We present a hierarchical approach to the 'atomistic' simulation of aggressively scaled sub-0.1 micron MOSFET's. These devices are so small that their characteristics depend on the precise location of dopant atoms within them, not just on their average density. A full-scale three-dimensional drift-diffusion atomistic simulation approach is first described and used to verify more economical, but restricted, options. To reduce processor time and memory requirements at high drain voltage, we have developed a self-consistent option based on a solution of the current continuity equation restricted to a thin slab of the channel. This is coupled to the solution of the Poisson equation in the whole simulation domain in the Gummel iteration cycles. The accuracy of this approach is investigated in comparison to the full self-consistent solution. At low drain voltage, a single solution of the nonlinear Poisson equation is sufficient to extract the current with satisfactory accuracy. In this case, the current is calculated by solving the current continuity equation in a drift approximation only, also in a thin slab containing the MOSFET channel. The regions of applicability for the different components of this hierarchical approach are illustrated in example simulations covering the random dopant-induced threshold voltage fluctuations, threshold voltage lowering, threshold voltage asymmetry, and drain current fluctuations.

Specifics of Pulsed Arc Welding Power Supply Performance Based On A Transistor Switch

NASA Astrophysics Data System (ADS)

Krampit, N. Yu; Kust, T. S.; Krampit, M. A.

2016-08-01

Specifics of designing a pulsed arc welding power supply device are presented in the paper. Electronic components for managing large current was analyzed. Strengths and shortcomings of power supply circuits based on thyristor, bipolar transistor and MOSFET are outlined. As a base unit for pulsed arc welding was chosen MOSFET transistor, which is easy to manage. Measures to protect a transistor are given. As for the transistor control device is a microcontroller Arduino which has a low cost and adequate performance of the work. Bead transfer principle is to change the voltage on the arc in the formation of beads on the wire end. Microcontroller controls transistor when the arc voltage reaches the threshold voltage. Thus there is a separation and transfer of beads without splashing. Control strategies tested on a real device and presented. The error in the operation of the device is less than 25 us, it can be used controlling drop transfer at high frequencies (up to 1300 Hz).

Photon detector system

DOEpatents

Ekstrom, Philip A.

1981-01-01

A photon detector includes a semiconductor device, such as a Schottky barrier diode, which has an avalanche breakdown characteristic. The diode is cooled to cryogenic temperatures to eliminate thermally generated charge carriers from the device. The diode is then biased to a voltage level exceeding the avalanche breakdown threshold level such that, upon receipt of a photon, avalanche breakdown occurs. This breakdown is detected by appropriate circuitry which thereafter reduces the diode bias potential to a level below the avalanche breakdown threshold level to terminate the avalanche condition. Subsequently, the bias potential is reapplied to the diode in preparation for detection of a subsequently received photon.

An Evaluation of Flash Cells Used in Critical Applications

NASA Technical Reports Server (NTRS)

Katz, Rich; Flowers, David; Bergevin, Keith

2016-01-01

Due to the common use of Flash technology in many commercial and industrial Programmable Logic Devices (PLDs) such as FPGAs and mixed-signal microcontrollers, flash technology is being utilized in fuzed munition applications. This presents a long-term reliability issue for both DoD and NASA safety- and mission-critical applications. A thorough understanding of the data retention failure modes and statistics associated with Flash data retention is of vital concern to the fuze safety community. A key retention parameter for a flash cell is the threshold voltage (VTH), which is an indirect indicator of the amount of charge stored on the cells floating gate. Initial test results based on a study of charge loss in flash cells in an FPGA device is presented. Statistical data taken from a small sample set indicates quantifiable charge loss for devices stored at both room temperature and 150 C. Initial evaluation of the distribution of threshold voltage in a large sample set (800 devices) is presented. The magnitude of charge loss from exposure to electrostatic discharge and electromagnetic fields is measured and presented. Simulated data (and measured data as available) resultant from harsh-environment testing (neutron, heavy ion, EMP) is presented.

Driving Method for Compensating Reliability Problem of Hydrogenated Amorphous Silicon Thin Film Transistors and Image Sticking Phenomenon in Active Matrix Organic Light-Emitting Diode Displays

NASA Astrophysics Data System (ADS)

Shin, Min-Seok; Jo, Yun-Rae; Kwon, Oh-Kyong

2011-03-01

In this paper, we propose a driving method for compensating the electrical instability of hydrogenated amorphous silicon (a-Si:H) thin film transistors (TFTs) and the luminance degradation of organic light-emitting diode (OLED) devices for large active matrix OLED (AMOLED) displays. The proposed driving method senses the electrical characteristics of a-Si:H TFTs and OLEDs using current integrators and compensates them by an external compensation method. Threshold voltage shift is controlled a using negative bias voltage. After applying the proposed driving method, the measured error of the maximum emission current ranges from -1.23 to +1.59 least significant bit (LSB) of a 10-bit gray scale under the threshold voltage shift ranging from -0.16 to 0.17 V.

Performance improvement of doped TFET by using plasma formation concept

NASA Astrophysics Data System (ADS)

Soni, Deepak; Sharma, Dheeraj; Yadav, Shivendra; Aslam, Mohd.; Sharma, Neeraj

2018-01-01

Formation of abrupt doping profile at tunneling junction for the nanoscale tunnel field effect transistor (TFET) is a critical issue for attaining improved electrical behaviour. The realization of abrupt doping profile is more difficult in the case of physically doped TFETs due to material solubility limit. In this concern, we propose a novel design of TFET. For this, P+ (source)-I (channel)-N (drain) type structure has been considered, wherein a metal electrode is deposited over the source region. In addition to this, a negative voltage is applied to the source electrode (SE). It induces the surface plasma layer of holes in the source region, which is responsible for steepness in the bands at source/channel junction and provides the advantage of higher doping in source region without any addition of the physical impurity. The proposed modification is helpful for achieving steeper band bending at the source/channel interface, which enables higher tunneling generation rate of charge carriers at this interface and overcomes the issue of low ON-state current. Thus, the proposed device shows the increment of 2 decades in drain current and 252 mV reduction in threshold voltage compared with conventional device. The optimization of spacer length (LSG) between source/gate (LSG) and applied negative voltage (Vpg) over source electrode have been performed to obtain optimum drain current and threshold voltage (Vth). Further, for the suppression of ambipolar current, drain region is kept lightly doped, which reduces the ambipolar current up to level of Off state current. Moreover, in the proposed device gate electrode is underlapped for improving RF performance. It also reduces gate to drain capacitances (Cgd) and increases cut-off-frequency (fT), fmax, GBP, TFP. In addition to these, linearity analysis has been performed to validate the applicability of the device.

Investigation of Short Channel Effects on Device Performance for 60nm NMOS Transistor

NASA Astrophysics Data System (ADS)

Chinnappan, U.; Sanudin, R.

2017-08-01

In the aggressively scaled complementary metal oxide semiconductor (CMOS) devices, shallower p-n junctions and low sheet resistances are essential for short-channel effect (SCE) control and high device performance. The SCE are attributed to two physical phenomena that are the limitation imposed on electron drift characteristics in channel and the modification of the threshold voltage (Vth) due to the shortening channel length. The decrement of Vth with decrement in gate length is a well-known attribute in SCE known as “threshold voltage roll-off’. In this research, the Technology Computer Aided Design (TCAD) was used to model the SCE phenomenon effect on 60nm n-type metal oxide semiconductor (NMOS) transistor. There are three parameters being investigated, which are the oxide thickness (Tox), gate length (L), acceptor concentration (Na). The simulation data were used to visualise the effect of SCE on the 60nm NMOS transistor. Simulation data suggest that all three parameters have significant effect on Vth, and hence on the transistor performance. It is concluded that there is a trade-off among these three parameters to obtain an optimized transistor performance.

Measuring Input Thresholds on an Existing Board

NASA Technical Reports Server (NTRS)

Kuperman, Igor; Gutrich, Daniel G.; Berkun, Andrew C.

2011-01-01

A critical PECL (positive emitter-coupled logic) interface to Xilinx interface needed to be changed on an existing flight board. The new Xilinx input interface used a CMOS (complementary metal-oxide semiconductor) type of input, and the driver could meet its thresholds typically, but not in worst-case, according to the data sheet. The previous interface had been based on comparison with an external reference, but the CMOS input is based on comparison with an internal divider from the power supply. A way to measure what the exact input threshold was for this device for 64 inputs on a flight board was needed. The measurement technique allowed an accurate measurement of the voltage required to switch a Xilinx input from high to low for each of the 64 lines, while only probing two of them. Directly driving an external voltage was considered too risky, and tests done on any other unit could not be used to qualify the flight board. The two lines directly probed gave an absolute voltage threshold calibration, while data collected on the remaining 62 lines without probing gave relative measurements that could be used to identify any outliers. The PECL interface was forced to a long-period square wave by driving a saturated square wave into the ADC (analog to digital converter). The active pull-down circuit was turned off, causing each line to rise rapidly and fall slowly according to the input s weak pull-down circuitry. The fall time shows up as a change in the pulse width of the signal ready by the Xilinx. This change in pulse width is a function of capacitance, pulldown current, and input threshold. Capacitance was known from the different trace lengths, plus a gate input capacitance, which is the same for all inputs. The pull-down current is the same for all inputs including the two that are probed directly. The data was combined, and the Excel solver tool was used to find input thresholds for the 62 lines. This was repeated over different supply voltages and temperatures to show that the interface had voltage margin under all worst case conditions. Gate input thresholds are normally measured at the manufacturer when the device is on a chip tester. A key function of this machine was duplicated on an existing flight board with no modifications to the nets to be tested, with the exception of changes in the FPGA program.

Threshold flux-controlled memristor model and its equivalent circuit implementation

NASA Astrophysics Data System (ADS)

Wu, Hua-Gan; Bao, Bo-Cheng; Chen, Mo

2014-11-01

Modeling a memristor is an effective way to explore the memristor properties due to the fact that the memristor devices are still not commercially available for common researchers. In this paper, a physical memristive device is assumed to exist whose ionic drift direction is perpendicular to the direction of the applied voltage, upon which, corresponding to the HP charge-controlled memristor model, a novel threshold flux-controlled memristor model with a window function is proposed. The fingerprints of the proposed model are analyzed. Especially, a practical equivalent circuit of the proposed model is realized, from which the corresponding experimental fingerprints are captured. The equivalent circuit of the threshold memristor model is appropriate for various memristors based breadboard experiments.

The effect of doping Sb on the electronic structure and the device characteristics of Ovonic Threshold Switches based on Ge-Se.

PubMed

Shin, Sang-Yeol; Choi, J M; Seo, Juhee; Ahn, Hyung-Woo; Choi, Yong Gyu; Cheong, Byung-ki; Lee, Suyoun

2014-11-18

The Ovonic Threshold Switch (OTS) based on an amorphous chalcogenide material has attracted much interest as a promising candidate for a high-performance thin-film switching device enabling 3D-stacking of memory devices. In this work, we studied on the electronic structure of amorphous Sb-doped Ge(0.6)Se(0.4) (in atomic mole fraction) film and its characteristics as to OTS devices. From the optical absorption spectroscopy measurement, the band gap (Eg) was found to decrease with increasing Sb content. In addition, as Sb content increased, the activation energy (Ea) for electrical conduction was found to decrease down to about one third of Eg from a half. As to the device characteristics, we found that the threshold switching voltage (Vth) drastically decreased with the Sb content. These results, being accountable in terms of the changes in the bonding configuration of constituent atoms as well as in the electronic structure such as the energy gap and trap states, advance an effective method of compositional adjustment to modulate Vth of an OTS device for various applications.

Highly Stable, Dual-Gated MoS2 Transistors Encapsulated by Hexagonal Boron Nitride with Gate-Controllable Contact, Resistance, and Threshold Voltage.

PubMed

Lee, Gwan-Hyoung; Cui, Xu; Kim, Young Duck; Arefe, Ghidewon; Zhang, Xian; Lee, Chul-Ho; Ye, Fan; Watanabe, Kenji; Taniguchi, Takashi; Kim, Philip; Hone, James

2015-07-28

Emerging two-dimensional (2D) semiconductors such as molybdenum disulfide (MoS2) have been intensively studied because of their novel properties for advanced electronics and optoelectronics. However, 2D materials are by nature sensitive to environmental influences, such as temperature, humidity, adsorbates, and trapped charges in neighboring dielectrics. Therefore, it is crucial to develop device architectures that provide both high performance and long-term stability. Here we report high performance of dual-gated van der Waals (vdW) heterostructure devices in which MoS2 layers are fully encapsulated by hexagonal boron nitride (hBN) and contacts are formed using graphene. The hBN-encapsulation provides excellent protection from environmental factors, resulting in highly stable device performance, even at elevated temperatures. Our measurements also reveal high-quality electrical contacts and reduced hysteresis, leading to high two-terminal carrier mobility (33-151 cm(2) V(-1) s(-1)) and low subthreshold swing (80 mV/dec) at room temperature. Furthermore, adjustment of graphene Fermi level and use of dual gates enable us to separately control contact resistance and threshold voltage. This novel vdW heterostructure device opens up a new way toward fabrication of stable, high-performance devices based on 2D materials.

The Rated Voltage Determination of DC Building Power Supply System Considering Human Beings Safety

NASA Astrophysics Data System (ADS)

Wang, Zhicheng; Yu, Kansheng; Xie, Guoqiang; Zou, Jin

2018-01-01

Generally two-level voltages are adopted for DC building power supply system. From the point of view of human beings safety, only the lower level voltage which may be contacted barehanded is discussed in this paper based on the related safety thresholds of human beings current effect. For several voltage levels below 100V recommended by IEC, the body current and current density of human electric shock under device normal work condition, as well as effect of unidirectional single impulse currents of short durations are calculated and analyzed respectively. Finally, DC 60V is recommended as the lower level rating voltage through the comprehensive consideration of technical condition and cost of safety criteria.

Engineering the switching dynamics of TiOx-based RRAM with Al doping

NASA Astrophysics Data System (ADS)

Trapatseli, Maria; Khiat, Ali; Cortese, Simone; Serb, Alexantrou; Carta, Daniela; Prodromakis, Themistoklis

2016-07-01

Titanium oxide (TiOx) has attracted a lot of attention as an active material for resistive random access memory (RRAM), due to its versatility and variety of possible crystal phases. Although existing RRAM materials have demonstrated impressive characteristics, like ultra-fast switching and high cycling endurance, this technology still encounters challenges like low yields, large variability of switching characteristics, and ultimately device failure. Electroforming has been often considered responsible for introducing irreversible damage to devices, with high switching voltages contributing to device degradation. In this paper, we have employed Al doping for tuning the resistive switching characteristics of titanium oxide RRAM. The resistive switching threshold voltages of undoped and Al-doped TiOx thin films were first assessed by conductive atomic force microscopy. The thin films were then transferred in RRAM devices and tested with voltage pulse sweeping, demonstrating that the Al-doped devices could on average form at lower potentials compared to the undoped ones and could support both analog and binary switching at potentials as low as 0.9 V. This work demonstrates a potential pathway for implementing low-power RRAM systems.

Ground potential rise monitor

DOEpatents

Allen, Zachery W [Mandan, ND; Zevenbergen, Gary A [Arvada, CO

2012-04-03

A device and method for detecting ground potential rise (GPR) comprising positioning a first electrode and a second electrode at a distance from each other into the earth. The voltage of the first electrode and second electrode is attenuated by an attenuation factor creating an attenuated voltage. The true RMS voltage of the attenuated voltage is determined creating an attenuated true RMS voltage. The attenuated true RMS voltage is then multiplied by the attenuation factor creating a calculated true RMS voltage. If the calculated true RMS voltage is greater than a first predetermined voltage threshold, a first alarm is enabled at a local location. If user input is received at a remote location acknowledging the first alarm, a first alarm acknowledgment signal is transmitted. The first alarm acknowledgment signal is then received at which time the first alarm is disabled.

On the Mechanisms of Formation of Memory Channels and Development of Negative Differential Resistance in Solid Solutions of the TlInTe2-TlYbTe2 System

NASA Astrophysics Data System (ADS)

Akhmedova, A. M.

2018-04-01

The behavior of an electronic subsystem is investigated in the course of formation and development of a memory channel in solid solutions of the TlInTe2-TlYbTe2 system. An analysis of the current-voltage characteristics allows getting an insight into the reason for a sharp change in electrical conductance of the specimens under study during their transition from the high-resistance to high-conductance state and the reasons for the well known instability of threshold converters, which makes it possible to design devices with high threshold voltage stability.

Stable indium oxide thin-film transistors with fast threshold voltage recovery

NASA Astrophysics Data System (ADS)

Vygranenko, Yuriy; Wang, Kai; Nathan, Arokia

2007-12-01

Stable thin-film transistors (TFTs) with semiconducting indium oxide channel and silicon dioxide gate dielectric were fabricated by reactive ion beam assisted evaporation and plasma-enhanced chemical vapor deposition. The field-effect mobility is 3.3cm2/Vs, along with an on/off current ratio of 106, and subthreshold slope of 0.5V/decade. When subject to long-term gate bias stress, the TFTs show fast recovery of the threshold voltage (VT) when relaxed without annealing, suggesting that charge trapping at the interface and/or in the bulk gate dielectric to be the dominant mechanism underlying VT instability. Device performance and stability make indium oxide TFTs promising for display applications.

Monolithically integrated two-dimensional arrays of optoelectronic threshold devices for neural network applications

NASA Technical Reports Server (NTRS)

Kim, J. H.; Katz, J.; Lin, S. H.; Psaltis, D.

1989-01-01

A monolithic 10 x 10 two-dimensional array of 'optical neuron' optoelectronic threshold elements for neural network applications has been designed, fabricated, and tested. Overall array dimensions are 5 x 5 mm, while the individual neurons, composed of an LED that is driven by a double-heterojunction bipolar transistor, are 250 x 250 microns. The overall integrated structure exhibited semiconductor-controlled rectifier characteristics, with a breakover voltage of 75 V and a reverse-breakdown voltage of 60 V; this is attributable to the parasitic p-n-p transistor which exists as a result of the sharing of the same n-AlGaAs collector between the transistors and the LED.

Addressable inverter matrix for process and device characterization

NASA Technical Reports Server (NTRS)

Buehler, M. G.; Sayah, H. R.

1985-01-01

The addressable inverter matrix consists of 222 inverters each accessible with the aid of a shift register. The structure has proven useful in characterizing the variability of inverter transfer curves and in diagnosing processing faults. For good 3-micron CMOS bulk inverters investigated, the percent standard deviation of the inverter threshold voltage was less than one percent and the inverter gain (the slope of the inverter transfer curve at the inverter threshold vltage) was less than 3 percent. The average noise margin for the inverters was near 2 volts for a power supply voltage of 5 volts. The specific faults studied included undersize pull-down transistor widths and various open contacts in the matrix.

Normally-off AlGaN/GaN-based MOS-HEMT with self-terminating TMAH wet recess etching

NASA Astrophysics Data System (ADS)

Son, Dong-Hyeok; Jo, Young-Woo; Won, Chul-Ho; Lee, Jun-Hyeok; Seo, Jae Hwa; Lee, Sang-Heung; Lim, Jong-Won; Kim, Ji Heon; Kang, In Man; Cristoloveanu, Sorin; Lee, Jung-Hee

2018-03-01

Normally-off AlGaN/GaN-based MOS-HEMT has been fabricated by utilizing damage-free self-terminating tetramethyl ammonium hydroxide (TMAH) recess etching. The device exhibited a threshold voltage of +2.0 V with good uniformity, extremely small hysteresis of ∼20 mV, and maximum drain current of 210 mA/mm. The device also exhibited excellent off-state performances, such as breakdown voltage of ∼800 V with off-state leakage current as low as ∼10-12 A and high on/off current ratio (Ion/Ioff) of 1010. These excellent device performances are believed to be due to the high quality recessed surface, provided by the simple self-terminating TMAH etching.

Low operation voltage and high thermal stability of a WSi2 nanocrystal memory device using an Al2O3/HfO2/Al2O3 tunnel layer

NASA Astrophysics Data System (ADS)

Uk Lee, Dong; Jun Lee, Hyo; Kyu Kim, Eun; You, Hee-Wook; Cho, Won-Ju

2012-02-01

A WSi2 nanocrystal nonvolatile memory device was fabricated with an Al2O3/HfO2/Al2O3 (AHA) tunnel layer and its electrical characteristics were evaluated at 25, 50, 70, 100, and 125 °C. The program/erase (P/E) speed at 125 °C was approximately 500 μs under threshold voltage shifts of 1 V during voltage sweeping of 8 V/-8 V. When the applied pulse voltage was ±9 V for 1 s for the P/E conditions, the memory window at 125 °C was approximately 1.25 V after 105 s. The activation energies for the charge losses of 5%, 10%, 15%, 20%, 25%, 30%, and 35% were approximately 0.05, 0.11, 0.17, 0.21, 0.23, 0.23, and 0.23 eV, respectively. The charge loss mechanisms were direct tunneling and Pool-Frenkel emission between the WSi2 nanocrystals and the AHA barrier engineered tunneling layer. The WSi2 nanocrystal memory device with multi-stacked high-K tunnel layers showed strong potential for applications in nonvolatile memory devices.

On the physical operation and optimization of the p-GaN gate in normally-off GaN HEMT devices

NASA Astrophysics Data System (ADS)

Efthymiou, L.; Longobardi, G.; Camuso, G.; Chien, T.; Chen, M.; Udrea, F.

2017-03-01

In this study, an investigation is undertaken to determine the effect of gate design parameters on the on-state characteristics (threshold voltage and gate turn-on voltage) of pGaN/AlGaN/GaN high electron mobility transistors (HEMTs). Design parameters considered are pGaN doping and gate metal work function. The analysis considers the effects of variations on these parameters using a TCAD model matched with experimental results. A better understanding of the underlying physics governing the operation of these devices is achieved with a view to enable better optimization of such gate designs.

High performance printed oxide field-effect transistors processed using photonic curing.

PubMed

Garlapati, Suresh Kumar; Marques, Gabriel Cadilha; Gebauer, Julia Susanne; Dehm, Simone; Bruns, Michael; Winterer, Markus; Tahoori, Mehdi Baradaran; Aghassi-Hagmann, Jasmin; Hahn, Horst; Dasgupta, Subho

2018-06-08

Oxide semiconductors are highly promising candidates for the most awaited, next-generation electronics, namely, printed electronics. As a fabrication route for the solution-processed/printed oxide semiconductors, photonic curing is becoming increasingly popular, as compared to the conventional thermal curing method; the former offers numerous advantages over the latter, such as low process temperatures and short exposure time and thereby, high throughput compatibility. Here, using dissimilar photonic curing concepts (UV-visible light and UV-laser), we demonstrate facile fabrication of high performance In 2 O 3 field-effect transistors (FETs). Beside the processing related issues (temperature, time etc.), the other known limitation of oxide electronics is the lack of high performance p-type semiconductors, which can be bypassed using unipolar logics from high mobility n-type semiconductors alone. Interestingly, here we have found that our chosen distinct photonic curing methods can offer a large variation in threshold voltage, when they are fabricated from the same precursor ink. Consequently, both depletion and enhancement-mode devices have been achieved which can be used as the pull-up and pull-down transistors in unipolar inverters. The present device fabrication recipe demonstrates fast processing of low operation voltage, high performance FETs with large threshold voltage tunability.

High performance printed oxide field-effect transistors processed using photonic curing

NASA Astrophysics Data System (ADS)

Garlapati, Suresh Kumar; Cadilha Marques, Gabriel; Gebauer, Julia Susanne; Dehm, Simone; Bruns, Michael; Winterer, Markus; Baradaran Tahoori, Mehdi; Aghassi-Hagmann, Jasmin; Hahn, Horst; Dasgupta, Subho

2018-06-01

Oxide semiconductors are highly promising candidates for the most awaited, next-generation electronics, namely, printed electronics. As a fabrication route for the solution-processed/printed oxide semiconductors, photonic curing is becoming increasingly popular, as compared to the conventional thermal curing method; the former offers numerous advantages over the latter, such as low process temperatures and short exposure time and thereby, high throughput compatibility. Here, using dissimilar photonic curing concepts (UV–visible light and UV-laser), we demonstrate facile fabrication of high performance In2O3 field-effect transistors (FETs). Beside the processing related issues (temperature, time etc.), the other known limitation of oxide electronics is the lack of high performance p-type semiconductors, which can be bypassed using unipolar logics from high mobility n-type semiconductors alone. Interestingly, here we have found that our chosen distinct photonic curing methods can offer a large variation in threshold voltage, when they are fabricated from the same precursor ink. Consequently, both depletion and enhancement-mode devices have been achieved which can be used as the pull-up and pull-down transistors in unipolar inverters. The present device fabrication recipe demonstrates fast processing of low operation voltage, high performance FETs with large threshold voltage tunability.

Total ionizing dose effect in an input/output device for flash memory

NASA Astrophysics Data System (ADS)

Liu, Zhang-Li; Hu, Zhi-Yuan; Zhang, Zheng-Xuan; Shao, Hua; Chen, Ming; Bi, Da-Wei; Ning, Bing-Xu; Zou, Shi-Chang

2011-12-01

Input/output devices for flash memory are exposed to gamma ray irradiation. Total ionizing dose has been shown great influence on characteristic degradation of transistors with different sizes. In this paper, we observed a larger increase of off-state leakage in the short channel device than in long one. However, a larger threshold voltage shift is observed for the narrow width device than for the wide one, which is well known as the radiation induced narrow channel effect. The radiation induced charge in the shallow trench isolation oxide influences the electric field of the narrow channel device. Also, the drain bias dependence of the off-state leakage after irradiation is observed, which is called the radiation enhanced drain induced barrier lowing effect. Finally, we found that substrate bias voltage can suppress the off-state leakage, while leading to more obvious hump effect.

Organic memory using [6,6]-phenyl-C(61) butyric acid methyl ester: morphology, thickness and concentration dependence studies.

PubMed

Baral, Jayanta K; Majumdar, Himadri S; Laiho, Ari; Jiang, Hua; Kauppinen, Esko I; Ras, Robin H A; Ruokolainen, Janne; Ikkala, Olli; Osterbacka, Ronald

2008-01-23

We report a simple memory device in which the fullerene-derivative [6,6]-phenyl-C(61) butyric acid methyl ester (PCBM) mixed with inert polystyrene (PS) matrix is sandwiched between two aluminum (Al) electrodes. Transmission electron microscopy (TEM) images of PCBM:PS films showed well controlled morphology without forming any aggregates at low weight percentages (<10 wt%) of PCBM in PS. Energy dispersive x-ray spectroscopy (EDX) analysis of the device cross-sections indicated that the thermal evaporation of the Al electrodes did not lead to the inclusion of Al metal nanoparticles into the active PCBM:PS film. Above a threshold voltage of <3 V, independent of thickness, a consistent negative differential resistance (NDR) is observed in devices in the thickness range from 200 to 350 nm made from solutions with 4-10 wt% of PCBM in PS. We found that the threshold voltage (V(th)) for switching from the high-impedance state to the low-impedance state, the voltage at maximum current density (V(max)) and the voltage at minimum current density (V(min)) in the NDR regime are constant within this thickness range. The current density ratio at V(max) and V(min) is more than or equal to 10, increasing with thickness. Furthermore, the current density is exponentially dependent on the longest tunneling jump between two PCBM molecules, suggesting a tunneling mechanism between individual PCBM molecules. This is further supported with temperature independent NDR down to 240 K.

Simulation study on single event burnout in linear doping buffer layer engineered power VDMOSFET

NASA Astrophysics Data System (ADS)

Yunpeng, Jia; Hongyuan, Su; Rui, Jin; Dongqing, Hu; Yu, Wu

2016-02-01

The addition of a buffer layer can improve the device's secondary breakdown voltage, thus, improving the single event burnout (SEB) threshold voltage. In this paper, an N type linear doping buffer layer is proposed. According to quasi-stationary avalanche simulation and heavy ion beam simulation, the results show that an optimized linear doping buffer layer is critical. As SEB is induced by heavy ions impacting, the electric field of an optimized linear doping buffer device is much lower than that with an optimized constant doping buffer layer at a given buffer layer thickness and the same biasing voltages. Secondary breakdown voltage and the parasitic bipolar turn-on current are much higher than those with the optimized constant doping buffer layer. So the linear buffer layer is more advantageous to improving the device's SEB performance. Project supported by the National Natural Science Foundation of China (No. 61176071), the Doctoral Fund of Ministry of Education of China (No. 20111103120016), and the Science and Technology Program of State Grid Corporation of China (No. SGRI-WD-71-13-006).

Growth of IZO/IGZO dual-active-layer for low-voltage-drive and high-mobility thin film transistors based on an ALD grown Al2O3 gate insulator

NASA Astrophysics Data System (ADS)

Ding, Xingwei; Zhang, Hao; Ding, He; Zhang, Jianhua; Huang, Chuanxin; Shi, Weimin; Li, Jun; Jiang, Xueyin; Zhang, Zhilin

2014-12-01

We successfully integrated the high-performance oxide thin film transistors with novel IZO/IGZO dual-active-layers. The results showed that dual-active-layer (IZO/IGZO) TFTs, compared with single active layer IGZO TFTs and IZO TFTs, exhibited the excellent performances; specifically, a high field effect mobility of 14.4 cm2/Vs, a suitable threshold voltage of 0.8 V, a high on/off ratio of more than 107, a steep sub-threshold swing of 0.13 V/dec, and a substantially small threshold voltage shift of 0.51 V after temperature stress from 293 K to 353 K. In order to understand the superior performance, the density-of-states (DOS) were investigated based on the temperature-dependent transfer curves. The superior electric properties were attributed to the smaller DOS and higher carrier concentration. The proposed IZO/IGZO-TFT in this paper can be used as driving devices in the next-generation flat panel displays.

IGZO TFT-based circuit with tunable threshold voltage by laser annealing

NASA Astrophysics Data System (ADS)

Huang, Xiaoming; Yu, Guang; Wu, Chenfei

2017-11-01

In this work, a high-performance inverter based on amorphous indium-gallium-zinc oxide thin-film transistors (TFTs) has been fabricated, which consists of a driver TFT and a load TFT. The threshold voltage (Vth) of the load TFT can be tuned by applying an area-selective laser annealing. The transfer curve of the load TFT shows a parallel shift into the negative bias direction upon laser annealing. Based on x-ray photoelectron spectroscopy analyses, the negative Vth shift can be attributed to the increase of oxygen vacancy concentration within the device channel upon laser irradiation. Compared to the untreated inverter, the laser annealed inverter shows much improved switching characteristics, including a large output swing range which is close to full swing, as well as an enhanced output voltage gain. Furthermore, the dynamic performance of ring oscillator based on the laser-annealed inverter is improved.

Phosphorene/rhenium disulfide heterojunction-based negative differential resistance device for multi-valued logic

NASA Astrophysics Data System (ADS)

Shim, Jaewoo; Oh, Seyong; Kang, Dong-Ho; Jo, Seo-Hyeon; Ali, Muhammad Hasnain; Choi, Woo-Young; Heo, Keun; Jeon, Jaeho; Lee, Sungjoo; Kim, Minwoo; Song, Young Jae; Park, Jin-Hong

2016-11-01

Recently, negative differential resistance devices have attracted considerable attention due to their folded current-voltage characteristic, which presents multiple threshold voltage values. Because of this remarkable property, studies associated with the negative differential resistance devices have been explored for realizing multi-valued logic applications. Here we demonstrate a negative differential resistance device based on a phosphorene/rhenium disulfide (BP/ReS2) heterojunction that is formed by type-III broken-gap band alignment, showing high peak-to-valley current ratio values of 4.2 and 6.9 at room temperature and 180 K, respectively. Also, the carrier transport mechanism of the BP/ReS2 negative differential resistance device is investigated in detail by analysing the tunnelling and diffusion currents at various temperatures with the proposed analytic negative differential resistance device model. Finally, we demonstrate a ternary inverter as a multi-valued logic application. This study of a two-dimensional material heterojunction is a step forward toward future multi-valued logic device research.

Phosphorene/rhenium disulfide heterojunction-based negative differential resistance device for multi-valued logic

PubMed Central

Shim, Jaewoo; Oh, Seyong; Kang, Dong-Ho; Jo, Seo-Hyeon; Ali, Muhammad Hasnain; Choi, Woo-Young; Heo, Keun; Jeon, Jaeho; Lee, Sungjoo; Kim, Minwoo; Song, Young Jae; Park, Jin-Hong

2016-01-01

Recently, negative differential resistance devices have attracted considerable attention due to their folded current–voltage characteristic, which presents multiple threshold voltage values. Because of this remarkable property, studies associated with the negative differential resistance devices have been explored for realizing multi-valued logic applications. Here we demonstrate a negative differential resistance device based on a phosphorene/rhenium disulfide (BP/ReS2) heterojunction that is formed by type-III broken-gap band alignment, showing high peak-to-valley current ratio values of 4.2 and 6.9 at room temperature and 180 K, respectively. Also, the carrier transport mechanism of the BP/ReS2 negative differential resistance device is investigated in detail by analysing the tunnelling and diffusion currents at various temperatures with the proposed analytic negative differential resistance device model. Finally, we demonstrate a ternary inverter as a multi-valued logic application. This study of a two-dimensional material heterojunction is a step forward toward future multi-valued logic device research. PMID:27819264

Metalorganic vapor phase epitaxial growth of red and infrared vertical-cavity surface-emitting laser diodes

NASA Astrophysics Data System (ADS)

Schneider, R. P.; Lott, J. A.; Lear, K. L.; Choquette, K. D.; Crawford, M. H.; Kilcoyne, S. P.; Figiel, J. J.

1994-12-01

Metalorganic vapor phase epitaxy (MOVPE) is used for the growth of vertical-cavity surface-emitting laser (VCSEL) diodes. MOVPE exhibits a number of important advantages over the more commonly-used molecular-beam epitaxial (MBE) techniques, including ease of continuous compositional grading and carbon doping for low-resistance p-type distributed Bragg reflectors (DBRs), higher growth rates for rapid throughput and greater versatility in choice of materials and dopants. Planar gain-guided red VCSELs based on AlGaInP/AlGaAs heterostructures lase continuous-wave at room temperature, with voltage thresholds between 2.5 and 3 V and maximum power outputs of over 0.3 mW. Top-emitting infra-red (IR) VCSELs exhibit the highest power-conversion (wall-plug) efficiencies (21%), lowest threshold voltage (1.47 V), and highest single mode power (4.4 mW from an 8 μm device) yet reported. These results establish MOVPE as a preferred growth technique for this important new family of photonic devices.

Ionic liquid versus SiO 2 gated a-IGZO thin film transistors: A direct comparison

DOE Office of Scientific and Technical Information (OSTI.GOV)

Pudasaini, Pushpa Raj; Noh, Joo Hyon; Wong, Anthony T.

Here, ionic liquid gated field effect transistors have been extensively studied due to their low operation voltage, ease of processing and the realization of high electric fields at low bias voltages. Here, we report ionic liquid (IL) gated thin film transistors (TFTs) based on amorphous Indium Gallium Zinc Oxide (a-IGZO) active layers and directly compare the characteristics with a standard SiO 2 gated device. The transport measurements of the top IL gated device revealed the n-channel property of the IGZO thin film with a current ON/OFF ratio ~10 5, a promising field effect mobility of 14.20 cm 2V –1s –1,more » and a threshold voltage of 0.5 V. Comparable measurements on the bottom SiO2 gate insulator revealed a current ON/OFF ratio >108, a field effect mobility of 13.89 cm 2V –1s –1 and a threshold voltage of 2.5 V. Furthermore, temperature-dependent measurements revealed that the ionic liquid electric double layer can be “frozen-in” by cooling below the glass transition temperature with an applied electrical bias. Positive and negative freezing bias locks-in the IGZO TFT “ON” and “OFF” state, respectively, which could lead to new switching and possibly non-volatile memory applications.« less

Ionic liquid versus SiO 2 gated a-IGZO thin film transistors: A direct comparison

DOE PAGES

Pudasaini, Pushpa Raj; Noh, Joo Hyon; Wong, Anthony T.; ...

2015-08-12

Here, ionic liquid gated field effect transistors have been extensively studied due to their low operation voltage, ease of processing and the realization of high electric fields at low bias voltages. Here, we report ionic liquid (IL) gated thin film transistors (TFTs) based on amorphous Indium Gallium Zinc Oxide (a-IGZO) active layers and directly compare the characteristics with a standard SiO 2 gated device. The transport measurements of the top IL gated device revealed the n-channel property of the IGZO thin film with a current ON/OFF ratio ~10 5, a promising field effect mobility of 14.20 cm 2V –1s –1,more » and a threshold voltage of 0.5 V. Comparable measurements on the bottom SiO2 gate insulator revealed a current ON/OFF ratio >108, a field effect mobility of 13.89 cm 2V –1s –1 and a threshold voltage of 2.5 V. Furthermore, temperature-dependent measurements revealed that the ionic liquid electric double layer can be “frozen-in” by cooling below the glass transition temperature with an applied electrical bias. Positive and negative freezing bias locks-in the IGZO TFT “ON” and “OFF” state, respectively, which could lead to new switching and possibly non-volatile memory applications.« less

Physical implication of transition voltage in organic nano-floating-gate nonvolatile memories

DOE Office of Scientific and Technical Information (OSTI.GOV)

Wang, Shun; Gao, Xu, E-mail: wangsd@suda.edu.cn, E-mail: gaoxu@suda.edu.cn; Zhong, Ya-Nan

High-performance pentacene-based organic field-effect transistor nonvolatile memories, using polystyrene as a tunneling dielectric and Au nanoparticles as a nano-floating-gate, show parallelogram-like transfer characteristics with a featured transition point. The transition voltage at the transition point corresponds to a threshold electric field in the tunneling dielectric, over which stored electrons in the nano-floating-gate will start to leak out. The transition voltage can be modulated depending on the bias configuration and device structure. For p-type active layers, optimized transition voltage should be on the negative side of but close to the reading voltage, which can simultaneously achieve a high ON/OFF ratio andmore » good memory retention.« less

Modeling of Sonos Memory Cell Erase Cycle

NASA Technical Reports Server (NTRS)

Phillips, Thomas A.; MacLeond, Todd C.; Ho, Fat D.

2010-01-01

Silicon-oxide-nitride-oxide-silicon (SONOS) nonvolatile semiconductor memories (NVSMS) have many advantages. These memories are electrically erasable programmable read-only memories (EEPROMs). They utilize low programming voltages, endure extended erase/write cycles, are inherently resistant to radiation, and are compatible with high-density scaled CMOS for low power, portable electronics. The SONOS memory cell erase cycle was investigated using a nonquasi-static (NQS) MOSFET model. The SONOS floating gate charge and voltage, tunneling current, threshold voltage, and drain current were characterized during an erase cycle. Comparisons were made between the model predictions and experimental device data.

Analyzing threshold pressure limitations in microfluidic transistors for self-regulated microfluidic circuits.

PubMed

Kim, Sung-Jin; Yokokawa, Ryuji; Takayama, Shuichi

2012-12-03

This paper reveals a critical limitation in the electro-hydraulic analogy between a microfluidic membrane-valve (μMV) and an electronic transistor. Unlike typical transistors that have similar on and off threshold voltages, in hydraulic μMVs, the threshold pressures for opening and closing are significantly different and can change, even for the same μMVs depending on overall circuit design and operation conditions. We explain, in particular, how the negative values of the closing threshold pressures significantly constrain operation of even simple hydraulic μMV circuits such as autonomously switching two-valve microfluidic oscillators. These understandings have significant implications in designing self-regulated microfluidic devices.

Characteristics of enhanced-mode AlGaN/GaN MIS HEMTs for millimeter wave applications

NASA Astrophysics Data System (ADS)

Lee, Jong-Min; Ahn, Ho-Kyun; Jung, Hyun-Wook; Shin, Min Jeong; Lim, Jong-Won

2017-09-01

In this paper, an enhanced-mode (E-mode) AlGaN/GaN high electron mobility transistor (HEMT) was developed by using 4-inch GaN HEMT process. We designed and fabricated Emode HEMTs and characterized device performance. To estimate the possibility of application for millimeter wave applications, we focused on the high frequency performance and power characteristics. To shift the threshold voltage of HEMTs we applied the Al2O3 insulator to the gate structure and adopted the gate recess technique. To increase the frequency performance the e-beam lithography technique was used to define the 0.15 um gate length. To evaluate the dc and high frequency performance, electrical characterization was performed. The threshold voltage was measured to be positive value by linear extrapolation from the transfer curve. The device leakage current is comparable to that of the depletion mode device. The current gain cut-off frequency and the maximum oscillation frequency of the E-mode device with a total gate width of 150 um were 55 GHz and 168 GHz, respectively. To confirm the power performance for mm-wave applications the load-pull test was performed. The measured power density of 2.32 W/mm was achieved at frequencies of 28 and 30 GHz.

Fabrication of Ultra-Thin Printed Organic TFT CMOS Logic Circuits Optimized for Low-Voltage Wearable Sensor Applications.

PubMed

Takeda, Yasunori; Hayasaka, Kazuma; Shiwaku, Rei; Yokosawa, Koji; Shiba, Takeo; Mamada, Masashi; Kumaki, Daisuke; Fukuda, Kenjiro; Tokito, Shizuo

2016-05-09

Ultrathin electronic circuits that can be manufactured by using conventional printing technologies are key elements necessary to realize wearable health sensors and next-generation flexible electronic devices. Due to their low level of power consumption, complementary (CMOS) circuits using both types of semiconductors can be easily employed in wireless devices. Here, we describe ultrathin CMOS logic circuits, for which not only the source/drain electrodes but also the semiconductor layers were printed. Both p-type and n-type organic thin film transistor devices were employed in a D-flip flop circuit in the newly developed stacked structure and exhibited excellent electrical characteristics, including good carrier mobilities of 0.34 and 0.21 cm(2) V(-1) sec(-1), and threshold voltages of nearly 0 V with low operating voltages. These printed organic CMOS D-flip flop circuits exhibit operating frequencies of 75 Hz and demonstrate great potential for flexible and printed electronics technology, particularly for wearable sensor applications with wireless connectivity.

Fabrication of Ultra-Thin Printed Organic TFT CMOS Logic Circuits Optimized for Low-Voltage Wearable Sensor Applications

PubMed Central

Takeda, Yasunori; Hayasaka, Kazuma; Shiwaku, Rei; Yokosawa, Koji; Shiba, Takeo; Mamada, Masashi; Kumaki, Daisuke; Fukuda, Kenjiro; Tokito, Shizuo

2016-01-01

Ultrathin electronic circuits that can be manufactured by using conventional printing technologies are key elements necessary to realize wearable health sensors and next-generation flexible electronic devices. Due to their low level of power consumption, complementary (CMOS) circuits using both types of semiconductors can be easily employed in wireless devices. Here, we describe ultrathin CMOS logic circuits, for which not only the source/drain electrodes but also the semiconductor layers were printed. Both p-type and n-type organic thin film transistor devices were employed in a D-flip flop circuit in the newly developed stacked structure and exhibited excellent electrical characteristics, including good carrier mobilities of 0.34 and 0.21 cm2 V−1 sec−1, and threshold voltages of nearly 0 V with low operating voltages. These printed organic CMOS D-flip flop circuits exhibit operating frequencies of 75 Hz and demonstrate great potential for flexible and printed electronics technology, particularly for wearable sensor applications with wireless connectivity. PMID:27157914

Controllable pulse parameter transcranial magnetic stimulator with enhanced circuit topology and pulse shaping

NASA Astrophysics Data System (ADS)

Peterchev, Angel V.; DʼOstilio, Kevin; Rothwell, John C.; Murphy, David L.

2014-10-01

Objective. This work aims at flexible and practical pulse parameter control in transcranial magnetic stimulation (TMS), which is currently very limited in commercial devices. Approach. We present a third generation controllable pulse parameter device (cTMS3) that uses a novel circuit topology with two energy-storage capacitors. It incorporates several implementation and functionality advantages over conventional TMS devices and other devices with advanced pulse shape control. cTMS3 generates lower internal voltage differences and is implemented with transistors with a lower voltage rating than prior cTMS devices. Main results. cTMS3 provides more flexible pulse shaping since the circuit topology allows four coil-voltage levels during a pulse, including approximately zero voltage. The near-zero coil voltage enables snubbing of the ringing at the end of the pulse without the need for a separate active snubber circuit. cTMS3 can generate powerful rapid pulse sequences (\\lt 10 ms inter pulse interval) by increasing the width of each subsequent pulse and utilizing the large capacitor energy storage, allowing the implementation of paradigms such as paired-pulse and quadripulse TMS with a single pulse generation circuit. cTMS3 can also generate theta (50 Hz) burst stimulation with predominantly unidirectional electric field pulses. The cTMS3 device functionality and output strength are illustrated with electrical output measurements as well as a study of the effect of pulse width and polarity on the active motor threshold in ten healthy volunteers. Significance. The cTMS3 features could extend the utility of TMS as a research, diagnostic, and therapeutic tool.

Controllable pulse parameter transcranial magnetic stimulator with enhanced circuit topology and pulse shaping

PubMed Central

D’Ostilio, Kevin; Rothwell, John C; Murphy, David L

2014-01-01

Objective This work aims at flexible and practical pulse parameter control in transcranial magnetic stimulation (TMS), which is currently very limited in commercial devices. Approach We present a third generation controllable pulse parameter device (cTMS3) that uses a novel circuit topology with two energy-storage capacitors. It incorporates several implementation and functionality advantages over conventional TMS devices and other devices with advanced pulse shape control. cTMS3 generates lower internal voltage differences and is implemented with transistors with lower voltage rating than prior cTMS devices. Main results cTMS3 provides more flexible pulse shaping since the circuit topology allows four coil-voltage levels during a pulse, including approximately zero voltage. The near-zero coil voltage enables snubbing of the ringing at the end of the pulse without the need for a separate active snubber circuit. cTMS3 can generate powerful rapid pulse sequences (<10 ms inter pulse interval) by increasing the width of each subsequent pulse and utilizing the large capacitor energy storage, allowing the implementation of paradigms such as paired-pulse and quadripulse TMS with a single pulse generation circuit. cTMS3 can also generate theta (50 Hz) burst stimulation with predominantly unidirectional electric field pulses. The cTMS3 device functionality and output strength are illustrated with electrical output measurements as well as a study of the effect of pulse width and polarity on the active motor threshold in 10 healthy volunteers. Significance The cTMS3 features could extend the utility of TMS as a research, diagnostic, and therapeutic tool. PMID:25242286

The effect of doping Sb on the electronic structure and the device characteristics of Ovonic Threshold Switches based on Ge-Se

PubMed Central

Shin, Sang-Yeol; Choi, J. M.; Seo, Juhee; Ahn, Hyung-Woo; Choi, Yong Gyu; Cheong, Byung-ki; Lee, Suyoun

2014-01-01

The Ovonic Threshold Switch (OTS) based on an amorphous chalcogenide material has attracted much interest as a promising candidate for a high-performance thin-film switching device enabling 3D-stacking of memory devices. In this work, we studied on the electronic structure of amorphous Sb-doped Ge0.6Se0.4 (in atomic mole fraction) film and its characteristics as to OTS devices. From the optical absorption spectroscopy measurement, the band gap (Eg) was found to decrease with increasing Sb content. In addition, as Sb content increased, the activation energy (Ea) for electrical conduction was found to decrease down to about one third of Eg from a half. As to the device characteristics, we found that the threshold switching voltage (Vth) drastically decreased with the Sb content. These results, being accountable in terms of the changes in the bonding configuration of constituent atoms as well as in the electronic structure such as the energy gap and trap states, advance an effective method of compositional adjustment to modulate Vth of an OTS device for various applications. PMID:25403772

Timing discriminator using leading-edge extrapolation

DOEpatents

Gottschalk, Bernard

1983-01-01

A discriminator circuit to recover timing information from slow-rising pulses by means of an output trailing edge, a fixed time after the starting corner of the input pulse, which is nearly independent of risetime and threshold setting. This apparatus comprises means for comparing pulses with a threshold voltage; a capacitor to be charged at a certain rate when the input signal is one-third threshold voltage, and at a lower rate when the input signal is two-thirds threshold voltage; current-generating means for charging the capacitor; means for comparing voltage capacitor with a bias voltage; a flip-flop to be set when the input pulse reaches threshold voltage and reset when capacitor voltage reaches the bias voltage; and a clamping means for discharging the capacitor when the input signal returns below one-third threshold voltage.

Switching dynamics of TaOx-based threshold switching devices

NASA Astrophysics Data System (ADS)

Goodwill, Jonathan M.; Gala, Darshil K.; Bain, James A.; Skowronski, Marek

2018-03-01

Bi-stable volatile switching devices are being used as access devices in solid-state memory arrays and as the active part of compact oscillators. Such structures exhibit two stable states of resistance and switch between them at a critical value of voltage or current. A typical resistance transient under a constant amplitude voltage pulse starts with a slow decrease followed by a rapid drop and leveling off at a low steady state value. This behavior prompted the interpretation of initial delay and fast transition as due to two different processes. Here, we show that the entire transient including incubation time, transition time, and the final resistance values in TaOx-based switching can be explained by one process, namely, Joule heating with the rapid transition due to the thermal runaway. The time, which is required for the device in the conducting state to relax back to the stable high resistance one, is also consistent with the proposed mechanism.

Terahertz Detection and Imaging Using Graphene Ballistic Rectifiers.

PubMed

Auton, Gregory; But, Dmytro B; Zhang, Jiawei; Hill, Ernie; Coquillat, Dominique; Consejo, Christophe; Nouvel, Philippe; Knap, Wojciech; Varani, Luca; Teppe, Frederic; Torres, Jeremie; Song, Aimin

2017-11-08

A graphene ballistic rectifier is used in conjunction with an antenna to demonstrate a rectenna as a terahertz (THz) detector. A small-area (<1 μm 2 ) local gate is used to adjust the Fermi level in the device to optimize the output while minimizing the impact on the cutoff frequency. The device operates in both n- and p-type transport regimes and shows a peak extrinsic responsivity of 764 V/W and a corresponding noise equivalent power of 34 pW Hz -1/2 at room temperature with no indications of a cutoff frequency up to 0.45 THz. The device also demonstrates a linear response for more than 3 orders of magnitude of input power due to its zero threshold voltage, quadratic current-voltage characteristics and high saturation current. Finally, the device is used to take an image of an optically opaque object at 0.685 THz, demonstrating potential in both medical and security imaging applications.

Graphene barristor, a triode device with a gate-controlled Schottky barrier.

PubMed

Yang, Heejun; Heo, Jinseong; Park, Seongjun; Song, Hyun Jae; Seo, David H; Byun, Kyung-Eun; Kim, Philip; Yoo, InKyeong; Chung, Hyun-Jong; Kim, Kinam

2012-06-01

Despite several years of research into graphene electronics, sufficient on/off current ratio I(on)/I(off) in graphene transistors with conventional device structures has been impossible to obtain. We report on a three-terminal active device, a graphene variable-barrier "barristor" (GB), in which the key is an atomically sharp interface between graphene and hydrogenated silicon. Large modulation on the device current (on/off ratio of 10(5)) is achieved by adjusting the gate voltage to control the graphene-silicon Schottky barrier. The absence of Fermi-level pinning at the interface allows the barrier's height to be tuned to 0.2 electron volt by adjusting graphene's work function, which results in large shifts of diode threshold voltages. Fabricating GBs on respective 150-mm wafers and combining complementary p- and n-type GBs, we demonstrate inverter and half-adder logic circuits.

Nonvolatile memory with graphene oxide as a charge storage node in nanowire field-effect transistors

NASA Astrophysics Data System (ADS)

Baek, David J.; Seol, Myeong-Lok; Choi, Sung-Jin; Moon, Dong-Il; Choi, Yang-Kyu

2012-02-01

Through the structural modification of a three-dimensional silicon nanowire field-effect transistor, i.e., a double-gate FinFET, a structural platform was developed which allowed for us to utilize graphene oxide (GO) as a charge trapping layer in a nonvolatile memory device. By creating a nanogap between the gate and the channel, GO was embedded after the complete device fabrication. By applying a proper gate voltage, charge trapping, and de-trapping within the GO was enabled and resulted in large threshold voltage shifts. The employment of GO with FinFET in our work suggests that graphitic materials can potentially play a significant role for future nanoelectronic applications.

Flexible Electronics Powered by Mixed Metal Oxide Thin Film Transistors

NASA Astrophysics Data System (ADS)

Marrs, Michael

A low temperature amorphous oxide thin film transistor (TFT) and amorphous silicon PIN diode backplane technology for large area flexible digital x-ray detectors has been developed to create 7.9-in. diagonal backplanes. The critical steps in the evolution of the backplane process include the qualification and optimization of the low temperature (200 °C) metal oxide TFT and a-Si PIN photodiode process, the stability of the devices under forward and reverse bias stress, the transfer of the process to flexible plastic substrates, and the fabrication and assembly of the flexible detectors. Mixed oxide semiconductor TFTs on flexible plastic substrates suffer from performance and stability issues related to the maximum processing temperature limitation of the polymer. A novel device architecture based upon a dual active layer improves both the performance and stability. Devices are directly fabricated below 200 ºC on a polyethylene naphthalate (PEN) substrate using mixed metal oxides of either zinc indium oxide (ZIO) or indium gallium zinc oxide (IGZO) as the active semiconductor. The dual active layer architecture allows for adjustment to the saturation mobility and threshold voltage stability without the requirement of high temperature annealing, which is not compatible with flexible plastic substrates like PEN. The device performance and stability is strongly dependent upon the composition of the mixed metal oxide; this dependency provides a simple route to improving the threshold voltage stability and drive performance. By switching from a single to a dual active layer, the saturation mobility increases from 1.2 cm2/V-s to 18.0 cm2/V-s, while the rate of the threshold voltage shift decreases by an order of magnitude. This approach could assist in enabling the production of devices on flexible substrates using amorphous oxide semiconductors. Low temperature (200°C) processed amorphous silicon photodiodes were developed successfully by balancing the tradeoffs between low temperature and low stress (less than -70 MPa compressive) and device performance. Devices with a dark current of less than 1.0 pA/mm2 and a quantum efficiency of 68% have been demonstrated. Alternative processing techniques, such as pixelating the PIN diode and using organic photodiodes have also been explored for applications where extreme flexibility is desired.

Material Engineering for Phase Change Memory

NASA Astrophysics Data System (ADS)

Cabrera, David M.

As semiconductor devices continue to scale downward, and portable consumer electronics become more prevalent there is a need to develop memory technology that will scale with devices and use less energy, while maintaining performance. One of the leading prototypical memories that is being investigated is phase change memory. Phase change memory (PCM) is a non-volatile memory composed of 1 transistor and 1 resistor. The resistive structure includes a memory material alloy which can change between amorphous and crystalline states repeatedly using current/voltage pulses of different lengths and magnitudes. The most widely studied PCM materials are chalcogenides - Germanium-Antimony-Tellerium (GST) with Ge2Sb2Te3 and Germanium-Tellerium (GeTe) being some of the most popular stochiometries. As these cells are scaled downward, the current/voltage needed to switch these materials becomes comparable to the voltage needed to sense the cell's state. The International Roadmap for Semiconductors aims to raise the threshold field of these devices from 66.6 V/mum to be at least 375 V/mum for the year 2024. These cells are also prone to resistance drift between states, leading to bit corruption and memory loss. Phase change material properties are known to influence PCM device performance such as crystallization temperature having an effect on data retention and litetime, while resistivity values in the amorphous and crystalline phases have an effect on the current/voltage needed to write/erase the cell. Addition of dopants is also known to modify the phase change material parameters. The materials G2S2T5, GeTe, with dopants - nitrogen, silicon, titanium, and aluminum oxide and undoped Gallium-Antimonide (GaSb) are studied for these desired characteristics. Thin films of these compositions are deposited via physical vapor deposition at IBM Watson Research Center. Crystallization temperatures are investigated using time resolved x-ray diffraction at Brookhaven National Laboratory. Subsequently, these are incorporated into PCM cells with structure designed as shown in Fig.1. A photolithographic lift-off process is developed to realize these devices. Electrical parameters such as the voltage needed to switch the device between memory states, the difference in resistance between these memory states, and the amount of time to switch are studied using HP4145 equipped with a pulsed generator. The results show that incorporating aluminum oxide dopant into G2S2T 5 raises its threshold field from 60 V/mum to 96 V/mum, while for GeTe, nitrogen doping raises its threshold field from 143 V/mum to 248 V/mum. It is found that GaSb at comparable volume devices has a threshold field of 130 V/mum. It was also observed that nitrogen and silicon doping made G 2S2T5 more resistant to drift, raising time to drift from 2 to 16.6 minutes while titanium and aluminum oxide doping made GeTe drift time rise from 3 to 20 minutes. It was also found that shrinking the cell area in GaSb from 1 mum2 to 0.5 mum2 lengthened drift time from 45s to over 24 hours. The PCM process developed in this study is extended to GeTe/Sb2 Te3 multilayers called the superlattice (SL) structure that opens opportunities for future work. Recent studies have shown that the superlattice structure exhibits low switching energies, therefore has potential for low power operation.

Optoelectronic Materials Center, A Collaborative Program Including University of New Mexico, Stanford University and California Institute of Technology

DTIC Science & Technology

1993-05-04

a highly coherent output beam that can be focused’. MOCVD is used to fabricate the unstble resonator waveguide in these devices and to ensure a high...investigated. Single-mode VCSELs with excellent electrical characteristics were fabricated with a threshold voltage below 2V and an operating voltage of...resulting eye diagram shows that large-signal electrical modulation at 1-2 GB/s is possible. These VCSELs are therefore suitable for multi-GB/s optical

Timing discriminator using leading-edge extrapolation

DOEpatents

Gottschalk, B.

1981-07-30

A discriminator circuit to recover timing information from slow-rising pulses by means of an output trailing edge, a fixed time after the starting corner of the input pulse, which is nearly independent of risetime and threshold setting is described. This apparatus comprises means for comparing pulses with a threshold voltage; a capacitor to be charged at a certain rate when the input signal is one-third threshold voltage, and at a lower rate when the input signal is two-thirds threshold voltage; current-generating means for charging the capacitor; means for comparing voltage capacitor with a bias voltage; a flip-flop to be set when the input pulse reaches threshold voltage and reset when capacitor voltage reaches the bias voltage; and a clamping means for discharging the capacitor when the input signal returns below one-third threshold voltage.

Temperature dependence of DC transport characteristics for a two-dimensional electron gas in an undoped Si/SiGe heterostructure

NASA Astrophysics Data System (ADS)

Chou, Kuan-Yu; Hsu, Nai-Wen; Su, Yi-Hsin; Chou, Chung-Tao; Chiu, Po-Yuan; Chuang, Yen; Li, Jiun-Yun

2018-02-01

We investigate DC characteristics of a two-dimensional electron gas (2DEG) in an undoped Si/SiGe heterostructure and its temperature dependence. An insulated-gate field-effect transistor was fabricated, and transfer characteristics were measured at 4 K-300 K. At low temperatures (T < 45 K), source electrons are injected into the buried 2DEG channel first and drain current increases with the gate voltage. By increasing the gate voltage further, the current saturates followed by a negative transconductance observed, which can be attributed to electron tunneling from the buried channel to the surface channel. Finally, the drain current is saturated again at large gate biases due to parallel conduction of buried and surface channels. By increasing the temperature, an abrupt increase in threshold voltage is observed at T ˜ 45 K and it is speculated that negatively charged impurities at the Al2O3/Si interface are responsible for the threshold voltage shift. At T > 45 K, the current saturation and negative transconductance disappear and the device acts as a normal transistor.

Electrostatic Discharge (ESD) Susceptibility of Electronic Devices

DTIC Science & Technology

1983-01-01

determined by knowing the thermal environment in which the component is to operate. However, ESD is not that predictable . It is considered a random... predicted where a part may experience an ESD pulse during usage? (3) What effect does stressing a device with different models have on its propensity for...relatively low ESO threshold voltages (i.e., < 7000 volts) tend to be consistently high compared with their predicted level using EMP data. But at

Tunneling contact IGZO TFTs with reduced saturation voltages

NASA Astrophysics Data System (ADS)

Wang, Longyan; Sun, Yin; Zhang, Xintong; Zhang, Lining; Zhang, Shengdong; Chan, Mansun

2017-04-01

We report a tunneling contact indium-gallium-zinc oxide (IGZO) thin film transistor (TFT) with a graphene interlayer technique in this paper. A Schottky junction is realized between a metal and IGZO with a graphene interlayer, leading to a quantum tunneling of the TFT transport in saturation regions. This tunneling contact enables a significant reduction in the saturation drain voltage Vdsat compared to that of the thermionic emission TFTs, which is usually equal to the gate voltage minus their threshold voltages. Measured temperature independences of the subthreshold swing confirm a transition from the thermionic emission to quantum tunneling transports depending on the gate bias voltages in the proposed device. The tunneling contact TFTs with the graphene interlayer have implications to reduce the power consumptions of certain applications such as the active matrix OLED display.

Analyzing threshold pressure limitations in microfluidic transistors for self-regulated microfluidic circuits

PubMed Central

Kim, Sung-Jin; Yokokawa, Ryuji; Takayama, Shuichi

2012-01-01

This paper reveals a critical limitation in the electro-hydraulic analogy between a microfluidic membrane-valve (μMV) and an electronic transistor. Unlike typical transistors that have similar on and off threshold voltages, in hydraulic μMVs, the threshold pressures for opening and closing are significantly different and can change, even for the same μMVs depending on overall circuit design and operation conditions. We explain, in particular, how the negative values of the closing threshold pressures significantly constrain operation of even simple hydraulic μMV circuits such as autonomously switching two-valve microfluidic oscillators. These understandings have significant implications in designing self-regulated microfluidic devices. PMID:23284181

Design, production, and testing of field effect transistors. [cryogenic MOSFETS

NASA Technical Reports Server (NTRS)

Sclar, N.

1982-01-01

Cryogenic MOSFETS (CRYOFETS), specifically designed for low temperature preamplifier application with infrared extrinsic detectors were produced and comparatively tested with p-channel MOSFETs under matched conditions. The CRYOFETs exhibit lower voltage thresholds, high source-follower gains at lower bias voltage, and lower dc offset source voltage. The noise of the CRYOFET is found to be 2 to 4 times greater than the MOSFET with a correspondingly lower figure of merit (which is established for source-follower amplifiers). The device power dissipation at a gain of 0.98 is some two orders of magnitude lower than for the MOSFET. Further, CRYOFETs are free of low temperature I vs V character hysteresis and balky conduction turn-on effects and operate effectively in the 2.4 to 20 K range. These devices have promise for use on long term duration sensor missions and for on-focal-plane signal processing at low temperatures.

Determination of threshold and maximum operating electric stresses for selected high voltage insulations. Task 2: Investigation of oil-filled paper insulated cables

NASA Astrophysics Data System (ADS)

Sosnowski, M.; Eager, G. S., Jr.

1983-06-01

Threshold voltage of oil-impregnated paper insulated cables are investigaed. Experimental work was done on model cables specially manufactured for this project. The cables were impregnated with mineral and with synthetic oils. Standard impulse breakdown voltage tests and impulse voltage breakdown tests with dc prestressing were performed at room temperature and at 1000C. The most important result is the finding of very high level of threshold voltage stress for oil-impregnated paper insulated cables. This threshold voltage is approximately 1.5 times higher than the threshold voltage or crosslinked polyethylene insulated cables.

A microwave field-driven transistor-like skyrmionic device with the microwave current-assisted skyrmion creation

NASA Astrophysics Data System (ADS)

Xia, Jing; Huang, Yangqi; Zhang, Xichao; Kang, Wang; Zheng, Chentian; Liu, Xiaoxi; Zhao, Weisheng; Zhou, Yan

2017-10-01

Magnetic skyrmion is a topologically protected domain-wall structure at nanoscale, which could serve as a basic building block for advanced spintronic devices. Here, we propose a microwave field-driven skyrmionic device with the transistor-like function, where the motion of a skyrmion in a voltage-gated ferromagnetic nanotrack is studied by micromagnetic simulations. It is demonstrated that the microwave field can drive the motion of a skyrmion by exciting the propagating spin waves, and the skyrmion motion can be governed by a gate voltage. We also investigate the microwave current-assisted creation of a skyrmion to facilitate the operation of the transistor-like skyrmionic device on the source terminal. It is found that the microwave current with an appropriate frequency can reduce the threshold current density required for the creation of a skyrmion from the ferromagnetic background. The proposed transistor-like skyrmionic device operated with the microwave field and current could be useful for building future skyrmion-based circuits.

Static Noise Margin Enhancement by Flex-Pass-Gate SRAM

NASA Astrophysics Data System (ADS)

O'Uchi, Shin-Ichi; Masahara, Meishoku; Sakamoto, Kunihiro; Endo, Kazuhiko; Liu, Yungxun; Matsukawa, Takashi; Sekigawa, Toshihiro; Koike, Hanpei; Suzuki, Eiichi

A Flex-Pass-Gate SRAM, i.e. a fin-type-field-effect-transistor- (FinFET-) based SRAM, is proposed to enhance noise margin during both read and write operations. In its cell, the flip-flop is composed of usual three-terminal- (3T-) FinFETs while pass gates are composed of four-terminal- (4T-) FinFETs. The 4T-FinFETs enable to adopt a dynamic threshold-voltage control in the pass gates. During a write operation, the threshold voltage of the pass gates is lowered to enhance the writing speed and stability. During the read operation, on the other hand, the threshold voltage is raised to enhance the static noise margin. An asymmetric-oxide 4T-FinFET is helpful to manage the leakage current through the pass gate. In this paper, a design strategy of the pass gate with an asymmetric gate oxide is considered, and a TCAD-based Monte Carlo simulation reveals that the Flex-Pass-Gate SRAM based on that design strategy is expected to be effective in half-pitch 32-nm technology for low-standby-power (LSTP) applications, even taking into account the variability in the device performance.

ZnO thin-film transistors with a polymeric gate insulator built on a polyethersulfone substrate

NASA Astrophysics Data System (ADS)

Hyung, Gun Woo; Park, Jaehoon; Koo, Ja Ryong; Choi, Kyung Min; Kwon, Sang Jik; Cho, Eou Sik; Kim, Yong Seog; Kim, Young Kwan

2012-03-01

Zinc oxide (ZnO) thin-film transistors (TFTs) with a cross-linked poly(vinyl alcohol) (c-PVA) insulator are fabricated on a polyethersulfone substrate. The ZnO film, formed by atomic layer deposition, shows a polycrystalline hexagonal structure with a band gap energy of about 3.37 eV. The fabricated ZnO TFT exhibits a field-effect mobility of 0.38 cm2/Vs and a threshold voltage of 0.2 V. The hysteresis of the device is mainly caused by trapped electrons at the c-PVA/ZnO interface, whereas the positive threshold voltage shift occurs as a consequence of constant positive gate bias stress after 5000 s due to an electron injection from the ZnO film into the c-PVA insulator.

Electrically controlled lens and prism using nanoscale polymer-dispersed and polymer-networked liquid crystals

NASA Astrophysics Data System (ADS)

Fan, Yun Hsing; Ren, Hongwen; Wu, Shin Tson

2004-05-01

Inhomogeneous nanoscale polymer-dispersed liquid crystal (PDLC) devices having gradient nanoscale droplet distribution were fabricated. This gradient refractive index nanoscale (GRIN) PDLC film was obtained by exposing the LC/ monomer with a uniform ultraviolet (UV) light through a patterned photomask. The monomer and LC were mixed at 70: 30 wt% ratio. The area exposed to a weaker UV intensity would produce a larger droplet size, and vice versa. Owing to the nanoscale LC droplets involved, the GRIN PDLC devices are highly transparent in the whole visible region. The gradient refractive index profile can be used as switchable prism gratings, Fresnel lens, and positive and negative lenses with tunable focal lengths. Such a GRIN PDLC device is a broadband device and independent of light polarization. The diffraction efficiency of the lens is controllable by the applied voltage. The major advantages of the GRIN PDLC devices are in simple fabrication process, polarization-independent, and fast switching speed, although the required driving voltage is higher than 100 Vrms. To lower the driving voltage, the technique of polymer-networked liquid crystal (PNLC) has been developed. The PNLC was also produced by exposing the LC/monomer mixture with a uniform UV light through a patterned photomask. However, the monomer concentration in PNLC is only around 2-5 wt%. The formed PNLC structure exhibits a gradient polymer network distribution. The LC in the regions stabilized by a higher polymer concentration exhibits a higher threshold voltage. By using this technique, prism grating, tunable electronic lens and Fresnel lens have been demonstrated. The driving voltage is around 10 Vrms. A drawback of this kind of device is polarization dependence. To overcome the polarization dependence, stacking two orthogonal homogeneous PNLC lens is considered.

Reliability Design for Neutron Induced Single-Event Burnout of IGBT

NASA Astrophysics Data System (ADS)

Shoji, Tomoyuki; Nishida, Shuichi; Ohnishi, Toyokazu; Fujikawa, Touma; Nose, Noboru; Hamada, Kimimori; Ishiko, Masayasu

Single-event burnout (SEB) caused by cosmic ray neutrons leads to catastrophic failures in insulated gate bipolar transistors (IGBTs). It was found experimentally that the incident neutron induced SEB failure rate increases as a function of the applied collector voltage. Moreover, the failure rate increased sharply with an increase in the applied collector voltage when the voltage exceeded a certain threshold value (SEB cutoff voltage). In this paper, transient device simulation results indicate that impact ionization at the n-drift/n+ buffer boundary is a crucially important factor in the turning-on of the parasitic pnp transistor, and eventually latch-up of the parasitic thyristor causes SEB. In addition, the device parameter dependency of the SEB cutoff voltage was analytically derived from the latch-up condition of the parasitic thyristor. As a result, it was confirmed that reducing the current gain of the parasitic transistor, such as by increasing the n-drift region thickness d was effective in increasing the SEB cutoff voltage. Furthermore, `white' neutron-irradiation experiments demonstrated that suppressing the inherent parasitic thyristor action leads to an improvement of the SEB cutoff voltage. It was confirmed that current gain optimization of the parasitic transistor is a crucial factor for establishing highly reliable design against chance failures.

'Soft' amplifier circuits based on field-effect ionic transistors.

PubMed

Boon, Niels; Olvera de la Cruz, Monica

2015-06-28

Soft materials can be used as the building blocks for electronic devices with extraordinary properties. We introduce a theoretical model for a field-effect transistor in which ions are the gated species instead of electrons. Our model incorporates readily-available soft materials, such as conductive porous membranes and polymer-electrolytes to represent a device that regulates ion currents and can be integrated as a component in larger circuits. By means of Nernst-Planck numerical simulations as well as an analytical description of the steady-state current we find that the responses of the system to various input voltages can be categorized into ohmic, sub-threshold, and active modes. This is fully analogous to what is known for the electronic field-effect transistor (FET). Pivotal FET properties such as the threshold voltage and the transconductance crucially depend on the half-cell redox potentials of the source and drain electrodes as well as on the polyelectrolyte charge density and the gate material work function. We confirm the analogy with the electronic FETs through numerical simulations of elementary amplifier circuits in which we successfully substitute the electronic transistor by an ionic transistor.

Electrical characteristic fluctuation of 16-nm-gate high-κ/metal gate bulk FinFET devices in the presence of random interface traps

NASA Astrophysics Data System (ADS)

Hsu, Sheng-Chia; Li, Yiming

2014-11-01

In this work, we study the impact of random interface traps (RITs) at the interface of SiO x /Si on the electrical characteristic of 16-nm-gate high-κ/metal gate (HKMG) bulk fin-type field effect transistor (FinFET) devices. Under the same threshold voltage, the effects of RIT position and number on the degradation of electrical characteristics are clarified with respect to different levels of RIT density of state ( D it). The variability of the off-state current ( I off) and drain-induced barrier lowering (DIBL) will be severely affected by RITs with high D it varying from 5 × 1012 to 5 × 1013 eV-1 cm-2 owing to significant threshold voltage ( V th) fluctuation. The results of this study indicate that if the level of D it is lower than 1 × 1012 eV-1 cm-2, the normalized variability of the on-state current, I off, V th, DIBL, and subthreshold swing is within 5%.

Energetic mapping of oxide traps in MoS2 field-effect transistors

NASA Astrophysics Data System (ADS)

Illarionov, Yury Yu; Knobloch, Theresia; Waltl, Michael; Rzepa, Gerhard; Pospischil, Andreas; Polyushkin, Dmitry K.; Furchi, Marco M.; Mueller, Thomas; Grasser, Tibor

2017-06-01

The performance of MoS2 transistors is strongly affected by charge trapping in oxide traps with very broad distributions of time constants. These defects degrade the mobility and additionally lead to the hysteresis of the gate transfer characteristics, which presents a crucial performance and reliability issue for these new technologies. Here we perform a detailed study of the hysteresis in double-gated MoS2 FETs and show that this issue is nothing else than a combination of threshold voltage shifts resulting from positive and negative bias-temperature instabilities. While these instabilities are well known from silicon devices, they are even more important in 2D devices given the considerably larger defect densities. Most importantly, the magnitudes of these threshold voltage shifts depend strongly on the density and energetic alignment of the active oxide traps. Based on this, we introduce the incremental hysteresis sweep method which allows for an accurate mapping of these defects and extract their energy distributions from simulations. By applying our method to analyze the impact of oxide traps situated in the Al2O3 top gate of several devices, we confirm its versatility. Since all 2D devices investigated so far suffer from a similar hysteresis behavior, the incremental hysteresis sweep method provides a unique and powerful way for the detailed characterization of their defect bands.

Effect of Electron Seeding on Experimentally Measured Multipactor Discharge Threshold

NASA Astrophysics Data System (ADS)

Noland, Jonathan; Graves, Timothy; Lemon, Colby; Looper, Mark; Farkas, Alex

2012-10-01

Multipactor is a vacuum phenomenon in which electrons, moving in resonance with an externally applied electric field, impact material surfaces. If the number of secondary electrons created per primary electron impact averages more than unity, the resonant interaction can lead to an electron avalanche. Multipactor is a generally undesirable phenomenon, as it can cause local heating, absorb power, or cause detuning of RF circuits. In order to increase the probability of multipactor initiation, test facilities often employ various seeding sources such as radioactive sources (Cesium 137, Strontium 90), electron guns, or photon sources. Even with these sources, the voltage for multipactor initiation is not certain as parameters such as material type, RF pulse length, and device wall thickness can all affect seed electron flux and energy in critical gap regions, and hence the measured voltage threshold. This study investigates the effects of seed electron source type (e.g., photons versus beta particles), material type, gap size, and RF pulse length variation on multipactor threshold. In addition to the experimental work, GEANT4 simulations will be used to estimate the production rate of low energy electrons (< 5 keV) by high energy electrons and photons. A comparison of the experimental fluxes to the typical energetic photon and particle fluxes experienced by spacecraft in various orbits will also be made. Initial results indicate that for a simple, parallel plate device made of aluminum, there is no threshold variation (with seed electrons versus with no seed electrons) under continuous-wave RF exposure.

Fast-responding short circuit protection system with self-reset for use in circuit supplied by DC power

NASA Technical Reports Server (NTRS)

Burns, Bradley M. (Inventor); Blalock, Norman N. (Inventor)

2011-01-01

A short circuit protection system includes an inductor, a switch, a voltage sensing circuit, and a controller. The switch and inductor are electrically coupled to be in series with one another. A voltage sensing circuit is coupled across the switch and the inductor. A controller, coupled to the voltage sensing circuit and the switch, opens the switch when a voltage at the output terminal of the inductor transitions from above a threshold voltage to below the threshold voltage. The controller closes the switch when the voltage at the output terminal of the inductor transitions from below the threshold voltage to above the threshold voltage.

Effects of Gold Nanoparticles on Pentacene Organic Field-Effect Transistors

NASA Astrophysics Data System (ADS)

Lee, Keanchuan; Weis, Martin; Ou-Yang, Wei; Taguchi, Dai; Manaka, Takaaki; Iwamoto, Mitsumasa

2011-04-01

The effect of gold nanoparticles (NPs) on pentacene organic field-effect transistors (OFETs) was being investigated by both DC and AC methods, which are current-voltage (I-V) measurements in steady-state and impedance spectroscopy (IS) respectively. Here poly(vinyl alcohol) (PVA) and PVA blended with Au NPs as composite are spin-coated on SiO2 as gate-insulator for top-contact pentacene OFET. The characteristics of the device were being investigated based on the contact resistance, trapped charges, effective mobility and threshold voltage based on transfer characteristics of OFET. Results revealed that OFET with NPs exhibited larger hysteresis and higher contact resistance at high voltage region. IS measurements were performed and the fitting of results by the Maxwell-Wagner equivalent circuit showed that for device with NPs a series of capacitance and resistance which represents trapping must be introduced in order to have agreeable fitting. The fitting had helped to clarify the reason behind the higher contact resistance and bigger hysteresis which was mainly caused by the space charge field formed by the traps when Au NPs were introduced into the device.

Increase the threshold voltage of high voltage GaN transistors by low temperature atomic hydrogen treatment

DOE Office of Scientific and Technical Information (OSTI.GOV)

Erofeev, E. V., E-mail: erofeev@micran.ru; Fedin, I. V.; Kutkov, I. V.

High-electron-mobility transistors (HEMTs) based on AlGaN/GaN epitaxial heterostructures are a promising element base for the fabrication of high voltage electronic devices of the next generation. This is caused by both the high mobility of charge carriers in the transistor channel and the high electric strength of the material, which makes it possible to attain high breakdown voltages. For use in high-power switches, normally off-mode GaN transistors operating under enhancement conditions are required. To fabricate normally off GaN transistors, one most frequently uses a subgate region based on magnesium-doped p-GaN. However, optimization of the p-GaN epitaxial-layer thickness and the doping levelmore » makes it possible to attain a threshold voltage of GaN transistors close to V{sub th} = +2 V. In this study, it is shown that the use of low temperature treatment in an atomic hydrogen flow for the p-GaN-based subgate region before the deposition of gate-metallization layers makes it possible to increase the transistor threshold voltage to V{sub th} = +3.5 V. The effects under observation can be caused by the formation of a dipole layer on the p-GaN surface induced by the effect of atomic hydrogen. The heat treatment of hydrogen-treated GaN transistors in a nitrogen environment at a temperature of T = 250°C for 12 h reveals no degradation of the transistor’s electrical parameters, which can be caused by the formation of a thermally stable dipole layer at the metal/p-GaN interface as a result of hydrogenation.« less

Electrical properties of MOS devices fabricated on the 4H-SiC C-face.

NASA Astrophysics Data System (ADS)

Chen, Zengjun; Ahyi, A. C.; Williams, J. R.

2007-11-01

The electrical characteristics of MOS devices fabricated on the carbon face of 4H-SiC will be described. The C-face has a higher oxidation rate and a higher interface trap density compared to the Si-face. The thermal oxidation rate and the distribution of interface traps under different oxidation conditions will be discussed in this presentation. Sequential post-oxidation anneals in nitric oxide and hydrogen effectively reduces the interface density (Dit) near the conduction band edge. However, deeper in the band gap, the trap density remains higher compared to the Si-face. Time-dependent dielectric breakdown (TDDB) studies have also been performed to investigate oxide reliability on the C-face, and current-voltage measurements show that a low barrier height against carrier injection likely contributes to oxide degradation. Nevertheless, the effective channel mobility and threshold voltage for n-channel C-face lateral MOSFETs compare favorably with similar Si-face devices.

Memory properties of a Ge nanoring MOS device fabricated by pulsed laser deposition.

PubMed

Ma, Xiying

2008-07-09

The non-volatile charge-storage properties of memory devices with MOS structure based on Ge nanorings have been studied. The two-dimensional Ge nanorings were prepared on a p-Si(100) matrix by means of pulsed laser deposition (PLD) using the droplet technique combined with rapid annealing. Complete planar nanorings with well-defined sharp inner and outer edges were formed via an elastic self-transformation droplet process, which is probably driven by the lateral strain of the Ge/Si layers and the surface tension in the presence of Ar gas. The low leakage current was attributed to the small roughness and the few interface states in the planar Ge nanorings, and also to the effect of Coulomb blockade preventing injection. A significant threshold-voltage shift of 2.5 V was observed when an operating voltage of 8 V was implemented on the device.

Synthesis of polymer nanostructures with conductance switching properties

DOEpatents

Su, Kai; Nuraje, Nurxat; Zhang, Lingzhi; Matsui, Hiroshi; Yang, Nan Loh

2015-03-03

The present invention is directed to crystalline organic polymer nanoparticles comprising a conductive organic polymer; wherein the crystalline organic polymer nanoparticles have a size of from 10 nm to 200 nm and exhibits two current-voltage states: (1) a high resistance current-voltage state, and (2) a low resistance current-voltage state, wherein when a first positive threshold voltage (V.sub.th1) or higher positive voltage, or a second negative threshold voltage (V.sub.th2) or higher negative voltage is applied to the nanoparticle, the nanoparticle exhibits the low-resistance current-voltage state, and when a voltage less positive than the first positive threshold voltage or a voltage less negative than the second negative threshold voltage is applied to the nanoparticle, the nanoparticle exhibits the high-resistance current-voltage state. The present invention is also directed methods of manufacturing the nanoparticles using novel interfacial oxidative polymerization techniques.

Instability of phosphorous doped SiO2 in 4H-SiC MOS capacitors at high temperatures

NASA Astrophysics Data System (ADS)

Idris, M. I.; Weng, M. H.; Chan, H.-K.; Murphy, A. E.; Clark, D. T.; Young, R. A. R.; Ramsay, E. P.; Wright, N. G.; Horsfall, A. B.

2016-12-01

In this paper, the effect of inclusion of phosphorous (at a concentration below 1%) on the high temperature characteristics (up to 300 °C) of the SiO2/SiC interface is investigated. Capacitance-voltage measurements taken for a range of frequencies have been utilized to extract parameters including flatband voltage, threshold voltage, effective oxide charge, and interface state density. The variation of these parameters with temperature has been investigated for bias sweeps in opposing directions and a comparison made between phosphorous doped and as-grown oxides. At room temperature, the effective oxide charge for SiO2 may be reduced by the phosphorous termination of dangling bonds at the interface. However, at high temperatures, the effective charge in the phosphorous doped oxide remains unstable and effects such as flatband voltage shift and threshold voltage shift dominate the characteristics. The instability in these characteristics was found to result from the trapped charges in the oxide (±1012 cm-3) or near interface traps at the interface of the gate oxide and the semiconductor (1012-1013 cm-2 eV-1). Hence, the performance enhancements observed for phosphorous doped oxides are not realised in devices operated at elevated temperatures.

Pentacene-based low voltage organic field-effect transistors with anodized Ta2O5 gate dielectric

NASA Astrophysics Data System (ADS)

Jeong, Yeon Taek; Dodabalapur, Ananth

2007-11-01

Pentacene-based low voltage organic field-effect transistors were realized using an anodized Ta2O5 gate dielectric. The Ta2O5 gate dielectric layer with a surface roughness of 1.3Å was obtained by anodizing an e-beam evaporated Ta film. The device exhibited values of saturation mobility, threshold voltage, and Ion/Ioff ratio of 0.45cm2/Vs, 0.56V, and 7.5×101, respectively. The gate leakage current was reduced by more than 70% with a hexamethyldisilazane (HMDS) treatment on the Ta2O5 layer. The HMDS treatment also resulted in enhanced mobility values and a larger pentacene grain size.

High performance n-channel thin-film transistors with an amorphous phase C60 film on plastic substrate

NASA Astrophysics Data System (ADS)

Na, Jong H.; Kitamura, M.; Arakawa, Y.

2007-11-01

We fabricated high mobility, low voltage n-channel transistors on plastic substrates by combining an amorphous phase C60 film and a high dielectric constant gate insulator titanium silicon oxide (TiSiO2). The transistors exhibited high performance with a threshold voltage of 1.13V, an inverse subthreshold swing of 252mV/decade, and a field-effect mobility up to 1cm2/Vs at an operating voltage as low as 5V. The amorphous phase C60 films can be formed at room temperature, implying that this transistor is suitable for corresponding n-channel transistors in flexible organic logic devices.

Avalanche multiplication in AlGaN-based heterostructures for the ultraviolet spectral range

NASA Astrophysics Data System (ADS)

Hahn, L.; Fuchs, F.; Kirste, L.; Driad, R.; Rutz, F.; Passow, T.; Köhler, K.; Rehm, R.; Ambacher, O.

2018-04-01

AlxGa1-xN based avalanche photodiodes grown on sapphire substrate with Al-contents of x = 0.65 and x = 0.60 have been examined under back- and frontside illumination with respect to their avalanche gain properties. The photodetectors suitable for the solar-blind ultraviolet spectral regime show avalanche gain for voltages in excess of 30 V reverse bias in the linear gain mode. Devices with a mesa diameter of 100 μm exhibit stable avalanche gain below the break through threshold voltage, exceeding a multiplication gain of 5500 at 84 V reverse bias. A dark current below 1 pA can be found for reverse voltages up to 60 V.

Effects of surface plasma treatment on threshold voltage hysteresis and instability in metal-insulator-semiconductor (MIS) AlGaN/GaN heterostructure HEMTs

NASA Astrophysics Data System (ADS)

Zaidi, Z. H.; Lee, K. B.; Roberts, J. W.; Guiney, I.; Qian, H.; Jiang, S.; Cheong, J. S.; Li, P.; Wallis, D. J.; Humphreys, C. J.; Chalker, P. R.; Houston, P. A.

2018-05-01

In a bid to understand the commonly observed hysteresis in the threshold voltage (VTH) in AlGaN/GaN metal-insulator-semiconductor high electron mobility transistors during forward gate bias stress, we have analyzed a series of measurements on devices with no surface treatment and with two different plasma treatments before the in-situ Al2O3 deposition. The observed changes between samples were quasi-equilibrium VTH, forward bias related VTH hysteresis, and electrical response to reverse bias stress. To explain these effects, a disorder induced gap state model, combined with a discrete level donor, at the dielectric/semiconductor interface was employed. Technology Computer-Aided Design modeling demonstrated the possible differences in the interface state distributions that could give a consistent explanation for the observations.

The operation of 0.35 μm partially depleted SOI CMOS technology in extreme environments

NASA Astrophysics Data System (ADS)

Li, Ying; Niu, Guofu; Cressler, John D.; Patel, Jagdish; Liu, S. T.; Reed, Robert A.; Mojarradi, Mohammad M.; Blalock, Benjamin J.

2003-06-01

We evaluate the usefulness of partially depleted SOI CMOS devices fabricated in a 0.35 μm technology on UNIBOND material for electronics applications requiring robust operation under extreme environment conditions consisting of low and/or high temperature, and under substantial radiation exposure. The threshold voltage, effective mobility, and the impact ionization parameters were determined across temperature for both the nFETs and the pFETs. The radiation response was characterized using threshold voltage shifts of both the front-gate and back-gate transistors. These results suggest that this 0.35 μm partially depleted SOI CMOS technology is suitable for operation across a wide range of extreme environment conditions consisting of: cryogenic temperatures down to 86 K, elevated temperatures up to 573 K, and under radiation exposure to 1.3 Mrad(Si) total dose.

Electric-field induced surface instabilities of soft dielectrics and their effects on optical transmittance and scattering

NASA Astrophysics Data System (ADS)

Shian, Samuel; Kjeer, Peter; Clarke, David R.

2018-03-01

When a voltage is applied to a percolative, mechanically compliant mat of carbon nanotubes (CNTs) on a smooth elastomer bilayer attached to an ITO coated glass substrate, the in-line optical transmittance decreases with increasing voltage. Two regimes of behavior have been identified based on optical scattering, bright field optical microscopy, and confocal optical microscopy. In the low field regime, the electric field produces a spatially inhomogeneous surface deformation of the elastomer that causes local variations in optical refraction and modulates the light transmittance. The spatial variation is associated with the distribution of the CNTs over the surface. At higher fields, above a threshold voltage, an array of pits in the surface form by a nucleation and growth mechanism and these also scatter light. The formation of pits, and creases, in the thickness of the elastomer, is due to a previously identified electro-mechanical surface instability. When the applied voltage is decreased from its maximum, the transmittance returns to its original value although there is a transmittance hysteresis and a complicated time response. When the applied voltage exceeds the threshold voltage, there can be remnant optical contrast associated with creasing of the elastomer and the recovery time appears to be dependent on local jamming of CNTs in areas where the pits formed. A potential application of this work as an electrically tunable privacy window or camouflaging devices is demonstrated.

Quantification of the memory imprint effect for a charged particle environment

NASA Technical Reports Server (NTRS)

Bhuva, B. L.; Johnson, R. L., Jr.; Gyurcsik, R. S.; Kerns, S. E.; Fernald, K. W.

1987-01-01

The effects of total accumulated dose on the single-event vulnerability of NMOS resistive-load SRAMs are investigated. The bias-dependent shifts in device parameters can imprint the memory state present during exposure or erase the imprinted state. Analysis of these effects is presented along with an analytic model developed for the quantification of these effects. The results indicate that the imprint effect is dominated by the difference in the threshold voltage of the n-channel devices.

Fabrication of quantum dots in undoped Si/Si 0.8Ge 0.2 heterostructures using a single metal-gate layer

DOE PAGES

Lu, T. M.; Gamble, J. K.; Muller, R. P.; ...

2016-08-01

Enhancement-mode Si/SiGe electron quantum dots have been pursued extensively by many groups for their potential in quantum computing. Most of the reported dot designs utilize multiple metal-gate layers and use Si/SiGe heterostructures with Ge concentration close to 30%. Here, we report the fabrication and low-temperature characterization of quantum dots in the Si/Si 0.8Ge 0.2 heterostructures using only one metal-gate layer. We find that the threshold voltage of a channel narrower than 1 μm increases as the width decreases. The higher threshold can be attributed to the combination of quantum confinement and disorder. We also find that the lower Ge ratiomore » used here leads to a narrower operational gate bias range. The higher threshold combined with the limited gate bias range constrains the device design of lithographic quantum dots. We incorporate such considerations in our device design and demonstrate a quantum dot that can be tuned from a single dot to a double dot. Furthermore, the device uses only a single metal-gate layer, greatly simplifying device design and fabrication.« less

Negative differential resistance and resistive switching in SnO2/ZnO interface

NASA Astrophysics Data System (ADS)

Pant, Rohit; Patel, Nagabhushan; Nanda, K. K.; Krupanidhi, S. B.

2017-09-01

We report a very stable negative differential resistance (NDR) and resistive switching (RS) behavior of highly transparent thin films of the SnO2/ZnO bilayer, deposited by magnetron sputtering. When this bilayer of SnO2/ZnO was annealed at temperatures above 400 °C, ZnO diffuses into SnO2 at the threading dislocations and gaps between the grain boundaries, leading to the formation of a ZnO nanostructure surrounded by SnO2. Such a configuration forms a resonant tunneling type structure with SnO2/ZnO/SnO2…….ZnO/SnO2 interface formation. Interestingly, the heterostructure exhibits a Gunn diode-like behavior and shows NDR and RS irrespective of the voltage sweep direction, which is the characteristic of unipolar devices. A threshold voltage of ˜1.68 V and a peak-to-valley ratio of current ˜2.5 are observed for an electrode separation of 2 mm, when the bias is swept from -5 V to +5 V. It was also observed that the threshold voltage can be tuned with changing distance between the electrodes. The device shows a very stable RS with a uniform ratio of about 3.4 between the high resistive state and the low resistive state. Overall, the results demonstrate the application of SnO2/ZnO bilayer thin films in transparent electronics.

Effect of cation amount in the electrolyte on characteristics of Ag/TiO2 based threshold switching devices.

PubMed

Yoo, Jongmyung; Song, Jeonghwan; Hwang, Hyunsang

2018-06-18

In this study, we investigate the effect of cation amount in electrolyte on Ag/TiO2 based threshold switching devices based on field-induced nucleation theory. For this purpose, normal Ag/TiO2, annealed Ag/TiO2, and Ag-Te/TiO2 based TS devices are prepared, which have different cation amounts in their electrolytes during the switching process. First, we find that all of the prepared TS devices follow the field-induced nucleation theory with different nucleation barrier energy (W0) by investigating the delay time dependency at various voltages and temperatures. Based on the investigation, we reveal that the amount of cations in the electrolyte during the switching process is the control parameter that affects the W0 values, which are found to be inversely proportional to the turn-off speed of the TS devices. This implies that the turn-off speed of the TS devices can be modulated by controlling the amount of cations in the matrix. © 2018 IOP Publishing Ltd.

2D Quantum Mechanical Study of Nanoscale MOSFETs

NASA Technical Reports Server (NTRS)

Svizhenko, Alexei; Anantram, M. P.; Govindan, T. R.; Biegel, B.; Kwak, Dochan (Technical Monitor)

2000-01-01

With the onset of quantum confinement in the inversion layer in nanoscale MOSFETs, behavior of the resonant level inevitably determines all device characteristics. While most classical device simulators take quantization into account in some simplified manner, the important details of electrostatics are missing. Our work addresses this shortcoming and provides: (a) a framework to quantitatively explore device physics issues such as the source-drain and gate leakage currents, DIBL, and threshold voltage shift due to quantization, and b) a means of benchmarking quantum corrections to semiclassical models (such as density-gradient and quantum-corrected MEDICI). We have developed physical approximations and computer code capable of realistically simulating 2-D nanoscale transistors, using the non-equilibrium Green's function (NEGF) method. This is the most accurate full quantum model yet applied to 2-D device simulation. Open boundary conditions and oxide tunneling are treated on an equal footing. Electrons in the ellipsoids of the conduction band are treated within the anisotropic effective mass approximation. We present the results of our simulations of MIT 25, 50 and 90 nm "well-tempered" MOSFETs and compare them to those of classical and quantum corrected models. The important feature of quantum model is smaller slope of Id-Vg curve and consequently higher threshold voltage. Surprisingly, the self-consistent potential profile shows lower injection barrier in the channel in quantum case. These results are qualitatively consistent with ID Schroedinger-Poisson calculations. The effect of gate length on gate-oxide leakage and subthreshold current has been studied. The shorter gate length device has an order of magnitude smaller current at zero gate bias than the longer gate length device without a significant trade-off in on-current. This should be a device design consideration.

Suppressing the memory state of floating gate transistors with repeated femtosecond laser backside irradiations

NASA Astrophysics Data System (ADS)

Chambonneau, Maxime; Souiki-Figuigui, Sarra; Chiquet, Philippe; Della Marca, Vincenzo; Postel-Pellerin, Jérémy; Canet, Pierre; Portal, Jean-Michel; Grojo, David

2017-04-01

We demonstrate that infrared femtosecond laser pulses with intensity above the two-photon ionization threshold of crystalline silicon induce charge transport through the tunnel oxide in floating gate Metal-Oxide-Semiconductor transistor devices. With repeated irradiations of Flash memory cells, we show how the laser-produced free-electrons naturally redistribute on both sides of the tunnel oxide until the electric field of the transistor is suppressed. This ability enables us to determine in a nondestructive, rapid and contactless way the flat band and the neutral threshold voltages of the tested device. The physical mechanisms including nonlinear ionization, quantum tunneling of free-carriers, and flattening of the band diagram are discussed for interpreting the experiments. The possibility to control the carriers in memory transistors with ultrashort pulses holds promises for fast and remote device analyses (reliability, security, and defectivity) and for considerable developments in the growing field of ultrafast microelectronics.

Two dimensional analytical model for a reconfigurable field effect transistor

NASA Astrophysics Data System (ADS)

Ranjith, R.; Jayachandran, Remya; Suja, K. J.; Komaragiri, Rama S.

2018-02-01

This paper presents two-dimensional potential and current models for a reconfigurable field effect transistor (RFET). Two potential models which describe subthreshold and above-threshold channel potentials are developed by solving two-dimensional (2D) Poisson's equation. In the first potential model, 2D Poisson's equation is solved by considering constant/zero charge density in the channel region of the device to get the subthreshold potential characteristics. In the second model, accumulation charge density is considered to get above-threshold potential characteristics of the device. The proposed models are applicable for the device having lightly doped or intrinsic channel. While obtaining the mathematical model, whole body area is divided into two regions: gated region and un-gated region. The analytical models are compared with technology computer-aided design (TCAD) simulation results and are in complete agreement for different lengths of the gated regions as well as at various supply voltage levels.

Vertical-cavity surface-emitting lasers come of age

NASA Astrophysics Data System (ADS)

Morgan, Robert A.; Lehman, John A.; Hibbs-Brenner, Mary K.

1996-04-01

This manuscript reviews our efforts in demonstrating state-of-the-art planar, batch-fabricable, high-performance vertical-cavity surface-emitting lasers (VCSELs). All performance requirements for short-haul data communication applications are clearly established. We concentrate on the flexibility of the established proton-implanted AlGaAs-based (emitting near 850 nm) technology platform, focusing on a standard device design. This structure is shown to meet or exceed performance and producibility requirements. These include > 99% device yield across 3-in-dia. metal-organic vapor phase epitaxy (MOVPE)-grown wafers and wavelength operation across a > 100-nm range. Recent progress in device performance [low threshold voltage (Vth equals 1.53 V); threshold current (Ith equals 0.68 mA); continuous wave (CW) power (Pcw equals 59 mW); maximum and minimum CW lasing temperature (T equals 200 degree(s)C, 10 K); and wall-plug efficiencies ((eta) wp equals 28%)] should enable great advances in VCSEL-based technologies. We also discuss the viability of VCSELs in cryogenic and avionic/military environments. Also reviewed is a novel technique, modifying this established platform, to engineer low-threshold, high-speed, single- mode VCSELs.

Extended-gate organic field-effect transistor for the detection of histamine in water

NASA Astrophysics Data System (ADS)

Minamiki, Tsukuru; Minami, Tsuyoshi; Yokoyama, Daisuke; Fukuda, Kenjiro; Kumaki, Daisuke; Tokito, Shizuo

2015-04-01

As part of our ongoing research program to develop health care sensors based on organic field-effect transistor (OFET) devices, we have attempted to detect histamine using an extended-gate OFET. Histamine is found in spoiled or decayed fish, and causes foodborne illness known as scombroid food poisoning. The new OFET device possesses an extended gate functionalized by carboxyalkanethiol that can interact with histamine. As a result, we have succeeded in detecting histamine in water through a shift in OFET threshold voltage. This result indicates the potential utility of the designed OFET devices in food freshness sensing.

Corona-vacuum failure mechanism test facilities

NASA Technical Reports Server (NTRS)

Lalli, V. R.; Mueller, L. A.; Koutnik, E. A.

1975-01-01

A nondestructive corona-vacuum test facility for testing high-voltage power system components has been developed using commercially available hardware. The facility simulates operating temperature and vacuum while monitoring coronal discharges with residual gases. Corona threshold voltages obtained from statorette tests with various gas-solid dielectric systems and comparison with calculated data support the following conclusions: (1) air gives the highest corona threshold voltage and helium the lowest, with argon and helium-xenon mixtures intermediate; (2) corona threshold voltage increases with gas pressure; (3) corona threshold voltage for an armature winding can be accurately calculated by using Paschen curves for a uniform field; and (4) Paschen curves for argon can be used to calculate the corona threshold voltage in He-Xe mixtures, for which Paschen curves are unavailable.-

Threshold-Voltage-Shift Compensation and Suppression Method Using Hydrogenated Amorphous Silicon Thin-Film Transistors for Large Active Matrix Organic Light-Emitting Diode Displays

NASA Astrophysics Data System (ADS)

Oh, Kyonghwan; Kwon, Oh-Kyong

2012-03-01

A threshold-voltage-shift compensation and suppression method for active matrix organic light-emitting diode (AMOLED) displays fabricated using a hydrogenated amorphous silicon thin-film transistor (TFT) backplane is proposed. The proposed method compensates for the threshold voltage variation of TFTs due to different threshold voltage shifts during emission time and extends the lifetime of the AMOLED panel. Measurement results show that the error range of emission current is from -1.1 to +1.7% when the threshold voltage of TFTs varies from 1.2 to 3.0 V.

A study on the resistance switching of Ag2Se and Ta2O5 heterojunctions using structural engineering

NASA Astrophysics Data System (ADS)

Lee, Tae Sung; Lee, Nam Joo; Abbas, Haider; Hu, Quanli; Yoon, Tae-Sik; Lee, Hyun Ho; Le Shim, Ee; Kang, Chi Jung

2018-01-01

The resistive random access memory (RRAM) devices with heterostuctures have been investigated due to cycling stability, nonlinear switching, complementary resistive switching and self-compliance. The heterostructured devices can modulate the resistive switching (RS) behavior appropriately by bilayer structure with a variety of materials. In this study, the bipolar resistive switching characteristics of the bilayer structures composed of Ta2O5 and Ag2Se, which are transition-metal oxide (TMO) and silver chalcogenide, were investigated. The bilayer devices of Ta2O5 deposited on Ag2Se (Ta2O5/Ag2Se) and Ag2Se deposited on Ta2O5 (Ag2Se/Ta2O5) were fabricated for investigation of the RS characteristics by stacking sequence of Ta2O5 and Ag2Se. All operating voltages were applied to the Ag top electrode with the Pt bottom electrode grounded. The Ta2O5/Ag2Se device showed that a negative voltage sweep switched the device from high resistance state (HRS) to low resistance state (LRS) and a positive voltage sweep switched the device from LRS to HRS. On the contrary, for the Ag2Se/Ta2O5 device a positive voltage sweep switched the device from HRS to LRS, and a negative voltage sweep switched it from LRS to HRS. The polarity dependence of RS was attributed to the stacking sequence of Ta2O5 and Ag2Se. In addition, the combined heterostructured device of both bilayer stacks, Ta2O5/Ag2Se and Ag2Se/Ta2O5, exhibited the complementary switching characteristics. By using threshold switching devices, sneak path leakage can be reduced without additional selectors. The bilayer heterostructures of Ta2O5 and Ag2Se have various advantages such as self-compliance, reproducibility and forming-free stable RS. It confirms the possible applications of TMO and silver chalcogenide heterostructures in RRAM.

Efficient III-Nitride MIS-HEMT devices with high-κ gate dielectric for high-power switching boost converter circuits

NASA Astrophysics Data System (ADS)

Mohanbabu, A.; Mohankumar, N.; Godwin Raj, D.; Sarkar, Partha; Saha, Samar K.

2017-03-01

The paper reports the results of a systematic theoretical study on efficient recessed-gate, double-heterostructure, and normally-OFF metal-insulator-semiconductor high-electron mobility transistors (MIS-HEMTs), HfAlOx/AlGaN on Al2O3 substrate. In device architecture, a thin AlGaN layer is used in the AlGaN graded barrier MIS-HEMTs that offers an excellent enhancement-mode device operation with threshold voltage higher than 5.3 V and drain current above 0.64 A/mm along with high on-current/off-current ratio over 107 and subthreshold slope less than 73 mV/dec. In addition, a high OFF-state breakdown voltage of 1200 V is achieved for a device with a gate-to-drain distance and field-plate length of 15 μm and 5.3 μm, respectively at a drain current of 1 mA/mm with a zero gate bias, and the substrate grounded. The numerical device simulation results show that in comparison to a conventional AlGaN/GaN MIS-HEMT of similar design, a graded barrier MIS-HEMT device exhibits a better interface property, remarkable suppression of leakage current, and a significant improvement of breakdown voltage for HfAlOx gate dielectric. Finally, the benefit of HfAlOx graded-barrier AlGaN MIS-HEMTs based switching devices is evaluated on an ultra-low-loss converter circuit.

Nanoscale structural and chemical analysis of F-implanted enhancement-mode InAlN/GaN heterostructure field effect transistors

NASA Astrophysics Data System (ADS)

Tang, Fengzai; Lee, Kean B.; Guiney, Ivor; Frentrup, Martin; Barnard, Jonathan S.; Divitini, Giorgio; Zaidi, Zaffar H.; Martin, Tomas L.; Bagot, Paul A.; Moody, Michael P.; Humphreys, Colin J.; Houston, Peter A.; Oliver, Rachel A.; Wallis, David J.

2018-01-01

We investigate the impact of a fluorine plasma treatment used to obtain enhancement-mode operation on the structure and chemistry at the nanometer and atomic scales of an InAlN/GaN field effect transistor. The fluorine plasma treatment is successful in that enhancement mode operation is achieved with a +2.8 V threshold voltage. However, the InAlN barrier layers are observed to have been damaged by the fluorine treatment with their thickness being reduced by up to 50%. The treatment also led to oxygen incorporation within the InAlN barrier layers. Furthermore, even in the as-grown structure, Ga was unintentionally incorporated during the growth of the InAlN barrier. The impact of both the reduced barrier thickness and the incorporated Ga within the barrier on the transistor properties has been evaluated theoretically and compared to the experimentally determined two-dimensional electron gas density and threshold voltage of the transistor. For devices without fluorine treatment, the two-dimensional electron gas density is better predicted if the quaternary nature of the barrier is taken into account. For the fluorine treated device, not only the changes to the barrier layer thickness and composition, but also the fluorine doping needs to be considered to predict device performance. These studies reveal the factors influencing the performance of these specific transistor structures and highlight the strengths of the applied nanoscale characterisation techniques in revealing information relevant to device performance.

Comparison of trapped charges and hysteresis behavior in hBN encapsulated single MoS2 flake based field effect transistors on SiO2 and hBN substrates.

PubMed

Lee, Changhee; Rathi, Servin; Khan, Muhammad Atif; Lim, Dongsuk; Kim, Yunseob; Yun, Sun Jin; Youn, Doo-Hyeb; Watanabe, Kenji; Taniguchi, Takashi; Kim, Gil-Ho

2018-08-17

Molybdenum disulfide (MoS 2 ) based field effect transistors (FETs) are of considerable interest in electronic and opto-electronic applications but often have large hysteresis and threshold voltage instabilities. In this study, by using advanced transfer techniques, hexagonal boron nitride (hBN) encapsulated FETs based on a single, homogeneous and atomic-thin MoS 2 flake are fabricated on hBN and SiO 2 substrates. This allows for a better and a precise comparison between the charge traps at the semiconductor-dielectric interfaces at MoS 2 -SiO 2 and hBN interfaces. The impact of ambient environment and entities on hysteresis is minimized by encapsulating the active MoS 2 layer with a single hBN on both the devices. The device to device variations induced by different MoS 2 layer is also eliminated by employing a single MoS 2 layer for fabricating both devices. After eliminating these additional factors which induce variation in the device characteristics, it is found from the measurements that the trapped charge density is reduced to 1.9 × 10 11 cm -2 on hBN substrate as compared to 1.1 × 10 12 cm -2 on SiO 2 substrate. Further, reduced hysteresis and stable threshold voltage are observed on hBN substrate and their dependence on gate sweep rate, sweep range, and gate stress is also studied. This precise comparison between encapsulated devices on SiO 2 and hBN substrates further demonstrate the requirement of hBN substrate and encapsulation for improved and stable performance of MoS 2 FETs.

Adaptive Circuits for the 0.5-V Nanoscale CMOS Era

NASA Astrophysics Data System (ADS)

Itoh, Kiyoo; Yamaoka, Masanao; Oshima, Takashi

The minimum operating voltage, Vmin, of nanoscale CMOS LSIs is investigated to breach the 1-V wall that we are facing in the 65-nm device generation, and open the door to the below 0.5-V era. A new method using speed variation is proposed to evaluate Vmin. It shows that Vmin is very sensitive to the lowest necessary threshold voltage, Vt0, of MOSFETs and to threshold-voltage variations, ΔVt, which become more significant with device scaling. There is thus a need for low-Vt0 circuits and ΔVt-immune MOSFETs to reduce Vmin. For memory-rich LSIs, the SRAM block is particularly problematic because it has the highest Vmin. Various techniques are thus proposed to reduce the Vmin: using RAM repair, shortening the data line, up-sizing, and using more relaxed MOSFET scaling. To effectively reduce Vmin of other circuit blocks, dual-Vt0 and dual-VDD circuits using gate-source reverse biasing, temporary activation, and series connection of another small low-Vt0 MOSFET are proposed. They are dynamic logic circuits enabling the power-delay product of the conventional static CMOS inverter to be reduced to 0.09 at a 0.2-V supply, and a DRAM dynamic sense amplifier and power switches operable at below 0.5V. In addition, a fully-depleted structure (FD-SOI) and fin-type structure (FinFET) for Vt-immune MOSFETs are discussed in terms of their low-voltage potential and challenges. As a result, the height up-scalable FinFETs turns out to be quite effective to reduce Vmin to less than 0.5V, if combined with the low-Vt0 circuits. For mixed-signal LSIs, investigation of low-voltage potential of analog circuits, especially for comparators and operational amplifiers, reveals that simple inverter op-amps, in which the low gain and nonlinearity are compensated for by digitally assisted analog designs, are crucial to 0.5-V operations. Finally, it is emphasized that the development of relevant devices and fabrication processes is the key to the achievement of 0.5-V nanoscale LSIs.

Low-voltage all-inorganic perovskite quantum dot transistor memory

NASA Astrophysics Data System (ADS)

Chen, Zhiliang; Zhang, Yating; Zhang, Heng; Yu, Yu; Song, Xiaoxian; Zhang, Haiting; Cao, Mingxuan; Che, Yongli; Jin, Lufan; Li, Yifan; Li, Qingyan; Dai, Haitao; Yang, Junbo; Yao, Jianquan

2018-05-01

An all-inorganic cesium lead halide quantum dot (QD) based Au nanoparticle (NP) floating-gate memory with a solution processed layer-by-layer method is demonstrated. Easy synthesis at room temperature and excellent stability make all-inorganic CsPbBr3 perovskite QDs suitable as a semiconductor layer in low voltage nonvolatile transistor memory. The bipolarity of QDs has both electrons and holes stored in the Au NP floating gate, resulting in bidirectional shifts of initial threshold voltage according to the applied programing and erasing pulses. Under low operation voltage (±5 V), the memory achieved a great memory window (˜2.4 V), long retention time (>105 s), and stable endurance properties after 200 cycles. So the proposed memory device based on CsPbBr3 perovskite QDs has a great potential in the flash memory market.

Composition-dependent nanoelectronics of amido-phenazines: non-volatile RRAM and WORM memory devices.

PubMed

Maiti, Dilip K; Debnath, Sudipto; Nawaz, Sk Masum; Dey, Bapi; Dinda, Enakhi; Roy, Dipanwita; Ray, Sudipta; Mallik, Abhijit; Hussain, Syed A

2017-10-17

A metal-free three component cyclization reaction with amidation is devised for direct synthesis of DFT-designed amido-phenazine derivative bearing noncovalent gluing interactions to fabricate organic nanomaterials. Composition-dependent organic nanoelectronics for nonvolatile memory devices are discovered using mixed phenazine-stearic acid (SA) nanomaterials. We discovered simultaneous two different types of nonmagnetic and non-moisture sensitive switching resistance properties of fabricated devices utilizing mixed organic nanomaterials: (a) sample-1(8:SA = 1:3) is initially off, turning on at a threshold, but it does not turn off again with the application of any voltage, and (b) sample-2 (8:SA = 3:1) is initially off, turning on at a sharp threshold and off again by reversing the polarity. No negative differential resistance is observed in either type. These samples have different device implementations: sample-1 is attractive for write-once-read-many-times memory devices, such as novel non-editable database, archival memory, electronic voting, radio frequency identification, sample-2 is useful for resistive-switching random access memory application.

A Vertical Organic Transistor Architecture for Fast Nonvolatile Memory.

PubMed

She, Xiao-Jian; Gustafsson, David; Sirringhaus, Henning

2017-02-01

A new device architecture for fast organic transistor memory is developed, based on a vertical organic transistor configuration incorporating high-performance ambipolar conjugated polymers and unipolar small molecules as the transport layers, to achieve reliable and fast programming and erasing of the threshold voltage shift in less than 200 ns. © 2016 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

47 CFR 15.323 - Specific requirements for devices operating in the 1920-1930 MHz band.

Code of Federal Regulations, 2012 CFR

2012-10-01

... monitoring threshold must not be more than 30 dB above the thermal noise power for a bandwidth equivalent to... that is capable only of operating from a battery, the frequency stability tests shall be performed using a new battery without any further requirement to vary supply voltage. [58 FR 59180, Nov. 8, 1993...

47 CFR 15.323 - Specific requirements for devices operating in the 1920-1930 MHz band.

Code of Federal Regulations, 2013 CFR

2013-10-01

... monitoring threshold must not be more than 30 dB above the thermal noise power for a bandwidth equivalent to... that is capable only of operating from a battery, the frequency stability tests shall be performed using a new battery without any further requirement to vary supply voltage. [58 FR 59180, Nov. 8, 1993...

47 CFR 15.323 - Specific requirements for devices operating in the 1920-1930 MHz band.

Code of Federal Regulations, 2014 CFR

2014-10-01

... monitoring threshold must not be more than 30 dB above the thermal noise power for a bandwidth equivalent to... that is capable only of operating from a battery, the frequency stability tests shall be performed using a new battery without any further requirement to vary supply voltage. [58 FR 59180, Nov. 8, 1993...

Effects of various gate materials on electrical degradation of a-Si:H TFT in industrial display application

NASA Astrophysics Data System (ADS)

Ho, Ching-Yuan; Chang, Yaw-Jen

2016-02-01

Both aluminum (Al) and copper (Cu), acting as transmission lines in the hydrogenated amorphous silicon of a thin film transistor (a-Si:H TFT), were studied to investigate electrical degradation including electron-migration (EM) and threshold voltage (Vt) stability and recovery performance. Under long-term current stress, the Cu material exhibited excellent resistance to EM properties, but a passivated SiNx crack was observed due to fast heat conductivity. By applying electrical stress on the gate and drain for 5 × 104 s, the power-law time dependency of the threshold voltage shift (ΔVt) indicated that the defective state creation dominated the TFT device's instability. The presence of drain stress increased the overall ΔVt because the high longitudinal field induced impact ionization and then, enhanced hot-carrier-induced electron trapping within the gate SiNx dielectric. An annealing effect prompted a stressed a-Si:H TFT back to virgin status. This study proposes better ΔVt stability and excellent resistance against electron-migration in a Cu gate device which can be considered as a candidate for a transmission line on prolonged TFT applications.

Performance improvement of organic thin film transistors by using active layer with sandwich structure

NASA Astrophysics Data System (ADS)

Ni, Yao; Zhou, Jianlin; Kuang, Peng; Lin, Hui; Gan, Ping; Hu, Shengdong; Lin, Zhi

2017-08-01

We report organic thin film transistors (OTFTs) with pentacene/fluorinated copper phthalo-cyanine (F16CuPc)/pentacene (PFP) sandwich configuration as active layers. The sandwich devices not only show hole mobility enhancement but also present a well control about threshold voltage and off-state current. By investigating various characteristics, including current-voltage hysteresis, organic film morphology, capacitance-voltage curve and resistance variation of active layers carefully, it has been found the performance improvement is mainly attributed to the low carrier traps and the higher conductivity of the sandwich active layer due to the additional induced carriers in F16CuPc/pentacene. Therefore, using proper multiple active layer is an effective way to gain high performance OTFTs.

A high-efficiency low-voltage CMOS rectifier for harvesting energy in implantable devices.

PubMed

Hashemi, S Saeid; Sawan, Mohamad; Savaria, Yvon

2012-08-01

We present, in this paper, a new full-wave CMOS rectifier dedicated for wirelessly-powered low-voltage biomedical implants. It uses bootstrapped capacitors to reduce the effective threshold voltage of selected MOS switches. It achieves a significant increase in its overall power efficiency and low voltage-drop. Therefore, the rectifier is good for applications with low-voltage power supplies and large load current. The rectifier topology does not require complex circuit design. The highest voltages available in the circuit are used to drive the gates of selected transistors in order to reduce leakage current and to lower their channel on-resistance, while having high transconductance. The proposed rectifier was fabricated using the standard TSMC 0.18 μm CMOS process. When connected to a sinusoidal source of 3.3 V peak amplitude, it allows improving the overall power efficiency by 11% compared to the best recently published results given by a gate cross-coupled-based structure.

Threshold-Voltage Shifts in Organic Transistors Due to Self-Assembled Monolayers at the Dielectric: Evidence for Electronic Coupling and Dipolar Effects.

PubMed

Aghamohammadi, Mahdieh; Rödel, Reinhold; Zschieschang, Ute; Ocal, Carmen; Boschker, Hans; Weitz, R Thomas; Barrena, Esther; Klauk, Hagen

2015-10-21

The mechanisms behind the threshold-voltage shift in organic transistors due to functionalizing of the gate dielectric with self-assembled monolayers (SAMs) are still under debate. We address the mechanisms by which SAMs determine the threshold voltage, by analyzing whether the threshold voltage depends on the gate-dielectric capacitance. We have investigated transistors based on five oxide thicknesses and two SAMs with rather diverse chemical properties, using the benchmark organic semiconductor dinaphtho[2,3-b:2',3'-f]thieno[3,2-b]thiophene. Unlike several previous studies, we have found that the dependence of the threshold voltage on the gate-dielectric capacitance is completely different for the two SAMs. In transistors with an alkyl SAM, the threshold voltage does not depend on the gate-dielectric capacitance and is determined mainly by the dipolar character of the SAM, whereas in transistors with a fluoroalkyl SAM the threshold voltages exhibit a linear dependence on the inverse of the gate-dielectric capacitance. Kelvin probe force microscopy measurements indicate this behavior is attributed to an electronic coupling between the fluoroalkyl SAM and the organic semiconductor.

Active-Matrix Organic Light Emission Diode Pixel Circuit for Suppressing and Compensating for the Threshold Voltage Degradation of Hydrogenated Amorphous Silicon Thin Film Transistors

NASA Astrophysics Data System (ADS)

Shin, Hee-Sun; Lee, Won-Kyu; Park, Sang-Guen; Kuk, Seung-Hee; Han, Min-Koo

2009-03-01

A new hydrogenated amorphous silicon (a-Si:H) thin film transistor (TFT) pixel circuit for active-matrix organic light emission diodes (AM-OLEDs), which significantly compensates the OLED current degradation by memorizing the threshold voltage of driving TFT and suppresses the threshold voltage shift of a-Si:H TFTs by negative bias annealing, is proposed and fabricated. During the first half of each frame, the driving TFT of the proposed pixel circuit supplies current to the OLED, which is determined by modified data voltage in the compensation scheme. The proposed pixel circuit was able to compensate the threshold voltage shift of the driving TFT as well as the OLED. During the remaining half of each frame, the proposed pixel circuit induces the recovery of the threshold voltage degradation of a-Si:H TFTs owing to the negative bias annealing. The experimental results show that the proposed pixel circuit was able to successfully compensate for the OLED current degradation and suppress the threshold voltage degradation of the driving TFT.

Impact of SiNx capping on the formation of source/drain contact for In-Ga-Zn-O thin film transistor with self-aligned gate

NASA Astrophysics Data System (ADS)

Oh, Himchan; Pi, Jae-Eun; Hwang, Chi-Sun; Kwon, Oh-Sang

2017-12-01

Self-aligned gate structures are preferred for faster operation and scaling down of thin film transistors by reducing the overlapped region between source/drain and gate electrodes. Doping on source/drain regions is essential to fabricate such a self-aligned gate thin film transistor. For oxide semiconductors such as In-Ga-Zn-O, SiNx capping readily increases their carrier concentration. We report that the SiNx deposition temperature and thickness significantly affect the device properties, including threshold voltage, field effect mobility, and contact resistance. The reason for these variations in device characteristics mainly comes from the extension of the doped region to the gated area after the SiNx capping step. Analyses on capacitance-voltage and transfer length characteristics support this idea.

Zinc Oxide Thin-Film Transistors

NASA Astrophysics Data System (ADS)

Fortunato, E.; Barquinha, P.; Pimentel, A.; Gonçalves, A.; Marques, A.; Pereira, L.; Martins, R.

ZnO thin film transistors (ZnO-TFT) have been fabricated by rf magnetron sputtering at room temperature with a bottom-gate configuration. The ZnO-TFT operates in the enhancement mode with a threshold voltage of 21 V, a field effect mobility of 20 cm2/Vs, a gate voltage swing of 1.24 V/decade and an on/off ratio of 2×105. The ZnO-TFT present an average optical transmission (including the glass substrate) of 80 % in the visible part of the spectrum. The combination of transparency, high channel mobility and room temperature processing makes the ZnO-TFT a very promising low cost optoelectronic device for the next generation of invisible and flexible electronics. Moreover, the processing technology used to fabricate this device is relatively simple and it is compatible with inexpensive plastic/flexible substrate technology.

High voltage threshold for stable operation in a dc electron gun

DOE Office of Scientific and Technical Information (OSTI.GOV)

Yamamoto, Masahiro, E-mail: masahiro@post.kek.jp; Nishimori, Nobuyuki, E-mail: n-nishim@tagen.tohoku.ac.jp

We report clear observation of a high voltage (HV) threshold for stable operation in a dc electron gun. The HV hold-off time without any discharge is longer than many hours for operation below the threshold, while it is roughly 10 min above the threshold. The HV threshold corresponds to the minimum voltage where discharge ceases. The threshold increases with the number of discharges during HV conditioning of the gun. Above the threshold, the amount of gas desorption per discharge increases linearly with the voltage difference from the threshold. The present experimental observations can be explained by an avalanche discharge modelmore » based on the interplay between electron stimulated desorption (ESD) from the anode surface and subsequent secondary electron emission from the cathode by the impact of ionic components of the ESD molecules or atoms.« less

Modeling, Fabrication, and Analysis of Vertical Conduction Gallium Nitride Fin MOSFET

NASA Astrophysics Data System (ADS)

Tahhan, Maher Bishara

Gallium Nitride has seen much interest in the field of electronics due to its large bandgap and high mobility. In the field of power electronics, this combination leads to a low on-resistance for a given breakdown voltage. To take full advantage of this, vertical conduction transistors in GaN can give high breakdown voltages independent of chip area, leading to transistors with nominally low on resistance with high breakdown at a low cost. Acknowledging this, a vertical transistor design is presented with a small footprint area. This design utilizes a fin structure as a double gated insulated MESFET with electrons flowing from the top of the fin downward. The transistor's characteristics and design is initially explored via simulation and modelling. In this modelling, it is found that the narrow dimension of the fin must be sub-micron to allow for the device to be turned off with no leakage current and have a positive threshold voltage. Several process modules are developed and integrated to fabricate the device. A smooth vertical etch leaving low damage to the surfaces is demonstrated and characterized, preventing micromasking during the GaN dry etch. Methods of removing damage from the dry etch are tested, including regrowth and wet etching. Several hard masks were developed to be used in conjunction with this GaN etch for various requirements of the process, such as material constraints and self-aligning a metal contact. Multiple techniques are tested to deposit and pattern the gate oxide and metal to ensure good contact with the channel without causing unwanted shorts. To achieve small fin dimensions, a self-aligned transistor process flow is presented allowing for smaller critical dimensions at increased fabrication tolerances by avoiding the use of lithographic steps that require alignments to very high accuracy. In the case of the device design presented, the fins are lithographically defined at the limit of i-line stepper system. From this single lithography, the sources are formed, fins are etched, and the gate insulator and metal are deposited. The first functional fabricated devices are presented, but exhibit a few differences from the model. A threshold voltage of -6 V, was measured, with an ID of 5 kA/cm2 at 3 V, and Ron of 0.6 mO/cm 2. The current is limited by the Schottky nature of the top contacts and show a turn-on voltage as a result. These measurements are comparable to recently published GaN fin MOSFET data, whose devices were defined by e-beam lithography. This dissertation work sought to show that a vertical conduction fin MOSFET can be fabricated on GaN. Furthermore, it aimed to provide a self-aligned process that does not require e-beam lithography. With further development, such devices can be designed to hold large voltages while maintaining a small footprint.

Homo-junction ferroelectric field-effect-transistor memory device using solution-processed lithium-doped zinc oxide thin films

NASA Astrophysics Data System (ADS)

Nayak, Pradipta K.; Caraveo-Frescas, J. A.; Bhansali, Unnat. S.; Alshareef, H. N.

2012-06-01

High performance homo-junction field-effect transistor memory devices were prepared using solution processed transparent lithium-doped zinc oxide thin films for both the ferroelectric and semiconducting active layers. A highest field-effect mobility of 8.7 cm2/Vs was obtained along with an Ion/Ioff ratio of 106. The ferroelectric thin film transistors showed a low sub-threshold swing value of 0.19 V/dec and a significantly reduced device operating voltage (±4 V) compared to the reported hetero-junction ferroelectric transistors, which is very promising for low-power non-volatile memory applications.

Gate bias stress stability under light irradiation for indium zinc oxide thin-film transistors based on anodic aluminium oxide gate dielectrics

NASA Astrophysics Data System (ADS)

Li, Min; Lan, Linfeng; Xu, Miao; Wang, Lei; Xu, Hua; Luo, Dongxiang; Zou, Jianhua; Tao, Hong; Yao, Rihui; Peng, Junbiao

2011-11-01

Thin-film transistors (TFTs) using indium zinc oxide as the active layer and anodic aluminium oxide (Al2O3) as the gate dielectric layer were fabricated. The device showed an electron mobility of as high as 10.1 cm2 V-1 s-1, an on/off current ratio of as high as ~108, and a turn-on voltage (Von) of only -0.5 V. Furthermore, this kind of TFTs was very stable under positive bias illumination stress. However, when the device experienced negative bias illumination stress, the threshold voltage shifted to the positive direction. It was found that the instability under negative bias illumination stress (NBIS) was due to the electrons from the Al gate trapping into the Al2O3 dielectric when exposed to the illuminated light. Using a stacked structure of Al2O3/SiO2 dielectrics, the device became more stable under NBIS.

Metal–insulator transition in a transition metal dichalcogenide: Dependence on metal contacts

NASA Astrophysics Data System (ADS)

Shimazu, Y.; Arai, K.; Iwabuchi, T.

2018-03-01

Transition metal dichalcogenides are promising layered materials for realizing novel nanoelectronic and nano-optoelectronic devices. Molybdenum disulfide (MoS2), a typical transition metal dichalcogenide, has been extensively investigated due to the presence of a sizable band gap, which enables the use of MoS2 as a channel material in field-effect transistors (FET). The gate-voltage-tunable metal–insulator transition and superconductivity using MoS2 have been demonstrated in previous studies. These interesting phenomena can be considered as quantum phase transitions in two-dimensional systems. In this study, we observed that the transport properties of thin MoS2 flakes in FET geometry significantly depend on metal contacts. On comparing Ti/Au with Al contacts, it was found that the threshold voltages for FET switching and metal–insulator transition were considerably lower for the device with Al contacts. This result indicated the significant influence of the Al contacts on the properties of MoS2 devices.

A Programmable High-Voltage Compliance Neural Stimulator for Deep Brain Stimulation in Vivo

PubMed Central

Gong, Cihun-Siyong Alex; Lai, Hsin-Yi; Huang, Sy-Han; Lo, Yu-Chun; Lee, Nicole; Chen, Pin-Yuan; Tu, Po-Hsun; Yang, Chia-Yen; Lin, James Chang-Chieh; Chen, You-Yin

2015-01-01

Deep brain stimulation (DBS) is one of the most effective therapies for movement and other disorders. The DBS neurosurgical procedure involves the implantation of a DBS device and a battery-operated neurotransmitter, which delivers electrical impulses to treatment targets through implanted electrodes. The DBS modulates the neuronal activities in the brain nucleus for improving physiological responses as long as an electric discharge above the stimulation threshold can be achieved. In an effort to improve the performance of an implanted DBS device, the device size, implementation cost, and power efficiency are among the most important DBS device design aspects. This study aims to present preliminary research results of an efficient stimulator, with emphasis on conversion efficiency. The prototype stimulator features high-voltage compliance, implemented with only a standard semiconductor process, without the use of extra masks in the foundry through our proposed circuit structure. The results of animal experiments, including evaluation of evoked responses induced by thalamic electrical stimuli with our fabricated chip, were shown to demonstrate the proof of concept of our design. PMID:26029954

White-light-controlled resistive switching in ZnO/BaTiO3/C multilayer layer at room temperature

NASA Astrophysics Data System (ADS)

Wang, Junshuai; Liang, Dandan; Wu, Liangchen; Li, Xiaoping; Chen, Peng

2018-07-01

The bipolar resistance switching effect is observed in ZnO/BaTiO3/C structure. The resistance switching behavior can be modulated by white light. The resistance switch states and threshold voltage can be changed when subjected to white light. This research can help explore multi-functional materials and applications in nonvolatile memory device.

Analysis and Modeling of Fullerene Single Electron Transistor Based on Quantum Dot Arrays at Room Temperature

NASA Astrophysics Data System (ADS)

Khadem Hosseini, Vahideh; Ahmadi, Mohammad Taghi; Ismail, Razali

2018-05-01

The single electron transistor (SET) as a fast electronic device is a candidate for future nanoscale circuits because of its low energy consumption, small size and simplified circuit. It consists of source and drain electrodes with a quantum dot (QD) located between them. Moreover, it operates based on the Coulomb blockade (CB) effect. It occurs when the charging energy is greater than the thermal energy. Consequently, this condition limits SET operation at cryogenic temperatures. Hence, using QD arrays can overcome this temperature limitation in SET which can therefore work at room temperature but QD arrays increase the threshold voltage with is an undesirable effect. In this research, fullerene as a zero-dimensional material with unique properties such as quantum capacitance and high critical temperature has been selected for the material of the QDs. Moreover, the current of a fullerene QD array SET has been modeled and its threshold voltage is also compared with a silicon QD array SET. The results show that the threshold voltage of fullerene SET is lower than the silicon one. Furthermore, the comparison study shows that homogeneous linear QD arrays have a lower CB range and better operation than a ring QD array SET. Moreover, the effect of the number of QDs in a QD array SET is investigated. The result confirms that the number of QDs can directly affect the CB range. Moreover, the desired current can be achieved by controlling the applied gate voltage and island diameters in a QD array SET.

Gate line edge roughness amplitude and frequency variation effects on intra die MOS device characteristics

NASA Astrophysics Data System (ADS)

Hamadeh, Emad; Gunther, Norman G.; Niemann, Darrell; Rahman, Mahmud

2006-06-01

Random fluctuations in fabrication process outcomes such as gate line edge roughness (LER) give rise to corresponding fluctuations in scaled down MOS device characteristics. A thermodynamic-variational model is presented to study the effects of LER on threshold voltage and capacitance of sub-50 nm MOS devices. Conceptually, we treat the geometric definition of the MOS devices on a die as consisting of a collection of gates. In turn, each of these gates has an area, A, and a perimeter, P, defined by nominally straight lines subject to random process outcomes producing roughness. We treat roughness as being deviations from straightness consisting of both transverse amplitude and longitudinal wavelength each having lognormal distribution. We obtain closed-form expressions for variance of threshold voltage ( Vth), and device capacitance ( C) at Onset of Strong Inversion (OSI) for a small device. Using our variational model, we characterized the device electrical properties such as σ and σC in terms of the statistical parameters of the roughness amplitude and spatial frequency, i.e., inverse roughness wavelength. We then verified our model with numerical analysis of Vth roll-off for small devices and σ due to dopant fluctuation. Our model was also benchmarked against TCAD of σ as a function of LER. We then extended our analysis to predict variations in σ and σC versus average LER spatial frequency and amplitude, and oxide-thickness. Given the intuitive expectation that LER of very short wavelengths must also have small amplitude, we have investigated the case in which the amplitude mean is inversely related to the frequency mean. We compare with the situation in which amplitude and frequency mean are unrelated. Given also that the gate perimeter may consist of different LER signature for each side, we have extended our analysis to the case when the LER statistical difference between gate sides is moderate, as well as when it is significantly large.

Miniature CW and active internally Q-switched Nd:MgO:LiNbO/sub 3/ lasers

DOE Office of Scientific and Technical Information (OSTI.GOV)

Cordova-Plaza, A.; Digonnet, M.J.F.; Shaw, H.J.

1987-02-01

The authors report a 10 mW threshold mixture device in which internal Q-switching of a single Nd:MgO:LiNbO/sub 3/ crystal is achieved. Pulsewidths of 30 ns have been observed. Peak powers of 5 W have been attained with less than 60 mW of 598 nm pump power and with less than 1 percent output coupling. The switching voltage is lower than 300 V. The consequences of the elastooptic effect and the photoconductivity on device performance are investigated. A highly efficient CW laser and a low threshold CW laser made of the same material are also reported. Photorefractive damage due to themore » photovoltaic effect is found to be almost nonexistent in these lasers when pumped in the near-infrared.« less

Highly Simplified Reddish Orange Phosphorescent Organic Light-Emitting Diodes Incorporating a Novel Carrier- and Exciton-Confining Spiro-Exciplex-Forming Host for Reduced Efficiency Roll-off.

PubMed

Xu, Ting; Zhang, Ye-Xin; Wang, Bo; Huang, Chen-Chao; Murtaza, Imran; Meng, Hong; Liao, Liang-Sheng

2017-01-25

A novel exciplex-forming host is applied so as to design highly simplified reddish orange light-emitting diodes (OLEDs) with low driving voltage, high efficiency, and an extraordinarily low efficiency roll-off, by combining N,N-10-triphenyl-10H-spiro [acridine-9,9'-fluoren]-3'-amine (SAFDPA) with 4,7-diphenyl-1,10-phenanthroline (Bphen) doped with trivalent iridium complex bis(2-methyldibenzo[f,h]quinoxaline) (acetylacetonate)iridium(III) (Ir(MDQ) 2 (acac)). The reddish orange OLEDs achieve a strikingly high power efficiency (PE) of 31.80 lm/W with an ultralow threshold voltage of 2.24 V which is almost equal to the triplet energy level of the phosphorescent reddish orange emitting dopant. The power efficiency of the device with the exciplex-forming host is enhanced, achieving 36.2% mainly owing to the lower operating voltage by the novel exciplex forming cohost, compared with the reference device (23.54 lm/W). Moreover, the OLEDs show extraordinarily low current efficiency (CE) roll-off to 1.41% at the brightness from 500 to 5000 cd/m 2 with a maximal CE of 32.87 cd/A (EQE max = 11.01%). The devices display a good reddish orange color (CIE of (0.628, 0.372) at 500 cd/m 2 ) nearly without color shift with increasing brightness. Co-host architecture phosphorescent OLEDs show a simpler device structure, lower working voltage, and a better efficiency and stability than those of the reference devices without the cohost architecture, which helps to simplify the OLED structure, lower the cost, and popularize OLED technology.

A microfluidic flow-through device for high throughput electrical lysis of bacterial cells based on continuous dc voltage.

PubMed

Wang, Hsiang-Yu; Bhunia, Arun K; Lu, Chang

2006-12-15

Interest in electrical lysis of biological cells on a microfludic platform has increased because it allows for the rapid recovery of intracellular contents without introducing lytic agents. In this study we demonstrated a simple microfluidic flow-through device which lysed Escherichia coli cells under a continuous dc voltage. The E. coli cells had previously been modified to express green fluorescent protein (GFP). In our design, the cell lysis only happened in a defined section of a microfluidic channel due to the local field amplification by geometric modification. The geometric modification also effectively decreased the required voltage for lysis by several folds. We found that local field strength of 1000-1500 V/cm was required for nearly 100% cell death. This threshold field strength was considerably lower than the value reported in the literature, possibly due to the longer duration of the field [Lee, S.W., Tai, Y.C., 1999. Sens. Actuators A: Phys. 73, 74-79]. Cell lysis was detected by both plate count and fluorescence spectroscopy. The cell membrane was completely disintegrated in the lysis section of the microfluidic device, when the field strength was higher than 2000 V/cm. The devices were fabricated using low-cost soft lithography with channel widths considerably larger than the cell size to avoid clogging and ensure stable performance. Our tool will be ideal for high throughput processing of bacterial cells for chemical analysis of intracellular contents such as DNA and proteins. The application of continuous dc voltage greatly simplified the instrumentation compared to devices using electrical pulses for similar purposes. In principle, the same approach can also be applied for lysis of mammalian cells and electroporative transfection.

Vertical architecture for enhancement mode power transistors based on GaN nanowires

NASA Astrophysics Data System (ADS)

Yu, F.; Rümmler, D.; Hartmann, J.; Caccamo, L.; Schimpke, T.; Strassburg, M.; Gad, A. E.; Bakin, A.; Wehmann, H.-H.; Witzigmann, B.; Wasisto, H. S.; Waag, A.

2016-05-01

The demonstration of vertical GaN wrap-around gated field-effect transistors using GaN nanowires is reported. The nanowires with smooth a-plane sidewalls have hexagonal geometry made by top-down etching. A 7-nanowire transistor exhibits enhancement mode operation with threshold voltage of 1.2 V, on/off current ratio as high as 108, and subthreshold slope as small as 68 mV/dec. Although there is space charge limited current behavior at small source-drain voltages (Vds), the drain current (Id) and transconductance (gm) reach up to 314 mA/mm and 125 mS/mm, respectively, when normalized with hexagonal nanowire circumference. The measured breakdown voltage is around 140 V. This vertical approach provides a way to next-generation GaN-based power devices.

High-mobility and low-operating voltage organic thin film transistor with epoxy based siloxane binder as the gate dielectric

NASA Astrophysics Data System (ADS)

Tewari, Amit; Gandla, Srinivas; Pininti, Anil Reddy; Karuppasamy, K.; Böhm, Siva; Bhattacharyya, Arup R.; McNeill, Christopher R.; Gupta, Dipti

2015-09-01

This paper reports the fabrication of pentacene-based organic thin-film transistors using a dielectric material, Dynasylan ®SIVO110. The devices exhibit excellent performance characterized by a low threshold voltage of -1.4 V (operating voltage: 0 to -4 V) together with a mobility of 1.9 cm2 V-1s-1. These results are promising because it uses only a single layer of dielectric without performing any intermediate treatment. The reason is attributed to the high charge storage capacity of the dielectric (κ ˜ 20.02), a low interfacial trap density (2.56 × 1011cm-2), and favorable pentacene film morphology consisting of large and interconnected grains having an average size of 234 nm.

Electrical Arc Ignition Testing for Constellation Program

NASA Technical Reports Server (NTRS)

Sparks, Kyle; Gallus, Timothy; Smith, Sarah

2009-01-01

NASA Johnson Space Center (JSC) Materials and Processes Branch requested that NASA JSC White Sands Test Facility (WSTF) perform testing for the Constellation Program to evaluate the hazard of electrical arc ignition of materials that could be in close proximity to batteries. Specifically, WSTF was requested to perform wire-break electrical arc tests to determine the current threshold for ignition of generic cotton woven fabric samples with a fixed voltage of 3.7 V, a common voltage for hand-held electrical devices. The wire-break test was developed during a previous test program to evaluate the hazard of electrical arc ignition inside the Extravehicular Mobility Unit [1].

Spike-Threshold Variability Originated from Separatrix-Crossing in Neuronal Dynamics

PubMed Central

Wang, Longfei; Wang, Hengtong; Yu, Lianchun; Chen, Yong

2016-01-01

The threshold voltage for action potential generation is a key regulator of neuronal signal processing, yet the mechanism of its dynamic variation is still not well described. In this paper, we propose that threshold phenomena can be classified as parameter thresholds and state thresholds. Voltage thresholds which belong to the state threshold are determined by the ‘general separatrix’ in state space. We demonstrate that the separatrix generally exists in the state space of neuron models. The general form of separatrix was assumed as the function of both states and stimuli and the previously assumed threshold evolving equation versus time is naturally deduced from the separatrix. In terms of neuronal dynamics, the threshold voltage variation, which is affected by different stimuli, is determined by crossing the separatrix at different points in state space. We suggest that the separatrix-crossing mechanism in state space is the intrinsic dynamic mechanism for threshold voltages and post-stimulus threshold phenomena. These proposals are also systematically verified in example models, three of which have analytic separatrices and one is the classic Hodgkin-Huxley model. The separatrix-crossing framework provides an overview of the neuronal threshold and will facilitate understanding of the nature of threshold variability. PMID:27546614

Spike-Threshold Variability Originated from Separatrix-Crossing in Neuronal Dynamics.

PubMed

Wang, Longfei; Wang, Hengtong; Yu, Lianchun; Chen, Yong

2016-08-22

The threshold voltage for action potential generation is a key regulator of neuronal signal processing, yet the mechanism of its dynamic variation is still not well described. In this paper, we propose that threshold phenomena can be classified as parameter thresholds and state thresholds. Voltage thresholds which belong to the state threshold are determined by the 'general separatrix' in state space. We demonstrate that the separatrix generally exists in the state space of neuron models. The general form of separatrix was assumed as the function of both states and stimuli and the previously assumed threshold evolving equation versus time is naturally deduced from the separatrix. In terms of neuronal dynamics, the threshold voltage variation, which is affected by different stimuli, is determined by crossing the separatrix at different points in state space. We suggest that the separatrix-crossing mechanism in state space is the intrinsic dynamic mechanism for threshold voltages and post-stimulus threshold phenomena. These proposals are also systematically verified in example models, three of which have analytic separatrices and one is the classic Hodgkin-Huxley model. The separatrix-crossing framework provides an overview of the neuronal threshold and will facilitate understanding of the nature of threshold variability.

Study on copper phthalocyanine and perylene-based ambipolar organic light-emitting field-effect transistors produced using neutral beam deposition method

DOE Office of Scientific and Technical Information (OSTI.GOV)

Kim, Dae-Kyu; Oh, Jeong-Do; Shin, Eun-Sol

2014-04-28

The neutral cluster beam deposition (NCBD) method has been applied to the production and characterization of ambipolar, heterojunction-based organic light-emitting field-effect transistors (OLEFETs) with a top-contact, multi-digitated, long-channel geometry. Organic thin films of n-type N,N′-ditridecylperylene-3,4,9,10-tetracarboxylic diimide and p-type copper phthalocyanine were successively deposited on the hydroxyl-free polymethyl-methacrylate (PMMA)-coated SiO{sub 2} dielectrics using the NCBD method. Characterization of the morphological and structural properties of the organic active layers was performed using atomic force microscopy and X-ray diffraction. Various device parameters such as hole- and electron-carrier mobilities, threshold voltages, and electroluminescence (EL) were derived from the fits of the observed current-voltage andmore » current-voltage-light emission characteristics of OLEFETs. The OLEFETs demonstrated good field-effect characteristics, well-balanced ambipolarity, and substantial EL under ambient conditions. The device performance, which is strongly correlated with the surface morphology and the structural properties of the organic active layers, is discussed along with the operating conduction mechanism.« less

Printed 2 V-operating organic inverter arrays employing a small-molecule/polymer blend

NASA Astrophysics Data System (ADS)

Shiwaku, Rei; Takeda, Yasunori; Fukuda, Takashi; Fukuda, Kenjiro; Matsui, Hiroyuki; Kumaki, Daisuke; Tokito, Shizuo

2016-10-01

Printed organic thin-film transistors (OTFTs) are well suited for low-cost electronic applications, such as radio frequency identification (RFID) tags and sensors. Achieving both high carrier mobility and uniform electrical characteristics in printed OTFT devices is essential in these applications. Here, we report on printed high-performance OTFTs and circuits using silver nanoparticle inks for the source/drain electrodes and a blend of dithieno[2,3-d2‧,3‧-d‧]benzo[1,2-b4,5-b‧]dithiophene (DTBDT-C6) and polystyrene for the organic semiconducting layer. A high saturation region mobility of 1.0 cm2 V-1 s-1 at low operation voltage of -5 V was obtained for relatively short channel lengths of 9 μm. All fifteen of the printed pseudo-CMOS inverter circuits were formed on a common substrate and operated at low operation voltage of 2 V with the total variation in threshold voltage of 0.35 V. Consequently, the printed OTFT devices can be used in more complex integrated circuit applications requiring low manufacturing cost over large areas.

Printed 2 V-operating organic inverter arrays employing a small-molecule/polymer blend.

PubMed

Shiwaku, Rei; Takeda, Yasunori; Fukuda, Takashi; Fukuda, Kenjiro; Matsui, Hiroyuki; Kumaki, Daisuke; Tokito, Shizuo

2016-10-04

Printed organic thin-film transistors (OTFTs) are well suited for low-cost electronic applications, such as radio frequency identification (RFID) tags and sensors. Achieving both high carrier mobility and uniform electrical characteristics in printed OTFT devices is essential in these applications. Here, we report on printed high-performance OTFTs and circuits using silver nanoparticle inks for the source/drain electrodes and a blend of dithieno[2,3-d;2',3'-d']benzo[1,2-b;4,5-b']dithiophene (DTBDT-C 6 ) and polystyrene for the organic semiconducting layer. A high saturation region mobility of 1.0 cm 2  V -1  s -1 at low operation voltage of -5 V was obtained for relatively short channel lengths of 9 μm. All fifteen of the printed pseudo-CMOS inverter circuits were formed on a common substrate and operated at low operation voltage of 2 V with the total variation in threshold voltage of 0.35 V. Consequently, the printed OTFT devices can be used in more complex integrated circuit applications requiring low manufacturing cost over large areas.

Theoretical and material studies of thin-film electroluminescent devices

NASA Technical Reports Server (NTRS)

Summers, C. J.

1989-01-01

Thin-film electroluminescent (TFEL) devices are studied for a possible means of achieving a high resolution, light weight, compact video display panel for computer terminals or television screens. The performance of TFEL devices depends upon the probability of an electron impact exciting a luminescent center which in turn depends upon the density of centers present in the semiconductor layer, the possibility of an electron achieving the impact excitation threshold energy, and the collision cross section itself. Efficiency of such a device is presently very poor. It can best be improved by increasing the number of hot electrons capable of impact exciting a center. Hot electron distributions and a method for increasing the efficiency and brightness of TFEL devices (with the additional advantage of low voltage direct current operation) are investigated.

Application of pentacene thin-film transistors with controlled threshold voltages to enhancement/depletion inverters

NASA Astrophysics Data System (ADS)

Takahashi, Hajime; Hanafusa, Yuki; Kimura, Yoshinari; Kitamura, Masatoshi

2018-03-01

Oxygen plasma treatment has been carried out to control the threshold voltage in organic thin-film transistors (TFTs) having a SiO2 gate dielectric prepared by rf sputtering. The threshold voltage linearly changed in the range of -3.7 to 3.1 V with the increase in plasma treatment time. Although the amount of change is smaller than that for organic TFTs having thermally grown SiO2, the tendency of the change was similar to that for thermally grown SiO2. To realize different plasma treatment times on the same substrate, a certain region on the SiO2 surface was selected using a shadow mask, and was treated with oxygen plasma. Using the process, organic TFTs with negative threshold voltages and those with positive threshold voltages were fabricated on the same substrate. As a result, enhancement/depletion inverters consisting of the organic TFTs operated at supply voltages of 5 to 15 V.

Electronic structure and transport properties of zigzag MoS2 nanoribbons

NASA Astrophysics Data System (ADS)

Sharma, Uma Shankar; Shah, Rashmi; Mishra, Pankaj Kumar

2018-05-01

In present study, electronic and transport properties of the 8zigzag MoS2 nanoribbons (8ZMoS2NRs) are investigated using ab-initio density functional theory [DFT]. The calculations were performed using nonequilibrium Green's function (NEGF) formalism based on DFT as implemented in the TranSiesta code. Results show that the defect can introduces few extra states into the energy gap, which lead nanoribbons to reveal a metallic characteristic. The voltage-current (VI) graph of 8ZMoS2NRs show a threshold current increases after introducing Mo defect in the devices. when introducing a Mo vacancy under low biases, the current will be suppressed—whereas under high biases, the current through the defected 8ZMoS2NRs will increases rapidly, due to the other channel being opened, that make possibility of 8ZMoS2NRs application in electronic devices such as voltage regulation.

Influence of Gate Dielectrics, Electrodes and Channel Width on OFET Characteristics

NASA Astrophysics Data System (ADS)

Liyana, V. P.; Stephania, A. M.; Shiju, K.; Predeep, P.

2015-06-01

Organic Field Effect Transistors (OFET) possess wide applications in large area electronics owing to their attractive features like easy fabrication process, light weight, flexibility, cost effectiveness etc. But instability, high operational voltages and low carrier mobility act as inhibitors to commercialization of OFETs and various approaches were tried on a regular basis so as to make it viable. In this work, Poly 3-hexylthiophene-2,5diyl (P3HT) based OFETs with bottom-contact top-gate configuration using Poly vinyl alcohol (PVA) and Poly (methyl methacrylate) (PMMA) as gate dielectrics, aluminium and copper as source-drain electrodes are investigated. An effort is made to compare the effect of these dielectric materials and electrodes on the performance of OFET. Also, an attempt has been made to optimize the channel width of the device. These devices are characterised with mobility (μ), threshold voltage (VT), on-off ratio (Ion/Ioff) and their comparative analysis is reported.

Preparation, characterization and electroluminescence studies of ZnO nanorods for optoelectronic device applications

DOE Office of Scientific and Technical Information (OSTI.GOV)

Singh, Anju, E-mail: singh-nk24@yahoo.com; Vishwakarma, H. L., E-mail: horilal5@yahoo.com

2015-07-31

In this work, ZnO nanorods were achieved by a simple chemical precipitation method in the presence of capping agent Poly Vinyl Pyrrolidone (PVP) at room temperature. X-Ray Diffraction (XRD) result indicates that the synthesized undoped ZnO nanorods have wurtzite hexagonal structure without any impurities. It has been seen that the growth orientation of the prepared ZnO nanorods were (101). XRD analysis revealed that the nanorods having the crystallite size 49 nm. The Scanning Electron Microscopy (SEM) image confirmed the size and shape of these nanorods. The diameter of nanorods has been found that 1.52 µm to 1.61 µm and the lengthmore » of about 4.89 µm. It has also been found that at room temperature Ultra Violet Visible (UV-VIS) absorption band is around 355 nm (blue shifted as compared to bulk). Electroluminescence (EL) studies show that emission of light is possible at very small threshold voltage and increases rapidly with increasing applied voltage. It is seen that smaller ZnO nanoparticles give higher electroluminescence brightness starting at lower threshold voltage. The brightness is also affected by increasing the frequency of AC signal.« less

Asymmetric underlap optimization of sub-10nm finfets for realizing energy-efficient logic and robust memories

NASA Astrophysics Data System (ADS)

Akkala, Arun Goud

Leakage currents in CMOS transistors have risen dramatically with technology scaling leading to significant increase in standby power consumption. Among the various transistor candidates, the excellent short channel immunity of Silicon double gate FinFETs have made them the best contender for successful scaling to sub-10nm nodes. For sub-10nm FinFETs, new quantum mechanical leakage mechanisms such as direct source to drain tunneling (DSDT) of charge carriers through channel potential energy barrier arising due to proximity of source/drain regions coupled with the high transport direction electric field is expected to dominate overall leakage. To counter the effects of DSDT and worsening short channel effects and to maintain Ion/ Ioff, performance and power consumption at reasonable values, device optimization techniques are necessary for deeply scaled transistors. In this work, source/drain underlapping of FinFETs has been explored using quantum mechanical device simulations as a potentially promising method to lower DSDT while maintaining the Ion/ Ioff ratio at acceptable levels. By adopting a device/circuit/system level co-design approach, it is shown that asymmetric underlapping, where the drain side underlap is longer than the source side underlap, results in optimal energy efficiency for logic circuits in near-threshold as well as standard, super-threshold operating regimes. In addition, read/write conflict in 6T SRAMs and the degradation in cell noise margins due to the low supply voltage can be mitigated by using optimized asymmetric underlapped n-FinFETs for the access transistor, thereby leading to robust cache memories. When gate-workfunction tuning is possible, using asymmetric underlapped n-FinFETs for both access and pull-down devices in an SRAM bit cell can lead to high-speed and low-leakage caches. Further, it is shown that threshold voltage degradation in the presence of Hot Carrier Injection (HCI) is less severe in asymmetric underlap n-FinFETs. A lifetime projection is carried out assuming that HCI is the major degradation mechanism and it is shown that a 3.4x improvement in device lifetime is possible over symmetric underlapped n-FinFET.

Long-term stability assessment of AlGaN/GaN field effect transistors modified with peptides: Device characteristics vs. surface properties

DOE Office of Scientific and Technical Information (OSTI.GOV)

Rohrbaugh, Nathaniel; Bryan, Isaac; Bryan, Zachary

AlGaN/GaN Field Effect Transistors (FETs) are promising biosensing devices. Functionalization of these devices is explored in this study using an in situ approach with phosphoric acid etchant and a phosphonic acid derivative. Devices are terminated on peptides and soaked in water for up to 168 hrs to examine FETs for both device responses and surface chemistry changes. Measurements demonstrated threshold voltage shifting after the functionalization and soaking processes, but demonstrated stable FET behavior throughout. X-ray photoelectron spectroscopy and atomic force microscopy confirmed peptides attachment to device surfaces before and after water soaking. Results of this work point to the stabilitymore » of peptide coated functionalized AlGaN/GaN devices in solution and support further research of these devices as disposable, long term, in situ biosensors.« less

Theory and Device Modeling for Nano-Structured Transistor Channels

DTIC Science & Technology

2011-06-01

zinc oxide ( ZnO ) thin film transistors ( TFTs ) that contain nanocrystalline grains on the order of ~20nm. The authors of ref. 1 present results...problem in order to determine the threshold voltage. 15. SUBJECT TERMS nano-structured transistor , mesoscopic, zinc oxide , ZnO , field-effect...and R. Neidhard, “Microwave ZnO Thin - Film Transistors ”, IEEE Electron Dev. Lett. 29, 1024 (2008); doi: 10.1109/LED.2008.2001635.

A SONOS device with a separated charge trapping layer for improvement of charge injection

NASA Astrophysics Data System (ADS)

Ahn, Jae-Hyuk; Moon, Dong-Il; Ko, Seung-Won; Kim, Chang-Hoon; Kim, Jee-Yeon; Kim, Moon-Seok; Seol, Myeong-Lok; Moon, Joon-Bae; Choi, Ji-Min; Oh, Jae-Sub; Choi, Sung-Jin; Choi, Yang-Kyu

2017-03-01

A charge trapping layer that is separated from the primary gate dielectric is implemented on a FinFET SONOS structure. By virtue of the reduced effective oxide thickness of the primary gate dielectric, a strong gate-to-channel coupling is obtained and thus short-channel effects in the proposed device are effectively suppressed. Moreover, a high program/erase speed and a large shift in the threshold voltage are achieved due to the improved charge injection by the reduced effective oxide thickness. The proposed structure has potential for use in high speed flash memory.

Nano-Transistor Modeling: Two Dimensional Green's Function Method

NASA Technical Reports Server (NTRS)

Svizhenko, Alexei; Anantram, M. P.; Govindan, T. R.; Biegel, Bryan

2001-01-01

Two quantum mechanical effects that impact the operation of nanoscale transistors are inversion layer energy quantization and ballistic transport. While the qualitative effects of these features are reasonably understood, a comprehensive study of device physics in two dimensions is lacking. Our work addresses this shortcoming and provides: (a) a framework to quantitatively explore device physics issues such as the source-drain and gate leakage currents, DIBL (Drain Induced Barrier Lowering), and threshold voltage shift due to quantization, and b) a means of benchmarking quantum corrections to semiclassical models (such as density-gradient and quantum-corrected MEDICI).

Memristor and selector devices fabricated from HfO2-xNx

NASA Astrophysics Data System (ADS)

Murdoch, B. J.; McCulloch, D. G.; Ganesan, R.; McKenzie, D. R.; Bilek, M. M. M.; Partridge, J. G.

2016-04-01

Monoclinic HfO2-xNx has been incorporated into two-terminal devices exhibiting either memristor or selector operation depending on the controlled inclusion/suppression of mobile oxygen vacancies. In HfO2 memristors containing oxygen vacancies, gradual conductance modulation, short-term plasticity, and long-term potentiation were observed using appropriate voltage-spike stimulation, suggesting suitability for artificial neural networks. Passivation of oxygen vacancies, confirmed by X-ray absorption spectroscopy, was achieved in HfO2-xNx films by the addition of nitrogen during growth. Selector devices formed on these films exhibited threshold switching and current controlled negative differential resistance consistent with thermally driven insulator to metal transitions.

Hafnium transistor process design for neural interfacing.

PubMed

Parent, David W; Basham, Eric J

2009-01-01

A design methodology is presented that uses 1-D process simulations of Metal Insulator Semiconductor (MIS) structures to design the threshold voltage of hafnium oxide based transistors used for neural recording. The methodology is comprised of 1-D analytical equations for threshold voltage specification, and doping profiles, and 1-D MIS Technical Computer Aided Design (TCAD) to design a process to implement a specific threshold voltage, which minimized simulation time. The process was then verified with a 2-D process/electrical TCAD simulation. Hafnium oxide films (HfO) were grown and characterized for dielectric constant and fixed oxide charge for various annealing temperatures, two important design variables in threshold voltage design.

The effects of electric field and gate bias pulse on the migration and stability of ionized oxygen vacancies in amorphous In–Ga–Zn–O thin film transistors

PubMed Central

Oh, Young Jun; Noh, Hyeon-Kyun; Chang, Kee Joo

2015-01-01

Oxygen vacancies have been considered as the origin of threshold voltage instability under negative bias illumination stress in amorphous oxide thin film transistors. Here we report the results of first-principles molecular dynamics simulations for the drift motion of oxygen vacancies. We show that oxygen vacancies, which are initially ionized by trapping photoexcited hole carriers, can easily migrate under an external electric field. Thus, accumulated hole traps near the channel/dielectric interface cause negative shift of the threshold voltage, supporting the oxygen vacancy model. In addition, we find that ionized oxygen vacancies easily recover their neutral defect configurations by capturing electrons when the Fermi level increases. Our results are in good agreement with the experimental observation that applying a positive gate bias pulse of short duration eliminates hole traps and thus leads to the recovery of device stability from persistent photoconductivity. PMID:27877799

Accurate evaluation of fast threshold voltage shift for SiC MOS devices under various gate bias stress conditions

NASA Astrophysics Data System (ADS)

Sometani, Mitsuru; Okamoto, Mitsuo; Hatakeyama, Tetsuo; Iwahashi, Yohei; Hayashi, Mariko; Okamoto, Dai; Yano, Hiroshi; Harada, Shinsuke; Yonezawa, Yoshiyuki; Okumura, Hajime

2018-04-01

We investigated methods of measuring the threshold voltage (V th) shift of 4H-silicon carbide (SiC) metal–oxide–semiconductor field-effect transistors (MOSFETs) under positive DC, negative DC, and AC gate bias stresses. A fast measurement method for V th shift under both positive and negative DC stresses revealed the existence of an extremely large V th shift in the short-stress-time region. We then examined the effect of fast V th shifts on drain current (I d) changes within a pulse under AC operation. The fast V th shifts were suppressed by nitridation. However, the I d change within one pulse occurred even in commercially available SiC MOSFETs. The correlation between I d changes within one pulse and V th shifts measured by a conventional method is weak. Thus, a fast and in situ measurement method is indispensable for the accurate evaluation of I d changes under AC operation.

Constant-current regulator improves tunnel diode threshold-detector performance

NASA Technical Reports Server (NTRS)

Cancro, C. A.

1965-01-01

Grounded-base transistor is placed in a tunnel diode threshold detector circuit, and a bias voltage is applied to the tunnel diode. This provides the threshold detector with maximum voltage output and overload protection.

Low Temperature Polycrystalline Silicon Thin Film Transistor Pixel Circuits for Active Matrix Organic Light Emitting Diodes

NASA Astrophysics Data System (ADS)

Fan, Ching-Lin; Lin, Yu-Sheng; Liu, Yan-Wei

A new pixel design and driving method for active matrix organic light emitting diode (AMOLED) displays that use low-temperature polycrystalline silicon thin-film transistors (LTPS-TFTs) with a voltage programming method are proposed and verified using the SPICE simulator. We had employed an appropriate TFT model in SPICE simulation to demonstrate the performance of the pixel circuit. The OLED anode voltage variation error rates are below 0.35% under driving TFT threshold voltage deviation (Δ Vth =± 0.33V). The OLED current non-uniformity caused by the OLED threshold voltage degradation (Δ VTO =+0.33V) is significantly reduced (below 6%). The simulation results show that the pixel design can improve the display image non-uniformity by compensating for the threshold voltage deviation in the driving TFT and the OLED threshold voltage degradation at the same time.

A New Kind of Blue Hybrid Electroluminescent Device.

PubMed

Wang, Junling; Li, Zhuan; Liu, Chunmei

2016-04-01

Bright blue Electroluminescence come from a ITO/BBOT doped silica (6 x 10(-3) M) made by a sol-gel method/Al driven by AC with 500 Hz at different voltages and Gaussian analysis under 55 V showed that blue emission coincidenced with typical triple emission from BBOT. This kind of device take advantage of organics (BBOT) and inorganics (silica). Electroluminescence from a single-layered sandwiched device consisting of blue fluorescent dye 2,5-bis (5-tert-butyl-2-benzoxazolyl) thiophene (BBOT) doped silica made by sol-gel method was investigated. A number of concentrations of hybrid devices were prepared and the maxium concentration was 6 x 10(-3) M. Blue electroluminescent (EL) always occurred above a threshold field 8.57 x 10(5) V/cm (30 V) at alternating voltage at 500 HZ. The luminance of the devices increased with the concentration of doped BBOT, but electroluminescence characteristics were different from a single molecule's photoluminescence properties of triple peaks. When analyzing in detail direct-current electroluminescence devices of pure BBOT, a single peak centered at 2.82 eV appeared with the driven voltage increase, which is similar to the hybrid devices. Comparing Gaussian decomposition date between two kinds of devices, the triple peak characteristic of BBOT was consistent. It is inferred that BBOT contributed EL of the hybrid devices mainly and silica may account for a very small part. Meanwhile the thermal stability of matrix silica was measured by Thermal Gravity-Mass Spectroscopy (TG-MS). There is 12 percent weight loss from room temperature to 1000 °C and silica has about 95% transmittance. So the matric silica played an important role in thermal stability and optical stability for BBOT. In addition, this kind of blue electroluminescence device can take advantages of organic materials BBOT and inorganic materials silica. This is a promising way to enrich EL devices, especially enriching inorganic EL color at a low cost.

Fabrication and characterization of magnetically tunable metal-semiconductor schottky diode using barium hexaferrite thin film on gold

NASA Astrophysics Data System (ADS)

Kaur, Jotinder; Sharma, Vinay; Sharma, Vipul; Veerakumar, V.; Kuanr, Bijoy K.

2016-05-01

Barium Hexaferrite (BaM) is an extensively studied magnetic material due to its potential device application. In this paper, we study Schottky junction diodes fabricated using gold and BaM and demonstrate the function of a spintronic device. Gold (50 nm)/silicon substrate was used to grow the BaM thin films (100-150 nm) using pulsed laser deposition. I-V characteristics were measured on the Au/BaM structure sweeping the voltage from ±5 volts. The forward and reverse bias current-voltage curves show diode like rectifying characteristics. The threshold voltage decreases while the output current increases with increase in the applied external magnetic field showing that the I-V characteristics of the BaM based Schottky junction diodes can be tuned by external magnetic field. It is also demonstrated that, the fabricated Schottky diode can be used as a half-wave rectifier, which could operate at high frequencies in the range of 1 MHz compared to the regular p-n junction diodes, which rectify below 10 kHz. In addition, it is found that above 1 MHz, Au/BaM diode can work as a rectifier as well as a capacitor filter, making the average (dc) voltage much larger.

Room temperature operation of electro-optical bistability in the edge-emitting tunneling-collector transistor laser

NASA Astrophysics Data System (ADS)

Feng, M.; Holonyak, N.; Wang, C. Y.

2017-09-01

Optical bistable devices are fundamental to digital photonics as building blocks of switches, logic gates, and memories in future computer systems. Here, we demonstrate both optical and electrical bistability and capability for switching in a single transistor operated at room temperature. The electro-optical hysteresis is explained by the interaction of electron-hole (e-h) generation and recombination dynamics with the cavity photon modulation in different switching paths. The switch-UP and switch-DOWN threshold voltages are determined by the rate difference of photon generation at the base quantum-well and the photon absorption via intra-cavity photon-assisted tunneling controlled by the collector voltage. Thus, the transistor laser electro-optical bistable switching is programmable with base current and collector voltage, and the basis for high speed optical logic processors.

Modeling Proton Irradiation in AlGaN/GaN HEMTs: Understanding the Increase of Critical Voltage

NASA Astrophysics Data System (ADS)

Patrick, Erin; Law, Mark E.; Liu, Lu; Cuervo, Camilo Velez; Xi, Yuyin; Ren, Fan; Pearton, Stephen J.

2013-12-01

A combination of TRIM and FLOODS models the effect of radiation damage on AlGaN/GaN HEMTs. While excellent fits are obtained for threshold voltage shift, the models do not fully explain the increased reliability observed experimentally. In short, the addition of negatively-charged traps in the GaN buffer layer does not significantly change the electric field at the gate edges at radiation fluence levels seen in this study. We propose that negative trapped charge at the nitride/AlGaN interface actually produces the virtual-gate effect that results in decreasing the magnitude of the electric field at the gate edges and thus the increase in critical voltage. Simulation results including nitride interface charge show significant changes in electric field profiles while the I-V device characteristics do not change.

Through thick and thin: tuning the threshold voltage in organic field-effect transistors.

PubMed

Martínez Hardigree, Josué F; Katz, Howard E

2014-04-15

Organic semiconductors (OSCs) constitute a class of organic materials containing densely packed, overlapping conjugated molecular moieties that enable charge carrier transport. Their unique optical, electrical, and magnetic properties have been investigated for use in next-generation electronic devices, from roll-up displays and radiofrequency identification (RFID) to biological sensors. The organic field-effect transistor (OFET) is the key active element for many of these applications, but the high values, poor definition, and long-term instability of the threshold voltage (V(T)) in OFETs remain barriers to realization of their full potential because the power and control circuitry necessary to compensate for overvoltages and drifting set points decrease OFET practicality. The drifting phenomenon has been widely observed and generally termed "bias stress." Research on the mechanisms responsible for this poor V(T) control has revealed a strong dependence on the physical order and chemical makeup of the interfaces between OSCs and adjacent materials in the OFET architecture. In this Account, we review the state of the art for tuning OFET performance via chemical designs and physical processes that manipulate V(T). This parameter gets to the heart of OFET operation, as it determines the voltage regimes where OFETs are either ON or OFF, the basis for the logical function of the devices. One obvious way to decrease the magnitude and variability of V(T) is to work with thinner and higher permittivity gate dielectrics. From the perspective of interfacial engineering, we evaluate various methods that we and others have developed, from electrostatic poling of gate dielectrics to molecular design of substituted alkyl chains. Corona charging of dielectric surfaces, a method for charging the surface of an insulating material using a constant high-voltage field, is a brute force means of shifting the effective gate voltage applied to a gate dielectric. A gentler and more direct method is to apply surface voltage to dielectric interfaces by direct contact or postprocess biasing; these methods could also be adapted for high throughput printing sequences. Dielectric hydrophobicity is an important chemical property determining the stability of the surface charges. Functional organic monolayers applied to dielectrics, using the surface attachment chemistry made available from "self-assembled" monolayer chemistry, provide local electric fields without any biasing process at all. To the extent that the monolayer molecules can be printed, these are also suitable for high throughput processes. Finally, we briefly consider V(T) control in the context of device integration and reliability, such as the role of contact resistance in affecting this parameter.

First-order metal-insulator transition not accompanied by the structural phase transition observed in VO2-based devices

NASA Astrophysics Data System (ADS)

Kim, Hyun-Tak; Chae, Byung-Gyu; Kim, Bong-Jun; Lee, Yong-Wook; Yun, Sun-Jin; Kang, Kwang-Yong

2006-03-01

An abrupt first-order metal-insulator transition (MIT) is observed during the application of a switching pulse voltage to VO2-based two-terminal devices. When the abrupt MIT occurs, the structural phase transition (SPT) is investigated by a micro- Raman spectroscopy and a micro-XRD. The result shows that the MIT is not accompanied with the structural phase transition (SPT); the abrupt MIT is prior to the SPT. Moreover, any switching pulse over a threshold voltage of 7.1 V for the MIT enabled the device material to transform efficiently from an insulator to a metal. The measured delay time from the source switching pulse to an induced MIT pulse is an order of 20 nsec which is much less than a delay time of about one msec deduced by thermal model. This indicates that the first-order MIT does not occur due to thermal. We think this MIT is the Mott transition. (Reference: New J. Phys. 6 (1994) 52 (www.njp.org), Appl. Phys. Lett. 86 (2005) 242101, Physica B 369 (2005. December) xxxx)

Method and system for controlling a rotational speed of a rotor of a turbogenerator

DOEpatents

Stahlhut, Ronnie Dean; Vuk, Carl Thomas

2008-12-30

A system and method controls a rotational speed of a rotor or shaft of a turbogenerator in accordance with a present voltage level on a direct current bus. A lower threshold and a higher threshold are established for a speed of a rotor or shaft of a turbogenerator. A speed sensor determines speed data or a speed signal for the rotor or shaft associated with a turbogenerator. A voltage regulator adjusts a voltage level associated with a direct current bus within a target voltage range if the speed data or speed signal indicates that the speed is above the higher threshold or below the lower threshold.

Dynamic and Tunable Threshold Voltage in Organic Electrochemical Transistors.

PubMed

Doris, Sean E; Pierre, Adrien; Street, Robert A

2018-04-01

In recent years, organic electrochemical transistors (OECTs) have found applications in chemical and biological sensing and interfacing, neuromorphic computing, digital logic, and printed electronics. However, the incorporation of OECTs in practical electronic circuits is limited by the relative lack of control over their threshold voltage, which is important for controlling the power consumption and noise margin in complementary and unipolar circuits. Here, the threshold voltage of OECTs is precisely tuned over a range of more than 1 V by chemically controlling the electrochemical potential at the gate electrode. This threshold voltage tunability is exploited to prepare inverters and amplifiers with improved noise margin and gain, respectively. By coupling the gate electrode with an electrochemical oscillator, single-transistor oscillators based on OECTs with dynamic time-varying threshold voltages are prepared. This work highlights the importance of electrochemistry at the gate electrode in determining the electrical properties of OECTs, and opens a path toward the system-level design of low-power OECT-based electronics. © 2018 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

Lower-Order Compensation Chain Threshold-Reduction Technique for Multi-Stage Voltage Multipliers.

PubMed

Dell' Anna, Francesco; Dong, Tao; Li, Ping; Wen, Yumei; Azadmehr, Mehdi; Casu, Mario; Berg, Yngvar

2018-04-17

This paper presents a novel threshold-compensation technique for multi-stage voltage multipliers employed in low power applications such as passive and autonomous wireless sensing nodes (WSNs) powered by energy harvesters. The proposed threshold-reduction technique enables a topological design methodology which, through an optimum control of the trade-off among transistor conductivity and leakage losses, is aimed at maximizing the voltage conversion efficiency (VCE) for a given ac input signal and physical chip area occupation. The conducted simulations positively assert the validity of the proposed design methodology, emphasizing the exploitable design space yielded by the transistor connection scheme in the voltage multiplier chain. An experimental validation and comparison of threshold-compensation techniques was performed, adopting 2N5247 N-channel junction field effect transistors (JFETs) for the realization of the voltage multiplier prototypes. The attained measurements clearly support the effectiveness of the proposed threshold-reduction approach, which can significantly reduce the chip area occupation for a given target output performance and ac input signal.

Response of pMOS dosemeters on gamma-ray irradiation during its re-use.

PubMed

Pejovic, Milic M; Pejovic, Momcilo M; Jaksic, Aleksandar B

2013-08-01

Response of pMOS dosemeters during two successive irradiations with gamma-ray irradiation to a dose of 35 Gy and annealing at room and elevated temperature has been studied. The response was followed on the basis of threshold voltage shift, determined from transfer characteristics, as a function of absorbed dose or annealing time. It was shown that the threshold voltage shifts during first and second irradiation for the gate bias during irradiation of 5 and 2.5 V insignificantly differ although complete fading was not achieved after the first cycle of annealing. In order to analyse the defects formed in oxide and at the interface during irradiation and annealing, which are responsible for threshold voltage shift, midgap and charge-pumping techniques were used. It was shown that during first irradiation and annealing a dominant influence to threshold voltage shift is made by fixed oxide traps, while at the beginning of the second annealing cycle, threshold voltage shift is a consequence of both fixed oxide traps and slow switching traps.

Photoisomerization-induced manipulation of single-electron tunneling for novel Si-based optical memory.

PubMed

Hayakawa, Ryoma; Higashiguchi, Kenji; Matsuda, Kenji; Chikyow, Toyohiro; Wakayama, Yutaka

2013-11-13

We demonstrated optical manipulation of single-electron tunneling (SET) by photoisomerization of diarylethene molecules in a metal-insulator-semiconductor (MIS) structure. Stress is placed on the fact that device operation is realized in the practical device configuration of MIS structure and that it is not achieved in structures based on nanogap electrodes and scanning probe techniques. Namely, this is a basic memory device configuration that has the potential for large-scale integration. In our device, the threshold voltage of SET was clearly modulated as a reversible change in the molecular orbital induced by photoisomerization, indicating that diarylethene molecules worked as optically controllable quantum dots. These findings will allow the integration of photonic functionality into current Si-based memory devices, which is a unique feature of organic molecules that is unobtainable with inorganic materials. Our proposed device therefore has enormous potential for providing a breakthrough in Si technology.

Structural and electrical characterization of NbO2 vertical devices grown on TiN coated SiO2/Si substrate

NASA Astrophysics Data System (ADS)

Joshi, Toyanath; Borisov, Pavel; Lederman, David

Due to its relatively high MIT temperature (1081 K) and current-controlled negative differential resistance, NbO2 is a robust candidate for memory devices and electrical switching applications. In this work, we present in-depth analysis of NbO2 thin film vertical devices grown on TiN coated SiO2/Si substrates using pulsed laser deposition (PLD). Two of the films grown in 1 mTorr and 10 mTorr O2/Ar (~7% O2) mixed growth pressures were studied. The formation of NbO2 phase was confirmed by Grazing Incidence X-ray Diffractometry (GIXRD), X-ray Photoelectron Spectroscopy (XPS) and current vs. voltage measurements. A probe station tip (tip size ~2 μm) or conductive AFM tip was used as a top and TiN bottom layer was used as a bottom contact. Device conductivity showed film thickness and contact size dependence. Current pulse measurements, performed in response to applied triangular voltage pulses, showed a non-linear threshold switching behavior for voltage pulse durations of ~100 ns and above. Self-sustained current oscillations were analyzed in terms of defect density presented in the film. Supported by FAME (sponsored by MARCO and DARPA, Contract 2013-MA-2382), WV Higher Education Policy Commission Grant (HEPC.dsr.12.29), and WVU SRF. We also thank S. Kramer from Micron for providing the TiN-coated Si substrates.

Continuous adjustment of threshold voltage in carbon nanotube field-effect transistors through gate engineering

NASA Astrophysics Data System (ADS)

Zhong, Donglai; Zhao, Chenyi; Liu, Lijun; Zhang, Zhiyong; Peng, Lian-Mao

2018-04-01

In this letter, we report a gate engineering method to adjust threshold voltage of carbon nanotube (CNT) based field-effect transistors (FETs) continuously in a wide range, which makes the application of CNT FETs especially in digital integrated circuits (ICs) easier. Top-gated FETs are fabricated using solution-processed CNT network films with stacking Pd and Sc films as gate electrodes. By decreasing the thickness of the lower layer metal (Pd) from 20 nm to zero, the effective work function of the gate decreases, thus tuning the threshold voltage (Vt) of CNT FETs from -1.0 V to 0.2 V. The continuous adjustment of threshold voltage through gate engineering lays a solid foundation for multi-threshold technology in CNT based ICs, which then can simultaneously provide high performance and low power circuit modules on one chip.

Low-voltage organic strain sensor on plastic using polymer/high- K inorganic hybrid gate dielectrics

NASA Astrophysics Data System (ADS)

Jung, Soyoun; Ji, Taeksoo; Varadan, Vijay K.

2007-12-01

In this paper, gate-induced pentacene semiconductor strain sensors based on hybrid-gate dielectrics using poly-vinylphenol (PVP) and high-K inorganic, Ta IIO 5 are fabricated on flexible substrates, polyethylene naphthalate (PEN). The Ta IIO 5 gate dielectric layer is combined with a thin PVP layer to obtain very smooth and hydrophobic surfaces which improve the molecular structures of pentacene films. The PVP-Ta IIO 5 hybrid-gate dielectric films exhibit a high dielectric capacitance and low leakage current. The sensors adopting thin film transistor (TFT)-like structures show a significantly reduced operating voltage (~6V), and good device characteristics with a field-effect mobility of 1.89 cm2/V•s, a threshold voltage of -0.5 V, and an on/off ratio of 10 3. The strain sensor, one of the practical applications in large-area organic electronics, was characterized with different bending radii of 50, 40, 30, and 20 mm. The sensor output signals were significantly improved with low-operating voltages.

Semipolar III-nitride laser diodes with zinc oxide cladding.

PubMed

Myzaferi, Anisa; Reading, Arthur H; Farrell, Robert M; Cohen, Daniel A; Nakamura, Shuji; DenBaars, Steven P

2017-07-24

Incorporating transparent conducting oxide (TCO) top cladding layers into III-nitride laser diodes (LDs) improves device design by reducing the growth time and temperature of the p-type layers. We investigate using ZnO instead of ITO as the top cladding TCO of a semipolar (202¯1) III-nitride LD. Numerical modeling indicates that replacing ITO with ZnO reduces the internal loss in a TCO clad LD due to the lower optical absorption in ZnO. Lasing was achieved at 453 nm with a threshold current density of 8.6 kA/cm 2 and a threshold voltage of 10.3 V in a semipolar (202¯1) III-nitride LD with ZnO top cladding.

Low voltage operation of GaN vertical nanowire MOSFET

NASA Astrophysics Data System (ADS)

Son, Dong-Hyeok; Jo, Young-Woo; Seo, Jae Hwa; Won, Chul-Ho; Im, Ki-Sik; Lee, Yong Soo; Jang, Hwan Soo; Kim, Dae-Hyun; Kang, In Man; Lee, Jung-Hee

2018-07-01

GaN gate-all-around (GAA) vertical nanowire MOSFET (VNWMOSFET) with channel length of 300 nm and diameter of 120 nm, the narrowest GaN-based vertical nanowire transistor ever achieved from the top-down approach, was fabricated by utilizing anisotropic side-wall wet etching in TMAH solution and photoresist etch-back process. The VNWMOSFET exhibited output characteristics with very low saturation drain voltage of less than 0.5 V, which is hardly observed from the wide bandgap-based devices. Simulation results indicated that the narrow diameter of the VNWMOSFET with relatively short channel length is responsible for the low voltage operation. The VNWMOSFET also demonstrated normally-off mode with threshold voltage (VTH) of 0.7 V, extremely low leakage current of ∼10-14 A, low drain-induced barrier lowering (DIBL) of 125 mV/V, and subthreshold swing (SS) of 66-122 mV/decade. The GaN GAA VNWMOSFET with narrow channel diameter investigated in this work would be promising for new low voltage logic application. He has been a Professor with the School of Electrical Engineering and Computer Science, Kyungpook National University, Daegu, Korea, since 1993

Role of the electron blocking layer in the graded-index separate confinement heterostructure nitride laser diodes

NASA Astrophysics Data System (ADS)

Bojarska, Agata; Goss, Jakub; Stanczyk, Szymon; Makarowa, Irina; Schiavon, Dario; Czernecki, Robert; Suski, Tadeusz; Perlin, Piotr

2018-04-01

In this work, we investigate the role of the electron blocking layer (EBL) in laser diodes based on a graded index separate confinement heterostructure. We compare two sets of devices with very different EBL aluminum composition (3% and 12%) and design (graded and superlattice). The results of electro-optical characterization of these laser diodes reveal surprisingly modest role of electron blocking layer composition in determination of the threshold current and the differential efficiency values. However, EBL structure influences the operating voltage, which is decreased for devices with lower EBL and superlattice EBL. We observe also the differences in the thermal stability of devices - characteristic temperature is lower for lasers with 3% Al in EBL.

Metal nanoparticle film-based room temperature Coulomb transistor.

PubMed

Willing, Svenja; Lehmann, Hauke; Volkmann, Mirjam; Klinke, Christian

2017-07-01

Single-electron transistors would represent an approach to developing less power-consuming microelectronic devices if room temperature operation and industry-compatible fabrication were possible. We present a concept based on stripes of small, self-assembled, colloidal, metal nanoparticles on a back-gate device architecture, which leads to well-defined and well-controllable transistor characteristics. This Coulomb transistor has three main advantages. By using the scalable Langmuir-Blodgett method, we combine high-quality chemically synthesized metal nanoparticles with standard lithography techniques. The resulting transistors show on/off ratios above 90%, reliable and sinusoidal Coulomb oscillations, and room temperature operation. Furthermore, this concept allows for versatile tuning of the device properties such as Coulomb energy gap and threshold voltage, as well as period, position, and strength of the oscillations.

Multiple negative differential resistance devices with ultra-high peak-to-valley current ratio for practical multi-valued logic and memory applications

NASA Astrophysics Data System (ADS)

Shin, Sunhae; Rok Kim, Kyung

2015-06-01

In this paper, we propose a novel multiple negative differential resistance (NDR) device with ultra-high peak-to-valley current ratio (PVCR) over 106 by combining tunnel diode with a conventional MOSFET, which suppresses the valley current with transistor off-leakage level. Band-to-band tunneling (BTBT) in tunnel junction provides the first peak, and the second peak and valley are generated from the suppression of diffusion current in tunnel diode by the off-state MOSFET. The multiple NDR curves can be controlled by doping concentration of tunnel junction and the threshold voltage of MOSFET. By using complementary multiple NDR devices, five-state memory is demonstrated only with six transistors.

Top-Contact Pentacene-Based Organic Thin Film Transistor (OTFT) with N, N'-Bis(3-Methyl Phenyl)- N, N'-Diphenyl Benzidine (TPD)/Au Bilayer Source-Drain Electrode

NASA Astrophysics Data System (ADS)

Borthakur, Tribeni; Sarma, Ranjit

2018-01-01

A top-contact Pentacene-based organic thin film transistor (OTFT) with N, N'-Bis (3-methyl phenyl)- N, N'-diphenyl benzidine (TPD)/Au bilayer source-drain electrode is reported. The devices with TPD/Au bilayer source-drain (S-D) electrodes show better performance than the single layer S-D electrode OTFT devices. The field-effect mobility of 4.13 cm2 v-1 s-1, the on-off ratio of 1.86 × 107, the threshold voltage of -4 v and the subthreshold slope of .27 v/decade, respectively, are obtained from the device with a TPD/Au bilayer source-drain electrode.

Tuning the threshold voltage of carbon nanotube transistors by n-type molecular doping for robust and flexible complementary circuits

PubMed Central

Wang, Huiliang; Wei, Peng; Li, Yaoxuan; Han, Jeff; Lee, Hye Ryoung; Naab, Benjamin D.; Liu, Nan; Wang, Chenggong; Adijanto, Eric; Tee, Benjamin C.-K.; Morishita, Satoshi; Li, Qiaochu; Gao, Yongli; Cui, Yi; Bao, Zhenan

2014-01-01

Tuning the threshold voltage of a transistor is crucial for realizing robust digital circuits. For silicon transistors, the threshold voltage can be accurately controlled by doping. However, it remains challenging to tune the threshold voltage of single-wall nanotube (SWNT) thin-film transistors. Here, we report a facile method to controllably n-dope SWNTs using 1H-benzoimidazole derivatives processed via either solution coating or vacuum deposition. The threshold voltages of our polythiophene-sorted SWNT thin-film transistors can be tuned accurately and continuously over a wide range. Photoelectron spectroscopy measurements confirmed that the SWNT Fermi level shifted to the conduction band edge with increasing doping concentration. Using this doping approach, we proceeded to fabricate SWNT complementary inverters by inkjet printing of the dopants. We observed an unprecedented noise margin of 28 V at VDD = 80 V (70% of 1/2VDD) and a gain of 85. Additionally, robust SWNT complementary metal−oxide−semiconductor inverter (noise margin 72% of 1/2VDD) and logic gates with rail-to-rail output voltage swing and subnanowatt power consumption were fabricated onto a highly flexible substrate. PMID:24639537

Interaction of solid organic acids with carbon nanotube field effect transistors

NASA Astrophysics Data System (ADS)

Klinke, Christian; Afzali, Ali; Avouris, Phaedon

2006-10-01

A series of solid organic acids were used to p-dope carbon nanotubes. The extent of doping is shown to be dependent on the pKa value of the acids. Highly fluorinated carboxylic acids and sulfonic acids are very effective in shifting the threshold voltage and making carbon nanotube field effect transistors to be more p-type devices. Weaker acids like phosphonic or hydroxamic acids had less effect. The doping of the devices was accompanied by a reduction of the hysteresis in the transfer characteristics. In-solution doping survives standard fabrication processes and renders p-doped carbon nanotube field effect transistors with good transport characteristics.

DOE Office of Scientific and Technical Information (OSTI.GOV)

Liu, Po-Tsun; Shieh, Han-Ping; Chou, Yi-Teh

This work presents the electrical characteristics of the nitrogenated amorphous InGaZnO thin film transistor (a-IGZO:N TFT). The a-IGZO:N film acting as a channel layer of a thin film transistor (TFT) device was prepared by dc reactive sputter with a nitrogen and argon gas mixture at room temperature. Experimental results show that the in situ nitrogen incorporation to IGZO film can properly adjust the threshold voltage and enhance the ambient stability of a TFT device. Furthermore, the a-IGZO:N TFT has a 44% increase in the carrier mobility and electrical reliability and uniformity also progress obviously while comparing with those not implementingmore » a nitrogen doping process.« less

Recent progress of carbon nanotube field emitters and their application.

PubMed

Seelaboyina, Raghunandan; Choi, Wonbong

2007-01-01

The potential of utilizing carbon nanotube field emission properties is an attractive feature for future vacuum electronic devices including: high power microwave, miniature x-ray, backlight for liquid crystal displays and flat panel displays. Their high emission current, nano scale geometry, chemical inertness and low threshold voltage for emission are attractive features for the field emission applications. In this paper we review the recent developments of carbon nanotube field emitters and their device applications. We also discuss the latest results on field emission current amplification achieved with an electron multiplier microchannel plate, and emission performance of multistage field emitter based on oxide nanowire operated in poor vacuum.

Fabrication of assembled ZnO/TiO2 heterojunction thin film transistors using solution processing technique

NASA Astrophysics Data System (ADS)

Liau, Leo Chau-Kuang; Lin, Yun-Guo

2015-01-01

Ceramic-based metal-oxide-semiconductor (MOS) field-effect thin film transistors (TFTs), which were assembled by ZnO and TiO2 heterojunction films coated using solution processing technique, were fabricated and characterized. The fabrication of the device began with the preparation of ZnO and TiO2 films by spin coating. The ZnO and TiO2 films that were stacked together and annealed at 450 °C were characterized as a p-n junction diode. Two types of the devices, p-channel and n-channel TFTs, were produced using different assemblies of ZnO and TiO2 films. Results show that the p-channel TFTs (p-TFTs) and n-channel TFTs (n-TFTs) using the assemblies of ZnO and TiO2 films were demonstrated by source-drain current vs. drain voltage (IDS-VDS) measurements. Several electronic properties of the p- and n- TFTs, such as threshold voltage (Vth), on-off ratio, channel mobility, and subthreshold swing (SS), were determined by current-voltage (I-V) data analysis. The ZnO/TiO2-based TFTs can be produced using solution processing technique and an assembly approach.

Printed 2 V-operating organic inverter arrays employing a small-molecule/polymer blend

PubMed Central

Shiwaku, Rei; Takeda, Yasunori; Fukuda, Takashi; Fukuda, Kenjiro; Matsui, Hiroyuki; Kumaki, Daisuke; Tokito, Shizuo

2016-01-01

Printed organic thin-film transistors (OTFTs) are well suited for low-cost electronic applications, such as radio frequency identification (RFID) tags and sensors. Achieving both high carrier mobility and uniform electrical characteristics in printed OTFT devices is essential in these applications. Here, we report on printed high-performance OTFTs and circuits using silver nanoparticle inks for the source/drain electrodes and a blend of dithieno[2,3-d;2′,3′-d′]benzo[1,2-b;4,5-b′]dithiophene (DTBDT-C6) and polystyrene for the organic semiconducting layer. A high saturation region mobility of 1.0 cm2 V−1 s−1 at low operation voltage of −5 V was obtained for relatively short channel lengths of 9 μm. All fifteen of the printed pseudo-CMOS inverter circuits were formed on a common substrate and operated at low operation voltage of 2 V with the total variation in threshold voltage of 0.35 V. Consequently, the printed OTFT devices can be used in more complex integrated circuit applications requiring low manufacturing cost over large areas. PMID:27698493

Insulator-semiconductor interface fixed charges in AlGaN/GaN metal-insulator-semiconductor devices with Al2O3 or AlTiO gate dielectrics

NASA Astrophysics Data System (ADS)

Le, Son Phuong; Nguyen, Duong Dai; Suzuki, Toshi-kazu

2018-01-01

We have investigated insulator-semiconductor interface fixed charges in AlGaN/GaN metal-insulator-semiconductor (MIS) devices with Al2O3 or AlTiO (an alloy of Al2O3 and TiO2) gate dielectrics obtained by atomic layer deposition on AlGaN. Analyzing insulator-thickness dependences of threshold voltages for the MIS devices, we evaluated positive interface fixed charges, whose density at the AlTiO/AlGaN interface is significantly lower than that at the Al2O3/AlGaN interface. This and a higher dielectric constant of AlTiO lead to rather shallower threshold voltages for the AlTiO gate dielectric than for Al2O3. The lower interface fixed charge density also leads to the fact that the two-dimensional electron concentration is a decreasing function of the insulator thickness for AlTiO, whereas being an increasing function for Al2O3. Moreover, we discuss the relationship between the interface fixed charges and interface states. From the conductance method, it is shown that the interface state densities are very similar at the Al2O3/AlGaN and AlTiO/AlGaN interfaces. Therefore, we consider that the lower AlTiO/AlGaN interface fixed charge density is not owing to electrons trapped at deep interface states compensating the positive fixed charges and can be attributed to a lower density of oxygen-related interface donors.

Gas composition sensing using carbon nanotube arrays

NASA Technical Reports Server (NTRS)

Li, Jing (Inventor); Meyyappan, Meyya (Inventor)

2008-01-01

A method and system for estimating one, two or more unknown components in a gas. A first array of spaced apart carbon nanotubes (''CNTs'') is connected to a variable pulse voltage source at a first end of at least one of the CNTs. A second end of the at least one CNT is provided with a relatively sharp tip and is located at a distance within a selected range of a constant voltage plate. A sequence of voltage pulses {V(t.sub.n)}.sub.n at times t=t.sub.n (n=1, . . . , N1; N1.gtoreq.3) is applied to the at least one CNT, and a pulse discharge breakdown threshold voltage is estimated for one or more gas components, from an analysis of a curve I(t.sub.n) for current or a curve e(t.sub.n) for electric charge transported from the at least one CNT to the constant voltage plate. Each estimated pulse discharge breakdown threshold voltage is compared with known threshold voltages for candidate gas components to estimate whether at least one candidate gas component is present in the gas. The procedure can be repeated at higher pulse voltages to estimate a pulse discharge breakdown threshold voltage for a second component present in the gas.

Abnormal threshold voltage shift under hot carrier stress in Ti1-xNx/HfO2 p-channel metal-oxide-semiconductor field-effect transistors

NASA Astrophysics Data System (ADS)

Tsai, Jyun-Yu; Chang, Ting-Chang; Lo, Wen-Hung; Ho, Szu-Han; Chen, Ching-En; Chen, Hua-Mao; Tseng, Tseung-Yuen; Tai, Ya-Hsiang; Cheng, Osbert; Huang, Cheng-Tung

2013-09-01

This work investigates the channel hot carrier (CHC) effect in HfO2/Ti1-xNx p-channel metal oxide semiconductor field effect transistors (p-MOSFETs). Generally, the subthreshold swing (S.S.) should increase during CHC stress (CHCS), since interface states will be generated near the drain side under high electric field due to drain voltage (Vd). However, our experimental data indicate that S.S. has no evident change under CHCS, but threshold voltage (Vth) shifts positively. This result can be attributed to hot carrier injected into high-k dielectric near the drain side. Meanwhile, it is surprising that such Vth degradation is not observed in the saturation region during stress. Therefore, drain-induced-barrier-lowering (DIBL) as a result of CHC-induced electron trapping is proposed to explain the different Vth behaviors in the linear and saturation regions. Additionally, the influence of different nitrogen concentrations in HfO2/Ti1-xNx p-MOSFETs on CHCS is also investigated in this work. Since nitrogen diffuses to SiO2/Si interface induced pre-Nit occurring to degrades channel mobility during the annealing process, a device with more nitrogen shows slightly less impact ionization, leading to insignificant charge trapping-induced DIBL behavior.

Fabrication of nanowire channels with unidirectional alignment and controlled length by a simple, gas-blowing-assisted, selective-transfer-printing technique.

PubMed

Kim, Yong-Kwan; Kang, Pil Soo; Kim, Dae-Il; Shin, Gunchul; Kim, Gyu Tae; Ha, Jeong Sook

2009-03-01

A printing-based lithographic technique for the patterning of V(2)O(5) nanowire channels with unidirectional orientation and controlled length is introduced. The simple, directional blowing of a patterned polymer stamp with N(2) gas, inked with randomly distributed V(2)O(5) nanowires, induces alignment of the nanowires perpendicular to the long axis of the line patterns. Subsequent stamping on the amine-terminated surface results in the selective transfer of the aligned nanowires with a controlled length corresponding to the width of the relief region of the polymer stamp. By employing such a gas-blowing-assisted, selective-transfer-printing technique, two kinds of device structures consisting of nanowire channels and two metal electrodes with top contact, whereby the nanowires were aligned either parallel (parallel device) or perpendicular (serial device) to the current flow in the conduction channel, are fabricated. The electrical properties demonstrate a noticeable difference between the two devices, with a large hysteresis in the parallel device but none in the serial device. Systematic analysis of the hysteresis and the electrical stability account for the observed hysteresis in terms of the proton diffusion in the water layer of the V(2)O(5) nanowires, induced by the application of an external bias voltage higher than a certain threshold voltage.

Memristive behavior in a junctionless flash memory cell

DOE Office of Scientific and Technical Information (OSTI.GOV)

Orak, Ikram; Department of Physics, Faculty of Science and Art, Bingöl University, 12000 Bingöl; Ürel, Mustafa

2015-06-08

We report charge storage based memristive operation of a junctionless thin film flash memory cell when it is operated as a two terminal device by grounding the gate. Unlike memristors based on nanoionics, the presented device mode, which we refer to as the flashristor mode, potentially allows greater control over the memristive properties, allowing rational design. The mode is demonstrated using a depletion type n-channel ZnO transistor grown by atomic layer deposition (ALD), with HfO{sub 2} as the tunnel dielectric, Al{sub 2}O{sub 3} as the control dielectric, and non-stoichiometric silicon nitride as the charge storage layer. The device exhibits themore » pinched hysteresis of a memristor and in the unoptimized device, R{sub off}/R{sub on} ratios of about 3 are presented with low operating voltages below 5 V. A simplified model predicts R{sub off}/R{sub on} ratios can be improved significantly by adjusting the native threshold voltage of the devices. The repeatability of the resistive switching is excellent and devices exhibit 10{sup 6 }s retention time, which can, in principle, be improved by engineering the gate stack and storage layer properties. The flashristor mode can find use in analog information processing applications, such as neuromorphic computing, where well-behaving and highly repeatable memristive properties are desirable.« less

Proposal for an All-Spin Artificial Neural Network: Emulating Neural and Synaptic Functionalities Through Domain Wall Motion in Ferromagnets.

PubMed

Sengupta, Abhronil; Shim, Yong; Roy, Kaushik

2016-12-01

Non-Boolean computing based on emerging post-CMOS technologies can potentially pave the way for low-power neural computing platforms. However, existing work on such emerging neuromorphic architectures have either focused on solely mimicking the neuron, or the synapse functionality. While memristive devices have been proposed to emulate biological synapses, spintronic devices have proved to be efficient at performing the thresholding operation of the neuron at ultra-low currents. In this work, we propose an All-Spin Artificial Neural Network where a single spintronic device acts as the basic building block of the system. The device offers a direct mapping to synapse and neuron functionalities in the brain while inter-layer network communication is accomplished via CMOS transistors. To the best of our knowledge, this is the first demonstration of a neural architecture where a single nanoelectronic device is able to mimic both neurons and synapses. The ultra-low voltage operation of low resistance magneto-metallic neurons enables the low-voltage operation of the array of spintronic synapses, thereby leading to ultra-low power neural architectures. Device-level simulations, calibrated to experimental results, was used to drive the circuit and system level simulations of the neural network for a standard pattern recognition problem. Simulation studies indicate energy savings by  ∼  100× in comparison to a corresponding digital/analog CMOS neuron implementation.

Low-threshold voltage ultraviolet light-emitting diodes based on (Al,Ga)N metal-insulator-semiconductor structures

NASA Astrophysics Data System (ADS)

Liang, Yu-Han; Towe, Elias

2017-12-01

Al-rich III-nitride-based deep-ultraviolet (UV) (275-320 nm) light-emitting diodes are plagued with a low emission efficiency and high turn-on voltages. We report Al-rich (Al,Ga)N metal-insulator-semiconductor UV light-emitting Schottky diodes with low turn-on voltages of <3 V, which are about half those of typical (Al,Ga)N p-i-n diodes. Our devices use a thin AlN film as the insulator and an n-type Al0.58Ga0.42N film as the semiconductor. To improve the efficiency, we inserted a GaN quantum-well structure between the AlN insulator and the n-type Al x Ga1- x N semiconductor. The benefits of the quantum-well structure include the potential to tune the emission wavelength and the capability to confine carriers for more efficient radiative recombination.

Electrostatic modulation of periodic potentials in a two-dimensional electron gas: From antidot lattice to quantum dot lattice

DOE Office of Scientific and Technical Information (OSTI.GOV)

Goswami, Srijit; Aamir, Mohammed Ali; Shamim, Saquib

2013-12-04

We use a dual gated device structure to introduce a gate-tuneable periodic potential in a GaAs/AlGaAs two dimensional electron gas (2DEG). Using only a suitable choice of gate voltages we can controllably alter the potential landscape of the bare 2DEG, inducing either a periodic array of antidots or quantum dots. Antidots are artificial scattering centers, and therefore allow for a study of electron dynamics. In particular, we show that the thermovoltage of an antidot lattice is particularly sensitive to the relative positions of the Fermi level and the antidot potential. A quantum dot lattice, on the other hand, provides themore » opportunity to study correlated electron physics. We find that its current-voltage characteristics display a voltage threshold, as well as a power law scaling, indicative of collective Coulomb blockade in a disordered background.« less

Molecular Self-Assembly and Interfacial Engineering for Highly Efficient Organic Field Effect Transistors and Solar Cells

DTIC Science & Technology

2012-09-23

balance between disordered SAMs to promote large pentacene grains and thick SAMs to aid in physically buffering the charge carriers in pentacene from...to 0.76 µF/cm2), and enhanced pentacene OFET device performance such as higher charge carrier mobility, current on/off ratio, and lower threshold...surface charge trap • Tuning of surface energy • Control of surface group orientation SAM/MO ultrathin dielectric: • Low-voltage operation

Redundancy Technology With A Focused Ion Beam

NASA Astrophysics Data System (ADS)

Komano, Haruki; Hashimoto, Kazuhiko; Takigawa, Tadahiro

1989-08-01

Fuse cutting with a focused ion beam to activate redundancy circuits is proposed. In order to verify its potential usefulness, experiments have been performed. Fuse-cutting time was evaluated using aluminum fuses with a thin passivation layer, which are difficult to cut by conventional laser-beam technology due to the material's high reflectivity. The fuse width and thickness were 2 and 0.8 μm, respectively. The fuse was cut in 5 seconds with a 30 keV focused ion beam of 0.3 A/cm2 current density. Since the fuses used in DRAMs will be smaller, their cutting time will become shorter by scanning an ion beam on narrower areas. Moreover, it can be shortened by increasing current density. Fuses for redundancy technology in 256 k CMOS SRAMs were cut with a focused ion beam. The operation of the memories was checked with a memory tester. It was confirmed that memories which had failure cells operated normally after focused-ion-beam fuse-cutting. Focused ion beam irradiation effects upon a device have been studied. When a 30 keV gallium focused ion beam was irradiated near the gate of MOSFETs, a threshold voltage shift was not observed at an ion dose of 0.3 C/cm2 which corresponded to the ion dose in cutting a fuse. However, when irradiated on the gate, a threshold voltage shift was observed at ion doses of more than 8 x 10-4 C/cm2. The voltage shift was caused by the charge of ions within the passivation layer. It is necessary at least not to irradiate a focused ion beam on a device in cutting fuses. It is concluded that the focused-ion-beam method will be advantageous for future redundancy technology application.

Method to improve reliability of a fuel cell system using low performance cell detection at low power operation

DOEpatents

Choi, Tayoung; Ganapathy, Sriram; Jung, Jaehak; Savage, David R.; Lakshmanan, Balasubramanian; Vecasey, Pamela M.

2013-04-16

A system and method for detecting a low performing cell in a fuel cell stack using measured cell voltages. The method includes determining that the fuel cell stack is running, the stack coolant temperature is above a certain temperature and the stack current density is within a relatively low power range. The method further includes calculating the average cell voltage, and determining whether the difference between the average cell voltage and the minimum cell voltage is greater than a predetermined threshold. If the difference between the average cell voltage and the minimum cell voltage is greater than the predetermined threshold and the minimum cell voltage is less than another predetermined threshold, then the method increments a low performing cell timer. A ratio of the low performing cell timer and a system run timer is calculated to identify a low performing cell.

Restorative effect of oxygen annealing on device performance in HfIZO thin-film transistors

NASA Astrophysics Data System (ADS)

Ha, Tae-Jun

2015-03-01

Metal-oxide based thin-film transistors (oxide-TFTs) are very promising for use in next generation electronics such as transparent displays requiring high switching and driving performance. In this study, we demonstrate an optimized process to secure excellent device performance with a favorable shift of the threshold voltage toward 0V in amorphous hafnium-indium-zinc-oxide (a-HfIZO) TFTs by using post-treatment with oxygen annealing. This enhancement results from the improved interfacial characteristics between gate dielectric and semiconductor layers due to the reduction in the density of interfacial states related to oxygen vacancies afforded by oxygen annealing. The device statistics confirm the improvement in the device-to-device and run-to-run uniformity. We also report on the photo-induced stability in such oxide-TFTs against long-term UV irradiation, which is significant for transparent displays.

Structural and electrical characteristics of high-κ Er2O3 and Er2TiO5 gate dielectrics for a-IGZO thin-film transistors

PubMed Central

2013-01-01

In this letter, we investigated the structural and electrical characteristics of high-κ Er2O3 and Er2TiO5 gate dielectrics on the amorphous indium-gallium-zinc-oxide (a-IGZO) thin-film transistor (TFT) devices. Compared with the Er2O3 dielectric, the a-IGZO TFT device incorporating an Er2TiO5 gate dielectric exhibited a low threshold voltage of 0.39 V, a high field-effect mobility of 8.8 cm2/Vs, a small subthreshold swing of 143 mV/decade, and a high Ion/Ioff current ratio of 4.23 × 107, presumably because of the reduction in the oxygen vacancies and the formation of the smooth surface roughness as a result of the incorporation of Ti into the Er2TiO5 film. Furthermore, the reliability of voltage stress can be improved using an Er2TiO5 gate dielectric. PMID:23294730

Structural and electrical characteristics of high-κ Er2O3 and Er2TiO5 gate dielectrics for a-IGZO thin-film transistors.

PubMed

Chen, Fa-Hsyang; Her, Jim-Long; Shao, Yu-Hsuan; Matsuda, Yasuhiro H; Pan, Tung-Ming

2013-01-08

In this letter, we investigated the structural and electrical characteristics of high-κ Er2O3 and Er2TiO5 gate dielectrics on the amorphous indium-gallium-zinc-oxide (a-IGZO) thin-film transistor (TFT) devices. Compared with the Er2O3 dielectric, the a-IGZO TFT device incorporating an Er2TiO5 gate dielectric exhibited a low threshold voltage of 0.39 V, a high field-effect mobility of 8.8 cm2/Vs, a small subthreshold swing of 143 mV/decade, and a high Ion/Ioff current ratio of 4.23 × 107, presumably because of the reduction in the oxygen vacancies and the formation of the smooth surface roughness as a result of the incorporation of Ti into the Er2TiO5 film. Furthermore, the reliability of voltage stress can be improved using an Er2TiO5 gate dielectric.

Memristive Ion Channel-Doped Biomembranes as Synaptic Mimics.

PubMed

Najem, Joseph S; Taylor, Graham J; Weiss, Ryan J; Hasan, Md Sakib; Rose, Garrett; Schuman, Catherine D; Belianinov, Alex; Collier, C Patrick; Sarles, Stephen A

2018-05-22

Solid-state neuromorphic systems based on transistors or memristors have yet to achieve the interconnectivity, performance, and energy efficiency of the brain due to excessive noise, undesirable material properties, and nonbiological switching mechanisms. Here we demonstrate that an alamethicin-doped, synthetic biomembrane exhibits memristive behavior, emulates key synaptic functions including paired-pulse facilitation and depression, and enables learning and computing. Unlike state-of-the-art devices, our two-terminal, biomolecular memristor features similar structure (biomembrane), switching mechanism (ion channels), and ionic transport modality as biological synapses while operating at considerably lower power. The reversible and volatile voltage-driven insertion of alamethicin peptides into an insulating lipid bilayer creates conductive pathways that exhibit pinched current-voltage hysteresis at potentials above their insertion threshold. Moreover, the synapse-like dynamic properties of the biomolecular memristor allow for simplified learning circuit implementations. Low-power memristive devices based on stimuli-responsive biomolecules represent a major advance toward implementation of full synaptic functionality in neuromorphic hardware.

Applications of digital image acquisition in anthropometry

NASA Technical Reports Server (NTRS)

Woolford, B.; Lewis, J. L.

1981-01-01

A description is given of a video kinesimeter, a device for the automatic real-time collection of kinematic and dynamic data. Based on the detection of a single bright spot by three TV cameras, the system provides automatic real-time recording of three-dimensional position and force data. It comprises three cameras, two incandescent lights, a voltage comparator circuit, a central control unit, and a mass storage device. The control unit determines the signal threshold for each camera before testing, sequences the lights, synchronizes and analyzes the scan voltages from the three cameras, digitizes force from a dynamometer, and codes the data for transmission to a floppy disk for recording. Two of the three cameras face each other along the 'X' axis; the third camera, which faces the center of the line between the first two, defines the 'Y' axis. An image from the 'Y' camera and either 'X' camera is necessary for determining the three-dimensional coordinates of the point.

To sort or not to sort: the impact of spike-sorting on neural decoding performance.

PubMed

Todorova, Sonia; Sadtler, Patrick; Batista, Aaron; Chase, Steven; Ventura, Valérie

2014-10-01

Brain-computer interfaces (BCIs) are a promising technology for restoring motor ability to paralyzed patients. Spiking-based BCIs have successfully been used in clinical trials to control multi-degree-of-freedom robotic devices. Current implementations of these devices require a lengthy spike-sorting step, which is an obstacle to moving this technology from the lab to the clinic. A viable alternative is to avoid spike-sorting, treating all threshold crossings of the voltage waveform on an electrode as coming from one putative neuron. It is not known, however, how much decoding information might be lost by ignoring spike identity. We present a full analysis of the effects of spike-sorting schemes on decoding performance. Specifically, we compare how well two common decoders, the optimal linear estimator and the Kalman filter, reconstruct the arm movements of non-human primates performing reaching tasks, when receiving input from various sorting schemes. The schemes we tested included: using threshold crossings without spike-sorting; expert-sorting discarding the noise; expert-sorting, including the noise as if it were another neuron; and automatic spike-sorting using waveform features. We also decoded from a joint statistical model for the waveforms and tuning curves, which does not involve an explicit spike-sorting step. Discarding the threshold crossings that cannot be assigned to neurons degrades decoding: no spikes should be discarded. Decoding based on spike-sorted units outperforms decoding based on electrodes voltage crossings: spike-sorting is useful. The four waveform based spike-sorting methods tested here yield similar decoding efficiencies: a fast and simple method is competitive. Decoding using the joint waveform and tuning model shows promise but is not consistently superior. Our results indicate that simple automated spike-sorting performs as well as the more computationally or manually intensive methods used here. Even basic spike-sorting adds value to the low-threshold waveform-crossing methods often employed in BCI decoding.

To sort or not to sort: the impact of spike-sorting on neural decoding performance

NASA Astrophysics Data System (ADS)

Todorova, Sonia; Sadtler, Patrick; Batista, Aaron; Chase, Steven; Ventura, Valérie

2014-10-01

Objective. Brain-computer interfaces (BCIs) are a promising technology for restoring motor ability to paralyzed patients. Spiking-based BCIs have successfully been used in clinical trials to control multi-degree-of-freedom robotic devices. Current implementations of these devices require a lengthy spike-sorting step, which is an obstacle to moving this technology from the lab to the clinic. A viable alternative is to avoid spike-sorting, treating all threshold crossings of the voltage waveform on an electrode as coming from one putative neuron. It is not known, however, how much decoding information might be lost by ignoring spike identity. Approach. We present a full analysis of the effects of spike-sorting schemes on decoding performance. Specifically, we compare how well two common decoders, the optimal linear estimator and the Kalman filter, reconstruct the arm movements of non-human primates performing reaching tasks, when receiving input from various sorting schemes. The schemes we tested included: using threshold crossings without spike-sorting; expert-sorting discarding the noise; expert-sorting, including the noise as if it were another neuron; and automatic spike-sorting using waveform features. We also decoded from a joint statistical model for the waveforms and tuning curves, which does not involve an explicit spike-sorting step. Main results. Discarding the threshold crossings that cannot be assigned to neurons degrades decoding: no spikes should be discarded. Decoding based on spike-sorted units outperforms decoding based on electrodes voltage crossings: spike-sorting is useful. The four waveform based spike-sorting methods tested here yield similar decoding efficiencies: a fast and simple method is competitive. Decoding using the joint waveform and tuning model shows promise but is not consistently superior. Significance. Our results indicate that simple automated spike-sorting performs as well as the more computationally or manually intensive methods used here. Even basic spike-sorting adds value to the low-threshold waveform-crossing methods often employed in BCI decoding.

Ultra low power consumption for self-oscillating nanoelectromechanical systems constructed by contacting two nanowires.

PubMed

Barois, T; Ayari, A; Vincent, P; Perisanu, S; Poncharal, P; Purcell, S T

2013-04-10

We report here the observation of a new self-oscillation mechanism in nanoelectromechanical systems (NEMS). A highly resistive nanowire was positioned to form a point-contact at a chosen vibration node of a silicon carbide nanowire resonator. Spontaneous and robust mechanical oscillations arise when a sufficient DC voltage is applied between the two nanowires. An original model predicting the threshold voltage is used to estimate the piezoresistivity of the point-contact in agreement with the observations. The measured input power is in the pW-range which is the lowest reported value for such systems. The simplicity of the contacting procedure and the low power consumption open a new route for integrable and low-loss self-excited NEMS devices.

Theoretical and Experimental Investigation of Particle Trapping via Acoustic Bubbles

NASA Astrophysics Data System (ADS)

Chen, Yun; Fang, Zecong; Merritt, Brett; Saadat-Moghaddam, Darius; Strack, Dillon; Xu, Jie; Lee, Sungyon

2014-11-01

One important application of lab-on-a-chip devices is the trapping and sorting of micro-objects, with acoustic bubbles emerging as an effective, non-contact method. Acoustically actuated bubbles are known to exert a secondary radiation force on micro-particles and trap them, when this radiation force exceeds the drag force that acts to keep the particles in motion. In this study, we theoretically evaluate the magnitudes of these two forces for varying actuation frequencies and voltages. In particular, the secondary radiation force is calculated directly from bubble oscillation shapes that have been experimentally measured for varying acoustic parameters. Finally, based on the force estimates, we predict the threshold voltage and frequency for trapping and compare them to the experimental results.

Amorphous In-Ga-Zn-O Thin Film Transistor Current-Scaling Pixel Electrode Circuit for Active-Matrix Organic Light-Emitting Displays

NASA Astrophysics Data System (ADS)

Chen, Charlene; Abe, Katsumi; Fung, Tze-Ching; Kumomi, Hideya; Kanicki, Jerzy

2009-03-01

In this paper, we analyze application of amorphous In-Ga-Zn-O thin film transistors (a-InGaZnO TFTs) to current-scaling pixel electrode circuit that could be used for 3-in. quarter video graphics array (QVGA) full color active-matrix organic light-emitting displays (AM-OLEDs). Simulation results, based on a-InGaZnO TFT and OLED experimental data, show that both device sizes and operational voltages can be reduced when compare to the same circuit using hydrogenated amorphous silicon (a-Si:H) TFTs. Moreover, the a-InGaZnO TFT pixel circuit can compensate for the drive TFT threshold voltage variation (ΔVT) within acceptable operating error range.

New insights on SOI Tunnel FETs with low-temperature process flow for CoolCube™ integration

NASA Astrophysics Data System (ADS)

Diaz Llorente, C.; Le Royer, C.; Batude, P.; Fenouillet-Beranger, C.; Martinie, S.; Lu, C.-M. V.; Allain, F.; Colinge, J.-P.; Cristoloveanu, S.; Ghibaudo, G.; Vinet, M.

2018-06-01

This paper reports the fabrication and electrical characterization of planar SOI Tunnel FETs (TFETs) made using a Low-Temperature (LT) process designed for 3D sequential integration. These proof-of-concept TFETs feature junctions obtained by Solid Phase Epitaxy Regrowth (SPER). Their electrical behavior is analyzed and compared to reference samples (regular process using High-Temperature junction formation, HT). Dual ID-VDS measurements verify that the TFET structures present Band-to-Band tunnelling (BTBT) carrier injection and not Schottky Barrier tunnelling. P-mode operating LT TFETs deliver an ON state current similar to that of the HT reference, opening the door towards optimized devices operating with very low threshold voltage VTH and low supply voltage VDD.

Dual-gate photo thin-film transistor: a “smart” pixel for high- resolution and low-dose X-ray imaging

NASA Astrophysics Data System (ADS)

Wang, Kai; Ou, Hai; Chen, Jun

2015-06-01

Since its emergence a decade ago, amorphous silicon flat panel X-ray detector has established itself as a ubiquitous platform for an array of digital radiography modalities. The fundamental building block of a flat panel detector is called a pixel. In all current pixel architectures, sensing, storage, and readout are unanimously kept separate, inevitably compromising resolution by increasing pixel size. To address this issue, we hereby propose a “smart” pixel architecture where the aforementioned three components are combined in a single dual-gate photo thin-film transistor (TFT). In other words, the dual-gate photo TFT itself functions as a sensor, a storage capacitor, and a switch concurrently. Additionally, by harnessing the amplification effect of such a thin-film transistor, we for the first time created a single-transistor active pixel sensor. The proof-of-concept device had a W/L ratio of 250μm/20μm and was fabricated using a simple five-mask photolithography process, where a 130nm transparent ITO was used as the top photo gate, and a 200nm amorphous silicon as the absorbing channel layer. The preliminary results demonstrated that the photocurrent had been increased by four orders of magnitude due to light-induced threshold voltage shift in the sub-threshold region. The device sensitivity could be simply tuned by photo gate bias to specifically target low-level light detection. The dependence of threshold voltage on light illumination indicated that a dynamic range of at least 80dB could be achieved. The "smart" pixel technology holds tremendous promise for developing high-resolution and low-dose X-ray imaging and may potentially lower the cancer risk imposed by radiation, especially among paediatric patients.

Biophysical mechanism of spike threshold dependence on the rate of rise of the membrane potential by sodium channel inactivation or subthreshold axonal potassium current

PubMed Central

Wester, Jason C.

2013-01-01

Spike threshold filters incoming inputs and thus gates activity flow through neuronal networks. Threshold is variable, and in many types of neurons there is a relationship between the threshold voltage and the rate of rise of the membrane potential (dVm/dt) leading to the spike. In primary sensory cortex this relationship enhances the sensitivity of neurons to a particular stimulus feature. While Na+ channel inactivation may contribute to this relationship, recent evidence indicates that K+ currents located in the spike initiation zone are crucial. Here we used a simple Hodgkin-Huxley biophysical model to systematically investigate the role of K+ and Na+ current parameters (activation voltages and kinetics) in regulating spike threshold as a function of dVm/dt. Threshold was determined empirically and not estimated from the shape of the Vm prior to a spike. This allowed us to investigate intrinsic currents and values of gating variables at the precise voltage threshold. We found that Na+ inactivation is sufficient to produce the relationship provided it occurs at hyperpolarized voltages combined with slow kinetics. Alternatively, hyperpolarization of the K+ current activation voltage, even in the absence of Na+ inactivation, is also sufficient to produce the relationship. This hyperpolarized shift of K+ activation allows an outward current prior to spike initiation to antagonize the Na+ inward current such that it becomes self-sustaining at a more depolarized voltage. Our simulations demonstrate parameter constraints on Na+ inactivation and the biophysical mechanism by which an outward current regulates spike threshold as a function of dVm/dt. PMID:23344915

Modeling drain current of indium zinc oxide thin film transistors prepared by solution deposition technique

NASA Astrophysics Data System (ADS)

Qiang, Lei; Liang, Xiaoci; Cai, Guangshuo; Pei, Yanli; Yao, Ruohe; Wang, Gang

2018-06-01

Indium zinc oxide (IZO) thin film transistor (TFT) deposited by solution method is of considerable technological interest as it is a key component for the fabrication of flexible and cheap transparent electronic devices. To obtain a principal understanding of physical properties of solution-processed IZO TFT, a new drain current model that account for the charge transport is proposed. The formulation is developed by incorporating the effect of gate voltage on mobility and threshold voltage with the carrier charges. It is demonstrated that in IZO TFTs the below threshold regime should be divided into two sections: EC - EF > 3kT and EC - EF ≤ 3kT, where kT is the thermal energy, EF and EC represent the Fermi level and the conduction band edge, respectively. Additionally, in order to describe conduction mechanisms more accurately, the extended mobility edge model is conjoined, which can also get rid of the complicated and lengthy computations. The good agreement between measured and calculated results confirms the efficiency of this model for the design of integrated large-area thin film circuits.

Characteristics of Reduced Graphene Oxide Quantum Dots for a Flexible Memory Thin Film Transistor.

PubMed

Kim, Yo-Han; Lee, Eun Yeol; Lee, Hyun Ho; Seo, Tae Seok

2017-05-17

Reduced graphene oxide quantum dot (rGOQD) devices in formats of capacitor and thin film transistor (TFT) were demonstrated and examined as the first trial to achieve nonambipolar channel property. In addition, through a gold nanoparticle (Au NP) layer embedded between the rGOQD active channel and dielectric layer, memory capacitor and TFT performances were realized by capacitance-voltage (C-V) hysteresis and gate program, erase, and reprogram biases. First, capacitor structure of the rGOQD memory device was constructed to examine memory charging effect featured in hysteretic C-V behavior with a 30 nm dielectric layer of cross-linked poly(vinyl alcohol). For the intervening Au NP charging layer, self-assembled monolayer (SAM) formation of the Au NP was executed to utilize electrostatic interaction by a dip-coating process under ambient environments with a conformal fabrication uniformity. Second, the rGOQD memory TFT device was also constructed in the same format of the Au NPs SAMs on a flexible substrate. Characteristics of the rGOQD TFT output showed novel saturation curves unlike typical graphene-based TFTs. However, The rGOQD TFT device reveals relatively low on/off ratio of 10 1 and mobility of 5.005 cm 2 /V·s. For the memory capacitor, the flat-band voltage shift (ΔV FB ) was measured as 3.74 V for ±10 V sweep, and for the memory TFT, the threshold voltage shift (ΔV th ) by the Au NP charging was detected as 7.84 V. In summary, it was concluded that the rGOQD memory device could accomplish an ideal graphene-based memory performance, which could have provided a wide memory window and saturated output characteristics.

Inert gas annealing effect in solution-processed amorphous indium-gallium-zinc-oxide thin-film transistors

NASA Astrophysics Data System (ADS)

Lee, Seungwoon; Jeong, Jaewook

2017-08-01

In this paper, the annealing effect of solution-processed amorphous indium-gallium-zinc-oxide thin-film transistors (a-IGZO TFTs), under ambient He (He-device), is systematically analyzed by comparison with those under ambient O2 (O2-device) and N2 (N2-device), respectively. The He-device shows high field-effect mobility and low subthreshold slope owing to the minimization of the ambient effect. The degradation of the O2- and N2-device performances originate from their respective deep acceptor-like and shallow donor-like characteristics, which can be verified by comparison with the He-device. However, the three devices show similar threshold voltage instability under prolonged positive bias stress due to the effect of excess oxygen. Therefore, annealing in ambient He is the most suitable method for the fabrication of reference TFTs to study the various effects of the ambient during the annealing process in solution-processed a-IGZO TFTs.

Microcrystalline silicon thin-film transistors for large area electronic applications

NASA Astrophysics Data System (ADS)

Chan, Kah-Yoong; Bunte, Eerke; Knipp, Dietmar; Stiebig, Helmut

2007-11-01

Thin-film transistors (TFTs) based on microcrystalline silicon (µc-Si:H) exhibit high charge carrier mobilities exceeding 35 cm2 V-1 s-1. The devices are fabricated by plasma-enhanced chemical vapor deposition at substrate temperatures below 200 °C. The fabrication process of the µc-Si:H TFTs is similar to the low temperature fabrication of amorphous silicon TFTs. The electrical characteristics of the µc-Si:H-based transistors will be presented. As the device charge carrier mobility of short channel TFTs is limited by the contacts, the influence of the drain and source contacts on the device parameters including the device charge carrier mobility and the device threshold voltage will be discussed. The experimental data will be described by a modified standard transistor model which accounts for the contact effects. Furthermore, the transmission line method was used to extract the device parameters including the contact resistance. The modified standard transistor model and the transmission line method will be compared in terms of the extracted device parameters and contact resistances.

An optical microfluidic platform for spatiotemporal biofilm treatment monitoring

NASA Astrophysics Data System (ADS)

Kim, Young Wook; Mosteller, Matthew P.; Subramanian, Sowmya; Meyer, Mariana T.; Bentley, William E.; Ghodssi, Reza

2016-01-01

Bacterial biofilms constitute in excess of 65% of clinical microbial infections, with the antibiotic treatment of biofilm infections posing a unique challenge due to their high antibiotic tolerance. Recent studies performed in our group have demonstrated that a bioelectric effect featuring low-intensity electric signals combined with antibiotics can significantly improve the efficacy of biofilm treatment. In this work, we demonstrate the bioelectric effect using sub-micron thick planar electrodes in a microfluidic device. This is critical in efforts to develop microsystems for clinical biofilm infection management, including both in vivo and in vitro applications. Adaptation of the method to the microscale, for example, can enable the development of localized biofilm infection treatment using microfabricated medical devices, while augmenting existing capabilities to perform biofilm management beyond the clinical realm. Furthermore, due to scale-down of the system, the voltage requirement for inducing the electric field is reduced further below the media electrolysis threshold. Enhanced biofilm treatment using the bioelectric effect in the developed microfluidic device elicited a 56% greater reduction in viable cell density and 26% further decrease in biomass growth compared to traditional antibiotic therapy. This biofilm treatment efficacy, demonstrated in a micro-scale device and utilizing biocompatible voltage ranges, encourages the use of this method for future clinical biofilm treatment applications.

Performance evaluation of bottom gate ZnO based thin film transistors with different W/L ratios for UV sensing

NASA Astrophysics Data System (ADS)

Varma, Tarun; Periasamy, C.; Boolchandani, Dharmendar

2018-02-01

In this paper, we report the simulation, fabrication and characterisation of UV photo-detectors with bottom gate ZnO Thin Film Transistors (TFTs), grown on silicon at room temperature using RF magnetron sputtering process. The static performance of these detectors have been explored by varying the channel lengths (6 μm and 12 μm). The fabricated devices show low leakage currents with threshold voltages of 1.18 & 2.33 V, sub-threshold swings of 13.5 & 12.8 V/dec for channel lengths of 6 μm and 12 μm TFT, respectively. They also exhibit superior electrical characteristics with an ON-OFF ratio of the order of 3. The detector was also tested for device stability, with the transfer characteristics of the TFTs, which got deteriorated mainly by the negative bias-stress. The TFTs were further tested for UV detector applications and found to exhibit good photo-response.

Observation of a photoinduced, resonant tunneling effect in a carbon nanotube–silicon heterojunction

PubMed Central

Ambrosio, Antonio; Boscardin, Maurizio; Castrucci, Paola; Crivellari, Michele; Cilmo, Marco; De Crescenzi, Maurizio; De Nicola, Francesco; Fiandrini, Emanuele; Grossi, Valentina; Maddalena, Pasqualino; Passacantando, Maurizio; Santucci, Sandro; Scarselli, Manuela; Valentini, Antonio

2015-01-01

Summary A significant resonant tunneling effect has been observed under the 2.4 V junction threshold in a large area, carbon nanotube–silicon (CNT–Si) heterojunction obtained by growing a continuous layer of multiwall carbon nanotubes on an n-doped silicon substrate. The multiwall carbon nanostructures were grown by a chemical vapor deposition (CVD) technique on a 60 nm thick, silicon nitride layer, deposited on an n-type Si substrate. The heterojunction characteristics were intensively studied on different substrates, resulting in high photoresponsivity with a large reverse photocurrent plateau. In this paper, we report on the photoresponsivity characteristics of the device, the heterojunction threshold and the tunnel-like effect observed as a function of applied voltage and excitation wavelength. The experiments are performed in the near-ultraviolet to near-infrared wavelength range. The high conversion efficiency of light radiation into photoelectrons observed with the presented layout allows the device to be used as a large area photodetector with very low, intrinsic dark current and noise. PMID:25821710

Observation of a photoinduced, resonant tunneling effect in a carbon nanotube-silicon heterojunction.

PubMed

Aramo, Carla; Ambrosio, Antonio; Ambrosio, Michelangelo; Boscardin, Maurizio; Castrucci, Paola; Crivellari, Michele; Cilmo, Marco; De Crescenzi, Maurizio; De Nicola, Francesco; Fiandrini, Emanuele; Grossi, Valentina; Maddalena, Pasqualino; Passacantando, Maurizio; Santucci, Sandro; Scarselli, Manuela; Valentini, Antonio

2015-01-01

A significant resonant tunneling effect has been observed under the 2.4 V junction threshold in a large area, carbon nanotube-silicon (CNT-Si) heterojunction obtained by growing a continuous layer of multiwall carbon nanotubes on an n-doped silicon substrate. The multiwall carbon nanostructures were grown by a chemical vapor deposition (CVD) technique on a 60 nm thick, silicon nitride layer, deposited on an n-type Si substrate. The heterojunction characteristics were intensively studied on different substrates, resulting in high photoresponsivity with a large reverse photocurrent plateau. In this paper, we report on the photoresponsivity characteristics of the device, the heterojunction threshold and the tunnel-like effect observed as a function of applied voltage and excitation wavelength. The experiments are performed in the near-ultraviolet to near-infrared wavelength range. The high conversion efficiency of light radiation into photoelectrons observed with the presented layout allows the device to be used as a large area photodetector with very low, intrinsic dark current and noise.

Comparative investigation of novel hetero gate dielectric and drain engineered charge plasma TFET for improved DC and RF performance

NASA Astrophysics Data System (ADS)

Yadav, Dharmendra Singh; Verma, Abhishek; Sharma, Dheeraj; Tirkey, Sukeshni; Raad, Bhagwan Ram

2017-11-01

Tunnel-field-effect-transistor (TFET) has emerged as one of the most prominent devices to replace conventional MOSFET due to its ability to provide sub-threshold slope below 60 mV/decade (SS ≤ 60 mV/decade) and low leakage current. Despite this, TFETs suffer from ambipolar behavior, lower ON-state current, and poor RF performance. To address these issues, we have introduced drain and gate work function engineering with hetero gate dielectric for the first time in charge plasma based doping-less TFET (DL TFET). In this, the usage of dual work functionality over the drain region significantly reduces the ambipolar behavior of the device by varying the energy barrier at drain/channel interface. Whereas, the presence of dual work function at the gate terminal increases the ON-state current (ION). The combined effect of dual work function at the gate and drain electrode results in the increment of ON-state current (ION) and decrement of ambipolar conduction (Iambi) respectively. Furthermore, the incorporation of hetero gate dielectric along with dual work functionality at the drain and gate electrode provides an overall improvement in the performance of the device in terms of reduction in ambipolarity, threshold voltage and sub-threshold slope along with improved ON-state current and high frequency figures of merit.

Characterization of Sensitivity Encoded Silicon Photomultiplier (SeSP) with 1-Dimensional and 2-Dimensional Encoding for High Resolution PET/MR

NASA Astrophysics Data System (ADS)

Omidvari, Negar; Schulz, Volkmar

2015-06-01

This paper evaluates the performance of a new type of PET detectors called sensitivity encoded silicon photomultiplier (SeSP), which allows a direct coupling of small-pitch crystal arrays to the detector with a reduction in the number of readout channels. Four SeSP devices with two separate encoding schemes of 1D and 2D were investigated in this study. Furthermore, both encoding schemes were manufactured in two different sizes of 4 ×4 mm2 and 7. 73 ×7. 9 mm2, in order to investigate the effect of size on detector parameters. All devices were coupled to LYSO crystal arrays with 1 mm pitch size and 10 mm height, with optical isolation between crystals. The characterization was done for the key parameters of crystal-identification, energy resolution, and time resolution as a function of triggering threshold and over-voltage (OV). Position information was archived using the center of gravity (CoG) algorithm and a least squares approach (LSQA) in combination with a mean light matrix around the photo-peak. The positioning results proved the capability of all four SeSP devices in precisely identifying all crystals coupled to the sensors. Energy resolution was measured at different bias voltages, varying from 12% to 18% (FWHM) and paired coincidence time resolution (pCTR) of 384 ps to 1.1 ns was obtained for different SeSP devices at about 18 °C room temperature. However, the best time resolution was achieved at the highest over-voltage, resulting in a noise ratio of 99.08%.

Improved organic thin-film transistor performance using novel self-assembled monolayers

NASA Astrophysics Data System (ADS)

McDowell, M.; Hill, I. G.; McDermott, J. E.; Bernasek, S. L.; Schwartz, J.

2006-02-01

Pentacene-based organic thin-film transistors have been fabricated using a phosphonate-linked anthracene self-assembled monolayer as a buffer between the silicon dioxide gate dielectric and the active pentacene channel region. Vast improvements in the subthreshold slope and threshold voltage are observed compared to control devices fabricated without the buffer. Both observations are consistent with a greatly reduced density of charge trapping states at the semiconductor-dielectric interface effected by introduction of the self-assembled monolayer.

Specific features of a single-pulse sliding discharge in neon near the threshold for spark breakdown

NASA Astrophysics Data System (ADS)

Trusov, K. K.

2017-08-01

Experimental data on the spatial structure of a single-pulse sliding discharge in neon at voltages below, equal to, and above the threshold for spark breakdown are discussed. The experiments were carried at gas pressures of 30 and 100 kPa and different polarities of the discharge voltage. Photographs of the plasma structure in two discharge chambers with different dimensions of the discharge zone and different thicknesses of an alumina dielectric plate on the surface of which the discharge develops are inspected. Common features of the prebreakdown discharge and its specific features depending on the voltage polarity and gas pressure are analyzed. It is shown that, at voltages below the threshold for spark breakdown, a low-current glow discharge with cathode and anode spots develops in the electrode gap. Above the breakdown threshold, regardless of the voltage polarity, spark channels directed from the cathode to the anode develop against the background of a low-current discharge.

Flexible thin-film transistors on plastic substrate at room temperature.

PubMed

Han, Dedong; Wang, Wei; Cai, Jian; Wang, Liangliang; Ren, Yicheng; Wang, Yi; Zhang, Shengdong

2013-07-01

We have fabricated flexible thin-film transistors (TFTs) on plastic substrates using Aluminum-doped ZnO (AZO) as an active channel layer at room temperature. The AZO-TFTs showed n-channel device characteristics and operated in enhancement mode. The device shows a threshold voltage of 1.3 V, an on/off ratio of 2.7 x 10(7), a field effect mobility of 21.3 cm2/V x s, a subthreshold swing of 0.23 V/decade, and the off current of less than 10(-12) A at room temperature. Recently, the flexible displays have become a very hot topic. Flexible thin film transistors are key devices for realizing flexible displays. We have investigated AZO-TFT on flexible plastic substrate, and high performance flexible TFTs have been obtained.

Performance regeneration of InGaZnO transistors with ultra-thin channels

DOE Office of Scientific and Technical Information (OSTI.GOV)

Zhang, Binglei; Li, He; Zhang, Xijian, E-mail: zhangxijian@sdu.edu.cn, E-mail: songam@sdu.edu.cn

2015-03-02

Thin-film transistors (TFTs) based on ultra-thin amorphous indium gallium zinc oxide (a-IGZO) semiconductors down to 4 nm were studied motivated by the increasing cost of indium. At and below 5 nm, it was found that the field-effect mobility was severely degraded, the threshold voltage increased, and the output characteristics became abnormal showing no saturated current. By encapsulating a layer of polymethyl methacrylate on the IGZO TFTs, the performance of the 5-nm-thick device was effectively recovered. The devices also showed much higher on/off ratios, improved hysteresis, and normal output characteristic curves as compared with devices not encapsulated. The stability of the encapsulated devicesmore » was also studied over a four month period.« less

Variability and reliability analysis in self-assembled multichannel carbon nanotube field-effect transistors

NASA Astrophysics Data System (ADS)

Hu, Zhaoying; Tulevski, George S.; Hannon, James B.; Afzali, Ali; Liehr, Michael; Park, Hongsik

2015-06-01

Carbon nanotubes (CNTs) have been widely studied as a channel material of scaled transistors for high-speed and low-power logic applications. In order to have sufficient drive current, it is widely assumed that CNT-based logic devices will have multiple CNTs in each channel. Understanding the effects of the number of CNTs on device performance can aid in the design of CNT field-effect transistors (CNTFETs). We have fabricated multi-CNT-channel CNTFETs with an 80-nm channel length using precise self-assembly methods. We describe compact statistical models and Monte Carlo simulations to analyze failure probability and the variability of the on-state current and threshold voltage. The results show that multichannel CNTFETs are more resilient to process variation and random environmental fluctuations than single-CNT devices.

Metal nanoparticle film–based room temperature Coulomb transistor

PubMed Central

Willing, Svenja; Lehmann, Hauke; Volkmann, Mirjam; Klinke, Christian

2017-01-01

Single-electron transistors would represent an approach to developing less power–consuming microelectronic devices if room temperature operation and industry-compatible fabrication were possible. We present a concept based on stripes of small, self-assembled, colloidal, metal nanoparticles on a back-gate device architecture, which leads to well-defined and well-controllable transistor characteristics. This Coulomb transistor has three main advantages. By using the scalable Langmuir-Blodgett method, we combine high-quality chemically synthesized metal nanoparticles with standard lithography techniques. The resulting transistors show on/off ratios above 90%, reliable and sinusoidal Coulomb oscillations, and room temperature operation. Furthermore, this concept allows for versatile tuning of the device properties such as Coulomb energy gap and threshold voltage, as well as period, position, and strength of the oscillations. PMID:28740864

Post annealing effects on the electrical characteristics of pentacene thin film transistors on flexible substrates.

PubMed

Oh, Tae-Yeon; Jeong, Shin Woo; Chang, Seongpil; Park, Jung-Ho; Kim, Jong-Woo; Choi, Kookhyun; Ha, Hyeon-Jun; Hwang, Bo-Yeon; Ju, Byeong-Kwon

2013-05-01

This work studies the effect of post annealing of pentacene on a flexible substrate through the examination of electrical properties and surface morphologies. It is confirmed that the best performance of devices is achieved when the post annealing temperature is 60 degrees C, since the grain size increases, which decrease grain boundaries caused charge transport limit. We can also confirmed the large threshold voltage shift of device annealed at 60 degrees C that means the lower trap density between channel and insulator interface. The device annealed at 60 degrees C exhibits a saturation mobility of 1.99 cm2/V x s, an on/off ratio of 1.87 x 10(4), and a subthreshold slope of 2.5 V/decade.

Increase in the Random Dopant Induced Threshold Fluctuations and Lowering in Sub 100 nm MOSFETs Due to Quantum Effects: A 3-D Density-Gradient Simulation Study

NASA Technical Reports Server (NTRS)

Asenov, Asen; Slavcheva, G.; Brown, A. R.; Davies, J. H.; Saini, S.

2000-01-01

In this paper we present a detailed simulation study of the influence of quantum mechanical effects in the inversion layer on random dopant induced threshold voltage fluctuations and lowering in sub 100 nm MOSFETs. The simulations have been performed using a 3-D implementation of the density gradient (DG) formalism incorporated in our established 3-D atomistic simulation approach. This results in a self-consistent 3-D quantum mechanical picture, which implies not only the vertical inversion layer quantisation but also the lateral confinement effects related to current filamentation in the 'valleys' of the random potential fluctuations. We have shown that the net result of including quantum mechanical effects, while considering statistical dopant fluctuations, is an increase in both threshold voltage fluctuations and lowering. At the same time, the random dopant induced threshold voltage lowering partially compensates for the quantum mechanical threshold voltage shift in aggressively scaled MOSFETs with ultrathin gate oxides.

Damage free Ar ion plasma surface treatment on In{sub 0.53}Ga{sub 0.47}As-on-silicon metal-oxide-semiconductor device

DOE Office of Scientific and Technical Information (OSTI.GOV)

Koh, Donghyi; Shin, Seung Heon; Ahn, Jaehyun

2015-11-02

In this paper, we investigated the effect of in-situ Ar ion plasma surface pre-treatment in order to improve the interface properties of In{sub 0.53}Ga{sub 0.47}As for high-κ top-gate oxide deposition. X-ray photoelectron spectroscopy (XPS) and metal-oxide-semiconductor capacitors (MOSCAPs) demonstrate that Ar ion treatment removes the native oxide on In{sub 0.53}Ga{sub 0.47}As. The XPS spectra of Ar treated In{sub 0.53}Ga{sub 0.47}As show a decrease in the AsO{sub x} and GaO{sub x} signal intensities, and the MOSCAPs show higher accumulation capacitance (C{sub acc}), along with reduced frequency dispersion. In addition, Ar treatment is found to suppress the interface trap density (D{sub it}),more » which thereby led to a reduction in the threshold voltage (V{sub th}) degradation during constant voltage stress and relaxation. These results outline the potential of surface treatment for III-V channel metal-oxide-semiconductor devices and application to non-planar device process.« less

Investigation of dielectric pocket induced variations in tunnel field effect transistor

NASA Astrophysics Data System (ADS)

Upasana; Narang, Rakhi; Saxena, Manoj; Gupta, Mridula

2016-04-01

The performance of conventional Tunnel FETs struggling from ambipolar issues, insufficient on-current, lower transconductance value, higher delay and lower cut off frequency has been improved by introducing several material and device engineering concepts in past few years. Keeping this in view, another interesting and reliable option i.e. Dielectric Pocket TFET (featuring a dielectric pocket placement near tunneling junction) has been comprehensively and qualitatively demonstrated using ATLAS device simulator. The architecture has been explored in terms of various device electrostatic parameters such as potential, energy band profile, electron and hole concentration, electric field variation and band to band generation rate (GBTB) near the tunneling junction where the Dielectric Pocket (DP) has been introduced. Subsequently, a detailed investigation by changing the position and dielectric constant of pocket at respective junctions has been made where DP induced variations in drain current, transconductance and parasitic capacitance have been examined. The work highlights major improvements over conventional TFET in terms of lower subthreshold swing and threshold voltage, higher drain current and transconductance, improved on-to-off current ratio, suppressed ambipolar conduction and improved dynamic power dissipation issues for low voltage analog and digital applications.

Gas Composition Sensing Using Carbon Nanotube Arrays

NASA Technical Reports Server (NTRS)

Li, Jing; Meyyappan, Meyya

2012-01-01

This innovation is a lightweight, small sensor for inert gases that consumes a relatively small amount of power and provides measurements that are as accurate as conventional approaches. The sensing approach is based on generating an electrical discharge and measuring the specific gas breakdown voltage associated with each gas present in a sample. An array of carbon nanotubes (CNTs) in a substrate is connected to a variable-pulse voltage source. The CNT tips are spaced appropriately from the second electrode maintained at a constant voltage. A sequence of voltage pulses is applied and a pulse discharge breakdown threshold voltage is estimated for one or more gas components, from an analysis of the current-voltage characteristics. Each estimated pulse discharge breakdown threshold voltage is compared with known threshold voltages for candidate gas components to estimate whether at least one candidate gas component is present in the gas. The procedure can be repeated at higher pulse voltages to estimate a pulse discharge breakdown threshold voltage for a second component present in the gas. The CNTs in the gas sensor have a sharp (low radius of curvature) tip; they are preferably multi-wall carbon nanotubes (MWCNTs) or carbon nanofibers (CNFs), to generate high-strength electrical fields adjacent to the tips for breakdown of the gas components with lower voltage application and generation of high current. The sensor system can provide a high-sensitivity, low-power-consumption tool that is very specific for identification of one or more gas components. The sensor can be multiplexed to measure current from multiple CNT arrays for simultaneous detection of several gas components.

Anomalous bias-stress-induced unstable phenomena of InZnO thin-film transistors using Ta2O5 gate dielectric

NASA Astrophysics Data System (ADS)

Xu, Wangying; Dai, Mingzhi; Liang, Lingyan; Liu, Zhimin; Sun, Xilian; Wan, Qing; Cao, Hongtao

2012-05-01

InZnO thin-film transistors using high-κ Ta2O5 gate dielectric are presented and analysed. The large capacitance coupling effect of amorphous Ta2O5 results in fabricated devices with good electrical properties. However, an anomalous negative threshold voltage (Vth) shift under positive bias stress is observed. It is suggested that electron detrapping from the high-κ Ta2O5 dielectric to the gate electrode is responsible for this Vth shift, which is supported both by the logarithmical dependence of the Vth change on the duration of the bias stress and device simulation extracted trapped charges involved.

Failure modes in electroactive polymer thin films with elastic electrodes

NASA Astrophysics Data System (ADS)

De Tommasi, D.; Puglisi, G.; Zurlo, G.

2014-02-01

Based on an energy minimization approach, we analyse the elastic deformations of a thin electroactive polymer (EAP) film sandwiched by two elastic electrodes with non-negligible stiffness. We analytically show the existence of a critical value of the electrode voltage for which non-homogeneous solutions bifurcate from the homogeneous equilibrium state, leading to the pull-in phenomenon. This threshold strongly decreases the limit value proposed in the literature considering only homogeneous deformations. We explicitly discuss the influence of geometric and material parameters together with boundary conditions in the attainment of the different failure modes observed in EAP devices. In particular, we obtain the optimum values of these parameters leading to the maximum activation performances of the device.

Performance enhancement of pentacene-based organic thin-film transistors using 6,13-pentacenequinone as a carrier injection interlayer

NASA Astrophysics Data System (ADS)

Fan, Ching-Lin; Lin, Wei-Chun; Chen, Hao-Wei

2018-06-01

This work demonstrates pentacene-based organic thin-film transistors (OTFTs) fabricated by inserting a 6,13-pentacenequinone (PQ) carrier injection layer between the source/drain (S/D) metal Au electrodes and pentacene channel layer. Compared to devices without a PQ layer, the performance characteristics including field-effect mobility, threshold voltage, and On/Off current ratio were significantly improved for the device with a 5-nm-thick PQ interlayer. These improvements are attributed to significant reduction of hole barrier height at the Au/pentacene channel interfaces. Therefore, it is believed that using PQ as the carrier injection layer is a good candidate to improve the pentacene-based OTFTs electrical performance.

Design and Implementation of Readout Circuit with Threshold Voltage Compensation on Glass Substrate for Touch Panel Applications

NASA Astrophysics Data System (ADS)

Lin, Yu-Ta; Ker, Ming-Dou; Wang, Tzu-Ming

2011-03-01

A new on-panel readout circuit with threshold voltage compensation for capacitive sensor in low temperature polycrystalline silicon (poly-Si) thin-film transistor (LTPS-TFT) process has been proposed. In order to compensate the threshold voltage variation from LTPS process variation, the proposed readout circuit applies a novel compensation approach with switch capacitor technique. In addition, a 4-bit analog-to-digital converter (ADC) is added to identify different sensed capacitor values and further enhances the overall resolution of touch panel.

Single walled carbon nanotube-based stochastic resonance device with molecular self-noise source

NASA Astrophysics Data System (ADS)

Fujii, Hayato; Setiadi, Agung; Kuwahara, Yuji; Akai-Kasaya, Megumi

2017-09-01

Stochastic resonance (SR) is an intrinsic noise usage system for small-signal sensing found in various living creatures. The noise-enhanced signal transmission and detection system, which is probabilistic but consumes low power, has not been used in modern electronics. We demonstrated SR in a summing network based on a single-walled carbon nanotube (SWNT) device that detects small subthreshold signals with very low current flow. The nonlinear current-voltage characteristics of this SWNT device, which incorporated Cr electrodes, were used as the threshold level of signal detection. The adsorption of redox-active polyoxometalate molecules on SWNTs generated additional noise, which was utilized as a self-noise source. To form a summing network SR device, a large number of SWNTs were aligned parallel to each other between the electrodes, which increased the signal detection ability. The functional capabilities of the present small-size summing network SR device, which rely on dense nanomaterials and exploit intrinsic spontaneous noise at room temperature, offer a glimpse of future bio-inspired electronic devices.

Multibias and thermal behavior of microwave GaN and GaAs based HEMTs

NASA Astrophysics Data System (ADS)

Alim, Mohammad A.; Rezazadeh, Ali A.; Gaquiere, Christophe

2016-12-01

Multibias and thermal characterizations on 0.25 μm × (2 × 100) μm AlGaN/GaN/SiC HEMT and 0.5 μm × (2 × 100) μm AlGaAs/InGaAs pseudomorphic HEMT have carried out for the first time. Two competitive device technologies are investigated with the variations of bias and temperature in order to afford a detailed realization of their potentialities. The main finding includes the self heating effect in the GaN device, zero temperature coefficient points at the drain current and transconductance in the GaAs device. The thermal resistance RTH of 7.1, 8.2 and 9.4 °C mm/W for the GaN device was estimated at 25, 75 and 150 °C respectively which are consistent with those found in the open literature. The temperature trend of the threshold voltage VT, Schottky barrier height ϕb, sheet charge densities of two dimensional electron gas ns, and capacitance under the gate Cg are exactly opposite in the two devices; whereas the knee voltage Vk, on resistance Ron, and series resistance Rseries are shows similar trend. The multi-bias and thermal behavior of the output current Ids, output conductance gds, transconductance gm, cut-off frequency ft, maximum frequency fmax, effective velocity of electron, veff and field dependent mobility, μ demonstrates a great potential of GaN device. These results provide some valuable insights for technology of preference for future and current applications.

Improving the radiation hardness of graphene field effect transistors

DOE PAGES

Alexandrou, Konstantinos; Masurkar, Amrita; Edrees, Hassan; ...

2016-10-11

Ionizing radiation poses a significant challenge to the operation and reliability of conventional silicon-based devices. In this paper, we report the effects of gamma radiation on graphene field-effect transistors (GFETs), along with a method to mitigate those effects by developing a radiation-hardened version of our back-gated GFETs. We demonstrate that activated atmospheric oxygen from the gamma ray interaction with air damages the semiconductor device, and damage to the substrate contributes additional threshold voltage instability. Our radiation-hardened devices, which have protection against these two effects, exhibit minimal performance degradation, improved stability, and significantly reduced hysteresis after prolonged gamma radiation exposure. Finally,more » we believe this work provides an insight into graphene's interactions with ionizing radiation that could enable future graphene-based electronic devices to be used for space, military, and other radiation-sensitive applications.« less

DOE Office of Scientific and Technical Information (OSTI.GOV)

Yan, Pingrui; Liu, Ziyang; Liu, Dongyang

Pentacene organic thin-film transistors (OTFTs) were prepared by introducing 4, 4″-tris(3-methylphenylphenylamino) triphenylamine (m-MTDATA): MoO{sub 3}, Pentacene: MoO{sub 3}, and Pentacene: m-MTDATA: MoO{sub 3} as buffer layers. These OTFTs all showed significant performance improvement comparing to the reference device. Significantly, we observe that the device employing Pentacene: m-MTDATA: MoO{sub 3} buffer layer can both take advantage of charge transfer complexes formed in the m-MTDATA: MoO{sub 3} device and suitable energy level alignment existed in the Pentacene: MoO{sub 3} device. These two parallel paths led to a high mobility, low threshold voltage, and contact resistance of 0.72 cm{sup 2}/V s, −13.4 V,more » and 0.83 kΩ at V{sub ds} = − 100 V. This work enriches the understanding of MoO{sub 3} doped organic materials for applications in OTFTs.« less

Improving the radiation hardness of graphene field effect transistors

DOE Office of Scientific and Technical Information (OSTI.GOV)

Alexandrou, Konstantinos; Masurkar, Amrita; Edrees, Hassan

Ionizing radiation poses a significant challenge to the operation and reliability of conventional silicon-based devices. In this paper, we report the effects of gamma radiation on graphene field-effect transistors (GFETs), along with a method to mitigate those effects by developing a radiation-hardened version of our back-gated GFETs. We demonstrate that activated atmospheric oxygen from the gamma ray interaction with air damages the semiconductor device, and damage to the substrate contributes additional threshold voltage instability. Our radiation-hardened devices, which have protection against these two effects, exhibit minimal performance degradation, improved stability, and significantly reduced hysteresis after prolonged gamma radiation exposure. Finally,more » we believe this work provides an insight into graphene's interactions with ionizing radiation that could enable future graphene-based electronic devices to be used for space, military, and other radiation-sensitive applications.« less

Effects of Various Passivation Layers on Electrical Properties of Multilayer MoS₂ Transistors.

PubMed

Ma, Jiyeon; Yoo, Geonwook

2018-09-01

So far many of research on transition metal dichalcogenides (TMDCs) are based on a bottomgate device structure due to difficulty with depositing a dielectric film on top of TMDs channel layer. In this work, we study different effects of various passivation layers on electrical properties of multilayer MoS2 transistors: spin-coated CYTOP, SU-8, and thermal evaporated MoOX. The SU-8 passivation layer alters device performance least significantly, and MoOX induces positive threshold voltage shift of ~8.0 V due to charge depletion at the interface, and the device with CYTOP layer exhibits decreased field-effect mobility by ~50% due to electric dipole field effect of C-F bonds in the end groups. Our results imply that electrical properties of the multilayer MoS2 transistors can be modulated using a passivation layer, and therefore a proper passivation layer should be considered for MoS2 device structures.

Fabrication and Characteristics of Pentacene/Vanadium Pentoxide Field-Effect Transistors

DOE Office of Scientific and Technical Information (OSTI.GOV)

Minagawa, M.; Nakai, K.; Baba, A.

2011-12-23

Organic field-effect transistors (OFETs) were fabricated using pentacene thin layer, and the effects of inserted Lewis-acid thin layers on electrical properties were investigated. The OFETs have active layers of pentacene and vanadium pentoxide (V{sub 2}O{sub 5}) as a Lewis-acid layer. Typical source-drain current (I{sub DS}) vs. source-drain voltage (V{sub DS}) curves were observed under negative gate voltages (V{sub G}S) application, and the shift of the threshold voltage for FET driving (V{sub t}) to positive side was also observed by V{sub 2}O{sub 5} layer insertion, that is, -2.5 V for device with V{sub 2}O{sub 5} layer and -5.7 V for devicemore » without V{sub 2}O{sub 5} layer. It was thought that charge transfer (CT) complexes which were formed at the interface between pentacene and V{sub 2}O{sub 5} layer were dissociated by the applied gate voltage, and the generated holes seem to contribute to drain current and the apparent V{sub t} improvement.« less

Polymer/metal oxide hybrid dielectrics for low voltage field-effect transistors with solution-processed, high-mobility semiconductors

NASA Astrophysics Data System (ADS)

Held, Martin; Schießl, Stefan P.; Miehler, Dominik; Gannott, Florentina; Zaumseil, Jana

2015-08-01

Transistors for future flexible organic light-emitting diode (OLED) display backplanes should operate at low voltages and be able to sustain high currents over long times without degradation. Hence, high capacitance dielectrics with low surface trap densities are required that are compatible with solution-processable high-mobility semiconductors. Here, we combine poly(methyl methacrylate) (PMMA) and atomic layer deposition hafnium oxide (HfOx) into a bilayer hybrid dielectric for field-effect transistors with a donor-acceptor polymer (DPPT-TT) or single-walled carbon nanotubes (SWNTs) as the semiconductor and demonstrate substantially improved device performances for both. The ultra-thin PMMA layer ensures a low density of trap states at the semiconductor-dielectric interface while the metal oxide layer provides high capacitance, low gate leakage and superior barrier properties. Transistors with these thin (≤70 nm), high capacitance (100-300 nF/cm2) hybrid dielectrics enable low operating voltages (<5 V), balanced charge carrier mobilities and low threshold voltages. Moreover, the hybrid layers substantially improve the bias stress stability of the transistors compared to those with pure PMMA and HfOx dielectrics.

Performance analysis of SiGe double-gate N-MOSFET

NASA Astrophysics Data System (ADS)

Singh, A.; Kapoor, D.; Sharma, R.

2017-04-01

The major purpose of this paper is to find an alternative configuration that not only minimizes the limitations of single-gate (SG) MOSFETs but also provides the better replacement for future technology. In this paper, the electrical characteristics of SiGe double-gate N-MOSFET are demonstrated and compared with electrical characteristics of Si double-gate N-MOSFET. Furthermore, in this paper the electrical characteristics of Si double-gate N-MOSFET are demonstrated and compared with electrical characteristics of Si single-gate N-MOSFET. The simulations are carried out for the device at different operational voltages using Cogenda Visual TCAD tool. Moreover, we have designed its structure and studied both {I}{{d}}{-}{V}{{g}} characteristics for different voltages namely 0.05, 0.1, 0.5, 0.8, 1 and 1.5 V and {I}{{d}}{-}{V}{{d}} characteristics for different voltages namely 0.1, 0.5, 1 and 1.5 V at work functions 4.5, 4.6 and 4.8 eV for this structure. The performance parameters investigated in this paper are threshold voltage, DIBL, subthreshold slope, GIDL, volume inversion and MMCR.

Effect of Channel Thickness, Annealing Temperature and Channel Length on Nanoscale Ga2O3-In2O3-ZnO Thin Film Transistor Performance.

PubMed

Kumaresan, Yogeenth; Pak, Yusin; Lim, Namsoo; Lee, Ryeri; Song, Hui; Kim, Tae Heon; Choi, Boran; Jung, Gun Young

2016-06-01

We demonstrated the effect of active layer (channel) thickness and annealing temperature on the electrical performances of Ga2O3-In2O3-ZnO (GIZO) thin film transistor (TFT) having nanoscale channel width (W/L: 500 nm/100 μm). We found that the electron carrier concentration of the channel was decreased significantly with increasing the annealing temperature (100 degrees C to 300 degrees C). Accordingly, the threshold voltage (V(T)) was shifted towards positive voltage (-12.2 V to 10.8 V). In case of channel thickness, the V(T) was shifted towards negative voltage with increasing the channel thickness. The device with channel thickness of 90 nm annealed at 200 degrees C revealed the best device performances in terms of mobility (10.86 cm2/Vs) and V(T) (0.8 V). The effect of channel length was also studied, in which the channel width, thickness and annealing temperature were kept constant such as 500 nm, 90 nm and 200 degrees C, respectively. The channel length influenced the on-current level significantly with small variation of V(T), resulting in lower value of on/off current ratio with increasing the channel length. The device with channel length of 0.5 μm showed enhanced on/off current ratio of 10(6) with minimum V(T) of 0.26 V.

Time-lag properties of corona streamer discharges between impulse sphere and dc needle electrodes under atmospheric air conditions.

PubMed

Okano, Daisuke

2013-02-01

In this study of corona streamer discharges from an impulse generator using a dc power supply, the relationship of the discharge time-lag with the dc bias voltage between the sphere-to-needle electrodes under atmospheric conditions is investigated. Devices utilizing corona discharges have been used to purify air or water, destroy bacteria, and to remove undesirable substances, and in order to achieve fast response times and high power efficiencies in such devices, it is important to minimize the time-lag of the corona discharge. Our experimental results show that (a) the discharge path of a negatively biased needle electrode will be straighter than that of a positively biased needle and (b) the discharge threshold voltage in both the positive and the negative needle electrodes is nearly equal to 33 kV. By expressing the discharge voltage as a power function of time-lag, the extent of corona generation can be quantitatively specified using the exponent of this power function. The observed behavior of a corona streamer discharge between the negative spherical and the positive needle electrodes indicates that the largest power exponent is associated with the shortest time-lag, owing to the reduction in the statistical time-lag in the absence of a formative time-lag.

Temporal and voltage stress stability of high performance indium-zinc-oxide thin film transistors

NASA Astrophysics Data System (ADS)

Song, Yang; Katsman, Alexander; Butcher, Amy L.; Paine, David C.; Zaslavsky, Alexander

2017-10-01

Thin film transistors (TFTs) based on transparent oxide semiconductors, such as indium zinc oxide (IZO), are of interest due to their improved characteristics compared to traditional a-Si TFTs. Previously, we reported on top-gated IZO TFTs with an in-situ formed HfO2 gate insulator and IZO active channel, showing high performance: on/off ratio of ∼107, threshold voltage VT near zero, extracted low-field mobility μ0 = 95 cm2/V·s, and near-perfect subthreshold slope at 62 mV/decade. Since device stability is essential for technological applications, in this paper we report on the temporal and voltage stress stability of IZO TFTs. Our devices exhibit a small negative VT shift as they age, consistent with an increasing carrier density resulting from an increasing oxygen vacancy concentration in the channel. Under gate bias stress, freshly annealed TFTs show a negative VT shift during negative VG gate bias stress, while aged (>1 week) TFTs show a positive VT shift during negative VG stress. This indicates two competing mechanisms, which we identify as the field-enhanced generation of oxygen vacancies and the field-assisted migration of oxygen vacancies, respectively. A simplified kinetic model of the vacancy concentration evolution in the IZO channel under electrical stress is provided.

Time-lag properties of corona streamer discharges between impulse sphere and dc needle electrodes under atmospheric air conditions

NASA Astrophysics Data System (ADS)

Okano, Daisuke

2013-02-01

In this study of corona streamer discharges from an impulse generator using a dc power supply, the relationship of the discharge time-lag with the dc bias voltage between the sphere-to-needle electrodes under atmospheric conditions is investigated. Devices utilizing corona discharges have been used to purify air or water, destroy bacteria, and to remove undesirable substances, and in order to achieve fast response times and high power efficiencies in such devices, it is important to minimize the time-lag of the corona discharge. Our experimental results show that (a) the discharge path of a negatively biased needle electrode will be straighter than that of a positively biased needle and (b) the discharge threshold voltage in both the positive and the negative needle electrodes is nearly equal to 33 kV. By expressing the discharge voltage as a power function of time-lag, the extent of corona generation can be quantitatively specified using the exponent of this power function. The observed behavior of a corona streamer discharge between the negative spherical and the positive needle electrodes indicates that the largest power exponent is associated with the shortest time-lag, owing to the reduction in the statistical time-lag in the absence of a formative time-lag.

An Analysis of Hole Trapping at Grain Boundary or Poly-Si Floating-Body MOSFET.

PubMed

Jang, Taejin; Baek, Myung-Hyun; Kim, Hyungjin; Park, Byung-Gook

2018-09-01

In this paper, we demonstrate the characteristics of the floating body effect of poly-silicon with grain boundary by SENTAURUS™ TCAD simulation. As drain voltage increases, impact ionization occurs at the drain-channel junction. And these holes created by impact ionization are deposited on the bottom of the body to change the threshold voltage. This feature, the kink effect, is also observed in fully depleted silicon on insulator because grain boundary of the poly-silicon serve as a storage to trap the holes. We simulate the transfer curve depending on the density and position of the grain boundary. The trap density of the grain boundary affects the device characteristics significantly. However similar properties appear except where the grain boundary is located on the drain side.

PEDOT-CNT coated electrodes stimulate retinal neurons at low voltage amplitudes and low charge densities

NASA Astrophysics Data System (ADS)

Samba, R.; Herrmann, T.; Zeck, G.

2015-02-01

Objective. The aim of this study was to compare two different microelectrode materials—the conductive polymer composite poly-3,4-ethylenedioxythiophene (PEDOT)-carbon nanotube(CNT) and titanium nitride (TiN)—at activating spikes in retinal ganglion cells in whole mount rat retina through stimulation of the local retinal network. Stimulation efficacy of the microelectrodes was analyzed by comparing voltage, current and transferred charge at stimulation threshold. Approach. Retinal ganglion cell spikes were recorded by a central electrode (30 μm diameter) in the planar grid of an electrode array. Extracellular stimulation (monophasic, cathodic, 0.1-1.0 ms) of the retinal network was performed using constant voltage pulses applied to the eight surrounding electrodes. The stimulation electrodes were equally spaced on the four sides of a square (400 × 400 μm). Threshold voltage was determined as the pulse amplitude required to evoke network-mediated ganglion cell spiking in a defined post stimulus time window in 50% of identical stimulus repetitions. For the two electrode materials threshold voltage, transferred charge at threshold, maximum current and the residual current at the end of the pulse were compared. Main results. Stimulation of retinal interneurons using PEDOT-CNT electrodes is achieved with lower stimulation voltage and requires lower charge transfer as compared to TiN. The key parameter for effective stimulation is a constant current over at least 0.5 ms, which is obtained by PEDOT-CNT electrodes at lower stimulation voltage due to its faradaic charge transfer mechanism. Significance. In neuroprosthetic implants, PEDOT-CNT may allow for smaller electrodes, effective stimulation in a safe voltage regime and lower energy-consumption. Our study also indicates, that the charge transferred at threshold or the charge injection capacity per se does not determine stimulation efficacy.

Electrically controllable liquid crystal random lasers below the Fréedericksz transition threshold.

PubMed

Lee, Chia-Rong; Lin, Jia-De; Huang, Bo-Yuang; Lin, Shih-Hung; Mo, Ting-Shan; Huang, Shuan-Yu; Kuo, Chie-Tong; Yeh, Hui-Chen

2011-01-31

This investigation elucidates for the first time electrically controllable random lasers below the threshold voltage in dye-doped liquid crystal (DDLC) cells with and without adding an azo-dye. Experimental results show that the lasing intensities and the energy thresholds of the random lasers can be decreased and increased, respectively, by increasing the applied voltage below the Fréedericksz transition threshold. The below-threshold-electric-controllability of the random lasers is attributable to the effective decrease of the spatial fluctuation of the orientational order and thus of the dielectric tensor of LCs by increasing the electric-field-aligned order of LCs below the threshold, thereby increasing the diffusion constant and decreasing the scattering strength of the fluorescence photons in their recurrent multiple scattering. This can result in the decrease in the lasing intensity of the random lasers and the increase in their energy thresholds. Furthermore, the addition of an azo-dye in DDLC cell can induce the range of the working voltage below the threshold for the control of the random laser to reduce.

The voltage threshold for arcing for solar cells in Leo - Flight and ground test results

NASA Technical Reports Server (NTRS)

Ferguson, Dale C.

1986-01-01

Ground and flight results of solar cell arcing in low earth orbit (LEO) conditions are compared and interpreted. It is shown that an apparent voltage threshold for arcing may be produced by a storage power law dependence of arc rate on voltage, combined with a limited observation time. The change in this apparent threshold with plasma density is a reflection of the density dependence of the arc rate. A nearly linear dependence of arc rate on density is inferred from the data. A real voltage threshold for arcing for 2 by 2 cm solar cells may exist however, independent of plasma density, near -230 V relative to the plasma. Here, arc rates may change by more than an order of magnitude for a change of only 30 V in array potential. For 5.9 by 5.9 solar cells, the voltage dependence of the arc rate is steeper, and the data are insufficient to indicate the existence of an arcing increased by an atomic oxygen plasma, as is found in LEO, and by arcing from the backs of welded-through substrates.

The voltage threshold for arcing for solar cells in LEO: Flight and ground test results

NASA Technical Reports Server (NTRS)

Ferguson, D. C.

1986-01-01

Ground and flight results of solar cell arcing in low Earth orbit (LEO) conditions are compared and interpreted. It is shown that an apparent voltage threshold for arcing may be produced by a strong power law dependence of arc rate on voltage, combined with a limited observation time. The change in this apparent threshold with plasma density is a reflection of the density dependence of the arc rate. A nearly linear dependence of arc rate on density is inferred from the data. A real voltage threshold for arcing for 2 by 2 cm solar cells may exist however, independent of plasma density, near -230 V relative to the plasma. Here, arc rates may change by more than an order of magnitude for a change of only 30 V in array potential. For 5.9 by 5.9 solar cells, the voltage dependence of the arc rate is steeper, and the data are insufficient to indicate the existence of an arcing increased by an atomic oxygen plasma, as is found in LEO, and by arcing from the backs of welded-through substrates.

Effect of ferroelectric BaTiO3 particles on the threshold voltage of a smectic A liquid crystal.

PubMed

Imamaliyev, Abbas Rahim; Ramazanov, Mahammadali Ahmad; Humbatov, Shirkhan Arastun

2018-01-01

The influence of small ferroelectric BaTiO 3 particles on the planar-homeotropic transition threshold voltage in smectic A liquid crystals consisting of p -nitrophenyl p -decyloxybenzoate and 4-cyano-4'-pentylbiphenyl were studied by using capacitance-voltage ( C - V ) measurements. It was shown that the BaTiO 3 particles significantly reduce the threshold voltage. The obtained result is explained by two factors: an increase of dielectric anisotropy of the liquid crystals and the formation of a strong electric field near polarized particles of BaTiO 3 . It was shown that the role of the second factor is dominant. The explanations of some features observed in the C - V characteristics are given.

A study of charged particles/radiation damage to VLSI device materials

NASA Technical Reports Server (NTRS)

Okyere, John G.

1987-01-01

Future spacecraft systems such as the manned space station will be subjected to low-dose long term radiation particles. Most electronic systems are affected by such particles. There is therefore a great need to understand device physics and failure mechanisms affected by radiation and to design circuits that would be less susceptible to radiation. Using 2 MeV electron radiation and bias temperature aging, it was found that MOS capacitors that were prepositively biased have lower flatband voltage shift and lesser increase in density of surface state charge than those that were not prepositively biased. In addition, it was shown that there is continued recovery of flatband voltage and density of state charge in irradiated capacitors during both room temperature anneal and 137 degree anneal. When nMOS transistors were subjected to 1 MeV proton radiation, charge pumping and current versus voltage measurements indicated that transconductance degradation, threshold voltage shifts and changes in interface states density may be the primary cause of nMOS transistor failure after radiation. Simulation studies using SPICE were performed on CMOS SRAM cells of various transistor sizes. It is shown that transistor sizing affects the noise margins of CMOS SRAM cells, and that as the beta ratio of the transistors of the CMOS SRAM cell decreases, the effective noise margin of the SRAM cell increases. Some suggestions were made in connection with the design of CMOS SRAMS that are hardened against single event upsets.

Photovoltaic Pixels for Neural Stimulation: Circuit Models and Performance.

PubMed

Boinagrov, David; Lei, Xin; Goetz, Georges; Kamins, Theodore I; Mathieson, Keith; Galambos, Ludwig; Harris, James S; Palanker, Daniel

2016-02-01

Photovoltaic conversion of pulsed light into pulsed electric current enables optically-activated neural stimulation with miniature wireless implants. In photovoltaic retinal prostheses, patterns of near-infrared light projected from video goggles onto subretinal arrays of photovoltaic pixels are converted into patterns of current to stimulate the inner retinal neurons. We describe a model of these devices and evaluate the performance of photovoltaic circuits, including the electrode-electrolyte interface. Characteristics of the electrodes measured in saline with various voltages, pulse durations, and polarities were modeled as voltage-dependent capacitances and Faradaic resistances. The resulting mathematical model of the circuit yielded dynamics of the electric current generated by the photovoltaic pixels illuminated by pulsed light. Voltages measured in saline with a pipette electrode above the pixel closely matched results of the model. Using the circuit model, our pixel design was optimized for maximum charge injection under various lighting conditions and for different stimulation thresholds. To speed discharge of the electrodes between the pulses of light, a shunt resistor was introduced and optimized for high frequency stimulation.

Combinatorial study of zinc tin oxide thin-film transistors

NASA Astrophysics Data System (ADS)

McDowell, M. G.; Sanderson, R. J.; Hill, I. G.

2008-01-01

Groups of thin-film transistors using a zinc tin oxide semiconductor layer have been fabricated via a combinatorial rf sputtering technique. The ZnO :SnO2 ratio of the film varies as a function of position on the sample, from pure ZnO to SnO2, allowing for a study of zinc tin oxide transistor performance as a function of channel stoichiometry. The devices were found to have mobilities ranging from 2to12cm2/Vs, with two peaks in mobility in devices at ZnO fractions of 0.80±0.03 and 0.25±0.05, and on/off ratios as high as 107. Transistors composed predominantly of SnO2 were found to exhibit light sensitivity which affected both the on/off ratios and threshold voltages of these devices.

A novel thin-film transistor with step gate-overlapped lightly doped drain and raised source/drain design

NASA Astrophysics Data System (ADS)

Chien, Feng-Tso; Chen, Jian-Liang; Chen, Chien-Ming; Chen, Chii-Wen; Cheng, Ching-Hwa; Chiu, Hsien-Chin

2017-11-01

In this paper, a novel step gate-overlapped lightly doped drain (GOLDD) with raised source/drain (RSD) structure (SGORSD) is proposed for TFT electronic device application. The new SGORSD structure could obtain a low electric field at channel near the drain side owing to a step GOLDD design. Compared to the conventional device, the SGORSD TFT exhibits a better kink effect and higher breakdown performance due to the reduced drain electric field (D-EF). In addition, the leakage current also can be suppressed. Moreover, the device stability, such as the threshold voltage shift and drain current degradation under a high gate bias, is improved by the design of SGORSD structure. Therefore, this novel step GOLDD structure can be a promising design to be used in active-matrix flat panel electronics.

Origin of bias-stress induced instability in organic thin-film transistors with semiconducting small-molecule/insulating polymer blend channel.

PubMed

Park, Ji Hoon; Lee, Young Tack; Lee, Hee Sung; Lee, Jun Young; Lee, Kimoon; Lee, Gyu Baek; Han, Jiwon; Kim, Tae Woong; Im, Seongil

2013-03-13

The stabilities of a blending type organic thin-film transistor with phase-separated TIPS-pentacene channel layer were characterized under the conditions of negative-bias-stress (NBS) and positive-bias-stress (PBS). During NBS, threshold voltage (Vth) shifts noticeably. NBS-imposed devices revealed interfacial trap density-of-states (DOS) at 1.56 and 1.66 eV, whereas initial device showed the DOS at only 1.56 eV, as measured by photoexcited charge-collection spectroscopy (PECCS) method. Possible origin of this newly created defect is related to ester group in PMMA, which induces some hole traps at the TIPS-pentacene/i-PMMA interface. PBS-imposed device showed little Vth shift but visible off-current increase as "back-channel" effect, which is attributed to the water molecules trapped on the TFT surface.

Improvement in Brightness Uniformity by Compensating for the Threshold Voltages of Both the Driving Thin-Film Transistor and the Organic Light-Emitting Diode for Active-Matrix Organic Light-Emitting Diode Displays

NASA Astrophysics Data System (ADS)

Ching-Lin Fan,; Hui-Lung Lai,; Jyu-Yu Chang,

2010-05-01

In this paper, we propose a novel pixel design and driving method for active-matrix organic light-emitting diode (AM-OLED) displays using low-temperature polycrystalline silicon thin-film transistors (LTPS-TFTs). The proposed threshold voltage compensation circuit, which comprised five transistors and two capacitors, has been verified to supply uniform output current by simulation work using the automatic integrated circuit modeling simulation program with integrated circuit emphasis (AIM-SPICE) simulator. The driving scheme of this voltage programming method includes four periods: precharging, compensation, data input, and emission. The simulated results demonstrate excellent properties such as low error rate of OLED anode voltage variation (<1%) and high output current. The proposed pixel circuit shows high immunity to the threshold voltage deviation characteristics of both the driving poly-Si TFT and the OLED.

A New Low Temperature Polycrystalline Silicon Thin Film Transistor Pixel Circuit for Active Matrix Organic Light Emitting Diode

NASA Astrophysics Data System (ADS)

Ching-Lin Fan,; Yi-Yan Lin,; Jyu-Yu Chang,; Bo-Jhang Sun,; Yan-Wei Liu,

2010-06-01

This study presents one novel compensation pixel design and driving method for active matrix organic light-emitting diode (AMOLED) displays that use low-temperature polycrystalline silicon thin-film transistors (LTPS-TFTs) with a voltage feed-back method and the simulation results are proposed and verified by SPICE simulator. The measurement and simulation of LTPS TFT characteristics demonstrate the good fitting result. The proposed circuit consists of four TFTs and two capacitors with an additional signal line. The error rates of OLED anode voltage variation are below 0.3% under the threshold voltage deviation of driving TFT (Δ VTH = ± 0.33 V). The simulation results show that the pixel design can improve the display image non-uniformity by compensating the threshold voltage deviation of driving TFT and the degradation of OLED threshold voltage at the same time.

A New Low Temperature Polycrystalline Silicon Thin Film Transistor Pixel Circuit for Active Matrix Organic Light Emitting Diode

NASA Astrophysics Data System (ADS)

Fan, Ching-Lin; Lin, Yi-Yan; Chang, Jyu-Yu; Sun, Bo-Jhang; Liu, Yan-Wei

2010-06-01

This study presents one novel compensation pixel design and driving method for active matrix organic light-emitting diode (AMOLED) displays that use low-temperature polycrystalline silicon thin-film transistors (LTPS-TFTs) with a voltage feed-back method and the simulation results are proposed and verified by SPICE simulator. The measurement and simulation of LTPS TFT characteristics demonstrate the good fitting result. The proposed circuit consists of four TFTs and two capacitors with an additional signal line. The error rates of OLED anode voltage variation are below 0.3% under the threshold voltage deviation of driving TFT (ΔVTH = ±0.33 V). The simulation results show that the pixel design can improve the display image non-uniformity by compensating the threshold voltage deviation of driving TFT and the degradation of OLED threshold voltage at the same time.

Energy storage connection system

DOEpatents

Benedict, Eric L.; Borland, Nicholas P.; Dale, Magdelena; Freeman, Belvin; Kite, Kim A.; Petter, Jeffrey K.; Taylor, Brendan F.

2012-07-03

A power system for connecting a variable voltage power source, such as a power controller, with a plurality of energy storage devices, at least two of which have a different initial voltage than the output voltage of the variable voltage power source. The power system includes a controller that increases the output voltage of the variable voltage power source. When such output voltage is substantially equal to the initial voltage of a first one of the energy storage devices, the controller sends a signal that causes a switch to connect the variable voltage power source with the first one of the energy storage devices. The controller then causes the output voltage of the variable voltage power source to continue increasing. When the output voltage is substantially equal to the initial voltage of a second one of the energy storage devices, the controller sends a signal that causes a switch to connect the variable voltage power source with the second one of the energy storage devices.

Solution-processed zinc oxide nanoparticles/single-walled carbon nanotubes hybrid thin-film transistors

NASA Astrophysics Data System (ADS)

Liu, Fangmei; Sun, Jia; Qian, Chuan; Hu, Xiaotao; Wu, Han; Huang, Yulan; Yang, Junliang

2016-09-01

Solution-processed thin-film transistors (TFTs) are the essential building blocks for manufacturing the low-cost and large-area consumptive electronics. Herein, solution-processed TFTs based on the composites of zinc oxide (ZnO) nanoparticles and single-walled carbon nanotubes (SWCNTs) were fabricated by the methods of spin-coating and doctor-blading. Through controlling the weight of SWCNTs, the ZnO/SWCNTs TFTs fabricated by spin-coating demonstrated a field-effect mobility of 4.7 cm2/Vs and a low threshold voltage of 0.8 V, while the TFTs devices fabricated by doctor-blading technique showed reasonable electrical performance with a mobility of 0.22 cm2/Vs. Furthermore, the ion-gel was used as an efficient electrochemical gate dielectric because of its large electric double-layer capacitance. The operating voltage of all the TFTs devices is as low as 4.0 V. The research suggests that ZnO/SWCNTs TFTs have the potential applications in low-cost, large-area and flexible consumptive electronics, such as chemical-biological sensors and smart label.

Poly-silicon TFT AM-OLED on thin flexible metal substrates

NASA Astrophysics Data System (ADS)

Afentakis, Themis; Hatalis, Miltiadis K.; Voutsas, Apostolos T.; Hartzell, John W.

2003-05-01

Thin metal foils present an excellent alternative to polymers for the fabrication of large area, flexible displays. Their main advantage spurs from their ability to withstand higher temperatures during processing; microelectronic fabrication at elevated temperatures offers the ability to utilize a variety of crystallization processes for the active layer of devices and thermally grown gate dielectrics. This can lead to high performance (high mobility, low threshold voltage) low cost and highly reliable thin film transistors. In some cases, the conductive substrate can also be used to provide power to the active devices, thus reducing layout complexity. This paper discusses the first successful attempt to design and fabricate a variety of active matrix organic light emitting diode displays on thin, flexible stainless steel foils. Different pixel architectures, such as two- and four-transistor implementations, and addressing modes, such as voltage- or current-driven schemese are examined. This work clearly demonstrates the advantages associated with the fabrication of OLED displays on thin metal foils, which - through roll-to-roll processing - can potentially result in revolutionizing today's display processing, leading to a new generation of low cost, high performance versatile display systems.

A new temperature threshold detector - Application to missile monitoring

NASA Astrophysics Data System (ADS)

Coston, C. J.; Higgins, E. V.

Comprehensive thermal surveys within the case of solid propellant ballistic missile flight motors are highly desirable. For example, a problem involving motor failures due to insulator cracking at motor ignition, which took several years to solve, could have been identified immediately on the basis of a suitable thermal survey. Using conventional point measurements, such as those utilizing typical thermocouples, for such a survey on a full scale motor is not feasible because of the great number of sensors and measurements required. An alternate approach recognizes that temperatures below a threshold (which depends on the material being monitored) are acceptable, but higher temperatures exceed design margins. In this case hot spots can be located by a grid of wire-like sensors which are sensitive to temperature above the threshold anywhere along the sensor. A new type of temperature threshold detector is being developed for flight missile use. The considered device consists of KNO3 separating copper and Constantan metals. Above the KNO3 MP, galvanic action provides a voltage output of a few tenths of a volt.

Fully transparent thin film transistors based on zinc oxide channel layer and molybdenum doped indium oxide electrodes

NASA Astrophysics Data System (ADS)

MÄ dzik, Mateusz; Elamurugu, Elangovan; Viegas, Jaime

2016-03-01

In this work we report the fabrication of thin film transistors (TFT) with zinc oxide channel and molybdenum doped indium oxide (IMO) electrodes, achieved by room temperature sputtering. A set of devices was fabricated, with varying channel width and length from 5μm to 300μm. Output and transfer characteristics were then extracted to study the performance of thin film transistors, namely threshold voltage and saturation current, enabling to determine optimal fabrication process parameters. Optical transmission in the UV-VIS-IR are also reported.

Resistive switching in a few nanometers thick tantalum oxide film formed by a metal oxidation

DOE Office of Scientific and Technical Information (OSTI.GOV)

Ohno, Takeo, E-mail: t-ohno@wpi-aimr.tohoku.ac.jp; Japan Science and Technology Agency; Samukawa, Seiji, E-mail: samukawa@ifs.tohoku.ac.jp

2015-04-27

Resistive switching in a Cu/Ta{sub 2}O{sub 5}/Pt structure that consisted of a few nanometer-thick Ta{sub 2}O{sub 5} film was demonstrated. The Ta{sub 2}O{sub 5} film with thicknesses of 2–5 nm was formed with a combination of Ta metal film deposition and neutral oxygen particle irradiation at room temperature. The device exhibited a bipolar resistive switching with a threshold voltage of 0.2 V and multilevel switching operation.

Discrete random distribution of source dopants in nanowire tunnel transistors (TFETs)

NASA Astrophysics Data System (ADS)

Sylvia, Somaia; Abul Khayer, M.; Alam, Khairul; Park, Hong-Hyun; Klimeck, Gerhard; Lake, Roger

2013-03-01

InAs and InSb nanowire (NW) tunnel field effect transistors (TFETs) require highly degenerate source doping to support the high electric fields in the tunnel region. For a target on-current of 1 μA , the doping requirement may be as high as 1 . 5 ×1020cm-3 in a NW with diameter as low as 4 nm. The small size of these devices demand that the dopants near tunneling region be treated discretely. Therefore, the effects resulting from the random distribution of dopant atoms in the source of a TFET are studied for 30 test devices. Comparing with the transfer characteristics of the same device simulated with a continuum doping model, our results show (1) a spread of I - V toward the positive gate voltage axis, (2) the same average threshold voltage, (3) an average 62% reduction in the on current, and (4) a slight degradation of the subthreshold slope. Random fluctuations in both the number and placement of dopants will be discussed. Also, as the channel length is scaled down, direct tunneling through the channel starts limiting the device performance. Therefore, a comparison of materials is also performed, showing their ability to block direct tunneling for sub-10 nm channel FETs and TFETs. This work was supported in part by the Center on Functional Engineered Nano Architectonics and the Materials, Structures and Devices Focus Center, under the Focus Center Research Program, and by the National Science Foundation under Grant OCI-0749140

Mechanism of a-IGZO TFT device deterioration—illumination light wavelength and substrate temperature effects

NASA Astrophysics Data System (ADS)

Chen, Te-Chih; Kuo, Yue; Chang, Ting-Chang; Chen, Min-Chen; Chen, Hua-Mao

2017-10-01

Device characteristics changes in an a-IGZO thin film transistor under light illumination and at raised temperature have been investigated. Light exposure causes a large leakage current, which is more obvious with an increase in the illumination energy, power and the temperature. The increase in the leakage current is due to the trap assisted photon excitation process that generates electron-hole pairs and the mechanism is enhanced with the additional thermal energy. The leakage current comes from the source side because holes generated in the process drift to the source side and therefore lower the barrier height. The above mechanism has been further verified with experiments of drain bias induced shifts in the threshold voltage and the subthreshold slope.

High Responsivity MgZnO Ultraviolet Thin-Film Phototransistor Developed Using Radio Frequency Sputtering

PubMed Central

Li, Jyun-Yi; Chang, Sheng-Po; Hsu, Ming-Hung; Chang, Shoou-Jinn

2017-01-01

We investigated the electrical and optoelectronic properties of a magnesium zinc oxide thin-film phototransistor. We fabricate an ultraviolet phototransistor by using a wide-bandgap MgZnO thin film as the active layer material of the thin film transistor (TFT). The fabricated device demonstrated a threshold voltage of 3.1 V, on–off current ratio of 105, subthreshold swing of 0.8 V/decade, and mobility of 5 cm2/V·s in a dark environment. As a UV photodetector, the responsivity of the device was 3.12 A/W, and the rejection ratio was 6.55 × 105 at a gate bias of −5 V under 290 nm illumination. PMID:28772487

High Responsivity MgZnO Ultraviolet Thin-Film Phototransistor Developed Using Radio Frequency Sputtering.

PubMed

Li, Jyun-Yi; Chang, Sheng-Po; Hsu, Ming-Hung; Chang, Shoou-Jinn

2017-02-04

We investigated the electrical and optoelectronic properties of a magnesium zinc oxide thin-film phototransistor. We fabricate an ultraviolet phototransistor by using a wide-bandgap MgZnO thin film as the active layer material of the thin film transistor (TFT). The fabricated device demonstrated a threshold voltage of 3.1 V, on-off current ratio of 10⁵, subthreshold swing of 0.8 V/decade, and mobility of 5 cm²/V·s in a dark environment. As a UV photodetector, the responsivity of the device was 3.12 A/W, and the rejection ratio was 6.55 × 10⁵ at a gate bias of -5 V under 290 nm illumination.

Polymer-based doping control for performance enhancement of wet-processed short-channel CNTFETs

NASA Astrophysics Data System (ADS)

Hartmann, Martin; Schubel, René; Claus, Martin; Jordan, Rainer; Schulz, Stefan E.; Hermann, Sascha

2018-01-01

The electrical transport properties of short-channel transistors based on single-walled carbon nanotubes (CNT) are significantly affected by bundling along with solution processing. We report that especially high off currents of CNT transistors are not only related to the incorporation of metallic CNTs but also to the incorporation of CNT bundles. By applying device passivation with poly(4-vinylpyridine), the impact of CNT bundling on the device performance can be strongly reduced due to increased gate efficiency as well as reduced oxygen and water-induced p-type doping, boosting essential field-effect transistor performance parameters by several orders of magnitude. Moreover, this passivation approach allows the hysteresis and threshold voltage of CNT transistors to be tuned.

A Prospective Evaluation of a Protocol for Magnetic Resonance Imaging of Patients With Implanted Cardiac Devices

PubMed Central

Nazarian, Saman; Hansford, Rozann; Roguin, Ariel; Goldsher, Dorith; Zviman, Menekhem M.; Lardo, Albert C.; Caffo, Brian S.; Frick, Kevin D.; Kraut, Michael A.; Kamel, Ihab R.; Calkins, Hugh; Berger, Ronald D.; Bluemke, David A.; Halperin, Henry R.

2015-01-01

Background Magnetic resonance imaging (MRI) is avoided in most patients with implanted cardiac devices because of safety concerns. Objective To define the safety of a protocol for MRI at the commonly used magnetic strength of 1.5 T in patients with implanted cardiac devices. Design Prospective nonrandomized trial. (ClinicalTrials.gov registration number: NCT01130896) Setting One center in the United States (94% of examinations) and one in Israel. Patients 438 patients with devices (54% with pacemakers and 46% with defibrillators) who underwent 555 MRI studies. Intervention Pacing mode was changed to asynchronous for pacemaker-dependent patients and to demand for others. Tachy-arrhythmia functions were disabled. Blood pressure, electrocardiography, oximetry, and symptoms were monitored by a nurse with experience in cardiac life support and device programming who had immediate backup from an electrophysiologist. Measurements Activation or inhibition of pacing, symptoms, and device variables. Results In 3 patients (0.7% [95% CI, 0% to 1.5%]), the device reverted to a transient back-up programming mode without long-term effects. Right ventricular (RV) sensing (median change, 0 mV [interquartile range {IQR}, −0.7 to 0 V]) and atrial and right and left ventricular lead impedances (median change, −2 Ω[IQR, −13 to 0 Ω], −4 Ω [IQR, −16 to 0 Ω], and −11 Ω [IQR, −40 to 0 Ω], respectively) were reduced immediately after MRI. At long-term follow-up (61% of patients), decreased RV sensing (median, 0 mV, [IQR, −1.1 to 0.3 mV]), decreased RV lead impedance (median, −3 Ω, [IQR, −29 to 15 Ω]), increased RV capture threshold (median, 0 V, IQR, [0 to 0.2 Ω]), and decreased battery voltage (median, −0.01 V, IQR, −0.04 to 0 V) were noted. The observed changes did not require device revision or reprogramming. Limitations Not all available cardiac devices have been tested. Long-term in-person or telephone follow-up was unavailable in 43 patients (10%), and some data were missing. Those with missing long-term capture threshold data had higher baseline right atrial and right ventricular capture thresholds and were more likely to have undergone thoracic imaging. Defibrillation threshold testing and random assignment to a control group were not performed. Conclusion With appropriate precautions, MRI can be done safely in patients with selected cardiac devices. Because changes in device variables and programming may occur, electrophysiologic monitoring during MRI is essential. Primary Funding Source National Institutes of Health. PMID:21969340

Effect of ferroelectric BaTiO3 particles on the threshold voltage of a smectic A liquid crystal

PubMed Central

Imamaliyev, Abbas Rahim; Ramazanov, Mahammadali Ahmad

2018-01-01

The influence of small ferroelectric BaTiO3 particles on the planar–homeotropic transition threshold voltage in smectic A liquid crystals consisting of p-nitrophenyl p-decyloxybenzoate and 4-cyano-4′-pentylbiphenyl were studied by using capacitance–voltage (C–V) measurements. It was shown that the BaTiO3 particles significantly reduce the threshold voltage. The obtained result is explained by two factors: an increase of dielectric anisotropy of the liquid crystals and the formation of a strong electric field near polarized particles of BaTiO3. It was shown that the role of the second factor is dominant. The explanations of some features observed in the C–V characteristics are given. PMID:29600143

Threshold voltage tuning in AlGaN/GaN HFETs with p-type Cu2O gate synthesized by magnetron reactive sputtering

NASA Astrophysics Data System (ADS)

Wang, Lei; Li, Liuan; Xie, Tian; Wang, Xinzhi; Liu, Xinke; Ao, Jin-Ping

2018-04-01

In present study, copper oxide films were prepared at different sputtering powers (10-100 W) using magnetron reactive sputtering. The crystalline structure, surface morphologies, composition, and optical band gap of the as-grown films are dependent on sputtering power. As the sputtering power decreasing from 100 to 10 W, the composition of films changed from CuO to quasi Cu2O domination. Moreover, when the sputtering power is 10 W, a relative high hole carrier density and high-surface-quality quasi Cu2O thin film can be achieved. AlGaN/GaN HFETs were fabricated with the optimized p-type quasi Cu2O film as gate electrode, the threshold voltage of the device shows a 0.55 V positive shift, meanwhile, a lower gate leakage current, a higher ON/OFF drain current ratio of ∼108, a higher electron mobility (1465 cm2/Vs), and a lower subthreshold slope of 74 mV/dec are also achieved, compared with the typical Ni/Au-gated HFETs. Therefore, Cu2O have a great potential to develop high performance p-type gate AlGaN/GaN HFETs.

DOE Office of Scientific and Technical Information (OSTI.GOV)

Ahn, Cheol Hyoun; Hee Kim, So; Gu Yun, Myeong

In this study, we proposed the artificially designed channel structure in oxide thin-film transistors (TFTs) called a “step-composition gradient channel.” We demonstrated Al step-composition gradient Al-Zn-O (AZO) channel structures consisting of three AZO layers with different Al contents. The effects of stacking sequence in the step-composition gradient channel on performance and electrical stability of bottom-gate TFT devices were investigated with two channels of inverse stacking order (ascending/descending step-composition). The TFT with ascending step-composition channel structure (5 → 10 → 14 at. % Al composition) showed relatively negative threshold voltage (−3.7 V) and good instability characteristics with a reduced threshold voltage shift (Δmore » 1.4 V), which was related to the alignment of the conduction band off-set within the channel layer depending on the Al contents. Finally, the reduced Al composition in the initial layer of ascending step-composition channel resulted in the best field effect mobility of 4.5 cm{sup 2}/V s. We presented a unique active layer of the “step-composition gradient channel” in the oxide TFTs and explained the mechanism of adequate channel design.« less

Electrical leakage detection circuit

DOEpatents

Wild, Arthur

2006-09-05

A method is provided for detecting electrical leakage between a power supply and a frame of a vehicle or machine. The disclosed method includes coupling a first capacitor between a frame and a first terminal of a power supply for a predetermined period of time. The current flowing between the frame and the first capacitor is limited to a predetermined current limit. It is determined whether the voltage across the first capacitor exceeds a threshold voltage. A first output signal is provided when the voltage across the capacitor exceeds the threshold voltage.

Abnormal hump in capacitance-voltage measurements induced by ultraviolet light in a-IGZO thin-film transistors

NASA Astrophysics Data System (ADS)

Tsao, Yu-Ching; Chang, Ting-Chang; Chen, Hua-Mao; Chen, Bo-Wei; Chiang, Hsiao-Cheng; Chen, Guan-Fu; Chien, Yu-Chieh; Tai, Ya-Hsiang; Hung, Yu-Ju; Huang, Shin-Ping; Yang, Chung-Yi; Chou, Wu-Ching

2017-01-01

This work demonstrates the generation of abnormal capacitance for amorphous indium-gallium-zinc oxide (a-InGaZnO4) thin-film transistors after being subjected to negative bias stress under ultraviolet light illumination stress (NBIS). At various operation frequencies, there are two-step tendencies in their capacitance-voltage curves. When gate bias is smaller than threshold voltage, the measured capacitance is dominated by interface defects. Conversely, the measured capacitance is dominated by oxygen vacancies when gate bias is larger than threshold voltage. The impact of these interface defects and oxygen vacancies on capacitance-voltage curves is verified by TCAD simulation software.

Plasma-enhanced atomic layer deposition zinc oxide for multifunctional thin film electronics

NASA Astrophysics Data System (ADS)

Mourey, Devin A.

A novel, weak oxidant, plasma-enhanced atomic layer deposition (PEALD) process has been used to fabricate stable, high mobility ZnO thin film transistors (TFTs) and fast circuits on glass and polyimide substrates at 200°C. Weak oxidant PEALD provides a simple, fast deposition process which results in uniform, conformal coatings and highly crystalline, dense ZnO thin films. These films and resulting devices have been compared with those prepared by spatial atomic layer deposition (SALD) throughout the work. Both PEALD and SALD ZnO TFTs have high field-effect mobility (>20 cm 2/V·s) and devices with ALD Al2O3 passivation can have excellent bias stress stability. Temperature dependent measurements of PEALD ZnO TFTs revealed a mobility activation energy < 5 meV and can be described using a simple percolation model with a Gaussian distribution of near-conduction band barriers. Interestingly, both PEALD and SALD devices operate with mobility > 1 cm2/V·s even at temperatures < 10 K. The effects of high energy irradiation have also been investigated. Devices exposed to 1 MGy of gamma irradiation showed small threshold voltage shifts (<2 V) which were fully recoverable with short (1 min) low-temperature (200°C) anneals. ZnO TFTs exhibit a range of non-ideal behavior which has direct implications on how important parameters such as mobility and threshold voltage are quantified. For example, the accumulation-dependent mobility and contact effects can lead to significant overestimations in mobility. It is also found that self-heating plays and important role in the non-ideal behavior of oxide TFTs on low thermal conductivity substrates. In particular, the output conductance and a high current device runaway breakdown effect can be directly ascribed to self-heating. Additionally, a variety of simple ZnO circuits on glass and flexible substrates were demonstrated. A backside exposure process was used to form gate-self-aligned structures with reduced parasitic capacitance and circuits with propagation delay < 10 ns/stage. Finally, to combat some of the self-heating and design challenges associated with unipolar circuits, a simple 4-mask organic-inorganic hybrid CMOS process was demonstrated.

Processing circuitry for single channel radiation detector

NASA Technical Reports Server (NTRS)

Holland, Samuel D. (Inventor); Delaune, Paul B. (Inventor); Turner, Kathryn M. (Inventor)

2009-01-01

Processing circuitry is provided for a high voltage operated radiation detector. An event detector utilizes a comparator configured to produce an event signal based on a leading edge threshold value. A preferred event detector does not produce another event signal until a trailing edge threshold value is satisfied. The event signal can be utilized for counting the number of particle hits and also for controlling data collection operation for a peak detect circuit and timer. The leading edge threshold value is programmable such that it can be reprogrammed by a remote computer. A digital high voltage control is preferably operable to monitor and adjust high voltage for the detector.

Modeling of Dual Gate Material Hetero-dielectric Strained PNPN TFET for Improved ON Current

NASA Astrophysics Data System (ADS)

Kumari, Tripty; Saha, Priyanka; Dash, Dinesh Kumar; Sarkar, Subir Kumar

2018-01-01

The tunnel field effect transistor (TFET) is considered to be a promising alternative device for future low-power VLSI circuits due to its steep subthreshold slope, low leakage current and its efficient performance at low supply voltage. However, the main challenging issue associated with realizing TFET for wide scale applications is its low ON current. To overcome this, a dual gate material with the concept of dielectric engineering has been incorporated into conventional TFET structure to tune the tunneling width at source-channel interface allowing significant flow of carriers. In addition to this, N+ pocket is implanted at source-channel junction of the proposed structure and the effect of strain is added for exploring the performance of the model in nanoscale regime. All these added features upgrade the device characteristics leading to higher ON current, low leakage and low threshold voltage. The present work derives the surface potential, electric field expression and drain current by solving 2D Poisson's equation at different boundary conditions. A comparative analysis of proposed model with conventional TFET has been done to establish the superiority of the proposed structure. All analytical results have been compared with the results obtained in SILVACO ATLAS device simulator to establish the accuracy of the derived analytical model.

Space Environment Effects on Flexible, Low-Voltage Organic Thin-Film Transistors.

PubMed

Basiricò, Laura; Basile, Alberto Francesco; Cosseddu, Piero; Gerardin, Simone; Cramer, Tobias; Bagatin, Marta; Ciavatti, Andrea; Paccagnella, Alessandro; Bonfiglio, Annalisa; Fraboni, Beatrice

2017-10-11

Organic electronic devices fabricated on flexible substrates are promising candidates for applications in environments where flexible, lightweight, and radiation hard materials are required. In this work, device parameters such as threshold voltage, charge mobility, and trap density of 13-bis(triisopropylsilylethynyl)pentacene (TIPS-pentacene)-based organic thin-film transistors (OTFTs) have been monitored for performing electrical measurements before and after irradiation by high-energy protons. The observed reduction of charge carrier mobility following irradiation can be only partially ascribed to the increased trap density. Indeed, we used other techniques to identify additional effects induced by proton irradiation in such devices. Atomic force microscopy reveals morphological defects occurring in the organic dielectric layer induced by the impinging protons, which, in turn, induce a strain on the TIPS-pentacene crystallites lying above. The effects of this strain are investigated by density functional theory simulations of two model structures, which describe the TIPS-pentacene crystalline films at equilibrium and under strain. The two different density of states distributions in the valence band have been correlated with the photocurrent spectra acquired before and after proton irradiation. We conclude that the degradation of the dielectric layer and the organic semiconductor sensitivity to strain are the two main phenomena responsible for the reduction of OTFT mobility after proton irradiation.

Efficient Defect Engineering for Solution Combustion Processed In-Zn-O thin films for high performance transistors

NASA Astrophysics Data System (ADS)

Liang, Xiaoci; Wang, Chengcai; Liang, Jun; Liu, Chuan; Pei, Yanli

2017-09-01

The oxygen related defects in the solution combustion-processed InZnO vitally affect the field-effect mobility and on-off characteristics in thin film transistors (TFTs). We use photoelectron spectroscopy to reveal that these defects can be well controlled by adjusting the atmosphere and flow rate during the combustion reaction, but are hardly affected by further post-annealing after the reaction. In device performance, the threshold voltage of the InZnO-TFTs was regulated in a wide range from 3.5 V to 11.0 V. To compromise the high field-effect mobility and good subthreshold properties, we fabricate the TFTs with double active layers of InZnO to achieve vertical gradience in defect distribution. The resulting TFT exhibits much higher field-effect mobility as 17.5 cm2 · V-1 · s-1, a low reversed sub-threshold slope as 0.35 V/decade, and a high on-off ratio as 107. The presented understandings and methods on defect engineering are efficient in improving the device performance of TFTs made from the combustion reaction process.

Vertical-Cavity Surface-Emitting Lasers: Design, Fabrication and Characterization

NASA Astrophysics Data System (ADS)

Geels, Randall Scott

The theory, design, fabrication, and testing of vertical-cavity surface-emitting lasers (VCSELs) is explored in depth. The design of the distributed Bragg reflector (DBR) mirrors is thoroughly treated and both analytic and numerical approaches for computing the reflectivity are covered. The electrical properties of the DBR mirrors are also considered and graded interfaces are found to be critical in reducing the series voltage drop in the mirrors. Thickness variations due to growth rate uncertainties are considered and the permissible thickness inaccuracies are discussed. Layer thickness variations of several percent can be tolerated without large changes in the threshold current. The growth of VCSELs by molecular beam epitaxy (MBE) is described in detail as is the device processing technology for broad area as well as small area devices. Results from numerous devices are reported. Broad area in-plane lasers were used to characterize the material and determine the internal parameters. Broad area VCSELs were fabricated to determine the characteristics of the VCSEL cavity. Small area VCSELs were fabricated and extensively tested. Measured and derived parameters from small area devices include: threshold current (~0.7 mA), peak output power (>3 mW), maximum operation temperature (>110^ circC), output power at 100^ circC (~0.4 mW), and linewidth (85 MHz). The near field, far field, and polarization characteristics were also measured.

BeZnCdSe quantum-well ridge-waveguide laser diodes under low threshold room-temperature continuous-wave operation

DOE Office of Scientific and Technical Information (OSTI.GOV)

Feng, Jijun; Electronics and Photonics Research Institute, National Institute of Advanced Industrial Science and Technology; Akimoto, Ryoichi, E-mail: r-akimoto@aist.go.jp

2015-10-19

Low threshold current ridge-waveguide BeZnCdSe quantum-well laser diodes (LDs) have been developed by completely etching away the top p-type BeMgZnSe/ZnSe:N short-period superlattice cladding layer, which can suppress the leakage current that flows laterally outside of the electrode. The waveguide LDs are covered with a thick SiO{sub 2} layer and planarized with chemical-mechanical polishing and a reactive ion etching process. Room-temperature lasing under continuous-wave condition is achieved with the laser cavity formed by the cleaved waveguide facets coated with high-reflectivity dielectric films. For a 4 μm-wide green LD lasing around a wavelength of 535 nm, threshold current and voltage of 7.07 mA and 7.89 Vmore » are achieved for a cavity length of 300 μm, and the internal differential quantum efficiency, internal absorption loss, gain constant, and nominal transparency current density are estimated to be 27%, 4.09 cm{sup −1}, 29.92 (cm × μm)/kA and 6.35 kA/(cm{sup 2 }× μm), respectively. This compact device can realize a significantly improved performance with much lower threshold power consumption, which would benefit the potential application for ZnSe-based green LDs as light sources in full-color display and projector devices installed in consumer products such as pocket projectors.« less

Switching mechanism transition induced by annealing treatment in nonvolatile Cu/ZnO/Cu/ZnO/Pt resistive memory: From carrier trapping/detrapping to electrochemical metallization

NASA Astrophysics Data System (ADS)

Yang, Y. C.; Pan, F.; Zeng, F.; Liu, M.

2009-12-01

ZnO/Cu/ZnO trilayer films sandwiched between Cu and Pt electrodes were prepared for nonvolatile resistive memory applications. These structures show resistance switching under electrical bias both before and after a rapid thermal annealing (RTA) treatment, while it is found that the resistive switching effects in the two cases exhibit distinct characteristics. Compared with the as-fabricated device, the memory cell after RTA demonstrates remarkable device parameter improvements including lower threshold voltages, lower write current, and higher Roff/Ron ratio. A high-voltage forming process is avoided in the annealed device as well. Furthermore, the RTA treatment has triggered a switching mechanism transition from a carrier trapping/detrapping type to an electrochemical-redox-reaction-controlled conductive filament formation/rupture process, as indicated by different features in current-voltage characteristics. Both scanning electron microscopy observations and Auger electron spectroscopy depth profiles reveal that the Cu charge trapping layer in ZnO/Cu/ZnO disperses uniformly into the storage medium after RTA, while x-ray diffraction and x-ray photoelectron spectroscopy analyses demonstrate that the Cu atoms have lost electrons to become Cu2+ ions after dispersion. The above experimental facts indicate that the altered status of Cu in the ZnO/Cu/ZnO trilayer films during RTA treatment should be responsible for the switching mechanism transition. This study is envisioned to open the door for understanding the interrelation between different mechanisms that currently exist in the field of resistive memories.

21 CFR 892.1700 - Diagnostic x-ray high voltage generator.

Code of Federal Regulations, 2012 CFR

2012-04-01

... 21 Food and Drugs 8 2012-04-01 2012-04-01 false Diagnostic x-ray high voltage generator. 892.1700... (CONTINUED) MEDICAL DEVICES RADIOLOGY DEVICES Diagnostic Devices § 892.1700 Diagnostic x-ray high voltage generator. (a) Identification. A diagnostic x-ray high voltage generator is a device that is intended to...

21 CFR 892.1700 - Diagnostic x-ray high voltage generator.

Code of Federal Regulations, 2013 CFR

2013-04-01

... 21 Food and Drugs 8 2013-04-01 2013-04-01 false Diagnostic x-ray high voltage generator. 892.1700... (CONTINUED) MEDICAL DEVICES RADIOLOGY DEVICES Diagnostic Devices § 892.1700 Diagnostic x-ray high voltage generator. (a) Identification. A diagnostic x-ray high voltage generator is a device that is intended to...

21 CFR 892.1700 - Diagnostic x-ray high voltage generator.

Code of Federal Regulations, 2010 CFR

2010-04-01

... 21 Food and Drugs 8 2010-04-01 2010-04-01 false Diagnostic x-ray high voltage generator. 892.1700... (CONTINUED) MEDICAL DEVICES RADIOLOGY DEVICES Diagnostic Devices § 892.1700 Diagnostic x-ray high voltage generator. (a) Identification. A diagnostic x-ray high voltage generator is a device that is intended to...

21 CFR 892.1700 - Diagnostic x-ray high voltage generator.

Code of Federal Regulations, 2014 CFR

2014-04-01

... 21 Food and Drugs 8 2014-04-01 2014-04-01 false Diagnostic x-ray high voltage generator. 892.1700... (CONTINUED) MEDICAL DEVICES RADIOLOGY DEVICES Diagnostic Devices § 892.1700 Diagnostic x-ray high voltage generator. (a) Identification. A diagnostic x-ray high voltage generator is a device that is intended to...

21 CFR 892.1700 - Diagnostic x-ray high voltage generator.

Code of Federal Regulations, 2011 CFR

2011-04-01

... 21 Food and Drugs 8 2011-04-01 2011-04-01 false Diagnostic x-ray high voltage generator. 892.1700... (CONTINUED) MEDICAL DEVICES RADIOLOGY DEVICES Diagnostic Devices § 892.1700 Diagnostic x-ray high voltage generator. (a) Identification. A diagnostic x-ray high voltage generator is a device that is intended to...

A Dynamical Threshold for Cardiac Delayed Afterdepolarization-Mediated Triggered Activity.

PubMed

Liu, Michael B; Ko, Christopher Y; Song, Zhen; Garfinkel, Alan; Weiss, James N; Qu, Zhilin

2016-12-06

Ventricular myocytes are excitable cells whose voltage threshold for action potential (AP) excitation is ∼-60 mV at which I Na is activated to give rise to a fast upstroke. Therefore, for a short stimulus pulse to elicit an AP, a stronger stimulus is needed if the resting potential lies further away from the I Na threshold, such as in hypokalemia. However, for an AP elicited by a long duration stimulus or a diastolic spontaneous calcium release, we observed that the stimulus needed was lower in hypokalemia than in normokalemia in both computer simulations and experiments of rabbit ventricular myocytes. This observation provides insight into why hypokalemia promotes calcium-mediated triggered activity, despite the resting potential lying further away from the I Na threshold. To understand the underlying mechanisms, we performed bifurcation analyses and demonstrated that there is a dynamical threshold, resulting from a saddle-node bifurcation mainly determined by I K1 and I NCX . This threshold is close to the voltage at which I K1 is maximum, and lower than the I Na threshold. After exceeding this dynamical threshold, the membrane voltage will automatically depolarize above the I Na threshold due to the large negative slope of the I K1 -V curve. This dynamical threshold becomes much lower in hypokalemia, especially with respect to calcium, as predicted by our theory. Because of the saddle-node bifurcation, the system can automatically depolarize even in the absence of I Na to voltages higher than the I Ca,L threshold, allowing for triggered APs in single myocytes with complete I Na block. However, because I Na is important for AP propagation in tissue, blocking I Na can still suppress premature ventricular excitations in cardiac tissue caused by calcium-mediated triggered activity. This suppression is more effective in normokalemia than in hypokalemia due to the difference in dynamical thresholds. Copyright © 2016 Biophysical Society. Published by Elsevier Inc. All rights reserved.

Inkjet-printed p-type nickel oxide thin-film transistor

NASA Astrophysics Data System (ADS)

Hu, Hailong; Zhu, Jingguang; Chen, Maosheng; Guo, Tailiang; Li, Fushan

2018-05-01

High-performance inkjet-printed nickel oxide thin-film transistors (TFTs) with Al2O3 high-k dielectric have been fabricated using a sol-gel precursor ink. The "coffee ring" effect during the printing process was facilely restrained by modifying the viscosity of the ink to control the outward capillary flow. The impacts on the device performance was studied in detail in consideration of annealing temperature of the nickel oxide film and the properties of dielectric layer. The optimized switching ability of the device were achieved at an annealing temperature of 280 °C on a 50-nm-thick Al2O3 dielectric layer, with a hole mobility of 0.78 cm2/V·s, threshold voltage of -0.6 V and on/off current ratio of 5.3 × 104. The as-printed p-type oxide TFTs show potential application in low-cost, large-area complementary electronic devices.

Electrical instability of InGaZnO thin-film transistors with and without titanium sub-oxide layer under light illumination

NASA Astrophysics Data System (ADS)

Chiu, Y. C.; Zheng, Z. W.; Cheng, C. H.; Chen, P. C.; Yen, S. S.; Fan, C. C.; Hsu, H. H.; Kao, H. L.; Chang, C. Y.

2017-03-01

The electrical instability behaviors of amorphous indium-gallium-zinc oxide thin-film transistors with and without titanium sub-oxide passivation layer were investigated under light illumination in this study. For the unpassivated IGZO TFT device, in contrast with the dark case, a noticeable increase of the sub-threshold swing was observed when under the illumination environment, which can be attributed to the generation of ionized oxygen vacancies within the α-IGZO active layer by high energy photons. For the passivated TFT device, the much smaller SS of 70 mV/dec and high device mobility of >100 cm2/Vs at a drive voltage of 3 V with negligible degradation under light illumination are achieved due to the passivation effect of n-type titanium sub-oxide semiconductor, which may create potential application for high-performance display.

Recovery of damage in rad-hard MOS devices during and after irradiation by electrons, protons, alphas, and gamma rays

NASA Technical Reports Server (NTRS)

Brucker, G. J.; Van Gunten, O.; Stassinopoulos, E. G.; Shapiro, P.; August, L. S.; Jordan, T. M.

1983-01-01

This paper reports on the recovery properties of rad-hard MOS devices during and after irradiation by electrons, protons, alphas, and gamma rays. The results indicated that complex recovery properties controlled the damage sensitivities of the tested parts. The results also indicated that damage sensitivities depended on dose rate, total dose, supply bias, gate bias, transistor type, radiation source, and particle energy. The complex nature of these dependencies make interpretation of LSI device performance in space (exposure to entire electron and proton spectra) difficult, if not impossible, without respective ground tests and analyses. Complete recovery of n-channel shifts was observed, in some cases within hours after irradiation, with equilibrium values of threshold voltages greater than their pre-irradiation values. This effect depended on total dose, radiation source, and gate bias during exposure. In contrast, the p-channel shifts recovered only 20 percent within 30 days after irradiation.

Polymer/metal oxide hybrid dielectrics for low voltage field-effect transistors with solution-processed, high-mobility semiconductors

DOE Office of Scientific and Technical Information (OSTI.GOV)

Held, Martin; Schießl, Stefan P.; Gannott, Florentina

Transistors for future flexible organic light-emitting diode (OLED) display backplanes should operate at low voltages and be able to sustain high currents over long times without degradation. Hence, high capacitance dielectrics with low surface trap densities are required that are compatible with solution-processable high-mobility semiconductors. Here, we combine poly(methyl methacrylate) (PMMA) and atomic layer deposition hafnium oxide (HfO{sub x}) into a bilayer hybrid dielectric for field-effect transistors with a donor-acceptor polymer (DPPT-TT) or single-walled carbon nanotubes (SWNTs) as the semiconductor and demonstrate substantially improved device performances for both. The ultra-thin PMMA layer ensures a low density of trap states atmore » the semiconductor-dielectric interface while the metal oxide layer provides high capacitance, low gate leakage and superior barrier properties. Transistors with these thin (≤70 nm), high capacitance (100–300 nF/cm{sup 2}) hybrid dielectrics enable low operating voltages (<5 V), balanced charge carrier mobilities and low threshold voltages. Moreover, the hybrid layers substantially improve the bias stress stability of the transistors compared to those with pure PMMA and HfO{sub x} dielectrics.« less

Polarization-Engineered Ga-Face GaN-Based Heterostructures for Normally-Off Heterostructure Field-Effect Transistors

NASA Astrophysics Data System (ADS)

Kim, Hyeongnam; Nath, Digbijoy; Rajan, Siddharth; Lu, Wu

2013-01-01

Polarization-engineered Ga-face GaN-based heterostructures with a GaN cap layer and an AlGaN/ p-GaN back barrier have been designed for normally-off field-effect transistors (FETs). The simulation results show that an unintentionally doped GaN cap and p-GaN layer in the buffer primarily deplete electrons in the channel and the Al0.2Ga0.8N back barrier helps to pinch off the channel. Experimentally, we have demonstrated a normally-off GaN-based field-effect transistor on the designed GaN cap/Al0.3Ga0.7N/GaN channel/Al0.2Ga0.8N/ p-GaN/GaN heterostructure. A positive threshold voltage of 0.2 V and maximum transconductance of 2.6 mS/mm were achieved for 80- μm-long gate devices. The device fabrication process does not require a dry etching process for gate recessing, while highly selective etching of the GaN cap against a very thin Al0.3GaN0.7N top barrier has to be performed to create a two-dimensional electron gas for both the ohmic and access regions. A self-aligned, selective etch of the GaN cap in the access region is introduced, using the gate metal as an etch mask. The absence of gate recess etching is promising for uniform and repeatable threshold voltage control in normally-off AlGaN/GaN heterostructure FETs for power switching applications.

Ultra-low voltage electrowetting using graphite surfaces.

PubMed

Lomax, Deborah J; Kant, Pallav; Williams, Aled T; Patten, Hollie V; Zou, Yuqin; Juel, Anne; Dryfe, Robert A W

2016-10-26

The control of wetting behaviour underpins a variety of important applications from lubrication to microdroplet manipulation. Electrowetting is a powerful method to achieve external wetting control, by exploiting the potential-dependence of the liquid contact angle with respect to a solid substrate. Addition of a dielectric film to the surface of the substrate, which insulates the electrode from the liquid thereby suppressing electrolysis, has led to technological advances such as variable focal-length liquid lenses, electronic paper and the actuation of droplets in lab-on-a-chip devices. The presence of the dielectric, however, necessitates the use of large bias voltages (frequently in the 10-100 V range). Here we describe a simple, dielectric-free approach to electrowetting using the basal plane of graphite as the conducting substrate: unprecedented changes in contact angle for ultra-low voltages are seen below the electrolysis threshold (50° with 1 V for a droplet in air, and 100° with 1.5 V for a droplet immersed in hexadecane), which are shown to be reproducible, stable over 100 s of cycles and free of hysteresis. Our results dispel conventional wisdom that reversible, hysteresis-free electrowetting can only be achieved on solid substrates with the use of a dielectric. This work paves the way for the development of a new generation of efficient electrowetting devices using advanced materials such as graphene and monolayer MoS 2 .

A low-power bidirectional telemetry device with a near-field charging feature for a cardiac microstimulator.

PubMed

Shuenn-Yuh Lee; Chih-Jen Cheng; Ming-Chun Liang

2011-08-01

In this paper, wireless telemetry using the near-field coupling technique with round-wire coils for an implanted cardiac microstimulator is presented. The proposed system possesses an external powering amplifier and an internal bidirectional microstimulator. The energy of the microstimulator is provided by a rectifier that can efficiently charge a rechargeable device. A fully integrated regulator and a charge pump circuit are included to generate a stable, low-voltage, and high-potential supply voltage, respectively. A miniature digital processor includes a phase-shift-keying (PSK) demodulator to decode the transmission data and a self-protective system controller to operate the entire system. To acquire the cardiac signal, a low-voltage and low-power monitoring analog front end (MAFE) performs immediate threshold detection and data conversion. In addition, the pacing circuit, which consists of a pulse generator (PG) and its digital-to-analog (D/A) controller, is responsible for stimulating heart tissue. The chip was fabricated by Taiwan Semiconductor Manufacturing Company (TSMC) with 0.35-μm complementary metal-oxide semiconductor technology to perform the monitoring and pacing functions with inductively powered communication. Using a model with lead and heart tissue on measurement, a -5-V pulse at a stimulating frequency of 60 beats per minute (bpm) is delivered while only consuming 31.5 μW of power.

Ultralow-power complementary metal-oxide-semiconductor inverters constructed on Schottky barrier modified nanowire metal-oxide-semiconductor field-effect-transistors.

PubMed

Ma, R M; Peng, R M; Wen, X N; Dai, L; Liu, C; Sun, T; Xu, W J; Qin, G G

2010-10-01

We show that the threshold voltages of both n- and p-channel metal-oxide-semiconductor field-effect-transistors (MOSFETs) can be lowered to close to zero by adding extra Schottky contacts on top of nanowires (NWs). Novel complementary metal-oxide-semiconductor (CMOS) inverters are constructed on these Schottky barrier modified n- and p-channel NW MOSFETs. Based on the high performances of the modified n- and p-channel MOSFETs, especially the low threshold voltages, the as-fabricated CMOS inverters have low operating voltage, high voltage gain, and ultra-low static power dissipation.

Ultra-low input power long-wavelength GaSb type-I laser diodes at 2.7-3.0 μm

NASA Astrophysics Data System (ADS)

Vizbaras, Augustinas; Greibus, Mindaugas; Dvinelis, Edgaras; Trinkūnas, Augustinas; Kovalenkovas, Deividas; Šimonytė, Ieva; Vizbaras, Kristijonas

2014-02-01

Mid-infrared spectral region (2-4 μm) is gaining significant attention recently due to the presence of numerous enabling applications in the field of gas sensing, medical, environmental and defense applications. Major requirement for these applications is the availability of laser sources in this spectral window. Type-I GaSb-based laser diodes are ideal candidates for these applications being compact, electrically pumped, power efficient and able to operate at room temperature in continuous-wave. Moreover, due to the nature of type-I transition; these devices have a characteristic low operation voltage, typically below 1 V, resulting in low power consumption, and high-temperature of operation. In this work, we present recent progress of 2.7 μm - 3.0 μm wavelength single-spatial mode GaSb type-I laser diode development at Brolis Semiconductors. Experimental device structures were grown by solid-source multi-wafer MBE, consisting of an active region with 2 compressively strained (~1.3 %-1.5 %) GaInAsSb quantum wells with GaSb barriers for 2.7 μm devices and quinternary AlGaInAsSb barriers for 3.0 μm devices. Epi-wafers were processed into a narrow-ridge (2-4 μm) devices and mounted p-side up on CuW heatsink. Devices exhibited very low CW threshold powers of < 100 mW, and single spatial mode (TE00) operation with room-temperature output powers up to 40 mW in CW mode. Operating voltage was as low as 1.2 V at 1.2 A. As-cleaved devices worked CW up to 50 deg C.

Design of photonic crystal surface emitting lasers with indium-tin-oxide top claddings

NASA Astrophysics Data System (ADS)

Huang, Shen-Che; Hong, Kuo-Bin; Chiu, Han-Lun; Lan, Shao-Wun; Chang, Tsu-Chi; Li, Heng; Lu, Tien-Chang

2018-02-01

Electrically pumped GaAs-based photonic crystal surface emitting lasers were fabricated using a simple fabrication process by directly capping the indium-tin-oxide transparent conducting thin film as the top cladding layer upon a photonic crystal layer. Optimization of the separate-confinement heterostructures of a laser structure is crucial to improving characteristics by providing advantageous optical confinements. The turn-on voltage, series resistance, threshold current, and slope efficiency of the laser with a 100 × 100 μm2 photonic crystal area operated at room temperature were 1.3 V, 1.5 Ω, 121 mA, and 0.2 W/A, respectively. Furthermore, we demonstrated a single-lobed lasing wavelength of 928.6 nm at 200 mA and a wavelength redshift rate of 0.05 nm/K in temperature-dependent measurements. The device exhibited the maximum output power of approximately 400 mW at an injection current of 2 A; moreover, divergence angles of less than 1° for the unpolarized circular-shaped laser beam were measured at various injection currents. Overall, the low threshold current, excellent beam quality, small divergence, high output power, and high-operating-temperature (up to 343 K) of our devices indicate that they can potentially fill the requirements for next-generation light sources and optoelectronic devices.

Development of Multi-Functional Voltage Restore System

NASA Astrophysics Data System (ADS)

Suzuki, Satoshi; Ueda, Yoshinobu; Koganezawa, Takehisa; Ogihara, Yoshinori; Mori, Kenjiro; Fukazu, Naoaki

Recently, with the dawn of the electric deregulation, the installation of distributed generation with power electronics device has grown. This current causes a greater concern of power quality, primarily voltage disturbance for power companies, and their interest in power quality is peaking. Utilities are also interested in keeping their customers satisfied, as well as keeping them on-line and creating more revenue for the utility. As a countermeasure against the above surroundings, a variety type of devices based on power electronics has been developed to protect customers' load from power line voltage disturbance. One of them is the series type voltage restore. The series device is an active device, designed to provide a pure sinusoidal load voltage at all times, correcting voltage disturbance. Series type device compensates for voltage anomalies by inserting the ‘missing’ voltage onto the line through insertion transformer and inverter. This paper shows the setting guideline of target level to compensate voltage disturbance, that is, voltage dip, voltage harmonics, voltage imbalance and voltage flicker, and the design approach of the prototype of series voltage restores to accomplish the required compensation level. The prototype system gives satisfactory compensation performance through evaluation tests, which confirm the validity and effectiveness of the system.

Coupled-cavity surface-emitting lasers: spectral and polarization threshold characteristics and electrooptic switching.

PubMed

Panajotov, Krassimir P; Zujewski, Mateusz; Thienpont, Hugo

2010-12-20

We study spectral and polarization threshold characteristics of coupled-cavity Vertical-Surface-Emitting Lasers (CC-VCSEL) on the base of a simple matrix approach. We show that strong wavelength discrimination can be achieved in CC-VCSELs by slightly detuning the cavities. However, polarization discrimination is not provided by the coupled-cavity design. We also consider the case of reverse-biasing one of the cavities, i.e. using it as a modulator via linear and/or quadratic electrooptic effect. Such a CC-VCSEL can act as a voltage-controlled polarization or wavelength switching device that is decoupled from the laser design and can be optimized for high modulation speed. We also show that using QD stack instead of quantum wells in the top cavity would lead to significant reduction of the driving electrical field.

Electric-optic resonant phase modulator

NASA Technical Reports Server (NTRS)

Chen, Chien-Chung (Inventor); Robinson, Deborah L. (Inventor); Hemmati, Hamid (Inventor)

1994-01-01

An electro-optic resonant cavity is used to achieve phase modulation with lower driving voltages. Laser damage thresholds are inherently higher than with previously used integrated optics due to the utilization of bulk optics. Phase modulation is achieved at higher speeds with lower driving voltages than previously obtained with non-resonant electro-optic phase modulators. The instant scheme uses a data locking dither approach as opposed to the conventional sinusoidal locking schemes. In accordance with a disclosed embodiment, a resonant cavity modulator has been designed to operate at a data rate in excess of 100 Mbps. By carefully choosing the cavity finesse and its dimension, it is possible to control the pulse switching time to within 4 ns and to limit the required switching voltage to within 10 V. Experimentally, the resonant cavity can be maintained on resonance with respect to the input laser signal by monitoring the fluctuation of output intensity as the cavity is switched. This cavity locking scheme can be applied by using only the random data sequence, and without the need of additional dithering of the cavity. Compared to waveguide modulators, the resonant cavity has a comparable modulating voltage requirement. Because of its bulk geometry, resonant cavity modulator has the potential of accommodating higher throughput power. Furthermore, mode matching into a bulk device is easier and typically can be achieved with higher efficiency. On the other hand, unlike waveguide modulators which are essentially traveling wave devices, the resonant cavity modulator requires that the cavity be maintained in resonance with respect to the incoming laser signal. An additional control loop is incorporated into the modulator to maintain the cavity on resonance.

Electrical characterization of ALD HfO2 high-k dielectrics on ( 2 ¯ 01) β-Ga2O3

NASA Astrophysics Data System (ADS)

Shahin, David I.; Tadjer, Marko J.; Wheeler, Virginia D.; Koehler, Andrew D.; Anderson, Travis J.; Eddy, Charles R.; Christou, Aris

2018-01-01

The electrical quality of HfO2 dielectrics grown by thermal atomic layer deposition at 175 °C on n-type ( 2 ¯ 01) β-Ga2O3 has been studied through capacitance- and current-voltage measurements on metal-oxide-semiconductor capacitors. These capacitors exhibited excellent electrical characteristics, including dual-sweep capacitance-voltage curves with low hysteresis and stretch-out and a frequency-stable dielectric constant of k˜14 when measured between 10 kHz and 1 MHz. The C-V curves exhibited a uniform and repeatable +1.05 V shift relative to the ideal case when swept from 3.5 to -5 V, yielding positively measured flatband (+2.15 V) and threshold (+1.05 V) voltages that may be useful for normally off n-channel Ga2O3 devices. Using the Terman method, an average interface trap density of 1.3 × 1011 cm-2.eV-1 was obtained between 0.2 and 0.6 eV below the conduction band edge. The forward bias current-voltage characteristic was successfully fitted to the Fowler-Nordheim tunneling model at a field strength of 5 MV/cm, allowing an extraction of a 1.3 eV conduction band offset between HfO2 and Ga2O3, which matches the value previously determined from x-ray photoelectron spectroscopy. However, a temperature dependence in the leakage current was observed. These results suggest that HfO2 is an appealing dielectric for Ga2O3 device applications.

High breakdown voltage quasi-two-dimensional β-Ga2O3 field-effect transistors with a boron nitride field plate

NASA Astrophysics Data System (ADS)

Bae, Jinho; Kim, Hyoung Woo; Kang, In Ho; Yang, Gwangseok; Kim, Jihyun

2018-03-01

We have demonstrated a β-Ga2O3 metal-semiconductor field-effect transistor (MESFET) with a high off-state breakdown voltage (344 V), based on a quasi-two-dimensional β-Ga2O3 field-plated with hexagonal boron nitride (h-BN). Both the β-Ga2O3 and h-BN were mechanically exfoliated from their respective crystal substrates, followed by dry-transfer onto a SiO2/Si substrate for integration into a high breakdown voltage quasi-two-dimensional β-Ga2O3 MESFETs. N-type conducting behavior was observed in the fabricated β-Ga2O3 MESFETs, along with a high on/off current ratio (>106) and excellent current saturation. A three-terminal off-state breakdown voltage of 344 V was obtained, with a threshold voltage of -7.3 V and a subthreshold swing of 84.6 mV/dec. The distribution of electric fields in the quasi-two-dimensional β-Ga2O3 MESFETs was simulated to analyze the role of the dielectric h-BN field plate in improving the off-state breakdown voltage. The stability of the field-plated β-Ga2O3 MESFET in air was confirmed after storing the MESFET in ambient air for one month. Our results pave the way for unlocking the full potential of β-Ga2O3 for use in a high-power nano-device with an ultrahigh breakdown voltage.

Pixel structures to compensate nonuniform threshold voltage and mobility of polycrystalline silicon thin-film transistors using subthreshold current for large-size active matrix organic light-emitting diode displays

NASA Astrophysics Data System (ADS)

Na, Jun-Seok; Kwon, Oh-Kyong

2014-01-01

We propose pixel structures for large-size and high-resolution active matrix organic light-emitting diode (AMOLED) displays using a polycrystalline silicon (poly-Si) thin-film transistor (TFT) backplane. The proposed pixel structures compensate the variations of the threshold voltage and mobility of the driving TFT using the subthreshold current. The simulated results show that the emission current error of the proposed pixel structure B ranges from -2.25 to 2.02 least significant bit (LSB) when the variations of the threshold voltage and mobility of the driving TFT are ±0.5 V and ±10%, respectively.

Improvement of the positive bias stability of a-IGZO TFTs by the HCN treatment

NASA Astrophysics Data System (ADS)

Kim, Myeong-Ho; Choi, Myung-Jea; Kimura, Katsuya; Kobayashi, Hikaru; Choi, Duck-Kyun

2016-12-01

In recent years, many researchers have attempted to improve the bias stability of amorphous indium gallium zinc oxide (a-IGZO) thin-film transistors (TFTs). In this study, the hydrogen cyanide (HCN) treatment was carried out to improve the positive bias stability of bottom-gate a-IGZO TFTs. The HCN treatment was performed using a 0.1 M HCN solution with a pH of 10 at room temperature. Before applying the positive bias stress, there were no differences in the major electrical properties, including the saturation mobility (μsat), threshold voltage (Vth), and subthreshold swing (S/S), between HCN-treated and non-HCN-treated devices. However, after applying the positive bias stress, the HCN-treated device showed superior bias stability compared to the non-HCN-treated device. This difference is associated with the passivation of the defect states and the surface of the back-channel layer of the HCN-treated device by cyanide ions.

Inserting Thienyl Linkers into Conjugated Molecules for Efficient Multilevel Electronic Memory: A New Understanding of Charge-Trapping in Organic Materials.

PubMed

Li, Yang; Li, Hua; He, Jinghui; Xu, Qingfeng; Li, Najun; Chen, Dongyun; Lu, Jianmei

2016-03-18

The practical application of organic memory devices requires low power consumption and reliable device quality. Herein, we report that inserting thienyl units into D-π-A molecules can improve these parameters by tuning the texture of the film. Theoretical calculations revealed that introducing thienyl π bridges increased the planarity of the molecular backbone and extended the D-A conjugation. Thus, molecules with more thienyl spacers showed improved stacking and orientation in the film state relative to the substrates. The corresponding sandwiched memory devices showed enhanced ternary memory behavior, with lower threshold voltages and better repeatability. The conductive switching and variation in the performance of the memory devices were interpreted by using an extended-charge-trapping mechanism. Our study suggests that judicious molecular engineering can facilitate control of the orientation of the crystallite in the solid state to achieve superior multilevel memory performance. © 2016 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim.

Device optimization and scaling properties of a gate-on-germanium source tunnel field-effect transistor

NASA Astrophysics Data System (ADS)

Chattopadhyay, Avik; Mallik, Abhijit; Omura, Yasuhisa

2015-06-01

A gate-on-germanium source (GoGeS) tunnel field-effect transistor (TFET) shows great promise for low-power (sub-0.5 V) applications. A detailed investigation, with the help of a numerical device simulator, on the effects of variation in different structural parameters of a GoGeS TFET on its electrical performance is reported in this paper. Structural parameters such as κ-value of the gate dielectric, length and κ-value of the spacer, and doping concentrations of both the substrate and source are considered. A low-κ symmetric spacer and a high-κ gate dielectric are found to yield better device performance. The substrate doping influences only the p-i-n leakage floor. The source doping is found to significantly affect performance parameters such as OFF-state current, ON-state current and subthreshold swing, in addition to a threshold voltage shift. Results of the investigation on the gate length scaling of such devices are also reported in this paper.

Performance analysis of junctionless double gate VeSFET considering the effects of thermal variation - An explicit 2D analytical model

NASA Astrophysics Data System (ADS)

Chaudhary, Tarun; Khanna, Gargi

2017-03-01

The purpose of this paper is to explore junctionless double gate vertical slit field effect transistor (JLDG VeSFET) with reduced short channel effects and to develop an analytical threshold voltage model for the device considering the impact of thermal variations for the very first time. The model has been derived by solving 2D Poisson's equation and the effects of variation in temperature on various electrical parameters of the device such as Rout, drain current, mobility, subthreshold slope and DIBL has been studied and described in the paper. The model provides a deep physical insight of the device behavior and is also very helpful in contributing to the design space exploration for JLDG VeSFET. The proposed model is verified with simulative analysis at different radii of the device and it has been observed that there is a good agreement between the analytical model and simulation results.

Bidirectional buck boost converter

DOEpatents

Esser, Albert Andreas Maria

1998-03-31

A bidirectional buck boost converter and method of operating the same allows regulation of power flow between first and second voltage sources in which the voltage level at each source is subject to change and power flow is independent of relative voltage levels. In one embodiment, the converter is designed for hard switching while another embodiment implements soft switching of the switching devices. In both embodiments, first and second switching devices are serially coupled between a relatively positive terminal and a relatively negative terminal of a first voltage source with third and fourth switching devices serially coupled between a relatively positive terminal and a relatively negative terminal of a second voltage source. A free-wheeling diode is coupled, respectively, in parallel opposition with respective ones of the switching devices. An inductor is coupled between a junction of the first and second switching devices and a junction of the third and fourth switching devices. Gating pulses supplied by a gating circuit selectively enable operation of the switching devices for transferring power between the voltage sources. In the second embodiment, each switching device is shunted by a capacitor and the switching devices are operated when voltage across the device is substantially zero.

Bidirectional buck boost converter

DOEpatents

Esser, A.A.M.

1998-03-31

A bidirectional buck boost converter and method of operating the same allows regulation of power flow between first and second voltage sources in which the voltage level at each source is subject to change and power flow is independent of relative voltage levels. In one embodiment, the converter is designed for hard switching while another embodiment implements soft switching of the switching devices. In both embodiments, first and second switching devices are serially coupled between a relatively positive terminal and a relatively negative terminal of a first voltage source with third and fourth switching devices serially coupled between a relatively positive terminal and a relatively negative terminal of a second voltage source. A free-wheeling diode is coupled, respectively, in parallel opposition with respective ones of the switching devices. An inductor is coupled between a junction of the first and second switching devices and a junction of the third and fourth switching devices. Gating pulses supplied by a gating circuit selectively enable operation of the switching devices for transferring power between the voltage sources. In the second embodiment, each switching device is shunted by a capacitor and the switching devices are operated when voltage across the device is substantially zero. 20 figs.

Measuring the upset of CMOS and TTL due to HPM-signals

NASA Astrophysics Data System (ADS)

Esser, N.; Smailus, B.

2004-05-01

To measure the performance of electronic components when stressed by High Power Microwave signals a setup was designed and tested which allows a well-defined voltage signal to enter the component during normal operation, and to discriminate its effect on the component. The microwave signal is fed to the outside conductor of a coaxial cable and couples into the inner signal line connected to the device under test (DUT). The disturbing HF-signal is transferred almost independent from frequency to maintain the pulse shape in the time domain. The configuration designed to perform a TEM-coupling within a 50 Ohm system prevents the secondary system from feeding back to the primary system and, due to the geometrical parameters chosen, the coupling efficiency is as high as 50-90%. Linear dimensions and terminations applied allow for pulses up to a width of 12ns and up to a voltage level of 4-5 kV on the outside conductor. These pulse parameters proved to be sufficient to upset the DUTs tested so far. In more than 400 measurements a rectangular pulse of increasing voltage level was applied to different types of CMOS and TTL until the individual DUT was damaged. As well the pulse width (3, 6 or 12 ns) and its polarity were varied in single-shot or repetitive-shot experiments (500 shots per voltage at a repetition rate of 3 Hz). The state of the DUT was continuously monitored by measuring both the current of the DUT circuit and that of the oscillator providing the operating signal for the DUT. The results show a very good reproducibility within a set of identical samples, remarkable differences between manufacturers and lower thresholds for repetitive testing, which indicates a memory effect of the DUT to exist for voltage levels significantly below the single-shot threshold.

Low-threshold field emission in planar cathodes with nanocarbon materials

NASA Astrophysics Data System (ADS)

Zhigalov, V.; Petukhov, V.; Emelianov, A.; Timoshenkov, V.; Chaplygin, Yu.; Pavlov, A.; Shamanaev, A.

2016-12-01

Nanocarbon materials are of great interest as field emission cathodes due to their low threshold voltage. In this work current-voltage characteristics of nanocarbon electrodes were studied. Low-threshold emission was found in planar samples where field enhancement is negligible (<10). Electron work function values, calculated by Fowler-Nordheim theory, are anomalous low (<1 eV) and come into collision with directly measured work function values in fabricated planar samples (4.1-4.4 eV). Non-applicability of Fowler-Nordheim theory for the nanocarbon materials was confirmed. The reasons of low-threshold emission in nanocarbon materials are discussed.

SONOS Nonvolatile Memory Cell Programming Characteristics

NASA Technical Reports Server (NTRS)

MacLeod, Todd C.; Phillips, Thomas A.; Ho, Fat D.

2010-01-01

Silicon-oxide-nitride-oxide-silicon (SONOS) nonvolatile memory is gaining favor over conventional EEPROM FLASH memory technology. This paper characterizes the SONOS write operation using a nonquasi-static MOSFET model. This includes floating gate charge and voltage characteristics as well as tunneling current, voltage threshold and drain current characterization. The characterization of the SONOS memory cell predicted by the model closely agrees with experimental data obtained from actual SONOS memory cells. The tunnel current, drain current, threshold voltage and read drain current all closely agreed with empirical data.

Scaling properties of ballistic nano-transistors

PubMed Central

2011-01-01

Recently, we have suggested a scale-invariant model for a nano-transistor. In agreement with experiments a close-to-linear thresh-old trace was found in the calculated ID - VD-traces separating the regimes of classically allowed transport and tunneling transport. In this conference contribution, the relevant physical quantities in our model and its range of applicability are discussed in more detail. Extending the temperature range of our studies it is shown that a close-to-linear thresh-old trace results at room temperatures as well. In qualitative agreement with the experiments the ID - VG-traces for small drain voltages show thermally activated transport below the threshold gate voltage. In contrast, at large drain voltages the gate-voltage dependence is weaker. As can be expected in our relatively simple model, the theoretical drain current is larger than the experimental one by a little less than a decade. PMID:21711899

Controllable Hysteresis and Threshold Voltage of Single-Walled Carbon Nano-tube Transistors with Ferroelectric Polymer Top-Gate Insulators

PubMed Central

Sun, Yi-Lin; Xie, Dan; Xu, Jian-Long; Zhang, Cheng; Dai, Rui-Xuan; Li, Xian; Meng, Xiang-Jian; Zhu, Hong-Wei

2016-01-01

Double-gated field effect transistors have been fabricated using the SWCNT networks as channel layer and the organic ferroelectric P(VDF-TrFE) film spin-coated as top gate insulators. Standard photolithography process has been adopted to achieve the patterning of organic P(VDF-TrFE) films and top-gate electrodes, which is compatible with conventional CMOS process technology. An effective way for modulating the threshold voltage in the channel of P(VDF-TrFE) top-gate transistors under polarization has been reported. The introduction of functional P(VDF-TrFE) gate dielectric also provides us an alternative method to suppress the initial hysteresis of SWCNT networks and obtain a controllable ferroelectric hysteresis behavior. Applied bottom gate voltage has been found to be another effective way to highly control the threshold voltage of the networked SWCNTs based FETs by electrostatic doping effect. PMID:26980284

On the integration of ultrananocrystalline diamond (UNCD) with CMOS chip

DOE PAGES

Mi, Hongyi; Yuan, Hao -Chih; Seo, Jung -Hun; ...

2017-03-27

A low temperature deposition of high quality ultrananocrystalline diamond (UNCD) film onto a finished Si-based CMOS chip was performed to investigate the compatibility of the UNCD deposition process with CMOS devices for monolithic integration of MEMS on Si CMOS platform. DC and radio-frequency performances of the individual PMOS and NMOS devices on the CMOS chip before and after the UNCD deposition were characterized. Electrical characteristics of CMOS after deposition of the UNCD film remained within the acceptable ranges, namely showing small variations in threshold voltage V th, transconductance g m, cut-off frequency f T and maximum oscillation frequency f max.more » Finally, the results suggest that low temperature UNCD deposition is compatible with CMOS to realize monolithically integrated CMOS-driven MEMS/NEMS based on UNCD.« less

Ambient effect on thermal stability of amorphous InGaZnO thin film transistors

NASA Astrophysics Data System (ADS)

Xu, Jianeng; Wu, Qi; Xu, Ling; Xie, Haiting; Liu, Guochao; Zhang, Lei; Dong, Chengyuan

2016-12-01

The thermal stability of amorphous InGaZnO thin film transistors (a-IGZO TFTs) with various ambient gases was investigated. The a-IGZO TFTs in air were more thermally stable than the devices in the ambient argon. Oxygen, rather than nitrogen and moisture, was responsible for this improvement. Furthermore, the thermal stability of the a-IGZO TFTs improved with the increasing oxygen content in the surrounding atmosphere. The related physical mechanism was examined, indicating that the higher ambient oxygen content induced more combinations of the oxygen vacancies and adsorbed oxygen ions in the a-IGZO, which resulted in the larger defect formation energy. This larger defect formation energy led to the smaller variation in the threshold voltage for the corresponding TFT devices.

On the integration of ultrananocrystalline diamond (UNCD) with CMOS chip

DOE Office of Scientific and Technical Information (OSTI.GOV)

Mi, Hongyi; Yuan, Hao -Chih; Seo, Jung -Hun

A low temperature deposition of high quality ultrananocrystalline diamond (UNCD) film onto a finished Si-based CMOS chip was performed to investigate the compatibility of the UNCD deposition process with CMOS devices for monolithic integration of MEMS on Si CMOS platform. DC and radio-frequency performances of the individual PMOS and NMOS devices on the CMOS chip before and after the UNCD deposition were characterized. Electrical characteristics of CMOS after deposition of the UNCD film remained within the acceptable ranges, namely showing small variations in threshold voltage V th, transconductance g m, cut-off frequency f T and maximum oscillation frequency f max.more » Finally, the results suggest that low temperature UNCD deposition is compatible with CMOS to realize monolithically integrated CMOS-driven MEMS/NEMS based on UNCD.« less

A study on the temperature dependence of the threshold switching characteristics of Ge2Sb2Te5

NASA Astrophysics Data System (ADS)

Lee, Suyoun; Jeong, Doo Seok; Jeong, Jeung-hyun; Zhe, Wu; Park, Young-Wook; Ahn, Hyung-Woo; Cheong, Byung-ki

2010-01-01

We investigated the temperature dependence of the threshold switching characteristics of a memory-type chalcogenide material, Ge2Sb2Te5. We found that the threshold voltage (Vth) decreased linearly with temperature, implying the existence of a critical conductivity of Ge2Sb2Te5 for its threshold switching. In addition, we investigated the effect of bias voltage and temperature on the delay time (tdel) of the threshold switching of Ge2Sb2Te5 and described the measured relationship by an analytic expression which we derived based on a physical model where thermally activated hopping is a dominant transport mechanism in the material.

SDVSRM - a new SSRM based technique featuring dynamically adjusted, scanner synchronized sample voltages for measurement of actively operated devices.

PubMed

Doering, Stefan; Wachowiak, Andre; Roetz, Hagen; Eckl, Stefan; Mikolajick, Thomas

2018-06-01

Scanning spreading resistance microscopy (SSRM) with its high spatial resolution and high dynamic signal range is a powerful tool for two-dimensional characterization of semiconductor dopant areas. However, the application of the method is limited to devices in equilibrium condition, as the investigation of actively operated devices would imply potential differences within the device, whereas SSRM relies on a constant voltage difference between sample surface and probe tip. Furthermore, the standard preparation includes short circuiting of all device components, limiting applications to devices in equilibrium condition. In this work scanning dynamic voltage spreading resistance microscopy (SDVSRM), a new SSRM based two pass atomic force microscopy (AFM) technique is introduced, overcoming these limitations. Instead of short circuiting the samples during preparation, wire bond devices are used allowing for active control of the individual device components. SDVSRM consists of two passes. In the first pass the local sample surface voltage dependent on the dc biases applied to the components of the actively driven device is measured as in scanning voltage microscopy (SVM). The local spreading resistance is measured within the second pass, in which the afore obtained local surface voltage is used to dynamically adjust the terminal voltages of the device under test. This is done in a way that the local potential difference across the nano-electrical contact matches the software set SSRM measurement voltage, and at the same time, the internal voltage differences within the device under test are maintained. In this work the proof of the concept could be demonstrated by obtaining spreading resistance data of an actively driven photodiode test device. SDVSRM adds a higher level of flexibility in general to SSRM, as occurring differences in cross section surface voltage are taken into account. These differences are immanent for actively driven devices, but can also be present at standard, short circuited samples. Therefore, SDVSRM could improve the characterization under equilibrium conditions as well. Copyright © 2018. Published by Elsevier B.V.

Spin switches for compact implementation of neuron and synapse

NASA Astrophysics Data System (ADS)

Quang Diep, Vinh; Sutton, Brian; Behin-Aein, Behtash; Datta, Supriyo

2014-06-01

Nanomagnets driven by spin currents provide a natural implementation for a neuron and a synapse: currents allow convenient summation of multiple inputs, while the magnet provides the threshold function. The objective of this paper is to explore the possibility of a hardware neural network implementation using a spin switch (SS) as its basic building block. SS is a recently proposed device based on established technology with a transistor-like gain and input-output isolation. This allows neural networks to be constructed with purely passive interconnections without intervening clocks or amplifiers. The weights for the neural network are conveniently adjusted through analog voltages that can be stored in a non-volatile manner in an underlying CMOS layer using a floating gate low dropout voltage regulator. The operation of a multi-layer SS neural network designed for character recognition is demonstrated using a standard simulation model based on coupled Landau-Lifshitz-Gilbert equations, one for each magnet in the network.

Discovery of a photoresponse amplification mechanism in compensated PN junctions

NASA Astrophysics Data System (ADS)

Zhou, Yuchun; Liu, Yu-Hsin; Rahman, Samia N.; Hall, David; Sham, L. J.; Lo, Yu-Hwa

2015-01-01

We report the experimental evidence of uncovering a photoresponse amplification mechanism in heavily doped, partially compensated silicon p-n junctions under very low bias voltage. We show that the observed photocurrent gain occurs at a bias that is more than an order of magnitude below the threshold voltage for conventional impact ionization. Moreover, contrary to the case of avalanche detectors and p-i-n diodes, the amplified photoresponse is enhanced rather than suppressed with increasing temperature. These distinctive characteristics lead us to hypothesize that the inelastic scattering between energetic electrons (holes) and the ionized impurities in the depletion and charge neutral regions of the p-n junction in a cyclic manner plays a significant role in the amplification process. Such an internal signal amplification mechanism, which occurs at much lower bias than impact ionization and favors room temperature over cryogenic temperature, makes it promising for practical device applications.

Intelligent control for PMSM based on online PSO considering parameters change

NASA Astrophysics Data System (ADS)

Song, Zhengqiang; Yang, Huiling

2018-03-01

A novel online particle swarm optimization method is proposed to design speed and current controllers of vector controlled interior permanent magnet synchronous motor drives considering stator resistance variation. In the proposed drive system, the space vector modulation technique is employed to generate the switching signals for a two-level voltage-source inverter. The nonlinearity of the inverter is also taken into account due to the dead-time, threshold and voltage drop of the switching devices in order to simulate the system in the practical condition. Speed and PI current controller gains are optimized with PSO online, and the fitness function is changed according to the system dynamic and steady states. The proposed optimization algorithm is compared with conventional PI control method in the condition of step speed change and stator resistance variation, showing that the proposed online optimization method has better robustness and dynamic characteristics compared with conventional PI controller design.

Nanothermometer Based on Resonant Tunneling Diodes: From Cryogenic to Room Temperatures.

PubMed

Pfenning, Andreas; Hartmann, Fabian; Rebello Sousa Dias, Mariama; Castelano, Leonardo Kleber; Süßmeier, Christoph; Langer, Fabian; Höfling, Sven; Kamp, Martin; Marques, Gilmar Eugenio; Worschech, Lukas; Lopez-Richard, Victor

2015-06-23

Sensor miniaturization together with broadening temperature sensing range are fundamental challenges in nanothermometry. By exploiting a large temperature-dependent screening effect observed in a resonant tunneling diode in sequence with a GaInNAs/GaAs quantum well, we present a low dimensional, wide range, and high sensitive nanothermometer. This sensor shows a large threshold voltage shift of the bistable switching of more than 4.5 V for a temperature raise from 4.5 to 295 K, with a linear voltage-temperature response of 19.2 mV K(-1), and a temperature uncertainty in the millikelvin (mK) range. Also, when we monitor the electroluminescence emission spectrum, an optical read-out control of the thermometer is provided. The combination of electrical and optical read-outs together with the sensor architecture excel the device as a thermometer with the capability of noninvasive temperature sensing, high local resolution, and sensitivity.

Discovery of a photoresponse amplification mechanism in compensated PN junctions

DOE Office of Scientific and Technical Information (OSTI.GOV)

Zhou, Yuchun; Rahman, Samia N.; Hall, David

2015-01-19

We report the experimental evidence of uncovering a photoresponse amplification mechanism in heavily doped, partially compensated silicon p-n junctions under very low bias voltage. We show that the observed photocurrent gain occurs at a bias that is more than an order of magnitude below the threshold voltage for conventional impact ionization. Moreover, contrary to the case of avalanche detectors and p-i-n diodes, the amplified photoresponse is enhanced rather than suppressed with increasing temperature. These distinctive characteristics lead us to hypothesize that the inelastic scattering between energetic electrons (holes) and the ionized impurities in the depletion and charge neutral regions ofmore » the p-n junction in a cyclic manner plays a significant role in the amplification process. Such an internal signal amplification mechanism, which occurs at much lower bias than impact ionization and favors room temperature over cryogenic temperature, makes it promising for practical device applications.« less

On the current drive capability of low dimensional semiconductors: 1D versus 2D

DOE PAGES

Zhu, Y.; Appenzeller, J.

2015-10-29

Low-dimensional electronic systems are at the heart of many scaling approaches currently pursuit for electronic applications. Here, we present a comparative study between an array of one-dimensional (1D) channels and its two-dimensional (2D) counterpart in terms of current drive capability. Lastly, our findings from analytical expressions derived in this article reveal that under certain conditions an array of 1D channels can outperform a 2D field-effect transistor because of the added degree of freedom to adjust the threshold voltage in an array of 1D devices.

A normally-off fully AlGaN HEMT with high breakdown voltage and figure of merit for power switch applications

NASA Astrophysics Data System (ADS)

Ebrahimi, Behzad; Asad, Mohsen

2015-07-01

In this paper, we propose a fully AlGaN high electron mobility (HEMT) in which the gate electrode, the barrier and the channel are all AlGaN. The p-type AlGaN gate facilitates the normally-off operation to be compatible with the state-of-the-art power amplifiers. In addition, the AlGaN channel increases the breakdown voltage (VBR) to 598 V due to the higher breakdown field of AlGaN compared to GaN. To assess the efficiency of the proposed structure, its characteristics are compared with the conventional and recently proposed structures. The two-dimensional device simulation results show that the proposed structure has the highest threshold voltage (Vth) and the VBR with the moderately low ON-resistance (RON). These features lead to the highest figure of merit (2.49 × 1012) among the structures which is 83%, 59%, 47% and 49% more than those of the conventional, with a field plate, AlGaN gate and AlGaN channel structures, respectively.

Sonochemical Synthesis of a Zinc Oxide Core-Shell Nanorod Radial p-n Homojunction Ultraviolet Photodetector.

PubMed

Vabbina, Phani Kiran; Sinha, Raju; Ahmadivand, Arash; Karabiyik, Mustafa; Gerislioglu, Burak; Awadallah, Osama; Pala, Nezih

2017-06-14

We report for the first time on the growth of a homogeneous radial p-n junction in the ZnO core-shell configuration with a p-doped ZnO nanoshell structure grown around a high-quality unintentionally n-doped ZnO nanorod using sonochemistry. The simultaneous decomposition of phosphorous (P), zinc (Zn), and oxygen (O) from their respective precursors during sonication allows for the successful incorporation of P atoms into the ZnO lattice. The as-formed p-n junction shows a rectifying current-voltage characteristic that is consistent with a p-n junction with a threshold voltage of 1.3 V and an ideality factor of 33. The concentration of doping was estimated to be N A = 6.7 × 10 17 cm -3 on the p side from the capacitance-voltage measurements. The fabricated radial p-n junction demonstrated a record optical responsivity of 9.64 A/W and a noise equivalent power of 0.573 pW/√Hz under ultraviolet illumination, which is the highest for ZnO p-n junction devices.

Improvements in the bias illumination stability of amorphous InGaZnO thin-film transistors by using thermal treatments

NASA Astrophysics Data System (ADS)

Kim, Woo-Byung; Lee, Dong Keun; Ryu, Sang Ouk

2014-07-01

The a-IGZO deposited by using the rf sputtering method features a conductive or an insulator characteristic based on amount of oxygen. We demonstrated that a post-treatment affects the resistance patterns of particular-sized InGaZnO(IGZO) thin films in a-IGZO thin-film transistors (TFTs). Post-annealing shifted the driving voltage of a-IGZO TFT to positive or negative values, depending on the annealing temperatures. Post-annealing may introduce oxygen vacancies or desorbed oxygen in the IGZO thin film. The changed driving voltage of IGZO TFTs coincides with the shift of the resistance pattern of IGZO. The fabricated a-IGZO TFTs exhibited a field effect mobility of 6.2 cm2/Vs, an excellent subthreshold gate swing of 0.32 V/decade, and a high I on/off ratio of > 109. Under positive bias illumination stress (PBIS) and negative bias illumination stress (NBIS), after 3,600 seconds, the device threshold voltage shifted about 0.2 V and 0.3 V, respectively.

Ion funnel device

DOE Office of Scientific and Technical Information (OSTI.GOV)

Ibrahim, Yehia M.; Chen, Tsung-Chi; Harrer, Marques B.

2017-11-21

An ion funnel device is disclosed. A first pair of electrodes is positioned in a first direction. A second pair of electrodes is positioned in a second direction. The device includes an RF voltage source and a DC voltage source. A RF voltage with a superimposed DC voltage gradient is applied to the first pair of electrodes, and a DC voltage gradient is applied to the second pair of electrodes.

Non-equilibrium Green's functions study of discrete dopants variability on an ultra-scaled FinFET

DOE Office of Scientific and Technical Information (OSTI.GOV)

Valin, R., E-mail: r.valinferreiro@swansea.ac.uk; Martinez, A., E-mail: a.e.Martinez@swansea.ac.uk; Barker, J. R., E-mail: john.barker@glasgow.ac.uk

In this paper, we study the effect of random discrete dopants on the performance of a 6.6 nm channel length silicon FinFET. The discrete dopants have been distributed randomly in the source/drain region of the device. Due to the small dimensions of the FinFET, a quantum transport formalism based on the non-equilibrium Green's functions has been deployed. The transfer characteristics for several devices that differ in location and number of dopants have been calculated. Our results demonstrate that discrete dopants modify the effective channel length and the height of the source/drain barrier, consequently changing the channel control of the charge. Thismore » effect becomes more significant at high drain bias. As a consequence, there is a strong effect on the variability of the on-current, off-current, sub-threshold slope, and threshold voltage. Finally, we have also calculated the mean and standard deviation of these parameters to quantify their variability. The obtained results show that the variability at high drain bias is 1.75 larger than at low drain bias. However, the variability of the on-current, off-current, and sub-threshold slope remains independent of the drain bias. In addition, we have found that a large source to drain current by tunnelling current occurs at low gate bias.« less

Variable-Threshold Threshold Elements,

DTIC Science & Technology

A threshold element is a mathematical model of certain types of logic gates and of a biological neuron. Much work has been done on the subject of... threshold elements with fixed thresholds; this study concerns itself with elements in which the threshold may be varied, variable- threshold threshold ...elements. Physical realizations include resistor-transistor elements, in which the threshold is simply a voltage. Variation of the threshold causes the

Body Doping Profile of Select Device to Minimize Program Disturbance in Three-Dimensional Stack NAND Flash Memory

NASA Astrophysics Data System (ADS)

Choe, Byeong-In; Park, Byung-Gook; Lee, Jong-Ho

2013-06-01

The program disturbance characteristic in the three-dimensional (3D) stack NAND flash was analyzed for the first time in terms of string select line (SSL) threshold voltage (Vth) and p-type body doping profile. From the edge word line (W/L) program disturbance, we can observe the boosted channel potential loss as a function of SSL Vth and body doping profile for SSL device. According to simulation work, a high Vth of the SSL device is required to suppress channel leakage during programming. When the body doping of the SSL device is high in the channel, there is a large band bending near the gate edge of the SSL adjacent to the edge W/L cell of boosted cell strings, which generates significantly electron-hole pairs. The generated electrons decreases the boosted channel potential, resulting in increase of program disturbance of the inhibit strings. Through optimization of the body doping profile of the SSL device, both channel leakage and the program disturbance are successfully suppressed for a highly reliable 3D stack NAND flash memory cell operation.

The influence of interfacial defects on fast charge trapping in nanocrystalline oxide-semiconductor thin film transistors

NASA Astrophysics Data System (ADS)

Kim, Taeho; Hur, Jihyun; Jeon, Sanghun

2016-05-01

Defects in oxide semiconductors not only influence the initial device performance but also affect device reliability. The front channel is the major carrier transport region during the transistor turn-on stage, therefore an understanding of defects located in the vicinity of the interface is very important. In this study, we investigated the dynamics of charge transport in a nanocrystalline hafnium-indium-zinc-oxide thin-film transistor (TFT) by short pulse I-V, transient current and 1/f noise measurement methods. We found that the fast charging behavior of the tested device stems from defects located in both the front channel and the interface, following a multi-trapping mechanism. We found that a silicon-nitride stacked hafnium-indium-zinc-oxide TFT is vulnerable to interfacial charge trapping compared with silicon-oxide counterpart, causing significant mobility degradation and threshold voltage instability. The 1/f noise measurement data indicate that the carrier transport in a silicon-nitride stacked TFT device is governed by trapping/de-trapping processes via defects in the interface, while the silicon-oxide device follows the mobility fluctuation model.

Enabling Energy Efficiency and Polarity Control in Germanium Nanowire Transistors by Individually Gated Nanojunctions.

PubMed

Trommer, Jens; Heinzig, André; Mühle, Uwe; Löffler, Markus; Winzer, Annett; Jordan, Paul M; Beister, Jürgen; Baldauf, Tim; Geidel, Marion; Adolphi, Barbara; Zschech, Ehrenfried; Mikolajick, Thomas; Weber, Walter M

2017-02-28

Germanium is a promising material for future very large scale integration transistors, due to its superior hole mobility. However, germanium-based devices typically suffer from high reverse junction leakage due to the low band-gap energy of 0.66 eV and therefore are characterized by high static power dissipation. In this paper, we experimentally demonstrate a solution to suppress the off-state leakage in germanium nanowire Schottky barrier transistors. Thereto, a device layout with two independent gates is used to induce an additional energy barrier to the channel that blocks the undesired carrier type. In addition, the polarity of the same doping-free device can be dynamically switched between p- and n-type. The shown germanium nanowire approach is able to outperform previous polarity-controllable device concepts on other material systems in terms of threshold voltages and normalized on-currents. The dielectric and Schottky barrier interface properties of the device are analyzed in detail. Finite-element drift-diffusion simulations reveal that both leakage current suppression and polarity control can also be achieved at highly scaled geometries, providing solutions for future energy-efficient systems.

Lightning Pin Injection Testing on MOSFETS

NASA Technical Reports Server (NTRS)

Ely, Jay J.; Nguyen, Truong X.; Szatkowski, George N.; Koppen, Sandra V.; Mielnik, John J.; Vaughan, Roger K.; Wysocki, Philip F.; Celaya, Jose R.; Saha, Sankalita

2009-01-01

Lightning transients were pin-injected into metal-oxide-semiconductor field-effect transistors (MOSFETs) to induce fault modes. This report documents the test process and results, and provides a basis for subsequent lightning tests. MOSFETs may be present in DC-DC power supplies and electromechanical actuator circuits that may be used on board aircraft. Results show that unprotected MOSFET Gates are susceptible to failure, even when installed in systems in well-shielded and partial-shielded locations. MOSFET Drains and Sources are significantly less susceptible. Device impedance decreased (current increased) after every failure. Such a failure mode may lead to cascading failures, as the damaged MOSFET may allow excessive current to flow through other circuitry. Preliminary assessments on a MOSFET subjected to 20-stroke pin-injection testing demonstrate that Breakdown Voltage, Leakage Current and Threshold Voltage characteristics show damage, while the device continues to meet manufacturer performance specifications. The purpose of this research is to develop validated tools, technologies, and techniques for automated detection, diagnosis and prognosis that enable mitigation of adverse events during flight, such as from lightning transients; and to understand the interplay between lightning-induced surges and aging (i.e. humidity, vibration thermal stress, etc.) on component degradation.

Reduced graphene Oxide/ZnO nanostructures based rectifier diode

NASA Astrophysics Data System (ADS)

Bhatnagar, Sameeksha; Kumar, Ravi; Sharma, Monika; Kuanr, Bijoy K.

2017-05-01

We report on the fabrication and characterization of graphene oxide and reduced graphene oxide/ZnO nanostructures on ITO-coated glass substrates for the rectification properties of a heterojunction device. The composites of GO/ZnO and rGO/ZnO were synthesized by the modified Hummers method followed by annealing process in N2 and H2 ambient atmosphere at various temperatures. The structural and compositional analysis of the composite material have been investigated using X-ray diffraction spectroscopy and Raman spectroscopy. The optical properties of the composite films were studied by UV-visible spectroscopy and the band-gap was obtained by Tauc's plot. The band-gap reduces to 2.4 eV for the composite film as compared to ZnO film 3.26 eV. The I-V characteristics of ZnO thin films and rGO/ZnO films were done for different light conditions viz dark, ambient light and UV-illumination. It has been observed that the threshold voltage decreases when the sample was placed in UV-illumination. A direct variation in photo-response is revealed with the bias voltage as well as UV illumination. The fabricated device could be used as an Ultraviolet Photo-detector.

Flip-flop logic circuit based on fully solution-processed organic thin film transistor devices with reduced variations in electrical performance

NASA Astrophysics Data System (ADS)

Takeda, Yasunori; Yoshimura, Yudai; Adib, Faiz Adi Ezarudin Bin; Kumaki, Daisuke; Fukuda, Kenjiro; Tokito, Shizuo

2015-04-01

Organic reset-set (RS) flip-flop logic circuits based on pseudo-CMOS inverters have been fabricated using full solution processing at a relatively low process temperatures of 150 °C or less. The work function for printed silver electrodes was increased from 4.7 to 5.4 eV through surface modification with a self-assembled monolayer (SAM) material. A bottom-gate, bottom-contact organic thin-film transistor (OTFT) device using a solution-processable small-molecular semiconductor material exhibited field-effect mobility of 0.40 cm2 V-1 s-1 in the saturation region and a threshold voltage (VTH) of -2.4 V in ambient air operation conditions. In order to reduce the variations in mobility and VTH, we designed a circuit with six transistors arranged in parallel, in order to average out their electrical characteristics. As a result, we have succeeded in reducing these variations without changing the absolute values of the mobility and VTH. The fabricated RS flip-flop circuits were functioned well and exhibited short delay times of 3.5 ms at a supply voltage of 20 V.

Light-Triggered Ternary Device and Inverter Based on Heterojunction of van der Waals Materials.

PubMed

Shim, Jaewoo; Jo, Seo-Hyeon; Kim, Minwoo; Song, Young Jae; Kim, Jeehwan; Park, Jin-Hong

2017-06-27

Multivalued logic (MVL) devices/circuits have received considerable attention because the binary logic used in current Si complementary metal-oxide-semiconductor (CMOS) technology cannot handle the predicted information throughputs and energy demands of the future. To realize MVL, the conventional transistor platform needs to be redesigned to have two or more distinctive threshold voltages (V TH s). Here, we report a finding: the photoinduced drain current in graphene/WSe 2 heterojunction transistors unusually decreases with increasing gate voltage under illumination, which we refer to as the light-induced negative differential transconductance (L-NDT) phenomenon. We also prove that such L-NDT phenomenon in specific bias ranges originates from a variable potential barrier at a graphene/WSe 2 junction due to a gate-controllable graphene electrode. This finding allows us to conceive graphene/WSe 2 -based MVL logic circuits by using the I D -V G characteristics with two distinctive V TH s. Based on this finding, we further demonstrate a light-triggered ternary inverter circuit with three stable logical states (ΔV out of each state <0.05 V). Our study offers the pathway to substantialize MVL systems.

Effects of plasma-induced charging damage on random telegraph noise in metal-oxide-semiconductor field-effect transistors with SiO2 and high-k gate dielectrics

NASA Astrophysics Data System (ADS)

Kamei, Masayuki; Takao, Yoshinori; Eriguchi, Koji; Ono, Kouichi

2014-01-01

We clarified in this study how plasma-induced charging damage (PCD) affects the so-called “random telegraph noise (RTN)” — a principal concern in designing ultimately scaled large-scale integrated circuits (LSIs). Metal-oxide-semiconductor field-effect transistors (MOSFETs) with SiO2 and high-k gate dielectric were exposed to an inductively coupled plasma (ICP) with Ar gas. Drain current vs gate voltage (Ids-Vg) characteristics were obtained before and after the ICP plasma exposure for the same device. Then, the time evolution of Ids fluctuation defined as Ids/μIds was measured, where μIds is the mean Ids. This value corresponds to an RTN feature, and RTN was obtained under various gate voltages (Vg) by a customized measurement technique. We focused on the statistical distribution width of (Ids/μIds), δ(Ids/μIds), in order to clarify the effects of PCD on RTN. δ(Ids/μIds) was increased by PCD for both MOSFETs with the SiO2 and high-k gate dielectrics, suggesting that RTN can be used as a measure of PCD, i.e., a distribution width increase directly indicates the presence of PCD. The dependence of δ(Ids/μIds) on the overdrive voltage Vg-Vth, where Vth is the threshold voltage, was investigated by the present technique. It was confirmed that δ(Ids/μIds) increased with a decrease in the overdrive voltage for MOSFETs with the SiO2 and high-k gate dielectrics. The presence of created carrier trap sites with PCD was characterized by the time constants for carrier capture and emission. The threshold voltage shift (ΔVth) induced by PCD was also evaluated and compared with the RTN change, to correlate the RTN increase with ΔVth induced by PCD. Although the estimated time constants exhibited complex behaviors due to the nature of trap sites created by PCD, δ(Ids/μIds) showed a straightforward tendency in accordance with the amount of PCD. These findings provide an in-depth understanding of plasma-induced RTN characteristic changes in future MOSFETs.

Molecular sensing using monolayer floating gate, fully depleted SOI MOSFET acting as an exponential transducer.

PubMed

Takulapalli, Bharath R

2010-02-23

Field-effect transistor-based chemical sensors fall into two broad categories based on the principle of signal transduction-chemiresistor or Schottky-type devices and MOSFET or inversion-type devices. In this paper, we report a new inversion-type device concept-fully depleted exponentially coupled (FDEC) sensor, using molecular monolayer floating gate fully depleted silicon on insulator (SOI) MOSFET. Molecular binding at the chemical-sensitive surface lowers the threshold voltage of the device inversion channel due to a unique capacitive charge-coupling mechanism involving interface defect states, causing an exponential increase in the inversion channel current. This response of the device is in opposite direction when compared to typical MOSFET-type sensors, wherein inversion current decreases in a conventional n-channel sensor device upon addition of negative charge to the chemical-sensitive device surface. The new sensor architecture enables ultrahigh sensitivity along with extraordinary selectivity. We propose the new sensor concept with the aid of analytical equations and present results from our experiments in liquid phase and gas phase to demonstrate the new principle of signal transduction. We present data from numerical simulations to further support our theory.

Ambient condition bias stress stability of vanadium (IV) oxide phthalocyanine based p-channel organic field-effect transistors

NASA Astrophysics Data System (ADS)

Obaidulla, Sk Md; Singh, Subhash; Mohapatra, Y. N.; Giri, P. K.

2018-01-01

High bias-stress stability and low threshold voltage (V th) shift under ambient conditions are highly desirable for practical applications of organic field-effect transistors (OFETs). We demonstrate here a 20-fold enhancement in the bias-stress stability for hexamethyledisilazane (HMDS) treated vanadium (IV) oxide phthalocyanine (VOPc) based OFETs as compared to the bare VOPc case under ambient conditions. VOPc based OFETs were fabricated on bare (non treated) SiO2 and a HMDS monolayer passivated SiO2 layer, with an operating voltage of 40 V. The devices with top contact gold (Au) electrodes exhibit excellent p-channel behavior with a moderate hole mobility for the HMDS-treated device. It is demonstrated that the time dependent ON-current decay and V th shift can be effectively controlled by using self-assembled monolayers of HMDS on the VOPc layer. For the HMDS-treated case, the bias stress stability study shows the stretched exponential decay of drain current by only ~15% during the long-term operation with constant bias voltage under ambient conditions, while it shows a large decay of  >70% for the nontreated devices operated for 1000 s. The corresponding characteric decay time constant (τ) is 104 s for the HMDS treated case, while that of the the non-treated SiO2 case is only ~480 s under ambient conditions. The inferior performance of the device with bare SiO2 is traced to the charge trapping at the voids in the inter-grain region of the films, while it is almost negligible for the HMDS-treated case, as confirmed from the AFM and XRD analyses. It is believed that HMDS treatment provides an excellent interface with a low density of traps and passivates the dangling bonds, which improve the charge transport characteristics. Also, the surface morphology of the VOPc film clearly influences the device performance. Thus, the HMDS treatment provides a very attractive approach for attaining long-term air stability and a low V th shift for the VOPc based OFET devices.

Characterizing Radio Emission From Extensive Air Showers with the SLAC-T510 Experiment, with Applications to ANITA

NASA Astrophysics Data System (ADS)

McGuire, Felicia Ann

Essential to metal-oxide-semiconductor field-effect transistor (MOSFET) scaling is the reduction of the supply voltage to mitigate the power consumption and corresponding heat dissipation. Conventional dielectric materials are subject to the thermal limit imposed by the Boltzmann factor in the subthreshold swing, which places an absolute minimum on the supply voltage required to modulate the current. Furthermore, as technology approaches the 5 nm node, electrostatic control of a silicon channel becomes exceedingly difficult, regardless of the gating technique. This notion of "the end of silicon scaling" has rapidly increased research into more scalable channel materials as well as new methods of transistor operation. Among the many promising options are two-dimensional (2D) FETs and negative capacitance (NC) FETs. 2D-FETs make use of atomically thin semiconducting channels that have enabled demonstrated scalability beyond what silicon can offer. NC-FETs demonstrate an effective negative capacitance arising from the integration of a ferroelectric into the transistor gate stack, allowing sub-60 mV/dec switching. While both of these devices provide significant advantages, neither can accomplish the ultimate goal of a FET that is both low-voltage and scalable. However, an appropriate fusion of the 2D-FET and NC-FET into a 2D NC-FET has the potential of enabling a steep-switching device that is dimensionally scalable beyond the 5 nm technology node. In this work, the motivation for and operation of 2D NC-FETs is presented. Experimental realization of 2D NC-FETs using 2D transition metal dichalcogenide molybdenum disulfide (MoS2) as the channel is shown with two different ferroelectric materials: 1) a solution-processed, polymeric poly(vinylidene difluoride trifluoroethylene) ferroelectric and 2) an atomic layer deposition (ALD) grown hafnium zirconium oxide (HfZrO2) ferroelectric. Each ferroelectric was integrated into the gate stack of a 2D-FET having either a top-gate (polymeric ferroelectric) or bottom-gate (HfZrO2 ferroelectric) configuration. HfZrO 2 devices with metallic interfacial layers (between ferroelectric and dielectric) and thinner ferroelectric layers were found to reduce both the hysteresis and the threshold voltage. Detailed characterization of the devices was performed and, most significantly, the 2D NC-FETs with HfZrO2 reproducibly yielded subthreshold swings well below the thermal limit with over more than four orders of magnitude in drain current modulation. HfZrO 2 devices without metallic interfacial layers were utilized to explore the impact of ferroelectric thickness, dielectric thickness, and dielectric composition on device performance. The impact of an interfacial metallic layer on the device operation was investigated in devices with HfZrO2 and shown to be crucial at enabling sub-60 mV/dec switching and large internal voltage gains. The significance of dielectric material choice on device performance was explored and found to be a critical factor in 2D NC-FET transistor operation. These successful results pave the way for future integration of this new device structure into existing technology markets.

Automatic voltage imbalance detector

DOEpatents

Bobbett, Ronald E.; McCormick, J. Byron; Kerwin, William J.

1984-01-01

A device for indicating and preventing damage to voltage cells such as galvanic cells and fuel cells connected in series by detecting sequential voltages and comparing these voltages to adjacent voltage cells. The device is implemented by using operational amplifiers and switching circuitry is provided by transistors. The device can be utilized in battery powered electric vehicles to prevent galvanic cell damage and also in series connected fuel cells to prevent fuel cell damage.

QRS peak detection for heart rate monitoring on Android smartphone

NASA Astrophysics Data System (ADS)

Pambudi Utomo, Trio; Nuryani, Nuryani; Darmanto

2017-11-01

In this study, Android smartphone is used for heart rate monitoring and displaying electrocardiogram (ECG) graph. Heart rate determination is based on QRS peak detection. Two methods are studied to detect the QRS complex peak; they are Peak Threshold and Peak Filter. The acquisition of ECG data is utilized by AD8232 module from Analog Devices, three electrodes, and Microcontroller Arduino UNO R3. To record the ECG data from a patient, three electrodes are attached to particular body’s surface of a patient. Patient’s heart activity which is recorded by AD8232 module is decoded by Arduino UNO R3 into analog data. Then, the analog data is converted into a voltage value (mV) and is processed to get the QRS complex peak. Heart rate value is calculated by Microcontroller Arduino UNO R3 uses the QRS complex peak. Voltage, heart rate, and the QRS complex peak are sent to Android smartphone by Bluetooth HC-05. ECG data is displayed as the graph by Android smartphone. To evaluate the performance of QRS complex peak detection method, three parameters are used; they are positive predictive, accuracy and sensitivity. Positive predictive, accuracy, and sensitivity of Peak Threshold method is 92.39%, 70.30%, 74.62% and for Peak Filter method are 98.38%, 82.47%, 83.61%, respectively.

Novel method for hit-position reconstruction using voltage signals in plastic scintillators and its application to Positron Emission Tomography

NASA Astrophysics Data System (ADS)

Raczyński, L.; Moskal, P.; Kowalski, P.; Wiślicki, W.; Bednarski, T.; Białas, P.; Czerwiński, E.; Kapłon, Ł.; Kochanowski, A.; Korcyl, G.; Kowal, J.; Kozik, T.; Krzemień, W.; Kubicz, E.; Molenda, M.; Moskal, I.; Niedźwiecki, Sz.; Pałka, M.; Pawlik-Niedźwiecka, M.; Rudy, Z.; Salabura, P.; Sharma, N. G.; Silarski, M.; Słomski, A.; Smyrski, J.; Strzelecki, A.; Wieczorek, A.; Zieliński, M.; Zoń, N.

2014-11-01

Currently inorganic scintillator detectors are used in all commercial Time of Flight Positron Emission Tomograph (TOF-PET) devices. The J-PET collaboration investigates a possibility of construction of a PET scanner from plastic scintillators which would allow for single bed imaging of the whole human body. This paper describes a novel method of hit-position reconstruction based on sampled signals and an example of an application of the method for a single module with a 30 cm long plastic strip, read out on both ends by Hamamatsu R4998 photomultipliers. The sampling scheme to generate a vector with samples of a PET event waveform with respect to four user-defined amplitudes is introduced. The experimental setup provides irradiation of a chosen position in the plastic scintillator strip with an annihilation gamma quanta of energy 511 keV. The statistical test for a multivariate normal (MVN) distribution of measured vectors at a given position is developed, and it is shown that signals sampled at four thresholds in a voltage domain are approximately normally distributed variables. With the presented method of a vector analysis made out of waveform samples acquired with four thresholds, we obtain a spatial resolution of about 1 cm and a timing resolution of about 80 ps (σ).

Physics of Gate Modulated Resonant Tunneling (RT)-FETs: Multi-barrier MOSFET for steep slope and high on-current

NASA Astrophysics Data System (ADS)

Afzalian, Aryan; Colinge, Jean-Pierre; Flandre, Denis

2011-05-01

A new concept of nanoscale MOSFET, the Gate Modulated Resonant Tunneling Transistor (RT-FET), is presented and modeled using 3D Non-Equilibrium Green's Function simulations enlightening the main physical mechanisms. Owing to the additional tunnel barriers and the related longitudinal confinement present in the device, the density of state is reduced in its off-state, while remaining comparable in its on-state, to that of a MOS transistor without barriers. The RT-FET thus features both a lower RT-limited off-current and a faster increase of the current with V G, i.e. an improved slope characteristic, and hence an improved Ion/ Ioff ratio. Such improvement of the slope can happen in subthreshold regime, and therefore lead to subthreshold slope below the kT/q limit. In addition, faster increase of current and improved slope occur above threshold and lead to high thermionic on-current and significant Ion/ Ioff ratio improvement, even with threshold voltage below 0.2 V and supply voltage V dd of a few hundreds of mV as critically needed for future technology nodes. Finally RT-FETs are intrinsically immune to source-drain tunneling and are therefore promising candidate for extending the roadmap below 10 nm.

Schottky barrier diode based on β-Ga2O3 (100) single crystal substrate and its temperature-dependent electrical characteristics

NASA Astrophysics Data System (ADS)

He, Qiming; Mu, Wenxiang; Dong, Hang; Long, Shibing; Jia, Zhitai; Lv, Hangbing; Liu, Qi; Tang, Minghua; Tao, Xutang; Liu, Ming

2017-02-01

The Pt/β-Ga2O3 Schottky barrier diode and its temperature-dependent current-voltage characteristics were investigated for power device application. The edge-defined film-fed growth (EFG) technique was utilized to grow the (100)-oriented β-Ga2O3 single crystal substrate that shows good crystal quality characterized by X-ray diffraction and high resolution transmission electron microscope. Ohmic and Schottky electrodes were fabricated by depositing Ti and Pt metals on the two surfaces, respectively. Through the current-voltage (I-V) measurement under different temperature and the thermionic emission modeling, the fabricated Pt/β-Ga2O3 Schottky diode was found to show good performances at room temperature, including rectification ratio of 1010, ideality factor (n) of 1.1, Schottky barrier height (ΦB) of 1.39 eV, threshold voltage (Vbi) of 1.07 V, ON-resistance (RON) of 12.5 mΩ.cm2, forward current density at 2 V (J@2V) of 56 A/cm2, and saturation current density (J0) of 2 × 10-16 A/cm2. The effective donor concentration Nd - Na was calculated to be about 2.3 × 1014 cm3. Good temperature dependent performance was also found in the device. The Schottky barrier height was estimated to be about 1.3 eV-1.39 eV at temperatures ranging from room temperature to 150 °C. With increasing temperature, parameters such as RON and J@2V become better, proving that the diode can work well at high temperature. The EFG grown β-Ga2O3 single crystal is a promising material to be used in the power devices.

Competitive behavior of photons contributing to junction voltage jump in narrow band-gap semiconductor multi-quantum-well laser diodes at lasing threshold

DOE Office of Scientific and Technical Information (OSTI.GOV)

Feng, Liefeng, E-mail: fengliefeng@tju.edu.cn, E-mail: lihongru@nankai.edu.cn; Yang, Xiufang; Wang, Cunda

2015-04-15

The junction behavior of different narrow band-gap multi-quantum-well (MQW) laser diodes (LDs) confirmed that the jump in the junction voltage in the threshold region is a general characteristic of narrow band-gap LDs. The relative change in the 1310 nm LD is the most obvious. To analyze this sudden voltage change, the threshold region is divided into three stages by I{sub th}{sup l} and I{sub th}{sup u}, as shown in Fig. 2; I{sub th}{sup l} is the conventional threshold, and as long as the current is higher than this threshold, lasing exists and the IdV/dI-I plot drops suddenly; I{sub th}{sup u}more » is the steady lasing point, at which the separation of the quasi-Fermi levels of electron and holes across the active region (V{sub j}) is suddenly pinned. Based on the evolutionary model of dissipative structure theory, the rate equations of the photons in a single-mode LD were deduced in detail at I{sub th}{sup l} and I{sub th}{sup u}. The results proved that the observed behavior of stimulated emission suddenly substituting for spontaneous emission, in a manner similar to biological evolution, must lead to a sudden increase in the injection carriers in the threshold region, which then causes the sudden increase in the junction voltage in this region.« less

Imposed Power of Breathing Associated With Use of an Impedance Threshold Device

DTIC Science & Technology

2007-02-01

threshold device and a sham impedance threshold device. DESIGN: Prospective randomized blinded protocol. SETTING: University medical center. PATIENTS...for males). METHODS: The volunteers completed 2 trials of breathing through a face mask fitted with an active impedance threshold device set to open...at -7cmH 2 O pressure, or with a sham impedance threshold device, which was identical to the active device except that it did not contain an

Relationship between left atrium catheter contact force and pacing threshold.

PubMed

Barrio-López, Teresa; Ortiz, Mercedes; Castellanos, Eduardo; Lázaro, Carla; Salas, Jefferson; Madero, Sergio; Almendral, Jesús

2017-08-01

The purpose of this study is to analyze the relationship between contact force (CF) and pacing threshold in left atrium (LA). Six to ten LA sites were studied in 28 consecutive patients with atrial fibrillation undergoing pulmonary vein isolation. Median CF, bipolar and unipolar electrogram voltage, impedance, and bipolar and unipolar thresholds for consistent constant capture and for consistent intermittent capture were measured at each site. Pacing threshold measurements were performed at 188 LA sites. Both unipolar and bipolar pacing thresholds correlated significantly with median CF; however, unipolar pacing threshold correlated better (unipolar: Pearson R -0.45; p < 0.001; Spearman Rho -0.62; p < 0.001, bipolar: Pearson R -0.39; p < 0.001; Spearman Rho -0.52; p < 0.001). Consistent constant capture threshold had better correlation with median CF than consistent intermittent capture threshold for both unipolar and bipolar pacing (Pearson R -0.45; p < 0.001 and Spearman Rho -0.62; p < 0.001 vs. Pearson R -0.35; p < 0.001; Spearman Rho -0.52; p < 0.001). The best pacing threshold cutoff point to detect a good CF (>10 g) was 3.25 mA for unipolar pacing with 69% specificity and 73% sensitivity. Both increased to 80% specificity and 74% sensitivity for sites with normal bipolar voltage and a pacing threshold cutoff value of 2.85 mA. Pacing thresholds correlate with CF in human not previously ablated LA. Since the combination of a normal bipolar voltage and a unipolar pacing threshold <2.85 mA provide reasonable parameters of validity, pacing threshold could be of interest as a surrogate for CF in LA.

Mode control in a high-gain relativistic klystron amplifier

NASA Astrophysics Data System (ADS)

Li, Zheng-Hong; Zhang, Hong; Ju, Bing-Quan; Su, Chang; Wu, Yang

2010-05-01

Middle cavities between the input and output cavity can be used to decrease the required input RF power for the relativistic klystron amplifier. Meanwhile higher modes, which affect the working mode, are also easy to excite in a device with more middle cavities. In order for the positive feedback process for higher modes to be excited, a special measure is taken to increase the threshold current for such modes. Higher modes' excitation will be avoided when the threshold current is significantly larger than the beam current. So a high-gain S-band relativistic klystron amplifier is designed for the beam of current 5 kA and beam voltage 600 kV. Particle in cell simulations show that the gain is 1.6 × 105 with the input RF power of 6.8 kW, and that the output RF power reaches 1.1 GW.

Fabrication and Characteristics of High Mobility InSnZnO Thin Film Transistors.

PubMed

Choi, Pyungho; Lee, Junki; Park, Hyoungsun; Baek, Dohyun; Lee, Jaehyeong; Yi, Junsin; Kim, Sangsoo; Choi, Byoungdeog

2016-05-01

In this paper, we describe the fabrication of thin film transistors (TFTs) with amorphous indium-tin-zinc-oxide (ITZO) as the active material. A transparent ITZO channel layer was formed under an optimized oxygen partial pressure (OPP (%) = O2/(Ar + O2)) and subsequent annealing process. The electrical properties exhibited by this device include field-effect mobility (μ(eff)), sub-threshold swing (SS), and on/off current ratio (I(ON/OFF)) values of 28.97 cm2/V x s, 0.2 V/decade, and 2.64 x 10(7), respectively. The average transmittance values for each OPP condition in the visible range were greater than 80%. The positive gate bias stress resulted in a positive threshold voltage (V(th)) shift in the transfer curves and degraded the parameters μ(eff) and SS. These phenomena originated from electron trapping from the ITZO channel layer into the oxide/ITZO interface trap sites.

Hybrid electric vehicle power management system

DOEpatents

Bissontz, Jay E.

2015-08-25

Level voltage levels/states of charge are maintained among a plurality of high voltage DC electrical storage devices/traction battery packs that are arrayed in series to support operation of a hybrid electric vehicle drive train. Each high voltage DC electrical storage device supports a high voltage power bus, to which at least one controllable load is connected, and at least a first lower voltage level electrical distribution system. The rate of power transfer from the high voltage DC electrical storage devices to the at least first lower voltage electrical distribution system is controlled by DC-DC converters.

SCB thermite igniter studies

DOE Office of Scientific and Technical Information (OSTI.GOV)

Bickes, R.W. Jr.; Wackerbarth, D.E.; Mohler, J.H.

1996-12-31

The authors report on recent studies comparing the ignition threshold of temperature cycled, SCB thermite devices with units that were not submitted to temperature cycling. Aluminum/copper-oxide thermite was pressed into units at two densities, 45% of theoretical maximum density (TMD) or 47% of TMD. Half of each of the density sets underwent three thermal cycles; each cycle consisted of 2 hours at 74 C and 2 hours at {minus}54 C, with a 5 minute maximum transfer time between temperatures. The temperature cycled units were brought to ambient temperature before the threshold testing. Both the density and the thermal cycling affectedmore » the all-fire voltage. Using a 5.34 {micro}F CDU (capacitor discharge unit) firing set, the all-fire voltage for the units that were not temperature cycled increased with density from 32.99 V (45% TMD) to 39.32 V (47% TMD). The all-fire voltages for the thermally cycled units were 34.42 V (45% TMD) and 58.1 V (47% TMD). They also report on no-fire levels at ambient temperature for two component designs; the 5 minute no-fire levels were greater than 1.2 A. Units were also subjected to tests in which 1 W of RF power was injected into the bridges at 10 MHz for 5 minutes. The units survived and fired normally afterwards. Finally, units were subjected to pin-to-pin electrostatic discharge (ESD) tests. None of the units fired upon application of the ESD pulse, and all of the tested units fired normally afterwards.« less

Threshold-voltage modulated phase change heterojunction for application of high density memory

DOE Office of Scientific and Technical Information (OSTI.GOV)

Yan, Baihan; Tong, Hao, E-mail: tonghao@hust.edu.cn; Qian, Hang

2015-09-28

Phase change random access memory is one of the most important candidates for the next generation non-volatile memory technology. However, the ability to reduce its memory size is compromised by the fundamental limitations inherent in the CMOS technology. While 0T1R configuration without any additional access transistor shows great advantages in improving the storage density, the leakage current and small operation window limit its application in large-scale arrays. In this work, phase change heterojunction based on GeTe and n-Si is fabricated to address those problems. The relationship between threshold voltage and doping concentration is investigated, and energy band diagrams and X-raymore » photoelectron spectroscopy measurements are provided to explain the results. The threshold voltage is modulated to provide a large operational window based on this relationship. The switching performance of the heterojunction is also tested, showing a good reverse characteristic, which could effectively decrease the leakage current. Furthermore, a reliable read-write-erase function is achieved during the tests. Phase change heterojunction is proposed for high-density memory, showing some notable advantages, such as modulated threshold voltage, large operational window, and low leakage current.« less

Extracellular voltage threshold settings can be tuned for optimal encoding of movement and stimulus parameters

NASA Astrophysics Data System (ADS)

Oby, Emily R.; Perel, Sagi; Sadtler, Patrick T.; Ruff, Douglas A.; Mischel, Jessica L.; Montez, David F.; Cohen, Marlene R.; Batista, Aaron P.; Chase, Steven M.

2016-06-01

Objective. A traditional goal of neural recording with extracellular electrodes is to isolate action potential waveforms of an individual neuron. Recently, in brain-computer interfaces (BCIs), it has been recognized that threshold crossing events of the voltage waveform also convey rich information. To date, the threshold for detecting threshold crossings has been selected to preserve single-neuron isolation. However, the optimal threshold for single-neuron identification is not necessarily the optimal threshold for information extraction. Here we introduce a procedure to determine the best threshold for extracting information from extracellular recordings. We apply this procedure in two distinct contexts: the encoding of kinematic parameters from neural activity in primary motor cortex (M1), and visual stimulus parameters from neural activity in primary visual cortex (V1). Approach. We record extracellularly from multi-electrode arrays implanted in M1 or V1 in monkeys. Then, we systematically sweep the voltage detection threshold and quantify the information conveyed by the corresponding threshold crossings. Main Results. The optimal threshold depends on the desired information. In M1, velocity is optimally encoded at higher thresholds than speed; in both cases the optimal thresholds are lower than are typically used in BCI applications. In V1, information about the orientation of a visual stimulus is optimally encoded at higher thresholds than is visual contrast. A conceptual model explains these results as a consequence of cortical topography. Significance. How neural signals are processed impacts the information that can be extracted from them. Both the type and quality of information contained in threshold crossings depend on the threshold setting. There is more information available in these signals than is typically extracted. Adjusting the detection threshold to the parameter of interest in a BCI context should improve our ability to decode motor intent, and thus enhance BCI control. Further, by sweeping the detection threshold, one can gain insights into the topographic organization of the nearby neural tissue.

Extracellular voltage threshold settings can be tuned for optimal encoding of movement and stimulus parameters

PubMed Central

Oby, Emily R; Perel, Sagi; Sadtler, Patrick T; Ruff, Douglas A; Mischel, Jessica L; Montez, David F; Cohen, Marlene R; Batista, Aaron P; Chase, Steven M

2018-01-01

Objective A traditional goal of neural recording with extracellular electrodes is to isolate action potential waveforms of an individual neuron. Recently, in brain–computer interfaces (BCIs), it has been recognized that threshold crossing events of the voltage waveform also convey rich information. To date, the threshold for detecting threshold crossings has been selected to preserve single-neuron isolation. However, the optimal threshold for single-neuron identification is not necessarily the optimal threshold for information extraction. Here we introduce a procedure to determine the best threshold for extracting information from extracellular recordings. We apply this procedure in two distinct contexts: the encoding of kinematic parameters from neural activity in primary motor cortex (M1), and visual stimulus parameters from neural activity in primary visual cortex (V1). Approach We record extracellularly from multi-electrode arrays implanted in M1 or V1 in monkeys. Then, we systematically sweep the voltage detection threshold and quantify the information conveyed by the corresponding threshold crossings. Main Results The optimal threshold depends on the desired information. In M1, velocity is optimally encoded at higher thresholds than speed; in both cases the optimal thresholds are lower than are typically used in BCI applications. In V1, information about the orientation of a visual stimulus is optimally encoded at higher thresholds than is visual contrast. A conceptual model explains these results as a consequence of cortical topography. Significance How neural signals are processed impacts the information that can be extracted from them. Both the type and quality of information contained in threshold crossings depend on the threshold setting. There is more information available in these signals than is typically extracted. Adjusting the detection threshold to the parameter of interest in a BCI context should improve our ability to decode motor intent, and thus enhance BCI control. Further, by sweeping the detection threshold, one can gain insights into the topographic organization of the nearby neural tissue. PMID:27097901

Extracellular voltage threshold settings can be tuned for optimal encoding of movement and stimulus parameters.

PubMed

Oby, Emily R; Perel, Sagi; Sadtler, Patrick T; Ruff, Douglas A; Mischel, Jessica L; Montez, David F; Cohen, Marlene R; Batista, Aaron P; Chase, Steven M

2016-06-01

A traditional goal of neural recording with extracellular electrodes is to isolate action potential waveforms of an individual neuron. Recently, in brain-computer interfaces (BCIs), it has been recognized that threshold crossing events of the voltage waveform also convey rich information. To date, the threshold for detecting threshold crossings has been selected to preserve single-neuron isolation. However, the optimal threshold for single-neuron identification is not necessarily the optimal threshold for information extraction. Here we introduce a procedure to determine the best threshold for extracting information from extracellular recordings. We apply this procedure in two distinct contexts: the encoding of kinematic parameters from neural activity in primary motor cortex (M1), and visual stimulus parameters from neural activity in primary visual cortex (V1). We record extracellularly from multi-electrode arrays implanted in M1 or V1 in monkeys. Then, we systematically sweep the voltage detection threshold and quantify the information conveyed by the corresponding threshold crossings. The optimal threshold depends on the desired information. In M1, velocity is optimally encoded at higher thresholds than speed; in both cases the optimal thresholds are lower than are typically used in BCI applications. In V1, information about the orientation of a visual stimulus is optimally encoded at higher thresholds than is visual contrast. A conceptual model explains these results as a consequence of cortical topography. How neural signals are processed impacts the information that can be extracted from them. Both the type and quality of information contained in threshold crossings depend on the threshold setting. There is more information available in these signals than is typically extracted. Adjusting the detection threshold to the parameter of interest in a BCI context should improve our ability to decode motor intent, and thus enhance BCI control. Further, by sweeping the detection threshold, one can gain insights into the topographic organization of the nearby neural tissue.

Miniaturized two-stack Blumlein pulser with a variable repetition-rate for non-thermal irreversible-electroporation experiments

NASA Astrophysics Data System (ADS)

Min, Sun-Hong; Kwon, Ohjoon; Sattorov, Matlabjon; Baek, In-Keun; Kim, Seontae; Jeong, Jin-Young; Hong, Dongpyo; Park, Seunghyuk; Park, Gun-Sik

2017-01-01

Non-thermal irreversible electroporation (NTIRE) to avoid thermal damage to cells during intense DC ns pulsed electric fields (nsPEFs) is a recent modality for medical applications. This mechanism, related to bioelectrical dynamics of the cell, is linked to the effect of a DC electric field and a threshold effect with an electrically stimulated membrane for the charge distribution in the cell. To create the NTIRE condition, the pulse width of the nsPEF should be shorter than the charging time constant of the membrane related to the cell radius, membrane capacitance, cytoplasm resistivity, and medium resistivity. It is necessary to design and fabricate a very intense nanosecond DC electric field pulser that is capable of producing voltages up to the level of 100 kV/cm with an artificial pulse width (˜ns) with controllable repetition rates. Many devices to generate intense DC nsPEF using various pulse-forming line technologies have been introduced thus far. However, the previous Blumlein pulse-generating devices are clearly inefficient due to the energy loss between the input voltage and the output voltage. An improved two-stage stacked Blumlein pulse-forming line can overcome this limitation and decrease the energy loss from a DC power supply. A metal oxide silicon field-effect transistor switch with a fast rise and fall time would enable a high repetition rate (max. 100 kHz) and good endurance against very high voltages (DC ˜ 30 kV). The load is designed to match the sample for exposure to cell suspensions consisting of a 200 Ω resistor matched with a Blumlein circuit and two electrodes without the characteristic RC time effect of the circuit (capacitance =0.174 pF).

Microstructure and electrical properties of Sb2Te phase-change material

NASA Astrophysics Data System (ADS)

Liu, Guangyu; Wu, Liangcai; Li, Tao; Rao, Feng; Song, Sannian; Liu, Bo; Song, Zhitang

2016-10-01

Phase Change Memory (PCM) has great potential for commercial applications of next generation non-volatile memory (NVM) due to its high operation speed, high endurance and low power consumption. Sb2Te (ST) is a common phase-change material and has fast crystallization speed, while thermal stability is relatively poor and its crystallization temperature is about 142°C. According to the Arrhenius law, the extrapolated failure temperature is about 55°C for ten years. When heated above the crystallization temperature while below the melting point, its structure can be transformed from amorphous phase to hexagonal phase. Due to the growth-dominated crystallization mechanism, the grain size of ST film is large and the diameter of about 300 nm is too large compared with Ge2Sb2Te5 (GST), which may deteriorate the device performance. High resolution transmission electron microscopy (HRTEM) and selected area electron diffraction (SAED) were employed to study the microstructures and the results indicate that the crystal plane is {110}. In addition, device cells were manufactured and their current-voltage (I-V) and resistance-voltage characteristics were tested, and the results reveal that the threshold voltage (Vth) of ST film is 0.87 V. By researching the basic properties of ST, we can understand its disadvantages and manage to improve its performance by doping or other proper methods. Finally, the improved ST can be a candidate for optical discs and PCM.

Polarization engineered enhancement mode GaN HEMT: Design and investigation

NASA Astrophysics Data System (ADS)

Verma, Sumit; Loan, Sajad A.; Alharbi, Abdullah G.

2018-07-01

In this paper, we propose and perform the experimentally calibrated simulation of a novel structure of a GaN/AlGaN high electron mobility transistor (HEMT). The novelty of the structure is the realization of enhancement mode operation by employing polarization engineering approach. In the proposed polarization engineered HEMT (PE-HEMT) a buried Aluminum Nitride (AlN) box is employed in the GaN layer just below the gate. The AlN box creates a two-dimensional hole gas (2DHG) at the GaN/AlN interface, which creates a conduction band barrier in the path of the already existing two-dimensional electron gas (2DEG) at GaN/AlGaN. Therefore, there is no direct path between the source and drain regions at zero gate voltage due to the barrier created by AIN and the device is initially OFF, an enhancement mode operation. A two dimensional (2D) calibrated simulation study of proposed PE-HEMT shows that the device has a threshold voltage (Vth) of 2.3 V. The PE-HEMT also reduces the electron spillover and thus improves the breakdown voltage by 108% as compared to conventional HEMT. The thermal analysis of the GaN PE-HEMT shows that a hot zone occurs on the drain side gate edge. It has been observed that the drain current in the PE-HEMT structure can be improved by 157% by using AlN heat sink.

Linear fitting of multi-threshold counting data with a pixel-array detector for spectral X-ray imaging

PubMed Central

Muir, Ryan D.; Pogranichney, Nicholas R.; Muir, J. Lewis; Sullivan, Shane Z.; Battaile, Kevin P.; Mulichak, Anne M.; Toth, Scott J.; Keefe, Lisa J.; Simpson, Garth J.

2014-01-01

Experiments and modeling are described to perform spectral fitting of multi-threshold counting measurements on a pixel-array detector. An analytical model was developed for describing the probability density function of detected voltage in X-ray photon-counting arrays, utilizing fractional photon counting to account for edge/corner effects from voltage plumes that spread across multiple pixels. Each pixel was mathematically calibrated by fitting the detected voltage distributions to the model at both 13.5 keV and 15.0 keV X-ray energies. The model and established pixel responses were then exploited to statistically recover images of X-ray intensity as a function of X-ray energy in a simulated multi-wavelength and multi-counting threshold experiment. PMID:25178010

Linear fitting of multi-threshold counting data with a pixel-array detector for spectral X-ray imaging.

PubMed

Muir, Ryan D; Pogranichney, Nicholas R; Muir, J Lewis; Sullivan, Shane Z; Battaile, Kevin P; Mulichak, Anne M; Toth, Scott J; Keefe, Lisa J; Simpson, Garth J

2014-09-01

Experiments and modeling are described to perform spectral fitting of multi-threshold counting measurements on a pixel-array detector. An analytical model was developed for describing the probability density function of detected voltage in X-ray photon-counting arrays, utilizing fractional photon counting to account for edge/corner effects from voltage plumes that spread across multiple pixels. Each pixel was mathematically calibrated by fitting the detected voltage distributions to the model at both 13.5 keV and 15.0 keV X-ray energies. The model and established pixel responses were then exploited to statistically recover images of X-ray intensity as a function of X-ray energy in a simulated multi-wavelength and multi-counting threshold experiment.

Quantum Mechanical Enhancement of the Random Dopant Induced Threshold Voltage Fluctuations and Lowering in Sub 0.1 Micron MOSFETs

NASA Technical Reports Server (NTRS)

Asenov, Asen; Slavcheva, G.; Brown, A. R.; Davies, J. H.; Saini, Subhash

1999-01-01

A detailed study of the influence of quantum effects in the inversion layer on the random dopant induced threshold voltage fluctuations and lowering in sub 0.1 micron MOSFETs has been performed. This has been achieved using a full 3D implementation of the density gradient (DG) formalism incorporated in our previously published 3D 'atomistic' simulation approach. This results in a consistent, fully 3D, quantum mechanical picture which implies not only the vertical inversion layer quantisation but also the lateral confinement effects manifested by current filamentation in the 'valleys' of the random potential fluctuations. We have shown that the net result of including quantum mechanical effects, while considering statistical fluctuations, is an increase in both threshold voltage fluctuations and lowering.

A prepositioned areal electrofishing apparatus for sampling stream habitats

USGS Publications Warehouse

Fisher, William L.; Brown, Marshall E.

1993-01-01

We describe the design, use, and sampling characteristics ofan electrofishing apparatus used to sample fish in stream habitats. The apparatus uses two prepositioned areal electrofishing devices (PAED) of different designs, a bottom parallel electrode PAED and a suspended dropper electrode PAED. To determine the effective immobilization ranges of the PAEDs, we evaluated intensities and shapes of the PAEDs' electrical fields, and the electroshock responses of fish in cages in concrete tanks and in four streams in Alabama with different water conductivities. Electroshock responses indicated that complete immobilization occurred at voltage gradients of 1.0 V/cm or higher (voltage drop, 400 V AC), as far as 35 cm from the PAED electrodes, although some fish were immobilized up to 65 cm away at 0.3 V/cm. We estimated the immobilization (stun) power density threshold to be about 10 μW/cm3. Stream evaluations of the PAEDs revealed that higher voltages were needed to immobilize fish at lower (35 μS/cm) and higher (120 and 125 μS/cm) water conductivities, whereas lower voltages were required at an intermediate conductivity (60 μS/cm). These results conformed with the predictions of power transfer theory and underscored the need to calibrate PAEDs to stream conductivities to standardize the effective sampling range.

Electro-optic resonant phase modulator

NASA Technical Reports Server (NTRS)

Chen, Chien-Chung (Inventor); Hemmati, Hamid (Inventor); Robinson, Deborah L. (Inventor)

1992-01-01

An electro-optic resonant cavity is used to achieve phase modulation with lower driving voltages. Laser damage thresholds are inherently higher than with previously used integrated optics due to the utilization of bulk optics. Phase modulation is achieved at higher speeds with lower driving voltages than previously obtained with non-resonant electro-optic phase modulators. The instant scheme uses a data locking dither approach as opposed to the conventional sinusoidal locking schemes. In accordance with a disclosed embodiment, a resonant cavity modulator has been designed to operate at a data rate in excess of 100 megabits per sec. By carefully choosing the cavity finesse and its dimension, it is possible to control the pulse switching time to within 4 nano-sec. and to limit the required switching voltage to within 10 V. This cavity locking scheme can be applied by using only the random data sequence, and without the need of dithering of the cavity. Compared to waveguide modulators, the resonant cavity has a comparable modulating voltage requirement. Because of its bulk geometry, the resonant cavity modulator has the potential of accommodating higher throughput power. Mode matching into the bulk device is easier and typically can be achieved with higher efficiency. An additional control loop is incorporated into the modulator to maintain the cavity on resonance.

Reactive power and voltage control strategy based on dynamic and adaptive segment for DG inverter

NASA Astrophysics Data System (ADS)

Zhai, Jianwei; Lin, Xiaoming; Zhang, Yongjun

2018-03-01

The inverter of distributed generation (DG) can support reactive power to help solve the problem of out-of-limit voltage in active distribution network (ADN). Therefore, a reactive voltage control strategy based on dynamic and adaptive segment for DG inverter is put forward to actively control voltage in this paper. The proposed strategy adjusts the segmented voltage threshold of Q(U) droop curve dynamically and adaptively according to the voltage of grid-connected point and the power direction of adjacent downstream line. And then the reactive power reference of DG inverter can be got through modified Q(U) control strategy. The reactive power of inverter is controlled to trace the reference value. The proposed control strategy can not only control the local voltage of grid-connected point but also help to maintain voltage within qualified range considering the terminal voltage of distribution feeder and the reactive support for adjacent downstream DG. The scheme using the proposed strategy is compared with the scheme without the reactive support of DG inverter and the scheme using the Q(U) control strategy with constant segmented voltage threshold. The simulation results suggest that the proposed method has a significant improvement on solving the problem of out-of-limit voltage, restraining voltage variation and improving voltage quality.

GaN metal-oxide-semiconductor field-effect transistors on AlGaN/GaN heterostructure with recessed gate

NASA Astrophysics Data System (ADS)

Wang, Qingpeng; Ao, Jin-Ping; Wang, Pangpang; Jiang, Ying; Li, Liuan; Kawaharada, Kazuya; Liu, Yang

2015-04-01

GaN metal-oxide-semiconductor field-effect transistors (MOSFETs) on AlGaN/GaN heterostructure with a recess gate were fabricated and characterized. The device showed good pinch-off characteristics and a maximum field-effect mobility of 145.2 cm2·V-1·s-1. The effects of etching gas of Cl2 and SiCl4 were investigated in the gate recess process. SiCl4-etched devices showed higher channel mobility and lower threshold voltage. Atomic force microscope measurement was done to investigate the etching profile with different etching protection mask. Compared with photoresist, SiO2-masked sample showed lower surface roughness and better profile with stepper sidewall and weaker trenching effect resulting in higher channel mobility in the MOSFET.

Two-Dimensional Quantum Model of a Nanotransistor

NASA Technical Reports Server (NTRS)

Govindan, T. R.; Biegel, B.; Svizhenko, A.; Anantram, M. P.

2009-01-01

A mathematical model, and software to implement the model, have been devised to enable numerical simulation of the transport of electric charge in, and the resulting electrical performance characteristics of, a nanotransistor [in particular, a metal oxide/semiconductor field-effect transistor (MOSFET) having a channel length of the order of tens of nanometers] in which the overall device geometry, including the doping profiles and the injection of charge from the source, gate, and drain contacts, are approximated as being two-dimensional. The model and software constitute a computational framework for quantitatively exploring such device-physics issues as those of source-drain and gate leakage currents, drain-induced barrier lowering, and threshold voltage shift due to quantization. The model and software can also be used as means of studying the accuracy of quantum corrections to other semiclassical models.

Reliability evaluation of CMOS RAMs

NASA Astrophysics Data System (ADS)

Salvo, C. J.; Sasaki, A. T.

The results of an evaluation of the reliability of a 1K x 1 bit CMOS RAM and a 4K x 1 bit CMOS RAM for the USAF are reported. The tests consisted of temperature cycling, thermal shock, electrical overstress-static discharge and accelerated life test cells. The study indicates that the devices have high reliability potential for military applications. Use-temperature failure rates at 100 C were 0.54 x 10 to the -5th failures/hour for the 1K RAM and 0.21 x 10 to the -5th failures/hour for the 4K RAM. Only minimal electrostatic discharge damage was noted in the devices when they were subjected to multiple pulses at 1000 Vdc, and redesign of the 7 Vdc quiescent parameter of the 4K RAM is expected to raise its field threshold voltage.

Solution-Processed Organic and Halide Perovskite Transistors on Hydrophobic Surfaces.

PubMed

Ward, Jeremy W; Smith, Hannah L; Zeidell, Andrew; Diemer, Peter J; Baker, Stephen R; Lee, Hyunsu; Payne, Marcia M; Anthony, John E; Guthold, Martin; Jurchescu, Oana D

2017-05-31

Solution-processable electronic devices are highly desirable due to their low cost and compatibility with flexible substrates. However, they are often challenging to fabricate due to the hydrophobic nature of the surfaces of the constituent layers. Here, we use a protein solution to modify the surface properties and to improve the wettability of the fluoropolymer dielectric Cytop. The engineered hydrophilic surface is successfully incorporated in bottom-gate solution-deposited organic field-effect transistors (OFETs) and hybrid organic-inorganic trihalide perovskite field-effect transistors (HTP-FETs) fabricated on flexible substrates. Our analysis of the density of trapping states at the semiconductor-dielectric interface suggests that the increase in the trap density as a result of the chemical treatment is minimal. As a result, the devices exhibit good charge carrier mobilities, near-zero threshold voltages, and low electrical hysteresis.

Device and material characterization and analytic modeling of amorphous silicon thin film transistors

NASA Astrophysics Data System (ADS)

Slade, Holly Claudia

Hydrogenated amorphous silicon thin film transistors (TFTs) are now well-established as switching elements for a variety of applications in the lucrative electronics market, such as active matrix liquid crystal displays, two-dimensional imagers, and position-sensitive radiation detectors. These applications necessitate the development of accurate characterization and simulation tools. The main goal of this work is the development of a semi- empirical, analytical model for the DC and AC operation of an amorphous silicon TFT for use in a manufacturing facility to improve yield and maintain process control. The model is physically-based, in order that the parameters scale with gate length and can be easily related back to the material and device properties. To accomplish this, extensive experimental data and 2D simulations are used to observe and quantify non- crystalline effects in the TFTs. In particular, due to the disorder in the amorphous network, localized energy states exist throughout the band gap and affect all regimes of TFT operation. These localized states trap most of the free charge, causing a gate-bias-dependent field effect mobility above threshold, a power-law dependence of the current on gate bias below threshold, very low leakage currents, and severe frequency dispersion of the TFT gate capacitance. Additional investigations of TFT instabilities reveal the importance of changes in the density of states and/or back channel conduction due to bias and thermal stress. In the above threshold regime, the model is similar to the crystalline MOSFET model, considering the drift component of free charge. This approach uses the field effect mobility to take into account the trap states and must utilize the correct definition of threshold voltage. In the below threshold regime, the density of deep states is taken into account. The leakage current is modeled empirically, and the parameters are temperature dependent to 150oC. The capacitance of the TFT can be modeled using a transmission line model, which is implemented using a small signal circuit with access resistors in series with the source and drain capacitances. This correctly reproduces the frequency dispersion in the TFT. Automatic parameter extraction routines are provided and are used to test the robustness of the model on a variety of devices from different research laboratories. The results demonstrate excellent agreement, showing that the model is suitable for device design, scaling, and implementation in the manufacturing process.

Low-Voltage Bypass Device

NASA Technical Reports Server (NTRS)

Wilson, J. P.

1994-01-01

Improved bypass device provides low-resistance current shunt around low-voltage power cell when cell fails in open-circuit condition during operation. In comparison with older bypass devices for same application, this one weighs less, generates less heat, and has lower voltage drop (less resistance). Bypass device connected in parallel with power cell. Draws very little current during normal operation of cell.

Characterization of emitted light from travelling Gunn domains in Al0.08Ga0.92As alloy based Gunn devices

NASA Astrophysics Data System (ADS)

Cetinkaya, Caglar; Mutlu, Selman; Donmez, Omer; Erol, Ayse

2017-11-01

We report room temperature operation of light emitters based on Al0.08Ga0.92As Gunn devices fabricated in a simple bar geometry with wedged-shaped electrodes. High-speed I-V measurements reveal that, at the threshold of negative differential resistance region at around 3.8 kV/cm, current instabilities, i.e., Gunn oscillations, are created with a 3.8 ns period. Both edge and surface light emission are observed when the device is biased at an electric field of onset of the negative differential resistance (NDR) region at around 3.8 kV/cm and the intensity of the light exponentially increases at applied fields just above NDR threshold likewise in a conventional laser. The origin of the light emission, which has peak wavelength is around 816 nm corresponds to the band-gap energy of Al0.08Ga0.92As, is recombination of electrons and holes generated by impact ionisation process in travelling space charge domains, i.e., Gunn domains. We demonstrate that, with increasing applied field, the amplitude of Gunn domains increases which is a result of the enhanced generation of electrons and holes via impact ionisation. The intensity of the emitted light is observed to be dependent on applied electric field. At low electric fields, light intensity increases linearly then, when applied electric field reaches the onset of NDR region, increases exponentially. Besides, as applied field is increased, full width at half maximum (FWHM) of emitted light decreases to 56.5 nm from 62 nm, evolving into higher selective emission line in wavelength. The light emission from the device is determined to be independent of the polarity of the applied voltage. A comparison of surface emission and edge emission characteristics of the waveguided device are different from each other. Edge emission has higher electroluminescence intensity and better spectral purity than surface emission with well-defined longitudinal modes of Fabry-Pérot cavity, which indicates that, in such a device, lasing action arises from the recombination of excess carriers generated via impact ionisation in travelling Gunn domains. Besides, the edge emission peak of waveguided Al0.08Ga0.92As Gunn device at 4.1 kV/cm is split into two peaks with FWHM of 8 and 6 nm as well as neighbouring sharper minor peaks due to stimulated emission dominates by building-up photons in the cavity. Our results reveal that the proposed Gunn device can be a promising alternative to conventional diode lasers with its simpler design, only one type doped active region and voltage polarity-independent operation, but the duty cycle has to be chosen small enough to make the device operate at room temperature.

Resistive switching effect of N-doped MoS2-PVP nanocomposites films for nonvolatile memory devices

NASA Astrophysics Data System (ADS)

Wu, Zijin; Wang, Tongtong; Sun, Changqi; Liu, Peitao; Xia, Baorui; Zhang, Jingyan; Liu, Yonggang; Gao, Daqiang

2017-12-01

Resistive memory technology is very promising in the field of semiconductor memory devices. According to Liu et al, MoS2-PVP nanocomposite can be used as an active layer material for resistive memory devices due to its bipolar resistive switching behavior. Recent studies have also indicated that the doping of N element can reduce the band gap of MoS2 nanosheets, which is conducive to improving the conductivity of the material. Therefore, in this paper, we prepared N-doped MoS2 nanosheets and then fabricated N-doped MoS2-PVP nanocomposite films by spin coating. Finally, the resistive memory [C. Tan et al., Chem. Soc. Rev. 44, 2615 (2015)], device with ITO/N-doped MoS2-PVP/Pt structure was fabricated. Study on the I-V characteristics shows that the device has excellent resistance switching effect. It is worth mentioning that our device possesses a threshold voltage of 0.75 V, which is much better than 3.5 V reported previously for the undoped counterparts. The above research shows that N-doped MoS2-PVP nanocomposite films can be used as the active layer of resistive switching memory devices, and will make the devices have better performance.

Piezoelectric Vibrational and Acoustic Alert for a Personal Communication Device

NASA Technical Reports Server (NTRS)

Woodard, Stanley E. (Inventor); Hellbaum, Richard F. (Inventor); Daugherty, Robert H. (Inventor); Scholz, Raymond C. (Inventor); Little, Bruce D. (Inventor); Fox, Robert L. (Inventor); Denhardt, Gerald A. (Inventor); Jang, SeGon (Inventor); Balein, Rizza (Inventor)

2001-01-01

An alert apparatus for a personal communication device includes a mechanically prestressed piezoelectric wafer positioned within the personal communication device and an alternating voltage input line coupled at two points of the wafer where polarity is recognized. The alert apparatus also includes a variable frequency device coupled to the alternating voltage input line, operative to switch the alternating voltage on the alternating voltage input line at least between an alternating voltage having a first frequency and an alternating voltage having a second frequency. The first frequency is preferably sufficiently high so as to cause the wafer to vibrate at a resulting frequency that produces a sound perceptible by a human ear, and the second frequency is preferably sufficiently low so as to cause the wafer to vibrate at a resulting frequency that produces a vibration readily felt by a holder of the personal communication device.

Quantitative experimental assessment of hot carrier-enhanced solar cells at room temperature

NASA Astrophysics Data System (ADS)

Nguyen, Dac-Trung; Lombez, Laurent; Gibelli, François; Boyer-Richard, Soline; Le Corre, Alain; Durand, Olivier; Guillemoles, Jean-François

2018-03-01

In common photovoltaic devices, the part of the incident energy above the absorption threshold quickly ends up as heat, which limits their maximum achievable efficiency to far below the thermodynamic limit for solar energy conversion. Conversely, the conversion of the excess kinetic energy of the photogenerated carriers into additional free energy would be sufficient to approach the thermodynamic limit. This is the principle of hot carrier devices. Unfortunately, such device operation in conditions relevant for utilization has never been evidenced. Here, we show that the quantitative thermodynamic study of the hot carrier population, with luminance measurements, allows us to discuss the hot carrier contribution to the solar cell performance. We demonstrate that the voltage and current can be enhanced in a semiconductor heterostructure due to the presence of the hot carrier population in a single InGaAsP quantum well at room temperature. These experimental results substantiate the potential of increasing photovoltaic performances in the hot carrier regime.

Real-time encoding and compression of neuronal spikes by metal-oxide memristors

NASA Astrophysics Data System (ADS)

Gupta, Isha; Serb, Alexantrou; Khiat, Ali; Zeitler, Ralf; Vassanelli, Stefano; Prodromakis, Themistoklis

2016-09-01

Advanced brain-chip interfaces with numerous recording sites bear great potential for investigation of neuroprosthetic applications. The bottleneck towards achieving an efficient bio-electronic link is the real-time processing of neuronal signals, which imposes excessive requirements on bandwidth, energy and computation capacity. Here we present a unique concept where the intrinsic properties of memristive devices are exploited to compress information on neural spikes in real-time. We demonstrate that the inherent voltage thresholds of metal-oxide memristors can be used for discriminating recorded spiking events from background activity and without resorting to computationally heavy off-line processing. We prove that information on spike amplitude and frequency can be transduced and stored in single devices as non-volatile resistive state transitions. Finally, we show that a memristive device array allows for efficient data compression of signals recorded by a multi-electrode array, demonstrating the technology's potential for building scalable, yet energy-efficient on-node processors for brain-chip interfaces.

GSM module for wireless radiation monitoring system via SMS

NASA Astrophysics Data System (ADS)

Rahman, Nur Aira Abd; Hisyam Ibrahim, Noor; Lombigit, Lojius; Azman, Azraf; Jaafar, Zainudin; Arymaswati Abdullah, Nor; Hadzir Patai Mohamad, Glam

2018-01-01

A customised Global System for Mobile communication (GSM) module is designed for wireless radiation monitoring through Short Messaging Service (SMS). This module is able to receive serial data from radiation monitoring devices such as survey meter or area monitor and transmit the data as text SMS to a host server. It provides two-way communication for data transmission, status query, and configuration setup. The module hardware consists of GSM module, voltage level shifter, SIM circuit and Atmega328P microcontroller. Microcontroller provides control for sending, receiving and AT command processing to GSM module. The firmware is responsible to handle task related to communication between device and host server. It process all incoming SMS, extract, and store new configuration from Host, transmits alert/notification SMS when the radiation data reach/exceed threshold value, and transmits SMS data at every fixed interval according to configuration. Integration of this module with radiation survey/monitoring device will create mobile and wireless radiation monitoring system with prompt emergency alert at high-level radiation.

Real-time encoding and compression of neuronal spikes by metal-oxide memristors

PubMed Central

Gupta, Isha; Serb, Alexantrou; Khiat, Ali; Zeitler, Ralf; Vassanelli, Stefano; Prodromakis, Themistoklis

2016-01-01

Advanced brain-chip interfaces with numerous recording sites bear great potential for investigation of neuroprosthetic applications. The bottleneck towards achieving an efficient bio-electronic link is the real-time processing of neuronal signals, which imposes excessive requirements on bandwidth, energy and computation capacity. Here we present a unique concept where the intrinsic properties of memristive devices are exploited to compress information on neural spikes in real-time. We demonstrate that the inherent voltage thresholds of metal-oxide memristors can be used for discriminating recorded spiking events from background activity and without resorting to computationally heavy off-line processing. We prove that information on spike amplitude and frequency can be transduced and stored in single devices as non-volatile resistive state transitions. Finally, we show that a memristive device array allows for efficient data compression of signals recorded by a multi-electrode array, demonstrating the technology's potential for building scalable, yet energy-efficient on-node processors for brain-chip interfaces. PMID:27666698

Experimental and theoretical studies of Sub-THz detection using strained-Si FETs

NASA Astrophysics Data System (ADS)

Delgado Notario, J. A.; Javadi, E.; Clericò, V.; Fobelets, K.; Otsuji, T.; Diez, E.; Velázquez-Pérez, J. E.; Meziani, Y. M.

2017-10-01

We report on experimental and theoretical studies of nanoscale gate-lengths strained Silicon MODFETs as room temperature non resonant detectors. Devices were excited at room temperature by an electronic source at 150 and 300 GHz to characterize their sub-THz response. The maximum of the photovoltaic response was obtained when the FET gate was biased at a value close to the threshold voltage. Simulations based on a bi-dimensional hydrodynamic model for the charge transport coupled to a Poisson equation solver were performed by using Synopsys TCAD. A charge boundary condition for the floating drain contact was implemented to obtain the photovoltaic response. Results from numerical simulations are in agreement with experimental ones. To understand the coupling between terahertz radiation and devices, the devices were rotated at different angles under excitation at both sub-terahertz frequencies and their response measured. Both NEP (Noise Equivalent Power) and Responsivity were calculated from measurements. To demonstrate their utility, devices were used as sensors in a terahertz imaging system for inspection of hidden objects at both frequencies.

Environmental Effects on Data Retention in Flash Cells

NASA Technical Reports Server (NTRS)

Katz, Rich; Flowers, David; Bergevin, Keith

2017-01-01

Flash technology is being utilized in fuzed munition applications and, based on the development of digital logic devices in the commercial world, usage of flash technology will increase. Antifuse technology, prevalent in non-volatile field programmable gate arrays (FPGAs), will eventually be phased out as new devices have not been developed for approximately a decade. The reliance on flash technology presents a long-term reliability issue for both DoD and NASA safety- and mission-critical applications. A thorough understanding of the data retention failure modes and statistics associated with Flash data retention is of vital concern to the fuze safety community. A key retention parameter for a flash cell is the threshold voltage (VTH), which is an indirect indicator of the amount of charge stored on the cells floating gate. This paper will present the results of our on-going tests: long-term storage at 150 C for a small population of devices, neutron radiation exposure, electrostatic discharge (ESD) testing, and the trends of large populations (over 300 devices for each condition) exposed to three difference temperatures: 25 C, 125 C, and 150 C.

Low temperature mobility in hafnium-oxide gated germanium p-channel metal-oxide-semiconductor field-effect transistors

NASA Astrophysics Data System (ADS)

Beer, Chris; Whall, Terry; Parker, Evan; Leadley, David; De Jaeger, Brice; Nicholas, Gareth; Zimmerman, Paul; Meuris, Marc; Szostak, Slawomir; Gluszko, Grzegorz; Lukasiak, Lidia

2007-12-01

Effective mobility measurements have been made at 4.2K on high performance high-k gated germanium p-type metal-oxide-semiconductor field effect transistors with a range of Ge/gate dielectric interface state densities. The mobility is successfully modelled by assuming surface roughness and interface charge scattering at the SiO2 interlayer/Ge interface. The deduced interface charge density is approximately equal to the values obtained from the threshold voltage and subthreshold slope measurements on each device. A hydrogen anneal reduces both the interface state density and the surface root mean square roughness by 20%.

Variability Analysis of MOS Differential Amplifier

NASA Astrophysics Data System (ADS)

Aoki, Masakazu; Seto, Kenji; Yamawaki, Taizo; Tanaka, Satoshi

Variation characteristics in MOS differential amplifier are evaluated by using the concise statistical model parameters for SPICE simulation. We find that the variation in the differential-mode gain, Adm, induced by the current factor variation, Δβ0, in the Id-variation of the differential MOS transistors is more than one order of magnitude larger than that induced by the threshold voltage variation, ΔVth, which has been regarded as a major factor for circuit variations in SoC's (2). The results obtained by the Monte Carlo simulations are verified by the theoretical analysis combined with the sensitivity analysis which clarifies the specific device parameter dependences of the variation in Adm.

Electro-pumped whispering gallery mode ZnO microlaser array

DOE Office of Scientific and Technical Information (OSTI.GOV)

Zhu, G. Y.; State Key Laboratory of Bioelectronics, School of Electronic Science and Engineering, Southeast University, Nanjing 210096; Li, J. T.

2015-01-12

By employing vapor-phase transport method, ZnO microrods are fabricated and directly assembled on p-GaN substrate to form a heterostructural microlaser array, which avoids of the relatively complicated etching process comparing previous work. Under applied forward bias, whispering gallery mode ZnO ultraviolet lasing is obtained from the as-fabricated heterostructural microlaser array. The device's electroluminescence originates from three distinct electron-hole recombination processes in the heterojunction interface, and whispering gallery mode ultraviolet lasing is obtained when the applied voltage is beyond the lasing threshold. This work may present a significant step towards future fabrication of a facile technique for micro/nanolasers.

Models of second-order effects in metal-oxide-semiconductor field-effect transistors for computer applications

NASA Technical Reports Server (NTRS)

Benumof, Reuben; Zoutendyk, John; Coss, James

1988-01-01

Second-order effects in metal-oxide-semiconductor field-effect transistors (MOSFETs) are important for devices with dimensions of 2 microns or less. The short and narrow channel effects and drain-induced barrier lowering primarily affect threshold voltage, but formulas for drain current must also take these effects into account. In addition, the drain current is sensitive to channel length modulation due to pinch-off or velocity saturation and is diminished by electron mobility degradation due to normal and lateral electric fields in the channel. A model of a MOSFET including these considerations and emphasizing charge conservation is discussed.

Molecular control of pentacene/ZnO photoinduced charge transfer

NASA Astrophysics Data System (ADS)

Spalenka, Josef W.; Paoprasert, Peerasak; Franking, Ryan; Hamers, Robert J.; Gopalan, Padma; Evans, Paul G.

2011-03-01

Photoinduced charge transfer modifies the device properties of illuminated pentacene field effect transistors (FETs) incorporating ZnO quantum dots at the gate insulator/pentacene interface. The transferred charge is trapped on electronic states associated with the ZnO quantum dots, with a steady state population approximately proportional to the rate of organic-inorganic charge transfer. Trapped charge shifts the threshold voltage of the FETs, providing the means to evaluate the rate of organic/inorganic charge transfer and the effects of interface modification. Monolayers of the wide-gap alkane stearic acid and the conjugated oligomer terthiophene attached to the ZnO suppress or permit charge transfer, respectively.

A Survey of Architectural Techniques for Near-Threshold Computing

DOE PAGES

Mittal, Sparsh

2015-12-28

Energy efficiency has now become the primary obstacle in scaling the performance of all classes of computing systems. In low-voltage computing and specifically, near-threshold voltage computing (NTC), which involves operating the transistor very close to and yet above its threshold voltage, holds the promise of providing many-fold improvement in energy efficiency. However, use of NTC also presents several challenges such as increased parametric variation, failure rate and performance loss etc. Our paper surveys several re- cent techniques which aim to offset these challenges for fully leveraging the potential of NTC. By classifying these techniques along several dimensions, we also highlightmore » their similarities and differences. Ultimately, we hope that this paper will provide insights into state-of-art NTC techniques to researchers and system-designers and inspire further research in this field.« less

A Survey of Architectural Techniques for Near-Threshold Computing

DOE Office of Scientific and Technical Information (OSTI.GOV)

Mittal, Sparsh

Energy efficiency has now become the primary obstacle in scaling the performance of all classes of computing systems. In low-voltage computing and specifically, near-threshold voltage computing (NTC), which involves operating the transistor very close to and yet above its threshold voltage, holds the promise of providing many-fold improvement in energy efficiency. However, use of NTC also presents several challenges such as increased parametric variation, failure rate and performance loss etc. Our paper surveys several re- cent techniques which aim to offset these challenges for fully leveraging the potential of NTC. By classifying these techniques along several dimensions, we also highlightmore » their similarities and differences. Ultimately, we hope that this paper will provide insights into state-of-art NTC techniques to researchers and system-designers and inspire further research in this field.« less