Evaluating Multi-Input/Multi-Output Digital Control Systems

NASA Technical Reports Server (NTRS)

Pototzky, Anthony S.; Wieseman, Carol D.; Hoadley, Sherwood T.; Mukhopadhyay, Vivek

1994-01-01

Controller-performance-evaluation (CPE) methodology for multi-input/multi-output (MIMO) digital control systems developed. Procedures identify potentially destabilizing controllers and confirm satisfactory performance of stabilizing ones. Methodology generic and used in many types of multi-loop digital-controller applications, including digital flight-control systems, digitally controlled spacecraft structures, and actively controlled wind-tunnel models. Also applicable to other complex, highly dynamic digital controllers, such as those in high-performance robot systems.

Programmable Digital Controller

NASA Technical Reports Server (NTRS)

Wassick, Gregory J.

2012-01-01

An existing three-channel analog servo loop controller has been redesigned for piezoelectric-transducer-based (PZT-based) etalon control applications to a digital servo loop controller. This change offers several improvements over the previous analog controller, including software control over proportional-integral-derivative (PID) parameters, inclusion of other data of interest such as temperature and pressure in the control laws, improved ability to compensate for PZT hysteresis and mechanical mount fluctuations, ability to provide pre-programmed scanning and stepping routines, improved user interface, expanded data acquisition, and reduced size, weight, and power.

A digital optical phase-locked loop for diode lasers based on field programmable gate array

DOE Office of Scientific and Technical Information (OSTI.GOV)

Xu Zhouxiang; Zhang Xian; Huang Kaikai

2012-09-15

We have designed and implemented a highly digital optical phase-locked loop (OPLL) for diode lasers in atom interferometry. The three parts of controlling circuit in this OPLL, including phase and frequency detector (PFD), loop filter and proportional integral derivative (PID) controller, are implemented in a single field programmable gate array chip. A structure type compatible with the model MAX9382/MCH12140 is chosen for PFD and pipeline and parallelism technology have been adapted in PID controller. Especially, high speed clock and twisted ring counter have been integrated in the most crucial part, the loop filter. This OPLL has the narrow beat notemore » line width below 1 Hz, residual mean-square phase error of 0.14 rad{sup 2} and transition time of 100 {mu}s under 10 MHz frequency step. A main innovation of this design is the completely digitalization of the whole controlling circuit in OPLL for diode lasers.« less

Loop gain stabilizing with an all-digital automatic-gain-control method for high-precision fiber-optic gyroscope.

PubMed

Zheng, Yue; Zhang, Chunxi; Li, Lijing; Song, Lailiang; Chen, Wen

2016-06-10

For a fiber-optic gyroscope (FOG) using electronic dithers to suppress the dead zone, without a fixed loop gain, the deterministic compensation for the dither signals in the control loop of the FOG cannot remain accurate, resulting in the dither residuals in the FOG rotation rate output and the navigation errors in the inertial navigation system. An all-digital automatic-gain-control method for stabilizing the loop gain of the FOG is proposed. By using a perturbation square wave to measure the loop gain of the FOG and adding an automatic gain control loop in the conventional control loop of the FOG, we successfully obtain the actual loop gain and make the loop gain converge to the reference value. The experimental results show that in the case of 20% variation in the loop gain, the dither residuals are successfully eliminated and the standard deviation of the FOG sampling outputs is decreased from 2.00  deg/h to 0.62  deg/h (sampling period 2.5 ms, 10 points smoothing). With this method, the loop gain of the FOG can be stabilized over the operation temperature range and in the long-time application, which provides a solid foundation for the engineering applications of the high-precision FOG.

Implementation of Adaptive Digital Controllers on Programmable Logic Devices

NASA Technical Reports Server (NTRS)

Gwaltney, David A.; King, Kenneth D.; Smith, Keary J.; Monenegro, Justino (Technical Monitor)

2002-01-01

Much has been made of the capabilities of FPGA's (Field Programmable Gate Arrays) in the hardware implementation of fast digital signal processing. Such capability also makes an FPGA a suitable platform for the digital implementation of closed loop controllers. Other researchers have implemented a variety of closed-loop digital controllers on FPGA's. Some of these controllers include the widely used proportional-integral-derivative (PID) controller, state space controllers, neural network and fuzzy logic based controllers. There are myriad advantages to utilizing an FPGA for discrete-time control functions which include the capability for reconfiguration when SRAM-based FPGA's are employed, fast parallel implementation of multiple control loops and implementations that can meet space level radiation tolerance requirements in a compact form-factor. Generally, a software implementation on a DSP (Digital Signal Processor) or microcontroller is used to implement digital controllers. At Marshall Space Flight Center, the Control Electronics Group has been studying adaptive discrete-time control of motor driven actuator systems using digital signal processor (DSP) devices. While small form factor, commercial DSP devices are now available with event capture, data conversion, pulse width modulated (PWM) outputs and communication peripherals, these devices are not currently available in designs and packages which meet space level radiation requirements. In general, very few DSP devices are produced that are designed to meet any level of radiation tolerance or hardness. The goal of this effort is to create a fully digital, flight ready controller design that utilizes an FPGA for implementation of signal conditioning for control feedback signals, generation of commands to the controlled system, and hardware insertion of adaptive control algorithm approaches. An alternative is required for compact implementation of such functionality to withstand the harsh environment encountered on spacecraft. Radiation tolerant FPGA's are a feasible option for reaching this goal.

Digital phase-locked loop speed control for a brushless dc motor

NASA Astrophysics Data System (ADS)

Wise, M. G.

1985-06-01

Speed control of d.c. motors by phase-locked loops (PLL) is becoming increasingly popular. Primary interest has been in employing PLL for constant speed control. This thesis investigates the theory and techniques of digital PLL to speed control of a brushless d.c. motor with a variable speed of operation. Addition of logic controlled count enable/disable to a synchronous up/down counter, used as a phase-frequency detector, is shown to improve the performance of previously proposed PLL control schemes.

Closed loop models for analyzing the effects of simulator characteristics. [digital simulation of human operators

NASA Technical Reports Server (NTRS)

Baron, S.; Muralidharan, R.; Kleinman, D. L.

1978-01-01

The optimal control model of the human operator is used to develop closed loop models for analyzing the effects of (digital) simulator characteristics on predicted performance and/or workload. Two approaches are considered: the first utilizes a continuous approximation to the discrete simulation in conjunction with the standard optimal control model; the second involves a more exact discrete description of the simulator in a closed loop multirate simulation in which the optimal control model simulates the pilot. Both models predict that simulator characteristics can have significant effects on performance and workload.

Digital control of a direct current converter for a hybrid vehicle

NASA Astrophysics Data System (ADS)

Hernandez, Juan Manuel

The nonlinear feedback loops permitting the large signal control of pulse width modulators in direct current converters are discussed. A digital feedback loop on a converter controlling the coupling of a direct current machine is described. It is used in the propulsion of a hybrid vehicle (thermal-electric) with regenerative braking. The protection of the power switches is also studied. An active protection of the MOST bipolar transistor association is proposed.

Implementation of Adaptive Digital Controllers on Programmable Logic Devices

NASA Technical Reports Server (NTRS)

Gwaltney, David A.; King, Kenneth D.; Smith, Keary J.; Montenegro, Justino (Technical Monitor)

2002-01-01

Much has been made of the capabilities of Field Programmable Gate Arrays (FPGA's) in the hardware implementation of fast digital signal processing functions. Such capability also makes an FPGA a suitable platform for the digital implementation of closed loop controllers. Other researchers have implemented a variety of closed-loop digital controllers on FPGA's. Some of these controllers include the widely used Proportional-Integral-Derivative (PID) controller, state space controllers, neural network and fuzzy logic based controllers. There are myriad advantages to utilizing an FPGA for discrete-time control functions which include the capability for reconfiguration when SRAM- based FPGA's are employed, fast parallel implementation of multiple control loops and implementations that can meet space level radiation tolerance requirements in a compact form-factor. Generally, a software implementation on a Digital Signal Processor (DSP) device or microcontroller is used to implement digital controllers. At Marshall Space Flight Center, the Control Electronics Group has been studying adaptive discrete-time control of motor driven actuator systems using DSP devices. While small form factor, commercial DSP devices are now available with event capture, data conversion, Pulse Width Modulated (PWM) outputs and communication peripherals, these devices are not currently available in designs and packages which meet space level radiation requirements. In general, very few DSP devices are produced that are designed to meet any level of radiation tolerance or hardness. An alternative is required for compact implementation of such functionality to withstand the harsh environment encountered on spacemap. The goal of this effort is to create a fully digital, flight ready controller design that utilizes an FPGA for implementation of signal conditioning for control feedback signals, generation of commands to the controlled system, and hardware insertion of adaptive-control algorithm approaches. Radiation tolerant FPGA's are a feasible option for reaching this goal.

One way Doppler Extractor. Volume 2: Digital VCO technique

NASA Technical Reports Server (NTRS)

Nossen, E. J.; Starner, E. R.

1974-01-01

A feasibility analysis and trade-offs for a one-way Doppler extractor using digital VCO techniques is presented. The method of Doppler measurement involves the use of a digital phase lock loop; once this loop is locked to the incoming signal, the precise frequency and hence the Doppler component can be determined directly from the contents of the digital control register. The only serious error source is due to internally generated noise. Techniques are presented for minimizing this error source and achieving an accuracy of 0.01 Hz in a one second averaging period. A number of digitally controlled oscillators were analyzed from a performance and complexity point of view. The most promising technique uses an arithmetic synthesizer as a digital waveform generator.

Digital PI-PD controller design for arbitrary order systems: Dominant pole placement approach.

PubMed

Dincel, Emre; Söylemez, Mehmet Turan

2018-05-02

In this paper, a digital PI-PD controller design method is proposed for arbitrary order systems with or without time-delay to achieve desired transient response in the closed-loop via dominant pole placement approach. The digital PI-PD controller design problem is solved by converting the original problem to the digital PID controller design problem. Firstly, parametrization of the digital PID controllers which assign dominant poles to desired location is done. After that the subset of digital PID controller parameters in which the remaining poles are located away from the dominant pole pair is found via Chebyshev polynomials. The obtained PID controller parameters are then transformed into the PI-PD controller parameters by considering the closed-loop controller zero and the design is completed. Success of the proposed design method is firstly demonstrated on an example transfer function and compared with the well-known PID controller methods from the literature through simulations. After that the design method is implemented on the fan and plate laboratory system in a real environment. Copyright © 2018 ISA. Published by Elsevier Ltd. All rights reserved.

All-digital phase-locked loop with 50-cycle lock time suitable for high-performance microprocessors

NASA Astrophysics Data System (ADS)

Dunning, Jim; Garcia, Gerald; Lundberg, Jim; Nuckolls, Ed

1995-04-01

A frequency-synthesizing, all-digital phase-locked loop (ADPLL) is fully integrated with a 0.5 micron CMOS microprocessor. The ADPLL has a 50-cycle phase lock, has a gain mechanism independent of process, voltage, and temperature, and is immune to input jitter. A digitally-controlled oscillator (DCO) forms the core of the ADPLL and operates from 50 to 550 MHz, running at 4x the reference clock frequency. The DCO has 16 b of binarily weighted control and achieves LSB resolution under 500 fs.

Preliminary development of digital signal processing in microwave radiometers

NASA Technical Reports Server (NTRS)

Stanley, W. D.

1980-01-01

Topics covered involve a number of closely related tasks including: the development of several control loop and dynamic noise model computer programs for simulating microwave radiometer measurements; computer modeling of an existing stepped frequency radiometer in an effort to determine its optimum operational characteristics; investigation of the classical second order analog control loop to determine its ability to reduce the estimation error in a microwave radiometer; investigation of several digital signal processing unit designs; initiation of efforts to develop required hardware and software for implementation of the digital signal processing unit; and investigation of the general characteristics and peculiarities of digital processing noiselike microwave radiometer signals.

Power in the loop real time simulation platform for renewable energy generation

NASA Astrophysics Data System (ADS)

Li, Yang; Shi, Wenhui; Zhang, Xing; He, Guoqing

2018-02-01

Nowadays, a large scale of renewable energy sources has been connecting to power system and the real time simulation platform is widely used to carry out research on integration control algorithm, power system stability etc. Compared to traditional pure digital simulation and hardware in the loop simulation, power in the loop simulation has higher accuracy and degree of reliability. In this paper, a power in the loop analog digital hybrid simulation platform has been built and it can be used not only for the single generation unit connecting to grid, but also for multiple new energy generation units connecting to grid. A wind generator inertia control experiment was carried out on the platform. The structure of the inertia control platform was researched and the results verify that the platform is up to need for renewable power in the loop real time simulation.

Digital phase-lock loop

NASA Technical Reports Server (NTRS)

Thomas, Jr., Jess B. (Inventor)

1991-01-01

An improved digital phase lock loop incorporates several distinctive features that attain better performance at high loop gain and better phase accuracy. These features include: phase feedback to a number-controlled oscillator in addition to phase rate; analytical tracking of phase (both integer and fractional cycles); an amplitude-insensitive phase extractor; a more accurate method for extracting measured phase; a method for changing loop gain during a track without loss of lock; and a method for avoiding loss of sampled data during computation delay, while maintaining excellent tracking performance. The advantages of using phase and phase-rate feedback are demonstrated by comparing performance with that of rate-only feedback. Extraction of phase by the method of modeling provides accurate phase measurements even when the number-controlled oscillator phase is discontinuously updated.

Digital Baseband Architecture For Transponder

NASA Technical Reports Server (NTRS)

Nguyen, Tien M.; Yeh, Hen-Geul

1995-01-01

Proposed advanced transponder for long-distance radio communication system with turnaround ranging contains carrier-signal-tracking loop including baseband digital "front end." For reduced cost, transponder includes analog intermediate-frequency (IF) section and analog automatic gain control (AGC) loop at first of two IF mixers. However, second IF mixer redesigned to ease digitization of baseband functions. To conserve power and provide for simpler and smaller transponder hardware, baseband digital signal-processing circuits designed to implement undersampling scheme. Furthermore, sampling scheme and sampling frequency chosen so redesign involves minimum modification of command-detector unit (CDU).

Fiber-optic projected-fringe digital interferometry

NASA Technical Reports Server (NTRS)

Mercer, Carolyn R.; Beheim, Glenn

1990-01-01

A phase-stepped projected-fringe interferometer was developed which uses a closed-loop fiber-optic phase-control system to make very accurate surface profile measurements. The closed-loop phase-control system greatly reduces phase-stepping error, which is frequently the dominant source of error in digital interferometers. Two beams emitted from a fiber-optic coupler are combined to form an interference fringe pattern on a diffusely reflecting object. Reflections off of the fibers' output faces are used to create a phase-indicating signal for the closed-loop optical phase controller. The controller steps the phase difference between the two beams by pi/2 radians in order to determine the object's surface profile using a solid-state camera and a computer. The system combines the ease of alignment and automated data reduction of phase-stepping projected-fringe interferometry with the greatly improved phase-stepping accuracy of our closed-loop phase-controller. The system is demonstrated by measuring the profile of a plate containing several convex surfaces whose heights range from 15 to 25 micron high.

BacNet and Analog/Digital Interfaces of the Building Controls Virtual Testbed

DOE Office of Scientific and Technical Information (OSTI.GOV)

Nouidui, Thierry Stephane; Wetter, Michael; Li, Zhengwei

2011-11-01

This paper gives an overview of recent developments in the Building Controls Virtual Test Bed (BCVTB), a framework for co-simulation and hardware-in-the-loop. First, a general overview of the BCVTB is presented. Second, we describe the BACnet interface, a link which has been implemented to couple BACnet devices to the BCVTB. We present a case study where the interface was used to couple a whole building simulation program to a building control system to assess in real-time the performance of a real building. Third, we present the ADInterfaceMCC, an analog/digital interface that allows a USB-based analog/digital converter to be linked tomore » the BCVTB. In a case study, we show how the link was used to couple the analog/digital converter to a building simulation model for local loop control.« less

Optimization of block-floating-point realizations for digital controllers with finite-word-length considerations.

PubMed

Wu, Jun; Hu, Xie-he; Chen, Sheng; Chu, Jian

2003-01-01

The closed-loop stability issue of finite-precision realizations was investigated for digital controllers implemented in block-floating-point format. The controller coefficient perturbation was analyzed resulting from using finite word length (FWL) block-floating-point representation scheme. A block-floating-point FWL closed-loop stability measure was derived which considers both the dynamic range and precision. To facilitate the design of optimal finite-precision controller realizations, a computationally tractable block-floating-point FWL closed-loop stability measure was then introduced and the method of computing the value of this measure for a given controller realization was developed. The optimal controller realization is defined as the solution that maximizes the corresponding measure, and a numerical optimization approach was adopted to solve the resulting optimal realization problem. A numerical example was used to illustrate the design procedure and to compare the optimal controller realization with the initial realization.

High-accuracy resolver-to-digital conversion via phase locked loop based on PID controller

NASA Astrophysics Data System (ADS)

Li, Yaoling; Wu, Zhong

2018-03-01

The problem of resolver-to-digital conversion (RDC) is transformed into the problem of angle tracking control, and a phase locked loop (PLL) method based on PID controller is proposed in this paper. This controller comprises a typical PI controller plus an incomplete differential which can avoid the amplification of higher-frequency noise components by filtering the phase detection error with a low-pass filter. Compared with conventional ones, the proposed PLL method makes the converter a system of type III and thus the conversion accuracy can be improved. Experimental results demonstrate the effectiveness of the proposed method.

A microprocessor application to a strapdown laser gyro navigator

NASA Technical Reports Server (NTRS)

Giardina, C.; Luxford, E.

1980-01-01

The replacement of analog circuit control loops for laser gyros (path length control, cross axis temperature compensation loops, dither servo and current regulators) with digital filters residing in microcomputers is addressed. In addition to the control loops, a discussion is given on applying the microprocessor hardware to compensation for coning and skulling motion where simple algorithms are processed at high speeds to compensate component output data (digital pulses) for linear and angular vibration motions. Highlights are given on the methodology and system approaches used in replacing differential equations describing the analog system in terms of the mechanized difference equations of the microprocessor. Standard one for one frequency domain techniques are employed in replacing analog transfer functions by their transform counterparts. Direct digital design techniques are also discussed along with their associated benefits. Time and memory loading analyses are also summarized, as well as signal and microprocessor architecture. Trade offs in algorithm, mechanization, time/memory loading, accuracy, and microprocessor architecture are also given.

Digital multi-channel high resolution phase locked loop for surveillance radar systems

NASA Astrophysics Data System (ADS)

Rizk, Mohamed; Shaaban, Shawky; Abou-El-Nadar, Usama M.; Hafez, Alaa El-Din Sayed

This paper present a multi-channel, high resolution, fast lock phase locked loop (PLL) for surveillance radar applications. Phase detector based PLLs are simple to design, suffer no systematic phase error, and can run at the highest speed. Reducing loop gain can proportionally improve jitter performance, but also reduces locking time and pull-in range. The proposed system is based on digital process and control the error signal to the voltage controlled oscillator (VCO) adaptively to control its gain in order to achieve fast lock times while improving in lock jitter performance. Under certain circumstances the design also improves the frequency agility capability of the radar system. The results show a fast lock, high resolution PLL with transient time less than 10 µ sec which is suitable to radar applications.

Analysis and optimisation of the convergence behaviour of the single channel digital tanlock loop

NASA Astrophysics Data System (ADS)

Al-Kharji Al-Ali, Omar; Anani, Nader; Al-Araji, Saleh; Al-Qutayri, Mahmoud

2013-09-01

The mathematical analysis of the convergence behaviour of the first-order single channel digital tanlock loop (SC-DTL) is presented. This article also describes a novel technique that allows controlling the convergence speed of the loop, i.e. the time taken by the phase-error to reach its steady-state value, by using a specialised controller unit. The controller is used to adjust the convergence speed so as to selectively optimise a given performance parameter of the loop. For instance, the controller may be used to speed up the convergence in order to increase the lock range and improve the acquisition speed. However, since increasing the lock range can degrade the noise immunity of the system, in a noisy environment the controller can slow down the convergence speed until locking is achieved. Once the system is in lock, the convergence speed can be increased to improve the acquisition speed. The performance of the SC-DTL system was assessed against similar arctan-based loops and the results demonstrate the success of the controller in optimising the performance of the SC-DTL loop. The results of the system testing using MATLAB/Simulink simulation are presented. A prototype of the proposed system was implemented using a field programmable gate array module and the practical results are in good agreement with those obtained by simulation.

Performance improvement of a binary quantized all-digital phase-locked loop with a new aided-acquisition technique

NASA Astrophysics Data System (ADS)

Sandoz, J.-P.; Steenaart, W.

1984-12-01

The nonuniform sampling digital phase-locked loop (DPLL) with sequential loop filter, in which the correction sizes are controlled by the accumulated differences of two additional phase comparators, is graphically analyzed. In the absence of noise and frequency drift, the analysis gives some physical insight into the acquisition and tracking behavior. Taking noise into account, a mathematical model is derived and a random walk technique is applied to evaluate the rms phase error and the mean acquisition time. Experimental results confirm the appropriate simplifying hypotheses used in the numerical analysis. Two related performance measures defined in terms of the rms phase error and the acquisition time for a given SNR are used. These measures provide a common basis for comparing different digital loops and, to a limited extent, also with a first-order linear loop. Finally, the behavior of a modified DPLL under frequency deviation in the presence of Gaussian noise is tested experimentally and by computer simulation.

Electrical crosstalk-coupling measurement and analysis for digital closed loop fibre optic gyro

NASA Astrophysics Data System (ADS)

Jin, Jing; Tian, Hai-Ting; Pan, Xiong; Song, Ning-Fang

2010-03-01

The phase modulation and the closed-loop controller can generate electrical crosstalk-coupling in digital closed-loop fibre optic gyro. Four electrical cross-coupling paths are verified by the open-loop testing approach. It is found the variation of ramp amplitude will lead to the alternation of gyro bias. The amplitude and the phase parameters of the electrical crosstalk signal are measured by lock-in amplifier, and the variation of gyro bias is confirmed to be caused by the alternation of phase according to the amplitude of the ramp. A digital closed-loop fibre optic gyro electrical crosstalk-coupling model is built by approximating the electrical cross-coupling paths as a proportion and integration segment. The results of simulation and experiment show that the modulation signal electrical crosstalk-coupling can cause the dead zone of the gyro when a small angular velocity is inputted, and it could also lead to a periodic vibration of the bias error of the gyro when a large angular velocity is inputted.

Development and testing of methodology for evaluating the performance of multi-input/multi-output digital control systems

NASA Technical Reports Server (NTRS)

Polotzky, Anthony S.; Wieseman, Carol; Hoadley, Sherwood Tiffany; Mukhopadhyay, Vivek

1990-01-01

The development of a controller performance evaluation (CPE) methodology for multiinput/multioutput digital control systems is described. The equations used to obtain the open-loop plant, controller transfer matrices, and return-difference matrices are given. Results of applying the CPE methodology to evaluate MIMO digital flutter suppression systems being tested on an active flexible wing wind-tunnel model are presented to demonstrate the CPE capability.

Design of Digital Phase-Locked Loops For Advanced Digital Transponders

NASA Technical Reports Server (NTRS)

Nguyen, Tien M.

1994-01-01

For advanced digital space transponders, the Digital Phased-Locked Loops (DPLLs) can be designed using the available analog loops. DPLLs considered in this paper are derived from the Analog Phase-Locked Loop (APLL) using S-domain mapping techniques.

A digitalized silicon microgyroscope based on embedded FPGA.

PubMed

Xia, Dunzhu; Yu, Cheng; Wang, Yuliang

2012-09-27

This paper presents a novel digital miniaturization method for a prototype silicon micro-gyroscope (SMG) with the symmetrical and decoupled structure. The schematic blocks of the overall system consist of high precision analog front-end interface, high-speed 18-bit analog to digital convertor, a high-performance core Field Programmable Gate Array (FPGA) chip and other peripherals such as high-speed serial ports for transmitting data. In drive mode, the closed-loop drive circuit are implemented by automatic gain control (AGC) loop and software phase-locked loop (SPLL) based on the Coordinated Rotation Digital Computer (CORDIC) algorithm. Meanwhile, the sense demodulation module based on varying step least mean square demodulation (LMSD) are addressed in detail. All kinds of algorithms are simulated by Simulink and DSPbuilder tools, which is in good agreement with the theoretical design. The experimental results have fully demonstrated the stability and flexibility of the system.

A Digitalized Silicon Microgyroscope Based on Embedded FPGA

PubMed Central

Xia, Dunzhu; Yu, Cheng; Wang, Yuliang

2012-01-01

This paper presents a novel digital miniaturization method for a prototype silicon micro-gyroscope (SMG) with the symmetrical and decoupled structure. The schematic blocks of the overall system consist of high precision analog front-end interface, high-speed 18-bit analog to digital convertor, a high-performance core Field Programmable Gate Array (FPGA) chip and other peripherals such as high-speed serial ports for transmitting data. In drive mode, the closed-loop drive circuit are implemented by automatic gain control (AGC) loop and software phase-locked loop (SPLL) based on the Coordinated Rotation Digital Computer (CORDIC) algorithm. Meanwhile, the sense demodulation module based on varying step least mean square demodulation (LMSD) are addressed in detail. All kinds of algorithms are simulated by Simulink and DSPbuilder tools, which is in good agreement with the theoretical design. The experimental results have fully demonstrated the stability and flexibility of the system. PMID:23201990

Integrated mixed signal control IC for 500-kHz switching frequency buck regulator

NASA Astrophysics Data System (ADS)

Chen, Keng; Zhang, Hong

2015-12-01

The main purpose for this work is to study the challenges of designing a digital buck regulator using pipelined analog to digital converter (ADC). Although pipelined ADC can achieve high sampling speed, it will introduce additional phase lag to the buck circuit. Along with the latency brought by processing time of additional digital circuits, as well as the time delay associated with the switching frequency, the closed loop will be unstable; moreover, raw ADC outputs have low signal-to-noise ratio, which usually need back-end calibration. In order to compensate these phase lag and make control loop unconditional stable, as well as boost up signal-to-noise ratio of the ADC block with cost-efficient design, a finite impulse response filter followed by digital proportional-integral-derivative blocks were designed. All these digital function blocks were optimised with processing speed. In the system simulation, it can be found that this controller achieved output regulation within 10% of nominal 5 V output voltage under 1 A/µs load transient condition; moreover, with the soft-start method, there is no turn-on overshooting. The die size of this controller is controlled within 3 mm2 by using 180 nm CMOS technology.

Application of digital control techniques for satellite medium power DC-DC converters

NASA Astrophysics Data System (ADS)

Skup, Konrad R.; Grudzinski, Pawel; Nowosielski, Witold; Orleanski, Piotr; Wawrzaszek, Roman

2010-09-01

The objective of this paper is to present a work concerning a digital control loop system for satellite medium power DC-DC converters that is done in Space Research Centre. The whole control process of a described power converter bases on a high speed digital signal processing. The paper presents a development of a FPGA digital controller for voltage mode stabilization that was implemented using VHDL. The described controllers are a classical digital PID controller and a bang-bang controller. The used converter for testing is a simple model of 5-20 W, 200 kHz buck power converter. A high resolution digital PWM approach is presented. Additionally a simple and effective solution of filtering of an analog-to-digital converter output is presented.

The multiple-function multi-input/multi-output digital controller system for the AFW wind-tunnel model

NASA Technical Reports Server (NTRS)

Hoadley, Sherwood T.; Mcgraw, Sandra M.

1992-01-01

A real time multiple-function digital controller system was developed for the Active Flexible Wing (AFW) Program. The digital controller system (DCS) allowed simultaneous execution of two control laws: flutter suppression and either roll trim or a rolling maneuver load control. The DCS operated within, but independently of, a slower host operating system environment, at regulated speeds up to 200 Hz. It also coordinated the acquisition, storage, and transfer of data for near real time controller performance evaluation and both open- and closed-loop plant estimation. It synchronized the operation of four different processing units, allowing flexibility in the number, form, functionality, and order of control laws, and variability in the selection of the sensors and actuators employed. Most importantly, the DCS allowed for the successful demonstration of active flutter suppression to conditions approximately 26 percent (in dynamic pressure) above the open-loop boundary in cases when the model was fixed in roll and up to 23 percent when it was free to roll. Aggressive roll maneuvers with load control were achieved above the flutter boundary. The purpose here is to present the development, validation, and wind tunnel testing of this multiple-function digital controller system.

Digital control algorithms for microgravity isolation systems

NASA Technical Reports Server (NTRS)

Sinha, Alok; Wang, Yung-Peng

1992-01-01

New digital control algorithms were developed to achieve the desired acceleration transmissibility function. The attractive electromagnets have been taken as actuators. The relative displacement and the acceleration of the mass were used as feedback signals. Two approaches were developed to find that controller transfer function in Z-domain, which yields the desired transmissibility at each frequency. In the first approach, the controller transfer function is obtained by assuming that the desired transmissibility is known in Z-domain. Since the desired transmissibility H sub d(S) = 1/(tauS+1)(exp 2) is given in S-domain, the first task is to obtain the desired transmissibility in Z-domain. There are three methods to perform this task: bilinear transformation, and backward and forward rectangular rules. The bilinear transformation and backward rectangular rule lead to improper controller transfer functions, which are physically not realizable. The forward rectangular rule does lead to a physically realizable controller. However, this controller is found to be marginally stable because of a pole at Z=1. In order to eliminate this pole, a hybrid control structure is proposed. Here the control input is composed of two parts: analog and digital. The analog input simply represents the velocity (or the integral of acceleration) feedback; and the digital controller which uses only relative displacement signal, is then obtained to achieve the desired closed-loop transfer function. The stability analysis indicates that the controller transfer function is stable for typical values of sampling period. In the second approach, the aforementioned hybrid control structure is again used. First, an analog controller transfer function corresponding to relative displacement feedback is obtained to achieve the transmissibility as 1/(tauS+1)(exp 2). Then the transfer function for the digital control input is obtained by discretizing this analog controller transfer function via bilinear transformation. The stability of the resulting Z-domain closed loop system is analyzed. Also, the frequency response of the Z-domain closed-loop transfer function is determined to evaluate the performance of the control system.

A study of digital gyro compensation loops. [data conversion routines and breadboard models

NASA Technical Reports Server (NTRS)

1975-01-01

The feasibility is discussed of replacing existing state-of-the-art analog gyro compensation loops with digital computations. This was accomplished by designing appropriate compensation loops for the dry turned TDF gyro, selecting appropriate data conversion and processing techniques and algorithms, and breadboarding the design for laboratory evaluation. A breadboard design was established in which one axis of a Teledyne turned-gimbal TDF gyro was caged digitally while the other was caged using conventional analog electronics. The digital loop was designed analytically to closely resemble the analog loop in performance. The breadboard was subjected to various static and dynamic tests in order to establish the relative stability characteristics and frequency responses of the digital and analog loops. Several variations of the digital loop configuration were evaluated. The results were favorable.

Implementation of Adaptive Digital Controllers on Programmable Logic Devices

NASA Technical Reports Server (NTRS)

Gwaltney, David A.; King, Kenneth D.; Smith, Keary J.; Ormsby, John (Technical Monitor)

2002-01-01

Much has been made of the capabilities of FPGA's (Field Programmable Gate Arrays) in the hardware implementation of fast digital signal processing (DSP) functions. Such capability also makes and FPGA a suitable platform for the digital implementation of closed loop controllers. There are myriad advantages to utilizing an FPGA for discrete-time control functions which include the capability for reconfiguration when SRAM- based FPGA's are employed, fast parallel implementation of multiple control loops and implementations that can meet space level radiation tolerance in a compact form-factor. Other researchers have presented the notion that a second order digital filter with proportional-integral-derivative (PID) control functionality can be implemented in an FPGA. At Marshall Space Flight Center, the Control Electronics Group has been studying adaptive discrete-time control of motor driven actuator systems using digital signal processor (DSF) devices. Our goal is to create a fully digital, flight ready controller design that utilizes an FPGA for implementation of signal conditioning for control feedback signals, generation of commands to the controlled system, and hardware insertion of adaptive control algorithm approaches. While small form factor, commercial DSP devices are now available with event capture, data conversion, pulse width modulated outputs and communication peripherals, these devices are not currently available in designs and packages which meet space level radiation requirements. Meeting our goals requires alternative compact implementation of such functionality to withstand the harsh environment encountered on spacecraft. Radiation tolerant FPGA's are a feasible option for reaching these goals.

Design and Benchmarking of a Network-In-the-Loop Simulation for Use in a Hardware-In-the-Loop System

NASA Technical Reports Server (NTRS)

Aretskin-Hariton, Eliot; Thomas, George; Culley, Dennis; Kratz, Jonathan

2017-01-01

Distributed engine control (DEC) systems alter aircraft engine design constraints because of fundamental differences in the input and output communication between DEC and centralized control architectures. The change in the way communication is implemented may create new optimum engine-aircraft configurations. This paper continues the exploration of digital network communication by demonstrating a Network-In-the-Loop simulation at the NASA Glenn Research Center. This simulation incorporates a real-time network protocol, the Engine Area Distributed Interconnect Network Lite (EADIN Lite), with the Commercial Modular Aero-Propulsion System Simulation 40k (C-MAPSS40k) software. The objective of this study is to assess digital control network impact to the control system. Performance is evaluated relative to a truth model for large transient maneuvers and a typical flight profile for commercial aircraft. Results show that a decrease in network bandwidth from 250 Kbps (sampling all sensors every time step) to 40 Kbps, resulted in very small differences in control system performance.

Design and Benchmarking of a Network-In-the-Loop Simulation for Use in a Hardware-In-the-Loop System

NASA Technical Reports Server (NTRS)

Aretskin-Hariton, Eliot D.; Thomas, George Lindsey; Culley, Dennis E.; Kratz, Jonathan L.

2017-01-01

Distributed engine control (DEC) systems alter aircraft engine design constraints be- cause of fundamental differences in the input and output communication between DEC and centralized control architectures. The change in the way communication is implemented may create new optimum engine-aircraft configurations. This paper continues the exploration of digital network communication by demonstrating a Network-In-the-Loop simulation at the NASA Glenn Research Center. This simulation incorporates a real-time network protocol, the Engine Area Distributed Interconnect Network Lite (EADIN Lite), with the Commercial Modular Aero-Propulsion System Simulation 40k (C-MAPSS40k) software. The objective of this study is to assess digital control network impact to the control system. Performance is evaluated relative to a truth model for large transient maneuvers and a typical flight profile for commercial aircraft. Results show that a decrease in network bandwidth from 250 Kbps (sampling all sensors every time step) to 40 Kbps, resulted in very small differences in control system performance.

Doppler extraction with a digital VCO

NASA Technical Reports Server (NTRS)

Starner, E. R.; Nossen, E. J.

1977-01-01

Digitally controlled oscillator in phased-locked loop may be useful for data communications systems, or may be modified to serve as information extraction component of microwave or optical system for collision avoidance or automatic braking. Instrument is frequency-synthesizing device with output specified precisely by digital number programmed into frequency register.

A hybrid analog-digital phase-locked loop for frequency mode non-contact scanning probe microscopy.

PubMed

Mehta, M M; Chandrasekhar, V

2014-01-01

Non-contact scanning probe microscopy (SPM) has developed into a powerful technique to image many different properties of samples. The conventional method involves monitoring the amplitude, phase, or frequency of a cantilever oscillating at or near its resonant frequency as it is scanned across the surface of a sample. For high Q factor cantilevers, monitoring the resonant frequency is the preferred method in order to obtain reasonable scan times. This can be done by using a phase-locked-loop (PLL). PLLs can be obtained as commercial integrated circuits, but these do not have the frequency resolution required for SPM. To increase the resolution, all-digital PLLs requiring sophisticated digital signal processors or field programmable gate arrays have also been implemented. We describe here a hybrid analog/digital PLL where most of the components are implemented using discrete analog integrated circuits, but the frequency resolution is provided by a direct digital synthesis chip controlled by a simple peripheral interface controller (PIC) microcontroller. The PLL has excellent frequency resolution and noise, and can be controlled and read by a computer via a universal serial bus connection.

A hybrid analog-digital phase-locked loop for frequency mode non-contact scanning probe microscopy

NASA Astrophysics Data System (ADS)

Mehta, M. M.; Chandrasekhar, V.

2014-01-01

Non-contact scanning probe microscopy (SPM) has developed into a powerful technique to image many different properties of samples. The conventional method involves monitoring the amplitude, phase, or frequency of a cantilever oscillating at or near its resonant frequency as it is scanned across the surface of a sample. For high Q factor cantilevers, monitoring the resonant frequency is the preferred method in order to obtain reasonable scan times. This can be done by using a phase-locked-loop (PLL). PLLs can be obtained as commercial integrated circuits, but these do not have the frequency resolution required for SPM. To increase the resolution, all-digital PLLs requiring sophisticated digital signal processors or field programmable gate arrays have also been implemented. We describe here a hybrid analog/digital PLL where most of the components are implemented using discrete analog integrated circuits, but the frequency resolution is provided by a direct digital synthesis chip controlled by a simple peripheral interface controller (PIC) microcontroller. The PLL has excellent frequency resolution and noise, and can be controlled and read by a computer via a universal serial bus connection.

Design and implementation of a hybrid digital phase-locked loop with a TMS320C25: An application to a transponder receiver breadboard

NASA Technical Reports Server (NTRS)

Yeh, H.-G.; Nguyen, T. M.

1994-01-01

Design, modeling, analysis, and simulation of a phase-locked loop (PLL) with a digital loop filter are presented in this article. A TMS320C25 digital signal processor (DSP) is used to implement this digital loop filter. In order to keep the compatibility, the main design goal was to replace the analog PLL (APLL) of the Deep-Space Transponder (DST) receiver breadboard's loop filter with a digital loop filter without changing anything else. This replacement results in a hybrid digital PLL (HDPLL). Both the original APLL and the designed HDPLL are Type I second-order systems. The real-time performance of the HDPLL and the receiver is provided and evaluated.

A microprocessor-based real-time simulator of a turbofan engine

NASA Technical Reports Server (NTRS)

Litt, Jonathan S.; Delaat, John C.; Merrill, Walter C.

1988-01-01

A real-time digital simulator of a Pratt and Whitney F 100 engine is discussed. This self-contained unit can operate in an open-loop stand-alone mode or as part of a closed-loop control system. It can also be used in control system design and development. It accepts five analog control inputs and its sixteen outputs are returned as analog signals.

All-digital GPS receiver mechanization

NASA Astrophysics Data System (ADS)

Ould, P. C.; van Wechel, R. J.

The paper describes the all-digital baseband correlation processing of GPS signals, which is characterized by (1) a potential for improved antijamming performance, (2) fast acquisition by a digital matched filter, (3) reduction of adjustment, (4) increased system reliability, and (5) provision of a basis for the realization of a high degree of VLSI potential for the development of small economical GPS sets. The basic technical approach consists of a broadband fix-tuned RF converter followed by a digitizer; digital-matched-filter acquisition section; phase- and delay-lock tracking via baseband digital correlation; software acquisition logic and loop filter implementation; and all-digital implementation of the feedback numerical controlled oscillators and code generator. Broadband in-phase and quadrature tracking is performed by an arctangent angle detector followed by a phase-unwrapping algorithm that eliminates false locks induced by sampling and data bit transitions, and yields a wide pull-in frequency range approaching one-fourth of the loop iteration frequency.

Characterization and Design of Digital Pointing Subsystem for Optical Communication Demonstrator

NASA Technical Reports Server (NTRS)

Racho, C.; Portillo, A.

1998-01-01

The Optical Communications Demonstrator (OCD) is a laboratory-based lasercom demonstration terminal designed to validate several key technologies, including beacon acquisition, high bandwidth tracking, precision bearn pointing, and point-ahead compensation functions. It has been under active development over the past few years. The instrument uses a CCD array detector for both spatial acquisition and high-bandwidth tracking, and a fiber coupled laser transmitter. The array detector tracking concept provides wide field-of-view acquisition and permits effective platform jitter compensation and point-ahead control using only one steering mirror. This paper describes the detailed design and characterization of the digital control loop system which includes the Fast Steering Mirror (FSM), the CCD image tracker, and the associated electronics. The objective is to improve the overall system performance using laboratory measured data. The. design of the digital control loop is based on a linear time invariant open loop model. The closed loop performance is predicted using the theoretical model. With the digital filter programmed into the OCD control software, data is collected to verify the predictions. This paper presents the results of the, system modeling and performance analysis. It has been shown that measurement data closely matches theoretical predictions. An important part of the laser communication experiment is the ability of FSM to track the laser beacon within the. required tolerances. The pointing must be maintained to an accuracy that is much smaller than the transmit signal beamwidth. For an earth orbit distance, the system must be able to track the receiving station to within a few microradians. The failure. to do so will result in a severely degraded system performance.

Controlling the trajectories of bubble trains at a microfluidic junction

NASA Astrophysics Data System (ADS)

Parthiban, Pravien; Khan, Saif

2011-11-01

The increasing number of applications facilitated by digital microfluidic flows has resulted in a sustained interest in not only understanding the diverse, interesting and often complex dynamics associated with such flows in microchannel networks but also in developing facile strategies to control them. We find that there are readily accessible flow speeds wherein resistance to flow in microchannels decreases with an increase in the number of confined bubbles present, and exploit this intriguing phenomenon to sort all bubble of a train exclusively into one of the arms of a nominally symmetric microfluidic loop. We also demonstrate how the arm into which the train filters into can be chosen by applying a temporary external stimulus by means of an additional flow of the continuous liquid into one the arms of the loop. Furthermore, we show how by tuning the magnitude and period of this temporary stimulus we can switch controllably, the traffic of bubbles between both arms of the loop even when the loop is asymmetric. The results of this work should aid in developing viable methods to regulate traffic of digital flows in microfluidic networks.

A class of optimum digital phase locked loops for the DSN advanced receiver

NASA Technical Reports Server (NTRS)

Hurd, W. J.; Kumar, R.

1985-01-01

A class of optimum digital filters for digital phase locked loop of the deep space network advanced receiver is discussed. The filter minimizes a weighted combination of the variance of the random component of the phase error and the sum square of the deterministic dynamic component of phase error at the output of the numerically controlled oscillator (NCO). By varying the weighting coefficient over a suitable range of values, a wide set of filters are obtained such that, for any specified value of the equivalent loop-noise bandwidth, there corresponds a unique filter in this class. This filter thus has the property of having the best transient response over all possible filters of the same bandwidth and type. The optimum filters are also evaluated in terms of their gain margin for stability and their steady-state error performance.

Parallel Digital Phase-Locked Loops

NASA Technical Reports Server (NTRS)

Sadr, Ramin; Shah, Biren N.; Hinedi, Sami M.

1995-01-01

Wide-band microwave receivers of proposed type include digital phase-locked loops in which band-pass filtering and down-conversion of input signals implemented by banks of multirate digital filters operating in parallel. Called "parallel digital phase-locked loops" to distinguish them from other digital phase-locked loops. Systems conceived as cost-effective solution to problem of filtering signals at high sampling rates needed to accommodate wide input frequency bands. Each of M filters process 1/M of spectrum of signal.

Flight test of a full authority Digital Electronic Engine Control system in an F-15 aircraft

NASA Technical Reports Server (NTRS)

Barrett, W. J.; Rembold, J. P.; Burcham, F. W.; Myers, L.

1981-01-01

The Digital Electronic Engine Control (DEEC) system considered is a relatively low cost digital full authority control system containing selectively redundant components and fault detection logic with capability for accommodating faults to various levels of operational capability. The DEEC digital control system is built around a 16-bit, 1.2 microsecond cycle time, CMOS microprocessor, microcomputer system with approximately 14 K of available memory. Attention is given to the control mode, component bench testing, closed loop bench testing, a failure mode and effects analysis, sea-level engine testing, simulated altitude engine testing, flight testing, the data system, cockpit, and real time display.

A class of all digital phase locked loops - Modeling and analysis

NASA Technical Reports Server (NTRS)

Reddy, C. P.; Gupta, S. C.

1973-01-01

An all digital phase locked loop which tracks the phase of the incoming signal once per carrier cycle is proposed. The different elements and their functions, and the phase lock operation are explained in detail. The general digital loop operation is governed by a nonlinear difference equation from which a suitable model is developed. The lock range for the general model is derived. The performance of the digital loop for phase step and frequency step inputs for different levels of quantization without loop filter are studied. The analytical results are checked by simulating the actual system on the digital computer.

Structural response synthesis

DOE Office of Scientific and Technical Information (OSTI.GOV)

Ozisik, H.; Keltie, R.F.

The open loop control technique of predicting a conditioned input signal based on a specified output response for a second order system has been analyzed both analytically and numerically to gain a firm understanding of the method. Differences between this method of control and digital closed loop control using pole cancellation were investigated as a follow up to previous experimental work. Application of the technique to diamond turning using a fast tool is also discussed.

Digital synchronization and communication techniques

NASA Technical Reports Server (NTRS)

Lindsey, William C.

1992-01-01

Information on digital synchronization and communication techniques is given in viewgraph form. Topics covered include phase shift keying, modems, characteristics of open loop digital synchronizers, an open loop phase and frequency estimator, and a digital receiver structure using an open loop estimator in a decision directed architecture.

Real-time Simulation of Turboprop Engine Control System

NASA Astrophysics Data System (ADS)

Sheng, Hanlin; Zhang, Tianhong; Zhang, Yi

2017-05-01

On account of the complexity of turboprop engine control system, real-time simulation is the technology, under the prerequisite of maintaining real-time, to effectively reduce development cost, shorten development cycle and avert testing risks. The paper takes RT-LAB as a platform and studies the real-time digital simulation of turboprop engine control system. The architecture, work principles and external interfaces of RT-LAB real-time simulation platform are introduced firstly. Then based on a turboprop engine model, the control laws of propeller control loop and fuel control loop are studied. From that and on the basis of Matlab/Simulink, an integrated controller is designed which can realize the entire process control of the engine from start-up to maximum power till stop. At the end, on the basis of RT-LAB platform, the real-time digital simulation of the designed control system is studied, different regulating plans are tried and more ideal control effects have been obtained.

A class of all digital phase locked loops - Modelling and analysis.

NASA Technical Reports Server (NTRS)

Reddy, C. P.; Gupta, S. C.

1972-01-01

An all digital phase locked loop which tracks the phase of the incoming signal once per carrier cycle is proposed. The different elements and their functions, and the phase lock operation are explained in detail. The general digital loop operation is governed by a non-linear difference equation from which a suitable model is developed. The lock range for the general model is derived. The performance of the digital loop for phase step, and frequency step inputs for different levels of quantization without loop filter, are studied. The analytical results are checked by simulating the actual system on the digital computer.

A Closed-Loop Proportional-Integral (PI) Control Software for Fully Mechanically Controlled Automated Electron Microscopic Tomography

DOE Office of Scientific and Technical Information (OSTI.GOV)

REN, GANG; LIU, JINXIN; LI, HONGCHANG

A closed-loop proportional-integral (PI) control software is provided for fully mechanically controlled automated electron microscopic tomography. The software is developed based on Gatan DigitalMicrograph, and is compatible with Zeiss LIBRA 120 transmission electron microscope. However, it can be expanded to other TEM instrument with modification. The software consists of a graphical user interface, a digital PI controller, an image analyzing unit, and other drive units (i.e.: image acquire unit and goniometer drive unit). During a tomography data collection process, the image analyzing unit analyzes both the accumulated shift and defocus value of the latest acquired image, and provides the resultsmore » to the digital PI controller. The digital PI control compares the results with the preset values and determines the optimum adjustments of the goniometer. The goniometer drive unit adjusts the spatial position of the specimen according to the instructions given by the digital PI controller for the next tilt angle and image acquisition. The goniometer drive unit achieves high precision positioning by using a backlash elimination method. The major benefits of the software are: 1) the goniometer drive unit keeps pre-aligned/optimized beam conditions unchanged and achieves position tracking solely through mechanical control; 2) the image analyzing unit relies on only historical data and therefore does not require additional images/exposures; 3) the PI controller enables the system to dynamically track the imaging target with extremely low system error.« less

The design of multirate digital control systems

NASA Technical Reports Server (NTRS)

Berg, M. C.

1986-01-01

The successive loop closures synthesis method is the only method for multirate (MR) synthesis in common use. A new method for MR synthesis is introduced which requires a gradient-search solution to a constrained optimization problem. Some advantages of this method are that the control laws for all control loops are synthesized simultaneously, taking full advantage of all cross-coupling effects, and that simple, low-order compensator structures are easily accomodated. The algorithm and associated computer program for solving the constrained optimization problem are described. The successive loop closures , optimal control, and constrained optimization synthesis methods are applied to two example design problems. A series of compensator pairs are synthesized for each example problem. The succesive loop closure, optimal control, and constrained optimization synthesis methods are compared, in the context of the two design problems.

A control system design approach for flexible spacecraft

NASA Technical Reports Server (NTRS)

Silverberg, L. M.

1985-01-01

A control system design approach for flexible spacecraft is presented. The control system design is carried out in two steps. The first step consists of determining the ideal control system in terms of a desirable dynamic performance. The second step consists of designing a control system using a limited number of actuators that possess a dynamic performance that is close to the ideal dynamic performance. The effects of using a limited number of actuators is that the actual closed-loop eigenvalues differ from the ideal closed-loop eigenvalues. A method is presented to approximate the actual closed-loop eigenvalues so that the calculation of the actual closed-loop eigenvalues can be avoided. Depending on the application, it also may be desirable to apply the control forces as impulses. The effect of digitizing the control to produce the appropriate impulses is also examined.

Single-Event Upset Characterization of Common First- and Second-Order All-Digital Phase-Locked Loops

NASA Astrophysics Data System (ADS)

Chen, Y. P.; Massengill, L. W.; Kauppila, J. S.; Bhuva, B. L.; Holman, W. T.; Loveless, T. D.

2017-08-01

The single-event upset (SEU) vulnerability of common first- and second-order all-digital-phase-locked loops (ADPLLs) is investigated through field-programmable gate array-based fault injection experiments. SEUs in the highest order pole of the loop filter and fraction-based phase detectors (PDs) may result in the worst case error response, i.e., limit cycle errors, often requiring system restart. SEUs in integer-based linear PDs may result in loss-of-lock errors, while SEUs in bang-bang PDs only result in temporary-frequency errors. ADPLLs with the same frequency tuning range but fewer bits in the control word exhibit better overall SEU performance.

Association between digital dermatoglyphics and handedness among Sinhalese in Sri Lanka

PubMed Central

Wijerathne, Buddhika TB; Rathnayake, Geetha K

2013-01-01

Background The relationship between handedness and digital dermatoglyphic patterns has never been investigated in the Sinhalese population. The goal of this study is to establish the above mentioned relationship, which would positively aid personal identification.  Findings One hundred forty Sinhalese students (70 right-handed and 70 left-handed) were studied for their digital dermatoglyphic pattern distribution. The results show that a statistically significant correlation exists for; digit 5 (Ulnar loop; P= 0.0449 and radial loop; P= 0.0248 by Fisher’s exact test) of the right hand in female, digit 1 (radial loop; P=0.0248 by Fisher’s exact test) and digit 2 (Ulnar loop; P=0.0306) of the left hand in females, digit 3 (Ulnar loop; P= 0.0486 and whorl; P= 0.0356 by Fisher’s exact test) and digit 4 (Ulnar loop; P= 0.0449 and whorl; P= 0.0301 by Fisher’s exact test) of the right hand in males, digit 4 (whorl; P=0.0160 by Fisher’s exact test) of the left hand in males. Conclusions  Statistically significant differences in handedness and digital dermatoglyphic patterns were evident among Sinhalese people. Further study with a larger sample size is recommended. PMID:24627780

An agile high-capacity FDMA digital satellite network

NASA Astrophysics Data System (ADS)

Hawkins, R. B.; Johannes, V. I.; Lowell, R.

A centrally controlled digital transmission satellite network has been designed for High Speed Switched Digital Service (HSSDS), which uses both satellite and earth transmission facilities to provide point-to-point digital trunks on a reservation basis. HSSDS customers connect via 1.544 Mb/s loops to the nodes where switches are located, and the FDMA system employed offers 24 one-way 1.544 Mb/s trunks per satellite transponder.

A Nonlinear Digital Control Solution for a DC/DC Power Converter

NASA Technical Reports Server (NTRS)

Zhu, Minshao

2002-01-01

A digital Nonlinear Proportional-Integral-Derivative (NPID) control algorithm was proposed to control a 1-kW, PWM, DC/DC, switching power converter. The NPID methodology is introduced and a practical hardware control solution is obtained. The design of the controller was completed using Matlab (trademark) Simulink, while the hardware-in-the-loop testing was performed using both the dSPACE (trademark) rapid prototyping system, and a stand-alone Texas Instruments (trademark) Digital Signal Processor (DSP)-based system. The final Nonlinear digital control algorithm was implemented and tested using the ED408043-1 Westinghouse DC-DC switching power converter. The NPID test results are discussed and compared to the results of a standard Proportional-Integral (PI) controller.

Data Driven Synthesis of Three Term Digital Controllers

NASA Astrophysics Data System (ADS)

Keel, Lee H.; Mitra, Sandipan; Bhattacharyya, Shankar P.

This paper presents a method for digital PID and first order controller synthesis based on frequency domain data alone. The techniques given here first determine all stabilizing controllers from measurement data. In both PID and first order controller cases, the only information required are frequency domain data (Nyquist-Bode data) and the number of open-loop RHP poles. Specifically no identification of the plant model is required. Examples are given for illustration.

Phase-locked loops. [in analog and digital circuits communication system

NASA Technical Reports Server (NTRS)

Gupta, S. C.

1975-01-01

An attempt to systematically outline the work done in the area of phase-locked loops which are now used in modern communication system design is presented. The analog phase-locked loops are well documented in several books but discrete, analog-digital, and digital phase-locked loop work is scattered. Apart from discussing the various analysis, design, and application aspects of phase-locked loops, a number of references are given in the bibliography.

Finite-dimensional modeling of network-induced delays for real-time control systems

NASA Technical Reports Server (NTRS)

Ray, Asok; Halevi, Yoram

1988-01-01

In integrated control systems (ICS), a feedback loop is closed by the common communication channel, which multiplexes digital data from the sensor to the controller and from the controller to the actuator along with the data traffic from other control loops and management functions. Due to asynchronous time-division multiplexing in the network access protocols, time-varying delays are introduced in the control loop, which degrade the system dynamic performance and are a potential source of instability. The delayed control system is represented by a finite-dimensional, time-varying, discrete-time model which is less complex than the existing continuous-time models for time-varying delays; this approach allows for simpler schemes for analysis and simulation of the ICS.

A rationale for human operator pulsive control behavior

NASA Technical Reports Server (NTRS)

Hess, R. A.

1979-01-01

When performing tracking tasks which involve demanding controlled elements such as those with K/s-squared dynamics, the human operator often develops discrete or pulsive control outputs. A dual-loop model of the human operator is discussed, the dominant adaptive feature of which is the explicit appearance of an internal model of the manipulator-controlled element dynamics in an inner feedback loop. Using this model, a rationale for pulsive control behavior is offered which is based upon the assumption that the human attempts to reduce the computational burden associated with time integration of sensory inputs. It is shown that such time integration is a natural consequence of having an internal representation of the K/s-squared-controlled element dynamics in the dual-loop model. A digital simulation is discussed in which a modified form of the dual-loop model is shown to be capable of producing pulsive control behavior qualitively comparable to that obtained in experiment.

Design of a Closed-Loop, Bidirectional Brain Machine Interface System With Energy Efficient Neural Feature Extraction and PID Control.

PubMed

Liu, Xilin; Zhang, Milin; Richardson, Andrew G; Lucas, Timothy H; Van der Spiegel, Jan

2017-08-01

This paper presents a bidirectional brain machine interface (BMI) microsystem designed for closed-loop neuroscience research, especially experiments in freely behaving animals. The system-on-chip (SoC) consists of 16-channel neural recording front-ends, neural feature extraction units, 16-channel programmable neural stimulator back-ends, in-channel programmable closed-loop controllers, global analog-digital converters (ADC), and peripheral circuits. The proposed neural feature extraction units includes 1) an ultra low-power neural energy extraction unit enabling a 64-step natural logarithmic domain frequency tuning, and 2) a current-mode action potential (AP) detection unit with time-amplitude window discriminator. A programmable proportional-integral-derivative (PID) controller has been integrated in each channel enabling a various of closed-loop operations. The implemented ADCs include a 10-bit voltage-mode successive approximation register (SAR) ADC for the digitization of the neural feature outputs and/or local field potential (LFP) outputs, and an 8-bit current-mode SAR ADC for the digitization of the action potential outputs. The multi-mode stimulator can be programmed to perform monopolar or bipolar, symmetrical or asymmetrical charge balanced stimulation with a maximum current of 4 mA in an arbitrary channel configuration. The chip has been fabricated in 0.18 μ m CMOS technology, occupying a silicon area of 3.7 mm 2 . The chip dissipates 56 μW/ch on average. General purpose low-power microcontroller with Bluetooth module are integrated in the system to provide wireless link and SoC configuration. Methods, circuit techniques and system topology proposed in this work can be used in a wide range of relevant neurophysiology research, especially closed-loop BMI experiments.

Optimizing the feedback control of Galvo scanners for laser manufacturing systems

NASA Astrophysics Data System (ADS)

Mirtchev, Theodore; Weeks, Robert; Minko, Sergey

2010-06-01

This paper summarizes the factors that limit the performance of moving-magnet galvo scanners driven by closed-loop digital servo amplifiers: torsional resonances, drifts, nonlinearities, feedback noise and friction. Then it describes a detailed Simulink® simulator that takes into account these factors and can be used to automatically tune the controller for best results with given galvo type and trajectory patterns. It allows for rapid testing of different control schemes, for instance combined position/velocity PID loops and displays the corresponding output in terms of torque, angular position and feedback sensor signal. The tool is configurable and can either use a dynamical state-space model of galvo's open-loop response, or can import the experimentally measured frequency domain transfer function. Next a drive signal digital pre-filtering technique is discussed. By performing a real-time Fourier analysis of the raw command signal it can be pre-warped to minimize all harmonics around the torsional resonances while boosting other non-resonant high frequencies. The optimized waveform results in much smaller overshoot and better settling time. Similar performance gain cannot be extracted from the servo controller alone.

Optimum design of hybrid phase locked loops

NASA Technical Reports Server (NTRS)

Lee, P.; Yan, T.

1981-01-01

The design procedure of phase locked loops is described in which the analog loop filter is replaced by a digital computer. Specific design curves are given for the step and ramp input changes in phase. It is shown that the designed digital filter depends explicitly on the product of the sampling time and the noise bandwidth of the phase locked loop. This technique of optimization can be applied to the design of digital analog loops for other applications.

Effects of backlash and dead band on temperature control of the primary loop of a conceptual nuclear Brayton space powerplant

NASA Technical Reports Server (NTRS)

Petrick, E. J.

1973-01-01

An analytical study was made of the stability of a closed-loop liquid-lithium temperature control of the primary loop of a conceptual nuclear Brayton space powerplant. The operating point was varied from 20 to 120 percent of design. A describing-function technique was used to evaluate the effects of temperature dead band and control coupling backlash. From the system investigation, it was predicted that a limit cycle will not exist with a temperature dead band, but a limit cycle will not exist when backlash is present. The results compare favorably with a digital computer simulation.

Analysis of first and second order binary quantized digital phase-locked loops for ideal and white Gaussian noise inputs

NASA Technical Reports Server (NTRS)

Blasche, P. R.

1980-01-01

Specific configurations of first and second order all digital phase locked loops are analyzed for both ideal and additive white gaussian noise inputs. In addition, a design for a hardware digital phase locked loop capable of either first or second order operation is presented along with appropriate experimental data obtained from testing of the hardware loop. All parameters chosen for the analysis and the design of the digital phase locked loop are consistent with an application to an Omega navigation receiver although neither the analysis nor the design are limited to this application.

The trend of digital control system design for nuclear power plants in Korea

DOE Office of Scientific and Technical Information (OSTI.GOV)

Park, S. H.; Jung, H. Y.; Yang, C. Y.

2006-07-01

Currently there are 20 nuclear power plants (NPPs) in operation, and 6 more units are under construction in Korea. The control systems of those NPPs have also been developed together with the technology advancement. Control systems started with On-Off control using the relay logic, had been evolved into Solid-State logic using TTL ICs, and applied with the micro-processors since the Yonggwang NPP Units 3 and 4 which started its construction in 1989. Multiplexers are also installed at the local plant areas to collect field input and to send output signals while communicating with the controllers located in the system cabinetsmore » near the main control room in order to reduce the field wiring cables. The design of the digital control system technology for the NPPs in Korea has been optimized to maximize the operability as well as the safety through the design, construction, start-up and operation experiences. Both Shin-Kori Units 1 and 2 and Shin-Wolsong Units 1 and 2 NPP projects under construction are being progressed at the same time. Digital Plant Control Systems of these projects have adopted multi-loop controllers, redundant loop configuration, and soft control system for the radwaste system. Programmable Logic Controller (PLC) and Distributed Control System (DCS) are applied with soft control system in Shin-Kori Units 3 and 4. This paper describes the evolvement of control system at the NPPs in Korea and the experience and design improvement through the observation of the latest failure of the digital control system. In addition, design concept and its trend of the digital control system being applied to the NPP in Korea are introduced. (authors)« less

Binary phase locked loops for Omega receivers

NASA Technical Reports Server (NTRS)

Chamberlin, K.

1974-01-01

An all-digital phase lock loop (PLL) is considered because of a number of problems inherent in an employment of analog PLL. The digital PLL design presented solves these problems. A single loop measures all eight Omega time slots. Memory-aiding leads to the name of this design, the memory-aided phase lock loop (MAPLL). Basic operating principles are discussed and the superiority of MAPLL over the conventional digital phase lock loop with regard to the operational efficiency for Omega applications is demonstrated.

A Network Scheduling Model for Distributed Control Simulation

NASA Technical Reports Server (NTRS)

Culley, Dennis; Thomas, George; Aretskin-Hariton, Eliot

2016-01-01

Distributed engine control is a hardware technology that radically alters the architecture for aircraft engine control systems. Of its own accord, it does not change the function of control, rather it seeks to address the implementation issues for weight-constrained vehicles that can limit overall system performance and increase life-cycle cost. However, an inherent feature of this technology, digital communication networks, alters the flow of information between critical elements of the closed-loop control. Whereas control information has been available continuously in conventional centralized control architectures through virtue of analog signaling, moving forward, it will be transmitted digitally in serial fashion over the network(s) in distributed control architectures. An underlying effect is that all of the control information arrives asynchronously and may not be available every loop interval of the controller, therefore it must be scheduled. This paper proposes a methodology for modeling the nominal data flow over these networks and examines the resulting impact for an aero turbine engine system simulation.

FIR digital filter-based ZCDPLL for carrier recovery

NASA Astrophysics Data System (ADS)

Nasir, Qassim

2016-04-01

The objective of this work is to analyse the performance of the newly proposed two-tap FIR digital filter-based first-order zero-crossing digital phase-locked loop (ZCDPLL) in the absence or presence of additive white Gaussian noise (AWGN). The introduction of the two-tap FIR digital filter widens the lock range of a ZCDPLL and improves the loop's operation in the presence of AWGN. The FIR digital filter tap coefficients affect the loop convergence behaviour and appropriate selection of those gains should be taken into consideration. The new proposed loop has wider locking range and faster acquisition time and reduces the phase error variations in the presence of noise.

Digital phase-locked loop

NASA Technical Reports Server (NTRS)

Cliff, R. A. (Inventor)

1975-01-01

An digital phase-locked loop is provided for deriving a loop output signal from an accumulator output terminal. A phase detecting exclusive OR gate is fed by the loop digital input and output signals. The output of the phase detector is a bi-level digital signal having a duty cycle indicative of the relative phase of the input and output signals. The accumulator is incremented at a first rate in response to a first output level of the phase detector and at a second rate in response to a second output level of the phase detector.

High precision locating control system based on VCM for Talbot lithography

NASA Astrophysics Data System (ADS)

Yao, Jingwei; Zhao, Lixin; Deng, Qian; Hu, Song

2016-10-01

Aiming at the high precision and efficiency requirements of Z-direction locating in Talbot lithography, a control system based on Voice Coil Motor (VCM) was designed. In this paper, we built a math model of VCM and its moving characteristic was analyzed. A double-closed loop control strategy including position loop and current loop were accomplished. The current loop was implemented by driver, in order to achieve the rapid follow of the system current. The position loop was completed by the digital signal processor (DSP) and the position feedback was achieved by high precision linear scales. Feed forward control and position feedback Proportion Integration Differentiation (PID) control were applied in order to compensate for dynamic lag and improve the response speed of the system. And the high precision and efficiency of the system were verified by simulation and experiments. The results demonstrated that the performance of Z-direction gantry was obviously improved, having high precision, quick responses, strong real-time and easily to expend for higher precision.

A fuzzy control design case: The fuzzy PLL

NASA Technical Reports Server (NTRS)

Teodorescu, H. N.; Bogdan, I.

1992-01-01

The aim of this paper is to present a typical fuzzy control design case. The analyzed controlled systems are the phase-locked loops (PLL's)--classic systems realized in both analogic and digital technology. The crisp PLL devices are well known.

Optimal space communications techniques. [using digital and phase locked systems for signal processing

NASA Technical Reports Server (NTRS)

Schilling, D. L.

1974-01-01

Digital multiplication of two waveforms using delta modulation (DM) is discussed. It is shown that while conventional multiplication of two N bit words requires N2 complexity, multiplication using DM requires complexity which increases linearly with N. Bounds on the signal-to-quantization noise ratio (SNR) resulting from this multiplication are determined and compared with the SNR obtained using standard multiplication techniques. The phase locked loop (PLL) system, consisting of a phase detector, voltage controlled oscillator, and a linear loop filter, is discussed in terms of its design and system advantages. Areas requiring further research are identified.

Verbal Short-term Memory in Down's Syndrome: An Articulatory Loop Deficit?

ERIC Educational Resources Information Center

Vicari, S.; Marotta, L.; Carlesimo, G. A.

2004-01-01

Verbal short-term memory, as measured by digit or word span, is generally impaired in individuals with Down's syndrome (DS) compared to mental age-matched controls. Moving from the working memory model, the present authors investigated the hypothesis that impairment in some of the articulatory loop sub-components is at the base of the deficient…

All-digital phase-lock loops for noise-free signals

NASA Technical Reports Server (NTRS)

Anderson, T. O.

1973-01-01

Bit-synchronizers utilize all-digital phase-lock loops that are referenced to a high frequency digital clock. Phase-lock loop of first design acquires frequency within nominal range and tracks phase; second design is modified for random binary data by addition of simple transition detector; and third design acquires frequency over wide dynamic range.

Hybrid suboptimal control of multi-rate multi-loop sampled-data systems

NASA Technical Reports Server (NTRS)

Shieh, Leang S.; Chen, Gwangchywan; Tsai, Jason S. H.

1992-01-01

A hybrid state-space controller is developed for suboptimal digital control of multirate multiloop multivariable continuous-time systems. First, an LQR is designed for a continuous-time subsystem which has a large bandwidth and is connnected in the inner loop of the overall system. The designed LQR would optimally place the eigenvalues of a closed-loop subsystem in the common region of an open sector bounded by sector angles + or - pi/2k for k = 2 or 3 from the negative real axis and the left-hand side of a vertical line on the negative real axis in the s-plane. Then, the developed continuous-time state-feedback gain is converted into an equivalent fast-rate discrete-time state-feedback gain via a digital redesign technique (Tsai et al. 1989, Shieh et al. 1990) reviewed here. A real state reconstructor is redeveloped utilizing the fast-rate input-output data of the system of interest. The design procedure of multiloop multivariable systems using multirate samplers is shown, and a terminal homing missile system example is used to demonstrate the effectiveness of the proposed method.

Novel All Digital Ring Cavity Locking Servo

NASA Astrophysics Data System (ADS)

Baker, J.; Gallant, D.; Lucero, A.; Miller, H.; Stohs, J.

We plan to use this servo in the new 50W 589-nm sodium guidestar laser to be installed in the AMOS facility in July 2010. Though the basic design is unchanged from the successful Hillman/Denman design, numerous improvements are being implemented in order to bring the device even further out of the lab and into the field. The basic building block of the Hillman/Denman design are two low noise master oscillators that are injected into higher power slave oscillators that are locked to the frequencies of the master oscillator cavities. In the previous system a traditional analog Pound-Drever-Hall (PDH) loop was employed to provide the frequency locking. Analog servos work well, in general, but robust locking for a complex set of multiply-interconnected PDH servos in the guidestar source challenges existing analog approaches. One of the significant changes demonstrated thus far is the implementation of an all-digital servo using only COTS components and a fast CISC processing architecture for orchestrating the basic PDH loops active within system. Compared to the traditionally used analog servo loops, an all-digital servo is a not only an orders-of-magnitude simpler servo loop to implement but the control loop can be modified by merely changing the computer code. Field conditions are often different from laboratory conditions, requiring subtle algorithm changes, and physical accessibility in the field is generally limited and difficult. Remotely implemented, trimmer-less and solderless servo upgrades are a much welcomed improvement in the field installed guidestar system. Also, OEM replacement of usual benchtop components saves considerable space and weight as well in the locking system. We will report on the details of the servo system and recent experimental results locking a master-slave laser oscillator system using the all-digital Pound-Drever-Hall loop.

All optical coherent receiver for self-homodyne detection of digitally phase modulated optical signals

NASA Astrophysics Data System (ADS)

Kiasaleh, Kamran

1994-02-01

A novel optical phase-locked loop (OPLL) system for the self-homodyne detection of digitally phase modulated optical signals is introduced. A Mach-Zehnder type interferometer is used to self-homodyne binary phase-modulated optical signals with an external phase modulator inserted in the control arm of the interferometer.

Suppressing Transients In Digital Phase-Locked Loops

NASA Technical Reports Server (NTRS)

Thomas, J. B.

1993-01-01

Loop of arbitrary order starts in steady-state lock. Method for initializing variables of digital phase-locked loop reduces or eliminates transients in phase and frequency typically occurring during acquisition of lock on signal or when changes made in values of loop-filter parameters called "loop constants". Enables direct acquisition by third-order loop without prior acquisition by second-order loop of greater bandwidth, and eliminates those perturbations in phase and frequency lock occurring when loop constants changed by arbitrarily large amounts.

A 16-Channel CMOS Chopper-Stabilized Analog Front-End ECoG Acquisition Circuit for a Closed-Loop Epileptic Seizure Control System.

PubMed

Wu, Chung-Yu; Cheng, Cheng-Hsiang; Chen, Zhi-Xin

2018-06-01

In this paper, a 16-channel analog front-end (AFE) electrocorticography signal acquisition circuit for a closed-loop seizure control system is presented. It is composed of 16 input protection circuits, 16 auto-reset chopper-stabilized capacitive-coupled instrumentation amplifiers (AR-CSCCIA) with bandpass filters, 16 programmable transconductance gain amplifiers, a multiplexer, a transimpedance amplifier, and a 128-kS/s 10-bit delta-modulated successive-approximation-register analog-to-digital converter (SAR ADC). In closed-loop seizure control system applications, the stimulator shares the same electrode with the AFE amplifier for effective suppression of epileptic seizures. To prevent from overstress in MOS devices caused by high stimulation voltage, an input protection circuit with a high-voltage-tolerant switch is proposed for the AFE amplifier. Moreover, low input-referred noise is achieved by using the chopper modulation technique in the AR-CSCCIA. To reduce the undesired effects of chopper modulation, an improved offset reduction loop is proposed to reduce the output offset generated by input chopper mismatches. The digital ripple reduction loop is also used to reduce the chopper ripple. The fabricated AFE amplifier has 49.1-/59.4-/67.9-dB programmable gain and 2.02-μVrms input referred noise in a bandwidth of 0.59-117 Hz. The measured power consumption of the AFE amplifier is 3.26 μW per channel, and the noise efficiency factor is 3.36. The in vivo animal test has been successfully performed to verify the functions. It is shown that the proposed AFE acquisition circuit is suitable for implantable closed-loop seizure control systems.

Micromechanical torsional digital-to-analog converter for open-loop angular positioning applications

NASA Astrophysics Data System (ADS)

Zhou, Guangya; Tay, Francis E. H.; Chau, Fook Siong; Zhao, Yi; Logeeswaran, VJ

2004-05-01

This paper reports a novel micromechanical torsional digital-to-analog converter (MTDAC), operated in open-loop with digitally controlled precise multi-level tilt angles. The MTDAC mechanism presented is analogous to that of an electrical binary-weighted-input digital-to-analog converter (DAC). It consists of a rigid tunable platform, an array of torsional microactuators, each operating in a two-state (on/off) mode, and a set of connection beams with binary-weighted torsional stiffnesses that connect the actuators to the platform. The feasibility of the proposed MTDAC mechanism was verified numerically by finite element simulations and experimentally with a commercial optical phase-shifting interferometric system. A prototype 2-bit MTDAC was implemented using the poly-MUMPS process achieving a full-scale output tilt angle of 1.92° with a rotation step of 0.64°. This mechanism can be configured for many promising applications, particularly in beam steering-based OXC switches.

Digital accumulators in phase and frequency tracking loops

NASA Technical Reports Server (NTRS)

Hinedi, Sami; Statman, Joseph I.

1990-01-01

Results on the effects of digital accumulators in phase and frequency tracking loops are presented. Digital accumulators or summers are used extensively in digital signal processing to perform averaging or to reduce processing rates to acceptable levels. For tracking the Doppler of high-dynamic targets at low carrier-to-noise ratios, it is shown through simulation and experiment that digital accumulators can contribute an additional loss in operating threshold. This loss was not considered in any previous study and needs to be accounted for in performance prediction analysis. Simulation and measurement results are used to characterize the loss due to the digital summers for three different tracking loops: a digital phase-locked loop, a cross-product automatic frequency tracking loop, and an extended Kalman filter. The tracking algorithms are compared with respect to their frequency error performance and their ability to maintain lock during severe maneuvers at various carrier-to-noise ratios. It is shown that failure to account for the effect of accumulators can result in an inaccurate performance prediction, the extent of which depends highly on the algorithm used.

An Optimized Control for LLC Resonant Converter with Wide Load Range

NASA Astrophysics Data System (ADS)

Xi, Xia; Qian, Qinsong

2017-05-01

This paper presents an optimized control which makes LLC resonant converters operate with a wider load range and provides good closed-loop performance. The proposed control employs two paralleled digital compensations to guarantee the good closed-loop performance in a wide load range during the steady state, an optimized trajectory control will take over to change the gate-driving signals immediately at the load transients. Finally, the proposed control has been implemented and tested on a 150W 200kHz 400V/24V LLC resonant converter and the result validates the proposed method.

Performance evaluation of digital phase-locked loops for advanced deep space transponders

NASA Technical Reports Server (NTRS)

Nguyen, T. M.; Hinedi, S. M.; Yeh, H.-G.; Kyriacou, C.

1994-01-01

The performances of the digital phase-locked loops (DPLL's) for the advanced deep-space transponders (ADT's) are investigated. DPLL's considered in this article are derived from the analog phase-locked loop, which is currently employed by the NASA standard deep space transponder, using S-domain to Z-domain mapping techniques. Three mappings are used to develop digital approximations of the standard deep space analog phase-locked loop, namely the bilinear transformation (BT), impulse invariant transformation (IIT), and step invariant transformation (SIT) techniques. The performance in terms of the closed loop phase and magnitude responses, carrier tracking jitter, and response of the loop to the phase offset (the difference between in incoming phase and reference phase) is evaluated for each digital approximation. Theoretical results of the carrier tracking jitter for command-on and command-off cases are then validated by computer simulation. Both theoretical and computer simulation results show that at high sampling frequency, the DPLL's approximated by all three transformations have the same tracking jitter. However, at low sampling frequency, the digital approximation using BT outperforms the others. The minimum sampling frequency for adequate tracking performance is determined for each digital approximation of the analog loop. In addition, computer simulation shows that the DPLL developed by BT provides faster response to the phase offset than IIT and SIT.

A low power flash-FPGA based brain implant micro-system of PID control.

PubMed

Lijuan Xia; Fattah, Nabeel; Soltan, Ahmed; Jackson, Andrew; Chester, Graeme; Degenaar, Patrick

2017-07-01

In this paper, we demonstrate that a low power flash FPGA based micro-system can provide a low power programmable interface for closed-loop brain implant inter- faces. The proposed micro-system receives recording local field potential (LFP) signals from an implanted probe, performs closed-loop control using a first order control system, then converts the signal into an optogenetic control stimulus pattern. Stimulus can be implemented through optoelectronic probes. The long term target is for both fundamental neuroscience applications and for clinical use in treating epilepsy. Utilizing our device, closed-loop processing consumes only 14nJ of power per PID cycle compared to 1.52μJ per cycle for a micro-controller implementation. Compared to an application specific digital integrated circuit, flash FPGA's are inherently programmable.

Arbitrary digital pulse sequence generator with delay-loop timing

NASA Astrophysics Data System (ADS)

Hošák, Radim; Ježek, Miroslav

2018-04-01

We propose an idea of an electronic multi-channel arbitrary digital sequence generator with temporal granularity equal to two clock cycles. We implement the generator with 32 channels using a low-cost ARM microcontroller and demonstrate its capability to produce temporal delays ranging from tens of nanoseconds to hundreds of seconds, with 24 ns timing granularity and linear scaling of delay with respect to the number of delay loop iterations. The generator is optionally synchronized with an external clock source to provide 100 ps jitter and overall sequence repeatability within the whole temporal range. The generator is fully programmable and able to produce digital sequences of high complexity. The concept of the generator can be implemented using different microcontrollers and applied for controlling of various optical, atomic, and nuclear physics measurement setups.

On higher order discrete phase-locked loops.

NASA Technical Reports Server (NTRS)

Gill, G. S.; Gupta, S. C.

1972-01-01

An exact mathematical model is developed for a discrete loop of a general order particularly suitable for digital computation. The deterministic response of the loop to the phase step and the frequency step is investigated. The design of the digital filter for the second-order loop is considered. Use is made of the incremental phase plane to study the phase error behavior of the loop. The model of the noisy loop is derived and the optimization of the loop filter for minimum mean-square error is considered.

Alcator C-Mod Digital Plasma Control System

NASA Astrophysics Data System (ADS)

Wolfe, S. M.

2005-10-01

A new digital plasma control system (DPCS) has been implemented for Alcator C-Mod. The new system was put into service at the start of the 2005 run campaign and has been in routine operation since. The system consists of two 64-input, 16-output cPCI digitizers attached to a rack-mounted single-CPU Linux server, which performs both the I/O and the computation. During initial operation, the system was set up to directly emulate the original C-Mod ``Hybrid'' MIMO linear control system. Compatibility with the previous control system allows the existing user interface software and data structures to be used with the new hardware. The control program is written in IDL and runs under standard Linux. Interrupts are disabled during the plasma pulses to achieve real-time operation. A synchronous loop is executed with a nominal cycle rate of 10 kHz. Emulation of the original linear control algorithms requires 50 μsec per iteration, with the time evenly split between I/O and computation, so rates of about 20 KHz are achievable. Reliable vertical position control has been demonstrated with cycle rates as low as 5 KHz. Additional computations, including non-linear algorithms and adaptive response, are implemented as optional procedure calls within the main real-time loop.

Energy Efficient Engine: Control system preliminary definition report

NASA Technical Reports Server (NTRS)

Howe, David C.

1986-01-01

The object of the Control Preliminary Definition Program was to define a preliminary control system concept as a part of the Energy Efficient Engine program. The program was limited to a conceptual definition of a full authority digital electronic control system. System requirements were determined and a control system was conceptually defined to these requirements. Areas requiring technological development were identified and a plan was established for implementing the identified technological features, including a control technology demonstration. A significant element of this program was a study of the potential benefits of closed-loop active clearance control, along with laboratory tests of candidate clearance sensor elements for a closed loop system.

Investigation of air transportation technology at Ohio University, 1980. [general aviation aircraft and navigation aids

NASA Technical Reports Server (NTRS)

Mcfarland, R. H.

1981-01-01

Specific configurations of first and second order all digital phase locked loops were analyzed for both ideal and additive gaussian noise inputs. In addition, a design for a hardware digital phase locked loop capable of either first or second order operation was evaluated along with appropriate experimental data obtained from testing of the hardware loop. All parameters chosen for the analysis and the design of the digital phase locked loop were consistent with an application to an Omega navigation receiver although neither the analysis nor the design are limited to this application. For all cases tested, the experimental data showed close agreement with the analytical results indicating that the Markov chain model for first and second order digital phase locked loops are valid.

An all-digital phase-locked loop demodulator based on FPGA

NASA Astrophysics Data System (ADS)

Gong, X. F.; Cui, Z. D.

2017-09-01

This paper studied the principle of analogue phase-locked loop demodulation and work process of digital phase-locked loop. It is found that the higher the reference signal frequency is, the smaller the duty ratio of the discriminator output signal is. Carrier detection is achieved by using this relationship. The experimental results indicate that the demodulator based on the principle could realize high-quality transmission of digital signals and could be an effective FM communication mode for studying wireless transmission of digital signals.

Effect of various features on the life cycle cost of the timing/synchronization subsystem of the DCS digital communications network

NASA Technical Reports Server (NTRS)

Kimsey, D. B.

1978-01-01

The effect on the life cycle cost of the timing subsystem was examined, when these optional features were included in various combinations. The features included mutual control, directed control, double-ended reference links, independence of clock error measurement and correction, phase reference combining, self-organization, smoothing for link and nodal dropouts, unequal reference weightings, and a master in a mutual control network. An overall design of a microprocessor-based timing subsystem was formulated. The microprocessor (8080) implements the digital filter portion of a digital phase locked loop, as well as other control functions such as organization of the network through communication with processors at neighboring nodes.

Development of Hardware-in-the-loop Microgrid Testbed

DOE Office of Scientific and Technical Information (OSTI.GOV)

Xiao, Bailu; Prabakar, Kumaraguru; Starke, Michael R

2015-01-01

A hardware-in-the-loop (HIL) microgrid testbed for the evaluation and assessment of microgrid operation and control system has been presented in this paper. The HIL testbed is composed of a real-time digital simulator (RTDS) for modeling of the microgrid, multiple NI CompactRIOs for device level control, a prototype microgrid energy management system (MicroEMS), and a relay protection system. The applied communication-assisted hybrid control system has been also discussed. Results of function testing of HIL controller, communication, and the relay protection system are presented to show the effectiveness of the proposed HIL microgrid testbed.

Circuitry, systems and methods for detecting magnetic fields

DOEpatents

Kotter, Dale K [Shelley, ID; Spencer, David F [Idaho Falls, ID; Roybal, Lyle G [Idaho Falls, ID; Rohrbaugh, David T [Idaho Falls, ID

2010-09-14

Circuitry for detecting magnetic fields includes a first magnetoresistive sensor and a second magnetoresistive sensor configured to form a gradiometer. The circuitry includes a digital signal processor and a first feedback loop coupled between the first magnetoresistive sensor and the digital signal processor. A second feedback loop which is discrete from the first feedback loop is coupled between the second magnetoresistive sensor and the digital signal processor.

Automatic weld torch guidance control system

NASA Technical Reports Server (NTRS)

Smaith, H. E.; Wall, W. A.; Burns, M. R., Jr.

1982-01-01

A highly reliable, fully digital, closed circuit television optical, type automatic weld seam tracking control system was developed. This automatic tracking equipment is used to reduce weld tooling costs and increase overall automatic welding reliability. The system utilizes a charge injection device digital camera which as 60,512 inidividual pixels as the light sensing elements. Through conventional scanning means, each pixel in the focal plane is sequentially scanned, the light level signal digitized, and an 8-bit word transmitted to scratch pad memory. From memory, the microprocessor performs an analysis of the digital signal and computes the tracking error. Lastly, the corrective signal is transmitted to a cross seam actuator digital drive motor controller to complete the closed loop, feedback, tracking system. This weld seam tracking control system is capable of a tracking accuracy of + or - 0.2 mm, or better. As configured, the system is applicable to square butt, V-groove, and lap joint weldments.

Digital Filters for Digital Phase-locked Loops

NASA Technical Reports Server (NTRS)

Simon, M.; Mileant, A.

1985-01-01

An s/z hybrid model for a general phase locked loop is proposed. The impact of the loop filter on the stability, gain margin, noise equivalent bandwidth, steady state error and time response is investigated. A specific digital filter is selected which maximizes the overall gain margin of the loop. This filter can have any desired number of integrators. Three integrators are sufficient in order to track a phase jerk with zero steady state error at loop update instants. This filter has one zero near z = 1.0 for each integrator. The total number of poles of the filter is equal to the number of integrators plus two.

Design and Theoretical Analysis of a Resonant Sensor for Liquid Density Measurement

PubMed Central

Zheng, Dezhi; Shi, Jiying; Fan, Shangchun

2012-01-01

In order to increase the accuracy of on-line liquid density measurements, a sensor equipped with a tuning fork as the resonant sensitive component is designed in this paper. It is a quasi-digital sensor with simple structure and high precision. The sensor is based on resonance theory and composed of a sensitive unit and a closed-loop control unit, where the sensitive unit consists of the actuator, the resonant tuning fork and the detector and the closed-loop control unit comprises precondition circuit, digital signal processing and control unit, analog-to-digital converter and digital-to-analog converter. An approximate parameters model of the tuning fork is established and the impact of liquid density, position of the tuning fork, temperature and structural parameters on the natural frequency of the tuning fork are also analyzed. On this basis, a tuning fork liquid density measurement sensor is developed. In addition, experimental testing on the sensor has been carried out on standard calibration facilities under constant 20 °C, and the sensor coefficients are calibrated. The experimental results show that the repeatability error is about 0.03% and the accuracy is about 0.4 kg/m3. The results also confirm that the method to increase the accuracy of liquid density measurement is feasible. PMID:22969378

Design and theoretical analysis of a resonant sensor for liquid density measurement.

PubMed

Zheng, Dezhi; Shi, Jiying; Fan, Shangchun

2012-01-01

In order to increase the accuracy of on-line liquid density measurements, a sensor equipped with a tuning fork as the resonant sensitive component is designed in this paper. It is a quasi-digital sensor with simple structure and high precision. The sensor is based on resonance theory and composed of a sensitive unit and a closed-loop control unit, where the sensitive unit consists of the actuator, the resonant tuning fork and the detector and the closed-loop control unit comprises precondition circuit, digital signal processing and control unit, analog-to-digital converter and digital-to-analog converter. An approximate parameters model of the tuning fork is established and the impact of liquid density, position of the tuning fork, temperature and structural parameters on the natural frequency of the tuning fork are also analyzed. On this basis, a tuning fork liquid density measurement sensor is developed. In addition, experimental testing on the sensor has been carried out on standard calibration facilities under constant 20 °C, and the sensor coefficients are calibrated. The experimental results show that the repeatability error is about 0.03% and the accuracy is about 0.4 kg/m(3). The results also confirm that the method to increase the accuracy of liquid density measurement is feasible.

Digital simulation of hybrid loop operation in RFI backgrounds.

NASA Technical Reports Server (NTRS)

Ziemer, R. E.; Nelson, D. R.

1972-01-01

A digital computer model for Monte-Carlo simulation of an imperfect second-order hybrid phase-locked loop (PLL) operating in radio-frequency interference (RFI) and Gaussian noise backgrounds has been developed. Characterization of hybrid loop performance in terms of cycle slipping statistics and phase error variance, through computer simulation, indicates that the hybrid loop has desirable performance characteristics in RFI backgrounds over the conventional PLL or the costas loop.

Phase-locked loops. [analog, hybrid, discrete and digital systems

NASA Technical Reports Server (NTRS)

Gupta, S. C.

1974-01-01

The basic analysis and design procedures are described for the realization of analog phase-locked loops (APLL), hybrid phase-locked loops (HPLL), discrete phase-locked loops, and digital phase-locked loops (DPLL). Basic configurations are diagrammed, and performance curves are given. A discrete communications model is derived and developed. The use of the APLL as an optimum angle demodulator and the Kalman-Bucy approach to APLL design are discussed. The literature in the area of phase-locked loops is reviewed, and an extensive bibliography is given. Although the design of APLLs is fairly well documented, work on discrete, hybrid, and digital PLLs is scattered, and more will have to be done in the future to pinpoint the formal design of DPLLs.

Digital LAMP in a sample self-digitization (SD) chip

PubMed Central

Herrick, Alison M.; Dimov, Ivan K.; Lee, Luke P.; Chiu, Daniel T.

2012-01-01

This paper describes the realization of digital loop-mediated DNA amplification (dLAMP) in a sample self-digitization (SD) chip. Digital DNA amplification has become an attractive technique to quantify absolute concentrations of DNA in a sample. While digital polymerase chain reaction is still the most widespread implementation, its use in resource—limited settings is impeded by the need for thermal cycling and robust temperature control. In such situations, isothermal protocols that can amplify DNA or RNA without thermal cycling are of great interest. Here, we showed the successful amplification of single DNA molecules in a stationary droplet array using isothermal digital loop-mediated DNA amplification. Unlike most (if not all) existing methods for sample discretization, our design allows for automated, loss-less digitization of sample volumes on-chip. We demonstrated accurate quantification of relative and absolute DNA concentrations with sample volumes of less than 2 μl. We assessed the homogeneity of droplet size during sample self-digitization in our device, and verified that the size variation was small enough such that straightforward counting of LAMP-active droplets sufficed for data analysis. We anticipate that the simplicity and robustness of our SD chip make it attractive as an inexpensive and easy-to-operate device for DNA amplification, for example in point-of-care settings. PMID:22399016

The Digital Motion Control System for the Submillimeter Array Antennas

NASA Astrophysics Data System (ADS)

Hunter, T. R.; Wilson, R. W.; Kimberk, R.; Leiker, P. S.; Patel, N. A.; Blundell, R.; Christensen, R. D.; Diven, A. R.; Maute, J.; Plante, R. J.; Riddle, P.; Young, K. H.

2013-09-01

We describe the design and performance of the digital servo and motion control system for the 6-meter parabolic antennas of the Submillimeter Array (SMA) on Mauna Kea, Hawaii. The system is divided into three nested layers operating at a different, appropriate bandwidth. (1) A rack-mounted, real-time Unix system runs the position loop which reads the high resolution azimuth and elevation encoders and sends velocity and acceleration commands at 100 Hz to a custom-designed servo control board (SCB). (2) The microcontroller-based SCB reads the motor axis tachometers and implements the velocity loop by sending torque commands to the motor amplifiers at 558 Hz. (3) The motor amplifiers implement the torque loop by monitoring and sending current to the three-phase brushless drive motors at 20 kHz. The velocity loop uses a traditional proportional-integral-derivative (PID) control algorithm, while the position loop uses only a proportional term and implements a command shaper based on the Gauss error function. Calibration factors and software filters are applied to the tachometer feedback prior to the application of the servo gains in the torque computations. All of these parameters are remotely adjustable in the software. The three layers of the control system monitor each other and are capable of shutting down the system safely if a failure or anomaly occurs. The Unix system continuously relays the antenna status to the central observatory computer via reflective memory. In each antenna, a Palm Vx hand controller displays the complete system status and allows full local control of the drives in an intuitive touchscreen user interface. The hand controller can also be connected outside the cabin, a major convenience during the frequent reconfigurations of the interferometer. Excellent tracking performance ( 0.3‧‧ rms) is achieved with this system. It has been in reliable operation on 8 antennas for over 10 years and has required minimal maintenance.

A Statistical Testing Approach for Quantifying Software Reliability; Application to an Example System

DOE Office of Scientific and Technical Information (OSTI.GOV)

Chu, Tsong-Lun; Varuttamaseni, Athi; Baek, Joo-Seok

The U.S. Nuclear Regulatory Commission (NRC) encourages the use of probabilistic risk assessment (PRA) technology in all regulatory matters, to the extent supported by the state-of-the-art in PRA methods and data. Although much has been accomplished in the area of risk-informed regulation, risk assessment for digital systems has not been fully developed. The NRC established a plan for research on digital systems to identify and develop methods, analytical tools, and regulatory guidance for (1) including models of digital systems in the PRAs of nuclear power plants (NPPs), and (2) incorporating digital systems in the NRC's risk-informed licensing and oversight activities.more » Under NRC's sponsorship, Brookhaven National Laboratory (BNL) explored approaches for addressing the failures of digital instrumentation and control (I and C) systems in the current NPP PRA framework. Specific areas investigated included PRA modeling digital hardware, development of a philosophical basis for defining software failure, and identification of desirable attributes of quantitative software reliability methods. Based on the earlier research, statistical testing is considered a promising method for quantifying software reliability. This paper describes a statistical software testing approach for quantifying software reliability and applies it to the loop-operating control system (LOCS) of an experimental loop of the Advanced Test Reactor (ATR) at Idaho National Laboratory (INL).« less

An all digital phase locked loop for synchronization of a sinusoidal signal embedded in white Gaussian noise

NASA Technical Reports Server (NTRS)

Reddy, C. P.; Gupta, S. C.

1973-01-01

An all digital phase locked loop which tracks the phase of the incoming sinusoidal signal once per carrier cycle is proposed. The different elements and their functions and the phase lock operation are explained in detail. The nonlinear difference equations which govern the operation of the digital loop when the incoming signal is embedded in white Gaussian noise are derived, and a suitable model is specified. The performance of the digital loop is considered for the synchronization of a sinusoidal signal. For this, the noise term is suitably modelled which allows specification of the output probabilities for the two level quantizer in the loop at any given phase error. The loop filter considered increases the probability of proper phase correction. The phase error states in modulo two-pi forms a finite state Markov chain which enables the calculation of steady state probabilities, RMS phase error, transient response and mean time for cycle skipping.

All-digital signal-processing open-loop fiber-optic gyroscope with enlarged dynamic range.

PubMed

Wang, Qin; Yang, Chuanchuan; Wang, Xinyue; Wang, Ziyu

2013-12-15

We propose and realize a new open-loop fiber-optic gyroscope (FOG) with an all-digital signal-processing (DSP) system where an all-digital phase-locked loop is employed for digital demodulation to eliminate the variation of the source intensity and suppress the bias drift. A Sagnac phase-shift tracking method is proposed to enlarge the dynamic range, and, with its aid, a new open-loop FOG, which can achieve a large dynamic range and high sensitivity at the same time, is realized. The experimental results show that compared with the conventional open-loop FOG with the same fiber coil and optical devices, the proposed FOG reduces the bias instability from 0.259 to 0.018 deg/h, and the angle random walk from 0.031 to 0.006 deg/h(1/2), moreover, enlarges the dynamic range to ±360 deg/s, exceeding the maximum dynamic range ±63 deg/s of the conventional open-loop FOG.

Simulation Exercises for an Undergraduate Digital Process Control Course.

ERIC Educational Resources Information Center

Reeves, Deborah E.; Schork, F. Joseph

1988-01-01

Presents six problems from an alternative approach to homework traditionally given to follow-up lectures. Stresses the advantage of longer term exercises which allow for creativity and independence on the part of the student. Problems include: "System Model,""Open-Loop Simulation,""PID Control,""Dahlin…

General, database-driven fast-feedback system for the Stanford Linear Collider

DOE Office of Scientific and Technical Information (OSTI.GOV)

Rouse, F.; Allison, S.; Castillo, S.

A new feedback system has been developed for stabilizing the SLC beams at many locations. The feedback loops are designed to sample and correct at the 60 Hz repetition rate of the accelerator. Each loop can be distributed across several of the standard 80386 microprocessors which control the SLC hardware. A new communications system, KISNet, has been implemented to pass signals between the microprocessors at this rate. The software is written in a general fashion using the state space formalism of digital control theory. This allows a new loop to be implemented by just setting up the online database andmore » perhaps installing a communications link. 3 refs., 4 figs.« less

Generalized fast feedback system in the SLC

DOE Office of Scientific and Technical Information (OSTI.GOV)

Hendrickson, L.; Allison, S.; Gromme, T.

A generalized fast feedback system has been developed to stabilize beams at various locations in the SLC. The system is designed to perform measurements and change actuator settings to control beam states such as position, angle and energy on a pulse to pulse basis. The software design is based on the state space formalism of digital control theory. The system is database-driven, facilitating the addition of new loops without requiring additional software. A communications system, KISNet, provides fast communications links between microprocessors for feedback loops which involve multiple micros. Feedback loops have been installed in seventeen locations throughout the SLCmore » and have proven to be invaluable in stabilizing the machine.« less

Multiple-Ring Digital Communication Network

NASA Technical Reports Server (NTRS)

Kirkham, Harold

1992-01-01

Optical-fiber digital communication network to support data-acquisition and control functions of electric-power-distribution networks. Optical-fiber links of communication network follow power-distribution routes. Since fiber crosses open power switches, communication network includes multiple interconnected loops with occasional spurs. At each intersection node is needed. Nodes of communication network include power-distribution substations and power-controlling units. In addition to serving data acquisition and control functions, each node acts as repeater, passing on messages to next node(s). Multiple-ring communication network operates on new AbNET protocol and features fiber-optic communication.

A Markov chain technique for determining the acquisition behavior of a digital tracking loop

NASA Technical Reports Server (NTRS)

Chadwick, H. D.

1972-01-01

An iterative procedure is presented for determining the acquisition behavior of discrete or digital implementations of a tracking loop. The technique is based on the theory of Markov chains and provides the cumulative probability of acquisition in the loop as a function of time in the presence of noise and a given set of initial condition probabilities. A digital second-order tracking loop to be used in the Viking command receiver for continuous tracking of the command subcarrier phase was analyzed using this technique, and the results agree closely with experimental data.

Airstart performance of a digital electronic engine control system on an F100 engine

NASA Technical Reports Server (NTRS)

Burcham, F. W., Jr.

1984-01-01

The digital electronic engine control (DEEC) system installed on an F100 engine in an F-15 aircraft was tested. The DEEC system incorporates a closed-loop air start feature in which the fuel flow is modulated to achieve the desired rate of compressor acceleration. With this logic the DEEC equipped F100 engine can achieve air starts over a larger envelope. The DEEC air start logic, the test program conducted on the F-15, and its results are described.

Fast, Low-Power, Hysteretic Level-Detector Circuit

NASA Technical Reports Server (NTRS)

Arditti, Mordechai

1993-01-01

Circuit for detection of preset levels of voltage or current intended to replace standard fast voltage comparator. Hysteretic analog/digital level detector operates at unusually low power with little sacrifice of speed. Comprises low-power analog circuit and complementary metal oxide/semiconductor (CMOS) digital circuit connected in overall closed feedback loop to decrease rise and fall times, provide hysteresis, and trip-level control. Contains multiple subloops combining linear and digital feedback. Levels of sensed signals and hysteresis level easily adjusted by selection of components to suit specific application.

Digital-flutter-suppression-system investigations for the active flexible wing wind-tunnel model

NASA Technical Reports Server (NTRS)

Perry, Boyd, III; Mukhopadhyay, Vivek; Hoadley, Sherwood Tiffany; Cole, Stanley R.; Buttrill, Carey S.

1990-01-01

Active flutter suppression control laws were designed, implemented, and tested on an aeroelastically-scaled wind-tunnel model in the NASA Langley Transonic Dynamics Tunnel. One of the control laws was successful in stabilizing the model while the dynamic pressure was increased to 24 percent greater than the measured open-loop flutter boundary. Other accomplishments included the design, implementation, and successful operation of a one-of-a-kind digital controller, the design and use of two simulation methods to support the project, and the development and successful use of a methodology for online controller performance evaluation.

Digital-flutter-suppression-system investigations for the active flexible wing wind-tunnel model

NASA Technical Reports Server (NTRS)

Perry, Boyd, III; Mukhopadhyay, Vivek; Hoadley, Sherwood T.; Cole, Stanley R.; Buttrill, Carey S.; Houck, Jacob A.

1990-01-01

Active flutter suppression control laws were designed, implemented, and tested on an aeroelastically-scaled wind tunnel model in the NASA Langley Transonic Dynamics Tunnel. One of the control laws was successful in stabilizing the model while the dynamic pressure was increased to 24 percent greater than the measured open-loop flutter boundary. Other accomplishments included the design, implementation, and successful operation of a one-of-a-kind digital controller, the design and use of two simulation methods to support the project, and the development and successful use of a methodology for on-line controller performance evaluation.

Digital controller design: Analysis of the annular suspension pointing system. [analog controllers with feedback

NASA Technical Reports Server (NTRS)

Kuo, B. C.

1978-01-01

The analog controllers of the annular suspension pointing system are designed for control of the chi, phi sub 1, and phi sub 2 bandwidth dynamics through decoupling and pole placement. Since it is virtually impossible to find an equivalent bandwidth of the overall system and establish a general eigenvalue requirement for the system, the subsystem dynamics are decoupled through state feedback and the poles are placed simultaneously to realize the desired bandwidths for the three system components. Decoupling and pole placement are also used to design the closed-loop digital system through approximation.

Digital second-order phase-locked loop

NASA Technical Reports Server (NTRS)

Holmes, J. K.; Carl, C. C.; Tagnelia, C. R.

1975-01-01

Actual tests with second-order digital phase-locked loop at simulated relative Doppler shift of 1x0.0001 produced phase lock with timing error of 6.5 deg and no appreciable Doppler bias. Loop thus appears to achieve subcarrier synchronization and to remove bias due to Doppler shift in range of interest.

Active vibration control using a modal-domain fiber optic sensor

NASA Technical Reports Server (NTRS)

Cox, David E.

1992-01-01

A closed-loop control experiment is described in which vibrations of a cantilevered beam are suppressed using measurements from a modal-domain fiber optic sensor. Modal-domain sensors are interference between the modes of a few-mode optical waveguide to detect strain. The fiber is bonded along the length of the beam and provides a measurement related to the strain distribution on the surface of the beam. A model for the fiber optic sensor is derived, and this model is integrated with the dynamic model of the beam. A piezoelectric actuator is also bonded to the beam and used to provide control forces. Control forces are obtained through dynamic compensation of the signal from the fiber optic sensor. The compensator is implemented with a real-time digital controller. Analytical models are verified by comparing simulations to experimental results for both open-loop and closed-loop configurations.

Digital Interface Board to Control Phase and Amplitude of Four Channels

NASA Technical Reports Server (NTRS)

Smith, Amy E.; Cook, Brian M.; Khan, Abdur R.; Lux, James P.

2011-01-01

An increasing number of parts are designed with digital control interfaces, including phase shifters and variable attenuators. When designing an antenna array in which each antenna has independent amplitude and phase control, the number of digital control lines that must be set simultaneously can grow very large. Use of a parallel interface would require separate line drivers, more parts, and thus additional failure points. A convenient form of control where single-phase shifters or attenuators could be set or the whole set could be programmed with an update rate of 100 Hz is needed to solve this problem. A digital interface board with a field-programmable gate array (FPGA) can simultaneously control an essentially arbitrary number of digital control lines with a serial command interface requiring only three wires. A small set of short, high-level commands provides a simple programming interface for an external controller. Parity bits are used to validate the control commands. Output timing is controlled within the FPGA to allow for rapid update rates of the phase shifters and attenuators. This technology has been used to set and monitor eight 5-bit control signals via a serial UART (universal asynchronous receiver/transmitter) interface. The digital interface board controls the phase and amplitude of the signals for each element in the array. A host computer running Agilent VEE sends commands via serial UART connection to a Xilinx VirtexII FPGA. The commands are decoded, and either outputs are set or telemetry data is sent back to the host computer describing the status and the current phase and amplitude settings. This technology is an integral part of a closed-loop system in which the angle of arrival of an X-band uplink signal is detected and the appropriate phase shifts are applied to the Ka-band downlink signal to electronically steer the array back in the direction of the uplink signal. It will also be used in the non-beam-steering case to compensate for phase shift variations through power amplifiers. The digital interface board can be used to set four 5-bit phase shifters and four 5-bit attenuators and monitor their current settings. Additionally, it is useful outside of the closed-loop system for beamsteering alone. When the VEE program is started, it prompts the user to initialize variables (to zero) or skip initialization. After that, the program enters into a continuous loop waiting for the telemetry period to elapse or a button to be pushed. A telemetry request is sent when the telemetry period is elapsed (every five seconds). Pushing one of the set or reset buttons will send the appropriate command. When a command is sent, the interface status is returned, and the user will be notified by a pop-up window if any error has occurred. The program runs until the End Program button is depressed.

Near optimum digital phase locked loops.

NASA Technical Reports Server (NTRS)

Polk, D. R.; Gupta, S. C.

1972-01-01

Near optimum digital phase locked loops are derived utilizing nonlinear estimation theory. Nonlinear approximations are employed to yield realizable loop structures. Baseband equivalent loop gains are derived which under high signal to noise ratio conditions may be calculated off-line. Additional simplifications are made which permit the application of the Kalman filter algorithms to determine the optimum loop filter. Performance is evaluated by a theoretical analysis and by simulation. Theoretical and simulated results are discussed and a comparison to analog results is made.

Behaviour of fractional loop delay zero crossing digital phase locked loop (FR-ZCDPLL)

NASA Astrophysics Data System (ADS)

Nasir, Qassim

2018-01-01

This article analyses the performance of the first-order zero crossing digital phase locked loops (FR-ZCDPLL) when fractional loop delay is added to loop. The non-linear dynamics of the loop is presented, analysed and examined through bifurcation behaviour. Numerical simulation of the loop is conducted to proof the mathematical analysis of the loop operation. The results of the loop simulation show that the proposed FR-ZCDPLL has enhanced the performance compared to the conventional zero crossing DPLL in terms of wider lock range, captured range and stable operation region. In addition, extensive experimental simulation was conducted to find the optimum loop parameters for different loop environmental conditions. The addition of the fractional loop delay network in the conventional loop also reduces the phase jitter and its variance especially when the signal-to-noise ratio is low.

Investigation of a nozzle instability on an F100 engine equipped with a digital electronic engine control

NASA Technical Reports Server (NTRS)

Burcham, F. W., Jr.; Zeller, J. R.

1984-01-01

An instability in the nozzle of the F100 engine, equipped with a digital electronic engine control (DEEC), was observed during a flight evaluation on an F-15 aircraft. The instability occurred in the upper left hand corner (ULMC) of the flight envelope during augmentation. The instability was not predicted by stability analysis, closed-loop simulations of the the engine, or altitude testing of the engine. The instability caused stalls and augmentor blowouts. The nozzle instability and the altitude testing are described. Linear analysis and nonlinear digital simulation test results are presented. Software modifications on further flight test are discussed.

Explicit analytical tuning rules for digital PID controllers via the magnitude optimum criterion.

PubMed

Papadopoulos, Konstantinos G; Yadav, Praveen K; Margaris, Nikolaos I

2017-09-01

Analytical tuning rules for digital PID type-I controllers are presented regardless of the process complexity. This explicit solution allows control engineers 1) to make an accurate examination of the effect of the controller's sampling time to the control loop's performance both in the time and frequency domain 2) to decide when the control has to be I, PI and when the derivative, D, term has to be added or omitted 3) apply this control action to a series of stable benchmark processes regardless of their complexity. The former advantages are considered critical in industry applications, since 1) most of the times the choice of the digital controller's sampling time is based on heuristics and past criteria, 2) there is little a-priori knowledge of the controlled process making the choice of the type of the controller a trial and error exercise 3) model parameters change often depending on the control loop's operating point making in this way, the problem of retuning the controller's parameter a much challenging issue. Basis of the proposed control law is the principle of the PID tuning via the Magnitude Optimum criterion. The final control law involves the controller's sampling time T s within the explicit solution of the controller's parameters. Finally, the potential of the proposed method is justified by comparing its performance with the conventional PID tuning when controlling the same process. Further investigation regarding the choice of the controller's sampling time T s is also presented and useful conclusions for control engineers are derived. Copyright © 2017 ISA. Published by Elsevier Ltd. All rights reserved.

A fast-locking all-digital delay-locked loop for phase/delay generation in an FPGA

NASA Astrophysics Data System (ADS)

Zhujia, Chen; Haigang, Yang; Fei, Liu; Yu, Wang

2011-10-01

A fast-locking all-digital delay-locked loop (ADDLL) is proposed for the DDR SDRAM controller interface in a field programmable gate array (FPGA). The ADDLL performs a 90° phase-shift so that the data strobe (DQS) can enlarge the data valid window in order to minimize skew. In order to further reduce the locking time and to prevent the harmonic locking problem, a time-to-digital converter (TDC) is proposed. A duty cycle corrector (DCC) is also designed in the ADDLL to adjust the output duty cycle to 50%. The ADDLL, implemented in a commercial 0.13 μm CMOS process, occupies a total of 0.017 mm2 of active area. Measurement results show that the ADDLL has an operating frequency range of 75 to 350 MHz and a total delay resolution of 15 ps. The time interval error (TIE) of the proposed circuit is 60.7 ps.

Implementation of Nonlinear Control Laws for an Optical Delay Line

NASA Technical Reports Server (NTRS)

Hench, John J.; Lurie, Boris; Grogan, Robert; Johnson, Richard

2000-01-01

This paper discusses the implementation of a globally stable nonlinear controller algorithm for the Real-Time Interferometer Control System Testbed (RICST) brassboard optical delay line (ODL) developed for the Interferometry Technology Program at the Jet Propulsion Laboratory. The control methodology essentially employs loop shaping to implement linear control laws. while utilizing nonlinear elements as means of ameliorating the effects of actuator saturation in its coarse, main, and vernier stages. The linear controllers were implemented as high-order digital filters and were designed using Bode integral techniques to determine the loop shape. The nonlinear techniques encompass the areas of exact linearization, anti-windup control, nonlinear rate limiting and modal control. Details of the design procedure are given as well as data from the actual mechanism.

Loran digital phase-locked loop and RF front-end system error analysis

NASA Technical Reports Server (NTRS)

Mccall, D. L.

1979-01-01

An analysis of the system performance of the digital phase locked loops (DPLL) and RF front end that are implemented in the MINI-L4 Loran receiver is presented. Three of the four experiments deal with the performance of the digital phase locked loops. The other experiment deals with the RF front end and DPLL system error which arise in the front end due to poor signal to noise ratios. The ability of the DPLLs to track the offsets is studied.

Power supply with air core transformer and seperated power supplies for high dynamic range

NASA Technical Reports Server (NTRS)

Orient, Otto (Inventor); Chutjian, Ara (Inventor); Aalami, Dean (Inventor); Darrach, Murray (Inventor)

2001-01-01

A power supply for a quadrupole mass spectrometer which operates using an RF signal. The RF signal is controllable via a feedback loop. The feedback loop is from the output, through a comparator, and compared to a digital signal. An air core transformer is used to minimize the weight. The air core transformer is driven via two out of phase sawtooth signals which drive opposite ends of the transformer.

A conformal mapping based fractional order approach for sub-optimal tuning of PID controllers with guaranteed dominant pole placement

NASA Astrophysics Data System (ADS)

Saha, Suman; Das, Saptarshi; Das, Shantanu; Gupta, Amitava

2012-09-01

A novel conformal mapping based fractional order (FO) methodology is developed in this paper for tuning existing classical (Integer Order) Proportional Integral Derivative (PID) controllers especially for sluggish and oscillatory second order systems. The conventional pole placement tuning via Linear Quadratic Regulator (LQR) method is extended for open loop oscillatory systems as well. The locations of the open loop zeros of a fractional order PID (FOPID or PIλDμ) controller have been approximated in this paper vis-à-vis a LQR tuned conventional integer order PID controller, to achieve equivalent integer order PID control system. This approach eases the implementation of analog/digital realization of a FOPID controller with its integer order counterpart along with the advantages of fractional order controller preserved. It is shown here in the paper that decrease in the integro-differential operators of the FOPID/PIλDμ controller pushes the open loop zeros of the equivalent PID controller towards greater damping regions which gives a trajectory of the controller zeros and dominant closed loop poles. This trajectory is termed as "M-curve". This phenomena is used to design a two-stage tuning algorithm which reduces the existing PID controller's effort in a significant manner compared to that with a single stage LQR based pole placement method at a desired closed loop damping and frequency.

Steady-state probability density function of the phase error for a DPLL with an integrate-and-dump device

NASA Technical Reports Server (NTRS)

Simon, M.; Mileant, A.

1986-01-01

The steady-state behavior of a particular type of digital phase-locked loop (DPLL) with an integrate-and-dump circuit following the phase detector is characterized in terms of the probability density function (pdf) of the phase error in the loop. Although the loop is entirely digital from an implementation standpoint, it operates at two extremely different sampling rates. In particular, the combination of a phase detector and an integrate-and-dump circuit operates at a very high rate whereas the loop update rate is very slow by comparison. Because of this dichotomy, the loop can be analyzed by hybrid analog/digital (s/z domain) techniques. The loop is modeled in such a general fashion that previous analyses of the Real-Time Combiner (RTC), Subcarrier Demodulator Assembly (SDA), and Symbol Synchronization Assembly (SSA) fall out as special cases.

Phase-lock-loop application for fiber optic receiver

NASA Astrophysics Data System (ADS)

Ruggles, Stephen L.; Wills, Robert W.

1991-02-01

Phase-locked loop circuits are frequently employed in communication systems. In recent years, digital phase-locked loop circuits were utilized in optical communications systems. In an optical transceiver system, the digital phase-locked loop circuit is connected to the output of the receiver to extract a clock signal from the received coded data (NRZ, Bi-Phase, or Manchester). The clock signal is then used to reconstruct or recover the original data from the coded data. A theoretical approach to the design of a digital phase-locked loop circuit operation at 1 and 50 MHz is described. Hardware implementation of a breadboard design to function at 1 MHz and a printed-circuit board designed to function at 50 MHz were assembled using emitter coupled logic (ECL) to verify experimentally the theoretical design.

Phase-lock-loop application for fiber optic receiver

NASA Technical Reports Server (NTRS)

Ruggles, Stephen L.; Wills, Robert W.

1991-01-01

Phase-locked loop circuits are frequently employed in communication systems. In recent years, digital phase-locked loop circuits were utilized in optical communications systems. In an optical transceiver system, the digital phase-locked loop circuit is connected to the output of the receiver to extract a clock signal from the received coded data (NRZ, Bi-Phase, or Manchester). The clock signal is then used to reconstruct or recover the original data from the coded data. A theoretical approach to the design of a digital phase-locked loop circuit operation at 1 and 50 MHz is described. Hardware implementation of a breadboard design to function at 1 MHz and a printed-circuit board designed to function at 50 MHz were assembled using emitter coupled logic (ECL) to verify experimentally the theoretical design.

A Digital Phase Lock Loop for an External Cavity Diode Laser

NASA Astrophysics Data System (ADS)

Wang, Xiao-Long; Tao, Tian-Jiong; Cheng, Bing; Wu, Bin; Xu, Yun-Fei; Wang, Zhao-Ying; Lin, Qiang

2011-08-01

A digital optical phase lock loop (OPLL) is implemented to synchronize the frequency and phase between two external cavity diode lasers (ECDL), generating Raman pulses for atom interferometry. The setup involves all-digital phase detection and a programmable digital proportional-integral-derivative (PID) loop in locking. The lock generates a narrow beat-note linewidth below 1 Hz and low phase-noise of 0.03rad2 between the master and slave ECDLs. The lock proves to be stable and robust, and all the locking parameters can be set and optimized on a computer interface with convenience, making the lock adaptable to various setups of laser systems.

CSI computer system/remote interface unit acceptance test results

NASA Technical Reports Server (NTRS)

Sparks, Dean W., Jr.

1992-01-01

The validation tests conducted on the Control/Structures Interaction (CSI) Computer System (CCS)/Remote Interface Unit (RIU) is discussed. The CCS/RIU consists of a commercially available, Langley Research Center (LaRC) programmed, space flight qualified computer and a flight data acquisition and filtering computer, developed at LaRC. The tests were performed in the Space Structures Research Laboratory (SSRL) and included open loop excitation, closed loop control, safing, RIU digital filtering, and RIU stand alone testing with the CSI Evolutionary Model (CEM) Phase-0 testbed. The test results indicated that the CCS/RIU system is comparable to ground based systems in performing real-time control-structure experiments.

Electro-optic chaotic system based on the reverse-time chaos theory and a nonlinear hybrid feedback loop.

PubMed

Jiang, Xingxing; Cheng, Mengfan; Luo, Fengguang; Deng, Lei; Fu, Songnian; Ke, Changjian; Zhang, Minming; Tang, Ming; Shum, Ping; Liu, Deming

2016-12-12

A novel electro-optic chaos source is proposed on the basis of the reverse-time chaos theory and an analog-digital hybrid feedback loop. The analog output of the system can be determined by the numeric states of shift registers, which makes the system robust and easy to control. The dynamical properties as well as the complexity dependence on the feedback parameters are investigated in detail. The correlation characteristics of the system are also studied. Two improving strategies which were established in digital field and analog field are proposed to conceal the time-delay signature. The proposed scheme has the potential to be used in radar and optical secure communication systems.

Remotely manageable system for stabilizing femtosecond lasers

NASA Astrophysics Data System (ADS)

Cizek, Martin; Hucl, Vaclav; Smid, Radek; Mikel, Bretislav; Lazar, Josef; Cip, Ondrej

2014-05-01

In the field of precise measurement of optical frequencies, laser spectroscopy and interferometric distance surveying the optical frequency synthesizers (femtosecond combs) are used as optical frequency references. They generate thousands of narrow-linewidth coherent optical frequencies at the same time. The spacing of generated components equals to the repetition frequency of femtosecond pulses of the laser. The position of the comb spectrum has a frequency offset that is derived from carrier to envelope frequency difference. The repetition frequency and mentioned frequency offset belong to main controlled parameters of the optical frequency comb. If these frequencies are electronically locked an ultrastable frequency standard (i.e. H-maser, Cs- or Rb- clock), its relative stability is transferred to the optical frequency domain. We present a complete digitally controlled signal processing chain for phase-locked loop (PLL) control of the offset frequency. The setup is able to overcome some dropouts caused by the femtosecond laser non-stabilities (temperature drifts, ripple noise and electricity spikes). It is designed as a two-stage control loop, where controlled offset frequency is permanently monitored by digital signal processing. In case of dropouts of PLL, the frequency-locked loop keeps the controlled frequency in the required limits. The presented work gives the possibility of long-time operation of femtosecond combs which is necessary when the optical frequency stability measurement of ultra-stable lasers is required. The detailed description of the modern solution of the PLL with remote management is presented.

An open source digital servo for atomic, molecular, and optical physics experiments

DOE Office of Scientific and Technical Information (OSTI.GOV)

Leibrandt, D. R., E-mail: david.leibrandt@nist.gov; Heidecker, J.

2015-12-15

We describe a general purpose digital servo optimized for feedback control of lasers in atomic, molecular, and optical physics experiments. The servo is capable of feedback bandwidths up to roughly 1 MHz (limited by the 320 ns total latency); loop filter shapes up to fifth order; multiple-input, multiple-output control; and automatic lock acquisition. The configuration of the servo is controlled via a graphical user interface, which also provides a rudimentary software oscilloscope and tools for measurement of system transfer functions. We illustrate the functionality of the digital servo by describing its use in two example scenarios: frequency control of themore » laser used to probe the narrow clock transition of {sup 27}Al{sup +} in an optical atomic clock, and length control of a cavity used for resonant frequency doubling of a laser.« less

An open source digital servo for atomic, molecular, and optical physics experiments.

PubMed

Leibrandt, D R; Heidecker, J

2015-12-01

We describe a general purpose digital servo optimized for feedback control of lasers in atomic, molecular, and optical physics experiments. The servo is capable of feedback bandwidths up to roughly 1 MHz (limited by the 320 ns total latency); loop filter shapes up to fifth order; multiple-input, multiple-output control; and automatic lock acquisition. The configuration of the servo is controlled via a graphical user interface, which also provides a rudimentary software oscilloscope and tools for measurement of system transfer functions. We illustrate the functionality of the digital servo by describing its use in two example scenarios: frequency control of the laser used to probe the narrow clock transition of (27)Al(+) in an optical atomic clock, and length control of a cavity used for resonant frequency doubling of a laser.

An open source digital servo for atomic, molecular, and optical physics experiments

NASA Astrophysics Data System (ADS)

Leibrandt, D. R.; Heidecker, J.

2015-12-01

We describe a general purpose digital servo optimized for feedback control of lasers in atomic, molecular, and optical physics experiments. The servo is capable of feedback bandwidths up to roughly 1 MHz (limited by the 320 ns total latency); loop filter shapes up to fifth order; multiple-input, multiple-output control; and automatic lock acquisition. The configuration of the servo is controlled via a graphical user interface, which also provides a rudimentary software oscilloscope and tools for measurement of system transfer functions. We illustrate the functionality of the digital servo by describing its use in two example scenarios: frequency control of the laser used to probe the narrow clock transition of 27Al+ in an optical atomic clock, and length control of a cavity used for resonant frequency doubling of a laser.

An open source digital servo for atomic, molecular, and optical physics experiments

PubMed Central

Leibrandt, D. R.; Heidecker, J.

2016-01-01

We describe a general purpose digital servo optimized for feedback control of lasers in atomic, molecular, and optical physics experiments. The servo is capable of feedback bandwidths up to roughly 1 MHz (limited by the 320 ns total latency); loop filter shapes up to fifth order; multiple-input, multiple-output control; and automatic lock acquisition. The configuration of the servo is controlled via a graphical user interface, which also provides a rudimentary software oscilloscope and tools for measurement of system transfer functions. We illustrate the functionality of the digital servo by describing its use in two example scenarios: frequency control of the laser used to probe the narrow clock transition of 27Al+ in an optical atomic clock, and length control of a cavity used for resonant frequency doubling of a laser. PMID:26724014

Method of implementing digital phase-locked loops

NASA Technical Reports Server (NTRS)

Stephens, Scott A. (Inventor); Thomas, Jess Brooks, Jr. (Inventor)

1993-01-01

In a new formulation for digital phase-locked loops, loop-filter constants are determined from loop roots that can each be selectively placed in the s-plane on the basis of a new set of parameters, each with simple and direct physical meaning in terms of loop noise bandwidth, root-specific decay rate, or root-specific damping. Loops of first to fourth order are treated in the continuous-update approximation (BLT yields 0) and in a discrete-update formulation with arbitrary BLT. Deficiencies of the continuous-update approximation in large-BLT applications are avoided in the new discrete-update formulation. A new method for direct, transient-free acquisition with third- and fourth-order loops can improve the versatility and reliability of acquisition with such loops.

Modern digital flight control system design for VTOL aircraft

NASA Technical Reports Server (NTRS)

Broussard, J. R.; Berry, P. W.; Stengel, R. F.

1979-01-01

Methods for and results from the design and evaluation of a digital flight control system (DFCS) for a CH-47B helicopter are presented. The DFCS employed proportional-integral control logic to provide rapid, precise response to automatic or manual guidance commands while following conventional or spiral-descent approach paths. It contained altitude- and velocity-command modes, and it adapted to varying flight conditions through gain scheduling. Extensive use was made of linear systems analysis techniques. The DFCS was designed, using linear-optimal estimation and control theory, and the effects of gain scheduling are assessed by examination of closed-loop eigenvalues and time responses.

Users manual for flight control design programs

NASA Technical Reports Server (NTRS)

Nalbandian, J. Y.

1975-01-01

Computer programs for the design of analog and digital flight control systems are documented. The program DIGADAPT uses linear-quadratic-gaussian synthesis algorithms in the design of command response controllers and state estimators, and it applies covariance propagation analysis to the selection of sampling intervals for digital systems. Program SCHED executes correlation and regression analyses for the development of gain and trim schedules to be used in open-loop explicit-adaptive control laws. A linear-time-varying simulation of aircraft motions is provided by the program TVHIS, which includes guidance and control logic, as well as models for control actuator dynamics. The programs are coded in FORTRAN and are compiled and executed on both IBM and CDC computers.

Innovations in Rheometer Controlled-Rate Control Loop Design: Ultra Low Angular Speed Control and New Applications

NASA Astrophysics Data System (ADS)

Schulz, Ulrich; Sierro, Philippe; Nijman, Jint

2008-07-01

The design and implementation of an angular speed control loop for a universal rheometer is not a trivial task. The combination of a highly dynamic, very low inertia (drag cup) motor (motor inertia is 10-5 kg m2) with samples which can range in viscosity from 10-3 Pas to 108 Pas, which can be between purely viscous and higly viscoelastic, which can exhibit yield-stresses, etc. asks for a highly adaptive digital control loop. For the HAAKE MARS rotational rheometer a new adaptive control loop was developed which allows the control of angular speeds as low 5×10-9 rad/s and response times a short as 10 ms. The adaptation of the control loop to "difficult" samples is performed by analysing the response of the complete system to a short pre-test. In this paper we will show that the (very) short response times at (very) low angular speeds are not only achieved with ideal samples, but due to the adaptable control loop, also with "difficult" samples. We will show measurement results on "difficult" samples like cosmetic creams and emulsions, a laponite gel, etc. to proof that angular speeds down to 10-4 rad/s are reached within 10 ms to 20 ms and angular speeds down to 10-7 rad/s within 1 s to 2 s. The response times for reaching ultra low angular speeds down to 5×10-9 rad/s are in the order of 10 s to 30 s. With this new control loop it is, for the first time, possible to measure yield stresses by applying a very low constant shear-rate to the sample and measuring the torque response as a function of time.

Flight-test experience in digital control of a remotely piloted vehicle.

NASA Technical Reports Server (NTRS)

Edwards, J. W.

1972-01-01

The development of a remotely piloted vehicle system consisting of a remote pilot cockpit and a ground-based digital computer coupled to the aircraft through telemetry data links is described. The feedback control laws are implemented in a FORTRAN program. Flight-test experience involving high feedback gain limits for attitude and attitude rate feedback variables, filtering of sampled data, and system operation during intermittent telemetry data link loss is discussed. Comparisons of closed-loop flight tests with analytical calculations, and pilot comments on system operation are included.

Open-loop digital frequency multiplier

NASA Technical Reports Server (NTRS)

Moore, R. C.

1977-01-01

Monostable multivibrator is implemented by using digital integrated circuits where multiplier constant is too large for conventional phase-locked-loop integrated circuit. A 400 Hz clock is generated by divide-by-N counter from 1 Hz timing reference.

A Pilot-Scale Heat Recovery System for Computer Process Control Teaching and Research.

ERIC Educational Resources Information Center

Callaghan, P. J.; And Others

1988-01-01

Describes the experimental system and equipment including an interface box for displaying variables. Discusses features which make the circuit suitable for teaching and research in computing. Feedforward, decoupling, and adaptive control, examination of digital filtering, and a cascade loop are teaching experiments utilizing this rig. Diagrams and…

Flexible body stability analysis of Space Shuttle ascent flight control system by using lambda matrix solution techniques

NASA Technical Reports Server (NTRS)

Bown, R. L.; Christofferson, A.; Lardas, M.; Flanders, H.

1980-01-01

A lambda matrix solution technique is being developed to perform an open loop frequency analysis of a high order dynamic system. The procedure evaluates the right and left latent vectors corresponding to the respective latent roots. The latent vectors are used to evaluate the partial fraction expansion formulation required to compute the flexible body open loop feedback gains for the Space Shuttle Digital Ascent Flight Control System. The algorithm is in the final stages of development and will be used to insure that the feedback gains meet the design specification.

A new mathematical model and control of a three-phase AC-DC voltage source converter

DOE Office of Scientific and Technical Information (OSTI.GOV)

Blasko, V.; Kaura, V.

1997-01-01

A new mathematical model of the power circuit of a three-phase voltage source converter (VSC) was developed in the stationary and synchronous reference frames. The mathematical model was then used to analyze and synthesize the voltage and current control loops for the VSC. Analytical expressions were derived for calculating the gains and time constants of the current and voltage regulators. The mathematical model was used to control a 140-kW regenerative VSC. The synchronous reference frame model was used to define feedforward signals in the current regulators to eliminate the cross coupling between the d and q phases. It allowed themore » reduction of the current control loop to first-order plants and improved their tracking capability. The bandwidths of the current and voltage-control loops were found to be approximately 20 and 60 times (respectively) smaller than the sampling frequency. All control algorithms were implemented in a digital-signal processor. All results of the analysis were experimentally verified.« less

Method of Implementing Digital Phase-Locked Loops

NASA Technical Reports Server (NTRS)

Stephens, Scott A. (Inventor); Thomas, J. Brooks (Inventor)

1997-01-01

In a new formulation for digital phase-locked loops, loop-filter constants are determined from loop roots that can each be selectively placed in the s-plane on the basis of a new set of parameters, each with simple and direct physical meaning in terms of loop noise bandwidth, root-specific decay rate, and root-specific damping. Loops of first to fourth order are treated in the continuous-update approximation (B(sub L)T approaches 0) and in a discrete-update formulation with arbitrary B(sub L)T. Deficiencies of the continuous-update approximation in large-B(sub L)T applications are avoided in the new discrete-update formulation.

A digitally implemented phase-locked loop detection scheme for analysis of the phase and power stability of a calibration tone

NASA Technical Reports Server (NTRS)

Densmore, A. C.

1988-01-01

A digital phase-locked loop (PLL) scheme is described which detects the phase and power of a high SNR calibration tone. The digital PLL is implemented in software directly from the given description. It was used to evaluate the stability of the Goldstone Deep Space Station open loop receivers for Radio Science. Included is a derivative of the Allan variance sensitivity of the PLL imposed by additive white Gaussian noise; a lower limit is placed on the carrier frequency.

Method and apparatus for analog signal conditioner for high speed, digital x-ray spectrometer

DOEpatents

Warburton, William K.; Hubbard, Bradley

1999-01-01

A signal processing system which accepts input from an x-ray detector-preamplifier and produces a signal of reduced dynamic range for subsequent analog-to-digital conversion. The system conditions the input signal to reduce the number of bits required in the analog-to-digital converter by removing that part of the input signal which varies only slowly in time and retaining the amplitude of the pulses which carry information about the x-rays absorbed by the detector. The parameters controlling the signal conditioner's operation can be readily supplied in digital form, allowing it to be integrated into a feedback loop as part of a larger digital x-ray spectroscopy system.

A digital, constant-frequency pulsed phase-locked-loop instrument for real-time, absolute ultrasonic phase measurements

NASA Astrophysics Data System (ADS)

Haldren, H. A.; Perey, D. F.; Yost, W. T.; Cramer, K. E.; Gupta, M. C.

2018-05-01

A digitally controlled instrument for conducting single-frequency and swept-frequency ultrasonic phase measurements has been developed based on a constant-frequency pulsed phase-locked-loop (CFPPLL) design. This instrument uses a pair of direct digital synthesizers to generate an ultrasonically transceived tone-burst and an internal reference wave for phase comparison. Real-time, constant-frequency phase tracking in an interrogated specimen is possible with a resolution of 0.000 38 rad (0.022°), and swept-frequency phase measurements can be obtained. Using phase measurements, an absolute thickness in borosilicate glass is presented to show the instrument's efficacy, and these results are compared to conventional ultrasonic pulse-echo time-of-flight (ToF) measurements. The newly developed instrument predicted the thickness with a mean error of -0.04 μm and a standard deviation of error of 1.35 μm. Additionally, the CFPPLL instrument shows a lower measured phase error in the absence of changing temperature and couplant thickness than high-resolution cross-correlation ToF measurements at a similar signal-to-noise ratio. By showing higher accuracy and precision than conventional pulse-echo ToF measurements and lower phase errors than cross-correlation ToF measurements, the new digitally controlled CFPPLL instrument provides high-resolution absolute ultrasonic velocity or path-length measurements in solids or liquids, as well as tracking of material property changes with high sensitivity. The ability to obtain absolute phase measurements allows for many new applications than possible with previous ultrasonic pulsed phase-locked loop instruments. In addition to improved resolution, swept-frequency phase measurements add useful capability in measuring properties of layered structures, such as bonded joints, or materials which exhibit non-linear frequency-dependent behavior, such as dispersive media.

The digital phase-locked loop as a near-optimum FM demodulator.

NASA Technical Reports Server (NTRS)

Kelly, C. N.; Gupta, S. C.

1972-01-01

This paper presents an approach to the optimum digital demodulation of a continuous-time FM signal using stochastic estimation theory. The primary result is a digital phase-locked loop realization possessing performance characteristics that approach those of the analog counterpart. Some practical considerations are presented and simulation results for a first-order message model are presented.

Singular perturbations and time scales in the design of digital flight control systems

NASA Technical Reports Server (NTRS)

Naidu, Desineni S.; Price, Douglas B.

1988-01-01

The results are presented of application of the methodology of Singular Perturbations and Time Scales (SPATS) to the control of digital flight systems. A block diagonalization method is described to decouple a full order, two time (slow and fast) scale, discrete control system into reduced order slow and fast subsystems. Basic properties and numerical aspects of the method are discussed. A composite, closed-loop, suboptimal control system is constructed as the sum of the slow and fast optimal feedback controls. The application of this technique to an aircraft model shows close agreement between the exact solutions and the decoupled (or composite) solutions. The main advantage of the method is the considerable reduction in the overall computational requirements for the evaluation of optimal guidance and control laws. The significance of the results is that it can be used for real time, onboard simulation. A brief survey is also presented of digital flight systems.

Development of a Comprehensive Digital Avionics Curriculum for the Aeronautical Engineer

DTIC Science & Technology

2006-03-01

able to analyze and design aircraft and missile guidance and control systems, including feedback stabilization schemes and stochastic processes, using ...Uncertainty modeling for robust control; Robust closed-loop stability and performance; Robust H- infinity control; Robustness check using mu-analysis...Controlled feedback (reduces noise) 3. Statistical group response (reduce pressure toward conformity) When used as a tool to study a complex problem

Digital tanlock loop architecture with no delay

NASA Astrophysics Data System (ADS)

Al-Kharji AL-Ali, Omar; Anani, Nader; Al-Araji, Saleh; Al-Qutayri, Mahmoud; Ponnapalli, Prasad

2012-02-01

This article proposes a new architecture for a digital tanlock loop which eliminates the time-delay block. The ? (rad) phase shift relationship between the two channels, which is generated by the delay block in the conventional time-delay digital tanlock loop (TDTL), is preserved using two quadrature sampling signals for the loop channels. The proposed system outperformed the original TDTL architecture, when both systems were tested with frequency shift keying input signal. The new system demonstrated better linearity and acquisition speed as well as improved noise performance compared with the original TDTL architecture. Furthermore, the removal of the time-delay block enables all processing to be digitally performed, which reduces the implementation complexity. Both the original TDTL and the new architecture without the delay block were modelled and simulated using MATLAB/Simulink. Implementation issues, including complexity and relation to simulation of both architectures, are also addressed.

An application of modern control theory to jet propulsion systems. [considering onboard computer

NASA Technical Reports Server (NTRS)

Merrill, W. C.

1975-01-01

The control of an airbreathing turbojet engine by an onboard digital computer is studied. The approach taken is to model the turbojet engine as a linear, multivariable system whose parameters vary with engine operating environment. From this model adaptive closed-loop or feedback control laws are designed and applied to the acceleration of the turbojet engine.

Hidden attractors in dynamical models of phase-locked loop circuits: Limitations of simulation in MATLAB and SPICE

NASA Astrophysics Data System (ADS)

Kuznetsov, N. V.; Leonov, G. A.; Yuldashev, M. V.; Yuldashev, R. V.

2017-10-01

During recent years it has been shown that hidden oscillations, whose basin of attraction does not overlap with small neighborhoods of equilibria, may significantly complicate simulation of dynamical models, lead to unreliable results and wrong conclusions, and cause serious damage in drilling systems, aircrafts control systems, electromechanical systems, and other applications. This article provides a survey of various phase-locked loop based circuits (used in satellite navigation systems, optical, and digital communication), where such difficulties take place in MATLAB and SPICE. Considered examples can be used for testing other phase-locked loop based circuits and simulation tools, and motivate the development and application of rigorous analytical methods for the global analysis of phase-locked loop based circuits.

Hardware platforms for MEMS gyroscope tuning based on evolutionary computation using open-loop and closed -loop frequency response

NASA Technical Reports Server (NTRS)

Keymeulen, Didier; Ferguson, Michael I.; Fink, Wolfgang; Oks, Boris; Peay, Chris; Terrile, Richard; Cheng, Yen; Kim, Dennis; MacDonald, Eric; Foor, David

2005-01-01

We propose a tuning method for MEMS gyroscopes based on evolutionary computation to efficiently increase the sensitivity of MEMS gyroscopes through tuning. The tuning method was tested for the second generation JPL/Boeing Post-resonator MEMS gyroscope using the measurement of the frequency response of the MEMS device in open-loop operation. We also report on the development of a hardware platform for integrated tuning and closed loop operation of MEMS gyroscopes. The control of this device is implemented through a digital design on a Field Programmable Gate Array (FPGA). The hardware platform easily transitions to an embedded solution that allows for the miniaturization of the system to a single chip.

Application handbook for a Standardized Control Module (SCM) for DC-DC converters, volume 1

NASA Astrophysics Data System (ADS)

Lee, F. C.; Mahmoud, M. F.; Yu, Y.

1980-04-01

The standardized control module (SCM) was developed for application in the buck, boost and buck/boost DC-DC converters. The SCM used multiple feedback loops to provide improved input line and output load regulation, stable feedback control system, good dynamic transient response and adaptive compensation of the control loop for changes in open loop gain and output filter time constraints. The necessary modeling and analysis tools to aid the design engineer in the application of the SCM to DC-DC Converters were developed. The SCM functional block diagram and the different analysis techniques were examined. The average time domain analysis technique was chosen as the basic analytical tool. The power stage transfer functions were developed for the buck, boost and buck/boost converters. The analog signal and digital signal processor transfer functions were developed for the three DC-DC Converter types using the constant on time, constant off time and constant frequency control laws.

Application handbook for a Standardized Control Module (SCM) for DC-DC converters, volume 1

NASA Technical Reports Server (NTRS)

Lee, F. C.; Mahmoud, M. F.; Yu, Y.

1980-01-01

The standardized control module (SCM) was developed for application in the buck, boost and buck/boost DC-DC converters. The SCM used multiple feedback loops to provide improved input line and output load regulation, stable feedback control system, good dynamic transient response and adaptive compensation of the control loop for changes in open loop gain and output filter time constraints. The necessary modeling and analysis tools to aid the design engineer in the application of the SCM to DC-DC Converters were developed. The SCM functional block diagram and the different analysis techniques were examined. The average time domain analysis technique was chosen as the basic analytical tool. The power stage transfer functions were developed for the buck, boost and buck/boost converters. The analog signal and digital signal processor transfer functions were developed for the three DC-DC Converter types using the constant on time, constant off time and constant frequency control laws.

Automatic NMR field-frequency lock-pulsed phase locked loop approach.

PubMed

Kan, S; Gonord, P; Fan, M; Sauzade, M; Courtieu, J

1978-06-01

A self-contained deuterium frequency-field lock scheme for a high-resolution NMR spectrometer is described. It is based on phase locked loop techniques in which the free induction decay signal behaves as a voltage-controlled oscillator. By pulsing the spins at an offset frequency of a few hundred hertz and using a digital phase-frequency discriminator this method not only eliminates the usual phase, rf power, offset adjustments needed in conventional lock systems but also possesses the automatic pull-in characteristics that dispense with the use of field sweeps to locate the NMR line prior to closure of the lock loop.

Designing Estimator/Predictor Digital Phase-Locked Loops

NASA Technical Reports Server (NTRS)

Statman, J. I.; Hurd, W. J.

1988-01-01

Signal delays in equipment compensated automatically. New approach to design of digital phase-locked loop (DPLL) incorporates concepts from estimation theory and involves decomposition of closed-loop transfer function into estimator and predictor. Estimator provides recursive estimates of phase, frequency, and higher order derivatives of phase with respect to time, while predictor compensates for delay, called "transport lag," caused by PLL equipment and by DPLL computations.

Digital Phase-Locked Loop With Phase And Frequency Feedback

NASA Technical Reports Server (NTRS)

Thomas, J. Brooks

1991-01-01

Advanced design for digital phase-lock loop (DPLL) allows loop gains higher than those used in other designs. Divided into two major components: counterrotation processor and tracking processor. Notable features include use of both phase and rate-of-change-of-phase feedback instead of frequency feedback alone, normalized sine phase extractor, improved method for extracting measured phase, and improved method for "compressing" output rate.

All-Digital Baseband 65nm PLL/FPLL Clock Multiplier using 10-cell Library

NASA Technical Reports Server (NTRS)

Shuler, Robert L., Jr.; Wu, Qiong; Liu, Rui; Chen, Li

2014-01-01

PLLs for clock generation are essential for modern circuits, to generate specialized frequencies for many interfaces and high frequencies for chip internal operation. These circuits depend on analog circuits and careful tailoring for each new process, and making them fault tolerant is an incompletely solved problem. Until now, all digital PLLs have been restricted to sampled data DSP techniques and not available for the highest frequency baseband applications. This paper presents the design and preliminary evaluation of an all-digital baseband technique built entirely with an easily portable 10-cell digital library. The library is also described, as it aids in research and low volume design porting to new processes. The advantages of the digital approach are the wide variety of techniques available to give varying degrees of fault tolerance, and the simplicity of porting the design to new processes, even to exotic processes that may not have analog capability. The only tuning parameter is digital gate delay. An all-digital approach presents unique problems and standard analog loop stability design criteria cannot be directly used. Because of the quantization of frequency, there is effectively infinite gain for very small loop error feedback. The numerically controlled oscillator (NCO) based on a tapped delay line cannot be reliably updated while a pulse is active in the delay line, and ordinarily does not have enough frequency resolution for a low-jitter output.

ALL-Digital Baseband 65nm PLL/FPLL Clock Multiplier Using 10-Cell Library

NASA Technical Reports Server (NTRS)

Schuler, Robert L., Jr.; Wu, Qiong; Liu, Rui; Chen, Li; Madala, Shridhar

2014-01-01

PLLs for clock generation are essential for modern circuits, to generate specialized frequencies for many interfaces and high frequencies for chip internal operation. These circuits depend on analog circuits and careful tailoring for each new process, and making them fault tolerant is an incompletely solved problem. Until now, all digital PLLs have been restricted to sampled data DSP techniques and not available for the highest frequency baseband applications. This paper presents the design and preliminary evaluation of an all-digital baseband technique built entirely with an easily portable 10-cell digital library. The library is also described, as it aids in research and low volume design porting to new processes. The advantages of the digital approach are the wide variety of techniques available to give varying degrees of fault tolerance, and the simplicity of porting the design to new processes, even to exotic processes that may not have analog capability. The only tuning parameter is digital gate delay. An all-digital approach presents unique problems and standard analog loop stability design criteria cannot be directly used. Because of the quantization of frequency, there is effectively infinite gain for very small loop error feedback. The numerically controlled oscillator (NCO) based on a tapped delay line cannot be reliably updated while a pulse is active in the delay line, and ordinarily does not have enough frequency resolution for a low-jitter output.

Fractional-N phase-locked loop for split and direct automatic frequency control in A-GPS

NASA Astrophysics Data System (ADS)

Park, Chester Sungchung; Park, Sungkyung

2018-07-01

A low-power mixed-signal phase-locked loop (PLL) is modelled and designed for the DigRF interface between the RF chip and the modem chip. An assisted-GPS or A-GPS multi-standard system includes the DigRF interface and uses the split automatic frequency control (AFC) technique. The PLL circuitry uses the direct AFC technique and is based on the fractional-N architecture using a digital delta-sigma modulator along with a digital counter, fulfilling simple ultra-high-resolution AFC with robust digital circuitry and its timing. Relative to the output frequency, the measured AFC resolution or accuracy is <5 parts per billion (ppb) or on the order of a Hertz. The cycle-to-cycle rms jitter is <6 ps and the typical settling time is <30 μs. A spur reduction technique is adopted and implemented as well, demonstrating spur reduction without employing dithering. The proposed PLL includes a low-leakage phase-frequency detector, a low-drop-out regulator, power-on-reset circuitry and precharge circuitry. The PLL is implemented in a 90-nm CMOS process technology with 1.2 V single supply. The overall PLL draws about 1.1 mA from the supply.

Evaluation of a closed loop inductive power transmission system on an awake behaving animal subject.

PubMed

Kiani, Mehdi; Kwon, Ki Yong; Zhang, Fei; Oweiss, Karim; Ghovanloo, Maysam

2011-01-01

This paper presents in vivo experimental results for a closed loop wireless power transmission system to implantable devices on an awake behaving animal subject. In this system, wireless power transmission takes place across an inductive link, controlled by a commercial off-the-shelf (COTS) radio frequency identification (RFID) transceiver (TRF7960) operating at 13.56 MHz. Induced voltage on the implantable secondary coil is rectified, digitized by a 10-bit analog to digital converter, and transmitted back to the primary via back telemetry. Transmitter (Tx) and receiver (Rx) circuitry were mounted on the back of an adult rat with a nominal distance of ~7 mm between their coils. Our experiments showed that the closed loop system was able to maintain the Rx supply voltage at the designated 3.8 V despite changes in the coils' relative distance and alignment due to animal movements. The Tx power consumption changed between 410 ~ 560 mW in order to deliver 27 mW to the receiver. The open loop system, on the other hand, showed undesired changes in the Rx supply voltage while the Tx power consumption was constant at 660 mW.

Digital-only PLL with adaptive search step

NASA Astrophysics Data System (ADS)

Lin, Ming-Lang; Huang, Shu-Chuan; Liu, Jie-Cherng

2014-06-01

In this paper, an all-digital phase-locked loop (PLL) with adaptively controlled up/down counter serves as the loop filter is presented, and it is implemented on a field-programmable gate array. The detailed circuit of the adaptive up/down counter implementing the adaptive search algorithm is also given, in which the search step for frequency acquisition is adaptively scaled down in half until it is reduced to zero. The phase jitter of the proposed PLL can be lowered, yet keeping with fast lock-in time. Thus, the dilemma between the low phase jitter and fast lock-in time of the traditional PLL can be resolved. Simulation results and circuit implementation show that the locked count, phase jitter and lock-in time of the proposed PLL are consistent with the theoretical predictions.

ATCA digital controller hardware for vertical stabilization of plasmas in tokamaks

DOE Office of Scientific and Technical Information (OSTI.GOV)

Batista, A. J. N.; Sousa, J.; Varandas, C. A. F.

2006-10-15

The efficient vertical stabilization (VS) of plasmas in tokamaks requires a fast reaction of the VS controller, for example, after detection of edge localized modes (ELM). For controlling the effects of very large ELMs a new digital control hardware, based on the Advanced Telecommunications Computing Architecture trade mark sign (ATCA), is being developed aiming to reduce the VS digital control loop cycle (down to an optimal value of 10 {mu}s) and improve the algorithm performance. The system has 1 ATCA trade mark sign processor module and up to 12 ATCA trade mark sign control modules, each one with 32 analogmore » input channels (12 bit resolution), 4 analog output channels (12 bit resolution), and 8 digital input/output channels. The Aurora trade mark sign and PCI Express trade mark sign communication protocols will be used for data transport, between modules, with expected latencies below 2 {mu}s. Control algorithms are implemented on a ix86 based processor with 6 Gflops and on field programmable gate arrays with 80 GMACS, interconnected by serial gigabit links in a full mesh topology.« less

A high precision dual feedback discrete control system designed for satellite trajectory simulator

NASA Astrophysics Data System (ADS)

Liu, Ximin; Liu, Liren; Sun, Jianfeng; Xu, Nan

2005-08-01

Cooperating with the free-space laser communication terminals, the satellite trajectory simulator is used to test the acquisition, pointing, tracking and communicating performances of the terminals. So the satellite trajectory simulator plays an important role in terminal ground test and verification. Using the double-prism, Sun etc in our group designed a satellite trajectory simulator. In this paper, a high precision dual feedback discrete control system designed for the simulator is given and a digital fabrication of the simulator is made correspondingly. In the dual feedback discrete control system, Proportional- Integral controller is used in velocity feedback loop and Proportional- Integral- Derivative controller is used in position feedback loop. In the controller design, simplex method is introduced and an improvement to the method is made. According to the transfer function of the control system in Z domain, the digital fabrication of the simulator is given when it is exposed to mechanism error and moment disturbance. Typically, when the mechanism error is 100urad, the residual standard error of pitching angle, azimuth angle, x-coordinate position and y-coordinate position are 0.49urad, 6.12urad, 4.56urad, 4.09urad respectively. When the moment disturbance is 0.1rad, the residual standard error of pitching angle, azimuth angle, x-coordinate position and y-coordinate position are 0.26urad, 0.22urad, 0.16urad, 0.15urad respectively. The digital fabrication results demonstrate that the dual feedback discrete control system designed for the simulator can achieve the anticipated high precision performance.

Tuning of active vibration controllers for ACTEX by genetic algorithm

NASA Astrophysics Data System (ADS)

Kwak, Moon K.; Denoyer, Keith K.

1999-06-01

This paper is concerned with the optimal tuning of digitally programmable analog controllers on the ACTEX-1 smart structures flight experiment. The programmable controllers for each channel include a third order Strain Rate Feedback (SRF) controller, a fifth order SRF controller, a second order Positive Position Feedback (PPF) controller, and a fourth order PPF controller. Optimal manual tuning of several control parameters can be a difficult task even though the closed-loop control characteristics of each controller are well known. Hence, the automatic tuning of individual control parameters using Genetic Algorithms is proposed in this paper. The optimal control parameters of each control law are obtained by imposing a constraint on the closed-loop frequency response functions using the ACTEX mathematical model. The tuned control parameters are then uploaded to the ACTEX electronic control electronics and experiments on the active vibration control are carried out in space. The experimental results on ACTEX will be presented.

Validation of Digital Systems in Avionics and Flight Control Applications Handbook. Volume 1.

DTIC Science & Technology

1983-07-01

will also be available to Airways Facilities, Systems Research and Development Service, Air Traffic Control Service, and Flight Standards elements...2114, March 12-14, 1979. 3. Validation Methods Research for Fault-Tolerant Avionics and Control Systems-- *r Working Group Meeting II, NASA...command generation with the multiple methods becoming avail- able for closure of the outer control loop necessitates research on alternative integration

Flight control systems development of highly maneuverable aircraft technology /HiMAT/ vehicle

NASA Technical Reports Server (NTRS)

Petersen, K. L.

1979-01-01

The highly maneuverable aircraft technology (HiMAT) program was conceived to demonstrate advanced technology concepts through scaled-aircraft flight tests using a remotely piloted technique. Closed-loop primary flight control is performed from a ground-based cockpit, utilizing a digital computer and up/down telemetry links. A backup flight control system for emergency operation resides in an onboard computer. The onboard systems are designed to provide fail-operational capabilities and utilize two microcomputers, dual uplink receiver/decoders, and redundant hydraulic actuation and power systems. This paper discusses the design and validation of the primary and backup digital flight control systems as well as the unique pilot and specialized systems interfaces.

Analysis and Design of a Digital Controller for a Seismically Stable Platform.

DTIC Science & Technology

1981-12-01

disturbances are critical in gyroscope and accelerometer sensor evaluations. Distur- bances may be either measured, modeled and compensated in test profiles...controller design issues separately. Basically, the control law considerations are investigated assuming the SSP sensors provide perfect state...signal noise effects into sensor measurements through voltages induced in cabling directly or indirectly through ground loops in instrument amplifiers or

On the performance of digital phase locked loops in the threshold region

NASA Technical Reports Server (NTRS)

Hurst, G. T.; Gupta, S. C.

1974-01-01

Extended Kalman filter algorithms are used to obtain a digital phase lock loop structure for demodulation of angle modulated signals. It is shown that the error variance equations obtained directly from this structure enable one to predict threshold if one retains higher frequency terms. This is in sharp contrast to the similar analysis of the analog phase lock loop, where the higher frequency terms are filtered out because of the low pass filter in the loop. Results are compared to actual simulation results and threshold region results obtained previously.

Method and apparatus for analog signal conditioner for high speed, digital x-ray spectrometer

DOEpatents

Warburton, W.K.; Hubbard, B.

1999-02-09

A signal processing system which accepts input from an x-ray detector-preamplifier and produces a signal of reduced dynamic range for subsequent analog-to-digital conversion is disclosed. The system conditions the input signal to reduce the number of bits required in the analog-to-digital converter by removing that part of the input signal which varies only slowly in time and retaining the amplitude of the pulses which carry information about the x-rays absorbed by the detector. The parameters controlling the signal conditioner`s operation can be readily supplied in digital form, allowing it to be integrated into a feedback loop as part of a larger digital x-ray spectroscopy system. 13 figs.

About problematic peculiarities of Fault Tolerance digital regulation organization

NASA Astrophysics Data System (ADS)

Rakov, V. I.; Zakharova, O. V.

2018-05-01

The solution of problems concerning estimation of working capacity of regulation chains and possibilities of preventing situations of its violation in three directions are offered. The first direction is working out (creating) the methods of representing the regulation loop (circuit) by means of uniting (combining) diffuse components and forming algorithmic tooling for building predicates of serviceability assessment separately for the components and the for regulation loops (circuits, contours) in general. The second direction is creating methods of Fault Tolerance redundancy in the process of complex assessment of current values of control actions, closure errors and their regulated parameters. The third direction is creating methods of comparing the processes of alteration (change) of control actions, errors of closure and regulating parameters with their standard models or their surroundings. This direction allows one to develop methods and algorithmic tool means, aimed at preventing loss of serviceability and effectiveness of not only a separate digital regulator, but also the whole complex of Fault Tolerance regulation.

High-efficiency holograms fixed in lithium niobate after recording using a digital fringe stabilization system.

PubMed

Arizmendi, Luis; Ambite, Emilio J

2012-02-20

We used a digital feedback control loop system to produce reproducible fixed volume transmission holograms of high diffraction efficiency. Different strategies were investigated to obtain holograms of good quality and the highest refractive index modulation depth. Using this control system, we were able to record holograms with stationary fringes. Additionally to using the stationary fringe recording, a double recording-fixing schedule resulted in being the most appropriate one to produce reproducible holograms of better characteristics. This strategy is discussed and compared with other already established ones. © 2012 Optical Society of America

Closed loop performance of a brushless dc motor powered electromechanical actuator for flight control applications. [computerized simulation for Shuttle Orbiter applications

NASA Technical Reports Server (NTRS)

Demerdash, N. A.; Nehl, T. W.

1980-01-01

A comprehensive digital model for the analysis and possible optimization of the closed loop dynamic (instantaneous) performance of a power conditioner fed, brushless dc motor powered, electromechanical actuator system (EMA) is presented. This model was developed for the simulation of the dynamic performance of an actual prototype EMA built for NASA-JSC as a possible alternative to hydraulic actuators for consideration in Space Shuttle Orbiter applications. Excellent correlation was achieved between numerical model simulation and experimental test results obtained from the actual hardware. These results include: various current and voltage waveforms in the machine-power conditioner (MPC) unit, flap position as well as other control loop variables in response to step commands of change of flap position. These results with consequent conclusions are detailed in the paper.

An integrated user-oriented laboratory for verification of digital flight control systems: Features and capabilities

NASA Technical Reports Server (NTRS)

Defeo, P.; Doane, D.; Saito, J.

1982-01-01

A Digital Flight Control Systems Verification Laboratory (DFCSVL) has been established at NASA Ames Research Center. This report describes the major elements of the laboratory, the research activities that can be supported in the area of verification and validation of digital flight control systems (DFCS), and the operating scenarios within which these activities can be carried out. The DFCSVL consists of a palletized dual-dual flight-control system linked to a dedicated PDP-11/60 processor. Major software support programs are hosted in a remotely located UNIVAC 1100 accessible from the PDP-11/60 through a modem link. Important features of the DFCSVL include extensive hardware and software fault insertion capabilities, a real-time closed loop environment to exercise the DFCS, an integrated set of software verification tools, and a user-oriented interface to all the resources and capabilities.

Digital receiver study and implementation

NASA Technical Reports Server (NTRS)

Fogle, D. A.; Lee, G. M.; Massey, J. C.

1972-01-01

Computer software was developed which makes it possible to use any general purpose computer with A/D conversion capability as a PSK receiver for low data rate telemetry processing. Carrier tracking, bit synchronization, and matched filter detection are all performed digitally. To aid in the implementation of optimum computer processors, a study of general digital processing techniques was performed which emphasized various techniques for digitizing general analog systems. In particular, the phase-locked loop was extensively analyzed as a typical non-linear communication element. Bayesian estimation techniques for PSK demodulation were studied. A hardware implementation of the digital Costas loop was developed.

Digital Plasma Control System for Alcator C-Mod

NASA Astrophysics Data System (ADS)

Ferrara, M.; Wolfe, S.; Stillerman, J.; Fredian, T.; Hutchinson, I.

2004-11-01

A digital plasma control system (DPCS) has been designed to replace the present C-Mod system, which is based on hybrid analog-digital computer. The initial implementation of DPCS comprises two 64 channel, 16 bit, low-latency cPCI digitizers, each with 16 analog outputs, controlled by a rack-mounted single-processor Linux server, which also serves as the compute engine. A prototype system employing three older 32 channel digitizers was tested during the 2003-04 campaign. The hybrid's linear PID feedback system was emulated by IDL code executing a synchronous loop, using the same target waveforms and control parameters. Reliable real-time operation was accomplished under a standard Linux OS (RH9) by locking memory and disabling interrupts during the plasma pulse. The DPCS-computed outputs agreed to within a few percent with those produced by the hybrid system, except for discrepancies due to offsets and non-ideal behavior of the hybrid circuitry. The system operated reliably, with no sample loss, at more than twice the 10kHz design specification, providing extra time for implementing more advanced control algorithms. The code is fault-tolerant and produces consistent output waveforms even with 10% sample loss.

Control of the constrained planar simple inverted pendulum

NASA Technical Reports Server (NTRS)

Bavarian, B.; Wyman, B. F.; Hemami, H.

1983-01-01

Control of a constrained planar inverted pendulum by eigenstructure assignment is considered. Linear feedback is used to stabilize and decouple the system in such a way that specified subspaces of the state space are invariant for the closed-loop system. The effectiveness of the feedback law is tested by digital computer simulation. Pre-compensation by an inverse plant is used to improve performance.

Digital controller design: Continuous and discrete describing function analysis of the IPS system

NASA Technical Reports Server (NTRS)

1977-01-01

The dynamic equations and the mathematical model of the continuous-data IPS control system are developed. The IPS model considered included one flexible body mode and was hardmounted to the Orbiter/Pallet. The model contains equations describing a torque feed-forward loop (using accelerometers as inputs) which will aid in reducing the pointing errors caused by Orbiter disturbances.

Closed-loop Separation Control Using Oscillatory Flow Excitation

NASA Technical Reports Server (NTRS)

Allan, Brian G.; Juang, Jer-Nan; Raney, David L.; Seifert, Avi; Pack, latunia G.; Brown, Donald E.

2000-01-01

Design and implementation of a digital feedback controller for a flow control experiment was performed. The experiment was conducted in a cryogenic pressurized wind tunnel on a generic separated configuration at a chord Reynolds number of 16 million and a Mach number of 0.25. The model simulates the upper surface of a 20% thick airfoil at zero angle-of-attack. A moderate favorable pressure gradient, up to 55% of the chord, is followed by a severe adverse pressure gradient which is relaxed towards the trailing edge. The turbulent separation bubble, behind the adverse pressure gradient, is then reduced by introducing oscillatory flow excitation just upstream of the point of flow separation. The degree of reduction in the separation region can be controlled by the amplitude of the oscillatory excitation. A feedback controller was designed to track a given trajectory for the desired degree of flow reattachment and to improve the transient behavior of the flow system. Closed-loop experiments demonstrated that the feedback controller was able to track step input commands and improve the transient behavior of the open-loop response.

Design and Verification of a Digital Controller for a 2-Piece Hemispherical Resonator Gyroscope.

PubMed

Lee, Jungshin; Yun, Sung Wook; Rhim, Jaewook

2016-04-20

A Hemispherical Resonator Gyro (HRG) is the Coriolis Vibratory Gyro (CVG) that measures rotation angle or angular velocity using Coriolis force acting the vibrating mass. A HRG can be used as a rate gyro or integrating gyro without structural modification by simply changing the control scheme. In this paper, differential control algorithms are designed for a 2-piece HRG. To design a precision controller, the electromechanical modelling and signal processing must be pre-performed accurately. Therefore, the equations of motion for the HRG resonator with switched harmonic excitations are derived with the Duhamel Integral method. Electromechanical modeling of the resonator, electric module and charge amplifier is performed by considering the mode shape of a thin hemispherical shell. Further, signal processing and control algorithms are designed. The multi-flexing scheme of sensing, driving cycles and x, y-axis switching cycles is appropriate for high precision and low maneuverability systems. The differential control scheme is easily capable of rejecting the common mode errors of x, y-axis signals and changing the rate integrating mode on basis of these studies. In the rate gyro mode the controller is composed of Phase-Locked Loop (PLL), amplitude, quadrature and rate control loop. All controllers are designed on basis of a digital PI controller. The signal processing and control algorithms are verified through Matlab/Simulink simulations. Finally, a FPGA and DSP board with these algorithms is verified through experiments.

Design and experimental evaluation of robust controllers for a two-wheeled robot

NASA Astrophysics Data System (ADS)

Kralev, J.; Slavov, Ts.; Petkov, P.

2016-11-01

The paper presents the design and experimental evaluation of two alternative μ-controllers for robust vertical stabilisation of a two-wheeled self-balancing robot. The controllers design is based on models derived by identification from closed-loop experimental data. In the first design, a signal-based uncertainty representation obtained directly from the identification procedure is used, which leads to a controller of order 29. In the second design the signal uncertainty is approximated by an input multiplicative uncertainty, which leads to a controller of order 50, subsequently reduced to 30. The performance of the two μ-controllers is compared with the performance of a conventional linear quadratic controller with 17th-order Kalman filter. A proportional-integral controller of the rotational motion around the vertical axis is implemented as well. The control code is generated using Simulink® controller models and is embedded in a digital signal processor. Results from the simulation of the closed-loop system as well as experimental results obtained during the real-time implementation of the designed controllers are given. The theoretical investigation and experimental results confirm that the closed-loop system achieves robust performance in respect to the uncertainties related to the identified robot model.

Digital computer simulation of inductor-energy-storage dc-to-dc converters with closed-loop regulators

NASA Technical Reports Server (NTRS)

Ohri, A. K.; Owen, H. A.; Wilson, T. G.; Rodriguez, G. E.

1974-01-01

The simulation of converter-controller combinations by means of a flexible digital computer program which produces output to a graphic display is discussed. The procedure is an alternative to mathematical analysis of converter systems. The types of computer programming involved in the simulation are described. Schematic diagrams, state equations, and output equations are displayed for four basic forms of inductor-energy-storage dc to dc converters. Mathematical models are developed to show the relationship of the parameters.

Digital controller design: Analysis of the annular suspension pointing system

NASA Technical Reports Server (NTRS)

Kuo, B. C.

1979-01-01

The Annular Suspension and Pointing System (ASPS) is a payload auxiliary pointing device of the Space Shuttle. The ASPS is comprised of two major subassemblies, a vernier and a coarse pointing subsystem. The experiment is attached to a mounting plate/rim combination which is suspended on magnetic bearing/actuators (MBA) strategically located about the rim. Fine pointing is achieved by gimballing the plate/rim within the MBA gaps. Control about the experiment line-of-sight is obtained through the use of a non-contacting rim drive and positioning torquer. All sensors used to close the servo loops on the vernier system are noncontacting elements. Therefore, the experiment is a free-flyer constrained only by the magnetic forces generated by the control loops.

Design, implementation and flight testing of PIF autopilots for general aviation aircraft

NASA Technical Reports Server (NTRS)

Broussard, J. R.

1983-01-01

The designs of Proportional-Integrated-Filter (PIF) auto-pilots for a General Aviation (NAVION) aircraft are presented. The PIF autopilot uses the sampled-data regulator and command generator tracking to determine roll select, pitch select, heading select, altitude select and localizer/glideslope capture and hold autopilot modes. The PIF control law uses typical General Aviation sensors for state feedback, command error integration for command tracking, digital complementary filtering and analog prefiltering for sensor noise suppression, a control filter for computation delay accommodation and the incremental form to eliminate trim values in implementation. Theoretical developments described in detail, were needed to combine the sampled-data regulator with command generator tracking for use as a digital flight control system. The digital PIF autopilots are evaluated using closed-loop eigenvalues and linear simulations. The implementation of the PIF autopilots in a digital flight computer using a high order language (FORTRAN) is briefly described. The successful flight test results for each PIF autopilot mode is presented.

Digitally controlled twelve-pulse firing generator

DOE Office of Scientific and Technical Information (OSTI.GOV)

Berde, D.; Ferrara, A.A.

1981-01-01

Control System Studies for the Tokamak Fusion Test Reactor (TFTR) indicate that accurate thyristor firing in the AC-to-DC conversion system is required in order to achieve good regulation of the various field currents. Rapid update and exact firing angle control are required to avoid instabilities, large eddy currents, or parasitic oscillations. The Prototype Firing Generator was designed to satisfy these requirements. To achieve the required /plus or minus/0.77/degree/firing accuracy, a three-phase-locked loop reference was designed; otherwise, the Firing Generator employs digital circuitry. The unit, housed in a standard CAMAC crate, operates under microcomputer control. Functions are performed under program control,more » which resides in nonvolatile read-only memory. Communication with CICADA control system is provided via an 11-bit parallel interface.« less

Digital Phase Meter for a Laser Heterodyne Interferometer

NASA Technical Reports Server (NTRS)

Loya, Frank

2008-01-01

The Digital Phase Meter is based on a modified phase-locked loop. When phase alignment between the reference input and the phase-shifted metrological input is achieved, the loop locks and the phase shift of the digital phase shifter equals the phase difference that one seeks to measure. This digital phase meter is being developed for incorporation into a laser heterodyne interferometer in a metrological apparatus, but could also be adapted to other uses. Relative to prior phase meters of similar capability, including digital ones, this digital phase meter is smaller, less complex, and less expensive. The phase meter has been constructed and tested in the form of a field-programmable gate array (FPGA).

Beat note stabilization of a 10-60 GHz dual-polarization microlaser through optical down conversion.

PubMed

Rolland, A; Brunel, M; Loas, G; Frein, L; Vallet, M; Alouini, M

2011-02-28

Down-conversion of a high-frequency beat note to an intermediate frequency is realized by a Mach-Zehnder intensity modulator. Optically-carried microwave signals in the 10-60 GHz range are synthesized by using a two-frequency solid-state microchip laser as a voltage-controlled oscillator inside a digital phase-locked loop. We report an in-loop relative frequency stability better than 2.5×10⁻¹¹. The principle is applicable to beat notes in the millimeter-wave range.

Aircraft digital control design methods

NASA Technical Reports Server (NTRS)

Powell, J. D.; Parsons, E.; Tashker, M. G.

1976-01-01

Variations in design methods for aircraft digital flight control are evaluated and compared. The methods fall into two categories; those where the design is done in the continuous domain (or s plane) and those where the design is done in the discrete domain (or z plane). Design method fidelity is evaluated by examining closed loop root movement and the frequency response of the discretely controlled continuous aircraft. It was found that all methods provided acceptable performance for sample rates greater than 10 cps except the uncompensated s plane design method which was acceptable above 20 cps. A design procedure based on optimal control methods was proposed that provided the best fidelity at very slow sample rates and required no design iterations for changing sample rates.

Adaptive control for accelerators

DOEpatents

Eaton, Lawrie E.; Jachim, Stephen P.; Natter, Eckard F.

1991-01-01

An adaptive feedforward control loop is provided to stabilize accelerator beam loading of the radio frequency field in an accelerator cavity during successive pulses of the beam into the cavity. A digital signal processor enables an adaptive algorithm to generate a feedforward error correcting signal functionally determined by the feedback error obtained by a beam pulse loading the cavity after the previous correcting signal was applied to the cavity. Each cavity feedforward correcting signal is successively stored in the digital processor and modified by the feedback error resulting from its application to generate the next feedforward error correcting signal. A feedforward error correcting signal is generated by the digital processor in advance of the beam pulse to enable a composite correcting signal and the beam pulse to arrive concurrently at the cavity.

Real-time closed-loop simulation and upset evaluation of control systems in harsh electromagnetic environments

NASA Technical Reports Server (NTRS)

Belcastro, Celeste M.

1989-01-01

Digital control systems for applications such as aircraft avionics and multibody systems must maintain adequate control integrity in adverse as well as nominal operating conditions. For example, control systems for advanced aircraft, and especially those with relaxed static stability, will be critical to flight and will, therefore, have very high reliability specifications which must be met regardless of operating conditions. In addition, multibody systems such as robotic manipulators performing critical functions must have control systems capable of robust performance in any operating environment in order to complete the assigned task reliably. Severe operating conditions for electronic control systems can result from electromagnetic disturbances caused by lightning, high energy radio frequency (HERF) transmitters, and nuclear electromagnetic pulses (NEMP). For this reason, techniques must be developed to evaluate the integrity of the control system in adverse operating environments. The most difficult and illusive perturbations to computer-based control systems that can be caused by an electromagnetic environment (EME) are functional error modes that involve no component damage. These error modes are collectively known as upset, can occur simultaneously in all of the channels of a redundant control system, and are software dependent. Upset studies performed to date have not addressed the assessment of fault tolerant systems and do not involve the evaluation of a control system operating in a closed-loop with the plant. A methodology for performing a real-time simulation of the closed-loop dynamics of a fault tolerant control system with a simulated plant operating in an electromagnetically harsh environment is presented. In particular, considerations for performing upset tests on the controller are discussed. Some of these considerations are the generation and coupling of analog signals representative of electromagnetic disturbances to a control system under test, analog data acquisition, and digital data acquisition from fault tolerant systems. In addition, a case study of an upset test methodology for a fault tolerant electromagnetic aircraft engine control system is presented.

Iterative learning-based decentralized adaptive tracker for large-scale systems: a digital redesign approach.

PubMed

Tsai, Jason Sheng-Hong; Du, Yan-Yi; Huang, Pei-Hsiang; Guo, Shu-Mei; Shieh, Leang-San; Chen, Yuhua

2011-07-01

In this paper, a digital redesign methodology of the iterative learning-based decentralized adaptive tracker is proposed to improve the dynamic performance of sampled-data linear large-scale control systems consisting of N interconnected multi-input multi-output subsystems, so that the system output will follow any trajectory which may not be presented by the analytic reference model initially. To overcome the interference of each sub-system and simplify the controller design, the proposed model reference decentralized adaptive control scheme constructs a decoupled well-designed reference model first. Then, according to the well-designed model, this paper develops a digital decentralized adaptive tracker based on the optimal analog control and prediction-based digital redesign technique for the sampled-data large-scale coupling system. In order to enhance the tracking performance of the digital tracker at specified sampling instants, we apply the iterative learning control (ILC) to train the control input via continual learning. As a result, the proposed iterative learning-based decentralized adaptive tracker not only has robust closed-loop decoupled property but also possesses good tracking performance at both transient and steady state. Besides, evolutionary programming is applied to search for a good learning gain to speed up the learning process of ILC. Copyright © 2011 ISA. Published by Elsevier Ltd. All rights reserved.

Bio-Inspired Controller on an FPGA Applied to Closed-Loop Diaphragmatic Stimulation

PubMed Central

Zbrzeski, Adeline; Bornat, Yannick; Hillen, Brian; Siu, Ricardo; Abbas, James; Jung, Ranu; Renaud, Sylvie

2016-01-01

Cervical spinal cord injury can disrupt connections between the brain respiratory network and the respiratory muscles which can lead to partial or complete loss of ventilatory control and require ventilatory assistance. Unlike current open-loop technology, a closed-loop diaphragmatic pacing system could overcome the drawbacks of manual titration as well as respond to changing ventilation requirements. We present an original bio-inspired assistive technology for real-time ventilation assistance, implemented in a digital configurable Field Programmable Gate Array (FPGA). The bio-inspired controller, which is a spiking neural network (SNN) inspired by the medullary respiratory network, is as robust as a classic controller while having a flexible, low-power and low-cost hardware design. The system was simulated in MATLAB with FPGA-specific constraints and tested with a computational model of rat breathing; the model reproduced experimentally collected respiratory data in eupneic animals. The open-loop version of the bio-inspired controller was implemented on the FPGA. Electrical test bench characterizations confirmed the system functionality. Open and closed-loop paradigm simulations were simulated to test the FPGA system real-time behavior using the rat computational model. The closed-loop system monitors breathing and changes in respiratory demands to drive diaphragmatic stimulation. The simulated results inform future acute animal experiments and constitute the first step toward the development of a neuromorphic, adaptive, compact, low-power, implantable device. The bio-inspired hardware design optimizes the FPGA resource and time costs while harnessing the computational power of spike-based neuromorphic hardware. Its real-time feature makes it suitable for in vivo applications. PMID:27378844

Development of a Turbofan Engine Simulation in a Graphical Simulation Environment

NASA Technical Reports Server (NTRS)

Parker, Khary I.; Guo, Ten-Heui

2003-01-01

This paper presents the development of a generic component level model of a turbofan engine simulation with a digital controller, in an advanced graphical simulation environment. The goal of this effort is to develop and demonstrate a flexible simulation platform for future research in propulsion system control and diagnostic technology. A previously validated FORTRAN-based model of a modern, high-performance, military-type turbofan engine is being used to validate the platform development. The implementation process required the development of various innovative procedures, which are discussed in the paper. Open-loop and closed-loop comparisons are made between the two simulations. Future enhancements that are to be made to the modular engine simulation are summarized.

Learning the Art of Electronics

NASA Astrophysics Data System (ADS)

Hayes, Thomas C.; Horowitz, Paul

2016-03-01

1. DC circuits; 2. RC circuits; 3. Diode circuits; 4. Transistors I; 5. Transistors II; 6. Operational amplifiers I; 7. Operational amplifiers II: nice positive feedback; 8. Operational amplifiers III; 9. Operational amplifiers IV: nasty positive feedback; 10. Operational amplifiers V: PID motor control loop; 11. Voltage regulators; 12. MOSFET switches; 13. Group audio project; 14. Logic gates; 15. Logic compilers, sequential circuits, flip-flops; 16. Counters; 17. Memory: state machines; 18. Analog to digital: phase-locked loop; 19. Microcontrollers and microprocessors I: processor/controller; 20. I/O, first assembly language; 21. Bit operations; 22. Interrupt: ADC and DAC; 23. Moving pointers, serial buses; 24. Dallas Standalone Micro, SiLabs SPI RAM; 25. Toys in the attic; Appendices; Index.

Space Station on-orbit solar array loads during assembly

NASA Astrophysics Data System (ADS)

Ghofranian, S.; Fujii, E.; Larson, C. R.

This paper is concerned with the closed-loop dynamic analysis of on-orbit maneuvers when the Space Shuttle is fully mated to the Space Station Freedom. A flexible model of the Space Station in the form of component modes is attached to a rigid orbiter and on-orbit maneuvers are performed using the Shuttle Primary Reaction Control System jets. The traditional approach for this type of problems is to perform an open-loop analysis to determine the attitude control system jet profiles based on rigid vehicles and apply the resulting profile to a flexible Space Station. In this study a closed-loop Structure/Control model was developed in the Dynamic Analysis and Design System (DADS) program and the solar array loads were determined for single axis maneuvers with various delay times between jet firings. It is shown that the Digital Auto Pilot jet selection is affected by Space Station flexibility. It is also shown that for obtaining solar array loads the effect of high frequency modes cannot be ignored.

Hardware Evolution of Closed-Loop Controller Designs

NASA Technical Reports Server (NTRS)

Gwaltney, David; Ferguson, Ian

2002-01-01

Poster presentation will outline on-going efforts at NASA, MSFC to employ various Evolvable Hardware experimental platforms in the evolution of digital and analog circuitry for application to automatic control. Included will be information concerning the application of commercially available hardware and software along with the use of the JPL developed FPTA2 integrated circuit and supporting JPL developed software. Results to date will be presented.

Detection of digital FSK using a phase-locked loop

NASA Technical Reports Server (NTRS)

Lindsey, W. C.; Simon, M. K.

1975-01-01

A theory is presented for the design of a digital FSK receiver which employs a phase-locked loop to set up the desired matched filter as the arriving signal frequency switches. The developed mathematical model makes it possible to establish the error probability performance of systems which employ a class of digital FM modulations. The noise mechanism which accounts for decision errors is modeled on the basis of the Meyr distribution and renewal Markov process theory.

A single chip 2 Gbit/s clock recovery subsystem for digital communications

NASA Astrophysics Data System (ADS)

Hickling, Ronald M.

A self-contained clock recovery/data resynchronizer phase locked loop (PLL) for use in microwave and fiber optic digital communications has been fabricated using GaAs integrated circuit technology. The IC contains the analog and digital components for the PLL: an edge-triggered phase detector based on a 1.2 GHz phase/frequency comparator, an op amp for creating the loop filter, and a VCO based on a differential source-coupled pair amplifier.

Real-time fringe pattern demodulation with a second-order digital phase-locked loop.

PubMed

Gdeisat, M A; Burton, D R; Lalor, M J

2000-10-10

The use of a second-order digital phase-locked loop (DPLL) to demodulate fringe patterns is presented. The second-order DPLL has better tracking ability and more noise immunity than the first-order loop. Consequently, the second-order DPLL is capable of demodulating a wider range of fringe patterns than the first-order DPLL. A basic analysis of the first- and the second-order loops is given, and a performance comparison between the first- and the second-order DPLL's in analyzing fringe patterns is presented. The implementation of the second-order loop in real time on a commercial parallel image processing system is described. Fringe patterns are grabbed and processed, and the resultant phase maps are displayed concurrently.

Sexual dimorphism in digital dermatoglyphic traits among Sinhalese people in Sri Lanka

PubMed Central

2013-01-01

Background The purpose of this study was to evaluate gender-wise diversity of digital dermatoglyphic traits in a sample of Sinhalese people in Sri Lanka. Findings Four thousand and thirty-four digital prints of 434 Sinhalese individuals (217 males and 217 females) were examined for their digital dermatoglyphic pattern distribution. The mean age for the entire group was 23.66 years (standard deviation = 4.93 years). The loop pattern is observed more frequently (n = 2,592, 59.72%) compared to whorl (n = 1,542, 35.53%) and arch (n = 206, 4.75%) in the Sinhalese population. Females (n = 1,274, 58.71%) have a more ulnar loop pattern than males (n = 1,231, 56.73%). The plain whorl pattern is observed more frequently in males (n = 560, 25.81%) compared to females (n = 514, 23.69%).The double loop pattern is observed more frequently on the right and left thumb (digit 1) of both males and females. Pattern intensity index, Dankmeijer index and Furuhata index are higher in males. Conclusions Ulnar loop is the most frequently occurring digital dermatoglyphic pattern among the Sinhalese. All pattern indices are higher in males. To some extent, dermatoglyphic patterns of Sinhalese are similar to North Indians and other Caucasoid populations. Further studies with larger sample sizes are recommended to confirm our findings. PMID:24377367

Analysis of a first order phase locked loop in the presence of Gaussian noise

NASA Technical Reports Server (NTRS)

Blasche, P. R.

1977-01-01

A first-order digital phase locked loop is analyzed by application of a Markov chain model. Steady state loop error probabilities, phase standard deviation, and mean loop transient times are determined for various input signal to noise ratios. Results for direct loop simulation are presented for comparison.

Digital approach to stabilizing optical frequency combs and beat notes of CW lasers

NASA Astrophysics Data System (ADS)

Čížek, Martin; Číp, Ondřej; Å míd, Radek; Hrabina, Jan; Mikel, Břetislav; Lazar, Josef

2013-10-01

In cases when it is necessary to lock optical frequencies generated by an optical frequency comb to a precise radio frequency (RF) standard (GPS-disciplined oscillator, H-maser, etc.) the usual practice is to implement phase and frequency-locked loops. Such system takes the signal generated by the RF standard (usually 10 MHz or 100 MHz) as a reference and stabilizes the repetition and offset frequencies of the comb contained in the RF output of the f-2f interferometer. These control loops are usually built around analog electronic circuits processing the output signals from photo detectors. This results in transferring the stability of the standard from RF to optical frequency domain. The presented work describes a different approach based on digital signal processing and software-defined radio algorithms used for processing the f-2f and beat-note signals. Several applications of digital phase and frequency locks to a RF standard are demonstrated: the repetition (frep) and offset frequency (fceo) of the comb, and the frequency of the beat note between a CW laser source and a single component of the optical frequency comb spectrum.

Phase-locked loop design with fast-digital-calibration charge pump

NASA Astrophysics Data System (ADS)

Wang, San-Fu; Hwang, Tsuen-Shiau; Wang, Jhen-Ji

2016-02-01

A fast-digital-calibration technique is proposed for reducing current mismatch in the charge pump (CP) of a phase-locked loop (PLL). The current mismatch in the CP generates fluctuations, which is transferred to the input of voltage-controlled oscillator (VCO). Therefore, the current mismatch increases the reference spur in the PLL. Improving current match of CP will reduce the reference spur and decrease the static phase offset of PLLs. Moreover, the settling time, ripple and power consumption of the PLL are also improved by the proposed technique. This study evaluated a 2.27-2.88 GHz frequency synthesiser fabricated in TSMC 0.18 μm CMOS 1.8 V process. The tuning range of proposed VCO is about 26%. By using the fast-digital-calibration technique, current mismatch is reduced to lower than 0.97%, and the operation range of the proposed CP is between 0.2 and 1.6 V. The proposed PLL has a total power consumption of 22.57 mW and a settling time of 10 μs or less.

Implementing Audio Digital Feedback Loop Using the National Instruments RIO System

DOE Office of Scientific and Technical Information (OSTI.GOV)

Huang, G.; Byrd, J. M.

2006-11-20

Development of system for high precision RF distribution and laser synchronization at Berkeley Lab has been ongoing for several years. Successful operation of these systems requires multiple audio bandwidth feedback loops running at relatively high gains. Stable operation of the feedback loops requires careful design of the feedback transfer function. To allow for flexible and compact implementation, we have developed digital feedback loops on the National Instruments Reconfigurable Input/Output (RIO) platform. This platform uses an FPGA and multiple I/Os that can provide eight parallel channels running different filters. We present the design and preliminary experimental results of this system.

Automated Droplet Manipulation Using Closed-Loop Axisymmetric Drop Shape Analysis.

PubMed

Yu, Kyle; Yang, Jinlong; Zuo, Yi Y

2016-05-17

Droplet manipulation plays an important role in a wide range of scientific and industrial applications, such as synthesis of thin-film materials, control of interfacial reactions, and operation of digital microfluidics. Compared to micron-sized droplets, which are commonly considered as spherical beads, millimeter-sized droplets are generally deformable by gravity, thus introducing nonlinearity into control of droplet properties. Such a nonlinear drop shape effect is especially crucial for droplet manipulation, even for small droplets, at the presence of surfactants. In this paper, we have developed a novel closed-loop axisymmetric drop shape analysis (ADSA), integrated into a constrained drop surfactometer (CDS), for manipulating millimeter-sized droplets. The closed-loop ADSA generalizes applications of the traditional drop shape analysis from a surface tension measurement methodology to a sophisticated tool for manipulating droplets in real time. We have demonstrated the feasibility and advantages of the closed-loop ADSA in three applications, including control of drop volume by automatically compensating natural evaporation, precise control of surface area variations for high-fidelity biophysical simulations of natural pulmonary surfactant, and steady control of surface pressure for in situ Langmuir-Blodgett transfer from droplets. All these applications have demonstrated the accuracy, versatility, applicability, and automation of this new ADSA-based droplet manipulation technique. Combining with CDS, the closed-loop ADSA holds great promise for advancing droplet manipulation in a variety of material and surface science applications, such as thin-film fabrication, self-assembly, and biophysical study of pulmonary surfactant.

Digital Optical Control System

NASA Astrophysics Data System (ADS)

Jordan, David H.; Tipton, Charles A.; Christmann, Charles E.; Hochhausler, Nils P.

1988-09-01

We describe the digital optical control system (DOGS), a state-of-the-art controller for electrical feedback in an optical system. The need for a versatile optical controller arose from a number of unique experiments being performed by the Air Force Weapons Laboratory. These experiments use similar detectors and actuator-controlled mirrors, but the control requirements vary greatly. The experiments have in common a requirement for parallel control systems. The DOGS satisfies these needs by allowing several control systems to occupy a single chassis with one master controller. The architecture was designed to allow upward compatibility with future configurations. Combinations of off-the-shelf and custom boards are configured to meet the requirements of each experiment. The configuration described here was used to control piston error to X/80 at a wavelength of 0.51 Am. A peak sample rate of 8 kHz, yielding a closed loop bandwidth of 800 Hz, was achieved.

Artificial Pancreas Device Systems for the Closed-Loop Control of Type 1 Diabetes

PubMed Central

Trevitt, Sara; Simpson, Sue; Wood, Annette

2015-01-01

Background: Closed-loop artificial pancreas device (APD) systems are externally worn medical devices that are being developed to enable people with type 1 diabetes to regulate their blood glucose levels in a more automated way. The innovative concept of this emerging technology is that hands-free, continuous, glycemic control can be achieved by using digital communication technology and advanced computer algorithms. Methods: A horizon scanning review of this field was conducted using online sources of intelligence to identify systems in development. The systems were classified into subtypes according to their level of automation, the hormonal and glycemic control approaches used, and their research setting. Results: Eighteen closed-loop APD systems were identified. All were being tested in clinical trials prior to potential commercialization. Six were being studied in the home setting, 5 in outpatient settings, and 7 in inpatient settings. It is estimated that 2 systems may become commercially available in the EU by the end of 2016, 1 during 2017, and 2 more in 2018. Conclusions: There are around 18 closed-loop APD systems progressing through early stages of clinical development. Only a few of these are currently in phase 3 trials and in settings that replicate real life. PMID:26589628

Analytical and Experimental Evaluation of Digital Control Systems for the Semi-Span Super-Sonic Transport (S4T) Wind Tunnel Model

NASA Technical Reports Server (NTRS)

Wieseman, Carol D.; Christhilf, David; Perry, Boyd, III

2012-01-01

An important objective of the Semi-Span Super-Sonic Transport (S4T) wind tunnel model program was the demonstration of Flutter Suppression (FS), Gust Load Alleviation (GLA), and Ride Quality Enhancement (RQE). It was critical to evaluate the stability and robustness of these control laws analytically before testing them and experimentally while testing them to ensure safety of the model and the wind tunnel. MATLAB based software was applied to evaluate the performance of closed-loop systems in terms of stability and robustness. Existing software tools were extended to use analytical representations of the S4T and the control laws to analyze and evaluate the control laws prior to testing. Lessons were learned about the complex windtunnel model and experimental testing. The open-loop flutter boundary was determined from the closed-loop systems. A MATLAB/Simulink Simulation developed under the program is available for future work to improve the CPE process. This paper is one of a series of that comprise a special session, which summarizes the S4T wind-tunnel program.

Design and Verification of a Digital Controller for a 2-Piece Hemispherical Resonator Gyroscope

PubMed Central

Lee, Jungshin; Yun, Sung Wook; Rhim, Jaewook

2016-01-01

A Hemispherical Resonator Gyro (HRG) is the Coriolis Vibratory Gyro (CVG) that measures rotation angle or angular velocity using Coriolis force acting the vibrating mass. A HRG can be used as a rate gyro or integrating gyro without structural modification by simply changing the control scheme. In this paper, differential control algorithms are designed for a 2-piece HRG. To design a precision controller, the electromechanical modelling and signal processing must be pre-performed accurately. Therefore, the equations of motion for the HRG resonator with switched harmonic excitations are derived with the Duhamel Integral method. Electromechanical modeling of the resonator, electric module and charge amplifier is performed by considering the mode shape of a thin hemispherical shell. Further, signal processing and control algorithms are designed. The multi-flexing scheme of sensing, driving cycles and x, y-axis switching cycles is appropriate for high precision and low maneuverability systems. The differential control scheme is easily capable of rejecting the common mode errors of x, y-axis signals and changing the rate integrating mode on basis of these studies. In the rate gyro mode the controller is composed of Phase-Locked Loop (PLL), amplitude, quadrature and rate control loop. All controllers are designed on basis of a digital PI controller. The signal processing and control algorithms are verified through Matlab/Simulink simulations. Finally, a FPGA and DSP board with these algorithms is verified through experiments. PMID:27104539

Effects of low sampling rate in the digital data-transition tracking loop

NASA Technical Reports Server (NTRS)

Mileant, A.; Million, S.; Hinedi, S.

1994-01-01

This article describes the performance of the all-digital data-transition tracking loop (DTTL) with coherent and noncoherent sampling using nonlinear theory. The effects of few samples per symbol and of noncommensurate sampling and symbol rates are addressed and analyzed. Their impact on the probability density and variance of the phase error are quantified through computer simulations. It is shown that the performance of the all-digital DTTL approaches its analog counterpart when the sampling and symbol rates are noncommensurate (i.e., the number of samples per symbol is an irrational number). The loop signal-to-noise ratio (SNR) (inverse of phase error variance) degrades when the number of samples per symbol is an odd integer but degrades even further for even integers.

Digital Sensor Technology

DOE Office of Scientific and Technical Information (OSTI.GOV)

Thomas, Ken D.; Quinn, Edward L.; Mauck, Jerry L.

The nuclear industry has been slow to incorporate digital sensor technology into nuclear plant designs due to concerns with digital qualification issues. However, the benefits of digital sensor technology for nuclear plant instrumentation are substantial in terms of accuracy and reliability. This paper, which refers to a final report issued in 2013, demonstrates these benefits in direct comparisons of digital and analog sensor applications. Improved accuracy results from the superior operating characteristics of digital sensors. These include improvements in sensor accuracy and drift and other related parameters which reduce total loop uncertainty and thereby increase safety and operating margins. Anmore » example instrument loop uncertainty calculation for a pressure sensor application is presented to illustrate these improvements. This is a side-by-side comparison of the instrument loop uncertainty for both an analog and a digital sensor in the same pressure measurement application. Similarly, improved sensor reliability is illustrated with a sample calculation for determining the probability of failure on demand, an industry standard reliability measure. This looks at equivalent analog and digital temperature sensors to draw the comparison. The results confirm substantial reliability improvement with the digital sensor, due in large part to ability to continuously monitor the health of a digital sensor such that problems can be immediately identified and corrected. This greatly reduces the likelihood of a latent failure condition of the sensor at the time of a design basis event. Notwithstanding the benefits of digital sensors, there are certain qualification issues that are inherent with digital technology and these are described in the report. One major qualification impediment for digital sensor implementation is software common cause failure (SCCF).« less

A reconfigurable cryogenic platform for the classical control of quantum processors

NASA Astrophysics Data System (ADS)

Homulle, Harald; Visser, Stefan; Patra, Bishnu; Ferrari, Giorgio; Prati, Enrico; Sebastiano, Fabio; Charbon, Edoardo

2017-04-01

The implementation of a classical control infrastructure for large-scale quantum computers is challenging due to the need for integration and processing time, which is constrained by coherence time. We propose a cryogenic reconfigurable platform as the heart of the control infrastructure implementing the digital error-correction control loop. The platform is implemented on a field-programmable gate array (FPGA) that supports the functionality required by several qubit technologies and that can operate close to the physical qubits over a temperature range from 4 K to 300 K. This work focuses on the extensive characterization of the electronic platform over this temperature range. All major FPGA building blocks (such as look-up tables (LUTs), carry chains (CARRY4), mixed-mode clock manager (MMCM), phase-locked loop (PLL), block random access memory, and IDELAY2 (programmable delay element)) operate correctly and the logic speed is very stable. The logic speed of LUTs and CARRY4 changes less then 5%, whereas the jitter of MMCM and PLL clock managers is reduced by 20%. The stability is finally demonstrated by operating an integrated 1.2 GSa/s analog-to-digital converter (ADC) with a relatively stable performance over temperature. The ADCs effective number of bits drops from 6 to 4.5 bits when operating at 15 K.

A reconfigurable cryogenic platform for the classical control of quantum processors.

PubMed

Homulle, Harald; Visser, Stefan; Patra, Bishnu; Ferrari, Giorgio; Prati, Enrico; Sebastiano, Fabio; Charbon, Edoardo

2017-04-01

The implementation of a classical control infrastructure for large-scale quantum computers is challenging due to the need for integration and processing time, which is constrained by coherence time. We propose a cryogenic reconfigurable platform as the heart of the control infrastructure implementing the digital error-correction control loop. The platform is implemented on a field-programmable gate array (FPGA) that supports the functionality required by several qubit technologies and that can operate close to the physical qubits over a temperature range from 4 K to 300 K. This work focuses on the extensive characterization of the electronic platform over this temperature range. All major FPGA building blocks (such as look-up tables (LUTs), carry chains (CARRY4), mixed-mode clock manager (MMCM), phase-locked loop (PLL), block random access memory, and IDELAY2 (programmable delay element)) operate correctly and the logic speed is very stable. The logic speed of LUTs and CARRY4 changes less then 5%, whereas the jitter of MMCM and PLL clock managers is reduced by 20%. The stability is finally demonstrated by operating an integrated 1.2 GSa/s analog-to-digital converter (ADC) with a relatively stable performance over temperature. The ADCs effective number of bits drops from 6 to 4.5 bits when operating at 15 K.

LMI designmethod for networked-based PID control

NASA Astrophysics Data System (ADS)

Souza, Fernando de Oliveira; Mozelli, Leonardo Amaral; de Oliveira, Maurício Carvalho; Palhares, Reinaldo Martinez

2016-10-01

In this paper, we propose a methodology for the design of networked PID controllers for second-order delayed processes using linear matrix inequalities. The proposed procedure takes into account time-varying delay on the plant, time-varying delays induced by the network and packed dropouts. The design is carried on entirely using a continuous-time model of the closed-loop system where time-varying delays are used to represent sampling and holding occurring in a discrete-time digital PID controller.

Analysis and design of a second-order digital phase-locked loop

NASA Technical Reports Server (NTRS)

Blasche, P. R.

1979-01-01

A specific second-order digital phase-locked loop (DPLL) was modeled as a first-order Markov chain with alternatives. From the matrix of transition probabilities of the Markov chain, the steady-state phase error of the DPLL was determined. In a similar manner the loop's response was calculated for a fading input. Additionally, a hardware DPLL was constructed and tested to provide a comparison to the results obtained from the Markov chain model. In all cases tested, good agreement was found between the theoretical predictions and the experimental data.

Synthesis and evaluation of phase detectors for active bit synchronizers

NASA Technical Reports Server (NTRS)

Mcbride, A. L.

1974-01-01

Self-synchronizing digital data communication systems usually use active or phase-locked loop (PLL) bit synchronizers. The three main elements of PLL synchronizers are the phase detector, loop filter, and the voltage controlled oscillator. Of these three elements, phase detector synthesis is the main source of difficulty, particularly when the received signals are demodulated square-wave signals. A phase detector synthesis technique is reviewed that provides a physically realizable design for bit synchronizer phase detectors. The development is based upon nonlinear recursive estimation methods. The phase detector portion of the algorithm is isolated and analyzed.

A Hardware Platform for Tuning of MEMS Devices Using Closed-Loop Frequency Response

NASA Technical Reports Server (NTRS)

Ferguson, Michael I.; MacDonald, Eric; Foor, David

2005-01-01

We report on the development of a hardware platform for integrated tuning and closed-loop operation of MEMS gyroscopes. The platform was developed and tested for the second generation JPL/Boeing Post-Resonator MEMS gyroscope. The control of this device is implemented through a digital design on a Field Programmable Gate Array (FPGA). A software interface allows the user to configure, calibrate, and tune the bias voltages on the micro-gyro. The interface easily transitions to an embedded solution that allows for the miniaturization of the system to a single chip.

A fast-locking PLL with all-digital locked-aid circuit

NASA Astrophysics Data System (ADS)

Kao, Shao-Ku; Hsieh, Fu-Jen

2013-02-01

In this article, a fast-locking phase-locked loop (PLL) with an all-digital locked-aid circuit is proposed and analysed. The proposed topology is based on two tuning loops: frequency and phase detections. A frequency detection loop is used to accelerate frequency locking time, and a phase detection loop is used to adjust fine phase errors between the reference and feedback clocks. The proposed PLL circuit is designed based on the 0.35 µm CMOS process with a 3.3 V supply voltage. Experimental results show that the locking time of the proposed PLL achieves a 87.5% reduction from that of a PLL without the locked-aid circuit.

A real-time simulator of a turbofan engine

NASA Technical Reports Server (NTRS)

Litt, Jonathan S.; Delaat, John C.; Merrill, Walter C.

1989-01-01

A real-time digital simulator of a Pratt and Whitney F100 engine has been developed for real-time code verification and for actuator diagnosis during full-scale engine testing. This self-contained unit can operate in an open-loop stand-alone mode or as part of closed-loop control system. It can also be used for control system design and development. Tests conducted in conjunction with the NASA Advanced Detection, Isolation, and Accommodation program show that the simulator is a valuable tool for real-time code verification and as a real-time actuator simulator for actuator fault diagnosis. Although currently a small perturbation model, advances in microprocessor hardware should allow the simulator to evolve into a real-time, full-envelope, full engine simulation.

Response of an all digital phase-locked loop

NASA Technical Reports Server (NTRS)

Garodnick, J.; Greco, J.; Schilling, D. L.

1974-01-01

An all digital phase-locked loop (DPLL) is designed, analyzed, and tested. Three specific configurations are considered, generating first, second, and third order DPLL's; and it is found, using a computer simulation of a noise spike, and verified experimentally, that of these configurations the second-order system is optimum from the standpoint of threshold extension. This substantiates results obtained for analog PLL's.

Digital compensation techniques for the effects of time lag in closed-loop simulation using the 6 DOF motion system

NASA Technical Reports Server (NTRS)

Brown, R.

1982-01-01

Efforts are continued to develop digital filter compensation schemes for the correction of momentum gains observed in the closed loop simulation of the docking of two satellites using the 6 DOF motion system. Several filters that work well for small delays ( .100ms) and a non-preloaded probe are discussed.

New design conception and development of the synchronizer/data buffer system in CDA station for China's GMS

NASA Astrophysics Data System (ADS)

Tong, Kai; Fan, Shiming; Gong, Derong; Lu, Zuming; Liu, Jian

The synchronizer/data buffer (SDB) in the command and data acquisition station for China's future Geostationary Meteorological Satellite is described. Several computers and special microprocessors are used in tandem with minimized hardware to fulfill all of the functions. The high-accuracy digital phase locked loop is operated by computer and by controlling the count value of the 20-MHz clock to acquire and track such signals as sun pulse, scan synchronization detection pulse, and earth pulse. Sun pulse and VISSR data are recorded precisely and economically by digitizing the time relation. The VISSR scan timing and equiangular control timing, and equal time sampling on satellite are also discussed.

Digital processing of RF signals from optical frequency combs

NASA Astrophysics Data System (ADS)

Cizek, Martin; Smid, Radek; Buchta, Zdeněk.; Mikel, Břetislav; Lazar, Josef; Cip, Ondřej

2013-01-01

The presented work is focused on digital processing of beat note signals from a femtosecond optical frequency comb. The levels of mixing products of single spectral components of the comb with CW laser sources are usually very low compared to products of mixing all the comb components together. RF counters are more likely to measure the frequency of the strongest spectral component rather than a weak beat note. Proposed experimental digital signal processing system solves this problem by analyzing the whole spectrum of the output RF signal and using software defined radio (SDR) algorithms. Our efforts concentrate in two main areas: Firstly, using digital servo-loop techniques for locking free running continuous laser sources on single components of the fs comb spectrum. Secondly, we are experimenting with digital signal processing of the RF beat note spectrum produced by f-2f 1 technique used for assessing the offset and repetition frequencies of the comb, resulting in digital servo-loop stabilization of the fs comb. Software capable of computing and analyzing the beat-note RF spectrums using FFT and peak detection was developed. A SDR algorithm performing phase demodulation on the f- 2f signal is used as a regulation error signal source for a digital phase-locked loop stabilizing the offset frequency of the fs comb.

Digital processing of signals from femtosecond combs

NASA Astrophysics Data System (ADS)

Čížek, Martin; Šmíd, Radek; Buchta, Zdeněk.; Mikel, Břetislav; Lazar, Josef; Číp, Ondrej

2012-01-01

The presented work is focused on digital processing of beat note signals from a femtosecond optical frequency comb. The levels of mixing products of single spectral components of the comb with CW laser sources are usually very low compared to products of mixing all the comb components together. RF counters are more likely to measure the frequency of the strongest spectral component rather than a weak beat note. Proposed experimental digital signal processing system solves this problem by analyzing the whole spectrum of the output RF signal and using software defined radio (SDR) algorithms. Our efforts concentrate in two main areas: Firstly, we are experimenting with digital signal processing of the RF beat note spectrum produced by f-2f 1 technique and with fully digital servo-loop stabilization of the fs comb. Secondly, we are using digital servo-loop techniques for locking free running continuous laser sources on single components of the fs comb spectrum. Software capable of computing and analyzing the beat-note RF spectrums using FFT and peak detection was developed. A SDR algorithm performing phase demodulation on the f- 2f signal is used as a regulation error signal source for a digital phase-locked loop stabilizing the offset and repetition frequencies of the fs comb.

The development of the DAST I remotely piloted research vehicle for flight testing an active flutter suppression control system. Ph.D. Thesis. Final Report

NASA Technical Reports Server (NTRS)

Grose, D. L.

1979-01-01

The development of the DAST I (drones for aerodynamic and structural testing) remotely piloted research vehicle is described. The DAST I is a highly modified BQM-34E/F Firebee II Supersonic Aerial Target incorporating a swept supercritical wing designed to flutter within the vehicle's flight envelope. The predicted flutter and rigid body characteristics are presented. A description of the analysis and design of an active flutter suppression control system (FSS) designed to increase the flutter boundary of the DAST wing (ARW-1) by a factor of 20% is given. The design and development of the digital remotely augmented primary flight control system and on-board analog backup control system is presented. An evaluation of the near real-time flight flutter testing methods is made by comparing results of five flutter testing techniques on simulated DAST I flutter data. The development of the DAST ARW-1 state variable model used to generate time histories of simulated accelerometer responses is presented. This model uses control surface commands and a Dryden model gust as inputs. The feasibility of the concept of extracting open loop flutter characteristics from closed loop FSS responses was examined. It was shown that open loop characteristics can be determined very well from closed loop subcritical responses.

A digital wireless system for closed-loop inhibition of nociceptive signals

NASA Astrophysics Data System (ADS)

Zuo, Chao; Yang, Xiaofei; Wang, Yang; Hagains, Christopher E.; Li, Ai-Ling; Peng, Yuan B.; Chiao, J.-C.

2012-10-01

Neurostimulation of the spinal cord or brain has been used to inhibit nociceptive signals in pain management applications. Nevertheless, most of the current neurostimulation models are based on open-loop system designs. There is a lack of closed-loop systems for neurostimulation in research with small freely-moving animals and in future clinical applications. Based on our previously developed analog wireless system for closed-loop neurostimulation, a digital wireless system with real-time feedback between recorder and stimulator modules has been developed to achieve multi-channel communication. The wireless system includes a wearable recording module, a wearable stimulation module and a transceiver connected to a computer for real-time and off-line data processing, display and storage. To validate our system, wide dynamic range neurons in the spinal cord dorsal horn have been recorded from anesthetized rats in response to graded mechanical stimuli (brush, pressure and pinch) applied in the hind paw. The identified nociceptive signals were used to automatically trigger electrical stimulation at the periaqueductal gray in real time to inhibit their own activities by the closed-loop design. Our digital wireless closed-loop system has provided a simplified and efficient method for further study of pain processing in freely-moving animals and potential clinical application in patients. Groups 1, 2 and 3 contributed equally to this project.

Digital redesign of the control system for the Robotics Research Corporation model K-1607 robot

NASA Technical Reports Server (NTRS)

Carroll, Robert L.

1989-01-01

The analog control system for positioning each link of the Robotics Research Corporation Model K-1607 robot manipulator was redesigned for computer control. In order to accomplish the redesign, a linearized model of the dynamic behavior of the robot was developed. The parameters of the model were determined by examination of the input-output data collected in closed-loop operation of the analog control system. The robot manipulator possesses seven degrees of freedom in its motion. The analog control system installed by the manufacturer of the robot attempts to control the positioning of each link without feedback from other links. Constraints on the design of a digital control system include: the robot cannot be disassembled for measurement of parameters; the digital control system must not include filtering operations if possible, because of lack of computer capability; and criteria of goodness of control system performing is lacking. The resulting design employs sampled-data position and velocity feedback. The criteria of the design permits the control system gain margin and phase margin, measured at the same frequencies, to be the same as that provided by the analog control system.

A time-domain digitally controlled oscillator composed of a free running ring oscillator and flying-adder

NASA Astrophysics Data System (ADS)

Wei, Liu; Wei, Li; Peng, Ren; Qinglong, Lin; Shengdong, Zhang; Yangyuan, Wang

2009-09-01

A time-domain digitally controlled oscillator (DCO) is proposed. The DCO is composed of a free-running ring oscillator (FRO) and a two lap-selectors integrated flying-adder (FA). With a coiled cell array which allows uniform loading capacitances of the delay cells, the FRO produces 32 outputs with consistent tap spacing for the FA as reference clocks. The FA uses the outputs from the FRO to generate the output of the DCO according to the control number, resulting in a linear dependence of the output period, instead of the frequency on the digital controlling word input. Thus the proposed DCO ensures a good conversion linearity in a time-domain, and is suitable for time-domain all-digital phase locked loop applications. The DCO was implemented in a standard 0.13 μm digital logic CMOS process. The measurement results show that the DCO has a linear and monotonic tuning curve with gain variation of less than 10%, and a very low root mean square period jitter of 9.3 ps in the output clocks. The DCO works well at supply voltages ranging from 0.6 to 1.2 V, and consumes 4 mW of power with 500 MHz frequency output at 1.2 V supply voltage.

A second-order frequency-aided digital phase-locked loop for Doppler rate tracking

NASA Astrophysics Data System (ADS)

Chie, C. M.

1980-08-01

A second-order digital phase-locked loop (DPLL) has a finite lock range which is a function of the frequency of the incoming signal to be tracked. For this reason, it is not capable of tracking an input with Doppler rate for an indefinite period of time. In this correspondence, an analytical expression for the hold-in time is derived. In addition, an all-digital scheme to alleviate this problem is proposed based on the information obtained from estimating the input signal frequency.

An automatic tracking system for phase-noise measurement.

PubMed

Yuen, Chung Ming; Tsang, Kim Fung

2005-05-01

A low cost, automatic tracking system for phase noise measurement has been implemented successfully. The tracking system is accomplished by applying a charge pump phase-locked loop as an external reference source to a digital spectrum analyzer. Measurement of a 2.5 GHz, free-running, voltage-controlled oscillator demonstrated the tracking accuracy, thus verifying the feasibility of the system.

Digital capillaroscopy as important tool for early diagnostics of arterial hypertension

NASA Astrophysics Data System (ADS)

Gurfinkel, Yu. I.; Sasonko, M. L.; Priezzhev, A. V.

2015-03-01

The study is aimed to determine the digital capillaroscopy possibilities in early diagnostics of an arterial hypertension. A total of 123 adult persons were examined in the study. The first group consisted of 40 patients with prehypertension (BP 130-139/85-89 mm Hg). The second group included 36 patients with 1-2 stage of hypertension (mean systolic BP 152.7±12 mm Hg). Patients in both groups did not receive regular drug therapy. The group of volunteers (n=47) included healthy adults without signs of cardiovascular pathology. The capillary circulation was examined on the nailbed using the optical digital capillaroscope developed by the company "AET", Russia. Diameters of the arterial and venous segments, perivascular zone size, capillary blood velocity, the degree of arterial loops narrowing and the density of the capillary network were estimated. In patients with arterial hypertension and even in patients with prehypertension remodeling and rarefaction of capillaries and the expressed narrowing their arterial loops were manifested. The results of the study revealed the presence of abnormalities of microcirculation parameters in patients of both groups. The capillaries density in both groups of patients was significantly lower than in healthy persons. The significant narrowing of arterial loops was revealed in patients with both arterial hypertension and prehypertension, in comparison with healthy volunteers. Capillary blood velocity did not differ significantly between healthy volunteers group and the group of prehypertensive patients. However in patients with hypertension this parameter was significantly lower in comparison with control group.

An estimator-predictor approach to PLL loop filter design

NASA Technical Reports Server (NTRS)

Statman, Joseph I.; Hurd, William J.

1990-01-01

The design of digital phase locked loops (DPLL) using estimation theory concepts in the selection of a loop filter is presented. The key concept, that the DPLL closed-loop transfer function is decomposed into an estimator and a predictor, is discussed. The estimator provides recursive estimates of phase, frequency, and higher-order derivatives, and the predictor compensates for the transport lag inherent in the loop.

Breaking a habit: a further role of the phonological loop in action control.

PubMed

Saeki, Erina; Baddeley, Alan D; Hitch, Graham J; Saito, Satoru

2013-10-01

Recent research has suggested that keeping track of a task goal in rapid task switching may depend on the phonological loop component of working memory. In this study, we investigated whether the phonological loop plays a similar role when a single switch extending over several trials is required after many trials on which one has performed a competing task. Participants were shown pairs of digits varying in numerical and physical size, and they were required to decide which digit was numerically or physically larger. An experimental cycle consisted of four blocks of 24 trials. In Experiment 1, participants in the task change groups performed the numerical-size judgment task during the first three blocks, and then changed to the physical-size judgment task in the fourth. Participants in the continuation groups performed only the physical-size judgment task throughout all four blocks. We found negative effects of articulatory suppression on the fourth block, but only in the task change groups. Experiment 2 was a replication, with the modification that both groups received identical instructions and practice. Experiment 3 was a further replication using numerical-size judgment as the target task. The results showed a pattern similar to that from Experiment 1, with negative effects of articulatory suppression found only in the task change group. The congruity of numerical and physical size had a reliable effect on performance in all three experiments, but unlike the task change, it did not reliably interact with articulatory suppression. The results suggest that in addition to its well-established role in rapid task switching, the phonological loop also contributes to active goal maintenance in longer-term action control.

Digital frequency offset-locked He–Ne laser system with high beat frequency stability, narrow optical linewidth and optical fibre output

NASA Astrophysics Data System (ADS)

Sternkopf, Christian; Manske, Eberhard

2018-06-01

We report on the enhancement of a previously-presented heterodyne laser source on the basis of two phase-locked loop (PLL) frequency coupled internal-mirror He–Ne lasers. Our new system consists of two digitally controlled He–Ne lasers with slightly different wavelengths, and offers high-frequency stability and very narrow optical linewidth. The digitally controlled system has been realized by using a FPGA controller and transconductance amplifiers. The light of both lasers was coupled into separate fibres for heterodyne interferometer applications. To enhance the laser performance we observed the sensitivity of both laser tubes to electromagnetic noise from various laser power supplies and frequency control systems. Furthermore, we describe how the linewidth of a frequency-controlled He–Ne laser can be reduced during precise frequency stabilisation. The digitally controlled laser source reaches a standard beat frequency deviation of less than 20 Hz (with 1 s gate time) and a spectral full width at half maximum (FWHM) of the beat signal less than 3 kHz. The laser source has enough optical output power to serve a fibre-coupled multi axis heterodyne interferometer. The system can be adjusted to output beat frequencies in the range of 0.1 MHz–20 MHz.

Improved performance of a digital phase-locked loop combined with a frequency/frequency-rate estimator

NASA Technical Reports Server (NTRS)

Mileant, A.; Simon, M.

1986-01-01

When a digital phase-locked loop with a long loop update time tracks a signal with high Doppler, the demodualtion losses due to frequency mismatch can become very significant. One way of reducing these Doppler-related losses is to compensate for the Doppler effect using some kind of frequency-rate estimator. The performance of the fixed-window least-squares estimator and the Kalman filter is investigated; several Doppler compensating techniques are proposed. It is shown that the variance of the frequency estimator can be made as small as desired, and with this, the Doppler effect can be effectively compensated. The remaining demodulation losses due to phase jitter in the loop can be less than 0.1 dB.

Man-machine interactive imaging and data processing using high-speed digital mass storage

NASA Technical Reports Server (NTRS)

Alsberg, H.; Nathan, R.

1975-01-01

The role of vision in teleoperation has been recognized as an important element in the man-machine control loop. In most applications of remote manipulation, direct vision cannot be used. To overcome this handicap, the human operator's control capabilities are augmented by a television system. This medium provides a practical and useful link between workspace and the control station from which the operator perform his tasks. Human performance deteriorates when the images are degraded as a result of instrumental and transmission limitations. Image enhancement is used to bring out selected qualities in a picture to increase the perception of the observer. A general purpose digital computer, an extensive special purpose software system is used to perform an almost unlimited repertoire of processing operations.

A Bidirectional Neural Interface IC with Chopper Stabilized BioADC Array and Charge Balanced Stimulator

PubMed Central

Greenwald, Elliot; So, Ernest; Wang, Qihong; Mollazadeh, Mohsen; Maier, Christoph; Etienne-Cummings, Ralph; Cauwenberghs, Gert; Thakor, Nitish

2016-01-01

We present a bidirectional neural interface with a 4-channel biopotential analog-to-digital converter (bioADC) and a 4-channel current-mode stimulator in 180nm CMOS. The bioADC directly transduces microvolt biopotentials into a digital representation without a voltage-amplification stage. Each bioADC channel comprises a continuous-time first-order ΔΣ modulator with a chopper-stabilized OTA input and current feedback, followed by a second-order comb-filter decimator with programmable oversampling ratio. Each stimulator channel contains two independent digital-to-analog converters for anodic and cathodic current generation. A shared calibration circuit matches the amplitude of the anodic and cathodic currents for charge balancing. Powered from a 1.5V supply, the analog and digital circuits in each recording channel draw on average 1.54 μA and 2.13 μA of supply current, respectively. The bioADCs achieve an SNR of 58 dB and a SFDR of >70 dB, for better than 9-b ENOB. Intracranial EEG recordings from an anesthetized rat are shown and compared to simultaneous recordings from a commercial reference system to validate performance in-vivo. Additionally, we demonstrate bidirectional operation by recording cardiac modulation induced through vagus nerve stimulation, and closed-loop control of cardiac rhythm. The micropower operation, direct digital readout, and integration of electrical stimulation circuits make this interface ideally suited for closed-loop neuromodulation applications. PMID:27845676

Artificial Pancreas Device Systems for the Closed-Loop Control of Type 1 Diabetes: What Systems Are in Development?

PubMed

Trevitt, Sara; Simpson, Sue; Wood, Annette

2016-05-01

Closed-loop artificial pancreas device (APD) systems are externally worn medical devices that are being developed to enable people with type 1 diabetes to regulate their blood glucose levels in a more automated way. The innovative concept of this emerging technology is that hands-free, continuous, glycemic control can be achieved by using digital communication technology and advanced computer algorithms. A horizon scanning review of this field was conducted using online sources of intelligence to identify systems in development. The systems were classified into subtypes according to their level of automation, the hormonal and glycemic control approaches used, and their research setting. Eighteen closed-loop APD systems were identified. All were being tested in clinical trials prior to potential commercialization. Six were being studied in the home setting, 5 in outpatient settings, and 7 in inpatient settings. It is estimated that 2 systems may become commercially available in the EU by the end of 2016, 1 during 2017, and 2 more in 2018. There are around 18 closed-loop APD systems progressing through early stages of clinical development. Only a few of these are currently in phase 3 trials and in settings that replicate real life. © 2015 Diabetes Technology Society.

Application of multirate digital filter banks to wideband all-digital phase-locked loops design

NASA Technical Reports Server (NTRS)

Sadr, Ramin; Shah, Biren; Hinedi, Sami

1993-01-01

A new class of architecture for all-digital phase-locked loops (DPLL's) is presented in this article. These architectures, referred to as parallel DPLL (PDPLL), employ multirate digital filter banks (DFB's) to track signals with a lower processing rate than the Nyquist rate, without reducing the input (Nyquist) bandwidth. The PDPLL basically trades complexity for hardware-processing speed by introducing parallel processing in the receiver. It is demonstrated here that the DPLL performance is identical to that of a PDPLL for both steady-state and transient behavior. A test signal with a time-varying Doppler characteristic is used to compare the performance of both the DPLL and the PDPLL.

Application of multirate digital filter banks to wideband all-digital phase-locked loops design

NASA Astrophysics Data System (ADS)

Sadr, Ramin; Shah, Biren; Hinedi, Sami

1993-06-01

A new class of architecture for all-digital phase-locked loops (DPLL's) is presented in this article. These architectures, referred to as parallel DPLL (PDPLL), employ multirate digital filter banks (DFB's) to track signals with a lower processing rate than the Nyquist rate, without reducing the input (Nyquist) bandwidth. The PDPLL basically trades complexity for hardware-processing speed by introducing parallel processing in the receiver. It is demonstrated here that the DPLL performance is identical to that of a PDPLL for both steady-state and transient behavior. A test signal with a time-varying Doppler characteristic is used to compare the performance of both the DPLL and the PDPLL.

Application of multirate digital filter banks to wideband all-digital phase-locked loops design

NASA Astrophysics Data System (ADS)

Sadr, R.; Shah, B.; Hinedi, S.

1992-11-01

A new class of architecture for all-digital phase-locked loops (DPLL's) is presented in this article. These architectures, referred to as parallel DPLL (PDPLL), employ multirate digital filter banks (DFB's) to track signals with a lower processing rate than the Nyquist rate, without reducing the input (Nyquist) bandwidth. The PDPLL basically trades complexity for hardware-processing speed by introducing parallel processing in the receiver. It is demonstrated here that the DPLL performance is identical to that of a PDPLL for both steady-state and transient behavior. A test signal with a time-varying Doppler characteristic is used to compare the performance of both the DPLL and the PDPLL.

Application of multirate digital filter banks to wideband all-digital phase-locked loops design

NASA Technical Reports Server (NTRS)

Sadr, R.; Shah, B.; Hinedi, S.

1992-01-01

A new class of architecture for all-digital phase-locked loops (DPLL's) is presented in this article. These architectures, referred to as parallel DPLL (PDPLL), employ multirate digital filter banks (DFB's) to track signals with a lower processing rate than the Nyquist rate, without reducing the input (Nyquist) bandwidth. The PDPLL basically trades complexity for hardware-processing speed by introducing parallel processing in the receiver. It is demonstrated here that the DPLL performance is identical to that of a PDPLL for both steady-state and transient behavior. A test signal with a time-varying Doppler characteristic is used to compare the performance of both the DPLL and the PDPLL.

The development of a stepped frequency microwave radiometer and its application to remote sensing of the Earth

NASA Technical Reports Server (NTRS)

Harrington, R. F.

1980-01-01

The design, development, application, and capabilities of a variable frequency microwave radiometer are described. This radiometer demonstrated the versatility, accuracy, and stability required to provide contributions to the geophysical understanding of ocean and ice processes. A closed-loop feedback method was used, whereby noise pulses were added to the received electromagnetic radiation to achieve a null balance in a Dicke switched radiometer. Stability was achieved through the use of a constant temperature enclosure around the low loss microwave front end. The Dicke reference temperature was maintained to an absolute accuracy of 0.1 K using a closed-loop proportional temperature controller. A microprocessor based digital controller operates the radiometer and records the data on computer compatible tapes. This radiometer exhibits an absolute accuracy of better than 0.5 K when the sensitivity is 0.1 K. The sensitivity varies between 0.0125 K and 1.25 K depending upon the bandwidth and integration time selected by the digital controller. Remote sensing experiments were conducted from an aircraft platform and the first radiometeric mapping of an ocean polar front; exploratory experiments to measure the thickness of lake ice; first discrimination between first year and multiyear ice below 10 GHz; and the first known measurements of frequency sensitive characteristics of sea ice.

Performance Analysis of Digital Tracking Loops for Telemetry Ranging Applications

NASA Astrophysics Data System (ADS)

Vilnrotter, V.; Hamkins, J.; Xie, H.; Ashrafi, S.

2015-08-01

In this article, we analyze mathematical models of digital loops used to track the phase and timing of communications and navigation signals. The limits on the accuracy of phase and timing estimates play a critical role in the accuracy achievable in telemetry ranging applications. We describe in detail a practical algorithm to compute the loop parameters for discrete update (DU) and continuous update (CU) loop formulations, and we show that a simple power-series approximation to the DU model is valid over a large range of time-bandwidth product . Several numerical examples compare the estimation error variance of the DU and CU models to each other and to Cramer-Rao lower bounds. Finally, the results are applied to the problem of ranging, by evaluating the performance of a phase-locked loop designed to track a typical ambiguity-resolving pseudonoise (PN) code received and demodulated at the spacecraft on the uplink part of the two-way ranging link, and a data transition tracking loop (DTTL) on the downlink part.

A comparison of methods for DPLL loop filter design

NASA Technical Reports Server (NTRS)

Aguirre, S.; Hurd, W. J.; Kumar, R.; Statman, J.

1986-01-01

Four design methodologies for loop filters for a class of digital phase-locked loops (DPLLs) are presented. The first design maps an optimum analog filter into the digital domain; the second approach designs a filter that minimizes in discrete time weighted combination of the variance of the phase error due to noise and the sum square of the deterministic phase error component; the third method uses Kalman filter estimation theory to design a filter composed of a least squares fading memory estimator and a predictor. The last design relies on classical theory, including rules for the design of compensators. Linear analysis is used throughout the article to compare different designs, and includes stability, steady state performance and transient behavior of the loops. Design methodology is not critical when the loop update rate can be made high relative to loop bandwidth, as the performance approaches that of continuous time. For low update rates, however, the miminization method is significantly superior to the other methods.

Fringe pattern demodulation with a two-frame digital phase-locked loop algorithm.

PubMed

Gdeisat, Munther A; Burton, David R; Lalor, Michael J

2002-09-10

A novel technique called a two-frame digital phase-locked loop for fringe pattern demodulation is presented. In this scheme, two fringe patterns with different spatial carrier frequencies are grabbed for an object. A digital phase-locked loop algorithm tracks and demodulates the phase difference between both fringe patterns by employing the wrapped phase components of one of the fringe patterns as a reference to demodulate the second fringe pattern. The desired phase information can be extracted from the demodulated phase difference. We tested the algorithm experimentally using real fringe patterns. The technique is shown to be suitable for noncontact measurement of objects with rapid surface variations, and it outperforms the Fourier fringe analysis technique in this aspect. Phase maps produced withthis algorithm are noisy in comparison with phase maps generated with the Fourier fringe analysis technique.

Application of the concept of dynamic trim control to automatic landing of carrier aircraft. [utilizing digital feedforeward control

NASA Technical Reports Server (NTRS)

Smith, G. A.; Meyer, G.

1980-01-01

The results of a simulation study of an alternative design concept for an automatic landing control system are presented. The alternative design concept for an automatic landing control system is described. The design concept is the total aircraft flight control system (TAFCOS). TAFCOS is an open loop, feed forward system that commands the proper instantaneous thrust, angle of attack, and roll angle to achieve the forces required to follow the desired trajector. These dynamic trim conditions are determined by an inversion of the aircraft nonlinear force characteristics. The concept was applied to an A-7E aircraft approaching an aircraft carrier. The implementation details with an airborne digital computer are discussed. The automatic carrier landing situation is described. The simulation results are presented for a carrier approach with atmospheric disturbances, an approach with no disturbances, and for tailwind and headwind gusts.

Nonlinear and Digital Man-machine Control Systems Modeling

NASA Technical Reports Server (NTRS)

Mekel, R.

1972-01-01

An adaptive modeling technique is examined by which controllers can be synthesized to provide corrective dynamics to a human operator's mathematical model in closed loop control systems. The technique utilizes a class of Liapunov functions formulated for this purpose, Liapunov's stability criterion and a model-reference system configuration. The Liapunov function is formulated to posses variable characteristics to take into consideration the identification dynamics. The time derivative of the Liapunov function generate the identification and control laws for the mathematical model system. These laws permit the realization of a controller which updates the human operator's mathematical model parameters so that model and human operator produce the same response when subjected to the same stimulus. A very useful feature is the development of a digital computer program which is easily implemented and modified concurrent with experimentation. The program permits the modeling process to interact with the experimentation process in a mutually beneficial way.

Space construction base control system

NASA Technical Reports Server (NTRS)

Kaczynski, R. F.

1979-01-01

Several approaches for an attitude control system are studied and developed for a large space construction base that is structurally flexible. Digital simulations were obtained using the following techniques: (1) the multivariable Nyquist array method combined with closed loop pole allocation, (2) the linear quadratic regulator method. Equations for the three-axis simulation using the multilevel control method were generated and are presented. Several alternate control approaches are also described. A technique is demonstrated for obtaining the dynamic structural properties of a vehicle which is constructed of two or more submodules of known dynamic characteristics.

Sub-μrad laser beam tracking

NASA Astrophysics Data System (ADS)

Buske, Ivo; Riede, Wolfgang

2006-09-01

We compare active optical elements based on different technologies to accomplish the requirements of a 2-dim. fine tracking control system. A cascaded optically and electrically addressable spatial light modulator (OASLM) based on liquid crystals (LC) is used for refractive beam steering. Spatial light modulators provide a controllable phase wedge to generate a beam deflection. Additionally, a tip/tilt mirror approach operating with piezo-electric actuators is investigated. A digital PID controller is implemented for closed-loop control. Beam tracking with a root-mean-squared accuracy of Δα=30 nrad has been laboratory-confirmed.

DOE Office of Scientific and Technical Information (OSTI.GOV)

Zheng, Dezhi; Liu, Yixuan, E-mail: xuan61x@163.com; Guo, Zhanshe

A new maglev sensor is proposed to measure ultra-low frequency (ULF) vibration, which uses hybrid-magnet levitation structure with electromagnets and permanent magnets as the supporting component, rather than the conventional spring structure of magnetoelectric vibration sensor. Since the lower measurement limit needs to be reduced, the equivalent bearing stiffness coefficient and the equivalent damping coefficient are adjusted by the sensitivity unit structure of the sensor and the closed-loop control system, which realizes both the closed-loop control and the solving algorithms. A simple sensor experimental platform is then assembled based on a digital hardware system, and experimental results demonstrate that themore » lower measurement limit of the sensor is increased to 0.2 Hz under these experimental conditions, indicating promising results of the maglev sensor for ULF vibration measurements.« less

Theory and experiment research for ultra-low frequency maglev vibration sensor.

PubMed

Zheng, Dezhi; Liu, Yixuan; Guo, Zhanshe; Zhao, Xiaomeng; Fan, Shangchun

2015-10-01

A new maglev sensor is proposed to measure ultra-low frequency (ULF) vibration, which uses hybrid-magnet levitation structure with electromagnets and permanent magnets as the supporting component, rather than the conventional spring structure of magnetoelectric vibration sensor. Since the lower measurement limit needs to be reduced, the equivalent bearing stiffness coefficient and the equivalent damping coefficient are adjusted by the sensitivity unit structure of the sensor and the closed-loop control system, which realizes both the closed-loop control and the solving algorithms. A simple sensor experimental platform is then assembled based on a digital hardware system, and experimental results demonstrate that the lower measurement limit of the sensor is increased to 0.2 Hz under these experimental conditions, indicating promising results of the maglev sensor for ULF vibration measurements.

Theory and experiment research for ultra-low frequency maglev vibration sensor

NASA Astrophysics Data System (ADS)

Zheng, Dezhi; Liu, Yixuan; Guo, Zhanshe; Zhao, Xiaomeng; Fan, Shangchun

2015-10-01

A new maglev sensor is proposed to measure ultra-low frequency (ULF) vibration, which uses hybrid-magnet levitation structure with electromagnets and permanent magnets as the supporting component, rather than the conventional spring structure of magnetoelectric vibration sensor. Since the lower measurement limit needs to be reduced, the equivalent bearing stiffness coefficient and the equivalent damping coefficient are adjusted by the sensitivity unit structure of the sensor and the closed-loop control system, which realizes both the closed-loop control and the solving algorithms. A simple sensor experimental platform is then assembled based on a digital hardware system, and experimental results demonstrate that the lower measurement limit of the sensor is increased to 0.2 Hz under these experimental conditions, indicating promising results of the maglev sensor for ULF vibration measurements.

An All-Digital Fast Tracking Switching Converter with a Programmable Order Loop Controller for Envelope Tracking RF Power Amplifiers

PubMed Central

Anabtawi, Nijad; Ferzli, Rony; Harmanani, Haidar M.

2017-01-01

This paper presents a step down, switched mode power converter for use in multi-standard envelope tracking radio frequency power amplifiers (RFPA). The converter is based on a programmable order sigma delta modulator that can be configured to operate with either 1st, 2nd, 3rd or 4th order loop filters, eliminating the need for a bulky passive output filter. Output ripple, sideband noise and spectral emission requirements of different wireless standards can be met by configuring the modulator’s filter order and converter’s sampling frequency. The proposed converter is entirely digital and is implemented in 14nm bulk CMOS process for post layout verification. For an input voltage of 3.3V, the converter’s output can be regulated to any voltage level from 0.5V to 2.5V, at a nominal switching frequency of 150MHz. It achieves a maximum efficiency of 94% at 1.5 W output power. PMID:28919657

In-line Microwave Warmer for Blood and Intravenous Fluids.

DTIC Science & Technology

1989-12-14

circuit was designed and tested. This circuit uses a digitally controlled optically coupled Triac , a thyristor device, which acts as a switch to allow...three sites of the circuit : Inlet Port of Heating Chamber Interior Path of Heating Chamber Outlet Port of Heating Chamber 4) Feedback Control Mechanism...accomplished through use of a closed loop test circuit depicted in Figure 1-2. This test circuit can be used to heat iv fluids or blood on a continuous

Photographic Video Disc Technology Assessment

DTIC Science & Technology

1976-09-27

by a universal type motor that is driven from the ac power lines using a triac . The triac is controlled by a phase locked loop control circuit that...Regardless of signal format, direct analogue or an A/D converted digital signal, it is recorded by modulated laser beam and can be read out by either...was made to record with frequency modulation (FM) because of its immunity to noise at low frequencies where much of the system noise is. The usual

Digital adaptive control of a VTOL aircraft

NASA Technical Reports Server (NTRS)

Reid, G. F.

1976-01-01

A technique has been developed for calculating feedback and feedforward gain matrices that stabilize a VTOL aircraft while enabling it to track input commands of forward and vertical velocity. Leverrier's algorithm is used in a procedure for determining a set of state variable, feedback gains that force the closed loop poles and zeroes of one pilot input transfer function to be at preselected positions in the s plane. This set of feedback gains is then used to calculate the feedback and feedforward gains for the velocity command controller. The method is computationally attractive since the gains are determined by solving systems of linear, simultaneous equations. Responses obtained using a digital simulation of the longitudinal dynamics of the CH-47 helicopter are presented.

Flight test experience and controlled impact of a large, four-engine, remotely piloted airplane

NASA Technical Reports Server (NTRS)

Kempel, R. W.; Horton, T. W.

1985-01-01

A controlled impact demonstration (CID) program using a large, four engine, remotely piloted transport airplane was conducted. Closed loop primary flight control was performed from a ground based cockpit and digital computer in conjunction with an up/down telemetry link. Uplink commands were received aboard the airplane and transferred through uplink interface systems to a highly modified Bendix PB-20D autopilot. Both proportional and discrete commands were generated by the ground pilot. Prior to flight tests, extensive simulation was conducted during the development of ground based digital control laws. The control laws included primary control, secondary control, and racetrack and final approach guidance. Extensive ground checks were performed on all remotely piloted systems. However, manned flight tests were the primary method of verification and validation of control law concepts developed from simulation. The design, development, and flight testing of control laws and the systems required to accomplish the remotely piloted mission are discussed.

Digital tracking loops for a programmable digital modem

NASA Technical Reports Server (NTRS)

Poklemba, John J.

1992-01-01

In this paper, an analysis and hardware emulation of the tracking loops for a very flexible programmable digital modem (PDM) will be presented. The modem is capable of being programmed for 2, 4, 8, 16-PSK, 16-QAM, MSK, and Offset-QPSK modulation schemes over a range of data rates from 2.34 to 300 Mbps with programmable spectral occupancy from 1.2 to 1.8 times the symbol rate; these operational parameters are executable in burst or continuous mode. All of the critical processing in both the modulator and demodulator is done at baseband with very high-speed digital hardware and memory. Quadrature analog front-ends are used for translation between baseband and the IF center frequency. The modulator is based on a table lookup approach, where precomputed samples are stored in memory and clocked out according to the incoming data pattern. The sample values are predistorted to counteract the effects of the other filtering functions in the link as well as any transmission impairments. The demodulator architecture was adapted from a joint estimator-detector (JED) mathematical analysis. Its structure is applicable to most signalling formats that can be represented in a two-dimensional space. The JED realization uses interdependent, mutually aiding tracking loops with post-detection data feedback. To expedite and provide for more reliable synchronization, initial estimates for these loops are computed in a parallel acquisition processor. The cornerstone of the demodulator realization is the pre-averager received data filter which allows operation over a broad range of data rates without any hardware changes and greatly simplifies the implementation complexity. The emulation results confirmed tracking loop operation over the entire range of operational parameters listed above, as well as the capability of achieving and maintaining synchronization at BER's in excess of 10(exp -1). The emulation results also showed very close agreement with the tracking loop analysis, and validated the resolution apportionment of the various hardware elements in the tracking loops.

Modeling and Compensation Design for a Power Hardware-in-the-Loop Simulation of an AC Distribution System

DOE Office of Scientific and Technical Information (OSTI.GOV)

Ainsworth, Nathan; Hariri, Ali; Prabakar, Kumaraguru

Power hardware-in-the-loop (PHIL) simulation, where actual hardware under text is coupled with a real-time digital model in closed loop, is a powerful tool for analyzing new methods of control for emerging distributed power systems. However, without careful design and compensation of the interface between the simulated and actual systems, PHIL simulations may exhibit instability and modeling inaccuracies. This paper addresses issues that arise in the PHIL simulation of a hardware battery inverter interfaced with a simulated distribution feeder. Both the stability and accuracy issues are modeled and characterized, and a methodology for design of PHIL interface compensation to ensure stabilitymore » and accuracy is presented. The stability and accuracy of the resulting compensated PHIL simulation is then shown by experiment.« less

Modeling and Compensation Design for a Power Hardware-in-the-Loop Simulation of an AC Distribution System: Preprint

DOE Office of Scientific and Technical Information (OSTI.GOV)

Prabakar, Kumaraguru; Ainsworth, Nathan; Pratt, Annabelle

Power hardware-in-the-loop (PHIL) simulation, where actual hardware under text is coupled with a real-time digital model in closed loop, is a powerful tool for analyzing new methods of control for emerging distributed power systems. However, without careful design and compensation of the interface between the simulated and actual systems, PHIL simulations may exhibit instability and modeling inaccuracies. This paper addresses issues that arise in the PHIL simulation of a hardware battery inverter interfaced with a simulated distribution feeder. Both the stability and accuracy issues are modeled and characterized, and a methodology for design of PHIL interface compensation to ensure stabilitymore » and accuracy is presented. The stability and accuracy of the resulting compensated PHIL simulation is then shown by experiment.« less

Exploration of a 'double-jeopardy' hypothesis within working memory profiles for children with specific language impairment.

PubMed

Briscoe, J; Rankin, P M

2009-01-01

Children with specific language impairment (SLI) often experience difficulties in the recall and repetition of verbal information. Archibald and Gathercole (2006) suggested that children with SLI are vulnerable across two separate components of a tripartite model of working memory (Baddeley and Hitch 1974). However, the hierarchical relationship between the 'slave' systems (temporary storage) and the central executive components places a particular challenge for interpreting working memory profiles within a tripartite model. This study aimed to examine whether a 'double-jeopardy' assumption is compatible with a hierarchical relationship between the phonological loop and central executive components of the working memory model in children with SLI. If a strong double-jeopardy assumption is valid for children with SLI, it was predicted that raw scores of working memory tests thought to tap phonological loop and central executive components of tripartite working memory would be lower than the scores of children matched for chronological age and those of children matched for language level, according to independent sources of constraint. In contrast, a hierarchical relationship would imply that a weakness in a slave component of working memory (the phonological loop) would also constrain performance on tests tapping a super-ordinate component (central executive). This locus of constraint would predict that scores of children with SLI on working memory tests that tap the central executive would be weaker relative to the scores of chronological age-matched controls only. Seven subtests of the Working Memory Test Battery for Children (Digit recall, Word recall, Non-word recall, Word matching, Listening recall, Backwards digit recall and Block recall; Pickering and Gathercole 2001) were administered to 14 children with SLI recruited via language resource bases and specialist schools, as well as two control groups matched on chronological age and vocabulary level, respectively. Mean group differences were ascertained by directly comparing raw scores on memory tests linked to different components of the tripartite model using a series of multivariate analyses. The majority of working memory scores of the SLI group were depressed relative to chronological age-matched controls, with the exception of spatial recall (block tapping) and word (order) matching tasks. Marked deficits in serial recall of words and digits were evident, with the SLI group scoring more poorly than the language-ability matched control group on these measures. Impairments of the SLI group on phonological loop tasks were robust, even when covariance with executive working memory scores was accounted for. There was no robust effect of group on complex working memory (central executive) tasks, despite a slight association between listening recall and phonological loop measures. A predominant feature of the working memory profile of SLI was a marked deficit on phonological loop tasks. Although scores on complex working memory tasks were also depressed, there was little evidence for a strong interpretation of double-jeopardy within working memory profiles for these children, rather these findings were consistent with an interpretation of a constraint on phonological loop for children with SLI that operated at all levels of a hierarchical tripartite model of working memory (Baddeley and Hitch 1974). These findings imply that low scores on complex working memory tasks alone do not unequivocally imply an independent deficit in central executive (domain-general) resources of working memory and should therefore be treated cautiously in a clinical context.

Photoacoustic-Based-Close-Loop Temperature Control for Nanoparticle Hyperthermia.

PubMed

Xiaohua, Feng; Fei, Gao; Yuanjin, Zheng

2015-07-01

Hyperthermia therapy requires tight temperature control to achieve selective killing of cancerous tissue with minimal damage on surrounding healthy tissues. To this end, accurate temperature monitoring and subsequent heating control are critical. However, an economic, portable, and real-time temperature control solution is currently lacking. To bridge this gap, we present a novel portable close-loop system for hyperthermia temperature control, in which photoacoustic technique is proposed for noninvasive real-time temperature measurement. Exploiting the high sensitivity of photoacoustics, the temperature is monitored with an accuracy of around 0.18 °C and then fed back to a controller implemented on field programmable gate array (FPGA) for temperature control. Dubbed as portable hyperthermia feedback controller (pHFC), it stabilizes the temperature at preset values by regulating the hyperthermia power with a proportional-integral-derivative (PID) algorithm; and to facilitate digital implementation, the pHFC further converts the PID output into switching values (0 and 1) with the pulse width modulation (PWM) algorithm. Proof-of-concept hyperthermia experiments demonstrate that the pHFC system is able to bring the temperature from baseline to predetermined value with an accuracy of 0.3° and a negligible temperature overshoot. The pHFC can potentially be translated to clinical applications with customized hyperthermia system design. This paper can facilitate future efforts in seamless integration of close-loop temperature control solution and various clinical hyperthermia systems.

Phase-locked-loop-based delay-line-free picosecond electro-optic sampling system

NASA Astrophysics Data System (ADS)

Lin, Gong-Ru; Chang, Yung-Cheng

2003-04-01

A delay-line-free, high-speed electro-optic sampling (EOS) system is proposed by employing a delay-time-controlled ultrafast laser diode as the optical probe. Versatile optoelectronic delay-time controllers (ODTCs) based on modified voltage-controlled phase-locked-loop phase-shifting technologies are designed for the laser. The integration of the ODTC circuit and the pulsed laser diode has replaced the traditional optomechanical delay-line module used in the conventional EOS system. This design essentially prevents sampling distortion from misalignment of the probe beam, and overcomes the difficulty in sampling free-running high-speed transients. The maximum tuning range, error, scanning speed, tuning responsivity, and resolution of the ODTC are 3.9π (700°), <5% deviation, 25-2405 ns/s, 0.557 ps/mV, and ˜1 ps, respectively. Free-running wave forms from the analog, digital, and pulsed microwave signals are sampled and compared with those measured by the commercial apparatus.

Testing of the on-board attitude determination and control algorithms for SAMPEX

NASA Technical Reports Server (NTRS)

Mccullough, Jon D.; Flatley, Thomas W.; Henretty, Debra A.; Markley, F. Landis; San, Josephine K.

1993-01-01

Algorithms for on-board attitude determination and control of the Solar, Anomalous, and Magnetospheric Particle Explorer (SAMPEX) have been expanded to include a constant gain Kalman filter for the spacecraft angular momentum, pulse width modulation for the reaction wheel command, an algorithm to avoid pointing the Heavy Ion Large Telescope (HILT) instrument boresight along the spacecraft velocity vector, and the addition of digital sun sensor (DSS) failure detection logic. These improved algorithms were tested in a closed-loop environment for three orbit geometries, one with the sun perpendicular to the orbit plane, and two with the sun near the orbit plane - at Autumnal Equinox and at Winter Solstice. The closed-loop simulator was enhanced and used as a truth model for the control systems' performance evaluation and sensor/actuator contingency analysis. The simulations were performed on a VAX 8830 using a prototype version of the on-board software.

Development of a distributed-parameter mathematical model for simulation of cryogenic wind tunnels

NASA Technical Reports Server (NTRS)

Tripp, J. S.

1983-01-01

A one-dimensional distributed-parameter dynamic model of a cryogenic wind tunnel was developed which accounts for internal and external heat transfer, viscous momentum losses, and slotted-test-section dynamics. Boundary conditions imposed by liquid-nitrogen injection, gas venting, and the tunnel fan were included. A time-dependent numerical solution to the resultant set of partial differential equations was obtained on a CDC CYBER 203 vector-processing digital computer at a usable computational rate. Preliminary computational studies were performed by using parameters of the Langley 0.3-Meter Transonic Cryogenic Tunnel. Studies were performed by using parameters from the National Transonic Facility (NTF). The NTF wind-tunnel model was used in the design of control loops for Mach number, total temperature, and total pressure and for determining interactions between the control loops. It was employed in the application of optimal linear-regulator theory and eigenvalue-placement techniques to develop Mach number control laws.

Performance of the all-digital data-transition tracking loop in the advanced receiver

NASA Astrophysics Data System (ADS)

Cheng, U.; Hinedi, S.

1989-11-01

The performance of the all-digital data-transition tracking loop (DTTL) with coherent or noncoherent sampling is described. The effects of few samples per symbol and of noncommensurate sampling rates and symbol rates are addressed and analyzed. Their impacts on the loop phase-error variance and the mean time to lose lock (MTLL) are quantified through computer simulations. The analysis and preliminary simulations indicate that with three to four samples per symbol, the DTTL can track with negligible jitter because of the presence of earth Doppler rate. Furthermore, the MTLL is also expected to be large engough to maintain lock over a Deep Space Network track.

47 CFR 51.319 - Specific unbundling requirements.

Code of Federal Regulations, 2014 CFR

2014-10-01

... copper loop and a second competitive LEC provides digital subscriber line service over the high frequency portion of that same loop. The high frequency portion of the loop consists of the frequency range on the... complete transmission path on the high frequency range between the incumbent LEC's distribution frame (or...

47 CFR 51.319 - Specific unbundling requirements.

Code of Federal Regulations, 2013 CFR

2013-10-01

... copper loop and a second competitive LEC provides digital subscriber line service over the high frequency portion of that same loop. The high frequency portion of the loop consists of the frequency range on the... complete transmission path on the high frequency range between the incumbent LEC's distribution frame (or...

A New Turbo-shaft Engine Control Law during Variable Rotor Speed Transient Process

NASA Astrophysics Data System (ADS)

Hua, Wei; Miao, Lizhen; Zhang, Haibo; Huang, Jinquan

2015-12-01

A closed-loop control law employing compressor guided vanes is firstly investigated to solve unacceptable fuel flow dynamic change in single fuel control for turbo-shaft engine here, especially for rotorcraft in variable rotor speed process. Based on an Augmented Linear Quadratic Regulator (ALQR) algorithm, a dual-input, single-output robust control scheme is proposed for a turbo-shaft engine, involving not only the closed loop adjustment of fuel flow but also that of compressor guided vanes. Furthermore, compared to single fuel control, some digital simulation cases using this new scheme about variable rotor speed have been implemented on the basis of an integrated system of helicopter and engine model. The results depict that the command tracking performance to the free turbine rotor speed can be asymptotically realized. Moreover, the fuel flow transient process has been significantly improved, and the fuel consumption has been dramatically cut down by more than 2% while keeping the helicopter level fight unchanged.

Thermostatic system of sensor in NIR spectrometer based on PID control

NASA Astrophysics Data System (ADS)

Wang, Zhihong; Qiao, Liwei; Ji, Xufei

2016-11-01

Aiming at the shortcomings of the primary sensor thermostatic control system in the near infrared (NIR) spectrometer, a novel thermostatic control system based on proportional-integral-derivative (PID) control technology was developed to improve the detection precision of the NIR spectrometer. There were five parts including bridge amplifier circuit, analog-digital conversion (ADC) circuit, microcontroller, digital-analog conversion (DAC) circuit and drive circuit in the system. The five parts formed a closed-loop control system based on PID algorithm that was used to control the error between the temperature calculated by the sampling data of ADC and the designed temperature to ensure the stability of the spectrometer's sensor. The experimental results show that, when the operating temperature of sensor is -11°, compared with the original system, the temperature control precision of the new control system is improved from ±0.64° to ±0.04° and the spectrum signal to noise ratio (SNR) is improved from 4891 to 5967.

A second-order all-digital phase-locked loop

NASA Technical Reports Server (NTRS)

Holmes, J. K.; Tegnelia, C. R.

1974-01-01

A simple second-order digital phase-locked loop has been designed to synchronize itself to a square-wave subcarrier. Analysis and experimental performance are given for both acquisition behavior and steady-state phase error performance. In addition, the damping factor and the noise bandwidth are derived analytically. Although all the data are given for the square-wave subcarrier case, the results are applicable to arbitrary subcarriers that are odd symmetric about their transition region.

Dual-range linearized transimpedance amplifier system

DOEpatents

Wessendorf, Kurt O.

2010-11-02

A transimpedance amplifier system is disclosed which simultaneously generates a low-gain output signal and a high-gain output signal from an input current signal using a single transimpedance amplifier having two different feedback loops with different amplification factors to generate two different output voltage signals. One of the feedback loops includes a resistor, and the other feedback loop includes another resistor in series with one or more diodes. The transimpedance amplifier system includes a signal linearizer to linearize one or both of the low- and high-gain output signals by scaling and adding the two output voltage signals from the transimpedance amplifier. The signal linearizer can be formed either as an analog device using one or two summing amplifiers, or alternately can be formed as a digital device using two analog-to-digital converters and a digital signal processor (e.g. a microprocessor or a computer).

Multi-axis transient vibration testing of space objects: Test philosophy, test facility, and control strategy

NASA Technical Reports Server (NTRS)

Lachenmayr, Georg

1992-01-01

IABG has been using various servohydraulic test facilities for many years for the reproduction of service loads and environmental loads on all kinds of test objects. For more than 15 years, a multi-axis vibration test facility has been under service, originally designed for earthquake simulation but being upgraded to the demands of space testing. First tests with the DFS/STM showed good reproduction accuracy and demonstrated the feasibility of transient vibration testing of space objects on a multi-axis hydraulic shaker. An approach to structural qualification is possible by using this test philosophy. It will be outlined and its obvious advantages over the state-of-the-art single-axis test will be demonstrated by example results. The new test technique has some special requirements to the test facility exceeding those of earthquake testing. Most important is the high reproduction accuracy demanded for a sophisticated control system. The state-of-the-art approach of analog closed-loop control circuits for each actuator combined with a static decoupling network and an off-line iterative waveform control is not able to meet all the demands. Therefore, the future over-all control system is implemented as hierarchical full digital closed-loop system on a highly parallel transputer network. The innermost layer is the digital actuator controller, the second one is the MDOF-control of the table movement. The outermost layer would be the off-line iterative waveform control, which is dedicated only to deal with the interaction of test table and test object or non-linear effects. The outline of the system will be presented.

A miniaturized digital telemetry system for physiological data transmission

NASA Technical Reports Server (NTRS)

Portnoy, W. M.; Stotts, L. J.

1978-01-01

A physiological date telemetry system, consisting basically of a portable unit and a ground base station was designed, built, and tested. The portable unit to be worn by the subject is composed of a single crystal controlled transmitter with AM transmission of digital data and narrowband FM transmission of voice; a crystal controlled FM receiver; thirteen input channels follwed by a PCM encoder (three of these channels are designed for ECG data); a calibration unit; and a transponder control system. The ground base station consists of a standard telemetry reciever, a decoder, and an FM transmitter for transmission of voice and transponder signals to the portable unit. The ground base station has complete control of power to all subsystems in the portable unit. The phase-locked loop circuit which is used to decode the data, remains in operation even when the signal from the portable unit is interrupted.

A modern control theory based algorithm for control of the NASA/JPL 70-meter antenna axis servos

NASA Technical Reports Server (NTRS)

Hill, R. E.

1987-01-01

A digital computer-based state variable controller was designed and applied to the 70-m antenna axis servos. The general equations and structure of the algorithm and provisions for alternate position error feedback modes to accommodate intertarget slew, encoder referenced tracking, and precision tracking modes are descibed. Development of the discrete time domain control model and computation of estimator and control gain parameters based on closed loop pole placement criteria are discussed. The new algorithm was successfully implemented and tested in the 70-m antenna at Deep Space Network station 63 in Spain.

Monitoring Digital Closed-Loop Feedback Systems

NASA Technical Reports Server (NTRS)

Katz, Richard; Kleyner, Igor

2011-01-01

A technique of monitoring digital closed-loop feedback systems has been conceived. The basic idea is to obtain information on the performances of closed-loop feedback circuits in such systems to aid in the determination of the functionality and integrity of the circuits and of performance margins. The need for this technique arises as follows: Some modern digital systems include feedback circuits that enable other circuits to perform with precision and are tolerant of changes in environment and the device s parameters. For example, in a precision timing circuit, it is desirable to make the circuit insensitive to variability as a result of the manufacture of circuit components and to the effects of temperature, voltage, radiation, and aging. However, such a design can also result in masking the indications of damaged and/or deteriorating components. The present technique incorporates test circuitry and associated engineering-telemetry circuitry into an embedded system to monitor the closed-loop feedback circuits, using spare gates that are often available in field programmable gate arrays (FPGAs). This technique enables a test engineer to determine the amount of performance margin in the system, detect out of family circuit performance, and determine one or more trend(s) in the performance of the system. In one system to which the technique has been applied, an ultra-stable oscillator is used as a reference for internal adjustment of 12 time-to-digital converters (TDCs). The feedback circuit produces a pulse-width-modulated signal that is fed as a control input into an amplifier, which controls the circuit s operating voltage. If the circuit s gates are determined to be operating too slowly or rapidly when their timing is compared with that of the reference signal, then the pulse width increases or decreases, respectively, thereby commanding the amplifier to increase or reduce, respectively, its output level, and "adjust" the speed of the circuits. The nominal frequency of the TDC s pulse width modulated outputs is approximately 40 kHz. In this system, the technique is implemented by means of a monitoring circuit that includes a 20-MHz sampling circuit and a 24-bit accumulator with a gate time of 10 ms. The monitoring circuit measures the duty cycle of each of the 12 TDCs at a repetition rate of 28 Hz. The accumulator content is reset to all zeroes at the beginning of each measurement period and is then incremented or decremented based of the value of the state of the pulse width modulated signal. Positive or negative values in the accumulator correspond to duty cycles greater or less, respectively, than 50 percent.

Irdis: A Digital Scene Storage And Processing System For Hardware-In-The-Loop Missile Testing

NASA Astrophysics Data System (ADS)

Sedlar, Michael F.; Griffith, Jerry A.

1988-07-01

This paper describes the implementation of a Seeker Evaluation and Test Simulation (SETS) Facility at Eglin Air Force Base. This facility will be used to evaluate imaging infrared (IIR) guided weapon systems by performing various types of laboratory tests. One such test is termed Hardware-in-the-Loop (HIL) simulation (Figure 1) in which the actual flight of a weapon system is simulated as closely as possible in the laboratory. As shown in the figure, there are four major elements in the HIL test environment; the weapon/sensor combination, an aerodynamic simulator, an imagery controller, and an infrared imagery system. The paper concentrates on the approaches and methodologies used in the imagery controller and infrared imaging system elements for generating scene information. For procurement purposes, these two elements have been combined into an Infrared Digital Injection System (IRDIS) which provides scene storage, processing, and output interface to drive a radiometric display device or to directly inject digital video into the weapon system (bypassing the sensor). The paper describes in detail how standard and custom image processing functions have been combined with off-the-shelf mass storage and computing devices to produce a system which provides high sample rates (greater than 90 Hz), a large terrain database, high weapon rates of change, and multiple independent targets. A photo based approach has been used to maximize terrain and target fidelity, thus providing a rich and complex scene for weapon/tracker evaluation.

A Close Loop Low-Power and High Speed 130 nm CMOS Sample and Hold Circuit Based on Switched Capacitor for ADC Module

NASA Astrophysics Data System (ADS)

Nasir, Z.; Ruslan, S. H.

2017-08-01

A sample and hold (S/H) block is typically used as an analogue to digital interface in the analogue to digital converter (ADC) system. Since ADC is widely used in processing signals, the power consumption of the ADC must be lowered to conserve energy. Therefore the S/H circuit must be of a low powered too. Sampling phase and hold phase are the two phases of the operation cycle of the S/H circuit. Switched capacitor (SC) techniques have been developed in order to allow the integration on a single silicon chip of both digital and analogue functions. By controlling switches around the SC, the SC circuit works by passing charge into and out of a capacitor. SC circuits are suitable for on chip implementations because they replace a resistor with switches and capacitors. In this research, a closed-loop sample and hold circuit based on SC is designed and simulated with Cadence EDA tools. The schematic, layout, and simulation of the circuit is done using generic Silterra 130 nm technology file. All the analysis is done using Virtuoso Analog Design Environment. Layout and schematic are drawn using Virtuoso Schematic Editor and Virtuoso Layout Editor, Calibre is used for post layout simulation. The closed loop S/H circuit based on SC is successfully designed and able to sample and hold the analogue input waveform. The power consumption of the circuit is 0.919 mW and the propagation delay is 64.96 ps.

Digital phase shifter synchronizes local oscillators

NASA Technical Reports Server (NTRS)

Ali, S. M.

1978-01-01

Digital phase-shifting network is used as synchronous frequency multiplier for applications such as phase-locking two signals that may differ in frequency. Circuit has various phase-shift capability. Possible applications include data-communication systems and hybrid digital/analog phase-locked loops.

Closed Loop Real-Time Evaluation of Missile Guidance and Control Components: Simulator Hardware/Software Characteristics and Use

DTIC Science & Technology

1974-08-01

Node Control Logic 2-27 2.16 Pitch Channel Frequence Response 2-36 2.17 Yaw Channel Frequency Response 2-37 K 4 2.18 Analog Computer Mechanlzation of...8217S 0 121 £l1:c IL-I. TABLE I Elements of the Slgma 5 Digital Computer System Xerox Model- Performance MIOP Channel Description Number Characteristics...transfer control signals to or from the CPU. The MIOP can handle up to 32 I/0 channels each operating simultaneously, provided the overall data

Modeling and control design of a wind tunnel model support

NASA Technical Reports Server (NTRS)

Howe, David A.

1990-01-01

The 12-Foot Pressure Wind Tunnel at Ames Research Center is being restored. A major part of the restoration is the complete redesign of the aircraft model supports and their associated control systems. An accurate trajectory control servo system capable of positioning a model (with no measurable overshoot) is needed. Extremely small errors in scaled-model pitch angle can increase airline fuel costs for the final aircraft configuration by millions of dollars. In order to make a mechanism sufficiently accurate in pitch, a detailed structural and control-system model must be created and then simulated on a digital computer. The model must contain linear representations of the mechanical system, including masses, springs, and damping in order to determine system modes. Electrical components, both analog and digital, linear and nonlinear must also be simulated. The model of the entire closed-loop system must then be tuned to control the modes of the flexible model-support structure. The development of a system model, the control modal analysis, and the control-system design are discussed.

The High Altitude Balloon Experiment demonstration of acquisition, tracking, and pointing technologies (HABE-ATP)

NASA Astrophysics Data System (ADS)

Dimiduk, D.; Caylor, M.; Williamson, D.; Larson, L.

1995-01-01

The High Altitude Balloon Experiment demonstration of Acquisition, Tracking, and Pointing (HABE-ATP) is a system built around balloon-borne payload which is carried to a nominal 26-km altitude. The goal is laser tracking thrusting theater and strategic missiles, and then pointing a surrogate laser weapon beam, with performance levels end a timeline traceable to operational laser weapon system requirements. This goal leads to an experiment system design which combines hardware from many technology areas: an optical telescope and IR sensors; an advanced angular inertial reference; a flexible multi-level of actuation digital control system; digital tracking processors which incorporate real-time image analysis and a pulsed, diode-pumped solid state tracking laser. The system components have been selected to meet the overall experiment goals of tracking unmodified boosters at 50- 200 km range. The ATP system on HABE must stabilize and control a relative line of sight between the platform and the unmodified target booster to a 1 microrad accuracy. The angular pointing reference system supports both open loop and closed loop track modes; GPS provides absolute position reference. The control system which positions the line of sight for the ATP system must sequence through accepting a state vector handoff, closed-loop passive IR acquisition, passive IR intermediate fine track, active fine track, and then finally aimpoint determination and maintenance modes. Line of sight stabilization to fine accuracy levels is accomplished by actuating wide bandwidth fast steering mirrors (FSM's). These control loops off-load large-amplitude errors to the outer gimbal in order to remain within the limited angular throw of the FSM's. The SWIR acquisition and MWIR intermediate fine track sensors (both PtSi focal planes) image the signature of the rocket plume. After Hard Body Handover (HBHO), active fine tracking is conducted with a visible focal plane viewing the laser-illuminated target rocket body. The track and fire control performance must be developed to the point that an aimpoint can be selected, maintained, and then track performance scored with a low-power 'surrogate' weapon beam. Extensive instrumentation monitors not only the optical sensors and the video data, but all aspects of each of the experiment subsystems such as the control system, the experiment flight vehicle, and the tracker. Because the system is balloon-borne and recoverable, it is expected to fly many times during its development program.

Low power digitally controlled oscillator designs with a novel 3-transistor XNOR gate

NASA Astrophysics Data System (ADS)

Kumar, Manoj; Arya, Sandeep K.; Pandey, Sujata

2012-03-01

Digital controlled oscillators (DCOs) are the core of all digital phase locked loop (ADPLL) circuits. Here, DCO structures with reduced hardware and power consumption having full digital control have been proposed. Three different DCO architectures have been proposed based on ring based topology. Three, four and five bit controlled DCO with NMOS, PMOS and NMOS & PMOS transistor switching networks are presented. A three-transistor XNOR gate has been used as the inverter which is used as the delay cell. Delay has been controlled digitally with a switch network of NMOS and PMOS transistors. The three bit DCO with one NMOS network shows frequency variations of 1.6141-1.8790 GHz with power consumption variations 251.9224-276.8591 μW. The four bit DCO with one NMOS network shows frequency variation of 1.6229-1.8868 GHz with varying power consumption of 251.9225-278.0740 μW. A six bit DCO with one NMOS switching network gave an output frequency of 1.7237-1.8962 GHz with power consumption of 251.928-278.998 μW. Output frequency and power consumption results for 4 & 6 bit DCO circuits with one PMOS and NMOS & PMOS switching network have also been presented. The phase noise parameter with an offset frequency of 1 MHz has also been reported for the proposed circuits. Comparisons with earlier reported circuits have been made and the present approach shows advantages over previous circuits.

Self-Tuning Adaptive-Controller Using Online Frequency Identification

NASA Technical Reports Server (NTRS)

Chiang, W. W.; Cannon, R. H., Jr.

1985-01-01

A real time adaptive controller was designed and tested successfully on a fourth order laboratory dynamic system which features very low structural damping and a noncolocated actuator sensor pair. The controller, implemented in a digital minicomputer, consists of a state estimator, a set of state feedback gains, and a frequency locked loop (FLL) for real time parameter identification. The FLL can detect the closed loop natural frequency of the system being controlled, calculate the mismatch between a plant parameter and its counterpart in the state estimator, and correct the estimator parameter in real time. The adaptation algorithm can correct the controller error and stabilize the system for more than 50% variation in the plant natural frequency, compared with a 10% stability margin in frequency variation for a fixed gain controller having the same performance at the nominal plant condition. After it has locked to the correct plant frequency, the adaptive controller works as well as the fixed gain controller does when there is no parameter mismatch. The very rapid convergence of this adaptive system is demonstrated experimentally, and can also be proven with simple root locus methods.

Digital implementation of the TF30-P-3 turbofan engine control

NASA Technical Reports Server (NTRS)

Cwynar, D. S.; Batterton, P. G.

1975-01-01

The standard hydromechanical control modes for TF30-P-3 engine were implemented on a digital process control computer. Programming methods are described, and a method is presented to solve stability problems associated with fast response dynamic loops contained within the exhaust nozzle control. A modification of the exhaust nozzle control to provide for either velocity or position servoactuation systems is discussed. Transient response of the digital control was evaluated by tests on a real time hybrid simulation of the TF30-P-3 engine. It is shown that the deadtime produced by the calculation time delay between sampling and final output is more significant to transient response than the effects associated with sampling rate alone. For the main fuel control, extended update and calculation times resulted in a lengthened transient response to throttle bursts from idle to intermediate with an increase in high pressure compressor stall margin. Extremely long update intervals of 250 msec could be achieved without instability. Update extension for the exhaust nozzle control resulted in a delayed response of the afterburner light-off detector and exhaust nozzle overshoot with resulting fan oversuppression. Long update times of 150 msec caused failure of the control due to a false indication by the blowout detector.

Closing the design loop on HiMAT (highly maneuverable aircraft technology)

NASA Technical Reports Server (NTRS)

Putnam, T. W.; Robinson, M. R.

1984-01-01

The design methodology used in the HiMAT program and the wind tunnel development activities are discussed. Selected results from the flight test program are presented and the strengths and weaknesses of testing advanced technology vehicles using the RPV concept is examined. The role of simulation on the development of digital flight control systems and in RPV's in particular is emphasized.

Binary processing and display concepts for low-cost Omega receivers. [airborne systems simulation

NASA Technical Reports Server (NTRS)

Lilley, R. W.

1974-01-01

A description is given of concepts related to plans for developing a low-cost, all-digital Omega receiver capable of offering to the small-aircraft pilot a reliable and accurate navigation aid. The receiver base considered includes a receiver front-end module, a receiver control module, a memory-aided phase-locked loop module, a housekeeping timer module, and a synthesizer module.

The tracking performance of distributed recoverable flight control systems subject to high intensity radiated fields

NASA Astrophysics Data System (ADS)

Wang, Rui

It is known that high intensity radiated fields (HIRF) can produce upsets in digital electronics, and thereby degrade the performance of digital flight control systems. Such upsets, either from natural or man-made sources, can change data values on digital buses and memory and affect CPU instruction execution. HIRF environments are also known to trigger common-mode faults, affecting nearly-simultaneously multiple fault containment regions, and hence reducing the benefits of n-modular redundancy and other fault-tolerant computing techniques. Thus, it is important to develop models which describe the integration of the embedded digital system, where the control law is implemented, as well as the dynamics of the closed-loop system. In this dissertation, theoretical tools are presented to analyze the relationship between the design choices for a class of distributed recoverable computing platforms and the tracking performance degradation of a digital flight control system implemented on such a platform while operating in a HIRF environment. Specifically, a tractable hybrid performance model is developed for a digital flight control system implemented on a computing platform inspired largely by the NASA family of fault-tolerant, reconfigurable computer architectures known as SPIDER (scalable processor-independent design for enhanced reliability). The focus will be on the SPIDER implementation, which uses the computer communication system known as ROBUS-2 (reliable optical bus). A physical HIRF experiment was conducted at the NASA Langley Research Center in order to validate the theoretical tracking performance degradation predictions for a distributed Boeing 747 flight control system subject to a HIRF environment. An extrapolation of these results for scenarios that could not be physically tested is also presented.

Digital pyramid wavefront sensor with tunable modulation.

PubMed

Akondi, Vyas; Castillo, Sara; Vohnsen, Brian

2013-07-29

The pyramid wavefront sensor is known for its high sensitivity and dynamic range that can be tuned by mechanically altering its modulation amplitude. Here, a novel modulating digital scheme employing a reflecting phase only spatial light modulator is demonstrated. The use of the modulator allows an easy reconfigurable pyramid with digital control of the apex angle and modulation geometry without the need of any mechanically moving parts. Aberrations introduced by a 140-actuator deformable mirror were simultaneously sensed with the help of a commercial Hartmann-Shack wavefront sensor. The wavefronts reconstructed using the digital pyramid wavefront sensor matched very closely with those sensed by the Hartmann-Shack. It is noted that a tunable modulation is necessary to operate the wavefront sensor in the linear regime and to accurately sense aberrations. Through simulations, it is shown that the wavefront sensor can be extended to astronomical applications as well. This novel digital pyramid wavefront sensor has the potential to become an attractive option in both open and closed loop adaptive optics systems.

An analysis of the Dahl friction model and its effect on a CMG gimbal rate controller

NASA Technical Reports Server (NTRS)

Nurre, G. S.

1974-01-01

The effects of friction, represented by the Dahl model, on a CMG rate control system was investigated by digital simulation. The conclusion from these simulation results is that gimbal pivot friction can be a significant effect on the gimbal rate control system. The magnitude of the problem this presents depends on the characteristics of the actual pivot. It would appear from this preliminary look that one solution is to insure that the control system natural frequency is higher by some prescribed amount than the natural frequency of the friction loop.

Digital computer study of nuclear reactor thermal transients during startup of 60-kWe Brayton power conversion system

NASA Technical Reports Server (NTRS)

Jefferies, K. S.; Tew, R. C.

1974-01-01

A digital computer study was made of reactor thermal transients during startup of the Brayton power conversion loop of a 60-kWe reactor Brayton power system. A startup procedure requiring the least Brayton system complication was tried first; this procedure caused violations of design limits on key reactor variables. Several modifications of this procedure were then found which caused no design limit violations. These modifications involved: (1) using a slower rate of increase in gas flow; (2) increasing the initial reactor power level to make the reactor respond faster; and (3) appropriate reactor control drum manipulation during the startup transient.

Study of Globus-M Tokamak Poloidal System and Plasma Position Control

NASA Astrophysics Data System (ADS)

Dokuka, V. N.; Korenev, P. S.; Mitrishkin, Yu. V.; Pavlova, E. A.; Patrov, M. I.; Khayrutdinov, R. R.

2017-12-01

In order to provide efficient performance of tokamaks with vertically elongated plasma position, control systems for limited and diverted plasma configuration are required. The accuracy, stability, speed of response, and reliability of plasma position control as well as plasma shape and current control depend on the performance of the control system. Therefore, the problem of the development of such systems is an important and actual task in modern tokamaks. In this study, the measured signals from the magnetic loops and Rogowski coils are used to reconstruct the plasma equilibrium, for which linear models in small deviations are constructed. We apply methods of the H∞-optimization theory to the synthesize control system for vertical and horizontal position of plasma capable to working with structural uncertainty of the models of the plant. These systems are applied to the plasma-physical DINA code which is configured for the tokamak Globus-M plasma. The testing of the developed systems applied to the DINA code with Heaviside step functions have revealed the complex dynamics of plasma magnetic configurations. Being close to the bifurcation point in the parameter space of unstable plasma has made it possible to detect an abrupt change in the X-point position from the top to the bottom and vice versa. Development of the methods for reconstruction of plasma magnetic configurations and experience in designing plasma control systems with feedback for tokamaks provided an opportunity to synthesize new digital controllers for plasma vertical and horizontal position stabilization. It also allowed us to test the synthesized digital controllers in the closed loop of the control system with the DINA code as a nonlinear model of plasma.

RF control hardware design for CYCIAE-100 cyclotron

NASA Astrophysics Data System (ADS)

Yin, Zhiguo; Fu, Xiaoliang; Ji, Bin; Zhao, Zhenlu; Zhang, Tianjue; Li, Pengzhan; Wei, Junyi; Xing, Jiansheng; Wang, Chuan

2015-11-01

The Beijing Radioactive Ion-beam Facility project is being constructed by BRIF division of China Institute of Atomic Energy. In this project, a 100 MeV high intensity compact proton cyclotron is built for multiple applications. The first successful beam extraction of CYCIAE-100 cyclotron was done in the middle of 2014. The extracted proton beam energy is 100 MeV and the beam current is more than 20 μA. The RF system of the CYCIAE-100 cyclotron includes two half-wavelength cavities, two 100 kW tetrode amplifiers and power transmission line systems (all above are independent from each other) and two sets of Low Level RF control crates. Each set of LLRF control includes an amplitude control unit, a tuning control unit, a phase control unit, a local Digital Signal Process control unit and an Advanced RISC Machines based EPICS IOC unit. These two identical LLRF control crates share one common reference clock and take advantages of modern digital technologies (e.g. DSP and Direct Digital Synthesizer) to achieve closed loop voltage and phase regulations of the dee-voltage. In the beam commission, the measured dee-voltage stability of RF system is better than 0.1% and phase stability is better than 0.03°. The hardware design of the LLRF system will be reviewed in this paper.

Video on phone lines: technology and applications

NASA Astrophysics Data System (ADS)

Hsing, T. Russell

1996-03-01

Recent advances in communications signal processing and VLSI technology are fostering tremendous interest in transmitting high-speed digital data over ordinary telephone lines at bit rates substantially above the ISDN Basic Access rate (144 Kbit/s). Two new technologies, high-bit-rate digital subscriber lines and asymmetric digital subscriber lines promise transmission over most of the embedded loop plant at 1.544 Mbit/s and beyond. Stimulated by these research promises and rapid advances on video coding techniques and the standards activity, information networks around the globe are now exploring possible business opportunities of offering quality video services (such as distant learning, telemedicine, and telecommuting etc.) through this high-speed digital transport capability in the copper loop plant. Visual communications for residential customers have become more feasible than ever both technically and economically.

Use of digital control theory state space formalism for feedback at SLC

DOE Office of Scientific and Technical Information (OSTI.GOV)

Himel, T.; Hendrickson, L.; Rouse, F.

The algorithms used in the database-driven SLC fast-feedback system are based on the state space formalism of digital control theory. These are implemented as a set of matrix equations which use a Kalman filter to estimate a vector of states from a vector of measurements, and then apply a gain matrix to determine the actuator settings from the state vector. The matrices used in the calculation are derived offline using Linear Quadratic Gaussian minimization. For a given noise spectrum, this procedure minimizes the rms of the states (e.g., the position or energy of the beam). The offline program also allowsmore » simulation of the loop's response to arbitrary inputs, and calculates its frequency response. 3 refs., 3 figs.« less

Multi-Megawatt-Scale Power-Hardware-in-the-Loop Interface for Testing Ancillary Grid Services by Converter-Coupled Generation: Preprint

DOE Office of Scientific and Technical Information (OSTI.GOV)

Koralewicz, Przemyslaw J; Gevorgian, Vahan; Wallen, Robert B

Power-hardware-in-the-loop (PHIL) is a simulation tool that can support electrical systems engineers in the development and experimental validation of novel, advanced control schemes that ensure the robustness and resiliency of electrical grids that have high penetrations of low-inertia variable renewable resources. With PHIL, the impact of the device under test on a generation or distribution system can be analyzed using a real-time simulator (RTS). PHIL allows for the interconnection of the RTS with a 7 megavolt ampere (MVA) power amplifier to test multi-megawatt renewable assets available at the National Wind Technology Center (NWTC). This paper addresses issues related to themore » development of a PHIL interface that allows testing hardware devices at actual scale. In particular, the novel PHIL interface algorithm and high-speed digital interface, which minimize the critical loop delay, are discussed.« less

Multi-Megawatt-Scale Power-Hardware-in-the-Loop Interface for Testing Ancillary Grid Services by Converter-Coupled Generation

DOE Office of Scientific and Technical Information (OSTI.GOV)

Koralewicz, Przemyslaw J; Gevorgian, Vahan; Wallen, Robert B

Power-hardware-in-the-loop (PHIL) is a simulation tool that can support electrical systems engineers in the development and experimental validation of novel, advanced control schemes that ensure the robustness and resiliency of electrical grids that have high penetrations of low-inertia variable renewable resources. With PHIL, the impact of the device under test on a generation or distribution system can be analyzed using a real-time simulator (RTS). PHIL allows for the interconnection of the RTS with a 7 megavolt ampere (MVA) power amplifier to test multi-megawatt renewable assets available at the National Wind Technology Center (NWTC). This paper addresses issues related to themore » development of a PHIL interface that allows testing hardware devices at actual scale. In particular, the novel PHIL interface algorithm and high-speed digital interface, which minimize the critical loop delay, are discussed.« less

Technology transfer of operator-in-the-loop simulation

NASA Technical Reports Server (NTRS)

Yae, K. H.; Lin, H. C.; Lin, T. C.; Frisch, H. P.

1994-01-01

The technology developed for operator-in-the-loop simulation in space teleoperation has been applied to Caterpillar's backhoe, wheel loader, and off-highway truck. On an SGI workstation, the simulation integrates computer modeling of kinematics and dynamics, real-time computational and visualization, and an interface with the operator through the operator's console. The console is interfaced with the workstation through an IBM-PC in which the operator's commands were digitized and sent through an RS-232 serial port. The simulation gave visual feedback adequate for the operator in the loop, with the camera's field of vision projected on a large screen in multiple view windows. The view control can emulate either stationary or moving cameras. This simulator created an innovative engineering design environment by integrating computer software and hardware with the human operator's interactions. The backhoe simulation has been adopted by Caterpillar in building a virtual reality tool for backhoe design.

Analysis of virtual passive controllers for flexible space structures

NASA Technical Reports Server (NTRS)

Williams, Trevor W.

1992-01-01

The dynamics of flexible spacecraft are not usually well known before launch. This makes it important to develop controllers for such systems that can never be destabilized by perturbations in the structural model. Virtual passive controllers, or active vibration absorbers, possess this guaranteed stability property; they mimic a fictitious flexible structure attached to the true physical one. This report analyzes the properties of such controllers, and shows that disturbance absorption behavior can be naturally described in terms of a set of virtual zeros that they introduce into the closed-loop dynamics of the system. Based on this analysis, techniques are then derived for selecting the active vibration absorber internal parameters, i.e., the gain matrices of such controllers, so as to achieve specified control objectives. Finally, the effects on closed-loop stability of small delays in the feedback loop are investigated. Such delays would typically be introduced by a digital implementation of an active vibration absorber. It is shown that these delays only affect the real parts of the eigenvalues of a lightly-damped structure. Furthermore, it is only the high-frequency modes that are destabilized by delays; low-frequency modes are actually made more heavily damped. Eigenvalue perturbation methods are used to obtain accurate predictions of the critical delay at which a given system will become unstable; these methods also determine which mode is critical.

Integrated Application of Active Controls (IAAC) technology to an advanced subsonic transport project: Test act system validation

NASA Technical Reports Server (NTRS)

1985-01-01

The primary objective of the Test Active Control Technology (ACT) System laboratory tests was to verify and validate the system concept, hardware, and software. The initial lab tests were open loop hardware tests of the Test ACT System as designed and built. During the course of the testing, minor problems were uncovered and corrected. Major software tests were run. The initial software testing was also open loop. These tests examined pitch control laws, wing load alleviation, signal selection/fault detection (SSFD), and output management. The Test ACT System was modified to interface with the direct drive valve (DDV) modules. The initial testing identified problem areas with DDV nonlinearities, valve friction induced limit cycling, DDV control loop instability, and channel command mismatch. The other DDV issue investigated was the ability to detect and isolate failures. Some simple schemes for failure detection were tested but were not completely satisfactory. The Test ACT System architecture continues to appear promising for ACT/FBW applications in systems that must be immune to worst case generic digital faults, and be able to tolerate two sequential nongeneric faults with no reduction in performance. The challenge in such an implementation would be to keep the analog element sufficiently simple to achieve the necessary reliability.

Test Platform for Advanced Digital Control of Brushless DC Motors (MSFC Center Director's Discretionary Fund)

NASA Technical Reports Server (NTRS)

Gwaltney, D. A.

2002-01-01

A FY 2001 Center Director's Discretionary Fund task to develop a test platform for the development, implementation. and evaluation of adaptive and other advanced control techniques for brushless DC (BLDC) motor-driven mechanisms is described. Important applications for BLDC motor-driven mechanisms are the translation of specimens in microgravity experiments and electromechanical actuation of nozzle and fuel valves in propulsion systems. Motor-driven aerocontrol surfaces are also being utilized in developmental X vehicles. The experimental test platform employs a linear translation stage that is mounted vertically and driven by a BLDC motor. Control approaches are implemented on a digital signal processor-based controller for real-time, closed-loop control of the stage carriage position. The goal of the effort is to explore the application of advanced control approaches that can enhance the performance of a motor-driven actuator over the performance obtained using linear control approaches with fixed gains. Adaptive controllers utilizing an exact model knowledge controller and a self-tuning controller are implemented and the control system performance is illustrated through the presentation of experimental results.

Alpha Control - A new Concept in SPM Control

NASA Astrophysics Data System (ADS)

Spizig, P.; Sanchen, D.; Volswinkler, G.; Ibach, W.; Koenen, J.

2006-03-01

Controlling modern Scanning Probe Microscopes demands highly sophisticated electronics. While flexibility and powerful computing power is of great importance in facilitating the variety of measurement modes, extremely low noise is also a necessity. Accordingly, modern SPM Controller designs are based on digital electronics to overcome the drawbacks of analog designs. While todays SPM controllers are based on DSPs or Microprocessors and often still incorporate analog parts, we are now introducing a completely new approach: Using a Field Programmable Gate Array (FPGA) to implement the digital control tasks allows unrivalled data processing speed by computing all tasks in parallel within a single chip. Time consuming task switching between data acquisition, digital filtering, scanning and the computing of feedback signals can be completely avoided. Together with a star topology to avoid any bus limitations in accessing the variety of ADCs and DACs, this design guarantees for the first time an entirely deterministic timing capability in the nanosecond regime for all tasks. This becomes especially useful for any external experiments which must be synchronized with the scan or for high speed scans that require not only closed loop control of the scanner, but also dynamic correction of the scan movement. Delicate samples additionally benefit from extremely high sample rates, allowing highly resolved signals and low noise levels.

Digital multi-channel stabilization of four-mode phase-sensitive parametric multicasting.

PubMed

Liu, Lan; Tong, Zhi; Wiberg, Andreas O J; Kuo, Bill P P; Myslivets, Evgeny; Alic, Nikola; Radic, Stojan

2014-07-28

Stable four-mode phase-sensitive (4MPS) process was investigated as a means to enhance two-pump driven parametric multicasting conversion efficiency (CE) and signal to noise ratio (SNR). Instability of multi-beam, phase sensitive (PS) device that inherently behaves as an interferometer, with output subject to ambient induced fluctuations, was addressed theoretically and experimentally. A new stabilization technique that controls phases of three input waves of the 4MPS multicaster and maximizes CE was developed and described. Stabilization relies on digital phase-locked loop (DPLL) specifically was developed to control pump phases to guarantee stable 4MPS operation that is independent of environmental fluctuations. The technique also controls a single (signal) input phase to optimize the PS-induced improvement of the CE and SNR. The new, continuous-operation DPLL has allowed for fully stabilized PS parametric broadband multicasting, demonstrating CE improvement over 20 signal copies in excess of 10 dB.

Airstart performance of a digital electronic engine control system in an F-15 airplane

NASA Technical Reports Server (NTRS)

Licata, S. J.; Burcham, F. W., Jr.

1983-01-01

The airstart performance of the F100 engine equipped with a digital electronic engine control (DEEC) system was evaluated in an F-15 airplane. The DEEC system incorporates closed-loop airstart logic for improved capability. Spooldown and jet fuel starter-assisted airstarts were made over a range of airspeeds and altitudes. All jet fuel starter-assisted airstarts were successful, with airstart time varying from 35 to 60 sec. All spooldown airstarts at airspeeds of 200 knots and higher were successful; airstart times ranged from 45 sec at 250 knots to 135 sec at 200 knots. The effects of altitude on airstart success and time were small. The flight results agreed closely with previous altitude facility test results. The DEEC system provided successful airstarts at airspeeds at least 50 knots lower than the standard F100 engine control system.

Human Grasp Assist Device Soft Goods

NASA Technical Reports Server (NTRS)

Ihrke, Chris A. (Inventor); Davis, Donald R. (Inventor); Bergelin, Bryan (Inventor); Bridgwater, Lyndon B. J. (Inventor); Bibby, Heather (Inventor); Schroeder, Judy (Inventor); Linn, Douglas Martin (Inventor); Erkkila, Craig (Inventor)

2015-01-01

A grasp assist system includes a glove and a flexible sleeve. The glove includes a digit such as a finger or thumb, a force sensor configured to measure a grasping force applied to an object by an operator wearing the glove, and adjustable phalange rings positioned with respect to the digit. A saddle is positioned with respect to the finger. A flexible tendon is looped at one end around the saddle. A conduit contains the tendon. A conduit anchor secured within a palm of the glove receives the conduit. The sleeve has pockets containing an actuator assembly connected to another end of the tendon and a controller. The controller is in communication with the force sensor, and calculates a tensile force in response to the measured grasping force. The controller commands the tensile force from the actuator assembly to tension the tendon and thereby move the finger.

Flight test experience and controlled impact of a remotely piloted jet transport aircraft

NASA Technical Reports Server (NTRS)

Horton, Timothy W.; Kempel, Robert W.

1988-01-01

The Dryden Flight Research Center Facility of NASA Ames Research Center (Ames-Dryden) and the FAA conducted the controlled impact demonstration (CID) program using a large, four-engine, remotely piloted jet transport airplane. Closed-loop primary flight was controlled through the existing onboard PB-20D autopilot which had been modified for the CID program. Uplink commands were sent from a ground-based cockpit and digital computer in conjunction with an up-down telemetry link. These uplink commands were received aboard the airplane and transferred through uplink interface systems to the modified PB-20D autopilot. Both proportional and discrete commands were produced by the ground system. Prior to flight tests, extensive simulation was conducted during the development of ground-based digital control laws. The control laws included primary control, secondary control, and racetrack and final approach guidance. Extensive ground checks were performed on all remotely piloted systems; however, piloted flight tests were the primary method and validation of control law concepts developed from simulation. The design, development, and flight testing of control laws and systems required to accomplish the remotely piloted mission are discussed.

Water soluble contrast enema examination of the integrity of the rectal anastomosis prior to loop ileostomy reversal may be superfluous.

PubMed

Larsson, Anna; Lindmark, Gudrun; Syk, Ingvar; Buchwald, Pamela

2015-03-01

Defunctioning loop ileostomy in low anterior resection (LAR) is routinely used to reduce consequences of anastomotic leakage. The purpose of this study was to analyze which examination technique is optimal for evaluating the integrity of the anastomosis prior to loop ileostomy reversal. Retrospective analysis of 95 patients who had been subjected to LAR at Helsingborg Hospital and Skåne University Hospital, Sweden, was undertaken between January 2007 and June 2009. The examination techniques of the rectal anastomosis prior to reversal and the clinical outcome after reversal were studied. Radiologic anastomosis control using water soluble contrast enema, digital rectal examination (DRE), and rectoscopy were performed in 53 % (50/95), 98 % (93/95), and 69 % (66/95), respectively. In two patients, no control of the anastomosis was performed before reversal. Fifty-two percent (49/95) of the patients were examined using all techniques. Six patients demonstrated leakage detected before reversal of which two were only radiological leakages. These two patients underwent loop ileostomy reversal after delay without complications. They were the only ones where the three examination techniques did not prove coherence. Four patients had symptomatic leakage; these were detected with rectoscopy and DRE and verified with enema. Three patients developed anastomotic leakage after loop ileostomy reversal despite normal preoperative examinations. Two of these patients had rectovaginal fistulas (AVFs). This retrospective study indicates that contrast enema does not provide additional information if rectoscopy and DRE are normal. Despite negative examinations, three of nine leakages were diagnosed after loop ileostomy reversal. Especially, AVFs seem difficult to diagnose.

Application of the MNA design method to a nonlinear turbofan engine. [multivariable Nyquist array method

NASA Technical Reports Server (NTRS)

Leininger, G. G.

1981-01-01

Using nonlinear digital simulation as a representative model of the dynamic operation of the QCSEE turbofan engine, a feedback control system is designed by variable frequency design techniques. Transfer functions are generated for each of five power level settings covering the range of operation from approach power to full throttle (62.5% to 100% full power). These transfer functions are then used by an interactive control system design synthesis program to provide a closed loop feedback control using the multivariable Nyquist array and extensions to multivariable Bode diagrams and Nichols charts.

Eigenvalue sensitivity of sampled time systems operating in closed loop

NASA Astrophysics Data System (ADS)

Bernal, Dionisio

2018-05-01

The use of feedback to create closed-loop eigenstructures with high sensitivity has received some attention in the Structural Health Monitoring field. Although practical implementation is necessarily digital, and thus in sampled time, work thus far has center on the continuous time framework, both in design and in checking performance. It is shown in this paper that the performance in discrete time, at typical sampling rates, can differ notably from that anticipated in the continuous time formulation and that discrepancies can be particularly large on the real part of the eigenvalue sensitivities; a consequence being important error on the (linear estimate) of the level of damage at which closed-loop stability is lost. As one anticipates, explicit consideration of the sampling rate poses no special difficulties in the closed-loop eigenstructure design and the relevant expressions are developed in the paper, including a formula for the efficient evaluation of the derivative of the matrix exponential based on the theory of complex perturbations. The paper presents an easily reproduced numerical example showing the level of error that can result when the discrete time implementation of the controller is not considered.

Sex differences and bilateral asymmetry in dermatoglyphic pattern elements on the fingertips.

PubMed

Bener, A

1979-01-01

In the present paper, 539 Polish families and 999 individuals (515 males and 484 females) were analysed to determine whether asymmetry of dermatoglyphic patter elements on the fingertips of ulnar and radial loops in genetically controlled. And we enquire whether the body is bilaterally asymmetrical. We have found the asymmetry between right and left hand fingertips for ulnar and radial loops, for each digit and between the two sexes. The differences between the sexes is small. The bimanual difference in dermatoglyphic pattern elements between hands, right minus left, has been used as a measure of asymmetry. The mean and variance difference for males is not significantly different from the mean and variance for females. An investigation was also made of correlations between relatives for bimanual differences, right minus left. We may conclude from these results that the asymmetry of dermatoglphic pattern elements on fingertips of ulnar and radial loops has little hereditary component. Finally, the results of this work show that the dermatoglyphic pattern elements on fingertips of ulnar and radial loops on each side of the body are inherited.

A novel piezo vibration platform for probe dynamic performance calibration

NASA Astrophysics Data System (ADS)

Liang, Rong; Jusko, Otto; Lüdicke, Frank; Neugebauer, Michael

2001-09-01

A novel piezo vibration platform of compact size (120×120×120 mm3) for probe dynamic performance calibration has been developed. A piezo tube is employed to generate movement which is measured in real time by a miniature fibre interferometer and close-loop controlled by a fast digital signal processor, thus the calibration can be made traceable to the national length standard. 20 kHz control-loop frequency with 1.71 nm uncertainty has been achieved. The maximum calibration range is 20 µm with 0.3 nm resolution. The piezo vibration platform can generate up to 300 Hz sinusoidal signal and various other waveforms, such as square, triangle and saw tooth. It can also work in sweep mode to shift the frequency up to 100 Hz continuously, which is a very useful function when the amplitude-frequency response of the probe is to be investigated.

High accuracy digital aging monitor based on PLL-VCO circuit

NASA Astrophysics Data System (ADS)

Yuejun, Zhang; Zhidi, Jiang; Pengjun, Wang; Xuelong, Zhang

2015-01-01

As the manufacturing process is scaled down to the nanoscale, the aging phenomenon significantly affects the reliability and lifetime of integrated circuits. Consequently, the precise measurement of digital CMOS aging is a key aspect of nanoscale aging tolerant circuit design. This paper proposes a high accuracy digital aging monitor using phase-locked loop and voltage-controlled oscillator (PLL-VCO) circuit. The proposed monitor eliminates the circuit self-aging effect for the characteristic of PLL, whose frequency has no relationship with circuit aging phenomenon. The PLL-VCO monitor is implemented in TSMC low power 65 nm CMOS technology, and its area occupies 303.28 × 298.94 μm2. After accelerating aging tests, the experimental results show that PLL-VCO monitor improves accuracy about high temperature by 2.4% and high voltage by 18.7%.

Analyses of shuttle orbiter approach and landing conditions

NASA Technical Reports Server (NTRS)

Teper, G. L.; Dimarco, R. J.; Ashkenas, I. L.; Hoh, R. H.

1981-01-01

A study of one shuttle orbiter approach and landing conditions are summarized. Causes of observed PIO like flight deficiencies are identified and potential cures are examined. Closed loop pilot/vehicle analyses are described and path/attitude stability boundaries defined. The latter novel technique proved of great value in delineating and illustrating the basic causes of this multiloop pilot control problem. The analytical results are shown to be consistent with flight test and fixed base simulation. Conclusions are drawn relating to possible improvements of the shuttle orbiter/digital flight control system.

Pre-Hardware Optimization and Implementation Of Fast Optics Closed Control Loop Algorithms

NASA Technical Reports Server (NTRS)

Kizhner, Semion; Lyon, Richard G.; Herman, Jay R.; Abuhassan, Nader

2004-01-01

One of the main heritage tools used in scientific and engineering data spectrum analysis is the Fourier Integral Transform and its high performance digital equivalent - the Fast Fourier Transform (FFT). The FFT is particularly useful in two-dimensional (2-D) image processing (FFT2) within optical systems control. However, timing constraints of a fast optics closed control loop would require a supercomputer to run the software implementation of the FFT2 and its inverse, as well as other image processing representative algorithm, such as numerical image folding and fringe feature extraction. A laboratory supercomputer is not always available even for ground operations and is not feasible for a night project. However, the computationally intensive algorithms still warrant alternative implementation using reconfigurable computing technologies (RC) such as Digital Signal Processors (DSP) and Field Programmable Gate Arrays (FPGA), which provide low cost compact super-computing capabilities. We present a new RC hardware implementation and utilization architecture that significantly reduces the computational complexity of a few basic image-processing algorithm, such as FFT2, image folding and phase diversity for the NASA Solar Viewing Interferometer Prototype (SVIP) using a cluster of DSPs and FPGAs. The DSP cluster utilization architecture also assures avoidance of a single point of failure, while using commercially available hardware. This, combined with the control algorithms pre-hardware optimization, or the first time allows construction of image-based 800 Hertz (Hz) optics closed control loops on-board a spacecraft, based on the SVIP ground instrument. That spacecraft is the proposed Earth Atmosphere Solar Occultation Imager (EASI) to study greenhouse gases CO2, C2H, H2O, O3, O2, N2O from Lagrange-2 point in space. This paper provides an advanced insight into a new type of science capabilities for future space exploration missions based on on-board image processing for control and for robotics missions using vision sensors. It presents a top-level description of technologies required for the design and construction of SVIP and EASI and to advance the spatial-spectral imaging and large-scale space interferometry science and engineering.

Field-programmable gate array-controlled sweep velocity-locked laser pulse generator

NASA Astrophysics Data System (ADS)

Chen, Zhen; Hefferman, Gerald; Wei, Tao

2017-05-01

A field-programmable gate array (FPGA)-controlled sweep velocity-locked laser pulse generator (SV-LLPG) design based on an all-digital phase-locked loop (ADPLL) is proposed. A distributed feedback laser with modulated injection current was used as a swept-frequency laser source. An open-loop predistortion modulation waveform was calibrated using a feedback iteration method to initially improve frequency sweep linearity. An ADPLL control system was then implemented using an FPGA to lock the output of a Mach-Zehnder interferometer that was directly proportional to laser sweep velocity to an on-board system clock. Using this system, linearly chirped laser pulses with a sweep bandwidth of 111.16 GHz were demonstrated. Further testing evaluating the sensing utility of the system was conducted. In this test, the SV-LLPG served as the swept laser source of an optical frequency-domain reflectometry system used to interrogate a subterahertz range fiber structure (sub-THz-FS) array. A static strain test was then conducted and linear sensor results were observed.

GLOBECOM '88 - IEEE Global Telecommunications Conference and Exhibition, Hollywood, FL, Nov. 28-Dec. 1, 1988, Conference Record. Volumes 1, 2, & 3

NASA Astrophysics Data System (ADS)

Various papers on communications for the information age are presented. Among the general topics considered are: telematic services and terminals, satellite communications, telecommunications mangaement network, control of integrated broadband networks, advances in digital radio systems, the intelligent network, broadband networks and services deployment, future switch architectures, performance analysis of computer networks, advances in spread spectrum, optical high-speed LANs, and broadband switching and networks. Also addressed are: multiple access protocols, video coding techniques, modulation and coding, photonic switching, SONET terminals and applications, standards for video coding, digital switching, progress in MANs, mobile and portable radio, software design for improved maintainability, multipath propagation and advanced countermeasure, data communication, network control and management, fiber in the loop, network algorithm and protocols, and advances in computer communications.

Automated Coronal Loop Identification Using Digital Image Processing Techniques

NASA Technical Reports Server (NTRS)

Lee, Jong K.; Gary, G. Allen; Newman, Timothy S.

2003-01-01

The results of a master thesis project on a study of computer algorithms for automatic identification of optical-thin, 3-dimensional solar coronal loop centers from extreme ultraviolet and X-ray 2-dimensional images will be presented. These center splines are proxies of associated magnetic field lines. The project is pattern recognition problems in which there are no unique shapes or edges and in which photon and detector noise heavily influence the images. The study explores extraction techniques using: (1) linear feature recognition of local patterns (related to the inertia-tensor concept), (2) parametric space via the Hough transform, and (3) topological adaptive contours (snakes) that constrains curvature and continuity as possible candidates for digital loop detection schemes. We have developed synthesized images for the coronal loops to test the various loop identification algorithms. Since the topology of these solar features is dominated by the magnetic field structure, a first-order magnetic field approximation using multiple dipoles provides a priori information in the identification process. Results from both synthesized and solar images will be presented.

Electromechanical actuation for cryogenic valve control

NASA Technical Reports Server (NTRS)

Lister, M. J.; Reichmuth, D. M.

1993-01-01

The design and analysis of the electromechanical actuator (EMA) being developed for the NASA/Marshall Space Flight Center as part of the National Launch System (NLS) Propellant Control Effector Advanced Development Program (ADP) are addressed. The EMA design uses several proven technologies combined into a single modular package which includes single stage high ratio gear reduction, redundant electric motors mounted on a common drive shaft, redundant drive and control electronics, and digital technology for performing the closed loop position feedback, communication, and health monitoring functions. Results of tests aimed at evaluating both component characteristics and overall system performance demonstrated that the goal of low cost, reliable control in a cryogenic environment is feasible.

Flutter suppression digital control law design and testing for the AFW wind tunnel model

NASA Technical Reports Server (NTRS)

Mukhopadhyay, Vivek

1994-01-01

The design of a control law for simultaneously suppressing the symmetric and antisymmetric flutter modes of a sting mounted fixed-in-roll aeroelastic wind-tunnel model is described. The flutter suppression control law was designed using linear quadratic Gaussian theory, and it also involved control law order reduction, a gain root-locus study, and use of previous experimental results. A 23 percent increase in the open-loop flutter dynamic pressure was demonstrated during the wind-tunnel test. Rapid roll maneuvers at 11 percent above the symmetric flutter boundary were also performed when the model was in a free-to-roll configuration.

Flutter suppression digital control law design and testing for the AFW wind tunnel model

NASA Technical Reports Server (NTRS)

Mukhopadhyay, Vivek

1992-01-01

Design of a control law for simultaneously suppressing the symmetric and antisymmetric flutter modes of a sting mounted fixed-in-roll aeroelastic wind tunnel model is described. The flutter suppression control law was designed using linear quadratic Gaussian theory, and involved control law order reduction, a gain root-locus study and use of previous experimental results. A 23 percent increase in the open-loop flutter dynamic pressure was demonstrated during the wind tunnel test. Rapid roll maneuvers at 11 percent above the symmetric flutter boundary were also performed when the model was in a free-to-roll configuration.

Flutter suppression digital control law design and testing for the AFW wind-tunnel model

NASA Technical Reports Server (NTRS)

Mukhopadhyay, Vivek

1992-01-01

Design of a control law for simultaneously suppressing the symmetric and antisymmetric flutter modes of a string mounted fixed-in-roll aeroelastic wind tunnel model is described. The flutter suppression control law was designed using linear quadratic Gaussian theory and involved control law order reduction, a gain root-locus study, and the use of previous experimental results. A 23 percent increase in open-loop flutter dynamic pressure was demonstrated during the wind tunnel test. Rapid roll maneuvers at 11 percent above the symmetric flutter boundary were also performed when the model was in a free-to-roll configuration.

Comparison of simulator fidelity model predictions with in-simulator evaluation data

NASA Technical Reports Server (NTRS)

Parrish, R. V.; Mckissick, B. T.; Ashworth, B. R.

1983-01-01

A full factorial in simulator experiment of a single axis, multiloop, compensatory pitch tracking task is described. The experiment was conducted to provide data to validate extensions to an analytic, closed loop model of a real time digital simulation facility. The results of the experiment encompassing various simulation fidelity factors, such as visual delay, digital integration algorithms, computer iteration rates, control loading bandwidths and proprioceptive cues, and g-seat kinesthetic cues, are compared with predictions obtained from the analytic model incorporating an optimal control model of the human pilot. The in-simulator results demonstrate more sensitivity to the g-seat and to the control loader conditions than were predicted by the model. However, the model predictions are generally upheld, although the predicted magnitudes of the states and of the error terms are sometimes off considerably. Of particular concern is the large sensitivity difference for one control loader condition, as well as the model/in-simulator mismatch in the magnitude of the plant states when the other states match.

Preliminary design and implementation of the baseline digital baseband architecture for advanced deep space transponders

NASA Technical Reports Server (NTRS)

Nguyen, T. M.; Yeh, H.-G.

1993-01-01

The baseline design and implementation of the digital baseband architecture for advanced deep space transponders is investigated and identified. Trade studies on the selection of the number of bits for the analog-to-digital converter (ADC) and optimum sampling schemes are presented. In addition, the proposed optimum sampling scheme is analyzed in detail. Descriptions of possible implementations for the digital baseband (or digital front end) and digital phase-locked loop (DPLL) for carrier tracking are also described.

The development of a microprocessor-controlled linearly-actuated valve assembly

NASA Technical Reports Server (NTRS)

Wall, R. H.

1984-01-01

The development of a proportional fluid control valve assembly is presented. This electromechanical system is needed for space applications to replace the current proportional flow controllers. The flow is controlled by a microprocessor system that monitors the control parameters of upstream pressure and requested volumetric flow rate. The microprocessor achieves the proper valve stem displacement by means of a digital linear actuator. A linear displacement sensor is used to measure the valve stem position. This displacement is monitored by the microprocessor system as a feedback signal to close the control loop. With an upstream pressure between 15 and 47 psig, the developed system operates between 779 standard CU cm/sec (SCCS) and 1543 SCCS.

A low noise and ultra-narrow bandwidth frequency-locked loop based on the beat method.

PubMed

Gao, Wei; Sui, Jianping; Chen, Zhiyong; Yu, Fang; Sheng, Rongwu

2011-06-01

A novel frequency-locked loop (FLL) based on the beat method is proposed in this paper. Compared with other frequency feedback loops, this FLL is a digital loop with simple structure and very low noise. As shown in the experimental results, this FLL can be used to reduce close-in phase noise on atomic frequency standards, through which a composite frequency standard with ultra-low phase noise and low cost can be easily realized.

Digital second-order phase-locked loop

NASA Technical Reports Server (NTRS)

Holes, J. K.; Carl, C.; Tegnelia, C. R. (Inventor)

1973-01-01

A digital second-order phase-locked loop is disclosed in which a counter driven by a stable clock pulse source is used to generate a reference waveform of the same frequency as an incoming waveform, and to sample the incoming waveform at zero-crossover points. The samples are converted to digital form and accumulated over M cycles, reversing the sign of every second sample. After every M cycles, the accumulated value of samples is hard limited to a value SGN = + or - 1 and multiplied by a value delta sub 1 equal to a number of n sub 1 of fractions of a cycle. An error signal is used to advance or retard the counter according to the sign of the sum by an amount equal to the sum.

Stability and performance analysis of a jump linear control system subject to digital upsets

NASA Astrophysics Data System (ADS)

Wang, Rui; Sun, Hui; Ma, Zhen-Yang

2015-04-01

This paper focuses on the methodology analysis for the stability and the corresponding tracking performance of a closed-loop digital jump linear control system with a stochastic switching signal. The method is applied to a flight control system. A distributed recoverable platform is implemented on the flight control system and subject to independent digital upsets. The upset processes are used to stimulate electromagnetic environments. Specifically, the paper presents the scenarios that the upset process is directly injected into the distributed flight control system, which is modeled by independent Markov upset processes and independent and identically distributed (IID) processes. A theoretical performance analysis and simulation modelling are both presented in detail for a more complete independent digital upset injection. The specific examples are proposed to verify the methodology of tracking performance analysis. The general analyses for different configurations are also proposed. Comparisons among different configurations are conducted to demonstrate the availability and the characteristics of the design. Project supported by the Young Scientists Fund of the National Natural Science Foundation of China (Grant No. 61403395), the Natural Science Foundation of Tianjin, China (Grant No. 13JCYBJC39000), the Scientific Research Foundation for the Returned Overseas Chinese Scholars, State Education Ministry, China, the Tianjin Key Laboratory of Civil Aircraft Airworthiness and Maintenance in Civil Aviation of China (Grant No. 104003020106), and the Fund for Scholars of Civil Aviation University of China (Grant No. 2012QD21x).

Research on application of photoelectric rotary encoder in space optical remote sensor

NASA Astrophysics Data System (ADS)

Zheng, Jun; Qi, Shao-fan; Wang, Yuan-yuan; Zhang, Zhan-dong

2016-11-01

For space optical remote sensor, especially wide swath detecting sensor, the focusing control system for the focal plane should be well designed to obtain the best image quality. The crucial part of this system is the measuring instrument. For previous implements, the potentiometer, which is essentially a voltage divider, is usually introduced to conduct the position in feedback closed-loop control process system. However, the performances of both electro-mechanical and digital potentiometers is limited in accuracy, temperature coefficients, and scale range. To have a better performance of focal plane moving detection, this article presents a new measuring implement with photoelectric rotary encoder, which consists of the photoelectric conversion system and the signal process system. In this novel focusing control system, the photoelectric conversion system is fixed on main axis, which can transform the angle information into a certain analog signal. Through the signal process system, after analog-to-digital converting and data format processing of the certain analog signal, the focusing control system can receive the digital precision angle position which can be used to deduct the current moving position of the focal plane. For utilization of space optical remote sensor in aerospace areas, the reliability design of photoelectric rotary encoder system should be considered with highest priority. As mentioned above, this photoelectric digital precision angle measurement device is well designed for this real-time control and dynamic measurement system, because its characters of high resolution, high accuracy, long endurance, and easy to maintain.

The design and implementation of a broadband digital low-level RF control system for the cyclotron accelerators at iThemba LABS

NASA Astrophysics Data System (ADS)

Duckitt, W. D.; Conradie, J. L.; van Niekerk, M. J.; Abraham, J. K.; Niesler, T. R.

2018-07-01

iThemba LABS has successfully designed a new broadband digital low-level RF control system for cyclotrons, that operates over the wide frequency range of 2-100 MHz and can achieve peak-peak amplitude and phase stabilities of 0.01% and 0.01°, respectively. The presented system performs direct digital synthesis (DDS) to directly convert the digital RF signals to analog RF and local-oscillator (LO) signals with 16-bit amplitude accuracy, programmable in steps of 1 μHz and 0.0001°. Down-conversion of the RF pick-up signals to an optimal intermediate frequency (IF) of 1 MHz and sampling of the IF channels by 16-bit, single sample-latency 10 MHz ADCs was implemented to allow digital high-speed low-latency in-phase/quadrature (I/Q) demodulation of the IF channels within the FPGA. This in turn allows efficient real-time digital closed-loop control of the amplitude and phase of the RF drive-signal to be achieved. The systems have been successfully integrated at iThemba LABS into the K = 8 and K = 10 injector cyclotrons (SPC1, and SPC2), the K = 200 separated sector cyclotron (SSC), the SSC flat-topping system, the pulse-selector system and the AX , J, and K-line RF bunchers. The systems have led to a substantial improvement in the beam quality of the SSC at iThemba LABS with a reduction in beam losses by more than 90%. The design, implementation and performance is discussed.

Integrated Computer Controlled Glow Discharge Tube

NASA Astrophysics Data System (ADS)

Kaiser, Erik; Post-Zwicker, Andrew

2002-11-01

An "Interactive Plasma Display" was created for the Princeton Plasma Physics Laboratory to demonstrate the characteristics of plasma to various science education outreach programs. From high school students and teachers, to undergraduate students and visitors to the lab, the plasma device will be a key component in advancing the public's basic knowledge of plasma physics. The device is fully computer controlled using LabVIEW, a touchscreen Graphical User Interface [GUI], and a GPIB interface. Utilizing a feedback loop, the display is fully autonomous in controlling pressure, as well as in monitoring the safety aspects of the apparatus. With a digital convectron gauge continuously monitoring pressure, the computer interface analyzes the input signals, while making changes to a digital flow controller. This function works independently of the GUI, allowing the user to simply input and receive a desired pressure; quickly, easily, and intuitively. The discharge tube is a 36" x 4"id glass cylinder with 3" side port. A 3000 volt, 10mA power supply, is used to breakdown the plasma. A 300 turn solenoid was created to demonstrate the magnetic pinching of a plasma. All primary functions of the device are controlled through the GUI digital controllers. This configuration allows for operators to safely control the pressure (100mTorr-1Torr), magnetic field (0-90Gauss, 7amps, 10volts), and finally, the voltage applied across the electrodes (0-3000v, 10mA).

Sample-Clock Phase-Control Feedback

NASA Technical Reports Server (NTRS)

Quirk, Kevin J.; Gin, Jonathan W.; Nguyen, Danh H.; Nguyen, Huy

2012-01-01

To demodulate a communication signal, a receiver must recover and synchronize to the symbol timing of a received waveform. In a system that utilizes digital sampling, the fidelity of synchronization is limited by the time between the symbol boundary and closest sample time location. To reduce this error, one typically uses a sample clock in excess of the symbol rate in order to provide multiple samples per symbol, thereby lowering the error limit to a fraction of a symbol time. For systems with a large modulation bandwidth, the required sample clock rate is prohibitive due to current technological barriers and processing complexity. With precise control of the phase of the sample clock, one can sample the received signal at times arbitrarily close to the symbol boundary, thus obviating the need, from a synchronization perspective, for multiple samples per symbol. Sample-clock phase-control feedback was developed for use in the demodulation of an optical communication signal, where multi-GHz modulation bandwidths would require prohibitively large sample clock frequencies for rates in excess of the symbol rate. A custom mixedsignal (RF/digital) offset phase-locked loop circuit was developed to control the phase of the 6.4-GHz clock that samples the photon-counting detector output. The offset phase-locked loop is driven by a feedback mechanism that continuously corrects for variation in the symbol time due to motion between the transmitter and receiver as well as oscillator instability. This innovation will allow significant improvements in receiver throughput; for example, the throughput of a pulse-position modulation (PPM) with 16 slots can increase from 188 Mb/s to 1.5 Gb/s.

Verbal short-term memory in Down's syndrome: an articulatory loop deficit?

PubMed

Vicari, S; Marotta, L; Carlesimo, G A

2004-02-01

Verbal short-term memory, as measured by digit or word span, is generally impaired in individuals with Down's syndrome (DS) compared to mental age-matched controls. Moving from the working memory model, the present authors investigated the hypothesis that impairment in some of the articulatory loop sub-components is at the base of the deficient maintenance and recall of phonological representations in individuals with DS. Two experiments were carried out in a group of adolescents with DS and in typically developing children matched for mental age. In the first experiment, the authors explored the reliance of these subjects on the subvocal rehearsal mechanism during a word-span task and the effects produced by varying the frequency of occurrence of the words on the extension of the word span. In the second experiment, they investigated the functioning of the phonological store component of the articulatory loop in more detail. A reduced verbal span in DS was confirmed. Neither individuals with DS nor controls engaged in spontaneous subvocal rehearsal. Moreover, the data provide little support for defective functioning of the phonological store in DS. No evidence was found suggesting that a dysfunction of the articulatory loop and lexical-semantic competence significantly contributed to verbal span reduction in subjects with DS. Alternative explanations of defective verbal short-term memory in DS, such as a central executive system impairment, must be considered.

A nonlinear disturbance-decoupled elevation axis controller for the Multiple Mirror Telescope

NASA Astrophysics Data System (ADS)

Clark, Dusty; Trebisky, Tom; Powell, Keith

2008-07-01

The Multiple Mirror Telescope (MMT), upgraded in 2000 to a monolithic 6.5m primary mirror from its original array of six 1.8m primary mirrors, was commissioned with axis controllers designed early in the upgrade process without regard to structural resonances or the possibility of the need for digital filtering of the control axis signal path. Post-commissioning performance issues led us to investigate replacement of the original control system with a more modern digital controller with full control over the system filters and gain paths. This work, from system identification through controller design iteration by simulation, and pre-deployment hardware-in-the-loop testing, was performed using latest-generation tools with Matlab® and Simulink®. Using Simulink's Real Time Workshop toolbox to automatically generate C source code for the controller from the Simulink diagram and a custom target build script, we were able to deploy the new controller into our existing software infrastructure running Wind River's VxWorks™real-time operating system. This paper describes the process of the controller design, including system identification data collection, with discussion of implementation of non-linear control modes and disturbance decoupling, which became necessary to obtain acceptable wind buffeting rejection.

Digital adaptive optics line-scanning confocal imaging system.

PubMed

Liu, Changgeng; Kim, Myung K

2015-01-01

A digital adaptive optics line-scanning confocal imaging (DAOLCI) system is proposed by applying digital holographic adaptive optics to a digital form of line-scanning confocal imaging system. In DAOLCI, each line scan is recorded by a digital hologram, which allows access to the complex optical field from one slice of the sample through digital holography. This complex optical field contains both the information of one slice of the sample and the optical aberration of the system, thus allowing us to compensate for the effect of the optical aberration, which can be sensed by a complex guide star hologram. After numerical aberration compensation, the corrected optical fields of a sequence of line scans are stitched into the final corrected confocal image. In DAOLCI, a numerical slit is applied to realize the confocality at the sensor end. The width of this slit can be adjusted to control the image contrast and speckle noise for scattering samples. DAOLCI dispenses with the hardware pieces, such as Shack–Hartmann wavefront sensor and deformable mirror, and the closed-loop feedbacks adopted in the conventional adaptive optics confocal imaging system, thus reducing the optomechanical complexity and cost. Numerical simulations and proof-of-principle experiments are presented that demonstrate the feasibility of this idea.

Phase-locked tracking loops for LORAN-C

NASA Technical Reports Server (NTRS)

Burhans, R. W.

1978-01-01

Portable battery operated LORAN-C receivers were fabricated to evaluate simple envelope detector methods with hybrid analog to digital phase locked loop sensor processors. The receivers are used to evaluate LORAN-C in general aviation applications. Complete circuit details are given for the experimental sensor and readout system.

Real Time Metrology Using Heterodyne Interferometry

NASA Astrophysics Data System (ADS)

Evans, Joseph T..., Jr.

1983-11-01

The Air Force Weapons Laboratory (AFWL) located at Albuquerque, NM has developed a digital heterodyne interferometer capable of real-time, closed loop analysis and control of adaptive optics. The device uses independent phase modulation of two orthogonal polarizations of an argon ion laser to produce a temporally phase modulated interferogram of the test object in a Twyman-Green interferometer. Differential phase detection under the control of a Data General minicomputer helps reconstruct the phase front without noise effects from amplitude modulation in the optical train. The system consists of the interferometer optics, phase detection circuitry, and the minicomputer, allowing for complete software control of the process. The software has been unified into a powerful package that performs automatic data acquisition, OPD reconstruction, and Zernike analysis of the resulting wavefront. The minicomputer has the capability to control external devices so that closed loop analysis and control is possible. New software under development will provide a framework of data acquisition, display, and storage packages which can be integrated with analysis and control packages customized to the user's needs. Preliminary measurements with the system show that it is noise limited by laser beam phase quality and vibration of the optics. Active measures are necessary to reduce the impact of these noise sources.

A fully automated digitally controlled 30-inch telescope

NASA Technical Reports Server (NTRS)

Colgate, S. A.; Moore, E. P.; Carlson, R.

1975-01-01

A fully automated 30-inch (75-cm) telescope has been successfully designed and constructed from a military surplus Nike-Ajax radar mount. Novel features include: closed-loop operation between mountain telescope and campus computer 30 km apart via microwave link, a TV-type sensor which is photon shot-noise limited, a special lightweight primary mirror, and a stepping motor drive capable of slewing and settling one degree in one second or a radian in fifteen seconds.

Microcomputer data acquisition and control.

PubMed

East, T D

1986-01-01

In medicine and biology there are many tasks that involve routine well defined procedures. These tasks are ideal candidates for computerized data acquisition and control. As the performance of microcomputers rapidly increases and cost continues to go down the temptation to automate the laboratory becomes great. To the novice computer user the choices of hardware and software are overwhelming and sadly most of the computer sales persons are not at all familiar with real-time applications. If you want to bill your patients you have hundreds of packaged systems to choose from; however, if you want to do real-time data acquisition the choices are very limited and confusing. The purpose of this chapter is to provide the novice computer user with the basics needed to set up a real-time data acquisition system with the common microcomputers. This chapter will cover the following issues necessary to establish a real time data acquisition and control system: Analysis of the research problem: Definition of the problem; Description of data and sampling requirements; Cost/benefit analysis. Choice of Microcomputer hardware and software: Choice of microprocessor and bus structure; Choice of operating system; Choice of layered software. Digital Data Acquisition: Parallel Data Transmission; Serial Data Transmission; Hardware and software available. Analog Data Acquisition: Description of amplitude and frequency characteristics of the input signals; Sampling theorem; Specification of the analog to digital converter; Hardware and software available; Interface to the microcomputer. Microcomputer Control: Analog output; Digital output; Closed-Loop Control. Microcomputer data acquisition and control in the 21st Century--What is in the future? High speed digital medical equipment networks; Medical decision making and artificial intelligence.

Digital PCM bit synchronizer and detector

NASA Astrophysics Data System (ADS)

Moghazy, A. E.; Maral, G.; Blanchard, A.

1980-08-01

A theoretical analysis of a digital self-bit synchronizer and detector is presented and supported by the implementation of an experimental model that utilizes standard TTL logic circuits. This synchronizer is based on the generation of spectral line components by nonlinear filtering of the received bit stream, and extracting the line by a digital phase-locked loop (DPLL). The extracted reference signal instructs a digital matched filter (DMF) data detector. This realization features a short acquisition time and an all-digital structure.

A real-time sub-μrad laser beam tracking system

NASA Astrophysics Data System (ADS)

Buske, Ivo; Schragner, Ralph; Riede, Wolfgang

2007-10-01

We present a rugged and reliable real-time laser beam tracking system operating with a high speed, high resolution piezo-electric tip/tilt mirror. Characteristics of the piezo mirror and position sensor are investigated. An industrial programmable automation controller is used to develop a real-time digital PID controller. The controller provides a one million field programmable gate array (FPGA) to realize a high closed-loop frequency of 50 kHz. Beam tracking with a root-mean-squared accuracy better than 0.15 μrad has been laboratory confirmed. The system is intended as an add-on module for established mechanical mrad tracking systems.

Characterization of a symbol rate timing recovery technique for a 2B1Q digital receiver

NASA Astrophysics Data System (ADS)

Aboulnasr, T.; Hage, M.; Sayar, B.; Aly, S.

1994-02-01

This paper presents a study of several implementations of the Mueller and Muller symbol rate timing recovery algorithm for ISDN transmission over digital subscriber loops (DSL). Implementations of this algorithm using various estimates of a specified timing function are investigated. It will be shown that despite the fact that all of the estimates considered are derived based on one set of conditions, their performance varies widely in a real system. The intrinsic properties of these estimates are first analyzed, then their performance on real subscriber loops is studied through extensive simulations of a practical digital receiver. The effect of various system parameters such as channel distortion and additive noise are included. Possible sources of convergence problems are also identified and corrective action proposed.

Data-derived symbol synchronization of MASK and QASK signals. [for multilevel digital communication systems

NASA Technical Reports Server (NTRS)

Simon, M. K.

1974-01-01

Multilevel amplitude-shift-keying (MASK) and quadrature amplitude-shift-keying (QASK) as signaling techniques for multilevel digital communications systems, and the problem of providing symbol synchronization in the receivers of such systems are discussed. A technique is presented for extracting symbol sync from an MASK or QASK signal. The scheme is a generalization of the data transition tracking loop used in PSK systems. The performance of the loop was analyzed in terms of its mean-squared jitter and its effects on the data detection process in MASK and QASK systems.

Free-running waveform characterization using a delay-time tunable laser based delay-line-free electro-optic sampling oscilloscope

NASA Astrophysics Data System (ADS)

Lin, Gong-Ru

2002-12-01

We develop a delay-line-free and frequency traceable electro-optic sampling oscilloscope by use of a digital phase-locked loop phase shifter (PLL-PS) controlled delay-time-tunable gain-switched laser diode (GSLD). The home-made voltage-controllable PLL-PS exhibits a linear transfer function with ultra-wide phase shifting range of ±350° and tuning error of <±5%, which benefits the advantages of frequency tracking to free-running signals with suppressed timing-jitter. The maximum delay-time of PLL-PS controlled GSLD is up to 1.95 periods by changing the controlling voltage ( VREF) from -3.5 to 3.5 V, which corresponds to 3.9 ns at repetition frequency of 500 MHz. The tuning responsivity and resolution are about 0.56 ns/V and 0.15˜0.2 ps, respectively. The maximum delay-time switching bandwidth of 100 Hz is determined under the control of a saw-tooth modulated VREF function. The waveform sampling of microwave PECL signals generated from a free-running digital frequency divider is performed with acceptable measuring deviation.

A low jitter PLL clock used for phase change memory

NASA Astrophysics Data System (ADS)

Xiao, Hong; Houpeng, Chen; Zhitang, Song; Daolin, Cai; Xi, Li

2013-02-01

A fully integrated low-jitter, precise frequency CMOS phase-locked loop (PLL) clock for the phase change memory (PCM) drive circuit is presented. The design consists of a dynamic dual-reset phase frequency detector (PFD) with high frequency acquisition, a novel low jitter charge pump, a CMOS ring oscillator based voltage-controlled oscillator (VCO), a 2nd order passive loop filter, and a digital frequency divider. The design is fabricated in 0.35 μm CMOS technology and consumes 20 mW from a supply voltage of 5 V. In terms of the PCM's program operation requirement, the output frequency range is from 1 to 140 MHz. For the 140 MHz output frequency, the circuit features a cycle-to-cycle jitter of 28 ps RMS and 250 ps peak-to-peak.

Qualitative Analysis of Primary Fingerprint Pattern in Different Blood Group and Gender in Nepalese

PubMed Central

Maharjan, Niroj; Adhikari, Nischita; Shrestha, Pragya

2018-01-01

Dermatoglyphics, the study of epidermal ridges on palm, sole, and digits, is considered as most effective and reliable evidence of identification. The fingerprints were studied in 300 Nepalese of known blood groups of different ages and classified into primary patterns and then analyzed statistically. In both sexes, incidence of loops was highest in ABO blood group and Rh +ve blood types, followed by whorls and arches, while the incidence of whorls was highest followed by loops and arches in Rh −ve blood types. Loops were higher in all blood groups except “A –ve” and “B –ve” where whorls were predominant. The fingerprint pattern in Rh blood types of blood group “A” was statistically significant while in others it was insignificant. In middle and little finger, loops were higher whereas in ring finger whorls were higher in all blood groups. Whorls were higher in thumb and index finger except in blood group “O” where loops were predominant. This study concludes that distribution of primary pattern of fingerprint is not related to gender and blood group but is related to individual digits. PMID:29593909

Computer program CORDET. [computerized simulation of digital phase-lock loop for Omega navigation receiver

NASA Technical Reports Server (NTRS)

Palkovic, R. A.

1974-01-01

A FORTRAN 4 computer program provides convenient simulation of an all-digital phase-lock loop (DPLL). The DPLL forms the heart of the Omega navigation receiver prototype. Through the DPLL, the phase of the 10.2 KHz Omega signal is estimated when the true signal phase is contaminated with noise. This investigation has provided a convenient means of evaluating loop performance in a variety of noise environments, and has proved to be a useful tool for evaluating design changes. The goals of the simulation are to: (1) analyze the circuit on a bit-by-bit level in order to evaluate the overall design; (2) see easily the effects of proposed design changes prior to actual breadboarding; and (3) determine the optimum integration time for the DPLL in an environment typical of general aviation conditions.

Hybrid Analog/Digital Receiver

NASA Technical Reports Server (NTRS)

Brown, D. H.; Hurd, W. J.

1989-01-01

Advanced hybrid analog/digital receiver processes intermediate-frequency (IF) signals carrying digital data in form of phase modulation. Uses IF sampling and digital phase-locked loops to track carrier and subcarrier signals and to synchronize data symbols. Consists of three modules: IF assembly, signal-processing assembly, and test-signal assembly. Intended for use in Deep Space Network, but presumably basic design modified for such terrestrial uses as communications or laboratory instrumentation where signals weak and/or noise strong.

Hierarchical CAD Tools for Radiation Hardened Mixed Signal Electronic Circuits

DTIC Science & Technology

2005-01-28

11 Figure 3: Schematic of Analog and Digital Components 12 Figure 4: Dose Rate Syntax 14 Figure 5: Single Event Effects (SEE) Syntax 15 Figure 6...Harmony-AMS simulation of a Digital Phase Locked Loop 19 Figure 10: SEE results from DPLL Simulation 20 Figure 11: Published results used for validation...analog and digital circuitry. Combining the analog and digital elements onto a single chip has several advantages, but also creates unique challenges

A long time low drift integrator with temperature control

NASA Astrophysics Data System (ADS)

Zhang, Donglai; Yan, Xiaolan; Zhang, Enchao; Pan, Shimin

2016-10-01

The output of an operational amplifier always contains signals that could not have been predicted, even with knowledge of the input and an accurately determined closed-loop transfer function. These signals lead to integrator zero-drift over time. A new type of integrator system with a long-term low-drift characteristic has therefore been designed. The integrator system is composed of a temperature control module and an integrator module. The aluminum printed circuit board of the integrator is glued to a thermoelectric cooler to maintain the electronic components at a stable temperature. The integration drift is automatically compensated using an analog-to-digital converter/proportional integration/digital-to-analog converter control circuit. Performance testing in a standard magnet shows that the proposed integrator, which has an integration time constant of 10 ms, has a low integration drift (<5 mV) over 1000 s after repeated measurements. The integrator can be used for magnetic flux measurements in most tokamaks and in the wire rope nondestructive test.

Digital computer program for generating dynamic turbofan engine models (DIGTEM)

NASA Technical Reports Server (NTRS)

Daniele, C. J.; Krosel, S. M.; Szuch, J. R.; Westerkamp, E. J.

1983-01-01

This report describes DIGTEM, a digital computer program that simulates two spool, two-stream turbofan engines. The turbofan engine model in DIGTEM contains steady-state performance maps for all of the components and has control volumes where continuity and energy balances are maintained. Rotor dynamics and duct momentum dynamics are also included. Altogether there are 16 state variables and state equations. DIGTEM features a backward-differnce integration scheme for integrating stiff systems. It trims the model equations to match a prescribed design point by calculating correction coefficients that balance out the dynamic equations. It uses the same coefficients at off-design points and iterates to a balanced engine condition. Transients can also be run. They are generated by defining controls as a function of time (open-loop control) in a user-written subroutine (TMRSP). DIGTEM has run on the IBM 370/3033 computer using implicit integration with time steps ranging from 1.0 msec to 1.0 sec. DIGTEM is generalized in the aerothermodynamic treatment of components.

A long time low drift integrator with temperature control.

PubMed

Zhang, Donglai; Yan, Xiaolan; Zhang, Enchao; Pan, Shimin

2016-10-01

The output of an operational amplifier always contains signals that could not have been predicted, even with knowledge of the input and an accurately determined closed-loop transfer function. These signals lead to integrator zero-drift over time. A new type of integrator system with a long-term low-drift characteristic has therefore been designed. The integrator system is composed of a temperature control module and an integrator module. The aluminum printed circuit board of the integrator is glued to a thermoelectric cooler to maintain the electronic components at a stable temperature. The integration drift is automatically compensated using an analog-to-digital converter/proportional integration/digital-to-analog converter control circuit. Performance testing in a standard magnet shows that the proposed integrator, which has an integration time constant of 10 ms, has a low integration drift (<5 mV) over 1000 s after repeated measurements. The integrator can be used for magnetic flux measurements in most tokamaks and in the wire rope nondestructive test.

Analyses of Shuttle Orbiter approach and landing

NASA Technical Reports Server (NTRS)

Ashkenas, I. L.; Hoh, R. H.; Teper, G. L.

1982-01-01

A study of the Shuttle Orbiter approach and landing conditions is summarized. The causes of observed PIO-like flight deficiencies are listed, and possible corrective measures are examined. Closed-loop pilot/vehicle analyses are described, and a description is given of path-attitude stability boundaries. The latter novel approach is found to be of great value in delineating and illustrating the basic causes of this multiloop pilot control problem. It is shown that the analytical results are consistent with flight test and fixed-base simulation. Conclusions are drawn concerning possible improvements in the Shuttle Orbiter/Digital Flight Control System.

An experimental adaptive array to suppress weak interfering signals

NASA Technical Reports Server (NTRS)

Walton, Eric K.; Gupta, Inder J.; Ksienski, Aharon A.; Ward, James

1988-01-01

An experimental adaptive antenna system to suppress weak interfering signals is described. It is a sidelobe canceller with two auxiliary elements. Modified feedback loops are used to control the array weights. The received signals are simulated in hardware for parameter control. Digital processing is used for algorithm implementation and performance evaluation. The experimental results are presented. They show that interfering signals as much as 10 dB below the thermal noise level in the main channel are suppressed by 20-30 dB. Such a system has potential application in suppressing the interference encountered in direct broadcast satellite communication systems.

Real-time failure control (SAFD)

NASA Technical Reports Server (NTRS)

Panossian, Hagop V.; Kemp, Victoria R.; Eckerling, Sherry J.

1990-01-01

The Real Time Failure Control program involves development of a failure detection algorithm, referred as System for Failure and Anomaly Detection (SAFD), for the Space Shuttle Main Engine (SSME). This failure detection approach is signal-based and it entails monitoring SSME measurement signals based on predetermined and computed mean values and standard deviations. Twenty four engine measurements are included in the algorithm and provisions are made to add more parameters if needed. Six major sections of research are presented: (1) SAFD algorithm development; (2) SAFD simulations; (3) Digital Transient Model failure simulation; (4) closed-loop simulation; (5) SAFD current limitations; and (6) enhancements planned for.

Analysis of an all-digital maximum likelihood carrier phase and clock timing synchronizer for eight phase-shift keying modulation

NASA Astrophysics Data System (ADS)

Degaudenzi, Riccardo; Vanghi, Vieri

1994-02-01

In all-digital Trellis-Coded 8PSK (TC-8PSK) demodulator well suited for VLSI implementation, including maximum likelihood estimation decision-directed (MLE-DD) carrier phase and clock timing recovery, is introduced and analyzed. By simply removing the trellis decoder the demodulator can efficiently cope with uncoded 8PSK signals. The proposed MLE-DD synchronization algorithm requires one sample for the phase and two samples per symbol for the timing loop. The joint phase and timing discriminator characteristics are analytically derived and numerical results checked by means of computer simulations. An approximated expression for steady-state carrier phase and clock timing mean square error has been derived and successfully checked with simulation findings. Synchronizer deviation from the Cramer Rao bound is also discussed. Mean acquisition time for the digital synchronizer has also been computed and checked, using the Monte Carlo simulation technique. Finally, TC-8PSK digital demodulator performance in terms of bit error rate and mean time to lose lock, including digital interpolators and synchronization loops, is presented.

Double closed-loop resonant micro optic gyro using hybrid digital phase modulation.

PubMed

Ma, Huilian; Zhang, Jianjie; Wang, Linglan; Jin, Zhonghe

2015-06-15

It is well-known that the closed-loop operation in optical gyros offers wider dynamic range and better linearity. By adding a stair-like digital serrodyne wave to a phase modulator can be used as a frequency shifter. The width of one stair in this stair-like digital serrodyne wave should be set equal to the optical transmission time in the resonator, which is relaxed in the hybrid digital phase modulation (HDPM) scheme. The physical mechanism for this relaxation is firstly indicated in this paper. Detailed theoretical and experimental investigations are presented for the HDPM. Simulation and experimental results show that the width of one stair is not restricted by the optical transmission time, however, it should be optimized according to the rise time of the output of the digital-to-analogue converter. Based on the optimum parameters of the HDPM, a bias stability of 0.05°/s for the integration time of 400 seconds in 1 h has been carried out in an RMOG with a waveguide ring resonator with a length of 7.9 cm and a diameter of 2.5 cm.

Comparative study of flare control laws. [optimal control of b-737 aircraft approach and landing

NASA Technical Reports Server (NTRS)

Nadkarni, A. A.; Breedlove, W. J., Jr.

1979-01-01

A digital 3-D automatic control law was developed to achieve an optimal transition of a B-737 aircraft between various initial glid slope conditions and the desired final touchdown condition. A discrete, time-invariant, optimal, closed-loop control law presented for a linear regulator problem, was extended to include a system being acted upon by a constant disturbance. Two forms of control laws were derived to solve this problem. One method utilized the feedback of integral states defined appropriately and augmented with the original system equations. The second method formulated the problem as a control variable constraint, and the control variables were augmented with the original system. The control variable constraint control law yielded a better performance compared to feedback control law for the integral states chosen.

A Digital Microfluidics Platform for Loop-Mediated Isothermal Amplification Detection

PubMed Central

Veigas, Bruno; Águas, Hugo; Fortunato, Elvira; Martins, Rodrigo; Baptista, Pedro Viana; Igreja, Rui

2017-01-01

Digital microfluidics (DMF) arises as the next step in the fast-evolving field of operation platforms for molecular diagnostics. Moreover, isothermal schemes, such as loop-mediated isothermal amplification (LAMP), allow for further simplification of amplification protocols. Integrating DMF with LAMP will be at the core of a new generation of detection devices for effective molecular diagnostics at point-of-care (POC), providing simple, fast, and automated nucleic acid amplification with exceptional integration capabilities. Here, we demonstrate for the first time the role of coupling DMF and LAMP, in a dedicated device that allows straightforward mixing of LAMP reagents and target DNA, as well as optimum temperature control (reaction droplets undergo a temperature variation of just 0.3 °C, for 65 °C at the bottom plate). This device is produced using low-temperature and low-cost production processes, adaptable to disposable and flexible substrates. DMF-LAMP is performed with enhanced sensitivity without compromising reaction efficacy or losing reliability and efficiency, by LAMP-amplifying 0.5 ng/µL of target DNA in just 45 min. Moreover, on-chip LAMP was performed in 1.5 µL, a considerably lower volume than standard bench-top reactions. PMID:29144379

Lack of correlation between reaction speed and analytical sensitivity in isothermal amplification reveals the value of digital methods for optimization: validation using digital real-time RT-LAMP

PubMed Central

Khorosheva, Eugenia M.; Karymov, Mikhail A.; Selck, David A.; Ismagilov, Rustem F.

2016-01-01

In this paper, we asked if it is possible to identify the best primers and reaction conditions based on improvements in reaction speed when optimizing isothermal reactions. We used digital single-molecule, real-time analyses of both speed and efficiency of isothermal amplification reactions, which revealed that improvements in the speed of isothermal amplification reactions did not always correlate with improvements in digital efficiency (the fraction of molecules that amplify) or with analytical sensitivity. However, we observed that the speeds of amplification for single-molecule (in a digital device) and multi-molecule (e.g. in a PCR well plate) formats always correlated for the same conditions. Also, digital efficiency correlated with the analytical sensitivity of the same reaction performed in a multi-molecule format. Our finding was supported experimentally with examples of primer design, the use or exclusion of loop primers in different combinations, and the use of different enzyme mixtures in one-step reverse-transcription loop-mediated amplification (RT-LAMP). Our results show that measuring the digital efficiency of amplification of single-template molecules allows quick, reliable comparisons of the analytical sensitivity of reactions under any two tested conditions, independent of the speeds of the isothermal amplification reactions. PMID:26358811

Demodulation of messages received with low signal to noise ratio

NASA Astrophysics Data System (ADS)

Marguinaud, A.; Quignon, T.; Romann, B.

The implementation of this all-digital demodulator is derived from maximum likelihood considerations applied to an analytical representation of the received signal. Traditional adapted filters and phase lock loops are replaced by minimum variance estimators and hypothesis tests. These statistical tests become very simple when working on phase signal. These methods, combined with rigorous control data representation allow significant computation savings as compared to conventional realizations. Nominal operation has been verified down to energetic signal over noise of -3 dB upon a QPSK demodulator.

Multi-Rate Digital Control Systems with Simulation Applications. Volume I. Technical Report

DTIC Science & Technology

1980-09-01

108 45. A Pseudo Differentiation Configuration ........................ 110 46. Bode Plot, Pseudo Differentiation ...symbolically in Fig. 7a and for 11 x 2 in Fig. 7b. (* notation on x2is used here to indicate an "unconven- tional" sampling operation.) 115 TXi ,A! T...the general multi-rate/multiple-order open-loop system of Fig. 21 have a sine wave input. In Fig 2L, = (GIRj) (114) CT/N = [GGRt]T/N ( 115 ) where a, B

Effects of Transient Power Extraction on an Integrated Hardware-in-the-Loop Aircraft/Propulsion/Power System

DTIC Science & Technology

2008-11-01

Simulations of an engine and its Full Authority Digital Engine Control ( FADEC ), along with a 6 degree-of-freedom (6DoF) airframe dynamics model and...as needed. In its current configuration, the generic turbine engine model’s FADEC is included in the same simulation and runs primarily on 2 a...back to the engine. As mentioned previously, the FADEC and engine are combined into one simulation and are collectively referred to as “the engine

Advancements in silicon web technology

NASA Technical Reports Server (NTRS)

Hopkins, R. H.; Easoz, J.; Mchugh, J. P.; Piotrowski, P.; Hundal, R.

1987-01-01

Low defect density silicon web crystals up to 7 cm wide are produced from systems whose thermal environments are designed for low stress conditions using computer techniques. During growth, the average silicon melt temperature, the lateral melt temperature distribution, and the melt level are each controlled by digital closed loop systems to maintain thermal steady state and to minimize the labor content of the process. Web solar cell efficiencies of 17.2 pct AM1 have been obtained in the laboratory while 15 pct efficiencies are common in pilot production.

Performance verification and system parameter identification of spacecraft tape recorder control servo

NASA Technical Reports Server (NTRS)

Mukhopadhyay, A. K.

1979-01-01

Design adequacy of the lead-lag compensator of the frequency loop, accuracy checking of the analytical expression for the electrical motor transfer function, and performance evaluation of the speed control servo of the digital tape recorder used on-board the 1976 Viking Mars Orbiters and Voyager 1977 Jupiter-Saturn flyby spacecraft are analyzed. The transfer functions of the most important parts of a simplified frequency loop used for test simulation are described and ten simulation cases are reported. The first four of these cases illustrate the method of selecting the most suitable transfer function for the hysteresis synchronous motor, while the rest verify and determine the servo performance parameters and alternative servo compensation schemes. It is concluded that the linear methods provide a starting point for the final verification/refinement of servo design by nonlinear time response simulation and that the variation of the parameters of the static/dynamic Coulomb friction is as expected in a long-life space mission environment.

Transfer function verification and block diagram simplification of a very high-order distributed pole closed-loop servo by means of non-linear time-response simulation

NASA Technical Reports Server (NTRS)

Mukhopadhyay, A. K.

1975-01-01

Linear frequency domain methods are inadequate in analyzing the 1975 Viking Orbiter (VO75) digital tape recorder servo due to dominant nonlinear effects such as servo signal limiting, unidirectional servo control, and static/dynamic Coulomb friction. The frequency loop (speed control) servo of the VO75 tape recorder is used to illustrate the analytical tools and methodology of system redundancy elimination and high order transfer function verification. The paper compares time-domain performance parameters derived from a series of nonlinear time responses with the available experimental data in order to select the best possible analytical transfer function representation of the tape transport (mechanical segment of the tape recorder) from several possible candidates. The study also shows how an analytical time-response simulation taking into account most system nonlinearities can pinpoint system redundancy and overdesign stemming from a strictly empirical design approach. System order reduction is achieved through truncation of individual transfer functions and elimination of redundant blocks.

A bunch to bucket phase detector for the RHIC LLRF upgrade platform

DOE Office of Scientific and Technical Information (OSTI.GOV)

Smith, K.S.; Harvey, M.; Hayes, T.

2011-03-28

As part of the overall development effort for the RHIC LLRF Upgrade Platform [1,2,3], a generic four channel 16 bit Analog-to-Digital Converter (ADC) daughter module was developed to provide high speed, wide dynamic range digitizing and processing of signals from DC to several hundred megahertz. The first operational use of this card was to implement the bunch to bucket phase detector for the RHIC LLRF beam control feedback loops. This paper will describe the design and performance features of this daughter module as a bunch to bucket phase detector, and also provide an overview of its place within the overallmore » LLRF platform architecture as a high performance digitizer and signal processing module suitable to a variety of applications. In modern digital control and signal processing systems, ADCs provide the interface between the analog and digital signal domains. Once digitized, signals are then typically processed using algorithms implemented in field programmable gate array (FPGA) logic, general purpose processors (GPPs), digital signal processors (DSPs) or a combination of these. For the recently developed and commissioned RHIC LLRF Upgrade Platform, we've developed a four channel ADC daughter module based on the Linear Technology LTC2209 16 bit, 160 MSPS ADC and the Xilinx V5FX70T FPGA. The module is designed to be relatively generic in application, and with minimal analog filtering on board, is capable of processing signals from DC to 500 MHz or more. The module's first application was to implement the bunch to bucket phase detector (BTB-PD) for the RHIC LLRF system. The same module also provides DC digitizing of analog processed BPM signals used by the LLRF system for radial feedback.« less

Extensions to PIFCGT: Multirate output feedback and optimal disturbance suppression

NASA Technical Reports Server (NTRS)

Broussard, J. R.

1986-01-01

New control synthesis procedures for digital flight control systems were developed. The theoretical developments are the solution to the problem of optimal disturbance suppression in the presence of windshear. Control synthesis is accomplished using a linear quadratic cost function, the command generator tracker for trajectory following and the proportional-integral-filter control structure for practical implementation. Extensions are made to the optimal output feedback algorithm for computing feedback gains so that the multirate and optimal disturbance control designs are computed and compared for the advanced transport operating system (ATOPS). The performance of the designs is demonstrated by closed-loop poles, frequency domain multiinput sigma and eigenvalue plots and detailed nonlinear 6-DOF aircraft simulations in the terminal area in the presence of windshear.

[Assessing the benefits of digital health solutions in the societal reimbursement context].

PubMed

Albrecht, Urs-Vito; Kuhn, Bertolt; Land, Jörg; Amelung, Volker E; von Jan, Ute

2018-03-01

For a number of reasons, achieving reimbursability for digital health products has so far proven difficult. Demonstrating the benefits of the technology is the main hurdle in this context. The generally accepted evaluation processes, especially parallel group comparisons in randomized controlled trials (RCTs) for (clinical) benefit assessment, are primarily intended to deal with questions of (added) medical benefit. In contrast to drugs or classical medical devices, users of digital health solutions often profit from gaining autonomy, increased awareness and mindfulness, better transparency in the provision of care, and improved comfort, although there are also digital solutions with an interventional character targeting clinical outcomes (e. g. for indications such as anorexia, depression). Commonly accepted methods for evaluating (clinical) benefits primarily rely on medical outcomes, such as morbidity and mortality, but do not adequately consider additional benefits unique to digital health. The challenge is therefore to develop evaluation designs that respect the particularities of digital health without reducing the validity of the evaluations (especially with respect to safety). There is an increasing need for concepts that include both continuous feedback loops for adapting and improving an application while at the same time generate sufficient evidence for complex benefit assessments. This approach may help improve risk benefit ratio assessments of digital health when it comes to implementing digital innovations in healthcare.

Unbundling in Current Broadband and Next-Generation Ultra-Broadband Access Networks

NASA Astrophysics Data System (ADS)

Gaudino, Roberto; Giuliano, Romeo; Mazzenga, Franco; Valcarenghi, Luca; Vatalaro, Francesco

2014-05-01

This article overviews the methods that are currently under investigation for implementing multi-operator open-access/shared-access techniques in next-generation access ultra-broadband architectures, starting from the traditional "unbundling-of-the-local-loop" techniques implemented in legacy twisted-pair digital subscriber line access networks. A straightforward replication of these copper-based unbundling-of-the-local-loop techniques is usually not feasible on next-generation access networks, including fiber-to-the-home point-to-multipoint passive optical networks. To investigate this issue, the article first gives a concise description of traditional copper-based unbundling-of-the-local-loop solutions, then focalizes on both next-generation access hybrid fiber-copper digital subscriber line fiber-to-the-cabinet scenarios and on fiber to the home by accounting for the mix of regulatory and technological reasons driving the next-generation access migration path, focusing mostly on the European situation.

An approach to the analysis of performance of quasi-optimum digital phase-locked loops.

NASA Technical Reports Server (NTRS)

Polk, D. R.; Gupta, S. C.

1973-01-01

An approach to the analysis of performance of quasi-optimum digital phase-locked loops (DPLL's) is presented. An expression for the characteristic function of the prior error in the state estimate is derived, and from this expression an infinite dimensional equation for the prior error variance is obtained. The prior error-variance equation is a function of the communication system model and the DPLL gain and is independent of the method used to derive the DPLL gain. Two approximations are discussed for reducing the prior error-variance equation to finite dimension. The effectiveness of one approximation in analyzing DPLL performance is studied.

A New Sliding-Loop Technique in Renorrhaphy for Partial Nephrectomy: A Feasibility Study in a Porcine Model.

PubMed

Lee, Jung Keun; Oh, Jong Jin; Lee, Sangchul; Lee, Seung Bae; Byun, Seok-Soo; Lee, Sang Eun; Jeong, Chang Wook

2016-04-01

We developed a sliding-loop technique that narrowed both sides of the parenchyma in a porcine model and compared it with the conventional sliding-clip technique. Three pigs (30-40 kg) were reused following another experiment conducted by the same researchers. Bilateral kidneys were harvested within 30 minutes after euthanasia. Two partial nephrectomies per kidney were performed on opposite surfaces. All kidney defects were of the same size (diameter of 2.5-3 cm with a depth of 1.0-1.5 cm). The sliding-clip technique and sliding-loop technique were performed separately. In the sliding-loop technique, we created a 1-cm loop at the end of a Vicryl and placed a tetrafluoroethylene polymer pledget in front of the knots passing through the needle. The needle then crossed the loop after passing through the renal parenchyma. A Weck clip was placed and slid on one side to tighten the suture. Tightening was controlled with an equivalent force using a digital push-pull gauge. Three stitches were placed at each renorrhaphy site. The distance between repaired renal surfaces was measured at 5 different points (3 suture sites and 2 middle sites between sutures). The results of the 2 techniques were compared by using the independent t test. The mean distance between renal surfaces was significantly narrower in the sliding-loop technique than in the conventional technique (1.80 ± 1.08 mm vs 5.28 ± 2.46 mm, P < .001). In the porcine model, the sliding-loop technique more effectively closed the partial nephrectomy defects compared with the conventional sliding-clip technique. © The Author(s) 2015.

A minimum attention control law for ball catching.

PubMed

Jang, Cheongjae; Lee, Jee-eun; Lee, Sohee; Park, F C

2015-10-06

Digital implementations of control laws typically involve discretization with respect to both time and space, and a control law that can achieve a task at coarser levels of discretization can be said to require less control attention, and also reduced implementation costs. One means of quantitatively capturing the attention of a control law is to measure the rate of change of the control with respect to changes in state and time. In this paper we present an attention-minimizing control law for ball catching and other target tracking tasks based on Brockett's attention criterion. We first highlight the connections between this attention criterion and some well-known principles from human motor control. Under the assumption that the optimal control law is the sum of a linear time-varying feedback term and a time-varying feedforward term, we derive an LQR-based minimum attention tracking control law that is stable, and obtained efficiently via a finite-dimensional optimization over the symmetric positive-definite matrices. Taking ball catching as our primary task, we perform numerical experiments comparing the performance of the various control strategies examined in the paper. Consistent with prevailing theories about human ball catching, our results exhibit several familiar features, e.g., the transition from open-loop to closed-loop control during the catching movement, and improved robustness to spatiotemporal discretization. The presented control laws are applicable to more general tracking problems that are subject to limited communication resources.

A Study on Aircraft Engine Control Systems for Integrated Flight and Propulsion Control

NASA Astrophysics Data System (ADS)

Yamane, Hideaki; Matsunaga, Yasushi; Kusakawa, Takeshi; Yasui, Hisako

The Integrated Flight and Propulsion Control (IFPC) for a highly maneuverable aircraft and a fighter-class engine with pitch/yaw thrust vectoring is described. Of the two IFPC functions the aircraft maneuver control utilizes the thrust vectoring based on aerodynamic control surfaces/thrust vectoring control allocation specified by the Integrated Control Unit (ICU) of a FADEC (Full Authority Digital Electronic Control) system. On the other hand in the Performance Seeking Control (PSC) the ICU identifies engine's various characteristic changes, optimizes manipulated variables and finally adjusts engine control parameters in cooperation with the Engine Control Unit (ECU). It is shown by hardware-in-the-loop simulation that the thrust vectoring can enhance aircraft maneuverability/agility and that the PSC can improve engine performance parameters such as SFC (specific fuel consumption), thrust and gas temperature.

All-electronic droplet generation on-chip with real-time feedback control for EWOD digital microfluidics.

PubMed

Gong, Jian; Kim, Chang-Jin C J

2008-06-01

Electrowetting-on-dielectric (EWOD) actuation enables digital (or droplet) microfluidics where small packets of liquids are manipulated on a two-dimensional surface. Due to its mechanical simplicity and low energy consumption, EWOD holds particular promise for portable systems. To improve volume precision of the droplets, which is desired for quantitative applications such as biochemical assays, existing practices would require near-perfect device fabrication and operation conditions unless the droplets are generated under feedback control by an extra pump setup off of the chip. In this paper, we develop an all-electronic (i.e., no ancillary pumping) real-time feedback control of on-chip droplet generation. A fast voltage modulation, capacitance sensing, and discrete-time PID feedback controller are integrated on the operating electronic board. A significant improvement is obtained in the droplet volume uniformity, compared with an open loop control as well as the previous feedback control employing an external pump. Furthermore, this new capability empowers users to prescribe the droplet volume even below the previously considered minimum, allowing, for example, 1 : x (x < 1) mixing, in comparison to the previously considered n : m mixing (i.e., n and m unit droplets).

Architecture and inherent robustness of a bacterial cell-cycle control system.

PubMed

Shen, Xiling; Collier, Justine; Dill, David; Shapiro, Lucy; Horowitz, Mark; McAdams, Harley H

2008-08-12

A closed-loop control system drives progression of the coupled stalked and swarmer cell cycles of the bacterium Caulobacter crescentus in a near-mechanical step-like fashion. The cell-cycle control has a cyclical genetic circuit composed of four regulatory proteins with tight coupling to processive chromosome replication and cell division subsystems. We report a hybrid simulation of the coupled cell-cycle control system, including asymmetric cell division and responses to external starvation signals, that replicates mRNA and protein concentration patterns and is consistent with observed mutant phenotypes. An asynchronous sequential digital circuit model equivalent to the validated simulation model was created. Formal model-checking analysis of the digital circuit showed that the cell-cycle control is robust to intrinsic stochastic variations in reaction rates and nutrient supply, and that it reliably stops and restarts to accommodate nutrient starvation. Model checking also showed that mechanisms involving methylation-state changes in regulatory promoter regions during DNA replication increase the robustness of the cell-cycle control. The hybrid cell-cycle simulation implementation is inherently extensible and provides a promising approach for development of whole-cell behavioral models that can replicate the observed functionality of the cell and its responses to changing environmental conditions.

Adaptive Arrays for Weak Interfering Signals: An Experimental System. M.S. Thesis

NASA Technical Reports Server (NTRS)

Ward, James

1987-01-01

An experimental adaptive antenna system was implemented to study the performance of adaptive arrays in the presence of weak interfering signals. It is a sidelobe canceler with two auxiliary elements. Modified feedback loops, which decorrelate the noise components of the two inputs to the loop correlators, control the array weights. Digital processing is used for algorithm implementation and performance evaluation. The results show that the system can suppress interfering signals which are 0 to 10 dB below the thermal noise level in the main channel by 20 to 30 dB. When the desired signal is strong in the auxiliary elements the amount of interference suppression decreases. The amount of degradation depends on the number of interfering signals incident on the communication system. A modified steering vector which overcomes this problem is proposed.

Phase-locking and coherent power combining of broadband linearly chirped optical waves.

PubMed

Satyan, Naresh; Vasilyev, Arseny; Rakuljic, George; White, Jeffrey O; Yariv, Amnon

2012-11-05

We propose, analyze and demonstrate the optoelectronic phase-locking of optical waves whose frequencies are chirped continuously and rapidly with time. The optical waves are derived from a common optoelectronic swept-frequency laser based on a semiconductor laser in a negative feedback loop, with a precisely linear frequency chirp of 400 GHz in 2 ms. In contrast to monochromatic waves, a differential delay between two linearly chirped optical waves results in a mutual frequency difference, and an acoustooptic frequency shifter is therefore used to phase-lock the two waves. We demonstrate and characterize homodyne and heterodyne optical phase-locked loops with rapidly chirped waves, and show the ability to precisely control the phase of the chirped optical waveform using a digital electronic oscillator. A loop bandwidth of ~ 60 kHz, and a residual phase error variance of < 0.01 rad(2) between the chirped waves is obtained. Further, we demonstrate the simultaneous phase-locking of two optical paths to a common master waveform, and the ability to electronically control the resultant two-element optical phased array. The results of this work enable coherent power combining of high-power fiber amplifiers-where a rapidly chirping seed laser reduces stimulated Brillouin scattering-and electronic beam steering of chirped optical waves.

Software Tools for Developing and Simulating the NASA LaRC CMF Motion Base

NASA Technical Reports Server (NTRS)

Bryant, Richard B., Jr.; Carrelli, David J.

2006-01-01

The NASA Langley Research Center (LaRC) Cockpit Motion Facility (CMF) motion base has provided many design and analysis challenges. In the process of addressing these challenges, a comprehensive suite of software tools was developed. The software tools development began with a detailed MATLAB/Simulink model of the motion base which was used primarily for safety loads prediction, design of the closed loop compensator and development of the motion base safety systems1. A Simulink model of the digital control law, from which a portion of the embedded code is directly generated, was later added to this model to form a closed loop system model. Concurrently, software that runs on a PC was created to display and record motion base parameters. It includes a user interface for controlling time history displays, strip chart displays, data storage, and initializing of function generators used during motion base testing. Finally, a software tool was developed for kinematic analysis and prediction of mechanical clearances for the motion system. These tools work together in an integrated package to support normal operations of the motion base, simulate the end to end operation of the motion base system providing facilities for software-in-the-loop testing, mechanical geometry and sensor data visualizations, and function generator setup and evaluation.

Design of DSP-based high-power digital solar array simulator

NASA Astrophysics Data System (ADS)

Zhang, Yang; Liu, Zhilong; Tong, Weichao; Feng, Jian; Ji, Yibo

2013-12-01

To satisfy rigid performance specifications, a feedback control was presented for zoom optical lens plants. With the increasing of global energy consumption, research of the photovoltaic(PV) systems get more and more attention. Research of the digital high-power solar array simulator provides technical support for high-power grid-connected PV systems research.This paper introduces a design scheme of the high-power digital solar array simulator based on TMS320F28335. A DC-DC full-bridge topology was used in the system's main circuit. The switching frequency of IGBT is 25kHz.Maximum output voltage is 900V. Maximum output current is 20A. Simulator can be pre-stored solar panel IV curves.The curve is composed of 128 discrete points .When the system was running, the main circuit voltage and current values was feedback to the DSP by the voltage and current sensors in real-time. Through incremental PI,DSP control the simulator in the closed-loop control system. Experimental data show that Simulator output voltage and current follow a preset solar panels IV curve. In connection with the formation of high-power inverter, the system becomes gridconnected PV system. The inverter can find the simulator's maximum power point and the output power can be stabilized at the maximum power point (MPP).

RFI in hybrid loops - Simulation and experimental results.

NASA Technical Reports Server (NTRS)

Ziemer, R. E.; Nelson, D. R.; Raghavan, H. R.

1972-01-01

A digital simulation of an imperfect second-order hybrid phase-locked loop (HPLL) operating in radio frequency interference (RFI) is described. Its performance is characterized in terms of phase error variance and phase error probability density function (PDF). Monte-Carlo simulation is used to show that the HPLL can be superior to the conventional phase-locked loops in RFI backgrounds when minimum phase error variance is the goodness criterion. Similar experimentally obtained data are given in support of the simulation data.

Adaptive Control for Buck Power Converter Using Fixed Point Inducting Control and Zero Average Dynamics Strategies

NASA Astrophysics Data System (ADS)

Hoyos Velasco, Fredy Edimer; García, Nicolás Toro; Garcés Gómez, Yeison Alberto

In this paper, the output voltage of a buck power converter is controlled by means of a quasi-sliding scheme. The Fixed Point Inducting Control (FPIC) technique is used for the control design, based on the Zero Average Dynamics (ZAD) strategy, including load estimation by means of the Least Mean Squares (LMS) method. The control scheme is tested in a Rapid Control Prototyping (RCP) system based on Digital Signal Processing (DSP) for dSPACE platform. The closed loop system shows adequate performance. The experimental and simulation results match. The main contribution of this paper is to introduce the load estimator by means of LMS, to make ZAD and FPIC control feasible in load variation conditions. In addition, comparison results for controlled buck converter with SMC, PID and ZAD-FPIC control techniques are shown.

An estimator-predictor approach to PLL loop filter design

NASA Technical Reports Server (NTRS)

Statman, J. I.; Hurd, W. J.

1986-01-01

An approach to the design of digital phase locked loops (DPLLs), using estimation theory concepts in the selection of a loop filter, is presented. The key concept is that the DPLL closed-loop transfer function is decomposed into an estimator and a predictor. The estimator provides recursive estimates of phase, frequency, and higher order derivatives, while the predictor compensates for the transport lag inherent in the loop. This decomposition results in a straightforward loop filter design procedure, enabling use of techniques from optimal and sub-optimal estimation theory. A design example for a particular choice of estimator is presented, followed by analysis of the associated bandwidth, gain margin, and steady state errors caused by unmodeled dynamics. This approach is under consideration for the design of the Deep Space Network (DSN) Advanced Receiver Carrier DPLL.

Lack of correlation between reaction speed and analytical sensitivity in isothermal amplification reveals the value of digital methods for optimization: validation using digital real-time RT-LAMP.

PubMed

Khorosheva, Eugenia M; Karymov, Mikhail A; Selck, David A; Ismagilov, Rustem F

2016-01-29

In this paper, we asked if it is possible to identify the best primers and reaction conditions based on improvements in reaction speed when optimizing isothermal reactions. We used digital single-molecule, real-time analyses of both speed and efficiency of isothermal amplification reactions, which revealed that improvements in the speed of isothermal amplification reactions did not always correlate with improvements in digital efficiency (the fraction of molecules that amplify) or with analytical sensitivity. However, we observed that the speeds of amplification for single-molecule (in a digital device) and multi-molecule (e.g. in a PCR well plate) formats always correlated for the same conditions. Also, digital efficiency correlated with the analytical sensitivity of the same reaction performed in a multi-molecule format. Our finding was supported experimentally with examples of primer design, the use or exclusion of loop primers in different combinations, and the use of different enzyme mixtures in one-step reverse-transcription loop-mediated amplification (RT-LAMP). Our results show that measuring the digital efficiency of amplification of single-template molecules allows quick, reliable comparisons of the analytical sensitivity of reactions under any two tested conditions, independent of the speeds of the isothermal amplification reactions. © The Author(s) 2015. Published by Oxford University Press on behalf of Nucleic Acids Research.

Soft Real-Time PID Control on a VME Computer

NASA Technical Reports Server (NTRS)

Karayan, Vahag; Sander, Stanley; Cageao, Richard

2007-01-01

microPID (uPID) is a computer program for real-time proportional + integral + derivative (PID) control of a translation stage in a Fourier-transform ultraviolet spectrometer. microPID implements a PID control loop over a position profile at sampling rate of 8 kHz (sampling period 125microseconds). The software runs in a strippeddown Linux operating system on a VersaModule Eurocard (VME) computer operating in real-time priority queue using an embedded controller, a 16-bit digital-to-analog converter (D/A) board, and a laser-positioning board (LPB). microPID consists of three main parts: (1) VME device-driver routines, (2) software that administers a custom protocol for serial communication with a control computer, and (3) a loop section that obtains the current position from an LPB-driver routine, calculates the ideal position from the profile, and calculates a new voltage command by use of an embedded PID routine all within each sampling period. The voltage command is sent to the D/A board to control the stage. microPID uses special kernel headers to obtain microsecond timing resolution. Inasmuch as microPID implements a single-threaded process and all other processes are disabled, the Linux operating system acts as a soft real-time system.

A finite state machine read-out chip for integrated surface acoustic wave sensors

NASA Astrophysics Data System (ADS)

Rakshit, Sambarta; Iliadis, Agis A.

2015-01-01

A finite state machine based integrated sensor circuit suitable for the read-out module of a monolithically integrated SAW sensor on Si is reported. The primary sensor closed loop consists of a voltage controlled oscillator (VCO), a peak detecting comparator, a finite state machine (FSM), and a monolithically integrated SAW sensor device. The output of the system oscillates within a narrow voltage range that correlates with the SAW pass-band response. The period of oscillation is of the order of the SAW phase delay. We use timing information from the FSM to convert SAW phase delay to an on-chip 10 bit digital output operating on the principle of time to digital conversion (TDC). The control inputs of this digital conversion block are generated by a second finite state machine operating under a divided system clock. The average output varies with changes in SAW center frequency, thus tracking mass sensing events in real time. Based on measured VCO gain of 16 MHz/V our system will convert a 10 kHz SAW frequency shift to a corresponding mean voltage shift of 0.7 mV. A corresponding shift in phase delay is converted to a one or two bit shift in the TDC output code. The system can handle alternate SAW center frequencies and group delays simply by adjusting the VCO control and TDC delay control inputs. Because of frequency to voltage and phase to digital conversion, this topology does not require external frequency counter setups and is uniquely suitable for full monolithic integration of autonomous sensor systems and tags.

Optical frequency locked loop for long-term stabilization of broad-line DFB laser frequency difference

NASA Astrophysics Data System (ADS)

Lipka, Michał; Parniak, Michał; Wasilewski, Wojciech

2017-09-01

We present an experimental realization of the optical frequency locked loop applied to long-term frequency difference stabilization of broad-line DFB lasers along with a new independent method to characterize relative phase fluctuations of two lasers. The presented design is based on a fast photodiode matched with an integrated phase-frequency detector chip. The locking setup is digitally tunable in real time, insensitive to environmental perturbations and compatible with commercially available laser current control modules. We present a simple model and a quick method to optimize the loop for a given hardware relying exclusively on simple measurements in time domain. Step response of the system as well as phase characteristics closely agree with the theoretical model. Finally, frequency stabilization for offsets within 4-15 GHz working range achieving <0.1 Hz long-term stability of the beat note frequency for 500 s averaging time period is demonstrated. For these measurements we employ an I/Q mixer that allows us to precisely and independently measure the full phase trace of the beat note signal.

Noise reduction and control in mode-locked semiconductor diode lasers for use in next-generation all-optical analog-to-digital converters

NASA Astrophysics Data System (ADS)

DePriest, Christopher M.; Abeles, Joseph H.; Braun, Alan; Delfyett, Peter J., Jr.

2000-07-01

External-cavity, actively-modelocked semiconductor diode lasers (SDLs) have proven to be attractive candidates for forming the backbone of next-generation analog-to-digital converters (ADCs), which are currently being developed to sample signals at repetition rates exceeding several GHz with up to 12 bits of digital resolution. Modelocked SDLs are capable of producing waveform-sampling pulse trains with very low temporal jitter (phase noise) and very small fluctuations in pulse height (amplitude noise)--two basic conditions that must be met in order for high-speed ADCs to achieve projected design goals. Single-wavelength modelocked operation (at nominal repetition frequencies of 400 MHz) has produced pulse trains with very low amplitude noise (approximately 0.08%), and the implementation of a phase- locked-loop has been effective in reducing the system's low- frequency phase noise (RMS timing jitter for offset frequencies between 10 Hz and 10 kHz has been reduced from 240 fs to 27 fs).

Multifrequency zero-jitter delay-locked loop

NASA Astrophysics Data System (ADS)

Efendovich, Avner; Afek, Yachin; Sella, Coby; Bikowsky, Zeev

1994-01-01

The approach of an all-digital phase locked loop is used in this delay-locked loop circuit. This design is designated to a system with two processing units, a master CPU and a slave system chip, that share the same bus. It allows maximum utilization of the bus, as the minimal skew between the clocks of the two components significantly reduces idle periods, and also set-up and hold times. Changes in the operating frequency are possible, without falling out of synchronization. Due to the special lead-lag phase detector, the jitter of the clock is zero, when the loop is locked, under any working conditions.

A New Built-in Self Test Scheme for Phase-Locked Loops Using Internal Digital Signals

NASA Astrophysics Data System (ADS)

Kim, Youbean; Kim, Kicheol; Kim, Incheol; Kang, Sungho

Testing PLLs (phase-locked loops) is becoming an important issue that affects both time-to-market and production cost of electronic systems. Though a PLL is the most common mixed-signal building block, it is very difficult to test due to internal analog blocks and signals. In this paper, we propose a new PLL BIST (built-in self test) using the distorted frequency detector that uses only internal digital signals. The proposed BIST does not need to load any analog nodes of the PLL. Therefore, it provides an efficient defect-oriented structural test scheme, reduced area overhead, and improved test quality compared with previous approaches.

Reconfigurable firmware-defined radios synthesized from standard digital logic cells

NASA Astrophysics Data System (ADS)

Faisal, Muhammad; Park, Youngmin; Wentzloff, David D.

2011-06-01

This paper presents recent work on reconfigurable all-digital radio architectures. We leverage the flexibility and scalability of synthesized digital cells to construct reconfigurable radio architectures that consume significantly less power than a software defined radio implementing similar architectures. We present two prototypes of such architectures that can receive and demodulate FM and FRS band signals. Moreover, a radio architecture based on a reconfigurable alldigital phase-locked loop for coherent demodulation is presented.

Involvement of Working Memory in Mental Multiplication in Chinese Elementary Students

ERIC Educational Resources Information Center

Liu, Ru-De; Ding, Yi; Xu, Le; Wang, Jia

2017-01-01

The authors' aim was to examine the relation between two-digit mental multiplication and working memory. In Study 1, involving 30 fifth-grade students, we used digit span backward as an abbreviated measure of working memory. In Study 2, involving 41 fourth-grade students, working memory comprised measures of phonological loop, visuospatial…

Design of a hybrid receiver for the OLYMPUS spacecraft beacons

NASA Technical Reports Server (NTRS)

Sweeney, D. G.; Mckeeman, J. C.

1990-01-01

The theory and design of a hybrid analogue/digital receiver which acquires and monitors the OLYMPUS satellite beacons is presented. The analogue portion of this receiver uses a frequency locked loop for signal tracking. A digital sampling detector operating at IF is used to obtain the I and Q outputs.

Spatiotemporal dynamics of a digital phase-locked loop based coupled map lattice system

DOE Office of Scientific and Technical Information (OSTI.GOV)

Banerjee, Tanmoy, E-mail: tbanerjee@phys.buruniv.ac.in; Paul, Bishwajit; Sarkar, B. C.

2014-03-15

We explore the spatiotemporal dynamics of a coupled map lattice (CML) system, which is realized with a one dimensional array of locally coupled digital phase-locked loops (DPLLs). DPLL is a nonlinear feedback-controlled system widely used as an important building block of electronic communication systems. We derive the phase-error equation of the spatially extended system of coupled DPLLs, which resembles a form of the equation of a CML system. We carry out stability analysis for the synchronized homogeneous solutions using the circulant matrix formalism. It is shown through extensive numerical simulations that with the variation of nonlinearity parameter and coupling strengthmore » the system shows transitions among several generic features of spatiotemporal dynamics, viz., synchronized fixed point solution, frozen random pattern, pattern selection, spatiotemporal intermittency, and fully developed spatiotemporal chaos. We quantify the spatiotemporal dynamics using quantitative measures like average quadratic deviation and spatial correlation function. We emphasize that instead of using an idealized model of CML, which is usually employed to observe the spatiotemporal behaviors, we consider a real world physical system and establish the existence of spatiotemporal chaos and other patterns in this system. We also discuss the importance of the present study in engineering application like removal of clock-skew in parallel processors.« less

Spatiotemporal dynamics of a digital phase-locked loop based coupled map lattice system.

PubMed

Banerjee, Tanmoy; Paul, Bishwajit; Sarkar, B C

2014-03-01

We explore the spatiotemporal dynamics of a coupled map lattice (CML) system, which is realized with a one dimensional array of locally coupled digital phase-locked loops (DPLLs). DPLL is a nonlinear feedback-controlled system widely used as an important building block of electronic communication systems. We derive the phase-error equation of the spatially extended system of coupled DPLLs, which resembles a form of the equation of a CML system. We carry out stability analysis for the synchronized homogeneous solutions using the circulant matrix formalism. It is shown through extensive numerical simulations that with the variation of nonlinearity parameter and coupling strength the system shows transitions among several generic features of spatiotemporal dynamics, viz., synchronized fixed point solution, frozen random pattern, pattern selection, spatiotemporal intermittency, and fully developed spatiotemporal chaos. We quantify the spatiotemporal dynamics using quantitative measures like average quadratic deviation and spatial correlation function. We emphasize that instead of using an idealized model of CML, which is usually employed to observe the spatiotemporal behaviors, we consider a real world physical system and establish the existence of spatiotemporal chaos and other patterns in this system. We also discuss the importance of the present study in engineering application like removal of clock-skew in parallel processors.

Spatiotemporal dynamics of a digital phase-locked loop based coupled map lattice system

NASA Astrophysics Data System (ADS)

Banerjee, Tanmoy; Paul, Bishwajit; Sarkar, B. C.

2014-03-01

We explore the spatiotemporal dynamics of a coupled map lattice (CML) system, which is realized with a one dimensional array of locally coupled digital phase-locked loops (DPLLs). DPLL is a nonlinear feedback-controlled system widely used as an important building block of electronic communication systems. We derive the phase-error equation of the spatially extended system of coupled DPLLs, which resembles a form of the equation of a CML system. We carry out stability analysis for the synchronized homogeneous solutions using the circulant matrix formalism. It is shown through extensive numerical simulations that with the variation of nonlinearity parameter and coupling strength the system shows transitions among several generic features of spatiotemporal dynamics, viz., synchronized fixed point solution, frozen random pattern, pattern selection, spatiotemporal intermittency, and fully developed spatiotemporal chaos. We quantify the spatiotemporal dynamics using quantitative measures like average quadratic deviation and spatial correlation function. We emphasize that instead of using an idealized model of CML, which is usually employed to observe the spatiotemporal behaviors, we consider a real world physical system and establish the existence of spatiotemporal chaos and other patterns in this system. We also discuss the importance of the present study in engineering application like removal of clock-skew in parallel processors.

S-Band POSIX Device Drivers for RTEMS

NASA Technical Reports Server (NTRS)

Lux, James P.; Lang, Minh; Peters, Kenneth J.; Taylor, Gregory H.

2011-01-01

This is a set of POSIX device driver level abstractions in the RTEMS RTOS (Real-Time Executive for Multiprocessor Systems real-time operating system) to SBand radio hardware devices that have been instantiated in an FPGA (field-programmable gate array). These include A/D (analog-to-digital) sample capture, D/A (digital-to-analog) sample playback, PLL (phase-locked-loop) tuning, and PWM (pulse-width-modulation)-controlled gain. This software interfaces to Sband radio hardware in an attached Xilinx Virtex-2 FPGA. It uses plug-and-play device discovery to map memory to device IDs. Instead of interacting with hardware devices directly, using direct-memory mapped access at the application level, this driver provides an application programming interface (API) offering that easily uses standard POSIX function calls. This simplifies application programming, enables portability, and offers an additional level of protection to the hardware. There are three separate device drivers included in this package: sband_device (ADC capture and DAC playback), pll_device (RF front end PLL tuning), and pwm_device (RF front end AGC control).

Human-In-The-Loop Simulation in Support of Long-Term Sustainability of Light Water Reactors

DOE PAGES

Hallbert, Bruce P

2015-01-01

Reliable instrumentation, information, and control systems technologies are essential to ensuring safe and efficient operation of the U.S. light water reactor (LWR) fleet. These technologies affect every aspect of nuclear power plant (NPP) and balance-of-plant operations. In 1997, the National Research Council conducted a study concerning the challenges involved in modernization of digital instrumentation and control systems in NPPs. Their findings identified the need for new II&C technology integration. The NPP owners and operators realize that this analog technology represents a significant challenge to sustaining the operation of the current fleet of NPPs. Beyond control systems, new technologies are neededmore » to monitor and characterize the effects of aging and degradation in critical areas of key structures, systems, and components. The objective of the efforts sponsored by the U.S. Department of Energy is to develop, demonstrate, and deploy new digital technologies for II&C architectures and provide monitoring capabilities to ensure the continued safe, reliable, and economic operation of the nation’s NPPs.« less

Closed Loop Experiment Manager (CLEM)-An Open and Inexpensive Solution for Multichannel Electrophysiological Recordings and Closed Loop Experiments.

PubMed

Hazan, Hananel; Ziv, Noam E

2017-01-01

There is growing need for multichannel electrophysiological systems that record from and interact with neuronal systems in near real-time. Such systems are needed, for example, for closed loop, multichannel electrophysiological/optogenetic experimentation in vivo and in a variety of other neuronal preparations, or for developing and testing neuro-prosthetic devices, to name a few. Furthermore, there is a need for such systems to be inexpensive, reliable, user friendly, easy to set-up, open and expandable, and possess long life cycles in face of rapidly changing computing environments. Finally, they should provide powerful, yet reasonably easy to implement facilities for developing closed-loop protocols for interacting with neuronal systems. Here, we survey commercial and open source systems that address these needs to varying degrees. We then present our own solution, which we refer to as Closed Loop Experiments Manager (CLEM). CLEM is an open source, soft real-time, Microsoft Windows desktop application that is based on a single generic personal computer (PC) and an inexpensive, general-purpose data acquisition board. CLEM provides a fully functional, user-friendly graphical interface, possesses facilities for recording, presenting and logging electrophysiological data from up to 64 analog channels, and facilities for controlling external devices, such as stimulators, through digital and analog interfaces. Importantly, it includes facilities for running closed-loop protocols written in any programming language that can generate dynamic link libraries (DLLs). We describe the application, its architecture and facilities. We then demonstrate, using networks of cortical neurons growing on multielectrode arrays (MEA) that despite its reliance on generic hardware, its performance is appropriate for flexible, closed-loop experimentation at the neuronal network level.

Closed Loop Experiment Manager (CLEM)—An Open and Inexpensive Solution for Multichannel Electrophysiological Recordings and Closed Loop Experiments

PubMed Central

Hazan, Hananel; Ziv, Noam E.

2017-01-01

There is growing need for multichannel electrophysiological systems that record from and interact with neuronal systems in near real-time. Such systems are needed, for example, for closed loop, multichannel electrophysiological/optogenetic experimentation in vivo and in a variety of other neuronal preparations, or for developing and testing neuro-prosthetic devices, to name a few. Furthermore, there is a need for such systems to be inexpensive, reliable, user friendly, easy to set-up, open and expandable, and possess long life cycles in face of rapidly changing computing environments. Finally, they should provide powerful, yet reasonably easy to implement facilities for developing closed-loop protocols for interacting with neuronal systems. Here, we survey commercial and open source systems that address these needs to varying degrees. We then present our own solution, which we refer to as Closed Loop Experiments Manager (CLEM). CLEM is an open source, soft real-time, Microsoft Windows desktop application that is based on a single generic personal computer (PC) and an inexpensive, general-purpose data acquisition board. CLEM provides a fully functional, user-friendly graphical interface, possesses facilities for recording, presenting and logging electrophysiological data from up to 64 analog channels, and facilities for controlling external devices, such as stimulators, through digital and analog interfaces. Importantly, it includes facilities for running closed-loop protocols written in any programming language that can generate dynamic link libraries (DLLs). We describe the application, its architecture and facilities. We then demonstrate, using networks of cortical neurons growing on multielectrode arrays (MEA) that despite its reliance on generic hardware, its performance is appropriate for flexible, closed-loop experimentation at the neuronal network level. PMID:29093659

Unique digital imagery interface between a silicon graphics computer and the kinetic kill vehicle hardware-in-the-loop simulator (KHILS) wideband infrared scene projector (WISP)

NASA Astrophysics Data System (ADS)

Erickson, Ricky A.; Moren, Stephen E.; Skalka, Marion S.

1998-07-01

Providing a flexible and reliable source of IR target imagery is absolutely essential for operation of an IR Scene Projector in a hardware-in-the-loop simulation environment. The Kinetic Kill Vehicle Hardware-in-the-Loop Simulator (KHILS) at Eglin AFB provides the capability, and requisite interfaces, to supply target IR imagery to its Wideband IR Scene Projector (WISP) from three separate sources at frame rates ranging from 30 - 120 Hz. Video can be input from a VCR source at the conventional 30 Hz frame rate. Pre-canned digital imagery and test patterns can be downloaded into stored memory from the host processor and played back as individual still frames or movie sequences up to a 120 Hz frame rate. Dynamic real-time imagery to the KHILS WISP projector system, at a 120 Hz frame rate, can be provided from a Silicon Graphics Onyx computer system normally used for generation of digital IR imagery through a custom CSA-built interface which is available for either the SGI/DVP or SGI/DD02 interface port. The primary focus of this paper is to describe our technical approach and experience in the development of this unique SGI computer and WISP projector interface.

Dermatoglyphs in Coronary Artery Disease Among Ningxia Population of North China

PubMed Central

Lu, Hong; Qian, Wenli; Geng, Zhi; Sheng, Youjing; Yu, Haochen; Ma, Zhanbing

2015-01-01

Background Coronary artery disease (CAD) is an enormous health problem in the world. Dermatoglyphs are cutaneous ridges on the fingers, palms, and soles, formed by genetic regulation and control during early intrauterine life. The Dermatoglyphic traits do not change significantly as the growth of the age. They may be the phenotypic characters of individual genes and represent the predisposition to certain diseases. Aims and Objectives The study was carried out to document characteristic dermatoglyphic patterns in coronary artery disease which could be useful in early diagnosis of the disease. Materials and Methods Dermatoglyphic study of 258 male (129 coronary artery disease cases and 129 normal subjects) of Ningxia China were studied in the present cross-sectional study. It involved the digital patterns, ATD angles, A-B ridge counts on the hands. Chi-square test, t-test were used for the statistical analysis in this study. Results The overall frequency of whorls was higher followed by loop and arch in both two groups. It was observed that there was significant difference of digital frequency of whorls and ulnar loops in patients in both hands as compared to controls (p≤0.01). The mean value of finger ridge counts, total ridge counts were similar between two groups. The A-B ridge counts were significantly higher in coronary artery disease compared with controls on the right palm (p≤0.01). However, the mean ATD angle values were significantly higher in cases than those of in normal on both hands (p<0.05). Conclusion: Abnormally high A-B ridge count, ATD angles and the frequency of whorls are characteristic dermatoglyphic patterns of coronary artery disease. Dermatoglyphics may have an important role in early diagnosis of coronary artery disease in future. PMID:26816877

Power Hardware-in-the-Loop Evaluation of PV Inverter Grid Support on Hawaiian Electric Feeders: Preprint

DOE Office of Scientific and Technical Information (OSTI.GOV)

Nelson, Austin; Prabakar, Kumaraguru; Nagarajan, Adarsh

As more grid-connected photovoltaic (PV) inverters become compliant with evolving interconnections requirements, there is increased interest from utilities in understanding how to best deploy advanced grid-support functions (GSF) in the field. One efficient and cost-effective method to examine such deployment options is to leverage power hardware-in-the-loop (PHIL) testing methods. Two Hawaiian Electric feeder models were converted to real-time models in the OPAL-RT real-time digital testing platform, and integrated with models of GSF capable PV inverters that were modeled from characterization test data. The integrated model was subsequently used in PHIL testing to evaluate the effects of different fixed power factormore » and volt-watt control settings on voltage regulation of the selected feeders. The results of this study were provided as inputs for field deployment and technical interconnection requirements for grid-connected PV inverters on the Hawaiian Islands.« less

Receiver concepts for data transmission at 10 microns

NASA Astrophysics Data System (ADS)

Scholtz, A. L.; Philipp, H. K.; Leeb, W. R.

1984-05-01

Receivers for digitally modulated CO2 laser signals are compared. Incoherent heterodyne receivers and coherent homodyne setups, including the linear phase locked loop (PLL) receiver, the low intermediate frequency translation loop, and the Costas loop receiver were studied. Experiments covered the homodyne systems, emphasizing the linear PLL receiver. Reliable phase lock of the receiver is achieved at carrier levels as low as 3 nW. Reception of signals phase shift keyed with a data rate of up to 150 Mbit/sec is demonstrated at subnanowatt sideband power levels.

DC Microgrids–Part I: A Review of Control Strategies and Stabilization Techniques

DOE Office of Scientific and Technical Information (OSTI.GOV)

Dragicevic, Tomislav; Lu, Xiaonan; Vasquez, Juan

2015-01-01

This paper presents a review of control strategies, stability analysis, and stabilization techniques for dc microgrids (MGs). Overall control is systematically classified into local and coordinated control levels according to respective functionalities in each level. As opposed to local control, which relies only on local measurements, some line of communication between units needs to be made available in order to achieve the coordinated control. Depending on the communication method, three basic coordinated control strategies can be distinguished, i.e., decentralized, centralized, and distributed control. Decentralized control can be regarded as an extension of the local control since it is also basedmore » exclusively on local measurements. In contrast, centralized and distributed control strategies rely on digital communication technologies. A number of approaches using these three coordinated control strategies to achieve various control objectives are reviewed in this paper. Moreover, properties of dc MG dynamics and stability are discussed. This paper illustrates that tightly regulated point-of-load converters tend to reduce the stability margins of the system since they introduce negative impedances, which can potentially oscillate with lightly damped power supply input filters. It is also demonstrated that how the stability of the whole system is defined by the relationship of the source and load impedances, referred to as the minor loop gain. Several prominent specifications for the minor loop gain are reviewed. Finally, a number of active stabilization techniques are presented.« less

Research on Parallel Three Phase PWM Converters base on RTDS

NASA Astrophysics Data System (ADS)

Xia, Yan; Zou, Jianxiao; Li, Kai; Liu, Jingbo; Tian, Jun

2018-01-01

Converters parallel operation can increase capacity of the system, but it may lead to potential zero-sequence circulating current, so the control of circulating current was an important goal in the design of parallel inverters. In this paper, the Real Time Digital Simulator (RTDS) is used to model the converters parallel system in real time and study the circulating current restraining. The equivalent model of two parallel converters and zero-sequence circulating current(ZSCC) were established and analyzed, then a strategy using variable zero vector control was proposed to suppress the circulating current. For two parallel modular converters, hardware-in-the-loop(HIL) study based on RTDS and practical experiment were implemented, results prove that the proposed control strategy is feasible and effective.

AN/TAC-1 demultiplexer circuit card assembly

NASA Astrophysics Data System (ADS)

Krueger, Paul J.

1989-01-01

This report describes the design, operation, and testing of the AN/TAC-1 demultiplexer subassembly. It demultiplexes the 6144 kb/s digital data stream received over fiber optic cable or tropo satellite support radio, and converts it into 2 digital groups and 16 digital channels. Timing recovery is accomplished by generating a 18432 kHz master clock synchronized to the incoming data. This master clock is divided modulo two to generate the proper group and loop timing.

WGM Temperature Tracker

NASA Technical Reports Server (NTRS)

Strekalov, Dmitry V.

2012-01-01

This software implements digital control of a WGM (whispering-gallerymode) resonator temperature based on the dual-mode approach. It comprises one acquisition (dual-channel) and three control modules. The interaction of the proportional-integral loops is designed in the original way, preventing the loops from fighting. The data processing is organized in parallel with the acquisition, which allows the computational overhead time to be suppressed or often completely avoided. WGM resonators potentially provide excellent optical references for metrology, clocks, spectroscopy, and other applications. However, extremely accurate (below micro-Kelvin) temperature stabilization is required. This software allows one specifically advantageous method of such stabilization to be implemented, which is immune to a variety of effects that mask the temperature variation. WGM Temperature Tracker 2.3 (see figure) is a LabVIEW code developed for dual-mode temperature stabilization of WGM resonators. It has allowed for the temperature stabilization at the level of 200 nK with one-second integration time, and 6 nK with 10,000-second integration time, with the above room-temperature set point. This software, in conjunction with the appropriate hardware, can be used as a noncryogenic temperature sensor/ controller with sub-micro-Kelvin sensitivity, which at the time of this reporting considerably outperforms the state of the art.

An optimal open/closed-loop control method with application to a pre-stressed thin duralumin plate

NASA Astrophysics Data System (ADS)

Nadimpalli, Sruthi Raju

The excessive vibrations of a pre-stressed duralumin plate, suppressed by a combination of open-loop and closed-loop controls, also known as open/closed-loop control, is studied in this thesis. The two primary steps involved in this process are: Step (I) with an assumption that the closed-loop control law is proportional, obtain the optimal open-loop control by direct minimization of the performance measure consisting of energy at terminal time and a penalty on open-loop control force via calculus of variations. If the performance measure also involves a penalty on closed-loop control effort then a Fourier based method is utilized. Step (II) the energy at terminal time is minimized numerically to obtain optimal values of feedback gains. The optimal closed-loop control gains obtained are used to describe the displacement and the velocity of open-loop, closed-loop and open/closed-loop controlled duralumin plate.

The payload/shuttle-data-communication-link handbook

NASA Technical Reports Server (NTRS)

1982-01-01

Communication links between the Orbiter, payloads, and ground are described: end-to-end, hardline, S-band, Ku-band, TDRSS relay, waveforms, premodulation, subcarrier modulation, carrier modulation, transmitter power, antennas, the RF channel, system noise, received signal-to-noise spectral density, carrier-tracking loop, carrier demodulation, subcarrier demodulation, digital data detection, digital data decoding, and tandem link considerations.

Noncontact optical motion sensing for real-time analysis

NASA Astrophysics Data System (ADS)

Fetzer, Bradley R.; Imai, Hiromichi

1990-08-01

The adaptation of an image dissector tube (IDT) within the OPTFOLLOW system provides high resolution displacement measurement of a light discontinuity. Due to the high speed response of the IDT and the advanced servo loop circuitry, the system is capable of real time analysis of the object under test. The image of the discontinuity may be contoured by direct or reflected light and ranges spectrally within the field of visible light. The image is monitored to 500 kHz through a lens configuration which transposes the optical image upon the photocathode of the IDT. The photoelectric effect accelerates the resultant electrons through a photomultiplier and an enhanced current is emitted from the anode. A servo loop controls the electron beam, continually centering it within the IDT using magnetic focusing of deflection coils. The output analog voltage from the servo amplifier is thereby proportional to the displacement of the target. The system is controlled by a microprocessor with a 32kbyte memory and provides a digital display as well as instructional readout on a color monitor allowing for offset image tracking and automatic system calibration.

Wide Tuning Capability for Spacecraft Transponders

NASA Technical Reports Server (NTRS)

Lux, James; Mysoor, Narayan; Shah, Biren; Cook, Brian; Smith, Scott

2007-01-01

A document presents additional information on the means of implementing a capability for wide tuning of microwave receiver and transmitter frequencies in the development reported in the immediately preceding article, VCO PLL Frequency Synthesizers for Spacecraft Transponders (NPO- 42909). The reference frequency for a PLL-based frequency synthesizer is derived from a numerically controlled oscillator (NCO) implemented in digital logic, such that almost any reference frequency can be derived from a fixed crystal reference oscillator with microhertz precision. The frequency of the NCO is adjusted to track the received signal, then used to create another NCO frequency used to synthesize the transmitted signal coherent with, and at a specified frequency ratio to, the received signal. The frequencies can be changed, even during operation, through suitable digital programming. The NCOs and the related tracking loops and coherent turnaround logic are implemented in a field-programmable gate array (FPGA). The interface between the analog microwave receiver and transmitter circuits and the FPGA includes analog-to-digital and digital-toanalog converters, the sampling rates of which are chosen to minimize spurious signals and otherwise optimize performance. Several mixers and filters are used to properly route various signals.

Progress in multirate digital control system design

NASA Technical Reports Server (NTRS)

Berg, Martin C.; Mason, Gregory S.

1991-01-01

A new methodology for multirate sampled-data control design based on a new generalized control law structure, two new parameter-optimization-based control law synthesis methods, and a new singular-value-based robustness analysis method are described. The control law structure can represent multirate sampled-data control laws of arbitrary structure and dynamic order, with arbitrarily prescribed sampling rates for all sensors and update rates for all processor states and actuators. The two control law synthesis methods employ numerical optimization to determine values for the control law parameters. The robustness analysis method is based on the multivariable Nyquist criterion applied to the loop transfer function for the sampling period equal to the period of repetition of the system's complete sampling/update schedule. The complete methodology is demonstrated by application to the design of a combination yaw damper and modal suppression system for a commercial aircraft.

Feedback Linearization in a Six Degree-of-Freedom MAG-LEV Stage

NASA Technical Reports Server (NTRS)

Ludwick, Stephen J.; Trumper, David L.; Holmes, Michael L.

1996-01-01

A six degree-of-freedom electromagnetically suspended motion control stage (the Angstrom Stage) has been designed and constructed for use in short-travel, high-resolution motion control applications. It achieves better than 0.5 nm resolution over a 100 micron range of travel. The stage consists of a single moving element (the platen) floating in an oil filled chamber. The oil is crucial to the stage's operation since it forms squeeze film dampers between the platen and the frame. Twelve electromagnetic actuators provide the forces necessary to suspend and servo the platen, and six capacitance probes measure its position relative to the frame. The system is controlled using a digital signal processing board residing in a '486 based PC. This digital controller implements a feedback linearization algorithm in real-time to account for nonlinearities in both the magnetic actuators and the fluid film dampers. The feedback linearization technique reduces a highly nonlinear plant with coupling between the degrees of freedom into one that is linear, decoupled, and setpoint independent. The key to this procedure is a detailed plant model. The operation of the feedback linearization procedure is transparent to the outer loop of the controller, and so a proportional controller is sufficient for normal operation. We envision applications of this stage in scanned probe microscopy and for integrated circuit measurement.

Fringe pattern demodulation with a two-dimensional digital phase-locked loop algorithm.

PubMed

Gdeisat, Munther A; Burton, David R; Lalor, Michael J

2002-09-10

A novel technique called a two-dimensional digital phase-locked loop (DPLL) for fringe pattern demodulation is presented. This algorithm is more suitable for demodulation of fringe patterns with varying phase in two directions than the existing DPLL techniques that assume that the phase of the fringe patterns varies only in one direction. The two-dimensional DPLL technique assumes that the phase of a fringe pattern is continuous in both directions and takes advantage of the phase continuity; consequently, the algorithm has better noise performance than the existing DPLL schemes. The two-dimensional DPLL algorithm is also suitable for demodulation of fringe patterns with low sampling rates, and it outperforms the Fourier fringe analysis technique in this aspect.

Quantizing and sampling considerations in digital phased-locked loops

NASA Technical Reports Server (NTRS)

Hurst, G. T.; Gupta, S. C.

1974-01-01

The quantizer problem is first considered. The conditions under which the uniform white sequence model for the quantizer error is valid are established independent of the sampling rate. An equivalent spectral density is defined for the quantizer error resulting in an effective SNR value. This effective SNR may be used to determine quantized performance from infinitely fine quantized results. Attention is given to sampling rate considerations. Sampling rate characteristics of the digital phase-locked loop (DPLL) structure are investigated for the infinitely fine quantized system. The predicted phase error variance equation is examined as a function of the sampling rate. Simulation results are presented and a method is described which enables the minimum required sampling rate to be determined from the predicted phase error variance equations.

Closed Loop Fuzzy Logic Controlled PV Based Cascaded Boost Five-Level Inverter System

NASA Astrophysics Data System (ADS)

Revana, Guruswamy; Kota, Venkata Reddy

2018-04-01

Recent developments in intelligent control methods and power electronics have produced PV based DC to AC converters related to AC drives. Cascaded boost converter and inverter find their way in interconnecting PV and Induction Motor. This paper deals with digital simulation and implementation of closed loop controlled five-level inverter based Photo-Voltaic (PV) system. The objective of this work is to reduce the harmonics using Multi Level Inverter based system. The DC output from the PV panel is boosted using cascaded-boost-converters. The DC output of these cascaded boost converters is applied to the bridges of the cascaded inverter. The AC output voltage is obtained by the series cascading of the output voltage of the two inverters. The investigations are done with Induction motor load. Cascaded boost-converter is proposed in the present work to produce the required DC Voltage at the input of the bridge inverter. A simple FLC is applied to CBFLIIM system. The FLC is proposed to reduce the steady state error. The simulation results are compared with the hardware results. The results of the comparison are made to show the improvement in dynamic response in terms of settling time and steady state error. Design procedure and control strategy are presented in detail.

Analytical and experimental investigation of flutter suppression by piezoelectric actuation

NASA Technical Reports Server (NTRS)

Heeg, Jennifer

1993-01-01

The objective of this research was to analytically and experimentally study the capabilities of piezoelectric plate actuators for suppressing flutter. Piezoelectric materials are characterized by their ability to produce voltage when subjected to a mechanical strain. The converse piezoelectric effect can be utilized to actuate a structure by applying a voltage. For this investigation, a two-degree-of-freedom wind tunnel model was designed, analyzed, and tested. The model consisted of a rigid wing and a flexible mount system that permitted a translational and a rotational degree of freedom. The model was designed such that flutter was encountered within the testing envelope of the wind tunnel. Actuators made of piezoelectric material were affixed to leaf springs of the mount system. Command signals, applied to the piezoelectric actuators, exerted control over the damping and stiffness properties. A mathematical aeroservoelastic model was constructed by using finite element methods, laminated plate theory, and aeroelastic analysis tools. Plant characteristics were determined from this model and verified by open loop experimental tests. A flutter suppression control law was designed and implemented on a digital control computer. Closed loop flutter testing was conducted. The experimental results represent the first time that adaptive materials have been used to actively suppress flutter. They demonstrate that small, carefully placed actuating plates can be used effectively to control aeroelastic response.

Closed Loop Fuzzy Logic Controlled PV Based Cascaded Boost Five-Level Inverter System

NASA Astrophysics Data System (ADS)

Revana, Guruswamy; Kota, Venkata Reddy

2017-12-01

Recent developments in intelligent control methods and power electronics have produced PV based DC to AC converters related to AC drives. Cascaded boost converter and inverter find their way in interconnecting PV and Induction Motor. This paper deals with digital simulation and implementation of closed loop controlled five-level inverter based Photo-Voltaic (PV) system. The objective of this work is to reduce the harmonics using Multi Level Inverter based system. The DC output from the PV panel is boosted using cascaded-boost-converters. The DC output of these cascaded boost converters is applied to the bridges of the cascaded inverter. The AC output voltage is obtained by the series cascading of the output voltage of the two inverters. The investigations are done with Induction motor load. Cascaded boost-converter is proposed in the present work to produce the required DC Voltage at the input of the bridge inverter. A simple FLC is applied to CBFLIIM system. The FLC is proposed to reduce the steady state error. The simulation results are compared with the hardware results. The results of the comparison are made to show the improvement in dynamic response in terms of settling time and steady state error. Design procedure and control strategy are presented in detail.

TREAT Reactor Control and Protection System

DOE Office of Scientific and Technical Information (OSTI.GOV)

Lipinski, W.C.; Brookshier, W.K.; Burrows, D.R.

1985-01-01

The main control algorithm of the Transient Reactor Test Facility (TREAT) Automatic Reactor Control System (ARCS) resides in Read Only Memory (ROM) and only experiment specific parameters are input via keyboard entry. Prior to executing an experiment, the software and hardware of the control computer is tested by a closed loop real-time simulation. Two computers with parallel processing are used for the reactor simulation and another computer is used for simulation of the control rod system. A monitor computer, used as a redundant diverse reactor protection channel, uses more conservative setpoints and reduces challenges to the Reactor Trip System (RTS).more » The RTS consists of triplicated hardwired channels with one out of three logic. The RTS is automatically tested by a digital Dedicated Microprocessor Tester (DMT) prior to the execution of an experiment. 6 refs., 5 figs., 1 tab.« less

A Novel Real-Time Path Servo Control of a Hardware-in-the-Loop for a Large-Stroke Asymmetric Rod-Less Pneumatic System under Variable Loads.

PubMed

Lin, Hao-Ting

2017-06-04

This project aims to develop a novel large stroke asymmetric pneumatic servo system of a hardware-in-the-loop for path tracking control under variable loads based on the MATLAB Simulink real-time system. High pressure compressed air provided by the air compressor is utilized for the pneumatic proportional servo valve to drive the large stroke asymmetric rod-less pneumatic actuator. Due to the pressure differences between two chambers, the pneumatic actuator will operate. The highly nonlinear mathematical models of the large stroke asymmetric pneumatic system were analyzed and developed. The functional approximation technique based on the sliding mode controller (FASC) is developed as a controller to solve the uncertain time-varying nonlinear system. The MATLAB Simulink real-time system was a main control unit of a hardware-in-the-loop system proposed to establish driver blocks for analog and digital I/O, a linear encoder, a CPU and a large stroke asymmetric pneumatic rod-less system. By the position sensor, the position signals of the cylinder will be measured immediately. The measured signals will be viewed as the feedback signals of the pneumatic servo system for the study of real-time positioning control and path tracking control. Finally, real-time control of a large stroke asymmetric pneumatic servo system with measuring system, a large stroke asymmetric pneumatic servo system, data acquisition system and the control strategy software will be implemented. Thus, upgrading the high position precision and the trajectory tracking performance of the large stroke asymmetric pneumatic servo system will be realized to promote the high position precision and path tracking capability. Experimental results show that fifth order paths in various strokes and the sine wave path are successfully implemented in the test rig. Also, results of variable loads under the different angle were implemented experimentally.

A Novel Real-Time Path Servo Control of a Hardware-in-the-Loop for a Large-Stroke Asymmetric Rod-Less Pneumatic System under Variable Loads

PubMed Central

Lin, Hao-Ting

2017-01-01

This project aims to develop a novel large stroke asymmetric pneumatic servo system of a hardware-in-the-loop for path tracking control under variable loads based on the MATLAB Simulink real-time system. High pressure compressed air provided by the air compressor is utilized for the pneumatic proportional servo valve to drive the large stroke asymmetric rod-less pneumatic actuator. Due to the pressure differences between two chambers, the pneumatic actuator will operate. The highly nonlinear mathematical models of the large stroke asymmetric pneumatic system were analyzed and developed. The functional approximation technique based on the sliding mode controller (FASC) is developed as a controller to solve the uncertain time-varying nonlinear system. The MATLAB Simulink real-time system was a main control unit of a hardware-in-the-loop system proposed to establish driver blocks for analog and digital I/O, a linear encoder, a CPU and a large stroke asymmetric pneumatic rod-less system. By the position sensor, the position signals of the cylinder will be measured immediately. The measured signals will be viewed as the feedback signals of the pneumatic servo system for the study of real-time positioning control and path tracking control. Finally, real-time control of a large stroke asymmetric pneumatic servo system with measuring system, a large stroke asymmetric pneumatic servo system, data acquisition system and the control strategy software will be implemented. Thus, upgrading the high position precision and the trajectory tracking performance of the large stroke asymmetric pneumatic servo system will be realized to promote the high position precision and path tracking capability. Experimental results show that fifth order paths in various strokes and the sine wave path are successfully implemented in the test rig. Also, results of variable loads under the different angle were implemented experimentally. PMID:28587220

Optimal space communications techniques. [all digital phase locked loop for FM demodulation

NASA Technical Reports Server (NTRS)

Schilling, D. L.

1973-01-01

The design, development, and analysis are reported of a digital phase-locked loop (DPLL) for FM demodulation and threshold extension. One of the features of the developed DPLL is its synchronous, real time operation. The sampling frequency is constant and all the required arithmetic and logic operations are performed within one sampling period, generating an output sequence which is converted to analog form and filtered. An equation relating the sampling frequency to the carrier frequency must be satisfied to guarantee proper DPLL operation. The synchronous operation enables a time-shared operation of one DPLL to demodulate several FM signals simultaneously. In order to obtain information about the DPLL performance at low input signal-to-noise ratios, a model of an input noise spike was introduced, and the DPLL equation was solved using a digital computer. The spike model was successful in finding a second order DPLL which yielded a five db threshold extension beyond that of a first order DPLL.

Digital fluxgate magnetometer: design notes

NASA Astrophysics Data System (ADS)

Belyayev, Serhiy; Ivchenko, Nickolay

2015-12-01

We presented an approach to understanding the performance of a fully digital fluxgate magnetometer. All elements of the design are important for the performance of the instrument, and the presence of the digital feed-back loop introduces certain peculiarities affecting the noise and dynamic performance of the instrument. Ultimately, the quantisation noise of the digital to analogue converter is found to dominate the noise of the current design, although noise shaping alleviates its effect to some extent. An example of magnetometer measurements on board a sounding rocket is presented, and ways to further improve the performance of the instrument are discussed.

Field-Programmable Gate Array-based fluxgate magnetometer with digital integration

NASA Astrophysics Data System (ADS)

Butta, Mattia; Janosek, Michal; Ripka, Pavel

2010-05-01

In this paper, a digital magnetometer based on printed circuit board fluxgate is presented. The fluxgate is pulse excited and the signal is extracted by gate integration. We investigate the possibility to perform integration on very narrow gates (typically 500 ns) by using digital techniques. The magnetometer is based on field-programmable gate array (FPGA) card: we will show all the advantages and disadvantages, given by digitalization of fluxgate output voltage by means of analog-to-digital converter on FPGA card, as well as digitalization performed by external digitizer. Due to very narrow gate, it is shown that a magnetometer entirely based on a FPGA card is preferable, because it avoids noise due to trigger instability. Both open loop and feedback operative mode are described and achieved results are presented.

Frequency set on systems

NASA Astrophysics Data System (ADS)

Wilby, W. A.; Brett, A. R. H.

Frequency set on techniques used in ECM applications include repeater jammers, frequency memory loops (RF and optical), coherent digital RF memories, and closed loop VCO set on systems. Closed loop frequency set on systems using analog phase and frequency locking are considered to have a number of cost and performance advantages. Their performance is discussed in terms of frequency accuracy, bandwidth, locking time, stability, and simultaneous signals. Some experimental results are presented which show typical locking performance. Future ECM systems might require a response to very short pulses. Acoustooptic and fiber-optic pulse stretching techniques can be used to meet such requirements.

Open Ephys: an open-source, plugin-based platform for multichannel electrophysiology.

PubMed

Siegle, Joshua H; López, Aarón Cuevas; Patel, Yogi A; Abramov, Kirill; Ohayon, Shay; Voigts, Jakob

2017-08-01

Closed-loop experiments, in which causal interventions are conditioned on the state of the system under investigation, have become increasingly common in neuroscience. Such experiments can have a high degree of explanatory power, but they require a precise implementation that can be difficult to replicate across laboratories. We sought to overcome this limitation by building open-source software that makes it easier to develop and share algorithms for closed-loop control. We created the Open Ephys GUI, an open-source platform for multichannel electrophysiology experiments. In addition to the standard 'open-loop' visualization and recording functionality, the GUI also includes modules for delivering feedback in response to events detected in the incoming data stream. Importantly, these modules can be built and shared as plugins, which makes it possible for users to extend the functionality of the GUI through a simple API, without having to understand the inner workings of the entire application. In combination with low-cost, open-source hardware for amplifying and digitizing neural signals, the GUI has been used for closed-loop experiments that perturb the hippocampal theta rhythm in a phase-specific manner. The Open Ephys GUI is the first widely used application for multichannel electrophysiology that leverages a plugin-based workflow. We hope that it will lower the barrier to entry for electrophysiologists who wish to incorporate real-time feedback into their research.

Study of nanometer-level precise phase-shift system used in electronic speckle shearography and phase-shift pattern interferometry

NASA Astrophysics Data System (ADS)

Jing, Chao; Liu, Zhongling; Zhou, Ge; Zhang, Yimo

2011-11-01

The nanometer-level precise phase-shift system is designed to realize the phase-shift interferometry in electronic speckle shearography pattern interferometry. The PZT is used as driving component of phase-shift system and translation component of flexure hinge is developed to realize micro displacement of non-friction and non-clearance. Closed-loop control system is designed for high-precision micro displacement, in which embedded digital control system is developed for completing control algorithm and capacitive sensor is used as feedback part for measuring micro displacement in real time. Dynamic model and control model of the nanometer-level precise phase-shift system is analyzed, and high-precision micro displacement is realized with digital PID control algorithm on this basis. It is proved with experiments that the location precision of the precise phase-shift system to step signal of displacement is less than 2nm and the location precision to continuous signal of displacement is less than 5nm, which is satisfied with the request of the electronic speckle shearography and phase-shift pattern interferometry. The stripe images of four-step phase-shift interferometry and the final phase distributed image correlated with distortion of objects are listed in this paper to prove the validity of nanometer-level precise phase-shift system.

Investigation, Modeling and Validation of Digital Bridge for a New Generation Hot-Wire Anemometer

NASA Astrophysics Data System (ADS)

Joshi, Karthik Kamalakar

The Digital Bridge Thermal Anemometer (DBTA) is a new generation anemometer that uses advanced electronics and a modified half-Wheatstone bridge configuration, specifically a sensor and a shunt resistor in series. This allows the miniaturization of the anemometer and the communication between host computer and anemometer is carried out using serial or ethernet which eliminates the noise due to the use of long cables in conventional anemometer and the digital data sent to host computer is immune to electrical noise. In the new configuration the potential drop across a shunt resistor is used to control the bridge. This thesis is confined to the anemometer used in constant temperature (CT) mode. The heat transfer relations are studied and new expressions are developed based on the new configuration of the bridge using perturbation analysis. The theoretical plant model of a commercially available sensor and a custom built sensor are derived and quantified. The plant model is used to design a controller to control the plant in closed-loop using feedback. To test the performance of the modified sensor used with a "generation-I" bridge and DAQ, an experiment was conducted. The controller was implemented in a user interface in LabVIEW. The test is to compare the results between a conventional TSI sensor with an IFA 300 anemometer and the setup describe above, in the wake behind a circular cylinder. Performance of the DBTA is satisfactory at low frequencies. A user interface capable of communicating with the anemometer to control the operation and collect data generated by anemometer is developed in LabVIEW.

Phonological loop affects children's interpretations of explicit but not ambiguous questions: Research on links between working memory and referent assignment.

PubMed

Meng, Xianwei; Murakami, Taro; Hashiya, Kazuhide

2017-01-01

Understanding the referent of other's utterance by referring the contextual information helps in smooth communication. Although this pragmatic referential process can be observed even in infants, its underlying mechanism and relative abilities remain unclear. This study aimed to comprehend the background of the referential process by investigating whether the phonological loop affected the referent assignment. A total of 76 children (43 girls) aged 3-5 years participated in a reference assignment task in which an experimenter asked them to answer explicit (e.g., "What color is this?") and ambiguous (e.g., "What about this?") questions about colorful objects. The phonological loop capacity was measured by using the forward digit span task in which children were required to repeat the numbers as an experimenter uttered them. The results showed that the scores of the forward digit span task positively predicted correct response to explicit questions and part of the ambiguous questions. That is, the phonological loop capacity did not have effects on referent assignment in response to ambiguous questions that were asked after a topic shift of the explicit questions and thus required a backward reference to the preceding explicit questions to detect the intent of the current ambiguous questions. These results suggest that although the phonological loop capacity could overtly enhance the storage of verbal information, it does not seem to directly contribute to the pragmatic referential process, which might require further social cognitive processes.

Development of high precision digital driver of acoustic-optical frequency shifter for ROG

NASA Astrophysics Data System (ADS)

Zhang, Rong; Kong, Mei; Xu, Yameng

2016-10-01

We develop a high precision digital driver of the acoustic-optical frequency shifter (AOFS) based on the parallel direct digital synthesizer (DDS) technology. We use an atomic clock as the phase-locked loop (PLL) reference clock, and the PLL is realized by a dual digital phase-locked loop. A DDS sampling clock up to 320 MHz with a frequency stability as low as 10-12 Hz is obtained. By constructing the RF signal measurement system, it is measured that the frequency output range of the AOFS-driver is 52-58 MHz, the center frequency of the band-pass filter is 55 MHz, the ripple in the band is less than 1 dB@3MHz, the single channel output power is up to 0.3 W, the frequency stability is 1 ppb (1 hour duration), and the frequency-shift precision is 0.1 Hz. The obtained frequency stability has two orders of improvement compared to that of the analog AOFS-drivers. For the designed binary frequency shift keying (2-FSK) and binary phase shift keying (2-PSK) modulation system, the demodulating frequency of the input TTL synchronous level signal is up to 10 kHz. The designed digital-bus coding/decoding system is compatible with many conventional digital bus protocols. It can interface with the ROG signal detecting software through the integrated drive electronics (IDE) and exchange data with the two DDS frequency-shift channels through the signal detecting software.

A 0.8-4.2 GHz monolithic all-digital PLL based frequency synthesizer for wireless communications

NASA Astrophysics Data System (ADS)

Yuanxin, Zhao; Yuanpei, Gao; Wei, Li; Ning, Li; Junyan, Ren

2015-01-01

A 0.8-4.2 GHz monolithic all-digital PLL based frequency synthesizer for wireless communications is successfully realized by the 130 nm CMOS process. A series of novel methods are proposed in this paper. Two band DCOs with high frequency resolution are utilized to cover the frequency band of interest, which is as wide as 2.5 to 5 GHz. An overflow counter is proposed to prevent the “pulse-swallowing” phenomenon so as to significantly reduce the locking time. A NTW-clamp digital module is also proposed to prevent the overflow of the loop control word. A modified programmable divider is presented to prevent the failure operation at the boundary. The measurement results show that the output frequency range of this frequency synthesizer is 0.8-4.2 GHz. The locking time achieves a reduction of 84% at 2.68 GHz. The best in-band and out-band phase noise performances have reached -100 dBc/Hz, and -125 dBc/Hz respectively. The lowest reference spur is -58 dBc.

Self-balanced modulation and magnetic rebalancing method for parallel multilevel inverters

DOE Office of Scientific and Technical Information (OSTI.GOV)

Li, Hui; Shi, Yanjun

A self-balanced modulation method and a closed-loop magnetic flux rebalancing control method for parallel multilevel inverters. The combination of the two methods provides for balancing of the magnetic flux of the inter-cell transformers (ICTs) of the parallel multilevel inverters without deteriorating the quality of the output voltage. In various embodiments a parallel multi-level inverter modulator is provide including a multi-channel comparator to generate a multiplexed digitized ideal waveform for a parallel multi-level inverter and a finite state machine (FSM) module coupled to the parallel multi-channel comparator, the FSM module to receive the multiplexed digitized ideal waveform and to generate amore » pulse width modulated gate-drive signal for each switching device of the parallel multi-level inverter. The system and method provides for optimization of the output voltage spectrum without influence the magnetic balancing.« less

Design of a high-speed digital processing element for parallel simulation

NASA Technical Reports Server (NTRS)

Milner, E. J.; Cwynar, D. S.

1983-01-01

A prototype of a custom designed computer to be used as a processing element in a multiprocessor based jet engine simulator is described. The purpose of the custom design was to give the computer the speed and versatility required to simulate a jet engine in real time. Real time simulations are needed for closed loop testing of digital electronic engine controls. The prototype computer has a microcycle time of 133 nanoseconds. This speed was achieved by: prefetching the next instruction while the current one is executing, transporting data using high speed data busses, and using state of the art components such as a very large scale integration (VLSI) multiplier. Included are discussions of processing element requirements, design philosophy, the architecture of the custom designed processing element, the comprehensive instruction set, the diagnostic support software, and the development status of the custom design.

GPS Block 2R Time Standard Assembly (TSA) architecture

NASA Technical Reports Server (NTRS)

Baker, Anthony P.

1990-01-01

The underlying philosophy of the Global Positioning System (GPS) 2R Time Standard Assembly (TSA) architecture is to utilize two frequency sources, one fixed frequency reference source and one system frequency source, and to couple the system frequency source to the reference frequency source via a sample data loop. The system source is used to provide the basic clock frequency and timing for the space vehicle (SV) and it uses a voltage controlled crystal oscillator (VCXO) with high short term stability. The reference source is an atomic frequency standard (AFS) with high long term stability. The architecture can support any type of frequency standard. In the system design rubidium, cesium, and H2 masers outputting a canonical frequency were accommodated. The architecture is software intensive. All VCXO adjustments are digital and are calculated by a processor. They are applied to the VCXO via a digital to analog converter.

Low speed phaselock speed control system. [for brushless dc motor

NASA Technical Reports Server (NTRS)

Fulcher, R. W.; Sudey, J. (Inventor)

1975-01-01

A motor speed control system for an electronically commutated brushless dc motor is provided which includes a phaselock loop with bidirectional torque control for locking the frequency output of a high density encoder, responsive to actual speed conditions, to a reference frequency signal, corresponding to the desired speed. The system includes a phase comparator, which produces an output in accordance with the difference in phase between the reference and encoder frequency signals, and an integrator-digital-to-analog converter unit, which converts the comparator output into an analog error signal voltage. Compensation circuitry, including a biasing means, is provided to convert the analog error signal voltage to a bidirectional error signal voltage which is utilized by an absolute value amplifier, rotational decoder, power amplifier-commutators, and an arrangement of commutation circuitry.

Advanced I&C for Fault-Tolerant Supervisory Control of Small Modular Reactors

DOE Office of Scientific and Technical Information (OSTI.GOV)

Cole, Daniel G.

In this research, we have developed a supervisory control approach to enable automated control of SMRs. By design the supervisory control system has an hierarchical, interconnected, adaptive control architecture. A considerable advantage to this architecture is that it allows subsystems to communicate at different/finer granularity, facilitates monitoring of process at the modular and plant levels, and enables supervisory control. We have investigated the deployment of automation, monitoring, and data collection technologies to enable operation of multiple SMRs. Each unit's controller collects and transfers information from local loops and optimize that unit’s parameters. Information is passed from the each SMR unitmore » controller to the supervisory controller, which supervises the actions of SMR units and manage plant processes. The information processed at the supervisory level will provide operators the necessary information needed for reactor, unit, and plant operation. In conjunction with the supervisory effort, we have investigated techniques for fault-tolerant networks, over which information is transmitted between local loops and the supervisory controller to maintain a safe level of operational normalcy in the presence of anomalies. The fault-tolerance of the supervisory control architecture, the network that supports it, and the impact of fault-tolerance on multi-unit SMR plant control has been a second focus of this research. To this end, we have investigated the deployment of advanced automation, monitoring, and data collection and communications technologies to enable operation of multiple SMRs. We have created a fault-tolerant multi-unit SMR supervisory controller that collects and transfers information from local loops, supervise their actions, and adaptively optimize the controller parameters. The goal of this research has been to develop the methodologies and procedures for fault-tolerant supervisory control of small modular reactors. To achieve this goal, we have identified the following objectives. These objective are an ordered approach to the research: I) Development of a supervisory digital I&C system II) Fault-tolerance of the supervisory control architecture III) Automated decision making and online monitoring.« less

An advanced communications synthesizer

NASA Astrophysics Data System (ADS)

Scherer, Ernst F.

1994-02-01

With the proliferation of smaller and lower cost EHF terminals, the fast-hopping microwave synthesizer subsystem is rapidly becoming the limiting factor for further size and cost reduction. A new approach, based on a high-speed direct digital synthesizer (DDS) and a very fast voltage controlled oscillator (VCO) tracking loop, has yielded a highly integrable design with true low-cost potential. A frequency range of 1 to 20 GHz can be covered by a simple substitution of the VCO module. This advanced synthesizer realization promises a generic solution to a large class of synthesizer requirements, greatly facilitating standardization and promoting modular system concepts.

Multilocation Video Conference By Optical Fiber

NASA Astrophysics Data System (ADS)

Gray, Donald J.

1982-10-01

An experimental system that permits interconnection of many offices in a single video conference is described. Video images transmitted to conference participants are selected by the conference chairman and switched by a microprocessor-controlled video switch. Speakers can, at their choice, transmit their own images or images of graphics they wish to display. Users are connected to the Switching Center by optical fiber subscriber loops that carry analog video, digitized telephone, data and signaling. The same system also provides user-selectable distribution of video program and video library material. Experience in the operation of the conference system is discussed.

Quartz tuning fork-based frequency modulation atomic force spectroscopy and microscopy with all digital phase-locked loop

NASA Astrophysics Data System (ADS)

An, Sangmin; Hong, Mun-heon; Kim, Jongwoo; Kwon, Soyoung; Lee, Kunyoung; Lee, Manhee; Jhe, Wonho

2012-11-01

We present a platform for the quartz tuning fork (QTF)-based, frequency modulation atomic force microscopy (FM-AFM) system for quantitative study of the mechanical or topographical properties of nanoscale materials, such as the nano-sized water bridge formed between the quartz tip (˜100 nm curvature) and the mica substrate. A thermally stable, all digital phase-locked loop is used to detect the small frequency shift of the QTF signal resulting from the nanomaterial-mediated interactions. The proposed and demonstrated novel FM-AFM technique provides high experimental sensitivity in the measurement of the viscoelastic forces associated with the confined nano-water meniscus, short response time, and insensitivity to amplitude noise, which are essential for precision dynamic force spectroscopy and microscopy.

Quartz tuning fork-based frequency modulation atomic force spectroscopy and microscopy with all digital phase-locked loop.

PubMed

An, Sangmin; Hong, Mun-heon; Kim, Jongwoo; Kwon, Soyoung; Lee, Kunyoung; Lee, Manhee; Jhe, Wonho

2012-11-01

We present a platform for the quartz tuning fork (QTF)-based, frequency modulation atomic force microscopy (FM-AFM) system for quantitative study of the mechanical or topographical properties of nanoscale materials, such as the nano-sized water bridge formed between the quartz tip (~100 nm curvature) and the mica substrate. A thermally stable, all digital phase-locked loop is used to detect the small frequency shift of the QTF signal resulting from the nanomaterial-mediated interactions. The proposed and demonstrated novel FM-AFM technique provides high experimental sensitivity in the measurement of the viscoelastic forces associated with the confined nano-water meniscus, short response time, and insensitivity to amplitude noise, which are essential for precision dynamic force spectroscopy and microscopy.

The impact of closed-loop electronic medication management on time to first dose: a comparative study between paper and digital hospital environments.

PubMed

Austin, Jodie A; Smith, Ian R; Tariq, Amina

2018-01-22

Closed-loop electronic medication management systems (EMMS) are recognised as an effective intervention to improve medication safety, yet evidence of their effectiveness in hospitals is limited. Few studies have compared medication turnaround time for a closed-loop electronic versus paper-based medication management environment. To compare medication turnaround times in a paper-based hospital environment with a digital hospital equipped with a closed-loop EMMS, consisting of computerised physician order entry, profiled automated dispensing cabinets packaged with unit dose medications and barcode medication administration. Data were collected during 2 weeks at three private hospital sites (one with closed-loop EMMS) within the same organisation network in Queensland, Australia. Time between scheduled and actual administration times was analysed for first dose of time-critical and non-critical medications located on the ward or sourced via pharmacy. Medication turnaround times at the EMMS site were less compared to the paper-based sites (median, IQR: 35 min, 8-57 min versus 120 min, 30-180 min, P < 0.001). For time-critical medications, 77% were administered within 60 min of scheduled time at the EMMS site versus 38% for the paper-based sites. Similar difference was observed for non-critical medications, 80% were administered within 60 min of their scheduled time at the EMMS site versus 41% at the paper-based facilities. The study indicates medication turnaround times utilising a closed-loop EMMS are less compared to paper-based systems. This improvement may be attributable to increased accessibility of medications using automated dispensing cabinets and electronic medication administration records flagging tasks to nurses in real time. © 2018 Royal Pharmaceutical Society.

FPGA platform for MEMS Disc Resonance Gyroscope (DRG) control

NASA Astrophysics Data System (ADS)

Keymeulen, Didier; Peay, Chris; Foor, David; Trung, Tran; Bakhshi, Alireza; Withington, Phil; Yee, Karl; Terrile, Rich

2008-04-01

Inertial navigation systems based upon optical gyroscopes tend to be expensive, large, power consumptive, and are not long lived. Micro-Electromechanical Systems (MEMS) based gyros do not have these shortcomings; however, until recently, the performance of MEMS based gyros had been below navigation grade. Boeing and JPL have been cooperating since 1997 to develop high performance MEMS gyroscopes for miniature, low power space Inertial Reference Unit applications. The efforts resulted in demonstration of a Post Resonator Gyroscope (PRG). This experience led to the more compact Disc Resonator Gyroscope (DRG) for further reduced size and power with potentially increased performance. Currently, the mass, volume and power of the DRG are dominated by the size of the electronics. This paper will detail the FPGA based digital electronics architecture and its implementation for the DRG which will allow reduction of size and power and will increase performance through a reduction in electronics noise. Using the digital control based on FPGA, we can program and modify in real-time the control loop to adapt to the specificity of each particular gyro and the change of the mechanical characteristic of the gyro during its life time.

Research of optical coherence tomography microscope based on CCD detector

NASA Astrophysics Data System (ADS)

Zhang, Hua; Xu, Zhongbao; Zhang, Shuomo

2008-12-01

The reference wave phase was modulated with a sinusoidal vibrating mirror attached to a Piezoelectric Transducer (PZT), the integration was performed by a CCD, and the charge storage period of the CCD image sensor was one-quarter period of the sinusoidal phase modulation. With the frequency- synchronous detection technique, four images (four frames of interference pattern) were recorded during one period of the phase modulation. In order to obtain the optimum modulation parameter, the values of amplitude and phase of the sinusoidal phase modulation were determined by considering the measurement error caused by the additive noise contained in the detected values. The PZT oscillation was controlled by a closed loop control system based on PID controller. An ideal discrete digital sine function at 50Hz with adjustable amplitude was used to adjust the vibrating of PZT, and a digital phase shift techniques was used to adjust vibrating phase of PZT so that the phase of the modulation could reach their optimum values. The CCD detector was triggered with software at 200Hz. Based on work above a small coherent signal masked by the preponderant incoherent background with a CCD detector was obtained.

Enhanced Control for Local Helicity Injection on the Pegasus ST

NASA Astrophysics Data System (ADS)

Pierren, C.; Bongard, M. W.; Fonck, R. J.; Lewicki, B. T.; Perry, J. M.

2017-10-01

Local helicity injection (LHI) experiments on Pegasus rely upon programmable control of a 250 MVA modular power supply system that drives the electromagnets and helicity injection systems. Precise control of the central solenoid is critical to experimental campaigns that test the LHI Taylor relaxation limit and the coupling efficiency of LHI-produced plasmas to Ohmic current drive. Enhancement and expansion of the present control system is underway using field programmable gate array (FPGA) technology for digital logic and control, coupled to new 10 MHz optical-to-digital transceivers for semiconductor level device communication. The system accepts optical command signals from existing analog feedback controllers, transmits them to multiple devices in parallel H-bridges, and aggregates their status signals for fault detection. Present device-level multiplexing/de-multiplexing and protection logic is extended to include bridge-level protections with the FPGA. An input command filter protects against erroneous and/or spurious noise generated commands that could otherwise cause device failures. Fault registration and response times with the FPGA system are 25 ns. Initial system testing indicates an increased immunity to power supply induced noise, enabling plasma operations at higher working capacitor bank voltage. This can increase the applied helicity injection drive voltage, enable longer pulse lengths and improve Ohmic loop voltage control. Work supported by US DOE Grant DE-FG02-96ER54375.

Three-phase Four-leg Inverter LabVIEW FPGA Control Code

DOE Office of Scientific and Technical Information (OSTI.GOV)

In the area of power electronics control, Field Programmable Gate Arrays (FPGAs) have the capability to outperform their Digital Signal Processor (DSP) counterparts due to the FPGA’s ability to implement true parallel processing and therefore facilitate higher switching frequencies, higher control bandwidth, and/or enhanced functionality. National Instruments (NI) has developed two platforms, Compact RIO (cRIO) and Single Board RIO (sbRIO), which combine a real-time processor with an FPGA. The FPGA can be programmed with a subset of the well-known LabVIEW graphical programming language. The use of cRIO and sbRIO for power electronics control has developed over the last few yearsmore » to include control of three-phase inverters. Most three-phase inverter topologies include three switching legs. The addition of a fourth-leg to natively generate the neutral connection allows the inverter to serve single-phase loads in a microgrid or stand-alone power system and to balance the three-phase voltages in the presence of significant load imbalance. However, the control of a four-leg inverter is much more complex. In particular, instead of standard two-dimensional space vector modulation (SVM), the inverter requires three-dimensional space vector modulation (3D-SVM). The candidate software implements complete control algorithms in LabVIEW FPGA for a three-phase four-leg inverter. The software includes feedback control loops, three-dimensional space vector modulation gate-drive algorithms, advanced alarm handling capabilities, contactor control, power measurements, and debugging and tuning tools. The feedback control loops allow inverter operation in AC voltage control, AC current control, or DC bus voltage control modes based on external mode selection by a user or supervisory controller. The software includes the ability to synchronize its AC output to the grid or other voltage-source before connection. The software also includes provisions to allow inverter operation in parallel with other voltage regulating devices on the AC or DC buses. This flexibility allows the Inverter to operate as a stand-alone voltage source, connected to the grid, or in parallel with other controllable voltage sources as part of a microgrid or remote power system. In addition, as the inverter is expected to operate under severe unbalanced conditions, the software includes algorithms to accurately compute real and reactive power for each phase based on definitions provided in the IEEE Standard 1459: IEEE Standard Definitions for the Measurement of Electric Power Quantities Under Sinusoidal, Nonsinusoidal, Balanced, or Unbalanced Conditions. Finally, the software includes code to output analog signals for debugging and for tuning of control loops. The software fits on the Xilinx Virtex V LX110 FPGA embedded in the NI cRIO-9118 FPGA chassis, and with a 40 MHz base clock, supports a modulation update rate of 40 MHz, user-settable switching frequencies and synchronized control loop update rates of tens of kHz, and reference waveform generation, including Phase Lock Loop (PLL), update rate of 100 kHz.« less

Method and apparatus for signal compression

DOEpatents

Carangelo, R.M.

1994-02-08

The method and apparatus of the invention effects compression of an analog electrical signal (e.g., representing an interferogram) by introducing into it a component that is a cubic function thereof, normally as a nonlinear negative signal in a feedback loop of an Op Amp. The compressed signal will most desirably be digitized and then digitally decompressed so as to produce a signal that emulates the original. 8 figures.

Method and apparatus for signal compression

DOEpatents

Carangelo, Robert M.

1994-02-08

The method and apparatus of the invention effects compression of an analog electrical signal (e.g., representing an interferogram) by introducing into it a component that is a cubic function thereof, normally as a nonlinear negative signal in a feedback loop of an Op Amp. The compressed signal will most desirably be digitized and then digitally decompressed so as to produce a signal that emulates the original.

Next-Generation NATO Reference Mobility Model (NG-NRMM)

DTIC Science & Technology

2016-05-11

facilitate comparisons between vehicle design candidates and to assess the mobility of existing vehicles under specific scenarios. Although NRMM has...of different deployed platforms in different areas of operation and routes  Improved flexibility as a design and procurement support tool through...Element Method DEM Digital Elevation Model DIL Driver in the Loop DP Drawbar Pull Force DOE Design of Experiments DTED Digital Terrain Elevation Data

Digitally controlled chirped pulse laser for sub-terahertz-range fiber structure interrogation.

PubMed

Chen, Zhen; Hefferman, Gerald; Wei, Tao

2017-03-01

This Letter reports a sweep velocity-locked laser pulse generator controlled using a digital phase-locked loop (DPLL) circuit. This design is used for the interrogation of sub-terahertz-range fiber structures for sensing applications that require real-time data collection with millimeter-level spatial resolution. A distributed feedback laser was employed to generate chirped laser pulses via injection current modulation. A DPLL circuit was developed to lock the optical frequency sweep velocity. A high-quality linearly chirped laser pulse with a frequency excursion of 117.69 GHz at an optical communication band was demonstrated. The system was further adopted to interrogate a continuously distributed sub-terahertz-range fiber structure (sub-THz-fs) for sensing applications. A strain test was conducted in which the sub-THz-fs showed a linear response to longitudinal strain change with predicted sensitivity. Additionally, temperature testing was conducted in which a heat source was used to generate a temperature distribution along the fiber structure to demonstrate its distributed sensing capability. A Gaussian temperature profile was measured using the described system and tracked in real time, as the heat source was moved.

A frequency standard via spectrum analysis and direct digital synthesis

NASA Astrophysics Data System (ADS)

Li, Dawei; Shi, Daiting; Hu, Ermeng; Wang, Yigen; Tian, Lu; Zhao, Jianye; Wang, Zhong

2014-11-01

We demonstrated a frequency standard based on a detuned coherent population beating phenomenon. In this phenomenon, the beat frequency of the radio frequency for laser modulation and the hyperfine splitting can be obtained by digital signal processing technology. After analyzing the spectrum of the beat frequency, the fluctuation information is obtained and applied to compensate for the frequency shift to generate the standard frequency by the digital synthesis method. Frequency instability of 2.6 × 1012 at 1000 s is observed in our preliminary experiment. By eliminating the phase-locking loop, the method will enable us to achieve a full-digital frequency standard with remarkable stability.

Tanlock loop noise reduction using an optimised phase detector

NASA Astrophysics Data System (ADS)

Al-kharji Al-Ali, Omar; Anani, Nader; Al-Qutayri, Mahmoud; Al-Araji, Saleh

2013-06-01

This article proposes a time-delay digital tanlock loop (TDTL), which uses a new phase detector (PD) design that is optimised for noise reduction making it amenable for applications that require wide lock range without sacrificing the level of noise immunity. The proposed system uses an improved phase detector design which uses two phase detectors; one PD is used to optimise the noise immunity whilst the other is used to control the acquisition time of the TDTL system. Using the modified phase detector it is possible to reduce the second- and higher-order harmonics by at least 50% compared with the conventional TDTL system. The proposed system was simulated and tested using MATLAB/Simulink using frequency step inputs and inputs corrupted with varying levels of harmonic distortion. A hardware prototype of the system was implemented using a field programmable gate array (FPGA). The practical and simulation results indicate considerable improvement in the noise performance of the proposed system over the conventional TDTL architecture.

Closed-loop optical stabilization and digital image registration in adaptive optics scanning light ophthalmoscopy

PubMed Central

Yang, Qiang; Zhang, Jie; Nozato, Koji; Saito, Kenichi; Williams, David R.; Roorda, Austin; Rossi, Ethan A.

2014-01-01

Eye motion is a major impediment to the efficient acquisition of high resolution retinal images with the adaptive optics (AO) scanning light ophthalmoscope (AOSLO). Here we demonstrate a solution to this problem by implementing both optical stabilization and digital image registration in an AOSLO. We replaced the slow scanning mirror with a two-axis tip/tilt mirror for the dual functions of slow scanning and optical stabilization. Closed-loop optical stabilization reduced the amplitude of eye-movement related-image motion by a factor of 10–15. The residual RMS error after optical stabilization alone was on the order of the size of foveal cones: ~1.66–2.56 μm or ~0.34–0.53 arcmin with typical fixational eye motion for normal observers. The full implementation, with real-time digital image registration, corrected the residual eye motion after optical stabilization with an accuracy of ~0.20–0.25 μm or ~0.04–0.05 arcmin RMS, which to our knowledge is more accurate than any method previously reported. PMID:25401030

Viking Orbiter 1975 articulation control subsystem design analysis

NASA Technical Reports Server (NTRS)

Horiuchi, H. H.; Vallas, L. J.

1973-01-01

The articulation control subsystem, developed for the Viking Orbiter 1975 spacecraft, is a digital, multiplexed, closed-loop servo system used to control the pointing and positioning of the science scan platform and the high-gain communication antenna, and to position the solar-energy controller louver blades for the thermal control of the propellant tanks. The development, design, and anlaysis of the subsystem is preliminary. The subsystem consists of a block-redundant control electronics multiplexed among eight control actuators. Each electronics block is capable of operating either individually or simultaneously with the second block. This provides the subsystem the capability of simultaneous two-actuator control or a single actuator control with the second block in a stand-by redundant mode. The result of the preliminary design and analysis indicates that the subsystem will perform satisfactorily in the Viking Orbiter 1975 mission. Some of the parameter values used, particularly those in the subsystem dynamics and the error estimates, are preliminary and the results will be updated as more accurate parameter values become available.

Design and test of three active flutter suppression controllers

NASA Technical Reports Server (NTRS)

Christhilf, David M.; Waszak, Martin R.; Adams, William M.; Srinathkumar, S.; Mukhopadhyay, Vivek

1991-01-01

Three flutter suppression control law design techniques are presented. Each uses multiple control surfaces and/or sensors. The first uses linear combinations of several accelerometer signals together with dynamic compensation to synthesize the modal rate of the critical mode for feedback to distributed control surfaces. The second uses traditional tools (pole/zero loci and Nyquist diagrams) to develop a good understanding of the flutter mechanism and produce a controller with minimal complexity and good robustness to plant uncertainty. The third starts with a minimum energy Linear Quadratic Gaussian controller, applies controller order reduction, and then modifies weight and noise covariance matrices to improve multi-variable robustness. The resulting designs were implemented digitally and tested subsonically on the Active Flexible Wing (AFW) wind tunnel model. Test results presented here include plant characteristics, maximum attained closed-loop dynamic pressure, and Root Mean Square control surface activity. A key result is that simultaneous symmetric and antisymmetric flutter suppression was achieved by the second control law, with a 24 percent increase in attainable dynamic pressure.

Phonological loop affects children’s interpretations of explicit but not ambiguous questions: Research on links between working memory and referent assignment

PubMed Central

Murakami, Taro; Hashiya, Kazuhide

2017-01-01

Understanding the referent of other’s utterance by referring the contextual information helps in smooth communication. Although this pragmatic referential process can be observed even in infants, its underlying mechanism and relative abilities remain unclear. This study aimed to comprehend the background of the referential process by investigating whether the phonological loop affected the referent assignment. A total of 76 children (43 girls) aged 3–5 years participated in a reference assignment task in which an experimenter asked them to answer explicit (e.g., “What color is this?”) and ambiguous (e.g., “What about this?”) questions about colorful objects. The phonological loop capacity was measured by using the forward digit span task in which children were required to repeat the numbers as an experimenter uttered them. The results showed that the scores of the forward digit span task positively predicted correct response to explicit questions and part of the ambiguous questions. That is, the phonological loop capacity did not have effects on referent assignment in response to ambiguous questions that were asked after a topic shift of the explicit questions and thus required a backward reference to the preceding explicit questions to detect the intent of the current ambiguous questions. These results suggest that although the phonological loop capacity could overtly enhance the storage of verbal information, it does not seem to directly contribute to the pragmatic referential process, which might require further social cognitive processes. PMID:29088282

Design of a delay-locked-loop-based time-to-digital converter

NASA Astrophysics Data System (ADS)

Zhaoxin, Ma; Xuefei, Bai; Lu, Huang

2013-09-01

A time-to-digital converter (TDC) based on a reset-free and anti-harmonic delay-locked loop (DLL) circuit for wireless positioning systems is discussed and described. The DLL that generates 32-phase clocks and a cycle period detector is employed to avoid “false locking". Driven by multiphase clocks, an encoder detects pulses and outputs the phase of the clock when the pulse arrives. The proposed TDC was implemented in SMIC 0.18 μm CMOS technology, and its core area occupies 0.7 × 0.55 mm2. The reference frequency ranges from 20 to 150 MHz. An LSB resolution of 521 ps can be achieved by using a reference clock of 60 MHz and the DNL is less than ±0.75 LSB. It dissipates 31.5 mW at 1.8 V supply voltage.

Feedback Augmented Sub-Ranging (FASR) Quantizer

NASA Technical Reports Server (NTRS)

Guilligan, Gerard

2012-01-01

This innovation is intended to reduce the size, power, and complexity of pipeline analog-to-digital converters (ADCs) that require high resolution and speed along with low power. Digitizers are important components in any application where analog signals (such as light, sound, temperature, etc.) need to be digitally processed. The innovation implements amplification of a sampled residual voltage in a switched capacitor amplifier stage that does not depend on charge redistribution. The result is less sensitive to capacitor mismatches that cause gain errors, which are the main limitation of such amplifiers in pipeline ADCs. The residual errors due to mismatch are reduced by at least a factor of 16, which is equivalent to at least 4 bits of improvement. The settling time is also faster because of a higher feedback factor. In traditional switched capacitor residue amplifiers, closed-loop amplification of a sampled and held residue signal is achieved by redistributing sampled charge onto a feedback capacitor around a high-gain transconductance amplifier. The residual charge that was sampled during the acquisition or sampling phase is stored on two or more capacitors, often equal in value or integral multiples of each other. During the hold or amplification phase, all of the charge is redistributed onto one capacitor in the feedback loop of the amplifier to produce an amplified voltage. The key error source is the non-ideal ratios of feedback and input capacitors caused by manufacturing tolerances, called mismatches. The mismatches cause non-ideal closed-loop gain, leading to higher differential non-linearity. Traditional solutions to the mismatch errors are to use larger capacitor values (than dictated by thermal noise requirements) and/or complex calibration schemes, both of which increase the die size and power dissipation. The key features of this innovation are (1) the elimination of the need for charge redistribution to achieve an accurate closed-loop gain of two, (2) a higher feedback factor in the amplifier stage giving a higher closed-loop bandwidth compared to the prior art, and (3) reduced requirement for calibration. The accuracy of the new amplifier is mainly limited by the sampling networks parasitic capacitances, which should be minimized in relation to the sampling capacitors.

Study of design and control of remote manipulators. Modeling manipulator arms with distributed flexibility for design and control

NASA Technical Reports Server (NTRS)

Book, W. J.

1974-01-01

The interactions of control system and distributed flexible structural dynamics is explored for mechanical arms. A modeling process using 4 x 4 transfer matrices is described which permits the closed loop response of many current arm configurations to be evaluated. Root locus, frequency response, modal shapes, and time impulse response have all been obtained from the digital computer implementation of this model, which is oriented to arm design and allows for easy variation of the arm configuration through data cards. The model corresponds with experimentally observed natural frequencies with an average error of less than 5% in the first three flexible modes in the seven cases considered. The model was used to explore the limits imposed by structural flexibility on a nondimensionalized two link arm with one and two joints for planar motion.

Nanoscale superconducting memory based on the kinetic inductance of asymmetric nanowire loops

NASA Astrophysics Data System (ADS)

Murphy, Andrew; Averin, Dmitri V.; Bezryadin, Alexey

2017-06-01

The demand for low-dissipation nanoscale memory devices is as strong as ever. As Moore’s law is staggering, and the demand for a low-power-consuming supercomputer is high, the goal of making information processing circuits out of superconductors is one of the central goals of modern technology and physics. So far, digital superconducting circuits could not demonstrate their immense potential. One important reason for this is that a dense superconducting memory technology is not yet available. Miniaturization of traditional superconducting quantum interference devices is difficult below a few micrometers because their operation relies on the geometric inductance of the superconducting loop. Magnetic memories do allow nanometer-scale miniaturization, but they are not purely superconducting (Baek et al 2014 Nat. Commun. 5 3888). Our approach is to make nanometer scale memory cells based on the kinetic inductance (and not geometric inductance) of superconducting nanowire loops, which have already shown many fascinating properties (Aprili 2006 Nat. Nanotechnol. 1 15; Hopkins et al 2005 Science 308 1762). This allows much smaller devices and naturally eliminates magnetic-field cross-talk. We demonstrate that the vorticity, i.e., the winding number of the order parameter, of a closed superconducting loop can be used for realizing a nanoscale nonvolatile memory device. We demonstrate how to alter the vorticity in a controlled fashion by applying calibrated current pulses. A reliable read-out of the memory is also demonstrated. We present arguments that such memory can be developed to operate without energy dissipation.

Trajectory tracking control for underactuated stratospheric airship

NASA Astrophysics Data System (ADS)

Zheng, Zewei; Huo, Wei; Wu, Zhe

2012-10-01

Stratospheric airship is a new kind of aerospace system which has attracted worldwide developing interests for its broad application prospects. Based on the trajectory linearization control (TLC) theory, a novel trajectory tracking control method for an underactuated stratospheric airship is presented in this paper. Firstly, the TLC theory is described sketchily, and the dynamic model of the stratospheric airship is introduced with kinematics and dynamics equations. Then, the trajectory tracking control strategy is deduced in detail. The designed control system possesses a cascaded structure which consists of desired attitude calculation, position control loop and attitude control loop. Two sub-loops are designed for the position and attitude control loops, respectively, including the kinematics control loop and dynamics control loop. Stability analysis shows that the controlled closed-loop system is exponentially stable. Finally, simulation results for the stratospheric airship to track typical trajectories are illustrated to verify effectiveness of the proposed approach.

Closed-Loop Control Better than Open-Loop Control of Profofol TCI Guided by BIS: A Randomized, Controlled, Multicenter Clinical Trial to Evaluate the CONCERT-CL Closed-Loop System

PubMed Central

Zhang, Xuena; Wu, Anshi; Yao, Shanglong; Xue, Zhanggang; Yue, Yun

2015-01-01

Background The CONCERT-CL closed-loop infusion system designed by VERYARK Technology Co., Ltd. (Guangxi, China) is an innovation using TCI combined with closed-loop controlled intravenous anesthesia under the guide of BIS. In this study we performed a randomized, controlled, multicenter study to compare closed-loop control and open-loop control of propofol by using the CONCERT-CL closed-loop infusion system. Methods 180 surgical patients from three medical centers undergone TCI intravenous anesthesia with propofol and remifentanil were randomly assigned to propofol closed-loop group and propofol opened-loop groups. Primary outcome was global score (GS, GS = (MDAPE+Wobble)/% of time of bispectral index (BIS) 40-60). Secondary outcomes were doses of the anesthetics and emergence time from anesthesia, such as, time to tracheal extubation. Results There were 89 and 86 patients in the closed-loop and opened-loop groups, respectively. GS in the closed-loop groups (22.21±8.50) were lower than that in the opened-loop group (27.19±15.26) (p=0.009). The higher proportion of time of BIS between 40 and 60 was also observed in the closed-loop group (84.11±9.50%), while that was 79.92±13.17% in the opened-loop group, (p=0.016). No significant differences in propofol dose and time of tracheal extubation were observed. The frequency of propofol regulation in the closed-loop group (31.55±9.46 times/hr) was obverse higher than that in the opened-loop group (6.84±6.21 times/hr) (p=0.000). Conclusion The CONCERT-CL closed-loop infusion system can automatically regulate the TCI of propofol, maintain the BIS value in an adequate range and reduce the workload of anesthesiologists better than open-loop system. Trial Registration ChiCTR ChiCTR-OOR-14005551 PMID:25886041

GASICA: generic automated stress induction and control application design of an application for controlling the stress state.

PubMed

van der Vijgh, Benny; Beun, Robbert J; van Rood, Maarten; Werkhoven, Peter

2014-01-01

In a multitude of research and therapy paradigms it is relevant to know, and desirably to control, the stress state of a patient or participant. Examples include research paradigms in which the stress state is the dependent or independent variable, or therapy paradigms where this state indicates the boundaries of the therapy. To our knowledge, no application currently exists that focuses specifically on the automated control of the stress state while at the same time being generic enough to be used in various therapy and research purposes. Therefore, we introduce GASICA, an application aimed at the automated control of the stress state in a multitude of therapy and research paradigms. The application consists of three components: a digital stressor game, a set of measurement devices, and a feedback model. These three components form a closed loop (called a biocybernetic loop by Pope et al. (1995) and Fairclough (2009) that continuously presents an acute psychological stressor, measures several physiological responses to this stressor, and adjusts the stressor intensity based on these measurements by means of the feedback model, hereby aiming to control the stress state. In this manner GASICA presents multidimensional and ecological valid stressors, whilst continuously in control of the form and intensity of the presented stressors, aiming at the automated control of the stress state. Furthermore, the application is designed as a modular open-source application to easily implement different therapy and research tasks using a high-level programming interface and configuration file, and allows for the addition of (existing) measurement equipment, making it usable for various paradigms.

GASICA: generic automated stress induction and control application design of an application for controlling the stress state

PubMed Central

van der Vijgh, Benny; Beun, Robbert J.; van Rood, Maarten; Werkhoven, Peter

2014-01-01

In a multitude of research and therapy paradigms it is relevant to know, and desirably to control, the stress state of a patient or participant. Examples include research paradigms in which the stress state is the dependent or independent variable, or therapy paradigms where this state indicates the boundaries of the therapy. To our knowledge, no application currently exists that focuses specifically on the automated control of the stress state while at the same time being generic enough to be used in various therapy and research purposes. Therefore, we introduce GASICA, an application aimed at the automated control of the stress state in a multitude of therapy and research paradigms. The application consists of three components: a digital stressor game, a set of measurement devices, and a feedback model. These three components form a closed loop (called a biocybernetic loop by Pope et al. (1995) and Fairclough (2009) that continuously presents an acute psychological stressor, measures several physiological responses to this stressor, and adjusts the stressor intensity based on these measurements by means of the feedback model, hereby aiming to control the stress state. In this manner GASICA presents multidimensional and ecological valid stressors, whilst continuously in control of the form and intensity of the presented stressors, aiming at the automated control of the stress state. Furthermore, the application is designed as a modular open-source application to easily implement different therapy and research tasks using a high-level programming interface and configuration file, and allows for the addition of (existing) measurement equipment, making it usable for various paradigms. PMID:25538554

Versatile all-digital time interval measuring system

NASA Astrophysics Data System (ADS)

Vyhlidal, David; Cech, Miroslav

2011-06-01

This paper describes a design and performance of a versatile all-digital time interval measuring system. The measurement method is based on an interpolation principle. In this principle the time interval is first roughly digitized by a coarse counter driven by a high stability reference clock and the fractions between the clock periods are measured by two Time-to-Digital Converter chips TDC-GPX manufactured by Acam messelectronic. Control circuits allow programmable customization of the system to satisfy many applications such as laser range finding, event counting, or time-of-flight measurements in various physics experiments. The system has two reference clocks inputs and two independent channels for measuring start and stop events. Only one 40 MHz reference is required for the measurement. The second reference can be, for example, 1 PPS (Pulse per Second) signal from a GPS (Global Positioning System) to time tag events. Time intervals are measured using the highest resolution mode of the TDC-GPX chips. The resolution of each chip is software programmable and is PLL (Phase Locked Loop) stabilized against temperature and voltage variations. The system can achieve a timing resolution better than 15 ps rms with up to 90 kHz repetition rate. The time interval measurement range is from 0 ps up to 1 second. The power consumption of the whole system is 18 W including an embedded computer board and an LCD (Liquid Crystal Display) screen. The embedded computer controls the whole system, collects and evaluates measurement data and with the display provides a user interface. The system is implemented using commercially available components.

Generation of multiple analog pulses with different duty cycles within VME control system for ICRH Aditya system

NASA Astrophysics Data System (ADS)

Joshi, Ramesh; Singh, Manoj; Jadav, H. M.; Misra, Kishor; Kulkarni, S. V.; ICRH-RF Group

2010-02-01

Ion Cyclotron Resonance Heating (ICRH) is a promising heating method for a fusion device due to its localized power deposition profile, a direct ion heating at high density, and established technology for high RF power generation and transmission at low cost. Multiple analog pulse with different duty cycle in master of digital pulse for Data acquisition and Control system for steady state RF ICRH System(RF ICRH DAC) to be used for operating of RF Generator in Aditya to produce pre ionization and second analog pulse will produce heating. The control system software is based upon single digital pulse operation for RF source. It is planned to integrate multiple analog pulses with different duty cycle in master of digital pulse for Data acquisition and Control system for RF ICRH System(RF ICRH DAC) to be used for operating of RF Generator in Aditya tokamak. The task of RF ICRH DAC is to control and acquisition of all ICRH system operation with all control loop and acquisition for post analysis of data with java based tool. For pre ionization startup as well as heating experiments using multiple RF Power of different powers and duration. The experiment based upon the idea of using single RF generator to energize antenna inside the tokamak to radiate power twise, out of which first analog pulse will produce pre ionization and second analog pulse will produce heating. The whole system is based on standard client server technology using tcp/ip protocol. DAC Software is based on linux operating system for highly reliable, secure and stable system operation in failsafe manner. Client system is based on tcl/tk like toolkit for user interface with c/c++ like environment which is reliable programming languages widely used on stand alone system operation with server as vxWorks real time operating system like environment. The paper is focused on the Data acquisition and monitoring system software on Aditya RF ICRH System with analog pulses in slave mode with digital pulse in master mode for control acquisition and monitoring and interlocking.

Precision and Fast Wavelength Tuning of a Dynamically Phase-Locked Widely-Tunable Laser

NASA Technical Reports Server (NTRS)

Numata, Kenji; Chen, Jeffrey R.; Wu, Stewart T.

2012-01-01

We report a precision and fast wavelength tuning technique demonstrated for a digital-supermode distributed Bragg reflector laser. The laser was dynamically offset-locked to a frequency-stabilized master laser using an optical phase-locked loop, enabling precision fast tuning to and from any frequencies within a 40-GHz tuning range. The offset frequency noise was suppressed to the statically offset-locked level in less than 40 s upon each frequency switch, allowing the laser to retain the absolute frequency stability of the master laser. This technique satisfies stringent requirements for gas sensing lidars and enables other applications that require such well-controlled precision fast tuning.

Note: Inter-satellite laser range-rate measurement by using digital phase locked loop.

PubMed

Liang, Yu-Rong; Duan, Hui-Zong; Xiao, Xin-Long; Wei, Bing-Bing; Yeh, Hsien-Chi

2015-01-01

This note presents an improved high-resolution frequency measurement system dedicated for the inter-satellite range-rate monitoring that could be used in the future's gravity recovery mission. We set up a simplified common signal test instead of the three frequencies test. The experimental results show that the dominant noises are the sampling time jitter and the thermal drift of electronic components, which can be reduced by using the pilot-tone correction and passive thermal control. The improved noise level is about 10(-8) Hz/Hz(1/2)@0.01Hz, limited by the signal-to-noise ratio of the sampling circuit.

Note: Inter-satellite laser range-rate measurement by using digital phase locked loop

DOE Office of Scientific and Technical Information (OSTI.GOV)

Liang, Yu-Rong; Department of Electronics and Information Engineering, Huazhong University of Science and Technology, 1037 Luo Yu Road, Wuhan 430074; Duan, Hui-Zong

2015-01-15

This note presents an improved high-resolution frequency measurement system dedicated for the inter-satellite range-rate monitoring that could be used in the future’s gravity recovery mission. We set up a simplified common signal test instead of the three frequencies test. The experimental results show that the dominant noises are the sampling time jitter and the thermal drift of electronic components, which can be reduced by using the pilot-tone correction and passive thermal control. The improved noise level is about 10{sup −8} Hz/Hz{sup 1/2}@0.01Hz, limited by the signal-to-noise ratio of the sampling circuit.

Note: Inter-satellite laser range-rate measurement by using digital phase locked loop

NASA Astrophysics Data System (ADS)

Liang, Yu-Rong; Duan, Hui-Zong; Xiao, Xin-Long; Wei, Bing-Bing; Yeh, Hsien-Chi

2015-01-01

This note presents an improved high-resolution frequency measurement system dedicated for the inter-satellite range-rate monitoring that could be used in the future's gravity recovery mission. We set up a simplified common signal test instead of the three frequencies test. The experimental results show that the dominant noises are the sampling time jitter and the thermal drift of electronic components, which can be reduced by using the pilot-tone correction and passive thermal control. The improved noise level is about 10-8 Hz/Hz1/2@0.01Hz, limited by the signal-to-noise ratio of the sampling circuit.